diff --git a/.azuredevops/cmake_build_win.yml b/.azuredevops/cmake_build_win.yml new file mode 100644 index 00000000..e0993e09 --- /dev/null +++ b/.azuredevops/cmake_build_win.yml @@ -0,0 +1,40 @@ +# editing pipeline due to message in ADO about a bad trigger. + +variables: + - name: BuildOutput + value: out + - name: VerboseOutput + value: true + +strategy: + matrix: + windows_x86_openssl: + imageName: windows-2019 + targetArchitecture: Win32 + cmakecryptoargs: -DcryptoLib_Symmetric=Ossl -DcryptoLib_Hash=Ossl -DcryptoLib_BnMath=Ossl -DcryptoLib_Math=TpmBigNum + +pool: + vmImage: $(imageName) + +steps: +- checkout: self + submodules: true + + +################################################### +# Windows +################################################### + +# Use CMake to setup target build environment +- task: CMake@1 + inputs: + cmakeArgs: -S $(BUILD.SOURCESDIRECTORY)\TPMCmd -B $(BUILD.SOURCESDIRECTORY)\TPMCmd\$(BuildOutput) -G "Visual Studio 16 2019" -A $(targetArchitecture) $(cmakecryptoargs) + displayName: CMake setup build environment + condition: eq( variables['Agent.OS'], 'Windows_NT' ) + +# Use CMake to execute build +- task: CMake@1 + inputs: + cmakeArgs: --build $(BUILD.SOURCESDIRECTORY)\TPMCmd\$(BuildOutput) + displayName: CMake build TPM2 + condition: eq( variables['Agent.OS'], 'Windows_NT' ) diff --git a/.clang-format b/.clang-format index 26658ad8..21ff379f 100644 --- a/.clang-format +++ b/.clang-format @@ -1,4 +1,5 @@ --- +# Last formatted with clang-format version 17.0.3 Language: Cpp BasedOnStyle: Microsoft AccessModifierOffset: -4 diff --git a/.git-blame-ignore-revs b/.git-blame-ignore-revs new file mode 100644 index 00000000..363f3b39 --- /dev/null +++ b/.git-blame-ignore-revs @@ -0,0 +1,22 @@ +# By default, the Github Blame UI ignores commits in this file. +# To use this file locally, run either: +# git blame --ignore-revs-file .git-blame-ignore-revs +# git config blame.ignoreRevsFile .git-blame-ignore-revs + +# https://github.com/TrustedComputingGroup/TPM-Internal/pull/4 +# Mass trim whitespace from .c & .h files, preserving line endings. +705706aa59d777566159f346ce8bf04cac0fa64c + +# https://github.com/TrustedComputingGroup/TPM-Internal/pull/2 +# Apply .clang-format +c68483355e66d714266a3fe8cde8e12c907783b5 + +# https://github.com/TrustedComputingGroup/TPM-Internal/pull/21 +# Run clang-format on samples folder +5d12e6e85290252ee141ecfba4eb5338d30300ee + +# https://github.com/TrustedComputingGroup/TPM-Internal/pull/65 +# setup line normalization +7ada6844eefed59c8d1eb53a27b43e7ca6b5bc1a +# Apply clang-format. +9a9eab4140ba61e3083996b8123c99cf94f66f57 diff --git a/.gitattributes b/.gitattributes index 0790aaa5..fa51adee 100644 --- a/.gitattributes +++ b/.gitattributes @@ -6,10 +6,11 @@ *.py text eol=lf *.ps1 text eol=lf *.yml text eol=lf -*.sh text eol=lf -# VS & CMD prefer CRLF +# not sure if VS likes LF in its project files *.vcproj text eol=crlf +# ditto for CMD.exe *.cmd text eol=crlf +*.sh text eol=lf ############################################################################### # behavior for image files diff --git a/.githooks/pre-commit b/.githooks/pre-commit new file mode 100644 index 00000000..a1626674 --- /dev/null +++ b/.githooks/pre-commit @@ -0,0 +1,72 @@ +#!/bin/bash +# run clang-format as a pre-commit hook. +# +# requires a specific path to clang-format be provided via git-config. +# simply runs given clang-format with -style=file, expecting a .clang-format file +# in the root of the repository. Format changes are automatically applied, but +# any errors in this script result in commit failure. +# +# If reformatting the code undoes all the changes in the commit, then the commit will be blocked. +# The only way around it is to use --no-verify. --allow-empty doesn't work because that +# check happens prior to git calling the hook, and I don't know how to interrogate +# the state of --allow-empty from inside the hook. +# +# this hook can be force-run on a segment of commits via rebase using exec. For example +# this will replay and format all the commits on the current branch since commit c77fa657. +# git rebase --strategy-option=theirs -x "git reset --soft HEAD~1 && git commit -C HEAD@{1}" --onto c77fa657 c77fa657 +# +# this trick suggested by: # https://www.dlyr.fr/stuff/2021/03/magic-rebase-and-format/ +# +# This hook has only been tested on Windows, and on Windows the path to clang-format should be a +# Windows, not Linux format path, for example: +# +# >git config --local --add hooks.clangformat.path "c:\Program Files\Microsoft Visual Studio\2022\Enterprise\VC\Tools\Llvm\bin\clang-format.exe" +# +# This should work on Windows and Linux (not-verified) if hooks.clangformat.path is set to "clang-format" +# with clang-format already on your path. +# +# Redirect output to stderr. +exec 1>&2 +# fail commit if hook fails +set -e + +CLANG_FORMAT=$(git config --get hooks.clangformat.path) +if [ -z "${CLANG_FORMAT}" ]; then + echo A path to clang-format must be set in hooks.clangformat.path + exit 1 +fi + +format_file() { + file="${1}" + echo "formatting ${file}" + if [ -f $file ]; then + # move working dir file out of the way + mv ${file} ${file}.working + # unstage the changes to be committed from the index + git restore --worktree ${file} + # and format it. + "${CLANG_FORMAT}" -i --style=file ${file} + # add back to index + git add ${file} + # replace pending worktree changes + mv ${file}.working ${file} + fi +} + +for file in `git diff-index --cached --name-only HEAD | grep -iE '\.(cpp|cc|c|h|hpp|inl)$' ` ; do + format_file "${file}" +done + +# after formatting there may be no remaining (staged) changes +# so check and abort commit if nothing remains. +set +e +# Assume something remains +EXIT_CODE=0 +# sets $? to 1 if anything is different +git diff-index --cached --exit-code HEAD +if [ $? -eq 0 ]; then + # nothing remains, fail hook + echo No changes remain after auto-format hook. Aborting commit... + EXIT_CODE=1 +fi +exit ${EXIT_CODE} diff --git a/.github/CODEOWNERS b/.github/CODEOWNERS new file mode 100644 index 00000000..99bcdb1d --- /dev/null +++ b/.github/CODEOWNERS @@ -0,0 +1,7 @@ +# See https://docs.github.com/en/repositories/managing-your-repositorys-settings-and-features/customizing-your-repository/about-code-owners +# Each line is a file pattern followed by one or more owners. + +# These owners will be the default owners for everything in +# the repo. Unless a later match takes precedence, +# These will be requested for review when someone opens a pull request. +* @bradlitterell @N7JTI \ No newline at end of file diff --git a/.github/workflows/docker-check.yml b/.github/workflows/docker-check.yml new file mode 100644 index 00000000..29eac640 --- /dev/null +++ b/.github/workflows/docker-check.yml @@ -0,0 +1,31 @@ +name: docker build validation + +on: + # Allows you to run this workflow manually from the Actions tab + workflow_dispatch: + +jobs: + build-validation: + + runs-on: ubuntu-latest + permissions: + contents: read + + steps: + - name: Checkout repository + uses: actions/checkout@v3 + + - name: Setup Docker buildx + uses: docker/setup-buildx-action@v1 + + # Build the Docker image (native platform only) to check the build. + # Don't build cross-platform as it takes 10x as long. + # https://github.com/docker/build-push-action + - name: Build and push Docker image + id: build-and-push + uses: docker/build-push-action@v3 + with: + context: . + push: false + tags: ${{ steps.meta.outputs.tags }} + labels: ${{ steps.meta.outputs.labels }} diff --git a/.github/workflows/docker-publish.yml b/.github/workflows/docker-publish.yml new file mode 100644 index 00000000..1b1cadf3 --- /dev/null +++ b/.github/workflows/docker-publish.yml @@ -0,0 +1,67 @@ +name: publish container + +on: + push: + # Publish semver tags as releases. + tags: [ 'v*.*.*' ] + +env: + # Use docker.io for Docker Hub if empty + REGISTRY: ghcr.io + # github.repository as / + IMAGE_NAME: ${{ github.repository }} + + +jobs: + publish-container: + + runs-on: ubuntu-latest + permissions: + contents: read + packages: write + + steps: + - name: Checkout repository + uses: actions/checkout@v3 + + # Set up QEMU for cross-platform builds below + - name: Set up QEMU + id: qemu + uses: docker/setup-qemu-action@v1 + with: + image: tonistiigi/binfmt:latest + platforms: all + + - name: Setup Docker buildx + uses: docker/setup-buildx-action@v2 + + # Extract metadata (tags, labels) for Docker + # https://github.com/docker/metadata-action + - name: Extract Docker metadata + id: meta + uses: docker/metadata-action@v4 + with: + images: ${{ env.REGISTRY }}/${{ env.IMAGE_NAME }} + tags: | + type=semver,pattern=r{{version}} + + # Login against a Docker registry + # https://github.com/docker/login-action + - name: Log into registry ${{ env.REGISTRY }} + uses: docker/login-action@v2 + with: + registry: ${{ env.REGISTRY }} + username: ${{ github.actor }} + password: ${{ secrets.GITHUB_TOKEN }} + + # Build and push Docker image with Buildx + # https://github.com/docker/build-push-action + - name: Build and push Docker image + id: build-and-push + uses: docker/build-push-action@v3 + with: + context: . + platforms: linux/amd64,linux/arm64 + push: true + tags: ${{ steps.meta.outputs.tags }} + labels: ${{ steps.meta.outputs.labels }} diff --git a/.github/workflows/giant-run-tests.yml b/.github/workflows/giant-run-tests.yml new file mode 100644 index 00000000..5eff75d3 --- /dev/null +++ b/.github/workflows/giant-run-tests.yml @@ -0,0 +1,77 @@ +# Run the tests against the simulator + +name: run_tests_on_fast_runner + +# Controls when the workflow will run +on: + # Triggers the workflow on push or pull request events but only for the main branches + push: + branches: [ main, develop ] + pull_request: + branches: [ main, develop ] + + # Allows you to run this workflow manually from the Actions tab + workflow_dispatch: + +env: + RESULTS_SUMMARY: "" + +jobs: + run_tests: + # Run in a special container that has the .NET 6 SDK already set up and the compliance tests compiled + runs-on: GiantRunners + container: + image: ghcr.io/trustedcomputinggroup/compliance_pc-tpm-internal:r1.74.0 + + steps: + - name: Checkout + uses: actions/checkout@v3 + with: + path: simulator + + # Build the simulator + - name: Compile + run: | + cd simulator/TPMCmd + ./bootstrap + EXTRA_CFLAGS="--coverage" ./configure + make -j + + # Run the tests against the simulator with a fixed seed + - name: Run tests against OpenSSL-based simulator + timeout-minutes: 10 + run: > + DOTNET_ROOT=/dotnet6 + /build/Debug/net5/TcgComplianceTestSuite + -tpm simulator/TPMCmd/Simulator/src/tpm2-simulator + -seed 1 -pick_ports -address localhost:30000 + -expectations simulator/testing/expectations.json + + - name: Generate coverage report + if: success() || failure() + run: gcovr -r simulator --html-details coverage.html + + - name: Archive coverage report + if: success() || failure() + run: zip coverage.zip *.css coverage.*.html coverage.html + + - name: Upload XML results + uses: actions/upload-artifact@v3 + if: success() || failure() + with: + name: report.xml + path: TpmTests.Report.xml + + - name: Upload HTML results + uses: actions/upload-artifact@v3 + if: success() || failure() + with: + name: report.html + path: TpmTests.Report.html + + - name: Upload coverage report + uses: actions/upload-artifact@v3 + if: success() || failure() + with: + name: coverage.zip + path: coverage.zip diff --git a/.github/workflows/run-tests.yml b/.github/workflows/run-tests.yml new file mode 100644 index 00000000..35afaaa5 --- /dev/null +++ b/.github/workflows/run-tests.yml @@ -0,0 +1,77 @@ +# Run the tests against the simulator + +name: run_tests_on_standard_runners + +# Controls when the workflow will run +on: + # Triggers the workflow on push or pull request events but only for the main branches + #push: + # branches: [ main, develop ] + #pull_request: + # branches: [ main, develop ] + + # Allows you to run this workflow manually from the Actions tab + workflow_dispatch: + +env: + RESULTS_SUMMARY: "" + +jobs: + run_tests: + # Run in a special container that has the .NET 6 SDK already set up and the compliance tests compiled + runs-on: ubuntu-latest + container: + image: ghcr.io/trustedcomputinggroup/compliance_pc-tpm-internal:r1.74.0 + + steps: + - name: Checkout + uses: actions/checkout@v3 + with: + path: simulator + + # Build the simulator + - name: Compile + run: | + cd simulator/TPMCmd + ./bootstrap + EXTRA_CFLAGS="--coverage" ./configure + make -j + + # Run the tests against the simulator with a fixed seed + - name: Run tests against OpenSSL-based simulator + timeout-minutes: 60 + run: > + DOTNET_ROOT=/dotnet6 + /build/Debug/net5/TcgComplianceTestSuite + -tpm simulator/TPMCmd/Simulator/src/tpm2-simulator + -seed 1 -pick_ports -address localhost:30000 + -expectations simulator/testing/expectations.json + + - name: Generate coverage report + if: success() || failure() + run: gcovr -r simulator --html-details coverage.html + + - name: Archive coverage report + if: success() || failure() + run: zip coverage.zip *.css coverage.*.html coverage.html + + - name: Upload XML results + uses: actions/upload-artifact@v3 + if: success() || failure() + with: + name: report.xml + path: TpmTests.Report.xml + + - name: Upload HTML results + uses: actions/upload-artifact@v3 + if: success() || failure() + with: + name: report.html + path: TpmTests.Report.html + + - name: Upload coverage report + uses: actions/upload-artifact@v3 + if: success() || failure() + with: + name: coverage.zip + path: coverage.zip diff --git a/.github/workflows/tpm-build-win.yml b/.github/workflows/tpm-build-win.yml new file mode 100644 index 00000000..b9b7a2fb --- /dev/null +++ b/.github/workflows/tpm-build-win.yml @@ -0,0 +1,31 @@ +name: Build TPM (Windows) +run-name: ${{ github.actor }} has run a placeholder pipeline + +# Controls when the workflow will run +on: + # Triggers the workflow on push or pull request events but only for the main branches + # currently disabled manual only until the windows build is fixed in the github runner. + # push: + # branches: [ main, develop ] + # pull_request: + # branches: [ main, develop ] + + # Allows you to run this workflow manually from the Actions tab + workflow_dispatch: + +jobs: + tpm-build-windows: + runs-on: ubuntu-latest + steps: + - run: echo "🎉 The job was automatically triggered by a ${{ github.event_name }} event." + - run: echo "🐧 This job is now running on a ${{ runner.os }} server hosted by GitHub!" + - run: echo "🔎 The name of your branch is ${{ github.ref }} and your repository is ${{ github.repository }}." + - name: Check out repository code + uses: actions/checkout@v3 + - run: echo "💡 The ${{ github.repository }} repository has been cloned to the runner." + - run: echo "🖥️ The workflow is now ready to test your code on the runner." + - name: List files in the repository + run: | + ls ${{ github.workspace }} + - run: echo "🍏 This job's status is ${{ job.status }}." + diff --git a/.gitignore b/.gitignore index f84a55f7..02216a6f 100644 --- a/.gitignore +++ b/.gitignore @@ -12,6 +12,11 @@ # User-specific files (MonoDevelop/Xamarin Studio) *.userprefs +# CMake Files +CmakeFiles/ +CmakeCache.txt +cmake_install.cmake + # Build results [Dd]ebug/ [Dd]ebugPublic/ @@ -23,9 +28,14 @@ bld/ [Bb]in/ [Oo]bj/ [Ll]og/ +build/ # Visual Studio 2015 cache/options directory .vs/ + +# Visual Studio Code directory +.vscode/ + # Uncomment if you have tasks that create the project's static files in wwwroot #wwwroot/ @@ -290,14 +300,23 @@ __pycache__/ # TPM simulator run-time/state files NVChip RsaKeyCacheCrt.data +*.port # Ossl support TPMCmd/Lib/* TPMCmd/OsslInclude/* -# Wolf Build results +# Wolf Build results TPMCmd/WolfDebug/* -TPMCmd/WolfRelease/* +TPMCmd/WolfRelease/* + +# CMake Build results +TPMCmd/Debug/* +TPMCmd/Debug64/* +TPMCmd/DebugOssl/* +TPMCmd/DebugOssl64/* +TPMCmd/DebugWolf/* +TPMCmd/DebugWolf64/* # Linux build files .deps/ @@ -331,19 +350,21 @@ src.mk TPMCmd/Platform/src/libplatform.a TPMCmd/Simulator/src/tpm2-simulator TPMCmd/tpm/src/libtpm.a -/TPMCmd/Simulator/DebugFile.txt -/TPMCmd/ParserTemps -/TPMCmd/TpmScripts -/Rev 2.0 Part 3 - Commands 01.54x.docx -/TCG Algorithm Registry 2017-01-03.docx -/TPM 2.0 Vendor-Specific 2019-08-19.docx -/TPM Rev 2.0 Part 2 - Structures 01.54.docx -/TPM Rev 2.0 Part 3 - Commands 01.54.docx -/Part3 -/TPMCmd - Copy/lib -/TPMCmd - Copy/OsslInclude/openssl -/TPMCmd - Copy/ParserTemps -/TPMCmd - Copy/Tpm/include/Wolf -/TPMCmd - Copy -/TPM Rev 2.0 Part 2 - Structures 01.59.docx -/TPM Rev 2.0 Part 3 - Commands 01.59.docx +/TPMCmd/Simulator/DebugFile.txt +/TPMCmd/ParserTemps +/TPMCmd/TpmScripts + +#ignore files used by document converters + +/Rev 2.0 Part 3 - Commands 01.54x.docx +/TCG Algorithm Registry 2017-01-03.docx +/TPM 2.0 Vendor-Specific 2019-08-19.docx +/TPM Rev 2.0 Part 2 - Structures 01.54.docx +/TPM Rev 2.0 Part 3 - Commands 01.54.docx +/Part3 +/TPM Rev 2.0 Part 2 - Structures 01.59.docx +/TPM Rev 2.0 Part 3 - Commands 01.59.docx +# ignore diagrams.net local backup files +*.bkp +# ignore Visual Studio's default output directory for CMake projects +TPMCmd/out/ diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md index 824d12a6..69683058 100644 --- a/CONTRIBUTING.md +++ b/CONTRIBUTING.md @@ -1,11 +1,18 @@ -# Guidelines for reporting bugs: +# How to contribute +- [Guidelines for reporting bugs](#guidelines-for-reporting-bugs) +- [Guideline for submitting changes](#guideline-for-submitting-changes) +- [Contributing](#contributing) +- [Submitting a bug fix](#submitting-a-bug-fix) + +--- +## Guidelines for reporting bugs Non-security-critical bugs can be filed on the Issues tracker: https://github.com/Microsoft/ms-tpm-20-ref/issues Security sensitive bugs should be reported to secure@microsoft.com -# Guideline for submitting changes: +## Guideline for submitting changes This repository tracks official TPM Library Specification releases and errata from the Trusted Computing Group: @@ -26,7 +33,7 @@ the future evolution of the TPM specification and reference implementation should consider joining the Trusted Computing Group. Information about membership and liaison programs is available at https://trustedcomputinggroup.org/membership/ -# Contributing +## Contributing This project welcomes contributions and suggestions. Most contributions require you to agree to a Contributor License Agreement (CLA) declaring that you have the right to, @@ -40,3 +47,17 @@ instructions provided by the bot. You will only need to do this once across all This project has adopted the [Microsoft Open Source Code of Conduct](https://opensource.microsoft.com/codeofconduct/). For more information see the [Code of Conduct FAQ](https://opensource.microsoft.com/codeofconduct/faq/) or contact [opencode@microsoft.com](mailto:opencode@microsoft.com) with any additional questions or comments. + +## Submitting a bug fix +If you are new, please read the documentation beginning with [Introduction](docs/architecture/introduction.md) + +The following are prerequisites _*before*_ requesting change approval: +- Decide if the change is a feature or a bug fix and describe it accordingly +- Get a solid understanding of the change and the scope +- Decide specifically which versions of the TPM code need to be updated + +> Make sure you are familiar with the architecture of the TPM codebase + +NOTE: If introducing multiple changes, treat each change individually creating a different branch and pull request for each change + +This will make the code review (acceptance) process much easier diff --git a/Dockerfile b/Dockerfile new file mode 100644 index 00000000..fc7757f4 --- /dev/null +++ b/Dockerfile @@ -0,0 +1,64 @@ +# Build the TPM simulator using autotools from a regular Ubuntu container +FROM ubuntu:22.04 +ARG DEBIAN_FRONTEND=noninteractive + +# Install some basic tools we're going to need to build the simulator. +# Put this first so local docker will cache this step before copying in the code that +# will get built. This saves a lot of time on Windows development hosts. +RUN apt-get update && apt-get install -y git autoconf-archive pkg-config build-essential automake gcc libssl-dev wget && rm -rf /var/lib/apt/lists/* + +# Install .NET 6 +# apt-get supports x64 but not arm yet. So, we use the script. +RUN wget https://dotnet.microsoft.com/download/dotnet/scripts/v1/dotnet-install.sh && chmod +x ./dotnet-install.sh && ./dotnet-install.sh --install-dir /dotnet6 +ENV PATH="${PATH}:/dotnet6" + +# copy the source tree into a temporary build tree. +WORKDIR /build +COPY TPMCmd ./TPMCmd + +# OpenSSL-based simulators +# Use the standard autotools build +# After the build, delete everything but the files needed for coverage analysis + +# Ubuntu 22.04 comes with OpenSSL 3 +RUN mkdir -p /simulators/openssl3 && \ + cd /simulators/openssl3 && \ + cp -r /build/TPMCmd/* . && \ + ./bootstrap && \ + EXTRA_CFLAGS="--coverage" ./configure && \ + make && \ + find . -type f -not -regex '.*tpm2\-simulator\|.*\.gcno\|.*\.c\|.*\.h' -exec rm {} \; && \ + ln -s ./Simulator/src/tpm2-simulator tpm2-simulator + +# Roll back to OpenSSL 1.1 and build again +RUN if [ $(arch) = "x86_64" ]; then \ + LIBSSL_DEB_PATH=http://security.ubuntu.com/ubuntu/pool/main/o/openssl/libssl1.1_1.1.1-1ubuntu2.1~18.04.23_amd64.deb; \ + LIBSSL_DEV_DEB_PATH=http://security.ubuntu.com/ubuntu/pool/main/o/openssl/libssl-dev_1.1.1-1ubuntu2.1~18.04.23_amd64.deb; \ + else \ + LIBSSL_DEB_PATH=http://ports.ubuntu.com/pool/main/o/openssl/libssl1.1_1.1.1-1ubuntu2.1~18.04.23_arm64.deb; \ + LIBSSL_DEV_DEB_PATH=http://ports.ubuntu.com/pool/main/o/openssl/libssl-dev_1.1.1-1ubuntu2.1~18.04.23_arm64.deb; \ + fi && \ + mkdir -p /ossl1 && \ + cd /ossl1 && \ + wget ${LIBSSL_DEB_PATH} -O libssl.deb && \ + dpkg -i libssl.deb && \ + wget ${LIBSSL_DEV_DEB_PATH} -O libssl-dev.deb && \ + dpkg -i libssl-dev.deb + +RUN mkdir -p /simulators/openssl1 && \ + cd /simulators/openssl1 && \ + cp -r /build/TPMCmd/* . && \ + ./bootstrap && \ + EXTRA_CFLAGS="--coverage" ./configure && \ + make && \ + find . -type f -not -regex '.*tpm2\-simulator\|.*\.gcno\|.*\.c\|.*\.h' -exec rm {} \; && \ + ln -s ./Simulator/src/tpm2-simulator tpm2-simulator + +# Install OpenSSH (useful for GitHub Actions that need to authenticate to +# private Git repositories) and gcovr (for generating code coverage reports) +# Install zip so we can zip up coverage reports. +RUN apt-get update && apt-get install -y openssh-client python3-pip zip && rm -rf /var/lib/apt/lists/* +RUN pip install --no-cache-dir gcovr + +# Symlink /tpm2-simulator to the openssl1 one, for convenience of users who just want "a" simulator. +RUN ln -s /simulators/openssl1/Simulator/src/tpm2-simulator /tpm2-simulator diff --git a/LICENSE b/LICENSE index 3dea085c..52a9dd33 100644 --- a/LICENSE +++ b/LICENSE @@ -1,17 +1,35 @@ -Microsoft Reference Implementation for TPM 2.0 - -The copyright in this software is being made available under the BSD License, included below. This software may be subject to other third party and contributor rights, including patent rights, and no such rights are granted under this license. - -Copyright (c) Microsoft Corporation - -All rights reserved. - -BSD License - -Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - -Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - -Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +TCG Reference Implementation for TPM 2.0 +This code is informative. + +The copyright in this software is being made available under the BSD License, +included below. This software may be subject to other third party and +contributor rights, including patent rights, and no such rights are granted +under this license. + +Copyright 2010-2022 Microsoft Corporation +Copyright 2022-2024 Trusted Computing Group and its contributors + +All rights reserved. + +BSD License + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + +Redistributions of source code must retain the above copyright notice, this +list of conditions and the following disclaimer. + +Redistributions in binary form must reproduce the above copyright notice, this +list of conditions and the following disclaimer in the documentation and/or +other materials provided with the distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/README.md b/README.md index 04a3689b..f2125492 100644 --- a/README.md +++ b/README.md @@ -1,67 +1,23 @@ -# Official TPM 2.0 Reference Implementation (by Microsoft) # +# Official TPM 2.0 Reference Implementation # -[![Build Status](https://travis-ci.org/Microsoft/ms-tpm-20-ref.svg?branch=master)](https://travis-ci.org/Microsoft/ms-tpm-20-ref) -This is the official TCG reference implementation of the [TPM 2.0 Specification](https://trustedcomputinggroup.org/tpm-library-specification). The project contains complete source code of the reference implementation with a Microsoft Visual Studio solution and Linux autotools build scripts. +- [Official TPM 2.0 Reference Implementation (by Microsoft)](#official-tpm-20-reference-implementation-by-microsoft) + - [Build Status](#build-status) + - [Introduction](#introduction) + - [Architecture Introduction](#architecture-introduction) + - [Build Instructions](#build-instructions) -See the definition of the `SPEC_VERSION`, `SPEC_YEAR` and `SPEC_DAY_OF_YEAR` values in the [TpmTypes.h](TPMCmd/tpm/include/TpmTypes.h) header for the exact revision/date of the TPM 2.0 specification, which the given source tree snapshot corresponds to. +## Introduction +This is the official TCG reference implementation of the [TPM 2.0 Specification](https://trustedcomputinggroup.org/tpm-library-specification). The project contains complete source code of the reference implementation with various [Build Options](#build-instructions). -The reference implementation can be directly used via the [TPM 2.0 simulator](TPMCmd/Simulator) that emulates a TPM 2.0 device and can be accessed via a custom TCP based protocol. The simplest way to work with the simulator is to use a [TSS library](https://github.com/Microsoft/TSS.MSR) for the programming language of your choice - C#/.Net, C++, Java, Python, JavaScript/Node.js are currently supported. The C language TSS implementing the TCG's TSS API specifiaction is available [here](https://github.com/tpm2-software/tpm2-tss). +This repository includes a [TPM 2.0 simulator](TPMCmd/Simulator) that emulates a TPM 2.0 device and can be accessed via a custom TCP based protocol. This allows experimentation and testing of the reference code. The simplest way to work with the simulator is to use a [TSS library](https://github.com/Microsoft/TSS.MSR) for the programming language of your choice - C#/.Net, C++, Java, Python, JavaScript/Node.js are currently supported. The C language TSS implementing the TCG's TSS API specification is available [here](https://github.com/tpm2-software/tpm2-tss). -## Windows build ## +## Architecture Introduction +An explanation of the architecture for the TPM Reference Code. -Windows build is implemented as a Visual Studio 2017 solution. Before building it: +See [Architecture Intro](docs/architecture/Introduction.md) -* Setup one or both of the following underlying cryptographic libraries: +## Build Instructions +The supported build environments are not guaranteed and subject to change. - ### OpenSSL library ### - - 1. Create `TPMCmd/lib` folder and place a static OpenSSL library (`libcrypto.lib`) built for the `x86` architecture there. For the `x64` architecture use the `TPMCmd/lib/x64` folder. - - The static libs can be either static libraries proper, or import libraries accompanying the corresponding DLLs. In the latter case you'll need to ensure that ther is a matching copy of the OpenSSL DLL in the standard Windows search path, so that it is available when you run the simulator executable (e.g. copy it into the same folder where `simulator.exe` is located). - - Recommended version of OpenSSL is `1.1.1d` or higher. - - 2. Create `TPMCmd/OsslInclude/openssl` folder and copy there the contents of the `openssl/include/openssl` folder in the OpenSSL source tree used to build the OpenSSL library. - - If you enable SM{2,3,4} algorithms in `TpmProfile.h`, the build may fail because of missing `SM{2,3,4}.h` headers. In this case you will need to manually copy them over from OpenSSL's `include/crypt` folder. - - 3. Build the solution with either Debug or Release as the active configuration. - - ### Wolfcrypt library (wolfSSL) ### - - 1. WolfSSL is included as a submodule. Initialize and update the submodule to fetch the project and checkout the appropriate commit. - - > git submodule init - > git submodule update - - The current commit will point the minimum recommended version of wolfSSL. Moving to a more recent tag or commit should also be supported but might not be tested. - - 2. Build the solution with either WolfDebug or WolfRelease as the active configuration, either from inside the Visual Studio or with the following command line: - - > msbuild TPMCmd\simulator.sln /p:Configuration=WolfDebug - -* If necessary, update the definitions of the following macros in the [VendorString.h](TPMCmd/tpm/include/VendorString.h) header: `MANUFACTURER`, `VENDOR_STRING_1`, `FIRMWARE_V1 and FIRMWARE_V2` - -## Linux build - -Follows the common `./bootstrap && ./configure && make` convention. - -Note that autotools scripts require the following prerequisite packages: `autoconf-archive`, `pkg-config`, and sometimes `build-essential` and `automake`. Their absence is not automatically detected. The build also needs `gcc` and `libssl-dev` packages. - -Similarly to the Windows build, if you enable SM{2,3,4} algorithms in `TpmProfile.h`, the build may fail because of missing `SM{2,3,4}.h` headers. In this case you will need to manually copy them over from OpenSSL's `include/crypt` folder. - -## Mac OS X build - -As with the Linux build, use `./bootstrap`, `./configure`, and `make`. -If you used Homebrew to install OpenSSL, you may need to include its path in `PKG_CONFIG_PATH`. -OS X compilers treat uninitialized global variables as -[common symbols](https://developer.apple.com/library/archive/documentation/DeveloperTools/Conceptual/MachOTopics/1-Articles/executing_files.html), -which can be eliminated with the `-fno-common` compiler option. -Future updates to the autotools configurations may automate one or both of these steps. - -``` -./bootstrap -PKG_CONFIG_PATH="/usr/local/opt/openssl/lib/pkgconfig" EXTRA_CFLAGS=-fno-common ./configure -make -``` +See [Build Intro](docs/BuildSystems/BuildIntro.md) diff --git a/Samples/ARM32-FirmwareTPM/README.md b/Samples/ARM32-FirmwareTPM/README.md deleted file mode 100644 index cb8f7c93..00000000 --- a/Samples/ARM32-FirmwareTPM/README.md +++ /dev/null @@ -1,112 +0,0 @@ -MS-IoT fTPM -=========== -## Trusted firmware for Windows based AArch32 (32-bit) ARM SoC's -Please see the [build-firmware document](https://github.com/ms-iot/imx-iotcore/blob/develop/Documentation/build-firmware.md) in the iMX IoT Core repo for additional information on including this TA in an IoT Core image for iMX boards. - -## Included TAs - -### fTPM TA -The fTPM Trusted Application (TA) provides a secure firmware implementation of a TPM using the MS reference implementation. -Platform specific code is copied and modified locally in [`optee_ta/fTPM/platform`](./optee_ta/fTPM/platform), while [`/fTPM/reference`](./fTPM/reference) contains files to support WolfSSL, control the fTPM's functionality, and define basic types, which may not be found in OpTEE. - -See the reference implementation for more details. - ---- - -## Extra Installation Steps - -The secure firmware utilizes the OP-TEE implementation of the Global Platform specifications. The OP-TEE project is -not duplicated in this repository but is obtained directly from the public release. The build of OP-TEE is based on a -native Linux build, however the following installation steps allow OP-TEE to be built under Windows using WSL. Only the optee_os -repository is relevant for trusted firmware use - the optee_client & optee_linuxdriver repositories are integration -components for Linux and can serve as a reference for the Windows equivalent components. Note that optee_linuxdriver -is GPL. - -OpTEE generates a build environment for trusted applications which is based on Make (See TA_DEV_KIT_DIR in the build directions). -This build environment places several constraints on how the code is organized, which are explained in the relevant makefiles. -See the [optee_os documentation](https://github.com/OP-TEE/optee_os/blob/master/documentation/build_system.md) for details about how OpTEE build works. - -#### 1. Enable Windows Subsystem for Linux -See instructions [here](https://docs.microsoft.com/en-us/windows/wsl/install-win10): - -#### 2. Launch Bash -Search for "bash" in the start menu, OR press Windows key + 'R', then type bash. -Update if needed. - -In WSL: -```sh -sudo apt-get update -``` - -#### 3. Install the ARM tool chain -Install the ARM toolchain to a directory of your choice. -```sh -cd ~ -wget https://releases.linaro.org/components/toolchain/binaries/6.4-2017.11/arm-linux-gnueabihf/gcc-linaro-6.4.1-2017.11-x86_64_arm-linux-gnueabihf.tar.xz -tar xf gcc-linaro-6.4.1-2017.11-x86_64_arm-linux-gnueabihf.tar.xz -rm gcc-linaro-6.4.1-2017.11-x86_64_arm-linux-gnueabihf.tar.xz -``` - -#### 4. Clone the OpTEE OS source code -If you do not already have a version of the OP-TEE OS repo cloned on your machine you may run: -```sh -cd ~ -git clone https://github.com/ms-iot/ms-iot-optee_os.git -``` - -#### 5. Build OP-TEE OS for the target platform - -`TA_CROSS_COMPILE` should point to the ARM toolchain installed in [step 3](#3-install-the-arm-tool-chain). - -```sh -cd ~/optee_os -CROSS_COMPILE=~/gcc-linaro-6.4.1-2017.11-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- make PLATFORM=imx-mx6qhmbedge CFG_TEE_CORE_LOG_LEVEL=4 CFG_REE_FS=n CFG_RPMB_FS=y CFG_RPMB_TESTKEY=y CFG_RPMB_WRITE_KEY=y -j20 -``` -Additional information on Microsoft IoT fork of OP-TEE OS can be found [here](https://github.com/ms-iot/ms-iot-optee_os). - -#### 6. Clone the ms-tpm-20-ref source code -```sh -cd ~ -git clone https://github.com/Microsoft/ms-tpm-20-ref.git -``` - -#### 7. Initialize the git submodules -```sh -cd ~/ms-tpm-20-ref -git submodule init -git submodule update -``` - ---- - -## Building the TPM - -#### 1. Build the Firmware TPM Trusted Application -`TA_CROSS_COMPILE` should point to the ARM toolchain installed in [step 3](#3-install-the-arm-tool-chain). - -`TA_DEV_KIT_DIR` should point to the directory the optee_os TA devkit was compiled to in [step 5](#6-clone-the-ms-tpm-20-ref-source-code -). - -`-j` increases the parallelism of the build process. - -```sh -cd ~/ms-tpm-20-ref/Samples/ARM32-FirmwareTPM/optee_ta -TA_CPU=cortex-a9 TA_CROSS_COMPILE=~/gcc-linaro-6.4.1-2017.11-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- TA_DEV_KIT_DIR=~/optee_os/out/arm-plat-imx/export-ta_arm32 CFG_TEE_TA_LOG_LEVEL=2 make -j20 -``` -Debugging options you may want to add: - -`CFG_TEE_TA_LOG_LEVEL=3` 1 is fatal errors only, other values increase debug tracing output. - -`CFG_TA_DEBUG=y` Turns on debug output from the TAs, and enables extra correctness checks in the fTPM TA. - -#### 2. Measured Boot support -The fTPM Trusted Application includes support for Measured Boot. This feature allows the TA to read a TPM Event Log compatible with the specification in Section 5 of the -[TCG EFI Protocol Specification](https://trustedcomputinggroup.org/wp-content/uploads/EFI-Protocol-Specification-rev13-160330final.pdf). The event log is read and extended during the TA initialization. - -Measure Boot support requires OpTEE System Call ```PTA_SYSTEM_GET_TPM_EVENT_LOG```, available since [OpTEE 3.10.0](https://github.com/OP-TEE/optee_os/tree/3.10.0). - -Flags related to Measured Boot support: - -`CFG_TA_MEASURED_BOOT`: Controls whether Measured Boot is enabled (`CFG_TA_MEASURED_BOOT=y`) or disabled (by default). -`CFG_TA_EVENT_LOG_SIZE`: Maximum size in bytes allowed for the Event Log. Defaults to 1024 bytes. - diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/.gitignore b/Samples/ARM32-FirmwareTPM/optee_ta/.gitignore deleted file mode 100644 index f8465228..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -out -/fTPM/lib/tpm/tpm_symlink -/fTPM/lib/wolf/wolf_symlink \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/Makefile b/Samples/ARM32-FirmwareTPM/optee_ta/Makefile deleted file mode 100644 index ddf67848..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/Makefile +++ /dev/null @@ -1,10 +0,0 @@ - -export V?=0 - -.PHONY: all -all: - $(MAKE) -C fTPM CROSS_COMPILE=$(TA_CROSS_COMPILE) - -.PHONY: clean -clean: - $(MAKE) -C fTPM clean \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/Makefile b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/Makefile deleted file mode 100644 index c71eecd6..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -BINARY=bc50d971-d4c9-42c4-82cb-343fb7f37896 - -O ?= ../out/fTPM -WOLF_ROOT := ../../../../external/wolfssl/ -TPM_ROOT := ../../../../ - -include $(TA_DEV_KIT_DIR)/mk/ta_dev_kit.mk - -clean: clean_stripped_file -.PHONY: clean_stripped_file -clean_stripped_file: - rm -f $(BINARY).stripped.elf - diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/fTPM.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/fTPM.c deleted file mode 100644 index 65d44976..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/fTPM.c +++ /dev/null @@ -1,479 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * Copyright (c) Arm Limited. - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#define STR_TRACE_USER_TA "fTPM" - -#include -#include -#include -#include -#include -#include - -#include "fTPM.h" - -#define TA_ALL_PARAM_TYPE(type) TEE_PARAM_TYPES(type, type, type, type) - -// -// Ensure we have only one active session -// -static bool fTPMSessionActive = false; - -// -// Initialization -// -bool fTPMInitialized = false; - -// -// Local (SW) command buffer -// -static uint8_t fTPMCommand[MAX_COMMAND_SIZE]; - -// -// A subset of TPM return codes (see TpmTypes.h) -// -typedef uint32_t TPM_RC; -#define RC_VER1 (TPM_RC) (0x100) -#define TPM_RC_SUCCESS (TPM_RC) (0x000) -#define TPM_RC_FAILURE (TPM_RC) (RC_VER1+0x001) - -// -// Helper function to read response codes from TPM responses -// -static uint32_t fTPMResponseCode(uint32_t ResponseSize, - uint8_t *ResponseBuffer) -{ - uint32_t ResponseCode; - union { - uint32_t Data; - uint8_t Index[4]; - } Value; - - // In case of too-small response size, assume failure. - if (ResponseSize < 0xA) { - return TPM_RC_FAILURE; - } - - Value.Index[0] = ResponseBuffer[6]; - Value.Index[1] = ResponseBuffer[7]; - Value.Index[2] = ResponseBuffer[8]; - Value.Index[3] = ResponseBuffer[9]; - ResponseCode = SwapBytes32(Value.Data); - - return ResponseCode; -} - -#ifdef MEASURED_BOOT -static TEE_Result get_tpm_event_log(unsigned char *buf, size_t *len) -{ - const TEE_UUID system_uuid = PTA_SYSTEM_UUID; - TEE_TASessionHandle session = TEE_HANDLE_NULL; - TEE_Result res = TEE_ERROR_GENERIC; - uint32_t ret_origin = 0; - const uint32_t param_types = TEE_PARAM_TYPES(TEE_PARAM_TYPE_MEMREF_OUTPUT, - TEE_PARAM_TYPE_NONE, - TEE_PARAM_TYPE_NONE, - TEE_PARAM_TYPE_NONE); - TEE_Param params[TEE_NUM_PARAMS] = {0}; - - res = TEE_OpenTASession(&system_uuid, TEE_TIMEOUT_INFINITE, - 0, NULL, &session, &ret_origin); - if (res != TEE_SUCCESS) - return res; - - params[0].memref.buffer = (void *)buf; - params[0].memref.size = *len; - - res = TEE_InvokeTACommand(session, TEE_TIMEOUT_INFINITE, - PTA_SYSTEM_GET_TPM_EVENT_LOG, - param_types, params, &ret_origin); - - *len = params[0].memref.size; - - TEE_CloseTASession(session); - - return res; -} -#endif // MEASURED_BOOT - -// -// Called when TA instance is created. This is the first call to the TA. -// -TEE_Result TA_CreateEntryPoint(void) -{ - #define STARTUP_SIZE 0x0C - - uint8_t startupClear[STARTUP_SIZE] = { 0x80, 0x01, 0x00, 0x00, 0x00, 0x0c, - 0x00, 0x00, 0x01, 0x44, 0x00, 0x00 }; - uint8_t startupState[STARTUP_SIZE] = { 0x80, 0x01, 0x00, 0x00, 0x00, 0x0c, - 0x00, 0x00, 0x01, 0x44, 0x00, 0x01 }; - uint32_t respLen; - uint8_t *respBuf; -#ifdef MEASURED_BOOT - unsigned char tpm_event_log_buf[EVENT_LOG_SIZE]; - size_t tpm_event_log_len = EVENT_LOG_SIZE; -#endif - -#ifdef fTPMDebug - DMSG("Entry Point\n"); -#endif - - // If we've been here before, don't init again. - if (fTPMInitialized) { - // We may have had TA_DestroyEntryPoint called but we didn't - // actually get torn down. Re-NVEnable, just in case. - if (_plat__NVEnable(NULL) == 0) { - TEE_Panic(TEE_ERROR_BAD_STATE); - } - return TEE_SUCCESS; - } - - // Initialize NV admin state - _admin__NvInitState(); - - // If we fail to open fTPM storage we cannot continue. - if (_plat__NVEnable(NULL) == 0) { - TEE_Panic(TEE_ERROR_BAD_STATE); - } - -#ifdef fTPMDebug - DMSG("NVEnable Complete\n"); -#endif - - // This only occurs when there is no previous NV state, i.e., on first - // boot, after recovering from data loss, we reset the platform, etc. - if (_plat__NvNeedsManufacture()) { -#ifdef fTPMDebug - DMSG("TPM_Manufacture\n"); -#endif - TPM_Manufacture(1); - } - - // "Power-On" the platform - _plat__Signal_PowerOn(); - - // Internal init for reference implementation - _TPM_Init(); - -#ifdef fTPMDebug - DMSG("Init Complete\n"); -#endif - - // Startup with state - if (g_chipFlags.fields.TpmStatePresent) { - - // Re-use request buffer for response (ignored) - respBuf = startupState; - respLen = STARTUP_SIZE; - - ExecuteCommand(STARTUP_SIZE, startupState, &respLen, &respBuf); - if (fTPMResponseCode(respLen, respBuf) == TPM_RC_SUCCESS) { - goto Exit; - } - -#ifdef fTPMDebug - DMSG("Fall through to startup clear\n"); -#endif - - goto Clear; - } - -#ifdef fTPMDebug - DMSG("No TPM state present\n"); -#endif - -Clear: - // Re-use request buffer for response (ignored) - respBuf = startupClear; - respLen = STARTUP_SIZE; - - // Fall back to a Startup Clear - ExecuteCommand(STARTUP_SIZE, startupClear, &respLen, &respBuf); - -Exit: - // Init is complete, indicate so in fTPM admin state. - g_chipFlags.fields.TpmStatePresent = 1; - _admin__SaveChipFlags(); - - // Initialization complete - fTPMInitialized = true; - -#ifdef MEASURED_BOOT - // Extend existing TPM Event Log. - if (get_tpm_event_log(tpm_event_log_buf, - &tpm_event_log_len) == TEE_SUCCESS) - { - -#ifdef fTPMDebug - // Dump the event log - unsigned char* buff = tpm_event_log_buf; - size_t buff_len = tpm_event_log_len; - MSG("Preparing to extend the following TPM Event Log:"); - dump_event_log(tpm_event_log_buf, tpm_event_log_len); -#endif - process_eventlog(tpm_event_log_buf, tpm_event_log_len); - - } -#endif - - return TEE_SUCCESS; -} - - -// -// Called when TA instance destroyed. This is the last call in the TA. -// -void TA_DestroyEntryPoint(void) -{ - // We should only see this called after the OS has shutdown and there - // will be no further commands sent to the TPM. Right now, just close - // our storage object, becasue the TPM driver should have already - // shutdown cleanly. - _plat__NVDisable(); - return; -} - - -// -// Called when a new session is opened to the TA. -// -TEE_Result TA_OpenSessionEntryPoint(uint32_t param_types, - TEE_Param params[4], - void **sess_ctx) -{ - uint32_t exp_param_types = TA_ALL_PARAM_TYPE(TEE_PARAM_TYPE_NONE); - - // Unreferenced parameters - UNREFERENCED_PARAMETER(params); - UNREFERENCED_PARAMETER(sess_ctx); - - // Validate parameter types - if (param_types != exp_param_types) { - return TEE_ERROR_BAD_PARAMETERS; - } - - // Only one active session to the fTPM is permitted - if (fTPMSessionActive) { - return TEE_ERROR_ACCESS_CONFLICT; - } - - // Active session - fTPMSessionActive = true; - - // If return value != TEE_SUCCESS the session will not be created. - return TEE_SUCCESS; -} - - -// -// Called when a session is closed. -// -void TA_CloseSessionEntryPoint(void *sess_ctx) -{ - // Unused parameter(s) - UNREFERENCED_PARAMETER(sess_ctx); - - // Clear active session - if (fTPMSessionActive) { - fTPMSessionActive = false; - } -} - -// -// Called to handle command submission. -// -static TEE_Result fTPM_Submit_Command(uint32_t param_types, - TEE_Param params[4] -) -{ - uint8_t *cmdBuf, *respBuf; - uint32_t cmdLen, respLen; - uint32_t exp_param_types = TEE_PARAM_TYPES(TEE_PARAM_TYPE_MEMREF_INPUT, - TEE_PARAM_TYPE_MEMREF_INOUT, - TEE_PARAM_TYPE_NONE, - TEE_PARAM_TYPE_NONE); - - // Validate parameter types - if (param_types != exp_param_types) { -#ifdef fTPMDebug - IMSG("Bad param type(s)\n"); -#endif - return TEE_ERROR_BAD_PARAMETERS; - } - - // Sanity check our buffer sizes - if ((params[0].memref.size == 0) || - (params[1].memref.size == 0) || - (params[0].memref.size > MAX_COMMAND_SIZE) || - (params[1].memref.size > MAX_RESPONSE_SIZE)) { -#ifdef fTPMDebug - IMSG("Bad param size(s)\n"); -#endif - return TEE_ERROR_BAD_PARAMETERS; - } - - // Copy command locally - memcpy(fTPMCommand, params[0].memref.buffer, params[0].memref.size); - - // Pull the command length from the actual TPM command. The memref size - // field descibes the buffer containing the command, not the command. - cmdBuf = fTPMCommand; - cmdLen = BYTE_ARRAY_TO_UINT32((uint8_t *)&(cmdBuf[2])); - - // Sanity check cmd length included in TPM command - if (cmdLen > params[0].memref.size) { - return TEE_ERROR_BAD_PARAMETERS; - } - - respBuf = (uint8_t *)(params[1].memref.buffer); - respLen = params[1].memref.size; - - // Check if this is a PPI Command - if (!_admin__PPICommand(cmdLen, cmdBuf, &respLen, &respBuf)) { - // If not, pass through to TPM - ExecuteCommand(cmdLen, cmdBuf, &respLen, &respBuf); - } - - // Unfortunately, this cannot be done until after we have our response in - // hand. We will, however, make an effort to return at least a portion of - // the response along with TEE_ERROR_SHORT_BUFFER. - if (respLen > params[1].memref.size) - { -#ifdef fTPMDebug - IMSG("Insufficient buffer length RS: 0x%x > BL: 0x%x\n", respLen, params[1].memref.size); -#endif - return TEE_ERROR_SHORT_BUFFER; - } - -#ifdef fTPMDebug - DMSG("Success, RS: 0x%x\n", respLen); -#endif - - return TEE_SUCCESS; -} - -// -// Called to handle PPI commands -// -static TEE_Result fTPM_Emulate_PPI(uint32_t param_types, - TEE_Param params[4] -) -{ - uint8_t *cmdBuf, *respBuf; - uint32_t cmdLen, respLen; - uint32_t exp_param_types = TEE_PARAM_TYPES(TEE_PARAM_TYPE_MEMREF_INPUT, - TEE_PARAM_TYPE_MEMREF_INOUT, - TEE_PARAM_TYPE_NONE, - TEE_PARAM_TYPE_NONE); - - // Validate parameter types - if (param_types != exp_param_types) { -#ifdef fTPMDebug - IMSG("Bad param type(s)\n"); -#endif - return TEE_ERROR_BAD_PARAMETERS; - } - - // Sanity check our buffer sizes - if ((params[0].memref.size == 0) || - (params[1].memref.size == 0) || - (params[0].memref.size > MAX_COMMAND_SIZE) || - (params[1].memref.size > MAX_RESPONSE_SIZE)) { -#ifdef fTPMDebug - IMSG("Bad param size(s)\n"); -#endif - return TEE_ERROR_BAD_PARAMETERS; - } - - // Copy command locally - memcpy(fTPMCommand, params[0].memref.buffer, params[0].memref.size); - - cmdBuf = fTPMCommand; - cmdLen = params[0].memref.size; - - respBuf = (uint8_t *)(params[1].memref.buffer); - respLen = params[1].memref.size; - - // Pass along to platform PPI processing - if (_admin__PPIRequest(cmdLen, cmdBuf, &respLen, &respBuf)) { -#ifdef fTPMDebug - DMSG("Handled PPI command via TA interface\n"); -#endif - } - else { -#ifdef fTPMDebug - IMSG("Failed to handle PPI command via TA interface\n"); -#endif - } - - if (respLen > params[1].memref.size) { -#ifdef fTPMDebug - IMSG("Insufficient buffer length RS: 0x%x > BL: 0x%x\n", respLen, params[1].memref.size); -#endif - return TEE_ERROR_SHORT_BUFFER; - } - - params[1].memref.size = respLen; - return TEE_SUCCESS; -} - -// -// Called when a TA is invoked. Note, paramters come from normal world. -// -TEE_Result TA_InvokeCommandEntryPoint(void *sess_ctx, - uint32_t cmd_id, - uint32_t param_types, - TEE_Param params[4]) -{ - // Unused parameter(s) - UNREFERENCED_PARAMETER(sess_ctx); - - // Handle command invocation - switch (cmd_id) { - - case TA_FTPM_SUBMIT_COMMAND: { - return fTPM_Submit_Command(param_types, params); - } - - case TA_FTPM_EMULATE_PPI: { - return fTPM_Emulate_PPI(param_types, params); - } - - default: { - return TEE_ERROR_BAD_PARAMETERS; - } - } -} diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/TpmToWolfHash.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/TpmToWolfHash.h deleted file mode 100644 index 4ce03528..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/TpmToWolfHash.h +++ /dev/null @@ -1,199 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// This header file is used to 'splice' the wolfcrypt hash code into the TPM code. -// -#ifndef HASH_LIB_DEFINED -#define HASH_LIB_DEFINED - -#define HASH_LIB_WOLF - -#define HASH_ALIGNMENT RADIX_BYTES - -#ifndef WOLFSSL_USER_SETTINGS -#define WOLFSSL_USER_SETTINGS -#endif - -#if ALG_SHA384 || ALG_SHA512 -#define WOLFSSL_SHA512 -#endif - -#if ALG_SM3_256 -#undef ALG_SM3_256 -#define ALG_SM3_256 ALG_NO -//#error "SM3 is not available" -#endif - -#include -#include -#include - - -//*************************************************************** -//** Links to the wolfcrypt HASH code -//*************************************************************** - -// Redefine the internal name used for each of the hash state structures to the -// name used by the library. -// These defines need to be known in all parts of the TPM so that the structure -// sizes can be properly computed when needed. - -#define tpmHashStateSHA1_t wc_Sha -#define tpmHashStateSHA256_t wc_Sha256 -#define tpmHashStateSHA384_t wc_Sha512 -#define tpmHashStateSHA512_t wc_Sha512 - -#if ALG_SM3 -# error "The version of WolfCrypt used by this code does not support SM3" -#endif - -// The defines below are only needed when compiling CryptHash.c or CryptSmac.c. -// This isolation is primarily to avoid name space collision. However, if there -// is a real collision, it will likely show up when the linker tries to put things -// together. - -#ifdef _CRYPT_HASH_C_ - -typedef BYTE *PBYTE; -typedef const BYTE *PCBYTE; - -// Define the interface between CryptHash.c to the functions provided by the -// library. For each method, define the calling parameters of the method and then -// define how the method is invoked in CryptHash.c. -// -// All hashes are required to have the same calling sequence. If they don't, create -// a simple adaptation function that converts from the "standard" form of the call -// to the form used by the specific hash (and then send a nasty letter to the -// person who wrote the hash function for the library). -// -// The macro that calls the method also defines how the -// parameters get swizzled between the default form (in CryptHash.c)and the -// library form. -// -// Initialize the hash context -#define HASH_START_METHOD_DEF void (HASH_START_METHOD)(PANY_HASH_STATE state) -#define HASH_START(hashState) \ - ((hashState)->def->method.start)(&(hashState)->state); - -// Add data to the hash -#define HASH_DATA_METHOD_DEF \ - void (HASH_DATA_METHOD)(PANY_HASH_STATE state, \ - PCBYTE buffer, \ - size_t size) -#define HASH_DATA(hashState, dInSize, dIn) \ - ((hashState)->def->method.data)(&(hashState)->state, dIn, dInSize) - -// Finalize the hash and get the digest -#define HASH_END_METHOD_DEF \ - void (HASH_END_METHOD)(PANY_HASH_STATE state, BYTE *buffer) -#define HASH_END(hashState, buffer) \ - ((hashState)->def->method.end)(&(hashState)->state, buffer) - -// Copy the hash context -// Note: For import, export, and copy, memcpy() is used since there is no -// reformatting necessary between the internal and external forms. -#define HASH_STATE_COPY_METHOD_DEF \ - void (HASH_STATE_COPY_METHOD)(PANY_HASH_STATE to, \ - PCANY_HASH_STATE from, \ - size_t size) -#define HASH_STATE_COPY(hashStateOut, hashStateIn) \ - ((hashStateIn)->def->method.copy)(&(hashStateOut)->state, \ - &(hashStateIn)->state, \ - (hashStateIn)->def->contextSize) - -// Copy (with reformatting when necessary) an internal hash structure to an -// external blob -#define HASH_STATE_EXPORT_METHOD_DEF \ - void (HASH_STATE_EXPORT_METHOD)(BYTE *to, \ - PCANY_HASH_STATE from, \ - size_t size) -#define HASH_STATE_EXPORT(to, hashStateFrom) \ - ((hashStateFrom)->def->method.copyOut) \ - (&(((BYTE *)(to))[offsetof(HASH_STATE, state)]), \ - &(hashStateFrom)->state, \ - (hashStateFrom)->def->contextSize) - -// Copy from an external blob to an internal formate (with reformatting when -// necessary -#define HASH_STATE_IMPORT_METHOD_DEF \ - void (HASH_STATE_IMPORT_METHOD)(PANY_HASH_STATE to, \ - const BYTE *from, \ - size_t size) -#define HASH_STATE_IMPORT(hashStateTo, from) \ - ((hashStateTo)->def->method.copyIn) \ - (&(hashStateTo)->state, \ - &(((const BYTE *)(from))[offsetof(HASH_STATE, state)]),\ - (hashStateTo)->def->contextSize) - - -// Function aliases. The code in CryptHash.c uses the internal designation for the -// functions. These need to be translated to the function names of the library. -// Internal External -// Designation Designation -#define tpmHashStart_SHA1 wc_InitSha // external name of the - // initialization method -#define tpmHashData_SHA1 wc_ShaUpdate -#define tpmHashEnd_SHA1 wc_ShaFinal -#define tpmHashStateCopy_SHA1 memcpy -#define tpmHashStateExport_SHA1 memcpy -#define tpmHashStateImport_SHA1 memcpy -#define tpmHashStart_SHA256 wc_InitSha256 -#define tpmHashData_SHA256 wc_Sha256Update -#define tpmHashEnd_SHA256 wc_Sha256Final -#define tpmHashStateCopy_SHA256 memcpy -#define tpmHashStateExport_SHA256 memcpy -#define tpmHashStateImport_SHA256 memcpy -#define tpmHashStart_SHA384 wc_InitSha384 -#define tpmHashData_SHA384 wc_Sha384Update -#define tpmHashEnd_SHA384 wc_Sha384Final -#define tpmHashStateCopy_SHA384 memcpy -#define tpmHashStateExport_SHA384 memcpy -#define tpmHashStateImport_SHA384 memcpy -#define tpmHashStart_SHA512 wc_InitSha512 -#define tpmHashData_SHA512 wc_Sha512Update -#define tpmHashEnd_SHA512 wc_Sha512Final -#define tpmHashStateCopy_SHA512 memcpy -#define tpmHashStateExport_SHA512 memcpy -#define tpmHashStateImport_SHA512 memcpy - -#endif // _CRYPT_HASH_C_ - -#define LibHashInit() -// This definition would change if there were something to report -#define HashLibSimulationEnd() - -#endif // HASH_LIB_DEFINED diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/TpmToWolfMath.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/TpmToWolfMath.h deleted file mode 100644 index 1543499b..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/TpmToWolfMath.h +++ /dev/null @@ -1,91 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// This file contains the structure definitions used for ECC in the LibTomCrypt -// version of the code. These definitions would change, based on the library. -// The ECC-related structures that cross the TPM interface are defined -// in TpmTypes.h -// - -#ifndef MATH_LIB_DEFINED -#define MATH_LIB_DEFINED - -#define MATH_LIB_WOLF - -#if ALG_ECC -#define HAVE_ECC -#endif - -#include -#include - -#define MP_VAR(name) \ - mp_int _##name; \ - mp_int *name = MpInitialize(&_##name); - -// Allocate a mp_int and initialize with the values in a mp_int* initializer -#define MP_INITIALIZED(name, initializer) \ - MP_VAR(name); \ - BnToWolf(name, initializer); - -#define POINT_CREATE(name, initializer) \ - ecc_point *name = EcPointInitialized(initializer); - -#define POINT_DELETE(name) \ - wc_ecc_del_point(name); \ - name = NULL; - -typedef ECC_CURVE_DATA bnCurve_t; - -typedef bnCurve_t *bigCurve; - -#define AccessCurveData(E) (E) - -#define CURVE_INITIALIZED(name, initializer) \ - bnCurve_t *name = (ECC_CURVE_DATA *)GetCurveData(initializer) - -#define CURVE_FREE(E) - -#include "TpmToWolfSupport_fp.h" - -#define WOLF_ENTER() - -#define WOLF_LEAVE() - -// This definition would change if there were something to report -#define MathLibSimulationEnd() - -#endif // MATH_LIB_DEFINED diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/TpmToWolfSym.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/TpmToWolfSym.h deleted file mode 100644 index 0c042eb3..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/TpmToWolfSym.h +++ /dev/null @@ -1,120 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// This header file is used to 'splice' the wolfcrypt library into the TPM code. - -#ifndef SYM_LIB_DEFINED -#define SYM_LIB_DEFINED - -#define SYM_LIB_WOLF - -#define SYM_ALIGNMENT RADIX_BYTES - -#include -#include - -//*************************************************************** -//** Links to the wolfCrypt AES code -//*************************************************************** -#if ALG_SM4 -#undef ALG_SM4 -#define ALG_SM4 ALG_NO -//#error "SM4 is not available" -#endif - -#if ALG_CAMELLIA -#undef ALG_CAMELLIA -#define ALG_CAMELLIA ALG_NO -//#error "Camellia is not available" -#endif - -// Define the order of parameters to the library functions that do block encryption -// and decryption. -typedef void(*TpmCryptSetSymKeyCall_t)( - void *keySchedule, - BYTE *out, - const BYTE *in - ); - -// The Crypt functions that call the block encryption function use the parameters -// in the order: -// 1) keySchedule -// 2) in buffer -// 3) out buffer -// Since wolfcrypt uses the order in encryptoCall_t above, need to swizzle the -// values to the order required by the library. -#define SWIZZLE(keySchedule, in, out) \ - (void *)(keySchedule), (BYTE *)(out), (const BYTE *)(in) - -// Macros to set up the encryption/decryption key schedules -// -// AES: -#define TpmCryptSetEncryptKeyAES(key, keySizeInBits, schedule) \ - wc_AesSetKeyDirect((tpmKeyScheduleAES *)(schedule), key, BITS_TO_BYTES(keySizeInBits), 0, AES_ENCRYPTION) -#define TpmCryptSetDecryptKeyAES(key, keySizeInBits, schedule) \ - wc_AesSetKeyDirect((tpmKeyScheduleAES *)(schedule), key, BITS_TO_BYTES(keySizeInBits), 0, AES_DECRYPTION) - -// TDES: -#define TpmCryptSetEncryptKeyTDES(key, keySizeInBits, schedule) \ - TDES_setup_encrypt_key((key), (keySizeInBits), (tpmKeyScheduleTDES *)(schedule)) -#define TpmCryptSetDecryptKeyTDES(key, keySizeInBits, schedule) \ - TDES_setup_decrypt_key((key), (keySizeInBits), (tpmKeyScheduleTDES *)(schedule)) - -// Macros to alias encryption calls to specific algorithms. This should be used -// sparingly. Currently, only used by CryptRand.c -// -// When using these calls, to call the AES block encryption code, the caller -// should use: -// TpmCryptEncryptAES(SWIZZLE(keySchedule, in, out)); -#define TpmCryptEncryptAES wc_AesEncryptDirect -#define TpmCryptDecryptAES wc_AesDecryptDirect -#define tpmKeyScheduleAES Aes - -#define TpmCryptEncryptTDES TDES_encrypt -#define TpmCryptDecryptTDES TDES_decrypt -#define tpmKeyScheduleTDES Des3 - -typedef union tpmCryptKeySchedule_t tpmCryptKeySchedule_t; - -#if ALG_TDES -#include "TpmToWolfDesSupport_fp.h" -#endif - -// This definition would change if there were something to report -#define SymLibSimulationEnd() - -#endif // SYM_LIB_DEFINED diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/user_settings.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/user_settings.h deleted file mode 100644 index de0dfd32..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/Wolf/user_settings.h +++ /dev/null @@ -1,108 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -/* TPM specific preprocessor flags for wolfcrypt */ - - -#ifndef WOLF_CRYPT_USER_SETTINGS_H -#define WOLF_CRYPT_USER_SETTINGS_H - -#include - -/* Remove the automatic setting of the default I/O functions EmbedSend() - and EmbedReceive(). */ -#define WOLFSSL_USER_IO - -/* Avoid naming conflicts */ -#define NO_OLD_WC_NAMES - -/* Use stack based fast math for all big integer math */ -#define USE_FAST_MATH -#define TFM_TIMING_RESISTANT - -/* Expose direct encryption functions */ -#define WOLFSSL_AES_DIRECT - -/* Enable/Disable algorithm support based on TPM implementation header */ -#if ALG_SHA256 - #define WOLFSSL_SHA256 -#endif -#if ALG_SHA384 || ALG_SHA512 - #define WOLFSSL_SHA384 - #define WOLFSSL_SHA512 -#endif -#if ALG_TDES - #define WOLFSSL_DES_ECB -#endif -#if ALG_RSA - /* Turn on RSA key generation functionality */ - #define WOLFSSL_KEY_GEN -#endif -#if ALG_ECC || defined(WOLFSSL_LIB) - #define HAVE_ECC - - /* Expose additional ECC primitives */ - #define WOLFSSL_PUBLIC_ECC_ADD_DBL - #define ECC_TIMING_RESISTANT - - /* Enables Shamir calc method */ - #define ECC_SHAMIR - - /* The TPM only needs low level ECC crypto */ - #define NO_ECC_SIGN - #define NO_ECC_VERIFY - #define NO_ECC_SECP - - #undef ECC_BN_P256 - #undef ECC_SM2_P256 - #undef ECC_BN_P638 - #define ECC_BN_P256 NO - #define ECC_SM2_P256 NO - #define ECC_BN_P638 NO - -#endif - -/* Disable explicit RSA. The TPM support for RSA is dependent only on TFM */ -#define NO_RSA -#define NO_RC4 -#define NO_ASN - -/* Enable debug wolf library check */ -//#define LIBRARY_COMPATIBILITY_CHECK - -#define WOLFSSL_ - -#endif // WOLF_CRYPT_USER_SETTINGS_H diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM.h deleted file mode 100644 index 6d6b1a0f..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM.h +++ /dev/null @@ -1,106 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef FTPM_TA_H -#define FTPM_TA_H - -#include - -/* This UUID is generated with uuidgen */ -#define TA_FTPM_UUID { 0xBC50D971, 0xD4C9, 0x42C4, \ - {0x82, 0xCB, 0x34, 0x3F, 0xB7, 0xF3, 0x78, 0x96}} - -/* The TAFs ID implemented in this TA */ -#define TA_FTPM_SUBMIT_COMMAND (0) -#define TA_FTPM_EMULATE_PPI (1) - -// -// These must match values from reference/TPM/include/TpmProfile.h -// -#define MAX_COMMAND_SIZE 4096 -#define MAX_RESPONSE_SIZE 4096 - -// -// Macro for intentionally unreferenced parameters -// -#define UNREFERENCED_PARAMETER(_Parameter_) (void)(_Parameter_) - -// -// Shorthand for TA functions taking uniform arg types -// -#define TA_ALL_PARAM_TYPE(a) TEE_PARAM_TYPES((a), (a), (a), (a)) - -// -// Used to extract size field from TPM command buffers -// -#define BYTE_ARRAY_TO_UINT32(b) (uint32_t)( ((b)[0] << 24) \ - + ((b)[1] << 16) \ - + ((b)[2] << 8 ) \ - + (b)[3]) -// -// Entrypoint for reference implemntation -// -extern void ExecuteCommand( - uint32_t requestSize, // IN: command buffer size - unsigned char *request, // IN: command buffer - uint32_t *responseSize, // OUT: response buffer size - unsigned char **response // OUT: response buffer - ); - -// -// External functions supporting TPM initialization -// -extern int _plat__NVEnable(void *platParameter); -extern int TPM_Manufacture(bool firstTime); -extern bool _plat__NvNeedsManufacture(void); -extern void _TPM_Init(void); -extern void _plat__Signal_PowerOn(void); -extern void _plat__NVDisable(void); -extern void _admin__SaveChipFlags(void); - -// -// External types/data supporting TPM initialization -// -typedef union { - uint32_t flags; - struct { - uint32_t Remanufacture : 1; // Perform a TPM_Remanufacture() on startup (SET by default) - uint32_t TpmStatePresent : 1; // Init TPM and NV with contents of TpmState and NVState on startup - uint32_t Reserved : 30; - } fields; -} TPM_CHIP_STATE; - -extern TPM_CHIP_STATE g_chipFlags; -#endif /* FTPM_TA_H */ \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM_event_log.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM_event_log.h deleted file mode 100644 index 18618ace..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM_event_log.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright (c) 2021, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef _FTPM_EVENT_LOG_ -#define _FTPM_EVENT_LOG_ - -bool process_eventlog(const unsigned char *const buf, const size_t log_size); -void dump_event_log(uint8_t *log_addr, size_t log_size); - -#endif /* _FTPM_EVENT_LOG_*/ diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM_event_log_private.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM_event_log_private.h deleted file mode 100644 index f972fc7f..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM_event_log_private.h +++ /dev/null @@ -1,269 +0,0 @@ -/* - * Copyright (c) 2021, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef _FTPM_EVENT_LOG_PRIVATE_H -#define _FTPM_EVENT_LOG_PRIVATE_H - -#include -#include - -#define TCG_STARTUP_LOCALITY_SIGNATURE "StartupLocality" - -/* Event types */ -#define EV_PREBOOT_CERT 0x00000000 -#define EV_POST_CODE 0x00000001 -#define EV_NO_ACTION 0x00000003 -#define EV_SEPARATOR 0x00000004 -#define EV_ACTION 0x00000005 -#define EV_S_CRTM_CONTENTS 0x00000007 -#define EV_S_CRTM_VERSION 0x00000008 -#define EV_CPU_MICROCODE 0x00000009 -#define EV_PLATFORM_CONFIG_FLAGS 0x0000000A -#define EV_TABLE_OF_DEVICES 0x0000000B -#define EV_COMPACT_HASH 0x0000000C -#define EV_NONHOST_CODE 0x0000000F -#define EV_NONHOST_CONFIG 0x00000010 -#define EV_NONHOST_INFO 0x00000011 -#define EV_OMIT_BOOT_DEVICE_EVENTS 0x00000012 - -/* - * Section 5.3 of TCG EFI Protocol Specification. Family 2.0. - * Level 00 Revision 00.13 - * March 30, 2016 - */ -#define HEADER_DIGEST_SIZE 20 - -/* - * Section 4.40 of Trusted Platform Module Library. Part 1. - * Level 00 Revision 01.38. September 29, 2016. - */ -#define TPM_RS_PW 0x40000009 -#define AUTH_SIZE 0x00000009 - -#define TPM_PCR_EXTEND 0x00000182 -#define TPM_ST_SESS 0x8002 - -#pragma pack(1) - -/* - * Log Header Entry Data - * Ref. Table 14 TCG_EfiSpecIdEventAlgorithmSize - * TCG PC Client Platform Firmware Profile 9.4.5.1 - */ - -typedef struct tcg_efi_spec_id_event_algorithm_size { - /* Algorithm ID (hashAlg) of the Hash used by BIOS */ - uint16_t algorithm_id; - /* The size of the digest produced by the implemented Hash algorithm */ - uint16_t digest_size; -} id_event_algorithm_size_t; - -/* - * TCG_EfiSpecIdEvent structure - * Ref. Table 15 TCG_EfiSpecIdEvent - * TCG PC Client Platform Firmware Profile 9.4.5.1 - */ - -typedef struct id_event_struct_header { - /* - * The NUL-terminated ASCII string "Spec ID Event03". - * SHALL be set to {0x53, 0x70, 0x65, 0x63, 0x20, 0x49, 0x44, - * 0x20, 0x45, 0x76, 0x65, 0x6e, 0x74, 0x30, 0x33, 0x00}. - */ - uint8_t signature[16]; - - /* - * The value for the Platform Class. - * The enumeration is defined in the TCG ACPI Specification Client - * Common Header. - */ - uint32_t platform_class; - - /* - * The PC Client Platform Profile Specification minor version number - * this BIOS supports. - * Any BIOS supporting this version (2.0) MUST set this value to 0x00. - */ - uint8_t spec_version_minor; - - /* - * The PC Client Platform Profile Specification major version number - * this BIOS supports. - * Any BIOS supporting this version (2.0) MUST set this value to 0x02. - */ - uint8_t spec_version_major; - - /* - * The PC Client Platform Profile Specification errata version number - * this BIOS supports. - * Any BIOS supporting this version (2.0) MUST set this value to 0x02. - */ - uint8_t spec_errata; - - /* - * Specifies the size of the UINTN fields used in various data - * structures used in this specification. - * 0x01 indicates UINT32 and 0x02 indicates UINT64. - */ - uint8_t uintn_size; - - /* - * The number of Hash algorithms in the digestSizes field. - * This field MUST be set to a value of 0x01 or greater. - */ - uint32_t number_of_algorithms; - - /* - * Each TCG_EfiSpecIdEventAlgorithmSize SHALL contain an algorithmId - * and digestSize for each hash algorithm used in the TCG_PCR_EVENT2 - * structure, the first of which is a Hash algorithmID and the second - * is the size of the respective digest. - */ - id_event_algorithm_size_t digest_size[]; /* number_of_algorithms */ -} id_event_struct_header_t; - -typedef struct id_event_struct_data { - /* - * Size in bytes of the VendorInfo field. - * Maximum value MUST be FFh bytes. - */ - uint8_t vendor_info_size; - - /* - * Provided for use by Platform Firmware implementer. The value might - * be used, for example, to provide more detailed information about the - * specific BIOS such as BIOS revision numbers, etc. The values within - * this field are not standardized and are implementer-specific. - * Platform-specific or -unique information MUST NOT be provided in - * this field. - * - */ - uint8_t vendor_info[]; /* [vendorInfoSize] */ -} id_event_struct_data_t; - -typedef struct tcg_efi_spec_id_event_struct { - id_event_struct_header_t struct_header; - id_event_struct_data_t struct_data; -} id_event_struct_t; - -typedef uint16_t TPM_ST; -typedef uint32_t TPM_CC; -typedef uint32_t TPM_HANDLE; -typedef TPM_HANDLE TPMI_DH_PCR; - -typedef struct { - TPM_ST tag; - uint32_t paramSize; - TPM_CC commandCode; -} TPM2_COMMAND_HEADER; - -typedef struct { - TPM2_COMMAND_HEADER Header; - TPMI_DH_PCR PcrHandle; - uint32_t AuthorizationSize; - TPMS_AUTH_COMMAND AuthSessionPcr; - TPML_DIGEST_VALUES DigestValues; -} TPM2_PCR_EXTEND_COMMAND; - -/* - * PCR Event Header - * TCG EFI Protocol Specification - * 5.3 Event Log Header - */ -typedef struct { - /* PCRIndex: - * The PCR Index to which this event is extended - */ - uint32_t pcr_index; - - /* EventType: - * SHALL be an EV_NO_ACTION event - */ - uint32_t event_type; - - /* SHALL be 20 Bytes of 0x00 */ - uint8_t digest[SHA1_DIGEST_SIZE]; - - /* The size of the event */ - uint32_t event_size; - - /* SHALL be a TCG_EfiSpecIdEvent */ - uint8_t event[]; /* [event_data_size] */ -} tcg_pcr_event_t; - -typedef struct { - tcg_pcr_event_t header; - id_event_struct_header_t struct_header; -} id_event_headers_t; - -/* TPMT_HA Structure */ -typedef struct { - /* Selector of the hash contained in the digest that implies - * the size of the digest - */ - uint16_t algorithm_id; /* AlgorithmId */ - - /* Digest, depends on AlgorithmId */ - uint8_t digest[]; /* Digest[] */ -} tpmt_ha; - -/* - * TPML_DIGEST_VALUES Structure - */ -typedef struct { - /* The number of digests in the list */ - uint32_t count; /* Count */ - - /* The list of tagged digests, as sent to the TPM as part of a - * TPM2_PCR_Extend or as received from a TPM2_PCR_Event command - */ - tpmt_ha digests[]; /* Digests[Count] */ /* FIXME: TPM_TA@TpmTypes.h */ -} tpml_digest_values; - -/* - * TCG_PCR_EVENT2 header - */ -typedef struct { - /* The PCR Index to which this event was extended */ - uint32_t pcr_index; /* PCRIndex */ - - /* Type of event */ - uint32_t event_type; /* EventType */ - - /* Digests: - * A counted list of tagged digests, which contain the digest of - * the event data (or external data) for all active PCR banks - */ - tpml_digest_values digests; /* Digests */ -} event2_header_t; - -typedef struct event2_data { - /* The size of the event data */ - uint32_t event_size; /* EventSize */ - - /* The data of the event */ - uint8_t event[]; /* Event[EventSize] */ -} event2_data_t; - -/* - * Startup Locality Event - * Ref. TCG PC Client Platform Firmware Profile 9.4.5.3 - */ -typedef struct { - /* - * The NUL-terminated ASCII string "StartupLocality" SHALL be - * set to {0x53 0x74 0x61 0x72 0x74 0x75 0x70 0x4C 0x6F 0x63 - * 0x61 0x6C 0x69 0x74 0x79 0x00} - */ - uint8_t signature[16]; - - /* The Locality Indicator which sent the TPM2_Startup command */ - uint8_t startup_locality; -} startup_locality_event_t; - -#pragma pack() - -#endif /* _FTPM_EVENT_LOG_PRIVATE_H */ diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM_helpers.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM_helpers.h deleted file mode 100644 index 31bbaae8..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/include/fTPM_helpers.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Copyright (c) 2021, Arm Limited. All rights reserverd. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef _FTPM_HELPERS_ -#define _FTPM_HELPERS_ - -#include - -uint16_t SwapBytes16(uint16_t Value); -uint32_t SwapBytes32(uint32_t Value); - -#endif /* _FTPM_HELPERS_ */ diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/lib/sub.mk b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/lib/sub.mk deleted file mode 100644 index 79205e62..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/lib/sub.mk +++ /dev/null @@ -1,8 +0,0 @@ -.PHONY: create_lib_symlinks -create_lib_symlinks: ./lib/tpm/tpm_symlink ./lib/wolf/wolf_symlink - -.PHONY: clean_lib_symlinks -clean_lib_symlinks: remove_tpm_symlink remove_wolf_symlink - -subdirs-y += wolf -subdirs-y += tpm \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/lib/tpm/sub.mk b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/lib/tpm/sub.mk deleted file mode 100644 index 68bdfe27..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/lib/tpm/sub.mk +++ /dev/null @@ -1,274 +0,0 @@ -FTPM_FLAGS = -DGCC -DUSE_WOLFCRYPT -DSIMULATION=NO -DVTPM -D_ARM_ -FTPM_DEBUG = -DCOMPILER_CHECKS=YES -DfTPMDebug -DRUNTIME_SIZE_CHECKS -DLIBRARY_COMPATIBILITY_CHECK -FTPM_RELEASE = -DCOMPILER_CHECKS=NO -DRUNTIME_SIZE_CHECKS=NO -DLIBRARY_COMPATIBILITY_CHECK=NO - -# -# The fTPM needs to overwrite some of the header files used in the reference implementation. The search order GCC -# uses is dependent on the order the '-I/include/path' arguments are passed in. This is depended on the optee_os build -# system which makes it brittle. Force including these files here will make sure the correct files are used first. -# - -FTPM_INCLUDES = -include ./reference/include/VendorString.h \ - -include ./reference/include/TpmProfile.h \ - -include ./platform/include/Platform.h - -# -# The TPM causes a few warnings when compiled with GCC which are not critical. -# - -FTPM_WARNING_SUPPRESS = -Wno-cast-align \ - -Wno-cast-function-type \ - -Wno-implicit-fallthrough \ - -Wno-missing-braces \ - -Wno-sign-compare \ - -Wno-suggest-attribute=noreturn \ - -Wno-switch-default - -cflags-y += $(FTPM_FLAGS) $(WOLF_SSL_FLAGS) $(FTPM_INCLUDES) $(FTPM_WARNING_SUPPRESS) - -ifeq ($(CFG_TA_DEBUG),y) -cflags-y += $(FTPM_DEBUG) -else -cflags-y += $(FTPM_RELEASE) -endif - -# -# For the purposes of this command the current working directory is the makefile root (/fTPM) folder, -# but the symlink will be created relative to THIS directory so the source requires an extra '../../'. -# -# Symlinks are needed since all build output is placed relative to the root. External libraries would result in -# binaries located outside the ouptut folder. -# -./lib/tpm/tpm_symlink: - @echo Checking symlink to the TPM folder: $(abspath $(TPM_ROOT)) - @if [ -L ./lib/tpm/tpm_symlink ] ; \ - then \ - echo Symlink already established ; \ - else \ - echo Establishing symlink. ; \ - ln -s ../../$(TPM_ROOT) ./lib/tpm/tpm_symlink; \ - fi - -.PHONY: remove_tpm_symlink -remove_tpm_symlink: - @if [ -e ./lib/tpm/tpm_symlink ] ; \ - then \ - unlink ./lib/tpm/tpm_symlink ; \ - echo Clearing symlink to the TPM folder: $(abspath $(TPM_ROOT)) ; \ - fi - -global-incdirs-y += tpm_symlink/TPMCmd/tpm/include -global-incdirs-y += tpm_symlink/TPMCmd/tpm/include/Ltc -global-incdirs-y += tpm_symlink/TPMCmd/tpm/include/prototypes -global-incdirs-y += tpm_symlink/TPMCmd/Platform/include - -# -# Generated in WSL using: -# find -name *.c | while read line; do echo XXXX$line; done | \ -# sed -e 's/XXXX.\//srcs-y += tpm_symlink\/TPMCmd\/tpm\/src\//g' -# This may need to be updated if there are any changes to the reference -# implementation. - -srcs-y += tpm_symlink/TPMCmd/tpm/src/X509/X509_ECC.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/X509/X509_RSA.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/X509/TpmASN1.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/X509/X509_spt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Attestation/CertifyX509.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Attestation/GetCommandAuditDigest.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Attestation/GetSessionAuditDigest.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Attestation/Attest_spt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Attestation/Quote.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Attestation/Certify.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Attestation/CertifyCreation.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Attestation/GetTime.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Random/GetRandom.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Random/StirRandom.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_WriteLock.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_ReadPublic.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_spt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_Increment.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_ChangeAuth.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_UndefineSpaceSpecial.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_SetBits.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_Write.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_GlobalWriteLock.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_Read.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_Extend.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_Certify.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_ReadLock.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_DefineSpace.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/NVStorage/NV_UndefineSpace.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/HashHMAC/HashSequenceStart.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/HashHMAC/SequenceUpdate.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/HashHMAC/MAC_Start.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/HashHMAC/EventSequenceComplete.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/HashHMAC/HMAC_Start.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/HashHMAC/SequenceComplete.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Vendor/Vendor_TCG_Test.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Ecdaa/Commit.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Startup/Startup.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Startup/Shutdown.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/FieldUpgrade/FieldUpgradeData.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/FieldUpgrade/FirmwareRead.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/FieldUpgrade/FieldUpgradeStart.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Capability/TestParms.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Capability/GetCapability.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/ClockTimer/ACT_spt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/ClockTimer/ClockRateAdjust.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/ClockTimer/ACT_SetTimeout.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/ClockTimer/ClockSet.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/ClockTimer/ReadClock.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Session/PolicyRestart.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Session/StartAuthSession.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyDuplicationSelect.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyPCR.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicySecret.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyTicket.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyTemplate.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyNV.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyGetDigest.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyCpHash.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyOR.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/Policy_spt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyLocality.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyAuthorize.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyAuthorizeNV.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyPassword.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyCounterTimer.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyAuthValue.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicySigned.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyNameHash.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyNvWritten.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyPhysicalPresence.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/EA/PolicyCommandCode.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Hierarchy/ChangePPS.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Hierarchy/HierarchyControl.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Hierarchy/HierarchyChangeAuth.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Hierarchy/ChangeEPS.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Hierarchy/ClearControl.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Hierarchy/Clear.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Hierarchy/SetPrimaryPolicy.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Hierarchy/CreatePrimary.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/CommandAudit/SetCommandCodeAuditStatus.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Object/Object_spt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Object/ReadPublic.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Object/Load.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Object/LoadExternal.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Object/MakeCredential.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Object/Unseal.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Object/CreateLoaded.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Object/ObjectChangeAuth.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Object/ActivateCredential.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Object/Create.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/AttachedComponent/AC_GetCapability.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/AttachedComponent/AC_spt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/AttachedComponent/AC_Send.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/AttachedComponent/Policy_AC_SendSelect.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Signature/VerifySignature.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Signature/Sign.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Duplication/Import.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Duplication/Rewrap.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Duplication/Duplicate.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt2.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt_spt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Symmetric/HMAC.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Symmetric/Hash.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Symmetric/MAC.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Context/ContextSave.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Context/FlushContext.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Context/Context_spt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Context/ContextLoad.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Context/EvictControl.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/PCR/PCR_Reset.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/PCR/PCR_Allocate.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/PCR/PCR_Extend.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/PCR/PCR_SetAuthValue.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/PCR/PCR_Event.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/PCR/PCR_SetAuthPolicy.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/PCR/PCR_Read.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/DA/DictionaryAttackParameters.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/DA/DictionaryAttackLockReset.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Misc/PP_Commands.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Misc/SetAlgorithmSet.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Testing/GetTestResult.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Testing/SelfTest.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Testing/IncrementalSelfTest.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Asymmetric/ECC_Parameters.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Asymmetric/RSA_Encrypt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Asymmetric/ECDH_ZGen.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Asymmetric/ECDH_KeyGen.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Asymmetric/ZGen_2Phase.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Asymmetric/ECC_Decrypt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Asymmetric/RSA_Decrypt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Asymmetric/EC_Ephemeral.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/command/Asymmetric/ECC_Encrypt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/subsystem/DA.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/subsystem/NvDynamic.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/subsystem/Object.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/subsystem/PP.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/subsystem/Session.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/subsystem/NvReserved.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/subsystem/Hierarchy.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/subsystem/Time.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/subsystem/PCR.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/subsystem/CommandAudit.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/events/_TPM_Hash_Start.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/events/_TPM_Init.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/events/_TPM_Hash_Data.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/events/_TPM_Hash_End.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptSmac.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptEccData.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptCmac.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/BnMath.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptEccSignature.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/wolf/TpmToWolfDesSupport.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/wolf/TpmToWolfMath.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/wolf/TpmToWolfSupport.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/AlgorithmTests.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptSelfTest.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/Ticket.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptDes.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/BnMemory.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptPrimeSieve.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/ossl/TpmToOsslSupport.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/ossl/TpmToOsslDesSupport.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/ossl/TpmToOsslMath.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptEccKeyExchange.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/BnConvert.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptRand.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/ltc/TpmToLtcSupport.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/ltc/TpmToLtcDesSupport.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/ltc/TpmToLtcMath.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptEccMain.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptSym.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/RsaKeyCache.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptUtil.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptEccCrypt.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptRsa.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptPrime.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/PrimeData.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/crypt/CryptHash.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/Marshal.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/MathOnByteBuffers.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/TableDrivenMarshal.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/PropertyCap.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/Locality.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/TableMarshalData.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/Memory.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/Response.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/ResponseCodeProcessing.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/Global.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/Power.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/AlgorithmCap.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/CommandCodeAttributes.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/Entity.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/Handle.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/TpmFail.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/TpmSizeChecks.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/Manufacture.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/IoBuffers.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/support/Bits.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/main/SessionProcess.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/main/CommandDispatcher.c -srcs-y += tpm_symlink/TPMCmd/tpm/src/main/ExecCommand.c diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/lib/wolf/sub.mk b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/lib/wolf/sub.mk deleted file mode 100644 index 0a43f46e..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/lib/wolf/sub.mk +++ /dev/null @@ -1,58 +0,0 @@ - -WOLF_SSL_FLAGS = -DSINGLE_THREADED \ - -DNO_WOLFSSL_CLIENT \ - -DNO_WOLFSSL_SERVER \ - -DOPENSSL_EXTRA \ - -DNO_FILESYSTEM \ - -DWOLFSSL_USER_SETTINGS \ - -DTIME_OVERRIDES \ - -DSTRING_USER \ - -DCTYPE_USER \ - -DCERTIFYX509_DEBUG=NO - -# -# Wolfcrypt has multiple unused functions, unfortunately the OPTEE build system can only turn off compiler flags for -# files in the same directory as the sub.mk file. It is not possible to place sub.mk files in the git submodules without -# creating a new fork of each submodule repo. To avoid spurious warnings these warnings are disabled here globally. -# - -WOLF_WARNING_SUPPRESS = -Wno-unused-function - -cflags-y += $(WOLF_SSL_FLAGS) $(WOLF_WARNING_SUPPRESS) - -# -# For the purposes of this command the current working directory is the makefile root (/fTPM) folder, -# but the symlink will be created relative to THIS directory so the source requires an extra '../../'. -# -./lib/wolf/wolf_symlink: - @echo Checking symlink to the WolfSSL folder: $(abspath $(WOLF_ROOT)) - @if [ -L ./lib/wolf/wolf_symlink ] ; \ - then \ - echo Symlink already established ; \ - else \ - echo Establishing symlink. ; \ - ln -s ../../$(WOLF_ROOT) ./lib/wolf/wolf_symlink; \ - fi - -.PHONY: remove_wolf_symlink -remove_wolf_symlink: - @if [ -e ./lib/wolf/wolf_symlink ] ; \ - then \ - unlink ./lib/wolf/wolf_symlink ; \ - echo Clearing symlink to the Wolf folder: $(abspath $(WOLF_ROOT)) ; \ - fi - -global-incdirs-y += wolf_symlink - -srcs-y += wolf_symlink/wolfcrypt/src/aes.c -srcs-y += wolf_symlink/wolfcrypt/src/asn.c -srcs-y += wolf_symlink/wolfcrypt/src/ecc.c -srcs-y += wolf_symlink/wolfcrypt/src/integer.c -srcs-y += wolf_symlink/wolfcrypt/src/memory.c -srcs-y += wolf_symlink/wolfcrypt/src/sha.c -srcs-y += wolf_symlink/wolfcrypt/src/sha256.c -srcs-y += wolf_symlink/wolfcrypt/src/sha512.c -srcs-y += wolf_symlink/wolfcrypt/src/tfm.c -srcs-y += wolf_symlink/wolfcrypt/src/wolfmath.c -srcs-y += wolf_symlink/wolfcrypt/src/des3.c -srcs-y += wolf_symlink/wolfcrypt/src/random.c diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/AdminPPI.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/AdminPPI.c deleted file mode 100644 index 01d382d7..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/AdminPPI.c +++ /dev/null @@ -1,426 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//**Introduction -// This file contains the emulated Physical Presence Interface. - -#include "assert.h" -#include "Admin.h" -#include "string.h" - -#include -#include - -#define TPM_CC_EmulatePPI 0x200001FF - -// -// Hand marshaling, unmarshaling, and maximally sized structures for EmulatePPI -// -#pragma pack (push, 1) -typedef struct { - TPM_ST tag; - UINT32 paramSize; - TPM_CC commandCode; -} TPM2_COMMAND_HEADER; - -typedef struct { - TPM_ST tag; - UINT32 paramSize; - TPM_RC responseCode; -} TPM2_RESPONSE_HEADER; - -typedef struct{ - UINT32 FunctionIndex; - UINT32 Op; -} EmulatePPI_In; - -typedef struct{ - UINT32 Result1; - UINT32 Result2; - UINT32 Result3; -} EmulatePPI_Out; - -typedef struct{ - TPM2_COMMAND_HEADER header; - EmulatePPI_In inputParameters; -} TPM2_EmulatePPI_cmd_t; - -typedef struct{ - TPM2_RESPONSE_HEADER header; - EmulatePPI_Out outputParameters; -} TPM2_EmulatePPI_res_t; -#pragma pack (pop) - -FTPM_PPI_STATE s_PPIState; - -extern int _plat__NvCommit(void); - -static void -ExecutePPICommand( - _In_ UINT32 FunctionIndex, - _In_ UINT32 Op, - _Out_ UINT32 *Result1, - _Out_ UINT32 *Result2, - _Out_ UINT32 *Result3 - ) -{ - UINT32 retVal1 = 0; - UINT32 retVal2 = 0; - UINT32 retVal3 = 0; - - _admin__RestorePPIState(); - - memset(Result1, 0, sizeof(UINT32)); - memset(Result2, 0, sizeof(UINT32)); - memset(Result3, 0, sizeof(UINT32)); - - switch (FunctionIndex) { - case FTPM_PPI_CMD_QUERY: - retVal1 = 0x1AB; // Per PPI 1.2 specification - break; - - case FTPM_PPI_CMD_VERSION: - retVal1 = FTPM_PPI_VERSION; // String "1.2" - break; - - case FTPM_PPI_CMD_SUBMIT_OP_REQ: - case FTPM_PPI_CMD_GET_PLATFORM_ACTION: - retVal1 = 2; // Reboot/General Failure - break; - - case FTPM_PPI_CMD_GET_PENDING_OP: - retVal1 = 0; // Success - retVal2 = s_PPIState.PendingPseudoOp; - break; - - case FTPM_PPI_CMD_RETURN_OP_RESP: - retVal1 = 0; // Success - retVal2 = s_PPIState.PseudoOpFromLastBoot; - retVal3 = s_PPIState.ReturnResponse; - break; - - case FTPM_PPI_CMD_SUBMIT_USER_LANG: - retVal1 = 3; // Not Implemented - break; - - case FTPM_PPI_CMD_SUBMIT_OP_REQ2: - switch (Op) { - case FTPM_PPI_OP_NOP: - case FTPM_PPI_OP_ENABLE: - case FTPM_PPI_OP_DISABLE: - case FTPM_PPI_OP_ACTIVATE: - case FTPM_PPI_OP_DEACTIVATE: - case FTPM_PPI_OP_CLEAR: // Causes Clear - case FTPM_PPI_OP_E_A: - case FTPM_PPI_OP_D_D: - case FTPM_PPI_OP_OWNERINSTALL_TRUE: - case FTPM_PPI_OP_OWNERINSTALL_FALSE: - case FTPM_PPI_OP_E_A_OI_TRUE: - case FTPM_PPI_OP_OI_FALSE_D_D: - case FTPM_PPI_OP_FIELD_UPGRADE: - case FTPM_PPI_OP_OPERATOR_AUTH: - case FTPM_PPI_OP_C_E_A: // Causes Clear - case FTPM_PPI_OP_SET_NO_PROV_FALSE: - case FTPM_PPI_OP_SET_NO_PROV_TRUE: - case FTPM_PPI_OP_SET_NO_MAINT_FALSE: - case FTPM_PPI_OP_SET_NO_MAINT_TRUE: - case FTPM_PPI_OP_E_A_C: // Causes Clear - case FTPM_PPI_OP_E_A_C_E_A: // Causes Clear - retVal1 = 0; // Success - s_PPIState.PendingPseudoOp = Op; - _admin__SavePPIState(); - break; - - case FTPM_PPI_OP_SET_NO_CLEAR_FALSE: - case FTPM_PPI_OP_SET_NO_CLEAR_TRUE: - default: - retVal1 = 1; // Not Implemented - break; - } - break; - - case FTPM_PPI_CMD_GET_USER_CONF: - switch (Op) { - case FTPM_PPI_OP_NOP: - case FTPM_PPI_OP_ENABLE: - case FTPM_PPI_OP_DISABLE: - case FTPM_PPI_OP_ACTIVATE: - case FTPM_PPI_OP_DEACTIVATE: - case FTPM_PPI_OP_E_A: - case FTPM_PPI_OP_D_D: - case FTPM_PPI_OP_OWNERINSTALL_TRUE: - case FTPM_PPI_OP_OWNERINSTALL_FALSE: - case FTPM_PPI_OP_E_A_OI_TRUE: - case FTPM_PPI_OP_OI_FALSE_D_D: - retVal1 = 4; // Allowed and PP user NOT required - break; - - case FTPM_PPI_OP_CLEAR: - case FTPM_PPI_OP_C_E_A: - case FTPM_PPI_OP_E_A_C: - case FTPM_PPI_OP_E_A_C_E_A: - retVal1 = 3; // Allowed and PP user required - break; - - default: - retVal1 = 0; // Not Implemented - break; - } - break; - - default: - break; - } - - memcpy(Result1, &retVal1, sizeof(UINT32)); - memcpy(Result2, &retVal2, sizeof(UINT32)); - memcpy(Result3, &retVal3, sizeof(UINT32)); -} - -static TPM2_EmulatePPI_res_t PPIResponse; - -#pragma warning(push) -#pragma warning(disable:28196) -// -// The fTPM TA (OpTEE) may receive, from the TrEE driver, a PPI request -// thru it's ACPI inteface rather than via the TPM_Emulate_PPI command -// we're used to. This function creates a well formes TPM_Emulate_PPI -// command and forwards the request on to _admin__PPICommand to handle. -// -// Return: -// 0 - Omproperly formatted PPI command. -// Otherwise - Return from _admin__PPICommand -// -int -_admin__PPIRequest( - UINT32 CommandSize, - __in_ecount(CommandSize) UINT8 *CommandBuffer, - UINT32 *ResponseSize, - __deref_out_ecount(*ResponseSize) UINT8 **ResponseBuffer - ) -{ - TPM2_EmulatePPI_cmd_t cmd; - TPM2_EmulatePPI_res_t rsp; - TPM2_EmulatePPI_res_t *rspPtr = &rsp; - UINT32 rspLen = sizeof(TPM2_EmulatePPI_res_t); - UINT8 *CmdBuffer; - - // Drop request if CommandSize is invalid - if (CommandSize < sizeof(UINT32)) { - return 0; - } - - CmdBuffer = CommandBuffer; - - cmd.header.tag = __builtin_bswap16(TPM_ST_NO_SESSIONS); - cmd.header.paramSize = __builtin_bswap32(sizeof(TPM2_EmulatePPI_cmd_t)); - cmd.header.commandCode = __builtin_bswap32(TPM_CC_EmulatePPI); - - cmd.inputParameters.FunctionIndex = BYTE_ARRAY_TO_UINT32(CmdBuffer); - CmdBuffer += sizeof(UINT32); - CommandSize -= sizeof(UINT32); - - // Parameter checking is done in _admin__PPICommand but we still need - // to sanity check the size field so as not to overrun CommandBuffer. - if (CommandSize > 0) { - - if (CommandSize < sizeof(UINT32)) - return 0; - - cmd.inputParameters.Op = BYTE_ARRAY_TO_UINT32(CmdBuffer); - } - - if (!_admin__PPICommand(sizeof(TPM2_EmulatePPI_cmd_t), - (UINT8 *)&cmd, - &rspLen, - (UINT8**)&rspPtr)) { - return 0; - } - - memcpy(*ResponseBuffer, &(rsp.outputParameters.Result1), (rspLen - sizeof(TPM2_RESPONSE_HEADER))); - *ResponseSize = (rspLen - sizeof(TPM2_RESPONSE_HEADER)); - return 1; -} - -// -// Return: -// 1 - Command has been consumed -// 0 - Not a properly formated PPI command, caller should pass through to TPM -// -int -_admin__PPICommand( - UINT32 CommandSize, - __in_ecount(CommandSize) UINT8 *CommandBuffer, - UINT32 *ResponseSize, - __deref_out_ecount(*ResponseSize) UINT8 **ResponseBuffer -) -{ - TPM2_EmulatePPI_cmd_t cmd; - UINT8 *CmdBuffer; - UINT32 FunctionIndex; - UINT32 Op; - UINT32 NumberResults = 0; - UINT16 Tag; - - memset(&PPIResponse, 0, sizeof(PPIResponse)); - memset(&cmd, 0, sizeof(cmd)); - - CmdBuffer = CommandBuffer; - - if (CommandSize < sizeof(TPM2_COMMAND_HEADER)) { - PPIResponse.header.responseCode = TPM_RC_COMMAND_SIZE; - goto Exit; - } - - cmd.header.tag = BYTE_ARRAY_TO_UINT16(CmdBuffer); - CmdBuffer += sizeof(UINT16); - CommandSize -= sizeof(UINT16); - - cmd.header.paramSize = BYTE_ARRAY_TO_UINT32(CmdBuffer); - CmdBuffer += sizeof(UINT32); - CommandSize -= sizeof(UINT32); - - cmd.header.commandCode = BYTE_ARRAY_TO_UINT32(CmdBuffer); - CmdBuffer += sizeof(UINT32); - CommandSize -= sizeof(UINT32); - - // - // First check that this must be the command we want to execute - // - if (cmd.header.commandCode != TPM_CC_EmulatePPI) { - return 0; - } - - // - // Must not be a session - // - if (cmd.header.tag != TPM_ST_NO_SESSIONS) { - PPIResponse.header.responseCode = TPM_RC_BAD_TAG; - goto Exit; - } - - // - // Must have enough command space left - // - if (cmd.header.paramSize < CommandSize) { - PPIResponse.header.responseCode = TPM_RC_COMMAND_SIZE; - goto Exit; - } - - if (CommandSize < sizeof(UINT32)) { - PPIResponse.header.responseCode = TPM_RC_COMMAND_SIZE; - goto Exit; - } - - FunctionIndex = BYTE_ARRAY_TO_UINT32(CmdBuffer); - CmdBuffer += sizeof(UINT32); - CommandSize -= sizeof(UINT32); - - switch (FunctionIndex) { - case FTPM_PPI_CMD_QUERY: - case FTPM_PPI_CMD_VERSION: - case FTPM_PPI_CMD_SUBMIT_OP_REQ: - case FTPM_PPI_CMD_GET_PLATFORM_ACTION: - case FTPM_PPI_CMD_SUBMIT_USER_LANG: - NumberResults = 1; - Op = 0; - break; - - case FTPM_PPI_CMD_GET_PENDING_OP: - NumberResults = 2; - Op = 0; - break; - - case FTPM_PPI_CMD_RETURN_OP_RESP: - NumberResults = 3; - Op = 0; - break; - - case FTPM_PPI_CMD_SUBMIT_OP_REQ2: - case FTPM_PPI_CMD_GET_USER_CONF: - NumberResults = 1; - - if (CommandSize < sizeof(UINT32)) { - PPIResponse.header.responseCode = TPM_RC_COMMAND_SIZE; - goto Exit; - } - - Op = BYTE_ARRAY_TO_UINT32(CmdBuffer); - CmdBuffer += sizeof(UINT32); - CommandSize -= sizeof(UINT32); - break; - - default: - NumberResults = 0; - PPIResponse.header.responseCode = TPM_RC_FAILURE; - goto Exit; - } - - - ExecutePPICommand(FunctionIndex, - Op, -#pragma warning (push) -#pragma warning (disable:4366) // The result of unary '&' may be unaligned - &PPIResponse.outputParameters.Result1, - &PPIResponse.outputParameters.Result2, - &PPIResponse.outputParameters.Result3); -#pragma warning (pop) - - PPIResponse.header.responseCode = TPM_RC_SUCCESS; - -Exit: - if (PPIResponse.header.responseCode != TPM_RC_SUCCESS) { - NumberResults = 0; - } - - *ResponseSize = sizeof(TPM2_RESPONSE_HEADER) + (NumberResults * sizeof(UINT32)); - - // - // Fill in tag, and size - // - Tag = TPM_ST_NO_SESSIONS; - PPIResponse.header.tag = BYTE_ARRAY_TO_UINT16((BYTE *)&Tag); - PPIResponse.header.paramSize = BYTE_ARRAY_TO_UINT32((BYTE *)ResponseSize); - PPIResponse.header.responseCode = BYTE_ARRAY_TO_UINT32((BYTE *)&PPIResponse.header.responseCode); - - // - // Results are in host byte order - // - memcpy(*ResponseBuffer, &PPIResponse, (sizeof(PPIResponse) < *ResponseSize) ? sizeof(PPIResponse) : *ResponseSize); - - return 1; -} -#pragma warning(pop) - diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Cancel.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Cancel.c deleted file mode 100644 index 304a0703..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Cancel.c +++ /dev/null @@ -1,80 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Description -// -// This module simulates the cancel pins on the TPM. -// -//** Includes, Typedefs, Structures, and Defines -#include "PlatformData.h" -#include "Platform_fp.h" - -//** Functions - -//***_plat__IsCanceled() -// Check if the cancel flag is set -// return type: BOOL -// TRUE(1) if cancel flag is set -// FALSE(0) if cancel flag is not set -LIB_EXPORT int -_plat__IsCanceled( - void - ) -{ - // return cancel flag - return s_isCanceled; -} - -//***_plat__SetCancel() - -// Set cancel flag. -LIB_EXPORT void -_plat__SetCancel( - void - ) -{ - s_isCanceled = TRUE; - return; -} - -//***_plat__ClearCancel() -// Clear cancel flag -LIB_EXPORT void -_plat__ClearCancel( - void - ) -{ - s_isCanceled = FALSE; - return; -} \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Clock.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Clock.c deleted file mode 100644 index 5bfd5b7a..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Clock.c +++ /dev/null @@ -1,302 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Description -// -// This file contains the routines that are used by the simulator to mimic -// a hardware clock on a TPM. -// -// In this implementation, all the time values are measured in millisecond. -// However, the precision of the clock functions may be implementation dependent. - -//** Includes and Data Definitions -#include "PlatformData.h" -#include "Platform_fp.h" -#include "TpmFail_fp.h" -#include -#include - -//** Simulator Functions -//*** Introduction -// This set of functions is intended to be called by the simulator environment in -// order to simulate hardware events. - -//***_plat__TimerReset() -// This function sets current system clock time as t0 for counting TPM time. -// This function is called at a power on event to reset the clock. When the clock -// is reset, the indication that the clock was stopped is also set. -LIB_EXPORT void -_plat__TimerReset( - void - ) -{ -TEE_Result Result; - TEE_Time Time = { 0 }; - - // Reset our TA persistent time, this affects all instances. - Result = TEE_SetTAPersistentTime(&Time); - - // Nothing we can do on failure here. - assert(Result == TEE_SUCCESS); - - s_adjustRate = 0; - s_lastSystemTime = 0; - s_tpmTime = 0; - s_adjustRate = CLOCK_NOMINAL; - s_timerReset = TRUE; - s_timerStopped = TRUE; - - return; -} - -//*** _plat__TimerRestart() -// This function should be called in order to simulate the restart of the timer -// should it be stopped while power is still applied. -LIB_EXPORT void -_plat__TimerRestart( - void - ) -{ - s_timerStopped = TRUE; - return; -} - -//** Functions Used by TPM -//*** Introduction -// These functions are called by the TPM code. They should be replaced by -// appropriated hardware functions. - -#include -TEE_Time debugTime; - -//*** _plat__RealTime() -// This is another, probably futile, attempt to define a portable function -// that will return a 64-bit clock value that has mSec resolution. -uint64_t -_plat__RealTime( - void -) -{ - TEE_Result Result; - TEE_Time Time; - uint64_t Elapsed, Temp; - - Result = TEE_GetTAPersistentTime(&Time); - - // Error conditions from GetTime may be resolved with a clock reset - if ((Result == TEE_ERROR_TIME_NOT_SET) || - (Result == TEE_ERROR_TIME_NEEDS_RESET)) { - // - // REVISIT: Since error conditions from get time may be resolved - // by resetting time. Determine if, when this happens, we see - // an issue with timing in the reference implementaiton. - // - _plat__TimerReset(); - - Result = TEE_GetTAPersistentTime(&Time); - // If the reset didn't resolve the error condision, give up. - assert(Result == TEE_SUCCESS); - } - assert(Result == TEE_SUCCESS); - - Elapsed = ((Time.seconds * 1000) + (Time.millis)); - - return Elapsed; -} - -//***_plat__TimerRead() -// This function provides access to the tick timer of the platform. The TPM code -// uses this value to drive the TPM Clock. -// -// The tick timer is supposed to run when power is applied to the device. This timer -// should not be reset by time events including _TPM_Init. It should only be reset -// when TPM power is re-applied. -// -// If the TPM is run in a protected environment, that environment may provide the -// tick time to the TPM as long as the time provided by the environment is not -// allowed to go backwards. If the time provided by the system can go backwards -// during a power discontinuity, then the _plat__Signal_PowerOn should call -// _plat__TimerReset(). -LIB_EXPORT uint64_t -_plat__TimerRead( - void - ) -{ -#ifdef HARDWARE_CLOCK -#error "need a defintion for reading the hardware clock" - return HARDWARE_CLOCK -#else - clock64_t timeDiff; - clock64_t adjustedTimeDiff; - clock64_t timeNow; - clock64_t readjustedTimeDiff; - - // This produces a timeNow that is basically locked to the system clock. - timeNow = _plat__RealTime(); - - // if this hasn't been initialized, initialize it - if(s_lastSystemTime == 0) - { - s_lastSystemTime = timeNow; - TEE_GetSystemTime(&debugTime); - s_lastReportedTime = 0; - s_realTimePrevious = 0; - } - // The system time can bounce around and that's OK as long as we don't allow - // time to go backwards. When the time does appear to go backwards, set - // lastSystemTime to be the new value and then update the reported time. - if(timeNow < s_lastReportedTime) - s_lastSystemTime = timeNow; - s_lastReportedTime = s_lastReportedTime + timeNow - s_lastSystemTime; - s_lastSystemTime = timeNow; - timeNow = s_lastReportedTime; - - // The code above produces a timeNow that is similar to the value returned - // by Clock(). The difference is that timeNow does not max out, and it is - // at a ms. rate rather than at a CLOCKS_PER_SEC rate. The code below - // uses that value and does the rate adjustment on the time value. - // If there is no difference in time, then skip all the computations - if(s_realTimePrevious >= timeNow) - return s_tpmTime; - // Compute the amount of time since the last update of the system clock - timeDiff = timeNow - s_realTimePrevious; - - // Do the time rate adjustment and conversion from CLOCKS_PER_SEC to mSec - adjustedTimeDiff = (timeDiff * CLOCK_NOMINAL) / ((uint64_t)s_adjustRate); - - // update the TPM time with the adjusted timeDiff - s_tpmTime += (clock64_t)adjustedTimeDiff; - - // Might have some rounding error that would loose CLOCKS. See what is not - // being used. As mentioned above, this could result in putting back more than - // is taken out. Here, we are trying to recreate timeDiff. - readjustedTimeDiff = (adjustedTimeDiff * (uint64_t)s_adjustRate ) - / CLOCK_NOMINAL; - - // adjusted is now converted back to being the amount we should advance the - // previous sampled time. It should always be less than or equal to timeDiff. - // That is, we could not have use more time than we started with. - s_realTimePrevious = s_realTimePrevious + readjustedTimeDiff; - -#ifdef DEBUGGING_TIME - // Put this in so that TPM time will pass much faster than real time when - // doing debug. - // A value of 1000 for DEBUG_TIME_MULTIPLER will make each ms into a second - // A good value might be 100 - return (s_tpmTime * DEBUG_TIME_MULTIPLIER); -#endif - return s_tpmTime; -#endif -} - - - -//*** _plat__TimerWasReset() -// This function is used to interrogate the flag indicating if the tick timer has -// been reset. -// -// If the resetFlag parameter is SET, then the flag will be CLEAR before the -// function returns. -LIB_EXPORT BOOL -_plat__TimerWasReset( - void - ) -{ - BOOL retVal = s_timerReset; - s_timerReset = FALSE; - return retVal; -} - -//*** _plat__TimerWasStopped() -// This function is used to interrogate the flag indicating if the tick timer has -// been stopped. If so, this is typically a reason to roll the nonce. -// -// This function will CLEAR the s_timerStopped flag before returning. This provides -// functionality that is similar to status register that is cleared when read. This -// is the model used here because it is the one that has the most impact on the TPM -// code as the flag can only be accessed by one entity in the TPM. Any other -// implementation of the hardware can be made to look like a read-once register. -LIB_EXPORT BOOL -_plat__TimerWasStopped( - void - ) -{ - BOOL retVal = s_timerStopped; - s_timerStopped = FALSE; - return retVal; -} - -//***_plat__ClockAdjustRate() -// Adjust the clock rate -LIB_EXPORT void -_plat__ClockAdjustRate( - int adjust // IN: the adjust number. It could be positive - // or negative - ) -{ - // We expect the caller should only use a fixed set of constant values to - // adjust the rate - switch(adjust) - { - case CLOCK_ADJUST_COARSE: - s_adjustRate += CLOCK_ADJUST_COARSE; - break; - case -CLOCK_ADJUST_COARSE: - s_adjustRate -= CLOCK_ADJUST_COARSE; - break; - case CLOCK_ADJUST_MEDIUM: - s_adjustRate += CLOCK_ADJUST_MEDIUM; - break; - case -CLOCK_ADJUST_MEDIUM: - s_adjustRate -= CLOCK_ADJUST_MEDIUM; - break; - case CLOCK_ADJUST_FINE: - s_adjustRate += CLOCK_ADJUST_FINE; - break; - case -CLOCK_ADJUST_FINE: - s_adjustRate -= CLOCK_ADJUST_FINE; - break; - default: - // ignore any other values; - break; - } - - if(s_adjustRate > (CLOCK_NOMINAL + CLOCK_ADJUST_LIMIT)) - s_adjustRate = CLOCK_NOMINAL + CLOCK_ADJUST_LIMIT; - if(s_adjustRate < (CLOCK_NOMINAL - CLOCK_ADJUST_LIMIT)) - s_adjustRate = CLOCK_NOMINAL - CLOCK_ADJUST_LIMIT; - - return; -} - diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/EPS.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/EPS.c deleted file mode 100644 index 75d694d3..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/EPS.c +++ /dev/null @@ -1,90 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -// -// Platform Endorsement Primary Seed -// - -#include "TpmError.h" -#include "Admin.h" - -#include -#include - -#define TEE_EPS_SIZE (256/2) // From TPM2B_RSA_TEST_PRIME in Hierarchy.c - -void -_plat__GetEPS(UINT16 Size, uint8_t *EndorsementSeed) -{ - TEE_Result Result = TEE_ERROR_ITEM_NOT_FOUND; - uint8_t EPS[TEE_EPS_SIZE] = { 0 }; - size_t EPSLen; - - IMSG("Size=%" PRIu16 "",Size); - IMSG("EPS=%d",TEE_EPS_SIZE); - - pAssert(Size <= (TEE_EPS_SIZE)); - - Result = TEE_GetPropertyAsBinaryBlock(TEE_PROPSET_CURRENT_TA, - "com.microsoft.ta.endorsementSeed", - EPS, - &EPSLen); - - if ((EPSLen < Size) || (Result != TEE_SUCCESS)) { - // We failed to access the property. We can't continue without it - // and we can't just fail to manufacture, so randomize EPS and - // continue. If necessary, fTPM TA storage can be cleared, or the - // TA updated, and we can trigger remanufacture and try again. - _plat__GetEntropy(EndorsementSeed, TEE_EPS_SIZE); - return; - } - - memcpy(EndorsementSeed, EPS, Size); - -#ifdef fTPMDebug - { - uint32_t x; - uint8_t *seed = EndorsementSeed; - DMSG("TEE_GetProperty 0x%x, seedLen 0x%x\n", Result, Size); - for (x = 0; x < Size; x = x + 8) { - DMSG(" seed(%2.2d): %2.2x,%2.2x,%2.2x,%2.2x,%2.2x,%2.2x,%2.2x,%2.2x\n", x, - seed[x + 0], seed[x + 1], seed[x + 2], seed[x + 3], - seed[x + 4], seed[x + 5], seed[x + 6], seed[x + 7]); - } - } -#endif - - return; -} diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Entropy.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Entropy.c deleted file mode 100644 index 3ca2fede..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Entropy.c +++ /dev/null @@ -1,128 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Includes and Local Values - -#define _CRT_RAND_S -#include -#include -#include "PlatformData.h" -#include "Platform_fp.h" -#include - -#include - -#ifdef _MSC_VER -#include -#else -#include -#endif - -// This is the last 32-bits of hardware entropy produced. We have to check to -// see that two consecutive 32-bit values are not the same because -// (according to FIPS 140-2, annex C -// -// 1. If each call to a RNG produces blocks of n bits (where n > 15), the first -// n-bit block generated after power-up, initialization, or reset shall not be -// used, but shall be saved for comparison with the next n-bit block to be -// generated. Each subsequent generation of an n-bit block shall be compared with -// the previously generated block. The test shall fail if any two compared n-bit -// blocks are equal. -extern uint32_t lastEntropy; - -//** Functions - -//*** rand32() -// Local function to get a 32-bit random number -static uint32_t -rand32( - void -) -{ - - uint32_t rndNum; - TEE_GenerateRandom((void *)(&rndNum), sizeof(uint32_t)); - return rndNum; -} - - -//** _plat__GetEntropy() -// This function is used to get available hardware entropy. In a hardware -// implementation of this function, there would be no call to the system -// to get entropy. -// return type: int32_t -// < 0 hardware failure of the entropy generator, this is sticky -// >= 0 the returned amount of entropy (bytes) -// -LIB_EXPORT int32_t -_plat__GetEntropy( - unsigned char *entropy, // output buffer - uint32_t amount // amount requested -) -{ - uint32_t rndNum; - int32_t ret; - - if(amount == 0) - { - lastEntropy = rand32(); - ret = 0; - } - else - { - rndNum = rand32(); - if(rndNum == lastEntropy) - { - ret = -1; - } - else - { - lastEntropy = rndNum; - // Each process will have its random number generator initialized according - // to the process id and the initialization time. This is not a lot of - // entropy so, to add a bit more, XOR the current time value into the - // returned entropy value. - // NOTE: the reason for including the time here rather than have it in - // in the value assigned to lastEntropy is that rand() could be broken and - // using the time would in the lastEntropy value would hide this. - rndNum ^= (uint32_t)_plat__RealTime(); - - // Only provide entropy 32 bits at a time to test the ability - // of the caller to deal with partial results. - ret = MIN(amount, sizeof(rndNum)); - memcpy(entropy, &rndNum, ret); - } - } - return ret; -} \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/EventLogPrint.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/EventLogPrint.c deleted file mode 100644 index 9c95c30a..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/EventLogPrint.c +++ /dev/null @@ -1,283 +0,0 @@ -/* - * Copyright (c) 2021, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -#ifdef EVENT_LOG_LEVEL -#undef EVENT_LOG_LEVEL -#endif - -#ifdef LOG_LEVEL -#undef LOG_LEVEL -#endif - -#define EVENT_LOG_LEVEL 1 -#define LOG_LEVEL 1 - -#if LOG_LEVEL >= EVENT_LOG_LEVEL - -/* - * Print TCG_EfiSpecIDEventStruct - * - * @param[in/out] log_addr Pointer to Event Log - * @param[in/out] log_size Pointer to Event Log size - */ -static void id_event_print(uint8_t **log_addr, size_t *log_size) -{ - unsigned int i; - uint8_t info_size, *info_size_ptr; - void *ptr = *log_addr; - id_event_headers_t *event = (id_event_headers_t *)ptr; - id_event_algorithm_size_t *alg_ptr; - uint32_t event_size, number_of_algorithms; - size_t digest_len; - const uint8_t *end_ptr = *log_addr + *log_size; - char str_buf[1024]; - - assert(*log_size >= sizeof(id_event_headers_t)); - - /* The fields of the event log header are defined to be PCRIndex of 0, - * EventType of EV_NO_ACTION, Digest of 20 bytes of 0, and - * Event content defined as TCG_EfiSpecIDEventStruct. - */ - MSG("TCG_EfiSpecIDEvent:\n"); - MSG(" PCRIndex : %u\n", event->header.pcr_index); - MSG(" EventType : %u\n", event->header.event_type); - str_buf[0] = 0; - snprintf(str_buf, 1024, " Digest :"); - for (i = 0U; i < sizeof(event->header.digest); ++i) { - uint8_t val = event->header.digest[i]; - - snprintf(str_buf, 1024, "%s %02x", str_buf, val); - if ((i & U(0xF)) == 0U) { - MSG("%s\n", str_buf); - str_buf[0] = 0; - snprintf(str_buf, 1024, "\t\t\t :"); - } - } - MSG("%s\n", str_buf); - str_buf[0] = 0; - - /* EventSize */ - event_size = event->header.event_size; - MSG(" EventSize : %u\n", event_size); - - MSG(" Signature : %s\n", - event->struct_header.signature); - MSG(" PlatformClass : %u\n", - event->struct_header.platform_class); - MSG(" SpecVersion : %u.%u.%u\n", - event->struct_header.spec_version_major, - event->struct_header.spec_version_minor, - event->struct_header.spec_errata); - MSG(" UintnSize : %u\n", - event->struct_header.uintn_size); - - /* NumberOfAlgorithms */ - number_of_algorithms = event->struct_header.number_of_algorithms; - MSG(" NumberOfAlgorithms : %u\n", number_of_algorithms); - - /* Address of DigestSizes[] */ - alg_ptr = event->struct_header.digest_size; - - /* Size of DigestSizes[] */ - digest_len = number_of_algorithms * sizeof(id_event_algorithm_size_t); - - assert(((uint8_t *)alg_ptr + digest_len) <= end_ptr); - - MSG(" DigestSizes :\n"); - for (i = 0U; i < number_of_algorithms; ++i) { - snprintf(str_buf, 1024, " #%u AlgorithmId : SHA", i); - uint16_t algorithm_id = alg_ptr[i].algorithm_id; - - switch (algorithm_id) { - case TPM_ALG_SHA256: - snprintf(str_buf, 1024, "%s256\n", str_buf); - break; - case TPM_ALG_SHA384: - snprintf(str_buf, 1024, "%s384\n", str_buf); - break; - case TPM_ALG_SHA512: - snprintf(str_buf, 1024, "%s512\n", str_buf); - break; - default: - snprintf(str_buf, 1024, "%s?\n", str_buf); - EMSG("Algorithm 0x%x not found\n", algorithm_id); - assert(false); - } - - MSG("%s", str_buf); - MSG(" DigestSize : %u\n", - alg_ptr[i].digest_size); - str_buf[0] = 0; - } - - /* Address of VendorInfoSize */ - info_size_ptr = (uint8_t *)alg_ptr + digest_len; - assert(info_size_ptr <= end_ptr); - - info_size = *info_size_ptr++; - MSG(" VendorInfoSize : %u\n", info_size); - - /* Check VendorInfo end address */ - assert((info_size_ptr + info_size) <= end_ptr); - - /* Check EventSize */ - assert(event_size == (sizeof(id_event_struct_t) + - digest_len + info_size)); - if (info_size != 0U) { - snprintf(str_buf, 1024, " VendorInfo :"); - for (i = 0U; i < info_size; ++i) { - snprintf(str_buf, 1024, "%s %02x", str_buf, - *info_size_ptr++); - } - MSG("%s\n", str_buf); - str_buf[0] = 0; - } - - *log_size -= (uintptr_t)info_size_ptr - (uintptr_t)*log_addr; - *log_addr = info_size_ptr; -} - -/* - * Print TCG_PCR_EVENT2 - * - * @param[in/out] log_addr Pointer to Event Log - * @param[in/out] log_size Pointer to Event Log size - */ -static void event2_print(uint8_t **log_addr, size_t *log_size) -{ - uint32_t event_size, count; - size_t sha_size, digests_size = 0U; - void *ptr = *log_addr; - char str_buf[1024]; - - const uint8_t *end_ptr = *log_addr + *log_size; - - assert(*log_size >= sizeof(event2_header_t)); - - MSG("PCR_Event2:\n"); - MSG(" PCRIndex : %u\n", - ((event2_header_t *)ptr)->pcr_index); - MSG(" EventType : %u\n", - ((event2_header_t *)ptr)->event_type); - - count = ((event2_header_t *)ptr)->digests.count; - MSG(" Digests Count : %u\n", count); - - /* Address of TCG_PCR_EVENT2.Digests[] */ - ptr = (uint8_t *)ptr + sizeof(event2_header_t); - assert(((uintptr_t)ptr <= (uintptr_t)end_ptr) && (count != 0U)); - - str_buf[0] = 0; - for (unsigned int i = 0U; i < count; ++i) { - /* Check AlgorithmId address */ - assert(((uint8_t *)ptr + offsetof(tpmt_ha, digest)) <= end_ptr); - - snprintf(str_buf, 1024, " #%u AlgorithmId : SHA", i); - switch (((tpmt_ha *)ptr)->algorithm_id) { - case TPM_ALG_SHA256: - sha_size = SHA256_DIGEST_SIZE; - snprintf(str_buf, 1024, "%s256\n", str_buf); - break; - case TPM_ALG_SHA384: - sha_size = SHA384_DIGEST_SIZE; - snprintf(str_buf, 1024, "%s384\n", str_buf); - break; - case TPM_ALG_SHA512: - sha_size = SHA512_DIGEST_SIZE; - snprintf(str_buf, 1024, "%s512\n", str_buf); - break; - default: - snprintf(str_buf, 1024, "%s?\n", str_buf); - EMSG("Algorithm 0x%x not found\n", - ((tpmt_ha *)ptr)->algorithm_id); - assert(true); - } - MSG("%s", str_buf); - str_buf[0] = 0; - - /* End of Digest[] */ - ptr = (uint8_t *)ptr + offsetof(tpmt_ha, digest); - assert(((uint8_t *)ptr + sha_size) <= end_ptr); - - /* Total size of all digests */ - digests_size += sha_size; - - snprintf(str_buf, 1024, " Digest :"); - for (unsigned int j = 0U; j < sha_size; ++j) { - snprintf(str_buf, 1024, "%s %02x", str_buf, - *(uint8_t *)ptr++); - if ((j & U(0xF)) == U(0xF)) { - MSG("%s\n", str_buf); - str_buf[0] = 0; - if (j < (sha_size - 1U)) { - snprintf(str_buf, 1024, "\t\t\t :"); - } - } - } - } - - /* TCG_PCR_EVENT2.EventSize */ - assert(((uint8_t *)ptr + offsetof(event2_data_t, event)) <= end_ptr); - - event_size = ((event2_data_t *)ptr)->event_size; - MSG(" EventSize : %u\n", event_size); - - /* Address of TCG_PCR_EVENT2.Event[EventSize] */ - ptr = (uint8_t *)ptr + offsetof(event2_data_t, event); - - /* End of TCG_PCR_EVENT2.Event[EventSize] */ - assert(((uint8_t *)ptr + event_size) <= end_ptr); - - if ((event_size == sizeof(startup_locality_event_t)) && - (strcmp((const char *)ptr, TCG_STARTUP_LOCALITY_SIGNATURE) == 0)) { - MSG(" Signature : %s\n", - ((startup_locality_event_t *)ptr)->signature); - MSG(" StartupLocality : %u\n", - ((startup_locality_event_t *)ptr)->startup_locality); - } else { - MSG(" Event : %s\n", (uint8_t *)ptr); - } - - *log_size -= (uintptr_t)ptr + event_size - (uintptr_t)*log_addr; - *log_addr = (uint8_t *)ptr + event_size; -} -#endif /* LOG_LEVEL >= EVENT_LOG_LEVEL */ - -/* - * Print Event Log - * - * @param[in] log_addr Pointer to Event Log - * @param[in] log_size Event Log size - */ -void dump_event_log(uint8_t *log_addr, size_t log_size) -{ -#if LOG_LEVEL >= EVENT_LOG_LEVEL - assert(log_addr != NULL); - - /* Print TCG_EfiSpecIDEvent */ - id_event_print(&log_addr, &log_size); - - while (log_size != 0U) { - event2_print(&log_addr, &log_size); - } -#endif -} diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/LocalityPlat.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/LocalityPlat.c deleted file mode 100644 index 1d74c570..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/LocalityPlat.c +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Includes - -#include "PlatformData.h" -#include "Platform_fp.h" - -//** Functions - -//***_plat__LocalityGet() -// Get the most recent command locality in locality value form. -// This is an integer value for locality and not a locality structure -// The locality can be 0-4 or 32-255. 5-31 is not allowed. -LIB_EXPORT unsigned char -_plat__LocalityGet( - void - ) -{ - return s_locality; -} - -//***_plat__LocalitySet() -// Set the most recent command locality in locality value form -LIB_EXPORT void -_plat__LocalitySet( - unsigned char locality - ) -{ - if(locality > 4 && locality < 32) - locality = 0; - s_locality = locality; - return; -} \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/NVMem.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/NVMem.c deleted file mode 100644 index 23db9d07..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/NVMem.c +++ /dev/null @@ -1,646 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Description -// -// This file contains the NV read and write access methods. This implementation -// uses RAM/file and does not manage the RAM/file as NV blocks. -// The implementation may become more sophisticated over time. -// - -#include "TpmError.h" -#include "Admin.h" -#include "VendorString.h" -#include "stdint.h" -#include "malloc.h" -#include "string.h" - -#include -#include - -// -// Overall size of NV, not just the TPM's NV storage -// -#define NV_CHIP_MEMORY_SIZE (NV_MEMORY_SIZE + NV_TPM_STATE_SIZE) - -// -// OpTEE still has an all or nothing approach to reads/writes. To provide -// more performant access to storage, break up NV accross 1Kbyte blocks. -// -// Note that NV_CHIP_MEMORY_SIZE *MUST* be a factor of NV_BLOCK_SIZE. -// -#define NV_BLOCK_SIZE 0x200 -#define NV_BLOCK_COUNT ((NV_CHIP_MEMORY_SIZE) / (NV_BLOCK_SIZE)) - -// -// For cleaner descriptor validation -// -#define IS_VALID(a) ((a) != (TEE_HANDLE_NULL)) - -// -// Storage flags -// -#define TA_STORAGE_FLAGS (TEE_DATA_FLAG_ACCESS_READ | \ - TEE_DATA_FLAG_ACCESS_WRITE | \ - TEE_DATA_FLAG_ACCESS_WRITE_META) - -// -// The base Object ID for fTPM storage -// -static const UINT32 s_StorageObjectID = 0x54504D00; // 'TPM00' - -// -// Object handle list for persistent storage objects containing NV -// -static TEE_ObjectHandle s_NVStore[NV_BLOCK_COUNT] = { TEE_HANDLE_NULL }; - -// -// Bitmap for NV blocks. Moving from UINT64 requires change to NV_DIRTY_ALL. -// -static UINT64 s_blockMap = 0x0ULL; - -// -// Shortcut for 'dirty'ing all NV blocks. Note the type. -// -#if NV_BLOCK_COUNT < 64 -#define NV_DIRTY_ALL ((UINT64)((0x1ULL << NV_BLOCK_COUNT) - 1)) -#elif NV_BLOCK_COUNT == 64 -#define NV_DIRTY_ALL (~(0x0ULL)) -#else -#error "NV block count exceeds 64 bit block map. Adjust block or NV size." -#endif - -// -// NV state -// -static BOOL s_NVChipFileNeedsManufacture = FALSE; -static BOOL s_NVInitialized = FALSE; -static UCHAR s_NV[NV_CHIP_MEMORY_SIZE]; - -// -// Firmware revision -// -static const UINT32 firmwareV1 = FIRMWARE_V1; -static const UINT32 firmwareV2 = FIRMWARE_V2; - -// -// Revision fro NVChip -// -static UINT64 s_chipRevision = 0; - -// -// This offset puts the revision field immediately following the TPM Admin -// state. The Admin space in NV is down to ~16 bytes but is padded out to -// 256bytes to avoid alignment issues and allow for growth. -// -#define NV_CHIP_REVISION_OFFSET ((NV_MEMORY_SIZE) + (TPM_STATE_SIZE)) - -VOID -_plat__NvInitFromStorage() -{ - DMSG("_plat__NvInitFromStorage()"); - UINT32 i; - BOOL initialized; - UINT32 objID; - UINT32 bytesRead; - TEE_Result Result; - - // Don't re-initialize. - if (s_NVInitialized) { - return; - } - - // - // If the NV file is successfully read from the storage then - // initialized must be set. We are setting initialized to true - // here but if an error is encountered reading the NV file it will - // be reset. - // - - initialized = TRUE; - - // Collect storage objects and init NV. - for (i = 0; i < NV_BLOCK_COUNT; i++) { - - // Form storage object ID for this block. - objID = s_StorageObjectID + i; - - // Attempt to open TEE persistent storage object. - Result = TEE_OpenPersistentObject(TEE_STORAGE_PRIVATE, - (void *)&objID, - sizeof(objID), - TA_STORAGE_FLAGS, - &s_NVStore[i]); - - // If the open failed, try to create this storage object. - if (Result != TEE_SUCCESS) { - - // There was an error, fail the init, NVEnable can retry. - if (Result != TEE_ERROR_ITEM_NOT_FOUND) { -#ifdef fTPMDebug - DMSG("Failed to open fTPM storage object"); -#endif - goto Error; - } - - // Storage object was not found, create it. - Result = TEE_CreatePersistentObject(TEE_STORAGE_PRIVATE, - (void *)&objID, - sizeof(objID), - TA_STORAGE_FLAGS, - NULL, - (void *)&(s_NV[i * NV_BLOCK_SIZE]), - NV_BLOCK_SIZE, - &s_NVStore[i]); - - // There was an error, fail the init, NVEnable can retry. - if (Result != TEE_SUCCESS) { -#ifdef fTPMDebug - DMSG("Failed to create fTPM storage object"); -#endif - goto Error; - } - - // A clean storage object was created, we must (re)manufacture. - s_NVChipFileNeedsManufacture = TRUE; - - // To ensure NV is consistent, force a write back of all NV blocks - s_blockMap = NV_DIRTY_ALL; - - // Need to re-initialize - initialized = FALSE; - -#ifdef fTPMDebug - IMSG("Created fTPM storage object, i: 0x%x, s: 0x%x, id: 0x%x, h:0x%x\n", - i, NV_BLOCK_SIZE, objID, s_NVStore[i]); -#endif - } - else { - // Successful open, now read fTPM storage object. - Result = TEE_ReadObjectData(s_NVStore[i], - (void *)&(s_NV[i * NV_BLOCK_SIZE]), - NV_BLOCK_SIZE, - &bytesRead); - - // Give up on failed or incomplete reads. - if ((Result != TEE_SUCCESS) || (bytesRead != NV_BLOCK_SIZE)) { -#ifdef fTPMDebug - DMSG("Failed to read fTPM storage object"); -#endif - goto Error; - } - -#ifdef fTPMDebug - IMSG("Read fTPM storage object, i: 0x%x, s: 0x%x, id: 0x%x, h:0x%x\n", - i, bytesRead, objID, s_NVStore[i]); -#endif - } - } - - // Storage objects are open and valid, next validate revision - s_chipRevision = ((((UINT64)firmwareV2) << 32) | (firmwareV1)); - if ((s_chipRevision != *(UINT64*)&(s_NV[NV_CHIP_REVISION_OFFSET]))) { - - // Failure to validate revision, re-init. - memset(s_NV, 0, NV_CHIP_MEMORY_SIZE); - - // Dirty the block map, we're going to re-init. - s_blockMap = NV_DIRTY_ALL; - - // Init with proper revision - s_chipRevision = ((((UINT64)firmwareV2) << 32) | (firmwareV1)); - *(UINT64*)&(s_NV[NV_CHIP_REVISION_OFFSET]) = s_chipRevision; - -#ifdef fTPMDebug - DMSG("Failed to validate revision."); -#endif - - // Force (re)manufacture. - s_NVChipFileNeedsManufacture = TRUE; - - // Need to re-initialize - initialized = FALSE; - - return; - } - - s_NVInitialized = initialized; - - return; - -Error: - s_NVInitialized = FALSE; - for (i = 0; i < NV_BLOCK_COUNT; i++) { - if (IS_VALID(s_NVStore[i])) { - TEE_CloseObject(s_NVStore[i]); - s_NVStore[i] = TEE_HANDLE_NULL; - } - } - - return; -} - - -static void -_plat__NvWriteBack() -{ - UINT32 i; - UINT32 objID; - TEE_Result Result; - - // Exit if no dirty blocks. - if ((!s_blockMap) || (!s_NVInitialized)) { - return; - } - -#ifdef fTPMDebug - DMSG("bMap: 0x%x\n", s_blockMap); -#endif - - // Write dirty blocks. - for (i = 0; i < NV_BLOCK_COUNT; i++) { - - if ((s_blockMap & (0x1ULL << i))) { - - // Form storage object ID for this block. - objID = s_StorageObjectID + i; - - // Move data position associated with handle to start of block. - Result = TEE_SeekObjectData(s_NVStore[i], 0, TEE_DATA_SEEK_SET); - if (Result != TEE_SUCCESS) { - goto Error; - } - - // Write out this block. - Result = TEE_WriteObjectData(s_NVStore[i], - (void *)&(s_NV[i * NV_BLOCK_SIZE]), - NV_BLOCK_SIZE); - if (Result != TEE_SUCCESS) { - goto Error; - } - - // Force storage stack to update its backing store - TEE_CloseObject(s_NVStore[i]); - - Result = TEE_OpenPersistentObject(TEE_STORAGE_PRIVATE, - (void *)&objID, - sizeof(objID), - TA_STORAGE_FLAGS, - &s_NVStore[i]); - // Success? - if (Result != TEE_SUCCESS) { - goto Error; - } - - // Clear dirty bit. - s_blockMap &= ~(0x1ULL << i); - } - } - - return; - -Error: - // Error path. -#ifdef fTPMDebug - DMSG("NV write back failed"); -#endif - s_NVInitialized = FALSE; - for (i = 0; i < NV_BLOCK_COUNT; i++) { - if (IS_VALID(s_NVStore[i])) { - TEE_CloseObject(s_NVStore[i]); - s_NVStore[i] = TEE_HANDLE_NULL; - } - } - - return; -} - - -BOOL -_plat__NvNeedsManufacture() -{ - return s_NVChipFileNeedsManufacture; -} - -//***_plat__NVEnable() -// Enable NV memory. -// -// This version just pulls in data from a file. In a real TPM, with NV on chip, -// this function would verify the integrity of the saved context. If the NV -// memory was not on chip but was in something like RPMB, the NV state would be -// read in, decrypted and integrity checked. -// -// The recovery from an integrity failure depends on where the error occurred. It -// it was in the state that is discarded by TPM Reset, then the error is -// recoverable if the TPM is reset. Otherwise, the TPM must go into failure mode. -// return type: int -// 0 if success -// > 0 if receive recoverable error -// <0 if unrecoverable error -LIB_EXPORT int -_plat__NVEnable( - void *platParameter // IN: platform specific parameters - ) -{ - UNREFERENCED_PARAMETER(platParameter); - DMSG("_plat__NVEnable()"); - - - UINT32 retVal = 0; - UINT32 firmwareV1 = FIRMWARE_V1; - UINT32 firmwareV2 = FIRMWARE_V2; - - // Don't re-open the backing store. - if (s_NVInitialized) { - return 0; - } - - // Clear NV - memset(s_NV, 0, NV_CHIP_MEMORY_SIZE); - - // Prepare for potential failure to retreieve NV from storage - s_chipRevision = ((((UINT64)firmwareV2) << 32) | (firmwareV1)); - *(UINT64*)&(s_NV[NV_CHIP_REVISION_OFFSET]) = s_chipRevision; - - // Pick up our NV memory. - _plat__NvInitFromStorage(); - - // Were we successful? - if (!s_NVInitialized) { - // Arriving here means one of two things: Either there existed no - // NV state before we came along and we just (re)initialized our - // storage. Or there is an error condition preventing us from - // accessing storage. Check which is the case. - if (s_NVChipFileNeedsManufacture == FALSE) { - // This condition means we cannot access storage. However, it - // isn't up to the platform layer to decide what to do in this - // case. The decision to proceed is made in the fTPM init code - // in TA_CreateEntryPoint. Here, we're going to make sure that, - // should we decide not to just TEE_Panic, we can continue - // execution after (re)manufacture. Later an attempt at re-init - // can be made by calling _plat__NvInitFromStorage again. - retVal = 0; - } - else { - retVal = 1; - } - - // Going to manufacture, zero flags - g_chipFlags.flags = 0; - - // Save flags - _admin__SaveChipFlags(); - - // Now we're done - s_NVInitialized = TRUE; - - return retVal; - } - else { - // In the transition out of UEFI to Windows, we may not tear down - // the TA. We close out one session and start another. This means - // our s_NVChipFileNeedsManufacture flag, if set, will be stale. - // Make sure we don't re-manufacture. - s_NVChipFileNeedsManufacture = FALSE; - - // We successfully initialized NV now pickup TPM state. - _admin__RestoreChipFlags(); - - // Success - retVal = 1; - } - - return retVal; -} - -//***_plat__NVDisable() -// Disable NV memory -LIB_EXPORT void -_plat__NVDisable( - void - ) -{ - UINT32 i; - - if (!s_NVInitialized) { - return; - } - - // Final write - _plat__NvWriteBack(); - - // Close out all handles - for (i = 0; i < NV_BLOCK_COUNT; i++) { - if (IS_VALID(s_NVStore[i])) { - TEE_CloseObject(s_NVStore[i]); - s_NVStore[i] = TEE_HANDLE_NULL; - } - } - - // We're no longer init-ed - s_NVInitialized = FALSE; - - return; -} - -//***_plat__IsNvAvailable() -// Check if NV is available -// return type: int -// 0 NV is available -// 1 NV is not available due to write failure -// 2 NV is not available due to rate limit -LIB_EXPORT int -_plat__IsNvAvailable( - void - ) -{ - // This is not enabled for OpTEE TA. Storage is always available. - return 0; -} - - - -//***_plat__NvMemoryRead() -// Function: Read a chunk of NV memory -LIB_EXPORT void -_plat__NvMemoryRead( - unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void *data // OUT: data buffer - ) -{ - pAssert((startOffset + size) <= NV_CHIP_MEMORY_SIZE); - pAssert(s_NV != NULL); - - memcpy(data, &s_NV[startOffset], size); -} - -//*** _plat__NvIsDifferent() -// This function checks to see if the NV is different from the test value. This is -// so that NV will not be written if it has not changed. -// return value: int -// TRUE(1) the NV location is different from the test value -// FALSE(0) the NV location is the same as the test value -LIB_EXPORT int -_plat__NvIsDifferent( - unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void *data // IN: data buffer - ) -{ - return (memcmp(&s_NV[startOffset], data, size) != 0); -} - -static -void -_plat__MarkDirtyBlocks ( - unsigned int startOffset, - unsigned int size -) -{ - unsigned int blockEnd; - unsigned int blockStart; - unsigned int i; - - // - // Integer math will round down to the start of the block. - // blockEnd is actually the last block + 1. - // - - blockStart = startOffset / NV_BLOCK_SIZE; - blockEnd = (startOffset + size) / NV_BLOCK_SIZE; - if ((startOffset + size) % NV_BLOCK_SIZE != 0) { - blockEnd += 1; - } - - for (i = blockStart; i < blockEnd; i++) { - s_blockMap |= (0x1ULL << i); - } -} - -//***_plat__NvMemoryWrite() -// This function is used to update NV memory. The "write" is to a memory copy of -// NV. At the end of the current command, any changes are written to -// the actual NV memory. -// NOTE: A useful optimization would be for this code to compare the current -// contents of NV with the local copy and note the blocks that have changed. Then -// only write those blocks when _plat__NvCommit() is called. -LIB_EXPORT void -_plat__NvMemoryWrite( - unsigned int startOffset, // IN: write start - unsigned int size, // IN: size of bytes to write - void *data // OUT: data buffer - ) -{ - pAssert(startOffset + size <= NV_CHIP_MEMORY_SIZE); - pAssert(s_NV != NULL); - - _plat__MarkDirtyBlocks(startOffset, size); - memcpy(&s_NV[startOffset], data, size); -} - -//***_plat__NvMemoryClear() -// Function is used to set a range of NV memory bytes to an implementation-dependent -// value. The value represents the erase state of the memory. -LIB_EXPORT void -_plat__NvMemoryClear( - unsigned int start, // IN: clear start - unsigned int size // IN: number of bytes to clear - ) -{ - pAssert(start + size <= NV_MEMORY_SIZE); - - _plat__MarkDirtyBlocks(start, size); - memset(&s_NV[start], 0, size); -} - -//***_plat__NvMemoryMove() -// Function: Move a chunk of NV memory from source to destination -// This function should ensure that if there overlap, the original data is -// copied before it is written -LIB_EXPORT void -_plat__NvMemoryMove( - unsigned int sourceOffset, // IN: source offset - unsigned int destOffset, // IN: destination offset - unsigned int size // IN: size of data being moved - ) -{ - pAssert(sourceOffset + size <= NV_CHIP_MEMORY_SIZE); - pAssert(destOffset + size <= NV_CHIP_MEMORY_SIZE); - pAssert(s_NV != NULL); - - _plat__MarkDirtyBlocks(sourceOffset, size); - _plat__MarkDirtyBlocks(destOffset, size); - - memmove(&s_NV[destOffset], &s_NV[sourceOffset], size); -} - -//***_plat__NvCommit() -// This function writes the local copy of NV to NV for permanent store. It will write -// NV_MEMORY_SIZE bytes to NV. If a file is use, the entire file is written. -// return type: int -// 0 NV write success -// non-0 NV write fail -LIB_EXPORT int -_plat__NvCommit( - void - ) -{ - _plat__NvWriteBack(); - return 0; -} - -//***_plat__SetNvAvail() -// Set the current NV state to available. This function is for testing purpose -// only. It is not part of the platform NV logic -LIB_EXPORT void -_plat__SetNvAvail( - void - ) -{ - // NV will not be made unavailable on this platform - return; -} - -//***_plat__ClearNvAvail() -// Set the current NV state to unavailable. This function is for testing purpose -// only. It is not part of the platform NV logic -LIB_EXPORT void -_plat__ClearNvAvail( - void - ) -{ - // The anti-set; not on this platform. - return; -} diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/NvAdmin.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/NvAdmin.c deleted file mode 100644 index 25760015..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/NvAdmin.c +++ /dev/null @@ -1,151 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//**Includes -// Force Global.h contents inclusion -#define GLOBAL_C - -#include "Admin.h" - -//**Types, Structures, and Defines -// -// List of pre-defined address of TPM state data -// -static UINT32 s_stateAddr[NV_TPM_STATE_LAST]; - -// -// List of pre-defined TPM state data size in byte -// -static UINT32 s_stateSize[NV_TPM_STATE_LAST]; - -// -// The current chip state -// -TPM_CHIP_STATE g_chipFlags; - -// -// The current PPI state -// -extern FTPM_PPI_STATE s_PPIState; - -//***_admin__NvInitState() -// Initialize the state NV runtime state values -void -_admin__NvInitState() -{ - UINT16 i; - UINT32 stateAddr; - - // - // Initialize TPM saved runtime state - // - s_stateSize[NV_TPM_STATE_FLAGS] = sizeof(TPM_CHIP_STATE); - s_stateSize[NV_TPM_STATE_PPI] = sizeof(FTPM_PPI_STATE); - - // - // Initialize TPM state data addresses. Stored after the main NV space. - // - stateAddr = NV_MEMORY_SIZE; - for (i = 0; i < NV_TPM_STATE_LAST; i++) { - s_stateAddr[i] = stateAddr; - stateAddr += s_stateSize[i]; - } - - pAssert(stateAddr <= (NV_MEMORY_SIZE + NV_TPM_STATE_SIZE)); -} - -//***_admin__SaveChipFlags() -// Save the g_chipFlags runtime state -void -_admin__SaveChipFlags() -{ - _admin__NvWriteState(NV_TPM_STATE_FLAGS, &g_chipFlags); -} - -//***_admin__RestoreChipFlags() -// Restore the g_chipFlags runtime state -void -_admin__RestoreChipFlags() -{ - _admin__NvReadState(NV_TPM_STATE_FLAGS, &g_chipFlags); -} - -//***_admin__SavePPIState() -// Save the s_PPIState runtime state -void -_admin__SavePPIState() -{ - _admin__NvWriteState(NV_TPM_STATE_PPI, &s_PPIState); - - _plat__NvCommit(); -} - -//***_admin__RestorePPIState() -// Restore the s_PPIState runtime state -void -_admin__RestorePPIState() -{ - _admin__NvReadState(NV_TPM_STATE_PPI, &s_PPIState); -} - -//***_admin__NvReadState() -// Read TPM state data from NV memory to RAM -void -_admin__NvReadState( - NV_TPM_STATE type, // IN: type of state data - void *buffer // OUT: data buffer - ) -{ - // Input type should be valid - pAssert(type >= 0 && type < NV_TPM_STATE_LAST); - - _plat__NvMemoryRead(s_stateAddr[type], s_stateSize[type], buffer); - return; -} - -//***_admin__NvWriteState() -// Write TPM state data to NV memory -void -_admin__NvWriteState( - NV_TPM_STATE type, // IN: type of state data - void *buffer // IN: data buffer - ) -{ - // Input type should be valid - pAssert(type >= 0 && type < NV_TPM_STATE_LAST); - - _plat__NvMemoryWrite(s_stateAddr[type], s_stateSize[type], buffer); - return; -} \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PPPlat.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PPPlat.c deleted file mode 100644 index 8b837a1c..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PPPlat.c +++ /dev/null @@ -1,80 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Description - -// This module simulates the physical presence interface pins on the TPM. - -//** Includes -#include "PlatformData.h" -#include "Platform_fp.h" - -//** Functions - -//***_plat__PhysicalPresenceAsserted() -// Check if physical presence is signaled -// return type: int -// TRUE(1) if physical presence is signaled -// FALSE(0) if physical presence is not signaled -LIB_EXPORT int -_plat__PhysicalPresenceAsserted( - void - ) -{ - // Do not know how to check physical presence without real hardware. - // so always return TRUE; - return s_physicalPresence; -} - -//***_plat__Signal_PhysicalPresenceOn() -// Signal physical presence on -LIB_EXPORT void -_plat__Signal_PhysicalPresenceOn( - void - ) -{ - s_physicalPresence = TRUE; - return; -} - -//***_plat__Signal_PhysicalPresenceOff() -// Signal physical presence off -LIB_EXPORT void -_plat__Signal_PhysicalPresenceOff( - void - ) -{ - s_physicalPresence = FALSE; - return; -} \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PlatformACT.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PlatformACT.c deleted file mode 100644 index 9528b08c..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PlatformACT.c +++ /dev/null @@ -1,345 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Includes -#include "Platform.h" - -//** Global variables -#define DEFINE_ACT(N) ACT_DATA ACT_##N; -FOR_EACH_ACT(DEFINE_ACT) - -int actTicksAllowed; - -//** Functions - -//*** ActSignal() -// Function called when there is an ACT event to signal or unsignal -static void -ActSignal( - P_ACT_DATA actData, - int on -) -{ - if(actData == NULL) - return; - // If this is to turn a signal on, don't do anything if it is already on. If this - // is to turn the signal off, do it anyway because this might be for - // initialization. - if(on && (actData->signaled == TRUE)) - return; - actData->signaled = (uint8_t)on; - - // If there is an action, then replace the "Do something" with the correct action. - // It should test 'on' to see if it is turning the signal on or off. - switch(actData->number) - { -#if RH_ACT_0 - case 0: // Do something - return; -#endif -#if RH_ACT_1 - case 1: // Do something - return; -#endif -#if RH_ACT_2 - case 2: // Do something - return; -#endif -#if RH_ACT_3 - case 3: // Do something - return; -#endif -#if RH_ACT_4 - case 4: // Do something - return; -#endif -#if RH_ACT_5 - case 5: // Do something - return; -#endif -#if RH_ACT_6 - case 6: // Do something - return; -#endif -#if RH_ACT_7 - case 7: // Do something - return; -#endif -#if RH_ACT_8 - case 8: // Do something - return; -#endif -#if RH_ACT_9 - case 9: // Do something - return; -#endif -#if RH_ACT_A - case 0xA: // Do something - return; -#endif -#if RH_ACT_B - case 0xB: - // Do something - return; -#endif -#if RH_ACT_C - case 0xC: // Do something - return; -#endif -#if RH_ACT_D - case 0xD: // Do something - return; -#endif -#if RH_ACT_E - case 0xE: // Do something - return; -#endif -#if RH_ACT_F - case 0xF: // Do something - return; -#endif - default: - return; - } -} - -//*** ActGetDataPointer() -static P_ACT_DATA -ActGetDataPointer( - uint32_t act -) -{ - -#define RETURN_ACT_POINTER(N) if(0x##N == act) return &ACT_##N; - - FOR_EACH_ACT(RETURN_ACT_POINTER) - - return (P_ACT_DATA)NULL; -} - -//*** _plat__ACT_GetImplemented() -// This function tests to see if an ACT is implemented. It is a belt and suspenders -// function because the TPM should not be calling to manipulate an ACT that is not -// implemented. However, this could help the simulator code which doesn't necessarily -// know if an ACT is implemented or not. -LIB_EXPORT int -_plat__ACT_GetImplemented( - uint32_t act -) -{ - return (ActGetDataPointer(act) != NULL); -} - -//*** _plat__ACT_GetRemaining() -// This function returns the remaining time. If an update is pending, 'newValue' is -// returned. Otherwise, the current counter value is returned. Note that since the -// timers keep running, the returned value can get stale immediately. The actual count -// value will be no greater than the returned value. -LIB_EXPORT uint32_t -_plat__ACT_GetRemaining( - uint32_t act //IN: the ACT selector -) -{ - P_ACT_DATA actData = ActGetDataPointer(act); - uint32_t remain; -// - if(actData == NULL) - return 0; - remain = actData->remaining; - if(actData->pending) - remain = actData->newValue; - return remain; -} - -//*** _plat__ACT_GetSignaled() -LIB_EXPORT int -_plat__ACT_GetSignaled( - uint32_t act //IN: number of ACT to check -) -{ - P_ACT_DATA actData = ActGetDataPointer(act); -// - if(actData == NULL) - return 0; - return (int )actData->signaled; -} - -//*** _plat__ACT_SetSignaled() -LIB_EXPORT void -_plat__ACT_SetSignaled( - uint32_t act, - int on -) -{ - ActSignal(ActGetDataPointer(act), on); -} - -//*** _plat__ACT_GetPending() -LIB_EXPORT int -_plat__ACT_GetPending( - uint32_t act //IN: number of ACT to check -) -{ - P_ACT_DATA actData = ActGetDataPointer(act); -// - if(actData == NULL) - return 0; - return (int )actData->pending; -} - - -//*** _plat__ACT_UpdateCounter() -// This function is used to write the newValue for the counter. If an update is -// pending, then no update occurs and the function returns FALSE. If 'setSignaled' -// is TRUE, then the ACT signaled state is SET and if 'newValue' is 0, nothing -// is posted. -LIB_EXPORT int -_plat__ACT_UpdateCounter( - uint32_t act, // IN: ACT to update - uint32_t newValue // IN: the value to post -) -{ - P_ACT_DATA actData = ActGetDataPointer(act); - // - if(actData == NULL) - // actData doesn't exist but pretend update is pending rather than indicate - // that a retry is necessary. - return TRUE; - // if an update is pending then return FALSE so that there will be a retry - if(actData->pending != 0) - return FALSE; - actData->newValue = newValue; - actData->pending = TRUE; - - return TRUE; -} - -//***_plat__ACT_EnableTicks() -// This enables and disables the processing of the once-per-second ticks. This should -// be turned off ('enable' = FALSE) by _TPM_Init and turned on ('enable' = TRUE) by -// TPM2_Startup() after all the initializations have completed. -LIB_EXPORT void -_plat__ACT_EnableTicks( - int enable -) -{ - actTicksAllowed = enable; -} - -//*** ActDecrement() -// If 'newValue' is non-zero it is copied to 'remaining' and then 'newValue' is -// set to zero. Then 'remaining' is decremented by one if it is not already zero. If -// the value is decremented to zero, then the associated event is signaled. If setting -// 'remaining' causes it to be greater than 1, then the signal associated with the ACT -// is turned off. -static void -ActDecrement( - P_ACT_DATA actData -) -{ - // Check to see if there is an update pending - if(actData->pending) - { - // If this update will cause the count to go from non-zero to zero, set - // the newValue to 1 so that it will timeout when decremented below. - if((actData->newValue == 0) && (actData->remaining != 0)) - actData->newValue = 1; - actData->remaining = actData->newValue; - - // Update processed - actData->pending = 0; - } - // no update so countdown if the count is non-zero but not max - if((actData->remaining != 0) && (actData->remaining != UINT32_MAX)) - { - // If this countdown causes the count to go to zero, then turn the signal for - // the ACT on. - if((actData->remaining -= 1) == 0) - ActSignal(actData, TRUE); - } - // If the current value of the counter is non-zero, then the signal should be - // off. - if(actData->signaled && (actData->remaining > 0)) - ActSignal(actData, FALSE); -} - -//*** _plat__ACT_Tick() -// This processes the once-per-second clock tick from the hardware. This is set up -// for the simulator to use the control interface to send ticks to the TPM. These -// ticks do not have to be on a per second basis. They can be as slow or as fast as -// desired so that the simulation can be tested. -LIB_EXPORT void -_plat__ACT_Tick( - void -) -{ - // Ticks processing is turned off at certain times just to make sure that nothing - // strange is happening before pointers and things are - if(actTicksAllowed) - { - // Handle the update for each counter. -#define DECREMENT_COUNT(N) ActDecrement(&ACT_##N); - - FOR_EACH_ACT(DECREMENT_COUNT) - } -} - -//*** ActZero() -// This function initializes a single ACT -static void -ActZero( - uint32_t act, - P_ACT_DATA actData -) -{ - actData->remaining = 0; - actData->newValue = 0; - actData->pending = 0; - actData->number = (uint8_t)act; - ActSignal(actData, FALSE); -} - -//***_plat__ACT_Initialize() -// This function initializes the ACT hardware and data structures -LIB_EXPORT int -_plat__ACT_Initialize( - void -) -{ - actTicksAllowed = 0; -#define ZERO_ACT(N) ActZero(0x##N, &ACT_##N); - FOR_EACH_ACT(ZERO_ACT) - - return TRUE; -} diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PlatformData.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PlatformData.c deleted file mode 100644 index 5fcc9dbd..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PlatformData.c +++ /dev/null @@ -1,82 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Description -// This file will instance the TPM variables that are not stack allocated. The -// descriptions for these variables are in Global.h for this project. - -//** Includes -#include "TpmProfile.h" -#include "PlatformData.h" - -// From Cancel.c -BOOL s_isCanceled; - -// From Clock.c -unsigned int s_adjustRate; -BOOL s_timerReset; -BOOL s_timerStopped; - -#ifndef HARDWARE_CLOCK -clock64_t s_realTimePrevious; -clock64_t s_tpmTime; - -clock64_t s_lastSystemTime; -clock64_t s_lastReportedTime; - - -#endif - - -// From LocalityPlat.c -unsigned char s_locality; - -// From Power.c -BOOL s_powerLost; - -// From Entropy.c -// This values is used to determine if the entropy generator is broken. If two -// consecutive values are the same, then the entropy generator is considered to be -// broken. -uint32_t lastEntropy; - - -// For NVMem.c -unsigned char s_NV[NV_MEMORY_SIZE]; -BOOL s_NvIsAvailable; -BOOL s_NV_unrecoverable; -BOOL s_NV_recoverable; - -// From PPPlat.c -BOOL s_physicalPresence; \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PowerPlat.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PowerPlat.c deleted file mode 100644 index c562d444..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/PowerPlat.c +++ /dev/null @@ -1,113 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Includes and Function Prototypes - -#include "PlatformData.h" -#include "Platform_fp.h" -#include "_TPM_Init_fp.h" - -//** Functions - -//***_plat__Signal_PowerOn() -// Signal platform power on -LIB_EXPORT int -_plat__Signal_PowerOn( - void - ) -{ - // Reset the timer - _plat__TimerReset(); - - // Need to indicate that we lost power - s_powerLost = TRUE; - - return 0; -} - -//*** _plat__WasPowerLost() -// Test whether power was lost before a _TPM_Init. -// -// This function will clear the "hardware" indication of power loss before return. -// This means that there can only be one spot in the TPM code where this value -// gets read. This method is used here as it is the most difficult to manage in the -// TPM code and, if the hardware actually works this way, it is hard to make it -// look like anything else. So, the burden is placed on the TPM code rather than the -// platform code -// return type: int -// TRUE(1) power was lost -// FALSE(0) power was not lost -LIB_EXPORT int -_plat__WasPowerLost( - void - ) -{ - BOOL retVal = s_powerLost; - s_powerLost = FALSE; - return retVal; -} - -//*** _plat_Signal_Reset() -// This a TPM reset without a power loss. -LIB_EXPORT int -_plat__Signal_Reset( - void - ) -{ - // Initialize locality - s_locality = 0; - - // Command cancel - s_isCanceled = FALSE; - - _TPM_Init(); - - // if we are doing reset but did not have a power failure, then we should - // not need to reload NV ... - - return 0; -} - -//***_plat__Signal_PowerOff() -// Signal platform power off -LIB_EXPORT void -_plat__Signal_PowerOff( - void - ) -{ - // Prepare NV memory for power off - _plat__NVDisable(); - - return; -} \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/RunCommand.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/RunCommand.c deleted file mode 100644 index 3fdd51f1..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/RunCommand.c +++ /dev/null @@ -1,90 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//**Introduction -// This module provides the platform specific entry and fail processing. The -// _plat__RunCommand() function is used to call to ExecuteCommand() in the TPM code. -// This function does whatever processing is necessary to set up the platform -// in anticipation of the call to the TPM including settup for error processing. -// -// The _plat__Fail() function is called when there is a failure in the TPM. The TPM -// code will have set the flag to indicate that the TPM is in failure mode. -// This call will then recursively call ExecuteCommand in order to build the -// failure mode response. When ExecuteCommand() returns to _plat__Fail(), the -// platform will do some platform specif operation to return to the environment in -// which the TPM is executing. For a simulator, setjmp/longjmp is used. For an OS, -// a system exit to the OS would be appropriate. - -//** Includes and locals -#include "PlatformData.h" -#include "Platform_fp.h" -#include -#include "ExecCommand_fp.h" - -#include -#include - -jmp_buf s_jumpBuffer; - -//** Functions - -//***_plat__RunCommand() -// This version of RunCommand will set up a jum_buf and call ExecuteCommand(). If -// the command executes without failing, it will return and RunCommand will return. -// If there is a failure in the command, then _plat__Fail() is called and it will -// longjump back to RunCommand which will call ExecuteCommand again. However, this -// time, the TPM will be in failure mode so ExecuteCommand will simply build -// a failure response and return. -LIB_EXPORT void -_plat__RunCommand( - uint32_t requestSize, // IN: command buffer size - unsigned char *request, // IN: command buffer - uint32_t *responseSize, // IN/OUT: response buffer size - unsigned char **response // IN/OUT: response buffer - ) -{ - setjmp(s_jumpBuffer); - ExecuteCommand(requestSize, request, responseSize, response); -} - - -//***_plat__Fail() -// This is the platform depended failure exit for the TPM. -LIB_EXPORT NORETURN void -_plat__Fail( - void - ) -{ - TEE_Panic(TEE_ERROR_BAD_STATE); -} \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Unique.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Unique.c deleted file mode 100644 index 47026704..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/Unique.c +++ /dev/null @@ -1,102 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// In some implementations of the TPM, the hardware can provide a secret -// value to the TPM. This secret value is statistically unique to the -// instance of the TPM. Typical uses of this value are to provide -// personalization to the random number generation and as a shared secret -// between the TPM and the manufacturer. - -//** Includes -#include "PlatformData.h" -#include "Platform_fp.h" - -#include -#include - -//static TEE_UUID deviceUniqueValue = { 0 }; -static char *deviceUniqueValue[sizeof(TEE_UUID)+1]; -static bool initializedUniqueValue = false; - -//** _plat__GetUnique() -// This function is used to access the platform-specific unique value. -// This function places the unique value in the provided buffer ('b') -// and returns the number of bytes transferred. The function will not -// copy more data than 'bSize'. -// NOTE: If a platform unique value has unequal distribution of uniqueness -// and 'bSize' is smaller than the size of the unique value, the 'bSize' -// portion with the most uniqueness should be returned. -LIB_EXPORT uint32_t -_plat__GetUnique( - uint32_t which, // authorities (0) or details - uint32_t bSize, // size of the buffer - unsigned char *b // output buffer - ) -{ - const char *from = (char *)&deviceUniqueValue; - uint32_t uSize = sizeof(TEE_UUID) + 1; - uint32_t retVal = 0; - TEE_Result teeResult; - - // Check if we've initialized our unique platform value. - if (!initializedUniqueValue) { - teeResult = TEE_GetPropertyAsUUID(TEE_PROPSET_TEE_IMPLEMENTATION, - "gpd.tee.deviceID", - (TEE_UUID*)&deviceUniqueValue); - assert(teeResult == TEE_SUCCESS); - } - deviceUniqueValue[uSize-1] = '\0'; - - if(which == 0) // the authorities value - { - for(retVal = 0; - *from != 0 && retVal < bSize; - retVal++) - { - *b++ = *from++; - } - } - else - { - b = &b[((bSize < uSize) ? bSize : uSize) - 1]; - for(retVal = 0; - *from != 0 && retVal < bSize; - retVal++) - { - *b-- = *from++; - } - } - return retVal; -} \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/fTPM_event_log.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/fTPM_event_log.c deleted file mode 100644 index 27f52b42..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/fTPM_event_log.c +++ /dev/null @@ -1,391 +0,0 @@ -/* - * Copyright (c) 2021, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * Global variables. - */ -static bool log_extended = false; -static id_event_struct_header_t *event_header_ptr; - -static int check_header_digest(const unsigned char *const digest) -{ - /* - * Checks the header digest according to section 5.3 of - * TCG EFI Protocol Specification. Family 2.0. Level 00 Revision 00.13 - * March 30, 2016. - */ - - unsigned int i; - - for (i = 0U; i < HEADER_DIGEST_SIZE; i++) { - if (digest[i] != 0) { - return 0; - } - } - - return 1; -} - -/* - * Function to process a TPM event log header. - * - * @buf_index Offset where the header is expected to start in the event log. - * @buf Pointer to a buffer where the TPM event log is. - * @log_size Size of the TPM event log. - * - * The function returns the offset on the event log after the header. - */ -static unsigned int process_header(unsigned int buf_index, - const unsigned char *const buf, - const size_t log_size) -{ - uint32_t event_size; - uint32_t digest_size; - uint8_t vendor_info_size; - - if (buf_index + sizeof(tcg_pcr_event_t) + sizeof(id_event_struct_header_t) - >= log_size) { -#ifdef fTPMDebug - EMSG("TPM Event log header extends beyond the scope of the event log buffer\n"); -#endif - } - - /* - * Check PcrIndex. - */ - if (*((uint32_t *)(buf + buf_index)) != 0U) { - /* - * PCR Index must be 0 on the header. - * Ref. Section 5.3 of TCG EFI Protocol Specification. Family 2.0 - * Level 00 Revision 00.13. March 30, 2016 - */ - return 0U; - } - buf_index += sizeof(uint32_t); - - /* - * Check EventType - */ - if (*((uint32_t *)(buf + buf_index)) != EV_NO_ACTION) { - /* - * Event type must be EV_NO_ACTION on the header. - * Ref. Section 5.3 of TCG EFI Protocol Specification. Family 2.0 - * Level 00 Revision 00.13. March 30, 2016 - */ - return 0U; - } - buf_index += sizeof(uint32_t); - - if (!check_header_digest(buf + buf_index)) { - return 0U; - } - - buf_index += HEADER_DIGEST_SIZE; - - memcpy(&event_size, buf + buf_index, sizeof(event_size)); - buf_index += sizeof(event_size); - - event_header_ptr = (id_event_struct_header_t *)(buf + buf_index); - - buf_index += sizeof(id_event_struct_header_t); - - digest_size = (event_header_ptr->number_of_algorithms * - sizeof(id_event_algorithm_size_t)); - - if (buf_index + digest_size >= log_size) { -#ifdef fTPMDebug - EMSG("TPM Event log header extends beyond the scope of the event log buffer\n"); -#endif - event_header_ptr = NULL; - return 0U; - } - - buf_index += digest_size; - - if (buf_index + sizeof(vendor_info_size) >= log_size) { -#ifdef fTPMDebug - EMSG("TPM Event log header extends beyond the scope of the event log buffer\n"); -#endif - event_header_ptr = NULL; - return 0U; - } - - memcpy(&vendor_info_size, buf + buf_index, sizeof(vendor_info_size)); - - if (digest_size + vendor_info_size + sizeof(vendor_info_size) + - sizeof(id_event_struct_header_t) != event_size) { -#ifdef fTPMDebug - EMSG("The parsed event size does not match the event size on the header\n"); -#endif - return 0U; - } - - buf_index += sizeof(vendor_info_size); - - if (buf_index + vendor_info_size > log_size) { -#ifdef fTPMDebug - EMSG("Event size larger than the log size\n"); -#endif - event_header_ptr = NULL; - return 0U; - } - - /* - * Skips the vendor info. - */ - buf_index += vendor_info_size; - - return buf_index; -} - -/* - * Function to proccess (and extend) an event from the TPM event log. - * - * @buf_index Offset where the event is expected to start in the event log. - * @buf Pointer to a buffer where the TPM event log is. - * @log_size Size of the TPM event log. - * - * The function returns the offset of the next event in the TPM event log - * or 0 if fails. - */ -static unsigned int process_event(unsigned int buf_index, - const unsigned char *const buf, - const size_t log_size) -{ - TPM2_PCR_EXTEND_COMMAND cmd; - unsigned char *digest_array; - uint32_t count; - uint32_t event_size; - uint16_t alg_id; - unsigned int digest_size; - unsigned int i; - unsigned char *response; - uint32_t resplen; - event2_header_t event; - void *cmd_end = (void *)(&cmd + 1); - - if (buf_index + sizeof(event2_header_t) >= log_size) { -#ifdef fTPMDebug - EMSG("Event header size larger than the log size\n"); -#endif - return 0U; - } - - memcpy(&event, buf + buf_index, sizeof(event2_header_t)); - buf_index += sizeof(event2_header_t); - - if (event.digests.count > HASH_COUNT) { -#ifdef fTPMDebug - EMSG("Number of digests on this event exceeds the maximum allowed\n"); -#endif - return 0U; - } - - memset(&cmd, 0, sizeof(TPM2_PCR_EXTEND_COMMAND)); - - cmd.Header.paramSize = sizeof(cmd.PcrHandle) + - sizeof(cmd.AuthorizationSize) + - sizeof(cmd.Header); - - cmd.PcrHandle = SwapBytes32(event.pcr_index); - - cmd.Header.commandCode = SwapBytes32(TPM_PCR_EXTEND); - cmd.Header.tag = SwapBytes16(TPM_ST_SESS); - - /* - * We are not using authorization sessions in this prototype code so - * populate the auth session info based on how it is handled in - * CopyAuthSessionCommand() with a NULL auth session. See - * SecurityPkg/Library/Tpm2CommandLib/Tpm2Help.c in EDK2. - */ - cmd.AuthSessionPcr.sessionHandle = SwapBytes32(TPM_RS_PW); - cmd.AuthSessionPcr.nonce.b.size = 0U; - *((uint8_t *)&cmd.AuthSessionPcr.sessionAttributes) = 0U; - cmd.AuthSessionPcr.hmac.b.size = 0U; - cmd.AuthorizationSize = SwapBytes32(AUTH_SIZE); - cmd.Header.paramSize += (AUTH_SIZE); - - /* - * As we are not using authorization sessions for this prototype, - * AuthSessionPcr is empty and therefore the digests are allocated - * straight after the empty AuthSessionPcr structure, so make the - * pointer for the digests to point right after the empty - * AuthSessionPcr structure. - */ - digest_array = ((uint8_t *)&cmd.AuthSessionPcr) + AUTH_SIZE; - - /* - * Populate the digest. - */ - count = SwapBytes32(event.digests.count); - memcpy(digest_array, &count, sizeof(count)); - digest_array += sizeof(count); - - cmd.Header.paramSize += sizeof(count); - - for (i = 0U; i < event.digests.count; i++) { - unsigned int j; - - if (buf_index + sizeof(alg_id) >= log_size) { - return 0U; - } - memcpy(&alg_id, buf + buf_index, sizeof(alg_id)); - alg_id = SwapBytes16(alg_id); - buf_index += sizeof(alg_id); - /* - * Algorithm ID. - */ - if ((void *)(digest_array + sizeof(alg_id)) >= cmd_end) { -#ifdef fTPMDebug - EMSG("Not enough space for digest %u of %u\n", i, - event.digests.count); -#endif - return 0U; - } - memcpy(digest_array, &alg_id, sizeof(alg_id)); - digest_array += sizeof(alg_id); - cmd.Header.paramSize += sizeof(alg_id); - - for (j = 0U; j < event_header_ptr->number_of_algorithms; j++) { - if (SwapBytes16(alg_id) == - event_header_ptr->digest_size[i].algorithm_id) { - digest_size = event_header_ptr->digest_size[i].digest_size; - break; - } - } - - if (j > event_header_ptr->number_of_algorithms) { -#ifdef fTPMDebug - EMSG("Algorithm ID %i not found\n", alg_id); -#endif - return 0U; - } - - cmd.Header.paramSize += digest_size; - - if (buf_index + digest_size >= log_size || - digest_size > (sizeof(TPMT_HA) - sizeof(TPMI_ALG_HASH))) { - /* - * Sanity check: If the log extends beyond the - * maximum size of the log buffer or if the digest is - * bigger than the allocated space on the command structure, abort. - */ -#ifdef fTPMDebug - EMSG("Log extends beyond the maximum size of the log buffer.\n"); - EMSG("alg_id = %i\n", alg_id); - EMSG("log_size = %i\n", log_size); - EMSG("buf_index = %i, digest_size = %i\n", buf_index, digest_size); - EMSG("TPMH_HA = %i\n", sizeof(TPMT_HA)); - EMSG("TPMI_ALG_HASH = %i\n", sizeof(TPMI_ALG_HASH)); -#endif - return 0U; - } - memcpy(digest_array, buf + buf_index, digest_size); - digest_array += digest_size; - buf_index += digest_size; - } - - cmd.Header.paramSize = SwapBytes32(cmd.Header.paramSize); - - if (buf_index + sizeof(event2_data_t) > log_size) { - return 0U; - } - memcpy(&event_size, buf + buf_index, sizeof(event_size)); - buf_index += sizeof(event_size); - buf_index += event_size; - - if (buf_index > log_size) { -#ifdef fTPMDebug - EMSG("The event log extends beyond the log buffer:"); - EMSG("\tbuf_index = %i, log_size = %i\n", buf_index, log_size); -#endif - return 0U; - } - - resplen = 1024; - response = (unsigned char *)malloc(resplen); - - if (response == NULL) { -#ifdef fTPMDebug - EMSG("Not enough memory to allocate a response\n"); -#endif - return 0U; - } - - memset(response, 0, resplen); - - ExecuteCommand(SwapBytes32(cmd.Header.paramSize), &cmd, - &resplen, &response); - -#ifdef fTPMDebug - uint16_t ret_tag; - uint32_t resp_size; - uint32_t tpm_rc; - - memcpy(&ret_tag, response, sizeof(ret_tag)); - memcpy(&resp_size, response + sizeof(ret_tag), sizeof(resp_size)); - memcpy(&tpm_rc, response + sizeof(ret_tag) + sizeof(resp_size), - sizeof(tpm_rc)); - - MSG("TPM2_PCR_EXTEND_COMMAND returned value:\n"); - MSG("\tret_tag = 0x%.4x, size = 0x%.8x, rc = 0x%.8x\n", - SwapBytes16(ret_tag), SwapBytes32(resp_size), SwapBytes32(tpm_rc)); -#endif - - free(response); - - return buf_index; -} - -bool process_eventlog(const unsigned char *const buf, const size_t log_size) -{ - unsigned int buf_index = 0U; - unsigned int event_count = 0U; - - if (log_extended == true) { -#ifdef fTPMDebug - MSG("The event log has already been extended. Ignoring\n"); -#endif - return false; - } - - log_extended = true; - buf_index = process_header(buf_index, buf, log_size); - if (buf_index == 0) { -#ifdef fTPMDebug - EMSG("Fail to process TPM event log header. Skiping.\n"); -#endif - return false; - } - - while (buf_index < log_size) { - /* - * Process the rest of the Event Log. - */ - buf_index = process_event(buf_index, buf, log_size); - event_count++; - } - -#ifdef fTPMDebug - MSG("%i Event logs processed\n", event_count); -#endif - - event_header_ptr = NULL; - - return true; -} diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/fTPM_helpers.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/fTPM_helpers.c deleted file mode 100644 index 98368614..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/fTPM_helpers.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (c) 2021, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -// -// Helper functions for byte ordering of TPM commands/responses -// -uint16_t SwapBytes16(uint16_t Value) -{ - return (uint16_t)((Value << 8) | (Value >> 8)); -} - -uint32_t SwapBytes32(uint32_t Value) -{ - uint32_t LowerBytes; - uint32_t HigherBytes; - - LowerBytes = (uint32_t)SwapBytes16((uint16_t)Value); - HigherBytes = (uint32_t)SwapBytes16((uint16_t)(Value >> 16)); - - return (LowerBytes << 16 | HigherBytes); -} diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/Admin.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/Admin.h deleted file mode 100644 index 84efcaf7..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/Admin.h +++ /dev/null @@ -1,230 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//**Introduction -/* - This file contains the admin interfaces. -*/ - -#ifndef _ADMIN_H -#define _ADMIN_H - -//**Includes -#include -#include -#include "swap.h" -#include "TpmProfile.h" -#include "TpmSal.h" -#include "TpmError.h" - -// Parameter reference and types from ref impl headers -#ifndef UNREFERENCED_PARAMETER -#define UNREFERENCED_PARAMETER(a) do { (void)(a); } while (0) -#endif - -#define FAIL(errorCode) (TpmFail(__FUNCTION__, __LINE__, errorCode)) - -#if defined(EMPTY_ASSERT) -#define pAssert(a) ((void)0) -#else -#define pAssert(a) \ - do { \ - if (!(a)) { \ - EMSG("## ASSERT:" #a "##\n"); \ - FAIL(FATAL_ERROR_PARAMETER); \ - } \ - } while (0) -#endif - -#if defined(__GNUC__) -typedef unsigned char UCHAR; -typedef unsigned char * PUCHAR; -typedef void VOID; -typedef void * PVOID; -#endif - -// Admin space tacked on to NV, padded out to NV_BLOCK_SIZE alignment. -#define NV_TPM_STATE_SIZE 0x200 - -// Actual size of Admin space used. (See note in NVMem.c) -#define TPM_STATE_SIZE 0x10 - -// Select TPM types/defines for AdminPPI.c -typedef UINT16 TPM_ST; -#define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001) - -typedef UINT32 TPM_RC; -#define TPM_RC_SUCCESS (TPM_RC)(0x000) -#define RC_VER1 (TPM_RC)(0x100) -#define TPM_RC_BAD_TAG (TPM_RC)(0x01E) -#define TPM_RC_FAILURE (TPM_RC)(RC_VER1+0x001) -#define TPM_RC_COMMAND_SIZE (TPM_RC)(RC_VER1+0x042) - -// Chip flags -typedef union { - UINT32 flags; - struct { - UINT32 Remanufacture : 1; // Ignored on OpTEE platforms - UINT32 TpmStatePresent : 1; // Set when sate present (startup STATE) - UINT32 Reserved : 30; - } fields; -} TPM_CHIP_STATE; - -// -// The current NV Chip state -// -extern TPM_CHIP_STATE g_chipFlags; - -// -// Simulated Physical Presence Interface (PPI) -// -#define FTPM_PPI_CMD_QUERY 0 -#define FTPM_PPI_CMD_VERSION 1 -#define FTPM_PPI_CMD_SUBMIT_OP_REQ 2 -#define FTPM_PPI_CMD_GET_PENDING_OP 3 -#define FTPM_PPI_CMD_GET_PLATFORM_ACTION 4 -#define FTPM_PPI_CMD_RETURN_OP_RESP 5 -#define FTPM_PPI_CMD_SUBMIT_USER_LANG 6 -#define FTPM_PPI_CMD_SUBMIT_OP_REQ2 7 -#define FTPM_PPI_CMD_GET_USER_CONF 8 - -#define FTPM_PPI_OP_NOP 0 -#define FTPM_PPI_OP_ENABLE 1 -#define FTPM_PPI_OP_DISABLE 2 -#define FTPM_PPI_OP_ACTIVATE 3 -#define FTPM_PPI_OP_DEACTIVATE 4 -#define FTPM_PPI_OP_CLEAR 5 -#define FTPM_PPI_OP_E_A 6 -#define FTPM_PPI_OP_D_D 7 -#define FTPM_PPI_OP_OWNERINSTALL_TRUE 8 -#define FTPM_PPI_OP_OWNERINSTALL_FALSE 9 -#define FTPM_PPI_OP_E_A_OI_TRUE 10 -#define FTPM_PPI_OP_OI_FALSE_D_D 11 -#define FTPM_PPI_OP_FIELD_UPGRADE 12 -#define FTPM_PPI_OP_OPERATOR_AUTH 13 -#define FTPM_PPI_OP_C_E_A 14 -#define FTPM_PPI_OP_SET_NO_PROV_FALSE 15 -#define FTPM_PPI_OP_SET_NO_PROV_TRUE 16 -#define FTPM_PPI_OP_SET_NO_CLEAR_FALSE 17 -#define FTPM_PPI_OP_SET_NO_CLEAR_TRUE 18 -#define FTPM_PPI_OP_SET_NO_MAINT_FALSE 19 -#define FTPM_PPI_OP_SET_NO_MAINT_TRUE 20 -#define FTPM_PPI_OP_E_A_C 21 -#define FTPM_PPI_OP_E_A_C_E_A 22 -#define FTPM_PPI_OP_RESERVED_FIRST 23 -#define FTPM_PPI_OP_RESERVED_LAST 127 -#define FTPM_PPI_OP_VENDOR_FIRST 128 - -#define FTPM_PPI_VERSION 0x00322E31 // "1.2" - -#define FTPM_PPI_OP_NOT_IMPLEMENTED 0xFFFFFFFF // Any Op other than E_A_C_E_A - -#pragma pack(1) -typedef struct { - UINT32 PendingPseudoOp; - UINT32 PseudoOpFromLastBoot; - UINT32 ReturnResponse; -} FTPM_PPI_STATE; -#pragma pack() - -// -// The types of TPM runtime state stored to NV -// -typedef enum { - NV_TPM_STATE_FLAGS = 0, - NV_TPM_STATE_PPI, - NV_TPM_STATE_LAST // A mark of the end of the TPM state -} NV_TPM_STATE; - -//***_admin__NvInitState() -// Initialize the NV admin state -void -_admin__NvInitState(); - -//***_admin__NvReadState() -// Read TPM state data from NV memory to RAM -void -_admin__NvReadState( - NV_TPM_STATE type, // IN: type of state data - void *buffer // OUT: data buffer - ); - -//***_admin__NvWriteState() -// Write TPM state data to NV memory -void -_admin__NvWriteState( - NV_TPM_STATE type, // IN: type of state data - void *buffer // IN: data buffer - ); - -// -// Save and restore runtime state -// - - -//***_admin__SaveChipFlags() -// Save the g_chipFlags runtime state -void -_admin__SaveChipFlags(); - -//***_admin__RestoreChipFlags() -// Restore the g_chipFlags runtime state -void -_admin__RestoreChipFlags(); - -//***_admin__SavePPIState() -// Save the s_PPIState runtime state -void -_admin__SavePPIState(); - -//***_admin__RestorePPIState() -// Restore the s_PPIState runtime state -void -_admin__RestorePPIState(); - -//***_admin__PPICommand() -// Returns 1 when PPI command has been consumed -// Returns 0 when it is not a properly formated PPI command, -// caller should pass through to TPM -// -int -_admin__PPICommand( - UINT32 CommandSize, - __in_ecount(CommandSize) UINT8 *CommandBuffer, - UINT32 *ResponseSize, - __deref_out_ecount(*ResponseSize) UINT8 **ResponseBuffer -); - -#endif diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/Platform.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/Platform.h deleted file mode 100644 index b95a1932..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/Platform.h +++ /dev/null @@ -1,52 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _PLATFORM_H_ -#define _PLATFORM_H_ - -#include "TpmBuildSwitches.h" -#include "BaseTypes.h" -#include "TPMB.h" -#include "MinMax.h" - -#include "TpmProfile.h" - -#include "PlatformACT.h" -#include "PlatformClock.h" -#include "PlatformData.h" -#include "Platform_fp.h" - - -#endif // _PLATFORM_H_ diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/PlatformData.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/PlatformData.h deleted file mode 100644 index f05493b7..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/PlatformData.h +++ /dev/null @@ -1,137 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -// This file contains the instance data for the Platform module. It is collected -// in this file so that the state of the module is easier to manage. - -#ifndef _PLATFORM_DATA_H_ -#define _PLATFORM_DATA_H_ - - -#include "TpmProfile.h" - -// From Cancel.c -// Cancel flag. It is initialized as FALSE, which indicate the command is not -// being canceled -extern int s_isCanceled; - -#ifndef HARDWARE_CLOCK -typedef uint64_t clock64_t; -// This is the value returned the last time that the system clock was read. This -// is only relevant for a simulator or virtual TPM. -extern clock64_t s_realTimePrevious; - -// These values are used to try to synthesize a long lived version of clock(). -extern clock64_t s_lastSystemTime; -extern clock64_t s_lastReportedTime; - -// This is the rate adjusted value that is the equivalent of what would be read from -// a hardware register that produced rate adjusted time. -extern clock64_t s_tpmTime; -#endif // HARDWARE_CLOCK - -// This value indicates that the timer was reset -extern BOOL s_timerReset; -// This value indicates that the timer was stopped. It causes a clock discontinuity. -extern BOOL s_timerStopped; - -// CLOCK_NOMINAL is the number of hardware ticks per mS. A value of 300000 means -// that the nominal clock rate used to drive the hardware clock is 30 MHz. The -// adjustment rates are used to determine the conversion of the hardware ticks to -// internal hardware clock value. In practice, we would expect that there woudl be -// a hardware register will accumulated mS. It would be incremented by the output -// of a pre-scaler. The pre-scaler would divide the ticks from the clock by some -// value that would compensate for the difference between clock time and real time. -// The code in Clock does the emulation of this function. -#define CLOCK_NOMINAL 30000 -// A 1% change in rate is 300 counts -#define CLOCK_ADJUST_COARSE 300 -// A 0.1% change in rate is 30 counts -#define CLOCK_ADJUST_MEDIUM 30 -// A minimum change in rate is 1 count -#define CLOCK_ADJUST_FINE 1 -// The clock tolerance is +/-15% (4500 counts) -// Allow some guard band (16.7%) -#define CLOCK_ADJUST_LIMIT 5000 - -// This variable records the time when _plat__TimerReset is called. This mechanism -// allow us to subtract the time when TPM is power off from the total -// time reported by clock() function -extern uint64_t s_initClock; - -// This variable records the timer adjustment factor. -extern unsigned int s_adjustRate; - -// For LocalityPlat.c -// Locality of current command -extern unsigned char s_locality; - -// For NVMem.c -// Choose if the NV memory should be backed by RAM or by file. -// If this macro is defined, then a file is used as NV. If it is not defined, -// then RAM is used to back NV memory. Comment out to use RAM. - -#if (!defined VTPM) || ((VTPM != NO) && (VTPM != YES)) -# undef VTPM -# define VTPM YES // Default: Either YES or NO -#endif - -// For a simulation, use a file to back up the NV -#if (!defined FILE_BACKED_NV) || ((FILE_BACKED_NV != NO) && (FILE_BACKED_NV != YES)) -# undef FILE_BACKED_NV -# define FILE_BACKED_NV (VTPM && YES) // Default: Either YES or NO -#endif - -#if !SIMULATION -# undef FILE_BACKED_NV -# define FILE_BACKED_NV NO -#endif // SIMULATION - -extern unsigned char s_NV[NV_MEMORY_SIZE]; -extern BOOL s_NvIsAvailable; -extern BOOL s_NV_unrecoverable; -extern BOOL s_NV_recoverable; - - -// For PPPlat.c -// Physical presence. It is initialized to FALSE -extern BOOL s_physicalPresence; - -// From Power -extern BOOL s_powerLost; - -// For Entropy.c -extern uint32_t lastEntropy; - -#endif // _PLATFORM_DATA_H_ diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/Platform_fp.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/Platform_fp.h deleted file mode 100644 index 74069e69..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/platform/include/Platform_fp.h +++ /dev/null @@ -1,492 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Aug 7, 2018 Time: 03:39:35PM - */ - -#ifndef _PLATFORM_FP_H_ -#define _PLATFORM_FP_H_ - -//** From EPS.c - -LIB_EXPORT void -_plat__GetEPS(UINT16 Size, uint8_t *EndorsementSeed); - -//** From Cancel.c - -//***_plat__IsCanceled() -// Check if the cancel flag is set -// return type: BOOL -// TRUE(1) if cancel flag is set -// FALSE(0) if cancel flag is not set -LIB_EXPORT int -_plat__IsCanceled( - void - ); - -// Set cancel flag. -LIB_EXPORT void -_plat__SetCancel( - void - ); - -//***_plat__ClearCancel() -// Clear cancel flag -LIB_EXPORT void -_plat__ClearCancel( - void - ); - - -//** From Clock.c - -//***_plat__TimerReset() -// This function sets current system clock time as t0 for counting TPM time. -// This function is called at a power on event to reset the clock. When the clock -// is reset, the indication that the clock was stopped is also set. -LIB_EXPORT void -_plat__TimerReset( - void - ); - -//*** _plat__TimerRestart() -// This function should be called in order to simulate the restart of the timer -// should it be stopped while power is still applied. -LIB_EXPORT void -_plat__TimerRestart( - void - ); - -//*** _plat__RealTime() -// This is another, probably futile, attempt to define a portable function -// that will return a 64-bit clock value that has mSec resolution. -uint64_t -_plat__RealTime( - void -); - -//***_plat__TimerRead() -// This function provides access to the tick timer of the platform. The TPM code -// uses this value to drive the TPM Clock. -// -// The tick timer is supposed to run when power is applied to the device. This timer -// should not be reset by time events including _TPM_Init. It should only be reset -// when TPM power is re-applied. -// -// If the TPM is run in a protected environment, that environment may provide the -// tick time to the TPM as long as the time provided by the environment is not -// allowed to go backwards. If the time provided by the system can go backwards -// during a power discontinuity, then the _plat__Signal_PowerOn should call -// _plat__TimerReset(). -LIB_EXPORT uint64_t -_plat__TimerRead( - void - ); - -//*** _plat__TimerWasReset() -// This function is used to interrogate the flag indicating if the tick timer has -// been reset. -// -// If the resetFlag parameter is SET, then the flag will be CLEAR before the -// function returns. -LIB_EXPORT BOOL -_plat__TimerWasReset( - void - ); - -//*** _plat__TimerWasStopped() -// This function is used to interrogate the flag indicating if the tick timer has -// been stopped. If so, this is typically a reason to roll the nonce. -// -// This function will CLEAR the s_timerStopped flag before returning. This provides -// functionality that is similar to status register that is cleared when read. This -// is the model used here because it is the one that has the most impact on the TPM -// code as the flag can only be accessed by one entity in the TPM. Any other -// implementation of the hardware can be made to look like a read-once register. -LIB_EXPORT BOOL -_plat__TimerWasStopped( - void - ); - -//***_plat__ClockAdjustRate() -// Adjust the clock rate -LIB_EXPORT void -_plat__ClockAdjustRate( - int adjust // IN: the adjust number. It could be positive - // or negative - ); - - -//** From Entropy.c - -//** _plat__GetEntropy() -// This function is used to get available hardware entropy. In a hardware -// implementation of this function, there would be no call to the system -// to get entropy. -// return type: int32_t -// < 0 hardware failure of the entropy generator, this is sticky -// >= 0 the returned amount of entropy (bytes) -// -LIB_EXPORT int32_t -_plat__GetEntropy( - unsigned char *entropy, // output buffer - uint32_t amount // amount requested - ); - - -//** From LocalityPlat.c - -//***_plat__LocalityGet() -// Get the most recent command locality in locality value form. -// This is an integer value for locality and not a locality structure -// The locality can be 0-4 or 32-255. 5-31 is not allowed. -LIB_EXPORT unsigned char -_plat__LocalityGet( - void - ); - -//***_plat__LocalitySet() -// Set the most recent command locality in locality value form -LIB_EXPORT void -_plat__LocalitySet( - unsigned char locality - ); - - -//** From NVMem.c - -//*** _plat__NvErrors() -// This function is used by the simulator to set the error flags in the NV -// subsystem to simulate an error in the NV loading process -LIB_EXPORT void -_plat__NvErrors( - int recoverable, - int unrecoverable - ); - -//***_plat__NVEnable() -// Enable NV memory. -// -// This version just pulls in data from a file. In a real TPM, with NV on chip, -// this function would verify the integrity of the saved context. If the NV -// memory was not on chip but was in something like RPMB, the NV state would be -// read in, decrypted and integrity checked. -// -// The recovery from an integrity failure depends on where the error occurred. It -// it was in the state that is discarded by TPM Reset, then the error is -// recoverable if the TPM is reset. Otherwise, the TPM must go into failure mode. -// return type: int -// 0 if success -// > 0 if receive recoverable error -// <0 if unrecoverable error -LIB_EXPORT int -_plat__NVEnable( - void *platParameter // IN: platform specific parameters - ); - -//***_plat__NVDisable() -// Disable NV memory -LIB_EXPORT void -_plat__NVDisable( - void - ); - -//***_plat__IsNvAvailable() -// Check if NV is available -// return type: int -// 0 NV is available -// 1 NV is not available due to write failure -// 2 NV is not available due to rate limit -LIB_EXPORT int -_plat__IsNvAvailable( - void - ); - -//***_plat__NvMemoryRead() -// Function: Read a chunk of NV memory -LIB_EXPORT void -_plat__NvMemoryRead( - unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void *data // OUT: data buffer - ); - -//*** _plat__NvIsDifferent() -// This function checks to see if the NV is different from the test value. This is -// so that NV will not be written if it has not changed. -// return value: int -// TRUE(1) the NV location is different from the test value -// FALSE(0) the NV location is the same as the test value -LIB_EXPORT int -_plat__NvIsDifferent( - unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void *data // IN: data buffer - ); - -//***_plat__NvMemoryWrite() -// This function is used to update NV memory. The "write" is to a memory copy of -// NV. At the end of the current command, any changes are written to -// the actual NV memory. -// NOTE: A useful optimization would be for this code to compare the current -// contents of NV with the local copy and note the blocks that have changed. Then -// only write those blocks when _plat__NvCommit() is called. -LIB_EXPORT int -_plat__NvMemoryWrite( - unsigned int startOffset, // IN: write start - unsigned int size, // IN: size of bytes to write - void *data // OUT: data buffer - ); - -//***_plat__NvMemoryClear() -// Function is used to set a range of NV memory bytes to an implementation-dependent -// value. The value represents the erase state of the memory. -LIB_EXPORT void -_plat__NvMemoryClear( - unsigned int start, // IN: clear start - unsigned int size // IN: number of bytes to clear - ); - -//***_plat__NvMemoryMove() -// Function: Move a chunk of NV memory from source to destination -// This function should ensure that if there overlap, the original data is -// copied before it is written -LIB_EXPORT void -_plat__NvMemoryMove( - unsigned int sourceOffset, // IN: source offset - unsigned int destOffset, // IN: destination offset - unsigned int size // IN: size of data being moved - ); - -//***_plat__NvCommit() -// This function writes the local copy of NV to NV for permanent store. It will write -// NV_MEMORY_SIZE bytes to NV. If a file is use, the entire file is written. -// return type: int -// 0 NV write success -// non-0 NV write fail -LIB_EXPORT int -_plat__NvCommit( - void - ); - -//***_plat__SetNvAvail() -// Set the current NV state to available. This function is for testing purpose -// only. It is not part of the platform NV logic -LIB_EXPORT void -_plat__SetNvAvail( - void - ); - -//***_plat__ClearNvAvail() -// Set the current NV state to unavailable. This function is for testing purpose -// only. It is not part of the platform NV logic -LIB_EXPORT void -_plat__ClearNvAvail( - void - ); - - -//** From PowerPlat.c - -//***_plat__Signal_PowerOn() -// Signal platform power on -LIB_EXPORT int -_plat__Signal_PowerOn( - void - ); - -//*** _plat__WasPowerLost() -// Test whether power was lost before a _TPM_Init. -// -// This function will clear the "hardware" indication of power loss before return. -// This means that there can only be one spot in the TPM code where this value -// gets read. This method is used here as it is the most difficult to manage in the -// TPM code and, if the hardware actually works this way, it is hard to make it -// look like anything else. So, the burden is placed on the TPM code rather than the -// platform code -// return type: int -// TRUE(1) power was lost -// FALSE(0) power was not lost -LIB_EXPORT int -_plat__WasPowerLost( - void - ); - -//*** _plat_Signal_Reset() -// This a TPM reset without a power loss. -LIB_EXPORT int -_plat__Signal_Reset( - void - ); - -//***_plat__Signal_PowerOff() -// Signal platform power off -LIB_EXPORT void -_plat__Signal_PowerOff( - void - ); - - -//** From PPPlat.c - -//***_plat__PhysicalPresenceAsserted() -// Check if physical presence is signaled -// return type: int -// TRUE(1) if physical presence is signaled -// FALSE(0) if physical presence is not signaled -LIB_EXPORT int -_plat__PhysicalPresenceAsserted( - void - ); - -//***_plat__Signal_PhysicalPresenceOn() -// Signal physical presence on -LIB_EXPORT void -_plat__Signal_PhysicalPresenceOn( - void - ); - -//***_plat__Signal_PhysicalPresenceOff() -// Signal physical presence off -LIB_EXPORT void -_plat__Signal_PhysicalPresenceOff( - void - ); - - -//*** _plat__ACT_UpdateCounter() -// This function is used to write the newValue for the counter. If an update is -// pending, then no update occurs and the function returns FALSE. If 'setSignaled' -// is TRUE, then the ACT signaled state is SET and if 'newValue' is 0, nothing -// is posted. -LIB_EXPORT int -_plat__ACT_UpdateCounter( - uint32_t act, // IN: ACT to update - uint32_t newValue // IN: the value to post -); - -//*** _plat__ACT_SetSignaled() -LIB_EXPORT void -_plat__ACT_SetSignaled( - uint32_t act, - int on -); - -//***_plat__ACT_Initialize() -// This function initializes the ACT hardware and data structures -LIB_EXPORT int -_plat__ACT_Initialize( - void -); - -//***_plat__ACT_EnableTicks() -// This enables and disables the processing of the once-per-second ticks. This should -// be turned off ('enable' = FALSE) by _TPM_Init and turned on ('enable' = TRUE) by -// TPM2_Startup() after all the initializations have completed. -LIB_EXPORT void -_plat__ACT_EnableTicks( - int enable -); - -//*** _plat__ACT_GetRemaining() -// This function returns the remaining time. If an update is pending, 'newValue' is -// returned. Otherwise, the current counter value is returned. Note that since the -// timers keep running, the returned value can get stale immediately. The actual count -// value will be no greater than the returned value. -LIB_EXPORT uint32_t -_plat__ACT_GetRemaining( - uint32_t act //IN: the ACT selector -); - -//*** _plat__ACT_GetSignaled() -LIB_EXPORT int -_plat__ACT_GetSignaled( - uint32_t act //IN: number of ACT to check -); - -//*** _plat__ACT_GetImplemented() -// This function tests to see if an ACT is implemented. It is a belt and suspenders -// function because the TPM should not be calling to manipulate an ACT that is not -// implemented. However, this could help the simulator code which doesn't necessarily -// know if an ACT is implemented or not. -LIB_EXPORT int -_plat__ACT_GetImplemented( - uint32_t act -); - -//** From RunCommand.c - -//***_plat__RunCommand() -// This version of RunCommand will set up a jum_buf and call ExecuteCommand(). If -// the command executes without failing, it will return and RunCommand will return. -// If there is a failure in the command, then _plat__Fail() is called and it will -// longjump back to RunCommand which will call ExecuteCommand again. However, this -// time, the TPM will be in failure mode so ExecuteCommand will simply build -// a failure response and return. -LIB_EXPORT void -_plat__RunCommand( - uint32_t requestSize, // IN: command buffer size - unsigned char *request, // IN: command buffer - uint32_t *responseSize, // IN/OUT: response buffer size - unsigned char **response // IN/OUT: response buffer - ); - -//***_plat__Fail() -// This is the platform depended failure exit for the TPM. -LIB_EXPORT NORETURN void -_plat__Fail( - void - ); - - -//** From Unique.c - -//** _plat__GetUnique() -// This function is used to access the platform-specific unique value. -// This function places the unique value in the provided buffer ('b') -// and returns the number of bytes transferred. The function will not -// copy more data than 'bSize'. -// NOTE: If a platform unique value has unequal distribution of uniqueness -// and 'bSize' is smaller than the size of the unique value, the 'bSize' -// portion with the most uniqueness should be returned. -LIB_EXPORT uint32_t -_plat__GetUnique( - uint32_t which, // authorities (0) or details - uint32_t bSize, // size of the buffer - unsigned char *b // output buffer - ); - -#endif // _PLATFORM_FP_H_ diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/RuntimeSupport.c b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/RuntimeSupport.c deleted file mode 100644 index 0998f050..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/RuntimeSupport.c +++ /dev/null @@ -1,84 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -/** - * Implementation of tolower() commonly found in ctype.h - * Returns an ASCII character, changing to lowercase if the character is - * in the range 'A'-'Z'. - */ - -int tolower (int c) -{ - if(c >= 'A' && c <= 'Z') - { - c -= ('A' - 'a'); - } - return c; -} - -int toupper (int c) -{ - if(c >= 'a' && c <= 'z') - { - c += ('A' - 'a'); - } - return c; -} - -int strncasecmp(const char *str1, const char *str2, size_t n) -{ - size_t i = 0; - for(i = 0; i < n && str1[i] && str2[i]; i++) - { - char delta = tolower(str1[i]) - tolower(str2[i]); - if (delta != 0) - { - return delta; - } - } - return 0; -} - -#ifdef CUSTOM_RAND_GENERATE_BLOCK -#include -int wolfRand(unsigned char* output, unsigned int sz) -{ - TEE_GenerateRandom((void *)output, (uint32_t)sz); - - return 0; -} -#endif \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/RuntimeSupport.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/RuntimeSupport.h deleted file mode 100644 index b0a851ee..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/RuntimeSupport.h +++ /dev/null @@ -1,93 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RUNTIMESUPPORT_H_ -#define _RUNTIMESUPPORT_H_ - -// OPTEE provides simple versions of these headers -#include -#include -#include -#include - -typedef uint64_t clock_t; - -#ifndef XMEMCPY -#define XMEMCPY(pdest, psrc, size) memcpy((pdest), (psrc), (size)) -#endif - -#ifndef XMEMSET -#define XMEMSET(pdest, value, size) memset((pdest), (value), (size)) -#endif - -#ifndef XSTRLEN -#define XSTRLEN(str) strlen((str)) -#endif - -#ifndef XSTRNCPY -#define XSTRNCPY(str1,str2,n) strncpy((str1),(str2),(n)) -#endif - -#ifndef XSTRNCASECMP -int strncasecmp(const char *str1, const char *str2, size_t n); -#define XSTRNCASECMP(str1,str2,n) strncasecmp((str1),(str2),(n)) -#endif - -#ifndef XSTRNCMP -#define XSTRNCMP(str1,str2,n) strncmp((str1),(str2),(n)) -#endif - -#ifndef XMEMCMP -#define XMEMCMP(str1,str2,n) memcmp((str1),(str2),(n)) -#endif - -#ifndef XTOUPPER -int toupper (int c); -#define XTOUPPER(str1) toupper((str1)) -#endif - -#ifndef XTOLOWER -int tolower (int c); -#define XTOLOWER(str1) tolower((str1)) -#endif - -#undef WC_NO_HASHDRBG -#define WC_NO_HASHDRBG - -/* Bypass P-RNG and use only HW RNG */ -extern int wolfRand(unsigned char* output, unsigned int sz); -#undef CUSTOM_RAND_GENERATE_BLOCK -#define CUSTOM_RAND_GENERATE_BLOCK wolfRand -#endif diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/TpmProfile.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/TpmProfile.h deleted file mode 100644 index 76ce2bb8..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/TpmProfile.h +++ /dev/null @@ -1,810 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 4, 2020 Time: 02:36:43PM - */ - -#ifndef _TPM_PROFILE_H_ -#define _TPM_PROFILE_H_ - -#include "RuntimeSupport.h" - -#include -#include -#include - -#undef MAX -#define MAX(a, b) ((a) > (b) ? (a) : (b)) - -#undef MIN -#define MIN(a, b) ((a) < (b) ? (a) : (b)) - -// Table 2:4 - Defines for Logic Values -#undef TRUE -#define TRUE 1 -#undef FALSE -#define FALSE 0 -#undef YES -#define YES 1 -#undef NO -#define NO 0 -#undef SET -#define SET 1 -#undef CLEAR -#define CLEAR 0 - -// Table 0:1 - Defines for Processor Values -#ifndef BIG_ENDIAN_TPM -#define BIG_ENDIAN_TPM NO -#endif -#ifndef LITTLE_ENDIAN_TPM -#define LITTLE_ENDIAN_TPM !BIG_ENDIAN_TPM -#endif -#ifndef MOST_SIGNIFICANT_BIT_0 -#define MOST_SIGNIFICANT_BIT_0 NO -#endif -#ifndef LEAST_SIGNIFICANT_BIT_0 -#define LEAST_SIGNIFICANT_BIT_0 !MOST_SIGNIFICANT_BIT_0 -#endif -#ifndef AUTO_ALIGN -#define AUTO_ALIGN NO -#endif - -// Table 0:4 - Defines for Implemented Curves -#ifndef ECC_NIST_P192 -#define ECC_NIST_P192 NO -#endif -#ifndef ECC_NIST_P224 -#define ECC_NIST_P224 NO -#endif -#ifndef ECC_NIST_P256 -#define ECC_NIST_P256 YES -#endif -#ifndef ECC_NIST_P384 -#define ECC_NIST_P384 YES -#endif -#ifndef ECC_NIST_P521 -#define ECC_NIST_P521 NO -#endif -#ifndef ECC_BN_P256 -#define ECC_BN_P256 YES -#endif -#ifndef ECC_BN_P638 -#define ECC_BN_P638 NO -#endif -#ifndef ECC_SM2_P256 -#define ECC_SM2_P256 YES -#endif - -// Table 0:6 - Defines for Implemented ACT -#ifndef RH_ACT_0 -#define RH_ACT_0 YES -#endif -#ifndef RH_ACT_1 -#define RH_ACT_1 NO -#endif -#ifndef RH_ACT_A -#define RH_ACT_A YES -#endif - -// Table 0:7 - Defines for Implementation Values -#ifdef USE_WOLFCRYPT -#define HASH_LIB Wolf -#define SYM_LIB Wolf -#define MATH_LIB Wolf -#else -#define HASH_LIB Ossl -#define SYM_LIB Ossl -#define MATH_LIB Ossl -#endif - -typedef UINT32 TPM_CC; - -// Table 0:7 - Defines for Implementation Values -#ifndef FIELD_UPGRADE_IMPLEMENTED -#define FIELD_UPGRADE_IMPLEMENTED NO -#endif -#ifdef USE_WOLFCRYPT -#define HASH_LIB Wolf -#define SYM_LIB Wolf -#define MATH_LIB Wolf -#else -#define HASH_LIB Ossl -#define SYM_LIB Ossl -#define MATH_LIB Ossl -#endif -#ifndef IMPLEMENTATION_PCR -#define IMPLEMENTATION_PCR 24 -#endif -#ifndef PLATFORM_PCR -#define PLATFORM_PCR 24 -#endif -#ifndef DRTM_PCR -#define DRTM_PCR 17 -#endif -#ifndef HCRTM_PCR -#define HCRTM_PCR 0 -#endif -#ifndef NUM_LOCALITIES -#define NUM_LOCALITIES 5 -#endif -#ifndef MAX_HANDLE_NUM -#define MAX_HANDLE_NUM 3 -#endif -#ifndef MAX_ACTIVE_SESSIONS -#define MAX_ACTIVE_SESSIONS 64 -#endif -#ifndef CONTEXT_SLOT -#define CONTEXT_SLOT UINT16 -#endif -#ifndef MAX_LOADED_SESSIONS -#define MAX_LOADED_SESSIONS 3 -#endif -#ifndef MAX_SESSION_NUM -#define MAX_SESSION_NUM 3 -#endif -#ifndef MAX_LOADED_OBJECTS -#define MAX_LOADED_OBJECTS 3 -#endif -#ifndef MIN_EVICT_OBJECTS -#define MIN_EVICT_OBJECTS 2 -#endif -#ifndef NUM_POLICY_PCR_GROUP -#define NUM_POLICY_PCR_GROUP 1 -#endif -#ifndef NUM_AUTHVALUE_PCR_GROUP -#define NUM_AUTHVALUE_PCR_GROUP 1 -#endif -#ifndef MAX_CONTEXT_SIZE -#define MAX_CONTEXT_SIZE 1344 -#endif -#ifndef MAX_DIGEST_BUFFER -#define MAX_DIGEST_BUFFER 1024 -#endif -#ifndef MAX_NV_INDEX_SIZE -#define MAX_NV_INDEX_SIZE 2048 -#endif -#ifndef MAX_NV_BUFFER_SIZE -#define MAX_NV_BUFFER_SIZE 1024 -#endif -#ifndef MAX_CAP_BUFFER -#define MAX_CAP_BUFFER 1024 -#endif -#ifndef NV_MEMORY_SIZE -#define NV_MEMORY_SIZE 16384 -#endif -#ifndef MIN_COUNTER_INDICES -#define MIN_COUNTER_INDICES 8 -#endif -#ifndef NUM_STATIC_PCR -#define NUM_STATIC_PCR 16 -#endif -#ifndef MAX_ALG_LIST_SIZE -#define MAX_ALG_LIST_SIZE 64 -#endif -#ifndef PRIMARY_SEED_SIZE -#define PRIMARY_SEED_SIZE 32 -#endif -#ifndef CONTEXT_ENCRYPT_ALGORITHM -#define CONTEXT_ENCRYPT_ALGORITHM AES -#endif -#ifndef NV_CLOCK_UPDATE_INTERVAL -#define NV_CLOCK_UPDATE_INTERVAL 12 -#endif -#ifndef NUM_POLICY_PCR -#define NUM_POLICY_PCR 1 -#endif -#ifndef MAX_COMMAND_SIZE -#define MAX_COMMAND_SIZE 4096 -#endif -#ifndef MAX_RESPONSE_SIZE -#define MAX_RESPONSE_SIZE 4096 -#endif -#ifndef ORDERLY_BITS -#define ORDERLY_BITS 8 -#endif -#ifndef MAX_SYM_DATA -#define MAX_SYM_DATA 128 -#endif -#ifndef MAX_RNG_ENTROPY_SIZE -#define MAX_RNG_ENTROPY_SIZE 64 -#endif -#ifndef RAM_INDEX_SPACE -#define RAM_INDEX_SPACE 512 -#endif -#ifndef RSA_DEFAULT_PUBLIC_EXPONENT -#define RSA_DEFAULT_PUBLIC_EXPONENT 0x00010001 -#endif -#ifndef ENABLE_PCR_NO_INCREMENT -#define ENABLE_PCR_NO_INCREMENT YES -#endif -#ifndef CRT_FORMAT_RSA -#define CRT_FORMAT_RSA YES -#endif -#ifndef VENDOR_COMMAND_COUNT -#define VENDOR_COMMAND_COUNT 0 -#endif -#ifndef MAX_VENDOR_BUFFER_SIZE -#define MAX_VENDOR_BUFFER_SIZE 1024 -#endif -#ifndef SIZE_OF_X509_SERIAL_NUMBER -#define SIZE_OF_X509_SERIAL_NUMBER 20 -#endif -#ifndef PRIVATE_VENDOR_SPECIFIC_BYTES -#define PRIVATE_VENDOR_SPECIFIC_BYTES RSA_PRIVATE_SIZE -#endif - -// Table 0:2 - Defines for Implemented Algorithms -#ifndef ALG_AES -#define ALG_AES ALG_YES -#endif -#ifndef ALG_CAMELLIA -#define ALG_CAMELLIA ALG_NO -#endif -#ifndef ALG_CBC -#define ALG_CBC ALG_YES -#endif -#ifndef ALG_CFB -#define ALG_CFB ALG_YES -#endif -#ifndef ALG_CMAC -#define ALG_CMAC ALG_YES -#endif -#ifndef ALG_CTR -#define ALG_CTR ALG_YES -#endif -#ifndef ALG_ECB -#define ALG_ECB ALG_YES -#endif -#ifndef ALG_ECC -#define ALG_ECC ALG_YES -#endif -#ifndef ALG_ECDAA -#define ALG_ECDAA (ALG_YES && ALG_ECC) -#endif -#ifndef ALG_ECDH -#define ALG_ECDH (ALG_YES && ALG_ECC) -#endif -#ifndef ALG_ECDSA -#define ALG_ECDSA (ALG_YES && ALG_ECC) -#endif -#ifndef ALG_ECMQV -#define ALG_ECMQV (ALG_NO && ALG_ECC) -#endif -#ifndef ALG_ECSCHNORR -#define ALG_ECSCHNORR (ALG_YES && ALG_ECC) -#endif -#ifndef ALG_HMAC -#define ALG_HMAC ALG_YES -#endif -#ifndef ALG_KDF1_SP800_108 -#define ALG_KDF1_SP800_108 ALG_YES -#endif -#ifndef ALG_KDF1_SP800_56A -#define ALG_KDF1_SP800_56A (ALG_YES && ALG_ECC) -#endif -#ifndef ALG_KDF2 -#define ALG_KDF2 ALG_NO -#endif -#ifndef ALG_KEYEDHASH -#define ALG_KEYEDHASH ALG_YES -#endif -#ifndef ALG_MGF1 -#define ALG_MGF1 ALG_YES -#endif -#ifndef ALG_OAEP -#define ALG_OAEP (ALG_YES && ALG_RSA) -#endif -#ifndef ALG_OFB -#define ALG_OFB ALG_YES -#endif -#ifndef ALG_RSA -#define ALG_RSA ALG_YES -#endif -#ifndef ALG_RSAES -#define ALG_RSAES (ALG_YES && ALG_RSA) -#endif -#ifndef ALG_RSAPSS -#define ALG_RSAPSS (ALG_YES && ALG_RSA) -#endif -#ifndef ALG_RSASSA -#define ALG_RSASSA (ALG_YES && ALG_RSA) -#endif -#ifndef ALG_SHA -#define ALG_SHA ALG_NO /* Not specified by vendor */ -#endif -#ifndef ALG_SHA1 -#define ALG_SHA1 ALG_YES -#endif -#ifndef ALG_SHA256 -#define ALG_SHA256 ALG_YES -#endif -#ifndef ALG_SHA384 -#define ALG_SHA384 ALG_YES -#endif -#ifndef ALG_SHA3_256 -#define ALG_SHA3_256 ALG_NO /* Not specified by vendor */ -#endif -#ifndef ALG_SHA3_384 -#define ALG_SHA3_384 ALG_NO /* Not specified by vendor */ -#endif -#ifndef ALG_SHA3_512 -#define ALG_SHA3_512 ALG_NO /* Not specified by vendor */ -#endif -#ifndef ALG_SHA512 -#define ALG_SHA512 ALG_NO -#endif -#ifndef ALG_SM2 -#define ALG_SM2 (ALG_NO && ALG_ECC) -#endif -#ifndef ALG_SM3_256 -#define ALG_SM3_256 ALG_NO -#endif -#ifndef ALG_SM4 -#define ALG_SM4 ALG_NO -#endif -#ifndef ALG_SYMCIPHER -#define ALG_SYMCIPHER ALG_YES -#endif -#ifndef ALG_TDES -#define ALG_TDES ALG_NO -#endif -#ifndef ALG_XOR -#define ALG_XOR ALG_YES -#endif - -// Table 1:3 - Defines for RSA Asymmetric Cipher Algorithm Constants -#ifndef RSA_1024 -#define RSA_1024 (ALG_RSA && YES) -#endif -#ifndef RSA_2048 -#define RSA_2048 (ALG_RSA && YES) -#endif -#ifndef RSA_3072 -#define RSA_3072 (ALG_RSA && NO) -#endif -#ifndef RSA_4096 -#define RSA_4096 (ALG_RSA && NO) -#endif -#ifndef RSA_16384 -#define RSA_16384 (ALG_RSA && NO) -#endif - -// Table 1:21 - Defines for AES Symmetric Cipher Algorithm Constants -#ifndef AES_128 -#define AES_128 (ALG_AES && YES) -#endif -#ifndef AES_192 -#define AES_192 (ALG_AES && NO) -#endif -#ifndef AES_256 -#define AES_256 (ALG_AES && YES) -#endif - -// Table 1:22 - Defines for SM4 Symmetric Cipher Algorithm Constants -#ifndef SM4_128 -#define SM4_128 (ALG_SM4 && YES) -#endif - -// Table 1:23 - Defines for CAMELLIA Symmetric Cipher Algorithm Constants -#ifndef CAMELLIA_128 -#define CAMELLIA_128 (ALG_CAMELLIA && YES) -#endif -#ifndef CAMELLIA_192 -#define CAMELLIA_192 (ALG_CAMELLIA && NO) -#endif -#ifndef CAMELLIA_256 -#define CAMELLIA_256 (ALG_CAMELLIA && YES) -#endif - -// Table 1:24 - Defines for TDES Symmetric Cipher Algorithm Constants -#ifndef TDES_128 -#define TDES_128 (ALG_TDES && YES) -#endif -#ifndef TDES_192 -#define TDES_192 (ALG_TDES && YES) -#endif - -// Table 0:5 - Defines for Implemented Commands -#ifndef CC_ACT_SetTimeout -#define CC_ACT_SetTimeout CC_YES -#endif -#ifndef CC_AC_GetCapability -#define CC_AC_GetCapability CC_YES -#endif -#ifndef CC_AC_Send -#define CC_AC_Send CC_YES -#endif -#ifndef CC_ActivateCredential -#define CC_ActivateCredential CC_YES -#endif -#ifndef CC_Certify -#define CC_Certify CC_YES -#endif -#ifndef CC_CertifyCreation -#define CC_CertifyCreation CC_YES -#endif -#ifndef CC_CertifyX509 -#define CC_CertifyX509 CC_YES -#endif -#ifndef CC_ChangeEPS -#define CC_ChangeEPS CC_YES -#endif -#ifndef CC_ChangePPS -#define CC_ChangePPS CC_YES -#endif -#ifndef CC_Clear -#define CC_Clear CC_YES -#endif -#ifndef CC_ClearControl -#define CC_ClearControl CC_YES -#endif -#ifndef CC_ClockRateAdjust -#define CC_ClockRateAdjust CC_YES -#endif -#ifndef CC_ClockSet -#define CC_ClockSet CC_YES -#endif -#ifndef CC_Commit -#define CC_Commit (CC_YES && ALG_ECC) -#endif -#ifndef CC_ContextLoad -#define CC_ContextLoad CC_YES -#endif -#ifndef CC_ContextSave -#define CC_ContextSave CC_YES -#endif -#ifndef CC_Create -#define CC_Create CC_YES -#endif -#ifndef CC_CreateLoaded -#define CC_CreateLoaded CC_YES -#endif -#ifndef CC_CreatePrimary -#define CC_CreatePrimary CC_YES -#endif -#ifndef CC_DictionaryAttackLockReset -#define CC_DictionaryAttackLockReset CC_YES -#endif -#ifndef CC_DictionaryAttackParameters -#define CC_DictionaryAttackParameters CC_YES -#endif -#ifndef CC_Duplicate -#define CC_Duplicate CC_YES -#endif -#ifndef CC_ECC_Decrypt -#define CC_ECC_Decrypt (CC_YES && ALG_ECC) -#endif -#ifndef CC_ECC_Encrypt -#define CC_ECC_Encrypt (CC_YES && ALG_ECC) -#endif -#ifndef CC_ECC_Parameters -#define CC_ECC_Parameters (CC_YES && ALG_ECC) -#endif -#ifndef CC_ECDH_KeyGen -#define CC_ECDH_KeyGen (CC_YES && ALG_ECC) -#endif -#ifndef CC_ECDH_ZGen -#define CC_ECDH_ZGen (CC_YES && ALG_ECC) -#endif -#ifndef CC_EC_Ephemeral -#define CC_EC_Ephemeral (CC_YES && ALG_ECC) -#endif -#ifndef CC_EncryptDecrypt -#define CC_EncryptDecrypt CC_YES -#endif -#ifndef CC_EncryptDecrypt2 -#define CC_EncryptDecrypt2 CC_YES -#endif -#ifndef CC_EventSequenceComplete -#define CC_EventSequenceComplete CC_YES -#endif -#ifndef CC_EvictControl -#define CC_EvictControl CC_YES -#endif -#ifndef CC_FieldUpgradeData -#define CC_FieldUpgradeData CC_NO -#endif -#ifndef CC_FieldUpgradeStart -#define CC_FieldUpgradeStart CC_NO -#endif -#ifndef CC_FirmwareRead -#define CC_FirmwareRead CC_NO -#endif -#ifndef CC_FlushContext -#define CC_FlushContext CC_YES -#endif -#ifndef CC_GetCapability -#define CC_GetCapability CC_YES -#endif -#ifndef CC_GetCommandAuditDigest -#define CC_GetCommandAuditDigest CC_YES -#endif -#ifndef CC_GetRandom -#define CC_GetRandom CC_YES -#endif -#ifndef CC_GetSessionAuditDigest -#define CC_GetSessionAuditDigest CC_YES -#endif -#ifndef CC_GetTestResult -#define CC_GetTestResult CC_YES -#endif -#ifndef CC_GetTime -#define CC_GetTime CC_YES -#endif -#ifndef CC_HMAC -#define CC_HMAC (CC_YES && !ALG_CMAC) -#endif -#ifndef CC_HMAC_Start -#define CC_HMAC_Start (CC_YES && !ALG_CMAC) -#endif -#ifndef CC_Hash -#define CC_Hash CC_YES -#endif -#ifndef CC_HashSequenceStart -#define CC_HashSequenceStart CC_YES -#endif -#ifndef CC_HierarchyChangeAuth -#define CC_HierarchyChangeAuth CC_YES -#endif -#ifndef CC_HierarchyControl -#define CC_HierarchyControl CC_YES -#endif -#ifndef CC_Import -#define CC_Import CC_YES -#endif -#ifndef CC_IncrementalSelfTest -#define CC_IncrementalSelfTest CC_YES -#endif -#ifndef CC_Load -#define CC_Load CC_YES -#endif -#ifndef CC_LoadExternal -#define CC_LoadExternal CC_YES -#endif -#ifndef CC_MAC -#define CC_MAC (CC_YES && ALG_CMAC) -#endif -#ifndef CC_MAC_Start -#define CC_MAC_Start (CC_YES && ALG_CMAC) -#endif -#ifndef CC_MakeCredential -#define CC_MakeCredential CC_YES -#endif -#ifndef CC_NV_Certify -#define CC_NV_Certify CC_YES -#endif -#ifndef CC_NV_ChangeAuth -#define CC_NV_ChangeAuth CC_YES -#endif -#ifndef CC_NV_DefineSpace -#define CC_NV_DefineSpace CC_YES -#endif -#ifndef CC_NV_Extend -#define CC_NV_Extend CC_YES -#endif -#ifndef CC_NV_GlobalWriteLock -#define CC_NV_GlobalWriteLock CC_YES -#endif -#ifndef CC_NV_Increment -#define CC_NV_Increment CC_YES -#endif -#ifndef CC_NV_Read -#define CC_NV_Read CC_YES -#endif -#ifndef CC_NV_ReadLock -#define CC_NV_ReadLock CC_YES -#endif -#ifndef CC_NV_ReadPublic -#define CC_NV_ReadPublic CC_YES -#endif -#ifndef CC_NV_SetBits -#define CC_NV_SetBits CC_YES -#endif -#ifndef CC_NV_UndefineSpace -#define CC_NV_UndefineSpace CC_YES -#endif -#ifndef CC_NV_UndefineSpaceSpecial -#define CC_NV_UndefineSpaceSpecial CC_YES -#endif -#ifndef CC_NV_Write -#define CC_NV_Write CC_YES -#endif -#ifndef CC_NV_WriteLock -#define CC_NV_WriteLock CC_YES -#endif -#ifndef CC_ObjectChangeAuth -#define CC_ObjectChangeAuth CC_YES -#endif -#ifndef CC_PCR_Allocate -#define CC_PCR_Allocate CC_YES -#endif -#ifndef CC_PCR_Event -#define CC_PCR_Event CC_YES -#endif -#ifndef CC_PCR_Extend -#define CC_PCR_Extend CC_YES -#endif -#ifndef CC_PCR_Read -#define CC_PCR_Read CC_YES -#endif -#ifndef CC_PCR_Reset -#define CC_PCR_Reset CC_YES -#endif -#ifndef CC_PCR_SetAuthPolicy -#define CC_PCR_SetAuthPolicy CC_YES -#endif -#ifndef CC_PCR_SetAuthValue -#define CC_PCR_SetAuthValue CC_YES -#endif -#ifndef CC_PP_Commands -#define CC_PP_Commands CC_YES -#endif -#ifndef CC_PolicyAuthValue -#define CC_PolicyAuthValue CC_YES -#endif -#ifndef CC_PolicyAuthorize -#define CC_PolicyAuthorize CC_YES -#endif -#ifndef CC_PolicyAuthorizeNV -#define CC_PolicyAuthorizeNV CC_YES -#endif -#ifndef CC_PolicyCommandCode -#define CC_PolicyCommandCode CC_YES -#endif -#ifndef CC_PolicyCounterTimer -#define CC_PolicyCounterTimer CC_YES -#endif -#ifndef CC_PolicyCpHash -#define CC_PolicyCpHash CC_YES -#endif -#ifndef CC_PolicyDuplicationSelect -#define CC_PolicyDuplicationSelect CC_YES -#endif -#ifndef CC_PolicyGetDigest -#define CC_PolicyGetDigest CC_YES -#endif -#ifndef CC_PolicyLocality -#define CC_PolicyLocality CC_YES -#endif -#ifndef CC_PolicyNV -#define CC_PolicyNV CC_YES -#endif -#ifndef CC_PolicyNameHash -#define CC_PolicyNameHash CC_YES -#endif -#ifndef CC_PolicyNvWritten -#define CC_PolicyNvWritten CC_YES -#endif -#ifndef CC_PolicyOR -#define CC_PolicyOR CC_YES -#endif -#ifndef CC_PolicyPCR -#define CC_PolicyPCR CC_YES -#endif -#ifndef CC_PolicyPassword -#define CC_PolicyPassword CC_YES -#endif -#ifndef CC_PolicyPhysicalPresence -#define CC_PolicyPhysicalPresence CC_YES -#endif -#ifndef CC_PolicyRestart -#define CC_PolicyRestart CC_YES -#endif -#ifndef CC_PolicySecret -#define CC_PolicySecret CC_YES -#endif -#ifndef CC_PolicySigned -#define CC_PolicySigned CC_YES -#endif -#ifndef CC_PolicyTemplate -#define CC_PolicyTemplate CC_YES -#endif -#ifndef CC_PolicyTicket -#define CC_PolicyTicket CC_YES -#endif -#ifndef CC_Policy_AC_SendSelect -#define CC_Policy_AC_SendSelect CC_YES -#endif -#ifndef CC_Quote -#define CC_Quote CC_YES -#endif -#ifndef CC_RSA_Decrypt -#define CC_RSA_Decrypt (CC_YES && ALG_RSA) -#endif -#ifndef CC_RSA_Encrypt -#define CC_RSA_Encrypt (CC_YES && ALG_RSA) -#endif -#ifndef CC_ReadClock -#define CC_ReadClock CC_YES -#endif -#ifndef CC_ReadPublic -#define CC_ReadPublic CC_YES -#endif -#ifndef CC_Rewrap -#define CC_Rewrap CC_YES -#endif -#ifndef CC_SelfTest -#define CC_SelfTest CC_YES -#endif -#ifndef CC_SequenceComplete -#define CC_SequenceComplete CC_YES -#endif -#ifndef CC_SequenceUpdate -#define CC_SequenceUpdate CC_YES -#endif -#ifndef CC_SetAlgorithmSet -#define CC_SetAlgorithmSet CC_YES -#endif -#ifndef CC_SetCommandCodeAuditStatus -#define CC_SetCommandCodeAuditStatus CC_YES -#endif -#ifndef CC_SetPrimaryPolicy -#define CC_SetPrimaryPolicy CC_YES -#endif -#ifndef CC_Shutdown -#define CC_Shutdown CC_YES -#endif -#ifndef CC_Sign -#define CC_Sign CC_YES -#endif -#ifndef CC_StartAuthSession -#define CC_StartAuthSession CC_YES -#endif -#ifndef CC_Startup -#define CC_Startup CC_YES -#endif -#ifndef CC_StirRandom -#define CC_StirRandom CC_YES -#endif -#ifndef CC_TestParms -#define CC_TestParms CC_YES -#endif -#ifndef CC_Unseal -#define CC_Unseal CC_YES -#endif -#ifndef CC_Vendor_TCG_Test -#define CC_Vendor_TCG_Test CC_YES -#endif -#ifndef CC_VerifySignature -#define CC_VerifySignature CC_YES -#endif -#ifndef CC_ZGen_2Phase -#define CC_ZGen_2Phase (CC_YES && ALG_ECC) -#endif - - -#endif // _TPM_PROFILE_H_ diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/TpmSal.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/TpmSal.h deleted file mode 100644 index 020ac0d1..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/TpmSal.h +++ /dev/null @@ -1,115 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/*** -* TpmSal.h provides a set of #defines that allow SymCrypt to be built -* in VS. -* -****/ - -#ifndef _TPM_SAL_H_ -#define _TPM_SAL_H_ - -#ifndef _Out_writes_bytes_ - -#define _Out_writes_( cbData ) -#define _Out_writes_bytes_( cbData ) -#define _Out_writes_opt_( cbData ) -#define _Out_writes_to_(n, c) -#define _In_reads_( cbBytes ) -#define _In_reads_opt_( cbAuthData ) -#define _In_reads_bytes_(size) -#define _Inout_updates_( nStates ) -#define _Inout_updates_bytes_(size) -#define _Field_size_( size ) -#define _Field_range_( min, max ) -#define _Writable_elements_(c) -#define _Ret_writes_bytes_to_(n, c) - -#define _Analysis_assume_(x) -#define _Analysis_noreturn_ - -#define _Use_decl_annotations_ - -#define __success(x) - -#define __assume -#define __analysis_assume -#define _In_ -#define _Out_ -#define __in -#define __in_opt -#define __in_bcount(x) -#define __in_bcount_opt(x) -#define __in_ecount(x) -#define __in_ecount_opt(x) -#define __in_xcount(x) -#define __out -#define __out_ecount(x) -#define __out_ecount_opt(x) -#define __out_ecount_full(x) -#define __out_ecount_part(x, y) -#define __out_bcount(x) -#define __out_bcount_part_opt(x, y) -#define __out_bcount_full(x) -#define __out_xcount(x) -#define __out_xcount_opt(x) -#define __out_ecount_part(x, y) -#define __out_ecount_part_opt(x, y) -#define __out_opt -#define __inout_ecount(x) -#define __inout_bcount(x) -#define __bound -#define __inout -#define __inout_opt -#define __inout_ecount_opt(x) -#define __deref_out_ecount(x) -#define __deref_opt_out_ecount(x) -#define __field_ecount(x) -#define _Post_invalid_ -#define _Pre_maybenull_ -#define __checkReturn -#define _In_bytecount_(x) - -#endif /* no SAL macros defined */ - -#ifndef _Interlocked_operand_ - -#define _Interlocked_operand_ - -#endif - - -#endif diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/VendorString.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/VendorString.h deleted file mode 100644 index b2b798ef..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/VendorString.h +++ /dev/null @@ -1,93 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _VENDOR_STRING_H -#define _VENDOR_STRING_H - -// Define up to 4-byte values for MANUFACTURER. This value defines the response -// for TPM_PT_MANUFACTURER in TPM2_GetCapability. -// The following line should be un-commented and a vendor specific string -// should be provided here. -#define MANUFACTURER "MSFT" - -// The following #if macro may be deleted after a proper MANUFACTURER is provided. -#ifndef MANUFACTURER -#error MANUFACTURER is not provided. \ -Please modify include\VendorString.h to provide a specific \ -manufacturer name. -#endif - -// Define up to 4, 4-byte values. The values must each be 4 bytes long and the last -// value used may contain trailing zeros. -// These values define the response for TPM_PT_VENDOR_STRING_(1-4) -// in TPM2_GetCapability. -// The following line should be un-commented and a vendor specific string -// should be provided here. -// The vendor strings 2-4 may also be defined as appropriately. -#define VENDOR_STRING_1 "SSE " -#define VENDOR_STRING_2 "fTPM" -//#define VENDOR_STRING_3 -//#define VENDOR_STRING_4 - -// The following #if macro may be deleted after a proper VENDOR_STRING_1 -// is provided. -#ifndef VENDOR_STRING_1 -#error VENDOR_STRING_1 is not provided. \ -Please modify include\VendorString.h to provide a vendor specific \ -string. -#endif - -// the more significant 32-bits of a vendor-specific value -// indicating the version of the firmware -// The following line should be un-commented and a vendor-specific firmware V1 -// should be provided here. -// The FIRMWARE_V2 may also be defined as appropriate. - -//Date of last update: (0xYYYMMDD) -#define FIRMWARE_V1 (0x20180710) -// the less significant 32-bits of a vendor-specific value -// indicating the version of the firmware - -//Time of last update: (0x00HHMMSS) -#define FIRMWARE_V2 (0x00105300) - -// The following #if macro may be deleted after a proper FIRMWARE_V1 is provided. -#ifndef FIRMWARE_V1 -#error FIRMWARE_V1 is not provided. \ -Please modify include\VendorString.h to provide a vendor-specific firmware \ -version -#endif - -#endif diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/bool.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/bool.h deleted file mode 100644 index 60b55ee2..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/reference/include/bool.h +++ /dev/null @@ -1,51 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _BOOL_H -#define _BOOL_H - -#if defined(TRUE) -#undef TRUE -#endif - -#if defined FALSE -#undef FALSE -#endif - -typedef int BOOL; -#define FALSE ((BOOL)0) -#define TRUE ((BOOL)1) - -#endif diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/sub.mk b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/sub.mk deleted file mode 100644 index 2d9ba241..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/sub.mk +++ /dev/null @@ -1,77 +0,0 @@ -WARNS := 0 -NOWERROR := 0 -CFG_TA_MEASURED_BOOT ?= n -CFG_TA_DEBUG ?= n -CFG_TEE_TA_LOG_LEVEL ?= 0 -CFG_TA_EVENT_LOG_SIZE ?= 1024 - -cflags-y += -DTHIRTY_TWO_BIT \ - -DCFG_TEE_TA_LOG_LEVEL=$(CFG_TEE_TA_LOG_LEVEL) \ - -D_ARM_ \ - -w \ - -Wno-strict-prototypes \ - -mcpu=$(TA_CPU) \ - -fstack-protector \ - -Wstack-protector - -ifeq ($(CFG_TA_MEASURED_BOOT),y) -cflags-y += -DEVENT_LOG_SIZE=$(CFG_TA_EVENT_LOG_SIZE) -cflags-y += -DMEASURED_BOOT -endif - -ifeq ($(CFG_ARM64_ta_arm64),y) -cflags-y += -mstrict-align -else -cflags-y += -mno-unaligned-access -endif - -ifeq ($(CFG_TA_DEBUG),y) -cflags-y += -DfTPMDebug=1 -cflags-y += -DDBG=1 -cflags-y += -O0 -cflags-y += -DDEBUG -cflags-y += -DTRACE_LEVEL=$(CFG_TEE_TA_LOG_LEVEL) -else -cflags-y += -Os -cflags-y += -DNDEBUG -endif - -# -# Link the required external code into the libraries folder. OP-TEE build -# does not work well when accessing anything below the root directory. Use -# symlinks to trick it. -# -all: create_lib_symlinks -clean: clean_lib_symlinks - -subdirs-y += lib - -global-incdirs-y += include -global-incdirs-y += include/Wolf -global-incdirs-y += reference/include -global-incdirs-y += platform/include - -srcs-y += platform/AdminPPI.c -srcs-y += platform/Cancel.c -srcs-y += platform/Clock.c -srcs-y += platform/Entropy.c -srcs-y += platform/LocalityPlat.c -srcs-y += platform/NvAdmin.c -srcs-y += platform/NVMem.c -srcs-y += platform/PowerPlat.c -srcs-y += platform/PlatformData.c -srcs-y += platform/PPPlat.c -srcs-y += platform/RunCommand.c -srcs-y += platform/Unique.c -srcs-y += platform/EPS.c -srcs-y += platform/PlatformACT.c -srcs-y += reference/RuntimeSupport.c -srcs-y += platform/fTPM_helpers.c - -srcs-y += fTPM.c - -ifeq ($(CFG_TA_MEASURED_BOOT),y) -# Support for Trusted Firmware Measured Boot. -srcs-y += platform/fTPM_event_log.c -srcs-y += platform/EventLogPrint.c -endif diff --git a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/user_ta_header_defines.h b/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/user_ta_header_defines.h deleted file mode 100644 index 92c33c16..00000000 --- a/Samples/ARM32-FirmwareTPM/optee_ta/fTPM/user_ta_header_defines.h +++ /dev/null @@ -1,56 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * The name of this file must not be modified - */ - -#ifndef USER_TA_HEADER_DEFINES_H -#define USER_TA_HEADER_DEFINES_H - -#include - -#define TA_UUID TA_FTPM_UUID - -#define TA_FLAGS (TA_FLAG_SINGLE_INSTANCE | TA_FLAG_INSTANCE_KEEP_ALIVE) -#define TA_STACK_SIZE (64 * 1024) -#define TA_DATA_SIZE (32 * 1024) - -#define TA_CURRENT_TA_EXT_PROPERTIES \ - { "gp.ta.description", USER_TA_PROP_TYPE_STRING, \ - "fTPM TA" }, \ - { "gp.ta.version", USER_TA_PROP_TYPE_U32, &(const uint32_t){ 0x0010 } } - -#endif /*USER_TA_HEADER_DEFINES_H*/ diff --git a/Samples/ARM32-FirmwareTPM/ta_prod_signing_scripts/README.md b/Samples/ARM32-FirmwareTPM/ta_prod_signing_scripts/README.md deleted file mode 100644 index 4d992b9a..00000000 --- a/Samples/ARM32-FirmwareTPM/ta_prod_signing_scripts/README.md +++ /dev/null @@ -1,17 +0,0 @@ -# Microsoft Production TA Signing Scripts - -##### The Python scripts `generate_digest.py` and `stitch_ta.py` are used to production sign Microsoft-built TAs. - -## Usage - -1. Compile the TAs as usual. -2. Take the `*.stripped.elf` file (TA with no signature), and run the following Python script. -This script will generate the digest (hash) for the unsigned TA. The digest will be stored in `6b51f84e-a93d-456c-ab0e29ad8f264a47.dig` in the same folder as the TA. The digest will be in ASCII Base64 format. -``` -c:\Python34\python.exe "generate_digest.py" --in "6b51f84e-a93d-456c-ab0e29ad8f264a47.stripped.elf" -``` -3. Send the `*.dig` file to the Security team for them to sign. They will return a `*.dig.signed` file. -4. Run the following Python script to generate the final Production-signed TA (`6b51f84e-a93d-456c-ab0e29ad8f264a47_signed.ta`): -``` -c:\Python34\python.exe "stitch_ta.py" --in "6b51f84e-a93d-456c-ab0e29ad8f264a47.stripped.elf" --dig "6b51f84e-a93d-456c-ab0e29ad8f264a47.dig" --sig "6b51f84e-a93d-456c-ab0e29ad8f264a47.dig.signed" --out "6b51f84e-a93d-456c-ab0e29ad8f264a47_signed.ta" -``` \ No newline at end of file diff --git a/Samples/ARM32-FirmwareTPM/ta_prod_signing_scripts/generate_digest.py b/Samples/ARM32-FirmwareTPM/ta_prod_signing_scripts/generate_digest.py deleted file mode 100644 index 18dbd1cd..00000000 --- a/Samples/ARM32-FirmwareTPM/ta_prod_signing_scripts/generate_digest.py +++ /dev/null @@ -1,90 +0,0 @@ -#!/usr/bin/env python -# -# Copyright (c) 2015, Linaro Limited -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# -# 1. Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# 2. Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation -# and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# - -def get_args(): - from argparse import ArgumentParser - - parser = ArgumentParser() - parser.add_argument('--in', required=True, dest='inf', \ - help='Name of input file (unsigned TA)') - return parser.parse_args() - -def assert_file_exists(fname): - import os.path - - if(os.path.isfile(fname)): - return True - else: - raise FileNotFoundError('File ' + fname + ' was not found') - -def main(): - from Crypto.Signature import PKCS1_v1_5 - from Crypto.Hash import SHA256 - from Crypto.PublicKey import RSA - import struct, base64, os.path, sys - - args = get_args() - - assert_file_exists(args.inf) - - # Read input file (unsigned TA) - f = open(args.inf, 'rb') - img = f.read() - f.close() - - h = SHA256.new() - - digest_len = h.digest_size - #We plan to use RSA 2048 bit keys so signature is 256 bytes - sig_len = 256 #len(signer.sign(h)) - img_size = len(img) - - magic = 0x4f545348 # SHDR_MAGIC - img_type = 0 # SHDR_TA - algo = 0x70004830 # TEE_ALG_RSASSA_PKCS1_V1_5_SHA256 - shdr = struct.pack(' - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/Samples/Nucleo-TPM/L476RG/.mxproject b/Samples/Nucleo-TPM/L476RG/.mxproject deleted file mode 100644 index c5963d68..00000000 --- a/Samples/Nucleo-TPM/L476RG/.mxproject +++ /dev/null @@ -1,14 +0,0 @@ -[PreviousGenFiles] -HeaderPath=D:/VS/brianTPM/Samples/Nucleo-TPM/L476RG/Inc -HeaderFiles=usb_device.h;usbd_conf.h;usbd_desc.h;usbd_cdc_if.h;stm32l4xx_it.h;stm32l4xx_hal_conf.h;main.h; -SourcePath=D:/VS/brianTPM/Samples/Nucleo-TPM/L476RG/Src -SourceFiles=usb_device.c;usbd_conf.c;usbd_desc.c;usbd_cdc_if.c;stm32l4xx_it.c;stm32l4xx_hal_msp.c;main.c; - -[PreviousLibFiles] -LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rng.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; - -[PreviousUsedTStudioFiles] -SourceFiles=..\Src\main.c;..\Src\usb_device.c;..\Src\usbd_conf.c;..\Src\usbd_desc.c;..\Src\usbd_cdc_if.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;../\Src/system_stm32l4xx.c;../Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;null;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c; -HeaderPath=..\Drivers\STM32L4xx_HAL_Driver\Inc;..\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;..\Middlewares\ST\STM32_USB_Device_Library\Core\Inc;..\Middlewares\ST\STM32_USB_Device_Library\Class\CDC\Inc;..\Drivers\CMSIS\Device\ST\STM32L4xx\Include;..\Drivers\CMSIS\Include;..\Inc; -CDefines=__weak:__attribute__((weak));__packed:__attribute__((__packed__)); - diff --git a/Samples/Nucleo-TPM/L476RG/.project b/Samples/Nucleo-TPM/L476RG/.project deleted file mode 100644 index faceb254..00000000 --- a/Samples/Nucleo-TPM/L476RG/.project +++ /dev/null @@ -1,155 +0,0 @@ - - - Nucleo-L476RG - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?children? - ?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\|| - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.buildLocation - ${workspace_loc:/STM32100B-EVAL/Debug} - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - Inc/Platform - 2 - PARENT-1-PROJECT_LOC/Shared/Platform/include - - - Inc/TPMCmd - 2 - PARENT-3-PROJECT_LOC/TPMCmd/tpm/include - - - Inc/TPMDevice - 2 - PARENT-1-PROJECT_LOC/Shared/TPMDevice/include - - - Middlewares/Platform - 2 - PARENT-1-PROJECT_LOC/Shared/Platform/src - - - Middlewares/TPMCmd - 2 - PARENT-3-PROJECT_LOC/TPMCmd/tpm/src - - - Middlewares/TPMDevice - 2 - PARENT-1-PROJECT_LOC/Shared/TPMDevice/src - - - Src/syscalls.c - 1 - PARENT-1-PROJECT_LOC../Shared/syscalls.c - - - Middlewares/WolfCypt/aes.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/aes.c - - - Middlewares/WolfCypt/ecc.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/ecc.c - - - Middlewares/WolfCypt/integer.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/integer.c - - - Middlewares/WolfCypt/memory.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/memory.c - - - Middlewares/WolfCypt/sha.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/sha.c - - - Middlewares/WolfCypt/sha256.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/sha256.c - - - Middlewares/WolfCypt/sha512.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/sha512.c - - - Middlewares/WolfCypt/tfm.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/tfm.c - - - Middlewares/WolfCypt/wolfmath.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/wolfmath.c - - - diff --git a/Samples/Nucleo-TPM/L476RG/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/Samples/Nucleo-TPM/L476RG/.settings/com.atollic.truestudio.debug.hardware_device.prefs deleted file mode 100644 index f3ef444e..00000000 --- a/Samples/Nucleo-TPM/L476RG/.settings/com.atollic.truestudio.debug.hardware_device.prefs +++ /dev/null @@ -1,11 +0,0 @@ -BOARD=None -CODE_LOCATION=FLASH -ENDIAN=Little-endian -MCU=STM32L476RG -MCU_VENDOR=STMicroelectronics -MODEL=Lite -PROBE=ST-LINK -PROJECT_FORMAT_VERSION=2 -TARGET=ARM\u00AE -VERSION=4.1.0 -eclipse.preferences.version=1 diff --git a/Samples/Nucleo-TPM/L476RG/.settings/language.settings.xml b/Samples/Nucleo-TPM/L476RG/.settings/language.settings.xml deleted file mode 100644 index 175a2039..00000000 --- a/Samples/Nucleo-TPM/L476RG/.settings/language.settings.xml +++ /dev/null @@ -1,20 +0,0 @@ - - - - - - - - - - - - - - - - - - - - diff --git a/Samples/Nucleo-TPM/L476RG/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/Samples/Nucleo-TPM/L476RG/.settings/org.eclipse.cdt.managedbuilder.core.prefs deleted file mode 100644 index 66eb6736..00000000 --- a/Samples/Nucleo-TPM/L476RG/.settings/org.eclipse.cdt.managedbuilder.core.prefs +++ /dev/null @@ -1,11 +0,0 @@ -eclipse.preferences.version=1 -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/CPATH/delimiter=; -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/CPATH/operation=remove -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/C_INCLUDE_PATH/delimiter=; -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/C_INCLUDE_PATH/operation=remove -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/append=true -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/appendContributed=true -environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/LIBRARY_PATH/delimiter=; -environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/LIBRARY_PATH/operation=remove -environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/append=true -environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/appendContributed=true diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h deleted file mode 100644 index 5e8e62d7..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l476xx.h +++ /dev/null @@ -1,18537 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l476xx.h - * @author MCD Application Team - * @brief CMSIS STM32L476xx Device Peripheral Access Layer Header File. - * - * This file contains: - * - Data structures and the address mapping for all peripherals - * - Peripheral's registers declarations and bits definition - * - Macros to access peripherals registers hardware - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS_Device - * @{ - */ - -/** @addtogroup stm32l476xx - * @{ - */ - -#ifndef __STM32L476xx_H -#define __STM32L476xx_H - -#ifdef __cplusplus - extern "C" { -#endif /* __cplusplus */ - -/** @addtogroup Configuration_section_for_CMSIS - * @{ - */ - -/** - * @brief Configuration of the Cortex-M4 Processor and Core Peripherals - */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32L4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32L4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ - -/** - * @} - */ - -/** @addtogroup Peripheral_interrupt_number_definition - * @{ - */ - -/** - * @brief STM32L4XX Interrupt Number Definition, according to the selected device - * in @ref Library_configuration_section - */ -typedef enum -{ -/****** Cortex-M4 Processor Exceptions Numbers ****************************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Cortex-M4 Non Maskable Interrupt */ - HardFault_IRQn = -13, /*!< 3 Cortex-M4 Hard Fault Interrupt */ - MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */ - BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M4 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /*!< 12 Cortex-M4 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M4 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M4 System Tick Interrupt */ -/****** STM32 specific Interrupt Numbers **********************************************************************/ - WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */ - PVD_PVM_IRQn = 1, /*!< PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection Interrupts */ - TAMP_STAMP_IRQn = 2, /*!< Tamper and TimeStamp interrupts through the EXTI line */ - RTC_WKUP_IRQn = 3, /*!< RTC Wakeup interrupt through the EXTI line */ - FLASH_IRQn = 4, /*!< FLASH global Interrupt */ - RCC_IRQn = 5, /*!< RCC global Interrupt */ - EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */ - EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */ - EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */ - EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */ - EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */ - DMA1_Channel1_IRQn = 11, /*!< DMA1 Channel 1 global Interrupt */ - DMA1_Channel2_IRQn = 12, /*!< DMA1 Channel 2 global Interrupt */ - DMA1_Channel3_IRQn = 13, /*!< DMA1 Channel 3 global Interrupt */ - DMA1_Channel4_IRQn = 14, /*!< DMA1 Channel 4 global Interrupt */ - DMA1_Channel5_IRQn = 15, /*!< DMA1 Channel 5 global Interrupt */ - DMA1_Channel6_IRQn = 16, /*!< DMA1 Channel 6 global Interrupt */ - DMA1_Channel7_IRQn = 17, /*!< DMA1 Channel 7 global Interrupt */ - ADC1_2_IRQn = 18, /*!< ADC1, ADC2 SAR global Interrupts */ - CAN1_TX_IRQn = 19, /*!< CAN1 TX Interrupt */ - CAN1_RX0_IRQn = 20, /*!< CAN1 RX0 Interrupt */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break interrupt and TIM15 global interrupt */ - TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update Interrupt and TIM16 global interrupt */ - TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt and TIM17 global interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTC_Alarm_IRQn = 41, /*!< RTC Alarm (A and B) through EXTI Line Interrupt */ - DFSDM1_FLT3_IRQn = 42, /*!< DFSDM1 Filter 3 global Interrupt */ - TIM8_BRK_IRQn = 43, /*!< TIM8 Break Interrupt */ - TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */ - TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt */ - TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ - ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ - FMC_IRQn = 48, /*!< FMC global Interrupt */ - SDMMC1_IRQn = 49, /*!< SDMMC1 global Interrupt */ - TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ - SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ - UART4_IRQn = 52, /*!< UART4 global Interrupt */ - UART5_IRQn = 53, /*!< UART5 global Interrupt */ - TIM6_DAC_IRQn = 54, /*!< TIM6 global and DAC1&2 underrun error interrupts */ - TIM7_IRQn = 55, /*!< TIM7 global interrupt */ - DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ - DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ - DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ - DMA2_Channel4_IRQn = 59, /*!< DMA2 Channel 4 global Interrupt */ - DMA2_Channel5_IRQn = 60, /*!< DMA2 Channel 5 global Interrupt */ - DFSDM1_FLT0_IRQn = 61, /*!< DFSDM1 Filter 0 global Interrupt */ - DFSDM1_FLT1_IRQn = 62, /*!< DFSDM1 Filter 1 global Interrupt */ - DFSDM1_FLT2_IRQn = 63, /*!< DFSDM1 Filter 2 global Interrupt */ - COMP_IRQn = 64, /*!< COMP1 and COMP2 Interrupts */ - LPTIM1_IRQn = 65, /*!< LP TIM1 interrupt */ - LPTIM2_IRQn = 66, /*!< LP TIM2 interrupt */ - OTG_FS_IRQn = 67, /*!< USB OTG FS global Interrupt */ - DMA2_Channel6_IRQn = 68, /*!< DMA2 Channel 6 global interrupt */ - DMA2_Channel7_IRQn = 69, /*!< DMA2 Channel 7 global interrupt */ - LPUART1_IRQn = 70, /*!< LP UART1 interrupt */ - QUADSPI_IRQn = 71, /*!< Quad SPI global interrupt */ - I2C3_EV_IRQn = 72, /*!< I2C3 event interrupt */ - I2C3_ER_IRQn = 73, /*!< I2C3 error interrupt */ - SAI1_IRQn = 74, /*!< Serial Audio Interface 1 global interrupt */ - SAI2_IRQn = 75, /*!< Serial Audio Interface 2 global interrupt */ - SWPMI1_IRQn = 76, /*!< Serial Wire Interface 1 global interrupt */ - TSC_IRQn = 77, /*!< Touch Sense Controller global interrupt */ - LCD_IRQn = 78, /*!< LCD global interrupt */ - RNG_IRQn = 80, /*!< RNG global interrupt */ - FPU_IRQn = 81 /*!< FPU global interrupt */ -} IRQn_Type; - -/** - * @} - */ - -#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ -#include "system_stm32l4xx.h" -#include - -/** @addtogroup Peripheral_registers_structures - * @{ - */ - -/** - * @brief Analog to Digital Converter - */ - -typedef struct -{ - __IO uint32_t ISR; /*!< ADC interrupt and status register, Address offset: 0x00 */ - __IO uint32_t IER; /*!< ADC interrupt enable register, Address offset: 0x04 */ - __IO uint32_t CR; /*!< ADC control register, Address offset: 0x08 */ - __IO uint32_t CFGR; /*!< ADC configuration register 1, Address offset: 0x0C */ - __IO uint32_t CFGR2; /*!< ADC configuration register 2, Address offset: 0x10 */ - __IO uint32_t SMPR1; /*!< ADC sampling time register 1, Address offset: 0x14 */ - __IO uint32_t SMPR2; /*!< ADC sampling time register 2, Address offset: 0x18 */ - uint32_t RESERVED1; /*!< Reserved, 0x1C */ - __IO uint32_t TR1; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x20 */ - __IO uint32_t TR2; /*!< ADC analog watchdog 2 threshold register, Address offset: 0x24 */ - __IO uint32_t TR3; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x28 */ - uint32_t RESERVED2; /*!< Reserved, 0x2C */ - __IO uint32_t SQR1; /*!< ADC group regular sequencer register 1, Address offset: 0x30 */ - __IO uint32_t SQR2; /*!< ADC group regular sequencer register 2, Address offset: 0x34 */ - __IO uint32_t SQR3; /*!< ADC group regular sequencer register 3, Address offset: 0x38 */ - __IO uint32_t SQR4; /*!< ADC group regular sequencer register 4, Address offset: 0x3C */ - __IO uint32_t DR; /*!< ADC group regular data register, Address offset: 0x40 */ - uint32_t RESERVED3; /*!< Reserved, 0x44 */ - uint32_t RESERVED4; /*!< Reserved, 0x48 */ - __IO uint32_t JSQR; /*!< ADC group injected sequencer register, Address offset: 0x4C */ - uint32_t RESERVED5[4]; /*!< Reserved, 0x50 - 0x5C */ - __IO uint32_t OFR1; /*!< ADC offset register 1, Address offset: 0x60 */ - __IO uint32_t OFR2; /*!< ADC offset register 2, Address offset: 0x64 */ - __IO uint32_t OFR3; /*!< ADC offset register 3, Address offset: 0x68 */ - __IO uint32_t OFR4; /*!< ADC offset register 4, Address offset: 0x6C */ - uint32_t RESERVED6[4]; /*!< Reserved, 0x70 - 0x7C */ - __IO uint32_t JDR1; /*!< ADC group injected rank 1 data register, Address offset: 0x80 */ - __IO uint32_t JDR2; /*!< ADC group injected rank 2 data register, Address offset: 0x84 */ - __IO uint32_t JDR3; /*!< ADC group injected rank 3 data register, Address offset: 0x88 */ - __IO uint32_t JDR4; /*!< ADC group injected rank 4 data register, Address offset: 0x8C */ - uint32_t RESERVED7[4]; /*!< Reserved, 0x090 - 0x09C */ - __IO uint32_t AWD2CR; /*!< ADC analog watchdog 1 configuration register, Address offset: 0xA0 */ - __IO uint32_t AWD3CR; /*!< ADC analog watchdog 3 Configuration Register, Address offset: 0xA4 */ - uint32_t RESERVED8; /*!< Reserved, 0x0A8 */ - uint32_t RESERVED9; /*!< Reserved, 0x0AC */ - __IO uint32_t DIFSEL; /*!< ADC differential mode selection register, Address offset: 0xB0 */ - __IO uint32_t CALFACT; /*!< ADC calibration factors, Address offset: 0xB4 */ - -} ADC_TypeDef; - -typedef struct -{ - __IO uint32_t CSR; /*!< ADC common status register, Address offset: ADC1 base address + 0x300 */ - uint32_t RESERVED; /*!< Reserved, Address offset: ADC1 base address + 0x304 */ - __IO uint32_t CCR; /*!< ADC common configuration register, Address offset: ADC1 base address + 0x308 */ - __IO uint32_t CDR; /*!< ADC common group regular data register Address offset: ADC1 base address + 0x30C */ -} ADC_Common_TypeDef; - - -/** - * @brief Controller Area Network TxMailBox - */ - -typedef struct -{ - __IO uint32_t TIR; /*!< CAN TX mailbox identifier register */ - __IO uint32_t TDTR; /*!< CAN mailbox data length control and time stamp register */ - __IO uint32_t TDLR; /*!< CAN mailbox data low register */ - __IO uint32_t TDHR; /*!< CAN mailbox data high register */ -} CAN_TxMailBox_TypeDef; - -/** - * @brief Controller Area Network FIFOMailBox - */ - -typedef struct -{ - __IO uint32_t RIR; /*!< CAN receive FIFO mailbox identifier register */ - __IO uint32_t RDTR; /*!< CAN receive FIFO mailbox data length control and time stamp register */ - __IO uint32_t RDLR; /*!< CAN receive FIFO mailbox data low register */ - __IO uint32_t RDHR; /*!< CAN receive FIFO mailbox data high register */ -} CAN_FIFOMailBox_TypeDef; - -/** - * @brief Controller Area Network FilterRegister - */ - -typedef struct -{ - __IO uint32_t FR1; /*!< CAN Filter bank register 1 */ - __IO uint32_t FR2; /*!< CAN Filter bank register 1 */ -} CAN_FilterRegister_TypeDef; - -/** - * @brief Controller Area Network - */ - -typedef struct -{ - __IO uint32_t MCR; /*!< CAN master control register, Address offset: 0x00 */ - __IO uint32_t MSR; /*!< CAN master status register, Address offset: 0x04 */ - __IO uint32_t TSR; /*!< CAN transmit status register, Address offset: 0x08 */ - __IO uint32_t RF0R; /*!< CAN receive FIFO 0 register, Address offset: 0x0C */ - __IO uint32_t RF1R; /*!< CAN receive FIFO 1 register, Address offset: 0x10 */ - __IO uint32_t IER; /*!< CAN interrupt enable register, Address offset: 0x14 */ - __IO uint32_t ESR; /*!< CAN error status register, Address offset: 0x18 */ - __IO uint32_t BTR; /*!< CAN bit timing register, Address offset: 0x1C */ - uint32_t RESERVED0[88]; /*!< Reserved, 0x020 - 0x17F */ - CAN_TxMailBox_TypeDef sTxMailBox[3]; /*!< CAN Tx MailBox, Address offset: 0x180 - 0x1AC */ - CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; /*!< CAN FIFO MailBox, Address offset: 0x1B0 - 0x1CC */ - uint32_t RESERVED1[12]; /*!< Reserved, 0x1D0 - 0x1FF */ - __IO uint32_t FMR; /*!< CAN filter master register, Address offset: 0x200 */ - __IO uint32_t FM1R; /*!< CAN filter mode register, Address offset: 0x204 */ - uint32_t RESERVED2; /*!< Reserved, 0x208 */ - __IO uint32_t FS1R; /*!< CAN filter scale register, Address offset: 0x20C */ - uint32_t RESERVED3; /*!< Reserved, 0x210 */ - __IO uint32_t FFA1R; /*!< CAN filter FIFO assignment register, Address offset: 0x214 */ - uint32_t RESERVED4; /*!< Reserved, 0x218 */ - __IO uint32_t FA1R; /*!< CAN filter activation register, Address offset: 0x21C */ - uint32_t RESERVED5[8]; /*!< Reserved, 0x220-0x23F */ - CAN_FilterRegister_TypeDef sFilterRegister[28]; /*!< CAN Filter Register, Address offset: 0x240-0x31C */ -} CAN_TypeDef; - - -/** - * @brief Comparator - */ - -typedef struct -{ - __IO uint32_t CSR; /*!< COMP control and status register, Address offset: 0x00 */ -} COMP_TypeDef; - -typedef struct -{ - __IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */ -} COMP_Common_TypeDef; - -/** - * @brief CRC calculation unit - */ - -typedef struct -{ - __IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */ - __IO uint8_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */ - uint8_t RESERVED0; /*!< Reserved, 0x05 */ - uint16_t RESERVED1; /*!< Reserved, 0x06 */ - __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ - uint32_t RESERVED2; /*!< Reserved, 0x0C */ - __IO uint32_t INIT; /*!< Initial CRC value register, Address offset: 0x10 */ - __IO uint32_t POL; /*!< CRC polynomial register, Address offset: 0x14 */ -} CRC_TypeDef; - -/** - * @brief Digital to Analog Converter - */ - -typedef struct -{ - __IO uint32_t CR; /*!< DAC control register, Address offset: 0x00 */ - __IO uint32_t SWTRIGR; /*!< DAC software trigger register, Address offset: 0x04 */ - __IO uint32_t DHR12R1; /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */ - __IO uint32_t DHR12L1; /*!< DAC channel1 12-bit left aligned data holding register, Address offset: 0x0C */ - __IO uint32_t DHR8R1; /*!< DAC channel1 8-bit right aligned data holding register, Address offset: 0x10 */ - __IO uint32_t DHR12R2; /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */ - __IO uint32_t DHR12L2; /*!< DAC channel2 12-bit left aligned data holding register, Address offset: 0x18 */ - __IO uint32_t DHR8R2; /*!< DAC channel2 8-bit right-aligned data holding register, Address offset: 0x1C */ - __IO uint32_t DHR12RD; /*!< Dual DAC 12-bit right-aligned data holding register, Address offset: 0x20 */ - __IO uint32_t DHR12LD; /*!< DUAL DAC 12-bit left aligned data holding register, Address offset: 0x24 */ - __IO uint32_t DHR8RD; /*!< DUAL DAC 8-bit right aligned data holding register, Address offset: 0x28 */ - __IO uint32_t DOR1; /*!< DAC channel1 data output register, Address offset: 0x2C */ - __IO uint32_t DOR2; /*!< DAC channel2 data output register, Address offset: 0x30 */ - __IO uint32_t SR; /*!< DAC status register, Address offset: 0x34 */ - __IO uint32_t CCR; /*!< DAC calibration control register, Address offset: 0x38 */ - __IO uint32_t MCR; /*!< DAC mode control register, Address offset: 0x3C */ - __IO uint32_t SHSR1; /*!< DAC Sample and Hold sample time register 1, Address offset: 0x40 */ - __IO uint32_t SHSR2; /*!< DAC Sample and Hold sample time register 2, Address offset: 0x44 */ - __IO uint32_t SHHR; /*!< DAC Sample and Hold hold time register, Address offset: 0x48 */ - __IO uint32_t SHRR; /*!< DAC Sample and Hold refresh time register, Address offset: 0x4C */ -} DAC_TypeDef; - -/** - * @brief DFSDM module registers - */ -typedef struct -{ - __IO uint32_t FLTCR1; /*!< DFSDM control register1, Address offset: 0x100 */ - __IO uint32_t FLTCR2; /*!< DFSDM control register2, Address offset: 0x104 */ - __IO uint32_t FLTISR; /*!< DFSDM interrupt and status register, Address offset: 0x108 */ - __IO uint32_t FLTICR; /*!< DFSDM interrupt flag clear register, Address offset: 0x10C */ - __IO uint32_t FLTJCHGR; /*!< DFSDM injected channel group selection register, Address offset: 0x110 */ - __IO uint32_t FLTFCR; /*!< DFSDM filter control register, Address offset: 0x114 */ - __IO uint32_t FLTJDATAR; /*!< DFSDM data register for injected group, Address offset: 0x118 */ - __IO uint32_t FLTRDATAR; /*!< DFSDM data register for regular group, Address offset: 0x11C */ - __IO uint32_t FLTAWHTR; /*!< DFSDM analog watchdog high threshold register, Address offset: 0x120 */ - __IO uint32_t FLTAWLTR; /*!< DFSDM analog watchdog low threshold register, Address offset: 0x124 */ - __IO uint32_t FLTAWSR; /*!< DFSDM analog watchdog status register Address offset: 0x128 */ - __IO uint32_t FLTAWCFR; /*!< DFSDM analog watchdog clear flag register Address offset: 0x12C */ - __IO uint32_t FLTEXMAX; /*!< DFSDM extreme detector maximum register, Address offset: 0x130 */ - __IO uint32_t FLTEXMIN; /*!< DFSDM extreme detector minimum register Address offset: 0x134 */ - __IO uint32_t FLTCNVTIMR; /*!< DFSDM conversion timer, Address offset: 0x138 */ -} DFSDM_Filter_TypeDef; - -/** - * @brief DFSDM channel configuration registers - */ -typedef struct -{ - __IO uint32_t CHCFGR1; /*!< DFSDM channel configuration register1, Address offset: 0x00 */ - __IO uint32_t CHCFGR2; /*!< DFSDM channel configuration register2, Address offset: 0x04 */ - __IO uint32_t CHAWSCDR; /*!< DFSDM channel analog watchdog and - short circuit detector register, Address offset: 0x08 */ - __IO uint32_t CHWDATAR; /*!< DFSDM channel watchdog filter data register, Address offset: 0x0C */ - __IO uint32_t CHDATINR; /*!< DFSDM channel data input register, Address offset: 0x10 */ -} DFSDM_Channel_TypeDef; - -/** - * @brief Debug MCU - */ - -typedef struct -{ - __IO uint32_t IDCODE; /*!< MCU device ID code, Address offset: 0x00 */ - __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ - __IO uint32_t APB1FZR1; /*!< Debug MCU APB1 freeze register 1, Address offset: 0x08 */ - __IO uint32_t APB1FZR2; /*!< Debug MCU APB1 freeze register 2, Address offset: 0x0C */ - __IO uint32_t APB2FZ; /*!< Debug MCU APB2 freeze register, Address offset: 0x10 */ -} DBGMCU_TypeDef; - - -/** - * @brief DMA Controller - */ - -typedef struct -{ - __IO uint32_t CCR; /*!< DMA channel x configuration register */ - __IO uint32_t CNDTR; /*!< DMA channel x number of data register */ - __IO uint32_t CPAR; /*!< DMA channel x peripheral address register */ - __IO uint32_t CMAR; /*!< DMA channel x memory address register */ -} DMA_Channel_TypeDef; - -typedef struct -{ - __IO uint32_t ISR; /*!< DMA interrupt status register, Address offset: 0x00 */ - __IO uint32_t IFCR; /*!< DMA interrupt flag clear register, Address offset: 0x04 */ -} DMA_TypeDef; - -typedef struct -{ - __IO uint32_t CSELR; /*!< DMA channel selection register */ -} DMA_Request_TypeDef; - -/* Legacy define */ -#define DMA_request_TypeDef DMA_Request_TypeDef - - -/** - * @brief External Interrupt/Event Controller - */ - -typedef struct -{ - __IO uint32_t IMR1; /*!< EXTI Interrupt mask register 1, Address offset: 0x00 */ - __IO uint32_t EMR1; /*!< EXTI Event mask register 1, Address offset: 0x04 */ - __IO uint32_t RTSR1; /*!< EXTI Rising trigger selection register 1, Address offset: 0x08 */ - __IO uint32_t FTSR1; /*!< EXTI Falling trigger selection register 1, Address offset: 0x0C */ - __IO uint32_t SWIER1; /*!< EXTI Software interrupt event register 1, Address offset: 0x10 */ - __IO uint32_t PR1; /*!< EXTI Pending register 1, Address offset: 0x14 */ - uint32_t RESERVED1; /*!< Reserved, 0x18 */ - uint32_t RESERVED2; /*!< Reserved, 0x1C */ - __IO uint32_t IMR2; /*!< EXTI Interrupt mask register 2, Address offset: 0x20 */ - __IO uint32_t EMR2; /*!< EXTI Event mask register 2, Address offset: 0x24 */ - __IO uint32_t RTSR2; /*!< EXTI Rising trigger selection register 2, Address offset: 0x28 */ - __IO uint32_t FTSR2; /*!< EXTI Falling trigger selection register 2, Address offset: 0x2C */ - __IO uint32_t SWIER2; /*!< EXTI Software interrupt event register 2, Address offset: 0x30 */ - __IO uint32_t PR2; /*!< EXTI Pending register 2, Address offset: 0x34 */ -} EXTI_TypeDef; - - -/** - * @brief Firewall - */ - -typedef struct -{ - __IO uint32_t CSSA; /*!< Code Segment Start Address register, Address offset: 0x00 */ - __IO uint32_t CSL; /*!< Code Segment Length register, Address offset: 0x04 */ - __IO uint32_t NVDSSA; /*!< NON volatile data Segment Start Address register, Address offset: 0x08 */ - __IO uint32_t NVDSL; /*!< NON volatile data Segment Length register, Address offset: 0x0C */ - __IO uint32_t VDSSA ; /*!< Volatile data Segment Start Address register, Address offset: 0x10 */ - __IO uint32_t VDSL ; /*!< Volatile data Segment Length register, Address offset: 0x14 */ - uint32_t RESERVED1; /*!< Reserved1, Address offset: 0x18 */ - uint32_t RESERVED2; /*!< Reserved2, Address offset: 0x1C */ - __IO uint32_t CR ; /*!< Configuration register, Address offset: 0x20 */ -} FIREWALL_TypeDef; - - -/** - * @brief FLASH Registers - */ - -typedef struct -{ - __IO uint32_t ACR; /*!< FLASH access control register, Address offset: 0x00 */ - __IO uint32_t PDKEYR; /*!< FLASH power down key register, Address offset: 0x04 */ - __IO uint32_t KEYR; /*!< FLASH key register, Address offset: 0x08 */ - __IO uint32_t OPTKEYR; /*!< FLASH option key register, Address offset: 0x0C */ - __IO uint32_t SR; /*!< FLASH status register, Address offset: 0x10 */ - __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x14 */ - __IO uint32_t ECCR; /*!< FLASH ECC register, Address offset: 0x18 */ - __IO uint32_t RESERVED1; /*!< Reserved1, Address offset: 0x1C */ - __IO uint32_t OPTR; /*!< FLASH option register, Address offset: 0x20 */ - __IO uint32_t PCROP1SR; /*!< FLASH bank1 PCROP start address register, Address offset: 0x24 */ - __IO uint32_t PCROP1ER; /*!< FLASH bank1 PCROP end address register, Address offset: 0x28 */ - __IO uint32_t WRP1AR; /*!< FLASH bank1 WRP area A address register, Address offset: 0x2C */ - __IO uint32_t WRP1BR; /*!< FLASH bank1 WRP area B address register, Address offset: 0x30 */ - uint32_t RESERVED2[4]; /*!< Reserved2, Address offset: 0x34-0x40 */ - __IO uint32_t PCROP2SR; /*!< FLASH bank2 PCROP start address register, Address offset: 0x44 */ - __IO uint32_t PCROP2ER; /*!< FLASH bank2 PCROP end address register, Address offset: 0x48 */ - __IO uint32_t WRP2AR; /*!< FLASH bank2 WRP area A address register, Address offset: 0x4C */ - __IO uint32_t WRP2BR; /*!< FLASH bank2 WRP area B address register, Address offset: 0x50 */ -} FLASH_TypeDef; - - -/** - * @brief Flexible Memory Controller - */ - -typedef struct -{ - __IO uint32_t BTCR[8]; /*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */ -} FMC_Bank1_TypeDef; - -/** - * @brief Flexible Memory Controller Bank1E - */ - -typedef struct -{ - __IO uint32_t BWTR[7]; /*!< NOR/PSRAM write timing registers, Address offset: 0x104-0x11C */ -} FMC_Bank1E_TypeDef; - -/** - * @brief Flexible Memory Controller Bank3 - */ - -typedef struct -{ - __IO uint32_t PCR; /*!< NAND Flash control register, Address offset: 0x80 */ - __IO uint32_t SR; /*!< NAND Flash FIFO status and interrupt register, Address offset: 0x84 */ - __IO uint32_t PMEM; /*!< NAND Flash Common memory space timing register, Address offset: 0x88 */ - __IO uint32_t PATT; /*!< NAND Flash Attribute memory space timing register, Address offset: 0x8C */ - uint32_t RESERVED0; /*!< Reserved, 0x90 */ - __IO uint32_t ECCR; /*!< NAND Flash ECC result registers, Address offset: 0x94 */ -} FMC_Bank3_TypeDef; - -/** - * @brief General Purpose I/O - */ - -typedef struct -{ - __IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */ - __IO uint32_t OTYPER; /*!< GPIO port output type register, Address offset: 0x04 */ - __IO uint32_t OSPEEDR; /*!< GPIO port output speed register, Address offset: 0x08 */ - __IO uint32_t PUPDR; /*!< GPIO port pull-up/pull-down register, Address offset: 0x0C */ - __IO uint32_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */ - __IO uint32_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */ - __IO uint32_t BSRR; /*!< GPIO port bit set/reset register, Address offset: 0x18 */ - __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ - __IO uint32_t AFR[2]; /*!< GPIO alternate function registers, Address offset: 0x20-0x24 */ - __IO uint32_t BRR; /*!< GPIO Bit Reset register, Address offset: 0x28 */ - __IO uint32_t ASCR; /*!< GPIO analog switch control register, Address offset: 0x2C */ - -} GPIO_TypeDef; - - -/** - * @brief Inter-integrated Circuit Interface - */ - -typedef struct -{ - __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ - __IO uint32_t CR2; /*!< I2C Control register 2, Address offset: 0x04 */ - __IO uint32_t OAR1; /*!< I2C Own address 1 register, Address offset: 0x08 */ - __IO uint32_t OAR2; /*!< I2C Own address 2 register, Address offset: 0x0C */ - __IO uint32_t TIMINGR; /*!< I2C Timing register, Address offset: 0x10 */ - __IO uint32_t TIMEOUTR; /*!< I2C Timeout register, Address offset: 0x14 */ - __IO uint32_t ISR; /*!< I2C Interrupt and status register, Address offset: 0x18 */ - __IO uint32_t ICR; /*!< I2C Interrupt clear register, Address offset: 0x1C */ - __IO uint32_t PECR; /*!< I2C PEC register, Address offset: 0x20 */ - __IO uint32_t RXDR; /*!< I2C Receive data register, Address offset: 0x24 */ - __IO uint32_t TXDR; /*!< I2C Transmit data register, Address offset: 0x28 */ -} I2C_TypeDef; - -/** - * @brief Independent WATCHDOG - */ - -typedef struct -{ - __IO uint32_t KR; /*!< IWDG Key register, Address offset: 0x00 */ - __IO uint32_t PR; /*!< IWDG Prescaler register, Address offset: 0x04 */ - __IO uint32_t RLR; /*!< IWDG Reload register, Address offset: 0x08 */ - __IO uint32_t SR; /*!< IWDG Status register, Address offset: 0x0C */ - __IO uint32_t WINR; /*!< IWDG Window register, Address offset: 0x10 */ -} IWDG_TypeDef; - -/** - * @brief LCD - */ - -typedef struct -{ - __IO uint32_t CR; /*!< LCD control register, Address offset: 0x00 */ - __IO uint32_t FCR; /*!< LCD frame control register, Address offset: 0x04 */ - __IO uint32_t SR; /*!< LCD status register, Address offset: 0x08 */ - __IO uint32_t CLR; /*!< LCD clear register, Address offset: 0x0C */ - uint32_t RESERVED; /*!< Reserved, Address offset: 0x10 */ - __IO uint32_t RAM[16]; /*!< LCD display memory, Address offset: 0x14-0x50 */ -} LCD_TypeDef; - -/** - * @brief LPTIMER - */ -typedef struct -{ - __IO uint32_t ISR; /*!< LPTIM Interrupt and Status register, Address offset: 0x00 */ - __IO uint32_t ICR; /*!< LPTIM Interrupt Clear register, Address offset: 0x04 */ - __IO uint32_t IER; /*!< LPTIM Interrupt Enable register, Address offset: 0x08 */ - __IO uint32_t CFGR; /*!< LPTIM Configuration register, Address offset: 0x0C */ - __IO uint32_t CR; /*!< LPTIM Control register, Address offset: 0x10 */ - __IO uint32_t CMP; /*!< LPTIM Compare register, Address offset: 0x14 */ - __IO uint32_t ARR; /*!< LPTIM Autoreload register, Address offset: 0x18 */ - __IO uint32_t CNT; /*!< LPTIM Counter register, Address offset: 0x1C */ - __IO uint32_t OR; /*!< LPTIM Option register, Address offset: 0x20 */ -} LPTIM_TypeDef; - -/** - * @brief Operational Amplifier (OPAMP) - */ - -typedef struct -{ - __IO uint32_t CSR; /*!< OPAMP control/status register, Address offset: 0x00 */ - __IO uint32_t OTR; /*!< OPAMP offset trimming register for normal mode, Address offset: 0x04 */ - __IO uint32_t LPOTR; /*!< OPAMP offset trimming register for low power mode, Address offset: 0x08 */ -} OPAMP_TypeDef; - -typedef struct -{ - __IO uint32_t CSR; /*!< OPAMP control/status register, used for bits common to several OPAMP instances, Address offset: 0x00 */ -} OPAMP_Common_TypeDef; - -/** - * @brief Power Control - */ - -typedef struct -{ - __IO uint32_t CR1; /*!< PWR power control register 1, Address offset: 0x00 */ - __IO uint32_t CR2; /*!< PWR power control register 2, Address offset: 0x04 */ - __IO uint32_t CR3; /*!< PWR power control register 3, Address offset: 0x08 */ - __IO uint32_t CR4; /*!< PWR power control register 4, Address offset: 0x0C */ - __IO uint32_t SR1; /*!< PWR power status register 1, Address offset: 0x10 */ - __IO uint32_t SR2; /*!< PWR power status register 2, Address offset: 0x14 */ - __IO uint32_t SCR; /*!< PWR power status reset register, Address offset: 0x18 */ - uint32_t RESERVED; /*!< Reserved, Address offset: 0x1C */ - __IO uint32_t PUCRA; /*!< Pull_up control register of portA, Address offset: 0x20 */ - __IO uint32_t PDCRA; /*!< Pull_Down control register of portA, Address offset: 0x24 */ - __IO uint32_t PUCRB; /*!< Pull_up control register of portB, Address offset: 0x28 */ - __IO uint32_t PDCRB; /*!< Pull_Down control register of portB, Address offset: 0x2C */ - __IO uint32_t PUCRC; /*!< Pull_up control register of portC, Address offset: 0x30 */ - __IO uint32_t PDCRC; /*!< Pull_Down control register of portC, Address offset: 0x34 */ - __IO uint32_t PUCRD; /*!< Pull_up control register of portD, Address offset: 0x38 */ - __IO uint32_t PDCRD; /*!< Pull_Down control register of portD, Address offset: 0x3C */ - __IO uint32_t PUCRE; /*!< Pull_up control register of portE, Address offset: 0x40 */ - __IO uint32_t PDCRE; /*!< Pull_Down control register of portE, Address offset: 0x44 */ - __IO uint32_t PUCRF; /*!< Pull_up control register of portF, Address offset: 0x48 */ - __IO uint32_t PDCRF; /*!< Pull_Down control register of portF, Address offset: 0x4C */ - __IO uint32_t PUCRG; /*!< Pull_up control register of portG, Address offset: 0x50 */ - __IO uint32_t PDCRG; /*!< Pull_Down control register of portG, Address offset: 0x54 */ - __IO uint32_t PUCRH; /*!< Pull_up control register of portH, Address offset: 0x58 */ - __IO uint32_t PDCRH; /*!< Pull_Down control register of portH, Address offset: 0x5C */ -} PWR_TypeDef; - - -/** - * @brief QUAD Serial Peripheral Interface - */ - -typedef struct -{ - __IO uint32_t CR; /*!< QUADSPI Control register, Address offset: 0x00 */ - __IO uint32_t DCR; /*!< QUADSPI Device Configuration register, Address offset: 0x04 */ - __IO uint32_t SR; /*!< QUADSPI Status register, Address offset: 0x08 */ - __IO uint32_t FCR; /*!< QUADSPI Flag Clear register, Address offset: 0x0C */ - __IO uint32_t DLR; /*!< QUADSPI Data Length register, Address offset: 0x10 */ - __IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset: 0x14 */ - __IO uint32_t AR; /*!< QUADSPI Address register, Address offset: 0x18 */ - __IO uint32_t ABR; /*!< QUADSPI Alternate Bytes register, Address offset: 0x1C */ - __IO uint32_t DR; /*!< QUADSPI Data register, Address offset: 0x20 */ - __IO uint32_t PSMKR; /*!< QUADSPI Polling Status Mask register, Address offset: 0x24 */ - __IO uint32_t PSMAR; /*!< QUADSPI Polling Status Match register, Address offset: 0x28 */ - __IO uint32_t PIR; /*!< QUADSPI Polling Interval register, Address offset: 0x2C */ - __IO uint32_t LPTR; /*!< QUADSPI Low Power Timeout register, Address offset: 0x30 */ -} QUADSPI_TypeDef; - - -/** - * @brief Reset and Clock Control - */ - -typedef struct -{ - __IO uint32_t CR; /*!< RCC clock control register, Address offset: 0x00 */ - __IO uint32_t ICSCR; /*!< RCC internal clock sources calibration register, Address offset: 0x04 */ - __IO uint32_t CFGR; /*!< RCC clock configuration register, Address offset: 0x08 */ - __IO uint32_t PLLCFGR; /*!< RCC system PLL configuration register, Address offset: 0x0C */ - __IO uint32_t PLLSAI1CFGR; /*!< RCC PLL SAI1 configuration register, Address offset: 0x10 */ - __IO uint32_t PLLSAI2CFGR; /*!< RCC PLL SAI2 configuration register, Address offset: 0x14 */ - __IO uint32_t CIER; /*!< RCC clock interrupt enable register, Address offset: 0x18 */ - __IO uint32_t CIFR; /*!< RCC clock interrupt flag register, Address offset: 0x1C */ - __IO uint32_t CICR; /*!< RCC clock interrupt clear register, Address offset: 0x20 */ - uint32_t RESERVED0; /*!< Reserved, Address offset: 0x24 */ - __IO uint32_t AHB1RSTR; /*!< RCC AHB1 peripheral reset register, Address offset: 0x28 */ - __IO uint32_t AHB2RSTR; /*!< RCC AHB2 peripheral reset register, Address offset: 0x2C */ - __IO uint32_t AHB3RSTR; /*!< RCC AHB3 peripheral reset register, Address offset: 0x30 */ - uint32_t RESERVED1; /*!< Reserved, Address offset: 0x34 */ - __IO uint32_t APB1RSTR1; /*!< RCC APB1 peripheral reset register 1, Address offset: 0x38 */ - __IO uint32_t APB1RSTR2; /*!< RCC APB1 peripheral reset register 2, Address offset: 0x3C */ - __IO uint32_t APB2RSTR; /*!< RCC APB2 peripheral reset register, Address offset: 0x40 */ - uint32_t RESERVED2; /*!< Reserved, Address offset: 0x44 */ - __IO uint32_t AHB1ENR; /*!< RCC AHB1 peripheral clocks enable register, Address offset: 0x48 */ - __IO uint32_t AHB2ENR; /*!< RCC AHB2 peripheral clocks enable register, Address offset: 0x4C */ - __IO uint32_t AHB3ENR; /*!< RCC AHB3 peripheral clocks enable register, Address offset: 0x50 */ - uint32_t RESERVED3; /*!< Reserved, Address offset: 0x54 */ - __IO uint32_t APB1ENR1; /*!< RCC APB1 peripheral clocks enable register 1, Address offset: 0x58 */ - __IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, Address offset: 0x5C */ - __IO uint32_t APB2ENR; /*!< RCC APB2 peripheral clocks enable register, Address offset: 0x60 */ - uint32_t RESERVED4; /*!< Reserved, Address offset: 0x64 */ - __IO uint32_t AHB1SMENR; /*!< RCC AHB1 peripheral clocks enable in sleep and stop modes register, Address offset: 0x68 */ - __IO uint32_t AHB2SMENR; /*!< RCC AHB2 peripheral clocks enable in sleep and stop modes register, Address offset: 0x6C */ - __IO uint32_t AHB3SMENR; /*!< RCC AHB3 peripheral clocks enable in sleep and stop modes register, Address offset: 0x70 */ - uint32_t RESERVED5; /*!< Reserved, Address offset: 0x74 */ - __IO uint32_t APB1SMENR1; /*!< RCC APB1 peripheral clocks enable in sleep mode and stop modes register 1, Address offset: 0x78 */ - __IO uint32_t APB1SMENR2; /*!< RCC APB1 peripheral clocks enable in sleep mode and stop modes register 2, Address offset: 0x7C */ - __IO uint32_t APB2SMENR; /*!< RCC APB2 peripheral clocks enable in sleep mode and stop modes register, Address offset: 0x80 */ - uint32_t RESERVED6; /*!< Reserved, Address offset: 0x84 */ - __IO uint32_t CCIPR; /*!< RCC peripherals independent clock configuration register, Address offset: 0x88 */ - uint32_t RESERVED7; /*!< Reserved, Address offset: 0x8C */ - __IO uint32_t BDCR; /*!< RCC backup domain control register, Address offset: 0x90 */ - __IO uint32_t CSR; /*!< RCC clock control & status register, Address offset: 0x94 */ -} RCC_TypeDef; - -/** - * @brief Real-Time Clock - */ - -typedef struct -{ - __IO uint32_t TR; /*!< RTC time register, Address offset: 0x00 */ - __IO uint32_t DR; /*!< RTC date register, Address offset: 0x04 */ - __IO uint32_t CR; /*!< RTC control register, Address offset: 0x08 */ - __IO uint32_t ISR; /*!< RTC initialization and status register, Address offset: 0x0C */ - __IO uint32_t PRER; /*!< RTC prescaler register, Address offset: 0x10 */ - __IO uint32_t WUTR; /*!< RTC wakeup timer register, Address offset: 0x14 */ - uint32_t reserved; /*!< Reserved */ - __IO uint32_t ALRMAR; /*!< RTC alarm A register, Address offset: 0x1C */ - __IO uint32_t ALRMBR; /*!< RTC alarm B register, Address offset: 0x20 */ - __IO uint32_t WPR; /*!< RTC write protection register, Address offset: 0x24 */ - __IO uint32_t SSR; /*!< RTC sub second register, Address offset: 0x28 */ - __IO uint32_t SHIFTR; /*!< RTC shift control register, Address offset: 0x2C */ - __IO uint32_t TSTR; /*!< RTC time stamp time register, Address offset: 0x30 */ - __IO uint32_t TSDR; /*!< RTC time stamp date register, Address offset: 0x34 */ - __IO uint32_t TSSSR; /*!< RTC time-stamp sub second register, Address offset: 0x38 */ - __IO uint32_t CALR; /*!< RTC calibration register, Address offset: 0x3C */ - __IO uint32_t TAMPCR; /*!< RTC tamper configuration register, Address offset: 0x40 */ - __IO uint32_t ALRMASSR; /*!< RTC alarm A sub second register, Address offset: 0x44 */ - __IO uint32_t ALRMBSSR; /*!< RTC alarm B sub second register, Address offset: 0x48 */ - __IO uint32_t OR; /*!< RTC option register, Address offset: 0x4C */ - __IO uint32_t BKP0R; /*!< RTC backup register 0, Address offset: 0x50 */ - __IO uint32_t BKP1R; /*!< RTC backup register 1, Address offset: 0x54 */ - __IO uint32_t BKP2R; /*!< RTC backup register 2, Address offset: 0x58 */ - __IO uint32_t BKP3R; /*!< RTC backup register 3, Address offset: 0x5C */ - __IO uint32_t BKP4R; /*!< RTC backup register 4, Address offset: 0x60 */ - __IO uint32_t BKP5R; /*!< RTC backup register 5, Address offset: 0x64 */ - __IO uint32_t BKP6R; /*!< RTC backup register 6, Address offset: 0x68 */ - __IO uint32_t BKP7R; /*!< RTC backup register 7, Address offset: 0x6C */ - __IO uint32_t BKP8R; /*!< RTC backup register 8, Address offset: 0x70 */ - __IO uint32_t BKP9R; /*!< RTC backup register 9, Address offset: 0x74 */ - __IO uint32_t BKP10R; /*!< RTC backup register 10, Address offset: 0x78 */ - __IO uint32_t BKP11R; /*!< RTC backup register 11, Address offset: 0x7C */ - __IO uint32_t BKP12R; /*!< RTC backup register 12, Address offset: 0x80 */ - __IO uint32_t BKP13R; /*!< RTC backup register 13, Address offset: 0x84 */ - __IO uint32_t BKP14R; /*!< RTC backup register 14, Address offset: 0x88 */ - __IO uint32_t BKP15R; /*!< RTC backup register 15, Address offset: 0x8C */ - __IO uint32_t BKP16R; /*!< RTC backup register 16, Address offset: 0x90 */ - __IO uint32_t BKP17R; /*!< RTC backup register 17, Address offset: 0x94 */ - __IO uint32_t BKP18R; /*!< RTC backup register 18, Address offset: 0x98 */ - __IO uint32_t BKP19R; /*!< RTC backup register 19, Address offset: 0x9C */ - __IO uint32_t BKP20R; /*!< RTC backup register 20, Address offset: 0xA0 */ - __IO uint32_t BKP21R; /*!< RTC backup register 21, Address offset: 0xA4 */ - __IO uint32_t BKP22R; /*!< RTC backup register 22, Address offset: 0xA8 */ - __IO uint32_t BKP23R; /*!< RTC backup register 23, Address offset: 0xAC */ - __IO uint32_t BKP24R; /*!< RTC backup register 24, Address offset: 0xB0 */ - __IO uint32_t BKP25R; /*!< RTC backup register 25, Address offset: 0xB4 */ - __IO uint32_t BKP26R; /*!< RTC backup register 26, Address offset: 0xB8 */ - __IO uint32_t BKP27R; /*!< RTC backup register 27, Address offset: 0xBC */ - __IO uint32_t BKP28R; /*!< RTC backup register 28, Address offset: 0xC0 */ - __IO uint32_t BKP29R; /*!< RTC backup register 29, Address offset: 0xC4 */ - __IO uint32_t BKP30R; /*!< RTC backup register 30, Address offset: 0xC8 */ - __IO uint32_t BKP31R; /*!< RTC backup register 31, Address offset: 0xCC */ -} RTC_TypeDef; - - -/** - * @brief Serial Audio Interface - */ - -typedef struct -{ - __IO uint32_t GCR; /*!< SAI global configuration register, Address offset: 0x00 */ -} SAI_TypeDef; - -typedef struct -{ - __IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x04 */ - __IO uint32_t CR2; /*!< SAI block x configuration register 2, Address offset: 0x08 */ - __IO uint32_t FRCR; /*!< SAI block x frame configuration register, Address offset: 0x0C */ - __IO uint32_t SLOTR; /*!< SAI block x slot register, Address offset: 0x10 */ - __IO uint32_t IMR; /*!< SAI block x interrupt mask register, Address offset: 0x14 */ - __IO uint32_t SR; /*!< SAI block x status register, Address offset: 0x18 */ - __IO uint32_t CLRFR; /*!< SAI block x clear flag register, Address offset: 0x1C */ - __IO uint32_t DR; /*!< SAI block x data register, Address offset: 0x20 */ -} SAI_Block_TypeDef; - - -/** - * @brief Secure digital input/output Interface - */ - -typedef struct -{ - __IO uint32_t POWER; /*!< SDMMC power control register, Address offset: 0x00 */ - __IO uint32_t CLKCR; /*!< SDMMC clock control register, Address offset: 0x04 */ - __IO uint32_t ARG; /*!< SDMMC argument register, Address offset: 0x08 */ - __IO uint32_t CMD; /*!< SDMMC command register, Address offset: 0x0C */ - __I uint32_t RESPCMD; /*!< SDMMC command response register, Address offset: 0x10 */ - __I uint32_t RESP1; /*!< SDMMC response 1 register, Address offset: 0x14 */ - __I uint32_t RESP2; /*!< SDMMC response 2 register, Address offset: 0x18 */ - __I uint32_t RESP3; /*!< SDMMC response 3 register, Address offset: 0x1C */ - __I uint32_t RESP4; /*!< SDMMC response 4 register, Address offset: 0x20 */ - __IO uint32_t DTIMER; /*!< SDMMC data timer register, Address offset: 0x24 */ - __IO uint32_t DLEN; /*!< SDMMC data length register, Address offset: 0x28 */ - __IO uint32_t DCTRL; /*!< SDMMC data control register, Address offset: 0x2C */ - __I uint32_t DCOUNT; /*!< SDMMC data counter register, Address offset: 0x30 */ - __I uint32_t STA; /*!< SDMMC status register, Address offset: 0x34 */ - __IO uint32_t ICR; /*!< SDMMC interrupt clear register, Address offset: 0x38 */ - __IO uint32_t MASK; /*!< SDMMC mask register, Address offset: 0x3C */ - uint32_t RESERVED0[2]; /*!< Reserved, 0x40-0x44 */ - __I uint32_t FIFOCNT; /*!< SDMMC FIFO counter register, Address offset: 0x48 */ - uint32_t RESERVED1[13]; /*!< Reserved, 0x4C-0x7C */ - __IO uint32_t FIFO; /*!< SDMMC data FIFO register, Address offset: 0x80 */ -} SDMMC_TypeDef; - - -/** - * @brief Serial Peripheral Interface - */ - -typedef struct -{ - __IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */ - __IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */ - __IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */ - __IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */ - __IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */ - __IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */ - __IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */ -} SPI_TypeDef; - - -/** - * @brief Single Wire Protocol Master Interface SPWMI - */ - -typedef struct -{ - __IO uint32_t CR; /*!< SWPMI Configuration/Control register, Address offset: 0x00 */ - __IO uint32_t BRR; /*!< SWPMI bitrate register, Address offset: 0x04 */ - uint32_t RESERVED1; /*!< Reserved, 0x08 */ - __IO uint32_t ISR; /*!< SWPMI Interrupt and Status register, Address offset: 0x0C */ - __IO uint32_t ICR; /*!< SWPMI Interrupt Flag Clear register, Address offset: 0x10 */ - __IO uint32_t IER; /*!< SWPMI Interrupt Enable register, Address offset: 0x14 */ - __IO uint32_t RFL; /*!< SWPMI Receive Frame Length register, Address offset: 0x18 */ - __IO uint32_t TDR; /*!< SWPMI Transmit data register, Address offset: 0x1C */ - __IO uint32_t RDR; /*!< SWPMI Receive data register, Address offset: 0x20 */ - __IO uint32_t OR; /*!< SWPMI Option register, Address offset: 0x24 */ -} SWPMI_TypeDef; - - -/** - * @brief System configuration controller - */ - -typedef struct -{ - __IO uint32_t MEMRMP; /*!< SYSCFG memory remap register, Address offset: 0x00 */ - __IO uint32_t CFGR1; /*!< SYSCFG configuration register 1, Address offset: 0x04 */ - __IO uint32_t EXTICR[4]; /*!< SYSCFG external interrupt configuration registers, Address offset: 0x08-0x14 */ - __IO uint32_t SCSR; /*!< SYSCFG SRAM2 control and status register, Address offset: 0x18 */ - __IO uint32_t CFGR2; /*!< SYSCFG configuration register 2, Address offset: 0x1C */ - __IO uint32_t SWPR; /*!< SYSCFG SRAM2 write protection register, Address offset: 0x20 */ - __IO uint32_t SKR; /*!< SYSCFG SRAM2 key register, Address offset: 0x24 */ -} SYSCFG_TypeDef; - - -/** - * @brief TIM - */ - -typedef struct -{ - __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ - __IO uint32_t CR2; /*!< TIM control register 2, Address offset: 0x04 */ - __IO uint32_t SMCR; /*!< TIM slave mode control register, Address offset: 0x08 */ - __IO uint32_t DIER; /*!< TIM DMA/interrupt enable register, Address offset: 0x0C */ - __IO uint32_t SR; /*!< TIM status register, Address offset: 0x10 */ - __IO uint32_t EGR; /*!< TIM event generation register, Address offset: 0x14 */ - __IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ - __IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ - __IO uint32_t CCER; /*!< TIM capture/compare enable register, Address offset: 0x20 */ - __IO uint32_t CNT; /*!< TIM counter register, Address offset: 0x24 */ - __IO uint32_t PSC; /*!< TIM prescaler, Address offset: 0x28 */ - __IO uint32_t ARR; /*!< TIM auto-reload register, Address offset: 0x2C */ - __IO uint32_t RCR; /*!< TIM repetition counter register, Address offset: 0x30 */ - __IO uint32_t CCR1; /*!< TIM capture/compare register 1, Address offset: 0x34 */ - __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */ - __IO uint32_t CCR3; /*!< TIM capture/compare register 3, Address offset: 0x3C */ - __IO uint32_t CCR4; /*!< TIM capture/compare register 4, Address offset: 0x40 */ - __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ - __IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */ - __IO uint32_t DMAR; /*!< TIM DMA address for full transfer, Address offset: 0x4C */ - __IO uint32_t OR1; /*!< TIM option register 1, Address offset: 0x50 */ - __IO uint32_t CCMR3; /*!< TIM capture/compare mode register 3, Address offset: 0x54 */ - __IO uint32_t CCR5; /*!< TIM capture/compare register5, Address offset: 0x58 */ - __IO uint32_t CCR6; /*!< TIM capture/compare register6, Address offset: 0x5C */ - __IO uint32_t OR2; /*!< TIM option register 2, Address offset: 0x60 */ - __IO uint32_t OR3; /*!< TIM option register 3, Address offset: 0x64 */ -} TIM_TypeDef; - - -/** - * @brief Touch Sensing Controller (TSC) - */ - -typedef struct -{ - __IO uint32_t CR; /*!< TSC control register, Address offset: 0x00 */ - __IO uint32_t IER; /*!< TSC interrupt enable register, Address offset: 0x04 */ - __IO uint32_t ICR; /*!< TSC interrupt clear register, Address offset: 0x08 */ - __IO uint32_t ISR; /*!< TSC interrupt status register, Address offset: 0x0C */ - __IO uint32_t IOHCR; /*!< TSC I/O hysteresis control register, Address offset: 0x10 */ - uint32_t RESERVED1; /*!< Reserved, Address offset: 0x14 */ - __IO uint32_t IOASCR; /*!< TSC I/O analog switch control register, Address offset: 0x18 */ - uint32_t RESERVED2; /*!< Reserved, Address offset: 0x1C */ - __IO uint32_t IOSCR; /*!< TSC I/O sampling control register, Address offset: 0x20 */ - uint32_t RESERVED3; /*!< Reserved, Address offset: 0x24 */ - __IO uint32_t IOCCR; /*!< TSC I/O channel control register, Address offset: 0x28 */ - uint32_t RESERVED4; /*!< Reserved, Address offset: 0x2C */ - __IO uint32_t IOGCSR; /*!< TSC I/O group control status register, Address offset: 0x30 */ - __IO uint32_t IOGXCR[8]; /*!< TSC I/O group x counter register, Address offset: 0x34-50 */ -} TSC_TypeDef; - -/** - * @brief Universal Synchronous Asynchronous Receiver Transmitter - */ - -typedef struct -{ - __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ - __IO uint32_t CR2; /*!< USART Control register 2, Address offset: 0x04 */ - __IO uint32_t CR3; /*!< USART Control register 3, Address offset: 0x08 */ - __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x0C */ - __IO uint16_t GTPR; /*!< USART Guard time and prescaler register, Address offset: 0x10 */ - uint16_t RESERVED2; /*!< Reserved, 0x12 */ - __IO uint32_t RTOR; /*!< USART Receiver Time Out register, Address offset: 0x14 */ - __IO uint16_t RQR; /*!< USART Request register, Address offset: 0x18 */ - uint16_t RESERVED3; /*!< Reserved, 0x1A */ - __IO uint32_t ISR; /*!< USART Interrupt and status register, Address offset: 0x1C */ - __IO uint32_t ICR; /*!< USART Interrupt flag Clear register, Address offset: 0x20 */ - __IO uint16_t RDR; /*!< USART Receive Data register, Address offset: 0x24 */ - uint16_t RESERVED4; /*!< Reserved, 0x26 */ - __IO uint16_t TDR; /*!< USART Transmit Data register, Address offset: 0x28 */ - uint16_t RESERVED5; /*!< Reserved, 0x2A */ -} USART_TypeDef; - -/** - * @brief VREFBUF - */ - -typedef struct -{ - __IO uint32_t CSR; /*!< VREFBUF control and status register, Address offset: 0x00 */ - __IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 */ -} VREFBUF_TypeDef; - -/** - * @brief Window WATCHDOG - */ - -typedef struct -{ - __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ - __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ - __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ -} WWDG_TypeDef; - -/** - * @brief RNG - */ - -typedef struct -{ - __IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */ - __IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */ - __IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */ -} RNG_TypeDef; - -/** - * @brief USB_OTG_Core_register - */ -typedef struct -{ - __IO uint32_t GOTGCTL; /*!< USB_OTG Control and Status Register 000h*/ - __IO uint32_t GOTGINT; /*!< USB_OTG Interrupt Register 004h*/ - __IO uint32_t GAHBCFG; /*!< Core AHB Configuration Register 008h*/ - __IO uint32_t GUSBCFG; /*!< Core USB Configuration Register 00Ch*/ - __IO uint32_t GRSTCTL; /*!< Core Reset Register 010h*/ - __IO uint32_t GINTSTS; /*!< Core Interrupt Register 014h*/ - __IO uint32_t GINTMSK; /*!< Core Interrupt Mask Register 018h*/ - __IO uint32_t GRXSTSR; /*!< Receive Sts Q Read Register 01Ch*/ - __IO uint32_t GRXSTSP; /*!< Receive Sts Q Read & POP Register 020h*/ - __IO uint32_t GRXFSIZ; /* Receive FIFO Size Register 024h*/ - __IO uint32_t DIEPTXF0_HNPTXFSIZ; /*!< EP0 / Non Periodic Tx FIFO Size Register 028h*/ - __IO uint32_t HNPTXSTS; /*!< Non Periodic Tx FIFO/Queue Sts reg 02Ch*/ - uint32_t Reserved30[2]; /* Reserved 030h*/ - __IO uint32_t GCCFG; /* General Purpose IO Register 038h*/ - __IO uint32_t CID; /* User ID Register 03Ch*/ - __IO uint32_t GSNPSID; /* USB_OTG core ID 040h*/ - __IO uint32_t GHWCFG1; /* User HW config1 044h*/ - __IO uint32_t GHWCFG2; /* User HW config2 048h*/ - __IO uint32_t GHWCFG3; /* User HW config3 04Ch*/ - uint32_t Reserved6; /* Reserved 050h*/ - __IO uint32_t GLPMCFG; /* LPM Register 054h*/ - __IO uint32_t GPWRDN; /* Power Down Register 058h*/ - __IO uint32_t GDFIFOCFG; /* DFIFO Software Config Register 05Ch*/ - __IO uint32_t GADPCTL; /* ADP Timer, Control and Status Register 60Ch*/ - uint32_t Reserved43[39]; /* Reserved 058h-0FFh*/ - __IO uint32_t HPTXFSIZ; /* Host Periodic Tx FIFO Size Reg 100h*/ - __IO uint32_t DIEPTXF[0x0F]; /* dev Periodic Transmit FIFO */ -} USB_OTG_GlobalTypeDef; - -/** - * @brief USB_OTG_device_Registers - */ -typedef struct -{ - __IO uint32_t DCFG; /* dev Configuration Register 800h*/ - __IO uint32_t DCTL; /* dev Control Register 804h*/ - __IO uint32_t DSTS; /* dev Status Register (RO) 808h*/ - uint32_t Reserved0C; /* Reserved 80Ch*/ - __IO uint32_t DIEPMSK; /* dev IN Endpoint Mask 810h*/ - __IO uint32_t DOEPMSK; /* dev OUT Endpoint Mask 814h*/ - __IO uint32_t DAINT; /* dev All Endpoints Itr Reg 818h*/ - __IO uint32_t DAINTMSK; /* dev All Endpoints Itr Mask 81Ch*/ - uint32_t Reserved20; /* Reserved 820h*/ - uint32_t Reserved9; /* Reserved 824h*/ - __IO uint32_t DVBUSDIS; /* dev VBUS discharge Register 828h*/ - __IO uint32_t DVBUSPULSE; /* dev VBUS Pulse Register 82Ch*/ - __IO uint32_t DTHRCTL; /* dev thr 830h*/ - __IO uint32_t DIEPEMPMSK; /* dev empty msk 834h*/ - __IO uint32_t DEACHINT; /* dedicated EP interrupt 838h*/ - __IO uint32_t DEACHMSK; /* dedicated EP msk 83Ch*/ - uint32_t Reserved40; /* dedicated EP mask 840h*/ - __IO uint32_t DINEP1MSK; /* dedicated EP mask 844h*/ - uint32_t Reserved44[15]; /* Reserved 844-87Ch*/ - __IO uint32_t DOUTEP1MSK; /* dedicated EP msk 884h*/ -} USB_OTG_DeviceTypeDef; - -/** - * @brief USB_OTG_IN_Endpoint-Specific_Register - */ -typedef struct -{ - __IO uint32_t DIEPCTL; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/ - uint32_t Reserved04; /* Reserved 900h + (ep_num * 20h) + 04h*/ - __IO uint32_t DIEPINT; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/ - uint32_t Reserved0C; /* Reserved 900h + (ep_num * 20h) + 0Ch*/ - __IO uint32_t DIEPTSIZ; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/ - __IO uint32_t DIEPDMA; /* IN Endpoint DMA Address Reg 900h + (ep_num * 20h) + 14h*/ - __IO uint32_t DTXFSTS; /*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/ - uint32_t Reserved18; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/ -} USB_OTG_INEndpointTypeDef; - -/** - * @brief USB_OTG_OUT_Endpoint-Specific_Registers - */ -typedef struct -{ - __IO uint32_t DOEPCTL; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/ - uint32_t Reserved04; /* Reserved B00h + (ep_num * 20h) + 04h*/ - __IO uint32_t DOEPINT; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/ - uint32_t Reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/ - __IO uint32_t DOEPTSIZ; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/ - __IO uint32_t DOEPDMA; /* dev OUT Endpoint DMA Address B00h + (ep_num * 20h) + 14h*/ - uint32_t Reserved18[2]; /* Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/ -} USB_OTG_OUTEndpointTypeDef; - -/** - * @brief USB_OTG_Host_Mode_Register_Structures - */ -typedef struct -{ - __IO uint32_t HCFG; /* Host Configuration Register 400h*/ - __IO uint32_t HFIR; /* Host Frame Interval Register 404h*/ - __IO uint32_t HFNUM; /* Host Frame Nbr/Frame Remaining 408h*/ - uint32_t Reserved40C; /* Reserved 40Ch*/ - __IO uint32_t HPTXSTS; /* Host Periodic Tx FIFO/ Queue Status 410h*/ - __IO uint32_t HAINT; /* Host All Channels Interrupt Register 414h*/ - __IO uint32_t HAINTMSK; /* Host All Channels Interrupt Mask 418h*/ -} USB_OTG_HostTypeDef; - -/** - * @brief USB_OTG_Host_Channel_Specific_Registers - */ -typedef struct -{ - __IO uint32_t HCCHAR; - __IO uint32_t HCSPLT; - __IO uint32_t HCINT; - __IO uint32_t HCINTMSK; - __IO uint32_t HCTSIZ; - __IO uint32_t HCDMA; - uint32_t Reserved[2]; -} USB_OTG_HostChannelTypeDef; - -/** - * @} - */ - -/** @addtogroup Peripheral_memory_map - * @{ - */ -#define FLASH_BASE ((uint32_t)0x08000000U) /*!< FLASH(up to 1 MB) base address */ -#define SRAM1_BASE ((uint32_t)0x20000000U) /*!< SRAM1(up to 96 KB) base address */ -#define SRAM2_BASE ((uint32_t)0x10000000U) /*!< SRAM2(32 KB) base address */ -#define PERIPH_BASE ((uint32_t)0x40000000U) /*!< Peripheral base address */ -#define FMC_BASE ((uint32_t)0x60000000U) /*!< FMC base address */ -#define QSPI_BASE ((uint32_t)0x90000000U) /*!< QUADSPI memories accessible over AHB base address */ - -#define FMC_R_BASE ((uint32_t)0xA0000000U) /*!< FMC control registers base address */ -#define QSPI_R_BASE ((uint32_t)0xA0001000U) /*!< QUADSPI control registers base address */ -#define SRAM1_BB_BASE ((uint32_t)0x22000000U) /*!< SRAM1(96 KB) base address in the bit-band region */ -#define PERIPH_BB_BASE ((uint32_t)0x42000000U) /*!< Peripheral base address in the bit-band region */ - -/* Legacy defines */ -#define SRAM_BASE SRAM1_BASE -#define SRAM_BB_BASE SRAM1_BB_BASE - -#define SRAM1_SIZE_MAX ((uint32_t)0x00018000U) /*!< maximum SRAM1 size (up to 96 KBytes) */ -#define SRAM2_SIZE ((uint32_t)0x00008000U) /*!< SRAM2 size (32 KBytes) */ - -/*!< Peripheral memory map */ -#define APB1PERIPH_BASE PERIPH_BASE -#define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000U) -#define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000U) -#define AHB2PERIPH_BASE (PERIPH_BASE + 0x08000000U) - -#define FMC_BANK1 FMC_BASE -#define FMC_BANK1_1 FMC_BANK1 -#define FMC_BANK1_2 (FMC_BANK1 + 0x04000000U) -#define FMC_BANK1_3 (FMC_BANK1 + 0x08000000U) -#define FMC_BANK1_4 (FMC_BANK1 + 0x0C000000U) -#define FMC_BANK3 (FMC_BASE + 0x20000000U) - -/*!< APB1 peripherals */ -#define TIM2_BASE (APB1PERIPH_BASE + 0x0000U) -#define TIM3_BASE (APB1PERIPH_BASE + 0x0400U) -#define TIM4_BASE (APB1PERIPH_BASE + 0x0800U) -#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00U) -#define TIM6_BASE (APB1PERIPH_BASE + 0x1000U) -#define TIM7_BASE (APB1PERIPH_BASE + 0x1400U) -#define LCD_BASE (APB1PERIPH_BASE + 0x2400U) -#define RTC_BASE (APB1PERIPH_BASE + 0x2800U) -#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00U) -#define IWDG_BASE (APB1PERIPH_BASE + 0x3000U) -#define SPI2_BASE (APB1PERIPH_BASE + 0x3800U) -#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00U) -#define USART2_BASE (APB1PERIPH_BASE + 0x4400U) -#define USART3_BASE (APB1PERIPH_BASE + 0x4800U) -#define UART4_BASE (APB1PERIPH_BASE + 0x4C00U) -#define UART5_BASE (APB1PERIPH_BASE + 0x5000U) -#define I2C1_BASE (APB1PERIPH_BASE + 0x5400U) -#define I2C2_BASE (APB1PERIPH_BASE + 0x5800U) -#define I2C3_BASE (APB1PERIPH_BASE + 0x5C00U) -#define CAN1_BASE (APB1PERIPH_BASE + 0x6400U) -#define PWR_BASE (APB1PERIPH_BASE + 0x7000U) -#define DAC_BASE (APB1PERIPH_BASE + 0x7400U) -#define DAC1_BASE (APB1PERIPH_BASE + 0x7400U) -#define OPAMP_BASE (APB1PERIPH_BASE + 0x7800U) -#define OPAMP1_BASE (APB1PERIPH_BASE + 0x7800U) -#define OPAMP2_BASE (APB1PERIPH_BASE + 0x7810U) -#define LPTIM1_BASE (APB1PERIPH_BASE + 0x7C00U) -#define LPUART1_BASE (APB1PERIPH_BASE + 0x8000U) -#define SWPMI1_BASE (APB1PERIPH_BASE + 0x8800U) -#define LPTIM2_BASE (APB1PERIPH_BASE + 0x9400U) - - -/*!< APB2 peripherals */ -#define SYSCFG_BASE (APB2PERIPH_BASE + 0x0000U) -#define VREFBUF_BASE (APB2PERIPH_BASE + 0x0030U) -#define COMP1_BASE (APB2PERIPH_BASE + 0x0200U) -#define COMP2_BASE (APB2PERIPH_BASE + 0x0204U) -#define EXTI_BASE (APB2PERIPH_BASE + 0x0400U) -#define FIREWALL_BASE (APB2PERIPH_BASE + 0x1C00U) -#define SDMMC1_BASE (APB2PERIPH_BASE + 0x2800U) -#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00U) -#define SPI1_BASE (APB2PERIPH_BASE + 0x3000U) -#define TIM8_BASE (APB2PERIPH_BASE + 0x3400U) -#define USART1_BASE (APB2PERIPH_BASE + 0x3800U) -#define TIM15_BASE (APB2PERIPH_BASE + 0x4000U) -#define TIM16_BASE (APB2PERIPH_BASE + 0x4400U) -#define TIM17_BASE (APB2PERIPH_BASE + 0x4800U) -#define SAI1_BASE (APB2PERIPH_BASE + 0x5400U) -#define SAI1_Block_A_BASE (SAI1_BASE + 0x004) -#define SAI1_Block_B_BASE (SAI1_BASE + 0x024) -#define SAI2_BASE (APB2PERIPH_BASE + 0x5800U) -#define SAI2_Block_A_BASE (SAI2_BASE + 0x004) -#define SAI2_Block_B_BASE (SAI2_BASE + 0x024) -#define DFSDM1_BASE (APB2PERIPH_BASE + 0x6000U) -#define DFSDM1_Channel0_BASE (DFSDM1_BASE + 0x00) -#define DFSDM1_Channel1_BASE (DFSDM1_BASE + 0x20) -#define DFSDM1_Channel2_BASE (DFSDM1_BASE + 0x40) -#define DFSDM1_Channel3_BASE (DFSDM1_BASE + 0x60) -#define DFSDM1_Channel4_BASE (DFSDM1_BASE + 0x80) -#define DFSDM1_Channel5_BASE (DFSDM1_BASE + 0xA0) -#define DFSDM1_Channel6_BASE (DFSDM1_BASE + 0xC0) -#define DFSDM1_Channel7_BASE (DFSDM1_BASE + 0xE0) -#define DFSDM1_Filter0_BASE (DFSDM1_BASE + 0x100) -#define DFSDM1_Filter1_BASE (DFSDM1_BASE + 0x180) -#define DFSDM1_Filter2_BASE (DFSDM1_BASE + 0x200) -#define DFSDM1_Filter3_BASE (DFSDM1_BASE + 0x280) - -/*!< AHB1 peripherals */ -#define DMA1_BASE (AHB1PERIPH_BASE) -#define DMA2_BASE (AHB1PERIPH_BASE + 0x0400U) -#define RCC_BASE (AHB1PERIPH_BASE + 0x1000U) -#define FLASH_R_BASE (AHB1PERIPH_BASE + 0x2000U) -#define CRC_BASE (AHB1PERIPH_BASE + 0x3000U) -#define TSC_BASE (AHB1PERIPH_BASE + 0x4000U) - - -#define DMA1_Channel1_BASE (DMA1_BASE + 0x0008U) -#define DMA1_Channel2_BASE (DMA1_BASE + 0x001CU) -#define DMA1_Channel3_BASE (DMA1_BASE + 0x0030U) -#define DMA1_Channel4_BASE (DMA1_BASE + 0x0044U) -#define DMA1_Channel5_BASE (DMA1_BASE + 0x0058U) -#define DMA1_Channel6_BASE (DMA1_BASE + 0x006CU) -#define DMA1_Channel7_BASE (DMA1_BASE + 0x0080U) -#define DMA1_CSELR_BASE (DMA1_BASE + 0x00A8U) - - -#define DMA2_Channel1_BASE (DMA2_BASE + 0x0008U) -#define DMA2_Channel2_BASE (DMA2_BASE + 0x001CU) -#define DMA2_Channel3_BASE (DMA2_BASE + 0x0030U) -#define DMA2_Channel4_BASE (DMA2_BASE + 0x0044U) -#define DMA2_Channel5_BASE (DMA2_BASE + 0x0058U) -#define DMA2_Channel6_BASE (DMA2_BASE + 0x006CU) -#define DMA2_Channel7_BASE (DMA2_BASE + 0x0080U) -#define DMA2_CSELR_BASE (DMA2_BASE + 0x00A8U) - - -/*!< AHB2 peripherals */ -#define GPIOA_BASE (AHB2PERIPH_BASE + 0x0000U) -#define GPIOB_BASE (AHB2PERIPH_BASE + 0x0400U) -#define GPIOC_BASE (AHB2PERIPH_BASE + 0x0800U) -#define GPIOD_BASE (AHB2PERIPH_BASE + 0x0C00U) -#define GPIOE_BASE (AHB2PERIPH_BASE + 0x1000U) -#define GPIOF_BASE (AHB2PERIPH_BASE + 0x1400U) -#define GPIOG_BASE (AHB2PERIPH_BASE + 0x1800U) -#define GPIOH_BASE (AHB2PERIPH_BASE + 0x1C00U) - -#define USBOTG_BASE (AHB2PERIPH_BASE + 0x08000000U) - -#define ADC1_BASE (AHB2PERIPH_BASE + 0x08040000U) -#define ADC2_BASE (AHB2PERIPH_BASE + 0x08040100U) -#define ADC3_BASE (AHB2PERIPH_BASE + 0x08040200U) -#define ADC123_COMMON_BASE (AHB2PERIPH_BASE + 0x08040300U) - - -#define RNG_BASE (AHB2PERIPH_BASE + 0x08060800U) - - -/*!< FMC Banks registers base address */ -#define FMC_Bank1_R_BASE (FMC_R_BASE + 0x0000U) -#define FMC_Bank1E_R_BASE (FMC_R_BASE + 0x0104U) -#define FMC_Bank3_R_BASE (FMC_R_BASE + 0x0080U) - -/* Debug MCU registers base address */ -#define DBGMCU_BASE ((uint32_t)0xE0042000U) - -/*!< USB registers base address */ -#define USB_OTG_FS_PERIPH_BASE ((uint32_t)0x50000000U) - -#define USB_OTG_GLOBAL_BASE ((uint32_t)0x00000000U) -#define USB_OTG_DEVICE_BASE ((uint32_t)0x00000800U) -#define USB_OTG_IN_ENDPOINT_BASE ((uint32_t)0x00000900U) -#define USB_OTG_OUT_ENDPOINT_BASE ((uint32_t)0x00000B00U) -#define USB_OTG_EP_REG_SIZE ((uint32_t)0x00000020U) -#define USB_OTG_HOST_BASE ((uint32_t)0x00000400U) -#define USB_OTG_HOST_PORT_BASE ((uint32_t)0x00000440U) -#define USB_OTG_HOST_CHANNEL_BASE ((uint32_t)0x00000500U) -#define USB_OTG_HOST_CHANNEL_SIZE ((uint32_t)0x00000020U) -#define USB_OTG_PCGCCTL_BASE ((uint32_t)0x00000E00U) -#define USB_OTG_FIFO_BASE ((uint32_t)0x00001000U) -#define USB_OTG_FIFO_SIZE ((uint32_t)0x00001000U) - - -#define PACKAGE_BASE ((uint32_t)0x1FFF7500U) /*!< Package data register base address */ -#define UID_BASE ((uint32_t)0x1FFF7590U) /*!< Unique device ID register base address */ -#define FLASHSIZE_BASE ((uint32_t)0x1FFF75E0U) /*!< Flash size data register base address */ -/** - * @} - */ - -/** @addtogroup Peripheral_declaration - * @{ - */ -#define TIM2 ((TIM_TypeDef *) TIM2_BASE) -#define TIM3 ((TIM_TypeDef *) TIM3_BASE) -#define TIM4 ((TIM_TypeDef *) TIM4_BASE) -#define TIM5 ((TIM_TypeDef *) TIM5_BASE) -#define TIM6 ((TIM_TypeDef *) TIM6_BASE) -#define TIM7 ((TIM_TypeDef *) TIM7_BASE) -#define LCD ((LCD_TypeDef *) LCD_BASE) -#define RTC ((RTC_TypeDef *) RTC_BASE) -#define WWDG ((WWDG_TypeDef *) WWDG_BASE) -#define IWDG ((IWDG_TypeDef *) IWDG_BASE) -#define SPI2 ((SPI_TypeDef *) SPI2_BASE) -#define SPI3 ((SPI_TypeDef *) SPI3_BASE) -#define USART2 ((USART_TypeDef *) USART2_BASE) -#define USART3 ((USART_TypeDef *) USART3_BASE) -#define UART4 ((USART_TypeDef *) UART4_BASE) -#define UART5 ((USART_TypeDef *) UART5_BASE) -#define I2C1 ((I2C_TypeDef *) I2C1_BASE) -#define I2C2 ((I2C_TypeDef *) I2C2_BASE) -#define I2C3 ((I2C_TypeDef *) I2C3_BASE) -#define CAN ((CAN_TypeDef *) CAN1_BASE) -#define CAN1 ((CAN_TypeDef *) CAN1_BASE) -#define PWR ((PWR_TypeDef *) PWR_BASE) -#define DAC ((DAC_TypeDef *) DAC1_BASE) -#define DAC1 ((DAC_TypeDef *) DAC1_BASE) -#define OPAMP ((OPAMP_TypeDef *) OPAMP_BASE) -#define OPAMP1 ((OPAMP_TypeDef *) OPAMP1_BASE) -#define OPAMP2 ((OPAMP_TypeDef *) OPAMP2_BASE) -#define OPAMP12_COMMON ((OPAMP_Common_TypeDef *) OPAMP1_BASE) -#define LPTIM1 ((LPTIM_TypeDef *) LPTIM1_BASE) -#define LPUART1 ((USART_TypeDef *) LPUART1_BASE) -#define SWPMI1 ((SWPMI_TypeDef *) SWPMI1_BASE) -#define LPTIM2 ((LPTIM_TypeDef *) LPTIM2_BASE) - -#define SYSCFG ((SYSCFG_TypeDef *) SYSCFG_BASE) -#define VREFBUF ((VREFBUF_TypeDef *) VREFBUF_BASE) -#define COMP1 ((COMP_TypeDef *) COMP1_BASE) -#define COMP2 ((COMP_TypeDef *) COMP2_BASE) -#define COMP12_COMMON ((COMP_Common_TypeDef *) COMP2_BASE) -#define EXTI ((EXTI_TypeDef *) EXTI_BASE) -#define FIREWALL ((FIREWALL_TypeDef *) FIREWALL_BASE) -#define SDMMC1 ((SDMMC_TypeDef *) SDMMC1_BASE) -#define TIM1 ((TIM_TypeDef *) TIM1_BASE) -#define SPI1 ((SPI_TypeDef *) SPI1_BASE) -#define TIM8 ((TIM_TypeDef *) TIM8_BASE) -#define USART1 ((USART_TypeDef *) USART1_BASE) -#define TIM15 ((TIM_TypeDef *) TIM15_BASE) -#define TIM16 ((TIM_TypeDef *) TIM16_BASE) -#define TIM17 ((TIM_TypeDef *) TIM17_BASE) -#define SAI1 ((SAI_TypeDef *) SAI1_BASE) -#define SAI1_Block_A ((SAI_Block_TypeDef *)SAI1_Block_A_BASE) -#define SAI1_Block_B ((SAI_Block_TypeDef *)SAI1_Block_B_BASE) -#define SAI2 ((SAI_TypeDef *) SAI2_BASE) -#define SAI2_Block_A ((SAI_Block_TypeDef *)SAI2_Block_A_BASE) -#define SAI2_Block_B ((SAI_Block_TypeDef *)SAI2_Block_B_BASE) -#define DFSDM1_Channel0 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel0_BASE) -#define DFSDM1_Channel1 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel1_BASE) -#define DFSDM1_Channel2 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel2_BASE) -#define DFSDM1_Channel3 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel3_BASE) -#define DFSDM1_Channel4 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel4_BASE) -#define DFSDM1_Channel5 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel5_BASE) -#define DFSDM1_Channel6 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel6_BASE) -#define DFSDM1_Channel7 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel7_BASE) -#define DFSDM1_Filter0 ((DFSDM_Filter_TypeDef *) DFSDM1_Filter0_BASE) -#define DFSDM1_Filter1 ((DFSDM_Filter_TypeDef *) DFSDM1_Filter1_BASE) -#define DFSDM1_Filter2 ((DFSDM_Filter_TypeDef *) DFSDM1_Filter2_BASE) -#define DFSDM1_Filter3 ((DFSDM_Filter_TypeDef *) DFSDM1_Filter3_BASE) -/* Aliases to keep compatibility after DFSDM renaming */ -#define DFSDM_Channel0 DFSDM1_Channel0 -#define DFSDM_Channel1 DFSDM1_Channel1 -#define DFSDM_Channel2 DFSDM1_Channel2 -#define DFSDM_Channel3 DFSDM1_Channel3 -#define DFSDM_Channel4 DFSDM1_Channel4 -#define DFSDM_Channel5 DFSDM1_Channel5 -#define DFSDM_Channel6 DFSDM1_Channel6 -#define DFSDM_Channel7 DFSDM1_Channel7 -#define DFSDM_Filter0 DFSDM1_Filter0 -#define DFSDM_Filter1 DFSDM1_Filter1 -#define DFSDM_Filter2 DFSDM1_Filter2 -#define DFSDM_Filter3 DFSDM1_Filter3 -#define DMA1 ((DMA_TypeDef *) DMA1_BASE) -#define DMA2 ((DMA_TypeDef *) DMA2_BASE) -#define RCC ((RCC_TypeDef *) RCC_BASE) -#define FLASH ((FLASH_TypeDef *) FLASH_R_BASE) -#define CRC ((CRC_TypeDef *) CRC_BASE) -#define TSC ((TSC_TypeDef *) TSC_BASE) - -#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) -#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) -#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) -#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) -#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) -#define GPIOF ((GPIO_TypeDef *) GPIOF_BASE) -#define GPIOG ((GPIO_TypeDef *) GPIOG_BASE) -#define GPIOH ((GPIO_TypeDef *) GPIOH_BASE) -#define ADC1 ((ADC_TypeDef *) ADC1_BASE) -#define ADC2 ((ADC_TypeDef *) ADC2_BASE) -#define ADC3 ((ADC_TypeDef *) ADC3_BASE) -#define ADC123_COMMON ((ADC_Common_TypeDef *) ADC123_COMMON_BASE) -#define RNG ((RNG_TypeDef *) RNG_BASE) - - -#define DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE) -#define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE) -#define DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE) -#define DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE) -#define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE) -#define DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE) -#define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE) -#define DMA1_CSELR ((DMA_Request_TypeDef *) DMA1_CSELR_BASE) - - -#define DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE) -#define DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE) -#define DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE) -#define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE) -#define DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE) -#define DMA2_Channel6 ((DMA_Channel_TypeDef *) DMA2_Channel6_BASE) -#define DMA2_Channel7 ((DMA_Channel_TypeDef *) DMA2_Channel7_BASE) -#define DMA2_CSELR ((DMA_Request_TypeDef *) DMA2_CSELR_BASE) - - -#define FMC_Bank1_R ((FMC_Bank1_TypeDef *) FMC_Bank1_R_BASE) -#define FMC_Bank1E_R ((FMC_Bank1E_TypeDef *) FMC_Bank1E_R_BASE) -#define FMC_Bank3_R ((FMC_Bank3_TypeDef *) FMC_Bank3_R_BASE) - -#define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE) - -#define DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE) - -#define USB_OTG_FS ((USB_OTG_GlobalTypeDef *) USB_OTG_FS_PERIPH_BASE) -/** - * @} - */ - -/** @addtogroup Exported_constants - * @{ - */ - -/** @addtogroup Peripheral_Registers_Bits_Definition - * @{ - */ - -/******************************************************************************/ -/* Peripheral Registers_Bits_Definition */ -/******************************************************************************/ - -/******************************************************************************/ -/* */ -/* Analog to Digital Converter */ -/* */ -/******************************************************************************/ - -/* - * @brief Specific device feature definitions (not present on all devices in the STM32L4 serie) - */ -#define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ - -/******************** Bit definition for ADC_ISR register *******************/ -#define ADC_ISR_ADRDY_Pos (0U) -#define ADC_ISR_ADRDY_Msk (0x1U << ADC_ISR_ADRDY_Pos) /*!< 0x00000001 */ -#define ADC_ISR_ADRDY ADC_ISR_ADRDY_Msk /*!< ADC ready flag */ -#define ADC_ISR_EOSMP_Pos (1U) -#define ADC_ISR_EOSMP_Msk (0x1U << ADC_ISR_EOSMP_Pos) /*!< 0x00000002 */ -#define ADC_ISR_EOSMP ADC_ISR_EOSMP_Msk /*!< ADC group regular end of sampling flag */ -#define ADC_ISR_EOC_Pos (2U) -#define ADC_ISR_EOC_Msk (0x1U << ADC_ISR_EOC_Pos) /*!< 0x00000004 */ -#define ADC_ISR_EOC ADC_ISR_EOC_Msk /*!< ADC group regular end of unitary conversion flag */ -#define ADC_ISR_EOS_Pos (3U) -#define ADC_ISR_EOS_Msk (0x1U << ADC_ISR_EOS_Pos) /*!< 0x00000008 */ -#define ADC_ISR_EOS ADC_ISR_EOS_Msk /*!< ADC group regular end of sequence conversions flag */ -#define ADC_ISR_OVR_Pos (4U) -#define ADC_ISR_OVR_Msk (0x1U << ADC_ISR_OVR_Pos) /*!< 0x00000010 */ -#define ADC_ISR_OVR ADC_ISR_OVR_Msk /*!< ADC group regular overrun flag */ -#define ADC_ISR_JEOC_Pos (5U) -#define ADC_ISR_JEOC_Msk (0x1U << ADC_ISR_JEOC_Pos) /*!< 0x00000020 */ -#define ADC_ISR_JEOC ADC_ISR_JEOC_Msk /*!< ADC group injected end of unitary conversion flag */ -#define ADC_ISR_JEOS_Pos (6U) -#define ADC_ISR_JEOS_Msk (0x1U << ADC_ISR_JEOS_Pos) /*!< 0x00000040 */ -#define ADC_ISR_JEOS ADC_ISR_JEOS_Msk /*!< ADC group injected end of sequence conversions flag */ -#define ADC_ISR_AWD1_Pos (7U) -#define ADC_ISR_AWD1_Msk (0x1U << ADC_ISR_AWD1_Pos) /*!< 0x00000080 */ -#define ADC_ISR_AWD1 ADC_ISR_AWD1_Msk /*!< ADC analog watchdog 1 flag */ -#define ADC_ISR_AWD2_Pos (8U) -#define ADC_ISR_AWD2_Msk (0x1U << ADC_ISR_AWD2_Pos) /*!< 0x00000100 */ -#define ADC_ISR_AWD2 ADC_ISR_AWD2_Msk /*!< ADC analog watchdog 2 flag */ -#define ADC_ISR_AWD3_Pos (9U) -#define ADC_ISR_AWD3_Msk (0x1U << ADC_ISR_AWD3_Pos) /*!< 0x00000200 */ -#define ADC_ISR_AWD3 ADC_ISR_AWD3_Msk /*!< ADC analog watchdog 3 flag */ -#define ADC_ISR_JQOVF_Pos (10U) -#define ADC_ISR_JQOVF_Msk (0x1U << ADC_ISR_JQOVF_Pos) /*!< 0x00000400 */ -#define ADC_ISR_JQOVF ADC_ISR_JQOVF_Msk /*!< ADC group injected contexts queue overflow flag */ - -/******************** Bit definition for ADC_IER register *******************/ -#define ADC_IER_ADRDYIE_Pos (0U) -#define ADC_IER_ADRDYIE_Msk (0x1U << ADC_IER_ADRDYIE_Pos) /*!< 0x00000001 */ -#define ADC_IER_ADRDYIE ADC_IER_ADRDYIE_Msk /*!< ADC ready interrupt */ -#define ADC_IER_EOSMPIE_Pos (1U) -#define ADC_IER_EOSMPIE_Msk (0x1U << ADC_IER_EOSMPIE_Pos) /*!< 0x00000002 */ -#define ADC_IER_EOSMPIE ADC_IER_EOSMPIE_Msk /*!< ADC group regular end of sampling interrupt */ -#define ADC_IER_EOCIE_Pos (2U) -#define ADC_IER_EOCIE_Msk (0x1U << ADC_IER_EOCIE_Pos) /*!< 0x00000004 */ -#define ADC_IER_EOCIE ADC_IER_EOCIE_Msk /*!< ADC group regular end of unitary conversion interrupt */ -#define ADC_IER_EOSIE_Pos (3U) -#define ADC_IER_EOSIE_Msk (0x1U << ADC_IER_EOSIE_Pos) /*!< 0x00000008 */ -#define ADC_IER_EOSIE ADC_IER_EOSIE_Msk /*!< ADC group regular end of sequence conversions interrupt */ -#define ADC_IER_OVRIE_Pos (4U) -#define ADC_IER_OVRIE_Msk (0x1U << ADC_IER_OVRIE_Pos) /*!< 0x00000010 */ -#define ADC_IER_OVRIE ADC_IER_OVRIE_Msk /*!< ADC group regular overrun interrupt */ -#define ADC_IER_JEOCIE_Pos (5U) -#define ADC_IER_JEOCIE_Msk (0x1U << ADC_IER_JEOCIE_Pos) /*!< 0x00000020 */ -#define ADC_IER_JEOCIE ADC_IER_JEOCIE_Msk /*!< ADC group injected end of unitary conversion interrupt */ -#define ADC_IER_JEOSIE_Pos (6U) -#define ADC_IER_JEOSIE_Msk (0x1U << ADC_IER_JEOSIE_Pos) /*!< 0x00000040 */ -#define ADC_IER_JEOSIE ADC_IER_JEOSIE_Msk /*!< ADC group injected end of sequence conversions interrupt */ -#define ADC_IER_AWD1IE_Pos (7U) -#define ADC_IER_AWD1IE_Msk (0x1U << ADC_IER_AWD1IE_Pos) /*!< 0x00000080 */ -#define ADC_IER_AWD1IE ADC_IER_AWD1IE_Msk /*!< ADC analog watchdog 1 interrupt */ -#define ADC_IER_AWD2IE_Pos (8U) -#define ADC_IER_AWD2IE_Msk (0x1U << ADC_IER_AWD2IE_Pos) /*!< 0x00000100 */ -#define ADC_IER_AWD2IE ADC_IER_AWD2IE_Msk /*!< ADC analog watchdog 2 interrupt */ -#define ADC_IER_AWD3IE_Pos (9U) -#define ADC_IER_AWD3IE_Msk (0x1U << ADC_IER_AWD3IE_Pos) /*!< 0x00000200 */ -#define ADC_IER_AWD3IE ADC_IER_AWD3IE_Msk /*!< ADC analog watchdog 3 interrupt */ -#define ADC_IER_JQOVFIE_Pos (10U) -#define ADC_IER_JQOVFIE_Msk (0x1U << ADC_IER_JQOVFIE_Pos) /*!< 0x00000400 */ -#define ADC_IER_JQOVFIE ADC_IER_JQOVFIE_Msk /*!< ADC group injected contexts queue overflow interrupt */ - -/* Legacy defines */ -#define ADC_IER_ADRDY (ADC_IER_ADRDYIE) -#define ADC_IER_EOSMP (ADC_IER_EOSMPIE) -#define ADC_IER_EOC (ADC_IER_EOCIE) -#define ADC_IER_EOS (ADC_IER_EOSIE) -#define ADC_IER_OVR (ADC_IER_OVRIE) -#define ADC_IER_JEOC (ADC_IER_JEOCIE) -#define ADC_IER_JEOS (ADC_IER_JEOSIE) -#define ADC_IER_AWD1 (ADC_IER_AWD1IE) -#define ADC_IER_AWD2 (ADC_IER_AWD2IE) -#define ADC_IER_AWD3 (ADC_IER_AWD3IE) -#define ADC_IER_JQOVF (ADC_IER_JQOVFIE) - -/******************** Bit definition for ADC_CR register ********************/ -#define ADC_CR_ADEN_Pos (0U) -#define ADC_CR_ADEN_Msk (0x1U << ADC_CR_ADEN_Pos) /*!< 0x00000001 */ -#define ADC_CR_ADEN ADC_CR_ADEN_Msk /*!< ADC enable */ -#define ADC_CR_ADDIS_Pos (1U) -#define ADC_CR_ADDIS_Msk (0x1U << ADC_CR_ADDIS_Pos) /*!< 0x00000002 */ -#define ADC_CR_ADDIS ADC_CR_ADDIS_Msk /*!< ADC disable */ -#define ADC_CR_ADSTART_Pos (2U) -#define ADC_CR_ADSTART_Msk (0x1U << ADC_CR_ADSTART_Pos) /*!< 0x00000004 */ -#define ADC_CR_ADSTART ADC_CR_ADSTART_Msk /*!< ADC group regular conversion start */ -#define ADC_CR_JADSTART_Pos (3U) -#define ADC_CR_JADSTART_Msk (0x1U << ADC_CR_JADSTART_Pos) /*!< 0x00000008 */ -#define ADC_CR_JADSTART ADC_CR_JADSTART_Msk /*!< ADC group injected conversion start */ -#define ADC_CR_ADSTP_Pos (4U) -#define ADC_CR_ADSTP_Msk (0x1U << ADC_CR_ADSTP_Pos) /*!< 0x00000010 */ -#define ADC_CR_ADSTP ADC_CR_ADSTP_Msk /*!< ADC group regular conversion stop */ -#define ADC_CR_JADSTP_Pos (5U) -#define ADC_CR_JADSTP_Msk (0x1U << ADC_CR_JADSTP_Pos) /*!< 0x00000020 */ -#define ADC_CR_JADSTP ADC_CR_JADSTP_Msk /*!< ADC group injected conversion stop */ -#define ADC_CR_ADVREGEN_Pos (28U) -#define ADC_CR_ADVREGEN_Msk (0x1U << ADC_CR_ADVREGEN_Pos) /*!< 0x10000000 */ -#define ADC_CR_ADVREGEN ADC_CR_ADVREGEN_Msk /*!< ADC voltage regulator enable */ -#define ADC_CR_DEEPPWD_Pos (29U) -#define ADC_CR_DEEPPWD_Msk (0x1U << ADC_CR_DEEPPWD_Pos) /*!< 0x20000000 */ -#define ADC_CR_DEEPPWD ADC_CR_DEEPPWD_Msk /*!< ADC deep power down enable */ -#define ADC_CR_ADCALDIF_Pos (30U) -#define ADC_CR_ADCALDIF_Msk (0x1U << ADC_CR_ADCALDIF_Pos) /*!< 0x40000000 */ -#define ADC_CR_ADCALDIF ADC_CR_ADCALDIF_Msk /*!< ADC differential mode for calibration */ -#define ADC_CR_ADCAL_Pos (31U) -#define ADC_CR_ADCAL_Msk (0x1U << ADC_CR_ADCAL_Pos) /*!< 0x80000000 */ -#define ADC_CR_ADCAL ADC_CR_ADCAL_Msk /*!< ADC calibration */ - -/******************** Bit definition for ADC_CFGR register ******************/ -#define ADC_CFGR_DMAEN_Pos (0U) -#define ADC_CFGR_DMAEN_Msk (0x1U << ADC_CFGR_DMAEN_Pos) /*!< 0x00000001 */ -#define ADC_CFGR_DMAEN ADC_CFGR_DMAEN_Msk /*!< ADC DMA transfer enable */ -#define ADC_CFGR_DMACFG_Pos (1U) -#define ADC_CFGR_DMACFG_Msk (0x1U << ADC_CFGR_DMACFG_Pos) /*!< 0x00000002 */ -#define ADC_CFGR_DMACFG ADC_CFGR_DMACFG_Msk /*!< ADC DMA transfer configuration */ - -#define ADC_CFGR_RES_Pos (3U) -#define ADC_CFGR_RES_Msk (0x3U << ADC_CFGR_RES_Pos) /*!< 0x00000018 */ -#define ADC_CFGR_RES ADC_CFGR_RES_Msk /*!< ADC data resolution */ -#define ADC_CFGR_RES_0 (0x1U << ADC_CFGR_RES_Pos) /*!< 0x00000008 */ -#define ADC_CFGR_RES_1 (0x2U << ADC_CFGR_RES_Pos) /*!< 0x00000010 */ - -#define ADC_CFGR_ALIGN_Pos (5U) -#define ADC_CFGR_ALIGN_Msk (0x1U << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ - -#define ADC_CFGR_EXTSEL_Pos (6U) -#define ADC_CFGR_EXTSEL_Msk (0xFU << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ -#define ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_Msk /*!< ADC group regular external trigger source */ -#define ADC_CFGR_EXTSEL_0 (0x1U << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000040 */ -#define ADC_CFGR_EXTSEL_1 (0x2U << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000080 */ -#define ADC_CFGR_EXTSEL_2 (0x4U << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000100 */ -#define ADC_CFGR_EXTSEL_3 (0x8U << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000200 */ - -#define ADC_CFGR_EXTEN_Pos (10U) -#define ADC_CFGR_EXTEN_Msk (0x3U << ADC_CFGR_EXTEN_Pos) /*!< 0x00000C00 */ -#define ADC_CFGR_EXTEN ADC_CFGR_EXTEN_Msk /*!< ADC group regular external trigger polarity */ -#define ADC_CFGR_EXTEN_0 (0x1U << ADC_CFGR_EXTEN_Pos) /*!< 0x00000400 */ -#define ADC_CFGR_EXTEN_1 (0x2U << ADC_CFGR_EXTEN_Pos) /*!< 0x00000800 */ - -#define ADC_CFGR_OVRMOD_Pos (12U) -#define ADC_CFGR_OVRMOD_Msk (0x1U << ADC_CFGR_OVRMOD_Pos) /*!< 0x00001000 */ -#define ADC_CFGR_OVRMOD ADC_CFGR_OVRMOD_Msk /*!< ADC group regular overrun configuration */ -#define ADC_CFGR_CONT_Pos (13U) -#define ADC_CFGR_CONT_Msk (0x1U << ADC_CFGR_CONT_Pos) /*!< 0x00002000 */ -#define ADC_CFGR_CONT ADC_CFGR_CONT_Msk /*!< ADC group regular continuous conversion mode */ -#define ADC_CFGR_AUTDLY_Pos (14U) -#define ADC_CFGR_AUTDLY_Msk (0x1U << ADC_CFGR_AUTDLY_Pos) /*!< 0x00004000 */ -#define ADC_CFGR_AUTDLY ADC_CFGR_AUTDLY_Msk /*!< ADC low power auto wait */ - -#define ADC_CFGR_DISCEN_Pos (16U) -#define ADC_CFGR_DISCEN_Msk (0x1U << ADC_CFGR_DISCEN_Pos) /*!< 0x00010000 */ -#define ADC_CFGR_DISCEN ADC_CFGR_DISCEN_Msk /*!< ADC group regular sequencer discontinuous mode */ - -#define ADC_CFGR_DISCNUM_Pos (17U) -#define ADC_CFGR_DISCNUM_Msk (0x7U << ADC_CFGR_DISCNUM_Pos) /*!< 0x000E0000 */ -#define ADC_CFGR_DISCNUM ADC_CFGR_DISCNUM_Msk /*!< ADC group regular sequencer discontinuous number of ranks */ -#define ADC_CFGR_DISCNUM_0 (0x1U << ADC_CFGR_DISCNUM_Pos) /*!< 0x00020000 */ -#define ADC_CFGR_DISCNUM_1 (0x2U << ADC_CFGR_DISCNUM_Pos) /*!< 0x00040000 */ -#define ADC_CFGR_DISCNUM_2 (0x4U << ADC_CFGR_DISCNUM_Pos) /*!< 0x00080000 */ - -#define ADC_CFGR_JDISCEN_Pos (20U) -#define ADC_CFGR_JDISCEN_Msk (0x1U << ADC_CFGR_JDISCEN_Pos) /*!< 0x00100000 */ -#define ADC_CFGR_JDISCEN ADC_CFGR_JDISCEN_Msk /*!< ADC group injected sequencer discontinuous mode */ -#define ADC_CFGR_JQM_Pos (21U) -#define ADC_CFGR_JQM_Msk (0x1U << ADC_CFGR_JQM_Pos) /*!< 0x00200000 */ -#define ADC_CFGR_JQM ADC_CFGR_JQM_Msk /*!< ADC group injected contexts queue mode */ -#define ADC_CFGR_AWD1SGL_Pos (22U) -#define ADC_CFGR_AWD1SGL_Msk (0x1U << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */ -#define ADC_CFGR_AWD1SGL ADC_CFGR_AWD1SGL_Msk /*!< ADC analog watchdog 1 monitoring a single channel or all channels */ -#define ADC_CFGR_AWD1EN_Pos (23U) -#define ADC_CFGR_AWD1EN_Msk (0x1U << ADC_CFGR_AWD1EN_Pos) /*!< 0x00800000 */ -#define ADC_CFGR_AWD1EN ADC_CFGR_AWD1EN_Msk /*!< ADC analog watchdog 1 enable on scope ADC group regular */ -#define ADC_CFGR_JAWD1EN_Pos (24U) -#define ADC_CFGR_JAWD1EN_Msk (0x1U << ADC_CFGR_JAWD1EN_Pos) /*!< 0x01000000 */ -#define ADC_CFGR_JAWD1EN ADC_CFGR_JAWD1EN_Msk /*!< ADC analog watchdog 1 enable on scope ADC group injected */ -#define ADC_CFGR_JAUTO_Pos (25U) -#define ADC_CFGR_JAUTO_Msk (0x1U << ADC_CFGR_JAUTO_Pos) /*!< 0x02000000 */ -#define ADC_CFGR_JAUTO ADC_CFGR_JAUTO_Msk /*!< ADC group injected automatic trigger mode */ - -#define ADC_CFGR_AWD1CH_Pos (26U) -#define ADC_CFGR_AWD1CH_Msk (0x1FU << ADC_CFGR_AWD1CH_Pos) /*!< 0x7C000000 */ -#define ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_Msk /*!< ADC analog watchdog 1 monitored channel selection */ -#define ADC_CFGR_AWD1CH_0 (0x01U << ADC_CFGR_AWD1CH_Pos) /*!< 0x04000000 */ -#define ADC_CFGR_AWD1CH_1 (0x02U << ADC_CFGR_AWD1CH_Pos) /*!< 0x08000000 */ -#define ADC_CFGR_AWD1CH_2 (0x04U << ADC_CFGR_AWD1CH_Pos) /*!< 0x10000000 */ -#define ADC_CFGR_AWD1CH_3 (0x08U << ADC_CFGR_AWD1CH_Pos) /*!< 0x20000000 */ -#define ADC_CFGR_AWD1CH_4 (0x10U << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ - -#define ADC_CFGR_JQDIS_Pos (31U) -#define ADC_CFGR_JQDIS_Msk (0x1U << ADC_CFGR_JQDIS_Pos) /*!< 0x80000000 */ -#define ADC_CFGR_JQDIS ADC_CFGR_JQDIS_Msk /*!< ADC group injected contexts queue disable */ - -/******************** Bit definition for ADC_CFGR2 register *****************/ -#define ADC_CFGR2_ROVSE_Pos (0U) -#define ADC_CFGR2_ROVSE_Msk (0x1U << ADC_CFGR2_ROVSE_Pos) /*!< 0x00000001 */ -#define ADC_CFGR2_ROVSE ADC_CFGR2_ROVSE_Msk /*!< ADC oversampler enable on scope ADC group regular */ -#define ADC_CFGR2_JOVSE_Pos (1U) -#define ADC_CFGR2_JOVSE_Msk (0x1U << ADC_CFGR2_JOVSE_Pos) /*!< 0x00000002 */ -#define ADC_CFGR2_JOVSE ADC_CFGR2_JOVSE_Msk /*!< ADC oversampler enable on scope ADC group injected */ - -#define ADC_CFGR2_OVSR_Pos (2U) -#define ADC_CFGR2_OVSR_Msk (0x7U << ADC_CFGR2_OVSR_Pos) /*!< 0x0000001C */ -#define ADC_CFGR2_OVSR ADC_CFGR2_OVSR_Msk /*!< ADC oversampling ratio */ -#define ADC_CFGR2_OVSR_0 (0x1U << ADC_CFGR2_OVSR_Pos) /*!< 0x00000004 */ -#define ADC_CFGR2_OVSR_1 (0x2U << ADC_CFGR2_OVSR_Pos) /*!< 0x00000008 */ -#define ADC_CFGR2_OVSR_2 (0x4U << ADC_CFGR2_OVSR_Pos) /*!< 0x00000010 */ - -#define ADC_CFGR2_OVSS_Pos (5U) -#define ADC_CFGR2_OVSS_Msk (0xFU << ADC_CFGR2_OVSS_Pos) /*!< 0x000001E0 */ -#define ADC_CFGR2_OVSS ADC_CFGR2_OVSS_Msk /*!< ADC oversampling shift */ -#define ADC_CFGR2_OVSS_0 (0x1U << ADC_CFGR2_OVSS_Pos) /*!< 0x00000020 */ -#define ADC_CFGR2_OVSS_1 (0x2U << ADC_CFGR2_OVSS_Pos) /*!< 0x00000040 */ -#define ADC_CFGR2_OVSS_2 (0x4U << ADC_CFGR2_OVSS_Pos) /*!< 0x00000080 */ -#define ADC_CFGR2_OVSS_3 (0x8U << ADC_CFGR2_OVSS_Pos) /*!< 0x00000100 */ - -#define ADC_CFGR2_TROVS_Pos (9U) -#define ADC_CFGR2_TROVS_Msk (0x1U << ADC_CFGR2_TROVS_Pos) /*!< 0x00000200 */ -#define ADC_CFGR2_TROVS ADC_CFGR2_TROVS_Msk /*!< ADC oversampling discontinuous mode (triggered mode) for ADC group regular */ -#define ADC_CFGR2_ROVSM_Pos (10U) -#define ADC_CFGR2_ROVSM_Msk (0x1U << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */ -#define ADC_CFGR2_ROVSM ADC_CFGR2_ROVSM_Msk /*!< ADC oversampling mode managing interlaced conversions of ADC group regular and group injected */ - -/******************** Bit definition for ADC_SMPR1 register *****************/ -#define ADC_SMPR1_SMP0_Pos (0U) -#define ADC_SMPR1_SMP0_Msk (0x7U << ADC_SMPR1_SMP0_Pos) /*!< 0x00000007 */ -#define ADC_SMPR1_SMP0 ADC_SMPR1_SMP0_Msk /*!< ADC channel 0 sampling time selection */ -#define ADC_SMPR1_SMP0_0 (0x1U << ADC_SMPR1_SMP0_Pos) /*!< 0x00000001 */ -#define ADC_SMPR1_SMP0_1 (0x2U << ADC_SMPR1_SMP0_Pos) /*!< 0x00000002 */ -#define ADC_SMPR1_SMP0_2 (0x4U << ADC_SMPR1_SMP0_Pos) /*!< 0x00000004 */ - -#define ADC_SMPR1_SMP1_Pos (3U) -#define ADC_SMPR1_SMP1_Msk (0x7U << ADC_SMPR1_SMP1_Pos) /*!< 0x00000038 */ -#define ADC_SMPR1_SMP1 ADC_SMPR1_SMP1_Msk /*!< ADC channel 1 sampling time selection */ -#define ADC_SMPR1_SMP1_0 (0x1U << ADC_SMPR1_SMP1_Pos) /*!< 0x00000008 */ -#define ADC_SMPR1_SMP1_1 (0x2U << ADC_SMPR1_SMP1_Pos) /*!< 0x00000010 */ -#define ADC_SMPR1_SMP1_2 (0x4U << ADC_SMPR1_SMP1_Pos) /*!< 0x00000020 */ - -#define ADC_SMPR1_SMP2_Pos (6U) -#define ADC_SMPR1_SMP2_Msk (0x7U << ADC_SMPR1_SMP2_Pos) /*!< 0x000001C0 */ -#define ADC_SMPR1_SMP2 ADC_SMPR1_SMP2_Msk /*!< ADC channel 2 sampling time selection */ -#define ADC_SMPR1_SMP2_0 (0x1U << ADC_SMPR1_SMP2_Pos) /*!< 0x00000040 */ -#define ADC_SMPR1_SMP2_1 (0x2U << ADC_SMPR1_SMP2_Pos) /*!< 0x00000080 */ -#define ADC_SMPR1_SMP2_2 (0x4U << ADC_SMPR1_SMP2_Pos) /*!< 0x00000100 */ - -#define ADC_SMPR1_SMP3_Pos (9U) -#define ADC_SMPR1_SMP3_Msk (0x7U << ADC_SMPR1_SMP3_Pos) /*!< 0x00000E00 */ -#define ADC_SMPR1_SMP3 ADC_SMPR1_SMP3_Msk /*!< ADC channel 3 sampling time selection */ -#define ADC_SMPR1_SMP3_0 (0x1U << ADC_SMPR1_SMP3_Pos) /*!< 0x00000200 */ -#define ADC_SMPR1_SMP3_1 (0x2U << ADC_SMPR1_SMP3_Pos) /*!< 0x00000400 */ -#define ADC_SMPR1_SMP3_2 (0x4U << ADC_SMPR1_SMP3_Pos) /*!< 0x00000800 */ - -#define ADC_SMPR1_SMP4_Pos (12U) -#define ADC_SMPR1_SMP4_Msk (0x7U << ADC_SMPR1_SMP4_Pos) /*!< 0x00007000 */ -#define ADC_SMPR1_SMP4 ADC_SMPR1_SMP4_Msk /*!< ADC channel 4 sampling time selection */ -#define ADC_SMPR1_SMP4_0 (0x1U << ADC_SMPR1_SMP4_Pos) /*!< 0x00001000 */ -#define ADC_SMPR1_SMP4_1 (0x2U << ADC_SMPR1_SMP4_Pos) /*!< 0x00002000 */ -#define ADC_SMPR1_SMP4_2 (0x4U << ADC_SMPR1_SMP4_Pos) /*!< 0x00004000 */ - -#define ADC_SMPR1_SMP5_Pos (15U) -#define ADC_SMPR1_SMP5_Msk (0x7U << ADC_SMPR1_SMP5_Pos) /*!< 0x00038000 */ -#define ADC_SMPR1_SMP5 ADC_SMPR1_SMP5_Msk /*!< ADC channel 5 sampling time selection */ -#define ADC_SMPR1_SMP5_0 (0x1U << ADC_SMPR1_SMP5_Pos) /*!< 0x00008000 */ -#define ADC_SMPR1_SMP5_1 (0x2U << ADC_SMPR1_SMP5_Pos) /*!< 0x00010000 */ -#define ADC_SMPR1_SMP5_2 (0x4U << ADC_SMPR1_SMP5_Pos) /*!< 0x00020000 */ - -#define ADC_SMPR1_SMP6_Pos (18U) -#define ADC_SMPR1_SMP6_Msk (0x7U << ADC_SMPR1_SMP6_Pos) /*!< 0x001C0000 */ -#define ADC_SMPR1_SMP6 ADC_SMPR1_SMP6_Msk /*!< ADC channel 6 sampling time selection */ -#define ADC_SMPR1_SMP6_0 (0x1U << ADC_SMPR1_SMP6_Pos) /*!< 0x00040000 */ -#define ADC_SMPR1_SMP6_1 (0x2U << ADC_SMPR1_SMP6_Pos) /*!< 0x00080000 */ -#define ADC_SMPR1_SMP6_2 (0x4U << ADC_SMPR1_SMP6_Pos) /*!< 0x00100000 */ - -#define ADC_SMPR1_SMP7_Pos (21U) -#define ADC_SMPR1_SMP7_Msk (0x7U << ADC_SMPR1_SMP7_Pos) /*!< 0x00E00000 */ -#define ADC_SMPR1_SMP7 ADC_SMPR1_SMP7_Msk /*!< ADC channel 7 sampling time selection */ -#define ADC_SMPR1_SMP7_0 (0x1U << ADC_SMPR1_SMP7_Pos) /*!< 0x00200000 */ -#define ADC_SMPR1_SMP7_1 (0x2U << ADC_SMPR1_SMP7_Pos) /*!< 0x00400000 */ -#define ADC_SMPR1_SMP7_2 (0x4U << ADC_SMPR1_SMP7_Pos) /*!< 0x00800000 */ - -#define ADC_SMPR1_SMP8_Pos (24U) -#define ADC_SMPR1_SMP8_Msk (0x7U << ADC_SMPR1_SMP8_Pos) /*!< 0x07000000 */ -#define ADC_SMPR1_SMP8 ADC_SMPR1_SMP8_Msk /*!< ADC channel 8 sampling time selection */ -#define ADC_SMPR1_SMP8_0 (0x1U << ADC_SMPR1_SMP8_Pos) /*!< 0x01000000 */ -#define ADC_SMPR1_SMP8_1 (0x2U << ADC_SMPR1_SMP8_Pos) /*!< 0x02000000 */ -#define ADC_SMPR1_SMP8_2 (0x4U << ADC_SMPR1_SMP8_Pos) /*!< 0x04000000 */ - -#define ADC_SMPR1_SMP9_Pos (27U) -#define ADC_SMPR1_SMP9_Msk (0x7U << ADC_SMPR1_SMP9_Pos) /*!< 0x38000000 */ -#define ADC_SMPR1_SMP9 ADC_SMPR1_SMP9_Msk /*!< ADC channel 9 sampling time selection */ -#define ADC_SMPR1_SMP9_0 (0x1U << ADC_SMPR1_SMP9_Pos) /*!< 0x08000000 */ -#define ADC_SMPR1_SMP9_1 (0x2U << ADC_SMPR1_SMP9_Pos) /*!< 0x10000000 */ -#define ADC_SMPR1_SMP9_2 (0x4U << ADC_SMPR1_SMP9_Pos) /*!< 0x20000000 */ - -/******************** Bit definition for ADC_SMPR2 register *****************/ -#define ADC_SMPR2_SMP10_Pos (0U) -#define ADC_SMPR2_SMP10_Msk (0x7U << ADC_SMPR2_SMP10_Pos) /*!< 0x00000007 */ -#define ADC_SMPR2_SMP10 ADC_SMPR2_SMP10_Msk /*!< ADC channel 10 sampling time selection */ -#define ADC_SMPR2_SMP10_0 (0x1U << ADC_SMPR2_SMP10_Pos) /*!< 0x00000001 */ -#define ADC_SMPR2_SMP10_1 (0x2U << ADC_SMPR2_SMP10_Pos) /*!< 0x00000002 */ -#define ADC_SMPR2_SMP10_2 (0x4U << ADC_SMPR2_SMP10_Pos) /*!< 0x00000004 */ - -#define ADC_SMPR2_SMP11_Pos (3U) -#define ADC_SMPR2_SMP11_Msk (0x7U << ADC_SMPR2_SMP11_Pos) /*!< 0x00000038 */ -#define ADC_SMPR2_SMP11 ADC_SMPR2_SMP11_Msk /*!< ADC channel 11 sampling time selection */ -#define ADC_SMPR2_SMP11_0 (0x1U << ADC_SMPR2_SMP11_Pos) /*!< 0x00000008 */ -#define ADC_SMPR2_SMP11_1 (0x2U << ADC_SMPR2_SMP11_Pos) /*!< 0x00000010 */ -#define ADC_SMPR2_SMP11_2 (0x4U << ADC_SMPR2_SMP11_Pos) /*!< 0x00000020 */ - -#define ADC_SMPR2_SMP12_Pos (6U) -#define ADC_SMPR2_SMP12_Msk (0x7U << ADC_SMPR2_SMP12_Pos) /*!< 0x000001C0 */ -#define ADC_SMPR2_SMP12 ADC_SMPR2_SMP12_Msk /*!< ADC channel 12 sampling time selection */ -#define ADC_SMPR2_SMP12_0 (0x1U << ADC_SMPR2_SMP12_Pos) /*!< 0x00000040 */ -#define ADC_SMPR2_SMP12_1 (0x2U << ADC_SMPR2_SMP12_Pos) /*!< 0x00000080 */ -#define ADC_SMPR2_SMP12_2 (0x4U << ADC_SMPR2_SMP12_Pos) /*!< 0x00000100 */ - -#define ADC_SMPR2_SMP13_Pos (9U) -#define ADC_SMPR2_SMP13_Msk (0x7U << ADC_SMPR2_SMP13_Pos) /*!< 0x00000E00 */ -#define ADC_SMPR2_SMP13 ADC_SMPR2_SMP13_Msk /*!< ADC channel 13 sampling time selection */ -#define ADC_SMPR2_SMP13_0 (0x1U << ADC_SMPR2_SMP13_Pos) /*!< 0x00000200 */ -#define ADC_SMPR2_SMP13_1 (0x2U << ADC_SMPR2_SMP13_Pos) /*!< 0x00000400 */ -#define ADC_SMPR2_SMP13_2 (0x4U << ADC_SMPR2_SMP13_Pos) /*!< 0x00000800 */ - -#define ADC_SMPR2_SMP14_Pos (12U) -#define ADC_SMPR2_SMP14_Msk (0x7U << ADC_SMPR2_SMP14_Pos) /*!< 0x00007000 */ -#define ADC_SMPR2_SMP14 ADC_SMPR2_SMP14_Msk /*!< ADC channel 14 sampling time selection */ -#define ADC_SMPR2_SMP14_0 (0x1U << ADC_SMPR2_SMP14_Pos) /*!< 0x00001000 */ -#define ADC_SMPR2_SMP14_1 (0x2U << ADC_SMPR2_SMP14_Pos) /*!< 0x00002000 */ -#define ADC_SMPR2_SMP14_2 (0x4U << ADC_SMPR2_SMP14_Pos) /*!< 0x00004000 */ - -#define ADC_SMPR2_SMP15_Pos (15U) -#define ADC_SMPR2_SMP15_Msk (0x7U << ADC_SMPR2_SMP15_Pos) /*!< 0x00038000 */ -#define ADC_SMPR2_SMP15 ADC_SMPR2_SMP15_Msk /*!< ADC channel 15 sampling time selection */ -#define ADC_SMPR2_SMP15_0 (0x1U << ADC_SMPR2_SMP15_Pos) /*!< 0x00008000 */ -#define ADC_SMPR2_SMP15_1 (0x2U << ADC_SMPR2_SMP15_Pos) /*!< 0x00010000 */ -#define ADC_SMPR2_SMP15_2 (0x4U << ADC_SMPR2_SMP15_Pos) /*!< 0x00020000 */ - -#define ADC_SMPR2_SMP16_Pos (18U) -#define ADC_SMPR2_SMP16_Msk (0x7U << ADC_SMPR2_SMP16_Pos) /*!< 0x001C0000 */ -#define ADC_SMPR2_SMP16 ADC_SMPR2_SMP16_Msk /*!< ADC channel 16 sampling time selection */ -#define ADC_SMPR2_SMP16_0 (0x1U << ADC_SMPR2_SMP16_Pos) /*!< 0x00040000 */ -#define ADC_SMPR2_SMP16_1 (0x2U << ADC_SMPR2_SMP16_Pos) /*!< 0x00080000 */ -#define ADC_SMPR2_SMP16_2 (0x4U << ADC_SMPR2_SMP16_Pos) /*!< 0x00100000 */ - -#define ADC_SMPR2_SMP17_Pos (21U) -#define ADC_SMPR2_SMP17_Msk (0x7U << ADC_SMPR2_SMP17_Pos) /*!< 0x00E00000 */ -#define ADC_SMPR2_SMP17 ADC_SMPR2_SMP17_Msk /*!< ADC channel 17 sampling time selection */ -#define ADC_SMPR2_SMP17_0 (0x1U << ADC_SMPR2_SMP17_Pos) /*!< 0x00200000 */ -#define ADC_SMPR2_SMP17_1 (0x2U << ADC_SMPR2_SMP17_Pos) /*!< 0x00400000 */ -#define ADC_SMPR2_SMP17_2 (0x4U << ADC_SMPR2_SMP17_Pos) /*!< 0x00800000 */ - -#define ADC_SMPR2_SMP18_Pos (24U) -#define ADC_SMPR2_SMP18_Msk (0x7U << ADC_SMPR2_SMP18_Pos) /*!< 0x07000000 */ -#define ADC_SMPR2_SMP18 ADC_SMPR2_SMP18_Msk /*!< ADC channel 18 sampling time selection */ -#define ADC_SMPR2_SMP18_0 (0x1U << ADC_SMPR2_SMP18_Pos) /*!< 0x01000000 */ -#define ADC_SMPR2_SMP18_1 (0x2U << ADC_SMPR2_SMP18_Pos) /*!< 0x02000000 */ -#define ADC_SMPR2_SMP18_2 (0x4U << ADC_SMPR2_SMP18_Pos) /*!< 0x04000000 */ - -/******************** Bit definition for ADC_TR1 register *******************/ -#define ADC_TR1_LT1_Pos (0U) -#define ADC_TR1_LT1_Msk (0xFFFU << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */ -#define ADC_TR1_LT1 ADC_TR1_LT1_Msk /*!< ADC analog watchdog 1 threshold low */ -#define ADC_TR1_LT1_0 (0x001U << ADC_TR1_LT1_Pos) /*!< 0x00000001 */ -#define ADC_TR1_LT1_1 (0x002U << ADC_TR1_LT1_Pos) /*!< 0x00000002 */ -#define ADC_TR1_LT1_2 (0x004U << ADC_TR1_LT1_Pos) /*!< 0x00000004 */ -#define ADC_TR1_LT1_3 (0x008U << ADC_TR1_LT1_Pos) /*!< 0x00000008 */ -#define ADC_TR1_LT1_4 (0x010U << ADC_TR1_LT1_Pos) /*!< 0x00000010 */ -#define ADC_TR1_LT1_5 (0x020U << ADC_TR1_LT1_Pos) /*!< 0x00000020 */ -#define ADC_TR1_LT1_6 (0x040U << ADC_TR1_LT1_Pos) /*!< 0x00000040 */ -#define ADC_TR1_LT1_7 (0x080U << ADC_TR1_LT1_Pos) /*!< 0x00000080 */ -#define ADC_TR1_LT1_8 (0x100U << ADC_TR1_LT1_Pos) /*!< 0x00000100 */ -#define ADC_TR1_LT1_9 (0x200U << ADC_TR1_LT1_Pos) /*!< 0x00000200 */ -#define ADC_TR1_LT1_10 (0x400U << ADC_TR1_LT1_Pos) /*!< 0x00000400 */ -#define ADC_TR1_LT1_11 (0x800U << ADC_TR1_LT1_Pos) /*!< 0x00000800 */ - -#define ADC_TR1_HT1_Pos (16U) -#define ADC_TR1_HT1_Msk (0xFFFU << ADC_TR1_HT1_Pos) /*!< 0x0FFF0000 */ -#define ADC_TR1_HT1 ADC_TR1_HT1_Msk /*!< ADC Analog watchdog 1 threshold high */ -#define ADC_TR1_HT1_0 (0x001U << ADC_TR1_HT1_Pos) /*!< 0x00010000 */ -#define ADC_TR1_HT1_1 (0x002U << ADC_TR1_HT1_Pos) /*!< 0x00020000 */ -#define ADC_TR1_HT1_2 (0x004U << ADC_TR1_HT1_Pos) /*!< 0x00040000 */ -#define ADC_TR1_HT1_3 (0x008U << ADC_TR1_HT1_Pos) /*!< 0x00080000 */ -#define ADC_TR1_HT1_4 (0x010U << ADC_TR1_HT1_Pos) /*!< 0x00100000 */ -#define ADC_TR1_HT1_5 (0x020U << ADC_TR1_HT1_Pos) /*!< 0x00200000 */ -#define ADC_TR1_HT1_6 (0x040U << ADC_TR1_HT1_Pos) /*!< 0x00400000 */ -#define ADC_TR1_HT1_7 (0x080U << ADC_TR1_HT1_Pos) /*!< 0x00800000 */ -#define ADC_TR1_HT1_8 (0x100U << ADC_TR1_HT1_Pos) /*!< 0x01000000 */ -#define ADC_TR1_HT1_9 (0x200U << ADC_TR1_HT1_Pos) /*!< 0x02000000 */ -#define ADC_TR1_HT1_10 (0x400U << ADC_TR1_HT1_Pos) /*!< 0x04000000 */ -#define ADC_TR1_HT1_11 (0x800U << ADC_TR1_HT1_Pos) /*!< 0x08000000 */ - -/******************** Bit definition for ADC_TR2 register *******************/ -#define ADC_TR2_LT2_Pos (0U) -#define ADC_TR2_LT2_Msk (0xFFU << ADC_TR2_LT2_Pos) /*!< 0x000000FF */ -#define ADC_TR2_LT2 ADC_TR2_LT2_Msk /*!< ADC analog watchdog 2 threshold low */ -#define ADC_TR2_LT2_0 (0x01U << ADC_TR2_LT2_Pos) /*!< 0x00000001 */ -#define ADC_TR2_LT2_1 (0x02U << ADC_TR2_LT2_Pos) /*!< 0x00000002 */ -#define ADC_TR2_LT2_2 (0x04U << ADC_TR2_LT2_Pos) /*!< 0x00000004 */ -#define ADC_TR2_LT2_3 (0x08U << ADC_TR2_LT2_Pos) /*!< 0x00000008 */ -#define ADC_TR2_LT2_4 (0x10U << ADC_TR2_LT2_Pos) /*!< 0x00000010 */ -#define ADC_TR2_LT2_5 (0x20U << ADC_TR2_LT2_Pos) /*!< 0x00000020 */ -#define ADC_TR2_LT2_6 (0x40U << ADC_TR2_LT2_Pos) /*!< 0x00000040 */ -#define ADC_TR2_LT2_7 (0x80U << ADC_TR2_LT2_Pos) /*!< 0x00000080 */ - -#define ADC_TR2_HT2_Pos (16U) -#define ADC_TR2_HT2_Msk (0xFFU << ADC_TR2_HT2_Pos) /*!< 0x00FF0000 */ -#define ADC_TR2_HT2 ADC_TR2_HT2_Msk /*!< ADC analog watchdog 2 threshold high */ -#define ADC_TR2_HT2_0 (0x01U << ADC_TR2_HT2_Pos) /*!< 0x00010000 */ -#define ADC_TR2_HT2_1 (0x02U << ADC_TR2_HT2_Pos) /*!< 0x00020000 */ -#define ADC_TR2_HT2_2 (0x04U << ADC_TR2_HT2_Pos) /*!< 0x00040000 */ -#define ADC_TR2_HT2_3 (0x08U << ADC_TR2_HT2_Pos) /*!< 0x00080000 */ -#define ADC_TR2_HT2_4 (0x10U << ADC_TR2_HT2_Pos) /*!< 0x00100000 */ -#define ADC_TR2_HT2_5 (0x20U << ADC_TR2_HT2_Pos) /*!< 0x00200000 */ -#define ADC_TR2_HT2_6 (0x40U << ADC_TR2_HT2_Pos) /*!< 0x00400000 */ -#define ADC_TR2_HT2_7 (0x80U << ADC_TR2_HT2_Pos) /*!< 0x00800000 */ - -/******************** Bit definition for ADC_TR3 register *******************/ -#define ADC_TR3_LT3_Pos (0U) -#define ADC_TR3_LT3_Msk (0xFFU << ADC_TR3_LT3_Pos) /*!< 0x000000FF */ -#define ADC_TR3_LT3 ADC_TR3_LT3_Msk /*!< ADC analog watchdog 3 threshold low */ -#define ADC_TR3_LT3_0 (0x01U << ADC_TR3_LT3_Pos) /*!< 0x00000001 */ -#define ADC_TR3_LT3_1 (0x02U << ADC_TR3_LT3_Pos) /*!< 0x00000002 */ -#define ADC_TR3_LT3_2 (0x04U << ADC_TR3_LT3_Pos) /*!< 0x00000004 */ -#define ADC_TR3_LT3_3 (0x08U << ADC_TR3_LT3_Pos) /*!< 0x00000008 */ -#define ADC_TR3_LT3_4 (0x10U << ADC_TR3_LT3_Pos) /*!< 0x00000010 */ -#define ADC_TR3_LT3_5 (0x20U << ADC_TR3_LT3_Pos) /*!< 0x00000020 */ -#define ADC_TR3_LT3_6 (0x40U << ADC_TR3_LT3_Pos) /*!< 0x00000040 */ -#define ADC_TR3_LT3_7 (0x80U << ADC_TR3_LT3_Pos) /*!< 0x00000080 */ - -#define ADC_TR3_HT3_Pos (16U) -#define ADC_TR3_HT3_Msk (0xFFU << ADC_TR3_HT3_Pos) /*!< 0x00FF0000 */ -#define ADC_TR3_HT3 ADC_TR3_HT3_Msk /*!< ADC analog watchdog 3 threshold high */ -#define ADC_TR3_HT3_0 (0x01U << ADC_TR3_HT3_Pos) /*!< 0x00010000 */ -#define ADC_TR3_HT3_1 (0x02U << ADC_TR3_HT3_Pos) /*!< 0x00020000 */ -#define ADC_TR3_HT3_2 (0x04U << ADC_TR3_HT3_Pos) /*!< 0x00040000 */ -#define ADC_TR3_HT3_3 (0x08U << ADC_TR3_HT3_Pos) /*!< 0x00080000 */ -#define ADC_TR3_HT3_4 (0x10U << ADC_TR3_HT3_Pos) /*!< 0x00100000 */ -#define ADC_TR3_HT3_5 (0x20U << ADC_TR3_HT3_Pos) /*!< 0x00200000 */ -#define ADC_TR3_HT3_6 (0x40U << ADC_TR3_HT3_Pos) /*!< 0x00400000 */ -#define ADC_TR3_HT3_7 (0x80U << ADC_TR3_HT3_Pos) /*!< 0x00800000 */ - -/******************** Bit definition for ADC_SQR1 register ******************/ -#define ADC_SQR1_L_Pos (0U) -#define ADC_SQR1_L_Msk (0xFU << ADC_SQR1_L_Pos) /*!< 0x0000000F */ -#define ADC_SQR1_L ADC_SQR1_L_Msk /*!< ADC group regular sequencer scan length */ -#define ADC_SQR1_L_0 (0x1U << ADC_SQR1_L_Pos) /*!< 0x00000001 */ -#define ADC_SQR1_L_1 (0x2U << ADC_SQR1_L_Pos) /*!< 0x00000002 */ -#define ADC_SQR1_L_2 (0x4U << ADC_SQR1_L_Pos) /*!< 0x00000004 */ -#define ADC_SQR1_L_3 (0x8U << ADC_SQR1_L_Pos) /*!< 0x00000008 */ - -#define ADC_SQR1_SQ1_Pos (6U) -#define ADC_SQR1_SQ1_Msk (0x1FU << ADC_SQR1_SQ1_Pos) /*!< 0x000007C0 */ -#define ADC_SQR1_SQ1 ADC_SQR1_SQ1_Msk /*!< ADC group regular sequencer rank 1 */ -#define ADC_SQR1_SQ1_0 (0x01U << ADC_SQR1_SQ1_Pos) /*!< 0x00000040 */ -#define ADC_SQR1_SQ1_1 (0x02U << ADC_SQR1_SQ1_Pos) /*!< 0x00000080 */ -#define ADC_SQR1_SQ1_2 (0x04U << ADC_SQR1_SQ1_Pos) /*!< 0x00000100 */ -#define ADC_SQR1_SQ1_3 (0x08U << ADC_SQR1_SQ1_Pos) /*!< 0x00000200 */ -#define ADC_SQR1_SQ1_4 (0x10U << ADC_SQR1_SQ1_Pos) /*!< 0x00000400 */ - -#define ADC_SQR1_SQ2_Pos (12U) -#define ADC_SQR1_SQ2_Msk (0x1FU << ADC_SQR1_SQ2_Pos) /*!< 0x0001F000 */ -#define ADC_SQR1_SQ2 ADC_SQR1_SQ2_Msk /*!< ADC group regular sequencer rank 2 */ -#define ADC_SQR1_SQ2_0 (0x01U << ADC_SQR1_SQ2_Pos) /*!< 0x00001000 */ -#define ADC_SQR1_SQ2_1 (0x02U << ADC_SQR1_SQ2_Pos) /*!< 0x00002000 */ -#define ADC_SQR1_SQ2_2 (0x04U << ADC_SQR1_SQ2_Pos) /*!< 0x00004000 */ -#define ADC_SQR1_SQ2_3 (0x08U << ADC_SQR1_SQ2_Pos) /*!< 0x00008000 */ -#define ADC_SQR1_SQ2_4 (0x10U << ADC_SQR1_SQ2_Pos) /*!< 0x00010000 */ - -#define ADC_SQR1_SQ3_Pos (18U) -#define ADC_SQR1_SQ3_Msk (0x1FU << ADC_SQR1_SQ3_Pos) /*!< 0x007C0000 */ -#define ADC_SQR1_SQ3 ADC_SQR1_SQ3_Msk /*!< ADC group regular sequencer rank 3 */ -#define ADC_SQR1_SQ3_0 (0x01U << ADC_SQR1_SQ3_Pos) /*!< 0x00040000 */ -#define ADC_SQR1_SQ3_1 (0x02U << ADC_SQR1_SQ3_Pos) /*!< 0x00080000 */ -#define ADC_SQR1_SQ3_2 (0x04U << ADC_SQR1_SQ3_Pos) /*!< 0x00100000 */ -#define ADC_SQR1_SQ3_3 (0x08U << ADC_SQR1_SQ3_Pos) /*!< 0x00200000 */ -#define ADC_SQR1_SQ3_4 (0x10U << ADC_SQR1_SQ3_Pos) /*!< 0x00400000 */ - -#define ADC_SQR1_SQ4_Pos (24U) -#define ADC_SQR1_SQ4_Msk (0x1FU << ADC_SQR1_SQ4_Pos) /*!< 0x1F000000 */ -#define ADC_SQR1_SQ4 ADC_SQR1_SQ4_Msk /*!< ADC group regular sequencer rank 4 */ -#define ADC_SQR1_SQ4_0 (0x01U << ADC_SQR1_SQ4_Pos) /*!< 0x01000000 */ -#define ADC_SQR1_SQ4_1 (0x02U << ADC_SQR1_SQ4_Pos) /*!< 0x02000000 */ -#define ADC_SQR1_SQ4_2 (0x04U << ADC_SQR1_SQ4_Pos) /*!< 0x04000000 */ -#define ADC_SQR1_SQ4_3 (0x08U << ADC_SQR1_SQ4_Pos) /*!< 0x08000000 */ -#define ADC_SQR1_SQ4_4 (0x10U << ADC_SQR1_SQ4_Pos) /*!< 0x10000000 */ - -/******************** Bit definition for ADC_SQR2 register ******************/ -#define ADC_SQR2_SQ5_Pos (0U) -#define ADC_SQR2_SQ5_Msk (0x1FU << ADC_SQR2_SQ5_Pos) /*!< 0x0000001F */ -#define ADC_SQR2_SQ5 ADC_SQR2_SQ5_Msk /*!< ADC group regular sequencer rank 5 */ -#define ADC_SQR2_SQ5_0 (0x01U << ADC_SQR2_SQ5_Pos) /*!< 0x00000001 */ -#define ADC_SQR2_SQ5_1 (0x02U << ADC_SQR2_SQ5_Pos) /*!< 0x00000002 */ -#define ADC_SQR2_SQ5_2 (0x04U << ADC_SQR2_SQ5_Pos) /*!< 0x00000004 */ -#define ADC_SQR2_SQ5_3 (0x08U << ADC_SQR2_SQ5_Pos) /*!< 0x00000008 */ -#define ADC_SQR2_SQ5_4 (0x10U << ADC_SQR2_SQ5_Pos) /*!< 0x00000010 */ - -#define ADC_SQR2_SQ6_Pos (6U) -#define ADC_SQR2_SQ6_Msk (0x1FU << ADC_SQR2_SQ6_Pos) /*!< 0x000007C0 */ -#define ADC_SQR2_SQ6 ADC_SQR2_SQ6_Msk /*!< ADC group regular sequencer rank 6 */ -#define ADC_SQR2_SQ6_0 (0x01U << ADC_SQR2_SQ6_Pos) /*!< 0x00000040 */ -#define ADC_SQR2_SQ6_1 (0x02U << ADC_SQR2_SQ6_Pos) /*!< 0x00000080 */ -#define ADC_SQR2_SQ6_2 (0x04U << ADC_SQR2_SQ6_Pos) /*!< 0x00000100 */ -#define ADC_SQR2_SQ6_3 (0x08U << ADC_SQR2_SQ6_Pos) /*!< 0x00000200 */ -#define ADC_SQR2_SQ6_4 (0x10U << ADC_SQR2_SQ6_Pos) /*!< 0x00000400 */ - -#define ADC_SQR2_SQ7_Pos (12U) -#define ADC_SQR2_SQ7_Msk (0x1FU << ADC_SQR2_SQ7_Pos) /*!< 0x0001F000 */ -#define ADC_SQR2_SQ7 ADC_SQR2_SQ7_Msk /*!< ADC group regular sequencer rank 7 */ -#define ADC_SQR2_SQ7_0 (0x01U << ADC_SQR2_SQ7_Pos) /*!< 0x00001000 */ -#define ADC_SQR2_SQ7_1 (0x02U << ADC_SQR2_SQ7_Pos) /*!< 0x00002000 */ -#define ADC_SQR2_SQ7_2 (0x04U << ADC_SQR2_SQ7_Pos) /*!< 0x00004000 */ -#define ADC_SQR2_SQ7_3 (0x08U << ADC_SQR2_SQ7_Pos) /*!< 0x00008000 */ -#define ADC_SQR2_SQ7_4 (0x10U << ADC_SQR2_SQ7_Pos) /*!< 0x00010000 */ - -#define ADC_SQR2_SQ8_Pos (18U) -#define ADC_SQR2_SQ8_Msk (0x1FU << ADC_SQR2_SQ8_Pos) /*!< 0x007C0000 */ -#define ADC_SQR2_SQ8 ADC_SQR2_SQ8_Msk /*!< ADC group regular sequencer rank 8 */ -#define ADC_SQR2_SQ8_0 (0x01U << ADC_SQR2_SQ8_Pos) /*!< 0x00040000 */ -#define ADC_SQR2_SQ8_1 (0x02U << ADC_SQR2_SQ8_Pos) /*!< 0x00080000 */ -#define ADC_SQR2_SQ8_2 (0x04U << ADC_SQR2_SQ8_Pos) /*!< 0x00100000 */ -#define ADC_SQR2_SQ8_3 (0x08U << ADC_SQR2_SQ8_Pos) /*!< 0x00200000 */ -#define ADC_SQR2_SQ8_4 (0x10U << ADC_SQR2_SQ8_Pos) /*!< 0x00400000 */ - -#define ADC_SQR2_SQ9_Pos (24U) -#define ADC_SQR2_SQ9_Msk (0x1FU << ADC_SQR2_SQ9_Pos) /*!< 0x1F000000 */ -#define ADC_SQR2_SQ9 ADC_SQR2_SQ9_Msk /*!< ADC group regular sequencer rank 9 */ -#define ADC_SQR2_SQ9_0 (0x01U << ADC_SQR2_SQ9_Pos) /*!< 0x01000000 */ -#define ADC_SQR2_SQ9_1 (0x02U << ADC_SQR2_SQ9_Pos) /*!< 0x02000000 */ -#define ADC_SQR2_SQ9_2 (0x04U << ADC_SQR2_SQ9_Pos) /*!< 0x04000000 */ -#define ADC_SQR2_SQ9_3 (0x08U << ADC_SQR2_SQ9_Pos) /*!< 0x08000000 */ -#define ADC_SQR2_SQ9_4 (0x10U << ADC_SQR2_SQ9_Pos) /*!< 0x10000000 */ - -/******************** Bit definition for ADC_SQR3 register ******************/ -#define ADC_SQR3_SQ10_Pos (0U) -#define ADC_SQR3_SQ10_Msk (0x1FU << ADC_SQR3_SQ10_Pos) /*!< 0x0000001F */ -#define ADC_SQR3_SQ10 ADC_SQR3_SQ10_Msk /*!< ADC group regular sequencer rank 10 */ -#define ADC_SQR3_SQ10_0 (0x01U << ADC_SQR3_SQ10_Pos) /*!< 0x00000001 */ -#define ADC_SQR3_SQ10_1 (0x02U << ADC_SQR3_SQ10_Pos) /*!< 0x00000002 */ -#define ADC_SQR3_SQ10_2 (0x04U << ADC_SQR3_SQ10_Pos) /*!< 0x00000004 */ -#define ADC_SQR3_SQ10_3 (0x08U << ADC_SQR3_SQ10_Pos) /*!< 0x00000008 */ -#define ADC_SQR3_SQ10_4 (0x10U << ADC_SQR3_SQ10_Pos) /*!< 0x00000010 */ - -#define ADC_SQR3_SQ11_Pos (6U) -#define ADC_SQR3_SQ11_Msk (0x1FU << ADC_SQR3_SQ11_Pos) /*!< 0x000007C0 */ -#define ADC_SQR3_SQ11 ADC_SQR3_SQ11_Msk /*!< ADC group regular sequencer rank 11 */ -#define ADC_SQR3_SQ11_0 (0x01U << ADC_SQR3_SQ11_Pos) /*!< 0x00000040 */ -#define ADC_SQR3_SQ11_1 (0x02U << ADC_SQR3_SQ11_Pos) /*!< 0x00000080 */ -#define ADC_SQR3_SQ11_2 (0x04U << ADC_SQR3_SQ11_Pos) /*!< 0x00000100 */ -#define ADC_SQR3_SQ11_3 (0x08U << ADC_SQR3_SQ11_Pos) /*!< 0x00000200 */ -#define ADC_SQR3_SQ11_4 (0x10U << ADC_SQR3_SQ11_Pos) /*!< 0x00000400 */ - -#define ADC_SQR3_SQ12_Pos (12U) -#define ADC_SQR3_SQ12_Msk (0x1FU << ADC_SQR3_SQ12_Pos) /*!< 0x0001F000 */ -#define ADC_SQR3_SQ12 ADC_SQR3_SQ12_Msk /*!< ADC group regular sequencer rank 12 */ -#define ADC_SQR3_SQ12_0 (0x01U << ADC_SQR3_SQ12_Pos) /*!< 0x00001000 */ -#define ADC_SQR3_SQ12_1 (0x02U << ADC_SQR3_SQ12_Pos) /*!< 0x00002000 */ -#define ADC_SQR3_SQ12_2 (0x04U << ADC_SQR3_SQ12_Pos) /*!< 0x00004000 */ -#define ADC_SQR3_SQ12_3 (0x08U << ADC_SQR3_SQ12_Pos) /*!< 0x00008000 */ -#define ADC_SQR3_SQ12_4 (0x10U << ADC_SQR3_SQ12_Pos) /*!< 0x00010000 */ - -#define ADC_SQR3_SQ13_Pos (18U) -#define ADC_SQR3_SQ13_Msk (0x1FU << ADC_SQR3_SQ13_Pos) /*!< 0x007C0000 */ -#define ADC_SQR3_SQ13 ADC_SQR3_SQ13_Msk /*!< ADC group regular sequencer rank 13 */ -#define ADC_SQR3_SQ13_0 (0x01U << ADC_SQR3_SQ13_Pos) /*!< 0x00040000 */ -#define ADC_SQR3_SQ13_1 (0x02U << ADC_SQR3_SQ13_Pos) /*!< 0x00080000 */ -#define ADC_SQR3_SQ13_2 (0x04U << ADC_SQR3_SQ13_Pos) /*!< 0x00100000 */ -#define ADC_SQR3_SQ13_3 (0x08U << ADC_SQR3_SQ13_Pos) /*!< 0x00200000 */ -#define ADC_SQR3_SQ13_4 (0x10U << ADC_SQR3_SQ13_Pos) /*!< 0x00400000 */ - -#define ADC_SQR3_SQ14_Pos (24U) -#define ADC_SQR3_SQ14_Msk (0x1FU << ADC_SQR3_SQ14_Pos) /*!< 0x1F000000 */ -#define ADC_SQR3_SQ14 ADC_SQR3_SQ14_Msk /*!< ADC group regular sequencer rank 14 */ -#define ADC_SQR3_SQ14_0 (0x01U << ADC_SQR3_SQ14_Pos) /*!< 0x01000000 */ -#define ADC_SQR3_SQ14_1 (0x02U << ADC_SQR3_SQ14_Pos) /*!< 0x02000000 */ -#define ADC_SQR3_SQ14_2 (0x04U << ADC_SQR3_SQ14_Pos) /*!< 0x04000000 */ -#define ADC_SQR3_SQ14_3 (0x08U << ADC_SQR3_SQ14_Pos) /*!< 0x08000000 */ -#define ADC_SQR3_SQ14_4 (0x10U << ADC_SQR3_SQ14_Pos) /*!< 0x10000000 */ - -/******************** Bit definition for ADC_SQR4 register ******************/ -#define ADC_SQR4_SQ15_Pos (0U) -#define ADC_SQR4_SQ15_Msk (0x1FU << ADC_SQR4_SQ15_Pos) /*!< 0x0000001F */ -#define ADC_SQR4_SQ15 ADC_SQR4_SQ15_Msk /*!< ADC group regular sequencer rank 15 */ -#define ADC_SQR4_SQ15_0 (0x01U << ADC_SQR4_SQ15_Pos) /*!< 0x00000001 */ -#define ADC_SQR4_SQ15_1 (0x02U << ADC_SQR4_SQ15_Pos) /*!< 0x00000002 */ -#define ADC_SQR4_SQ15_2 (0x04U << ADC_SQR4_SQ15_Pos) /*!< 0x00000004 */ -#define ADC_SQR4_SQ15_3 (0x08U << ADC_SQR4_SQ15_Pos) /*!< 0x00000008 */ -#define ADC_SQR4_SQ15_4 (0x10U << ADC_SQR4_SQ15_Pos) /*!< 0x00000010 */ - -#define ADC_SQR4_SQ16_Pos (6U) -#define ADC_SQR4_SQ16_Msk (0x1FU << ADC_SQR4_SQ16_Pos) /*!< 0x000007C0 */ -#define ADC_SQR4_SQ16 ADC_SQR4_SQ16_Msk /*!< ADC group regular sequencer rank 16 */ -#define ADC_SQR4_SQ16_0 (0x01U << ADC_SQR4_SQ16_Pos) /*!< 0x00000040 */ -#define ADC_SQR4_SQ16_1 (0x02U << ADC_SQR4_SQ16_Pos) /*!< 0x00000080 */ -#define ADC_SQR4_SQ16_2 (0x04U << ADC_SQR4_SQ16_Pos) /*!< 0x00000100 */ -#define ADC_SQR4_SQ16_3 (0x08U << ADC_SQR4_SQ16_Pos) /*!< 0x00000200 */ -#define ADC_SQR4_SQ16_4 (0x10U << ADC_SQR4_SQ16_Pos) /*!< 0x00000400 */ - -/******************** Bit definition for ADC_DR register ********************/ -#define ADC_DR_RDATA_Pos (0U) -#define ADC_DR_RDATA_Msk (0xFFFFU << ADC_DR_RDATA_Pos) /*!< 0x0000FFFF */ -#define ADC_DR_RDATA ADC_DR_RDATA_Msk /*!< ADC group regular conversion data */ -#define ADC_DR_RDATA_0 (0x0001U << ADC_DR_RDATA_Pos) /*!< 0x00000001 */ -#define ADC_DR_RDATA_1 (0x0002U << ADC_DR_RDATA_Pos) /*!< 0x00000002 */ -#define ADC_DR_RDATA_2 (0x0004U << ADC_DR_RDATA_Pos) /*!< 0x00000004 */ -#define ADC_DR_RDATA_3 (0x0008U << ADC_DR_RDATA_Pos) /*!< 0x00000008 */ -#define ADC_DR_RDATA_4 (0x0010U << ADC_DR_RDATA_Pos) /*!< 0x00000010 */ -#define ADC_DR_RDATA_5 (0x0020U << ADC_DR_RDATA_Pos) /*!< 0x00000020 */ -#define ADC_DR_RDATA_6 (0x0040U << ADC_DR_RDATA_Pos) /*!< 0x00000040 */ -#define ADC_DR_RDATA_7 (0x0080U << ADC_DR_RDATA_Pos) /*!< 0x00000080 */ -#define ADC_DR_RDATA_8 (0x0100U << ADC_DR_RDATA_Pos) /*!< 0x00000100 */ -#define ADC_DR_RDATA_9 (0x0200U << ADC_DR_RDATA_Pos) /*!< 0x00000200 */ -#define ADC_DR_RDATA_10 (0x0400U << ADC_DR_RDATA_Pos) /*!< 0x00000400 */ -#define ADC_DR_RDATA_11 (0x0800U << ADC_DR_RDATA_Pos) /*!< 0x00000800 */ -#define ADC_DR_RDATA_12 (0x1000U << ADC_DR_RDATA_Pos) /*!< 0x00001000 */ -#define ADC_DR_RDATA_13 (0x2000U << ADC_DR_RDATA_Pos) /*!< 0x00002000 */ -#define ADC_DR_RDATA_14 (0x4000U << ADC_DR_RDATA_Pos) /*!< 0x00004000 */ -#define ADC_DR_RDATA_15 (0x8000U << ADC_DR_RDATA_Pos) /*!< 0x00008000 */ - -/******************** Bit definition for ADC_JSQR register ******************/ -#define ADC_JSQR_JL_Pos (0U) -#define ADC_JSQR_JL_Msk (0x3U << ADC_JSQR_JL_Pos) /*!< 0x00000003 */ -#define ADC_JSQR_JL ADC_JSQR_JL_Msk /*!< ADC group injected sequencer scan length */ -#define ADC_JSQR_JL_0 (0x1U << ADC_JSQR_JL_Pos) /*!< 0x00000001 */ -#define ADC_JSQR_JL_1 (0x2U << ADC_JSQR_JL_Pos) /*!< 0x00000002 */ - -#define ADC_JSQR_JEXTSEL_Pos (2U) -#define ADC_JSQR_JEXTSEL_Msk (0xFU << ADC_JSQR_JEXTSEL_Pos) /*!< 0x0000003C */ -#define ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_Msk /*!< ADC group injected external trigger source */ -#define ADC_JSQR_JEXTSEL_0 (0x1U << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000004 */ -#define ADC_JSQR_JEXTSEL_1 (0x2U << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000008 */ -#define ADC_JSQR_JEXTSEL_2 (0x4U << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000010 */ -#define ADC_JSQR_JEXTSEL_3 (0x8U << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000020 */ - -#define ADC_JSQR_JEXTEN_Pos (6U) -#define ADC_JSQR_JEXTEN_Msk (0x3U << ADC_JSQR_JEXTEN_Pos) /*!< 0x000000C0 */ -#define ADC_JSQR_JEXTEN ADC_JSQR_JEXTEN_Msk /*!< ADC group injected external trigger polarity */ -#define ADC_JSQR_JEXTEN_0 (0x1U << ADC_JSQR_JEXTEN_Pos) /*!< 0x00000040 */ -#define ADC_JSQR_JEXTEN_1 (0x2U << ADC_JSQR_JEXTEN_Pos) /*!< 0x00000080 */ - -#define ADC_JSQR_JSQ1_Pos (8U) -#define ADC_JSQR_JSQ1_Msk (0x1FU << ADC_JSQR_JSQ1_Pos) /*!< 0x00001F00 */ -#define ADC_JSQR_JSQ1 ADC_JSQR_JSQ1_Msk /*!< ADC group injected sequencer rank 1 */ -#define ADC_JSQR_JSQ1_0 (0x01U << ADC_JSQR_JSQ1_Pos) /*!< 0x00000100 */ -#define ADC_JSQR_JSQ1_1 (0x02U << ADC_JSQR_JSQ1_Pos) /*!< 0x00000200 */ -#define ADC_JSQR_JSQ1_2 (0x04U << ADC_JSQR_JSQ1_Pos) /*!< 0x00000400 */ -#define ADC_JSQR_JSQ1_3 (0x08U << ADC_JSQR_JSQ1_Pos) /*!< 0x00000800 */ -#define ADC_JSQR_JSQ1_4 (0x10U << ADC_JSQR_JSQ1_Pos) /*!< 0x00001000 */ - -#define ADC_JSQR_JSQ2_Pos (14U) -#define ADC_JSQR_JSQ2_Msk (0x1FU << ADC_JSQR_JSQ2_Pos) /*!< 0x0007C000 */ -#define ADC_JSQR_JSQ2 ADC_JSQR_JSQ2_Msk /*!< ADC group injected sequencer rank 2 */ -#define ADC_JSQR_JSQ2_0 (0x01U << ADC_JSQR_JSQ2_Pos) /*!< 0x00004000 */ -#define ADC_JSQR_JSQ2_1 (0x02U << ADC_JSQR_JSQ2_Pos) /*!< 0x00008000 */ -#define ADC_JSQR_JSQ2_2 (0x04U << ADC_JSQR_JSQ2_Pos) /*!< 0x00010000 */ -#define ADC_JSQR_JSQ2_3 (0x08U << ADC_JSQR_JSQ2_Pos) /*!< 0x00020000 */ -#define ADC_JSQR_JSQ2_4 (0x10U << ADC_JSQR_JSQ2_Pos) /*!< 0x00040000 */ - -#define ADC_JSQR_JSQ3_Pos (20U) -#define ADC_JSQR_JSQ3_Msk (0x1FU << ADC_JSQR_JSQ3_Pos) /*!< 0x01F00000 */ -#define ADC_JSQR_JSQ3 ADC_JSQR_JSQ3_Msk /*!< ADC group injected sequencer rank 3 */ -#define ADC_JSQR_JSQ3_0 (0x01U << ADC_JSQR_JSQ3_Pos) /*!< 0x00100000 */ -#define ADC_JSQR_JSQ3_1 (0x02U << ADC_JSQR_JSQ3_Pos) /*!< 0x00200000 */ -#define ADC_JSQR_JSQ3_2 (0x04U << ADC_JSQR_JSQ3_Pos) /*!< 0x00400000 */ -#define ADC_JSQR_JSQ3_3 (0x08U << ADC_JSQR_JSQ3_Pos) /*!< 0x00800000 */ -#define ADC_JSQR_JSQ3_4 (0x10U << ADC_JSQR_JSQ3_Pos) /*!< 0x01000000 */ - -#define ADC_JSQR_JSQ4_Pos (26U) -#define ADC_JSQR_JSQ4_Msk (0x1FU << ADC_JSQR_JSQ4_Pos) /*!< 0x7C000000 */ -#define ADC_JSQR_JSQ4 ADC_JSQR_JSQ4_Msk /*!< ADC group injected sequencer rank 4 */ -#define ADC_JSQR_JSQ4_0 (0x01U << ADC_JSQR_JSQ4_Pos) /*!< 0x04000000 */ -#define ADC_JSQR_JSQ4_1 (0x02U << ADC_JSQR_JSQ4_Pos) /*!< 0x08000000 */ -#define ADC_JSQR_JSQ4_2 (0x04U << ADC_JSQR_JSQ4_Pos) /*!< 0x10000000 */ -#define ADC_JSQR_JSQ4_3 (0x08U << ADC_JSQR_JSQ4_Pos) /*!< 0x20000000 */ -#define ADC_JSQR_JSQ4_4 (0x10U << ADC_JSQR_JSQ4_Pos) /*!< 0x40000000 */ - -/******************** Bit definition for ADC_OFR1 register ******************/ -#define ADC_OFR1_OFFSET1_Pos (0U) -#define ADC_OFR1_OFFSET1_Msk (0xFFFU << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000FFF */ -#define ADC_OFR1_OFFSET1 ADC_OFR1_OFFSET1_Msk /*!< ADC offset number 1 offset level */ -#define ADC_OFR1_OFFSET1_0 (0x001U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000001 */ -#define ADC_OFR1_OFFSET1_1 (0x002U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000002 */ -#define ADC_OFR1_OFFSET1_2 (0x004U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000004 */ -#define ADC_OFR1_OFFSET1_3 (0x008U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000008 */ -#define ADC_OFR1_OFFSET1_4 (0x010U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000010 */ -#define ADC_OFR1_OFFSET1_5 (0x020U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000020 */ -#define ADC_OFR1_OFFSET1_6 (0x040U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000040 */ -#define ADC_OFR1_OFFSET1_7 (0x080U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000080 */ -#define ADC_OFR1_OFFSET1_8 (0x100U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000100 */ -#define ADC_OFR1_OFFSET1_9 (0x200U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000200 */ -#define ADC_OFR1_OFFSET1_10 (0x400U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000400 */ -#define ADC_OFR1_OFFSET1_11 (0x800U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000800 */ - -#define ADC_OFR1_OFFSET1_CH_Pos (26U) -#define ADC_OFR1_OFFSET1_CH_Msk (0x1FU << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x7C000000 */ -#define ADC_OFR1_OFFSET1_CH ADC_OFR1_OFFSET1_CH_Msk /*!< ADC offset number 1 channel selection */ -#define ADC_OFR1_OFFSET1_CH_0 (0x01U << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x04000000 */ -#define ADC_OFR1_OFFSET1_CH_1 (0x02U << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x08000000 */ -#define ADC_OFR1_OFFSET1_CH_2 (0x04U << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x10000000 */ -#define ADC_OFR1_OFFSET1_CH_3 (0x08U << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x20000000 */ -#define ADC_OFR1_OFFSET1_CH_4 (0x10U << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x40000000 */ - -#define ADC_OFR1_OFFSET1_EN_Pos (31U) -#define ADC_OFR1_OFFSET1_EN_Msk (0x1U << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */ -#define ADC_OFR1_OFFSET1_EN ADC_OFR1_OFFSET1_EN_Msk /*!< ADC offset number 1 enable */ - -/******************** Bit definition for ADC_OFR2 register ******************/ -#define ADC_OFR2_OFFSET2_Pos (0U) -#define ADC_OFR2_OFFSET2_Msk (0xFFFU << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000FFF */ -#define ADC_OFR2_OFFSET2 ADC_OFR2_OFFSET2_Msk /*!< ADC offset number 2 offset level */ -#define ADC_OFR2_OFFSET2_0 (0x001U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000001 */ -#define ADC_OFR2_OFFSET2_1 (0x002U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000002 */ -#define ADC_OFR2_OFFSET2_2 (0x004U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000004 */ -#define ADC_OFR2_OFFSET2_3 (0x008U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000008 */ -#define ADC_OFR2_OFFSET2_4 (0x010U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000010 */ -#define ADC_OFR2_OFFSET2_5 (0x020U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000020 */ -#define ADC_OFR2_OFFSET2_6 (0x040U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000040 */ -#define ADC_OFR2_OFFSET2_7 (0x080U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000080 */ -#define ADC_OFR2_OFFSET2_8 (0x100U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000100 */ -#define ADC_OFR2_OFFSET2_9 (0x200U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000200 */ -#define ADC_OFR2_OFFSET2_10 (0x400U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000400 */ -#define ADC_OFR2_OFFSET2_11 (0x800U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000800 */ - -#define ADC_OFR2_OFFSET2_CH_Pos (26U) -#define ADC_OFR2_OFFSET2_CH_Msk (0x1FU << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x7C000000 */ -#define ADC_OFR2_OFFSET2_CH ADC_OFR2_OFFSET2_CH_Msk /*!< ADC offset number 2 channel selection */ -#define ADC_OFR2_OFFSET2_CH_0 (0x01U << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x04000000 */ -#define ADC_OFR2_OFFSET2_CH_1 (0x02U << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x08000000 */ -#define ADC_OFR2_OFFSET2_CH_2 (0x04U << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x10000000 */ -#define ADC_OFR2_OFFSET2_CH_3 (0x08U << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x20000000 */ -#define ADC_OFR2_OFFSET2_CH_4 (0x10U << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x40000000 */ - -#define ADC_OFR2_OFFSET2_EN_Pos (31U) -#define ADC_OFR2_OFFSET2_EN_Msk (0x1U << ADC_OFR2_OFFSET2_EN_Pos) /*!< 0x80000000 */ -#define ADC_OFR2_OFFSET2_EN ADC_OFR2_OFFSET2_EN_Msk /*!< ADC offset number 2 enable */ - -/******************** Bit definition for ADC_OFR3 register ******************/ -#define ADC_OFR3_OFFSET3_Pos (0U) -#define ADC_OFR3_OFFSET3_Msk (0xFFFU << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000FFF */ -#define ADC_OFR3_OFFSET3 ADC_OFR3_OFFSET3_Msk /*!< ADC offset number 3 offset level */ -#define ADC_OFR3_OFFSET3_0 (0x001U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000001 */ -#define ADC_OFR3_OFFSET3_1 (0x002U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000002 */ -#define ADC_OFR3_OFFSET3_2 (0x004U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000004 */ -#define ADC_OFR3_OFFSET3_3 (0x008U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000008 */ -#define ADC_OFR3_OFFSET3_4 (0x010U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000010 */ -#define ADC_OFR3_OFFSET3_5 (0x020U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000020 */ -#define ADC_OFR3_OFFSET3_6 (0x040U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000040 */ -#define ADC_OFR3_OFFSET3_7 (0x080U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000080 */ -#define ADC_OFR3_OFFSET3_8 (0x100U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000100 */ -#define ADC_OFR3_OFFSET3_9 (0x200U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000200 */ -#define ADC_OFR3_OFFSET3_10 (0x400U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000400 */ -#define ADC_OFR3_OFFSET3_11 (0x800U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000800 */ - -#define ADC_OFR3_OFFSET3_CH_Pos (26U) -#define ADC_OFR3_OFFSET3_CH_Msk (0x1FU << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x7C000000 */ -#define ADC_OFR3_OFFSET3_CH ADC_OFR3_OFFSET3_CH_Msk /*!< ADC offset number 3 channel selection */ -#define ADC_OFR3_OFFSET3_CH_0 (0x01U << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x04000000 */ -#define ADC_OFR3_OFFSET3_CH_1 (0x02U << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x08000000 */ -#define ADC_OFR3_OFFSET3_CH_2 (0x04U << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x10000000 */ -#define ADC_OFR3_OFFSET3_CH_3 (0x08U << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x20000000 */ -#define ADC_OFR3_OFFSET3_CH_4 (0x10U << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x40000000 */ - -#define ADC_OFR3_OFFSET3_EN_Pos (31U) -#define ADC_OFR3_OFFSET3_EN_Msk (0x1U << ADC_OFR3_OFFSET3_EN_Pos) /*!< 0x80000000 */ -#define ADC_OFR3_OFFSET3_EN ADC_OFR3_OFFSET3_EN_Msk /*!< ADC offset number 3 enable */ - -/******************** Bit definition for ADC_OFR4 register ******************/ -#define ADC_OFR4_OFFSET4_Pos (0U) -#define ADC_OFR4_OFFSET4_Msk (0xFFFU << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000FFF */ -#define ADC_OFR4_OFFSET4 ADC_OFR4_OFFSET4_Msk /*!< ADC offset number 4 offset level */ -#define ADC_OFR4_OFFSET4_0 (0x001U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000001 */ -#define ADC_OFR4_OFFSET4_1 (0x002U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000002 */ -#define ADC_OFR4_OFFSET4_2 (0x004U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000004 */ -#define ADC_OFR4_OFFSET4_3 (0x008U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000008 */ -#define ADC_OFR4_OFFSET4_4 (0x010U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000010 */ -#define ADC_OFR4_OFFSET4_5 (0x020U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000020 */ -#define ADC_OFR4_OFFSET4_6 (0x040U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000040 */ -#define ADC_OFR4_OFFSET4_7 (0x080U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000080 */ -#define ADC_OFR4_OFFSET4_8 (0x100U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000100 */ -#define ADC_OFR4_OFFSET4_9 (0x200U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000200 */ -#define ADC_OFR4_OFFSET4_10 (0x400U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000400 */ -#define ADC_OFR4_OFFSET4_11 (0x800U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000800 */ - -#define ADC_OFR4_OFFSET4_CH_Pos (26U) -#define ADC_OFR4_OFFSET4_CH_Msk (0x1FU << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x7C000000 */ -#define ADC_OFR4_OFFSET4_CH ADC_OFR4_OFFSET4_CH_Msk /*!< ADC offset number 4 channel selection */ -#define ADC_OFR4_OFFSET4_CH_0 (0x01U << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x04000000 */ -#define ADC_OFR4_OFFSET4_CH_1 (0x02U << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x08000000 */ -#define ADC_OFR4_OFFSET4_CH_2 (0x04U << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x10000000 */ -#define ADC_OFR4_OFFSET4_CH_3 (0x08U << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x20000000 */ -#define ADC_OFR4_OFFSET4_CH_4 (0x10U << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x40000000 */ - -#define ADC_OFR4_OFFSET4_EN_Pos (31U) -#define ADC_OFR4_OFFSET4_EN_Msk (0x1U << ADC_OFR4_OFFSET4_EN_Pos) /*!< 0x80000000 */ -#define ADC_OFR4_OFFSET4_EN ADC_OFR4_OFFSET4_EN_Msk /*!< ADC offset number 4 enable */ - -/******************** Bit definition for ADC_JDR1 register ******************/ -#define ADC_JDR1_JDATA_Pos (0U) -#define ADC_JDR1_JDATA_Msk (0xFFFFU << ADC_JDR1_JDATA_Pos) /*!< 0x0000FFFF */ -#define ADC_JDR1_JDATA ADC_JDR1_JDATA_Msk /*!< ADC group injected sequencer rank 1 conversion data */ -#define ADC_JDR1_JDATA_0 (0x0001U << ADC_JDR1_JDATA_Pos) /*!< 0x00000001 */ -#define ADC_JDR1_JDATA_1 (0x0002U << ADC_JDR1_JDATA_Pos) /*!< 0x00000002 */ -#define ADC_JDR1_JDATA_2 (0x0004U << ADC_JDR1_JDATA_Pos) /*!< 0x00000004 */ -#define ADC_JDR1_JDATA_3 (0x0008U << ADC_JDR1_JDATA_Pos) /*!< 0x00000008 */ -#define ADC_JDR1_JDATA_4 (0x0010U << ADC_JDR1_JDATA_Pos) /*!< 0x00000010 */ -#define ADC_JDR1_JDATA_5 (0x0020U << ADC_JDR1_JDATA_Pos) /*!< 0x00000020 */ -#define ADC_JDR1_JDATA_6 (0x0040U << ADC_JDR1_JDATA_Pos) /*!< 0x00000040 */ -#define ADC_JDR1_JDATA_7 (0x0080U << ADC_JDR1_JDATA_Pos) /*!< 0x00000080 */ -#define ADC_JDR1_JDATA_8 (0x0100U << ADC_JDR1_JDATA_Pos) /*!< 0x00000100 */ -#define ADC_JDR1_JDATA_9 (0x0200U << ADC_JDR1_JDATA_Pos) /*!< 0x00000200 */ -#define ADC_JDR1_JDATA_10 (0x0400U << ADC_JDR1_JDATA_Pos) /*!< 0x00000400 */ -#define ADC_JDR1_JDATA_11 (0x0800U << ADC_JDR1_JDATA_Pos) /*!< 0x00000800 */ -#define ADC_JDR1_JDATA_12 (0x1000U << ADC_JDR1_JDATA_Pos) /*!< 0x00001000 */ -#define ADC_JDR1_JDATA_13 (0x2000U << ADC_JDR1_JDATA_Pos) /*!< 0x00002000 */ -#define ADC_JDR1_JDATA_14 (0x4000U << ADC_JDR1_JDATA_Pos) /*!< 0x00004000 */ -#define ADC_JDR1_JDATA_15 (0x8000U << ADC_JDR1_JDATA_Pos) /*!< 0x00008000 */ - -/******************** Bit definition for ADC_JDR2 register ******************/ -#define ADC_JDR2_JDATA_Pos (0U) -#define ADC_JDR2_JDATA_Msk (0xFFFFU << ADC_JDR2_JDATA_Pos) /*!< 0x0000FFFF */ -#define ADC_JDR2_JDATA ADC_JDR2_JDATA_Msk /*!< ADC group injected sequencer rank 2 conversion data */ -#define ADC_JDR2_JDATA_0 (0x0001U << ADC_JDR2_JDATA_Pos) /*!< 0x00000001 */ -#define ADC_JDR2_JDATA_1 (0x0002U << ADC_JDR2_JDATA_Pos) /*!< 0x00000002 */ -#define ADC_JDR2_JDATA_2 (0x0004U << ADC_JDR2_JDATA_Pos) /*!< 0x00000004 */ -#define ADC_JDR2_JDATA_3 (0x0008U << ADC_JDR2_JDATA_Pos) /*!< 0x00000008 */ -#define ADC_JDR2_JDATA_4 (0x0010U << ADC_JDR2_JDATA_Pos) /*!< 0x00000010 */ -#define ADC_JDR2_JDATA_5 (0x0020U << ADC_JDR2_JDATA_Pos) /*!< 0x00000020 */ -#define ADC_JDR2_JDATA_6 (0x0040U << ADC_JDR2_JDATA_Pos) /*!< 0x00000040 */ -#define ADC_JDR2_JDATA_7 (0x0080U << ADC_JDR2_JDATA_Pos) /*!< 0x00000080 */ -#define ADC_JDR2_JDATA_8 (0x0100U << ADC_JDR2_JDATA_Pos) /*!< 0x00000100 */ -#define ADC_JDR2_JDATA_9 (0x0200U << ADC_JDR2_JDATA_Pos) /*!< 0x00000200 */ -#define ADC_JDR2_JDATA_10 (0x0400U << ADC_JDR2_JDATA_Pos) /*!< 0x00000400 */ -#define ADC_JDR2_JDATA_11 (0x0800U << ADC_JDR2_JDATA_Pos) /*!< 0x00000800 */ -#define ADC_JDR2_JDATA_12 (0x1000U << ADC_JDR2_JDATA_Pos) /*!< 0x00001000 */ -#define ADC_JDR2_JDATA_13 (0x2000U << ADC_JDR2_JDATA_Pos) /*!< 0x00002000 */ -#define ADC_JDR2_JDATA_14 (0x4000U << ADC_JDR2_JDATA_Pos) /*!< 0x00004000 */ -#define ADC_JDR2_JDATA_15 (0x8000U << ADC_JDR2_JDATA_Pos) /*!< 0x00008000 */ - -/******************** Bit definition for ADC_JDR3 register ******************/ -#define ADC_JDR3_JDATA_Pos (0U) -#define ADC_JDR3_JDATA_Msk (0xFFFFU << ADC_JDR3_JDATA_Pos) /*!< 0x0000FFFF */ -#define ADC_JDR3_JDATA ADC_JDR3_JDATA_Msk /*!< ADC group injected sequencer rank 3 conversion data */ -#define ADC_JDR3_JDATA_0 (0x0001U << ADC_JDR3_JDATA_Pos) /*!< 0x00000001 */ -#define ADC_JDR3_JDATA_1 (0x0002U << ADC_JDR3_JDATA_Pos) /*!< 0x00000002 */ -#define ADC_JDR3_JDATA_2 (0x0004U << ADC_JDR3_JDATA_Pos) /*!< 0x00000004 */ -#define ADC_JDR3_JDATA_3 (0x0008U << ADC_JDR3_JDATA_Pos) /*!< 0x00000008 */ -#define ADC_JDR3_JDATA_4 (0x0010U << ADC_JDR3_JDATA_Pos) /*!< 0x00000010 */ -#define ADC_JDR3_JDATA_5 (0x0020U << ADC_JDR3_JDATA_Pos) /*!< 0x00000020 */ -#define ADC_JDR3_JDATA_6 (0x0040U << ADC_JDR3_JDATA_Pos) /*!< 0x00000040 */ -#define ADC_JDR3_JDATA_7 (0x0080U << ADC_JDR3_JDATA_Pos) /*!< 0x00000080 */ -#define ADC_JDR3_JDATA_8 (0x0100U << ADC_JDR3_JDATA_Pos) /*!< 0x00000100 */ -#define ADC_JDR3_JDATA_9 (0x0200U << ADC_JDR3_JDATA_Pos) /*!< 0x00000200 */ -#define ADC_JDR3_JDATA_10 (0x0400U << ADC_JDR3_JDATA_Pos) /*!< 0x00000400 */ -#define ADC_JDR3_JDATA_11 (0x0800U << ADC_JDR3_JDATA_Pos) /*!< 0x00000800 */ -#define ADC_JDR3_JDATA_12 (0x1000U << ADC_JDR3_JDATA_Pos) /*!< 0x00001000 */ -#define ADC_JDR3_JDATA_13 (0x2000U << ADC_JDR3_JDATA_Pos) /*!< 0x00002000 */ -#define ADC_JDR3_JDATA_14 (0x4000U << ADC_JDR3_JDATA_Pos) /*!< 0x00004000 */ -#define ADC_JDR3_JDATA_15 (0x8000U << ADC_JDR3_JDATA_Pos) /*!< 0x00008000 */ - -/******************** Bit definition for ADC_JDR4 register ******************/ -#define ADC_JDR4_JDATA_Pos (0U) -#define ADC_JDR4_JDATA_Msk (0xFFFFU << ADC_JDR4_JDATA_Pos) /*!< 0x0000FFFF */ -#define ADC_JDR4_JDATA ADC_JDR4_JDATA_Msk /*!< ADC group injected sequencer rank 4 conversion data */ -#define ADC_JDR4_JDATA_0 (0x0001U << ADC_JDR4_JDATA_Pos) /*!< 0x00000001 */ -#define ADC_JDR4_JDATA_1 (0x0002U << ADC_JDR4_JDATA_Pos) /*!< 0x00000002 */ -#define ADC_JDR4_JDATA_2 (0x0004U << ADC_JDR4_JDATA_Pos) /*!< 0x00000004 */ -#define ADC_JDR4_JDATA_3 (0x0008U << ADC_JDR4_JDATA_Pos) /*!< 0x00000008 */ -#define ADC_JDR4_JDATA_4 (0x0010U << ADC_JDR4_JDATA_Pos) /*!< 0x00000010 */ -#define ADC_JDR4_JDATA_5 (0x0020U << ADC_JDR4_JDATA_Pos) /*!< 0x00000020 */ -#define ADC_JDR4_JDATA_6 (0x0040U << ADC_JDR4_JDATA_Pos) /*!< 0x00000040 */ -#define ADC_JDR4_JDATA_7 (0x0080U << ADC_JDR4_JDATA_Pos) /*!< 0x00000080 */ -#define ADC_JDR4_JDATA_8 (0x0100U << ADC_JDR4_JDATA_Pos) /*!< 0x00000100 */ -#define ADC_JDR4_JDATA_9 (0x0200U << ADC_JDR4_JDATA_Pos) /*!< 0x00000200 */ -#define ADC_JDR4_JDATA_10 (0x0400U << ADC_JDR4_JDATA_Pos) /*!< 0x00000400 */ -#define ADC_JDR4_JDATA_11 (0x0800U << ADC_JDR4_JDATA_Pos) /*!< 0x00000800 */ -#define ADC_JDR4_JDATA_12 (0x1000U << ADC_JDR4_JDATA_Pos) /*!< 0x00001000 */ -#define ADC_JDR4_JDATA_13 (0x2000U << ADC_JDR4_JDATA_Pos) /*!< 0x00002000 */ -#define ADC_JDR4_JDATA_14 (0x4000U << ADC_JDR4_JDATA_Pos) /*!< 0x00004000 */ -#define ADC_JDR4_JDATA_15 (0x8000U << ADC_JDR4_JDATA_Pos) /*!< 0x00008000 */ - -/******************** Bit definition for ADC_AWD2CR register ****************/ -#define ADC_AWD2CR_AWD2CH_Pos (0U) -#define ADC_AWD2CR_AWD2CH_Msk (0x7FFFFU << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x0007FFFF */ -#define ADC_AWD2CR_AWD2CH ADC_AWD2CR_AWD2CH_Msk /*!< ADC analog watchdog 2 monitored channel selection */ -#define ADC_AWD2CR_AWD2CH_0 (0x00001U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ -#define ADC_AWD2CR_AWD2CH_1 (0x00002U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000002 */ -#define ADC_AWD2CR_AWD2CH_2 (0x00004U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000004 */ -#define ADC_AWD2CR_AWD2CH_3 (0x00008U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000008 */ -#define ADC_AWD2CR_AWD2CH_4 (0x00010U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000010 */ -#define ADC_AWD2CR_AWD2CH_5 (0x00020U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000020 */ -#define ADC_AWD2CR_AWD2CH_6 (0x00040U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000040 */ -#define ADC_AWD2CR_AWD2CH_7 (0x00080U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000080 */ -#define ADC_AWD2CR_AWD2CH_8 (0x00100U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000100 */ -#define ADC_AWD2CR_AWD2CH_9 (0x00200U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000200 */ -#define ADC_AWD2CR_AWD2CH_10 (0x00400U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000400 */ -#define ADC_AWD2CR_AWD2CH_11 (0x00800U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000800 */ -#define ADC_AWD2CR_AWD2CH_12 (0x01000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00001000 */ -#define ADC_AWD2CR_AWD2CH_13 (0x02000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00002000 */ -#define ADC_AWD2CR_AWD2CH_14 (0x04000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00004000 */ -#define ADC_AWD2CR_AWD2CH_15 (0x08000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00008000 */ -#define ADC_AWD2CR_AWD2CH_16 (0x10000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00010000 */ -#define ADC_AWD2CR_AWD2CH_17 (0x20000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00020000 */ -#define ADC_AWD2CR_AWD2CH_18 (0x40000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00040000 */ - -/******************** Bit definition for ADC_AWD3CR register ****************/ -#define ADC_AWD3CR_AWD3CH_Pos (0U) -#define ADC_AWD3CR_AWD3CH_Msk (0x7FFFFU << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x0007FFFF */ -#define ADC_AWD3CR_AWD3CH ADC_AWD3CR_AWD3CH_Msk /*!< ADC analog watchdog 3 monitored channel selection */ -#define ADC_AWD3CR_AWD3CH_0 (0x00001U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000001 */ -#define ADC_AWD3CR_AWD3CH_1 (0x00002U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000002 */ -#define ADC_AWD3CR_AWD3CH_2 (0x00004U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000004 */ -#define ADC_AWD3CR_AWD3CH_3 (0x00008U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000008 */ -#define ADC_AWD3CR_AWD3CH_4 (0x00010U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000010 */ -#define ADC_AWD3CR_AWD3CH_5 (0x00020U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000020 */ -#define ADC_AWD3CR_AWD3CH_6 (0x00040U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000040 */ -#define ADC_AWD3CR_AWD3CH_7 (0x00080U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000080 */ -#define ADC_AWD3CR_AWD3CH_8 (0x00100U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000100 */ -#define ADC_AWD3CR_AWD3CH_9 (0x00200U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000200 */ -#define ADC_AWD3CR_AWD3CH_10 (0x00400U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000400 */ -#define ADC_AWD3CR_AWD3CH_11 (0x00800U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000800 */ -#define ADC_AWD3CR_AWD3CH_12 (0x01000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00001000 */ -#define ADC_AWD3CR_AWD3CH_13 (0x02000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00002000 */ -#define ADC_AWD3CR_AWD3CH_14 (0x04000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00004000 */ -#define ADC_AWD3CR_AWD3CH_15 (0x08000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00008000 */ -#define ADC_AWD3CR_AWD3CH_16 (0x10000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00010000 */ -#define ADC_AWD3CR_AWD3CH_17 (0x20000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00020000 */ -#define ADC_AWD3CR_AWD3CH_18 (0x40000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00040000 */ - -/******************** Bit definition for ADC_DIFSEL register ****************/ -#define ADC_DIFSEL_DIFSEL_Pos (0U) -#define ADC_DIFSEL_DIFSEL_Msk (0x7FFFFU << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x0007FFFF */ -#define ADC_DIFSEL_DIFSEL ADC_DIFSEL_DIFSEL_Msk /*!< ADC channel differential or single-ended mode */ -#define ADC_DIFSEL_DIFSEL_0 (0x00001U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000001 */ -#define ADC_DIFSEL_DIFSEL_1 (0x00002U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000002 */ -#define ADC_DIFSEL_DIFSEL_2 (0x00004U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000004 */ -#define ADC_DIFSEL_DIFSEL_3 (0x00008U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000008 */ -#define ADC_DIFSEL_DIFSEL_4 (0x00010U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000010 */ -#define ADC_DIFSEL_DIFSEL_5 (0x00020U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000020 */ -#define ADC_DIFSEL_DIFSEL_6 (0x00040U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000040 */ -#define ADC_DIFSEL_DIFSEL_7 (0x00080U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000080 */ -#define ADC_DIFSEL_DIFSEL_8 (0x00100U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000100 */ -#define ADC_DIFSEL_DIFSEL_9 (0x00200U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000200 */ -#define ADC_DIFSEL_DIFSEL_10 (0x00400U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000400 */ -#define ADC_DIFSEL_DIFSEL_11 (0x00800U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000800 */ -#define ADC_DIFSEL_DIFSEL_12 (0x01000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00001000 */ -#define ADC_DIFSEL_DIFSEL_13 (0x02000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00002000 */ -#define ADC_DIFSEL_DIFSEL_14 (0x04000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00004000 */ -#define ADC_DIFSEL_DIFSEL_15 (0x08000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00008000 */ -#define ADC_DIFSEL_DIFSEL_16 (0x10000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00010000 */ -#define ADC_DIFSEL_DIFSEL_17 (0x20000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00020000 */ -#define ADC_DIFSEL_DIFSEL_18 (0x40000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00040000 */ - -/******************** Bit definition for ADC_CALFACT register ***************/ -#define ADC_CALFACT_CALFACT_S_Pos (0U) -#define ADC_CALFACT_CALFACT_S_Msk (0x7FU << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x0000007F */ -#define ADC_CALFACT_CALFACT_S ADC_CALFACT_CALFACT_S_Msk /*!< ADC calibration factor in single-ended mode */ -#define ADC_CALFACT_CALFACT_S_0 (0x01U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000001 */ -#define ADC_CALFACT_CALFACT_S_1 (0x02U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000002 */ -#define ADC_CALFACT_CALFACT_S_2 (0x04U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000004 */ -#define ADC_CALFACT_CALFACT_S_3 (0x08U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000008 */ -#define ADC_CALFACT_CALFACT_S_4 (0x10U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000010 */ -#define ADC_CALFACT_CALFACT_S_5 (0x20U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000020 */ -#define ADC_CALFACT_CALFACT_S_6 (0x40U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000040 */ - -#define ADC_CALFACT_CALFACT_D_Pos (16U) -#define ADC_CALFACT_CALFACT_D_Msk (0x7FU << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x007F0000 */ -#define ADC_CALFACT_CALFACT_D ADC_CALFACT_CALFACT_D_Msk /*!< ADC calibration factor in differential mode */ -#define ADC_CALFACT_CALFACT_D_0 (0x01U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00010000 */ -#define ADC_CALFACT_CALFACT_D_1 (0x02U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00020000 */ -#define ADC_CALFACT_CALFACT_D_2 (0x04U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00040000 */ -#define ADC_CALFACT_CALFACT_D_3 (0x08U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00080000 */ -#define ADC_CALFACT_CALFACT_D_4 (0x10U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00100000 */ -#define ADC_CALFACT_CALFACT_D_5 (0x20U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00200000 */ -#define ADC_CALFACT_CALFACT_D_6 (0x40U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00400000 */ - -/************************* ADC Common registers *****************************/ -/******************** Bit definition for ADC_CSR register *******************/ -#define ADC_CSR_ADRDY_MST_Pos (0U) -#define ADC_CSR_ADRDY_MST_Msk (0x1U << ADC_CSR_ADRDY_MST_Pos) /*!< 0x00000001 */ -#define ADC_CSR_ADRDY_MST ADC_CSR_ADRDY_MST_Msk /*!< ADC multimode master ready flag */ -#define ADC_CSR_EOSMP_MST_Pos (1U) -#define ADC_CSR_EOSMP_MST_Msk (0x1U << ADC_CSR_EOSMP_MST_Pos) /*!< 0x00000002 */ -#define ADC_CSR_EOSMP_MST ADC_CSR_EOSMP_MST_Msk /*!< ADC multimode master group regular end of sampling flag */ -#define ADC_CSR_EOC_MST_Pos (2U) -#define ADC_CSR_EOC_MST_Msk (0x1U << ADC_CSR_EOC_MST_Pos) /*!< 0x00000004 */ -#define ADC_CSR_EOC_MST ADC_CSR_EOC_MST_Msk /*!< ADC multimode master group regular end of unitary conversion flag */ -#define ADC_CSR_EOS_MST_Pos (3U) -#define ADC_CSR_EOS_MST_Msk (0x1U << ADC_CSR_EOS_MST_Pos) /*!< 0x00000008 */ -#define ADC_CSR_EOS_MST ADC_CSR_EOS_MST_Msk /*!< ADC multimode master group regular end of sequence conversions flag */ -#define ADC_CSR_OVR_MST_Pos (4U) -#define ADC_CSR_OVR_MST_Msk (0x1U << ADC_CSR_OVR_MST_Pos) /*!< 0x00000010 */ -#define ADC_CSR_OVR_MST ADC_CSR_OVR_MST_Msk /*!< ADC multimode master group regular overrun flag */ -#define ADC_CSR_JEOC_MST_Pos (5U) -#define ADC_CSR_JEOC_MST_Msk (0x1U << ADC_CSR_JEOC_MST_Pos) /*!< 0x00000020 */ -#define ADC_CSR_JEOC_MST ADC_CSR_JEOC_MST_Msk /*!< ADC multimode master group injected end of unitary conversion flag */ -#define ADC_CSR_JEOS_MST_Pos (6U) -#define ADC_CSR_JEOS_MST_Msk (0x1U << ADC_CSR_JEOS_MST_Pos) /*!< 0x00000040 */ -#define ADC_CSR_JEOS_MST ADC_CSR_JEOS_MST_Msk /*!< ADC multimode master group injected end of sequence conversions flag */ -#define ADC_CSR_AWD1_MST_Pos (7U) -#define ADC_CSR_AWD1_MST_Msk (0x1U << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */ -#define ADC_CSR_AWD1_MST ADC_CSR_AWD1_MST_Msk /*!< ADC multimode master analog watchdog 1 flag */ -#define ADC_CSR_AWD2_MST_Pos (8U) -#define ADC_CSR_AWD2_MST_Msk (0x1U << ADC_CSR_AWD2_MST_Pos) /*!< 0x00000100 */ -#define ADC_CSR_AWD2_MST ADC_CSR_AWD2_MST_Msk /*!< ADC multimode master analog watchdog 2 flag */ -#define ADC_CSR_AWD3_MST_Pos (9U) -#define ADC_CSR_AWD3_MST_Msk (0x1U << ADC_CSR_AWD3_MST_Pos) /*!< 0x00000200 */ -#define ADC_CSR_AWD3_MST ADC_CSR_AWD3_MST_Msk /*!< ADC multimode master analog watchdog 3 flag */ -#define ADC_CSR_JQOVF_MST_Pos (10U) -#define ADC_CSR_JQOVF_MST_Msk (0x1U << ADC_CSR_JQOVF_MST_Pos) /*!< 0x00000400 */ -#define ADC_CSR_JQOVF_MST ADC_CSR_JQOVF_MST_Msk /*!< ADC multimode master group injected contexts queue overflow flag */ - -#define ADC_CSR_ADRDY_SLV_Pos (16U) -#define ADC_CSR_ADRDY_SLV_Msk (0x1U << ADC_CSR_ADRDY_SLV_Pos) /*!< 0x00010000 */ -#define ADC_CSR_ADRDY_SLV ADC_CSR_ADRDY_SLV_Msk /*!< ADC multimode slave ready flag */ -#define ADC_CSR_EOSMP_SLV_Pos (17U) -#define ADC_CSR_EOSMP_SLV_Msk (0x1U << ADC_CSR_EOSMP_SLV_Pos) /*!< 0x00020000 */ -#define ADC_CSR_EOSMP_SLV ADC_CSR_EOSMP_SLV_Msk /*!< ADC multimode slave group regular end of sampling flag */ -#define ADC_CSR_EOC_SLV_Pos (18U) -#define ADC_CSR_EOC_SLV_Msk (0x1U << ADC_CSR_EOC_SLV_Pos) /*!< 0x00040000 */ -#define ADC_CSR_EOC_SLV ADC_CSR_EOC_SLV_Msk /*!< ADC multimode slave group regular end of unitary conversion flag */ -#define ADC_CSR_EOS_SLV_Pos (19U) -#define ADC_CSR_EOS_SLV_Msk (0x1U << ADC_CSR_EOS_SLV_Pos) /*!< 0x00080000 */ -#define ADC_CSR_EOS_SLV ADC_CSR_EOS_SLV_Msk /*!< ADC multimode slave group regular end of sequence conversions flag */ -#define ADC_CSR_OVR_SLV_Pos (20U) -#define ADC_CSR_OVR_SLV_Msk (0x1U << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */ -#define ADC_CSR_OVR_SLV ADC_CSR_OVR_SLV_Msk /*!< ADC multimode slave group regular overrun flag */ -#define ADC_CSR_JEOC_SLV_Pos (21U) -#define ADC_CSR_JEOC_SLV_Msk (0x1U << ADC_CSR_JEOC_SLV_Pos) /*!< 0x00200000 */ -#define ADC_CSR_JEOC_SLV ADC_CSR_JEOC_SLV_Msk /*!< ADC multimode slave group injected end of unitary conversion flag */ -#define ADC_CSR_JEOS_SLV_Pos (22U) -#define ADC_CSR_JEOS_SLV_Msk (0x1U << ADC_CSR_JEOS_SLV_Pos) /*!< 0x00400000 */ -#define ADC_CSR_JEOS_SLV ADC_CSR_JEOS_SLV_Msk /*!< ADC multimode slave group injected end of sequence conversions flag */ -#define ADC_CSR_AWD1_SLV_Pos (23U) -#define ADC_CSR_AWD1_SLV_Msk (0x1U << ADC_CSR_AWD1_SLV_Pos) /*!< 0x00800000 */ -#define ADC_CSR_AWD1_SLV ADC_CSR_AWD1_SLV_Msk /*!< ADC multimode slave analog watchdog 1 flag */ -#define ADC_CSR_AWD2_SLV_Pos (24U) -#define ADC_CSR_AWD2_SLV_Msk (0x1U << ADC_CSR_AWD2_SLV_Pos) /*!< 0x01000000 */ -#define ADC_CSR_AWD2_SLV ADC_CSR_AWD2_SLV_Msk /*!< ADC multimode slave analog watchdog 2 flag */ -#define ADC_CSR_AWD3_SLV_Pos (25U) -#define ADC_CSR_AWD3_SLV_Msk (0x1U << ADC_CSR_AWD3_SLV_Pos) /*!< 0x02000000 */ -#define ADC_CSR_AWD3_SLV ADC_CSR_AWD3_SLV_Msk /*!< ADC multimode slave analog watchdog 3 flag */ -#define ADC_CSR_JQOVF_SLV_Pos (26U) -#define ADC_CSR_JQOVF_SLV_Msk (0x1U << ADC_CSR_JQOVF_SLV_Pos) /*!< 0x04000000 */ -#define ADC_CSR_JQOVF_SLV ADC_CSR_JQOVF_SLV_Msk /*!< ADC multimode slave group injected contexts queue overflow flag */ - -/******************** Bit definition for ADC_CCR register *******************/ -#define ADC_CCR_DUAL_Pos (0U) -#define ADC_CCR_DUAL_Msk (0x1FU << ADC_CCR_DUAL_Pos) /*!< 0x0000001F */ -#define ADC_CCR_DUAL ADC_CCR_DUAL_Msk /*!< ADC multimode mode selection */ -#define ADC_CCR_DUAL_0 (0x01U << ADC_CCR_DUAL_Pos) /*!< 0x00000001 */ -#define ADC_CCR_DUAL_1 (0x02U << ADC_CCR_DUAL_Pos) /*!< 0x00000002 */ -#define ADC_CCR_DUAL_2 (0x04U << ADC_CCR_DUAL_Pos) /*!< 0x00000004 */ -#define ADC_CCR_DUAL_3 (0x08U << ADC_CCR_DUAL_Pos) /*!< 0x00000008 */ -#define ADC_CCR_DUAL_4 (0x10U << ADC_CCR_DUAL_Pos) /*!< 0x00000010 */ - -#define ADC_CCR_DELAY_Pos (8U) -#define ADC_CCR_DELAY_Msk (0xFU << ADC_CCR_DELAY_Pos) /*!< 0x00000F00 */ -#define ADC_CCR_DELAY ADC_CCR_DELAY_Msk /*!< ADC multimode delay between 2 sampling phases */ -#define ADC_CCR_DELAY_0 (0x1U << ADC_CCR_DELAY_Pos) /*!< 0x00000100 */ -#define ADC_CCR_DELAY_1 (0x2U << ADC_CCR_DELAY_Pos) /*!< 0x00000200 */ -#define ADC_CCR_DELAY_2 (0x4U << ADC_CCR_DELAY_Pos) /*!< 0x00000400 */ -#define ADC_CCR_DELAY_3 (0x8U << ADC_CCR_DELAY_Pos) /*!< 0x00000800 */ - -#define ADC_CCR_DMACFG_Pos (13U) -#define ADC_CCR_DMACFG_Msk (0x1U << ADC_CCR_DMACFG_Pos) /*!< 0x00002000 */ -#define ADC_CCR_DMACFG ADC_CCR_DMACFG_Msk /*!< ADC multimode DMA transfer configuration */ - -#define ADC_CCR_MDMA_Pos (14U) -#define ADC_CCR_MDMA_Msk (0x3U << ADC_CCR_MDMA_Pos) /*!< 0x0000C000 */ -#define ADC_CCR_MDMA ADC_CCR_MDMA_Msk /*!< ADC multimode DMA transfer enable */ -#define ADC_CCR_MDMA_0 (0x1U << ADC_CCR_MDMA_Pos) /*!< 0x00004000 */ -#define ADC_CCR_MDMA_1 (0x2U << ADC_CCR_MDMA_Pos) /*!< 0x00008000 */ - -#define ADC_CCR_CKMODE_Pos (16U) -#define ADC_CCR_CKMODE_Msk (0x3U << ADC_CCR_CKMODE_Pos) /*!< 0x00030000 */ -#define ADC_CCR_CKMODE ADC_CCR_CKMODE_Msk /*!< ADC common clock source and prescaler (prescaler only for clock source synchronous) */ -#define ADC_CCR_CKMODE_0 (0x1U << ADC_CCR_CKMODE_Pos) /*!< 0x00010000 */ -#define ADC_CCR_CKMODE_1 (0x2U << ADC_CCR_CKMODE_Pos) /*!< 0x00020000 */ - -#define ADC_CCR_PRESC_Pos (18U) -#define ADC_CCR_PRESC_Msk (0xFU << ADC_CCR_PRESC_Pos) /*!< 0x003C0000 */ -#define ADC_CCR_PRESC ADC_CCR_PRESC_Msk /*!< ADC common clock prescaler, only for clock source asynchronous */ -#define ADC_CCR_PRESC_0 (0x1U << ADC_CCR_PRESC_Pos) /*!< 0x00040000 */ -#define ADC_CCR_PRESC_1 (0x2U << ADC_CCR_PRESC_Pos) /*!< 0x00080000 */ -#define ADC_CCR_PRESC_2 (0x4U << ADC_CCR_PRESC_Pos) /*!< 0x00100000 */ -#define ADC_CCR_PRESC_3 (0x8U << ADC_CCR_PRESC_Pos) /*!< 0x00200000 */ - -#define ADC_CCR_VREFEN_Pos (22U) -#define ADC_CCR_VREFEN_Msk (0x1U << ADC_CCR_VREFEN_Pos) /*!< 0x00400000 */ -#define ADC_CCR_VREFEN ADC_CCR_VREFEN_Msk /*!< ADC internal path to VrefInt enable */ -#define ADC_CCR_TSEN_Pos (23U) -#define ADC_CCR_TSEN_Msk (0x1U << ADC_CCR_TSEN_Pos) /*!< 0x00800000 */ -#define ADC_CCR_TSEN ADC_CCR_TSEN_Msk /*!< ADC internal path to temperature sensor enable */ -#define ADC_CCR_VBATEN_Pos (24U) -#define ADC_CCR_VBATEN_Msk (0x1U << ADC_CCR_VBATEN_Pos) /*!< 0x01000000 */ -#define ADC_CCR_VBATEN ADC_CCR_VBATEN_Msk /*!< ADC internal path to battery voltage enable */ - -/******************** Bit definition for ADC_CDR register *******************/ -#define ADC_CDR_RDATA_MST_Pos (0U) -#define ADC_CDR_RDATA_MST_Msk (0xFFFFU << ADC_CDR_RDATA_MST_Pos) /*!< 0x0000FFFF */ -#define ADC_CDR_RDATA_MST ADC_CDR_RDATA_MST_Msk /*!< ADC multimode master group regular conversion data */ -#define ADC_CDR_RDATA_MST_0 (0x0001U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000001 */ -#define ADC_CDR_RDATA_MST_1 (0x0002U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000002 */ -#define ADC_CDR_RDATA_MST_2 (0x0004U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000004 */ -#define ADC_CDR_RDATA_MST_3 (0x0008U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000008 */ -#define ADC_CDR_RDATA_MST_4 (0x0010U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000010 */ -#define ADC_CDR_RDATA_MST_5 (0x0020U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000020 */ -#define ADC_CDR_RDATA_MST_6 (0x0040U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000040 */ -#define ADC_CDR_RDATA_MST_7 (0x0080U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000080 */ -#define ADC_CDR_RDATA_MST_8 (0x0100U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000100 */ -#define ADC_CDR_RDATA_MST_9 (0x0200U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000200 */ -#define ADC_CDR_RDATA_MST_10 (0x0400U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000400 */ -#define ADC_CDR_RDATA_MST_11 (0x0800U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000800 */ -#define ADC_CDR_RDATA_MST_12 (0x1000U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00001000 */ -#define ADC_CDR_RDATA_MST_13 (0x2000U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00002000 */ -#define ADC_CDR_RDATA_MST_14 (0x4000U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00004000 */ -#define ADC_CDR_RDATA_MST_15 (0x8000U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00008000 */ - -#define ADC_CDR_RDATA_SLV_Pos (16U) -#define ADC_CDR_RDATA_SLV_Msk (0xFFFFU << ADC_CDR_RDATA_SLV_Pos) /*!< 0xFFFF0000 */ -#define ADC_CDR_RDATA_SLV ADC_CDR_RDATA_SLV_Msk /*!< ADC multimode slave group regular conversion data */ -#define ADC_CDR_RDATA_SLV_0 (0x0001U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00010000 */ -#define ADC_CDR_RDATA_SLV_1 (0x0002U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00020000 */ -#define ADC_CDR_RDATA_SLV_2 (0x0004U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00040000 */ -#define ADC_CDR_RDATA_SLV_3 (0x0008U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00080000 */ -#define ADC_CDR_RDATA_SLV_4 (0x0010U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00100000 */ -#define ADC_CDR_RDATA_SLV_5 (0x0020U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00200000 */ -#define ADC_CDR_RDATA_SLV_6 (0x0040U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00400000 */ -#define ADC_CDR_RDATA_SLV_7 (0x0080U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00800000 */ -#define ADC_CDR_RDATA_SLV_8 (0x0100U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x01000000 */ -#define ADC_CDR_RDATA_SLV_9 (0x0200U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x02000000 */ -#define ADC_CDR_RDATA_SLV_10 (0x0400U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x04000000 */ -#define ADC_CDR_RDATA_SLV_11 (0x0800U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x08000000 */ -#define ADC_CDR_RDATA_SLV_12 (0x1000U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x10000000 */ -#define ADC_CDR_RDATA_SLV_13 (0x2000U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x20000000 */ -#define ADC_CDR_RDATA_SLV_14 (0x4000U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x40000000 */ -#define ADC_CDR_RDATA_SLV_15 (0x8000U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x80000000 */ - -/******************************************************************************/ -/* */ -/* Controller Area Network */ -/* */ -/******************************************************************************/ -/*!*/ -#define DAC_CR_CEN1_Pos (14U) -#define DAC_CR_CEN1_Msk (0x1U << DAC_CR_CEN1_Pos) /*!< 0x00004000 */ -#define DAC_CR_CEN1 DAC_CR_CEN1_Msk /*!*/ - -#define DAC_CR_EN2_Pos (16U) -#define DAC_CR_EN2_Msk (0x1U << DAC_CR_EN2_Pos) /*!< 0x00010000 */ -#define DAC_CR_EN2 DAC_CR_EN2_Msk /*!*/ -#define DAC_CR_CEN2_Pos (30U) -#define DAC_CR_CEN2_Msk (0x1U << DAC_CR_CEN2_Pos) /*!< 0x40000000 */ -#define DAC_CR_CEN2 DAC_CR_CEN2_Msk /*!*/ - -/***************** Bit definition for DAC_SWTRIGR register ******************/ -#define DAC_SWTRIGR_SWTRIG1_Pos (0U) -#define DAC_SWTRIGR_SWTRIG1_Msk (0x1U << DAC_SWTRIGR_SWTRIG1_Pos) /*!< 0x00000001 */ -#define DAC_SWTRIGR_SWTRIG1 DAC_SWTRIGR_SWTRIG1_Msk /*!
© COPYRIGHT(c) 2017 STMicroelectronics
- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32l4xx - * @{ - */ - -#ifndef __STM32L4xx_H -#define __STM32L4xx_H - -#ifdef __cplusplus - extern "C" { -#endif /* __cplusplus */ - -/** @addtogroup Library_configuration_section - * @{ - */ - -/** - * @brief STM32 Family - */ -#if !defined (STM32L4) -#define STM32L4 -#endif /* STM32L4 */ - -/* Uncomment the line below according to the target STM32L4 device used in your - application - */ - -#if !defined (STM32L431xx) && !defined (STM32L432xx) && !defined (STM32L433xx) && !defined (STM32L442xx) && !defined (STM32L443xx) && \ - !defined (STM32L451xx) && !defined (STM32L452xx) && !defined (STM32L462xx) && \ - !defined (STM32L471xx) && !defined (STM32L475xx) && !defined (STM32L476xx) && !defined (STM32L485xx) && !defined (STM32L486xx) && \ - !defined (STM32L496xx) && !defined (STM32L4A6xx) && \ - !defined (STM32L4R5xx) && !defined (STM32L4R7xx) && !defined (STM32L4R9xx) && !defined (STM32L4S5xx) && !defined (STM32L4S7xx) && !defined (STM32L4S9xx) - /* #define STM32L431xx */ /*!< STM32L431xx Devices */ - /* #define STM32L432xx */ /*!< STM32L432xx Devices */ - /* #define STM32L433xx */ /*!< STM32L433xx Devices */ - /* #define STM32L442xx */ /*!< STM32L442xx Devices */ - /* #define STM32L443xx */ /*!< STM32L443xx Devices */ - /* #define STM32L451xx */ /*!< STM32L451xx Devices */ - /* #define STM32L452xx */ /*!< STM32L452xx Devices */ - /* #define STM32L462xx */ /*!< STM32L462xx Devices */ - /* #define STM32L471xx */ /*!< STM32L471xx Devices */ - /* #define STM32L475xx */ /*!< STM32L475xx Devices */ - /* #define STM32L476xx */ /*!< STM32L476xx Devices */ - /* #define STM32L485xx */ /*!< STM32L485xx Devices */ - /* #define STM32L486xx */ /*!< STM32L486xx Devices */ - /* #define STM32L496xx */ /*!< STM32L496xx Devices */ - /* #define STM32L4A6xx */ /*!< STM32L4A6xx Devices */ - /* #define STM32L4R5xx */ /*!< STM32L4R5xx Devices */ - /* #define STM32L4R7xx */ /*!< STM32L4R7xx Devices */ - /* #define STM32L4R9xx */ /*!< STM32L4R9xx Devices */ - /* #define STM32L4S5xx */ /*!< STM32L4S5xx Devices */ - /* #define STM32L4S7xx */ /*!< STM32L4S7xx Devices */ - /* #define STM32L4S9xx */ /*!< STM32L4S9xx Devices */ -#endif - -/* Tip: To avoid modifying this file each time you need to switch between these - devices, you can define the device in your toolchain compiler preprocessor. - */ -#if !defined (USE_HAL_DRIVER) -/** - * @brief Comment the line below if you will not use the peripherals drivers. - In this case, these drivers will not be included and the application code will - be based on direct access to peripherals registers - */ - /*#define USE_HAL_DRIVER */ -#endif /* USE_HAL_DRIVER */ - -/** - * @brief CMSIS Device version number - */ -#define __STM32L4_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */ -#define __STM32L4_CMSIS_VERSION_SUB1 (0x04) /*!< [23:16] sub1 version */ -#define __STM32L4_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */ -#define __STM32L4_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */ -#define __STM32L4_CMSIS_VERSION ((__STM32L4_CMSIS_VERSION_MAIN << 24)\ - |(__STM32L4_CMSIS_VERSION_SUB1 << 16)\ - |(__STM32L4_CMSIS_VERSION_SUB2 << 8 )\ - |(__STM32L4_CMSIS_VERSION_RC)) - -/** - * @} - */ - -/** @addtogroup Device_Included - * @{ - */ - -#if defined(STM32L431xx) - #include "stm32l431xx.h" -#elif defined(STM32L432xx) - #include "stm32l432xx.h" -#elif defined(STM32L433xx) - #include "stm32l433xx.h" -#elif defined(STM32L442xx) - #include "stm32l442xx.h" -#elif defined(STM32L443xx) - #include "stm32l443xx.h" -#elif defined(STM32L451xx) - #include "stm32l451xx.h" -#elif defined(STM32L452xx) - #include "stm32l452xx.h" -#elif defined(STM32L462xx) - #include "stm32l462xx.h" -#elif defined(STM32L471xx) - #include "stm32l471xx.h" -#elif defined(STM32L475xx) - #include "stm32l475xx.h" -#elif defined(STM32L476xx) - #include "stm32l476xx.h" -#elif defined(STM32L485xx) - #include "stm32l485xx.h" -#elif defined(STM32L486xx) - #include "stm32l486xx.h" -#elif defined(STM32L496xx) - #include "stm32l496xx.h" -#elif defined(STM32L4A6xx) - #include "stm32l4a6xx.h" -#elif defined(STM32L4R5xx) - #include "stm32l4r5xx.h" -#elif defined(STM32L4R7xx) - #include "stm32l4r7xx.h" -#elif defined(STM32L4R9xx) - #include "stm32l4r9xx.h" -#elif defined(STM32L4S5xx) - #include "stm32l4s5xx.h" -#elif defined(STM32L4S7xx) - #include "stm32l4s7xx.h" -#elif defined(STM32L4S9xx) - #include "stm32l4s9xx.h" -#else - #error "Please select first the target STM32L4xx device used in your application (in stm32l4xx.h file)" -#endif - -/** - * @} - */ - -/** @addtogroup Exported_types - * @{ - */ -typedef enum -{ - RESET = 0, - SET = !RESET -} FlagStatus, ITStatus; - -typedef enum -{ - DISABLE = 0, - ENABLE = !DISABLE -} FunctionalState; -#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) - -typedef enum -{ - ERROR = 0, - SUCCESS = !ERROR -} ErrorStatus; - -/** - * @} - */ - - -/** @addtogroup Exported_macros - * @{ - */ -#define SET_BIT(REG, BIT) ((REG) |= (BIT)) - -#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) - -#define READ_BIT(REG, BIT) ((REG) & (BIT)) - -#define CLEAR_REG(REG) ((REG) = (0x0)) - -#define WRITE_REG(REG, VAL) ((REG) = (VAL)) - -#define READ_REG(REG) ((REG)) - -#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) - -#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) - - -/** - * @} - */ - -#if defined (USE_HAL_DRIVER) - #include "stm32l4xx_hal.h" -#endif /* USE_HAL_DRIVER */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* __STM32L4xx_H */ -/** - * @} - */ - -/** - * @} - */ - - - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h deleted file mode 100644 index e6e4376f..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h +++ /dev/null @@ -1,123 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32l4xx.h - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device System Source File for STM32L4xx devices. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32l4xx_system - * @{ - */ - -/** - * @brief Define to prevent recursive inclusion - */ -#ifndef __SYSTEM_STM32L4XX_H -#define __SYSTEM_STM32L4XX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/** @addtogroup STM32L4xx_System_Includes - * @{ - */ - -/** - * @} - */ - - -/** @addtogroup STM32L4xx_System_Exported_Variables - * @{ - */ - /* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetSysClockFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency - Note: If you use this function to configure the system clock; then there - is no need to call the 2 first functions listed above, since SystemCoreClock - variable is updated automatically. - */ -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ - -extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ -extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ -extern const uint32_t MSIRangeTable[12]; /*!< MSI ranges table values */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Exported_Constants - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Exported_Functions - * @{ - */ - -extern void SystemInit(void); -extern void SystemCoreClockUpdate(void); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /*__SYSTEM_STM32L4XX_H */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/arm_common_tables.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/arm_common_tables.h deleted file mode 100644 index 8742a569..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/arm_common_tables.h +++ /dev/null @@ -1,136 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. October 2015 -* $Revision: V.1.4.5 a -* -* Project: CMSIS DSP Library -* Title: arm_common_tables.h -* -* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#ifndef _ARM_COMMON_TABLES_H -#define _ARM_COMMON_TABLES_H - -#include "arm_math.h" - -extern const uint16_t armBitRevTable[1024]; -extern const q15_t armRecipTableQ15[64]; -extern const q31_t armRecipTableQ31[64]; -/* extern const q31_t realCoefAQ31[1024]; */ -/* extern const q31_t realCoefBQ31[1024]; */ -extern const float32_t twiddleCoef_16[32]; -extern const float32_t twiddleCoef_32[64]; -extern const float32_t twiddleCoef_64[128]; -extern const float32_t twiddleCoef_128[256]; -extern const float32_t twiddleCoef_256[512]; -extern const float32_t twiddleCoef_512[1024]; -extern const float32_t twiddleCoef_1024[2048]; -extern const float32_t twiddleCoef_2048[4096]; -extern const float32_t twiddleCoef_4096[8192]; -#define twiddleCoef twiddleCoef_4096 -extern const q31_t twiddleCoef_16_q31[24]; -extern const q31_t twiddleCoef_32_q31[48]; -extern const q31_t twiddleCoef_64_q31[96]; -extern const q31_t twiddleCoef_128_q31[192]; -extern const q31_t twiddleCoef_256_q31[384]; -extern const q31_t twiddleCoef_512_q31[768]; -extern const q31_t twiddleCoef_1024_q31[1536]; -extern const q31_t twiddleCoef_2048_q31[3072]; -extern const q31_t twiddleCoef_4096_q31[6144]; -extern const q15_t twiddleCoef_16_q15[24]; -extern const q15_t twiddleCoef_32_q15[48]; -extern const q15_t twiddleCoef_64_q15[96]; -extern const q15_t twiddleCoef_128_q15[192]; -extern const q15_t twiddleCoef_256_q15[384]; -extern const q15_t twiddleCoef_512_q15[768]; -extern const q15_t twiddleCoef_1024_q15[1536]; -extern const q15_t twiddleCoef_2048_q15[3072]; -extern const q15_t twiddleCoef_4096_q15[6144]; -extern const float32_t twiddleCoef_rfft_32[32]; -extern const float32_t twiddleCoef_rfft_64[64]; -extern const float32_t twiddleCoef_rfft_128[128]; -extern const float32_t twiddleCoef_rfft_256[256]; -extern const float32_t twiddleCoef_rfft_512[512]; -extern const float32_t twiddleCoef_rfft_1024[1024]; -extern const float32_t twiddleCoef_rfft_2048[2048]; -extern const float32_t twiddleCoef_rfft_4096[4096]; - - -/* floating-point bit reversal tables */ -#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) -#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) -#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) -#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) -#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) -#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) -#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) -#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) -#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) - -extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; - -/* fixed-point bit reversal tables */ -#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) -#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) -#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) -#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) -#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) -#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) -#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) -#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) -#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) - -extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; - -/* Tables for Fast Math Sine and Cosine */ -extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; -extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; -extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; - -#endif /* ARM_COMMON_TABLES_H */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/arm_const_structs.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/arm_const_structs.h deleted file mode 100644 index 726d06eb..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/arm_const_structs.h +++ /dev/null @@ -1,79 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_const_structs.h -* -* Description: This file has constant structs that are initialized for -* user convenience. For example, some can be given as -* arguments to the arm_cfft_f32() function. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#ifndef _ARM_CONST_STRUCTS_H -#define _ARM_CONST_STRUCTS_H - -#include "arm_math.h" -#include "arm_common_tables.h" - - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; - - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; - - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; - -#endif diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/arm_math.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/arm_math.h deleted file mode 100644 index d33f8a9b..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/arm_math.h +++ /dev/null @@ -1,7154 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2015 ARM Limited. All rights reserved. -* -* $Date: 20. October 2015 -* $Revision: V1.4.5 b -* -* Project: CMSIS DSP Library -* Title: arm_math.h -* -* Description: Public header file for CMSIS DSP Library -* -* Target Processor: Cortex-M7/Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -/** - \mainpage CMSIS DSP Software Library - * - * Introduction - * ------------ - * - * This user manual describes the CMSIS DSP software library, - * a suite of common signal processing functions for use on Cortex-M processor based devices. - * - * The library is divided into a number of functions each covering a specific category: - * - Basic math functions - * - Fast math functions - * - Complex math functions - * - Filters - * - Matrix functions - * - Transforms - * - Motor control functions - * - Statistical functions - * - Support functions - * - Interpolation functions - * - * The library has separate functions for operating on 8-bit integers, 16-bit integers, - * 32-bit integer and 32-bit floating-point values. - * - * Using the Library - * ------------ - * - * The library installer contains prebuilt versions of the libraries in the Lib folder. - * - arm_cortexM7lfdp_math.lib (Little endian and Double Precision Floating Point Unit on Cortex-M7) - * - arm_cortexM7bfdp_math.lib (Big endian and Double Precision Floating Point Unit on Cortex-M7) - * - arm_cortexM7lfsp_math.lib (Little endian and Single Precision Floating Point Unit on Cortex-M7) - * - arm_cortexM7bfsp_math.lib (Big endian and Single Precision Floating Point Unit on Cortex-M7) - * - arm_cortexM7l_math.lib (Little endian on Cortex-M7) - * - arm_cortexM7b_math.lib (Big endian on Cortex-M7) - * - arm_cortexM4lf_math.lib (Little endian and Floating Point Unit on Cortex-M4) - * - arm_cortexM4bf_math.lib (Big endian and Floating Point Unit on Cortex-M4) - * - arm_cortexM4l_math.lib (Little endian on Cortex-M4) - * - arm_cortexM4b_math.lib (Big endian on Cortex-M4) - * - arm_cortexM3l_math.lib (Little endian on Cortex-M3) - * - arm_cortexM3b_math.lib (Big endian on Cortex-M3) - * - arm_cortexM0l_math.lib (Little endian on Cortex-M0 / CortexM0+) - * - arm_cortexM0b_math.lib (Big endian on Cortex-M0 / CortexM0+) - * - * The library functions are declared in the public file arm_math.h which is placed in the Include folder. - * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single - * public header file arm_math.h for Cortex-M7/M4/M3/M0/M0+ with little endian and big endian. Same header file will be used for floating point unit(FPU) variants. - * Define the appropriate pre processor MACRO ARM_MATH_CM7 or ARM_MATH_CM4 or ARM_MATH_CM3 or - * ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application. - * - * Examples - * -------- - * - * The library ships with a number of examples which demonstrate how to use the library functions. - * - * Toolchain Support - * ------------ - * - * The library has been developed and tested with MDK-ARM version 5.14.0.0 - * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly. - * - * Building the Library - * ------------ - * - * The library installer contains a project file to re build libraries on MDK-ARM Tool chain in the CMSIS\\DSP_Lib\\Source\\ARM folder. - * - arm_cortexM_math.uvprojx - * - * - * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target, and defining the optional pre processor MACROs detailed above. - * - * Pre-processor Macros - * ------------ - * - * Each library project have differant pre-processor macros. - * - * - UNALIGNED_SUPPORT_DISABLE: - * - * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access - * - * - ARM_MATH_BIG_ENDIAN: - * - * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets. - * - * - ARM_MATH_MATRIX_CHECK: - * - * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices - * - * - ARM_MATH_ROUNDING: - * - * Define macro ARM_MATH_ROUNDING for rounding on support functions - * - * - ARM_MATH_CMx: - * - * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target - * and ARM_MATH_CM0 for building library on Cortex-M0 target, ARM_MATH_CM0PLUS for building library on Cortex-M0+ target, and - * ARM_MATH_CM7 for building the library on cortex-M7. - * - * - __FPU_PRESENT: - * - * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries - * - *
- * CMSIS-DSP in ARM::CMSIS Pack - * ----------------------------- - * - * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directories: - * |File/Folder |Content | - * |------------------------------|------------------------------------------------------------------------| - * |\b CMSIS\\Documentation\\DSP | This documentation | - * |\b CMSIS\\DSP_Lib | Software license agreement (license.txt) | - * |\b CMSIS\\DSP_Lib\\Examples | Example projects demonstrating the usage of the library functions | - * |\b CMSIS\\DSP_Lib\\Source | Source files for rebuilding the library | - * - *
- * Revision History of CMSIS-DSP - * ------------ - * Please refer to \ref ChangeLog_pg. - * - * Copyright Notice - * ------------ - * - * Copyright (C) 2010-2015 ARM Limited. All rights reserved. - */ - - -/** - * @defgroup groupMath Basic Math Functions - */ - -/** - * @defgroup groupFastMath Fast Math Functions - * This set of functions provides a fast approximation to sine, cosine, and square root. - * As compared to most of the other functions in the CMSIS math library, the fast math functions - * operate on individual values and not arrays. - * There are separate functions for Q15, Q31, and floating-point data. - * - */ - -/** - * @defgroup groupCmplxMath Complex Math Functions - * This set of functions operates on complex data vectors. - * The data in the complex arrays is stored in an interleaved fashion - * (real, imag, real, imag, ...). - * In the API functions, the number of samples in a complex array refers - * to the number of complex values; the array contains twice this number of - * real values. - */ - -/** - * @defgroup groupFilters Filtering Functions - */ - -/** - * @defgroup groupMatrix Matrix Functions - * - * This set of functions provides basic matrix math operations. - * The functions operate on matrix data structures. For example, - * the type - * definition for the floating-point matrix structure is shown - * below: - * 
- *     typedef struct
- *     {
- *       uint16_t numRows;     // number of rows of the matrix.
- *       uint16_t numCols;     // number of columns of the matrix.
- *       float32_t *pData;     // points to the data of the matrix.
- *     } arm_matrix_instance_f32;
- *
- * There are similar definitions for Q15 and Q31 data types. - * - * The structure specifies the size of the matrix and then points to - * an array of data. The array is of size numRows X numCols - * and the values are arranged in row order. That is, the - * matrix element (i, j) is stored at: - * 
- *     pData[i*numCols + j]
- *
- * - * \par Init Functions - * There is an associated initialization function for each type of matrix - * data structure. - * The initialization function sets the values of the internal structure fields. - * Refer to the function arm_mat_init_f32(), arm_mat_init_q31() - * and arm_mat_init_q15() for floating-point, Q31 and Q15 types, respectively. - * - * \par - * Use of the initialization function is optional. However, if initialization function is used - * then the instance structure cannot be placed into a const data section. - * To place the instance structure in a const data - * section, manually initialize the data structure. For example: - * 
- * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
- * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
- * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
- *
- * where nRows specifies the number of rows, nColumns - * specifies the number of columns, and pData points to the - * data array. - * - * \par Size Checking - * By default all of the matrix functions perform size checking on the input and - * output matrices. For example, the matrix addition function verifies that the - * two input matrices and the output matrix all have the same number of rows and - * columns. If the size check fails the functions return: - * 
- *     ARM_MATH_SIZE_MISMATCH
- *
- * Otherwise the functions return - * 
- *     ARM_MATH_SUCCESS
- *
- * There is some overhead associated with this matrix size checking. - * The matrix size checking is enabled via the \#define - * 
- *     ARM_MATH_MATRIX_CHECK
- *
- * within the library project settings. By default this macro is defined - * and size checking is enabled. By changing the project settings and - * undefining this macro size checking is eliminated and the functions - * run a bit faster. With size checking disabled the functions always - * return ARM_MATH_SUCCESS. - */ - -/** - * @defgroup groupTransforms Transform Functions - */ - -/** - * @defgroup groupController Controller Functions - */ - -/** - * @defgroup groupStats Statistics Functions - */ -/** - * @defgroup groupSupport Support Functions - */ - -/** - * @defgroup groupInterpolation Interpolation Functions - * These functions perform 1- and 2-dimensional interpolation of data. - * Linear interpolation is used for 1-dimensional data and - * bilinear interpolation is used for 2-dimensional data. - */ - -/** - * @defgroup groupExamples Examples - */ -#ifndef _ARM_MATH_H -#define _ARM_MATH_H - -/* ignore some GCC warnings */ -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wsign-conversion" -#pragma GCC diagnostic ignored "-Wconversion" -#pragma GCC diagnostic ignored "-Wunused-parameter" -#endif - -#define __CMSIS_GENERIC /* disable NVIC and Systick functions */ - -#if defined(ARM_MATH_CM7) - #include "core_cm7.h" -#elif defined (ARM_MATH_CM4) - #include "core_cm4.h" -#elif defined (ARM_MATH_CM3) - #include "core_cm3.h" -#elif defined (ARM_MATH_CM0) - #include "core_cm0.h" - #define ARM_MATH_CM0_FAMILY -#elif defined (ARM_MATH_CM0PLUS) - #include "core_cm0plus.h" - #define ARM_MATH_CM0_FAMILY -#else - #error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS or ARM_MATH_CM0" -#endif - -#undef __CMSIS_GENERIC /* enable NVIC and Systick functions */ -#include "string.h" -#include "math.h" -#ifdef __cplusplus -extern "C" -{ -#endif - - - /** - * @brief Macros required for reciprocal calculation in Normalized LMS - */ - -#define DELTA_Q31 (0x100) -#define DELTA_Q15 0x5 -#define INDEX_MASK 0x0000003F -#ifndef PI -#define PI 3.14159265358979f -#endif - - /** - * @brief Macros required for SINE and COSINE Fast math approximations - */ - -#define FAST_MATH_TABLE_SIZE 512 -#define FAST_MATH_Q31_SHIFT (32 - 10) -#define FAST_MATH_Q15_SHIFT (16 - 10) -#define CONTROLLER_Q31_SHIFT (32 - 9) -#define TABLE_SIZE 256 -#define TABLE_SPACING_Q31 0x400000 -#define TABLE_SPACING_Q15 0x80 - - /** - * @brief Macros required for SINE and COSINE Controller functions - */ - /* 1.31(q31) Fixed value of 2/360 */ - /* -1 to +1 is divided into 360 values so total spacing is (2/360) */ -#define INPUT_SPACING 0xB60B61 - - /** - * @brief Macro for Unaligned Support - */ -#ifndef UNALIGNED_SUPPORT_DISABLE - #define ALIGN4 -#else - #if defined (__GNUC__) - #define ALIGN4 __attribute__((aligned(4))) - #else - #define ALIGN4 __align(4) - #endif -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /** - * @brief Error status returned by some functions in the library. - */ - - typedef enum - { - ARM_MATH_SUCCESS = 0, /**< No error */ - ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */ - ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */ - ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation. */ - ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */ - ARM_MATH_SINGULAR = -5, /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */ - ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */ - } arm_status; - - /** - * @brief 8-bit fractional data type in 1.7 format. - */ - typedef int8_t q7_t; - - /** - * @brief 16-bit fractional data type in 1.15 format. - */ - typedef int16_t q15_t; - - /** - * @brief 32-bit fractional data type in 1.31 format. - */ - typedef int32_t q31_t; - - /** - * @brief 64-bit fractional data type in 1.63 format. - */ - typedef int64_t q63_t; - - /** - * @brief 32-bit floating-point type definition. - */ - typedef float float32_t; - - /** - * @brief 64-bit floating-point type definition. - */ - typedef double float64_t; - - /** - * @brief definition to read/write two 16 bit values. - */ -#if defined __CC_ARM - #define __SIMD32_TYPE int32_t __packed - #define CMSIS_UNUSED __attribute__((unused)) - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __SIMD32_TYPE int32_t - #define CMSIS_UNUSED __attribute__((unused)) - -#elif defined __GNUC__ - #define __SIMD32_TYPE int32_t - #define CMSIS_UNUSED __attribute__((unused)) - -#elif defined __ICCARM__ - #define __SIMD32_TYPE int32_t __packed - #define CMSIS_UNUSED - -#elif defined __CSMC__ - #define __SIMD32_TYPE int32_t - #define CMSIS_UNUSED - -#elif defined __TASKING__ - #define __SIMD32_TYPE __unaligned int32_t - #define CMSIS_UNUSED - -#else - #error Unknown compiler -#endif - -#define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr)) -#define __SIMD32_CONST(addr) ((__SIMD32_TYPE *)(addr)) -#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE *) (addr)) -#define __SIMD64(addr) (*(int64_t **) & (addr)) - -#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) - /** - * @brief definition to pack two 16 bit values. - */ -#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \ - (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) ) -#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \ - (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) ) - -#endif - - - /** - * @brief definition to pack four 8 bit values. - */ -#ifndef ARM_MATH_BIG_ENDIAN - -#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \ - (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \ - (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \ - (((int32_t)(v3) << 24) & (int32_t)0xFF000000) ) -#else - -#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \ - (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \ - (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \ - (((int32_t)(v0) << 24) & (int32_t)0xFF000000) ) - -#endif - - - /** - * @brief Clips Q63 to Q31 values. - */ - static __INLINE q31_t clip_q63_to_q31( - q63_t x) - { - return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? - ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x; - } - - /** - * @brief Clips Q63 to Q15 values. - */ - static __INLINE q15_t clip_q63_to_q15( - q63_t x) - { - return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? - ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15); - } - - /** - * @brief Clips Q31 to Q7 values. - */ - static __INLINE q7_t clip_q31_to_q7( - q31_t x) - { - return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ? - ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x; - } - - /** - * @brief Clips Q31 to Q15 values. - */ - static __INLINE q15_t clip_q31_to_q15( - q31_t x) - { - return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ? - ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x; - } - - /** - * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format. - */ - - static __INLINE q63_t mult32x64( - q63_t x, - q31_t y) - { - return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) + - (((q63_t) (x >> 32) * y))); - } - -/* - #if defined (ARM_MATH_CM0_FAMILY) && defined ( __CC_ARM ) - #define __CLZ __clz - #endif - */ -/* note: function can be removed when all toolchain support __CLZ for Cortex-M0 */ -#if defined (ARM_MATH_CM0_FAMILY) && ((defined (__ICCARM__)) ) - static __INLINE uint32_t __CLZ( - q31_t data); - - static __INLINE uint32_t __CLZ( - q31_t data) - { - uint32_t count = 0; - uint32_t mask = 0x80000000; - - while((data & mask) == 0) - { - count += 1u; - mask = mask >> 1u; - } - - return (count); - } -#endif - - /** - * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type. - */ - - static __INLINE uint32_t arm_recip_q31( - q31_t in, - q31_t * dst, - q31_t * pRecipTable) - { - q31_t out; - uint32_t tempVal; - uint32_t index, i; - uint32_t signBits; - - if(in > 0) - { - signBits = ((uint32_t) (__CLZ( in) - 1)); - } - else - { - signBits = ((uint32_t) (__CLZ(-in) - 1)); - } - - /* Convert input sample to 1.31 format */ - in = (in << signBits); - - /* calculation of index for initial approximated Val */ - index = (uint32_t)(in >> 24); - index = (index & INDEX_MASK); - - /* 1.31 with exp 1 */ - out = pRecipTable[index]; - - /* calculation of reciprocal value */ - /* running approximation for two iterations */ - for (i = 0u; i < 2u; i++) - { - tempVal = (uint32_t) (((q63_t) in * out) >> 31); - tempVal = 0x7FFFFFFFu - tempVal; - /* 1.31 with exp 1 */ - /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */ - out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30); - } - - /* write output */ - *dst = out; - - /* return num of signbits of out = 1/in value */ - return (signBits + 1u); - } - - - /** - * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type. - */ - static __INLINE uint32_t arm_recip_q15( - q15_t in, - q15_t * dst, - q15_t * pRecipTable) - { - q15_t out = 0; - uint32_t tempVal = 0; - uint32_t index = 0, i = 0; - uint32_t signBits = 0; - - if(in > 0) - { - signBits = ((uint32_t)(__CLZ( in) - 17)); - } - else - { - signBits = ((uint32_t)(__CLZ(-in) - 17)); - } - - /* Convert input sample to 1.15 format */ - in = (in << signBits); - - /* calculation of index for initial approximated Val */ - index = (uint32_t)(in >> 8); - index = (index & INDEX_MASK); - - /* 1.15 with exp 1 */ - out = pRecipTable[index]; - - /* calculation of reciprocal value */ - /* running approximation for two iterations */ - for (i = 0u; i < 2u; i++) - { - tempVal = (uint32_t) (((q31_t) in * out) >> 15); - tempVal = 0x7FFFu - tempVal; - /* 1.15 with exp 1 */ - out = (q15_t) (((q31_t) out * tempVal) >> 14); - /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */ - } - - /* write output */ - *dst = out; - - /* return num of signbits of out = 1/in value */ - return (signBits + 1); - } - - - /* - * @brief C custom defined intrinisic function for only M0 processors - */ -#if defined(ARM_MATH_CM0_FAMILY) - static __INLINE q31_t __SSAT( - q31_t x, - uint32_t y) - { - int32_t posMax, negMin; - uint32_t i; - - posMax = 1; - for (i = 0; i < (y - 1); i++) - { - posMax = posMax * 2; - } - - if(x > 0) - { - posMax = (posMax - 1); - - if(x > posMax) - { - x = posMax; - } - } - else - { - negMin = -posMax; - - if(x < negMin) - { - x = negMin; - } - } - return (x); - } -#endif /* end of ARM_MATH_CM0_FAMILY */ - - - /* - * @brief C custom defined intrinsic function for M3 and M0 processors - */ -#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) - - /* - * @brief C custom defined QADD8 for M3 and M0 processors - */ - static __INLINE uint32_t __QADD8( - uint32_t x, - uint32_t y) - { - q31_t r, s, t, u; - - r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; - s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; - t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; - u = __SSAT(((((q31_t)x ) >> 24) + (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; - - return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); - } - - - /* - * @brief C custom defined QSUB8 for M3 and M0 processors - */ - static __INLINE uint32_t __QSUB8( - uint32_t x, - uint32_t y) - { - q31_t r, s, t, u; - - r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; - s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; - t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; - u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; - - return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); - } - - - /* - * @brief C custom defined QADD16 for M3 and M0 processors - */ - static __INLINE uint32_t __QADD16( - uint32_t x, - uint32_t y) - { -/* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass! for armCC */ - q31_t r = 0, s = 0; - - r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHADD16 for M3 and M0 processors - */ - static __INLINE uint32_t __SHADD16( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined QSUB16 for M3 and M0 processors - */ - static __INLINE uint32_t __QSUB16( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHSUB16 for M3 and M0 processors - */ - static __INLINE uint32_t __SHSUB16( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined QASX for M3 and M0 processors - */ - static __INLINE uint32_t __QASX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHASX for M3 and M0 processors - */ - static __INLINE uint32_t __SHASX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined QSAX for M3 and M0 processors - */ - static __INLINE uint32_t __QSAX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHSAX for M3 and M0 processors - */ - static __INLINE uint32_t __SHSAX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SMUSDX for M3 and M0 processors - */ - static __INLINE uint32_t __SMUSDX( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); - } - - /* - * @brief C custom defined SMUADX for M3 and M0 processors - */ - static __INLINE uint32_t __SMUADX( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); - } - - - /* - * @brief C custom defined QADD for M3 and M0 processors - */ - static __INLINE int32_t __QADD( - int32_t x, - int32_t y) - { - return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y))); - } - - - /* - * @brief C custom defined QSUB for M3 and M0 processors - */ - static __INLINE int32_t __QSUB( - int32_t x, - int32_t y) - { - return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y))); - } - - - /* - * @brief C custom defined SMLAD for M3 and M0 processors - */ - static __INLINE uint32_t __SMLAD( - uint32_t x, - uint32_t y, - uint32_t sum) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + - ( ((q31_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLADX for M3 and M0 processors - */ - static __INLINE uint32_t __SMLADX( - uint32_t x, - uint32_t y, - uint32_t sum) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + - ( ((q31_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLSDX for M3 and M0 processors - */ - static __INLINE uint32_t __SMLSDX( - uint32_t x, - uint32_t y, - uint32_t sum) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + - ( ((q31_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLALD for M3 and M0 processors - */ - static __INLINE uint64_t __SMLALD( - uint32_t x, - uint32_t y, - uint64_t sum) - { -/* return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */ - return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + - ( ((q63_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLALDX for M3 and M0 processors - */ - static __INLINE uint64_t __SMLALDX( - uint32_t x, - uint32_t y, - uint64_t sum) - { -/* return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */ - return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + - ( ((q63_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMUAD for M3 and M0 processors - */ - static __INLINE uint32_t __SMUAD( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); - } - - - /* - * @brief C custom defined SMUSD for M3 and M0 processors - */ - static __INLINE uint32_t __SMUSD( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) - - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); - } - - - /* - * @brief C custom defined SXTB16 for M3 and M0 processors - */ - static __INLINE uint32_t __SXTB16( - uint32_t x) - { - return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) | - ((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000) )); - } - -#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */ - - - /** - * @brief Instance structure for the Q7 FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - q7_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - } arm_fir_instance_q7; - - /** - * @brief Instance structure for the Q15 FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - } arm_fir_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - } arm_fir_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - } arm_fir_instance_f32; - - - /** - * @brief Processing function for the Q7 FIR filter. - * @param[in] S points to an instance of the Q7 FIR filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_q7( - const arm_fir_instance_q7 * S, - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q7 FIR filter. - * @param[in,out] S points to an instance of the Q7 FIR structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed. - */ - void arm_fir_init_q7( - arm_fir_instance_q7 * S, - uint16_t numTaps, - q7_t * pCoeffs, - q7_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 FIR filter. - * @param[in] S points to an instance of the Q15 FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_q15( - const arm_fir_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q15 FIR filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_fast_q15( - const arm_fir_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 FIR filter. - * @param[in,out] S points to an instance of the Q15 FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if - * numTaps is not a supported value. - */ - arm_status arm_fir_init_q15( - arm_fir_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 FIR filter. - * @param[in] S points to an instance of the Q31 FIR filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_q31( - const arm_fir_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q31 FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_fast_q31( - const arm_fir_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR filter. - * @param[in,out] S points to an instance of the Q31 FIR structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - */ - void arm_fir_init_q31( - arm_fir_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point FIR filter. - * @param[in] S points to an instance of the floating-point FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_f32( - const arm_fir_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point FIR filter. - * @param[in,out] S points to an instance of the floating-point FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - */ - void arm_fir_init_f32( - arm_fir_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 Biquad cascade filter. - */ - typedef struct - { - int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ - q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ - int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */ - } arm_biquad_casd_df1_inst_q15; - - /** - * @brief Instance structure for the Q31 Biquad cascade filter. - */ - typedef struct - { - uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ - q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ - uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */ - } arm_biquad_casd_df1_inst_q31; - - /** - * @brief Instance structure for the floating-point Biquad cascade filter. - */ - typedef struct - { - uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ - float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_casd_df1_inst_f32; - - - /** - * @brief Processing function for the Q15 Biquad cascade filter. - * @param[in] S points to an instance of the Q15 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_q15( - const arm_biquad_casd_df1_inst_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 Biquad cascade filter. - * @param[in,out] S points to an instance of the Q15 Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format - */ - void arm_biquad_cascade_df1_init_q15( - arm_biquad_casd_df1_inst_q15 * S, - uint8_t numStages, - q15_t * pCoeffs, - q15_t * pState, - int8_t postShift); - - - /** - * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q15 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_fast_q15( - const arm_biquad_casd_df1_inst_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 Biquad cascade filter - * @param[in] S points to an instance of the Q31 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_q31( - const arm_biquad_casd_df1_inst_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q31 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_fast_q31( - const arm_biquad_casd_df1_inst_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 Biquad cascade filter. - * @param[in,out] S points to an instance of the Q31 Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format - */ - void arm_biquad_cascade_df1_init_q31( - arm_biquad_casd_df1_inst_q31 * S, - uint8_t numStages, - q31_t * pCoeffs, - q31_t * pState, - int8_t postShift); - - - /** - * @brief Processing function for the floating-point Biquad cascade filter. - * @param[in] S points to an instance of the floating-point Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_f32( - const arm_biquad_casd_df1_inst_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point Biquad cascade filter. - * @param[in,out] S points to an instance of the floating-point Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_df1_init_f32( - arm_biquad_casd_df1_inst_f32 * S, - uint8_t numStages, - float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Instance structure for the floating-point matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - float32_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_f32; - - - /** - * @brief Instance structure for the floating-point matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - float64_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_f64; - - /** - * @brief Instance structure for the Q15 matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - q15_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_q15; - - /** - * @brief Instance structure for the Q31 matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - q31_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_q31; - - - /** - * @brief Floating-point matrix addition. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_add_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix addition. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_add_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst); - - - /** - * @brief Q31 matrix addition. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_add_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Floating-point, complex, matrix multiplication. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_cmplx_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15, complex, matrix multiplication. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_cmplx_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pScratch); - - - /** - * @brief Q31, complex, matrix multiplication. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_cmplx_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Floating-point matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_trans_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_trans_q15( - const arm_matrix_instance_q15 * pSrc, - arm_matrix_instance_q15 * pDst); - - - /** - * @brief Q31 matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_trans_q31( - const arm_matrix_instance_q31 * pSrc, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Floating-point matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @param[in] pState points to the array for storing intermediate results - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState); - - - /** - * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @param[in] pState points to the array for storing intermediate results - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_mult_fast_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState); - - - /** - * @brief Q31 matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_mult_fast_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Floating-point matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_sub_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_sub_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst); - - - /** - * @brief Q31 matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_sub_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Floating-point matrix scaling. - * @param[in] pSrc points to the input matrix - * @param[in] scale scale factor - * @param[out] pDst points to the output matrix - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_scale_f32( - const arm_matrix_instance_f32 * pSrc, - float32_t scale, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix scaling. - * @param[in] pSrc points to input matrix - * @param[in] scaleFract fractional portion of the scale factor - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to output matrix - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_scale_q15( - const arm_matrix_instance_q15 * pSrc, - q15_t scaleFract, - int32_t shift, - arm_matrix_instance_q15 * pDst); - - - /** - * @brief Q31 matrix scaling. - * @param[in] pSrc points to input matrix - * @param[in] scaleFract fractional portion of the scale factor - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_scale_q31( - const arm_matrix_instance_q31 * pSrc, - q31_t scaleFract, - int32_t shift, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Q31 matrix initialization. - * @param[in,out] S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] pData points to the matrix data array. - */ - void arm_mat_init_q31( - arm_matrix_instance_q31 * S, - uint16_t nRows, - uint16_t nColumns, - q31_t * pData); - - - /** - * @brief Q15 matrix initialization. - * @param[in,out] S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] pData points to the matrix data array. - */ - void arm_mat_init_q15( - arm_matrix_instance_q15 * S, - uint16_t nRows, - uint16_t nColumns, - q15_t * pData); - - - /** - * @brief Floating-point matrix initialization. - * @param[in,out] S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] pData points to the matrix data array. - */ - void arm_mat_init_f32( - arm_matrix_instance_f32 * S, - uint16_t nRows, - uint16_t nColumns, - float32_t * pData); - - - - /** - * @brief Instance structure for the Q15 PID Control. - */ - typedef struct - { - q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ -#ifdef ARM_MATH_CM0_FAMILY - q15_t A1; - q15_t A2; -#else - q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/ -#endif - q15_t state[3]; /**< The state array of length 3. */ - q15_t Kp; /**< The proportional gain. */ - q15_t Ki; /**< The integral gain. */ - q15_t Kd; /**< The derivative gain. */ - } arm_pid_instance_q15; - - /** - * @brief Instance structure for the Q31 PID Control. - */ - typedef struct - { - q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ - q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ - q31_t A2; /**< The derived gain, A2 = Kd . */ - q31_t state[3]; /**< The state array of length 3. */ - q31_t Kp; /**< The proportional gain. */ - q31_t Ki; /**< The integral gain. */ - q31_t Kd; /**< The derivative gain. */ - } arm_pid_instance_q31; - - /** - * @brief Instance structure for the floating-point PID Control. - */ - typedef struct - { - float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ - float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ - float32_t A2; /**< The derived gain, A2 = Kd . */ - float32_t state[3]; /**< The state array of length 3. */ - float32_t Kp; /**< The proportional gain. */ - float32_t Ki; /**< The integral gain. */ - float32_t Kd; /**< The derivative gain. */ - } arm_pid_instance_f32; - - - - /** - * @brief Initialization function for the floating-point PID Control. - * @param[in,out] S points to an instance of the PID structure. - * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. - */ - void arm_pid_init_f32( - arm_pid_instance_f32 * S, - int32_t resetStateFlag); - - - /** - * @brief Reset function for the floating-point PID Control. - * @param[in,out] S is an instance of the floating-point PID Control structure - */ - void arm_pid_reset_f32( - arm_pid_instance_f32 * S); - - - /** - * @brief Initialization function for the Q31 PID Control. - * @param[in,out] S points to an instance of the Q15 PID structure. - * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. - */ - void arm_pid_init_q31( - arm_pid_instance_q31 * S, - int32_t resetStateFlag); - - - /** - * @brief Reset function for the Q31 PID Control. - * @param[in,out] S points to an instance of the Q31 PID Control structure - */ - - void arm_pid_reset_q31( - arm_pid_instance_q31 * S); - - - /** - * @brief Initialization function for the Q15 PID Control. - * @param[in,out] S points to an instance of the Q15 PID structure. - * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. - */ - void arm_pid_init_q15( - arm_pid_instance_q15 * S, - int32_t resetStateFlag); - - - /** - * @brief Reset function for the Q15 PID Control. - * @param[in,out] S points to an instance of the q15 PID Control structure - */ - void arm_pid_reset_q15( - arm_pid_instance_q15 * S); - - - /** - * @brief Instance structure for the floating-point Linear Interpolate function. - */ - typedef struct - { - uint32_t nValues; /**< nValues */ - float32_t x1; /**< x1 */ - float32_t xSpacing; /**< xSpacing */ - float32_t *pYData; /**< pointer to the table of Y values */ - } arm_linear_interp_instance_f32; - - /** - * @brief Instance structure for the floating-point bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - float32_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_f32; - - /** - * @brief Instance structure for the Q31 bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - q31_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_q31; - - /** - * @brief Instance structure for the Q15 bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - q15_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_q15; - - /** - * @brief Instance structure for the Q15 bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - q7_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_q7; - - - /** - * @brief Q7 vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Floating-point vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix2_instance_q15; - -/* Deprecated */ - arm_status arm_cfft_radix2_init_q15( - arm_cfft_radix2_instance_q15 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix2_q15( - const arm_cfft_radix2_instance_q15 * S, - q15_t * pSrc); - - - /** - * @brief Instance structure for the Q15 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - q15_t *pTwiddle; /**< points to the twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix4_instance_q15; - -/* Deprecated */ - arm_status arm_cfft_radix4_init_q15( - arm_cfft_radix4_instance_q15 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix4_q15( - const arm_cfft_radix4_instance_q15 * S, - q15_t * pSrc); - - /** - * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - q31_t *pTwiddle; /**< points to the Twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix2_instance_q31; - -/* Deprecated */ - arm_status arm_cfft_radix2_init_q31( - arm_cfft_radix2_instance_q31 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix2_q31( - const arm_cfft_radix2_instance_q31 * S, - q31_t * pSrc); - - /** - * @brief Instance structure for the Q31 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - q31_t *pTwiddle; /**< points to the twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix4_instance_q31; - -/* Deprecated */ - void arm_cfft_radix4_q31( - const arm_cfft_radix4_instance_q31 * S, - q31_t * pSrc); - -/* Deprecated */ - arm_status arm_cfft_radix4_init_q31( - arm_cfft_radix4_instance_q31 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - float32_t *pTwiddle; /**< points to the Twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - float32_t onebyfftLen; /**< value of 1/fftLen. */ - } arm_cfft_radix2_instance_f32; - -/* Deprecated */ - arm_status arm_cfft_radix2_init_f32( - arm_cfft_radix2_instance_f32 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix2_f32( - const arm_cfft_radix2_instance_f32 * S, - float32_t * pSrc); - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - float32_t *pTwiddle; /**< points to the Twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - float32_t onebyfftLen; /**< value of 1/fftLen. */ - } arm_cfft_radix4_instance_f32; - -/* Deprecated */ - arm_status arm_cfft_radix4_init_f32( - arm_cfft_radix4_instance_f32 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix4_f32( - const arm_cfft_radix4_instance_f32 * S, - float32_t * pSrc); - - /** - * @brief Instance structure for the fixed-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const q15_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ - } arm_cfft_instance_q15; - -void arm_cfft_q15( - const arm_cfft_instance_q15 * S, - q15_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the fixed-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const q31_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ - } arm_cfft_instance_q31; - -void arm_cfft_q31( - const arm_cfft_instance_q31 * S, - q31_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ - } arm_cfft_instance_f32; - - void arm_cfft_f32( - const arm_cfft_instance_f32 * S, - float32_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the Q15 RFFT/RIFFT function. - */ - typedef struct - { - uint32_t fftLenReal; /**< length of the real FFT. */ - uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ - uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ - uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ - q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ - const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */ - } arm_rfft_instance_q15; - - arm_status arm_rfft_init_q15( - arm_rfft_instance_q15 * S, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag); - - void arm_rfft_q15( - const arm_rfft_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst); - - /** - * @brief Instance structure for the Q31 RFFT/RIFFT function. - */ - typedef struct - { - uint32_t fftLenReal; /**< length of the real FFT. */ - uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ - uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ - uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ - q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ - const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */ - } arm_rfft_instance_q31; - - arm_status arm_rfft_init_q31( - arm_rfft_instance_q31 * S, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag); - - void arm_rfft_q31( - const arm_rfft_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst); - - /** - * @brief Instance structure for the floating-point RFFT/RIFFT function. - */ - typedef struct - { - uint32_t fftLenReal; /**< length of the real FFT. */ - uint16_t fftLenBy2; /**< length of the complex FFT. */ - uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ - uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ - uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ - float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ - arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ - } arm_rfft_instance_f32; - - arm_status arm_rfft_init_f32( - arm_rfft_instance_f32 * S, - arm_cfft_radix4_instance_f32 * S_CFFT, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag); - - void arm_rfft_f32( - const arm_rfft_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst); - - /** - * @brief Instance structure for the floating-point RFFT/RIFFT function. - */ -typedef struct - { - arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */ - uint16_t fftLenRFFT; /**< length of the real sequence */ - float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */ - } arm_rfft_fast_instance_f32 ; - -arm_status arm_rfft_fast_init_f32 ( - arm_rfft_fast_instance_f32 * S, - uint16_t fftLen); - -void arm_rfft_fast_f32( - arm_rfft_fast_instance_f32 * S, - float32_t * p, float32_t * pOut, - uint8_t ifftFlag); - - /** - * @brief Instance structure for the floating-point DCT4/IDCT4 function. - */ - typedef struct - { - uint16_t N; /**< length of the DCT4. */ - uint16_t Nby2; /**< half of the length of the DCT4. */ - float32_t normalize; /**< normalizing factor. */ - float32_t *pTwiddle; /**< points to the twiddle factor table. */ - float32_t *pCosFactor; /**< points to the cosFactor table. */ - arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */ - arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ - } arm_dct4_instance_f32; - - - /** - * @brief Initialization function for the floating-point DCT4/IDCT4. - * @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure. - * @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure. - * @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure. - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length. - */ - arm_status arm_dct4_init_f32( - arm_dct4_instance_f32 * S, - arm_rfft_instance_f32 * S_RFFT, - arm_cfft_radix4_instance_f32 * S_CFFT, - uint16_t N, - uint16_t Nby2, - float32_t normalize); - - - /** - * @brief Processing function for the floating-point DCT4/IDCT4. - * @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure. - * @param[in] pState points to state buffer. - * @param[in,out] pInlineBuffer points to the in-place input and output buffer. - */ - void arm_dct4_f32( - const arm_dct4_instance_f32 * S, - float32_t * pState, - float32_t * pInlineBuffer); - - - /** - * @brief Instance structure for the Q31 DCT4/IDCT4 function. - */ - typedef struct - { - uint16_t N; /**< length of the DCT4. */ - uint16_t Nby2; /**< half of the length of the DCT4. */ - q31_t normalize; /**< normalizing factor. */ - q31_t *pTwiddle; /**< points to the twiddle factor table. */ - q31_t *pCosFactor; /**< points to the cosFactor table. */ - arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */ - arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */ - } arm_dct4_instance_q31; - - - /** - * @brief Initialization function for the Q31 DCT4/IDCT4. - * @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure. - * @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure - * @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length. - */ - arm_status arm_dct4_init_q31( - arm_dct4_instance_q31 * S, - arm_rfft_instance_q31 * S_RFFT, - arm_cfft_radix4_instance_q31 * S_CFFT, - uint16_t N, - uint16_t Nby2, - q31_t normalize); - - - /** - * @brief Processing function for the Q31 DCT4/IDCT4. - * @param[in] S points to an instance of the Q31 DCT4 structure. - * @param[in] pState points to state buffer. - * @param[in,out] pInlineBuffer points to the in-place input and output buffer. - */ - void arm_dct4_q31( - const arm_dct4_instance_q31 * S, - q31_t * pState, - q31_t * pInlineBuffer); - - - /** - * @brief Instance structure for the Q15 DCT4/IDCT4 function. - */ - typedef struct - { - uint16_t N; /**< length of the DCT4. */ - uint16_t Nby2; /**< half of the length of the DCT4. */ - q15_t normalize; /**< normalizing factor. */ - q15_t *pTwiddle; /**< points to the twiddle factor table. */ - q15_t *pCosFactor; /**< points to the cosFactor table. */ - arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */ - arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */ - } arm_dct4_instance_q15; - - - /** - * @brief Initialization function for the Q15 DCT4/IDCT4. - * @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure. - * @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure. - * @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure. - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length. - */ - arm_status arm_dct4_init_q15( - arm_dct4_instance_q15 * S, - arm_rfft_instance_q15 * S_RFFT, - arm_cfft_radix4_instance_q15 * S_CFFT, - uint16_t N, - uint16_t Nby2, - q15_t normalize); - - - /** - * @brief Processing function for the Q15 DCT4/IDCT4. - * @param[in] S points to an instance of the Q15 DCT4 structure. - * @param[in] pState points to state buffer. - * @param[in,out] pInlineBuffer points to the in-place input and output buffer. - */ - void arm_dct4_q15( - const arm_dct4_instance_q15 * S, - q15_t * pState, - q15_t * pInlineBuffer); - - - /** - * @brief Floating-point vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q7 vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Floating-point vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q7 vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a floating-point vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scale scale factor to be applied - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_f32( - float32_t * pSrc, - float32_t scale, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a Q7 vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_q7( - q7_t * pSrc, - q7_t scaleFract, - int8_t shift, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a Q15 vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_q15( - q15_t * pSrc, - q15_t scaleFract, - int8_t shift, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a Q31 vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_q31( - q31_t * pSrc, - q31_t scaleFract, - int8_t shift, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q7 vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Floating-point vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Dot product of floating-point vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_f32( - float32_t * pSrcA, - float32_t * pSrcB, - uint32_t blockSize, - float32_t * result); - - - /** - * @brief Dot product of Q7 vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_q7( - q7_t * pSrcA, - q7_t * pSrcB, - uint32_t blockSize, - q31_t * result); - - - /** - * @brief Dot product of Q15 vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_q15( - q15_t * pSrcA, - q15_t * pSrcB, - uint32_t blockSize, - q63_t * result); - - - /** - * @brief Dot product of Q31 vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_q31( - q31_t * pSrcA, - q31_t * pSrcB, - uint32_t blockSize, - q63_t * result); - - - /** - * @brief Shifts the elements of a Q7 vector a specified number of bits. - * @param[in] pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_shift_q7( - q7_t * pSrc, - int8_t shiftBits, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Shifts the elements of a Q15 vector a specified number of bits. - * @param[in] pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_shift_q15( - q15_t * pSrc, - int8_t shiftBits, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Shifts the elements of a Q31 vector a specified number of bits. - * @param[in] pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_shift_q31( - q31_t * pSrc, - int8_t shiftBits, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a floating-point vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_f32( - float32_t * pSrc, - float32_t offset, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a Q7 vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_q7( - q7_t * pSrc, - q7_t offset, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a Q15 vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_q15( - q15_t * pSrc, - q15_t offset, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a Q31 vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_q31( - q31_t * pSrc, - q31_t offset, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a floating-point vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a Q7 vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a Q15 vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a Q31 vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Copies the elements of a floating-point vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Copies the elements of a Q7 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Copies the elements of a Q15 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Copies the elements of a Q31 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a floating-point vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_f32( - float32_t value, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a Q7 vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_q7( - q7_t value, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a Q15 vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_q15( - q15_t value, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a Q31 vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_q31( - q31_t value, - q31_t * pDst, - uint32_t blockSize); - - -/** - * @brief Convolution of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - */ - void arm_conv_f32( - float32_t * pSrcA, - uint32_t srcALen, - float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst); - - - /** - * @brief Convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - */ - void arm_conv_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - -/** - * @brief Convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - */ - void arm_conv_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - - /** - * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_fast_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - - /** - * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - */ - void arm_conv_fast_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Convolution of Q31 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_fast_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Convolution of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - */ - void arm_conv_opt_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Convolution of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst); - - - /** - * @brief Partial convolution of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_f32( - float32_t * pSrcA, - uint32_t srcALen, - float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Partial convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_fast_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_fast_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Partial convolution of Q31 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_fast_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q7 sequences - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_opt_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2); - - -/** - * @brief Partial convolution of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Instance structure for the Q15 FIR decimator. - */ - typedef struct - { - uint8_t M; /**< decimation factor. */ - uint16_t numTaps; /**< number of coefficients in the filter. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - } arm_fir_decimate_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR decimator. - */ - typedef struct - { - uint8_t M; /**< decimation factor. */ - uint16_t numTaps; /**< number of coefficients in the filter. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - } arm_fir_decimate_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR decimator. - */ - typedef struct - { - uint8_t M; /**< decimation factor. */ - uint16_t numTaps; /**< number of coefficients in the filter. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - } arm_fir_decimate_instance_f32; - - - /** - * @brief Processing function for the floating-point FIR decimator. - * @param[in] S points to an instance of the floating-point FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_f32( - const arm_fir_decimate_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point FIR decimator. - * @param[in,out] S points to an instance of the floating-point FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - */ - arm_status arm_fir_decimate_init_f32( - arm_fir_decimate_instance_f32 * S, - uint16_t numTaps, - uint8_t M, - float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 FIR decimator. - * @param[in] S points to an instance of the Q15 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_q15( - const arm_fir_decimate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q15 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_fast_q15( - const arm_fir_decimate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 FIR decimator. - * @param[in,out] S points to an instance of the Q15 FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - */ - arm_status arm_fir_decimate_init_q15( - arm_fir_decimate_instance_q15 * S, - uint16_t numTaps, - uint8_t M, - q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 FIR decimator. - * @param[in] S points to an instance of the Q31 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_q31( - const arm_fir_decimate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - /** - * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q31 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_fast_q31( - arm_fir_decimate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR decimator. - * @param[in,out] S points to an instance of the Q31 FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - */ - arm_status arm_fir_decimate_init_q31( - arm_fir_decimate_instance_q31 * S, - uint16_t numTaps, - uint8_t M, - q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 FIR interpolator. - */ - typedef struct - { - uint8_t L; /**< upsample factor. */ - uint16_t phaseLength; /**< length of each polyphase filter component. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ - q15_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */ - } arm_fir_interpolate_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR interpolator. - */ - typedef struct - { - uint8_t L; /**< upsample factor. */ - uint16_t phaseLength; /**< length of each polyphase filter component. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ - q31_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */ - } arm_fir_interpolate_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR interpolator. - */ - typedef struct - { - uint8_t L; /**< upsample factor. */ - uint16_t phaseLength; /**< length of each polyphase filter component. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ - float32_t *pState; /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */ - } arm_fir_interpolate_instance_f32; - - - /** - * @brief Processing function for the Q15 FIR interpolator. - * @param[in] S points to an instance of the Q15 FIR interpolator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_interpolate_q15( - const arm_fir_interpolate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 FIR interpolator. - * @param[in,out] S points to an instance of the Q15 FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - */ - arm_status arm_fir_interpolate_init_q15( - arm_fir_interpolate_instance_q15 * S, - uint8_t L, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 FIR interpolator. - * @param[in] S points to an instance of the Q15 FIR interpolator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_interpolate_q31( - const arm_fir_interpolate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR interpolator. - * @param[in,out] S points to an instance of the Q31 FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - */ - arm_status arm_fir_interpolate_init_q31( - arm_fir_interpolate_instance_q31 * S, - uint8_t L, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point FIR interpolator. - * @param[in] S points to an instance of the floating-point FIR interpolator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_interpolate_f32( - const arm_fir_interpolate_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point FIR interpolator. - * @param[in,out] S points to an instance of the floating-point FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - */ - arm_status arm_fir_interpolate_init_f32( - arm_fir_interpolate_instance_f32 * S, - uint8_t L, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the high precision Q31 Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - q63_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */ - q31_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */ - } arm_biquad_cas_df1_32x64_ins_q31; - - - /** - * @param[in] S points to an instance of the high precision Q31 Biquad cascade filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cas_df1_32x64_q31( - const arm_biquad_cas_df1_32x64_ins_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @param[in,out] S points to an instance of the high precision Q31 Biquad cascade filter structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] postShift shift to be applied to the output. Varies according to the coefficients format - */ - void arm_biquad_cas_df1_32x64_init_q31( - arm_biquad_cas_df1_32x64_ins_q31 * S, - uint8_t numStages, - q31_t * pCoeffs, - q63_t * pState, - uint8_t postShift); - - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float32_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */ - float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_df2T_instance_f32; - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float32_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */ - float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_stereo_df2T_instance_f32; - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float64_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */ - float64_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_df2T_instance_f64; - - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df2T_f32( - const arm_biquad_cascade_df2T_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_stereo_df2T_f32( - const arm_biquad_cascade_stereo_df2T_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df2T_f64( - const arm_biquad_cascade_df2T_instance_f64 * S, - float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_df2T_init_f32( - arm_biquad_cascade_df2T_instance_f32 * S, - uint8_t numStages, - float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_stereo_df2T_init_f32( - arm_biquad_cascade_stereo_df2T_instance_f32 * S, - uint8_t numStages, - float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_df2T_init_f64( - arm_biquad_cascade_df2T_instance_f64 * S, - uint8_t numStages, - float64_t * pCoeffs, - float64_t * pState); - - - /** - * @brief Instance structure for the Q15 FIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of filter stages. */ - q15_t *pState; /**< points to the state variable array. The array is of length numStages. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ - } arm_fir_lattice_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of filter stages. */ - q31_t *pState; /**< points to the state variable array. The array is of length numStages. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ - } arm_fir_lattice_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of filter stages. */ - float32_t *pState; /**< points to the state variable array. The array is of length numStages. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ - } arm_fir_lattice_instance_f32; - - - /** - * @brief Initialization function for the Q15 FIR lattice filter. - * @param[in] S points to an instance of the Q15 FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] pState points to the state buffer. The array is of length numStages. - */ - void arm_fir_lattice_init_q15( - arm_fir_lattice_instance_q15 * S, - uint16_t numStages, - q15_t * pCoeffs, - q15_t * pState); - - - /** - * @brief Processing function for the Q15 FIR lattice filter. - * @param[in] S points to an instance of the Q15 FIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_lattice_q15( - const arm_fir_lattice_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR lattice filter. - * @param[in] S points to an instance of the Q31 FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] pState points to the state buffer. The array is of length numStages. - */ - void arm_fir_lattice_init_q31( - arm_fir_lattice_instance_q31 * S, - uint16_t numStages, - q31_t * pCoeffs, - q31_t * pState); - - - /** - * @brief Processing function for the Q31 FIR lattice filter. - * @param[in] S points to an instance of the Q31 FIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_fir_lattice_q31( - const arm_fir_lattice_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - -/** - * @brief Initialization function for the floating-point FIR lattice filter. - * @param[in] S points to an instance of the floating-point FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] pState points to the state buffer. The array is of length numStages. - */ - void arm_fir_lattice_init_f32( - arm_fir_lattice_instance_f32 * S, - uint16_t numStages, - float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Processing function for the floating-point FIR lattice filter. - * @param[in] S points to an instance of the floating-point FIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_fir_lattice_f32( - const arm_fir_lattice_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 IIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of stages in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */ - q15_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ - q15_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */ - } arm_iir_lattice_instance_q15; - - /** - * @brief Instance structure for the Q31 IIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of stages in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */ - q31_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ - q31_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */ - } arm_iir_lattice_instance_q31; - - /** - * @brief Instance structure for the floating-point IIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of stages in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */ - float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ - float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */ - } arm_iir_lattice_instance_f32; - - - /** - * @brief Processing function for the floating-point IIR lattice filter. - * @param[in] S points to an instance of the floating-point IIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_f32( - const arm_iir_lattice_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point IIR lattice filter. - * @param[in] S points to an instance of the floating-point IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages. - * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1. - * @param[in] pState points to the state buffer. The array is of length numStages+blockSize-1. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_init_f32( - arm_iir_lattice_instance_f32 * S, - uint16_t numStages, - float32_t * pkCoeffs, - float32_t * pvCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 IIR lattice filter. - * @param[in] S points to an instance of the Q31 IIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_q31( - const arm_iir_lattice_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 IIR lattice filter. - * @param[in] S points to an instance of the Q31 IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages. - * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1. - * @param[in] pState points to the state buffer. The array is of length numStages+blockSize. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_init_q31( - arm_iir_lattice_instance_q31 * S, - uint16_t numStages, - q31_t * pkCoeffs, - q31_t * pvCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 IIR lattice filter. - * @param[in] S points to an instance of the Q15 IIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_q15( - const arm_iir_lattice_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - -/** - * @brief Initialization function for the Q15 IIR lattice filter. - * @param[in] S points to an instance of the fixed-point Q15 IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages. - * @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1. - * @param[in] pState points to state buffer. The array is of length numStages+blockSize. - * @param[in] blockSize number of samples to process per call. - */ - void arm_iir_lattice_init_q15( - arm_iir_lattice_instance_q15 * S, - uint16_t numStages, - q15_t * pkCoeffs, - q15_t * pvCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the floating-point LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - float32_t mu; /**< step size that controls filter coefficient updates. */ - } arm_lms_instance_f32; - - - /** - * @brief Processing function for floating-point LMS filter. - * @param[in] S points to an instance of the floating-point LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_f32( - const arm_lms_instance_f32 * S, - float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for floating-point LMS filter. - * @param[in] S points to an instance of the floating-point LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to the coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_init_f32( - arm_lms_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - float32_t mu, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q15_t mu; /**< step size that controls filter coefficient updates. */ - uint32_t postShift; /**< bit shift applied to coefficients. */ - } arm_lms_instance_q15; - - - /** - * @brief Initialization function for the Q15 LMS filter. - * @param[in] S points to an instance of the Q15 LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to the coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_init_q15( - arm_lms_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - q15_t mu, - uint32_t blockSize, - uint32_t postShift); - - - /** - * @brief Processing function for Q15 LMS filter. - * @param[in] S points to an instance of the Q15 LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_q15( - const arm_lms_instance_q15 * S, - q15_t * pSrc, - q15_t * pRef, - q15_t * pOut, - q15_t * pErr, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q31 LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q31_t mu; /**< step size that controls filter coefficient updates. */ - uint32_t postShift; /**< bit shift applied to coefficients. */ - } arm_lms_instance_q31; - - - /** - * @brief Processing function for Q31 LMS filter. - * @param[in] S points to an instance of the Q15 LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_q31( - const arm_lms_instance_q31 * S, - q31_t * pSrc, - q31_t * pRef, - q31_t * pOut, - q31_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for Q31 LMS filter. - * @param[in] S points to an instance of the Q31 LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_init_q31( - arm_lms_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - q31_t mu, - uint32_t blockSize, - uint32_t postShift); - - - /** - * @brief Instance structure for the floating-point normalized LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - float32_t mu; /**< step size that control filter coefficient updates. */ - float32_t energy; /**< saves previous frame energy. */ - float32_t x0; /**< saves previous input sample. */ - } arm_lms_norm_instance_f32; - - - /** - * @brief Processing function for floating-point normalized LMS filter. - * @param[in] S points to an instance of the floating-point normalized LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_f32( - arm_lms_norm_instance_f32 * S, - float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for floating-point normalized LMS filter. - * @param[in] S points to an instance of the floating-point LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_init_f32( - arm_lms_norm_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - float32_t mu, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q31 normalized LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q31_t mu; /**< step size that controls filter coefficient updates. */ - uint8_t postShift; /**< bit shift applied to coefficients. */ - q31_t *recipTable; /**< points to the reciprocal initial value table. */ - q31_t energy; /**< saves previous frame energy. */ - q31_t x0; /**< saves previous input sample. */ - } arm_lms_norm_instance_q31; - - - /** - * @brief Processing function for Q31 normalized LMS filter. - * @param[in] S points to an instance of the Q31 normalized LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_q31( - arm_lms_norm_instance_q31 * S, - q31_t * pSrc, - q31_t * pRef, - q31_t * pOut, - q31_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for Q31 normalized LMS filter. - * @param[in] S points to an instance of the Q31 normalized LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_norm_init_q31( - arm_lms_norm_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - q31_t mu, - uint32_t blockSize, - uint8_t postShift); - - - /** - * @brief Instance structure for the Q15 normalized LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< Number of coefficients in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q15_t mu; /**< step size that controls filter coefficient updates. */ - uint8_t postShift; /**< bit shift applied to coefficients. */ - q15_t *recipTable; /**< Points to the reciprocal initial value table. */ - q15_t energy; /**< saves previous frame energy. */ - q15_t x0; /**< saves previous input sample. */ - } arm_lms_norm_instance_q15; - - - /** - * @brief Processing function for Q15 normalized LMS filter. - * @param[in] S points to an instance of the Q15 normalized LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_q15( - arm_lms_norm_instance_q15 * S, - q15_t * pSrc, - q15_t * pRef, - q15_t * pOut, - q15_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for Q15 normalized LMS filter. - * @param[in] S points to an instance of the Q15 normalized LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_norm_init_q15( - arm_lms_norm_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - q15_t mu, - uint32_t blockSize, - uint8_t postShift); - - - /** - * @brief Correlation of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_f32( - float32_t * pSrcA, - uint32_t srcALen, - float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst); - - - /** - * @brief Correlation of Q15 sequences - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - */ - void arm_correlate_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch); - - - /** - * @brief Correlation of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - - void arm_correlate_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - - /** - * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - - void arm_correlate_fast_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - - /** - * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - */ - void arm_correlate_fast_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch); - - - /** - * @brief Correlation of Q31 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_fast_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Correlation of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - */ - void arm_correlate_opt_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Correlation of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst); - - - /** - * @brief Instance structure for the floating-point sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - float32_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_f32; - - /** - * @brief Instance structure for the Q31 sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - q31_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_q31; - - /** - * @brief Instance structure for the Q15 sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - q15_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_q15; - - /** - * @brief Instance structure for the Q7 sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - q7_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_q7; - - - /** - * @brief Processing function for the floating-point sparse FIR filter. - * @param[in] S points to an instance of the floating-point sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_f32( - arm_fir_sparse_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - float32_t * pScratchIn, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point sparse FIR filter. - * @param[in,out] S points to an instance of the floating-point sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_f32( - arm_fir_sparse_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 sparse FIR filter. - * @param[in] S points to an instance of the Q31 sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_q31( - arm_fir_sparse_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - q31_t * pScratchIn, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 sparse FIR filter. - * @param[in,out] S points to an instance of the Q31 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_q31( - arm_fir_sparse_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 sparse FIR filter. - * @param[in] S points to an instance of the Q15 sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] pScratchOut points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_q15( - arm_fir_sparse_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - q15_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 sparse FIR filter. - * @param[in,out] S points to an instance of the Q15 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_q15( - arm_fir_sparse_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q7 sparse FIR filter. - * @param[in] S points to an instance of the Q7 sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] pScratchOut points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_q7( - arm_fir_sparse_instance_q7 * S, - q7_t * pSrc, - q7_t * pDst, - q7_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q7 sparse FIR filter. - * @param[in,out] S points to an instance of the Q7 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_q7( - arm_fir_sparse_instance_q7 * S, - uint16_t numTaps, - q7_t * pCoeffs, - q7_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Floating-point sin_cos function. - * @param[in] theta input value in degrees - * @param[out] pSinVal points to the processed sine output. - * @param[out] pCosVal points to the processed cos output. - */ - void arm_sin_cos_f32( - float32_t theta, - float32_t * pSinVal, - float32_t * pCosVal); - - - /** - * @brief Q31 sin_cos function. - * @param[in] theta scaled input value in degrees - * @param[out] pSinVal points to the processed sine output. - * @param[out] pCosVal points to the processed cosine output. - */ - void arm_sin_cos_q31( - q31_t theta, - q31_t * pSinVal, - q31_t * pCosVal); - - - /** - * @brief Floating-point complex conjugate. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_conj_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples); - - /** - * @brief Q31 complex conjugate. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_conj_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex conjugate. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_conj_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @brief Floating-point complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @ingroup groupController - */ - - /** - * @defgroup PID PID Motor Control - * - * A Proportional Integral Derivative (PID) controller is a generic feedback control - * loop mechanism widely used in industrial control systems. - * A PID controller is the most commonly used type of feedback controller. - * - * This set of functions implements (PID) controllers - * for Q15, Q31, and floating-point data types. The functions operate on a single sample - * of data and each call to the function returns a single processed value. - * S points to an instance of the PID control data structure. in - * is the input sample value. The functions return the output value. - * - * \par Algorithm: - * 
-   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
-   *    A0 = Kp + Ki + Kd
-   *    A1 = (-Kp ) - (2 * Kd )
-   *    A2 = Kd
- * - * \par - * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant - * - * \par - * \image html PID.gif "Proportional Integral Derivative Controller" - * - * \par - * The PID controller calculates an "error" value as the difference between - * the measured output and the reference input. - * The controller attempts to minimize the error by adjusting the process control inputs. - * The proportional value determines the reaction to the current error, - * the integral value determines the reaction based on the sum of recent errors, - * and the derivative value determines the reaction based on the rate at which the error has been changing. - * - * \par Instance Structure - * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. - * A separate instance structure must be defined for each PID Controller. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Reset Functions - * There is also an associated reset function for each data type which clears the state array. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains. - * - Zeros out the values in the state buffer. - * - * \par - * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the PID Controller functions. - * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup PID - * @{ - */ - - /** - * @brief Process function for the floating-point PID Control. - * @param[in,out] S is an instance of the floating-point PID Control structure - * @param[in] in input sample to process - * @return out processed output sample. - */ - static __INLINE float32_t arm_pid_f32( - arm_pid_instance_f32 * S, - float32_t in) - { - float32_t out; - - /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */ - out = (S->A0 * in) + - (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]); - - /* Update state */ - S->state[1] = S->state[0]; - S->state[0] = in; - S->state[2] = out; - - /* return to application */ - return (out); - - } - - /** - * @brief Process function for the Q31 PID Control. - * @param[in,out] S points to an instance of the Q31 PID Control structure - * @param[in] in input sample to process - * @return out processed output sample. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around rather than clip. - * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. - * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. - */ - static __INLINE q31_t arm_pid_q31( - arm_pid_instance_q31 * S, - q31_t in) - { - q63_t acc; - q31_t out; - - /* acc = A0 * x[n] */ - acc = (q63_t) S->A0 * in; - - /* acc += A1 * x[n-1] */ - acc += (q63_t) S->A1 * S->state[0]; - - /* acc += A2 * x[n-2] */ - acc += (q63_t) S->A2 * S->state[1]; - - /* convert output to 1.31 format to add y[n-1] */ - out = (q31_t) (acc >> 31u); - - /* out += y[n-1] */ - out += S->state[2]; - - /* Update state */ - S->state[1] = S->state[0]; - S->state[0] = in; - S->state[2] = out; - - /* return to application */ - return (out); - } - - - /** - * @brief Process function for the Q15 PID Control. - * @param[in,out] S points to an instance of the Q15 PID Control structure - * @param[in] in input sample to process - * @return out processed output sample. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - * Lastly, the accumulator is saturated to yield a result in 1.15 format. - */ - static __INLINE q15_t arm_pid_q15( - arm_pid_instance_q15 * S, - q15_t in) - { - q63_t acc; - q15_t out; - -#ifndef ARM_MATH_CM0_FAMILY - __SIMD32_TYPE *vstate; - - /* Implementation of PID controller */ - - /* acc = A0 * x[n] */ - acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in); - - /* acc += A1 * x[n-1] + A2 * x[n-2] */ - vstate = __SIMD32_CONST(S->state); - acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)*vstate, (uint64_t)acc); -#else - /* acc = A0 * x[n] */ - acc = ((q31_t) S->A0) * in; - - /* acc += A1 * x[n-1] + A2 * x[n-2] */ - acc += (q31_t) S->A1 * S->state[0]; - acc += (q31_t) S->A2 * S->state[1]; -#endif - - /* acc += y[n-1] */ - acc += (q31_t) S->state[2] << 15; - - /* saturate the output */ - out = (q15_t) (__SSAT((acc >> 15), 16)); - - /* Update state */ - S->state[1] = S->state[0]; - S->state[0] = in; - S->state[2] = out; - - /* return to application */ - return (out); - } - - /** - * @} end of PID group - */ - - - /** - * @brief Floating-point matrix inverse. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] dst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR. - */ - arm_status arm_mat_inverse_f32( - const arm_matrix_instance_f32 * src, - arm_matrix_instance_f32 * dst); - - - /** - * @brief Floating-point matrix inverse. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] dst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR. - */ - arm_status arm_mat_inverse_f64( - const arm_matrix_instance_f64 * src, - arm_matrix_instance_f64 * dst); - - - - /** - * @ingroup groupController - */ - - /** - * @defgroup clarke Vector Clarke Transform - * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector. - * Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents - * in the two-phase orthogonal stator axis Ialpha and Ibeta. - * When Ialpha is superposed with Ia as shown in the figure below - * \image html clarke.gif Stator current space vector and its components in (a,b). - * and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta - * can be calculated using only Ia and Ib. - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html clarkeFormula.gif - * where Ia and Ib are the instantaneous stator phases and - * pIalpha and pIbeta are the two coordinates of time invariant vector. - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Clarke transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup clarke - * @{ - */ - - /** - * - * @brief Floating-point Clarke transform - * @param[in] Ia input three-phase coordinate a - * @param[in] Ib input three-phase coordinate b - * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - * @param[out] pIbeta points to output two-phase orthogonal vector axis beta - */ - static __INLINE void arm_clarke_f32( - float32_t Ia, - float32_t Ib, - float32_t * pIalpha, - float32_t * pIbeta) - { - /* Calculate pIalpha using the equation, pIalpha = Ia */ - *pIalpha = Ia; - - /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */ - *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib); - } - - - /** - * @brief Clarke transform for Q31 version - * @param[in] Ia input three-phase coordinate a - * @param[in] Ib input three-phase coordinate b - * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - * @param[out] pIbeta points to output two-phase orthogonal vector axis beta - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 32-bit accumulator. - * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - * There is saturation on the addition, hence there is no risk of overflow. - */ - static __INLINE void arm_clarke_q31( - q31_t Ia, - q31_t Ib, - q31_t * pIalpha, - q31_t * pIbeta) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - - /* Calculating pIalpha from Ia by equation pIalpha = Ia */ - *pIalpha = Ia; - - /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */ - product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30); - - /* Intermediate product is calculated by (2/sqrt(3) * Ib) */ - product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30); - - /* pIbeta is calculated by adding the intermediate products */ - *pIbeta = __QADD(product1, product2); - } - - /** - * @} end of clarke group - */ - - /** - * @brief Converts the elements of the Q7 vector to Q31 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_q7_to_q31( - q7_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - - /** - * @ingroup groupController - */ - - /** - * @defgroup inv_clarke Vector Inverse Clarke Transform - * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases. - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html clarkeInvFormula.gif - * where pIa and pIb are the instantaneous stator phases and - * Ialpha and Ibeta are the two coordinates of time invariant vector. - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Clarke transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup inv_clarke - * @{ - */ - - /** - * @brief Floating-point Inverse Clarke transform - * @param[in] Ialpha input two-phase orthogonal vector axis alpha - * @param[in] Ibeta input two-phase orthogonal vector axis beta - * @param[out] pIa points to output three-phase coordinate a - * @param[out] pIb points to output three-phase coordinate b - */ - static __INLINE void arm_inv_clarke_f32( - float32_t Ialpha, - float32_t Ibeta, - float32_t * pIa, - float32_t * pIb) - { - /* Calculating pIa from Ialpha by equation pIa = Ialpha */ - *pIa = Ialpha; - - /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */ - *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta; - } - - - /** - * @brief Inverse Clarke transform for Q31 version - * @param[in] Ialpha input two-phase orthogonal vector axis alpha - * @param[in] Ibeta input two-phase orthogonal vector axis beta - * @param[out] pIa points to output three-phase coordinate a - * @param[out] pIb points to output three-phase coordinate b - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 32-bit accumulator. - * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - * There is saturation on the subtraction, hence there is no risk of overflow. - */ - static __INLINE void arm_inv_clarke_q31( - q31_t Ialpha, - q31_t Ibeta, - q31_t * pIa, - q31_t * pIb) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - - /* Calculating pIa from Ialpha by equation pIa = Ialpha */ - *pIa = Ialpha; - - /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */ - product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31); - - /* Intermediate product is calculated by (1/sqrt(3) * pIb) */ - product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31); - - /* pIb is calculated by subtracting the products */ - *pIb = __QSUB(product2, product1); - } - - /** - * @} end of inv_clarke group - */ - - /** - * @brief Converts the elements of the Q7 vector to Q15 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_q7_to_q15( - q7_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - - /** - * @ingroup groupController - */ - - /** - * @defgroup park Vector Park Transform - * - * Forward Park transform converts the input two-coordinate vector to flux and torque components. - * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents - * from the stationary to the moving reference frame and control the spatial relationship between - * the stator vector current and rotor flux vector. - * If we consider the d axis aligned with the rotor flux, the diagram below shows the - * current vector and the relationship from the two reference frames: - * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame" - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html parkFormula.gif - * where Ialpha and Ibeta are the stator vector components, - * pId and pIq are rotor vector components and cosVal and sinVal are the - * cosine and sine values of theta (rotor flux position). - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Park transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup park - * @{ - */ - - /** - * @brief Floating-point Park transform - * @param[in] Ialpha input two-phase vector coordinate alpha - * @param[in] Ibeta input two-phase vector coordinate beta - * @param[out] pId points to output rotor reference frame d - * @param[out] pIq points to output rotor reference frame q - * @param[in] sinVal sine value of rotation angle theta - * @param[in] cosVal cosine value of rotation angle theta - * - * The function implements the forward Park transform. - * - */ - static __INLINE void arm_park_f32( - float32_t Ialpha, - float32_t Ibeta, - float32_t * pId, - float32_t * pIq, - float32_t sinVal, - float32_t cosVal) - { - /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */ - *pId = Ialpha * cosVal + Ibeta * sinVal; - - /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */ - *pIq = -Ialpha * sinVal + Ibeta * cosVal; - } - - - /** - * @brief Park transform for Q31 version - * @param[in] Ialpha input two-phase vector coordinate alpha - * @param[in] Ibeta input two-phase vector coordinate beta - * @param[out] pId points to output rotor reference frame d - * @param[out] pIq points to output rotor reference frame q - * @param[in] sinVal sine value of rotation angle theta - * @param[in] cosVal cosine value of rotation angle theta - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 32-bit accumulator. - * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - * There is saturation on the addition and subtraction, hence there is no risk of overflow. - */ - static __INLINE void arm_park_q31( - q31_t Ialpha, - q31_t Ibeta, - q31_t * pId, - q31_t * pIq, - q31_t sinVal, - q31_t cosVal) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - q31_t product3, product4; /* Temporary variables used to store intermediate results */ - - /* Intermediate product is calculated by (Ialpha * cosVal) */ - product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31); - - /* Intermediate product is calculated by (Ibeta * sinVal) */ - product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31); - - - /* Intermediate product is calculated by (Ialpha * sinVal) */ - product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31); - - /* Intermediate product is calculated by (Ibeta * cosVal) */ - product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31); - - /* Calculate pId by adding the two intermediate products 1 and 2 */ - *pId = __QADD(product1, product2); - - /* Calculate pIq by subtracting the two intermediate products 3 from 4 */ - *pIq = __QSUB(product4, product3); - } - - /** - * @} end of park group - */ - - /** - * @brief Converts the elements of the Q7 vector to floating-point vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q7_to_float( - q7_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @ingroup groupController - */ - - /** - * @defgroup inv_park Vector Inverse Park transform - * Inverse Park transform converts the input flux and torque components to two-coordinate vector. - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html parkInvFormula.gif - * where pIalpha and pIbeta are the stator vector components, - * Id and Iq are rotor vector components and cosVal and sinVal are the - * cosine and sine values of theta (rotor flux position). - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Park transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup inv_park - * @{ - */ - - /** - * @brief Floating-point Inverse Park transform - * @param[in] Id input coordinate of rotor reference frame d - * @param[in] Iq input coordinate of rotor reference frame q - * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - * @param[out] pIbeta points to output two-phase orthogonal vector axis beta - * @param[in] sinVal sine value of rotation angle theta - * @param[in] cosVal cosine value of rotation angle theta - */ - static __INLINE void arm_inv_park_f32( - float32_t Id, - float32_t Iq, - float32_t * pIalpha, - float32_t * pIbeta, - float32_t sinVal, - float32_t cosVal) - { - /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */ - *pIalpha = Id * cosVal - Iq * sinVal; - - /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */ - *pIbeta = Id * sinVal + Iq * cosVal; - } - - - /** - * @brief Inverse Park transform for Q31 version - * @param[in] Id input coordinate of rotor reference frame d - * @param[in] Iq input coordinate of rotor reference frame q - * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - * @param[out] pIbeta points to output two-phase orthogonal vector axis beta - * @param[in] sinVal sine value of rotation angle theta - * @param[in] cosVal cosine value of rotation angle theta - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 32-bit accumulator. - * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - * There is saturation on the addition, hence there is no risk of overflow. - */ - static __INLINE void arm_inv_park_q31( - q31_t Id, - q31_t Iq, - q31_t * pIalpha, - q31_t * pIbeta, - q31_t sinVal, - q31_t cosVal) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - q31_t product3, product4; /* Temporary variables used to store intermediate results */ - - /* Intermediate product is calculated by (Id * cosVal) */ - product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31); - - /* Intermediate product is calculated by (Iq * sinVal) */ - product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31); - - - /* Intermediate product is calculated by (Id * sinVal) */ - product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31); - - /* Intermediate product is calculated by (Iq * cosVal) */ - product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31); - - /* Calculate pIalpha by using the two intermediate products 1 and 2 */ - *pIalpha = __QSUB(product1, product2); - - /* Calculate pIbeta by using the two intermediate products 3 and 4 */ - *pIbeta = __QADD(product4, product3); - } - - /** - * @} end of Inverse park group - */ - - - /** - * @brief Converts the elements of the Q31 vector to floating-point vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q31_to_float( - q31_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - /** - * @ingroup groupInterpolation - */ - - /** - * @defgroup LinearInterpolate Linear Interpolation - * - * Linear interpolation is a method of curve fitting using linear polynomials. - * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line - * - * \par - * \image html LinearInterp.gif "Linear interpolation" - * - * \par - * A Linear Interpolate function calculates an output value(y), for the input(x) - * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values) - * - * \par Algorithm: - * 
-   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
-   *       where x0, x1 are nearest values of input x
-   *             y0, y1 are nearest values to output y
-   *
- * - * \par - * This set of functions implements Linear interpolation process - * for Q7, Q15, Q31, and floating-point data types. The functions operate on a single - * sample of data and each call to the function returns a single processed value. - * S points to an instance of the Linear Interpolate function data structure. - * x is the input sample value. The functions returns the output value. - * - * \par - * if x is outside of the table boundary, Linear interpolation returns first value of the table - * if x is below input range and returns last value of table if x is above range. - */ - - /** - * @addtogroup LinearInterpolate - * @{ - */ - - /** - * @brief Process function for the floating-point Linear Interpolation Function. - * @param[in,out] S is an instance of the floating-point Linear Interpolation structure - * @param[in] x input sample to process - * @return y processed output sample. - * - */ - static __INLINE float32_t arm_linear_interp_f32( - arm_linear_interp_instance_f32 * S, - float32_t x) - { - float32_t y; - float32_t x0, x1; /* Nearest input values */ - float32_t y0, y1; /* Nearest output values */ - float32_t xSpacing = S->xSpacing; /* spacing between input values */ - int32_t i; /* Index variable */ - float32_t *pYData = S->pYData; /* pointer to output table */ - - /* Calculation of index */ - i = (int32_t) ((x - S->x1) / xSpacing); - - if(i < 0) - { - /* Iniatilize output for below specified range as least output value of table */ - y = pYData[0]; - } - else if((uint32_t)i >= S->nValues) - { - /* Iniatilize output for above specified range as last output value of table */ - y = pYData[S->nValues - 1]; - } - else - { - /* Calculation of nearest input values */ - x0 = S->x1 + i * xSpacing; - x1 = S->x1 + (i + 1) * xSpacing; - - /* Read of nearest output values */ - y0 = pYData[i]; - y1 = pYData[i + 1]; - - /* Calculation of output */ - y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0)); - - } - - /* returns output value */ - return (y); - } - - - /** - * - * @brief Process function for the Q31 Linear Interpolation Function. - * @param[in] pYData pointer to Q31 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - * - */ - static __INLINE q31_t arm_linear_interp_q31( - q31_t * pYData, - q31_t x, - uint32_t nValues) - { - q31_t y; /* output */ - q31_t y0, y1; /* Nearest output values */ - q31_t fract; /* fractional part */ - int32_t index; /* Index to read nearest output values */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - index = ((x & (q31_t)0xFFF00000) >> 20); - - if(index >= (int32_t)(nValues - 1)) - { - return (pYData[nValues - 1]); - } - else if(index < 0) - { - return (pYData[0]); - } - else - { - /* 20 bits for the fractional part */ - /* shift left by 11 to keep fract in 1.31 format */ - fract = (x & 0x000FFFFF) << 11; - - /* Read two nearest output values from the index in 1.31(q31) format */ - y0 = pYData[index]; - y1 = pYData[index + 1]; - - /* Calculation of y0 * (1-fract) and y is in 2.30 format */ - y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32)); - - /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */ - y += ((q31_t) (((q63_t) y1 * fract) >> 32)); - - /* Convert y to 1.31 format */ - return (y << 1u); - } - } - - - /** - * - * @brief Process function for the Q15 Linear Interpolation Function. - * @param[in] pYData pointer to Q15 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - * - */ - static __INLINE q15_t arm_linear_interp_q15( - q15_t * pYData, - q31_t x, - uint32_t nValues) - { - q63_t y; /* output */ - q15_t y0, y1; /* Nearest output values */ - q31_t fract; /* fractional part */ - int32_t index; /* Index to read nearest output values */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - index = ((x & (int32_t)0xFFF00000) >> 20); - - if(index >= (int32_t)(nValues - 1)) - { - return (pYData[nValues - 1]); - } - else if(index < 0) - { - return (pYData[0]); - } - else - { - /* 20 bits for the fractional part */ - /* fract is in 12.20 format */ - fract = (x & 0x000FFFFF); - - /* Read two nearest output values from the index */ - y0 = pYData[index]; - y1 = pYData[index + 1]; - - /* Calculation of y0 * (1-fract) and y is in 13.35 format */ - y = ((q63_t) y0 * (0xFFFFF - fract)); - - /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */ - y += ((q63_t) y1 * (fract)); - - /* convert y to 1.15 format */ - return (q15_t) (y >> 20); - } - } - - - /** - * - * @brief Process function for the Q7 Linear Interpolation Function. - * @param[in] pYData pointer to Q7 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - */ - static __INLINE q7_t arm_linear_interp_q7( - q7_t * pYData, - q31_t x, - uint32_t nValues) - { - q31_t y; /* output */ - q7_t y0, y1; /* Nearest output values */ - q31_t fract; /* fractional part */ - uint32_t index; /* Index to read nearest output values */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - if (x < 0) - { - return (pYData[0]); - } - index = (x >> 20) & 0xfff; - - if(index >= (nValues - 1)) - { - return (pYData[nValues - 1]); - } - else - { - /* 20 bits for the fractional part */ - /* fract is in 12.20 format */ - fract = (x & 0x000FFFFF); - - /* Read two nearest output values from the index and are in 1.7(q7) format */ - y0 = pYData[index]; - y1 = pYData[index + 1]; - - /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */ - y = ((y0 * (0xFFFFF - fract))); - - /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */ - y += (y1 * fract); - - /* convert y to 1.7(q7) format */ - return (q7_t) (y >> 20); - } - } - - /** - * @} end of LinearInterpolate group - */ - - /** - * @brief Fast approximation to the trigonometric sine function for floating-point data. - * @param[in] x input value in radians. - * @return sin(x). - */ - float32_t arm_sin_f32( - float32_t x); - - - /** - * @brief Fast approximation to the trigonometric sine function for Q31 data. - * @param[in] x Scaled input value in radians. - * @return sin(x). - */ - q31_t arm_sin_q31( - q31_t x); - - - /** - * @brief Fast approximation to the trigonometric sine function for Q15 data. - * @param[in] x Scaled input value in radians. - * @return sin(x). - */ - q15_t arm_sin_q15( - q15_t x); - - - /** - * @brief Fast approximation to the trigonometric cosine function for floating-point data. - * @param[in] x input value in radians. - * @return cos(x). - */ - float32_t arm_cos_f32( - float32_t x); - - - /** - * @brief Fast approximation to the trigonometric cosine function for Q31 data. - * @param[in] x Scaled input value in radians. - * @return cos(x). - */ - q31_t arm_cos_q31( - q31_t x); - - - /** - * @brief Fast approximation to the trigonometric cosine function for Q15 data. - * @param[in] x Scaled input value in radians. - * @return cos(x). - */ - q15_t arm_cos_q15( - q15_t x); - - - /** - * @ingroup groupFastMath - */ - - - /** - * @defgroup SQRT Square Root - * - * Computes the square root of a number. - * There are separate functions for Q15, Q31, and floating-point data types. - * The square root function is computed using the Newton-Raphson algorithm. - * This is an iterative algorithm of the form: - * 
-   *      x1 = x0 - f(x0)/f'(x0)
-   *
- * where x1 is the current estimate, - * x0 is the previous estimate, and - * f'(x0) is the derivative of f() evaluated at x0. - * For the square root function, the algorithm reduces to: - * 
-   *     x0 = in/2                         [initial guess]
-   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
-   *
- */ - - - /** - * @addtogroup SQRT - * @{ - */ - - /** - * @brief Floating-point square root function. - * @param[in] in input value. - * @param[out] pOut square root of input value. - * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if - * in is negative value and returns zero output for negative values. - */ - static __INLINE arm_status arm_sqrt_f32( - float32_t in, - float32_t * pOut) - { - if(in >= 0.0f) - { - -#if (__FPU_USED == 1) && defined ( __CC_ARM ) - *pOut = __sqrtf(in); -#elif (__FPU_USED == 1) && (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) - *pOut = __builtin_sqrtf(in); -#elif (__FPU_USED == 1) && defined(__GNUC__) - *pOut = __builtin_sqrtf(in); -#elif (__FPU_USED == 1) && defined ( __ICCARM__ ) && (__VER__ >= 6040000) - __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in)); -#else - *pOut = sqrtf(in); -#endif - - return (ARM_MATH_SUCCESS); - } - else - { - *pOut = 0.0f; - return (ARM_MATH_ARGUMENT_ERROR); - } - } - - - /** - * @brief Q31 square root function. - * @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF. - * @param[out] pOut square root of input value. - * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if - * in is negative value and returns zero output for negative values. - */ - arm_status arm_sqrt_q31( - q31_t in, - q31_t * pOut); - - - /** - * @brief Q15 square root function. - * @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF. - * @param[out] pOut square root of input value. - * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if - * in is negative value and returns zero output for negative values. - */ - arm_status arm_sqrt_q15( - q15_t in, - q15_t * pOut); - - /** - * @} end of SQRT group - */ - - - /** - * @brief floating-point Circular write function. - */ - static __INLINE void arm_circularWrite_f32( - int32_t * circBuffer, - int32_t L, - uint16_t * writeOffset, - int32_t bufferInc, - const int32_t * src, - int32_t srcInc, - uint32_t blockSize) - { - uint32_t i = 0u; - int32_t wOffset; - - /* Copy the value of Index pointer that points - * to the current location where the input samples to be copied */ - wOffset = *writeOffset; - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the input sample to the circular buffer */ - circBuffer[wOffset] = *src; - - /* Update the input pointer */ - src += srcInc; - - /* Circularly update wOffset. Watch out for positive and negative value */ - wOffset += bufferInc; - if(wOffset >= L) - wOffset -= L; - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *writeOffset = (uint16_t)wOffset; - } - - - - /** - * @brief floating-point Circular Read function. - */ - static __INLINE void arm_circularRead_f32( - int32_t * circBuffer, - int32_t L, - int32_t * readOffset, - int32_t bufferInc, - int32_t * dst, - int32_t * dst_base, - int32_t dst_length, - int32_t dstInc, - uint32_t blockSize) - { - uint32_t i = 0u; - int32_t rOffset, dst_end; - - /* Copy the value of Index pointer that points - * to the current location from where the input samples to be read */ - rOffset = *readOffset; - dst_end = (int32_t) (dst_base + dst_length); - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the sample from the circular buffer to the destination buffer */ - *dst = circBuffer[rOffset]; - - /* Update the input pointer */ - dst += dstInc; - - if(dst == (int32_t *) dst_end) - { - dst = dst_base; - } - - /* Circularly update rOffset. Watch out for positive and negative value */ - rOffset += bufferInc; - - if(rOffset >= L) - { - rOffset -= L; - } - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *readOffset = rOffset; - } - - - /** - * @brief Q15 Circular write function. - */ - static __INLINE void arm_circularWrite_q15( - q15_t * circBuffer, - int32_t L, - uint16_t * writeOffset, - int32_t bufferInc, - const q15_t * src, - int32_t srcInc, - uint32_t blockSize) - { - uint32_t i = 0u; - int32_t wOffset; - - /* Copy the value of Index pointer that points - * to the current location where the input samples to be copied */ - wOffset = *writeOffset; - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the input sample to the circular buffer */ - circBuffer[wOffset] = *src; - - /* Update the input pointer */ - src += srcInc; - - /* Circularly update wOffset. Watch out for positive and negative value */ - wOffset += bufferInc; - if(wOffset >= L) - wOffset -= L; - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *writeOffset = (uint16_t)wOffset; - } - - - /** - * @brief Q15 Circular Read function. - */ - static __INLINE void arm_circularRead_q15( - q15_t * circBuffer, - int32_t L, - int32_t * readOffset, - int32_t bufferInc, - q15_t * dst, - q15_t * dst_base, - int32_t dst_length, - int32_t dstInc, - uint32_t blockSize) - { - uint32_t i = 0; - int32_t rOffset, dst_end; - - /* Copy the value of Index pointer that points - * to the current location from where the input samples to be read */ - rOffset = *readOffset; - - dst_end = (int32_t) (dst_base + dst_length); - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the sample from the circular buffer to the destination buffer */ - *dst = circBuffer[rOffset]; - - /* Update the input pointer */ - dst += dstInc; - - if(dst == (q15_t *) dst_end) - { - dst = dst_base; - } - - /* Circularly update wOffset. Watch out for positive and negative value */ - rOffset += bufferInc; - - if(rOffset >= L) - { - rOffset -= L; - } - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *readOffset = rOffset; - } - - - /** - * @brief Q7 Circular write function. - */ - static __INLINE void arm_circularWrite_q7( - q7_t * circBuffer, - int32_t L, - uint16_t * writeOffset, - int32_t bufferInc, - const q7_t * src, - int32_t srcInc, - uint32_t blockSize) - { - uint32_t i = 0u; - int32_t wOffset; - - /* Copy the value of Index pointer that points - * to the current location where the input samples to be copied */ - wOffset = *writeOffset; - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the input sample to the circular buffer */ - circBuffer[wOffset] = *src; - - /* Update the input pointer */ - src += srcInc; - - /* Circularly update wOffset. Watch out for positive and negative value */ - wOffset += bufferInc; - if(wOffset >= L) - wOffset -= L; - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *writeOffset = (uint16_t)wOffset; - } - - - /** - * @brief Q7 Circular Read function. - */ - static __INLINE void arm_circularRead_q7( - q7_t * circBuffer, - int32_t L, - int32_t * readOffset, - int32_t bufferInc, - q7_t * dst, - q7_t * dst_base, - int32_t dst_length, - int32_t dstInc, - uint32_t blockSize) - { - uint32_t i = 0; - int32_t rOffset, dst_end; - - /* Copy the value of Index pointer that points - * to the current location from where the input samples to be read */ - rOffset = *readOffset; - - dst_end = (int32_t) (dst_base + dst_length); - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the sample from the circular buffer to the destination buffer */ - *dst = circBuffer[rOffset]; - - /* Update the input pointer */ - dst += dstInc; - - if(dst == (q7_t *) dst_end) - { - dst = dst_base; - } - - /* Circularly update rOffset. Watch out for positive and negative value */ - rOffset += bufferInc; - - if(rOffset >= L) - { - rOffset -= L; - } - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *readOffset = rOffset; - } - - - /** - * @brief Sum of the squares of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_q31( - q31_t * pSrc, - uint32_t blockSize, - q63_t * pResult); - - - /** - * @brief Sum of the squares of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Sum of the squares of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_q15( - q15_t * pSrc, - uint32_t blockSize, - q63_t * pResult); - - - /** - * @brief Sum of the squares of the elements of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_q7( - q7_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Mean value of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_q7( - q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult); - - - /** - * @brief Mean value of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Mean value of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Mean value of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Variance of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Variance of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Variance of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Root Mean Square of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_rms_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Root Mean Square of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_rms_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Root Mean Square of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_rms_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Standard deviation of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Standard deviation of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Standard deviation of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Floating-point complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex dot product - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] numSamples number of complex samples in each vector - * @param[out] realResult real part of the result returned here - * @param[out] imagResult imaginary part of the result returned here - */ - void arm_cmplx_dot_prod_q15( - q15_t * pSrcA, - q15_t * pSrcB, - uint32_t numSamples, - q31_t * realResult, - q31_t * imagResult); - - - /** - * @brief Q31 complex dot product - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] numSamples number of complex samples in each vector - * @param[out] realResult real part of the result returned here - * @param[out] imagResult imaginary part of the result returned here - */ - void arm_cmplx_dot_prod_q31( - q31_t * pSrcA, - q31_t * pSrcB, - uint32_t numSamples, - q63_t * realResult, - q63_t * imagResult); - - - /** - * @brief Floating-point complex dot product - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] numSamples number of complex samples in each vector - * @param[out] realResult real part of the result returned here - * @param[out] imagResult imaginary part of the result returned here - */ - void arm_cmplx_dot_prod_f32( - float32_t * pSrcA, - float32_t * pSrcB, - uint32_t numSamples, - float32_t * realResult, - float32_t * imagResult); - - - /** - * @brief Q15 complex-by-real multiplication - * @param[in] pSrcCmplx points to the complex input vector - * @param[in] pSrcReal points to the real input vector - * @param[out] pCmplxDst points to the complex output vector - * @param[in] numSamples number of samples in each vector - */ - void arm_cmplx_mult_real_q15( - q15_t * pSrcCmplx, - q15_t * pSrcReal, - q15_t * pCmplxDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex-by-real multiplication - * @param[in] pSrcCmplx points to the complex input vector - * @param[in] pSrcReal points to the real input vector - * @param[out] pCmplxDst points to the complex output vector - * @param[in] numSamples number of samples in each vector - */ - void arm_cmplx_mult_real_q31( - q31_t * pSrcCmplx, - q31_t * pSrcReal, - q31_t * pCmplxDst, - uint32_t numSamples); - - - /** - * @brief Floating-point complex-by-real multiplication - * @param[in] pSrcCmplx points to the complex input vector - * @param[in] pSrcReal points to the real input vector - * @param[out] pCmplxDst points to the complex output vector - * @param[in] numSamples number of samples in each vector - */ - void arm_cmplx_mult_real_f32( - float32_t * pSrcCmplx, - float32_t * pSrcReal, - float32_t * pCmplxDst, - uint32_t numSamples); - - - /** - * @brief Minimum value of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] result is output pointer - * @param[in] index is the array index of the minimum value in the input buffer. - */ - void arm_min_q7( - q7_t * pSrc, - uint32_t blockSize, - q7_t * result, - uint32_t * index); - - - /** - * @brief Minimum value of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[in] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex); - - - /** - * @brief Minimum value of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex); - - - /** - * @brief Minimum value of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex); - - -/** - * @brief Maximum value of a Q7 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_q7( - q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex); - - -/** - * @brief Maximum value of a Q15 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex); - - -/** - * @brief Maximum value of a Q31 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex); - - -/** - * @brief Maximum value of a floating-point vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex); - - - /** - * @brief Q15 complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_mult_cmplx_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_mult_cmplx_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Floating-point complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_mult_cmplx_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t numSamples); - - - /** - * @brief Converts the elements of the floating-point vector to Q31 vector. - * @param[in] pSrc points to the floating-point input vector - * @param[out] pDst points to the Q31 output vector - * @param[in] blockSize length of the input vector - */ - void arm_float_to_q31( - float32_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the floating-point vector to Q15 vector. - * @param[in] pSrc points to the floating-point input vector - * @param[out] pDst points to the Q15 output vector - * @param[in] blockSize length of the input vector - */ - void arm_float_to_q15( - float32_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the floating-point vector to Q7 vector. - * @param[in] pSrc points to the floating-point input vector - * @param[out] pDst points to the Q7 output vector - * @param[in] blockSize length of the input vector - */ - void arm_float_to_q7( - float32_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q31 vector to Q15 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q31_to_q15( - q31_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q31 vector to Q7 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q31_to_q7( - q31_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q15 vector to floating-point vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q15_to_float( - q15_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q15 vector to Q31 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q15_to_q31( - q15_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q15 vector to Q7 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q15_to_q7( - q15_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @ingroup groupInterpolation - */ - - /** - * @defgroup BilinearInterpolate Bilinear Interpolation - * - * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid. - * The underlying function f(x, y) is sampled on a regular grid and the interpolation process - * determines values between the grid points. - * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension. - * Bilinear interpolation is often used in image processing to rescale images. - * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types. - * - * Algorithm - * \par - * The instance structure used by the bilinear interpolation functions describes a two dimensional data table. - * For floating-point, the instance structure is defined as: - * 
-   *   typedef struct
-   *   {
-   *     uint16_t numRows;
-   *     uint16_t numCols;
-   *     float32_t *pData;
-   * } arm_bilinear_interp_instance_f32;
-   *
- * - * \par - * where numRows specifies the number of rows in the table; - * numCols specifies the number of columns in the table; - * and pData points to an array of size numRows*numCols values. - * The data table pTable is organized in row order and the supplied data values fall on integer indexes. - * That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers. - * - * \par - * Let (x, y) specify the desired interpolation point. Then define: - * 
-   *     XF = floor(x)
-   *     YF = floor(y)
-   *
- * \par - * The interpolated output point is computed as: - * 
-   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
-   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
-   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
-   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
-   *
- * Note that the coordinates (x, y) contain integer and fractional components. - * The integer components specify which portion of the table to use while the - * fractional components control the interpolation processor. - * - * \par - * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. - */ - - /** - * @addtogroup BilinearInterpolate - * @{ - */ - - - /** - * - * @brief Floating-point bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate. - * @param[in] Y interpolation coordinate. - * @return out interpolated value. - */ - static __INLINE float32_t arm_bilinear_interp_f32( - const arm_bilinear_interp_instance_f32 * S, - float32_t X, - float32_t Y) - { - float32_t out; - float32_t f00, f01, f10, f11; - float32_t *pData = S->pData; - int32_t xIndex, yIndex, index; - float32_t xdiff, ydiff; - float32_t b1, b2, b3, b4; - - xIndex = (int32_t) X; - yIndex = (int32_t) Y; - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if(xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1)) - { - return (0); - } - - /* Calculation of index for two nearest points in X-direction */ - index = (xIndex - 1) + (yIndex - 1) * S->numCols; - - - /* Read two nearest points in X-direction */ - f00 = pData[index]; - f01 = pData[index + 1]; - - /* Calculation of index for two nearest points in Y-direction */ - index = (xIndex - 1) + (yIndex) * S->numCols; - - - /* Read two nearest points in Y-direction */ - f10 = pData[index]; - f11 = pData[index + 1]; - - /* Calculation of intermediate values */ - b1 = f00; - b2 = f01 - f00; - b3 = f10 - f00; - b4 = f00 - f01 - f10 + f11; - - /* Calculation of fractional part in X */ - xdiff = X - xIndex; - - /* Calculation of fractional part in Y */ - ydiff = Y - yIndex; - - /* Calculation of bi-linear interpolated output */ - out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff; - - /* return to application */ - return (out); - } - - - /** - * - * @brief Q31 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - static __INLINE q31_t arm_bilinear_interp_q31( - arm_bilinear_interp_instance_q31 * S, - q31_t X, - q31_t Y) - { - q31_t out; /* Temporary output */ - q31_t acc = 0; /* output */ - q31_t xfract, yfract; /* X, Y fractional parts */ - q31_t x1, x2, y1, y2; /* Nearest output values */ - int32_t rI, cI; /* Row and column indices */ - q31_t *pYData = S->pData; /* pointer to output table values */ - uint32_t nCols = S->numCols; /* num of rows */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - rI = ((X & (q31_t)0xFFF00000) >> 20); - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - cI = ((Y & (q31_t)0xFFF00000) >> 20); - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) - { - return (0); - } - - /* 20 bits for the fractional part */ - /* shift left xfract by 11 to keep 1.31 format */ - xfract = (X & 0x000FFFFF) << 11u; - - /* Read two nearest output values from the index */ - x1 = pYData[(rI) + (int32_t)nCols * (cI) ]; - x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1]; - - /* 20 bits for the fractional part */ - /* shift left yfract by 11 to keep 1.31 format */ - yfract = (Y & 0x000FFFFF) << 11u; - - /* Read two nearest output values from the index */ - y1 = pYData[(rI) + (int32_t)nCols * (cI + 1) ]; - y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1]; - - /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */ - out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32)); - acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32)); - - /* x2 * (xfract) * (1-yfract) in 3.29(q29) and adding to acc */ - out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32)); - acc += ((q31_t) ((q63_t) out * (xfract) >> 32)); - - /* y1 * (1 - xfract) * (yfract) in 3.29(q29) and adding to acc */ - out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32)); - acc += ((q31_t) ((q63_t) out * (yfract) >> 32)); - - /* y2 * (xfract) * (yfract) in 3.29(q29) and adding to acc */ - out = ((q31_t) ((q63_t) y2 * (xfract) >> 32)); - acc += ((q31_t) ((q63_t) out * (yfract) >> 32)); - - /* Convert acc to 1.31(q31) format */ - return ((q31_t)(acc << 2)); - } - - - /** - * @brief Q15 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - static __INLINE q15_t arm_bilinear_interp_q15( - arm_bilinear_interp_instance_q15 * S, - q31_t X, - q31_t Y) - { - q63_t acc = 0; /* output */ - q31_t out; /* Temporary output */ - q15_t x1, x2, y1, y2; /* Nearest output values */ - q31_t xfract, yfract; /* X, Y fractional parts */ - int32_t rI, cI; /* Row and column indices */ - q15_t *pYData = S->pData; /* pointer to output table values */ - uint32_t nCols = S->numCols; /* num of rows */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - rI = ((X & (q31_t)0xFFF00000) >> 20); - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - cI = ((Y & (q31_t)0xFFF00000) >> 20); - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) - { - return (0); - } - - /* 20 bits for the fractional part */ - /* xfract should be in 12.20 format */ - xfract = (X & 0x000FFFFF); - - /* Read two nearest output values from the index */ - x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ]; - x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1]; - - /* 20 bits for the fractional part */ - /* yfract should be in 12.20 format */ - yfract = (Y & 0x000FFFFF); - - /* Read two nearest output values from the index */ - y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ]; - y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1]; - - /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */ - - /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */ - /* convert 13.35 to 13.31 by right shifting and out is in 1.31 */ - out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u); - acc = ((q63_t) out * (0xFFFFF - yfract)); - - /* x2 * (xfract) * (1-yfract) in 1.51 and adding to acc */ - out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u); - acc += ((q63_t) out * (xfract)); - - /* y1 * (1 - xfract) * (yfract) in 1.51 and adding to acc */ - out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u); - acc += ((q63_t) out * (yfract)); - - /* y2 * (xfract) * (yfract) in 1.51 and adding to acc */ - out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u); - acc += ((q63_t) out * (yfract)); - - /* acc is in 13.51 format and down shift acc by 36 times */ - /* Convert out to 1.15 format */ - return ((q15_t)(acc >> 36)); - } - - - /** - * @brief Q7 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - static __INLINE q7_t arm_bilinear_interp_q7( - arm_bilinear_interp_instance_q7 * S, - q31_t X, - q31_t Y) - { - q63_t acc = 0; /* output */ - q31_t out; /* Temporary output */ - q31_t xfract, yfract; /* X, Y fractional parts */ - q7_t x1, x2, y1, y2; /* Nearest output values */ - int32_t rI, cI; /* Row and column indices */ - q7_t *pYData = S->pData; /* pointer to output table values */ - uint32_t nCols = S->numCols; /* num of rows */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - rI = ((X & (q31_t)0xFFF00000) >> 20); - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - cI = ((Y & (q31_t)0xFFF00000) >> 20); - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) - { - return (0); - } - - /* 20 bits for the fractional part */ - /* xfract should be in 12.20 format */ - xfract = (X & (q31_t)0x000FFFFF); - - /* Read two nearest output values from the index */ - x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ]; - x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1]; - - /* 20 bits for the fractional part */ - /* yfract should be in 12.20 format */ - yfract = (Y & (q31_t)0x000FFFFF); - - /* Read two nearest output values from the index */ - y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ]; - y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1]; - - /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */ - out = ((x1 * (0xFFFFF - xfract))); - acc = (((q63_t) out * (0xFFFFF - yfract))); - - /* x2 * (xfract) * (1-yfract) in 2.22 and adding to acc */ - out = ((x2 * (0xFFFFF - yfract))); - acc += (((q63_t) out * (xfract))); - - /* y1 * (1 - xfract) * (yfract) in 2.22 and adding to acc */ - out = ((y1 * (0xFFFFF - xfract))); - acc += (((q63_t) out * (yfract))); - - /* y2 * (xfract) * (yfract) in 2.22 and adding to acc */ - out = ((y2 * (yfract))); - acc += (((q63_t) out * (xfract))); - - /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */ - return ((q7_t)(acc >> 40)); - } - - /** - * @} end of BilinearInterpolate group - */ - - -/* SMMLAR */ -#define multAcc_32x32_keep32_R(a, x, y) \ - a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32) - -/* SMMLSR */ -#define multSub_32x32_keep32_R(a, x, y) \ - a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32) - -/* SMMULR */ -#define mult_32x32_keep32_R(a, x, y) \ - a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32) - -/* SMMLA */ -#define multAcc_32x32_keep32(a, x, y) \ - a += (q31_t) (((q63_t) x * y) >> 32) - -/* SMMLS */ -#define multSub_32x32_keep32(a, x, y) \ - a -= (q31_t) (((q63_t) x * y) >> 32) - -/* SMMUL */ -#define mult_32x32_keep32(a, x, y) \ - a = (q31_t) (((q63_t) x * y ) >> 32) - - -#if defined ( __CC_ARM ) - /* Enter low optimization region - place directly above function definition */ - #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) - #define LOW_OPTIMIZATION_ENTER \ - _Pragma ("push") \ - _Pragma ("O1") - #else - #define LOW_OPTIMIZATION_ENTER - #endif - - /* Exit low optimization region - place directly after end of function definition */ - #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) - #define LOW_OPTIMIZATION_EXIT \ - _Pragma ("pop") - #else - #define LOW_OPTIMIZATION_EXIT - #endif - - /* Enter low optimization region - place directly above function definition */ - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - - /* Exit low optimization region - place directly after end of function definition */ - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined(__GNUC__) - #define LOW_OPTIMIZATION_ENTER __attribute__(( optimize("-O1") )) - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined(__ICCARM__) - /* Enter low optimization region - place directly above function definition */ - #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) - #define LOW_OPTIMIZATION_ENTER \ - _Pragma ("optimize=low") - #else - #define LOW_OPTIMIZATION_ENTER - #endif - - /* Exit low optimization region - place directly after end of function definition */ - #define LOW_OPTIMIZATION_EXIT - - /* Enter low optimization region - place directly above function definition */ - #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \ - _Pragma ("optimize=low") - #else - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #endif - - /* Exit low optimization region - place directly after end of function definition */ - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined(__CSMC__) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined(__TASKING__) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#endif - - -#ifdef __cplusplus -} -#endif - - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -#endif /* _ARM_MATH_H */ - -/** - * - * End of file. - */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/cmsis_armcc.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/cmsis_armcc.h deleted file mode 100644 index 74c49c67..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/cmsis_armcc.h +++ /dev/null @@ -1,734 +0,0 @@ -/**************************************************************************//** - * @file cmsis_armcc.h - * @brief CMSIS Cortex-M Core Function/Instruction Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#ifndef __CMSIS_ARMCC_H -#define __CMSIS_ARMCC_H - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677) - #error "Please use ARM Compiler Toolchain V4.0.677 or later!" -#endif - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ - */ - -/* intrinsic void __enable_irq(); */ -/* intrinsic void __disable_irq(); */ - -/** - \brief Get Control Register - \details Returns the content of the Control Register. - \return Control Register value - */ -__STATIC_INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - - -/** - \brief Set Control Register - \details Writes the given value to the Control Register. - \param [in] control Control Register value to set - */ -__STATIC_INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - - -/** - \brief Get IPSR Register - \details Returns the content of the IPSR Register. - \return IPSR Register value - */ -__STATIC_INLINE uint32_t __get_IPSR(void) -{ - register uint32_t __regIPSR __ASM("ipsr"); - return(__regIPSR); -} - - -/** - \brief Get APSR Register - \details Returns the content of the APSR Register. - \return APSR Register value - */ -__STATIC_INLINE uint32_t __get_APSR(void) -{ - register uint32_t __regAPSR __ASM("apsr"); - return(__regAPSR); -} - - -/** - \brief Get xPSR Register - \details Returns the content of the xPSR Register. - \return xPSR Register value - */ -__STATIC_INLINE uint32_t __get_xPSR(void) -{ - register uint32_t __regXPSR __ASM("xpsr"); - return(__regXPSR); -} - - -/** - \brief Get Process Stack Pointer - \details Returns the current value of the Process Stack Pointer (PSP). - \return PSP Register value - */ -__STATIC_INLINE uint32_t __get_PSP(void) -{ - register uint32_t __regProcessStackPointer __ASM("psp"); - return(__regProcessStackPointer); -} - - -/** - \brief Set Process Stack Pointer - \details Assigns the given value to the Process Stack Pointer (PSP). - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) -{ - register uint32_t __regProcessStackPointer __ASM("psp"); - __regProcessStackPointer = topOfProcStack; -} - - -/** - \brief Get Main Stack Pointer - \details Returns the current value of the Main Stack Pointer (MSP). - \return MSP Register value - */ -__STATIC_INLINE uint32_t __get_MSP(void) -{ - register uint32_t __regMainStackPointer __ASM("msp"); - return(__regMainStackPointer); -} - - -/** - \brief Set Main Stack Pointer - \details Assigns the given value to the Main Stack Pointer (MSP). - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) -{ - register uint32_t __regMainStackPointer __ASM("msp"); - __regMainStackPointer = topOfMainStack; -} - - -/** - \brief Get Priority Mask - \details Returns the current state of the priority mask bit from the Priority Mask Register. - \return Priority Mask value - */ -__STATIC_INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - - -/** - \brief Set Priority Mask - \details Assigns the given value to the Priority Mask Register. - \param [in] priMask Priority Mask - */ -__STATIC_INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - - -#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) - -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -#define __enable_fault_irq __enable_fiq - - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -#define __disable_fault_irq __disable_fiq - - -/** - \brief Get Base Priority - \details Returns the current value of the Base Priority register. - \return Base Priority register value - */ -__STATIC_INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - - -/** - \brief Set Base Priority - \details Assigns the given value to the Base Priority register. - \param [in] basePri Base Priority value to set - */ -__STATIC_INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0xFFU); -} - - -/** - \brief Set Base Priority with condition - \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri) -{ - register uint32_t __regBasePriMax __ASM("basepri_max"); - __regBasePriMax = (basePri & 0xFFU); -} - - -/** - \brief Get Fault Mask - \details Returns the current value of the Fault Mask register. - \return Fault Mask register value - */ -__STATIC_INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - - -/** - \brief Set Fault Mask - \details Assigns the given value to the Fault Mask register. - \param [in] faultMask Fault Mask value to set - */ -__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & (uint32_t)1); -} - -#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */ - - -#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) - -/** - \brief Get FPSCR - \details Returns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -__STATIC_INLINE uint32_t __get_FPSCR(void) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - register uint32_t __regfpscr __ASM("fpscr"); - return(__regfpscr); -#else - return(0U); -#endif -} - - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -__STATIC_INLINE void __set_FPSCR(uint32_t fpscr) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - register uint32_t __regfpscr __ASM("fpscr"); - __regfpscr = (fpscr); -#endif -} - -#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */ - - - -/*@} end of CMSIS_Core_RegAccFunctions */ - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/** - \brief No Operation - \details No Operation does nothing. This instruction can be used for code alignment purposes. - */ -#define __NOP __nop - - -/** - \brief Wait For Interrupt - \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. - */ -#define __WFI __wfi - - -/** - \brief Wait For Event - \details Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -#define __WFE __wfe - - -/** - \brief Send Event - \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -#define __SEV __sev - - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -#define __ISB() do {\ - __schedule_barrier();\ - __isb(0xF);\ - __schedule_barrier();\ - } while (0U) - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -#define __DSB() do {\ - __schedule_barrier();\ - __dsb(0xF);\ - __schedule_barrier();\ - } while (0U) - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -#define __DMB() do {\ - __schedule_barrier();\ - __dmb(0xF);\ - __schedule_barrier();\ - } while (0U) - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in integer value. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV __rev - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in two unsigned short values. - \param [in] value Value to reverse - \return Reversed value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) -{ - rev16 r0, r0 - bx lr -} -#endif - -/** - \brief Reverse byte order in signed short value - \details Reverses the byte order in a signed short value with sign extension to integer. - \param [in] value Value to reverse - \return Reversed value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value) -{ - revsh r0, r0 - bx lr -} -#endif - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] value Value to rotate - \param [in] value Number of Bits to rotate - \return Rotated value - */ -#define __ROR __ror - - -/** - \brief Breakpoint - \details Causes the processor to enter Debug state. - Debug tools can use this to investigate system state when the instruction at a particular address is reached. - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __breakpoint(value) - - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ -#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) - #define __RBIT __rbit -#else -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) -{ - uint32_t result; - int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */ - - result = value; /* r will be reversed bits of v; first get LSB of v */ - for (value >>= 1U; value; value >>= 1U) - { - result <<= 1U; - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ - return(result); -} -#endif - - -/** - \brief Count leading zeros - \details Counts the number of leading zeros of a data value. - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -#define __CLZ __clz - - -#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) -#else - #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") -#endif - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) -#else - #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") -#endif - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) -#else - #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") -#endif - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXB(value, ptr) __strex(value, ptr) -#else - #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXH(value, ptr) __strex(value, ptr) -#else - #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXW(value, ptr) __strex(value, ptr) -#else - #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -#define __CLREX __clrex - - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT __ssat - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT __usat - - -/** - \brief Rotate Right with Extend (32 bit) - \details Moves each bit of a bitstring right by one bit. - The carry input is shifted in at the left end of the bitstring. - \param [in] value Value to rotate - \return Rotated value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value) -{ - rrx r0, r0 - bx lr -} -#endif - - -/** - \brief LDRT Unprivileged (8 bit) - \details Executes a Unprivileged LDRT instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr)) - - -/** - \brief LDRT Unprivileged (16 bit) - \details Executes a Unprivileged LDRT instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr)) - - -/** - \brief LDRT Unprivileged (32 bit) - \details Executes a Unprivileged LDRT instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr)) - - -/** - \brief STRT Unprivileged (8 bit) - \details Executes a Unprivileged STRT instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -#define __STRBT(value, ptr) __strt(value, ptr) - - -/** - \brief STRT Unprivileged (16 bit) - \details Executes a Unprivileged STRT instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -#define __STRHT(value, ptr) __strt(value, ptr) - - -/** - \brief STRT Unprivileged (32 bit) - \details Executes a Unprivileged STRT instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -#define __STRT(value, ptr) __strt(value, ptr) - -#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */ - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */ - -#define __SADD8 __sadd8 -#define __QADD8 __qadd8 -#define __SHADD8 __shadd8 -#define __UADD8 __uadd8 -#define __UQADD8 __uqadd8 -#define __UHADD8 __uhadd8 -#define __SSUB8 __ssub8 -#define __QSUB8 __qsub8 -#define __SHSUB8 __shsub8 -#define __USUB8 __usub8 -#define __UQSUB8 __uqsub8 -#define __UHSUB8 __uhsub8 -#define __SADD16 __sadd16 -#define __QADD16 __qadd16 -#define __SHADD16 __shadd16 -#define __UADD16 __uadd16 -#define __UQADD16 __uqadd16 -#define __UHADD16 __uhadd16 -#define __SSUB16 __ssub16 -#define __QSUB16 __qsub16 -#define __SHSUB16 __shsub16 -#define __USUB16 __usub16 -#define __UQSUB16 __uqsub16 -#define __UHSUB16 __uhsub16 -#define __SASX __sasx -#define __QASX __qasx -#define __SHASX __shasx -#define __UASX __uasx -#define __UQASX __uqasx -#define __UHASX __uhasx -#define __SSAX __ssax -#define __QSAX __qsax -#define __SHSAX __shsax -#define __USAX __usax -#define __UQSAX __uqsax -#define __UHSAX __uhsax -#define __USAD8 __usad8 -#define __USADA8 __usada8 -#define __SSAT16 __ssat16 -#define __USAT16 __usat16 -#define __UXTB16 __uxtb16 -#define __UXTAB16 __uxtab16 -#define __SXTB16 __sxtb16 -#define __SXTAB16 __sxtab16 -#define __SMUAD __smuad -#define __SMUADX __smuadx -#define __SMLAD __smlad -#define __SMLADX __smladx -#define __SMLALD __smlald -#define __SMLALDX __smlaldx -#define __SMUSD __smusd -#define __SMUSDX __smusdx -#define __SMLSD __smlsd -#define __SMLSDX __smlsdx -#define __SMLSLD __smlsld -#define __SMLSLDX __smlsldx -#define __SEL __sel -#define __QADD __qadd -#define __QSUB __qsub - -#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ - ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) - -#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ - ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) - -#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \ - ((int64_t)(ARG3) << 32U) ) >> 32U)) - -#endif /* (__CORTEX_M >= 0x04) */ -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#endif /* __CMSIS_ARMCC_H */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/cmsis_armcc_V6.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/cmsis_armcc_V6.h deleted file mode 100644 index cd13240c..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/cmsis_armcc_V6.h +++ /dev/null @@ -1,1800 +0,0 @@ -/**************************************************************************//** - * @file cmsis_armcc_V6.h - * @brief CMSIS Cortex-M Core Function/Instruction Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#ifndef __CMSIS_ARMCC_V6_H -#define __CMSIS_ARMCC_V6_H - - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ - */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void) -{ - __ASM volatile ("cpsie i" : : : "memory"); -} - - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); -} - - -/** - \brief Get Control Register - \details Returns the content of the Control Register. - \return Control Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Control Register (non-secure) - \details Returns the content of the non-secure Control Register when in secure mode. - \return non-secure Control Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Control Register - \details Writes the given value to the Control Register. - \param [in] control Control Register value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Control Register (non-secure) - \details Writes the given value to the non-secure Control Register when in secure state. - \param [in] control Control Register value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control) -{ - __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); -} -#endif - - -/** - \brief Get IPSR Register - \details Returns the content of the IPSR Register. - \return IPSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get IPSR Register (non-secure) - \details Returns the content of the non-secure IPSR Register when in secure state. - \return IPSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_IPSR_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, ipsr_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Get APSR Register - \details Returns the content of the APSR Register. - \return APSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, apsr" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get APSR Register (non-secure) - \details Returns the content of the non-secure APSR Register when in secure state. - \return APSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_APSR_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, apsr_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Get xPSR Register - \details Returns the content of the xPSR Register. - \return xPSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get xPSR Register (non-secure) - \details Returns the content of the non-secure xPSR Register when in secure state. - \return xPSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_xPSR_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, xpsr_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Get Process Stack Pointer - \details Returns the current value of the Process Stack Pointer (PSP). - \return PSP Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, psp" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Process Stack Pointer (non-secure) - \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. - \return PSP Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Process Stack Pointer - \details Assigns the given value to the Process Stack Pointer (PSP). - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : "sp"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Process Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state. - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : "sp"); -} -#endif - - -/** - \brief Get Main Stack Pointer - \details Returns the current value of the Main Stack Pointer (MSP). - \return MSP Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, msp" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Main Stack Pointer (non-secure) - \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. - \return MSP Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Main Stack Pointer - \details Assigns the given value to the Main Stack Pointer (MSP). - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : "sp"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Main Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : "sp"); -} -#endif - - -/** - \brief Get Priority Mask - \details Returns the current state of the priority mask bit from the Priority Mask Register. - \return Priority Mask value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Priority Mask (non-secure) - \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state. - \return Priority Mask value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Priority Mask - \details Assigns the given value to the Priority Mask Register. - \param [in] priMask Priority Mask - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Priority Mask (non-secure) - \details Assigns the given value to the non-secure Priority Mask Register when in secure state. - \param [in] priMask Priority Mask - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) -{ - __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); -} -#endif - - -#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */ - -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void) -{ - __ASM volatile ("cpsie f" : : : "memory"); -} - - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void) -{ - __ASM volatile ("cpsid f" : : : "memory"); -} - - -/** - \brief Get Base Priority - \details Returns the current value of the Base Priority register. - \return Base Priority register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Base Priority (non-secure) - \details Returns the current value of the non-secure Base Priority register when in secure state. - \return Base Priority register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Base Priority - \details Assigns the given value to the Base Priority register. - \param [in] basePri Base Priority value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t value) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Base Priority (non-secure) - \details Assigns the given value to the non-secure Base Priority register when in secure state. - \param [in] basePri Base Priority value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t value) -{ - __ASM volatile ("MSR basepri_ns, %0" : : "r" (value) : "memory"); -} -#endif - - -/** - \brief Set Base Priority with condition - \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value) -{ - __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Base Priority with condition (non_secure) - \details Assigns the given value to the non-secure Base Priority register when in secure state only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_MAX_NS(uint32_t value) -{ - __ASM volatile ("MSR basepri_max_ns, %0" : : "r" (value) : "memory"); -} -#endif - - -/** - \brief Get Fault Mask - \details Returns the current value of the Fault Mask register. - \return Fault Mask register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Fault Mask (non-secure) - \details Returns the current value of the non-secure Fault Mask register when in secure state. - \return Fault Mask register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Fault Mask - \details Assigns the given value to the Fault Mask register. - \param [in] faultMask Fault Mask value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Fault Mask (non-secure) - \details Assigns the given value to the non-secure Fault Mask register when in secure state. - \param [in] faultMask Fault Mask value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); -} -#endif - - -#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */ - - -#if (__ARM_ARCH_8M__ == 1U) - -/** - \brief Get Process Stack Pointer Limit - \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). - \return PSPLIM Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, psplim" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ -/** - \brief Get Process Stack Pointer Limit (non-secure) - \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. - \return PSPLIM Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Process Stack Pointer Limit - \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). - \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) -{ - __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); -} - - -#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ -/** - \brief Set Process Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. - \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) -{ - __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); -} -#endif - - -/** - \brief Get Main Stack Pointer Limit - \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). - \return MSPLIM Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, msplim" : "=r" (result) ); - - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ -/** - \brief Get Main Stack Pointer Limit (non-secure) - \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. - \return MSPLIM Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Main Stack Pointer Limit - \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). - \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) -{ - __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); -} - - -#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ -/** - \brief Set Main Stack Pointer Limit (non-secure) - \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state. - \param [in] MainStackPtrLimit Main Stack Pointer value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) -{ - __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); -} -#endif - -#endif /* (__ARM_ARCH_8M__ == 1U) */ - - -#if ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=4 */ - -/** - \brief Get FPSCR - \details eturns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -#define __get_FPSCR __builtin_arm_get_fpscr -#if 0 -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - uint32_t result; - - __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ - __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); - __ASM volatile (""); - return(result); -#else - return(0); -#endif -} -#endif - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get FPSCR (non-secure) - \details Returns the current value of the non-secure Floating Point Status/Control register when in secure state. - \return Floating Point Status/Control register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FPSCR_NS(void) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - uint32_t result; - - __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ - __ASM volatile ("VMRS %0, fpscr_ns" : "=r" (result) ); - __ASM volatile (""); - return(result); -#else - return(0); -#endif -} -#endif - - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -#define __set_FPSCR __builtin_arm_set_fpscr -#if 0 -__attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ - __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); - __ASM volatile (""); -#endif -} -#endif - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set FPSCR (non-secure) - \details Assigns the given value to the non-secure Floating Point Status/Control register when in secure state. - \param [in] fpscr Floating Point Status/Control value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FPSCR_NS(uint32_t fpscr) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ - __ASM volatile ("VMSR fpscr_ns, %0" : : "r" (fpscr) : "vfpcc"); - __ASM volatile (""); -#endif -} -#endif - -#endif /* ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */ - - - -/*@} end of CMSIS_Core_RegAccFunctions */ - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/* Define macros for porting to both thumb1 and thumb2. - * For thumb1, use low register (r0-r7), specified by constraint "l" - * Otherwise, use general registers, specified by constraint "r" */ -#if defined (__thumb__) && !defined (__thumb2__) -#define __CMSIS_GCC_OUT_REG(r) "=l" (r) -#define __CMSIS_GCC_USE_REG(r) "l" (r) -#else -#define __CMSIS_GCC_OUT_REG(r) "=r" (r) -#define __CMSIS_GCC_USE_REG(r) "r" (r) -#endif - -/** - \brief No Operation - \details No Operation does nothing. This instruction can be used for code alignment purposes. - */ -#define __NOP __builtin_arm_nop - -/** - \brief Wait For Interrupt - \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. - */ -#define __WFI __builtin_arm_wfi - - -/** - \brief Wait For Event - \details Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -#define __WFE __builtin_arm_wfe - - -/** - \brief Send Event - \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -#define __SEV __builtin_arm_sev - - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -#define __ISB() __builtin_arm_isb(0xF); - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -#define __DSB() __builtin_arm_dsb(0xF); - - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -#define __DMB() __builtin_arm_dmb(0xF); - - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in integer value. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV __builtin_bswap32 - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in two unsigned short values. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV16 __builtin_bswap16 /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */ -#if 0 -__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} -#endif - - -/** - \brief Reverse byte order in signed short value - \details Reverses the byte order in a signed short value with sign extension to integer. - \param [in] value Value to reverse - \return Reversed value - */ - /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */ -__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value) -{ - int32_t result; - - __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] op1 Value to rotate - \param [in] op2 Number of Bits to rotate - \return Rotated value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) -{ - return (op1 >> op2) | (op1 << (32U - op2)); -} - - -/** - \brief Breakpoint - \details Causes the processor to enter Debug state. - Debug tools can use this to investigate system state when the instruction at a particular address is reached. - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __ASM volatile ("bkpt "#value) - - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ - /* ToDo: ARMCC_V6: check if __builtin_arm_rbit is supported */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) -{ - uint32_t result; - -#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */ - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); -#else - int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */ - - result = value; /* r will be reversed bits of v; first get LSB of v */ - for (value >>= 1U; value; value >>= 1U) - { - result <<= 1U; - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ -#endif - return(result); -} - - -/** - \brief Count leading zeros - \details Counts the number of leading zeros of a data value. - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -#define __CLZ __builtin_clz - - -#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */ - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDREXB (uint8_t)__builtin_arm_ldrex - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDREXH (uint16_t)__builtin_arm_ldrex - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDREXW (uint32_t)__builtin_arm_ldrex - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXB (uint32_t)__builtin_arm_strex - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXH (uint32_t)__builtin_arm_strex - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXW (uint32_t)__builtin_arm_strex - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -#define __CLREX __builtin_arm_clrex - - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -/*#define __SSAT __builtin_arm_ssat*/ -#define __SSAT(ARG1,ARG2) \ -({ \ - int32_t __RES, __ARG1 = (ARG1); \ - __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT __builtin_arm_usat -#if 0 -#define __USAT(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) -#endif - - -/** - \brief Rotate Right with Extend (32 bit) - \details Moves each bit of a bitstring right by one bit. - The carry input is shifted in at the left end of the bitstring. - \param [in] value Value to rotate - \return Rotated value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief LDRT Unprivileged (8 bit) - \details Executes a Unprivileged LDRT instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (16 bit) - \details Executes a Unprivileged LDRT instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (32 bit) - \details Executes a Unprivileged LDRT instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); - return(result); -} - - -/** - \brief STRT Unprivileged (8 bit) - \details Executes a Unprivileged STRT instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) -{ - __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (16 bit) - \details Executes a Unprivileged STRT instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) -{ - __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (32 bit) - \details Executes a Unprivileged STRT instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr) -{ - __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); -} - -#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */ - - -#if (__ARM_ARCH_8M__ == 1U) - -/** - \brief Load-Acquire (8 bit) - \details Executes a LDAB instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint8_t) result); -} - - -/** - \brief Load-Acquire (16 bit) - \details Executes a LDAH instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint16_t) result); -} - - -/** - \brief Load-Acquire (32 bit) - \details Executes a LDA instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); - return(result); -} - - -/** - \brief Store-Release (8 bit) - \details Executes a STLB instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr) -{ - __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief Store-Release (16 bit) - \details Executes a STLH instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr) -{ - __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief Store-Release (32 bit) - \details Executes a STL instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr) -{ - __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief Load-Acquire Exclusive (8 bit) - \details Executes a LDAB exclusive instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDAEXB (uint8_t)__builtin_arm_ldaex - - -/** - \brief Load-Acquire Exclusive (16 bit) - \details Executes a LDAH exclusive instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDAEXH (uint16_t)__builtin_arm_ldaex - - -/** - \brief Load-Acquire Exclusive (32 bit) - \details Executes a LDA exclusive instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDAEX (uint32_t)__builtin_arm_ldaex - - -/** - \brief Store-Release Exclusive (8 bit) - \details Executes a STLB exclusive instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEXB (uint32_t)__builtin_arm_stlex - - -/** - \brief Store-Release Exclusive (16 bit) - \details Executes a STLH exclusive instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEXH (uint32_t)__builtin_arm_stlex - - -/** - \brief Store-Release Exclusive (32 bit) - \details Executes a STL exclusive instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEX (uint32_t)__builtin_arm_stlex - -#endif /* (__ARM_ARCH_8M__ == 1U) */ - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if (__ARM_FEATURE_DSP == 1U) /* ToDo: ARMCC_V6: This should be ARCH >= ARMv7-M + SIMD */ - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#define __SSAT16(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - -#define __USAT16(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -#define __PKHBT(ARG1,ARG2,ARG3) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - -#define __PKHTB(ARG1,ARG2,ARG3) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - if (ARG3 == 0) \ - __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ - else \ - __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) -{ - int32_t result; - - __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#endif /* (__ARM_FEATURE_DSP == 1U) */ -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#endif /* __CMSIS_ARMCC_V6_H */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/cmsis_gcc.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/cmsis_gcc.h deleted file mode 100644 index bb89fbba..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/cmsis_gcc.h +++ /dev/null @@ -1,1373 +0,0 @@ -/**************************************************************************//** - * @file cmsis_gcc.h - * @brief CMSIS Cortex-M Core Function/Instruction Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#ifndef __CMSIS_GCC_H -#define __CMSIS_GCC_H - -/* ignore some GCC warnings */ -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wsign-conversion" -#pragma GCC diagnostic ignored "-Wconversion" -#pragma GCC diagnostic ignored "-Wunused-parameter" -#endif - - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ - */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void) -{ - __ASM volatile ("cpsie i" : : : "memory"); -} - - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); -} - - -/** - \brief Get Control Register - \details Returns the content of the Control Register. - \return Control Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Control Register - \details Writes the given value to the Control Register. - \param [in] control Control Register value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); -} - - -/** - \brief Get IPSR Register - \details Returns the content of the IPSR Register. - \return IPSR Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get APSR Register - \details Returns the content of the APSR Register. - \return APSR Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, apsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get xPSR Register - \details Returns the content of the xPSR Register. - - \return xPSR Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get Process Stack Pointer - \details Returns the current value of the Process Stack Pointer (PSP). - \return PSP Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, psp\n" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Process Stack Pointer - \details Assigns the given value to the Process Stack Pointer (PSP). - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp"); -} - - -/** - \brief Get Main Stack Pointer - \details Returns the current value of the Main Stack Pointer (MSP). - \return MSP Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, msp\n" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Main Stack Pointer - \details Assigns the given value to the Main Stack Pointer (MSP). - - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); -} - - -/** - \brief Get Priority Mask - \details Returns the current state of the priority mask bit from the Priority Mask Register. - \return Priority Mask value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Priority Mask - \details Assigns the given value to the Priority Mask Register. - \param [in] priMask Priority Mask - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); -} - - -#if (__CORTEX_M >= 0x03U) - -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void) -{ - __ASM volatile ("cpsie f" : : : "memory"); -} - - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void) -{ - __ASM volatile ("cpsid f" : : : "memory"); -} - - -/** - \brief Get Base Priority - \details Returns the current value of the Base Priority register. - \return Base Priority register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Base Priority - \details Assigns the given value to the Base Priority register. - \param [in] basePri Base Priority value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); -} - - -/** - \brief Set Base Priority with condition - \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value) -{ - __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory"); -} - - -/** - \brief Get Fault Mask - \details Returns the current value of the Fault Mask register. - \return Fault Mask register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Fault Mask - \details Assigns the given value to the Fault Mask register. - \param [in] faultMask Fault Mask value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); -} - -#endif /* (__CORTEX_M >= 0x03U) */ - - -#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) - -/** - \brief Get FPSCR - \details Returns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - uint32_t result; - - /* Empty asm statement works as a scheduling barrier */ - __ASM volatile (""); - __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); - __ASM volatile (""); - return(result); -#else - return(0); -#endif -} - - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - /* Empty asm statement works as a scheduling barrier */ - __ASM volatile (""); - __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); - __ASM volatile (""); -#endif -} - -#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */ - - - -/*@} end of CMSIS_Core_RegAccFunctions */ - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/* Define macros for porting to both thumb1 and thumb2. - * For thumb1, use low register (r0-r7), specified by constraint "l" - * Otherwise, use general registers, specified by constraint "r" */ -#if defined (__thumb__) && !defined (__thumb2__) -#define __CMSIS_GCC_OUT_REG(r) "=l" (r) -#define __CMSIS_GCC_USE_REG(r) "l" (r) -#else -#define __CMSIS_GCC_OUT_REG(r) "=r" (r) -#define __CMSIS_GCC_USE_REG(r) "r" (r) -#endif - -/** - \brief No Operation - \details No Operation does nothing. This instruction can be used for code alignment purposes. - */ -__attribute__((always_inline)) __STATIC_INLINE void __NOP(void) -{ - __ASM volatile ("nop"); -} - - -/** - \brief Wait For Interrupt - \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. - */ -__attribute__((always_inline)) __STATIC_INLINE void __WFI(void) -{ - __ASM volatile ("wfi"); -} - - -/** - \brief Wait For Event - \details Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -__attribute__((always_inline)) __STATIC_INLINE void __WFE(void) -{ - __ASM volatile ("wfe"); -} - - -/** - \brief Send Event - \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -__attribute__((always_inline)) __STATIC_INLINE void __SEV(void) -{ - __ASM volatile ("sev"); -} - - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -__attribute__((always_inline)) __STATIC_INLINE void __ISB(void) -{ - __ASM volatile ("isb 0xF":::"memory"); -} - - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -__attribute__((always_inline)) __STATIC_INLINE void __DSB(void) -{ - __ASM volatile ("dsb 0xF":::"memory"); -} - - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -__attribute__((always_inline)) __STATIC_INLINE void __DMB(void) -{ - __ASM volatile ("dmb 0xF":::"memory"); -} - - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in integer value. - \param [in] value Value to reverse - \return Reversed value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value) -{ -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) - return __builtin_bswap32(value); -#else - uint32_t result; - - __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -#endif -} - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in two unsigned short values. - \param [in] value Value to reverse - \return Reversed value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief Reverse byte order in signed short value - \details Reverses the byte order in a signed short value with sign extension to integer. - \param [in] value Value to reverse - \return Reversed value - */ -__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value) -{ -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - return (short)__builtin_bswap16(value); -#else - int32_t result; - - __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -#endif -} - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] value Value to rotate - \param [in] value Number of Bits to rotate - \return Rotated value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) -{ - return (op1 >> op2) | (op1 << (32U - op2)); -} - - -/** - \brief Breakpoint - \details Causes the processor to enter Debug state. - Debug tools can use this to investigate system state when the instruction at a particular address is reached. - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __ASM volatile ("bkpt "#value) - - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) -{ - uint32_t result; - -#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); -#else - int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */ - - result = value; /* r will be reversed bits of v; first get LSB of v */ - for (value >>= 1U; value; value >>= 1U) - { - result <<= 1U; - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ -#endif - return(result); -} - - -/** - \brief Count leading zeros - \details Counts the number of leading zeros of a data value. - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -#define __CLZ __builtin_clz - - -#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - return(result); -} - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) -{ - uint32_t result; - - __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - return(result); -} - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) -{ - uint32_t result; - - __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - return(result); -} - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - return(result); -} - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void) -{ - __ASM volatile ("clrex" ::: "memory"); -} - - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - - -/** - \brief Rotate Right with Extend (32 bit) - \details Moves each bit of a bitstring right by one bit. - The carry input is shifted in at the left end of the bitstring. - \param [in] value Value to rotate - \return Rotated value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief LDRT Unprivileged (8 bit) - \details Executes a Unprivileged LDRT instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (16 bit) - \details Executes a Unprivileged LDRT instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (32 bit) - \details Executes a Unprivileged LDRT instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) ); - return(result); -} - - -/** - \brief STRT Unprivileged (8 bit) - \details Executes a Unprivileged STRT instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr) -{ - __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (16 bit) - \details Executes a Unprivileged STRT instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr) -{ - __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (32 bit) - \details Executes a Unprivileged STRT instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr) -{ - __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) ); -} - -#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */ - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */ - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#define __SSAT16(ARG1,ARG2) \ -({ \ - int32_t __RES, __ARG1 = (ARG1); \ - __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - -#define __USAT16(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -#define __PKHBT(ARG1,ARG2,ARG3) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - -#define __PKHTB(ARG1,ARG2,ARG3) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - if (ARG3 == 0) \ - __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ - else \ - __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) -{ - int32_t result; - - __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#endif /* (__CORTEX_M >= 0x04) */ -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -#endif /* __CMSIS_GCC_H */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm0.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm0.h deleted file mode 100644 index 711dad55..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm0.h +++ /dev/null @@ -1,798 +0,0 @@ -/**************************************************************************//** - * @file core_cm0.h - * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM0_H_GENERIC -#define __CORE_CM0_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M0 - @{ - */ - -/* CMSIS CM0 definitions */ -#define __CM0_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __CM0_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \ - __CM0_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x00U) /*!< Cortex-M Core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM0_H_DEPENDANT -#define __CORE_CM0_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM0_REV - #define __CM0_REV 0x0000U - #warning "__CM0_REV not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M0 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t _reserved0:1; /*!< bit: 0 Reserved */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - uint32_t RESERVED0; - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED1; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the Cortex-M0 header file. - @{ - */ -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M0 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/* Interrupt Priorities are WORD accessible only under ARMv6M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm0plus.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm0plus.h deleted file mode 100644 index b04aa390..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm0plus.h +++ /dev/null @@ -1,914 +0,0 @@ -/**************************************************************************//** - * @file core_cm0plus.h - * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM0PLUS_H_GENERIC -#define __CORE_CM0PLUS_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex-M0+ - @{ - */ - -/* CMSIS CM0+ definitions */ -#define __CM0PLUS_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __CM0PLUS_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ - __CM0PLUS_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x00U) /*!< Cortex-M Core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0PLUS_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM0PLUS_H_DEPENDANT -#define __CORE_CM0PLUS_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM0PLUS_REV - #define __CM0PLUS_REV 0x0000U - #warning "__CM0PLUS_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 0U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex-M0+ */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ -#if (__VTOR_PRESENT == 1U) - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ -#else - uint32_t RESERVED0; -#endif - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED1; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -#if (__VTOR_PRESENT == 1U) -/* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#endif - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the Cortex-M0+ header file. - @{ - */ -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M0+ Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/* Interrupt Priorities are WORD accessible only under ARMv6M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0PLUS_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm3.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm3.h deleted file mode 100644 index b4ac4c7b..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm3.h +++ /dev/null @@ -1,1763 +0,0 @@ -/**************************************************************************//** - * @file core_cm3.h - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM3_H_GENERIC -#define __CORE_CM3_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M3 - @{ - */ - -/* CMSIS CM3 definitions */ -#define __CM3_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \ - __CM3_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03U) /*!< Cortex-M Core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM3_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM3_H_DEPENDANT -#define __CORE_CM3_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM3_REV - #define __CM3_REV 0x0200U - #warning "__CM3_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M3 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[5U]; - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#if (__CM3_REV < 0x0201U) /* core r2p1 */ -#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ -#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ - -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#else -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#endif - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200U)) - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -#else - uint32_t RESERVED1[1U]; -#endif -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ - -#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ -#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ - -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[29U]; - __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ - __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ - __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ -#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ -#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in NVIC and returns the active bit. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - */ -__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM3_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm4.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm4.h deleted file mode 100644 index dc840ebf..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm4.h +++ /dev/null @@ -1,1937 +0,0 @@ -/**************************************************************************//** - * @file core_cm4.h - * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM4_H_GENERIC -#define __CORE_CM4_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M4 - @{ - */ - -/* CMSIS CM4 definitions */ -#define __CM4_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __CM4_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \ - __CM4_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x04U) /*!< Cortex-M Core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. -*/ -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #if (__FPU_PRESENT == 1) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ -#include "core_cmSimd.h" /* Compiler specific SIMD Intrinsics */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM4_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM4_H_DEPENDANT -#define __CORE_CM4_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM4_REV - #define __CM4_REV 0x0000U - #warning "__CM4_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M4 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ - uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[5U]; - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */ -#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */ - -#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */ -#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */ - -#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ -#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ - -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[29U]; - __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ - __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ - __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ -#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ -#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if (__FPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -/* Media and FP Feature Register 0 Definitions */ -#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ -#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ - -#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ -#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ - -#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ -#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ - -#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ -#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ -#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ - -#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ -#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ - -#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ -#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ - -#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ -#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ - -/* Media and FP Feature Register 1 Definitions */ -#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ -#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ - -#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ -#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ - -#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ -#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ - -#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ -#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ - -/*@} end of group CMSIS_FPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M4 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -#if (__FPU_PRESENT == 1U) - #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ - #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in NVIC and returns the active bit. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - */ -__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM4_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm7.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm7.h deleted file mode 100644 index 3b7530ad..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cm7.h +++ /dev/null @@ -1,2512 +0,0 @@ -/**************************************************************************//** - * @file core_cm7.h - * @brief CMSIS Cortex-M7 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM7_H_GENERIC -#define __CORE_CM7_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M7 - @{ - */ - -/* CMSIS CM7 definitions */ -#define __CM7_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __CM7_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __CM7_CMSIS_VERSION ((__CM7_CMSIS_VERSION_MAIN << 16U) | \ - __CM7_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x07U) /*!< Cortex-M Core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. -*/ -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #if (__FPU_PRESENT == 1) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ -#include "core_cmSimd.h" /* Compiler specific SIMD Intrinsics */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM7_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM7_H_DEPENDANT -#define __CORE_CM7_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM7_REV - #define __CM7_REV 0x0000U - #warning "__CM7_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __ICACHE_PRESENT - #define __ICACHE_PRESENT 0U - #warning "__ICACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DCACHE_PRESENT - #define __DCACHE_PRESENT 0U - #warning "__DCACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DTCM_PRESENT - #define __DTCM_PRESENT 0U - #warning "__DTCM_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M7 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ - uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t ID_MFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ID_ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[1U]; - __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ - __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ - __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ - __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - uint32_t RESERVED3[93U]; - __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ - uint32_t RESERVED4[15U]; - __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 1 */ - uint32_t RESERVED5[1U]; - __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ - uint32_t RESERVED6[1U]; - __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ - __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ - __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ - __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ - __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ - __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ - __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ - __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ - uint32_t RESERVED7[6U]; - __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */ - __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */ - __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */ - __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ - __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */ - uint32_t RESERVED8[1U]; - __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: Branch prediction enable bit Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: Instruction cache enable bit Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: Cache enable bit Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */ - -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/* SCB Cache Level ID Register Definitions */ -#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ -#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ - -#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ -#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ - -/* SCB Cache Type Register Definitions */ -#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ -#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ - -#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ -#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ - -#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ -#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ - -#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ -#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ - -#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ -#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ - -/* SCB Cache Size ID Register Definitions */ -#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ -#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ - -#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ -#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ - -#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ -#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ - -#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ -#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ - -#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ -#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ - -#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ -#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ - -#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ -#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ - -/* SCB Cache Size Selection Register Definitions */ -#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ -#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ - -#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ -#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ - -/* SCB Software Triggered Interrupt Register Definitions */ -#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ -#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ - -/* SCB D-Cache Invalidate by Set-way Register Definitions */ -#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ -#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ - -#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ -#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ - -/* SCB D-Cache Clean by Set-way Register Definitions */ -#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ -#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ - -#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ -#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ - -/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ -#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ -#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ - -#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ -#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ - -/* Instruction Tightly-Coupled Memory Control Register Definitions */ -#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */ -#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */ - -#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */ -#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */ - -#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */ -#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */ - -#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */ -#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */ - -/* Data Tightly-Coupled Memory Control Register Definitions */ -#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */ -#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */ - -#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */ -#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */ - -#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */ -#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */ - -#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */ -#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */ - -/* AHBP Control Register Definitions */ -#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */ -#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */ - -#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */ -#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */ - -/* L1 Cache Control Register Definitions */ -#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */ -#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */ - -#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */ -#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */ - -#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */ -#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */ - -/* AHBS Control Register Definitions */ -#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */ -#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */ - -#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */ -#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */ - -#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/ -#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */ - -/* Auxiliary Bus Fault Status Register Definitions */ -#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/ -#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */ - -#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/ -#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */ - -#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/ -#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */ - -#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/ -#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */ - -#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/ -#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */ - -#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/ -#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U /*!< ACTLR: DISITMATBFLUSH Position */ -#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */ - -#define SCnSCB_ACTLR_DISRAMODE_Pos 11U /*!< ACTLR: DISRAMODE Position */ -#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos) /*!< ACTLR: DISRAMODE Mask */ - -#define SCnSCB_ACTLR_FPEXCODIS_Pos 10U /*!< ACTLR: FPEXCODIS Position */ -#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */ - -#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[29U]; - __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ - __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ - __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED3[981U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( W) Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ -#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ -#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if (__FPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -/* Media and FP Feature Register 0 Definitions */ -#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ -#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ - -#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ -#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ - -#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ -#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ - -#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ -#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ -#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ - -#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ -#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ - -#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ -#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ - -#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ -#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ - -/* Media and FP Feature Register 1 Definitions */ -#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ -#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ - -#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ -#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ - -#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ -#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ - -#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ -#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ - -/* Media and FP Feature Register 2 Definitions */ - -/*@} end of group CMSIS_FPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M4 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -#if (__FPU_PRESENT == 1U) - #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ - #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in NVIC and returns the active bit. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - */ -__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return(((uint32_t)SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = SCB->MVFR0; - if ((mvfr0 & 0x00000FF0UL) == 0x220UL) - { - return 2UL; /* Double + Single precision FPU */ - } - else if ((mvfr0 & 0x00000FF0UL) == 0x020UL) - { - return 1UL; /* Single precision FPU */ - } - else - { - return 0UL; /* No FPU */ - } -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ########################## Cache functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_CacheFunctions Cache Functions - \brief Functions that configure Instruction and Data cache. - @{ - */ - -/* Cache Size ID Register Macros */ -#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos) -#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos ) - - -/** - \brief Enable I-Cache - \details Turns on I-Cache - */ -__STATIC_INLINE void SCB_EnableICache (void) -{ - #if (__ICACHE_PRESENT == 1U) - __DSB(); - __ISB(); - SCB->ICIALLU = 0UL; /* invalidate I-Cache */ - SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */ - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Disable I-Cache - \details Turns off I-Cache - */ -__STATIC_INLINE void SCB_DisableICache (void) -{ - #if (__ICACHE_PRESENT == 1U) - __DSB(); - __ISB(); - SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */ - SCB->ICIALLU = 0UL; /* invalidate I-Cache */ - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Invalidate I-Cache - \details Invalidates I-Cache - */ -__STATIC_INLINE void SCB_InvalidateICache (void) -{ - #if (__ICACHE_PRESENT == 1U) - __DSB(); - __ISB(); - SCB->ICIALLU = 0UL; - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Enable D-Cache - \details Turns on D-Cache - */ -__STATIC_INLINE void SCB_EnableDCache (void) -{ - #if (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | - ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways--); - } while(sets--); - __DSB(); - - SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */ - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Disable D-Cache - \details Turns off D-Cache - */ -__STATIC_INLINE void SCB_DisableDCache (void) -{ - #if (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */ - - /* clean & invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | - ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways--); - } while(sets--); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Invalidate D-Cache - \details Invalidates D-Cache - */ -__STATIC_INLINE void SCB_InvalidateDCache (void) -{ - #if (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | - ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways--); - } while(sets--); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Clean D-Cache - \details Cleans D-Cache - */ -__STATIC_INLINE void SCB_CleanDCache (void) -{ - #if (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* clean D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) | - ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways--); - } while(sets--); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Clean & Invalidate D-Cache - \details Cleans and Invalidates D-Cache - */ -__STATIC_INLINE void SCB_CleanInvalidateDCache (void) -{ - #if (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* clean & invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | - ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways--); - } while(sets--); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief D-Cache Invalidate by address - \details Invalidates D-Cache for the given address - \param[in] addr address (aligned to 32-byte boundary) - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) -{ - #if (__DCACHE_PRESENT == 1U) - int32_t op_size = dsize; - uint32_t op_addr = (uint32_t)addr; - int32_t linesize = 32U; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ - - __DSB(); - - while (op_size > 0) { - SCB->DCIMVAC = op_addr; - op_addr += linesize; - op_size -= linesize; - } - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief D-Cache Clean by address - \details Cleans D-Cache for the given address - \param[in] addr address (aligned to 32-byte boundary) - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize) -{ - #if (__DCACHE_PRESENT == 1) - int32_t op_size = dsize; - uint32_t op_addr = (uint32_t) addr; - int32_t linesize = 32U; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ - - __DSB(); - - while (op_size > 0) { - SCB->DCCMVAC = op_addr; - op_addr += linesize; - op_size -= linesize; - } - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief D-Cache Clean and Invalidate by address - \details Cleans and invalidates D_Cache for the given address - \param[in] addr address (aligned to 32-byte boundary) - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) -{ - #if (__DCACHE_PRESENT == 1U) - int32_t op_size = dsize; - uint32_t op_addr = (uint32_t) addr; - int32_t linesize = 32U; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ - - __DSB(); - - while (op_size > 0) { - SCB->DCCIMVAC = op_addr; - op_addr += linesize; - op_size -= linesize; - } - - __DSB(); - __ISB(); - #endif -} - - -/*@} end of CMSIS_Core_CacheFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM7_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cmFunc.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cmFunc.h deleted file mode 100644 index 652a48af..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cmFunc.h +++ /dev/null @@ -1,87 +0,0 @@ -/**************************************************************************//** - * @file core_cmFunc.h - * @brief CMSIS Cortex-M Core Function Access Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CMFUNC_H -#define __CORE_CMFUNC_H - - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ -*/ - -/*------------------ RealView Compiler -----------------*/ -#if defined ( __CC_ARM ) - #include "cmsis_armcc.h" - -/*------------------ ARM Compiler V6 -------------------*/ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #include "cmsis_armcc_V6.h" - -/*------------------ GNU Compiler ----------------------*/ -#elif defined ( __GNUC__ ) - #include "cmsis_gcc.h" - -/*------------------ ICC Compiler ----------------------*/ -#elif defined ( __ICCARM__ ) - #include - -/*------------------ TI CCS Compiler -------------------*/ -#elif defined ( __TMS470__ ) - #include - -/*------------------ TASKING Compiler ------------------*/ -#elif defined ( __TASKING__ ) - /* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all intrinsics, - * Including the CMSIS ones. - */ - -/*------------------ COSMIC Compiler -------------------*/ -#elif defined ( __CSMC__ ) - #include - -#endif - -/*@} end of CMSIS_Core_RegAccFunctions */ - -#endif /* __CORE_CMFUNC_H */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cmInstr.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cmInstr.h deleted file mode 100644 index f474b0e6..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cmInstr.h +++ /dev/null @@ -1,87 +0,0 @@ -/**************************************************************************//** - * @file core_cmInstr.h - * @brief CMSIS Cortex-M Core Instruction Access Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CMINSTR_H -#define __CORE_CMINSTR_H - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/*------------------ RealView Compiler -----------------*/ -#if defined ( __CC_ARM ) - #include "cmsis_armcc.h" - -/*------------------ ARM Compiler V6 -------------------*/ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #include "cmsis_armcc_V6.h" - -/*------------------ GNU Compiler ----------------------*/ -#elif defined ( __GNUC__ ) - #include "cmsis_gcc.h" - -/*------------------ ICC Compiler ----------------------*/ -#elif defined ( __ICCARM__ ) - #include - -/*------------------ TI CCS Compiler -------------------*/ -#elif defined ( __TMS470__ ) - #include - -/*------------------ TASKING Compiler ------------------*/ -#elif defined ( __TASKING__ ) - /* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all intrinsics, - * Including the CMSIS ones. - */ - -/*------------------ COSMIC Compiler -------------------*/ -#elif defined ( __CSMC__ ) - #include - -#endif - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - -#endif /* __CORE_CMINSTR_H */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cmSimd.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cmSimd.h deleted file mode 100644 index 66bf5c2a..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_cmSimd.h +++ /dev/null @@ -1,96 +0,0 @@ -/**************************************************************************//** - * @file core_cmSimd.h - * @brief CMSIS Cortex-M SIMD Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CMSIMD_H -#define __CORE_CMSIMD_H - -#ifdef __cplusplus - extern "C" { -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -/*------------------ RealView Compiler -----------------*/ -#if defined ( __CC_ARM ) - #include "cmsis_armcc.h" - -/*------------------ ARM Compiler V6 -------------------*/ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #include "cmsis_armcc_V6.h" - -/*------------------ GNU Compiler ----------------------*/ -#elif defined ( __GNUC__ ) - #include "cmsis_gcc.h" - -/*------------------ ICC Compiler ----------------------*/ -#elif defined ( __ICCARM__ ) - #include - -/*------------------ TI CCS Compiler -------------------*/ -#elif defined ( __TMS470__ ) - #include - -/*------------------ TASKING Compiler ------------------*/ -#elif defined ( __TASKING__ ) - /* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all intrinsics, - * Including the CMSIS ones. - */ - -/*------------------ COSMIC Compiler -------------------*/ -#elif defined ( __CSMC__ ) - #include - -#endif - -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CMSIMD_H */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_sc000.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_sc000.h deleted file mode 100644 index 514dbd81..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_sc000.h +++ /dev/null @@ -1,926 +0,0 @@ -/**************************************************************************//** - * @file core_sc000.h - * @brief CMSIS SC000 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_SC000_H_GENERIC -#define __CORE_SC000_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup SC000 - @{ - */ - -/* CMSIS SC000 definitions */ -#define __SC000_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __SC000_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16U) | \ - __SC000_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_SC (000U) /*!< Cortex secure core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC000_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_SC000_H_DEPENDANT -#define __CORE_SC000_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __SC000_REV - #define __SC000_REV 0x0000U - #warning "__SC000_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group SC000 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t _reserved0:1; /*!< bit: 0 Reserved */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - uint32_t RESERVED1[154U]; - __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the SC000 header file. - @{ - */ -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of SC000 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/* Interrupt Priorities are WORD accessible only under ARMv6M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC000_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_sc300.h b/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_sc300.h deleted file mode 100644 index 8bd18aa3..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/core_sc300.h +++ /dev/null @@ -1,1745 +0,0 @@ -/**************************************************************************//** - * @file core_sc300.h - * @brief CMSIS SC300 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_SC300_H_GENERIC -#define __CORE_SC300_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup SC3000 - @{ - */ - -/* CMSIS SC300 definitions */ -#define __SC300_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __SC300_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16U) | \ - __SC300_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_SC (300U) /*!< Cortex secure core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC300_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_SC300_H_DEPENDANT -#define __CORE_SC300_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __SC300_REV - #define __SC300_REV 0x0000U - #warning "__SC300_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group SC300 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[5U]; - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - uint32_t RESERVED1[129U]; - __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ -#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ - -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - uint32_t RESERVED1[1U]; -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[29U]; - __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ - __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ - __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ -#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ -#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in NVIC and returns the active bit. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - */ -__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC300_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h deleted file mode 100644 index 0ae9d0b2..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ /dev/null @@ -1,3309 +0,0 @@ -/** - ****************************************************************************** - * @file stm32_hal_legacy.h - * @author MCD Application Team - * @brief This file contains aliases definition for the STM32Cube HAL constants - * macros and functions maintained for legacy purpose. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32_HAL_LEGACY -#define __STM32_HAL_LEGACY - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose - * @{ - */ -#define AES_FLAG_RDERR CRYP_FLAG_RDERR -#define AES_FLAG_WRERR CRYP_FLAG_WRERR -#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF -#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR -#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR - -/** - * @} - */ - -/** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose - * @{ - */ -#define ADC_RESOLUTION12b ADC_RESOLUTION_12B -#define ADC_RESOLUTION10b ADC_RESOLUTION_10B -#define ADC_RESOLUTION8b ADC_RESOLUTION_8B -#define ADC_RESOLUTION6b ADC_RESOLUTION_6B -#define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN -#define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED -#define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV -#define EOC_SEQ_CONV ADC_EOC_SEQ_CONV -#define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV -#define REGULAR_GROUP ADC_REGULAR_GROUP -#define INJECTED_GROUP ADC_INJECTED_GROUP -#define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP -#define AWD_EVENT ADC_AWD_EVENT -#define AWD1_EVENT ADC_AWD1_EVENT -#define AWD2_EVENT ADC_AWD2_EVENT -#define AWD3_EVENT ADC_AWD3_EVENT -#define OVR_EVENT ADC_OVR_EVENT -#define JQOVF_EVENT ADC_JQOVF_EVENT -#define ALL_CHANNELS ADC_ALL_CHANNELS -#define REGULAR_CHANNELS ADC_REGULAR_CHANNELS -#define INJECTED_CHANNELS ADC_INJECTED_CHANNELS -#define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR -#define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT -#define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1 -#define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2 -#define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4 -#define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6 -#define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8 -#define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO -#define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2 -#define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO -#define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4 -#define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO -#define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11 -#define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1 -#define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE -#define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING -#define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING -#define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING -#define ADC_SAMPLETIME_2CYCLE_5 ADC_SAMPLETIME_2CYCLES_5 - -#define HAL_ADC_STATE_BUSY_REG HAL_ADC_STATE_REG_BUSY -#define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY -#define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC -#define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC -#define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL -#define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL -#define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1 -/** - * @} - */ - -/** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose - * @{ - */ - -#define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG - -/** - * @} - */ - -/** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose - * @{ - */ -#define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE -#define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE -#define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1 -#define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2 -#define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3 -#define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4 -#define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5 -#define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6 -#define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7 -#if defined(STM32L0) -#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */ -#endif -#define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR -#if defined(STM32F373xC) || defined(STM32F378xx) -#define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1 -#define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR -#endif /* STM32F373xC || STM32F378xx */ - -#if defined(STM32L0) || defined(STM32L4) -#define COMP_WINDOWMODE_ENABLE COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON - -#define COMP_NONINVERTINGINPUT_IO1 COMP_INPUT_PLUS_IO1 -#define COMP_NONINVERTINGINPUT_IO2 COMP_INPUT_PLUS_IO2 -#define COMP_NONINVERTINGINPUT_IO3 COMP_INPUT_PLUS_IO3 -#define COMP_NONINVERTINGINPUT_IO4 COMP_INPUT_PLUS_IO4 -#define COMP_NONINVERTINGINPUT_IO5 COMP_INPUT_PLUS_IO5 -#define COMP_NONINVERTINGINPUT_IO6 COMP_INPUT_PLUS_IO6 - -#define COMP_INVERTINGINPUT_1_4VREFINT COMP_INPUT_MINUS_1_4VREFINT -#define COMP_INVERTINGINPUT_1_2VREFINT COMP_INPUT_MINUS_1_2VREFINT -#define COMP_INVERTINGINPUT_3_4VREFINT COMP_INPUT_MINUS_3_4VREFINT -#define COMP_INVERTINGINPUT_VREFINT COMP_INPUT_MINUS_VREFINT -#define COMP_INVERTINGINPUT_DAC1_CH1 COMP_INPUT_MINUS_DAC1_CH1 -#define COMP_INVERTINGINPUT_DAC1_CH2 COMP_INPUT_MINUS_DAC1_CH2 -#define COMP_INVERTINGINPUT_DAC1 COMP_INPUT_MINUS_DAC1_CH1 -#define COMP_INVERTINGINPUT_DAC2 COMP_INPUT_MINUS_DAC1_CH2 -#define COMP_INVERTINGINPUT_IO1 COMP_INPUT_MINUS_IO1 -#if defined(STM32L0) -/* Issue fixed on STM32L0 COMP driver: only 2 dedicated IO (IO1 and IO2), */ -/* IO2 was wrongly assigned to IO shared with DAC and IO3 was corresponding */ -/* to the second dedicated IO (only for COMP2). */ -#define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_DAC1_CH2 -#define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO2 -#else -#define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_IO2 -#define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO3 -#endif -#define COMP_INVERTINGINPUT_IO4 COMP_INPUT_MINUS_IO4 -#define COMP_INVERTINGINPUT_IO5 COMP_INPUT_MINUS_IO5 - -#define COMP_OUTPUTLEVEL_LOW COMP_OUTPUT_LEVEL_LOW -#define COMP_OUTPUTLEVEL_HIGH COMP_OUTPUT_LEVEL_HIGH - -/* Note: Literal "COMP_FLAG_LOCK" kept for legacy purpose. */ -/* To check COMP lock state, use macro "__HAL_COMP_IS_LOCKED()". */ -#if defined(COMP_CSR_LOCK) -#define COMP_FLAG_LOCK COMP_CSR_LOCK -#elif defined(COMP_CSR_COMP1LOCK) -#define COMP_FLAG_LOCK COMP_CSR_COMP1LOCK -#elif defined(COMP_CSR_COMPxLOCK) -#define COMP_FLAG_LOCK COMP_CSR_COMPxLOCK -#endif - -#if defined(STM32L4) -#define COMP_BLANKINGSRCE_TIM1OC5 COMP_BLANKINGSRC_TIM1_OC5_COMP1 -#define COMP_BLANKINGSRCE_TIM2OC3 COMP_BLANKINGSRC_TIM2_OC3_COMP1 -#define COMP_BLANKINGSRCE_TIM3OC3 COMP_BLANKINGSRC_TIM3_OC3_COMP1 -#define COMP_BLANKINGSRCE_TIM3OC4 COMP_BLANKINGSRC_TIM3_OC4_COMP2 -#define COMP_BLANKINGSRCE_TIM8OC5 COMP_BLANKINGSRC_TIM8_OC5_COMP2 -#define COMP_BLANKINGSRCE_TIM15OC1 COMP_BLANKINGSRC_TIM15_OC1_COMP2 -#define COMP_BLANKINGSRCE_NONE COMP_BLANKINGSRC_NONE -#endif - -#if defined(STM32L0) -#define COMP_MODE_HIGHSPEED COMP_POWERMODE_MEDIUMSPEED -#define COMP_MODE_LOWSPEED COMP_POWERMODE_ULTRALOWPOWER -#else -#define COMP_MODE_HIGHSPEED COMP_POWERMODE_HIGHSPEED -#define COMP_MODE_MEDIUMSPEED COMP_POWERMODE_MEDIUMSPEED -#define COMP_MODE_LOWPOWER COMP_POWERMODE_LOWPOWER -#define COMP_MODE_ULTRALOWPOWER COMP_POWERMODE_ULTRALOWPOWER -#endif - -#endif -/** - * @} - */ - -/** @defgroup HAL_CORTEX_Aliased_Defines HAL CORTEX Aliased Defines maintained for legacy purpose - * @{ - */ -#define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig -/** - * @} - */ - -/** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose - * @{ - */ - -#define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE -#define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE - -/** - * @} - */ - -/** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose - * @{ - */ - -#define DAC1_CHANNEL_1 DAC_CHANNEL_1 -#define DAC1_CHANNEL_2 DAC_CHANNEL_2 -#define DAC2_CHANNEL_1 DAC_CHANNEL_1 -#define DAC_WAVE_NONE 0x00000000U -#define DAC_WAVE_NOISE DAC_CR_WAVE1_0 -#define DAC_WAVE_TRIANGLE DAC_CR_WAVE1_1 -#define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE -#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE -#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE - -/** - * @} - */ - -/** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose - * @{ - */ -#define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2 -#define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4 -#define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5 -#define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4 -#define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2 -#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 -#define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6 -#define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7 -#define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67 -#define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67 -#define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76 -#define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6 -#define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7 -#define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6 - -#define IS_HAL_REMAPDMA IS_DMA_REMAP -#define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE -#define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE - - - -/** - * @} - */ - -/** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose - * @{ - */ - -#define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE -#define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD -#define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD -#define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD -#define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS -#define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES -#define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES -#define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE -#define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE -#define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE -#define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE -#define OBEX_PCROP OPTIONBYTE_PCROP -#define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG -#define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE -#define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE -#define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE -#define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD -#define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD -#define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE -#define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD -#define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD -#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE -#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD -#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD -#define PAGESIZE FLASH_PAGE_SIZE -#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE -#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD -#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD -#define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1 -#define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2 -#define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3 -#define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4 -#define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST -#define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST -#define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA -#define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB -#define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA -#define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB -#define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE -#define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN -#define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE -#define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN -#define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE -#define FLASH_ERROR_RD HAL_FLASH_ERROR_RD -#define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG -#define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS -#define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP -#define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV -#define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR -#define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG -#define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION -#define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA -#define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE -#define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE -#define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS -#define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS -#define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST -#define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR -#define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO -#define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION -#define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS -#define OB_WDG_SW OB_IWDG_SW -#define OB_WDG_HW OB_IWDG_HW -#define OB_SDADC12_VDD_MONITOR_SET OB_SDACD_VDD_MONITOR_SET -#define OB_SDADC12_VDD_MONITOR_RESET OB_SDACD_VDD_MONITOR_RESET -#define OB_RAM_PARITY_CHECK_SET OB_SRAM_PARITY_SET -#define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET -#define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR -#define OB_RDP_LEVEL0 OB_RDP_LEVEL_0 -#define OB_RDP_LEVEL1 OB_RDP_LEVEL_1 -#define OB_RDP_LEVEL2 OB_RDP_LEVEL_2 - -/** - * @} - */ - -/** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose - * @{ - */ - -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9 -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10 -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6 -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7 -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8 -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9 -#define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1 -#define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2 -#define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3 -/** - * @} - */ - - -/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose - * @{ - */ -#if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4) -#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE -#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE -#define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8 -#define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16 -#else -#define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE -#define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE -#define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8 -#define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16 -#endif -/** - * @} - */ - -/** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose - * @{ - */ - -#define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef -#define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef -/** - * @} - */ - -/** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose - * @{ - */ -#define GET_GPIO_SOURCE GPIO_GET_INDEX -#define GET_GPIO_INDEX GPIO_GET_INDEX - -#if defined(STM32F4) -#define GPIO_AF12_SDMMC GPIO_AF12_SDIO -#define GPIO_AF12_SDMMC1 GPIO_AF12_SDIO -#endif - -#if defined(STM32F7) -#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 -#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 -#endif - -#if defined(STM32L4) -#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 -#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 -#endif - -#define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1 -#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 -#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1 - -#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) -#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW -#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM -#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH -#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH -#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 */ - -#if defined(STM32L1) - #define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW - #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM - #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH - #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH -#endif /* STM32L1 */ - -#if defined(STM32F0) || defined(STM32F3) || defined(STM32F1) - #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW - #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM - #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_HIGH -#endif /* STM32F0 || STM32F3 || STM32F1 */ - -#define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1 -/** - * @} - */ - -/** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose - * @{ - */ - -#if defined(STM32H7) - #define __HAL_RCC_JPEG_CLK_ENABLE __HAL_RCC_JPGDECEN_CLK_ENABLE - #define __HAL_RCC_JPEG_CLK_DISABLE __HAL_RCC_JPGDECEN_CLK_DISABLE - #define __HAL_RCC_JPEG_FORCE_RESET __HAL_RCC_JPGDECRST_FORCE_RESET - #define __HAL_RCC_JPEG_RELEASE_RESET __HAL_RCC_JPGDECRST_RELEASE_RESET - #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE - #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE - - #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1 - #define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2 - - #define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX - #define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX - - #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT - #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT - #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT - #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT - #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT - #define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT - #define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0 - #define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO HAL_DMAMUX1_REQ_GEN_TIM12_TRGO - - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT - #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP HAL_DMAMUX2_REQ_GEN_I2C4_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP HAL_DMAMUX2_REQ_GEN_SPI6_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT HAL_DMAMUX2_REQ_GEN_COMP1_OUT - #define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT HAL_DMAMUX2_REQ_GEN_COMP2_OUT - #define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP HAL_DMAMUX2_REQ_GEN_RTC_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_EXTI0 HAL_DMAMUX2_REQ_GEN_EXTI0 - #define HAL_DMAMUX2_REQUEST_GEN_EXTI2 HAL_DMAMUX2_REQ_GEN_EXTI2 - #define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT - #define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT HAL_DMAMUX2_REQ_GEN_SPI6_IT - #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT - #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT - #define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT HAL_DMAMUX2_REQ_GEN_ADC3_IT - #define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT - #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT - #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT - - #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT - #define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING - #define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING - #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING - - -#endif /* STM32H7 */ - - -/** - * @} - */ - - -/** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose - * @{ - */ -#define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6 -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6 -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6 -#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6 -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7 -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7 -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7 -#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7 - -#define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER -#define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER -#define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD -#define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD -#define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER -#define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER -#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE -#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE -/** - * @} - */ - -/** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose - * @{ - */ -#define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE -#define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE -#define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE -#define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE -#define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE -#define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE -#define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE -#define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE -#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7) -#define HAL_I2C_STATE_MEM_BUSY_TX HAL_I2C_STATE_BUSY_TX -#define HAL_I2C_STATE_MEM_BUSY_RX HAL_I2C_STATE_BUSY_RX -#define HAL_I2C_STATE_MASTER_BUSY_TX HAL_I2C_STATE_BUSY_TX -#define HAL_I2C_STATE_MASTER_BUSY_RX HAL_I2C_STATE_BUSY_RX -#define HAL_I2C_STATE_SLAVE_BUSY_TX HAL_I2C_STATE_BUSY_TX -#define HAL_I2C_STATE_SLAVE_BUSY_RX HAL_I2C_STATE_BUSY_RX -#endif -/** - * @} - */ - -/** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose - * @{ - */ -#define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE -#define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE - -/** - * @} - */ - -/** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose - * @{ - */ -#define KR_KEY_RELOAD IWDG_KEY_RELOAD -#define KR_KEY_ENABLE IWDG_KEY_ENABLE -#define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE -#define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE -/** - * @} - */ - -/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose - * @{ - */ - -#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION -#define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS -#define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS -#define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS - -#define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING -#define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING -#define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING - -#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION -#define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS -#define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS -#define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS - -/* The following 3 definition have also been present in a temporary version of lptim.h */ -/* They need to be renamed also to the right name, just in case */ -#define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS -#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS -#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS - -/** - * @} - */ - -/** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose - * @{ - */ -#define HAL_NAND_Read_Page HAL_NAND_Read_Page_8b -#define HAL_NAND_Write_Page HAL_NAND_Write_Page_8b -#define HAL_NAND_Read_SpareArea HAL_NAND_Read_SpareArea_8b -#define HAL_NAND_Write_SpareArea HAL_NAND_Write_SpareArea_8b - -#define NAND_AddressTypedef NAND_AddressTypeDef - -#define __ARRAY_ADDRESS ARRAY_ADDRESS -#define __ADDR_1st_CYCLE ADDR_1ST_CYCLE -#define __ADDR_2nd_CYCLE ADDR_2ND_CYCLE -#define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE -#define __ADDR_4th_CYCLE ADDR_4TH_CYCLE -/** - * @} - */ - -/** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose - * @{ - */ -#define NOR_StatusTypedef HAL_NOR_StatusTypeDef -#define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS -#define NOR_ONGOING HAL_NOR_STATUS_ONGOING -#define NOR_ERROR HAL_NOR_STATUS_ERROR -#define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT - -#define __NOR_WRITE NOR_WRITE -#define __NOR_ADDR_SHIFT NOR_ADDR_SHIFT -/** - * @} - */ - -/** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose - * @{ - */ - -#define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0 -#define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1 -#define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2 -#define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3 - -#define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0 -#define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1 -#define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2 -#define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3 - -#define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 -#define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 - -#define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 -#define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 - -#define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0 -#define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1 - -#define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1 - -#define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO -#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 -#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1 - -/** - * @} - */ - -/** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose - * @{ - */ -#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS -#if defined(STM32F7) - #define I2S_CLOCK_SYSCLK I2S_CLOCK_PLL -#endif -/** - * @} - */ - -/** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose - * @{ - */ - -/* Compact Flash-ATA registers description */ -#define CF_DATA ATA_DATA -#define CF_SECTOR_COUNT ATA_SECTOR_COUNT -#define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER -#define CF_CYLINDER_LOW ATA_CYLINDER_LOW -#define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH -#define CF_CARD_HEAD ATA_CARD_HEAD -#define CF_STATUS_CMD ATA_STATUS_CMD -#define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE -#define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA - -/* Compact Flash-ATA commands */ -#define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD -#define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD -#define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD -#define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD - -#define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef -#define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS -#define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING -#define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR -#define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT -/** - * @} - */ - -/** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose - * @{ - */ - -#define FORMAT_BIN RTC_FORMAT_BIN -#define FORMAT_BCD RTC_FORMAT_BCD - -#define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE -#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE -#define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE -#define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE - -#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE -#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE -#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE -#define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT -#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT - -#define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT -#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1 -#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1 -#define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2 - -#define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE -#define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1 -#define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1 - -#define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT -#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 -#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 - -/** - * @} - */ - - -/** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose - * @{ - */ -#define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE -#define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE - -#define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE -#define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE -#define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE -#define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE - -#define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE -#define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE - -#define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE -#define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE -/** - * @} - */ - - -/** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose - * @{ - */ -#define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE -#define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE -#define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE -#define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE -#define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE -#define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE -#define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE -#define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE -#define SMBUS_PEC_DISABLED SMBUS_PEC_DISABLE -#define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE -#define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN -/** - * @} - */ - -/** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose - * @{ - */ -#define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE -#define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE - -#define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE -#define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE - -#define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE -#define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE - -/** - * @} - */ - -/** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose - * @{ - */ -#define CCER_CCxE_MASK TIM_CCER_CCxE_MASK -#define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK - -#define TIM_DMABase_CR1 TIM_DMABASE_CR1 -#define TIM_DMABase_CR2 TIM_DMABASE_CR2 -#define TIM_DMABase_SMCR TIM_DMABASE_SMCR -#define TIM_DMABase_DIER TIM_DMABASE_DIER -#define TIM_DMABase_SR TIM_DMABASE_SR -#define TIM_DMABase_EGR TIM_DMABASE_EGR -#define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1 -#define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2 -#define TIM_DMABase_CCER TIM_DMABASE_CCER -#define TIM_DMABase_CNT TIM_DMABASE_CNT -#define TIM_DMABase_PSC TIM_DMABASE_PSC -#define TIM_DMABase_ARR TIM_DMABASE_ARR -#define TIM_DMABase_RCR TIM_DMABASE_RCR -#define TIM_DMABase_CCR1 TIM_DMABASE_CCR1 -#define TIM_DMABase_CCR2 TIM_DMABASE_CCR2 -#define TIM_DMABase_CCR3 TIM_DMABASE_CCR3 -#define TIM_DMABase_CCR4 TIM_DMABASE_CCR4 -#define TIM_DMABase_BDTR TIM_DMABASE_BDTR -#define TIM_DMABase_DCR TIM_DMABASE_DCR -#define TIM_DMABase_DMAR TIM_DMABASE_DMAR -#define TIM_DMABase_OR1 TIM_DMABASE_OR1 -#define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3 -#define TIM_DMABase_CCR5 TIM_DMABASE_CCR5 -#define TIM_DMABase_CCR6 TIM_DMABASE_CCR6 -#define TIM_DMABase_OR2 TIM_DMABASE_OR2 -#define TIM_DMABase_OR3 TIM_DMABASE_OR3 -#define TIM_DMABase_OR TIM_DMABASE_OR - -#define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE -#define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1 -#define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2 -#define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3 -#define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4 -#define TIM_EventSource_COM TIM_EVENTSOURCE_COM -#define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER -#define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK -#define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2 - -#define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER -#define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS -#define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS -#define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS -#define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS -#define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS -#define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS -#define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS -#define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS -#define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS -#define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS -#define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS -#define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS -#define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS -#define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS -#define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS -#define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS -#define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS - -/** - * @} - */ - -/** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose - * @{ - */ -#define TSC_SYNC_POL_FALL TSC_SYNC_POLARITY_FALLING -#define TSC_SYNC_POL_RISE_HIGH TSC_SYNC_POLARITY_RISING -/** - * @} - */ - -/** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose - * @{ - */ -#define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE -#define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE -#define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE -#define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE - -#define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE -#define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE - -#define __DIV_SAMPLING16 UART_DIV_SAMPLING16 -#define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16 -#define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16 -#define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16 - -#define __DIV_SAMPLING8 UART_DIV_SAMPLING8 -#define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8 -#define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8 -#define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8 - -#define __DIV_LPUART UART_DIV_LPUART - -#define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE -#define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK - -/** - * @} - */ - - -/** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose - * @{ - */ - -#define USART_CLOCK_DISABLED USART_CLOCK_DISABLE -#define USART_CLOCK_ENABLED USART_CLOCK_ENABLE - -#define USARTNACK_ENABLED USART_NACK_ENABLE -#define USARTNACK_DISABLED USART_NACK_DISABLE -/** - * @} - */ - -/** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose - * @{ - */ -#define CFR_BASE WWDG_CFR_BASE - -/** - * @} - */ - -/** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose - * @{ - */ -#define CAN_FilterFIFO0 CAN_FILTER_FIFO0 -#define CAN_FilterFIFO1 CAN_FILTER_FIFO1 -#define CAN_IT_RQCP0 CAN_IT_TME -#define CAN_IT_RQCP1 CAN_IT_TME -#define CAN_IT_RQCP2 CAN_IT_TME -#define INAK_TIMEOUT CAN_TIMEOUT_VALUE -#define SLAK_TIMEOUT CAN_TIMEOUT_VALUE -#define CAN_TXSTATUS_FAILED ((uint8_t)0x00U) -#define CAN_TXSTATUS_OK ((uint8_t)0x01U) -#define CAN_TXSTATUS_PENDING ((uint8_t)0x02U) - -/** - * @} - */ - -/** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose - * @{ - */ - -#define VLAN_TAG ETH_VLAN_TAG -#define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD -#define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD -#define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD -#define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK -#define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK -#define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK -#define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK - -#define ETH_MMCCR 0x00000100U -#define ETH_MMCRIR 0x00000104U -#define ETH_MMCTIR 0x00000108U -#define ETH_MMCRIMR 0x0000010CU -#define ETH_MMCTIMR 0x00000110U -#define ETH_MMCTGFSCCR 0x0000014CU -#define ETH_MMCTGFMSCCR 0x00000150U -#define ETH_MMCTGFCR 0x00000168U -#define ETH_MMCRFCECR 0x00000194U -#define ETH_MMCRFAECR 0x00000198U -#define ETH_MMCRGUFCR 0x000001C4U - -#define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */ -#define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */ -#define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */ -#define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */ -#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */ -#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */ -#define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */ -#define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */ -#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */ -#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */ -#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */ -#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */ -#define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */ -#define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */ -#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */ -#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */ -#define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */ -#if defined(STM32F1) -#else -#define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */ -#define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */ -#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */ -#endif -#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */ -#define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */ -#define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */ -#define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */ -#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE 0x00000004U /* MAC small FIFO write controller active */ -#define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */ -#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */ - -/** - * @} - */ - -/** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose - * @{ - */ -#define HAL_DCMI_ERROR_OVF HAL_DCMI_ERROR_OVR -#define DCMI_IT_OVF DCMI_IT_OVR -#define DCMI_FLAG_OVFRI DCMI_FLAG_OVRRI -#define DCMI_FLAG_OVFMI DCMI_FLAG_OVRMI - -#define HAL_DCMI_ConfigCROP HAL_DCMI_ConfigCrop -#define HAL_DCMI_EnableCROP HAL_DCMI_EnableCrop -#define HAL_DCMI_DisableCROP HAL_DCMI_DisableCrop - -/** - * @} - */ - -#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\ - defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) -/** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose - * @{ - */ -#define DMA2D_ARGB8888 DMA2D_OUTPUT_ARGB8888 -#define DMA2D_RGB888 DMA2D_OUTPUT_RGB888 -#define DMA2D_RGB565 DMA2D_OUTPUT_RGB565 -#define DMA2D_ARGB1555 DMA2D_OUTPUT_ARGB1555 -#define DMA2D_ARGB4444 DMA2D_OUTPUT_ARGB4444 - -#define CM_ARGB8888 DMA2D_INPUT_ARGB8888 -#define CM_RGB888 DMA2D_INPUT_RGB888 -#define CM_RGB565 DMA2D_INPUT_RGB565 -#define CM_ARGB1555 DMA2D_INPUT_ARGB1555 -#define CM_ARGB4444 DMA2D_INPUT_ARGB4444 -#define CM_L8 DMA2D_INPUT_L8 -#define CM_AL44 DMA2D_INPUT_AL44 -#define CM_AL88 DMA2D_INPUT_AL88 -#define CM_L4 DMA2D_INPUT_L4 -#define CM_A8 DMA2D_INPUT_A8 -#define CM_A4 DMA2D_INPUT_A4 -/** - * @} - */ -#endif /* STM32L4 || STM32F7*/ - -/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose - * @{ - */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback -/** - * @} - */ - -/** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef -#define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef -#define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish -#define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish -#define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish -#define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish - -/*HASH Algorithm Selection*/ - -#define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1 -#define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224 -#define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256 -#define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5 - -#define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH -#define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC - -#define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY -#define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY -/** - * @} - */ - -/** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode -#define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode -#define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode -#define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode -#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode -#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode -#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph)) -#define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect -#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT()) -#if defined(STM32L0) -#else -#define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT()) -#endif -#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT()) -#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor()) -/** - * @} - */ - -/** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose - * @{ - */ -#define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram -#define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown -#define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown -#define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock -#define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock -#define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase -#define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program - - /** - * @} - */ - -/** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter -#define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter -#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter -#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter - -#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) - /** - * @} - */ - -/** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose - * @{ - */ -#define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD -#define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg -#define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown -#define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor -#define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg -#define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown -#define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor -#define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler -#define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD -#define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler -#define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback -#define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive -#define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive -#define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC -#define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC -#define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM - -#define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL -#define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING -#define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING -#define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING -#define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING -#define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING -#define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING - -#define CR_OFFSET_BB PWR_CR_OFFSET_BB -#define CSR_OFFSET_BB PWR_CSR_OFFSET_BB -#define PMODE_BIT_NUMBER VOS_BIT_NUMBER -#define CR_PMODE_BB CR_VOS_BB - -#define DBP_BitNumber DBP_BIT_NUMBER -#define PVDE_BitNumber PVDE_BIT_NUMBER -#define PMODE_BitNumber PMODE_BIT_NUMBER -#define EWUP_BitNumber EWUP_BIT_NUMBER -#define FPDS_BitNumber FPDS_BIT_NUMBER -#define ODEN_BitNumber ODEN_BIT_NUMBER -#define ODSWEN_BitNumber ODSWEN_BIT_NUMBER -#define MRLVDS_BitNumber MRLVDS_BIT_NUMBER -#define LPLVDS_BitNumber LPLVDS_BIT_NUMBER -#define BRE_BitNumber BRE_BIT_NUMBER - -#define PWR_MODE_EVT PWR_PVD_MODE_NORMAL - - /** - * @} - */ - -/** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT -#define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback -#define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback -/** - * @} - */ - -/** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo -/** - * @} - */ - -/** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt -#define HAL_TIM_DMAError TIM_DMAError -#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt -#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt -/** - * @} - */ - -/** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback -/** - * @} - */ - -/** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback -#define HAL_LTDC_Relaod HAL_LTDC_Reload -#define HAL_LTDC_StructInitFromVideoConfig HAL_LTDCEx_StructInitFromVideoConfig -#define HAL_LTDC_StructInitFromAdaptedCommandConfig HAL_LTDCEx_StructInitFromAdaptedCommandConfig -/** - * @} - */ - - -/** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose - * @{ - */ - -/** - * @} - */ - -/* Exported macros ------------------------------------------------------------*/ - -/** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose - * @{ - */ -#define AES_IT_CC CRYP_IT_CC -#define AES_IT_ERR CRYP_IT_ERR -#define AES_FLAG_CCF CRYP_FLAG_CCF -/** - * @} - */ - -/** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE -#define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH -#define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH -#define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM -#define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC -#define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM -#define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC -#define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI -#define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK -#define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG -#define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG -#define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE -#define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE -#define __HAL_SYSCFG_SRAM2_WRP_ENABLE __HAL_SYSCFG_SRAM2_WRP_0_31_ENABLE - -#define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY -#define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48 -#define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS -#define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER -#define CMP_PD_BitNumber CMP_PD_BIT_NUMBER - -/** - * @} - */ - - -/** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose - * @{ - */ -#define __ADC_ENABLE __HAL_ADC_ENABLE -#define __ADC_DISABLE __HAL_ADC_DISABLE -#define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS -#define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS -#define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE -#define __ADC_IS_ENABLED ADC_IS_ENABLE -#define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR -#define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED -#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED -#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR -#define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED -#define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING -#define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE - -#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION -#define __HAL_ADC_JSQR_RK ADC_JSQR_RK -#define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT -#define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR -#define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION -#define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE -#define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS -#define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS -#define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM -#define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT -#define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS -#define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN -#define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ -#define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET -#define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET -#define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL -#define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL -#define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET -#define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET -#define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD - -#define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION -#define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION -#define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION -#define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER -#define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI -#define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE -#define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE -#define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER -#define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER -#define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE - -#define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT -#define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT -#define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL -#define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM -#define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET -#define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE -#define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE -#define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER - -#define __HAL_ADC_SQR1 ADC_SQR1 -#define __HAL_ADC_SMPR1 ADC_SMPR1 -#define __HAL_ADC_SMPR2 ADC_SMPR2 -#define __HAL_ADC_SQR3_RK ADC_SQR3_RK -#define __HAL_ADC_SQR2_RK ADC_SQR2_RK -#define __HAL_ADC_SQR1_RK ADC_SQR1_RK -#define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS -#define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS -#define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV -#define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection -#define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq -#define __HAL_ADC_JSQR ADC_JSQR - -#define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL -#define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS -#define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF -#define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT -#define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS -#define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN -#define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR -#define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ - -/** - * @} - */ - -/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT -#define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT -#define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT -#define IS_DAC_GENERATE_WAVE IS_DAC_WAVE - -/** - * @} - */ - -/** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1 -#define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1 -#define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2 -#define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2 -#define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3 -#define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3 -#define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4 -#define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4 -#define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5 -#define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5 -#define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6 -#define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6 -#define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7 -#define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7 -#define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8 -#define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8 - -#define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9 -#define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9 -#define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10 -#define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10 -#define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11 -#define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11 -#define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12 -#define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12 -#define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13 -#define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13 -#define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14 -#define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14 -#define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2 -#define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2 - - -#define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15 -#define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15 -#define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16 -#define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16 -#define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17 -#define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17 -#define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC -#define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC -#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG -#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG -#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG -#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG -#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT -#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT -#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT -#define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT -#define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT -#define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT -#define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1 -#define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1 -#define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1 -#define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1 -#define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2 -#define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2 - -/** - * @} - */ - -/** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose - * @{ - */ -#if defined(STM32F3) -#define COMP_START __HAL_COMP_ENABLE -#define COMP_STOP __HAL_COMP_DISABLE -#define COMP_LOCK __HAL_COMP_LOCK - -#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \ - __HAL_COMP_COMP6_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ - __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F302xE) || defined(STM32F302xC) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \ - __HAL_COMP_COMP6_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ - __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() : \ - __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() : \ - __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : \ - __HAL_COMP_COMP7_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : \ - __HAL_COMP_COMP7_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : \ - __HAL_COMP_COMP7_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \ - __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F373xC) ||defined(STM32F378xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ - __HAL_COMP_COMP2_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ - __HAL_COMP_COMP2_EXTI_CLEAR_FLAG()) -# endif -#else -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ - __HAL_COMP_COMP2_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ - __HAL_COMP_COMP2_EXTI_CLEAR_FLAG()) -#endif - -#define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE - -#if defined(STM32L0) || defined(STM32L4) -/* Note: On these STM32 families, the only argument of this macro */ -/* is COMP_FLAG_LOCK. */ -/* This macro is replaced by __HAL_COMP_IS_LOCKED with only HAL handle */ -/* argument. */ -#define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (__HAL_COMP_IS_LOCKED(__HANDLE__)) -#endif -/** - * @} - */ - -#if defined(STM32L0) || defined(STM32L4) -/** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */ -#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */ -/** - * @} - */ -#endif - -/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose - * @{ - */ - -#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \ - ((WAVE) == DAC_WAVE_NOISE)|| \ - ((WAVE) == DAC_WAVE_TRIANGLE)) - -/** - * @} - */ - -/** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose - * @{ - */ - -#define IS_WRPAREA IS_OB_WRPAREA -#define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM -#define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM -#define IS_TYPEERASE IS_FLASH_TYPEERASE -#define IS_NBSECTORS IS_FLASH_NBSECTORS -#define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE - -/** - * @} - */ - -/** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __HAL_I2C_RESET_CR2 I2C_RESET_CR2 -#define __HAL_I2C_GENERATE_START I2C_GENERATE_START -#if defined(STM32F1) -#define __HAL_I2C_FREQ_RANGE I2C_FREQRANGE -#else -#define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE -#endif /* STM32F1 */ -#define __HAL_I2C_RISE_TIME I2C_RISE_TIME -#define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD -#define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST -#define __HAL_I2C_SPEED I2C_SPEED -#define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE -#define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ -#define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS -#define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE -#define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ -#define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB -#define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB -#define __HAL_I2C_FREQRANGE I2C_FREQRANGE -/** - * @} - */ - -/** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose - * @{ - */ - -#define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE -#define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT - -/** - * @} - */ - -/** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __IRDA_DISABLE __HAL_IRDA_DISABLE -#define __IRDA_ENABLE __HAL_IRDA_ENABLE - -#define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE -#define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION -#define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE -#define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION - -#define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE - - -/** - * @} - */ - - -/** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS -#define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS -/** - * @} - */ - - -/** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT -#define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT -#define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE - -/** - * @} - */ - - -/** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose - * @{ - */ -#define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD -#define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX -#define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX -#define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX -#define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX -#define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L -#define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H -#define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM -#define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES -#define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX -#define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT -#define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION -#define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET - -/** - * @} - */ - - -/** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT -#define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT -#define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE -#define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE -#define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE -#define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE -#define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE -#define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE -#define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE -#define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE -#define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE -#define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE -#define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine -#define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine -#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig -#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig -#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0) -#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT -#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT -#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE -#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE -#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE -#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE -#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE -#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE -#define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0) -#define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0) -#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention -#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention -#define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2 -#define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2 -#define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE -#define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE -#define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB -#define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB - -#if defined (STM32F4) -#define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT() -#define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT() -#define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG() -#define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG() -#define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT() -#else -#define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG -#define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT -#define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT -#define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT -#define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG -#endif /* STM32F4 */ -/** - * @} - */ - - -/** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose - * @{ - */ - -#define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI -#define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI - -#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback -#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT()) - -#define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE -#define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE -#define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE -#define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE -#define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET -#define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET -#define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE -#define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE -#define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET -#define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET -#define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE -#define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE -#define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE -#define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE -#define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET -#define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET -#define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE -#define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE -#define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET -#define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET -#define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE -#define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE -#define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE -#define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE -#define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET -#define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET -#define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE -#define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE -#define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE -#define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE -#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET -#define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET -#define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE -#define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE -#define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET -#define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET -#define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET -#define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET -#define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET -#define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET -#define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET -#define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET -#define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET -#define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET -#define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET -#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET -#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET -#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET -#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE -#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE -#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET -#define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET -#define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE -#define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE -#define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE -#define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE -#define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET -#define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET -#define __CAN_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE -#define __CAN_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE -#define __CAN_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET -#define __CAN_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET -#define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE -#define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE -#define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET -#define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET -#define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE -#define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE -#define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE -#define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE -#define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET -#define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET -#define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE -#define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE -#define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET -#define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET -#define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE -#define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE -#define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE -#define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE -#define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET -#define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET -#define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE -#define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE -#define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET -#define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET -#define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE -#define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE -#define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE -#define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE -#define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET -#define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET -#define __DBGMCU_CLK_ENABLE __HAL_RCC_DBGMCU_CLK_ENABLE -#define __DBGMCU_CLK_DISABLE __HAL_RCC_DBGMCU_CLK_DISABLE -#define __DBGMCU_FORCE_RESET __HAL_RCC_DBGMCU_FORCE_RESET -#define __DBGMCU_RELEASE_RESET __HAL_RCC_DBGMCU_RELEASE_RESET -#define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE -#define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE -#define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE -#define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE -#define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET -#define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET -#define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE -#define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE -#define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE -#define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE -#define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET -#define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET -#define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE -#define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE -#define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE -#define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE -#define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET -#define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET -#define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE -#define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE -#define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET -#define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET -#define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE -#define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE -#define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE -#define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE -#define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE -#define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE -#define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE -#define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE -#define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE -#define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE -#define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET -#define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET -#define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE -#define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE -#define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET -#define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET -#define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE -#define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE -#define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE -#define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE -#define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE -#define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE -#define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET -#define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET -#define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE -#define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE -#define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE -#define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE -#define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE -#define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE -#define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET -#define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET -#define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE -#define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE -#define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE -#define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE -#define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET -#define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET -#define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE -#define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE -#define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE -#define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE -#define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET -#define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET -#define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE -#define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE -#define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE -#define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE -#define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET -#define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET -#define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE -#define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE -#define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE -#define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE -#define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET -#define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET -#define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE -#define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE -#define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE -#define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE -#define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET -#define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET -#define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE -#define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE -#define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE -#define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE -#define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET -#define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET -#define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE -#define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE -#define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE -#define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE -#define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET -#define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET -#define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE -#define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE -#define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE -#define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE -#define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET -#define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET -#define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE -#define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE -#define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE -#define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE -#define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET -#define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET -#define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE -#define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE -#define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE -#define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE -#define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET -#define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET -#define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE -#define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE -#define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE -#define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE -#define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET -#define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET -#define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE -#define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE -#define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE -#define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE -#define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET -#define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET -#define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE -#define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE -#define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE -#define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE -#define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET -#define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET -#define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE -#define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE -#define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE -#define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE -#define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET -#define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET -#define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE -#define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE -#define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE -#define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE -#define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET -#define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET -#define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE -#define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE -#define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE -#define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE -#define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET -#define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET -#define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE -#define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE -#define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE -#define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE -#define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET -#define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET -#define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE -#define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE -#define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE -#define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE -#define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET -#define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET - -#if defined(STM32WB) -#define __HAL_RCC_QSPI_CLK_DISABLE __HAL_RCC_QUADSPI_CLK_DISABLE -#define __HAL_RCC_QSPI_CLK_ENABLE __HAL_RCC_QUADSPI_CLK_ENABLE -#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE -#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE -#define __HAL_RCC_QSPI_FORCE_RESET __HAL_RCC_QUADSPI_FORCE_RESET -#define __HAL_RCC_QSPI_RELEASE_RESET __HAL_RCC_QUADSPI_RELEASE_RESET -#define __HAL_RCC_QSPI_IS_CLK_ENABLED __HAL_RCC_QUADSPI_IS_CLK_ENABLED -#define __HAL_RCC_QSPI_IS_CLK_DISABLED __HAL_RCC_QUADSPI_IS_CLK_DISABLED -#define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED -#define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED -#define QSPI_IRQHandler QUADSPI_IRQHandler -#endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */ - -#define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE -#define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE -#define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE -#define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE -#define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET -#define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET -#define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE -#define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE -#define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE -#define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE -#define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET -#define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET -#define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE -#define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE -#define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE -#define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE -#define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET -#define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET -#define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE -#define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE -#define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE -#define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE -#define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE -#define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE -#define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET -#define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET -#define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE -#define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE -#define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE -#define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE -#define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET -#define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET -#define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE -#define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE -#define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE -#define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE -#define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET -#define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET -#define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE -#define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE -#define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE -#define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE -#define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET -#define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET -#define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE -#define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE -#define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE -#define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE -#define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE -#define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE -#define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE -#define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE -#define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE -#define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE -#define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET -#define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET -#define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE -#define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE -#define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE -#define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE -#define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET -#define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET -#define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE -#define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE -#define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE -#define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE -#define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET -#define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET -#define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE -#define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE -#define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET -#define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET -#define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE -#define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE -#define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET -#define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET -#define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE -#define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE -#define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET -#define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET -#define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE -#define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE -#define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET -#define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET -#define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE -#define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE -#define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET -#define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET -#define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE -#define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE -#define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE -#define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE -#define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET -#define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET -#define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE -#define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE -#define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE -#define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE -#define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET -#define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET -#define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE -#define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE -#define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE -#define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE -#define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET -#define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET -#define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE -#define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE -#define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE -#define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE -#define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET -#define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET -#define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE -#define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE -#define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE -#define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE -#define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET -#define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET -#define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE -#define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE -#define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE -#define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE -#define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET -#define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET -#define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE -#define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE -#define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE -#define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE -#define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET -#define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET -#define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE -#define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE -#define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE -#define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE -#define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET -#define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET -#define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE -#define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE -#define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE -#define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE -#define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET -#define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET -#define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE -#define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE -#define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE -#define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE -#define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET -#define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET -#define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE -#define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE -#define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET -#define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET -#define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE -#define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE -#define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE -#define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE -#define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET -#define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET -#define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE -#define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE -#define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE -#define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE -#define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET -#define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET -#define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE -#define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE -#define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE -#define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE -#define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET -#define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET -#define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE -#define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE -#define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE -#define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE -#define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET -#define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET -#define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE -#define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE -#define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE -#define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE -#define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET -#define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET -#define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE -#define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE -#define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE -#define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE -#define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET -#define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET -#define __USART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE -#define __USART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE -#define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE -#define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE -#define __USART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET -#define __USART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET -#define __USART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE -#define __USART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE -#define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE -#define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE -#define __USART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET -#define __USART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET -#define __USART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE -#define __USART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE -#define __USART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET -#define __USART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET -#define __USART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE -#define __USART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE -#define __USART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET -#define __USART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET -#define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE -#define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE -#define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET -#define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE -#define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE -#define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE -#define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE -#define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET -#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE -#define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE -#define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE -#define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE -#define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET -#define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET -#define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE -#define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE -#define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET -#define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET -#define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE -#define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE -#define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE -#define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE -#define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET -#define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET -#define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE -#define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE -#define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE -#define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE -#define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE -#define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE -#define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET -#define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET -#define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE -#define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE - -#define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET -#define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET -#define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE -#define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE -#define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE -#define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE -#define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE -#define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE -#define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE -#define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE -#define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE -#define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE -#define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE -#define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE -#define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE -#define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE -#define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE -#define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE -#define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE -#define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET -#define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET -#define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE -#define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE -#define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE -#define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE -#define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE -#define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET -#define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET -#define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE -#define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE -#define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE -#define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE -#define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET -#define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET -#define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE -#define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE -#define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE -#define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE -#define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET -#define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET -#define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE -#define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE -#define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE -#define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE -#define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE -#define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE -#define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE -#define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE -#define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE -#define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE -#define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE -#define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE -#define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE -#define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE -#define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE -#define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE -#define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE -#define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE -#define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE -#define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE -#define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE -#define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET -#define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET -#define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE -#define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE -#define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE -#define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE -#define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET -#define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET -#define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE -#define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE -#define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE -#define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE -#define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET -#define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET -#define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE -#define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE -#define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE -#define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE -#define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET -#define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET -#define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE -#define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE -#define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE -#define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE -#define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET -#define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE -#define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE -#define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE -#define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE -#define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE -#define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE -#define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET -#define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET -#define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE -#define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE -#define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE -#define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE -#define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET -#define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET -#define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE -#define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE -#define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE -#define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE -#define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET -#define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET -#define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE -#define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE -#define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE -#define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE -#define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET -#define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET -#define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE -#define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE -#define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE -#define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE -#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED -#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED -#define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET -#define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET -#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE -#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE -#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED -#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED -#define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE -#define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE -#define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE -#define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE -#define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE -#define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE -#define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE -#define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE -#define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE -#define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET -#define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET -#define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE -#define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE -#define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET -#define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET -#define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE -#define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE -#define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE -#define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE -#define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET -#define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET -#define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE -#define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE - -/* alias define maintained for legacy */ -#define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET -#define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET - -#define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE -#define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE -#define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE -#define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE -#define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE -#define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE -#define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE -#define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE -#define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE -#define __TIM19_CLK_DISABLE __HAL_RCC_TIM19_CLK_DISABLE -#define __TIM20_CLK_ENABLE __HAL_RCC_TIM20_CLK_ENABLE -#define __TIM20_CLK_DISABLE __HAL_RCC_TIM20_CLK_DISABLE -#define __HRTIM1_CLK_ENABLE __HAL_RCC_HRTIM1_CLK_ENABLE -#define __HRTIM1_CLK_DISABLE __HAL_RCC_HRTIM1_CLK_DISABLE -#define __SDADC1_CLK_ENABLE __HAL_RCC_SDADC1_CLK_ENABLE -#define __SDADC2_CLK_ENABLE __HAL_RCC_SDADC2_CLK_ENABLE -#define __SDADC3_CLK_ENABLE __HAL_RCC_SDADC3_CLK_ENABLE -#define __SDADC1_CLK_DISABLE __HAL_RCC_SDADC1_CLK_DISABLE -#define __SDADC2_CLK_DISABLE __HAL_RCC_SDADC2_CLK_DISABLE -#define __SDADC3_CLK_DISABLE __HAL_RCC_SDADC3_CLK_DISABLE - -#define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET -#define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET -#define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET -#define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET -#define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET -#define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET -#define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET -#define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET -#define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET -#define __TIM19_RELEASE_RESET __HAL_RCC_TIM19_RELEASE_RESET -#define __TIM20_FORCE_RESET __HAL_RCC_TIM20_FORCE_RESET -#define __TIM20_RELEASE_RESET __HAL_RCC_TIM20_RELEASE_RESET -#define __HRTIM1_FORCE_RESET __HAL_RCC_HRTIM1_FORCE_RESET -#define __HRTIM1_RELEASE_RESET __HAL_RCC_HRTIM1_RELEASE_RESET -#define __SDADC1_FORCE_RESET __HAL_RCC_SDADC1_FORCE_RESET -#define __SDADC2_FORCE_RESET __HAL_RCC_SDADC2_FORCE_RESET -#define __SDADC3_FORCE_RESET __HAL_RCC_SDADC3_FORCE_RESET -#define __SDADC1_RELEASE_RESET __HAL_RCC_SDADC1_RELEASE_RESET -#define __SDADC2_RELEASE_RESET __HAL_RCC_SDADC2_RELEASE_RESET -#define __SDADC3_RELEASE_RESET __HAL_RCC_SDADC3_RELEASE_RESET - -#define __ADC1_IS_CLK_ENABLED __HAL_RCC_ADC1_IS_CLK_ENABLED -#define __ADC1_IS_CLK_DISABLED __HAL_RCC_ADC1_IS_CLK_DISABLED -#define __ADC12_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED -#define __ADC12_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED -#define __ADC34_IS_CLK_ENABLED __HAL_RCC_ADC34_IS_CLK_ENABLED -#define __ADC34_IS_CLK_DISABLED __HAL_RCC_ADC34_IS_CLK_DISABLED -#define __CEC_IS_CLK_ENABLED __HAL_RCC_CEC_IS_CLK_ENABLED -#define __CEC_IS_CLK_DISABLED __HAL_RCC_CEC_IS_CLK_DISABLED -#define __CRC_IS_CLK_ENABLED __HAL_RCC_CRC_IS_CLK_ENABLED -#define __CRC_IS_CLK_DISABLED __HAL_RCC_CRC_IS_CLK_DISABLED -#define __DAC1_IS_CLK_ENABLED __HAL_RCC_DAC1_IS_CLK_ENABLED -#define __DAC1_IS_CLK_DISABLED __HAL_RCC_DAC1_IS_CLK_DISABLED -#define __DAC2_IS_CLK_ENABLED __HAL_RCC_DAC2_IS_CLK_ENABLED -#define __DAC2_IS_CLK_DISABLED __HAL_RCC_DAC2_IS_CLK_DISABLED -#define __DMA1_IS_CLK_ENABLED __HAL_RCC_DMA1_IS_CLK_ENABLED -#define __DMA1_IS_CLK_DISABLED __HAL_RCC_DMA1_IS_CLK_DISABLED -#define __DMA2_IS_CLK_ENABLED __HAL_RCC_DMA2_IS_CLK_ENABLED -#define __DMA2_IS_CLK_DISABLED __HAL_RCC_DMA2_IS_CLK_DISABLED -#define __FLITF_IS_CLK_ENABLED __HAL_RCC_FLITF_IS_CLK_ENABLED -#define __FLITF_IS_CLK_DISABLED __HAL_RCC_FLITF_IS_CLK_DISABLED -#define __FMC_IS_CLK_ENABLED __HAL_RCC_FMC_IS_CLK_ENABLED -#define __FMC_IS_CLK_DISABLED __HAL_RCC_FMC_IS_CLK_DISABLED -#define __GPIOA_IS_CLK_ENABLED __HAL_RCC_GPIOA_IS_CLK_ENABLED -#define __GPIOA_IS_CLK_DISABLED __HAL_RCC_GPIOA_IS_CLK_DISABLED -#define __GPIOB_IS_CLK_ENABLED __HAL_RCC_GPIOB_IS_CLK_ENABLED -#define __GPIOB_IS_CLK_DISABLED __HAL_RCC_GPIOB_IS_CLK_DISABLED -#define __GPIOC_IS_CLK_ENABLED __HAL_RCC_GPIOC_IS_CLK_ENABLED -#define __GPIOC_IS_CLK_DISABLED __HAL_RCC_GPIOC_IS_CLK_DISABLED -#define __GPIOD_IS_CLK_ENABLED __HAL_RCC_GPIOD_IS_CLK_ENABLED -#define __GPIOD_IS_CLK_DISABLED __HAL_RCC_GPIOD_IS_CLK_DISABLED -#define __GPIOE_IS_CLK_ENABLED __HAL_RCC_GPIOE_IS_CLK_ENABLED -#define __GPIOE_IS_CLK_DISABLED __HAL_RCC_GPIOE_IS_CLK_DISABLED -#define __GPIOF_IS_CLK_ENABLED __HAL_RCC_GPIOF_IS_CLK_ENABLED -#define __GPIOF_IS_CLK_DISABLED __HAL_RCC_GPIOF_IS_CLK_DISABLED -#define __GPIOG_IS_CLK_ENABLED __HAL_RCC_GPIOG_IS_CLK_ENABLED -#define __GPIOG_IS_CLK_DISABLED __HAL_RCC_GPIOG_IS_CLK_DISABLED -#define __GPIOH_IS_CLK_ENABLED __HAL_RCC_GPIOH_IS_CLK_ENABLED -#define __GPIOH_IS_CLK_DISABLED __HAL_RCC_GPIOH_IS_CLK_DISABLED -#define __HRTIM1_IS_CLK_ENABLED __HAL_RCC_HRTIM1_IS_CLK_ENABLED -#define __HRTIM1_IS_CLK_DISABLED __HAL_RCC_HRTIM1_IS_CLK_DISABLED -#define __I2C1_IS_CLK_ENABLED __HAL_RCC_I2C1_IS_CLK_ENABLED -#define __I2C1_IS_CLK_DISABLED __HAL_RCC_I2C1_IS_CLK_DISABLED -#define __I2C2_IS_CLK_ENABLED __HAL_RCC_I2C2_IS_CLK_ENABLED -#define __I2C2_IS_CLK_DISABLED __HAL_RCC_I2C2_IS_CLK_DISABLED -#define __I2C3_IS_CLK_ENABLED __HAL_RCC_I2C3_IS_CLK_ENABLED -#define __I2C3_IS_CLK_DISABLED __HAL_RCC_I2C3_IS_CLK_DISABLED -#define __PWR_IS_CLK_ENABLED __HAL_RCC_PWR_IS_CLK_ENABLED -#define __PWR_IS_CLK_DISABLED __HAL_RCC_PWR_IS_CLK_DISABLED -#define __SYSCFG_IS_CLK_ENABLED __HAL_RCC_SYSCFG_IS_CLK_ENABLED -#define __SYSCFG_IS_CLK_DISABLED __HAL_RCC_SYSCFG_IS_CLK_DISABLED -#define __SPI1_IS_CLK_ENABLED __HAL_RCC_SPI1_IS_CLK_ENABLED -#define __SPI1_IS_CLK_DISABLED __HAL_RCC_SPI1_IS_CLK_DISABLED -#define __SPI2_IS_CLK_ENABLED __HAL_RCC_SPI2_IS_CLK_ENABLED -#define __SPI2_IS_CLK_DISABLED __HAL_RCC_SPI2_IS_CLK_DISABLED -#define __SPI3_IS_CLK_ENABLED __HAL_RCC_SPI3_IS_CLK_ENABLED -#define __SPI3_IS_CLK_DISABLED __HAL_RCC_SPI3_IS_CLK_DISABLED -#define __SPI4_IS_CLK_ENABLED __HAL_RCC_SPI4_IS_CLK_ENABLED -#define __SPI4_IS_CLK_DISABLED __HAL_RCC_SPI4_IS_CLK_DISABLED -#define __SDADC1_IS_CLK_ENABLED __HAL_RCC_SDADC1_IS_CLK_ENABLED -#define __SDADC1_IS_CLK_DISABLED __HAL_RCC_SDADC1_IS_CLK_DISABLED -#define __SDADC2_IS_CLK_ENABLED __HAL_RCC_SDADC2_IS_CLK_ENABLED -#define __SDADC2_IS_CLK_DISABLED __HAL_RCC_SDADC2_IS_CLK_DISABLED -#define __SDADC3_IS_CLK_ENABLED __HAL_RCC_SDADC3_IS_CLK_ENABLED -#define __SDADC3_IS_CLK_DISABLED __HAL_RCC_SDADC3_IS_CLK_DISABLED -#define __SRAM_IS_CLK_ENABLED __HAL_RCC_SRAM_IS_CLK_ENABLED -#define __SRAM_IS_CLK_DISABLED __HAL_RCC_SRAM_IS_CLK_DISABLED -#define __TIM1_IS_CLK_ENABLED __HAL_RCC_TIM1_IS_CLK_ENABLED -#define __TIM1_IS_CLK_DISABLED __HAL_RCC_TIM1_IS_CLK_DISABLED -#define __TIM2_IS_CLK_ENABLED __HAL_RCC_TIM2_IS_CLK_ENABLED -#define __TIM2_IS_CLK_DISABLED __HAL_RCC_TIM2_IS_CLK_DISABLED -#define __TIM3_IS_CLK_ENABLED __HAL_RCC_TIM3_IS_CLK_ENABLED -#define __TIM3_IS_CLK_DISABLED __HAL_RCC_TIM3_IS_CLK_DISABLED -#define __TIM4_IS_CLK_ENABLED __HAL_RCC_TIM4_IS_CLK_ENABLED -#define __TIM4_IS_CLK_DISABLED __HAL_RCC_TIM4_IS_CLK_DISABLED -#define __TIM5_IS_CLK_ENABLED __HAL_RCC_TIM5_IS_CLK_ENABLED -#define __TIM5_IS_CLK_DISABLED __HAL_RCC_TIM5_IS_CLK_DISABLED -#define __TIM6_IS_CLK_ENABLED __HAL_RCC_TIM6_IS_CLK_ENABLED -#define __TIM6_IS_CLK_DISABLED __HAL_RCC_TIM6_IS_CLK_DISABLED -#define __TIM7_IS_CLK_ENABLED __HAL_RCC_TIM7_IS_CLK_ENABLED -#define __TIM7_IS_CLK_DISABLED __HAL_RCC_TIM7_IS_CLK_DISABLED -#define __TIM8_IS_CLK_ENABLED __HAL_RCC_TIM8_IS_CLK_ENABLED -#define __TIM8_IS_CLK_DISABLED __HAL_RCC_TIM8_IS_CLK_DISABLED -#define __TIM12_IS_CLK_ENABLED __HAL_RCC_TIM12_IS_CLK_ENABLED -#define __TIM12_IS_CLK_DISABLED __HAL_RCC_TIM12_IS_CLK_DISABLED -#define __TIM13_IS_CLK_ENABLED __HAL_RCC_TIM13_IS_CLK_ENABLED -#define __TIM13_IS_CLK_DISABLED __HAL_RCC_TIM13_IS_CLK_DISABLED -#define __TIM14_IS_CLK_ENABLED __HAL_RCC_TIM14_IS_CLK_ENABLED -#define __TIM14_IS_CLK_DISABLED __HAL_RCC_TIM14_IS_CLK_DISABLED -#define __TIM15_IS_CLK_ENABLED __HAL_RCC_TIM15_IS_CLK_ENABLED -#define __TIM15_IS_CLK_DISABLED __HAL_RCC_TIM15_IS_CLK_DISABLED -#define __TIM16_IS_CLK_ENABLED __HAL_RCC_TIM16_IS_CLK_ENABLED -#define __TIM16_IS_CLK_DISABLED __HAL_RCC_TIM16_IS_CLK_DISABLED -#define __TIM17_IS_CLK_ENABLED __HAL_RCC_TIM17_IS_CLK_ENABLED -#define __TIM17_IS_CLK_DISABLED __HAL_RCC_TIM17_IS_CLK_DISABLED -#define __TIM18_IS_CLK_ENABLED __HAL_RCC_TIM18_IS_CLK_ENABLED -#define __TIM18_IS_CLK_DISABLED __HAL_RCC_TIM18_IS_CLK_DISABLED -#define __TIM19_IS_CLK_ENABLED __HAL_RCC_TIM19_IS_CLK_ENABLED -#define __TIM19_IS_CLK_DISABLED __HAL_RCC_TIM19_IS_CLK_DISABLED -#define __TIM20_IS_CLK_ENABLED __HAL_RCC_TIM20_IS_CLK_ENABLED -#define __TIM20_IS_CLK_DISABLED __HAL_RCC_TIM20_IS_CLK_DISABLED -#define __TSC_IS_CLK_ENABLED __HAL_RCC_TSC_IS_CLK_ENABLED -#define __TSC_IS_CLK_DISABLED __HAL_RCC_TSC_IS_CLK_DISABLED -#define __UART4_IS_CLK_ENABLED __HAL_RCC_UART4_IS_CLK_ENABLED -#define __UART4_IS_CLK_DISABLED __HAL_RCC_UART4_IS_CLK_DISABLED -#define __UART5_IS_CLK_ENABLED __HAL_RCC_UART5_IS_CLK_ENABLED -#define __UART5_IS_CLK_DISABLED __HAL_RCC_UART5_IS_CLK_DISABLED -#define __USART1_IS_CLK_ENABLED __HAL_RCC_USART1_IS_CLK_ENABLED -#define __USART1_IS_CLK_DISABLED __HAL_RCC_USART1_IS_CLK_DISABLED -#define __USART2_IS_CLK_ENABLED __HAL_RCC_USART2_IS_CLK_ENABLED -#define __USART2_IS_CLK_DISABLED __HAL_RCC_USART2_IS_CLK_DISABLED -#define __USART3_IS_CLK_ENABLED __HAL_RCC_USART3_IS_CLK_ENABLED -#define __USART3_IS_CLK_DISABLED __HAL_RCC_USART3_IS_CLK_DISABLED -#define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED -#define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED -#define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED -#define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED - -#if defined(STM32F4) -#define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET -#define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET -#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE -#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE -#define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE -#define __HAL_RCC_SDMMC1_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE -#define __HAL_RCC_SDMMC1_IS_CLK_ENABLED __HAL_RCC_SDIO_IS_CLK_ENABLED -#define __HAL_RCC_SDMMC1_IS_CLK_DISABLED __HAL_RCC_SDIO_IS_CLK_DISABLED -#define Sdmmc1ClockSelection SdioClockSelection -#define RCC_PERIPHCLK_SDMMC1 RCC_PERIPHCLK_SDIO -#define RCC_SDMMC1CLKSOURCE_CLK48 RCC_SDIOCLKSOURCE_CK48 -#define RCC_SDMMC1CLKSOURCE_SYSCLK RCC_SDIOCLKSOURCE_SYSCLK -#define __HAL_RCC_SDMMC1_CONFIG __HAL_RCC_SDIO_CONFIG -#define __HAL_RCC_GET_SDMMC1_SOURCE __HAL_RCC_GET_SDIO_SOURCE -#endif - -#if defined(STM32F7) || defined(STM32L4) -#define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET -#define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET -#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE -#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE -#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE -#define __HAL_RCC_SDIO_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE -#define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED -#define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED -#define SdioClockSelection Sdmmc1ClockSelection -#define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1 -#define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG -#define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE -#endif - -#if defined(STM32F7) -#define RCC_SDIOCLKSOURCE_CLK48 RCC_SDMMC1CLKSOURCE_CLK48 -#define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK -#endif - -#if defined(STM32H7) -#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_ENABLE() -#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE() -#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_DISABLE() -#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_DISABLE() -#define __HAL_RCC_USB_OTG_HS_FORCE_RESET() __HAL_RCC_USB1_OTG_HS_FORCE_RESET() -#define __HAL_RCC_USB_OTG_HS_RELEASE_RESET() __HAL_RCC_USB1_OTG_HS_RELEASE_RESET() -#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_ENABLE() -#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_ENABLE() -#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_DISABLE() -#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE() - -#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_ENABLE() -#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_ENABLE() -#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_DISABLE() -#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_DISABLE() -#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() __HAL_RCC_USB2_OTG_FS_FORCE_RESET() -#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() __HAL_RCC_USB2_OTG_FS_RELEASE_RESET() -#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_ENABLE() -#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE() -#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE() -#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE() -#endif - -#define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG -#define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG - -#define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE - -#define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE -#define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE -#define IS_RCC_SYSCLK_DIV IS_RCC_HCLK -#define IS_RCC_HCLK_DIV IS_RCC_PCLK -#define IS_RCC_PERIPHCLK IS_RCC_PERIPHCLOCK - -#define RCC_IT_HSI14 RCC_IT_HSI14RDY - -#define RCC_IT_CSSLSE RCC_IT_LSECSS -#define RCC_IT_CSSHSE RCC_IT_CSS - -#define RCC_PLLMUL_3 RCC_PLL_MUL3 -#define RCC_PLLMUL_4 RCC_PLL_MUL4 -#define RCC_PLLMUL_6 RCC_PLL_MUL6 -#define RCC_PLLMUL_8 RCC_PLL_MUL8 -#define RCC_PLLMUL_12 RCC_PLL_MUL12 -#define RCC_PLLMUL_16 RCC_PLL_MUL16 -#define RCC_PLLMUL_24 RCC_PLL_MUL24 -#define RCC_PLLMUL_32 RCC_PLL_MUL32 -#define RCC_PLLMUL_48 RCC_PLL_MUL48 - -#define RCC_PLLDIV_2 RCC_PLL_DIV2 -#define RCC_PLLDIV_3 RCC_PLL_DIV3 -#define RCC_PLLDIV_4 RCC_PLL_DIV4 - -#define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE -#define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG -#define RCC_MCO_NODIV RCC_MCODIV_1 -#define RCC_MCO_DIV1 RCC_MCODIV_1 -#define RCC_MCO_DIV2 RCC_MCODIV_2 -#define RCC_MCO_DIV4 RCC_MCODIV_4 -#define RCC_MCO_DIV8 RCC_MCODIV_8 -#define RCC_MCO_DIV16 RCC_MCODIV_16 -#define RCC_MCO_DIV32 RCC_MCODIV_32 -#define RCC_MCO_DIV64 RCC_MCODIV_64 -#define RCC_MCO_DIV128 RCC_MCODIV_128 -#define RCC_MCOSOURCE_NONE RCC_MCO1SOURCE_NOCLOCK -#define RCC_MCOSOURCE_LSI RCC_MCO1SOURCE_LSI -#define RCC_MCOSOURCE_LSE RCC_MCO1SOURCE_LSE -#define RCC_MCOSOURCE_SYSCLK RCC_MCO1SOURCE_SYSCLK -#define RCC_MCOSOURCE_HSI RCC_MCO1SOURCE_HSI -#define RCC_MCOSOURCE_HSI14 RCC_MCO1SOURCE_HSI14 -#define RCC_MCOSOURCE_HSI48 RCC_MCO1SOURCE_HSI48 -#define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE -#define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK -#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK -#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2 - -#if defined(STM32L4) -#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE -#elif defined(STM32WB) || defined(STM32G0) -#else -#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK -#endif - -#define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1 -#define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL -#define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI -#define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL -#define RCC_USBPLLCLK_DIV1 RCC_USBCLKSOURCE_PLL -#define RCC_USBPLLCLK_DIV1_5 RCC_USBCLKSOURCE_PLL_DIV1_5 -#define RCC_USBPLLCLK_DIV2 RCC_USBCLKSOURCE_PLL_DIV2 -#define RCC_USBPLLCLK_DIV3 RCC_USBCLKSOURCE_PLL_DIV3 - -#define HSION_BitNumber RCC_HSION_BIT_NUMBER -#define HSION_BITNUMBER RCC_HSION_BIT_NUMBER -#define HSEON_BitNumber RCC_HSEON_BIT_NUMBER -#define HSEON_BITNUMBER RCC_HSEON_BIT_NUMBER -#define MSION_BITNUMBER RCC_MSION_BIT_NUMBER -#define CSSON_BitNumber RCC_CSSON_BIT_NUMBER -#define CSSON_BITNUMBER RCC_CSSON_BIT_NUMBER -#define PLLON_BitNumber RCC_PLLON_BIT_NUMBER -#define PLLON_BITNUMBER RCC_PLLON_BIT_NUMBER -#define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER -#define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER -#define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER -#define RTCEN_BITNUMBER RCC_RTCEN_BIT_NUMBER -#define BDRST_BitNumber RCC_BDRST_BIT_NUMBER -#define BDRST_BITNUMBER RCC_BDRST_BIT_NUMBER -#define RTCRST_BITNUMBER RCC_RTCRST_BIT_NUMBER -#define LSION_BitNumber RCC_LSION_BIT_NUMBER -#define LSION_BITNUMBER RCC_LSION_BIT_NUMBER -#define LSEON_BitNumber RCC_LSEON_BIT_NUMBER -#define LSEON_BITNUMBER RCC_LSEON_BIT_NUMBER -#define LSEBYP_BITNUMBER RCC_LSEBYP_BIT_NUMBER -#define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER -#define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER -#define RMVF_BitNumber RCC_RMVF_BIT_NUMBER -#define RMVF_BITNUMBER RCC_RMVF_BIT_NUMBER -#define RCC_CR2_HSI14TRIM_BitNumber RCC_HSI14TRIM_BIT_NUMBER -#define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS -#define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS -#define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS -#define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS -#define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE -#define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE - -#define CR_HSION_BB RCC_CR_HSION_BB -#define CR_CSSON_BB RCC_CR_CSSON_BB -#define CR_PLLON_BB RCC_CR_PLLON_BB -#define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB -#define CR_MSION_BB RCC_CR_MSION_BB -#define CSR_LSION_BB RCC_CSR_LSION_BB -#define CSR_LSEON_BB RCC_CSR_LSEON_BB -#define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB -#define CSR_RTCEN_BB RCC_CSR_RTCEN_BB -#define CSR_RTCRST_BB RCC_CSR_RTCRST_BB -#define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB -#define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB -#define BDCR_BDRST_BB RCC_BDCR_BDRST_BB -#define CR_HSEON_BB RCC_CR_HSEON_BB -#define CSR_RMVF_BB RCC_CSR_RMVF_BB -#define CR_PLLSAION_BB RCC_CR_PLLSAION_BB -#define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB - -#define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE -#define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE -#define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE -#define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE -#define __HAL_RCC_CRS_CALCULATE_RELOADVALUE __HAL_RCC_CRS_RELOADVALUE_CALCULATE - -#define __HAL_RCC_GET_IT_SOURCE __HAL_RCC_GET_IT - -#define RCC_CRS_SYNCWARM RCC_CRS_SYNCWARN -#define RCC_CRS_TRIMOV RCC_CRS_TRIMOVF - -#define RCC_PERIPHCLK_CK48 RCC_PERIPHCLK_CLK48 -#define RCC_CK48CLKSOURCE_PLLQ RCC_CLK48CLKSOURCE_PLLQ -#define RCC_CK48CLKSOURCE_PLLSAIP RCC_CLK48CLKSOURCE_PLLSAIP -#define RCC_CK48CLKSOURCE_PLLI2SQ RCC_CLK48CLKSOURCE_PLLI2SQ -#define IS_RCC_CK48CLKSOURCE IS_RCC_CLK48CLKSOURCE -#define RCC_SDIOCLKSOURCE_CK48 RCC_SDIOCLKSOURCE_CLK48 - -#define __HAL_RCC_DFSDM_CLK_ENABLE __HAL_RCC_DFSDM1_CLK_ENABLE -#define __HAL_RCC_DFSDM_CLK_DISABLE __HAL_RCC_DFSDM1_CLK_DISABLE -#define __HAL_RCC_DFSDM_IS_CLK_ENABLED __HAL_RCC_DFSDM1_IS_CLK_ENABLED -#define __HAL_RCC_DFSDM_IS_CLK_DISABLED __HAL_RCC_DFSDM1_IS_CLK_DISABLED -#define __HAL_RCC_DFSDM_FORCE_RESET __HAL_RCC_DFSDM1_FORCE_RESET -#define __HAL_RCC_DFSDM_RELEASE_RESET __HAL_RCC_DFSDM1_RELEASE_RESET -#define __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE -#define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE -#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED -#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED -#define DfsdmClockSelection Dfsdm1ClockSelection -#define RCC_PERIPHCLK_DFSDM RCC_PERIPHCLK_DFSDM1 -#define RCC_DFSDMCLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 -#define RCC_DFSDMCLKSOURCE_SYSCLK RCC_DFSDM1CLKSOURCE_SYSCLK -#define __HAL_RCC_DFSDM_CONFIG __HAL_RCC_DFSDM1_CONFIG -#define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE -#define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 -#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1 -#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1 -#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1 - -#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1 -#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2 -#define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM2AUDIOCLKSOURCE_I2S1 -#define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM2AUDIOCLKSOURCE_I2S2 -#define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2 -#define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2 -#define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1 - -/** - * @} - */ - -/** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose - * @{ - */ -#define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit) - -/** - * @} - */ - -/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose - * @{ - */ -#if defined (STM32G0) -#else -#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG -#endif -#define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT -#define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT - -#if defined (STM32F1) -#define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() - -#define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT() - -#define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT() - -#define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG() - -#define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() -#else -#define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \ - (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG())) -#define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \ - (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT())) -#define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \ - (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT())) -#define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \ - (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG())) -#define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \ - (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT())) -#endif /* STM32F1 */ - -#define IS_ALARM IS_RTC_ALARM -#define IS_ALARM_MASK IS_RTC_ALARM_MASK -#define IS_TAMPER IS_RTC_TAMPER -#define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE -#define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER -#define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT -#define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE -#define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION -#define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE -#define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ -#define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION -#define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER -#define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK -#define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER - -#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE -#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE - -/** - * @} - */ - -/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose - * @{ - */ - -#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE -#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS - -#if defined(STM32F4) || defined(STM32F2) -#define SD_SDMMC_DISABLED SD_SDIO_DISABLED -#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY -#define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED -#define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION -#define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND -#define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT -#define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED -#define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE -#define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE -#define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE -#define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL -#define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT -#define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT -#define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG -#define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG -#define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT -#define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT -#define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS -#define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT -#define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND -/* alias CMSIS */ -#define SDMMC1_IRQn SDIO_IRQn -#define SDMMC1_IRQHandler SDIO_IRQHandler -#endif - -#if defined(STM32F7) || defined(STM32L4) -#define SD_SDIO_DISABLED SD_SDMMC_DISABLED -#define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY -#define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED -#define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION -#define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND -#define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT -#define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED -#define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE -#define __HAL_SD_SDIO_DISABLE __HAL_SD_SDMMC_DISABLE -#define __HAL_SD_SDIO_DMA_ENABLE __HAL_SD_SDMMC_DMA_ENABLE -#define __HAL_SD_SDIO_DMA_DISABL __HAL_SD_SDMMC_DMA_DISABLE -#define __HAL_SD_SDIO_ENABLE_IT __HAL_SD_SDMMC_ENABLE_IT -#define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT -#define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG -#define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG -#define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT -#define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT -#define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS -#define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT -#define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND -/* alias CMSIS for compatibilities */ -#define SDIO_IRQn SDMMC1_IRQn -#define SDIO_IRQHandler SDMMC1_IRQHandler -#endif - -#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) -#define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef -#define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef -#define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef -#define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef -#endif - -#if defined(STM32H7) -#define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback HAL_MMCEx_Read_DMADoubleBuf0CpltCallback -#define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback HAL_MMCEx_Read_DMADoubleBuf1CpltCallback -#define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback HAL_MMCEx_Write_DMADoubleBuf0CpltCallback -#define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback HAL_MMCEx_Write_DMADoubleBuf1CpltCallback -#define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback HAL_SDEx_Read_DMADoubleBuf0CpltCallback -#define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback HAL_SDEx_Read_DMADoubleBuf1CpltCallback -#define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback HAL_SDEx_Write_DMADoubleBuf0CpltCallback -#define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback HAL_SDEx_Write_DMADoubleBuf1CpltCallback -#endif -/** - * @} - */ - -/** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT -#define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT -#define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE -#define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE -#define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE -#define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE - -#define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE -#define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE - -#define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE - -/** - * @} - */ - -/** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1 -#define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2 -#define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START -#define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH -#define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR -#define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE -#define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE -#define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED -/** - * @} - */ - -/** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __HAL_SPI_1LINE_TX SPI_1LINE_TX -#define __HAL_SPI_1LINE_RX SPI_1LINE_RX -#define __HAL_SPI_RESET_CRC SPI_RESET_CRC - -/** - * @} - */ - -/** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE -#define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION -#define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE -#define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION - -#define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD - -#define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE -#define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE - -/** - * @} - */ - - -/** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __USART_ENABLE_IT __HAL_USART_ENABLE_IT -#define __USART_DISABLE_IT __HAL_USART_DISABLE_IT -#define __USART_ENABLE __HAL_USART_ENABLE -#define __USART_DISABLE __HAL_USART_DISABLE - -#define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE -#define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE - -/** - * @} - */ - -/** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose - * @{ - */ -#define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE - -#define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE -#define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE -#define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE -#define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE - -#define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE -#define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE -#define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE -#define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE - -#define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT -#define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT -#define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG -#define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG -#define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE -#define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE -#define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE - -#define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT -#define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT -#define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG -#define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG -#define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE -#define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE -#define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE -#define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT - -#define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT -#define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT -#define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG -#define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG -#define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE -#define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE -#define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE -#define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT - -#define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup -#define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup - -#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo -#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo -/** - * @} - */ - -/** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE -#define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE - -#define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE -#define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT - -#define __HAL_TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE - -#define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN -#define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER -#define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER -#define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER -#define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD -#define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD -#define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION -#define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION -#define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER -#define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER -#define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE -#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE - -#define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1 -/** - * @} - */ - -/** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT -#define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT -#define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG -#define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG -#define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER -#define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER -#define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER - -#define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE -#define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE -#define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE -/** - * @} - */ - -/** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_LTDC_LAYER LTDC_LAYER -#define __HAL_LTDC_RELOAD_CONFIG __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG -/** - * @} - */ - -/** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose - * @{ - */ -#define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE -#define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE -#define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE -#define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE -#define SAI_STREOMODE SAI_STEREOMODE -#define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY -#define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL -#define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL -#define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL -#define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL -#define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL -#define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE -#define SAI_SYNCHRONOUS_EXT SAI_SYNCHRONOUS_EXT_SAI1 -#define SAI_SYNCEXT_IN_ENABLE SAI_SYNCEXT_OUTBLOCKA_ENABLE -/** - * @} - */ - -/** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose - * @{ - */ -#if defined(STM32H7) -#define HAL_SPDIFRX_ReceiveControlFlow HAL_SPDIFRX_ReceiveCtrlFlow -#define HAL_SPDIFRX_ReceiveControlFlow_IT HAL_SPDIFRX_ReceiveCtrlFlow_IT -#define HAL_SPDIFRX_ReceiveControlFlow_DMA HAL_SPDIFRX_ReceiveCtrlFlow_DMA -#endif -/** - * @} - */ - -/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose - * @{ - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* ___STM32_HAL_LEGACY */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h deleted file mode 100644 index 3b3c147e..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h +++ /dev/null @@ -1,669 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal.h - * @author MCD Application Team - * @brief This file contains all the functions prototypes for the HAL - * module driver. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_H -#define __STM32L4xx_HAL_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_conf.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup HAL - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants - * @{ - */ - -/** @defgroup SYSCFG_BootMode Boot Mode - * @{ - */ -#define SYSCFG_BOOT_MAINFLASH ((uint32_t)0x00000000) -#define SYSCFG_BOOT_SYSTEMFLASH SYSCFG_MEMRMP_MEM_MODE_0 - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define SYSCFG_BOOT_FMC SYSCFG_MEMRMP_MEM_MODE_1 -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#define SYSCFG_BOOT_SRAM (SYSCFG_MEMRMP_MEM_MODE_1 | SYSCFG_MEMRMP_MEM_MODE_0) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define SYSCFG_BOOT_OCTOPSPI1 (SYSCFG_MEMRMP_MEM_MODE_2) -#define SYSCFG_BOOT_OCTOPSPI2 (SYSCFG_MEMRMP_MEM_MODE_2 | SYSCFG_MEMRMP_MEM_MODE_0) -#else -#define SYSCFG_BOOT_QUADSPI (SYSCFG_MEMRMP_MEM_MODE_2 | SYSCFG_MEMRMP_MEM_MODE_1) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** - * @} - */ - -/** @defgroup SYSCFG_FPU_Interrupts FPU Interrupts - * @{ - */ -#define SYSCFG_IT_FPU_IOC SYSCFG_CFGR1_FPU_IE_0 /*!< Floating Point Unit Invalid operation Interrupt */ -#define SYSCFG_IT_FPU_DZC SYSCFG_CFGR1_FPU_IE_1 /*!< Floating Point Unit Divide-by-zero Interrupt */ -#define SYSCFG_IT_FPU_UFC SYSCFG_CFGR1_FPU_IE_2 /*!< Floating Point Unit Underflow Interrupt */ -#define SYSCFG_IT_FPU_OFC SYSCFG_CFGR1_FPU_IE_3 /*!< Floating Point Unit Overflow Interrupt */ -#define SYSCFG_IT_FPU_IDC SYSCFG_CFGR1_FPU_IE_4 /*!< Floating Point Unit Input denormal Interrupt */ -#define SYSCFG_IT_FPU_IXC SYSCFG_CFGR1_FPU_IE_5 /*!< Floating Point Unit Inexact Interrupt */ - -/** - * @} - */ - -/** @defgroup SYSCFG_SRAM2WRP SRAM2 Page Write protection (0 to 31) - * @{ - */ -#define SYSCFG_SRAM2WRP_PAGE0 SYSCFG_SWPR_PAGE0 /*!< SRAM2 Write protection page 0 */ -#define SYSCFG_SRAM2WRP_PAGE1 SYSCFG_SWPR_PAGE1 /*!< SRAM2 Write protection page 1 */ -#define SYSCFG_SRAM2WRP_PAGE2 SYSCFG_SWPR_PAGE2 /*!< SRAM2 Write protection page 2 */ -#define SYSCFG_SRAM2WRP_PAGE3 SYSCFG_SWPR_PAGE3 /*!< SRAM2 Write protection page 3 */ -#define SYSCFG_SRAM2WRP_PAGE4 SYSCFG_SWPR_PAGE4 /*!< SRAM2 Write protection page 4 */ -#define SYSCFG_SRAM2WRP_PAGE5 SYSCFG_SWPR_PAGE5 /*!< SRAM2 Write protection page 5 */ -#define SYSCFG_SRAM2WRP_PAGE6 SYSCFG_SWPR_PAGE6 /*!< SRAM2 Write protection page 6 */ -#define SYSCFG_SRAM2WRP_PAGE7 SYSCFG_SWPR_PAGE7 /*!< SRAM2 Write protection page 7 */ -#define SYSCFG_SRAM2WRP_PAGE8 SYSCFG_SWPR_PAGE8 /*!< SRAM2 Write protection page 8 */ -#define SYSCFG_SRAM2WRP_PAGE9 SYSCFG_SWPR_PAGE9 /*!< SRAM2 Write protection page 9 */ -#define SYSCFG_SRAM2WRP_PAGE10 SYSCFG_SWPR_PAGE10 /*!< SRAM2 Write protection page 10 */ -#define SYSCFG_SRAM2WRP_PAGE11 SYSCFG_SWPR_PAGE11 /*!< SRAM2 Write protection page 11 */ -#define SYSCFG_SRAM2WRP_PAGE12 SYSCFG_SWPR_PAGE12 /*!< SRAM2 Write protection page 12 */ -#define SYSCFG_SRAM2WRP_PAGE13 SYSCFG_SWPR_PAGE13 /*!< SRAM2 Write protection page 13 */ -#define SYSCFG_SRAM2WRP_PAGE14 SYSCFG_SWPR_PAGE14 /*!< SRAM2 Write protection page 14 */ -#define SYSCFG_SRAM2WRP_PAGE15 SYSCFG_SWPR_PAGE15 /*!< SRAM2 Write protection page 15 */ -#if defined(SYSCFG_SWPR_PAGE31) -#define SYSCFG_SRAM2WRP_PAGE16 SYSCFG_SWPR_PAGE16 /*!< SRAM2 Write protection page 16 */ -#define SYSCFG_SRAM2WRP_PAGE17 SYSCFG_SWPR_PAGE17 /*!< SRAM2 Write protection page 17 */ -#define SYSCFG_SRAM2WRP_PAGE18 SYSCFG_SWPR_PAGE18 /*!< SRAM2 Write protection page 18 */ -#define SYSCFG_SRAM2WRP_PAGE19 SYSCFG_SWPR_PAGE19 /*!< SRAM2 Write protection page 19 */ -#define SYSCFG_SRAM2WRP_PAGE20 SYSCFG_SWPR_PAGE20 /*!< SRAM2 Write protection page 20 */ -#define SYSCFG_SRAM2WRP_PAGE21 SYSCFG_SWPR_PAGE21 /*!< SRAM2 Write protection page 21 */ -#define SYSCFG_SRAM2WRP_PAGE22 SYSCFG_SWPR_PAGE22 /*!< SRAM2 Write protection page 22 */ -#define SYSCFG_SRAM2WRP_PAGE23 SYSCFG_SWPR_PAGE23 /*!< SRAM2 Write protection page 23 */ -#define SYSCFG_SRAM2WRP_PAGE24 SYSCFG_SWPR_PAGE24 /*!< SRAM2 Write protection page 24 */ -#define SYSCFG_SRAM2WRP_PAGE25 SYSCFG_SWPR_PAGE25 /*!< SRAM2 Write protection page 25 */ -#define SYSCFG_SRAM2WRP_PAGE26 SYSCFG_SWPR_PAGE26 /*!< SRAM2 Write protection page 26 */ -#define SYSCFG_SRAM2WRP_PAGE27 SYSCFG_SWPR_PAGE27 /*!< SRAM2 Write protection page 27 */ -#define SYSCFG_SRAM2WRP_PAGE28 SYSCFG_SWPR_PAGE28 /*!< SRAM2 Write protection page 28 */ -#define SYSCFG_SRAM2WRP_PAGE29 SYSCFG_SWPR_PAGE29 /*!< SRAM2 Write protection page 29 */ -#define SYSCFG_SRAM2WRP_PAGE30 SYSCFG_SWPR_PAGE30 /*!< SRAM2 Write protection page 30 */ -#define SYSCFG_SRAM2WRP_PAGE31 SYSCFG_SWPR_PAGE31 /*!< SRAM2 Write protection page 31 */ -#endif /* SYSCFG_SWPR_PAGE31 */ - -/** - * @} - */ - -#if defined(SYSCFG_SWPR2_PAGE63) -/** @defgroup SYSCFG_SRAM2WRP_32_63 SRAM2 Page Write protection (32 to 63) - * @{ - */ -#define SYSCFG_SRAM2WRP_PAGE32 SYSCFG_SWPR2_PAGE32 /*!< SRAM2 Write protection page 32 */ -#define SYSCFG_SRAM2WRP_PAGE33 SYSCFG_SWPR2_PAGE33 /*!< SRAM2 Write protection page 33 */ -#define SYSCFG_SRAM2WRP_PAGE34 SYSCFG_SWPR2_PAGE34 /*!< SRAM2 Write protection page 34 */ -#define SYSCFG_SRAM2WRP_PAGE35 SYSCFG_SWPR2_PAGE35 /*!< SRAM2 Write protection page 35 */ -#define SYSCFG_SRAM2WRP_PAGE36 SYSCFG_SWPR2_PAGE36 /*!< SRAM2 Write protection page 36 */ -#define SYSCFG_SRAM2WRP_PAGE37 SYSCFG_SWPR2_PAGE37 /*!< SRAM2 Write protection page 37 */ -#define SYSCFG_SRAM2WRP_PAGE38 SYSCFG_SWPR2_PAGE38 /*!< SRAM2 Write protection page 38 */ -#define SYSCFG_SRAM2WRP_PAGE39 SYSCFG_SWPR2_PAGE39 /*!< SRAM2 Write protection page 39 */ -#define SYSCFG_SRAM2WRP_PAGE40 SYSCFG_SWPR2_PAGE40 /*!< SRAM2 Write protection page 40 */ -#define SYSCFG_SRAM2WRP_PAGE41 SYSCFG_SWPR2_PAGE41 /*!< SRAM2 Write protection page 41 */ -#define SYSCFG_SRAM2WRP_PAGE42 SYSCFG_SWPR2_PAGE42 /*!< SRAM2 Write protection page 42 */ -#define SYSCFG_SRAM2WRP_PAGE43 SYSCFG_SWPR2_PAGE43 /*!< SRAM2 Write protection page 43 */ -#define SYSCFG_SRAM2WRP_PAGE44 SYSCFG_SWPR2_PAGE44 /*!< SRAM2 Write protection page 44 */ -#define SYSCFG_SRAM2WRP_PAGE45 SYSCFG_SWPR2_PAGE45 /*!< SRAM2 Write protection page 45 */ -#define SYSCFG_SRAM2WRP_PAGE46 SYSCFG_SWPR2_PAGE46 /*!< SRAM2 Write protection page 46 */ -#define SYSCFG_SRAM2WRP_PAGE47 SYSCFG_SWPR2_PAGE47 /*!< SRAM2 Write protection page 47 */ -#define SYSCFG_SRAM2WRP_PAGE48 SYSCFG_SWPR2_PAGE48 /*!< SRAM2 Write protection page 48 */ -#define SYSCFG_SRAM2WRP_PAGE49 SYSCFG_SWPR2_PAGE49 /*!< SRAM2 Write protection page 49 */ -#define SYSCFG_SRAM2WRP_PAGE50 SYSCFG_SWPR2_PAGE50 /*!< SRAM2 Write protection page 50 */ -#define SYSCFG_SRAM2WRP_PAGE51 SYSCFG_SWPR2_PAGE51 /*!< SRAM2 Write protection page 51 */ -#define SYSCFG_SRAM2WRP_PAGE52 SYSCFG_SWPR2_PAGE52 /*!< SRAM2 Write protection page 52 */ -#define SYSCFG_SRAM2WRP_PAGE53 SYSCFG_SWPR2_PAGE53 /*!< SRAM2 Write protection page 53 */ -#define SYSCFG_SRAM2WRP_PAGE54 SYSCFG_SWPR2_PAGE54 /*!< SRAM2 Write protection page 54 */ -#define SYSCFG_SRAM2WRP_PAGE55 SYSCFG_SWPR2_PAGE55 /*!< SRAM2 Write protection page 55 */ -#define SYSCFG_SRAM2WRP_PAGE56 SYSCFG_SWPR2_PAGE56 /*!< SRAM2 Write protection page 56 */ -#define SYSCFG_SRAM2WRP_PAGE57 SYSCFG_SWPR2_PAGE57 /*!< SRAM2 Write protection page 57 */ -#define SYSCFG_SRAM2WRP_PAGE58 SYSCFG_SWPR2_PAGE58 /*!< SRAM2 Write protection page 58 */ -#define SYSCFG_SRAM2WRP_PAGE59 SYSCFG_SWPR2_PAGE59 /*!< SRAM2 Write protection page 59 */ -#define SYSCFG_SRAM2WRP_PAGE60 SYSCFG_SWPR2_PAGE60 /*!< SRAM2 Write protection page 60 */ -#define SYSCFG_SRAM2WRP_PAGE61 SYSCFG_SWPR2_PAGE61 /*!< SRAM2 Write protection page 61 */ -#define SYSCFG_SRAM2WRP_PAGE62 SYSCFG_SWPR2_PAGE62 /*!< SRAM2 Write protection page 62 */ -#define SYSCFG_SRAM2WRP_PAGE63 SYSCFG_SWPR2_PAGE63 /*!< SRAM2 Write protection page 63 */ - -/** - * @} - */ -#endif /* SYSCFG_SWPR2_PAGE63 */ - -#if defined(VREFBUF) -/** @defgroup SYSCFG_VREFBUF_VoltageScale VREFBUF Voltage Scale - * @{ - */ -#define SYSCFG_VREFBUF_VOLTAGE_SCALE0 ((uint32_t)0x00000000) /*!< Voltage reference scale 0 (VREF_OUT1) */ -#define SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS /*!< Voltage reference scale 1 (VREF_OUT2) */ - -/** - * @} - */ - -/** @defgroup SYSCFG_VREFBUF_HighImpedance VREFBUF High Impedance - * @{ - */ -#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE ((uint32_t)0x00000000) /*!< VREF_plus pin is internally connected to Voltage reference buffer output */ -#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_CSR_HIZ /*!< VREF_plus pin is high impedance */ - -/** - * @} - */ -#endif /* VREFBUF */ - -/** @defgroup SYSCFG_flags_definition Flags - * @{ - */ - -#define SYSCFG_FLAG_SRAM2_PE SYSCFG_CFGR2_SPF /*!< SRAM2 parity error */ -#define SYSCFG_FLAG_SRAM2_BUSY SYSCFG_SCSR_SRAM2BSY /*!< SRAM2 busy by erase operation */ - -/** - * @} - */ - -/** @defgroup SYSCFG_FastModePlus_GPIO Fast-mode Plus on GPIO - * @{ - */ - -/** @brief Fast-mode Plus driving capability on a specific GPIO - */ -#define SYSCFG_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast-mode Plus on PB6 */ -#define SYSCFG_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast-mode Plus on PB7 */ -#if defined(SYSCFG_CFGR1_I2C_PB8_FMP) -#define SYSCFG_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast-mode Plus on PB8 */ -#endif /* SYSCFG_CFGR1_I2C_PB8_FMP */ -#if defined(SYSCFG_CFGR1_I2C_PB9_FMP) -#define SYSCFG_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast-mode Plus on PB9 */ -#endif /* SYSCFG_CFGR1_I2C_PB9_FMP */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ - -/** @defgroup DBGMCU_Exported_Macros DBGMCU Exported Macros - * @{ - */ - -/** @brief Freeze/Unfreeze Peripherals in Debug mode - */ -#if defined(DBGMCU_APB1FZR1_DBG_TIM2_STOP) -#define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM2_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM2_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_TIM3_STOP) -#define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM3_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM3_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_TIM4_STOP) -#define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM4_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM4_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_TIM5_STOP) -#define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM5_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM5_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_TIM6_STOP) -#define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_TIM7_STOP) -#define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM7_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM7_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_RTC_STOP) -#define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_RTC_STOP) -#define __HAL_DBGMCU_UNFREEZE_RTC() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_RTC_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_WWDG_STOP) -#define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_WWDG_STOP) -#define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_WWDG_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_IWDG_STOP) -#define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_IWDG_STOP) -#define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_IWDG_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_I2C1_STOP) -#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C1_STOP) -#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C1_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_I2C2_STOP) -#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C2_STOP) -#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C2_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_I2C3_STOP) -#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C3_STOP) -#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C3_STOP) -#endif - -#if defined(DBGMCU_APB1FZR2_DBG_I2C4_STOP) -#define __HAL_DBGMCU_FREEZE_I2C4_TIMEOUT() SET_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_I2C4_STOP) -#define __HAL_DBGMCU_UNFREEZE_I2C4_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_I2C4_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_CAN_STOP) -#define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN_STOP) -#define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_CAN2_STOP) -#define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN2_STOP) -#define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN2_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_LPTIM1_STOP) -#define __HAL_DBGMCU_FREEZE_LPTIM1() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_LPTIM1_STOP) -#define __HAL_DBGMCU_UNFREEZE_LPTIM1() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_LPTIM1_STOP) -#endif - -#if defined(DBGMCU_APB1FZR2_DBG_LPTIM2_STOP) -#define __HAL_DBGMCU_FREEZE_LPTIM2() SET_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_LPTIM2_STOP) -#define __HAL_DBGMCU_UNFREEZE_LPTIM2() CLEAR_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_LPTIM2_STOP) -#endif - -#if defined(DBGMCU_APB2FZ_DBG_TIM1_STOP) -#define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM1_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM1_STOP) -#endif - -#if defined(DBGMCU_APB2FZ_DBG_TIM8_STOP) -#define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM8_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM8_STOP) -#endif - -#if defined(DBGMCU_APB2FZ_DBG_TIM15_STOP) -#define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM15_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM15_STOP) -#endif - -#if defined(DBGMCU_APB2FZ_DBG_TIM16_STOP) -#define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM16_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM16_STOP) -#endif - -#if defined(DBGMCU_APB2FZ_DBG_TIM17_STOP) -#define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM17_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM17_STOP) -#endif - -/** - * @} - */ - -/** @defgroup SYSCFG_Exported_Macros SYSCFG Exported Macros - * @{ - */ - -/** @brief Main Flash memory mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE) - -/** @brief System Flash memory mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_0) - -/** @brief Embedded SRAM mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_1|SYSCFG_MEMRMP_MEM_MODE_0)) - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - -/** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_FMC() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_1) - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - -/** @brief OCTOSPI mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_OCTOSPI1() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_2)) -#define __HAL_SYSCFG_REMAPMEMORY_OCTOSPI2() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_2|SYSCFG_MEMRMP_MEM_MODE_0)) - -#else - -/** @brief QUADSPI mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_QUADSPI() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_2|SYSCFG_MEMRMP_MEM_MODE_1)) - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** - * @brief Return the boot mode as configured by user. - * @retval The boot mode as configured by user. The returned value can be one - * of the following values: - * @arg @ref SYSCFG_BOOT_MAINFLASH - * @arg @ref SYSCFG_BOOT_SYSTEMFLASH - @if STM32L486xx - * @arg @ref SYSCFG_BOOT_FMC - @endif - * @arg @ref SYSCFG_BOOT_SRAM - * @arg @ref SYSCFG_BOOT_QUADSPI - */ -#define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE) - -/** @brief SRAM2 page 0 to 31 write protection enable macro - * @param __SRAM2WRP__ This parameter can be a combination of values of @ref SYSCFG_SRAM2WRP - * @note Write protection can only be disabled by a system reset - */ -#define __HAL_SYSCFG_SRAM2_WRP_1_31_ENABLE(__SRAM2WRP__) do {assert_param(IS_SYSCFG_SRAM2WRP_PAGE((__SRAM2WRP__)));\ - SET_BIT(SYSCFG->SWPR, (__SRAM2WRP__));\ - }while(0) - -#if defined(SYSCFG_SWPR2_PAGE63) -/** @brief SRAM2 page 32 to 63 write protection enable macro - * @param __SRAM2WRP__ This parameter can be a combination of values of @ref SYSCFG_SRAM2WRP_32_63 - * @note Write protection can only be disabled by a system reset - */ -#define __HAL_SYSCFG_SRAM2_WRP_32_63_ENABLE(__SRAM2WRP__) do {assert_param(IS_SYSCFG_SRAM2WRP_PAGE((__SRAM2WRP__)));\ - SET_BIT(SYSCFG->SWPR2, (__SRAM2WRP__));\ - }while(0) -#endif /* SYSCFG_SWPR2_PAGE63 */ - -/** @brief SRAM2 page write protection unlock prior to erase - * @note Writing a wrong key reactivates the write protection - */ -#define __HAL_SYSCFG_SRAM2_WRP_UNLOCK() do {SYSCFG->SKR = 0xCA;\ - SYSCFG->SKR = 0x53;\ - }while(0) - -/** @brief SRAM2 erase - * @note __SYSCFG_GET_FLAG(SYSCFG_FLAG_SRAM2_BUSY) may be used to check end of erase - */ -#define __HAL_SYSCFG_SRAM2_ERASE() SET_BIT(SYSCFG->SCSR, SYSCFG_SCSR_SRAM2ER) - -/** @brief Floating Point Unit interrupt enable/disable macros - * @param __INTERRUPT__ This parameter can be a value of @ref SYSCFG_FPU_Interrupts - */ -#define __HAL_SYSCFG_FPU_INTERRUPT_ENABLE(__INTERRUPT__) do {assert_param(IS_SYSCFG_FPU_INTERRUPT((__INTERRUPT__)));\ - SET_BIT(SYSCFG->CFGR1, (__INTERRUPT__));\ - }while(0) - -#define __HAL_SYSCFG_FPU_INTERRUPT_DISABLE(__INTERRUPT__) do {assert_param(IS_SYSCFG_FPU_INTERRUPT((__INTERRUPT__)));\ - CLEAR_BIT(SYSCFG->CFGR1, (__INTERRUPT__));\ - }while(0) - -/** @brief SYSCFG Break ECC lock. - * Enable and lock the connection of Flash ECC error connection to TIM1/8/15/16/17 Break input. - * @note The selected configuration is locked and can be unlocked only by system reset. - */ -#define __HAL_SYSCFG_BREAK_ECC_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_ECCL) - -/** @brief SYSCFG Break Cortex-M4 Lockup lock. - * Enable and lock the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8/15/16/17 Break input. - * @note The selected configuration is locked and can be unlocked only by system reset. - */ -#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL) - -/** @brief SYSCFG Break PVD lock. - * Enable and lock the PVD connection to Timer1/8/15/16/17 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR2 register. - * @note The selected configuration is locked and can be unlocked only by system reset. - */ -#define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_PVDL) - -/** @brief SYSCFG Break SRAM2 parity lock. - * Enable and lock the SRAM2 parity error signal connection to TIM1/8/15/16/17 Break input. - * @note The selected configuration is locked and can be unlocked by system reset. - */ -#define __HAL_SYSCFG_BREAK_SRAM2PARITY_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPL) - -/** @brief Check SYSCFG flag is set or not. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref SYSCFG_FLAG_SRAM2_PE SRAM2 Parity Error Flag - * @arg @ref SYSCFG_FLAG_SRAM2_BUSY SRAM2 Erase Ongoing - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_SYSCFG_GET_FLAG(__FLAG__) ((((((__FLAG__) == SYSCFG_SCSR_SRAM2BSY)? SYSCFG->SCSR : SYSCFG->CFGR2) & (__FLAG__))!= 0) ? 1 : 0) - -/** @brief Set the SPF bit to clear the SRAM Parity Error Flag. - */ -#define __HAL_SYSCFG_CLEAR_FLAG() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF) - -/** @brief Fast-mode Plus driving capability enable/disable macros - * @param __FASTMODEPLUS__ This parameter can be a value of : - * @arg @ref SYSCFG_FASTMODEPLUS_PB6 Fast-mode Plus driving capability activation on PB6 - * @arg @ref SYSCFG_FASTMODEPLUS_PB7 Fast-mode Plus driving capability activation on PB7 - * @arg @ref SYSCFG_FASTMODEPLUS_PB8 Fast-mode Plus driving capability activation on PB8 - * @arg @ref SYSCFG_FASTMODEPLUS_PB9 Fast-mode Plus driving capability activation on PB9 - */ -#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\ - SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\ - }while(0) - -#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\ - CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\ - }while(0) - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup SYSCFG_Private_Macros SYSCFG Private Macros - * @{ - */ - -#define IS_SYSCFG_FPU_INTERRUPT(__INTERRUPT__) ((((__INTERRUPT__) & SYSCFG_IT_FPU_IOC) == SYSCFG_IT_FPU_IOC) || \ - (((__INTERRUPT__) & SYSCFG_IT_FPU_DZC) == SYSCFG_IT_FPU_DZC) || \ - (((__INTERRUPT__) & SYSCFG_IT_FPU_UFC) == SYSCFG_IT_FPU_UFC) || \ - (((__INTERRUPT__) & SYSCFG_IT_FPU_OFC) == SYSCFG_IT_FPU_OFC) || \ - (((__INTERRUPT__) & SYSCFG_IT_FPU_IDC) == SYSCFG_IT_FPU_IDC) || \ - (((__INTERRUPT__) & SYSCFG_IT_FPU_IXC) == SYSCFG_IT_FPU_IXC)) - -#define IS_SYSCFG_BREAK_CONFIG(__CONFIG__) (((__CONFIG__) == SYSCFG_BREAK_ECC) || \ - ((__CONFIG__) == SYSCFG_BREAK_PVD) || \ - ((__CONFIG__) == SYSCFG_BREAK_SRAM2_PARITY) || \ - ((__CONFIG__) == SYSCFG_BREAK_LOCKUP)) - -#define IS_SYSCFG_SRAM2WRP_PAGE(__PAGE__) (((__PAGE__) > 0) && ((__PAGE__) <= 0xFFFFFFFF)) - -#if defined(VREFBUF) -#define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__) (((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE0) || \ - ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE1)) - -#define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(__VALUE__) (((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE) || \ - ((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE)) - -#define IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__) (((__VALUE__) > 0) && ((__VALUE__) <= VREFBUF_CCR_TRIM)) -#endif /* VREFBUF */ - -#if defined(SYSCFG_FASTMODEPLUS_PB8) && defined(SYSCFG_FASTMODEPLUS_PB9) -#define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9)) -#elif defined(SYSCFG_FASTMODEPLUS_PB8) -#define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8)) -#elif defined(SYSCFG_FASTMODEPLUS_PB9) -#define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9)) -#else -#define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7)) -#endif -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup HAL_Exported_Functions - * @{ - */ - -/** @addtogroup HAL_Exported_Functions_Group1 - * @{ - */ - -/* Initialization and de-initialization functions ******************************/ -HAL_StatusTypeDef HAL_Init(void); -HAL_StatusTypeDef HAL_DeInit(void); -void HAL_MspInit(void); -void HAL_MspDeInit(void); -HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); - -/** - * @} - */ - -/** @addtogroup HAL_Exported_Functions_Group2 - * @{ - */ - -/* Peripheral Control functions ************************************************/ -void HAL_IncTick(void); -void HAL_Delay(uint32_t Delay); -uint32_t HAL_GetTick(void); -void HAL_SuspendTick(void); -void HAL_ResumeTick(void); -uint32_t HAL_GetHalVersion(void); -uint32_t HAL_GetREVID(void); -uint32_t HAL_GetDEVID(void); -uint32_t HAL_GetUIDw0(void); -uint32_t HAL_GetUIDw1(void); -uint32_t HAL_GetUIDw2(void); - -/** - * @} - */ - -/** @addtogroup HAL_Exported_Functions_Group3 - * @{ - */ - -/* DBGMCU Peripheral Control functions *****************************************/ -void HAL_DBGMCU_EnableDBGSleepMode(void); -void HAL_DBGMCU_DisableDBGSleepMode(void); -void HAL_DBGMCU_EnableDBGStopMode(void); -void HAL_DBGMCU_DisableDBGStopMode(void); -void HAL_DBGMCU_EnableDBGStandbyMode(void); -void HAL_DBGMCU_DisableDBGStandbyMode(void); - -/** - * @} - */ - -/** @addtogroup HAL_Exported_Functions_Group4 - * @{ - */ - -/* SYSCFG Control functions ****************************************************/ -void HAL_SYSCFG_SRAM2Erase(void); -void HAL_SYSCFG_EnableMemorySwappingBank(void); -void HAL_SYSCFG_DisableMemorySwappingBank(void); - -#if defined(VREFBUF) -void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling); -void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode); -void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue); -HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void); -void HAL_SYSCFG_DisableVREFBUF(void); -#endif /* VREFBUF */ - -void HAL_SYSCFG_EnableIOAnalogSwitchBooster(void); -void HAL_SYSCFG_DisableIOAnalogSwitchBooster(void); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h deleted file mode 100644 index b6e2e9f3..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h +++ /dev/null @@ -1,433 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_cortex.h - * @author MCD Application Team - * @brief Header file of CORTEX HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CORTEX_H -#define __STM32L4xx_HAL_CORTEX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup CORTEX CORTEX - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup CORTEX_Exported_Types CORTEX Exported Types - * @{ - */ - -#if (__MPU_PRESENT == 1) -/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition - * @{ - */ -typedef struct -{ - uint8_t Enable; /*!< Specifies the status of the region. - This parameter can be a value of @ref CORTEX_MPU_Region_Enable */ - uint8_t Number; /*!< Specifies the number of the region to protect. - This parameter can be a value of @ref CORTEX_MPU_Region_Number */ - uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */ - uint8_t Size; /*!< Specifies the size of the region to protect. - This parameter can be a value of @ref CORTEX_MPU_Region_Size */ - uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ - uint8_t TypeExtField; /*!< Specifies the TEX field level. - This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */ - uint8_t AccessPermission; /*!< Specifies the region access permission type. - This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */ - uint8_t DisableExec; /*!< Specifies the instruction access status. - This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */ - uint8_t IsShareable; /*!< Specifies the shareability status of the protected region. - This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */ - uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected. - This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */ - uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region. - This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */ -}MPU_Region_InitTypeDef; -/** - * @} - */ -#endif /* __MPU_PRESENT */ - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants - * @{ - */ - -/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group - * @{ - */ -#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority, - 4 bits for subpriority */ -#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority, - 3 bits for subpriority */ -#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority, - 2 bits for subpriority */ -#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority, - 1 bit for subpriority */ -#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority, - 0 bit for subpriority */ -/** - * @} - */ - -/** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source - * @{ - */ -#define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000) -#define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004) -/** - * @} - */ - -#if (__MPU_PRESENT == 1) -/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control CORTEX MPU HFNMI and PRIVILEGED Access control - * @{ - */ -#define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000) -#define MPU_HARDFAULT_NMI ((uint32_t)0x00000002) -#define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004) -#define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable - * @{ - */ -#define MPU_REGION_ENABLE ((uint8_t)0x01) -#define MPU_REGION_DISABLE ((uint8_t)0x00) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access - * @{ - */ -#define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00) -#define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable - * @{ - */ -#define MPU_ACCESS_SHAREABLE ((uint8_t)0x01) -#define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable - * @{ - */ -#define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) -#define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable - * @{ - */ -#define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01) -#define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_TEX_Levels CORTEX MPU TEX Levels - * @{ - */ -#define MPU_TEX_LEVEL0 ((uint8_t)0x00) -#define MPU_TEX_LEVEL1 ((uint8_t)0x01) -#define MPU_TEX_LEVEL2 ((uint8_t)0x02) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size - * @{ - */ -#define MPU_REGION_SIZE_32B ((uint8_t)0x04) -#define MPU_REGION_SIZE_64B ((uint8_t)0x05) -#define MPU_REGION_SIZE_128B ((uint8_t)0x06) -#define MPU_REGION_SIZE_256B ((uint8_t)0x07) -#define MPU_REGION_SIZE_512B ((uint8_t)0x08) -#define MPU_REGION_SIZE_1KB ((uint8_t)0x09) -#define MPU_REGION_SIZE_2KB ((uint8_t)0x0A) -#define MPU_REGION_SIZE_4KB ((uint8_t)0x0B) -#define MPU_REGION_SIZE_8KB ((uint8_t)0x0C) -#define MPU_REGION_SIZE_16KB ((uint8_t)0x0D) -#define MPU_REGION_SIZE_32KB ((uint8_t)0x0E) -#define MPU_REGION_SIZE_64KB ((uint8_t)0x0F) -#define MPU_REGION_SIZE_128KB ((uint8_t)0x10) -#define MPU_REGION_SIZE_256KB ((uint8_t)0x11) -#define MPU_REGION_SIZE_512KB ((uint8_t)0x12) -#define MPU_REGION_SIZE_1MB ((uint8_t)0x13) -#define MPU_REGION_SIZE_2MB ((uint8_t)0x14) -#define MPU_REGION_SIZE_4MB ((uint8_t)0x15) -#define MPU_REGION_SIZE_8MB ((uint8_t)0x16) -#define MPU_REGION_SIZE_16MB ((uint8_t)0x17) -#define MPU_REGION_SIZE_32MB ((uint8_t)0x18) -#define MPU_REGION_SIZE_64MB ((uint8_t)0x19) -#define MPU_REGION_SIZE_128MB ((uint8_t)0x1A) -#define MPU_REGION_SIZE_256MB ((uint8_t)0x1B) -#define MPU_REGION_SIZE_512MB ((uint8_t)0x1C) -#define MPU_REGION_SIZE_1GB ((uint8_t)0x1D) -#define MPU_REGION_SIZE_2GB ((uint8_t)0x1E) -#define MPU_REGION_SIZE_4GB ((uint8_t)0x1F) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes - * @{ - */ -#define MPU_REGION_NO_ACCESS ((uint8_t)0x00) -#define MPU_REGION_PRIV_RW ((uint8_t)0x01) -#define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02) -#define MPU_REGION_FULL_ACCESS ((uint8_t)0x03) -#define MPU_REGION_PRIV_RO ((uint8_t)0x05) -#define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number - * @{ - */ -#define MPU_REGION_NUMBER0 ((uint8_t)0x00) -#define MPU_REGION_NUMBER1 ((uint8_t)0x01) -#define MPU_REGION_NUMBER2 ((uint8_t)0x02) -#define MPU_REGION_NUMBER3 ((uint8_t)0x03) -#define MPU_REGION_NUMBER4 ((uint8_t)0x04) -#define MPU_REGION_NUMBER5 ((uint8_t)0x05) -#define MPU_REGION_NUMBER6 ((uint8_t)0x06) -#define MPU_REGION_NUMBER7 ((uint8_t)0x07) -/** - * @} - */ -#endif /* __MPU_PRESENT */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros - * @{ - */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions - * @{ - */ - -/** @defgroup CORTEX_Exported_Functions_Group1 Initialization and Configuration functions - * @brief Initialization and Configuration functions - * @{ - */ -/* Initialization and Configuration functions *****************************/ -void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup); -void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority); -void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); -void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); -void HAL_NVIC_SystemReset(void); -uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); - -/** - * @} - */ - -/** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions - * @brief Cortex control functions - * @{ - */ -/* Peripheral Control functions ***********************************************/ -uint32_t HAL_NVIC_GetPriorityGrouping(void); -void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority); -uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn); -void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn); -void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn); -uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn); -void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource); -void HAL_SYSTICK_IRQHandler(void); -void HAL_SYSTICK_Callback(void); - -#if (__MPU_PRESENT == 1) -void HAL_MPU_Enable(uint32_t MPU_Control); -void HAL_MPU_Disable(void); -void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init); -#endif /* __MPU_PRESENT */ -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/** @defgroup CORTEX_Private_Macros CORTEX Private Macros - * @{ - */ -#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \ - ((GROUP) == NVIC_PRIORITYGROUP_1) || \ - ((GROUP) == NVIC_PRIORITYGROUP_2) || \ - ((GROUP) == NVIC_PRIORITYGROUP_3) || \ - ((GROUP) == NVIC_PRIORITYGROUP_4)) - -#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) - -#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) - -#define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00) - -#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ - ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8)) - -#if (__MPU_PRESENT == 1) -#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \ - ((STATE) == MPU_REGION_DISABLE)) - -#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \ - ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE)) - -#define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \ - ((STATE) == MPU_ACCESS_NOT_SHAREABLE)) - -#define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \ - ((STATE) == MPU_ACCESS_NOT_CACHEABLE)) - -#define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \ - ((STATE) == MPU_ACCESS_NOT_BUFFERABLE)) - -#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \ - ((TYPE) == MPU_TEX_LEVEL1) || \ - ((TYPE) == MPU_TEX_LEVEL2)) - -#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \ - ((TYPE) == MPU_REGION_PRIV_RW) || \ - ((TYPE) == MPU_REGION_PRIV_RW_URO) || \ - ((TYPE) == MPU_REGION_FULL_ACCESS) || \ - ((TYPE) == MPU_REGION_PRIV_RO) || \ - ((TYPE) == MPU_REGION_PRIV_RO_URO)) - -#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \ - ((NUMBER) == MPU_REGION_NUMBER1) || \ - ((NUMBER) == MPU_REGION_NUMBER2) || \ - ((NUMBER) == MPU_REGION_NUMBER3) || \ - ((NUMBER) == MPU_REGION_NUMBER4) || \ - ((NUMBER) == MPU_REGION_NUMBER5) || \ - ((NUMBER) == MPU_REGION_NUMBER6) || \ - ((NUMBER) == MPU_REGION_NUMBER7)) - -#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \ - ((SIZE) == MPU_REGION_SIZE_64B) || \ - ((SIZE) == MPU_REGION_SIZE_128B) || \ - ((SIZE) == MPU_REGION_SIZE_256B) || \ - ((SIZE) == MPU_REGION_SIZE_512B) || \ - ((SIZE) == MPU_REGION_SIZE_1KB) || \ - ((SIZE) == MPU_REGION_SIZE_2KB) || \ - ((SIZE) == MPU_REGION_SIZE_4KB) || \ - ((SIZE) == MPU_REGION_SIZE_8KB) || \ - ((SIZE) == MPU_REGION_SIZE_16KB) || \ - ((SIZE) == MPU_REGION_SIZE_32KB) || \ - ((SIZE) == MPU_REGION_SIZE_64KB) || \ - ((SIZE) == MPU_REGION_SIZE_128KB) || \ - ((SIZE) == MPU_REGION_SIZE_256KB) || \ - ((SIZE) == MPU_REGION_SIZE_512KB) || \ - ((SIZE) == MPU_REGION_SIZE_1MB) || \ - ((SIZE) == MPU_REGION_SIZE_2MB) || \ - ((SIZE) == MPU_REGION_SIZE_4MB) || \ - ((SIZE) == MPU_REGION_SIZE_8MB) || \ - ((SIZE) == MPU_REGION_SIZE_16MB) || \ - ((SIZE) == MPU_REGION_SIZE_32MB) || \ - ((SIZE) == MPU_REGION_SIZE_64MB) || \ - ((SIZE) == MPU_REGION_SIZE_128MB) || \ - ((SIZE) == MPU_REGION_SIZE_256MB) || \ - ((SIZE) == MPU_REGION_SIZE_512MB) || \ - ((SIZE) == MPU_REGION_SIZE_1GB) || \ - ((SIZE) == MPU_REGION_SIZE_2GB) || \ - ((SIZE) == MPU_REGION_SIZE_4GB)) - -#define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF) -#endif /* __MPU_PRESENT */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CORTEX_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h deleted file mode 100644 index bb9816b4..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h +++ /dev/null @@ -1,213 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_def.h - * @author MCD Application Team - * @brief This file contains HAL common defines, enumeration, macros and - * structures definitions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_DEF -#define __STM32L4xx_HAL_DEF - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx.h" -#include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */ -#include - -/* Exported types ------------------------------------------------------------*/ - -/** - * @brief HAL Status structures definition - */ -typedef enum -{ - HAL_OK = 0x00, - HAL_ERROR = 0x01, - HAL_BUSY = 0x02, - HAL_TIMEOUT = 0x03 -} HAL_StatusTypeDef; - -/** - * @brief HAL Lock structures definition - */ -typedef enum -{ - HAL_UNLOCKED = 0x00, - HAL_LOCKED = 0x01 -} HAL_LockTypeDef; - -/* Exported macros -----------------------------------------------------------*/ - -#define HAL_MAX_DELAY 0xFFFFFFFFU - -#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) -#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET) - -#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ - do{ \ - (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ - (__DMA_HANDLE__).Parent = (__HANDLE__); \ - } while(0) - -#define UNUSED(x) ((void)(x)) - -/** @brief Reset the Handle's State field. - * @param __HANDLE__: specifies the Peripheral Handle. - * @note This macro can be used for the following purpose: - * - When the Handle is declared as local variable; before passing it as parameter - * to HAL_PPP_Init() for the first time, it is mandatory to use this macro - * to set to 0 the Handle's "State" field. - * Otherwise, "State" field may have any random value and the first time the function - * HAL_PPP_Init() is called, the low level hardware initialization will be missed - * (i.e. HAL_PPP_MspInit() will not be executed). - * - When there is a need to reconfigure the low level hardware: instead of calling - * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). - * In this later function, when the Handle's "State" field is set to 0, it will execute the function - * HAL_PPP_MspInit() which will reconfigure the low level hardware. - * @retval None - */ -#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0) - -#if (USE_RTOS == 1) - /* Reserved for future use */ - #error " USE_RTOS should be 0 in the current HAL release " -#else - #define __HAL_LOCK(__HANDLE__) \ - do{ \ - if((__HANDLE__)->Lock == HAL_LOCKED) \ - { \ - return HAL_BUSY; \ - } \ - else \ - { \ - (__HANDLE__)->Lock = HAL_LOCKED; \ - } \ - }while (0) - - #define __HAL_UNLOCK(__HANDLE__) \ - do{ \ - (__HANDLE__)->Lock = HAL_UNLOCKED; \ - }while (0) -#endif /* USE_RTOS */ - -#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ - #ifndef __weak - #define __weak __attribute__((weak)) - #endif /* __weak */ - #ifndef __packed - #define __packed __attribute__((__packed__)) - #endif /* __packed */ -#endif /* __GNUC__ */ - - -/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ -#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ - #ifndef __ALIGN_END - #define __ALIGN_END __attribute__ ((aligned (4))) - #endif /* __ALIGN_END */ - #ifndef __ALIGN_BEGIN - #define __ALIGN_BEGIN - #endif /* __ALIGN_BEGIN */ -#else - #ifndef __ALIGN_END - #define __ALIGN_END - #endif /* __ALIGN_END */ - #ifndef __ALIGN_BEGIN - #if defined (__CC_ARM) /* ARM Compiler */ - #define __ALIGN_BEGIN __align(4) - #elif defined (__ICCARM__) /* IAR Compiler */ - #define __ALIGN_BEGIN - #endif /* __CC_ARM */ - #endif /* __ALIGN_BEGIN */ -#endif /* __GNUC__ */ - -/** - * @brief __RAM_FUNC definition - */ -#if defined ( __CC_ARM ) -/* ARM Compiler - ------------ - RAM functions are defined using the toolchain options. - Functions that are executed in RAM should reside in a separate source module. - Using the 'Options for File' dialog you can simply change the 'Code / Const' - area of a module to a memory space in physical RAM. - Available memory areas are declared in the 'Target' tab of the 'Options for Target' - dialog. -*/ -#define __RAM_FUNC HAL_StatusTypeDef - -#elif defined ( __ICCARM__ ) -/* ICCARM Compiler - --------------- - RAM functions are defined using a specific toolchain keyword "__ramfunc". -*/ -#define __RAM_FUNC __ramfunc HAL_StatusTypeDef - -#elif defined ( __GNUC__ ) -/* GNU Compiler - ------------ - RAM functions are defined using a specific toolchain attribute - "__attribute__((section(".RamFunc")))". -*/ -#define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc"))) - -#endif - -/** - * @brief __NOINLINE definition - */ -#if defined ( __CC_ARM ) || defined ( __GNUC__ ) -/* ARM & GNUCompiler - ---------------- -*/ -#define __NOINLINE __attribute__ ( (noinline) ) - -#elif defined ( __ICCARM__ ) -/* ICCARM Compiler - --------------- -*/ -#define __NOINLINE _Pragma("optimize = no_inline") - -#endif - - -#ifdef __cplusplus -} -#endif - -#endif /* ___STM32L4xx_HAL_DEF */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h deleted file mode 100644 index c11a47cc..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h +++ /dev/null @@ -1,766 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dma.h - * @author MCD Application Team - * @brief Header file of DMA HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_DMA_H -#define __STM32L4xx_HAL_DMA_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup DMA - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup DMA_Exported_Types DMA Exported Types - * @{ - */ - -/** - * @brief DMA Configuration Structure definition - */ -typedef struct -{ - uint32_t Request; /*!< Specifies the request selected for the specified channel. - This parameter can be a value of @ref DMA_request */ - - uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral, - from memory to memory or from peripheral to memory. - This parameter can be a value of @ref DMA_Data_transfer_direction */ - - uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not. - This parameter can be a value of @ref DMA_Peripheral_incremented_mode */ - - uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not. - This parameter can be a value of @ref DMA_Memory_incremented_mode */ - - uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width. - This parameter can be a value of @ref DMA_Peripheral_data_size */ - - uint32_t MemDataAlignment; /*!< Specifies the Memory data width. - This parameter can be a value of @ref DMA_Memory_data_size */ - - uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx. - This parameter can be a value of @ref DMA_mode - @note The circular buffer mode cannot be used if the memory-to-memory - data transfer is configured on the selected Channel */ - - uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx. - This parameter can be a value of @ref DMA_Priority_level */ -} DMA_InitTypeDef; - -/** - * @brief HAL DMA State structures definition - */ -typedef enum -{ - HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */ - HAL_DMA_STATE_READY = 0x01, /*!< DMA initialized and ready for use */ - HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */ - HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */ -}HAL_DMA_StateTypeDef; - -/** - * @brief HAL DMA Error Code structure definition - */ -typedef enum -{ - HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */ - HAL_DMA_HALF_TRANSFER = 0x01 /*!< Half Transfer */ -}HAL_DMA_LevelCompleteTypeDef; - - -/** - * @brief HAL DMA Callback ID structure definition - */ -typedef enum -{ - HAL_DMA_XFER_CPLT_CB_ID = 0x00, /*!< Full transfer */ - HAL_DMA_XFER_HALFCPLT_CB_ID = 0x01, /*!< Half transfer */ - HAL_DMA_XFER_ERROR_CB_ID = 0x02, /*!< Error */ - HAL_DMA_XFER_ABORT_CB_ID = 0x03, /*!< Abort */ - HAL_DMA_XFER_ALL_CB_ID = 0x04 /*!< All */ - -}HAL_DMA_CallbackIDTypeDef; - -/** - * @brief DMA handle Structure definition - */ -typedef struct __DMA_HandleTypeDef -{ - DMA_Channel_TypeDef *Instance; /*!< Register base address */ - - DMA_InitTypeDef Init; /*!< DMA communication parameters */ - - HAL_LockTypeDef Lock; /*!< DMA locking object */ - - __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */ - - void *Parent; /*!< Parent object state */ - - void (* XferCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */ - - void (* XferHalfCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */ - - void (* XferErrorCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */ - - void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */ - - __IO uint32_t ErrorCode; /*!< DMA Error code */ - - DMA_TypeDef *DmaBaseAddress; /*!< DMA Channel Base Address */ - - uint32_t ChannelIndex; /*!< DMA Channel Index */ - -#if defined(DMAMUX1) - DMAMUX_Channel_TypeDef *DMAmuxChannel; /*!< Register base address */ - - DMAMUX_ChannelStatus_TypeDef *DMAmuxChannelStatus; /*!< DMAMUX Channels Status Base Address */ - - uint32_t DMAmuxChannelStatusMask; /*!< DMAMUX Channel Status Mask */ - - DMAMUX_RequestGen_TypeDef *DMAmuxRequestGen; /*!< DMAMUX request generator Base Address */ - - DMAMUX_RequestGenStatus_TypeDef *DMAmuxRequestGenStatus; /*!< DMAMUX request generator Address */ - - uint32_t DMAmuxRequestGenStatusMask; /*!< DMAMUX request generator Status mask */ - -#endif /* DMAMUX1 */ - -}DMA_HandleTypeDef; -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup DMA_Exported_Constants DMA Exported Constants - * @{ - */ - -/** @defgroup DMA_Error_Code DMA Error Code - * @{ - */ -#define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ -#define HAL_DMA_ERROR_TE ((uint32_t)0x00000001U) /*!< Transfer error */ -#define HAL_DMA_ERROR_NO_XFER ((uint32_t)0x00000004U) /*!< Abort requested with no Xfer ongoing */ -#define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */ -#define HAL_DMA_ERROR_NOT_SUPPORTED ((uint32_t)0x00000100U) /*!< Not supported mode */ -#define HAL_DMA_ERROR_SYNC ((uint32_t)0x00000200U) /*!< DMAMUX sync overrun error */ -#define HAL_DMA_ERROR_REQGEN ((uint32_t)0x00000400U) /*!< DMAMUX request generator overrun error */ - -/** - * @} - */ - -/** @defgroup DMA_request DMA request - * @{ - */ -#if !defined (DMAMUX1) - -#define DMA_REQUEST_0 ((uint32_t)0x00000000) -#define DMA_REQUEST_1 ((uint32_t)0x00000001) -#define DMA_REQUEST_2 ((uint32_t)0x00000002) -#define DMA_REQUEST_3 ((uint32_t)0x00000003) -#define DMA_REQUEST_4 ((uint32_t)0x00000004) -#define DMA_REQUEST_5 ((uint32_t)0x00000005) -#define DMA_REQUEST_6 ((uint32_t)0x00000006) -#define DMA_REQUEST_7 ((uint32_t)0x00000007) - -#endif - -#if defined(DMAMUX1) - -#define DMA_REQUEST_MEM2MEM 0U /*!< memory to memory transfer */ - -#define DMA_REQUEST_GENERATOR0 1U /*!< DMAMUX1 request generator 0 */ -#define DMA_REQUEST_GENERATOR1 2U /*!< DMAMUX1 request generator 1 */ -#define DMA_REQUEST_GENERATOR2 3U /*!< DMAMUX1 request generator 2 */ -#define DMA_REQUEST_GENERATOR3 4U /*!< DMAMUX1 request generator 3 */ - -#define DMA_REQUEST_ADC1 5U /*!< DMAMUX1 ADC1 request */ - -#define DMA_REQUEST_DAC1_CH1 6U /*!< DMAMUX1 DAC1 CH1 request */ -#define DMA_REQUEST_DAC1_CH2 7U /*!< DMAMUX1 DAC1 CH2 request */ - -#define DMA_REQUEST_TIM6_UP 8U /*!< DMAMUX1 TIM6 UP request */ -#define DMA_REQUEST_TIM7_UP 9U /*!< DMAMUX1 TIM7 UP request */ - -#define DMA_REQUEST_SPI1_RX 10U /*!< DMAMUX1 SPI1 RX request */ -#define DMA_REQUEST_SPI1_TX 11U /*!< DMAMUX1 SPI1 TX request */ -#define DMA_REQUEST_SPI2_RX 12U /*!< DMAMUX1 SPI2 RX request */ -#define DMA_REQUEST_SPI2_TX 13U /*!< DMAMUX1 SPI2 TX request */ -#define DMA_REQUEST_SPI3_RX 14U /*!< DMAMUX1 SPI3 RX request */ -#define DMA_REQUEST_SPI3_TX 15U /*!< DMAMUX1 SPI3 TX request */ - -#define DMA_REQUEST_I2C1_RX 16U /*!< DMAMUX1 I2C1 RX request */ -#define DMA_REQUEST_I2C1_TX 17U /*!< DMAMUX1 I2C1 TX request */ -#define DMA_REQUEST_I2C2_RX 18U /*!< DMAMUX1 I2C2 RX request */ -#define DMA_REQUEST_I2C2_TX 19U /*!< DMAMUX1 I2C2 TX request */ -#define DMA_REQUEST_I2C3_RX 20U /*!< DMAMUX1 I2C3 RX request */ -#define DMA_REQUEST_I2C3_TX 21U /*!< DMAMUX1 I2C3 TX request */ -#define DMA_REQUEST_I2C4_RX 22U /*!< DMAMUX1 I2C4 RX request */ -#define DMA_REQUEST_I2C4_TX 23U /*!< DMAMUX1 I2C4 TX request */ - -#define DMA_REQUEST_USART1_RX 24U /*!< DMAMUX1 USART1 RX request */ -#define DMA_REQUEST_USART1_TX 25U /*!< DMAMUX1 USART1 TX request */ -#define DMA_REQUEST_USART2_RX 26U /*!< DMAMUX1 USART2 RX request */ -#define DMA_REQUEST_USART2_TX 27U /*!< DMAMUX1 USART2 TX request */ -#define DMA_REQUEST_USART3_RX 28U /*!< DMAMUX1 USART3 RX request */ -#define DMA_REQUEST_USART3_TX 29U /*!< DMAMUX1 USART3 TX request */ - -#define DMA_REQUEST_UART4_RX 30U /*!< DMAMUX1 UART4 RX request */ -#define DMA_REQUEST_UART4_TX 31U /*!< DMAMUX1 UART4 TX request */ -#define DMA_REQUEST_UART5_RX 32U /*!< DMAMUX1 UART5 RX request */ -#define DMA_REQUEST_UART5_TX 33U /*!< DMAMUX1 UART5 TX request */ - -#define DMA_REQUEST_LPUART1_RX 34U /*!< DMAMUX1 LP_UART1_RX request */ -#define DMA_REQUEST_LPUART1_TX 35U /*!< DMAMUX1 LP_UART1_RX request */ - -#define DMA_REQUEST_SAI1_A 36U /*!< DMAMUX1 SAI1 A request */ -#define DMA_REQUEST_SAI1_B 37U /*!< DMAMUX1 SAI1 B request */ -#define DMA_REQUEST_SAI2_A 38U /*!< DMAMUX1 SAI2 A request */ -#define DMA_REQUEST_SAI2_B 39U /*!< DMAMUX1 SAI2 B request */ - -#define DMA_REQUEST_OCTOSPI1 40U /*!< DMAMUX1 OCTOSPI1 request */ -#define DMA_REQUEST_OCTOSPI2 41U /*!< DMAMUX1 OCTOSPI2 request */ - -#define DMA_REQUEST_TIM1_CH1 42U /*!< DMAMUX1 TIM1 CH1 request */ -#define DMA_REQUEST_TIM1_CH2 43U /*!< DMAMUX1 TIM1 CH2 request */ -#define DMA_REQUEST_TIM1_CH3 44U /*!< DMAMUX1 TIM1 CH3 request */ -#define DMA_REQUEST_TIM1_CH4 45U /*!< DMAMUX1 TIM1 CH4 request */ -#define DMA_REQUEST_TIM1_UP 46U /*!< DMAMUX1 TIM1 UP request */ -#define DMA_REQUEST_TIM1_TRIG 47U /*!< DMAMUX1 TIM1 TRIG request */ -#define DMA_REQUEST_TIM1_COM 48U /*!< DMAMUX1 TIM1 COM request */ - -#define DMA_REQUEST_TIM8_CH1 49U /*!< DMAMUX1 TIM8 CH1 request */ -#define DMA_REQUEST_TIM8_CH2 50U /*!< DMAMUX1 TIM8 CH2 request */ -#define DMA_REQUEST_TIM8_CH3 51U /*!< DMAMUX1 TIM8 CH3 request */ -#define DMA_REQUEST_TIM8_CH4 52U /*!< DMAMUX1 TIM8 CH4 request */ -#define DMA_REQUEST_TIM8_UP 53U /*!< DMAMUX1 TIM8 UP request */ -#define DMA_REQUEST_TIM8_TRIG 54U /*!< DMAMUX1 TIM8 TRIG request */ -#define DMA_REQUEST_TIM8_COM 55U /*!< DMAMUX1 TIM8 COM request */ - -#define DMA_REQUEST_TIM2_CH1 56U /*!< DMAMUX1 TIM2 CH1 request */ -#define DMA_REQUEST_TIM2_CH2 57U /*!< DMAMUX1 TIM2 CH2 request */ -#define DMA_REQUEST_TIM2_CH3 58U /*!< DMAMUX1 TIM2 CH3 request */ -#define DMA_REQUEST_TIM2_CH4 59U /*!< DMAMUX1 TIM2 CH4 request */ -#define DMA_REQUEST_TIM2_UP 60U /*!< DMAMUX1 TIM2 UP request */ - -#define DMA_REQUEST_TIM3_CH1 61U /*!< DMAMUX1 TIM3 CH1 request */ -#define DMA_REQUEST_TIM3_CH2 62U /*!< DMAMUX1 TIM3 CH2 request */ -#define DMA_REQUEST_TIM3_CH3 63U /*!< DMAMUX1 TIM3 CH3 request */ -#define DMA_REQUEST_TIM3_CH4 64U /*!< DMAMUX1 TIM3 CH4 request */ -#define DMA_REQUEST_TIM3_UP 65U /*!< DMAMUX1 TIM3 UP request */ -#define DMA_REQUEST_TIM3_TRIG 66U /*!< DMAMUX1 TIM3 TRIG request */ - -#define DMA_REQUEST_TIM4_CH1 67U /*!< DMAMUX1 TIM4 CH1 request */ -#define DMA_REQUEST_TIM4_CH2 68U /*!< DMAMUX1 TIM4 CH2 request */ -#define DMA_REQUEST_TIM4_CH3 69U /*!< DMAMUX1 TIM4 CH3 request */ -#define DMA_REQUEST_TIM4_CH4 70U /*!< DMAMUX1 TIM4 CH4 request */ -#define DMA_REQUEST_TIM4_UP 71U /*!< DMAMUX1 TIM4 UP request */ - -#define DMA_REQUEST_TIM5_CH1 72U /*!< DMAMUX1 TIM5 CH1 request */ -#define DMA_REQUEST_TIM5_CH2 73U /*!< DMAMUX1 TIM5 CH2 request */ -#define DMA_REQUEST_TIM5_CH3 74U /*!< DMAMUX1 TIM5 CH3 request */ -#define DMA_REQUEST_TIM5_CH4 75U /*!< DMAMUX1 TIM5 CH4 request */ -#define DMA_REQUEST_TIM5_UP 76U /*!< DMAMUX1 TIM5 UP request */ -#define DMA_REQUEST_TIM5_TRIG 77U /*!< DMAMUX1 TIM5 TRIG request */ - -#define DMA_REQUEST_TIM15_CH1 78U /*!< DMAMUX1 TIM15 CH1 request */ -#define DMA_REQUEST_TIM15_UP 79U /*!< DMAMUX1 TIM15 UP request */ -#define DMA_REQUEST_TIM15_TRIG 80U /*!< DMAMUX1 TIM15 TRIG request */ -#define DMA_REQUEST_TIM15_COM 81U /*!< DMAMUX1 TIM15 COM request */ - -#define DMA_REQUEST_TIM16_CH1 82U /*!< DMAMUX1 TIM16 CH1 request */ -#define DMA_REQUEST_TIM16_UP 83U /*!< DMAMUX1 TIM16 UP request */ -#define DMA_REQUEST_TIM17_CH1 84U /*!< DMAMUX1 TIM17 CH1 request */ -#define DMA_REQUEST_TIM17_UP 85U /*!< DMAMUX1 TIM17 UP request */ - -#define DMA_REQUEST_DFSDM1_FLT0 86U /*!< DMAMUX1 DFSDM1 Filter0 request */ -#define DMA_REQUEST_DFSDM1_FLT1 87U /*!< DMAMUX1 DFSDM1 Filter1 request */ -#define DMA_REQUEST_DFSDM1_FLT2 88U /*!< DMAMUX1 DFSDM1 Filter2 request */ -#define DMA_REQUEST_DFSDM1_FLT3 89U /*!< DMAMUX1 DFSDM1 Filter3 request */ - -#define DMA_REQUEST_DCMI 90U /*!< DMAMUX1 DCMI request */ - -#define DMA_REQUEST_AES_IN 91U /*!< DMAMUX1 AES IN request */ -#define DMA_REQUEST_AES_OUT 92U /*!< DMAMUX1 AES OUT request */ - -#define DMA_REQUEST_HASH_IN 93U /*!< DMAMUX1 HASH IN request */ - -#endif /* DMAMUX1 */ - -/** - * @} - */ - -/** @defgroup DMA_Data_transfer_direction DMA Data transfer direction - * @{ - */ -#define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */ -#define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */ -#define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction */ -/** - * @} - */ - -/** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode - * @{ - */ -#define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */ -#define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */ -/** - * @} - */ - -/** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode - * @{ - */ -#define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */ -#define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */ -/** - * @} - */ - -/** @defgroup DMA_Peripheral_data_size DMA Peripheral data size - * @{ - */ -#define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */ -#define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */ -#define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */ -/** - * @} - */ - -/** @defgroup DMA_Memory_data_size DMA Memory data size - * @{ - */ -#define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */ -#define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */ -#define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */ -/** - * @} - */ - -/** @defgroup DMA_mode DMA mode - * @{ - */ -#define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */ -#define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular mode */ -/** - * @} - */ - -/** @defgroup DMA_Priority_level DMA Priority level - * @{ - */ -#define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */ -#define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */ -#define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */ -#define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */ -/** - * @} - */ - - -/** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions - * @{ - */ -#define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE) -#define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE) -#define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE) -/** - * @} - */ - -/** @defgroup DMA_flag_definitions DMA flag definitions - * @{ - */ -#define DMA_FLAG_GL1 ((uint32_t)0x00000001) -#define DMA_FLAG_TC1 ((uint32_t)0x00000002) -#define DMA_FLAG_HT1 ((uint32_t)0x00000004) -#define DMA_FLAG_TE1 ((uint32_t)0x00000008) -#define DMA_FLAG_GL2 ((uint32_t)0x00000010) -#define DMA_FLAG_TC2 ((uint32_t)0x00000020) -#define DMA_FLAG_HT2 ((uint32_t)0x00000040) -#define DMA_FLAG_TE2 ((uint32_t)0x00000080) -#define DMA_FLAG_GL3 ((uint32_t)0x00000100) -#define DMA_FLAG_TC3 ((uint32_t)0x00000200) -#define DMA_FLAG_HT3 ((uint32_t)0x00000400) -#define DMA_FLAG_TE3 ((uint32_t)0x00000800) -#define DMA_FLAG_GL4 ((uint32_t)0x00001000) -#define DMA_FLAG_TC4 ((uint32_t)0x00002000) -#define DMA_FLAG_HT4 ((uint32_t)0x00004000) -#define DMA_FLAG_TE4 ((uint32_t)0x00008000) -#define DMA_FLAG_GL5 ((uint32_t)0x00010000) -#define DMA_FLAG_TC5 ((uint32_t)0x00020000) -#define DMA_FLAG_HT5 ((uint32_t)0x00040000) -#define DMA_FLAG_TE5 ((uint32_t)0x00080000) -#define DMA_FLAG_GL6 ((uint32_t)0x00100000) -#define DMA_FLAG_TC6 ((uint32_t)0x00200000) -#define DMA_FLAG_HT6 ((uint32_t)0x00400000) -#define DMA_FLAG_TE6 ((uint32_t)0x00800000) -#define DMA_FLAG_GL7 ((uint32_t)0x01000000) -#define DMA_FLAG_TC7 ((uint32_t)0x02000000) -#define DMA_FLAG_HT7 ((uint32_t)0x04000000) -#define DMA_FLAG_TE7 ((uint32_t)0x08000000) -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup DMA_Exported_Macros DMA Exported Macros - * @{ - */ - -/** @brief Reset DMA handle state. - * @param __HANDLE__: DMA handle - * @retval None - */ -#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET) - -/** - * @brief Enable the specified DMA Channel. - * @param __HANDLE__: DMA handle - * @retval None - */ -#define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN) - -/** - * @brief Disable the specified DMA Channel. - * @param __HANDLE__: DMA handle - * @retval None - */ -#define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN) - - -/* Interrupt & Flag management */ - -/** - * @brief Return the current DMA Channel transfer complete flag. - * @param __HANDLE__: DMA handle - * @retval The specified transfer complete flag index. - */ - -#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ -(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TC5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TC6 :\ - DMA_FLAG_TC7) - -/** - * @brief Return the current DMA Channel half transfer complete flag. - * @param __HANDLE__: DMA handle - * @retval The specified half transfer complete flag index. - */ -#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ -(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_HT5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_HT6 :\ - DMA_FLAG_HT7) - -/** - * @brief Return the current DMA Channel transfer error flag. - * @param __HANDLE__: DMA handle - * @retval The specified transfer error flag index. - */ -#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ -(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TE5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TE6 :\ - DMA_FLAG_TE7) - -/** - * @brief Return the current DMA Channel Global interrupt flag. - * @param __HANDLE__: DMA handle - * @retval The specified transfer error flag index. - */ -#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ -(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_ISR_GIF1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_ISR_GIF2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_ISR_GIF3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_ISR_GIF4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_ISR_GIF5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_ISR_GIF6 :\ - DMA_ISR_GIF7) - -/** - * @brief Get the DMA Channel pending flags. - * @param __HANDLE__: DMA handle - * @param __FLAG__: Get the specified flag. - * This parameter can be any combination of the following values: - * @arg DMA_FLAG_TCx: Transfer complete flag - * @arg DMA_FLAG_HTx: Half transfer complete flag - * @arg DMA_FLAG_TEx: Transfer error flag - * @arg DMA_FLAG_GLx: Global interrupt flag - * Where x can be from 1 to 7 to select the DMA Channel x flag. - * @retval The state of FLAG (SET or RESET). - */ -#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \ - (DMA2->ISR & (__FLAG__)) : (DMA1->ISR & (__FLAG__))) - -/** - * @brief Clear the DMA Channel pending flags. - * @param __HANDLE__: DMA handle - * @param __FLAG__: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg DMA_FLAG_TCx: Transfer complete flag - * @arg DMA_FLAG_HTx: Half transfer complete flag - * @arg DMA_FLAG_TEx: Transfer error flag - * @arg DMA_FLAG_GLx: Global interrupt flag - * Where x can be from 1 to 7 to select the DMA Channel x flag. - * @retval None - */ -#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \ - (DMA2->IFCR = (__FLAG__)) : (DMA1->IFCR = (__FLAG__))) - -/** - * @brief Enable the specified DMA Channel interrupts. - * @param __HANDLE__: DMA handle - * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg DMA_IT_TC: Transfer complete interrupt mask - * @arg DMA_IT_HT: Half transfer complete interrupt mask - * @arg DMA_IT_TE: Transfer error interrupt mask - * @retval None - */ -#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__)) - -/** - * @brief Disable the specified DMA Channel interrupts. - * @param __HANDLE__: DMA handle - * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg DMA_IT_TC: Transfer complete interrupt mask - * @arg DMA_IT_HT: Half transfer complete interrupt mask - * @arg DMA_IT_TE: Transfer error interrupt mask - * @retval None - */ -#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified DMA Channel interrupt is enabled or not. - * @param __HANDLE__: DMA handle - * @param __INTERRUPT__: specifies the DMA interrupt source to check. - * This parameter can be one of the following values: - * @arg DMA_IT_TC: Transfer complete interrupt mask - * @arg DMA_IT_HT: Half transfer complete interrupt mask - * @arg DMA_IT_TE: Transfer error interrupt mask - * @retval The state of DMA_IT (SET or RESET). - */ -#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__))) - -/** - * @brief Return the number of remaining data units in the current DMA Channel transfer. - * @param __HANDLE__: DMA handle - * @retval The number of remaining data units in the current DMA Channel transfer. - */ -#define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR) - -/** - * @} - */ - -#if defined(DMAMUX1) -/* Include DMA HAL Extension module */ -#include "stm32l4xx_hal_dma_ex.h" -#endif /* DMAMUX1 */ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup DMA_Exported_Functions - * @{ - */ - -/** @addtogroup DMA_Exported_Functions_Group1 - * @{ - */ -/* Initialization and de-initialization functions *****************************/ -HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma); -HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma); -/** - * @} - */ - -/** @addtogroup DMA_Exported_Functions_Group2 - * @{ - */ -/* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); -HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); -HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma); -HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma); -HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout); -void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma); -HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma)); -HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID); - -/** - * @} - */ - -/** @addtogroup DMA_Exported_Functions_Group3 - * @{ - */ -/* Peripheral State and Error functions ***************************************/ -HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma); -uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma); -/** - * @} - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup DMA_Private_Macros DMA Private Macros - * @{ - */ - -#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \ - ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \ - ((DIRECTION) == DMA_MEMORY_TO_MEMORY)) - -#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) - -#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \ - ((STATE) == DMA_PINC_DISABLE)) - -#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \ - ((STATE) == DMA_MINC_DISABLE)) - -#if !defined (DMAMUX1) - -#define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \ - ((REQUEST) == DMA_REQUEST_1) || \ - ((REQUEST) == DMA_REQUEST_2) || \ - ((REQUEST) == DMA_REQUEST_3) || \ - ((REQUEST) == DMA_REQUEST_4) || \ - ((REQUEST) == DMA_REQUEST_5) || \ - ((REQUEST) == DMA_REQUEST_6) || \ - ((REQUEST) == DMA_REQUEST_7)) -#endif - -#if defined(DMAMUX1) - -#define IS_DMA_ALL_REQUEST(REQUEST)((REQUEST) <= DMA_REQUEST_HASH_IN) - -#endif /* DMAMUX1 */ - -#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \ - ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \ - ((SIZE) == DMA_PDATAALIGN_WORD)) - -#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \ - ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \ - ((SIZE) == DMA_MDATAALIGN_WORD )) - -#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \ - ((MODE) == DMA_CIRCULAR)) - -#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \ - ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \ - ((PRIORITY) == DMA_PRIORITY_HIGH) || \ - ((PRIORITY) == DMA_PRIORITY_VERY_HIGH)) - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_DMA_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h deleted file mode 100644 index 0ce4b2ae..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h +++ /dev/null @@ -1,298 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dma_ex.h - * @author MCD Application Team - * @brief Header file of DMA HAL extension module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_DMA_EX_H -#define __STM32L4xx_HAL_DMA_EX_H - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(DMAMUX1) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup DMAEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup DMAEx_Exported_Types DMAEx Exported Types - * @{ - */ - -/** - * @brief HAL DMA Synchro definition - */ - - -/** - * @brief HAL DMAMUX Synchronization configuration structure definition - */ -typedef struct -{ - uint32_t SyncSignalID; /*!< Specifies the synchronization signal gating the DMA request in periodic mode. - This parameter can be a value of @ref DMAEx_DMAMUX_SyncSignalID_selection */ - - uint32_t SyncPolarity; /*!< Specifies the polarity of the signal on which the DMA request is synchronized. - This parameter can be a value of @ref DMAEx_DMAMUX_SyncPolarity_selection */ - - FunctionalState SyncEnable; /*!< Specifies if the synchronization shall be enabled or disabled - This parameter can take the value ENABLE or DISABLE*/ - - - FunctionalState EventEnable; /*!< Specifies if an event shall be generated once the RequestNumber is reached. - This parameter can take the value ENABLE or DISABLE */ - - uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be authorized after a sync event - This parameter must be a number between Min_Data = 1 and Max_Data = 32 */ - - -}HAL_DMA_MuxSyncConfigTypeDef; - - -/** - * @brief HAL DMAMUX request generator parameters structure definition - */ -typedef struct -{ - uint32_t SignalID; /*!< Specifies the ID of the signal used for DMAMUX request generator - This parameter can be a value of @ref DMAEx_DMAMUX_SignalGeneratorID_selection */ - - uint32_t Polarity; /*!< Specifies the polarity of the signal on which the request is generated. - This parameter can be a value of @ref DMAEx_DMAMUX_RequestGeneneratorPolarity_selection */ - - uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be generated after a signal event - This parameter must be a number between Min_Data = 1 and Max_Data = 32 */ - -}HAL_DMA_MuxRequestGeneratorConfigTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup DMAEx_Exported_Constants DMAEx Exported Constants - * @{ - */ - -/** @defgroup DMAEx_DMAMUX_SyncSignalID_selection DMAMUX SyncSignalID selection - * @{ - */ -#define HAL_DMAMUX1_SYNC_EXTI0 0U /*!< Synchronization Signal is EXTI0 IT */ -#define HAL_DMAMUX1_SYNC_EXTI1 1U /*!< Synchronization Signal is EXTI1 IT */ -#define HAL_DMAMUX1_SYNC_EXTI2 2U /*!< Synchronization Signal is EXTI2 IT */ -#define HAL_DMAMUX1_SYNC_EXTI3 3U /*!< Synchronization Signal is EXTI3 IT */ -#define HAL_DMAMUX1_SYNC_EXTI4 4U /*!< Synchronization Signal is EXTI4 IT */ -#define HAL_DMAMUX1_SYNC_EXTI5 5U /*!< Synchronization Signal is EXTI5 IT */ -#define HAL_DMAMUX1_SYNC_EXTI6 6U /*!< Synchronization Signal is EXTI6 IT */ -#define HAL_DMAMUX1_SYNC_EXTI7 7U /*!< Synchronization Signal is EXTI7 IT */ -#define HAL_DMAMUX1_SYNC_EXTI8 8U /*!< Synchronization Signal is EXTI8 IT */ -#define HAL_DMAMUX1_SYNC_EXTI9 9U /*!< Synchronization Signal is EXTI9 IT */ -#define HAL_DMAMUX1_SYNC_EXTI10 10U /*!< Synchronization Signal is EXTI10 IT */ -#define HAL_DMAMUX1_SYNC_EXTI11 11U /*!< Synchronization Signal is EXTI11 IT */ -#define HAL_DMAMUX1_SYNC_EXTI12 12U /*!< Synchronization Signal is EXTI12 IT */ -#define HAL_DMAMUX1_SYNC_EXTI13 13U /*!< Synchronization Signal is EXTI13 IT */ -#define HAL_DMAMUX1_SYNC_EXTI14 14U /*!< Synchronization Signal is EXTI14 IT */ -#define HAL_DMAMUX1_SYNC_EXTI15 15U /*!< Synchronization Signal is EXTI15 IT */ -#define HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT 16U /*!< Synchronization Signal is DMAMUX1 Channel0 Event */ -#define HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT 17U /*!< Synchronization Signal is DMAMUX1 Channel1 Event */ -#define HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT 18U /*!< Synchronization Signal is DMAMUX1 Channel2 Event */ -#define HAL_DMAMUX1_SYNC_DMAMUX1_CH3_EVT 19U /*!< Synchronization Signal is DMAMUX1 Channel3 Event */ -#define HAL_DMAMUX1_SYNC_LPTIM1_OUT 20U /*!< Synchronization Signal is LPTIM1 OUT */ -#define HAL_DMAMUX1_SYNC_LPTIM2_OUT 21U /*!< Synchronization Signal is LPTIM2 OUT */ -#define HAL_DMAMUX1_SYNC_DSI_TE 22U /*!< Synchronization Signal is DSI Tearing Effect */ -#define HAL_DMAMUX1_SYNC_DSI_EOT 23U /*!< Synchronization Signal is DSI End of refresh */ -#define HAL_DMAMUX1_SYNC_DMA2D_EOT 24U /*!< Synchronization Signal is DMA2D End of Transfer */ -#define HAL_DMAMUX1_SYNC_LDTC_IT 25U /*!< Synchronization Signal is LDTC IT */ - -/** - * @} - */ - -/** @defgroup DMAEx_DMAMUX_SyncPolarity_selection DMAMUX SyncPolarity selection - * @{ - */ -#define HAL_DMAMUX_SYNC_NO_EVENT 0U /*!< block synchronization events */ -#define HAL_DMAMUX_SYNC_RISING ((uint32_t)DMAMUX_CxCR_SPOL_0) /*!< synchronize with rising edge events */ -#define HAL_DMAMUX_SYNC_FALLING ((uint32_t)DMAMUX_CxCR_SPOL_1) /*!< synchronize with falling edge events */ -#define HAL_DMAMUX_SYNC_RISING_FALLING ((uint32_t)DMAMUX_CxCR_SPOL) /*!< synchronize with rising and falling edge events */ - -/** - * @} - */ - -/** @defgroup DMAEx_DMAMUX_SignalGeneratorID_selection DMAMUX SignalGeneratorID selection - * @{ - */ - -#define HAL_DMAMUX1_REQUEST_GEN_EXTI0 0U /*!< Request generator Signal is EXTI0 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI1 1U /*!< Request generator Signal is EXTI1 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI2 2U /*!< Request generator Signal is EXTI2 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI3 3U /*!< Request generator Signal is EXTI3 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI4 4U /*!< Request generator Signal is EXTI4 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI5 5U /*!< Request generator Signal is EXTI5 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI6 6U /*!< Request generator Signal is EXTI6 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI7 7U /*!< Request generator Signal is EXTI7 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI8 8U /*!< Request generator Signal is EXTI8 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI9 9U /*!< Request generator Signal is EXTI9 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI10 10U /*!< Request generator Signal is EXTI10 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI11 11U /*!< Request generator Signal is EXTI11 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI12 12U /*!< Request generator Signal is EXTI12 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI13 13U /*!< Request generator Signal is EXTI13 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI14 14U /*!< Request generator Signal is EXTI14 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI15 15U /*!< Request generator Signal is EXTI15 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT 16U /*!< Request generator Signal is DMAMUX1 Channel0 Event */ -#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT 17U /*!< Request generator Signal is DMAMUX1 Channel1 Event */ -#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT 18U /*!< Request generator Signal is DMAMUX1 Channel2 Event */ -#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH3_EVT 19U /*!< Request generator Signal is DMAMUX1 Channel3 Event */ -#define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT 20U /*!< Request generator Signal is LPTIM1 OUT */ -#define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT 21U /*!< Request generator Signal is LPTIM2 OUT */ -#define HAL_DMAMUX1_REQUEST_GEN_DSI_TE 22U /*!< Request generator Signal is DSI Tearing Effect */ -#define HAL_DMAMUX1_REQUEST_GEN_DSI_EOT 23U /*!< Request generator Signal is DSI End of refresh */ -#define HAL_DMAMUX1_REQUEST_GEN_DMA2D_EOT 24U /*!< Request generator Signal is DMA2D End of Transfer */ -#define HAL_DMAMUX1_REQUEST_GEN_LTDC_IT 25U /*!< Request generator Signal is LTDC IT */ - -/** - * @} - */ - -/** @defgroup DMAEx_DMAMUX_RequestGeneneratorPolarity_selection DMAMUX RequestGeneneratorPolarity selection - * @{ - */ -#define HAL_DMAMUX_REQUEST_GEN_NO_EVENT 0U /*!< block request generator events */ -#define HAL_DMAMUX_REQUEST_GEN_RISING DMAMUX_RGxCR_GPOL_0 /*!< generate request on rising edge events */ -#define HAL_DMAMUX_REQUEST_GEN_FALLING DMAMUX_RGxCR_GPOL_1 /*!< generate request on falling edge events */ -#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING DMAMUX_RGxCR_GPOL /*!< generate request on rising and falling edge events */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup DMAEx_Exported_Functions - * @{ - */ - -/* IO operation functions *****************************************************/ -/** @addtogroup DMAEx_Exported_Functions_Group1 - * @{ - */ - -/* ------------------------- REQUEST -----------------------------------------*/ -HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, - HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig); -HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma); -HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma); -/* -------------------------------------------------------------------------- */ - -/* ------------------------- SYNCHRO -----------------------------------------*/ -HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig); -/* -------------------------------------------------------------------------- */ - -void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma); - -/** - * @} - */ - -/** - * @} - */ - - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup DMAEx_Private_Macros DMAEx Private Macros - * @brief DMAEx private macros - * @{ - */ - -#define IS_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_SYNC_LDTC_IT) - -#define IS_DMAMUX_SYNC_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0) && ((REQUEST_NUMBER) <= 32)) - -#define IS_DMAMUX_SYNC_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_SYNC_NO_EVENT) || \ - ((POLARITY) == HAL_DMAMUX_SYNC_RISING) || \ - ((POLARITY) == HAL_DMAMUX_SYNC_FALLING) || \ - ((POLARITY) == HAL_DMAMUX_SYNC_RISING_FALLING)) - -#define IS_DMAMUX_SYNC_STATE(SYNC) (((SYNC) == DISABLE) || ((SYNC) == ENABLE)) - -#define IS_DMAMUX_SYNC_EVENT(EVENT) (((EVENT) == DISABLE) || \ - ((EVENT) == ENABLE)) - -#define IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_REQUEST_GEN_LTDC_IT) - -#define IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0) && ((REQUEST_NUMBER) <= 32)) - -#define IS_DMAMUX_REQUEST_GEN_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_REQUEST_GEN_NO_EVENT) || \ - ((POLARITY) == HAL_DMAMUX_REQUEST_GEN_RISING) || \ - ((POLARITY) == HAL_DMAMUX_REQUEST_GEN_FALLING) || \ - ((POLARITY) == HAL_DMAMUX_REQUEST_GEN_RISING_FALLING)) - -/** - * @} - */ - - -/** - * @} - */ - -/** - * @} - */ - -#endif /* DMAMUX1 */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_DMA_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h deleted file mode 100644 index ef4ea304..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h +++ /dev/null @@ -1,1022 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash.h - * @author MCD Application Team - * @brief Header file of FLASH HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_FLASH_H -#define __STM32L4xx_HAL_FLASH_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup FLASH - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup FLASH_Exported_Types FLASH Exported Types - * @{ - */ - -/** - * @brief FLASH Erase structure definition - */ -typedef struct -{ - uint32_t TypeErase; /*!< Mass erase or page erase. - This parameter can be a value of @ref FLASH_Type_Erase */ - uint32_t Banks; /*!< Select bank to erase. - This parameter must be a value of @ref FLASH_Banks - (FLASH_BANK_BOTH should be used only for mass erase) */ - uint32_t Page; /*!< Initial Flash page to erase when page erase is disabled - This parameter must be a value between 0 and (max number of pages in the bank - 1) - (eg : 255 for 1MB dual bank) */ - uint32_t NbPages; /*!< Number of pages to be erased. - This parameter must be a value between 1 and (max number of pages in the bank - value of initial page)*/ -} FLASH_EraseInitTypeDef; - -/** - * @brief FLASH Option Bytes Program structure definition - */ -typedef struct -{ - uint32_t OptionType; /*!< Option byte to be configured. - This parameter can be a combination of the values of @ref FLASH_OB_Type */ - uint32_t WRPArea; /*!< Write protection area to be programmed (used for OPTIONBYTE_WRP). - Only one WRP area could be programmed at the same time. - This parameter can be value of @ref FLASH_OB_WRP_Area */ - uint32_t WRPStartOffset; /*!< Write protection start offset (used for OPTIONBYTE_WRP). - This parameter must be a value between 0 and (max number of pages in the bank - 1) - (eg : 25 for 1MB dual bank) */ - uint32_t WRPEndOffset; /*!< Write protection end offset (used for OPTIONBYTE_WRP). - This parameter must be a value between WRPStartOffset and (max number of pages in the bank - 1) */ - uint32_t RDPLevel; /*!< Set the read protection level.. (used for OPTIONBYTE_RDP). - This parameter can be a value of @ref FLASH_OB_Read_Protection */ - uint32_t USERType; /*!< User option byte(s) to be configured (used for OPTIONBYTE_USER). - This parameter can be a combination of @ref FLASH_OB_USER_Type */ - uint32_t USERConfig; /*!< Value of the user option byte (used for OPTIONBYTE_USER). - This parameter can be a combination of @ref FLASH_OB_USER_BOR_LEVEL, - @ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY, - @ref FLASH_OB_USER_nRST_SHUTDOWN, @ref FLASH_OB_USER_IWDG_SW, - @ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY, - @ref FLASH_OB_USER_WWDG_SW, @ref FLASH_OB_USER_BFB2, - @ref FLASH_OB_USER_DUALBANK, @ref FLASH_OB_USER_nBOOT1, - @ref FLASH_OB_USER_SRAM2_PE and @ref FLASH_OB_USER_SRAM2_RST */ - uint32_t PCROPConfig; /*!< Configuration of the PCROP (used for OPTIONBYTE_PCROP). - This parameter must be a combination of @ref FLASH_Banks (except FLASH_BANK_BOTH) - and @ref FLASH_OB_PCROP_RDP */ - uint32_t PCROPStartAddr; /*!< PCROP Start address (used for OPTIONBYTE_PCROP). - This parameter must be a value between begin and end of bank - => Be careful of the bank swapping for the address */ - uint32_t PCROPEndAddr; /*!< PCROP End address (used for OPTIONBYTE_PCROP). - This parameter must be a value between PCROP Start address and end of bank */ -} FLASH_OBProgramInitTypeDef; - -/** - * @brief FLASH Procedure structure definition - */ -typedef enum -{ - FLASH_PROC_NONE = 0, - FLASH_PROC_PAGE_ERASE, - FLASH_PROC_MASS_ERASE, - FLASH_PROC_PROGRAM, - FLASH_PROC_PROGRAM_LAST -} FLASH_ProcedureTypeDef; - -/** - * @brief FLASH Cache structure definition - */ -typedef enum -{ - FLASH_CACHE_DISABLED = 0, - FLASH_CACHE_ICACHE_ENABLED, - FLASH_CACHE_DCACHE_ENABLED, - FLASH_CACHE_ICACHE_DCACHE_ENABLED -} FLASH_CacheTypeDef; - -/** - * @brief FLASH handle Structure definition - */ -typedef struct -{ - HAL_LockTypeDef Lock; /* FLASH locking object */ - __IO uint32_t ErrorCode; /* FLASH error code */ - __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /* Internal variable to indicate which procedure is ongoing or not in IT context */ - __IO uint32_t Address; /* Internal variable to save address selected for program in IT context */ - __IO uint32_t Bank; /* Internal variable to save current bank selected during erase in IT context */ - __IO uint32_t Page; /* Internal variable to define the current page which is erasing in IT context */ - __IO uint32_t NbPagesToErase; /* Internal variable to save the remaining pages to erase in IT context */ - __IO FLASH_CacheTypeDef CacheToReactivate; /* Internal variable to indicate which caches should be reactivated */ -}FLASH_ProcessTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup FLASH_Exported_Constants FLASH Exported Constants - * @{ - */ - -/** @defgroup FLASH_Error FLASH Error - * @{ - */ -#define HAL_FLASH_ERROR_NONE ((uint32_t)0x00000000) -#define HAL_FLASH_ERROR_OP ((uint32_t)0x00000001) -#define HAL_FLASH_ERROR_PROG ((uint32_t)0x00000002) -#define HAL_FLASH_ERROR_WRP ((uint32_t)0x00000004) -#define HAL_FLASH_ERROR_PGA ((uint32_t)0x00000008) -#define HAL_FLASH_ERROR_SIZ ((uint32_t)0x00000010) -#define HAL_FLASH_ERROR_PGS ((uint32_t)0x00000020) -#define HAL_FLASH_ERROR_MIS ((uint32_t)0x00000040) -#define HAL_FLASH_ERROR_FAST ((uint32_t)0x00000080) -#define HAL_FLASH_ERROR_RD ((uint32_t)0x00000100) -#define HAL_FLASH_ERROR_OPTV ((uint32_t)0x00000200) -#define HAL_FLASH_ERROR_ECCD ((uint32_t)0x00000400) -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define HAL_FLASH_ERROR_PEMPTY ((uint32_t)0x00000800) -#endif -/** - * @} - */ - -/** @defgroup FLASH_Type_Erase FLASH Erase Type - * @{ - */ -#define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!> 24) /*!< ECC Correction Interrupt source */ -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup FLASH_Exported_Macros FLASH Exported Macros - * @brief macros to control FLASH features - * @{ - */ - -/** - * @brief Set the FLASH Latency. - * @param __LATENCY__: FLASH Latency - * This parameter can be one of the following values : - * @arg FLASH_LATENCY_0: FLASH Zero wait state - * @arg FLASH_LATENCY_1: FLASH One wait state - * @arg FLASH_LATENCY_2: FLASH Two wait states - * @arg FLASH_LATENCY_3: FLASH Three wait states - * @arg FLASH_LATENCY_4: FLASH Four wait states - * @retval None - */ -#define __HAL_FLASH_SET_LATENCY(__LATENCY__) (MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (__LATENCY__))) - -/** - * @brief Get the FLASH Latency. - * @retval FLASH Latency - * This parameter can be one of the following values : - * @arg FLASH_LATENCY_0: FLASH Zero wait state - * @arg FLASH_LATENCY_1: FLASH One wait state - * @arg FLASH_LATENCY_2: FLASH Two wait states - * @arg FLASH_LATENCY_3: FLASH Three wait states - * @arg FLASH_LATENCY_4: FLASH Four wait states - */ -#define __HAL_FLASH_GET_LATENCY() READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) - -/** - * @brief Enable the FLASH prefetch buffer. - * @retval None - */ -#define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) - -/** - * @brief Disable the FLASH prefetch buffer. - * @retval None - */ -#define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) - -/** - * @brief Enable the FLASH instruction cache. - * @retval none - */ -#define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_ICEN) - -/** - * @brief Disable the FLASH instruction cache. - * @retval none - */ -#define __HAL_FLASH_INSTRUCTION_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN) - -/** - * @brief Enable the FLASH data cache. - * @retval none - */ -#define __HAL_FLASH_DATA_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_DCEN) - -/** - * @brief Disable the FLASH data cache. - * @retval none - */ -#define __HAL_FLASH_DATA_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCEN) - -/** - * @brief Reset the FLASH instruction Cache. - * @note This function must be used only when the Instruction Cache is disabled. - * @retval None - */ -#define __HAL_FLASH_INSTRUCTION_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_ICRST); \ - CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICRST); \ - } while (0) - -/** - * @brief Reset the FLASH data Cache. - * @note This function must be used only when the data Cache is disabled. - * @retval None - */ -#define __HAL_FLASH_DATA_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_DCRST); \ - CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCRST); \ - } while (0) - -/** - * @brief Enable the FLASH power down during Low-power run mode. - * @note Writing this bit to 0 this bit, automatically the keys are - * loss and a new unlock sequence is necessary to re-write it to 1. - */ -#define __HAL_FLASH_POWER_DOWN_ENABLE() do { WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); \ - WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); \ - SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \ - } while (0) - -/** - * @brief Disable the FLASH power down during Low-power run mode. - * @note Writing this bit to 0 this bit, automatically the keys are - * loss and a new unlock sequence is necessary to re-write it to 1. - */ -#define __HAL_FLASH_POWER_DOWN_DISABLE() do { WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); \ - WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); \ - CLEAR_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \ - } while (0) - -/** - * @brief Enable the FLASH power down during Low-Power sleep mode - * @retval none - */ -#define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) - -/** - * @brief Disable the FLASH power down during Low-Power sleep mode - * @retval none - */ -#define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) - -/** - * @} - */ - -/** @defgroup FLASH_Interrupt FLASH Interrupts Macros - * @brief macros to handle FLASH interrupts - * @{ - */ - -/** - * @brief Enable the specified FLASH interrupt. - * @param __INTERRUPT__: FLASH interrupt - * This parameter can be any combination of the following values: - * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt - * @arg FLASH_IT_OPERR: Error Interrupt - * @arg FLASH_IT_RDERR: PCROP Read Error Interrupt - * @arg FLASH_IT_ECCC: ECC Correction Interrupt - * @retval none - */ -#define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { if((__INTERRUPT__) & FLASH_IT_ECCC) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ - if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { SET_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ - } while(0) - -/** - * @brief Disable the specified FLASH interrupt. - * @param __INTERRUPT__: FLASH interrupt - * This parameter can be any combination of the following values: - * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt - * @arg FLASH_IT_OPERR: Error Interrupt - * @arg FLASH_IT_RDERR: PCROP Read Error Interrupt - * @arg FLASH_IT_ECCC: ECC Correction Interrupt - * @retval none - */ -#define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { if((__INTERRUPT__) & FLASH_IT_ECCC) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ - if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ - } while(0) - -/** - * @brief Check whether the specified FLASH flag is set or not. - * @param __FLAG__: specifies the FLASH flag to check. - * This parameter can be one of the following values: - * @arg FLASH_FLAG_EOP: FLASH End of Operation flag - * @arg FLASH_FLAG_OPERR: FLASH Operation error flag - * @arg FLASH_FLAG_PROGERR: FLASH Programming error flag - * @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag - * @arg FLASH_FLAG_PGAERR: FLASH Programming alignment error flag - * @arg FLASH_FLAG_SIZERR: FLASH Size error flag - * @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag - * @arg FLASH_FLAG_MISERR: FLASH Fast programming data miss error flag - * @arg FLASH_FLAG_FASTERR: FLASH Fast programming error flag - * @arg FLASH_FLAG_RDERR: FLASH PCROP read error flag - * @arg FLASH_FLAG_OPTVERR: FLASH Option validity error flag - * @arg FLASH_FLAG_BSY: FLASH write/erase operations in progress flag - * @arg FLASH_FLAG_PEMPTY : FLASH Boot from not programmed flash (apply only for STM32L43x/STM32L44x devices) - * @arg FLASH_FLAG_ECCC: FLASH one ECC error has been detected and corrected - * @arg FLASH_FLAG_ECCD: FLASH two ECC errors have been detected - * @retval The new state of FLASH_FLAG (SET or RESET). - */ -#define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) ? \ - (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \ - (READ_BIT(FLASH->SR, (__FLAG__)) == (__FLAG__))) - -/** - * @brief Clear the FLASH's pending flags. - * @param __FLAG__: specifies the FLASH flags to clear. - * This parameter can be any combination of the following values: - * @arg FLASH_FLAG_EOP: FLASH End of Operation flag - * @arg FLASH_FLAG_OPERR: FLASH Operation error flag - * @arg FLASH_FLAG_PROGERR: FLASH Programming error flag - * @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag - * @arg FLASH_FLAG_PGAERR: FLASH Programming alignment error flag - * @arg FLASH_FLAG_SIZERR: FLASH Size error flag - * @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag - * @arg FLASH_FLAG_MISERR: FLASH Fast programming data miss error flag - * @arg FLASH_FLAG_FASTERR: FLASH Fast programming error flag - * @arg FLASH_FLAG_RDERR: FLASH PCROP read error flag - * @arg FLASH_FLAG_OPTVERR: FLASH Option validity error flag - * @arg FLASH_FLAG_ECCC: FLASH one ECC error has been detected and corrected - * @arg FLASH_FLAG_ECCD: FLASH two ECC errors have been detected - * @arg FLASH_FLAG_ALL_ERRORS: FLASH All errors flags - * @retval None - */ -#define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { if((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { SET_BIT(FLASH->ECCR, ((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD))); }\ - if((__FLAG__) & ~(FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { WRITE_REG(FLASH->SR, ((__FLAG__) & ~(FLASH_FLAG_ECCC | FLASH_FLAG_ECCD))); }\ - } while(0) -/** - * @} - */ - -/* Include FLASH HAL Extended module */ -#include "stm32l4xx_hal_flash_ex.h" -#include "stm32l4xx_hal_flash_ramfunc.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup FLASH_Exported_Functions - * @{ - */ - -/* Program operation functions ***********************************************/ -/** @addtogroup FLASH_Exported_Functions_Group1 - * @{ - */ -HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data); -HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data); -/* FLASH IRQ handler method */ -void HAL_FLASH_IRQHandler(void); -/* Callbacks in non blocking modes */ -void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); -void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); -/** - * @} - */ - -/* Peripheral Control functions **********************************************/ -/** @addtogroup FLASH_Exported_Functions_Group2 - * @{ - */ -HAL_StatusTypeDef HAL_FLASH_Unlock(void); -HAL_StatusTypeDef HAL_FLASH_Lock(void); -/* Option bytes control */ -HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); -HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); -HAL_StatusTypeDef HAL_FLASH_OB_Launch(void); -/** - * @} - */ - -/* Peripheral State functions ************************************************/ -/** @addtogroup FLASH_Exported_Functions_Group3 - * @{ - */ -uint32_t HAL_FLASH_GetError(void); -/** - * @} - */ - -/** - * @} - */ - -/* Private constants --------------------------------------------------------*/ -/** @defgroup FLASH_Private_Constants FLASH Private Constants - * @{ - */ -#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFF)) ? (0x800 << 10) : \ - (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) << 10)) -#elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFF)) ? (0x200 << 10) : \ - (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) << 10)) -#else -#define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFF)) ? (0x400 << 10) : \ - (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) << 10)) -#endif - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define FLASH_BANK_SIZE (FLASH_SIZE >> 1) -#else -#define FLASH_BANK_SIZE (FLASH_SIZE) -#endif - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define FLASH_PAGE_SIZE ((uint32_t)0x1000) -#define FLASH_PAGE_SIZE_128_BITS ((uint32_t)0x2000) -#else -#define FLASH_PAGE_SIZE ((uint32_t)0x800) -#endif - -#define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */ -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup FLASH_Private_Macros FLASH Private Macros - * @{ - */ - -#define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \ - ((VALUE) == FLASH_TYPEERASE_MASSERASE)) - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ - ((BANK) == FLASH_BANK_2) || \ - ((BANK) == FLASH_BANK_BOTH)) - -#define IS_FLASH_BANK_EXCLUSIVE(BANK) (((BANK) == FLASH_BANK_1) || \ - ((BANK) == FLASH_BANK_2)) -#else -#define IS_FLASH_BANK(BANK) ((BANK) == FLASH_BANK_1) - -#define IS_FLASH_BANK_EXCLUSIVE(BANK) ((BANK) == FLASH_BANK_1) -#endif - -#define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD) || \ - ((VALUE) == FLASH_TYPEPROGRAM_FAST) || \ - ((VALUE) == FLASH_TYPEPROGRAM_FAST_AND_LAST)) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_BASE+0x1FFFFF)) -#else -#define IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x400) ? \ - ((ADDRESS) <= FLASH_BASE+0xFFFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? \ - ((ADDRESS) <= FLASH_BASE+0x7FFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? \ - ((ADDRESS) <= FLASH_BASE+0x3FFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? \ - ((ADDRESS) <= FLASH_BASE+0x1FFFF) : ((ADDRESS) <= FLASH_BASE+0xFFFFF)))))) -#endif - -#define IS_FLASH_OTP_ADDRESS(ADDRESS) (((ADDRESS) >= 0x1FFF7000) && ((ADDRESS) <= 0x1FFF73FF)) - -#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) || IS_FLASH_OTP_ADDRESS(ADDRESS)) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_FLASH_PAGE(PAGE) ((PAGE) < 256) -#elif defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) -#define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x400) ? ((PAGE) < 256) : \ - ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? ((PAGE) < 128) : \ - ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 64) : \ - ((PAGE) < 256))))) -#elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? ((PAGE) < 256) : \ - ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 128) : \ - ((PAGE) < 256)))) -#else -#define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 128) : \ - ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? ((PAGE) < 64) : \ - ((PAGE) < 128)))) -#endif - -#define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_PCROP))) - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB) || \ - ((VALUE) == OB_WRPAREA_BANK2_AREAA) || ((VALUE) == OB_WRPAREA_BANK2_AREAB)) -#else -#define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB)) -#endif - -#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ - ((LEVEL) == OB_RDP_LEVEL_1)/* ||\ - ((LEVEL) == OB_RDP_LEVEL_2)*/) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0xFFFF) && ((TYPE) != 0)) -#elif defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) -#define IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0x1FFF) && ((TYPE) != 0)) -#else -#define IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0x7E7F) && ((TYPE) != 0) && (((TYPE)&0x0180) == 0)) -#endif - -#define IS_OB_USER_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL_0) || ((LEVEL) == OB_BOR_LEVEL_1) || \ - ((LEVEL) == OB_BOR_LEVEL_2) || ((LEVEL) == OB_BOR_LEVEL_3) || \ - ((LEVEL) == OB_BOR_LEVEL_4)) - -#define IS_OB_USER_STOP(VALUE) (((VALUE) == OB_STOP_RST) || ((VALUE) == OB_STOP_NORST)) - -#define IS_OB_USER_STANDBY(VALUE) (((VALUE) == OB_STANDBY_RST) || ((VALUE) == OB_STANDBY_NORST)) - -#define IS_OB_USER_SHUTDOWN(VALUE) (((VALUE) == OB_SHUTDOWN_RST) || ((VALUE) == OB_SHUTDOWN_NORST)) - -#define IS_OB_USER_IWDG(VALUE) (((VALUE) == OB_IWDG_HW) || ((VALUE) == OB_IWDG_SW)) - -#define IS_OB_USER_IWDG_STOP(VALUE) (((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG_STOP_RUN)) - -#define IS_OB_USER_IWDG_STDBY(VALUE) (((VALUE) == OB_IWDG_STDBY_FREEZE) || ((VALUE) == OB_IWDG_STDBY_RUN)) - -#define IS_OB_USER_WWDG(VALUE) (((VALUE) == OB_WWDG_HW) || ((VALUE) == OB_WWDG_SW)) - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_OB_USER_BFB2(VALUE) (((VALUE) == OB_BFB2_DISABLE) || ((VALUE) == OB_BFB2_ENABLE)) - -#define IS_OB_USER_DUALBANK(VALUE) (((VALUE) == OB_DUALBANK_SINGLE) || ((VALUE) == OB_DUALBANK_DUAL)) -#endif - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_OB_USER_DBANK(VALUE) (((VALUE) == OB_DBANK_128_BITS) || ((VALUE) == OB_DBANK_64_BITS)) -#endif - -#define IS_OB_USER_BOOT1(VALUE) (((VALUE) == OB_BOOT1_SRAM) || ((VALUE) == OB_BOOT1_SYSTEM)) - -#define IS_OB_USER_SRAM2_PARITY(VALUE) (((VALUE) == OB_SRAM2_PARITY_ENABLE) || ((VALUE) == OB_SRAM2_PARITY_DISABLE)) - -#define IS_OB_USER_SRAM2_RST(VALUE) (((VALUE) == OB_SRAM2_RST_ERASE) || ((VALUE) == OB_SRAM2_RST_NOT_ERASE)) - -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || \ - defined (STM32L443xx) || defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_OB_USER_SWBOOT0(VALUE) (((VALUE) == OB_BOOT0_FROM_OB) || ((VALUE) == OB_BOOT0_FROM_PIN)) - -#define IS_OB_USER_BOOT0(VALUE) (((VALUE) == OB_BOOT0_RESET) || ((VALUE) == OB_BOOT0_SET)) -#endif - -#define IS_OB_PCROP_RDP(VALUE) (((VALUE) == OB_PCROP_RDP_NOT_ERASE) || ((VALUE) == OB_PCROP_RDP_ERASE)) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || ((LATENCY) == FLASH_LATENCY_1) || \ - ((LATENCY) == FLASH_LATENCY_2) || ((LATENCY) == FLASH_LATENCY_3) || \ - ((LATENCY) == FLASH_LATENCY_4) || ((LATENCY) == FLASH_LATENCY_5) || \ - ((LATENCY) == FLASH_LATENCY_6) || ((LATENCY) == FLASH_LATENCY_7) || \ - ((LATENCY) == FLASH_LATENCY_8) || ((LATENCY) == FLASH_LATENCY_9) || \ - ((LATENCY) == FLASH_LATENCY_10) || ((LATENCY) == FLASH_LATENCY_11) || \ - ((LATENCY) == FLASH_LATENCY_12) || ((LATENCY) == FLASH_LATENCY_13) || \ - ((LATENCY) == FLASH_LATENCY_14) || ((LATENCY) == FLASH_LATENCY_15)) -#else -#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ - ((LATENCY) == FLASH_LATENCY_1) || \ - ((LATENCY) == FLASH_LATENCY_2) || \ - ((LATENCY) == FLASH_LATENCY_3) || \ - ((LATENCY) == FLASH_LATENCY_4)) -#endif -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_FLASH_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h deleted file mode 100644 index 63d5c9fc..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h +++ /dev/null @@ -1,134 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash_ex.h - * @author MCD Application Team - * @brief Header file of FLASH HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_FLASH_EX_H -#define __STM32L4xx_HAL_FLASH_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup FLASHEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/* Exported constants --------------------------------------------------------*/ -#if defined (FLASH_CFGR_LVEN) -/** @addtogroup FLASHEx_Exported_Constants - * @{ - */ -/** @defgroup FLASHEx_LVE_PIN_CFG FLASHEx LVE pin configuration - * @{ - */ -#define FLASH_LVE_PIN_CTRL 0x00000000U /*!< LVE FLASH pin controlled by power controller */ -#define FLASH_LVE_PIN_FORCED FLASH_CFGR_LVEN /*!< LVE FLASH pin enforced to low (external SMPS used) */ -/** - * @} - */ - -/** - * @} - */ -#endif /* FLASH_CFGR_LVEN */ - -/* Exported macro ------------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup FLASHEx_Exported_Functions - * @{ - */ - -/* Extended Program operation functions *************************************/ -/** @addtogroup FLASHEx_Exported_Functions_Group1 - * @{ - */ -HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); -HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); -HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); -void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); -/** - * @} - */ - -#if defined (FLASH_CFGR_LVEN) -/** @addtogroup FLASHEx_Exported_Functions_Group2 - * @{ - */ -HAL_StatusTypeDef HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE); -/** - * @} - */ -#endif /* FLASH_CFGR_LVEN */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** - @cond 0 - */ -#if defined (FLASH_CFGR_LVEN) -#define IS_FLASH_LVE_PIN(CFG) (((CFG) == FLASH_LVE_PIN_CTRL) || ((CFG) == FLASH_LVE_PIN_FORCED)) -#endif /* FLASH_CFGR_LVEN */ -/** - @endcond - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_FLASH_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h deleted file mode 100644 index 723157f5..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h +++ /dev/null @@ -1,126 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash_ramfunc.h - * @author MCD Application Team - * @brief Header file of FLASH RAMFUNC driver. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_FLASH_RAMFUNC_H -#define __STM32L4xx_FLASH_RAMFUNC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup FLASH_RAMFUNC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/** - * @brief __RAM_FUNC definition - */ -#if defined ( __CC_ARM ) -/* ARM Compiler - ------------ - RAM functions are defined using the toolchain options. - Functions that are executed in RAM should reside in a separate source module. - Using the 'Options for File' dialog you can simply change the 'Code / Const' - area of a module to a memory space in physical RAM. - Available memory areas are declared in the 'Target' tab of the 'Options for Target' - dialog. -*/ -#define __RAM_FUNC HAL_StatusTypeDef - -#elif defined ( __ICCARM__ ) -/* ICCARM Compiler - --------------- - RAM functions are defined using a specific toolchain keyword "__ramfunc". -*/ -#define __RAM_FUNC __ramfunc HAL_StatusTypeDef - -#elif defined ( __GNUC__ ) -/* GNU Compiler - ------------ - RAM functions are defined using a specific toolchain attribute - "__attribute__((section(".RamFunc")))". -*/ -#define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc"))) - -#endif - - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup FLASH_RAMFUNC_Exported_Functions - * @{ - */ - -/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1 - * @{ - */ -/* Peripheral Control functions ************************************************/ -__RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void); -__RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void); -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -__RAM_FUNC HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig); -#endif -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_FLASH_RAMFUNC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h deleted file mode 100644 index bfae10d9..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h +++ /dev/null @@ -1,316 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_gpio.h - * @author MCD Application Team - * @brief Header file of GPIO HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_GPIO_H -#define __STM32L4xx_HAL_GPIO_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup GPIO - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup GPIO_Exported_Types GPIO Exported Types - * @{ - */ -/** - * @brief GPIO Init structure definition - */ -typedef struct -{ - uint32_t Pin; /*!< Specifies the GPIO pins to be configured. - This parameter can be any value of @ref GPIO_pins */ - - uint32_t Mode; /*!< Specifies the operating mode for the selected pins. - This parameter can be a value of @ref GPIO_mode */ - - uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins. - This parameter can be a value of @ref GPIO_pull */ - - uint32_t Speed; /*!< Specifies the speed for the selected pins. - This parameter can be a value of @ref GPIO_speed */ - - uint32_t Alternate; /*!< Peripheral to be connected to the selected pins - This parameter can be a value of @ref GPIOEx_Alternate_function_selection */ -}GPIO_InitTypeDef; - -/** - * @brief GPIO Bit SET and Bit RESET enumeration - */ -typedef enum -{ - GPIO_PIN_RESET = 0, - GPIO_PIN_SET -}GPIO_PinState; -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup GPIO_Exported_Constants GPIO Exported Constants - * @{ - */ -/** @defgroup GPIO_pins GPIO pins - * @{ - */ -#define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */ -#define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */ -#define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */ -#define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */ -#define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */ -#define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */ -#define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */ -#define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */ -#define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */ -#define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */ -#define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */ -#define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */ -#define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */ -#define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */ -#define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */ -#define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */ -#define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */ - -#define GPIO_PIN_MASK ((uint32_t)0x0000FFFF) /* PIN mask for assert test */ -/** - * @} - */ - -/** @defgroup GPIO_mode GPIO mode - * @brief GPIO Configuration Mode - * Elements values convention: 0xX0yz00YZ - * - X : GPIO mode or EXTI Mode - * - y : External IT or Event trigger detection - * - z : IO configuration on External IT or Event - * - Y : Output type (Push Pull or Open Drain) - * - Z : IO Direction mode (Input, Output, Alternate or Analog) - * @{ - */ -#define GPIO_MODE_INPUT ((uint32_t)0x00000000) /*!< Input Floating Mode */ -#define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001) /*!< Output Push Pull Mode */ -#define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011) /*!< Output Open Drain Mode */ -#define GPIO_MODE_AF_PP ((uint32_t)0x00000002) /*!< Alternate Function Push Pull Mode */ -#define GPIO_MODE_AF_OD ((uint32_t)0x00000012) /*!< Alternate Function Open Drain Mode */ -#define GPIO_MODE_ANALOG ((uint32_t)0x00000003) /*!< Analog Mode */ -#define GPIO_MODE_ANALOG_ADC_CONTROL ((uint32_t)0x0000000B) /*!< Analog Mode for ADC conversion */ -#define GPIO_MODE_IT_RISING ((uint32_t)0x10110000) /*!< External Interrupt Mode with Rising edge trigger detection */ -#define GPIO_MODE_IT_FALLING ((uint32_t)0x10210000) /*!< External Interrupt Mode with Falling edge trigger detection */ -#define GPIO_MODE_IT_RISING_FALLING ((uint32_t)0x10310000) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ -#define GPIO_MODE_EVT_RISING ((uint32_t)0x10120000) /*!< External Event Mode with Rising edge trigger detection */ -#define GPIO_MODE_EVT_FALLING ((uint32_t)0x10220000) /*!< External Event Mode with Falling edge trigger detection */ -#define GPIO_MODE_EVT_RISING_FALLING ((uint32_t)0x10320000) /*!< External Event Mode with Rising/Falling edge trigger detection */ -/** - * @} - */ - -/** @defgroup GPIO_speed GPIO speed - * @brief GPIO Output Maximum frequency - * @{ - */ -#define GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000) /*!< range up to 5 MHz, please refer to the product datasheet */ -#define GPIO_SPEED_FREQ_MEDIUM ((uint32_t)0x00000001) /*!< range 5 MHz to 25 MHz, please refer to the product datasheet */ -#define GPIO_SPEED_FREQ_HIGH ((uint32_t)0x00000002) /*!< range 25 MHz to 50 MHz, please refer to the product datasheet */ -#define GPIO_SPEED_FREQ_VERY_HIGH ((uint32_t)0x00000003) /*!< range 50 MHz to 80 MHz, please refer to the product datasheet */ -/** - * @} - */ - - /** @defgroup GPIO_pull GPIO pull - * @brief GPIO Pull-Up or Pull-Down Activation - * @{ - */ -#define GPIO_NOPULL ((uint32_t)0x00000000) /*!< No Pull-up or Pull-down activation */ -#define GPIO_PULLUP ((uint32_t)0x00000001) /*!< Pull-up activation */ -#define GPIO_PULLDOWN ((uint32_t)0x00000002) /*!< Pull-down activation */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup GPIO_Exported_Macros GPIO Exported Macros - * @{ - */ - -/** - * @brief Check whether the specified EXTI line flag is set or not. - * @param __EXTI_LINE__: specifies the EXTI line flag to check. - * This parameter can be GPIO_PIN_x where x can be(0..15) - * @retval The new state of __EXTI_LINE__ (SET or RESET). - */ -#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR1 & (__EXTI_LINE__)) - -/** - * @brief Clear the EXTI's line pending flags. - * @param __EXTI_LINE__: specifies the EXTI lines flags to clear. - * This parameter can be any combination of GPIO_PIN_x where x can be (0..15) - * @retval None - */ -#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR1 = (__EXTI_LINE__)) - -/** - * @brief Check whether the specified EXTI line is asserted or not. - * @param __EXTI_LINE__: specifies the EXTI line to check. - * This parameter can be GPIO_PIN_x where x can be(0..15) - * @retval The new state of __EXTI_LINE__ (SET or RESET). - */ -#define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR1 & (__EXTI_LINE__)) - -/** - * @brief Clear the EXTI's line pending bits. - * @param __EXTI_LINE__: specifies the EXTI lines to clear. - * This parameter can be any combination of GPIO_PIN_x where x can be (0..15) - * @retval None - */ -#define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR1 = (__EXTI_LINE__)) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @param __EXTI_LINE__: specifies the EXTI line to check. - * This parameter can be GPIO_PIN_x where x can be(0..15) - * @retval None - */ -#define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER1 |= (__EXTI_LINE__)) - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup GPIO_Private_Macros GPIO Private Macros - * @{ - */ -#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET)) - -#define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_PIN_MASK) != (uint32_t)0x00) &&\ - (((__PIN__) & ~GPIO_PIN_MASK) == (uint32_t)0x00)) - -#define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\ - ((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\ - ((__MODE__) == GPIO_MODE_OUTPUT_OD) ||\ - ((__MODE__) == GPIO_MODE_AF_PP) ||\ - ((__MODE__) == GPIO_MODE_AF_OD) ||\ - ((__MODE__) == GPIO_MODE_IT_RISING) ||\ - ((__MODE__) == GPIO_MODE_IT_FALLING) ||\ - ((__MODE__) == GPIO_MODE_IT_RISING_FALLING) ||\ - ((__MODE__) == GPIO_MODE_EVT_RISING) ||\ - ((__MODE__) == GPIO_MODE_EVT_FALLING) ||\ - ((__MODE__) == GPIO_MODE_EVT_RISING_FALLING) ||\ - ((__MODE__) == GPIO_MODE_ANALOG) ||\ - ((__MODE__) == GPIO_MODE_ANALOG_ADC_CONTROL)) - -#define IS_GPIO_SPEED(__SPEED__) (((__SPEED__) == GPIO_SPEED_FREQ_LOW) ||\ - ((__SPEED__) == GPIO_SPEED_FREQ_MEDIUM) ||\ - ((__SPEED__) == GPIO_SPEED_FREQ_HIGH) ||\ - ((__SPEED__) == GPIO_SPEED_FREQ_VERY_HIGH)) - -#define IS_GPIO_PULL(__PULL__) (((__PULL__) == GPIO_NOPULL) ||\ - ((__PULL__) == GPIO_PULLUP) || \ - ((__PULL__) == GPIO_PULLDOWN)) -/** - * @} - */ - -/* Include GPIO HAL Extended module */ -#include "stm32l4xx_hal_gpio_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup GPIO_Exported_Functions GPIO Exported Functions - * @{ - */ - -/** @addtogroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions - * @brief Initialization and Configuration functions - * @{ - */ - -/* Initialization and de-initialization functions *****************************/ -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init); -void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); - -/** - * @} - */ - -/** @addtogroup GPIO_Exported_Functions_Group2 IO operation functions - * @{ - */ - -/* IO operation functions *****************************************************/ -GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState); -void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin); -void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_GPIO_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h deleted file mode 100644 index db5d8d76..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h +++ /dev/null @@ -1,822 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_gpio_ex.h - * @author MCD Application Team - * @brief Header file of GPIO HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_GPIO_EX_H -#define __STM32L4xx_HAL_GPIO_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup GPIOEx GPIOEx - * @brief GPIO Extended HAL module driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/** @defgroup GPIOEx_Exported_Constants GPIOEx Exported Constants - * @{ - */ - -/** @defgroup GPIOEx_Alternate_function_selection GPIOEx Alternate function selection - * @{ - */ - -#if defined(STM32L431xx) || defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) -/*--------------STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/STM32L443xx---*/ -/** - * @brief AF 0 selection - */ -#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ -#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ -#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ -#if defined(STM32L433xx) || defined(STM32L443xx) -#define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */ -#endif /* STM32L433xx || STM32L443xx */ -#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ - -/** - * @brief AF 1 selection - */ -#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ -#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ -#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ -#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ - -/** - * @brief AF 2 selection - */ -#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ -#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ - -/** - * @brief AF 3 selection - */ -#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART1 Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 4 selection - */ -#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ -#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ -#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ - -/** - * @brief AF 5 selection - */ -#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ -#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ - -/** - * @brief AF 6 selection - */ -#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ -#define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */ - -/** - * @brief AF 7 selection - */ -#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ -#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ -#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ - -/** - * @brief AF 8 selection - */ -#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ - -/** - * @brief AF 9 selection - */ -#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ -#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ - -/** - * @brief AF 10 selection - */ -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) -#define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */ -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */ -#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ - -#if defined(STM32L433xx) || defined(STM32L443xx) -/** - * @brief AF 11 selection - */ -#define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */ -#endif /* STM32L433xx || STM32L443xx */ - -/** - * @brief AF 12 selection - */ -#define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */ -#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ -#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ -#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ - -/** - * @brief AF 13 selection - */ -#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ - -/** - * @brief AF 14 selection - */ -#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ -#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ -#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ - -/** - * @brief AF 15 selection - */ -#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ - -#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) - -#endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */ - -#if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) -/*--------------STM32L451xx/STM32L452xx/STM32L462xx---------------------------*/ -/** - * @brief AF 0 selection - */ -#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ -#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ -#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ -#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ - -/** - * @brief AF 1 selection - */ -#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ -#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ -#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ -#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ - -/** - * @brief AF 2 selection - */ -#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ -#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ -#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ -#define GPIO_AF2_I2C4 ((uint8_t)0x02) /* I2C4 Alternate Function mapping */ - -/** - * @brief AF 3 selection - */ -#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */ -#define GPIO_AF3_CAN1 ((uint8_t)0x03) /* CAN1 Alternate Function mapping */ -#define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */ - -/** - * @brief AF 4 selection - */ -#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ -#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ -#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ -#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */ - -/** - * @brief AF 5 selection - */ -#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ -#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ -#define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */ - -/** - * @brief AF 6 selection - */ -#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ -#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ -#define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */ - -/** - * @brief AF 7 selection - */ -#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ -#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ -#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ - -/** - * @brief AF 8 selection - */ -#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ -#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ -#define GPIO_AF8_CAN1 ((uint8_t)0x08) /* CAN1 Alternate Function mapping */ - - -/** - * @brief AF 9 selection - */ -#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ -#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ - -/** - * @brief AF 10 selection - */ -#if defined(STM32L452xx) || defined(STM32L462xx) -#define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */ -#endif /* STM32L452xx || STM32L462xx */ -#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ -#define GPIO_AF10_CAN1 ((uint8_t)0x0A) /* CAN1 Alternate Function mapping */ - -/** - * @brief AF 11 selection - */ - -/** - * @brief AF 12 selection - */ -#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ -#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ -#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ - -/** - * @brief AF 13 selection - */ -#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ - -/** - * @brief AF 14 selection - */ -#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ -#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ -#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */ -#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ - -/** - * @brief AF 15 selection - */ -#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ - -#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) - -#endif /* STM32L451xx || STM32L452xx || STM32L462xx */ - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) -/*--------------STM32L471xx/STM32L475xx/STM32L476xx/STM32L485xx/STM32L486xx---*/ -/** - * @brief AF 0 selection - */ -#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ -#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ -#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ -#if defined(STM32L476xx) || defined(STM32L486xx) -#define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */ -#endif /* STM32L476xx || STM32L486xx */ -#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ - -/** - * @brief AF 1 selection - */ -#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ -#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ -#define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */ -#define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */ -#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ -#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ - -/** - * @brief AF 2 selection - */ -#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ -#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ -#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ -#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ -#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ - -/** - * @brief AF 3 selection - */ -#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 4 selection - */ -#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ -#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ -#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ - -/** - * @brief AF 5 selection - */ -#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ -#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ - -/** - * @brief AF 6 selection - */ -#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ -#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ - -/** - * @brief AF 7 selection - */ -#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ -#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ -#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ - -/** - * @brief AF 8 selection - */ -#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ -#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */ -#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ - - -/** - * @brief AF 9 selection - */ -#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ -#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ - -/** - * @brief AF 10 selection - */ -#if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) -#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */ -#endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ -#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ - -#if defined(STM32L476xx) || defined(STM32L486xx) -/** - * @brief AF 11 selection - */ -#define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */ -#endif /* STM32L476xx || STM32L486xx */ - -/** - * @brief AF 12 selection - */ -#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */ -#define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */ -#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ -#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ -#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ - -/** - * @brief AF 13 selection - */ -#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ -#define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */ -#define GPIO_AF13_TIM8_COMP2 ((uint8_t)0x0D) /* TIM8/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 14 selection - */ -#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ -#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ -#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */ -#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM8_COMP1 ((uint8_t)0x0E) /* TIM8/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 15 selection - */ -#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ - -#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - -#if defined(STM32L496xx) || defined(STM32L4A6xx) -/*--------------------------------STM32L496xx/STM32L4A6xx---------------------*/ -/** - * @brief AF 0 selection - */ -#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ -#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ -#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ -#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ - -/** - * @brief AF 1 selection - */ -#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ -#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ -#define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */ -#define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */ -#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ -#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ - -/** - * @brief AF 2 selection - */ -#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ -#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ -#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ -#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ -#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ -#define GPIO_AF2_I2C4 ((uint8_t)0x02) /* I2C4 Alternate Function mapping */ - -/** - * @brief AF 3 selection - */ -#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF3_CAN2 ((uint8_t)0x03) /* CAN2 Alternate Function mapping */ -#define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */ -#define GPIO_AF3_QUADSPI ((uint8_t)0x03) /* QUADSPI Alternate Function mapping */ -#define GPIO_AF3_SPI2 ((uint8_t)0x03) /* SPI2 Alternate Function mapping */ -#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */ - -/** - * @brief AF 4 selection - */ -#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ -#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ -#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ -#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */ -#define GPIO_AF4_DCMI ((uint8_t)0x04) /* DCMI Alternate Function mapping */ - -/** - * @brief AF 5 selection - */ -#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ -#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ -#define GPIO_AF5_DCMI ((uint8_t)0x05) /* DCMI Alternate Function mapping */ -#define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */ -#define GPIO_AF5_QUADSPI ((uint8_t)0x05) /* QUADSPI Alternate Function mapping */ - -/** - * @brief AF 6 selection - */ -#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ -#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ -#define GPIO_AF6_I2C3 ((uint8_t)0x06) /* I2C3 Alternate Function mapping */ - -/** - * @brief AF 7 selection - */ -#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ -#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ -#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ - -/** - * @brief AF 8 selection - */ -#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ -#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */ -#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ -#define GPIO_AF8_CAN2 ((uint8_t)0x08) /* CAN2 Alternate Function mapping */ - -/** - * @brief AF 9 selection - */ -#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ -#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ - -/** - * @brief AF 10 selection - */ -#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */ -#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ -#define GPIO_AF10_CAN2 ((uint8_t)0x0A) /* CAN2 Alternate Function mapping */ -#define GPIO_AF10_DCMI ((uint8_t)0x0A) /* DCMI Alternate Function mapping */ - -/** - * @brief AF 11 selection - */ -#define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */ - -/** - * @brief AF 12 selection - */ -#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */ -#define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */ -#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ -#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ -#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ -#define GPIO_AF12_TIM1_COMP2 ((uint8_t)0x0C) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF12_TIM1_COMP1 ((uint8_t)0x0C) /* TIM1/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF12_TIM8_COMP2 ((uint8_t)0x0C) /* TIM8/COMP2 Break in Alternate Function mapping */ - -/** - * @brief AF 13 selection - */ -#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ -#define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */ -#define GPIO_AF13_TIM8_COMP2 ((uint8_t)0x0D) /* TIM8/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 14 selection - */ -#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ -#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ -#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */ -#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM8_COMP1 ((uint8_t)0x0E) /* TIM8/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 15 selection - */ -#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ - -#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) - -#endif /* STM32L496xx || STM32L4A6xx */ - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -/*---STM32L4R5xx/STM32L4R7xx/STM32L4R9xx/STM32L4S5xx/STM32L4S7xx/STM32L4S9xx--*/ -/** - * @brief AF 0 selection - */ -#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ -#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ -#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ -#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ - -/** - * @brief AF 1 selection - */ -#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ -#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ -#define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */ -#define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */ -#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ -#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ - -/** - * @brief AF 2 selection - */ -#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ -#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ -#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ -#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ -#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ - -/** - * @brief AF 3 selection - */ -#define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */ -#define GPIO_AF3_OCTOSPIM_P1 ((uint8_t)0x03) /* OctoSPI Manager Port 1 Alternate Function mapping */ -#define GPIO_AF3_SAI1 ((uint8_t)0x03) /* SAI1 Alternate Function mapping */ -#define GPIO_AF3_SPI2 ((uint8_t)0x03) /* SPI2 Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ -#define GPIO_AF3_TIM8_COMP1 ((uint8_t)0x03) /* TIM8/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM8_COMP2 ((uint8_t)0x03) /* TIM8/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */ - -/** - * @brief AF 4 selection - */ -#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ -#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ -#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ -#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */ -#define GPIO_AF4_DCMI ((uint8_t)0x04) /* DCMI Alternate Function mapping */ - -/** - * @brief AF 5 selection - */ -#define GPIO_AF5_DCMI ((uint8_t)0x05) /* DCMI Alternate Function mapping */ -#define GPIO_AF5_DFSDM1 ((uint8_t)0x05) /* DFSDM1 Alternate Function mapping */ -#define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */ -#define GPIO_AF5_OCTOSPIM_P1 ((uint8_t)0x05) /* OctoSPI Manager Port 1 Alternate Function mapping */ -#define GPIO_AF5_OCTOSPIM_P2 ((uint8_t)0x05) /* OctoSPI Manager Port 2 Alternate Function mapping */ -#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ -#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ -#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ - -/** - * @brief AF 6 selection - */ -#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ -#define GPIO_AF6_I2C3 ((uint8_t)0x06) /* I2C3 Alternate Function mapping */ -#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ - -/** - * @brief AF 7 selection - */ -#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ -#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ -#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ - -/** - * @brief AF 8 selection - */ -#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ -#define GPIO_AF8_SDMMC1 ((uint8_t)0x08) /* SDMMC1 Alternate Function mapping */ -#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ -#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */ - -/** - * @brief AF 9 selection - */ -#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ -#define GPIO_AF9_LTDC ((uint8_t)0x09) /* LTDC Alternate Function mapping */ -#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ - -/** - * @brief AF 10 selection - */ -#define GPIO_AF10_DCMI ((uint8_t)0x0A) /* DCMI Alternate Function mapping */ -#define GPIO_AF10_OCTOSPIM_P1 ((uint8_t)0x0A) /* OctoSPI Manager Port 1 Alternate Function mapping */ -#define GPIO_AF10_OCTOSPIM_P2 ((uint8_t)0x0A) /* OctoSPI Manager Port 2 Alternate Function mapping */ -#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */ - -/** - * @brief AF 11 selection - */ -#define GPIO_AF11_DSI ((uint8_t)0x0B) /* DSI Alternate Function mapping */ -#define GPIO_AF11_LTDC ((uint8_t)0x0B) /* LTDC Alternate Function mapping */ - -/** - * @brief AF 12 selection - */ -#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ -#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ -#define GPIO_AF12_DSI ((uint8_t)0x0C) /* FMC Alternate Function mapping */ -#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */ -#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ -#define GPIO_AF12_TIM1_COMP1 ((uint8_t)0x0C) /* TIM1/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF12_TIM1_COMP2 ((uint8_t)0x0C) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF12_TIM8_COMP2 ((uint8_t)0x0C) /* TIM8/COMP2 Break in Alternate Function mapping */ - -/** - * @brief AF 13 selection - */ -#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ -#define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */ -#define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 14 selection - */ -#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ -#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ -#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */ -#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM8_COMP2 ((uint8_t)0x0E) /* TIM8/COMP2 Break in Alternate Function mapping */ - -/** - * @brief AF 15 selection - */ -#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ - -#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup GPIOEx_Exported_Macros GPIOEx Exported Macros - * @{ - */ - -/** @defgroup GPIOEx_Get_Port_Index GPIOEx_Get Port Index -* @{ - */ -#if defined(STM32L431xx) || defined(STM32L433xx) || defined(STM32L443xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U :\ - ((__GPIOx__) == (GPIOD))? 3U :\ - ((__GPIOx__) == (GPIOE))? 4U : 7U) - -#endif /* STM32L431xx || STM32L433xx || STM32L443xx */ - -#if defined(STM32L432xx) || defined(STM32L442xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U : 7U) - -#endif /* STM32L432xx || STM32L442xx */ - -#if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U :\ - ((__GPIOx__) == (GPIOD))? 3U :\ - ((__GPIOx__) == (GPIOE))? 4U : 7U) - -#endif /* STM32L451xx || STM32L452xx || STM32L462xx */ - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U :\ - ((__GPIOx__) == (GPIOD))? 3U :\ - ((__GPIOx__) == (GPIOE))? 4U :\ - ((__GPIOx__) == (GPIOF))? 5U :\ - ((__GPIOx__) == (GPIOG))? 6U : 7U) - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - -#if defined(STM32L496xx) || defined(STM32L4A6xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U :\ - ((__GPIOx__) == (GPIOD))? 3U :\ - ((__GPIOx__) == (GPIOE))? 4U :\ - ((__GPIOx__) == (GPIOF))? 5U :\ - ((__GPIOx__) == (GPIOG))? 6U :\ - ((__GPIOx__) == (GPIOH))? 7U : 8U) - -#endif /* STM32L496xx || STM32L4A6xx */ - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U :\ - ((__GPIOx__) == (GPIOD))? 3U :\ - ((__GPIOx__) == (GPIOE))? 4U :\ - ((__GPIOx__) == (GPIOF))? 5U :\ - ((__GPIOx__) == (GPIOG))? 6U :\ - ((__GPIOx__) == (GPIOH))? 7U : 8U) - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_GPIO_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h deleted file mode 100644 index 7a8f85f2..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h +++ /dev/null @@ -1,708 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_i2c.h - * @author MCD Application Team - * @brief Header file of I2C HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_I2C_H -#define __STM32L4xx_HAL_I2C_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup I2C - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup I2C_Exported_Types I2C Exported Types - * @{ - */ - -/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition - * @brief I2C Configuration Structure definition - * @{ - */ -typedef struct -{ - uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. - This parameter calculated by referring to I2C initialization - section in Reference manual */ - - uint32_t OwnAddress1; /*!< Specifies the first device own address. - This parameter can be a 7-bit or 10-bit address. */ - - uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. - This parameter can be a value of @ref I2C_ADDRESSING_MODE */ - - uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. - This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ - - uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected - This parameter can be a 7-bit address. */ - - uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected - This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ - - uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. - This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ - - uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. - This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ - -} I2C_InitTypeDef; - -/** - * @} - */ - -/** @defgroup HAL_state_structure_definition HAL state structure definition - * @brief HAL State structure definition - * @note HAL I2C State value coding follow below described bitmap :\n - * b7-b6 Error information\n - * 00 : No Error\n - * 01 : Abort (Abort user request on going)\n - * 10 : Timeout\n - * 11 : Error\n - * b5 IP initilisation status\n - * 0 : Reset (IP not initialized)\n - * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n - * b4 (not used)\n - * x : Should be set to 0\n - * b3\n - * 0 : Ready or Busy (No Listen mode ongoing)\n - * 1 : Listen (IP in Address Listen Mode)\n - * b2 Intrinsic process state\n - * 0 : Ready\n - * 1 : Busy (IP busy with some configuration or internal operations)\n - * b1 Rx state\n - * 0 : Ready (no Rx operation ongoing)\n - * 1 : Busy (Rx operation ongoing)\n - * b0 Tx state\n - * 0 : Ready (no Tx operation ongoing)\n - * 1 : Busy (Tx operation ongoing) - * @{ - */ -typedef enum -{ - HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ - HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ - HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ - HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ - HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ - HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ - HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission - process is ongoing */ - HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception - process is ongoing */ - HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ - HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ - HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ - -} HAL_I2C_StateTypeDef; - -/** - * @} - */ - -/** @defgroup HAL_mode_structure_definition HAL mode structure definition - * @brief HAL Mode structure definition - * @note HAL I2C Mode value coding follow below described bitmap :\n - * b7 (not used)\n - * x : Should be set to 0\n - * b6\n - * 0 : None\n - * 1 : Memory (HAL I2C communication is in Memory Mode)\n - * b5\n - * 0 : None\n - * 1 : Slave (HAL I2C communication is in Slave Mode)\n - * b4\n - * 0 : None\n - * 1 : Master (HAL I2C communication is in Master Mode)\n - * b3-b2-b1-b0 (not used)\n - * xxxx : Should be set to 0000 - * @{ - */ -typedef enum -{ - HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ - HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ - HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ - HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ - -} HAL_I2C_ModeTypeDef; - -/** - * @} - */ - -/** @defgroup I2C_Error_Code_definition I2C Error Code definition - * @brief I2C Error Code definition - * @{ - */ -#define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ -#define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ -#define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ -#define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ -#define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ -#define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ -#define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ -#define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ -/** - * @} - */ - -/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition - * @brief I2C handle Structure definition - * @{ - */ -typedef struct __I2C_HandleTypeDef -{ - I2C_TypeDef *Instance; /*!< I2C registers base address */ - - I2C_InitTypeDef Init; /*!< I2C communication parameters */ - - uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ - - uint16_t XferSize; /*!< I2C transfer size */ - - __IO uint16_t XferCount; /*!< I2C transfer counter */ - - __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can - be a value of @ref I2C_XFEROPTIONS */ - - __IO uint32_t PreviousState; /*!< I2C communication Previous state */ - - HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */ - - DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ - - DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ - - HAL_LockTypeDef Lock; /*!< I2C locking object */ - - __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ - - __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ - - __IO uint32_t ErrorCode; /*!< I2C Error code */ - - __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ -} I2C_HandleTypeDef; -/** - * @} - */ - -/** - * @} - */ -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup I2C_Exported_Constants I2C Exported Constants - * @{ - */ - -/** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options - * @{ - */ -#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) -#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) -#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) -#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) -#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) -/** - * @} - */ - -/** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode - * @{ - */ -#define I2C_ADDRESSINGMODE_7BIT (0x00000001U) -#define I2C_ADDRESSINGMODE_10BIT (0x00000002U) -/** - * @} - */ - -/** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode - * @{ - */ -#define I2C_DUALADDRESS_DISABLE (0x00000000U) -#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN -/** - * @} - */ - -/** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks - * @{ - */ -#define I2C_OA2_NOMASK ((uint8_t)0x00U) -#define I2C_OA2_MASK01 ((uint8_t)0x01U) -#define I2C_OA2_MASK02 ((uint8_t)0x02U) -#define I2C_OA2_MASK03 ((uint8_t)0x03U) -#define I2C_OA2_MASK04 ((uint8_t)0x04U) -#define I2C_OA2_MASK05 ((uint8_t)0x05U) -#define I2C_OA2_MASK06 ((uint8_t)0x06U) -#define I2C_OA2_MASK07 ((uint8_t)0x07U) -/** - * @} - */ - -/** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode - * @{ - */ -#define I2C_GENERALCALL_DISABLE (0x00000000U) -#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN -/** - * @} - */ - -/** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode - * @{ - */ -#define I2C_NOSTRETCH_DISABLE (0x00000000U) -#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH -/** - * @} - */ - -/** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size - * @{ - */ -#define I2C_MEMADD_SIZE_8BIT (0x00000001U) -#define I2C_MEMADD_SIZE_16BIT (0x00000002U) -/** - * @} - */ - -/** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View - * @{ - */ -#define I2C_DIRECTION_TRANSMIT (0x00000000U) -#define I2C_DIRECTION_RECEIVE (0x00000001U) -/** - * @} - */ - -/** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode - * @{ - */ -#define I2C_RELOAD_MODE I2C_CR2_RELOAD -#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND -#define I2C_SOFTEND_MODE (0x00000000U) -/** - * @} - */ - -/** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode - * @{ - */ -#define I2C_NO_STARTSTOP (0x00000000U) -#define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) -#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) -#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) -/** - * @} - */ - -/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition - * @brief I2C Interrupt definition - * Elements values convention: 0xXXXXXXXX - * - XXXXXXXX : Interrupt control mask - * @{ - */ -#define I2C_IT_ERRI I2C_CR1_ERRIE -#define I2C_IT_TCI I2C_CR1_TCIE -#define I2C_IT_STOPI I2C_CR1_STOPIE -#define I2C_IT_NACKI I2C_CR1_NACKIE -#define I2C_IT_ADDRI I2C_CR1_ADDRIE -#define I2C_IT_RXI I2C_CR1_RXIE -#define I2C_IT_TXI I2C_CR1_TXIE -/** - * @} - */ - -/** @defgroup I2C_Flag_definition I2C Flag definition - * @{ - */ -#define I2C_FLAG_TXE I2C_ISR_TXE -#define I2C_FLAG_TXIS I2C_ISR_TXIS -#define I2C_FLAG_RXNE I2C_ISR_RXNE -#define I2C_FLAG_ADDR I2C_ISR_ADDR -#define I2C_FLAG_AF I2C_ISR_NACKF -#define I2C_FLAG_STOPF I2C_ISR_STOPF -#define I2C_FLAG_TC I2C_ISR_TC -#define I2C_FLAG_TCR I2C_ISR_TCR -#define I2C_FLAG_BERR I2C_ISR_BERR -#define I2C_FLAG_ARLO I2C_ISR_ARLO -#define I2C_FLAG_OVR I2C_ISR_OVR -#define I2C_FLAG_PECERR I2C_ISR_PECERR -#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT -#define I2C_FLAG_ALERT I2C_ISR_ALERT -#define I2C_FLAG_BUSY I2C_ISR_BUSY -#define I2C_FLAG_DIR I2C_ISR_DIR -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ - -/** @defgroup I2C_Exported_Macros I2C Exported Macros - * @{ - */ - -/** @brief Reset I2C handle state. - * @param __HANDLE__ specifies the I2C Handle. - * @retval None - */ -#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) - -/** @brief Enable the specified I2C interrupt. - * @param __HANDLE__ specifies the I2C Handle. - * @param __INTERRUPT__ specifies the interrupt source to enable. - * This parameter can be one of the following values: - * @arg @ref I2C_IT_ERRI Errors interrupt enable - * @arg @ref I2C_IT_TCI Transfer complete interrupt enable - * @arg @ref I2C_IT_STOPI STOP detection interrupt enable - * @arg @ref I2C_IT_NACKI NACK received interrupt enable - * @arg @ref I2C_IT_ADDRI Address match interrupt enable - * @arg @ref I2C_IT_RXI RX interrupt enable - * @arg @ref I2C_IT_TXI TX interrupt enable - * - * @retval None - */ -#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) - -/** @brief Disable the specified I2C interrupt. - * @param __HANDLE__ specifies the I2C Handle. - * @param __INTERRUPT__ specifies the interrupt source to disable. - * This parameter can be one of the following values: - * @arg @ref I2C_IT_ERRI Errors interrupt enable - * @arg @ref I2C_IT_TCI Transfer complete interrupt enable - * @arg @ref I2C_IT_STOPI STOP detection interrupt enable - * @arg @ref I2C_IT_NACKI NACK received interrupt enable - * @arg @ref I2C_IT_ADDRI Address match interrupt enable - * @arg @ref I2C_IT_RXI RX interrupt enable - * @arg @ref I2C_IT_TXI TX interrupt enable - * - * @retval None - */ -#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) - -/** @brief Check whether the specified I2C interrupt source is enabled or not. - * @param __HANDLE__ specifies the I2C Handle. - * @param __INTERRUPT__ specifies the I2C interrupt source to check. - * This parameter can be one of the following values: - * @arg @ref I2C_IT_ERRI Errors interrupt enable - * @arg @ref I2C_IT_TCI Transfer complete interrupt enable - * @arg @ref I2C_IT_STOPI STOP detection interrupt enable - * @arg @ref I2C_IT_NACKI NACK received interrupt enable - * @arg @ref I2C_IT_ADDRI Address match interrupt enable - * @arg @ref I2C_IT_RXI RX interrupt enable - * @arg @ref I2C_IT_TXI TX interrupt enable - * - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) - -/** @brief Check whether the specified I2C flag is set or not. - * @param __HANDLE__ specifies the I2C Handle. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref I2C_FLAG_TXE Transmit data register empty - * @arg @ref I2C_FLAG_TXIS Transmit interrupt status - * @arg @ref I2C_FLAG_RXNE Receive data register not empty - * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) - * @arg @ref I2C_FLAG_AF Acknowledge failure received flag - * @arg @ref I2C_FLAG_STOPF STOP detection flag - * @arg @ref I2C_FLAG_TC Transfer complete (master mode) - * @arg @ref I2C_FLAG_TCR Transfer complete reload - * @arg @ref I2C_FLAG_BERR Bus error - * @arg @ref I2C_FLAG_ARLO Arbitration lost - * @arg @ref I2C_FLAG_OVR Overrun/Underrun - * @arg @ref I2C_FLAG_PECERR PEC error in reception - * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag - * @arg @ref I2C_FLAG_ALERT SMBus alert - * @arg @ref I2C_FLAG_BUSY Bus busy - * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) - * - * @retval The new state of __FLAG__ (SET or RESET). - */ -#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) - -/** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit. - * @param __HANDLE__ specifies the I2C Handle. - * @param __FLAG__ specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg @ref I2C_FLAG_TXE Transmit data register empty - * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) - * @arg @ref I2C_FLAG_AF Acknowledge failure received flag - * @arg @ref I2C_FLAG_STOPF STOP detection flag - * @arg @ref I2C_FLAG_BERR Bus error - * @arg @ref I2C_FLAG_ARLO Arbitration lost - * @arg @ref I2C_FLAG_OVR Overrun/Underrun - * @arg @ref I2C_FLAG_PECERR PEC error in reception - * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag - * @arg @ref I2C_FLAG_ALERT SMBus alert - * - * @retval None - */ -#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ - : ((__HANDLE__)->Instance->ICR = (__FLAG__))) - -/** @brief Enable the specified I2C peripheral. - * @param __HANDLE__ specifies the I2C Handle. - * @retval None - */ -#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) - -/** @brief Disable the specified I2C peripheral. - * @param __HANDLE__ specifies the I2C Handle. - * @retval None - */ -#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) - -/** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. - * @param __HANDLE__ specifies the I2C Handle. - * @retval None - */ -#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) -/** - * @} - */ - -/* Include I2C HAL Extended module */ -#include "stm32l4xx_hal_i2c_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup I2C_Exported_Functions - * @{ - */ - -/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -/* Initialization and de-initialization functions******************************/ -HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); -HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); -/** - * @} - */ - -/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ -/* IO operation functions ****************************************************/ -/******* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); - -/******* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); - -HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); -HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); -HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); - -/******* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); -/** - * @} - */ - -/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks - * @{ - */ -/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ -void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); -void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); -void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); -/** - * @} - */ - -/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions - * @{ - */ -/* Peripheral State, Mode and Error functions *********************************/ -HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); -HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); -uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); - -/** - * @} - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup I2C_Private_Constants I2C Private Constants - * @{ - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup I2C_Private_Macro I2C Private Macros - * @{ - */ - -#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ - ((MODE) == I2C_ADDRESSINGMODE_10BIT)) - -#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ - ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) - -#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ - ((MASK) == I2C_OA2_MASK01) || \ - ((MASK) == I2C_OA2_MASK02) || \ - ((MASK) == I2C_OA2_MASK03) || \ - ((MASK) == I2C_OA2_MASK04) || \ - ((MASK) == I2C_OA2_MASK05) || \ - ((MASK) == I2C_OA2_MASK06) || \ - ((MASK) == I2C_OA2_MASK07)) - -#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ - ((CALL) == I2C_GENERALCALL_ENABLE)) - -#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ - ((STRETCH) == I2C_NOSTRETCH_ENABLE)) - -#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ - ((SIZE) == I2C_MEMADD_SIZE_16BIT)) - -#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ - ((MODE) == I2C_AUTOEND_MODE) || \ - ((MODE) == I2C_SOFTEND_MODE)) - -#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ - ((REQUEST) == I2C_GENERATE_START_READ) || \ - ((REQUEST) == I2C_GENERATE_START_WRITE) || \ - ((REQUEST) == I2C_NO_STARTSTOP)) - -#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ - ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ - ((REQUEST) == I2C_NEXT_FRAME) || \ - ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ - ((REQUEST) == I2C_LAST_FRAME)) - -#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) - -#define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U) -#define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U) -#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) -#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1) -#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2) - -#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) -#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) - -#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) -#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) - -#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ - (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) -/** - * @} - */ - -/* Private Functions ---------------------------------------------------------*/ -/** @defgroup I2C_Private_Functions I2C Private Functions - * @{ - */ -/* Private functions are defined in stm32l4xx_hal_i2c.c file */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_I2C_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h deleted file mode 100644 index 726a83fb..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h +++ /dev/null @@ -1,186 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_i2c_ex.h - * @author MCD Application Team - * @brief Header file of I2C HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_I2C_EX_H -#define __STM32L4xx_HAL_I2C_EX_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup I2CEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants - * @{ - */ - -/** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter - * @{ - */ -#define I2C_ANALOGFILTER_ENABLE 0x00000000U -#define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF -/** - * @} - */ - -/** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus - * @{ - */ -#define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ -#define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ -#define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ -#if defined(SYSCFG_CFGR1_I2C_PB8_FMP) -#define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ -#define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ -#else -#define I2C_FASTMODEPLUS_PB8 (uint32_t)(0x00000010U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB8 not supported */ -#define I2C_FASTMODEPLUS_PB9 (uint32_t)(0x00000012U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB9 not supported */ -#endif -#define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ -#if defined(SYSCFG_CFGR1_I2C2_FMP) -#define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ -#else -#define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */ -#endif -#define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ -#if defined(SYSCFG_CFGR1_I2C4_FMP) -#define I2C_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */ -#else -#define I2C_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */ -#endif -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions - * @{ - */ - -/** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions - * @brief Extended features functions - * @{ - */ - -/* Peripheral Control functions ************************************************/ -HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter); -HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter); -HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); -HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); -void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); -void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup I2CEx_Private_Constants I2C Extended Private Constants - * @{ - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup I2CEx_Private_Macro I2C Extended Private Macros - * @{ - */ -#define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \ - ((FILTER) == I2C_ANALOGFILTER_DISABLE)) - -#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) - -#define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \ - ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C4)) == I2C_FASTMODEPLUS_I2C4))) -/** - * @} - */ - -/* Private Functions ---------------------------------------------------------*/ -/** @defgroup I2CEx_Private_Functions I2C Extended Private Functions - * @{ - */ -/* Private functions are defined in stm32l4xx_hal_i2c_ex.c file */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_I2C_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h deleted file mode 100644 index 0fa4476a..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h +++ /dev/null @@ -1,874 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd.h - * @author MCD Application Team - * @brief Header file of PCD HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_PCD_H -#define __STM32L4xx_HAL_PCD_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_ll_usb.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup PCD - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup PCD_Exported_Types PCD Exported Types - * @{ - */ - - /** - * @brief PCD State structure definition - */ -typedef enum -{ - HAL_PCD_STATE_RESET = 0x00, - HAL_PCD_STATE_READY = 0x01, - HAL_PCD_STATE_ERROR = 0x02, - HAL_PCD_STATE_BUSY = 0x03, - HAL_PCD_STATE_TIMEOUT = 0x04 -} PCD_StateTypeDef; - -/* Device LPM suspend state */ -typedef enum -{ - LPM_L0 = 0x00, /* on */ - LPM_L1 = 0x01, /* LPM L1 sleep */ - LPM_L2 = 0x02, /* suspend */ - LPM_L3 = 0x03, /* off */ -}PCD_LPM_StateTypeDef; - -#if defined (USB) -/** - * @brief PCD double buffered endpoint direction - */ -typedef enum -{ - PCD_EP_DBUF_OUT, - PCD_EP_DBUF_IN, - PCD_EP_DBUF_ERR, -}PCD_EP_DBUF_DIR; - -/** - * @brief PCD endpoint buffer number - */ -typedef enum -{ - PCD_EP_NOBUF, - PCD_EP_BUF0, - PCD_EP_BUF1 -}PCD_EP_BUF_NUM; -#endif /* USB */ - -#if defined (USB_OTG_FS) -typedef USB_OTG_GlobalTypeDef PCD_TypeDef; -typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; -typedef USB_OTG_EPTypeDef PCD_EPTypeDef; -#endif /* USB_OTG_FS */ - -#if defined (USB) -typedef USB_TypeDef PCD_TypeDef; -typedef USB_CfgTypeDef PCD_InitTypeDef; -typedef USB_EPTypeDef PCD_EPTypeDef; -#endif /* USB */ - -/** - * @brief PCD Handle Structure definition - */ -typedef struct -{ - PCD_TypeDef *Instance; /*!< Register base address */ - PCD_InitTypeDef Init; /*!< PCD required parameters */ - __IO uint8_t USB_Address; /*!< USB Address: not used by USB OTG FS */ - PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */ - PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */ - HAL_LockTypeDef Lock; /*!< PCD peripheral status */ - __IO PCD_StateTypeDef State; /*!< PCD communication state */ - uint32_t Setup[12]; /*!< Setup packet buffer */ - PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ - uint32_t BESL; - - - uint32_t lpm_active; /*!< Enable or disable the Link Power Management . - This parameter can be set to ENABLE or DISABLE */ - - uint32_t battery_charging_active; /*!< Enable or disable Battery charging. - This parameter can be set to ENABLE or DISABLE */ - void *pData; /*!< Pointer to upper stack Handler */ - -} PCD_HandleTypeDef; - -/** - * @} - */ - -/* Include PCD HAL Extended module */ -#include "stm32l4xx_hal_pcd_ex.h" - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup PCD_Exported_Constants PCD Exported Constants - * @{ - */ - -/** @defgroup PCD_Speed PCD Speed - * @{ - */ -#define PCD_SPEED_FULL 1 -/** - * @} - */ - -/** @defgroup PCD_PHY_Module PCD PHY Module - * @{ - */ -#define PCD_PHY_EMBEDDED 1 -/** - * @} - */ - -/** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value - * @{ - */ -#ifndef USBD_FS_TRDT_VALUE - #define USBD_FS_TRDT_VALUE 5 -#endif /* USBD_FS_TRDT_VALUE */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup PCD_Exported_Macros PCD Exported Macros - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ -#if defined (USB_OTG_FS) -#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) - -#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) -#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) -#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0) - - -#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ - ~(USB_OTG_PCGCCTL_STOPCLK) - -#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK - -#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_OTG_FS_WAKEUP_EXTI_LINE) -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_OTG_FS_WAKEUP_EXTI_LINE - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\ - EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ - } while(0) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\ - EXTI->FTSR1 |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - } while(0) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\ - EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ - EXTI->FTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ - } while(0) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_OTG_FS_WAKEUP_EXTI_LINE) - -#endif /* USB_OTG_FS */ - -#if defined (USB) -#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) -#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) - -#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE -#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) -#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_WAKEUP_EXTI_LINE) -#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_WAKEUP_EXTI_LINE - -#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\ - EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\ - } while(0) - -#define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\ - EXTI->FTSR1 |= (USB_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ - } while(0) - -#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\ - EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ - EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\ - EXTI->FTSR1 |= USB_WAKEUP_EXTI_LINE;\ - } while(0) - -#define __HAL_USB_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_WAKEUP_EXTI_LINE) - -#endif /* USB */ - -/** - * @} - */ - -/** @addtogroup PCD_Exported_Functions PCD Exported Functions - * @{ - */ - -/* Initialization/de-initialization functions ********************************/ -/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd); -void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); -void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/* I/O operation functions ***************************************************/ -/* Non-Blocking mode: Interrupt */ -/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ - /* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); - -void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/* Peripheral Control functions **********************************************/ -/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ -HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); -HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); -HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/* Peripheral State functions ************************************************/ -/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions - * @{ - */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup PCD_Private_Constants PCD Private Constants - * @{ - */ -/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt - * @{ - */ -#if defined (USB_OTG_FS) -#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08) -#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0C) -#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10) - -#define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17 Connected to the USB EXTI Line */ -#endif /* USB_OTG_FS */ - -#if defined (USB) -#define USB_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17Connected to the USB EXTI Line */ -#endif /* USB */ - -/** - * @} - */ - -#if defined (USB) -/** @defgroup PCD_EP0_MPS PCD EP0 MPS - * @{ - */ -#define PCD_EP0MPS_64 DEP0CTL_MPS_64 -#define PCD_EP0MPS_32 DEP0CTL_MPS_32 -#define PCD_EP0MPS_16 DEP0CTL_MPS_16 -#define PCD_EP0MPS_08 DEP0CTL_MPS_8 -/** - * @} - */ - -/** @defgroup PCD_ENDP PCD ENDP - * @{ - */ -#define PCD_ENDP0 ((uint8_t)0) -#define PCD_ENDP1 ((uint8_t)1) -#define PCD_ENDP2 ((uint8_t)2) -#define PCD_ENDP3 ((uint8_t)3) -#define PCD_ENDP4 ((uint8_t)4) -#define PCD_ENDP5 ((uint8_t)5) -#define PCD_ENDP6 ((uint8_t)6) -#define PCD_ENDP7 ((uint8_t)7) -/** - * @} - */ - -/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind - * @{ - */ -#define PCD_SNG_BUF 0 -#define PCD_DBL_BUF 1 -/** - * @} - */ -#endif /* USB */ -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup PCD_Private_Macros PCD Private Macros - * @{ - */ -#if defined (USB) -/* SetENDPOINT */ -#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue)) - -/* GetENDPOINT */ -#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2)) - -/* ENDPOINT transfer */ -#define USB_EP0StartXfer USB_EPStartXfer - -/** - * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wType: Endpoint Type. - * @retval None - */ -#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ - ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) ))) - -/** - * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval Endpoint Type - */ -#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) - -/** - * @brief free buffer used from the application realizing it to the line - toggles bit SW_BUF in the double buffered endpoint register - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param bDir: Direction - * @retval None - */ -#define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\ -{\ - if ((bDir) == PCD_EP_DBUF_OUT)\ - { /* OUT double buffered endpoint */\ - PCD_TX_DTOG((USBx), (bEpNum));\ - }\ - else if ((bDir) == PCD_EP_DBUF_IN)\ - { /* IN double buffered endpoint */\ - PCD_RX_DTOG((USBx), (bEpNum));\ - }\ -} - -/** - * @brief gets direction of the double buffered endpoint - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval EP_DBUF_OUT, EP_DBUF_IN, - * EP_DBUF_ERR if the endpoint counter not yet programmed. - */ -#define PCD_GET_DB_DIR(USBx, bEpNum)\ -{\ - if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\ - return(PCD_EP_DBUF_OUT);\ - else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\ - return(PCD_EP_DBUF_IN);\ - else\ - return(PCD_EP_DBUF_ERR);\ -} - -/** - * @brief sets the status for tx transfer (bits STAT_TX[1:0]). - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wState: new state - * @retval None - */ -#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\ - /* toggle first bit ? */ \ - if((USB_EPTX_DTOG1 & (wState))!= 0)\ - { \ - _wRegVal ^= USB_EPTX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if((USB_EPTX_DTOG2 & (wState))!= 0) \ - { \ - _wRegVal ^= USB_EPTX_DTOG2; \ - } \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\ - } /* PCD_SET_EP_TX_STATUS */ - -/** - * @brief sets the status for rx transfer (bits STAT_TX[1:0]) - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wState: new state - * @retval None - */ -#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\ - register uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\ - /* toggle first bit ? */ \ - if((USB_EPRX_DTOG1 & (wState))!= 0) \ - { \ - _wRegVal ^= USB_EPRX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if((USB_EPRX_DTOG2 & (wState))!= 0) \ - { \ - _wRegVal ^= USB_EPRX_DTOG2; \ - } \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ - } /* PCD_SET_EP_RX_STATUS */ - -/** - * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wStaterx: new state. - * @param wStatetx: new state. - * @retval None - */ -#define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\ - register uint32_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\ - /* toggle first bit ? */ \ - if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \ - { \ - _wRegVal ^= USB_EPRX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \ - { \ - _wRegVal ^= USB_EPRX_DTOG2; \ - } \ - /* toggle first bit ? */ \ - if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \ - { \ - _wRegVal ^= USB_EPTX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \ - { \ - _wRegVal ^= USB_EPTX_DTOG2; \ - } \ - PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \ - } /* PCD_SET_EP_TXRX_STATUS */ - -/** - * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] - * /STAT_RX[1:0]) - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval status - */ -#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) -#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) - -/** - * @brief sets directly the VALID tx/rx-status into the endpoint register - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) -#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) - -/** - * @brief checks stall condition in an endpoint. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval TRUE = endpoint in stall condition. - */ -#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ - == USB_EP_TX_STALL) -#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ - == USB_EP_RX_STALL) - -/** - * @brief set & clear EP_KIND bit. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ - (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK)))) -#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ - (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK)))) - -/** - * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) -#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) - -/** - * @brief Sets/clears directly EP_KIND bit in the endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) -#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) - -/** - * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ - PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK)) -#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ - PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK)) - -/** - * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ - USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) -#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ - USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) - -/** - * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\ - { \ - PCD_RX_DTOG((USBx), (bEpNum)); \ - } -#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\ - { \ - PCD_TX_DTOG((USBx), (bEpNum)); \ - } - -/** - * @brief Sets address in an endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param bAddr: Address. - * @retval None - */ -#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\ - USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr)) - -#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) - -#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400))) -#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400))) -#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400))) -#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400))) - -#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\ - uint16_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \ - PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ - } - -/** - * @brief sets address of the tx/rx buffer. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wAddr: address to be set (must be word aligned). - * @retval None - */ -#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1)) -#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1)) - -/** - * @brief Gets address of the tx/rx buffer. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval address of the buffer. - */ -#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) -#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) - -/** - * @brief Sets counter of rx buffer with no. of blocks. - * @param dwReg: Register - * @param wCount: Counter. - * @param wNBlocks: no. of Blocks. - * @retval None - */ -#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\ - (wNBlocks) = (wCount) >> 5;\ - if(((wCount) & 0x1f) == 0)\ - { \ - (wNBlocks)--;\ - } \ - *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \ - }/* PCD_CALC_BLK32 */ - -#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\ - (wNBlocks) = (wCount) >> 1;\ - if(((wCount) & 0x1) != 0)\ - { \ - (wNBlocks)++;\ - } \ - *pdwReg = (uint16_t)((wNBlocks) << 10);\ - }/* PCD_CALC_BLK2 */ - -#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\ - uint16_t wNBlocks;\ - if((wCount) > 62) \ - { \ - PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \ - } \ - else \ - { \ - PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \ - } \ - }/* PCD_SET_EP_CNT_RX_REG */ - -#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\ - uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \ - PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ - } - -/** - * @brief sets counter for the tx/rx buffer. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wCount: Counter value. - * @retval None - */ -#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount)) - - -/** - * @brief gets counter of the tx buffer. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval Counter value - */ -#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff) -#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff) - -/** - * @brief Sets buffer 0/1 address in a double buffer endpoint. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wBuf0Addr: buffer 0 address. - * @retval Counter value - */ -#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));} -#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));} - -/** - * @brief Sets addresses in a double buffer endpoint. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wBuf0Addr: buffer 0 address. - * @param wBuf1Addr = buffer 1 address. - * @retval None - */ -#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \ - PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\ - PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\ - } /* PCD_SET_EP_DBUF_ADDR */ - -/** - * @brief Gets buffer 0/1 address of a double buffer endpoint. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) -#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) - -/** - * @brief Gets buffer 0/1 address of a double buffer endpoint. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param bDir: endpoint dir EP_DBUF_OUT = OUT - * EP_DBUF_IN = IN - * @param wCount: Counter value - * @retval None - */ -#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \ - if((bDir) == PCD_EP_DBUF_OUT)\ - /* OUT endpoint */ \ - {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \ - else if((bDir) == PCD_EP_DBUF_IN)\ - /* IN endpoint */ \ - *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ - } /* SetEPDblBuf0Count*/ - -#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \ - if((bDir) == PCD_EP_DBUF_OUT)\ - {/* OUT endpoint */ \ - PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \ - } \ - else if((bDir) == PCD_EP_DBUF_IN)\ - {/* IN endpoint */ \ - *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ - } \ - } /* SetEPDblBuf1Count */ - -#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\ - PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ - PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ - } /* PCD_SET_EP_DBUF_CNT */ - -/** - * @brief Gets buffer 0/1 rx/tx counter for double buffering. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) -#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) - -#endif /* USB */ - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) - -/** @defgroup PCD_Instance_definition PCD Instance definition - * @{ - */ -#define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE -/** - * @} - */ -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_PCD_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h deleted file mode 100644 index 5fce957d..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h +++ /dev/null @@ -1,136 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd_ex.h - * @author MCD Application Team - * @brief Header file of PCD HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_PCD_EX_H -#define __STM32L4xx_HAL_PCD_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup PCDEx - * @{ - */ -/* Exported types ------------------------------------------------------------*/ -typedef enum -{ - PCD_LPM_L0_ACTIVE = 0x00, /* on */ - PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ -}PCD_LPM_MsgTypeDef; - -typedef enum -{ - PCD_BCD_ERROR = 0xFF, - PCD_BCD_CONTACT_DETECTION = 0xFE, - PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, - PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, - PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, - PCD_BCD_DISCOVERY_COMPLETED = 0x00, - -}PCD_BCD_MsgTypeDef; - -/* Exported constants --------------------------------------------------------*/ -/* Exported macros -----------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions - * @{ - */ -/** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions - * @{ - */ - -#if defined(USB_OTG_FS) -HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size); -HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size); -#endif /* USB_OTG_FS */ - -#if defined (USB) -HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, - uint16_t ep_addr, - uint16_t ep_kind, - uint32_t pmaadress); -#endif /* USB */ -HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); -void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); -void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); -void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_PCD_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h deleted file mode 100644 index 75d18b13..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h +++ /dev/null @@ -1,427 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pwr.h - * @author MCD Application Team - * @brief Header file of PWR HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_PWR_H -#define __STM32L4xx_HAL_PWR_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup PWR - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup PWR_Exported_Types PWR Exported Types - * @{ - */ - -/** - * @brief PWR PVD configuration structure definition - */ -typedef struct -{ - uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. - This parameter can be a value of @ref PWR_PVD_detection_level. */ - - uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. - This parameter can be a value of @ref PWR_PVD_Mode. */ -}PWR_PVDTypeDef; - - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup PWR_Exported_Constants PWR Exported Constants - * @{ - */ - - -/** @defgroup PWR_PVD_detection_level Programmable Voltage Detection levels - * @{ - */ -#define PWR_PVDLEVEL_0 PWR_CR2_PLS_LEV0 /*!< PVD threshold around 2.0 V */ -#define PWR_PVDLEVEL_1 PWR_CR2_PLS_LEV1 /*!< PVD threshold around 2.2 V */ -#define PWR_PVDLEVEL_2 PWR_CR2_PLS_LEV2 /*!< PVD threshold around 2.4 V */ -#define PWR_PVDLEVEL_3 PWR_CR2_PLS_LEV3 /*!< PVD threshold around 2.5 V */ -#define PWR_PVDLEVEL_4 PWR_CR2_PLS_LEV4 /*!< PVD threshold around 2.6 V */ -#define PWR_PVDLEVEL_5 PWR_CR2_PLS_LEV5 /*!< PVD threshold around 2.8 V */ -#define PWR_PVDLEVEL_6 PWR_CR2_PLS_LEV6 /*!< PVD threshold around 2.9 V */ -#define PWR_PVDLEVEL_7 PWR_CR2_PLS_LEV7 /*!< External input analog voltage (compared internally to VREFINT) */ -/** - * @} - */ - -/** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode - * @{ - */ -#define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< Basic mode is used */ -#define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ -#define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ -#define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ -#define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ -#define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ -#define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ -/** - * @} - */ - - - - -/** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode - * @{ - */ -#define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) /*!< Regulator in main mode */ -#define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPR /*!< Regulator in low-power mode */ -/** - * @} - */ - -/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry - * @{ - */ -#define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */ -#define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */ -/** - * @} - */ - -/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry - * @{ - */ -#define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */ -#define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */ -/** - * @} - */ - - -/** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line - * @{ - */ -#define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ -/** - * @} - */ - -/** @defgroup PWR_PVD_EVENT_LINE PWR PVD event line - * @{ - */ -#define PWR_EVENT_LINE_PVD ((uint32_t)0x00010000) /*!< Event line 16 Connected to the PVD Event Line */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup PWR_Exported_Macros PWR Exported Macros - * @{ - */ - -/** @brief Check whether or not a specific PWR flag is set. - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event - * was received from the WKUP pin 1. - * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event - * was received from the WKUP pin 2. - * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event - * was received from the WKUP pin 3. - * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event - * was received from the WKUP pin 4. - * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event - * was received from the WKUP pin 5. - * @arg @ref PWR_FLAG_SB StandBy Flag. Indicates that the system - * entered StandBy mode. - * @arg @ref PWR_FLAG_WUFI Wake-Up Flag Internal. Set when a wakeup is detected on - * the internal wakeup line. - * @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the - * low-power regulator is ready. - * @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the - * regulator is ready in main mode or is in low-power mode. - * @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready - * in the selected voltage range or is still changing to the required voltage level. - * @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is - * below or above the selected PVD threshold. - * @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is - * is below or above PVM1 threshold (applicable when USB feature is supported). - @if STM32L486xx - * @arg @ref PWR_FLAG_PVMO2 Peripheral Voltage Monitoring Output 2. Indicates whether VDDIO2 voltage is - * is below or above PVM2 threshold (applicable when VDDIO2 is present on device). - @endif - * @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is - * is below or above PVM3 threshold. - * @arg @ref PWR_FLAG_PVMO4 Peripheral Voltage Monitoring Output 4. Indicates whether VDDA voltage is - * is below or above PVM4 threshold. - * - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_PWR_GET_FLAG(__FLAG__) ( ((((uint8_t)(__FLAG__)) >> 5U) == 1) ?\ - (PWR->SR1 & (1U << ((__FLAG__) & 31U))) :\ - (PWR->SR2 & (1U << ((__FLAG__) & 31U))) ) - -/** @brief Clear a specific PWR flag. - * @param __FLAG__: specifies the flag to clear. - * This parameter can be one of the following values: - * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event - * was received from the WKUP pin 1. - * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event - * was received from the WKUP pin 2. - * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event - * was received from the WKUP pin 3. - * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event - * was received from the WKUP pin 4. - * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event - * was received from the WKUP pin 5. - * @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags. - * @arg @ref PWR_FLAG_SB Standby Flag. Indicates that the system - * entered Standby mode. - * @retval None - */ -#define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( (((uint8_t)(__FLAG__)) == PWR_FLAG_WU) ?\ - (PWR->SCR = (__FLAG__)) :\ - (PWR->SCR = (1U << ((__FLAG__) & 31U))) ) -/** - * @brief Enable the PVD Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) - -/** - * @brief Disable the PVD Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) - -/** - * @brief Enable the PVD Event Line. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) - -/** - * @brief Disable the PVD Event Line. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) - -/** - * @brief Enable the PVD Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) - -/** - * @brief Disable the PVD Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) - -/** - * @brief Enable the PVD Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) - - -/** - * @brief Disable the PVD Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) - - -/** - * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD) - -/** - * @brief Check whether or not the PVD EXTI interrupt flag is set. - * @retval EXTI PVD Line Status. - */ -#define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR1 & PWR_EXTI_LINE_PVD) - -/** - * @brief Clear the PVD EXTI interrupt flag. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR1, PWR_EXTI_LINE_PVD) - -/** - * @} - */ - - -/* Private macros --------------------------------------------------------*/ -/** @addtogroup PWR_Private_Macros PWR Private Macros - * @{ - */ - -#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ - ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ - ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ - ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) - -#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ - ((MODE) == PWR_PVD_MODE_IT_RISING) ||\ - ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ - ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\ - ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\ - ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\ - ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING)) - -#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ - ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) - -#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) - -#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) ) - -/** - * @} - */ - -/* Include PWR HAL Extended module */ -#include "stm32l4xx_hal_pwr_ex.h" - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup PWR_Exported_Functions PWR Exported Functions - * @{ - */ - -/** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ - -/* Initialization and de-initialization functions *******************************/ -void HAL_PWR_DeInit(void); -void HAL_PWR_EnableBkUpAccess(void); -void HAL_PWR_DisableBkUpAccess(void); - -/** - * @} - */ - -/** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions - * @{ - */ - -/* Peripheral Control functions ************************************************/ -HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); -void HAL_PWR_EnablePVD(void); -void HAL_PWR_DisablePVD(void); - - -/* WakeUp pins configuration functions ****************************************/ -void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); -void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); - -/* Low Power modes configuration functions ************************************/ -void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); -void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); -void HAL_PWR_EnterSTANDBYMode(void); - -void HAL_PWR_EnableSleepOnExit(void); -void HAL_PWR_DisableSleepOnExit(void); -void HAL_PWR_EnableSEVOnPend(void); -void HAL_PWR_DisableSEVOnPend(void); - -void HAL_PWR_PVDCallback(void); - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_PWR_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h deleted file mode 100644 index b9b9fa5c..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h +++ /dev/null @@ -1,906 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pwr_ex.h - * @author MCD Application Team - * @brief Header file of PWR HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_PWR_EX_H -#define __STM32L4xx_HAL_PWR_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup PWREx - * @{ - */ - - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup PWREx_Exported_Types PWR Extended Exported Types - * @{ - */ - - -/** - * @brief PWR PVM configuration structure definition - */ -typedef struct -{ - uint32_t PVMType; /*!< PVMType: Specifies which voltage is monitored and against which threshold. - This parameter can be a value of @ref PWREx_PVM_Type. - @arg @ref PWR_PVM_1 Peripheral Voltage Monitoring 1 enable: VDDUSB versus 1.2 V (applicable when USB feature is supported). -@if STM32L486xx - @arg @ref PWR_PVM_2 Peripheral Voltage Monitoring 2 enable: VDDIO2 versus 0.9 V (applicable when VDDIO2 is present on device). -@endif - @arg @ref PWR_PVM_3 Peripheral Voltage Monitoring 3 enable: VDDA versus 1.62 V. - @arg @ref PWR_PVM_4 Peripheral Voltage Monitoring 4 enable: VDDA versus 2.2 V. */ - - uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. - This parameter can be a value of @ref PWREx_PVM_Mode. */ -}PWR_PVMTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants - * @{ - */ - -/** @defgroup PWREx_WUP_Polarity Shift to apply to retrieve polarity information from PWR_WAKEUP_PINy_xxx constants - * @{ - */ -#define PWR_WUP_POLARITY_SHIFT 0x05 /*!< Internal constant used to retrieve wakeup pin polariry */ -/** - * @} - */ - - -/** @defgroup PWREx_WakeUp_Pins PWR wake-up pins - * @{ - */ -#define PWR_WAKEUP_PIN1 PWR_CR3_EWUP1 /*!< Wakeup pin 1 (with high level polarity) */ -#define PWR_WAKEUP_PIN2 PWR_CR3_EWUP2 /*!< Wakeup pin 2 (with high level polarity) */ -#define PWR_WAKEUP_PIN3 PWR_CR3_EWUP3 /*!< Wakeup pin 3 (with high level polarity) */ -#define PWR_WAKEUP_PIN4 PWR_CR3_EWUP4 /*!< Wakeup pin 4 (with high level polarity) */ -#define PWR_WAKEUP_PIN5 PWR_CR3_EWUP5 /*!< Wakeup pin 5 (with high level polarity) */ -#define PWR_WAKEUP_PIN1_HIGH PWR_CR3_EWUP1 /*!< Wakeup pin 1 (with high level polarity) */ -#define PWR_WAKEUP_PIN2_HIGH PWR_CR3_EWUP2 /*!< Wakeup pin 2 (with high level polarity) */ -#define PWR_WAKEUP_PIN3_HIGH PWR_CR3_EWUP3 /*!< Wakeup pin 3 (with high level polarity) */ -#define PWR_WAKEUP_PIN4_HIGH PWR_CR3_EWUP4 /*!< Wakeup pin 4 (with high level polarity) */ -#define PWR_WAKEUP_PIN5_HIGH PWR_CR3_EWUP5 /*!< Wakeup pin 5 (with high level polarity) */ -#define PWR_WAKEUP_PIN1_LOW (uint32_t)((PWR_CR4_WP1<IMR2, PWR_EXTI_LINE_PVM1) - -/** - * @brief Disable the PVM1 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1) - -/** - * @brief Enable the PVM1 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1) - -/** - * @brief Disable the PVM1 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1) - -/** - * @brief Enable the PVM1 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1) - -/** - * @brief Disable the PVM1 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1) - -/** - * @brief Enable the PVM1 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1) - - -/** - * @brief Disable the PVM1 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1) - - -/** - * @brief PVM1 EXTI line configuration: set rising & falling edge trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the PVM1 Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM1) - -/** - * @brief Check whether the specified PVM1 EXTI interrupt flag is set or not. - * @retval EXTI PVM1 Line Status. - */ -#define __HAL_PWR_PVM1_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM1) - -/** - * @brief Clear the PVM1 EXTI flag. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM1) - -#endif /* PWR_CR2_PVME1 */ - - -#if defined(PWR_CR2_PVME2) -/** - * @brief Enable the PVM2 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2) - -/** - * @brief Disable the PVM2 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2) - -/** - * @brief Enable the PVM2 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2) - -/** - * @brief Disable the PVM2 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2) - -/** - * @brief Enable the PVM2 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2) - -/** - * @brief Disable the PVM2 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2) - -/** - * @brief Enable the PVM2 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2) - - -/** - * @brief Disable the PVM2 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2) - - -/** - * @brief PVM2 EXTI line configuration: set rising & falling edge trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the PVM2 Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM2) - -/** - * @brief Check whether the specified PVM2 EXTI interrupt flag is set or not. - * @retval EXTI PVM2 Line Status. - */ -#define __HAL_PWR_PVM2_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM2) - -/** - * @brief Clear the PVM2 EXTI flag. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM2) - -#endif /* PWR_CR2_PVME2 */ - - -/** - * @brief Enable the PVM3 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3) - -/** - * @brief Disable the PVM3 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3) - -/** - * @brief Enable the PVM3 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3) - -/** - * @brief Disable the PVM3 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3) - -/** - * @brief Enable the PVM3 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3) - -/** - * @brief Disable the PVM3 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3) - -/** - * @brief Enable the PVM3 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3) - - -/** - * @brief Disable the PVM3 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3) - - -/** - * @brief PVM3 EXTI line configuration: set rising & falling edge trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the PVM3 Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM3) - -/** - * @brief Check whether the specified PVM3 EXTI interrupt flag is set or not. - * @retval EXTI PVM3 Line Status. - */ -#define __HAL_PWR_PVM3_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM3) - -/** - * @brief Clear the PVM3 EXTI flag. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM3) - - - - -/** - * @brief Enable the PVM4 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4) - -/** - * @brief Disable the PVM4 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4) - -/** - * @brief Enable the PVM4 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4) - -/** - * @brief Disable the PVM4 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4) - -/** - * @brief Enable the PVM4 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4) - -/** - * @brief Disable the PVM4 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4) - -/** - * @brief Enable the PVM4 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4) - - -/** - * @brief Disable the PVM4 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4) - - -/** - * @brief PVM4 EXTI line configuration: set rising & falling edge trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the PVM4 Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM4) - -/** - * @brief Check whether or not the specified PVM4 EXTI interrupt flag is set. - * @retval EXTI PVM4 Line Status. - */ -#define __HAL_PWR_PVM4_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM4) - -/** - * @brief Clear the PVM4 EXTI flag. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM4) - - -/** - * @brief Configure the main internal regulator output voltage. - * @param __REGULATOR__: specifies the regulator output voltage to achieve - * a tradeoff between performance and power consumption. - * This parameter can be one of the following values: - * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode, - * typical output voltage at 1.2 V, - * system frequency up to 80 MHz. - * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode, - * typical output voltage at 1.0 V, - * system frequency up to 26 MHz. - * @note This macro is similar to HAL_PWREx_ControlVoltageScaling() API but doesn't check - * whether or not VOSF flag is cleared when moving from range 2 to range 1. User - * may resort to __HAL_PWR_GET_FLAG() macro to check VOSF bit resetting. - * @retval None - */ -#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \ - __IO uint32_t tmpreg; \ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \ - UNUSED(tmpreg); \ - } while(0) - -/** - * @} - */ - -/* Private macros --------------------------------------------------------*/ -/** @addtogroup PWREx_Private_Macros PWR Extended Private Macros - * @{ - */ - -#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \ - ((PIN) == PWR_WAKEUP_PIN2) || \ - ((PIN) == PWR_WAKEUP_PIN3) || \ - ((PIN) == PWR_WAKEUP_PIN4) || \ - ((PIN) == PWR_WAKEUP_PIN5) || \ - ((PIN) == PWR_WAKEUP_PIN1_HIGH) || \ - ((PIN) == PWR_WAKEUP_PIN2_HIGH) || \ - ((PIN) == PWR_WAKEUP_PIN3_HIGH) || \ - ((PIN) == PWR_WAKEUP_PIN4_HIGH) || \ - ((PIN) == PWR_WAKEUP_PIN5_HIGH) || \ - ((PIN) == PWR_WAKEUP_PIN1_LOW) || \ - ((PIN) == PWR_WAKEUP_PIN2_LOW) || \ - ((PIN) == PWR_WAKEUP_PIN3_LOW) || \ - ((PIN) == PWR_WAKEUP_PIN4_LOW) || \ - ((PIN) == PWR_WAKEUP_PIN5_LOW)) - -#if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_1) ||\ - ((TYPE) == PWR_PVM_2) ||\ - ((TYPE) == PWR_PVM_3) ||\ - ((TYPE) == PWR_PVM_4)) -#elif defined (STM32L471xx) -#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_2) ||\ - ((TYPE) == PWR_PVM_3) ||\ - ((TYPE) == PWR_PVM_4)) -#endif - -#if defined (STM32L433xx) || defined (STM32L443xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_1) ||\ - ((TYPE) == PWR_PVM_3) ||\ - ((TYPE) == PWR_PVM_4)) -#elif defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L442xx) || defined (STM32L451xx) -#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_3) ||\ - ((TYPE) == PWR_PVM_4)) -#endif - -#define IS_PWR_PVM_MODE(MODE) (((MODE) == PWR_PVM_MODE_NORMAL) ||\ - ((MODE) == PWR_PVM_MODE_IT_RISING) ||\ - ((MODE) == PWR_PVM_MODE_IT_FALLING) ||\ - ((MODE) == PWR_PVM_MODE_IT_RISING_FALLING) ||\ - ((MODE) == PWR_PVM_MODE_EVENT_RISING) ||\ - ((MODE) == PWR_PVM_MODE_EVENT_FALLING) ||\ - ((MODE) == PWR_PVM_MODE_EVENT_RISING_FALLING)) - -#if defined(PWR_CR5_R1MODE) -#define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) || \ - ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ - ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2)) -#else -#define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ - ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2)) -#endif - - -#define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\ - ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5)) - -#define IS_PWR_BATTERY_CHARGING(CHARGING) (((CHARGING) == PWR_BATTERY_CHARGING_DISABLE) ||\ - ((CHARGING) == PWR_BATTERY_CHARGING_ENABLE)) - -#define IS_PWR_GPIO_BIT_NUMBER(BIT_NUMBER) (((BIT_NUMBER) & GPIO_PIN_MASK) != (uint32_t)0x00) - - -#if defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\ - ((GPIO) == PWR_GPIO_B) ||\ - ((GPIO) == PWR_GPIO_C) ||\ - ((GPIO) == PWR_GPIO_D) ||\ - ((GPIO) == PWR_GPIO_E) ||\ - ((GPIO) == PWR_GPIO_H)) -#elif defined (STM32L432xx) || defined (STM32L442xx) -#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\ - ((GPIO) == PWR_GPIO_B) ||\ - ((GPIO) == PWR_GPIO_C) ||\ - ((GPIO) == PWR_GPIO_H)) -#elif defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) -#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\ - ((GPIO) == PWR_GPIO_B) ||\ - ((GPIO) == PWR_GPIO_C) ||\ - ((GPIO) == PWR_GPIO_D) ||\ - ((GPIO) == PWR_GPIO_E) ||\ - ((GPIO) == PWR_GPIO_F) ||\ - ((GPIO) == PWR_GPIO_G) ||\ - ((GPIO) == PWR_GPIO_H)) -#elif defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\ - ((GPIO) == PWR_GPIO_B) ||\ - ((GPIO) == PWR_GPIO_C) ||\ - ((GPIO) == PWR_GPIO_D) ||\ - ((GPIO) == PWR_GPIO_E) ||\ - ((GPIO) == PWR_GPIO_F) ||\ - ((GPIO) == PWR_GPIO_G) ||\ - ((GPIO) == PWR_GPIO_H) ||\ - ((GPIO) == PWR_GPIO_I)) -#endif - - -/** - * @} - */ - - -/** @addtogroup PWREx_Exported_Functions PWR Extended Exported Functions - * @{ - */ - -/** @addtogroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions - * @{ - */ - - -/* Peripheral Control functions **********************************************/ -uint32_t HAL_PWREx_GetVoltageRange(void); -HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling); -void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection); -void HAL_PWREx_DisableBatteryCharging(void); -#if defined(PWR_CR2_USV) -void HAL_PWREx_EnableVddUSB(void); -void HAL_PWREx_DisableVddUSB(void); -#endif /* PWR_CR2_USV */ -#if defined(PWR_CR2_IOSV) -void HAL_PWREx_EnableVddIO2(void); -void HAL_PWREx_DisableVddIO2(void); -#endif /* PWR_CR2_IOSV */ -void HAL_PWREx_EnableInternalWakeUpLine(void); -void HAL_PWREx_DisableInternalWakeUpLine(void); -HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber); -HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber); -HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber); -HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber); -void HAL_PWREx_EnablePullUpPullDownConfig(void); -void HAL_PWREx_DisablePullUpPullDownConfig(void); -void HAL_PWREx_EnableSRAM2ContentRetention(void); -void HAL_PWREx_DisableSRAM2ContentRetention(void); -#if defined(PWR_CR1_RRSTP) -void HAL_PWREx_EnableSRAM3ContentRetention(void); -void HAL_PWREx_DisableSRAM3ContentRetention(void); -#endif /* PWR_CR1_RRSTP */ -#if defined(PWR_CR3_DSIPDEN) -void HAL_PWREx_EnableDSIPinsPDActivation(void); -void HAL_PWREx_DisableDSIPinsPDActivation(void); -#endif /* PWR_CR3_DSIPDEN */ -#if defined(PWR_CR2_PVME1) -void HAL_PWREx_EnablePVM1(void); -void HAL_PWREx_DisablePVM1(void); -#endif /* PWR_CR2_PVME1 */ -#if defined(PWR_CR2_PVME2) -void HAL_PWREx_EnablePVM2(void); -void HAL_PWREx_DisablePVM2(void); -#endif /* PWR_CR2_PVME2 */ -void HAL_PWREx_EnablePVM3(void); -void HAL_PWREx_DisablePVM3(void); -void HAL_PWREx_EnablePVM4(void); -void HAL_PWREx_DisablePVM4(void); -HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM); - - -/* Low Power modes configuration functions ************************************/ -void HAL_PWREx_EnableLowPowerRunMode(void); -HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void); -void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry); -void HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry); -void HAL_PWREx_EnterSTOP2Mode(uint8_t STOPEntry); -void HAL_PWREx_EnterSHUTDOWNMode(void); - -void HAL_PWREx_PVD_PVM_IRQHandler(void); -#if defined(PWR_CR2_PVME1) -void HAL_PWREx_PVM1Callback(void); -#endif /* PWR_CR2_PVME1 */ -#if defined(PWR_CR2_PVME2) -void HAL_PWREx_PVM2Callback(void); -#endif /* PWR_CR2_PVME2 */ -void HAL_PWREx_PVM3Callback(void); -void HAL_PWREx_PVM4Callback(void); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_PWR_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h deleted file mode 100644 index 9c8014cd..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h +++ /dev/null @@ -1,4594 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rcc.h - * @author MCD Application Team - * @brief Header file of RCC HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RCC_H -#define __STM32L4xx_HAL_RCC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RCC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup RCC_Exported_Types RCC Exported Types - * @{ - */ - -/** - * @brief RCC PLL configuration structure definition - */ -typedef struct -{ - uint32_t PLLState; /*!< The new state of the PLL. - This parameter can be a value of @ref RCC_PLL_Config */ - - uint32_t PLLSource; /*!< RCC_PLLSource: PLL entry clock source. - This parameter must be a value of @ref RCC_PLL_Clock_Source */ - - uint32_t PLLM; /*!< PLLM: Division factor for PLL VCO input clock. - This parameter must be a number between Min_Data = 1 and Max_Data = 16 on STM32L4Rx/STM32L4Sx devices. - This parameter must be a number between Min_Data = 1 and Max_Data = 8 on the other devices */ - - uint32_t PLLN; /*!< PLLN: Multiplication factor for PLL VCO output clock. - This parameter must be a number between Min_Data = 8 and Max_Data = 86 */ - - uint32_t PLLP; /*!< PLLP: Division factor for SAI clock. - This parameter must be a value of @ref RCC_PLLP_Clock_Divider */ - - uint32_t PLLQ; /*!< PLLQ: Division factor for SDMMC1, RNG and USB clocks. - This parameter must be a value of @ref RCC_PLLQ_Clock_Divider */ - - uint32_t PLLR; /*!< PLLR: Division for the main system clock. - User have to set the PLLR parameter correctly to not exceed max frequency 80MHZ. - This parameter must be a value of @ref RCC_PLLR_Clock_Divider */ - -}RCC_PLLInitTypeDef; - -/** - * @brief RCC Internal/External Oscillator (HSE, HSI, MSI, LSE and LSI) configuration structure definition - */ -typedef struct -{ - uint32_t OscillatorType; /*!< The oscillators to be configured. - This parameter can be a value of @ref RCC_Oscillator_Type */ - - uint32_t HSEState; /*!< The new state of the HSE. - This parameter can be a value of @ref RCC_HSE_Config */ - - uint32_t LSEState; /*!< The new state of the LSE. - This parameter can be a value of @ref RCC_LSE_Config */ - - uint32_t HSIState; /*!< The new state of the HSI. - This parameter can be a value of @ref RCC_HSI_Config */ - - uint32_t HSICalibrationValue; /*!< The calibration trimming value (default is RCC_HSICALIBRATION_DEFAULT). - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F on STM32L43x/STM32L44x/STM32L47x/STM32L48x devices. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F on the other devices */ - - uint32_t LSIState; /*!< The new state of the LSI. - This parameter can be a value of @ref RCC_LSI_Config */ - - uint32_t MSIState; /*!< The new state of the MSI. - This parameter can be a value of @ref RCC_MSI_Config */ - - uint32_t MSICalibrationValue; /*!< The calibration trimming value (default is RCC_MSICALIBRATION_DEFAULT). - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ - - uint32_t MSIClockRange; /*!< The MSI frequency range. - This parameter can be a value of @ref RCC_MSI_Clock_Range */ - - uint32_t HSI48State; /*!< The new state of the HSI48 (only applicable to STM32L43x/STM32L44x/STM32L49x/STM32L4Ax devices). - This parameter can be a value of @ref RCC_HSI48_Config */ - - RCC_PLLInitTypeDef PLL; /*!< Main PLL structure parameters */ - -}RCC_OscInitTypeDef; - -/** - * @brief RCC System, AHB and APB busses clock configuration structure definition - */ -typedef struct -{ - uint32_t ClockType; /*!< The clock to be configured. - This parameter can be a value of @ref RCC_System_Clock_Type */ - - uint32_t SYSCLKSource; /*!< The clock source used as system clock (SYSCLK). - This parameter can be a value of @ref RCC_System_Clock_Source */ - - uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK). - This parameter can be a value of @ref RCC_AHB_Clock_Source */ - - uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK). - This parameter can be a value of @ref RCC_APB1_APB2_Clock_Source */ - - uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK). - This parameter can be a value of @ref RCC_APB1_APB2_Clock_Source */ - -}RCC_ClkInitTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RCC_Exported_Constants RCC Exported Constants - * @{ - */ - -/** @defgroup RCC_Timeout_Value Timeout Values - * @{ - */ -#define RCC_DBP_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define RCC_LSE_TIMEOUT_VALUE LSE_STARTUP_TIMEOUT -/** - * @} - */ - -/** @defgroup RCC_Oscillator_Type Oscillator Type - * @{ - */ -#define RCC_OSCILLATORTYPE_NONE 0x00000000U /*!< Oscillator configuration unchanged */ -#define RCC_OSCILLATORTYPE_HSE 0x00000001U /*!< HSE to configure */ -#define RCC_OSCILLATORTYPE_HSI 0x00000002U /*!< HSI to configure */ -#define RCC_OSCILLATORTYPE_LSE 0x00000004U /*!< LSE to configure */ -#define RCC_OSCILLATORTYPE_LSI 0x00000008U /*!< LSI to configure */ -#define RCC_OSCILLATORTYPE_MSI 0x00000010U /*!< MSI to configure */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_OSCILLATORTYPE_HSI48 0x00000020U /*!< HSI48 to configure */ -#endif /* RCC_HSI48_SUPPORT */ -/** - * @} - */ - -/** @defgroup RCC_HSE_Config HSE Config - * @{ - */ -#define RCC_HSE_OFF 0x00000000U /*!< HSE clock deactivation */ -#define RCC_HSE_ON RCC_CR_HSEON /*!< HSE clock activation */ -#define RCC_HSE_BYPASS (RCC_CR_HSEBYP | RCC_CR_HSEON) /*!< External clock source for HSE clock */ -/** - * @} - */ - -/** @defgroup RCC_LSE_Config LSE Config - * @{ - */ -#define RCC_LSE_OFF 0x00000000U /*!< LSE clock deactivation */ -#define RCC_LSE_ON RCC_BDCR_LSEON /*!< LSE clock activation */ -#define RCC_LSE_BYPASS (RCC_BDCR_LSEBYP | RCC_BDCR_LSEON) /*!< External clock source for LSE clock */ -/** - * @} - */ - -/** @defgroup RCC_HSI_Config HSI Config - * @{ - */ -#define RCC_HSI_OFF 0x00000000U /*!< HSI clock deactivation */ -#define RCC_HSI_ON RCC_CR_HSION /*!< HSI clock activation */ - -#if defined(STM32L431xx) || defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) -#define RCC_HSICALIBRATION_DEFAULT 0x10U /* Default HSI calibration trimming value */ -#else -#define RCC_HSICALIBRATION_DEFAULT 0x40U /* Default HSI calibration trimming value */ -#endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ -/** - * @} - */ - -/** @defgroup RCC_LSI_Config LSI Config - * @{ - */ -#define RCC_LSI_OFF 0x00000000U /*!< LSI clock deactivation */ -#define RCC_LSI_ON RCC_CSR_LSION /*!< LSI clock activation */ -/** - * @} - */ - -/** @defgroup RCC_MSI_Config MSI Config - * @{ - */ -#define RCC_MSI_OFF 0x00000000U /*!< MSI clock deactivation */ -#define RCC_MSI_ON RCC_CR_MSION /*!< MSI clock activation */ - -#define RCC_MSICALIBRATION_DEFAULT 0U /*!< Default MSI calibration trimming value */ -/** - * @} - */ - -#if defined(RCC_HSI48_SUPPORT) -/** @defgroup RCC_HSI48_Config HSI48 Config - * @{ - */ -#define RCC_HSI48_OFF 0x00000000U /*!< HSI48 clock deactivation */ -#define RCC_HSI48_ON RCC_CRRCR_HSI48ON /*!< HSI48 clock activation */ -/** - * @} - */ -#else -/** @defgroup RCC_HSI48_Config HSI48 Config - * @{ - */ -#define RCC_HSI48_OFF 0x00000000U /*!< HSI48 clock deactivation */ -/** - * @} - */ -#endif /* RCC_HSI48_SUPPORT */ - -/** @defgroup RCC_PLL_Config PLL Config - * @{ - */ -#define RCC_PLL_NONE 0x00000000U /*!< PLL configuration unchanged */ -#define RCC_PLL_OFF 0x00000001U /*!< PLL deactivation */ -#define RCC_PLL_ON 0x00000002U /*!< PLL activation */ -/** - * @} - */ - -/** @defgroup RCC_PLLP_Clock_Divider PLLP Clock Divider - * @{ - */ -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) -#define RCC_PLLP_DIV2 0x00000002U /*!< PLLP division factor = 2 */ -#define RCC_PLLP_DIV3 0x00000003U /*!< PLLP division factor = 3 */ -#define RCC_PLLP_DIV4 0x00000004U /*!< PLLP division factor = 4 */ -#define RCC_PLLP_DIV5 0x00000005U /*!< PLLP division factor = 5 */ -#define RCC_PLLP_DIV6 0x00000006U /*!< PLLP division factor = 6 */ -#define RCC_PLLP_DIV7 0x00000007U /*!< PLLP division factor = 7 */ -#define RCC_PLLP_DIV8 0x00000008U /*!< PLLP division factor = 8 */ -#define RCC_PLLP_DIV9 0x00000009U /*!< PLLP division factor = 9 */ -#define RCC_PLLP_DIV10 0x0000000AU /*!< PLLP division factor = 10 */ -#define RCC_PLLP_DIV11 0x0000000BU /*!< PLLP division factor = 11 */ -#define RCC_PLLP_DIV12 0x0000000CU /*!< PLLP division factor = 12 */ -#define RCC_PLLP_DIV13 0x0000000DU /*!< PLLP division factor = 13 */ -#define RCC_PLLP_DIV14 0x0000000EU /*!< PLLP division factor = 14 */ -#define RCC_PLLP_DIV15 0x0000000FU /*!< PLLP division factor = 15 */ -#define RCC_PLLP_DIV16 0x00000010U /*!< PLLP division factor = 16 */ -#define RCC_PLLP_DIV17 0x00000011U /*!< PLLP division factor = 17 */ -#define RCC_PLLP_DIV18 0x00000012U /*!< PLLP division factor = 18 */ -#define RCC_PLLP_DIV19 0x00000013U /*!< PLLP division factor = 19 */ -#define RCC_PLLP_DIV20 0x00000014U /*!< PLLP division factor = 20 */ -#define RCC_PLLP_DIV21 0x00000015U /*!< PLLP division factor = 21 */ -#define RCC_PLLP_DIV22 0x00000016U /*!< PLLP division factor = 22 */ -#define RCC_PLLP_DIV23 0x00000017U /*!< PLLP division factor = 23 */ -#define RCC_PLLP_DIV24 0x00000018U /*!< PLLP division factor = 24 */ -#define RCC_PLLP_DIV25 0x00000019U /*!< PLLP division factor = 25 */ -#define RCC_PLLP_DIV26 0x0000001AU /*!< PLLP division factor = 26 */ -#define RCC_PLLP_DIV27 0x0000001BU /*!< PLLP division factor = 27 */ -#define RCC_PLLP_DIV28 0x0000001CU /*!< PLLP division factor = 28 */ -#define RCC_PLLP_DIV29 0x0000001DU /*!< PLLP division factor = 29 */ -#define RCC_PLLP_DIV30 0x0000001EU /*!< PLLP division factor = 30 */ -#define RCC_PLLP_DIV31 0x0000001FU /*!< PLLP division factor = 31 */ -#else -#define RCC_PLLP_DIV7 0x00000007U /*!< PLLP division factor = 7 */ -#define RCC_PLLP_DIV17 0x00000011U /*!< PLLP division factor = 17 */ -#endif /* RCC_PLLP_DIV_2_31_SUPPORT */ -/** - * @} - */ - -/** @defgroup RCC_PLLQ_Clock_Divider PLLQ Clock Divider - * @{ - */ -#define RCC_PLLQ_DIV2 0x00000002U /*!< PLLQ division factor = 2 */ -#define RCC_PLLQ_DIV4 0x00000004U /*!< PLLQ division factor = 4 */ -#define RCC_PLLQ_DIV6 0x00000006U /*!< PLLQ division factor = 6 */ -#define RCC_PLLQ_DIV8 0x00000008U /*!< PLLQ division factor = 8 */ -/** - * @} - */ - -/** @defgroup RCC_PLLR_Clock_Divider PLLR Clock Divider - * @{ - */ -#define RCC_PLLR_DIV2 0x00000002U /*!< PLLR division factor = 2 */ -#define RCC_PLLR_DIV4 0x00000004U /*!< PLLR division factor = 4 */ -#define RCC_PLLR_DIV6 0x00000006U /*!< PLLR division factor = 6 */ -#define RCC_PLLR_DIV8 0x00000008U /*!< PLLR division factor = 8 */ -/** - * @} - */ - -/** @defgroup RCC_PLL_Clock_Source PLL Clock Source - * @{ - */ -#define RCC_PLLSOURCE_NONE 0x00000000U /*!< No clock selected as PLL entry clock source */ -#define RCC_PLLSOURCE_MSI RCC_PLLCFGR_PLLSRC_MSI /*!< MSI clock selected as PLL entry clock source */ -#define RCC_PLLSOURCE_HSI RCC_PLLCFGR_PLLSRC_HSI /*!< HSI clock selected as PLL entry clock source */ -#define RCC_PLLSOURCE_HSE RCC_PLLCFGR_PLLSRC_HSE /*!< HSE clock selected as PLL entry clock source */ -/** - * @} - */ - -/** @defgroup RCC_PLL_Clock_Output PLL Clock Output - * @{ - */ -#if defined(RCC_PLLSAI2_SUPPORT) -#define RCC_PLL_SAI3CLK RCC_PLLCFGR_PLLPEN /*!< PLLSAI3CLK selection from main PLL (for devices with PLLSAI2) */ -#else -#define RCC_PLL_SAI2CLK RCC_PLLCFGR_PLLPEN /*!< PLLSAI2CLK selection from main PLL (for devices without PLLSAI2) */ -#endif /* RCC_PLLSAI2_SUPPORT */ -#define RCC_PLL_48M1CLK RCC_PLLCFGR_PLLQEN /*!< PLL48M1CLK selection from main PLL */ -#define RCC_PLL_SYSCLK RCC_PLLCFGR_PLLREN /*!< PLLCLK selection from main PLL */ -/** - * @} - */ - -/** @defgroup RCC_PLLSAI1_Clock_Output PLLSAI1 Clock Output - * @{ - */ -#define RCC_PLLSAI1_SAI1CLK RCC_PLLSAI1CFGR_PLLSAI1PEN /*!< PLLSAI1CLK selection from PLLSAI1 */ -#define RCC_PLLSAI1_48M2CLK RCC_PLLSAI1CFGR_PLLSAI1QEN /*!< PLL48M2CLK selection from PLLSAI1 */ -#define RCC_PLLSAI1_ADC1CLK RCC_PLLSAI1CFGR_PLLSAI1REN /*!< PLLADC1CLK selection from PLLSAI1 */ -/** - * @} - */ - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** @defgroup RCC_PLLSAI2_Clock_Output PLLSAI2 Clock Output - * @{ - */ -#define RCC_PLLSAI2_SAI2CLK RCC_PLLSAI2CFGR_PLLSAI2PEN /*!< PLLSAI2CLK selection from PLLSAI2 */ -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) -#define RCC_PLLSAI2_DSICLK RCC_PLLSAI2CFGR_PLLSAI2QEN /*!< PLLDSICLK selection from PLLSAI2 */ -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) -#define RCC_PLLSAI2_ADC2CLK RCC_PLLSAI2CFGR_PLLSAI2REN /*!< PLLADC2CLK selection from PLLSAI2 */ -#else -#define RCC_PLLSAI2_LTDCCLK RCC_PLLSAI2CFGR_PLLSAI2REN /*!< PLLLTDCCLK selection from PLLSAI2 */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ -/** - * @} - */ - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** @defgroup RCC_MSI_Clock_Range MSI Clock Range - * @{ - */ -#define RCC_MSIRANGE_0 RCC_CR_MSIRANGE_0 /*!< MSI = 100 KHz */ -#define RCC_MSIRANGE_1 RCC_CR_MSIRANGE_1 /*!< MSI = 200 KHz */ -#define RCC_MSIRANGE_2 RCC_CR_MSIRANGE_2 /*!< MSI = 400 KHz */ -#define RCC_MSIRANGE_3 RCC_CR_MSIRANGE_3 /*!< MSI = 800 KHz */ -#define RCC_MSIRANGE_4 RCC_CR_MSIRANGE_4 /*!< MSI = 1 MHz */ -#define RCC_MSIRANGE_5 RCC_CR_MSIRANGE_5 /*!< MSI = 2 MHz */ -#define RCC_MSIRANGE_6 RCC_CR_MSIRANGE_6 /*!< MSI = 4 MHz */ -#define RCC_MSIRANGE_7 RCC_CR_MSIRANGE_7 /*!< MSI = 8 MHz */ -#define RCC_MSIRANGE_8 RCC_CR_MSIRANGE_8 /*!< MSI = 16 MHz */ -#define RCC_MSIRANGE_9 RCC_CR_MSIRANGE_9 /*!< MSI = 24 MHz */ -#define RCC_MSIRANGE_10 RCC_CR_MSIRANGE_10 /*!< MSI = 32 MHz */ -#define RCC_MSIRANGE_11 RCC_CR_MSIRANGE_11 /*!< MSI = 48 MHz */ -/** - * @} - */ - -/** @defgroup RCC_System_Clock_Type System Clock Type - * @{ - */ -#define RCC_CLOCKTYPE_SYSCLK 0x00000001U /*!< SYSCLK to configure */ -#define RCC_CLOCKTYPE_HCLK 0x00000002U /*!< HCLK to configure */ -#define RCC_CLOCKTYPE_PCLK1 0x00000004U /*!< PCLK1 to configure */ -#define RCC_CLOCKTYPE_PCLK2 0x00000008U /*!< PCLK2 to configure */ -/** - * @} - */ - -/** @defgroup RCC_System_Clock_Source System Clock Source - * @{ - */ -#define RCC_SYSCLKSOURCE_MSI RCC_CFGR_SW_MSI /*!< MSI selection as system clock */ -#define RCC_SYSCLKSOURCE_HSI RCC_CFGR_SW_HSI /*!< HSI selection as system clock */ -#define RCC_SYSCLKSOURCE_HSE RCC_CFGR_SW_HSE /*!< HSE selection as system clock */ -#define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL /*!< PLL selection as system clock */ -/** - * @} - */ - -/** @defgroup RCC_System_Clock_Source_Status System Clock Source Status - * @{ - */ -#define RCC_SYSCLKSOURCE_STATUS_MSI RCC_CFGR_SWS_MSI /*!< MSI used as system clock */ -#define RCC_SYSCLKSOURCE_STATUS_HSI RCC_CFGR_SWS_HSI /*!< HSI used as system clock */ -#define RCC_SYSCLKSOURCE_STATUS_HSE RCC_CFGR_SWS_HSE /*!< HSE used as system clock */ -#define RCC_SYSCLKSOURCE_STATUS_PLLCLK RCC_CFGR_SWS_PLL /*!< PLL used as system clock */ -/** - * @} - */ - -/** @defgroup RCC_AHB_Clock_Source AHB Clock Source - * @{ - */ -#define RCC_SYSCLK_DIV1 RCC_CFGR_HPRE_DIV1 /*!< SYSCLK not divided */ -#define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ -#define RCC_SYSCLK_DIV4 RCC_CFGR_HPRE_DIV4 /*!< SYSCLK divided by 4 */ -#define RCC_SYSCLK_DIV8 RCC_CFGR_HPRE_DIV8 /*!< SYSCLK divided by 8 */ -#define RCC_SYSCLK_DIV16 RCC_CFGR_HPRE_DIV16 /*!< SYSCLK divided by 16 */ -#define RCC_SYSCLK_DIV64 RCC_CFGR_HPRE_DIV64 /*!< SYSCLK divided by 64 */ -#define RCC_SYSCLK_DIV128 RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */ -#define RCC_SYSCLK_DIV256 RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */ -#define RCC_SYSCLK_DIV512 RCC_CFGR_HPRE_DIV512 /*!< SYSCLK divided by 512 */ -/** - * @} - */ - -/** @defgroup RCC_APB1_APB2_Clock_Source APB1 APB2 Clock Source - * @{ - */ -#define RCC_HCLK_DIV1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */ -#define RCC_HCLK_DIV2 RCC_CFGR_PPRE1_DIV2 /*!< HCLK divided by 2 */ -#define RCC_HCLK_DIV4 RCC_CFGR_PPRE1_DIV4 /*!< HCLK divided by 4 */ -#define RCC_HCLK_DIV8 RCC_CFGR_PPRE1_DIV8 /*!< HCLK divided by 8 */ -#define RCC_HCLK_DIV16 RCC_CFGR_PPRE1_DIV16 /*!< HCLK divided by 16 */ -/** - * @} - */ - -/** @defgroup RCC_RTC_Clock_Source RTC Clock Source - * @{ - */ -#define RCC_RTCCLKSOURCE_NONE 0x00000000U /*!< No clock used as RTC clock */ -#define RCC_RTCCLKSOURCE_LSE RCC_BDCR_RTCSEL_0 /*!< LSE oscillator clock used as RTC clock */ -#define RCC_RTCCLKSOURCE_LSI RCC_BDCR_RTCSEL_1 /*!< LSI oscillator clock used as RTC clock */ -#define RCC_RTCCLKSOURCE_HSE_DIV32 RCC_BDCR_RTCSEL /*!< HSE oscillator clock divided by 32 used as RTC clock */ -/** - * @} - */ - -/** @defgroup RCC_MCO_Index MCO Index - * @{ - */ -#define RCC_MCO1 0x00000000U -#define RCC_MCO RCC_MCO1 /*!< MCO1 to be compliant with other families with 2 MCOs*/ -/** - * @} - */ - -/** @defgroup RCC_MCO1_Clock_Source MCO1 Clock Source - * @{ - */ -#define RCC_MCO1SOURCE_NOCLOCK 0x00000000U /*!< MCO1 output disabled, no clock on MCO1 */ -#define RCC_MCO1SOURCE_SYSCLK RCC_CFGR_MCOSEL_0 /*!< SYSCLK selection as MCO1 source */ -#define RCC_MCO1SOURCE_MSI RCC_CFGR_MCOSEL_1 /*!< MSI selection as MCO1 source */ -#define RCC_MCO1SOURCE_HSI (RCC_CFGR_MCOSEL_0| RCC_CFGR_MCOSEL_1) /*!< HSI selection as MCO1 source */ -#define RCC_MCO1SOURCE_HSE RCC_CFGR_MCOSEL_2 /*!< HSE selection as MCO1 source */ -#define RCC_MCO1SOURCE_PLLCLK (RCC_CFGR_MCOSEL_0|RCC_CFGR_MCOSEL_2) /*!< PLLCLK selection as MCO1 source */ -#define RCC_MCO1SOURCE_LSI (RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_2) /*!< LSI selection as MCO1 source */ -#define RCC_MCO1SOURCE_LSE (RCC_CFGR_MCOSEL_0|RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_2) /*!< LSE selection as MCO1 source */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_MCO1SOURCE_HSI48 RCC_CFGR_MCOSEL_3 /*!< HSI48 selection as MCO1 source (STM32L43x/STM32L44x devices) */ -#endif /* RCC_HSI48_SUPPORT */ -/** - * @} - */ - -/** @defgroup RCC_MCOx_Clock_Prescaler MCO1 Clock Prescaler - * @{ - */ -#define RCC_MCODIV_1 RCC_CFGR_MCOPRE_DIV1 /*!< MCO not divided */ -#define RCC_MCODIV_2 RCC_CFGR_MCOPRE_DIV2 /*!< MCO divided by 2 */ -#define RCC_MCODIV_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO divided by 4 */ -#define RCC_MCODIV_8 RCC_CFGR_MCOPRE_DIV8 /*!< MCO divided by 8 */ -#define RCC_MCODIV_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO divided by 16 */ -/** - * @} - */ - -/** @defgroup RCC_Interrupt Interrupts - * @{ - */ -#define RCC_IT_LSIRDY RCC_CIFR_LSIRDYF /*!< LSI Ready Interrupt flag */ -#define RCC_IT_LSERDY RCC_CIFR_LSERDYF /*!< LSE Ready Interrupt flag */ -#define RCC_IT_MSIRDY RCC_CIFR_MSIRDYF /*!< MSI Ready Interrupt flag */ -#define RCC_IT_HSIRDY RCC_CIFR_HSIRDYF /*!< HSI16 Ready Interrupt flag */ -#define RCC_IT_HSERDY RCC_CIFR_HSERDYF /*!< HSE Ready Interrupt flag */ -#define RCC_IT_PLLRDY RCC_CIFR_PLLRDYF /*!< PLL Ready Interrupt flag */ -#define RCC_IT_PLLSAI1RDY RCC_CIFR_PLLSAI1RDYF /*!< PLLSAI1 Ready Interrupt flag */ -#if defined(RCC_PLLSAI2_SUPPORT) -#define RCC_IT_PLLSAI2RDY RCC_CIFR_PLLSAI2RDYF /*!< PLLSAI2 Ready Interrupt flag */ -#endif /* RCC_PLLSAI2_SUPPORT */ -#define RCC_IT_CSS RCC_CIFR_CSSF /*!< Clock Security System Interrupt flag */ -#define RCC_IT_LSECSS RCC_CIFR_LSECSSF /*!< LSE Clock Security System Interrupt flag */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_IT_HSI48RDY RCC_CIFR_HSI48RDYF /*!< HSI48 Ready Interrupt flag */ -#endif /* RCC_HSI48_SUPPORT */ -/** - * @} - */ - -/** @defgroup RCC_Flag Flags - * Elements values convention: XXXYYYYYb - * - YYYYY : Flag position in the register - * - XXX : Register index - * - 001: CR register - * - 010: BDCR register - * - 011: CSR register - * - 100: CRRCR register - * @{ - */ -/* Flags in the CR register */ -#define RCC_FLAG_MSIRDY ((CR_REG_INDEX << 5U) | RCC_CR_MSIRDY_Pos) /*!< MSI Ready flag */ -#define RCC_FLAG_HSIRDY ((CR_REG_INDEX << 5U) | RCC_CR_HSIRDY_Pos) /*!< HSI Ready flag */ -#define RCC_FLAG_HSERDY ((CR_REG_INDEX << 5U) | RCC_CR_HSERDY_Pos) /*!< HSE Ready flag */ -#define RCC_FLAG_PLLRDY ((CR_REG_INDEX << 5U) | RCC_CR_PLLRDY_Pos) /*!< PLL Ready flag */ -#define RCC_FLAG_PLLSAI1RDY ((CR_REG_INDEX << 5U) | RCC_CR_PLLSAI1RDY_Pos) /*!< PLLSAI1 Ready flag */ -#if defined(RCC_PLLSAI2_SUPPORT) -#define RCC_FLAG_PLLSAI2RDY ((CR_REG_INDEX << 5U) | RCC_CR_PLLSAI2RDY_Pos) /*!< PLLSAI2 Ready flag */ -#endif /* RCC_PLLSAI2_SUPPORT */ - -/* Flags in the BDCR register */ -#define RCC_FLAG_LSERDY ((BDCR_REG_INDEX << 5U) | RCC_BDCR_LSERDY_Pos) /*!< LSE Ready flag */ -#define RCC_FLAG_LSECSSD ((BDCR_REG_INDEX << 5U) | RCC_BDCR_LSECSSD_Pos) /*!< LSE Clock Security System Interrupt flag */ - -/* Flags in the CSR register */ -#define RCC_FLAG_LSIRDY ((CSR_REG_INDEX << 5U) | RCC_CSR_LSIRDY_Pos) /*!< LSI Ready flag */ -#define RCC_FLAG_RMVF ((CSR_REG_INDEX << 5U) | RCC_CSR_RMVF_Pos) /*!< Remove reset flag */ -#define RCC_FLAG_FWRST ((CSR_REG_INDEX << 5U) | RCC_CSR_FWRSTF_Pos) /*!< Firewall reset flag */ -#define RCC_FLAG_OBLRST ((CSR_REG_INDEX << 5U) | RCC_CSR_OBLRSTF_Pos) /*!< Option Byte Loader reset flag */ -#define RCC_FLAG_PINRST ((CSR_REG_INDEX << 5U) | RCC_CSR_PINRSTF_Pos) /*!< PIN reset flag */ -#define RCC_FLAG_BORRST ((CSR_REG_INDEX << 5U) | RCC_CSR_BORRSTF_Pos) /*!< BOR reset flag */ -#define RCC_FLAG_SFTRST ((CSR_REG_INDEX << 5U) | RCC_CSR_SFTRSTF_Pos) /*!< Software Reset flag */ -#define RCC_FLAG_IWDGRST ((CSR_REG_INDEX << 5U) | RCC_CSR_IWDGRSTF_Pos) /*!< Independent Watchdog reset flag */ -#define RCC_FLAG_WWDGRST ((CSR_REG_INDEX << 5U) | RCC_CSR_WWDGRSTF_Pos) /*!< Window watchdog reset flag */ -#define RCC_FLAG_LPWRRST ((CSR_REG_INDEX << 5U) | RCC_CSR_LPWRRSTF_Pos) /*!< Low-Power reset flag */ - -#if defined(RCC_HSI48_SUPPORT) -/* Flags in the CRRCR register */ -#define RCC_FLAG_HSI48RDY ((CRRCR_REG_INDEX << 5U) | RCC_CRRCR_HSI48RDY_Pos) /*!< HSI48 Ready flag */ -#endif /* RCC_HSI48_SUPPORT */ -/** - * @} - */ - -/** @defgroup RCC_LSEDrive_Config LSE Drive Config - * @{ - */ -#define RCC_LSEDRIVE_LOW 0x00000000U /*!< LSE low drive capability */ -#define RCC_LSEDRIVE_MEDIUMLOW RCC_BDCR_LSEDRV_0 /*!< LSE medium low drive capability */ -#define RCC_LSEDRIVE_MEDIUMHIGH RCC_BDCR_LSEDRV_1 /*!< LSE medium high drive capability */ -#define RCC_LSEDRIVE_HIGH RCC_BDCR_LSEDRV /*!< LSE high drive capability */ -/** - * @} - */ - -/** @defgroup RCC_Stop_WakeUpClock Wake-Up from STOP Clock - * @{ - */ -#define RCC_STOP_WAKEUPCLOCK_MSI 0x00000000U /*!< MSI selection after wake-up from STOP */ -#define RCC_STOP_WAKEUPCLOCK_HSI RCC_CFGR_STOPWUCK /*!< HSI selection after wake-up from STOP */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ - -/** @defgroup RCC_Exported_Macros RCC Exported Macros - * @{ - */ - -/** @defgroup RCC_AHB1_Peripheral_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable - * @brief Enable or disable the AHB1 peripheral clock. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_DMA1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_DMA2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_CRC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_TSC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GFXMMU */ - - -#define __HAL_RCC_DMA1_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN) - -#define __HAL_RCC_DMA2_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN) - -#define __HAL_RCC_CRC_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) - -#define __HAL_RCC_TSC_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN) -#endif /* GFXMMU */ - -/** - * @} - */ - -/** @defgroup RCC_AHB2_Peripheral_Clock_Enable_Disable AHB2 Peripheral Clock Enable Disable - * @brief Enable or disable the AHB2 peripheral clock. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_GPIOA_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_GPIOB_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_GPIOC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOIEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOIEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* HASH */ - -#define __HAL_RCC_RNG_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OSPIMEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OSPIMEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* SDMMC1 && RCC_AHB2ENR_SDMMC1EN */ - - -#define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) - -#define __HAL_RCC_GPIOB_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN) - -#define __HAL_RCC_GPIOC_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOIEN) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN); -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) -#endif /* HASH */ - -#define __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OSPIMEN) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN) -#endif /* SDMMC1 && RCC_AHB2ENR_SDMMC1EN */ - -/** - * @} - */ - -/** @defgroup RCC_AHB3_Clock_Enable_Disable AHB3 Peripheral Clock Enable Disable - * @brief Enable or disable the AHB3 peripheral clock. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI2EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* OCTOSPI2 */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI1EN) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI2EN) -#endif /* OCTOSPI2 */ - -/** - * @} - */ - -/** @defgroup RCC_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable - * @brief Enable or disable the APB1 peripheral clock. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_TIM2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_TIM7_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(LCD) -#define __HAL_RCC_LCD_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* LCD */ - -#if defined(RCC_APB1ENR1_RTCAPBEN) -#define __HAL_RCC_RTCAPB_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* RCC_APB1ENR1_RTCAPBEN */ - -#define __HAL_RCC_WWDG_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_USART2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(USART3) -#define __HAL_RCC_USART3_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN2EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* USB */ - -#define __HAL_RCC_PWR_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_DAC1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_OPAMP_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_LPTIM1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_LPUART1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \ - UNUSED(tmpreg); \ - } while(0) - - -#define __HAL_RCC_TIM2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN) - -#define __HAL_RCC_TIM7_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) - -#if defined(LCD) -#define __HAL_RCC_LCD_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN); -#endif /* LCD */ - -#if defined(RCC_APB1ENR1_RTCAPBEN) -#define __HAL_RCC_RTCAPB_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN); -#endif /* RCC_APB1ENR1_RTCAPBEN */ - -#if defined(SPI2) -#define __HAL_RCC_SPI2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN) - -#define __HAL_RCC_USART2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN) - -#if defined(USART3) -#define __HAL_RCC_USART3_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); -#endif /* CRS */ - -#define __HAL_RCC_CAN1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN2EN) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN); -#endif /* USB */ - -#define __HAL_RCC_PWR_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN) - -#define __HAL_RCC_DAC1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN) - -#define __HAL_RCC_OPAMP_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN) - -#define __HAL_RCC_LPTIM1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN) - -#define __HAL_RCC_LPUART1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN) - -/** - * @} - */ - -/** @defgroup RCC_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable - * @brief Enable or disable the APB2 peripheral clock. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_SYSCFG_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_FIREWALL_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(SDMMC1) && defined(RCC_APB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* SDMMC1 && RCC_APB2ENR_SDMMC1EN */ - -#define __HAL_RCC_TIM1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_SPI1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \ - UNUSED(tmpreg); \ - } while(0) - - -#define __HAL_RCC_TIM15_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_TIM16_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* DSI */ - - -#define __HAL_RCC_SYSCFG_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) - -#if defined(SDMMC1) && defined(RCC_APB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN) -#endif /* SDMMC1 && RCC_APB2ENR_SDMMC1EN */ - -#define __HAL_RCC_TIM1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN) - -#define __HAL_RCC_SPI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) - -#define __HAL_RCC_TIM15_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN) - -#define __HAL_RCC_TIM16_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN) -#endif /* DSI */ - -/** - * @} - */ - -/** @defgroup RCC_AHB1_Peripheral_Clock_Enable_Disable_Status AHB1 Peripheral Clock Enabled or Disabled Status - * @brief Check whether the AHB1 peripheral clock is enabled or not. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_DMA1_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN) != RESET) - -#define __HAL_RCC_DMA2_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN) != RESET) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN) != RESET) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN) != RESET) - -#define __HAL_RCC_CRC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) != RESET) - -#define __HAL_RCC_TSC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN) != RESET) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN) != RESET) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN) != RESET) -#endif /* GFXMMU */ - - -#define __HAL_RCC_DMA1_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN) == RESET) - -#define __HAL_RCC_DMA2_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN) == RESET) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN) == RESET) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN) == RESET) - -#define __HAL_RCC_CRC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) == RESET) - -#define __HAL_RCC_TSC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN) == RESET) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN) == RESET) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN) == RESET) -#endif /* GFXMMU */ - -/** - * @} - */ - -/** @defgroup RCC_AHB2_Clock_Enable_Disable_Status AHB2 Peripheral Clock Enabled or Disabled Status - * @brief Check whether the AHB2 peripheral clock is enabled or not. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_GPIOA_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) != RESET) - -#define __HAL_RCC_GPIOB_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN) != RESET) - -#define __HAL_RCC_GPIOC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN) != RESET) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) != RESET) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN) != RESET) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN) != RESET) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) != RESET) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN) != RESET) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOIEN) != RESET) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN) != RESET) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) != RESET) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN) != RESET) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN) != RESET) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) != RESET) -#endif /* HASH */ - -#define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) != RESET) - - -#define __HAL_RCC_GPIOA_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) == RESET) - -#define __HAL_RCC_GPIOB_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN) == RESET) - -#define __HAL_RCC_GPIOC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN) == RESET) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) == RESET) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN) == RESET) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN) == RESET) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) == RESET) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN) == RESET) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOIEN) == RESET) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN) == RESET) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) == RESET) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN) == RESET) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN) == RESET) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) == RESET) -#endif /* HASH */ - -#define __HAL_RCC_RNG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) == RESET) - -/** - * @} - */ - -/** @defgroup RCC_AHB3_Clock_Enable_Disable_Status AHB3 Peripheral Clock Enabled or Disabled Status - * @brief Check whether the AHB3 peripheral clock is enabled or not. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) != RESET) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_IS_CLK_ENABLED() (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN) != RESET) -#endif /* QUADSPI */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) == RESET) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_IS_CLK_DISABLED() (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN) == RESET) -#endif /* QUADSPI */ - -/** - * @} - */ - -/** @defgroup RCC_APB1_Clock_Enable_Disable_Status APB1 Peripheral Clock Enabled or Disabled Status - * @brief Check whether the APB1 peripheral clock is enabled or not. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_TIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) != RESET) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN) != RESET) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) != RESET) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN) != RESET) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN) != RESET) - -#define __HAL_RCC_TIM7_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) != RESET) - -#if defined(LCD) -#define __HAL_RCC_LCD_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN) != RESET) -#endif /* LCD */ - -#if defined(RCC_APB1ENR1_RTCAPBEN) -#define __HAL_RCC_RTCAPB_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN) != RESET) -#endif /* RCC_APB1ENR1_RTCAPBEN */ - -#define __HAL_RCC_WWDG_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) != RESET) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN) != RESET) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN) != RESET) - -#define __HAL_RCC_USART2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN) != RESET) - -#if defined(USART3) -#define __HAL_RCC_USART3_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN) != RESET) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN) != RESET) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN) != RESET) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN) != RESET) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN) != RESET) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN) != RESET) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN) != RESET) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) != RESET) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN) != RESET) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN2EN) != RESET) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN) != RESET) -#endif /* USB */ - -#define __HAL_RCC_PWR_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN) != RESET) - -#define __HAL_RCC_DAC1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN) != RESET) - -#define __HAL_RCC_OPAMP_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN) != RESET) - -#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN) != RESET) - -#define __HAL_RCC_LPUART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) != RESET) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN) != RESET) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN) != RESET) - - -#define __HAL_RCC_TIM2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) == RESET) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN) == RESET) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) == RESET) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN) == RESET) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN) == RESET) - -#define __HAL_RCC_TIM7_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) == RESET) - -#if defined(LCD) -#define __HAL_RCC_LCD_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN) == RESET) -#endif /* LCD */ - -#if defined(RCC_APB1ENR1_RTCAPBEN) -#define __HAL_RCC_RTCAPB_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN) == RESET) -#endif /* RCC_APB1ENR1_RTCAPBEN */ - -#define __HAL_RCC_WWDG_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) == RESET) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN) == RESET) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN) == RESET) - -#define __HAL_RCC_USART2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN) == RESET) - -#if defined(USART3) -#define __HAL_RCC_USART3_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN) == RESET) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN) == RESET) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN) == RESET) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN) == RESET) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN) == RESET) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN) == RESET) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN) == RESET) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) == RESET) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN) == RESET) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN2EN) == RESET) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN) == RESET) -#endif /* USB */ - -#define __HAL_RCC_PWR_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN) == RESET) - -#define __HAL_RCC_DAC1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN) == RESET) - -#define __HAL_RCC_OPAMP_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN) == RESET) - -#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN) == RESET) - -#define __HAL_RCC_LPUART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) == RESET) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN) == RESET) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN) == RESET) - -/** - * @} - */ - -/** @defgroup RCC_APB2_Clock_Enable_Disable_Status APB2 Peripheral Clock Enabled or Disabled Status - * @brief Check whether the APB2 peripheral clock is enabled or not. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) != RESET) - -#define __HAL_RCC_FIREWALL_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN) != RESET) - -#if defined(SDMMC1) && defined(RCC_APB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN) != RESET) -#endif /* SDMMC1 && RCC_APB2ENR_SDMMC1EN */ - -#define __HAL_RCC_TIM1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN) != RESET) - -#define __HAL_RCC_SPI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN) != RESET) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) != RESET) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != RESET) - -#define __HAL_RCC_TIM15_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN) != RESET) - -#define __HAL_RCC_TIM16_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN) != RESET) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN) != RESET) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) != RESET) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) != RESET) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN) != RESET) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN) != RESET) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN) != RESET) -#endif /* DSI */ - - -#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) == RESET) - -#if defined(SDMMC1) && defined(RCC_APB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN) == RESET) -#endif /* SDMMC1 && RCC_APB2ENR_SDMMC1EN */ - -#define __HAL_RCC_TIM1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN) == RESET) - -#define __HAL_RCC_SPI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN) == RESET) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) == RESET) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) == RESET) - -#define __HAL_RCC_TIM15_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN) == RESET) - -#define __HAL_RCC_TIM16_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN) == RESET) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN) == RESET) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) == RESET) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) == RESET) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN) == RESET) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN) == RESET) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN) == RESET) -#endif /* DSI */ - -/** - * @} - */ - -/** @defgroup RCC_AHB1_Force_Release_Reset AHB1 Peripheral Force Release Reset - * @brief Force or release AHB1 peripheral reset. - * @{ - */ -#define __HAL_RCC_AHB1_FORCE_RESET() WRITE_REG(RCC->AHB1RSTR, 0xFFFFFFFFU) - -#define __HAL_RCC_DMA1_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA1RST) - -#define __HAL_RCC_DMA2_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA2RST) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMAMUX1RST) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_FLASHRST) - -#define __HAL_RCC_CRC_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_CRCRST) - -#define __HAL_RCC_TSC_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_TSCRST) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA2DRST) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_GFXMMURST) -#endif /* GFXMMU */ - - -#define __HAL_RCC_AHB1_RELEASE_RESET() WRITE_REG(RCC->AHB1RSTR, 0x00000000U) - -#define __HAL_RCC_DMA1_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA1RST) - -#define __HAL_RCC_DMA2_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA2RST) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMAMUX1RST) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_FLASHRST) - -#define __HAL_RCC_CRC_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_CRCRST) - -#define __HAL_RCC_TSC_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_TSCRST) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA2DRST) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_GFXMMURST) -#endif /* GFXMMU */ - -/** - * @} - */ - -/** @defgroup RCC_AHB2_Force_Release_Reset AHB2 Peripheral Force Release Reset - * @brief Force or release AHB2 peripheral reset. - * @{ - */ -#define __HAL_RCC_AHB2_FORCE_RESET() WRITE_REG(RCC->AHB2RSTR, 0xFFFFFFFFU) - -#define __HAL_RCC_GPIOA_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOARST) - -#define __HAL_RCC_GPIOB_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOBRST) - -#define __HAL_RCC_GPIOC_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOCRST) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIODRST) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOERST) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOFRST) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOGRST) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOHRST) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOIRST) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_OTGFSRST) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_ADCRST) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_DCMIRST) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_AESRST) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_HASHRST) -#endif /* HASH */ - -#define __HAL_RCC_RNG_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_RNGRST) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_OSPIMRST) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2RSTR_SDMMC1RST) -#define __HAL_RCC_SDMMC1_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_SDMMC1RST) -#endif /* SDMMC1 && RCC_AHB2RSTR_SDMMC1RST */ - - -#define __HAL_RCC_AHB2_RELEASE_RESET() WRITE_REG(RCC->AHB2RSTR, 0x00000000U) - -#define __HAL_RCC_GPIOA_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOARST) - -#define __HAL_RCC_GPIOB_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOBRST) - -#define __HAL_RCC_GPIOC_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOCRST) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIODRST) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOERST) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOFRST) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOGRST) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOHRST) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOIRST) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_OTGFSRST) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_ADCRST) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_DCMIRST) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_AESRST) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_HASHRST) -#endif /* HASH */ - -#define __HAL_RCC_RNG_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_RNGRST) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_OSPIMRST) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2RSTR_SDMMC1RST) -#define __HAL_RCC_SDMMC1_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_SDMMC1RST) -#endif /* SDMMC1 && RCC_AHB2RSTR_SDMMC1RST */ - -/** - * @} - */ - -/** @defgroup RCC_AHB3_Force_Release_Reset AHB3 Peripheral Force Release Reset - * @brief Force or release AHB3 peripheral reset. - * @{ - */ -#define __HAL_RCC_AHB3_FORCE_RESET() WRITE_REG(RCC->AHB3RSTR, 0xFFFFFFFFU) - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_FORCE_RESET() SET_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_FMCRST) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_FORCE_RESET() SET_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_QSPIRST) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_FORCE_RESET() SET_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_OSPI1RST) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_FORCE_RESET() SET_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_OSPI2RST) -#endif /* OCTOSPI2 */ - -#define __HAL_RCC_AHB3_RELEASE_RESET() WRITE_REG(RCC->AHB3RSTR, 0x00000000U) - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_RELEASE_RESET() CLEAR_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_FMCRST) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_RELEASE_RESET() CLEAR_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_QSPIRST) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_RELEASE_RESET() CLEAR_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_OSPI1RST) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_RELEASE_RESET() CLEAR_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_OSPI2RST) -#endif /* OCTOSPI2 */ - -/** - * @} - */ - -/** @defgroup RCC_APB1_Force_Release_Reset APB1 Peripheral Force Release Reset - * @brief Force or release APB1 peripheral reset. - * @{ - */ -#define __HAL_RCC_APB1_FORCE_RESET() WRITE_REG(RCC->APB1RSTR1, 0xFFFFFFFFU) - -#define __HAL_RCC_TIM2_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM2RST) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM3RST) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM4RST) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM5RST) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM6RST) - -#define __HAL_RCC_TIM7_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM7RST) - -#if defined(LCD) -#define __HAL_RCC_LCD_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_LCDRST) -#endif /* LCD */ - -#if defined(SPI2) -#define __HAL_RCC_SPI2_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_SPI2RST) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_SPI3RST) - -#define __HAL_RCC_USART2_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USART2RST) - -#if defined(USART3) -#define __HAL_RCC_USART3_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USART3RST) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_UART4RST) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_UART5RST) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C1RST) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C2RST) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C3RST) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_FORCE_RESET() SET_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_I2C4RST) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CRSRST) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CAN1RST) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CAN2RST) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USBFSRST) -#endif /* USB */ - -#define __HAL_RCC_PWR_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_PWRRST) - -#define __HAL_RCC_DAC1_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_DAC1RST) - -#define __HAL_RCC_OPAMP_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_OPAMPRST) - -#define __HAL_RCC_LPTIM1_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_LPTIM1RST) - -#define __HAL_RCC_LPUART1_FORCE_RESET() SET_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_LPUART1RST) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_FORCE_RESET() SET_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_SWPMI1RST) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_FORCE_RESET() SET_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_LPTIM2RST) - - -#define __HAL_RCC_APB1_RELEASE_RESET() WRITE_REG(RCC->APB1RSTR1, 0x00000000U) - -#define __HAL_RCC_TIM2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM2RST) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM3RST) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM4RST) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM5RST) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM6RST) - -#define __HAL_RCC_TIM7_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM7RST) - -#if defined(LCD) -#define __HAL_RCC_LCD_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_LCDRST) -#endif /* LCD */ - -#if defined(SPI2) -#define __HAL_RCC_SPI2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_SPI2RST) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_SPI3RST) - -#define __HAL_RCC_USART2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USART2RST) - -#if defined(USART3) -#define __HAL_RCC_USART3_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USART3RST) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_UART4RST) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_UART5RST) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C1RST) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C2RST) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C3RST) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_I2C4RST) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CRSRST) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CAN1RST) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CAN2RST) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USBFSRST) -#endif /* USB */ - -#define __HAL_RCC_PWR_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_PWRRST) - -#define __HAL_RCC_DAC1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_DAC1RST) - -#define __HAL_RCC_OPAMP_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_OPAMPRST) - -#define __HAL_RCC_LPTIM1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_LPTIM1RST) - -#define __HAL_RCC_LPUART1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_LPUART1RST) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_SWPMI1RST) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_LPTIM2RST) - -/** - * @} - */ - -/** @defgroup RCC_APB2_Force_Release_Reset APB2 Peripheral Force Release Reset - * @brief Force or release APB2 peripheral reset. - * @{ - */ -#define __HAL_RCC_APB2_FORCE_RESET() WRITE_REG(RCC->APB2RSTR, 0xFFFFFFFFU) - -#define __HAL_RCC_SYSCFG_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SYSCFGRST) - -#if defined(SDMMC1) && defined(RCC_APB2RSTR_SDMMC1RST) -#define __HAL_RCC_SDMMC1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SDMMC1RST) -#endif /* SDMMC1 && RCC_APB2RSTR_SDMMC1RST */ - -#define __HAL_RCC_TIM1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM1RST) - -#define __HAL_RCC_SPI1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SPI1RST) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM8RST) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_USART1RST) - -#define __HAL_RCC_TIM15_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM15RST) - -#define __HAL_RCC_TIM16_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM16RST) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM17RST) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SAI1RST) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SAI2RST) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_DFSDM1RST) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_LTDCRST) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_DSIRST) -#endif /* DSI */ - - -#define __HAL_RCC_APB2_RELEASE_RESET() WRITE_REG(RCC->APB2RSTR, 0x00000000U) - -#define __HAL_RCC_SYSCFG_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SYSCFGRST) - -#if defined(SDMMC1) && defined(RCC_APB2RSTR_SDMMC1RST) -#define __HAL_RCC_SDMMC1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SDMMC1RST) -#endif /* SDMMC1 && RCC_APB2RSTR_SDMMC1RST */ - -#define __HAL_RCC_TIM1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM1RST) - -#define __HAL_RCC_SPI1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SPI1RST) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM8RST) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_USART1RST) - -#define __HAL_RCC_TIM15_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM15RST) - -#define __HAL_RCC_TIM16_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM16RST) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM17RST) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SAI1RST) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SAI2RST) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_DFSDM1RST) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_LTDCRST) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_DSIRST) -#endif /* DSI */ - -/** - * @} - */ - -/** @defgroup RCC_AHB1_Clock_Sleep_Enable_Disable AHB1 Peripheral Clock Sleep Enable Disable - * @brief Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_DMA1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA1SMEN) - -#define __HAL_RCC_DMA2_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2SMEN) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMAMUX1SMEN) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_FLASHSMEN) - -#define __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_SRAM1SMEN) - -#define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) - -#define __HAL_RCC_TSC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_TSCSMEN) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2DSMEN) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_GFXMMUSMEN) -#endif /* GFXMMU */ - - -#define __HAL_RCC_DMA1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA1SMEN) - -#define __HAL_RCC_DMA2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2SMEN) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMAMUX1SMEN) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_FLASHSMEN) - -#define __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_SRAM1SMEN) - -#define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) - -#define __HAL_RCC_TSC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_TSCSMEN) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2DSMEN) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_GFXMMUSMEN) -#endif /* GFXMMU */ - -/** - * @} - */ - -/** @defgroup RCC_AHB2_Clock_Sleep_Enable_Disable AHB2 Peripheral Clock Sleep Enable Disable - * @brief Enable or disable the AHB2 peripheral clock during Low Power (Sleep) mode. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) - -#define __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) - -#define __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOISMEN) -#endif /* GPIOI */ - -#define __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) - -#if defined(SRAM3) -#define __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM3SMEN) -#endif /* SRAM3 */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_DCMISMEN) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_HASHSMEN) -#endif /* HASH */ - -#define __HAL_RCC_RNG_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OSPIMSMEN) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN) -#endif /* SDMMC1 && RCC_AHB2SMENR_SDMMC1SMEN */ - - -#define __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) - -#define __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) - -#define __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOISMEN) -#endif /* GPIOI */ - -#define __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) - -#if defined(SRAM3) -#define __HAL_RCC_SRAM3_IS_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM3SMEN) -#endif /* SRAM3 */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_DCMISMEN) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_HASHSMEN) -#endif /* HASH */ - -#define __HAL_RCC_RNG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OSPIMSMEN) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN) -#endif /* SDMMC1 && RCC_AHB2SMENR_SDMMC1SMEN */ - -/** - * @} - */ - -/** @defgroup RCC_AHB3_Clock_Sleep_Enable_Disable AHB3 Peripheral Clock Sleep Enable Disable - * @brief Enable or disable the AHB3 peripheral clock during Low Power (Sleep) mode. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI2SMEN) -#endif /* OCTOSPI2 */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI2SMEN) -#endif /* OCTOSPI2 */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) -#endif /* FMC_BANK1 */ - -/** - * @} - */ - -/** @defgroup RCC_APB1_Clock_Sleep_Enable_Disable APB1 Peripheral Clock Sleep Enable Disable - * @brief Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) - -#define __HAL_RCC_TIM7_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) - -#if defined(LCD) -#define __HAL_RCC_LCD_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) -#endif /* LCD */ - -#if defined(RCC_APB1SMENR1_RTCAPBSMEN) -#define __HAL_RCC_RTCAPB_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_RTCAPBSMEN) -#endif /* RCC_APB1SMENR1_RTCAPBSMEN */ - -#define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) - -#define __HAL_RCC_USART2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) - -#if defined(USART3) -#define __HAL_RCC_USART3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_I2C4SMEN) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CRSSMEN) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN2SMEN) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USBFSSMEN) -#endif /* USB */ - -#define __HAL_RCC_PWR_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) - -#define __HAL_RCC_DAC1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) - -#define __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) - -#define __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) - -#define __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) - - -#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) - -#define __HAL_RCC_TIM7_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) - -#if defined(LCD) -#define __HAL_RCC_LCD_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) -#endif /* LCD */ - -#if defined(RCC_APB1SMENR1_RTCAPBSMEN) -#define __HAL_RCC_RTCAPB_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_RTCAPBSMEN) -#endif /* RCC_APB1SMENR1_RTCAPBSMEN */ - -#define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) - -#define __HAL_RCC_USART2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) - -#if defined(USART3) -#define __HAL_RCC_USART3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_I2C4SMEN) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CRSSMEN) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN2SMEN) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USBFSSMEN) -#endif /* USB */ - -#define __HAL_RCC_PWR_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) - -#define __HAL_RCC_DAC1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) - -#define __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) - -#define __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) - -#define __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) - -/** - * @} - */ - -/** @defgroup RCC_APB2_Clock_Sleep_Enable_Disable APB2 Peripheral Clock Sleep Enable Disable - * @brief Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) - -#if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) -#endif /* SDMMC1 && RCC_APB2SMENR_SDMMC1SMEN */ - -#define __HAL_RCC_TIM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) - -#define __HAL_RCC_SPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) - -#define __HAL_RCC_TIM15_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) - -#define __HAL_RCC_TIM16_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_LTDCSMEN) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DSISMEN) -#endif /* DSI */ - - -#define __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) - -#if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) -#endif /* SDMMC1 && RCC_APB2SMENR_SDMMC1SMEN */ - -#define __HAL_RCC_TIM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) - -#define __HAL_RCC_SPI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) - -#define __HAL_RCC_TIM15_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) - -#define __HAL_RCC_TIM16_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_LTDCSMEN) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DSISMEN) -#endif /* DSI */ - -/** - * @} - */ - -/** @defgroup RCC_AHB1_Clock_Sleep_Enable_Disable_Status AHB1 Peripheral Clock Sleep Enabled or Disabled Status - * @brief Check whether the AHB1 peripheral clock during Low Power (Sleep) mode is enabled or not. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_DMA1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA1SMEN) != RESET) - -#define __HAL_RCC_DMA2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2SMEN) != RESET) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMAMUX1SMEN) != RESET) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_FLASHSMEN) != RESET) - -#define __HAL_RCC_SRAM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_SRAM1SMEN) != RESET) - -#define __HAL_RCC_CRC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) != RESET) - -#define __HAL_RCC_TSC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_TSCSMEN) != RESET) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2DSMEN) != RESET) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_GFXMMUSMEN) != RESET) -#endif /* GFXMMU */ - - -#define __HAL_RCC_DMA1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA1SMEN) == RESET) - -#define __HAL_RCC_DMA2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2SMEN) == RESET) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMAMUX1SMEN) == RESET) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_FLASHSMEN) == RESET) - -#define __HAL_RCC_SRAM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_SRAM1SMEN) == RESET) - -#define __HAL_RCC_CRC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) == RESET) - -#define __HAL_RCC_TSC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_TSCSMEN) == RESET) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2DSMEN) == RESET) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_GFXMMUSMEN) == RESET) -#endif /* GFXMMU */ - -/** - * @} - */ - -/** @defgroup RCC_AHB2_Clock_Sleep_Enable_Disable_Status AHB2 Peripheral Clock Sleep Enabled or Disabled Status - * @brief Check whether the AHB2 peripheral clock during Low Power (Sleep) mode is enabled or not. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) != RESET) - -#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) != RESET) - -#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) != RESET) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) != RESET) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) != RESET) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) != RESET) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) != RESET) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) != RESET) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOISMEN) != RESET) -#endif /* GPIOI */ - -#define __HAL_RCC_SRAM2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) != RESET) - -#if defined(SRAM3) -#define __HAL_RCC_SRAM3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM3SMEN) != RESET) -#endif /* SRAM3 */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) != RESET) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) != RESET) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_DCMISMEN) != RESET) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) != RESET) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_HASHSMEN) != RESET) -#endif /* HASH */ - -#define __HAL_RCC_RNG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) != RESET) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OSPIMSMEN) != RESET) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN) != RESET) -#endif /* SDMMC1 && RCC_AHB2SMENR_SDMMC1SMEN */ - - -#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) == RESET) - -#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) == RESET) - -#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) == RESET) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) == RESET) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) == RESET) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) == RESET) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) == RESET) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) == RESET) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOISMEN) == RESET) -#endif /* GPIOI */ - -#define __HAL_RCC_SRAM2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) == RESET) - -#if defined(SRAM3) -#define __HAL_RCC_SRAM3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM3SMEN) == RESET) -#endif /* SRAM3 */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) == RESET) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) == RESET) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_DCMISMEN) == RESET) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) == RESET) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_HASHSMEN) == RESET) -#endif /* HASH */ - -#define __HAL_RCC_RNG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) == RESET) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OSPIMSMEN) == RESET) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN) == RESET) -#endif /* SDMMC1 && RCC_AHB2SMENR_SDMMC1SMEN */ - -/** - * @} - */ - -/** @defgroup RCC_AHB3_Clock_Sleep_Enable_Disable_Status AHB3 Peripheral Clock Sleep Enabled or Disabled Status - * @brief Check whether the AHB3 peripheral clock during Low Power (Sleep) mode is enabled or not. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) != RESET) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN) != RESET) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI2SMEN) != RESET) -#endif /* OCTOSPI2 */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) != RESET) -#endif /* FMC_BANK1 */ - - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) == RESET) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN) == RESET) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI2SMEN) == RESET) -#endif /* OCTOSPI2 */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) == RESET) -#endif /* FMC_BANK1 */ - -/** - * @} - */ - -/** @defgroup RCC_APB1_Clock_Sleep_Enable_Disable_Status APB1 Peripheral Clock Sleep Enabled or Disabled Status - * @brief Check whether the APB1 peripheral clock during Low Power (Sleep) mode is enabled or not. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) != RESET) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) != RESET) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) != RESET) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) != RESET) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) != RESET) - -#define __HAL_RCC_TIM7_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) != RESET) - -#if defined(LCD) -#define __HAL_RCC_LCD_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) != RESET) -#endif /* LCD */ - -#if defined(RCC_APB1SMENR1_RTCAPBSMEN) -#define __HAL_RCC_RTCAPB_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_RTCAPBSMEN) != RESET) -#endif /* RCC_APB1SMENR1_RTCAPBSMEN */ - -#define __HAL_RCC_WWDG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) != RESET) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) != RESET) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) != RESET) - -#define __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) != RESET) - -#if defined(USART3) -#define __HAL_RCC_USART3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) != RESET) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) != RESET) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) != RESET) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) != RESET) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) != RESET) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) != RESET) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_I2C4SMEN) != RESET) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CRSSMEN) != RESET) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) != RESET) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN2SMEN) != RESET) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USBFSSMEN) != RESET) -#endif /* USB */ - -#define __HAL_RCC_PWR_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) != RESET) - -#define __HAL_RCC_DAC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) != RESET) - -#define __HAL_RCC_OPAMP_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) != RESET) - -#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) != RESET) - -#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) != RESET) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) != RESET) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) != RESET) - - -#define __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) == RESET) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) == RESET) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) == RESET) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) == RESET) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) == RESET) - -#define __HAL_RCC_TIM7_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) == RESET) - -#if defined(LCD) -#define __HAL_RCC_LCD_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) == RESET) -#endif /* LCD */ - -#if defined(RCC_APB1SMENR1_RTCAPBSMEN) -#define __HAL_RCC_RTCAPB_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_RTCAPBSMEN) == RESET) -#endif /* RCC_APB1SMENR1_RTCAPBSMEN */ - -#define __HAL_RCC_WWDG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) == RESET) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) == RESET) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) == RESET) - -#define __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) == RESET) - -#if defined(USART3) -#define __HAL_RCC_USART3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) == RESET) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) == RESET) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) == RESET) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) == RESET) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) == RESET) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) == RESET) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_I2C4SMEN) == RESET) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CRSSMEN) == RESET) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) == RESET) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN2SMEN) == RESET) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USBFSSMEN) == RESET) -#endif /* USB */ - -#define __HAL_RCC_PWR_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) == RESET) - -#define __HAL_RCC_DAC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) == RESET) - -#define __HAL_RCC_OPAMP_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) == RESET) - -#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) == RESET) - -#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) == RESET) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) == RESET) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) == RESET) - -/** - * @} - */ - -/** @defgroup RCC_APB2_Clock_Sleep_Enable_Disable_Status APB2 Peripheral Clock Sleep Enabled or Disabled Status - * @brief Check whether the APB2 peripheral clock during Low Power (Sleep) mode is enabled or not. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) != RESET) - -#if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) != RESET) -#endif /* SDMMC1 && RCC_APB2SMENR_SDMMC1SMEN */ - -#define __HAL_RCC_TIM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) != RESET) - -#define __HAL_RCC_SPI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) != RESET) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) != RESET) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) != RESET) - -#define __HAL_RCC_TIM15_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) != RESET) - -#define __HAL_RCC_TIM16_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) != RESET) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) != RESET) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) != RESET) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) != RESET) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) != RESET) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_LTDCSMEN) != RESET) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DSISMEN) != RESET) -#endif /* DSI */ - - -#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) == RESET) - -#if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) == RESET) -#endif /* SDMMC1 && RCC_APB2SMENR_SDMMC1SMEN */ - -#define __HAL_RCC_TIM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) == RESET) - -#define __HAL_RCC_SPI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) == RESET) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) == RESET) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) == RESET) - -#define __HAL_RCC_TIM15_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) == RESET) - -#define __HAL_RCC_TIM16_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) == RESET) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) == RESET) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) == RESET) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) == RESET) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) == RESET) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_LTDCSMEN) == RESET) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DSISMEN) == RESET) -#endif /* DSI */ - -/** - * @} - */ - -/** @defgroup RCC_Backup_Domain_Reset RCC Backup Domain Reset - * @{ - */ - -/** @brief Macros to force or release the Backup domain reset. - * @note This function resets the RTC peripheral (including the backup registers) - * and the RTC clock source selection in RCC_CSR register. - * @note The BKPSRAM is not affected by this reset. - * @retval None - */ -#define __HAL_RCC_BACKUPRESET_FORCE() SET_BIT(RCC->BDCR, RCC_BDCR_BDRST) - -#define __HAL_RCC_BACKUPRESET_RELEASE() CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST) - -/** - * @} - */ - -/** @defgroup RCC_RTC_Clock_Configuration RCC RTC Clock Configuration - * @{ - */ - -/** @brief Macros to enable or disable the RTC clock. - * @note As the RTC is in the Backup domain and write access is denied to - * this domain after reset, you have to enable write access using - * HAL_PWR_EnableBkUpAccess() function before to configure the RTC - * (to be done once after reset). - * @note These macros must be used after the RTC clock source was selected. - * @retval None - */ -#define __HAL_RCC_RTC_ENABLE() SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN) - -#define __HAL_RCC_RTC_DISABLE() CLEAR_BIT(RCC->BDCR, RCC_BDCR_RTCEN) - -/** - * @} - */ - -/** @brief Macros to enable or disable the Internal High Speed 16MHz oscillator (HSI). - * @note The HSI is stopped by hardware when entering STOP and STANDBY modes. - * It is used (enabled by hardware) as system clock source after startup - * from Reset, wakeup from STOP and STANDBY mode, or in case of failure - * of the HSE used directly or indirectly as system clock (if the Clock - * Security System CSS is enabled). - * @note HSI can not be stopped if it is used as system clock source. In this case, - * you have to select another source of the system clock then stop the HSI. - * @note After enabling the HSI, the application software should wait on HSIRDY - * flag to be set indicating that HSI clock is stable and can be used as - * system clock source. - * This parameter can be: ENABLE or DISABLE. - * @note When the HSI is stopped, HSIRDY flag goes low after 6 HSI oscillator - * clock cycles. - * @retval None - */ -#define __HAL_RCC_HSI_ENABLE() SET_BIT(RCC->CR, RCC_CR_HSION) - -#define __HAL_RCC_HSI_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_HSION) - -/** @brief Macro to adjust the Internal High Speed 16MHz oscillator (HSI) calibration value. - * @note The calibration is used to compensate for the variations in voltage - * and temperature that influence the frequency of the internal HSI RC. - * @param __HSICALIBRATIONVALUE__ specifies the calibration trimming value - * (default is RCC_HSICALIBRATION_DEFAULT). - * This parameter must be a number between 0 and 0x1F (STM32L43x/STM32L44x/STM32L47x/STM32L48x) or 0x7F (for other devices). - * @retval None - */ -#define __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(__HSICALIBRATIONVALUE__) \ - MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, (__HSICALIBRATIONVALUE__) << RCC_ICSCR_HSITRIM_Pos) - -/** - * @brief Macros to enable or disable the wakeup the Internal High Speed oscillator (HSI) - * in parallel to the Internal Multi Speed oscillator (MSI) used at system wakeup. - * @note The enable of this function has not effect on the HSION bit. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -#define __HAL_RCC_HSIAUTOMATIC_START_ENABLE() SET_BIT(RCC->CR, RCC_CR_HSIASFS) - -#define __HAL_RCC_HSIAUTOMATIC_START_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_HSIASFS) - -/** - * @brief Macros to enable or disable the force of the Internal High Speed oscillator (HSI) - * in STOP mode to be quickly available as kernel clock for USARTs and I2Cs. - * @note Keeping the HSI ON in STOP mode allows to avoid slowing down the communication - * speed because of the HSI startup time. - * @note The enable of this function has not effect on the HSION bit. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -#define __HAL_RCC_HSISTOP_ENABLE() SET_BIT(RCC->CR, RCC_CR_HSIKERON) - -#define __HAL_RCC_HSISTOP_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_HSIKERON) - -/** - * @brief Macros to enable or disable the Internal Multi Speed oscillator (MSI). - * @note The MSI is stopped by hardware when entering STOP and STANDBY modes. - * It is used (enabled by hardware) as system clock source after - * startup from Reset, wakeup from STOP and STANDBY mode, or in case - * of failure of the HSE used directly or indirectly as system clock - * (if the Clock Security System CSS is enabled). - * @note MSI can not be stopped if it is used as system clock source. - * In this case, you have to select another source of the system - * clock then stop the MSI. - * @note After enabling the MSI, the application software should wait on - * MSIRDY flag to be set indicating that MSI clock is stable and can - * be used as system clock source. - * @note When the MSI is stopped, MSIRDY flag goes low after 6 MSI oscillator - * clock cycles. - * @retval None - */ -#define __HAL_RCC_MSI_ENABLE() SET_BIT(RCC->CR, RCC_CR_MSION) - -#define __HAL_RCC_MSI_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_MSION) - -/** @brief Macro Adjusts the Internal Multi Speed oscillator (MSI) calibration value. - * @note The calibration is used to compensate for the variations in voltage - * and temperature that influence the frequency of the internal MSI RC. - * Refer to the Application Note AN3300 for more details on how to - * calibrate the MSI. - * @param __MSICALIBRATIONVALUE__ specifies the calibration trimming value - * (default is RCC_MSICALIBRATION_DEFAULT). - * This parameter must be a number between 0 and 255. - * @retval None - */ -#define __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(__MSICALIBRATIONVALUE__) \ - MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, (__MSICALIBRATIONVALUE__) << RCC_ICSCR_MSITRIM_Pos) - -/** - * @brief Macro configures the Internal Multi Speed oscillator (MSI) clock range in run mode - * @note After restart from Reset , the MSI clock is around 4 MHz. - * After stop the startup clock can be MSI (at any of its possible - * frequencies, the one that was used before entering stop mode) or HSI. - * After Standby its frequency can be selected between 4 possible values - * (1, 2, 4 or 8 MHz). - * @note MSIRANGE can be modified when MSI is OFF (MSION=0) or when MSI is ready - * (MSIRDY=1). - * @note The MSI clock range after reset can be modified on the fly. - * @param __MSIRANGEVALUE__ specifies the MSI clock range. - * This parameter must be one of the following values: - * @arg @ref RCC_MSIRANGE_0 MSI clock is around 100 KHz - * @arg @ref RCC_MSIRANGE_1 MSI clock is around 200 KHz - * @arg @ref RCC_MSIRANGE_2 MSI clock is around 400 KHz - * @arg @ref RCC_MSIRANGE_3 MSI clock is around 800 KHz - * @arg @ref RCC_MSIRANGE_4 MSI clock is around 1 MHz - * @arg @ref RCC_MSIRANGE_5 MSI clock is around 2 MHz - * @arg @ref RCC_MSIRANGE_6 MSI clock is around 4 MHz (default after Reset) - * @arg @ref RCC_MSIRANGE_7 MSI clock is around 8 MHz - * @arg @ref RCC_MSIRANGE_8 MSI clock is around 16 MHz - * @arg @ref RCC_MSIRANGE_9 MSI clock is around 24 MHz - * @arg @ref RCC_MSIRANGE_10 MSI clock is around 32 MHz - * @arg @ref RCC_MSIRANGE_11 MSI clock is around 48 MHz - * @retval None - */ -#define __HAL_RCC_MSI_RANGE_CONFIG(__MSIRANGEVALUE__) \ - do { \ - SET_BIT(RCC->CR, RCC_CR_MSIRGSEL); \ - MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, (__MSIRANGEVALUE__)); \ - } while(0) - -/** - * @brief Macro configures the Internal Multi Speed oscillator (MSI) clock range after Standby mode - * After Standby its frequency can be selected between 4 possible values (1, 2, 4 or 8 MHz). - * @param __MSIRANGEVALUE__ specifies the MSI clock range. - * This parameter must be one of the following values: - * @arg @ref RCC_MSIRANGE_4 MSI clock is around 1 MHz - * @arg @ref RCC_MSIRANGE_5 MSI clock is around 2 MHz - * @arg @ref RCC_MSIRANGE_6 MSI clock is around 4 MHz (default after Reset) - * @arg @ref RCC_MSIRANGE_7 MSI clock is around 8 MHz - * @retval None - */ -#define __HAL_RCC_MSI_STANDBY_RANGE_CONFIG(__MSIRANGEVALUE__) \ - MODIFY_REG(RCC->CSR, RCC_CSR_MSISRANGE, (__MSIRANGEVALUE__) << 4U) - -/** @brief Macro to get the Internal Multi Speed oscillator (MSI) clock range in run mode - * @retval MSI clock range. - * This parameter must be one of the following values: - * @arg @ref RCC_MSIRANGE_0 MSI clock is around 100 KHz - * @arg @ref RCC_MSIRANGE_1 MSI clock is around 200 KHz - * @arg @ref RCC_MSIRANGE_2 MSI clock is around 400 KHz - * @arg @ref RCC_MSIRANGE_3 MSI clock is around 800 KHz - * @arg @ref RCC_MSIRANGE_4 MSI clock is around 1 MHz - * @arg @ref RCC_MSIRANGE_5 MSI clock is around 2 MHz - * @arg @ref RCC_MSIRANGE_6 MSI clock is around 4 MHz (default after Reset) - * @arg @ref RCC_MSIRANGE_7 MSI clock is around 8 MHz - * @arg @ref RCC_MSIRANGE_8 MSI clock is around 16 MHz - * @arg @ref RCC_MSIRANGE_9 MSI clock is around 24 MHz - * @arg @ref RCC_MSIRANGE_10 MSI clock is around 32 MHz - * @arg @ref RCC_MSIRANGE_11 MSI clock is around 48 MHz - */ -#define __HAL_RCC_GET_MSI_RANGE() \ - ((READ_BIT(RCC->CR, RCC_CR_MSIRGSEL) != RESET) ? \ - READ_BIT(RCC->CR, RCC_CR_MSIRANGE) : \ - READ_BIT(RCC->CSR, RCC_CSR_MSISRANGE) >> 4U) - -/** @brief Macros to enable or disable the Internal Low Speed oscillator (LSI). - * @note After enabling the LSI, the application software should wait on - * LSIRDY flag to be set indicating that LSI clock is stable and can - * be used to clock the IWDG and/or the RTC. - * @note LSI can not be disabled if the IWDG is running. - * @note When the LSI is stopped, LSIRDY flag goes low after 6 LSI oscillator - * clock cycles. - * @retval None - */ -#define __HAL_RCC_LSI_ENABLE() SET_BIT(RCC->CSR, RCC_CSR_LSION) - -#define __HAL_RCC_LSI_DISABLE() CLEAR_BIT(RCC->CSR, RCC_CSR_LSION) - -/** - * @brief Macro to configure the External High Speed oscillator (HSE). - * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not - * supported by this macro. User should request a transition to HSE Off - * first and then HSE On or HSE Bypass. - * @note After enabling the HSE (RCC_HSE_ON or RCC_HSE_Bypass), the application - * software should wait on HSERDY flag to be set indicating that HSE clock - * is stable and can be used to clock the PLL and/or system clock. - * @note HSE state can not be changed if it is used directly or through the - * PLL as system clock. In this case, you have to select another source - * of the system clock then change the HSE state (ex. disable it). - * @note The HSE is stopped by hardware when entering STOP and STANDBY modes. - * @note This function reset the CSSON bit, so if the clock security system(CSS) - * was previously enabled you have to enable it again after calling this - * function. - * @param __STATE__ specifies the new state of the HSE. - * This parameter can be one of the following values: - * @arg @ref RCC_HSE_OFF Turn OFF the HSE oscillator, HSERDY flag goes low after - * 6 HSE oscillator clock cycles. - * @arg @ref RCC_HSE_ON Turn ON the HSE oscillator. - * @arg @ref RCC_HSE_BYPASS HSE oscillator bypassed with external clock. - * @retval None - */ -#define __HAL_RCC_HSE_CONFIG(__STATE__) \ - do { \ - if((__STATE__) == RCC_HSE_ON) \ - { \ - SET_BIT(RCC->CR, RCC_CR_HSEON); \ - } \ - else if((__STATE__) == RCC_HSE_BYPASS) \ - { \ - SET_BIT(RCC->CR, RCC_CR_HSEBYP); \ - SET_BIT(RCC->CR, RCC_CR_HSEON); \ - } \ - else \ - { \ - CLEAR_BIT(RCC->CR, RCC_CR_HSEON); \ - CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); \ - } \ - } while(0) - -/** - * @brief Macro to configure the External Low Speed oscillator (LSE). - * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not - * supported by this macro. User should request a transition to LSE Off - * first and then LSE On or LSE Bypass. - * @note As the LSE is in the Backup domain and write access is denied to - * this domain after reset, you have to enable write access using - * HAL_PWR_EnableBkUpAccess() function before to configure the LSE - * (to be done once after reset). - * @note After enabling the LSE (RCC_LSE_ON or RCC_LSE_BYPASS), the application - * software should wait on LSERDY flag to be set indicating that LSE clock - * is stable and can be used to clock the RTC. - * @param __STATE__ specifies the new state of the LSE. - * This parameter can be one of the following values: - * @arg @ref RCC_LSE_OFF Turn OFF the LSE oscillator, LSERDY flag goes low after - * 6 LSE oscillator clock cycles. - * @arg @ref RCC_LSE_ON Turn ON the LSE oscillator. - * @arg @ref RCC_LSE_BYPASS LSE oscillator bypassed with external clock. - * @retval None - */ -#define __HAL_RCC_LSE_CONFIG(__STATE__) \ - do { \ - if((__STATE__) == RCC_LSE_ON) \ - { \ - SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \ - } \ - else if((__STATE__) == RCC_LSE_BYPASS) \ - { \ - SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \ - SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \ - } \ - else \ - { \ - CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); \ - CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \ - } \ - } while(0) - -#if defined(RCC_HSI48_SUPPORT) - -/** @brief Macros to enable or disable the Internal High Speed 48MHz oscillator (HSI48). - * @note The HSI48 is stopped by hardware when entering STOP and STANDBY modes. - * @note After enabling the HSI48, the application software should wait on HSI48RDY - * flag to be set indicating that HSI48 clock is stable. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -#define __HAL_RCC_HSI48_ENABLE() SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) - -#define __HAL_RCC_HSI48_DISABLE() CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) - -#endif /* RCC_HSI48_SUPPORT */ - -/** @brief Macros to configure the RTC clock (RTCCLK). - * @note As the RTC clock configuration bits are in the Backup domain and write - * access is denied to this domain after reset, you have to enable write - * access using the Power Backup Access macro before to configure - * the RTC clock source (to be done once after reset). - * @note Once the RTC clock is configured it cannot be changed unless the - * Backup domain is reset using __HAL_RCC_BACKUPRESET_FORCE() macro, or by - * a Power On Reset (POR). - * - * @param __RTC_CLKSOURCE__ specifies the RTC clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_RTCCLKSOURCE_NONE No clock selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_LSE LSE selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_LSI LSI selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_HSE_DIV32 HSE clock divided by 32 selected - * - * @note If the LSE or LSI is used as RTC clock source, the RTC continues to - * work in STOP and STANDBY modes, and can be used as wakeup source. - * However, when the HSE clock is used as RTC clock source, the RTC - * cannot be used in STOP and STANDBY modes. - * @note The maximum input clock frequency for RTC is 1MHz (when using HSE as - * RTC clock source). - * @retval None - */ -#define __HAL_RCC_RTC_CONFIG(__RTC_CLKSOURCE__) \ - MODIFY_REG( RCC->BDCR, RCC_BDCR_RTCSEL, (__RTC_CLKSOURCE__)) - - -/** @brief Macro to get the RTC clock source. - * @retval The returned value can be one of the following: - * @arg @ref RCC_RTCCLKSOURCE_NONE No clock selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_LSE LSE selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_LSI LSI selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_HSE_DIV32 HSE clock divided by 32 selected - */ -#define __HAL_RCC_GET_RTC_SOURCE() (READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL)) - -/** @brief Macros to enable or disable the main PLL. - * @note After enabling the main PLL, the application software should wait on - * PLLRDY flag to be set indicating that PLL clock is stable and can - * be used as system clock source. - * @note The main PLL can not be disabled if it is used as system clock source - * @note The main PLL is disabled by hardware when entering STOP and STANDBY modes. - * @retval None - */ -#define __HAL_RCC_PLL_ENABLE() SET_BIT(RCC->CR, RCC_CR_PLLON) - -#define __HAL_RCC_PLL_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_PLLON) - -/** @brief Macro to configure the PLL clock source. - * @note This function must be used only when the main PLL is disabled. - * @param __PLLSOURCE__ specifies the PLL entry clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_PLLSOURCE_NONE No clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_MSI MSI oscillator clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_HSI HSI oscillator clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_HSE HSE oscillator clock selected as PLL clock entry - * @note This clock source is common for the main PLL and audio PLL (PLLSAI1 and PLLSAI2). - * @retval None - * - */ -#define __HAL_RCC_PLL_PLLSOURCE_CONFIG(__PLLSOURCE__) \ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__PLLSOURCE__)) - -/** @brief Macro to configure the PLL source division factor M. - * @note This function must be used only when the main PLL is disabled. - * @param __PLLM__ specifies the division factor for PLL VCO input clock - * This parameter must be a number between Min_Data = 1 and Max_Data = 16 on STM32L4Rx/STM32L4Sx devices. - * This parameter must be a number between Min_Data = 1 and Max_Data = 8 on other devices. - * @note You have to set the PLLM parameter correctly to ensure that the VCO input - * frequency ranges from 4 to 16 MHz. It is recommended to select a frequency - * of 16 MHz to limit PLL jitter. - * @retval None - * - */ -#define __HAL_RCC_PLL_PLLM_CONFIG(__PLLM__) \ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, ((__PLLM__) - 1) << 4U) - -/** - * @brief Macro to configure the main PLL clock source, multiplication and division factors. - * @note This function must be used only when the main PLL is disabled. - * - * @param __PLLSOURCE__ specifies the PLL entry clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_PLLSOURCE_NONE No clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_MSI MSI oscillator clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_HSI HSI oscillator clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_HSE HSE oscillator clock selected as PLL clock entry - * @note This clock source is common for the main PLL and audio PLL (PLLSAI1 and PLLSAI2). - * - * @param __PLLM__ specifies the division factor for PLL VCO input clock. - * This parameter must be a number between Min_Data = 1 and Max_Data = 16 on STM32L4Rx/STM32L4Sx devices. - * This parameter must be a number between Min_Data = 1 and Max_Data = 8 on other devices. - * @note You have to set the PLLM parameter correctly to ensure that the VCO input - * frequency ranges from 4 to 16 MHz. It is recommended to select a frequency - * of 16 MHz to limit PLL jitter. - * - * @param __PLLN__ specifies the multiplication factor for PLL VCO output clock. - * This parameter must be a number between 8 and 86. - * @note You have to set the PLLN parameter correctly to ensure that the VCO - * output frequency is between 64 and 344 MHz. - * - * @param __PLLP__ specifies the division factor for SAI clock. - * This parameter must be a number in the range (7 or 17) for STM32L47x/STM32L48x - * else (2 to 31). - * - * @param __PLLQ__ specifies the division factor for OTG FS, SDMMC1 and RNG clocks. - * This parameter must be in the range (2, 4, 6 or 8). - * @note If the USB OTG FS is used in your application, you have to set the - * PLLQ parameter correctly to have 48 MHz clock for the USB. However, - * the SDMMC1 and RNG need a frequency lower than or equal to 48 MHz to work - * correctly. - * @param __PLLR__ specifies the division factor for the main system clock. - * @note You have to set the PLLR parameter correctly to not exceed 80MHZ. - * This parameter must be in the range (2, 4, 6 or 8). - * @retval None - */ -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ - (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \ - (__PLLSOURCE__) | (uint32_t)((((__PLLQ__) >> 1U) - 1U) << 21U) | (uint32_t)((((__PLLR__) >> 1U) - 1U) << 25U) | \ - ((uint32_t)(__PLLP__) << 27U)) -#else - -#define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ - (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \ - (uint32_t)(((__PLLP__) >> 4U ) << 17U) | \ - (__PLLSOURCE__) | (uint32_t)((((__PLLQ__) >> 1U) - 1U) << 21U) | (uint32_t)((((__PLLR__) >> 1U) - 1U) << 25U)) - -#endif /* RCC_PLLP_DIV_2_31_SUPPORT */ - -/** @brief Macro to get the oscillator used as PLL clock source. - * @retval The oscillator used as PLL clock source. The returned value can be one - * of the following: - * - RCC_PLLSOURCE_NONE: No oscillator is used as PLL clock source. - * - RCC_PLLSOURCE_MSI: MSI oscillator is used as PLL clock source. - * - RCC_PLLSOURCE_HSI: HSI oscillator is used as PLL clock source. - * - RCC_PLLSOURCE_HSE: HSE oscillator is used as PLL clock source. - */ -#define __HAL_RCC_GET_PLL_OSCSOURCE() (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC)) - -/** - * @brief Enable or disable each clock output (RCC_PLL_SYSCLK, RCC_PLL_48M1CLK, RCC_PLL_SAI3CLK) - * @note Enabling/disabling clock outputs RCC_PLL_SAI3CLK and RCC_PLL_48M1CLK can be done at anytime - * without the need to stop the PLL in order to save power. But RCC_PLL_SYSCLK cannot - * be stopped if used as System Clock. - * @param __PLLCLOCKOUT__ specifies the PLL clock to be output. - * This parameter can be one or a combination of the following values: - * @arg @ref RCC_PLL_SAI3CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLL_48M1CLK This Clock is used to generate the clock for the USB OTG FS (48 MHz), - * the random analog generator (<=48 MHz) and the SDMMC1 (<= 48 MHz). - * @arg @ref RCC_PLL_SYSCLK This Clock is used to generate the high speed system clock (up to 80MHz) - * @retval None - */ -#define __HAL_RCC_PLLCLKOUT_ENABLE(__PLLCLOCKOUT__) SET_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__)) - -#define __HAL_RCC_PLLCLKOUT_DISABLE(__PLLCLOCKOUT__) CLEAR_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__)) - -/** - * @brief Get clock output enable status (RCC_PLL_SYSCLK, RCC_PLL_48M1CLK, RCC_PLL_SAI3CLK) - * @param __PLLCLOCKOUT__ specifies the output PLL clock to be checked. - * This parameter can be one of the following values: - * @arg @ref RCC_PLL_SAI3CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLL_48M1CLK This Clock is used to generate the clock for the USB OTG FS (48 MHz), - * the random analog generator (<=48 MHz) and the SDMMC1 (<= 48 MHz). - * @arg @ref RCC_PLL_SYSCLK This Clock is used to generate the high speed system clock (up to 80MHz) - * @retval SET / RESET - */ -#define __HAL_RCC_GET_PLLCLKOUT_CONFIG(__PLLCLOCKOUT__) READ_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__)) - -/** - * @brief Macro to configure the system clock source. - * @param __SYSCLKSOURCE__ specifies the system clock source. - * This parameter can be one of the following values: - * - RCC_SYSCLKSOURCE_MSI: MSI oscillator is used as system clock source. - * - RCC_SYSCLKSOURCE_HSI: HSI oscillator is used as system clock source. - * - RCC_SYSCLKSOURCE_HSE: HSE oscillator is used as system clock source. - * - RCC_SYSCLKSOURCE_PLLCLK: PLL output is used as system clock source. - * @retval None - */ -#define __HAL_RCC_SYSCLK_CONFIG(__SYSCLKSOURCE__) \ - MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, (__SYSCLKSOURCE__)) - -/** @brief Macro to get the clock source used as system clock. - * @retval The clock source used as system clock. The returned value can be one - * of the following: - * - RCC_SYSCLKSOURCE_STATUS_MSI: MSI used as system clock. - * - RCC_SYSCLKSOURCE_STATUS_HSI: HSI used as system clock. - * - RCC_SYSCLKSOURCE_STATUS_HSE: HSE used as system clock. - * - RCC_SYSCLKSOURCE_STATUS_PLLCLK: PLL used as system clock. - */ -#define __HAL_RCC_GET_SYSCLK_SOURCE() (READ_BIT(RCC->CFGR, RCC_CFGR_SWS)) - -/** - * @brief Macro to configure the External Low Speed oscillator (LSE) drive capability. - * @note As the LSE is in the Backup domain and write access is denied to - * this domain after reset, you have to enable write access using - * HAL_PWR_EnableBkUpAccess() function before to configure the LSE - * (to be done once after reset). - * @param __LSEDRIVE__ specifies the new state of the LSE drive capability. - * This parameter can be one of the following values: - * @arg @ref RCC_LSEDRIVE_LOW LSE oscillator low drive capability. - * @arg @ref RCC_LSEDRIVE_MEDIUMLOW LSE oscillator medium low drive capability. - * @arg @ref RCC_LSEDRIVE_MEDIUMHIGH LSE oscillator medium high drive capability. - * @arg @ref RCC_LSEDRIVE_HIGH LSE oscillator high drive capability. - * @retval None - */ -#define __HAL_RCC_LSEDRIVE_CONFIG(__LSEDRIVE__) \ - MODIFY_REG(RCC->BDCR, RCC_BDCR_LSEDRV, (__LSEDRIVE__)) - -/** - * @brief Macro to configure the wake up from stop clock. - * @param __STOPWUCLK__ specifies the clock source used after wake up from stop. - * This parameter can be one of the following values: - * @arg @ref RCC_STOP_WAKEUPCLOCK_MSI MSI selected as system clock source - * @arg @ref RCC_STOP_WAKEUPCLOCK_HSI HSI selected as system clock source - * @retval None - */ -#define __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(__STOPWUCLK__) \ - MODIFY_REG(RCC->CFGR, RCC_CFGR_STOPWUCK, (__STOPWUCLK__)) - - -/** @brief Macro to configure the MCO clock. - * @param __MCOCLKSOURCE__ specifies the MCO clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_MCO1SOURCE_NOCLOCK MCO output disabled - * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_MSI MSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_HSI HSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO sourcee - * @arg @ref RCC_MCO1SOURCE_PLLCLK Main PLL clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_LSI LSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_LSE LSE clock selected as MCO source - @if STM32L443xx - * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 clock selected as MCO source for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 clock selected as MCO source for devices with HSI48 - @endif - * @param __MCODIV__ specifies the MCO clock prescaler. - * This parameter can be one of the following values: - * @arg @ref RCC_MCODIV_1 MCO clock source is divided by 1 - * @arg @ref RCC_MCODIV_2 MCO clock source is divided by 2 - * @arg @ref RCC_MCODIV_4 MCO clock source is divided by 4 - * @arg @ref RCC_MCODIV_8 MCO clock source is divided by 8 - * @arg @ref RCC_MCODIV_16 MCO clock source is divided by 16 - */ -#define __HAL_RCC_MCO1_CONFIG(__MCOCLKSOURCE__, __MCODIV__) \ - MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), ((__MCOCLKSOURCE__) | (__MCODIV__))) - -/** @defgroup RCC_Flags_Interrupts_Management Flags Interrupts Management - * @brief macros to manage the specified RCC Flags and interrupts. - * @{ - */ - -/** @brief Enable RCC interrupt(s). - * @param __INTERRUPT__ specifies the RCC interrupt source(s) to be enabled. - * This parameter can be any combination of the following values: - * @arg @ref RCC_IT_LSIRDY LSI ready interrupt - * @arg @ref RCC_IT_LSERDY LSE ready interrupt - * @arg @ref RCC_IT_MSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSERDY HSE ready interrupt - * @arg @ref RCC_IT_PLLRDY Main PLL ready interrupt - * @arg @ref RCC_IT_PLLSAI1RDY PLLSAI1 ready interrupt - * @arg @ref RCC_IT_PLLSAI2RDY PLLSAI2 ready interrupt for devices with PLLSAI2 - * @arg @ref RCC_IT_LSECSS LSE Clock security system interrupt - @if STM32L443xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - * @retval None - */ -#define __HAL_RCC_ENABLE_IT(__INTERRUPT__) SET_BIT(RCC->CIER, (__INTERRUPT__)) - -/** @brief Disable RCC interrupt(s). - * @param __INTERRUPT__ specifies the RCC interrupt source(s) to be disabled. - * This parameter can be any combination of the following values: - * @arg @ref RCC_IT_LSIRDY LSI ready interrupt - * @arg @ref RCC_IT_LSERDY LSE ready interrupt - * @arg @ref RCC_IT_MSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSERDY HSE ready interrupt - * @arg @ref RCC_IT_PLLRDY Main PLL ready interrupt - * @arg @ref RCC_IT_PLLSAI1RDY PLLSAI1 ready interrupt - * @arg @ref RCC_IT_PLLSAI2RDY PLLSAI2 ready interrupt for devices with PLLSAI2 - * @arg @ref RCC_IT_LSECSS LSE Clock security system interrupt - @if STM32L443xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - * @retval None - */ -#define __HAL_RCC_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(RCC->CIER, (__INTERRUPT__)) - -/** @brief Clear the RCC's interrupt pending bits. - * @param __INTERRUPT__ specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg @ref RCC_IT_LSIRDY LSI ready interrupt - * @arg @ref RCC_IT_LSERDY LSE ready interrupt - * @arg @ref RCC_IT_MSIRDY MSI ready interrupt - * @arg @ref RCC_IT_HSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSERDY HSE ready interrupt - * @arg @ref RCC_IT_PLLRDY Main PLL ready interrupt - * @arg @ref RCC_IT_PLLSAI1RDY PLLSAI1 ready interrupt - * @arg @ref RCC_IT_PLLSAI2RDY PLLSAI2 ready interrupt for devices with PLLSAI2 - * @arg @ref RCC_IT_CSS HSE Clock security system interrupt - * @arg @ref RCC_IT_LSECSS LSE Clock security system interrupt - @if STM32L443xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - * @retval None - */ -#define __HAL_RCC_CLEAR_IT(__INTERRUPT__) WRITE_REG(RCC->CICR, (__INTERRUPT__)) - -/** @brief Check whether the RCC interrupt has occurred or not. - * @param __INTERRUPT__ specifies the RCC interrupt source to check. - * This parameter can be one of the following values: - * @arg @ref RCC_IT_LSIRDY LSI ready interrupt - * @arg @ref RCC_IT_LSERDY LSE ready interrupt - * @arg @ref RCC_IT_MSIRDY MSI ready interrupt - * @arg @ref RCC_IT_HSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSERDY HSE ready interrupt - * @arg @ref RCC_IT_PLLRDY Main PLL ready interrupt - * @arg @ref RCC_IT_PLLSAI1RDY PLLSAI1 ready interrupt - * @arg @ref RCC_IT_PLLSAI2RDY PLLSAI2 ready interrupt for devices with PLLSAI2 - * @arg @ref RCC_IT_CSS HSE Clock security system interrupt - * @arg @ref RCC_IT_LSECSS LSE Clock security system interrupt - @if STM32L443xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - * @retval The new state of __INTERRUPT__ (TRUE or FALSE). - */ -#define __HAL_RCC_GET_IT(__INTERRUPT__) (READ_BIT(RCC->CIFR, (__INTERRUPT__)) == (__INTERRUPT__)) - -/** @brief Set RMVF bit to clear the reset flags. - * The reset flags are: RCC_FLAG_FWRRST, RCC_FLAG_OBLRST, RCC_FLAG_PINRST, RCC_FLAG_BORRST, - * RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST and RCC_FLAG_LPWRRST. - * @retval None - */ -#define __HAL_RCC_CLEAR_RESET_FLAGS() SET_BIT(RCC->CSR, RCC_CSR_RMVF) - -/** @brief Check whether the selected RCC flag is set or not. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref RCC_FLAG_MSIRDY MSI oscillator clock ready - * @arg @ref RCC_FLAG_HSIRDY HSI oscillator clock ready - * @arg @ref RCC_FLAG_HSERDY HSE oscillator clock ready - * @arg @ref RCC_FLAG_PLLRDY Main PLL clock ready - * @arg @ref RCC_FLAG_PLLSAI1RDY PLLSAI1 clock ready - * @arg @ref RCC_FLAG_PLLSAI2RDY PLLSAI2 clock ready for devices with PLLSAI2 - @if STM32L443xx - * @arg @ref RCC_FLAG_HSI48RDY HSI48 clock ready for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_FLAG_HSI48RDY HSI48 clock ready for devices with HSI48 - @endif - * @arg @ref RCC_FLAG_LSERDY LSE oscillator clock ready - * @arg @ref RCC_FLAG_LSECSSD Clock security system failure on LSE oscillator detection - * @arg @ref RCC_FLAG_LSIRDY LSI oscillator clock ready - * @arg @ref RCC_FLAG_BORRST BOR reset - * @arg @ref RCC_FLAG_OBLRST OBLRST reset - * @arg @ref RCC_FLAG_PINRST Pin reset - * @arg @ref RCC_FLAG_FWRST FIREWALL reset - * @arg @ref RCC_FLAG_RMVF Remove reset Flag - * @arg @ref RCC_FLAG_SFTRST Software reset - * @arg @ref RCC_FLAG_IWDGRST Independent Watchdog reset - * @arg @ref RCC_FLAG_WWDGRST Window Watchdog reset - * @arg @ref RCC_FLAG_LPWRRST Low Power reset - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#if defined(RCC_HSI48_SUPPORT) -#define __HAL_RCC_GET_FLAG(__FLAG__) (((((((__FLAG__) >> 5U) == 1U) ? RCC->CR : \ - ((((__FLAG__) >> 5U) == 4U) ? RCC->CRRCR : \ - ((((__FLAG__) >> 5U) == 2U) ? RCC->BDCR : \ - ((((__FLAG__) >> 5U) == 3U) ? RCC->CSR : RCC->CIFR)))) & \ - (1U << ((__FLAG__) & RCC_FLAG_MASK))) != RESET) ? 1U : 0U) -#else -#define __HAL_RCC_GET_FLAG(__FLAG__) (((((((__FLAG__) >> 5U) == 1U) ? RCC->CR : \ - ((((__FLAG__) >> 5U) == 2U) ? RCC->BDCR : \ - ((((__FLAG__) >> 5U) == 3U) ? RCC->CSR : RCC->CIFR))) & \ - (1U << ((__FLAG__) & RCC_FLAG_MASK))) != RESET) ? 1U : 0U) -#endif /* RCC_HSI48_SUPPORT */ - -/** - * @} - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup RCC_Private_Constants RCC Private Constants - * @{ - */ -/* Defines used for Flags */ -#define CR_REG_INDEX 1U -#define BDCR_REG_INDEX 2U -#define CSR_REG_INDEX 3U -#if defined(RCC_HSI48_SUPPORT) -#define CRRCR_REG_INDEX 4U -#endif /* RCC_HSI48_SUPPORT */ - -#define RCC_FLAG_MASK 0x1FU -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup RCC_Private_Macros - * @{ - */ - -#if defined(RCC_HSI48_SUPPORT) -#define IS_RCC_OSCILLATORTYPE(__OSCILLATOR__) (((__OSCILLATOR__) == RCC_OSCILLATORTYPE_NONE) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)) -#else -#define IS_RCC_OSCILLATORTYPE(__OSCILLATOR__) (((__OSCILLATOR__) == RCC_OSCILLATORTYPE_NONE) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)) -#endif /* RCC_HSI48_SUPPORT */ - -#define IS_RCC_HSE(__HSE__) (((__HSE__) == RCC_HSE_OFF) || ((__HSE__) == RCC_HSE_ON) || \ - ((__HSE__) == RCC_HSE_BYPASS)) - -#define IS_RCC_LSE(__LSE__) (((__LSE__) == RCC_LSE_OFF) || ((__LSE__) == RCC_LSE_ON) || \ - ((__LSE__) == RCC_LSE_BYPASS)) - -#define IS_RCC_HSI(__HSI__) (((__HSI__) == RCC_HSI_OFF) || ((__HSI__) == RCC_HSI_ON)) - -#define IS_RCC_HSI_CALIBRATION_VALUE(__VALUE__) ((__VALUE__) <= (RCC_ICSCR_HSITRIM >> RCC_ICSCR_HSITRIM_Pos)) - -#define IS_RCC_LSI(__LSI__) (((__LSI__) == RCC_LSI_OFF) || ((__LSI__) == RCC_LSI_ON)) - -#define IS_RCC_MSI(__MSI__) (((__MSI__) == RCC_MSI_OFF) || ((__MSI__) == RCC_MSI_ON)) - -#define IS_RCC_MSICALIBRATION_VALUE(__VALUE__) ((__VALUE__) <= 255U) - -#if defined(RCC_HSI48_SUPPORT) -#define IS_RCC_HSI48(__HSI48__) (((__HSI48__) == RCC_HSI48_OFF) || ((__HSI48__) == RCC_HSI48_ON)) -#endif /* RCC_HSI48_SUPPORT */ - -#define IS_RCC_PLL(__PLL__) (((__PLL__) == RCC_PLL_NONE) ||((__PLL__) == RCC_PLL_OFF) || \ - ((__PLL__) == RCC_PLL_ON)) - -#define IS_RCC_PLLSOURCE(__SOURCE__) (((__SOURCE__) == RCC_PLLSOURCE_NONE) || \ - ((__SOURCE__) == RCC_PLLSOURCE_MSI) || \ - ((__SOURCE__) == RCC_PLLSOURCE_HSI) || \ - ((__SOURCE__) == RCC_PLLSOURCE_HSE)) - -#if defined(RCC_PLLM_DIV_1_16_SUPPORT) -#define IS_RCC_PLLM_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 16U)) -#else -#define IS_RCC_PLLM_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 8U)) -#endif /*RCC_PLLM_DIV_1_16_SUPPORT */ - -#define IS_RCC_PLLN_VALUE(__VALUE__) ((8U <= (__VALUE__)) && ((__VALUE__) <= 86U)) - -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) -#define IS_RCC_PLLP_VALUE(__VALUE__) (((__VALUE__) >= 2U) && ((__VALUE__) <= 31U)) -#else -#define IS_RCC_PLLP_VALUE(__VALUE__) (((__VALUE__) == 7U) || ((__VALUE__) == 17U)) -#endif /*RCC_PLLP_DIV_2_31_SUPPORT */ - -#define IS_RCC_PLLQ_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) - -#define IS_RCC_PLLR_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) - -#define IS_RCC_PLLSAI1CLOCKOUT_VALUE(__VALUE__) (((((__VALUE__) & RCC_PLLSAI1_SAI1CLK) == RCC_PLLSAI1_SAI1CLK) || \ - (((__VALUE__) & RCC_PLLSAI1_48M2CLK) == RCC_PLLSAI1_48M2CLK) || \ - (((__VALUE__) & RCC_PLLSAI1_ADC1CLK) == RCC_PLLSAI1_ADC1CLK)) && \ - (((__VALUE__) & ~(RCC_PLLSAI1_SAI1CLK|RCC_PLLSAI1_48M2CLK|RCC_PLLSAI1_ADC1CLK)) == 0U)) - -#if defined(RCC_PLLSAI2_SUPPORT) -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) -#define IS_RCC_PLLSAI2CLOCKOUT_VALUE(__VALUE__) (((((__VALUE__) & RCC_PLLSAI2_SAI2CLK) == RCC_PLLSAI2_SAI2CLK) || \ - (((__VALUE__) & RCC_PLLSAI2_ADC2CLK) == RCC_PLLSAI2_ADC2CLK)) && \ - (((__VALUE__) & ~(RCC_PLLSAI2_SAI2CLK|RCC_PLLSAI2_ADC2CLK)) == 0U)) -#elif defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define IS_RCC_PLLSAI2CLOCKOUT_VALUE(__VALUE__) (((((__VALUE__) & RCC_PLLSAI2_SAI2CLK) == RCC_PLLSAI2_SAI2CLK) || \ - (((__VALUE__) & RCC_PLLSAI2_DSICLK) == RCC_PLLSAI2_DSICLK) || \ - (((__VALUE__) & RCC_PLLSAI2_LTDCCLK) == RCC_PLLSAI2_LTDCCLK)) && \ - (((__VALUE__) & ~(RCC_PLLSAI2_SAI2CLK|RCC_PLLSAI2_DSICLK|RCC_PLLSAI2_LTDCCLK)) == 0U)) -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ -#endif /* RCC_PLLSAI2_SUPPORT */ - -#define IS_RCC_MSI_CLOCK_RANGE(__RANGE__) (((__RANGE__) == RCC_MSIRANGE_0) || \ - ((__RANGE__) == RCC_MSIRANGE_1) || \ - ((__RANGE__) == RCC_MSIRANGE_2) || \ - ((__RANGE__) == RCC_MSIRANGE_3) || \ - ((__RANGE__) == RCC_MSIRANGE_4) || \ - ((__RANGE__) == RCC_MSIRANGE_5) || \ - ((__RANGE__) == RCC_MSIRANGE_6) || \ - ((__RANGE__) == RCC_MSIRANGE_7) || \ - ((__RANGE__) == RCC_MSIRANGE_8) || \ - ((__RANGE__) == RCC_MSIRANGE_9) || \ - ((__RANGE__) == RCC_MSIRANGE_10) || \ - ((__RANGE__) == RCC_MSIRANGE_11)) - -#define IS_RCC_MSI_STANDBY_CLOCK_RANGE(__RANGE__) (((__RANGE__) == RCC_MSIRANGE_4) || \ - ((__RANGE__) == RCC_MSIRANGE_5) || \ - ((__RANGE__) == RCC_MSIRANGE_6) || \ - ((__RANGE__) == RCC_MSIRANGE_7)) - -#define IS_RCC_CLOCKTYPE(__CLK__) ((1U <= (__CLK__)) && ((__CLK__) <= 15U)) - -#define IS_RCC_SYSCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_SYSCLKSOURCE_MSI) || \ - ((__SOURCE__) == RCC_SYSCLKSOURCE_HSI) || \ - ((__SOURCE__) == RCC_SYSCLKSOURCE_HSE) || \ - ((__SOURCE__) == RCC_SYSCLKSOURCE_PLLCLK)) - -#define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2) || \ - ((__HCLK__) == RCC_SYSCLK_DIV4) || ((__HCLK__) == RCC_SYSCLK_DIV8) || \ - ((__HCLK__) == RCC_SYSCLK_DIV16) || ((__HCLK__) == RCC_SYSCLK_DIV64) || \ - ((__HCLK__) == RCC_SYSCLK_DIV128) || ((__HCLK__) == RCC_SYSCLK_DIV256) || \ - ((__HCLK__) == RCC_SYSCLK_DIV512)) - -#define IS_RCC_PCLK(__PCLK__) (((__PCLK__) == RCC_HCLK_DIV1) || ((__PCLK__) == RCC_HCLK_DIV2) || \ - ((__PCLK__) == RCC_HCLK_DIV4) || ((__PCLK__) == RCC_HCLK_DIV8) || \ - ((__PCLK__) == RCC_HCLK_DIV16)) - -#define IS_RCC_RTCCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_RTCCLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_RTCCLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_RTCCLKSOURCE_LSI) || \ - ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV32)) - -#define IS_RCC_MCO(__MCOX__) ((__MCOX__) == RCC_MCO1) - -#if defined(RCC_HSI48_SUPPORT) -#define IS_RCC_MCO1SOURCE(__SOURCE__) (((__SOURCE__) == RCC_MCO1SOURCE_NOCLOCK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_MSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_HSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_HSE) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_PLLCLK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_LSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_LSE) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_HSI48)) -#else -#define IS_RCC_MCO1SOURCE(__SOURCE__) (((__SOURCE__) == RCC_MCO1SOURCE_NOCLOCK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_MSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_HSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_HSE) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_PLLCLK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_LSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_LSE)) -#endif /* RCC_HSI48_SUPPORT */ - -#define IS_RCC_MCODIV(__DIV__) (((__DIV__) == RCC_MCODIV_1) || ((__DIV__) == RCC_MCODIV_2) || \ - ((__DIV__) == RCC_MCODIV_4) || ((__DIV__) == RCC_MCODIV_8) || \ - ((__DIV__) == RCC_MCODIV_16)) - -#define IS_RCC_LSE_DRIVE(__DRIVE__) (((__DRIVE__) == RCC_LSEDRIVE_LOW) || \ - ((__DRIVE__) == RCC_LSEDRIVE_MEDIUMLOW) || \ - ((__DRIVE__) == RCC_LSEDRIVE_MEDIUMHIGH) || \ - ((__DRIVE__) == RCC_LSEDRIVE_HIGH)) - -#define IS_RCC_STOP_WAKEUPCLOCK(__SOURCE__) (((__SOURCE__) == RCC_STOP_WAKEUPCLOCK_MSI) || \ - ((__SOURCE__) == RCC_STOP_WAKEUPCLOCK_HSI)) -/** - * @} - */ - -/* Include RCC HAL Extended module */ -#include "stm32l4xx_hal_rcc_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup RCC_Exported_Functions - * @{ - */ - - -/** @addtogroup RCC_Exported_Functions_Group1 - * @{ - */ - -/* Initialization and de-initialization functions ******************************/ -HAL_StatusTypeDef HAL_RCC_DeInit(void); -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct); -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency); - -/** - * @} - */ - -/** @addtogroup RCC_Exported_Functions_Group2 - * @{ - */ - -/* Peripheral Control functions ************************************************/ -void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv); -void HAL_RCC_EnableCSS(void); -uint32_t HAL_RCC_GetSysClockFreq(void); -uint32_t HAL_RCC_GetHCLKFreq(void); -uint32_t HAL_RCC_GetPCLK1Freq(void); -uint32_t HAL_RCC_GetPCLK2Freq(void); -void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct); -void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency); -/* CSS NMI IRQ handler */ -void HAL_RCC_NMI_IRQHandler(void); -/* User Callbacks in non blocking mode (IT mode) */ -void HAL_RCC_CSSCallback(void); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RCC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h deleted file mode 100644 index b0000a7a..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h +++ /dev/null @@ -1,3018 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rcc_ex.h - * @author MCD Application Team - * @brief Header file of RCC HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RCC_EX_H -#define __STM32L4xx_HAL_RCC_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RCCEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup RCCEx_Exported_Types RCCEx Exported Types - * @{ - */ - -/** - * @brief PLLSAI1 Clock structure definition - */ -typedef struct -{ - - uint32_t PLLSAI1Source; /*!< PLLSAI1Source: PLLSAI1 entry clock source. - This parameter must be a value of @ref RCC_PLL_Clock_Source */ - -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - uint32_t PLLSAI1M; /*!< PLLSAI1M: specifies the division factor for PLLSAI1 input clock. - This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ -#else - uint32_t PLLSAI1M; /*!< PLLSAI1M: specifies the division factor for PLLSAI1 input clock. - This parameter must be a number between Min_Data = 1 and Max_Data = 8 */ -#endif - - uint32_t PLLSAI1N; /*!< PLLSAI1N: specifies the multiplication factor for PLLSAI1 VCO output clock. - This parameter must be a number between 8 and 86 or 127 depending on devices. */ - - uint32_t PLLSAI1P; /*!< PLLSAI1P: specifies the division factor for SAI clock. - This parameter must be a value of @ref RCC_PLLP_Clock_Divider */ - - uint32_t PLLSAI1Q; /*!< PLLSAI1Q: specifies the division factor for USB/RNG/SDMMC1 clock. - This parameter must be a value of @ref RCC_PLLQ_Clock_Divider */ - - uint32_t PLLSAI1R; /*!< PLLSAI1R: specifies the division factor for ADC clock. - This parameter must be a value of @ref RCC_PLLR_Clock_Divider */ - - uint32_t PLLSAI1ClockOut; /*!< PLLSAIClockOut: specifies PLLSAI1 output clock to be enabled. - This parameter must be a value of @ref RCC_PLLSAI1_Clock_Output */ -}RCC_PLLSAI1InitTypeDef; - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** - * @brief PLLSAI2 Clock structure definition - */ -typedef struct -{ - - uint32_t PLLSAI2Source; /*!< PLLSAI2Source: PLLSAI2 entry clock source. - This parameter must be a value of @ref RCC_PLL_Clock_Source */ - -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - uint32_t PLLSAI2M; /*!< PLLSAI2M: specifies the division factor for PLLSAI2 input clock. - This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ -#else - uint32_t PLLSAI2M; /*!< PLLSAI2M: specifies the division factor for PLLSAI2 input clock. - This parameter must be a number between Min_Data = 1 and Max_Data = 8 */ -#endif - - uint32_t PLLSAI2N; /*!< PLLSAI2N: specifies the multiplication factor for PLLSAI2 VCO output clock. - This parameter must be a number between 8 and 86 or 127 depending on devices. */ - - uint32_t PLLSAI2P; /*!< PLLSAI2P: specifies the division factor for SAI clock. - This parameter must be a value of @ref RCC_PLLP_Clock_Divider */ - -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - uint32_t PLLSAI2Q; /*!< PLLSAI2Q: specifies the division factor for DSI clock. - This parameter must be a value of @ref RCC_PLLQ_Clock_Divider */ -#endif - - uint32_t PLLSAI2R; /*!< PLLSAI2R: specifies the division factor for ADC clock. - This parameter must be a value of @ref RCC_PLLR_Clock_Divider */ - - uint32_t PLLSAI2ClockOut; /*!< PLLSAIClockOut: specifies PLLSAI2 output clock to be enabled. - This parameter must be a value of @ref RCC_PLLSAI2_Clock_Output */ -}RCC_PLLSAI2InitTypeDef; - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** - * @brief RCC extended clocks structure definition - */ -typedef struct -{ - uint32_t PeriphClockSelection; /*!< The Extended Clock to be configured. - This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */ - - RCC_PLLSAI1InitTypeDef PLLSAI1; /*!< PLLSAI1 structure parameters. - This parameter will be used only when PLLSAI1 is selected as Clock Source for SAI1, USB/RNG/SDMMC1 or ADC */ - -#if defined(RCC_PLLSAI2_SUPPORT) - - RCC_PLLSAI2InitTypeDef PLLSAI2; /*!< PLLSAI2 structure parameters. - This parameter will be used only when PLLSAI2 is selected as Clock Source for SAI2 or ADC */ - -#endif /* RCC_PLLSAI2_SUPPORT */ - - uint32_t Usart1ClockSelection; /*!< Specifies USART1 clock source. - This parameter can be a value of @ref RCCEx_USART1_Clock_Source */ - - uint32_t Usart2ClockSelection; /*!< Specifies USART2 clock source. - This parameter can be a value of @ref RCCEx_USART2_Clock_Source */ - -#if defined(USART3) - - uint32_t Usart3ClockSelection; /*!< Specifies USART3 clock source. - This parameter can be a value of @ref RCCEx_USART3_Clock_Source */ - -#endif /* USART3 */ - -#if defined(UART4) - - uint32_t Uart4ClockSelection; /*!< Specifies UART4 clock source. - This parameter can be a value of @ref RCCEx_UART4_Clock_Source */ - -#endif /* UART4 */ - -#if defined(UART5) - - uint32_t Uart5ClockSelection; /*!< Specifies UART5 clock source. - This parameter can be a value of @ref RCCEx_UART5_Clock_Source */ - -#endif /* UART5 */ - - uint32_t Lpuart1ClockSelection; /*!< Specifies LPUART1 clock source. - This parameter can be a value of @ref RCCEx_LPUART1_Clock_Source */ - - uint32_t I2c1ClockSelection; /*!< Specifies I2C1 clock source. - This parameter can be a value of @ref RCCEx_I2C1_Clock_Source */ - -#if defined(I2C2) - - uint32_t I2c2ClockSelection; /*!< Specifies I2C2 clock source. - This parameter can be a value of @ref RCCEx_I2C2_Clock_Source */ - -#endif /* I2C2 */ - - uint32_t I2c3ClockSelection; /*!< Specifies I2C3 clock source. - This parameter can be a value of @ref RCCEx_I2C3_Clock_Source */ - -#if defined(I2C4) - - uint32_t I2c4ClockSelection; /*!< Specifies I2C4 clock source. - This parameter can be a value of @ref RCCEx_I2C4_Clock_Source */ - -#endif /* I2C4 */ - - uint32_t Lptim1ClockSelection; /*!< Specifies LPTIM1 clock source. - This parameter can be a value of @ref RCCEx_LPTIM1_Clock_Source */ - - uint32_t Lptim2ClockSelection; /*!< Specifies LPTIM2 clock source. - This parameter can be a value of @ref RCCEx_LPTIM2_Clock_Source */ - - uint32_t Sai1ClockSelection; /*!< Specifies SAI1 clock source. - This parameter can be a value of @ref RCCEx_SAI1_Clock_Source */ - -#if defined(SAI2) - - uint32_t Sai2ClockSelection; /*!< Specifies SAI2 clock source. - This parameter can be a value of @ref RCCEx_SAI2_Clock_Source */ - -#endif /* SAI2 */ - -#if defined(USB_OTG_FS) || defined(USB) - - uint32_t UsbClockSelection; /*!< Specifies USB clock source (warning: same source for SDMMC1 and RNG). - This parameter can be a value of @ref RCCEx_USB_Clock_Source */ - -#endif /* USB_OTG_FS || USB */ - -#if defined(SDMMC1) - - uint32_t Sdmmc1ClockSelection; /*!< Specifies SDMMC1 clock source (warning: same source for USB and RNG). - This parameter can be a value of @ref RCCEx_SDMMC1_Clock_Source */ - -#endif /* SDMMC1 */ - - uint32_t RngClockSelection; /*!< Specifies RNG clock source (warning: same source for USB and SDMMC1). - This parameter can be a value of @ref RCCEx_RNG_Clock_Source */ - - uint32_t AdcClockSelection; /*!< Specifies ADC interface clock source. - This parameter can be a value of @ref RCCEx_ADC_Clock_Source */ - -#if defined(SWPMI1) - - uint32_t Swpmi1ClockSelection; /*!< Specifies SWPMI1 clock source. - This parameter can be a value of @ref RCCEx_SWPMI1_Clock_Source */ - -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) - - uint32_t Dfsdm1ClockSelection; /*!< Specifies DFSDM1 clock source. - This parameter can be a value of @ref RCCEx_DFSDM1_Clock_Source */ - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - uint32_t Dfsdm1AudioClockSelection; /*!< Specifies DFSDM1 audio clock source. - This parameter can be a value of @ref RCCEx_DFSDM1_Audio_Clock_Source */ - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) - - uint32_t LtdcClockSelection; /*!< Specifies LTDC clock source. - This parameter can be a value of @ref RCCEx_LTDC_Clock_Source */ - -#endif /* LTDC */ - -#if defined(DSI) - - uint32_t DsiClockSelection; /*!< Specifies DSI clock source. - This parameter can be a value of @ref RCCEx_DSI_Clock_Source */ - -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - - uint32_t OspiClockSelection; /*!< Specifies OctoSPI clock source. - This parameter can be a value of @ref RCCEx_OSPI_Clock_Source */ - -#endif - - uint32_t RTCClockSelection; /*!< Specifies RTC clock source. - This parameter can be a value of @ref RCC_RTC_Clock_Source */ -}RCC_PeriphCLKInitTypeDef; - -#if defined(CRS) - -/** - * @brief RCC_CRS Init structure definition - */ -typedef struct -{ - uint32_t Prescaler; /*!< Specifies the division factor of the SYNC signal. - This parameter can be a value of @ref RCCEx_CRS_SynchroDivider */ - - uint32_t Source; /*!< Specifies the SYNC signal source. - This parameter can be a value of @ref RCCEx_CRS_SynchroSource */ - - uint32_t Polarity; /*!< Specifies the input polarity for the SYNC signal source. - This parameter can be a value of @ref RCCEx_CRS_SynchroPolarity */ - - uint32_t ReloadValue; /*!< Specifies the value to be loaded in the frequency error counter with each SYNC event. - It can be calculated in using macro __HAL_RCC_CRS_RELOADVALUE_CALCULATE(__FTARGET__, __FSYNC__) - This parameter must be a number between 0 and 0xFFFF or a value of @ref RCCEx_CRS_ReloadValueDefault .*/ - - uint32_t ErrorLimitValue; /*!< Specifies the value to be used to evaluate the captured frequency error value. - This parameter must be a number between 0 and 0xFF or a value of @ref RCCEx_CRS_ErrorLimitDefault */ - - uint32_t HSI48CalibrationValue; /*!< Specifies a user-programmable trimming value to the HSI48 oscillator. - This parameter must be a number between 0 and 0x3F or a value of @ref RCCEx_CRS_HSI48CalibrationDefault */ - -}RCC_CRSInitTypeDef; - -/** - * @brief RCC_CRS Synchronization structure definition - */ -typedef struct -{ - uint32_t ReloadValue; /*!< Specifies the value loaded in the Counter reload value. - This parameter must be a number between 0 and 0xFFFF */ - - uint32_t HSI48CalibrationValue; /*!< Specifies value loaded in HSI48 oscillator smooth trimming. - This parameter must be a number between 0 and 0x3F */ - - uint32_t FreqErrorCapture; /*!< Specifies the value loaded in the .FECAP, the frequency error counter - value latched in the time of the last SYNC event. - This parameter must be a number between 0 and 0xFFFF */ - - uint32_t FreqErrorDirection; /*!< Specifies the value loaded in the .FEDIR, the counting direction of the - frequency error counter latched in the time of the last SYNC event. - It shows whether the actual frequency is below or above the target. - This parameter must be a value of @ref RCCEx_CRS_FreqErrorDirection*/ - -}RCC_CRSSynchroInfoTypeDef; - -#endif /* CRS */ -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RCCEx_Exported_Constants RCCEx Exported Constants - * @{ - */ - -/** @defgroup RCCEx_LSCO_Clock_Source Low Speed Clock Source - * @{ - */ -#define RCC_LSCOSOURCE_LSI 0x00000000U /*!< LSI selection for low speed clock output */ -#define RCC_LSCOSOURCE_LSE RCC_BDCR_LSCOSEL /*!< LSE selection for low speed clock output */ -/** - * @} - */ - -/** @defgroup RCCEx_Periph_Clock_Selection Periph Clock Selection - * @{ - */ -#define RCC_PERIPHCLK_USART1 0x00000001U -#define RCC_PERIPHCLK_USART2 0x00000002U -#if defined(USART3) -#define RCC_PERIPHCLK_USART3 0x00000004U -#endif -#if defined(UART4) -#define RCC_PERIPHCLK_UART4 0x00000008U -#endif -#if defined(UART5) -#define RCC_PERIPHCLK_UART5 0x00000010U -#endif -#define RCC_PERIPHCLK_LPUART1 0x00000020U -#define RCC_PERIPHCLK_I2C1 0x00000040U -#if defined(I2C2) -#define RCC_PERIPHCLK_I2C2 0x00000080U -#endif -#define RCC_PERIPHCLK_I2C3 0x00000100U -#define RCC_PERIPHCLK_LPTIM1 0x00000200U -#define RCC_PERIPHCLK_LPTIM2 0x00000400U -#define RCC_PERIPHCLK_SAI1 0x00000800U -#if defined(SAI2) -#define RCC_PERIPHCLK_SAI2 0x00001000U -#endif -#if defined(USB_OTG_FS) || defined(USB) -#define RCC_PERIPHCLK_USB 0x00002000U -#endif -#define RCC_PERIPHCLK_ADC 0x00004000U -#if defined(SWPMI1) -#define RCC_PERIPHCLK_SWPMI1 0x00008000U -#endif -#if defined(DFSDM1_Filter0) -#define RCC_PERIPHCLK_DFSDM1 0x00010000U -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define RCC_PERIPHCLK_DFSDM1AUDIO 0x00200000U -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#endif -#define RCC_PERIPHCLK_RTC 0x00020000U -#define RCC_PERIPHCLK_RNG 0x00040000U -#if defined(SDMMC1) -#define RCC_PERIPHCLK_SDMMC1 0x00080000U -#endif -#if defined(I2C4) -#define RCC_PERIPHCLK_I2C4 0x00100000U -#endif -#if defined(LTDC) -#define RCC_PERIPHCLK_LTDC 0x00400000U -#endif -#if defined(DSI) -#define RCC_PERIPHCLK_DSI 0x00800000U -#endif -#if defined(OCTOSPI1) || defined(OCTOSPI2) -#define RCC_PERIPHCLK_OSPI 0x01000000U -#endif -/** - * @} - */ - - -/** @defgroup RCCEx_USART1_Clock_Source USART1 Clock Source - * @{ - */ -#define RCC_USART1CLKSOURCE_PCLK2 0x00000000U -#define RCC_USART1CLKSOURCE_SYSCLK RCC_CCIPR_USART1SEL_0 -#define RCC_USART1CLKSOURCE_HSI RCC_CCIPR_USART1SEL_1 -#define RCC_USART1CLKSOURCE_LSE (RCC_CCIPR_USART1SEL_0 | RCC_CCIPR_USART1SEL_1) -/** - * @} - */ - -/** @defgroup RCCEx_USART2_Clock_Source USART2 Clock Source - * @{ - */ -#define RCC_USART2CLKSOURCE_PCLK1 0x00000000U -#define RCC_USART2CLKSOURCE_SYSCLK RCC_CCIPR_USART2SEL_0 -#define RCC_USART2CLKSOURCE_HSI RCC_CCIPR_USART2SEL_1 -#define RCC_USART2CLKSOURCE_LSE (RCC_CCIPR_USART2SEL_0 | RCC_CCIPR_USART2SEL_1) -/** - * @} - */ - -#if defined(USART3) -/** @defgroup RCCEx_USART3_Clock_Source USART3 Clock Source - * @{ - */ -#define RCC_USART3CLKSOURCE_PCLK1 0x00000000U -#define RCC_USART3CLKSOURCE_SYSCLK RCC_CCIPR_USART3SEL_0 -#define RCC_USART3CLKSOURCE_HSI RCC_CCIPR_USART3SEL_1 -#define RCC_USART3CLKSOURCE_LSE (RCC_CCIPR_USART3SEL_0 | RCC_CCIPR_USART3SEL_1) -/** - * @} - */ -#endif /* USART3 */ - -#if defined(UART4) -/** @defgroup RCCEx_UART4_Clock_Source UART4 Clock Source - * @{ - */ -#define RCC_UART4CLKSOURCE_PCLK1 0x00000000U -#define RCC_UART4CLKSOURCE_SYSCLK RCC_CCIPR_UART4SEL_0 -#define RCC_UART4CLKSOURCE_HSI RCC_CCIPR_UART4SEL_1 -#define RCC_UART4CLKSOURCE_LSE (RCC_CCIPR_UART4SEL_0 | RCC_CCIPR_UART4SEL_1) -/** - * @} - */ -#endif /* UART4 */ - -#if defined(UART5) -/** @defgroup RCCEx_UART5_Clock_Source UART5 Clock Source - * @{ - */ -#define RCC_UART5CLKSOURCE_PCLK1 0x00000000U -#define RCC_UART5CLKSOURCE_SYSCLK RCC_CCIPR_UART5SEL_0 -#define RCC_UART5CLKSOURCE_HSI RCC_CCIPR_UART5SEL_1 -#define RCC_UART5CLKSOURCE_LSE (RCC_CCIPR_UART5SEL_0 | RCC_CCIPR_UART5SEL_1) -/** - * @} - */ -#endif /* UART5 */ - -/** @defgroup RCCEx_LPUART1_Clock_Source LPUART1 Clock Source - * @{ - */ -#define RCC_LPUART1CLKSOURCE_PCLK1 0x00000000U -#define RCC_LPUART1CLKSOURCE_SYSCLK RCC_CCIPR_LPUART1SEL_0 -#define RCC_LPUART1CLKSOURCE_HSI RCC_CCIPR_LPUART1SEL_1 -#define RCC_LPUART1CLKSOURCE_LSE (RCC_CCIPR_LPUART1SEL_0 | RCC_CCIPR_LPUART1SEL_1) -/** - * @} - */ - -/** @defgroup RCCEx_I2C1_Clock_Source I2C1 Clock Source - * @{ - */ -#define RCC_I2C1CLKSOURCE_PCLK1 0x00000000U -#define RCC_I2C1CLKSOURCE_SYSCLK RCC_CCIPR_I2C1SEL_0 -#define RCC_I2C1CLKSOURCE_HSI RCC_CCIPR_I2C1SEL_1 -/** - * @} - */ - -#if defined(I2C2) -/** @defgroup RCCEx_I2C2_Clock_Source I2C2 Clock Source - * @{ - */ -#define RCC_I2C2CLKSOURCE_PCLK1 0x00000000U -#define RCC_I2C2CLKSOURCE_SYSCLK RCC_CCIPR_I2C2SEL_0 -#define RCC_I2C2CLKSOURCE_HSI RCC_CCIPR_I2C2SEL_1 -/** - * @} - */ -#endif /* I2C2 */ - -/** @defgroup RCCEx_I2C3_Clock_Source I2C3 Clock Source - * @{ - */ -#define RCC_I2C3CLKSOURCE_PCLK1 0x00000000U -#define RCC_I2C3CLKSOURCE_SYSCLK RCC_CCIPR_I2C3SEL_0 -#define RCC_I2C3CLKSOURCE_HSI RCC_CCIPR_I2C3SEL_1 -/** - * @} - */ - -#if defined(I2C4) -/** @defgroup RCCEx_I2C4_Clock_Source I2C4 Clock Source - * @{ - */ -#define RCC_I2C4CLKSOURCE_PCLK1 0x00000000U -#define RCC_I2C4CLKSOURCE_SYSCLK RCC_CCIPR2_I2C4SEL_0 -#define RCC_I2C4CLKSOURCE_HSI RCC_CCIPR2_I2C4SEL_1 -/** - * @} - */ -#endif /* I2C4 */ - -/** @defgroup RCCEx_SAI1_Clock_Source SAI1 Clock Source - * @{ - */ -#define RCC_SAI1CLKSOURCE_PLLSAI1 0x00000000U -#if defined(RCC_PLLSAI2_SUPPORT) -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define RCC_SAI1CLKSOURCE_PLLSAI2 RCC_CCIPR2_SAI1SEL_0 -#else -#define RCC_SAI1CLKSOURCE_PLLSAI2 RCC_CCIPR_SAI1SEL_0 -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#endif /* RCC_PLLSAI2_SUPPORT */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define RCC_SAI1CLKSOURCE_PLL RCC_CCIPR2_SAI1SEL_1 -#define RCC_SAI1CLKSOURCE_PIN (RCC_CCIPR2_SAI1SEL_1 | RCC_CCIPR2_SAI1SEL_0) -#define RCC_SAI1CLKSOURCE_HSI RCC_CCIPR2_SAI1SEL_2 -#else -#define RCC_SAI1CLKSOURCE_PLL RCC_CCIPR_SAI1SEL_1 -#define RCC_SAI1CLKSOURCE_PIN RCC_CCIPR_SAI1SEL -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -/** - * @} - */ - -#if defined(SAI2) -/** @defgroup RCCEx_SAI2_Clock_Source SAI2 Clock Source - * @{ - */ -#define RCC_SAI2CLKSOURCE_PLLSAI1 0x00000000U -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define RCC_SAI2CLKSOURCE_PLLSAI2 RCC_CCIPR2_SAI2SEL_0 -#define RCC_SAI2CLKSOURCE_PLL RCC_CCIPR2_SAI2SEL_1 -#define RCC_SAI2CLKSOURCE_PIN (RCC_CCIPR2_SAI2SEL_1 | RCC_CCIPR2_SAI2SEL_0) -#define RCC_SAI2CLKSOURCE_HSI RCC_CCIPR2_SAI2SEL_2 -#else -#define RCC_SAI2CLKSOURCE_PLLSAI2 RCC_CCIPR_SAI2SEL_0 -#define RCC_SAI2CLKSOURCE_PLL RCC_CCIPR_SAI2SEL_1 -#define RCC_SAI2CLKSOURCE_PIN RCC_CCIPR_SAI2SEL -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -/** - * @} - */ -#endif /* SAI2 */ - -/** @defgroup RCCEx_LPTIM1_Clock_Source LPTIM1 Clock Source - * @{ - */ -#define RCC_LPTIM1CLKSOURCE_PCLK1 0x00000000U -#define RCC_LPTIM1CLKSOURCE_LSI RCC_CCIPR_LPTIM1SEL_0 -#define RCC_LPTIM1CLKSOURCE_HSI RCC_CCIPR_LPTIM1SEL_1 -#define RCC_LPTIM1CLKSOURCE_LSE RCC_CCIPR_LPTIM1SEL -/** - * @} - */ - -/** @defgroup RCCEx_LPTIM2_Clock_Source LPTIM2 Clock Source - * @{ - */ -#define RCC_LPTIM2CLKSOURCE_PCLK1 0x00000000U -#define RCC_LPTIM2CLKSOURCE_LSI RCC_CCIPR_LPTIM2SEL_0 -#define RCC_LPTIM2CLKSOURCE_HSI RCC_CCIPR_LPTIM2SEL_1 -#define RCC_LPTIM2CLKSOURCE_LSE RCC_CCIPR_LPTIM2SEL -/** - * @} - */ - -#if defined(SDMMC1) -/** @defgroup RCCEx_SDMMC1_Clock_Source SDMMC1 Clock Source - * @{ - */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_SDMMC1CLKSOURCE_HSI48 0x00000000U /*!< HSI48 clock selected as SDMMC1 clock */ -#else -#define RCC_SDMMC1CLKSOURCE_NONE 0x00000000U /*!< No clock selected as SDMMC1 clock */ -#endif /* RCC_HSI48_SUPPORT */ -#define RCC_SDMMC1CLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 /*!< PLLSAI1 "Q" clock selected as SDMMC1 clock */ -#define RCC_SDMMC1CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL "Q" clock selected as SDMMC1 clock */ -#define RCC_SDMMC1CLKSOURCE_MSI RCC_CCIPR_CLK48SEL /*!< MSI clock selected as SDMMC1 clock */ -#if defined(RCC_CCIPR2_SDMMCSEL) -#define RCC_SDMMC1CLKSOURCE_PLLP RCC_CCIPR2_SDMMCSEL /*!< PLL "P" clock selected as SDMMC1 kernel clock */ -#endif /* RCC_CCIPR2_SDMMCSEL */ -/** - * @} - */ -#endif /* SDMMC1 */ - -/** @defgroup RCCEx_RNG_Clock_Source RNG Clock Source - * @{ - */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_RNGCLKSOURCE_HSI48 0x00000000U -#else -#define RCC_RNGCLKSOURCE_NONE 0x00000000U -#endif /* RCC_HSI48_SUPPORT */ -#define RCC_RNGCLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 -#define RCC_RNGCLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 -#define RCC_RNGCLKSOURCE_MSI RCC_CCIPR_CLK48SEL -/** - * @} - */ - -#if defined(USB_OTG_FS) || defined(USB) -/** @defgroup RCCEx_USB_Clock_Source USB Clock Source - * @{ - */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_USBCLKSOURCE_HSI48 0x00000000U -#else -#define RCC_USBCLKSOURCE_NONE 0x00000000U -#endif /* RCC_HSI48_SUPPORT */ -#define RCC_USBCLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 -#define RCC_USBCLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 -#define RCC_USBCLKSOURCE_MSI RCC_CCIPR_CLK48SEL -/** - * @} - */ -#endif /* USB_OTG_FS || USB */ - -/** @defgroup RCCEx_ADC_Clock_Source ADC Clock Source - * @{ - */ -#define RCC_ADCCLKSOURCE_NONE 0x00000000U -#define RCC_ADCCLKSOURCE_PLLSAI1 RCC_CCIPR_ADCSEL_0 -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) -#define RCC_ADCCLKSOURCE_PLLSAI2 RCC_CCIPR_ADCSEL_1 -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ -#define RCC_ADCCLKSOURCE_SYSCLK RCC_CCIPR_ADCSEL -/** - * @} - */ - -#if defined(SWPMI1) -/** @defgroup RCCEx_SWPMI1_Clock_Source SWPMI1 Clock Source - * @{ - */ -#define RCC_SWPMI1CLKSOURCE_PCLK1 0x00000000U -#define RCC_SWPMI1CLKSOURCE_HSI RCC_CCIPR_SWPMI1SEL -/** - * @} - */ -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) -/** @defgroup RCCEx_DFSDM1_Clock_Source DFSDM1 Clock Source - * @{ - */ -#define RCC_DFSDM1CLKSOURCE_PCLK2 0x00000000U -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define RCC_DFSDM1CLKSOURCE_SYSCLK RCC_CCIPR2_DFSDM1SEL -#else -#define RCC_DFSDM1CLKSOURCE_SYSCLK RCC_CCIPR_DFSDM1SEL -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -/** - * @} - */ - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -/** @defgroup RCCEx_DFSDM1_Audio_Clock_Source DFSDM1 Audio Clock Source - * @{ - */ -#define RCC_DFSDM1AUDIOCLKSOURCE_SAI1 0x00000000U -#define RCC_DFSDM1AUDIOCLKSOURCE_HSI RCC_CCIPR2_ADFSDM1SEL_0 -#define RCC_DFSDM1AUDIOCLKSOURCE_MSI RCC_CCIPR2_ADFSDM1SEL_1 -/** - * @} - */ -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -/** @defgroup RCCEx_LTDC_Clock_Source LTDC Clock Source - * @{ - */ -#define RCC_LTDCCLKSOURCE_PLLSAI2_DIV2 0x00000000U -#define RCC_LTDCCLKSOURCE_PLLSAI2_DIV4 RCC_CCIPR2_PLLSAI2DIVR_0 -#define RCC_LTDCCLKSOURCE_PLLSAI2_DIV8 RCC_CCIPR2_PLLSAI2DIVR_1 -#define RCC_LTDCCLKSOURCE_PLLSAI2_DIV16 RCC_CCIPR2_PLLSAI2DIVR -/** - * @} - */ -#endif /* LTDC */ - -#if defined(DSI) -/** @defgroup RCCEx_DSI_Clock_Source DSI Clock Source - * @{ - */ -#define RCC_DSICLKSOURCE_DSIPHY 0x00000000U -#define RCC_DSICLKSOURCE_PLLSAI2 RCC_CCIPR2_DSISEL -/** - * @} - */ -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) -/** @defgroup RCCEx_OSPI_Clock_Source OctoSPI Clock Source - * @{ - */ -#define RCC_OSPICLKSOURCE_SYSCLK 0x00000000U -#define RCC_OSPICLKSOURCE_MSI RCC_CCIPR2_OSPISEL_0 -#define RCC_OSPICLKSOURCE_PLL RCC_CCIPR2_OSPISEL_1 -/** - * @} - */ -#endif /* OCTOSPI1 || OCTOSPI2 */ - -/** @defgroup RCCEx_EXTI_LINE_LSECSS RCC LSE CSS external interrupt line - * @{ - */ -#define RCC_EXTI_LINE_LSECSS EXTI_IMR1_IM19 /*!< External interrupt line 19 connected to the LSE CSS EXTI Line */ -/** - * @} - */ - -#if defined(CRS) - -/** @defgroup RCCEx_CRS_Status RCCEx CRS Status - * @{ - */ -#define RCC_CRS_NONE 0x00000000U -#define RCC_CRS_TIMEOUT 0x00000001U -#define RCC_CRS_SYNCOK 0x00000002U -#define RCC_CRS_SYNCWARN 0x00000004U -#define RCC_CRS_SYNCERR 0x00000008U -#define RCC_CRS_SYNCMISS 0x00000010U -#define RCC_CRS_TRIMOVF 0x00000020U -/** - * @} - */ - -/** @defgroup RCCEx_CRS_SynchroSource RCCEx CRS SynchroSource - * @{ - */ -#define RCC_CRS_SYNC_SOURCE_GPIO 0x00000000U /*!< Synchro Signal source GPIO */ -#define RCC_CRS_SYNC_SOURCE_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */ -#define RCC_CRS_SYNC_SOURCE_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF (default)*/ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_SynchroDivider RCCEx CRS SynchroDivider - * @{ - */ -#define RCC_CRS_SYNC_DIV1 0x00000000U /*!< Synchro Signal not divided (default) */ -#define RCC_CRS_SYNC_DIV2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */ -#define RCC_CRS_SYNC_DIV4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */ -#define RCC_CRS_SYNC_DIV8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */ -#define RCC_CRS_SYNC_DIV16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */ -#define RCC_CRS_SYNC_DIV32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */ -#define RCC_CRS_SYNC_DIV64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */ -#define RCC_CRS_SYNC_DIV128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_SynchroPolarity RCCEx CRS SynchroPolarity - * @{ - */ -#define RCC_CRS_SYNC_POLARITY_RISING 0x00000000U /*!< Synchro Active on rising edge (default) */ -#define RCC_CRS_SYNC_POLARITY_FALLING CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_ReloadValueDefault RCCEx CRS ReloadValueDefault - * @{ - */ -#define RCC_CRS_RELOADVALUE_DEFAULT 0x0000BB7FU /*!< The reset value of the RELOAD field corresponds - to a target frequency of 48 MHz and a synchronization signal frequency of 1 kHz (SOF signal from USB). */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_ErrorLimitDefault RCCEx CRS ErrorLimitDefault - * @{ - */ -#define RCC_CRS_ERRORLIMIT_DEFAULT 0x00000022U /*!< Default Frequency error limit */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_HSI48CalibrationDefault RCCEx CRS HSI48CalibrationDefault - * @{ - */ -#define RCC_CRS_HSI48CALIBRATION_DEFAULT 0x00000020U /*!< The default value is 32, which corresponds to the middle of the trimming interval. - The trimming step is around 67 kHz between two consecutive TRIM steps. A higher TRIM value - corresponds to a higher output frequency */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_FreqErrorDirection RCCEx CRS FreqErrorDirection - * @{ - */ -#define RCC_CRS_FREQERRORDIR_UP 0x00000000U /*!< Upcounting direction, the actual frequency is above the target */ -#define RCC_CRS_FREQERRORDIR_DOWN CRS_ISR_FEDIR /*!< Downcounting direction, the actual frequency is below the target */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_Interrupt_Sources RCCEx CRS Interrupt Sources - * @{ - */ -#define RCC_CRS_IT_SYNCOK CRS_CR_SYNCOKIE /*!< SYNC event OK */ -#define RCC_CRS_IT_SYNCWARN CRS_CR_SYNCWARNIE /*!< SYNC warning */ -#define RCC_CRS_IT_ERR CRS_CR_ERRIE /*!< Error */ -#define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */ -#define RCC_CRS_IT_SYNCERR CRS_CR_ERRIE /*!< SYNC error */ -#define RCC_CRS_IT_SYNCMISS CRS_CR_ERRIE /*!< SYNC missed */ -#define RCC_CRS_IT_TRIMOVF CRS_CR_ERRIE /*!< Trimming overflow or underflow */ - -/** - * @} - */ - -/** @defgroup RCCEx_CRS_Flags RCCEx CRS Flags - * @{ - */ -#define RCC_CRS_FLAG_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK flag */ -#define RCC_CRS_FLAG_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning flag */ -#define RCC_CRS_FLAG_ERR CRS_ISR_ERRF /*!< Error flag */ -#define RCC_CRS_FLAG_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC flag */ -#define RCC_CRS_FLAG_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */ -#define RCC_CRS_FLAG_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/ -#define RCC_CRS_FLAG_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */ - -/** - * @} - */ - -#endif /* CRS */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup RCCEx_Exported_Macros RCCEx Exported Macros - * @{ - */ - - -/** - * @brief Macro to configure the PLLSAI1 clock multiplication and division factors. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - @if STM32L4S9xx - * @param __PLLSAI1M__ specifies the division factor of PLLSAI1 input clock. - * This parameter must be a number between Min_Data = 1 and Max_Data = 16. - * - @endif - * @param __PLLSAI1N__ specifies the multiplication factor for PLLSAI1 VCO output clock. - * This parameter must be a number between 8 and 86. - * @note You have to set the PLLSAI1N parameter correctly to ensure that the VCO - * output frequency is between 64 and 344 MHz. - * PLLSAI1 clock frequency = f(PLLSAI1) multiplied by PLLSAI1N - * - * @param __PLLSAI1P__ specifies the division factor for SAI clock. - * This parameter must be a number in the range (7 or 17) for STM32L47xxx/L48xxx - * else (2 to 31). - * SAI1 clock frequency = f(PLLSAI1) / PLLSAI1P - * - * @param __PLLSAI1Q__ specifies the division factor for USB/RNG/SDMMC1 clock. - * This parameter must be in the range (2, 4, 6 or 8). - * USB/RNG/SDMMC1 clock frequency = f(PLLSAI1) / PLLSAI1Q - * - * @param __PLLSAI1R__ specifies the division factor for SAR ADC clock. - * This parameter must be in the range (2, 4, 6 or 8). - * ADC clock frequency = f(PLLSAI1) / PLLSAI1R - * - * @retval None - */ -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLLSAI1_CONFIG(__PLLSAI1M__, __PLLSAI1N__, __PLLSAI1P__, __PLLSAI1Q__, __PLLSAI1R__) \ - WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \ - ((((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | \ - ((((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) | \ - ((__PLLSAI1P__) << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos) | \ - (((__PLLSAI1M__) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)) - -#else - -#define __HAL_RCC_PLLSAI1_CONFIG(__PLLSAI1M__, __PLLSAI1N__, __PLLSAI1P__, __PLLSAI1Q__, __PLLSAI1R__) \ - WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \ - (((__PLLSAI1P__) >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos) | \ - ((((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | \ - ((((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) | \ - (((__PLLSAI1M__) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)) - -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -#else - -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLLSAI1_CONFIG(__PLLSAI1N__, __PLLSAI1P__, __PLLSAI1Q__, __PLLSAI1R__) \ - WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \ - ((((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | \ - ((((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) | \ - ((__PLLSAI1P__) << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos)) - -#else - -#define __HAL_RCC_PLLSAI1_CONFIG(__PLLSAI1N__, __PLLSAI1P__, __PLLSAI1Q__, __PLLSAI1R__) \ - WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \ - (((__PLLSAI1P__) >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos) | \ - ((((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | \ - ((((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos)) - -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - -/** - * @brief Macro to configure the PLLSAI1 clock multiplication factor N. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI1N__ specifies the multiplication factor for PLLSAI1 VCO output clock. - * This parameter must be a number between 8 and 86. - * @note You have to set the PLLSAI1N parameter correctly to ensure that the VCO - * output frequency is between 64 and 344 MHz. - * Use to set PLLSAI1 clock frequency = f(PLLSAI1) multiplied by PLLSAI1N - * - * @retval None - */ -#define __HAL_RCC_PLLSAI1_MULN_CONFIG(__PLLSAI1N__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N, (__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) - -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - -/** @brief Macro to configure the PLLSAI1 input clock division factor M. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI1M__ specifies the division factor for PLLSAI1 clock. - * This parameter must be a number between Min_Data = 1 and Max_Data = 16. - * - * @retval None - */ - -#define __HAL_RCC_PLLSAI1_DIVM_CONFIG(__PLLSAI1M__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M, ((__PLLSAI1M__) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos) - -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - -/** @brief Macro to configure the PLLSAI1 clock division factor P. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI1P__ specifies the division factor for SAI clock. - * This parameter must be a number in the range (7 or 17) for STM32L47xxx/L48xxx - * else (2 to 31). - * Use to set SAI1 clock frequency = f(PLLSAI1) / PLLSAI1P - * - * @retval None - */ -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLLSAI1_DIVP_CONFIG(__PLLSAI1P__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1PDIV, (__PLLSAI1P__) << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos) - -#else - -#define __HAL_RCC_PLLSAI1_DIVP_CONFIG(__PLLSAI1P__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P, ((__PLLSAI1P__) >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos) - -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -/** @brief Macro to configure the PLLSAI1 clock division factor Q. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI1Q__ specifies the division factor for USB/RNG/SDMMC1 clock. - * This parameter must be in the range (2, 4, 6 or 8). - * Use to set USB/RNG/SDMMC1 clock frequency = f(PLLSAI1) / PLLSAI1Q - * - * @retval None - */ -#define __HAL_RCC_PLLSAI1_DIVQ_CONFIG(__PLLSAI1Q__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q, (((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) - -/** @brief Macro to configure the PLLSAI1 clock division factor R. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI1R__ specifies the division factor for ADC clock. - * This parameter must be in the range (2, 4, 6 or 8) - * Use to set ADC clock frequency = f(PLLSAI1) / PLLSAI1R - * - * @retval None - */ -#define __HAL_RCC_PLLSAI1_DIVR_CONFIG(__PLLSAI1R__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1R, (((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) - -/** - * @brief Macros to enable or disable the PLLSAI1. - * @note The PLLSAI1 is disabled by hardware when entering STOP and STANDBY modes. - * @retval None - */ - -#define __HAL_RCC_PLLSAI1_ENABLE() SET_BIT(RCC->CR, RCC_CR_PLLSAI1ON) - -#define __HAL_RCC_PLLSAI1_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_PLLSAI1ON) - -/** - * @brief Macros to enable or disable each clock output (PLLSAI1_SAI1, PLLSAI1_USB2 and PLLSAI1_ADC1). - * @note Enabling and disabling those clocks can be done without the need to stop the PLL. - * This is mainly used to save Power. - * @param __PLLSAI1_CLOCKOUT__ specifies the PLLSAI1 clock to be output. - * This parameter can be one or a combination of the following values: - * @arg @ref RCC_PLLSAI1_SAI1CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI1_48M2CLK This clock is used to generate the clock for the USB OTG FS (48 MHz), - * the random number generator (<=48 MHz) and the SDIO (<= 48 MHz). - * @arg @ref RCC_PLLSAI1_ADC1CLK Clock used to clock ADC peripheral. - * @retval None - */ - -#define __HAL_RCC_PLLSAI1CLKOUT_ENABLE(__PLLSAI1_CLOCKOUT__) SET_BIT(RCC->PLLSAI1CFGR, (__PLLSAI1_CLOCKOUT__)) - -#define __HAL_RCC_PLLSAI1CLKOUT_DISABLE(__PLLSAI1_CLOCKOUT__) CLEAR_BIT(RCC->PLLSAI1CFGR, (__PLLSAI1_CLOCKOUT__)) - -/** - * @brief Macro to get clock output enable status (PLLSAI1_SAI1, PLLSAI1_USB2 and PLLSAI1_ADC1). - * @param __PLLSAI1_CLOCKOUT__ specifies the PLLSAI1 clock to be output. - * This parameter can be one of the following values: - * @arg @ref RCC_PLLSAI1_SAI1CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI1_48M2CLK This clock is used to generate the clock for the USB OTG FS (48 MHz), - * the random number generator (<=48 MHz) and the SDIO (<= 48 MHz). - * @arg @ref RCC_PLLSAI1_ADC1CLK Clock used to clock ADC peripheral. - * @retval SET / RESET - */ -#define __HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(__PLLSAI1_CLOCKOUT__) READ_BIT(RCC->PLLSAI1CFGR, (__PLLSAI1_CLOCKOUT__)) - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** - * @brief Macro to configure the PLLSAI2 clock multiplication and division factors. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - @if STM32L4S9xx - * @param __PLLSAI2M__ specifies the division factor of PLLSAI2 input clock. - * This parameter must be a number between Min_Data = 1 and Max_Data = 16. - * - @endif - * @param __PLLSAI2N__ specifies the multiplication factor for PLLSAI2 VCO output clock. - * This parameter must be a number between 8 and 86. - * @note You have to set the PLLSAI2N parameter correctly to ensure that the VCO - * output frequency is between 64 and 344 MHz. - * - * @param __PLLSAI2P__ specifies the division factor for SAI clock. - * This parameter must be a number in the range (7 or 17) for STM32L47xxx/L48xxx - * else (2 to 31). - * SAI2 clock frequency = f(PLLSAI2) / PLLSAI2P - * - @if STM32L4S9xx - * @param __PLLSAI2Q__ specifies the division factor for DSI clock. - * This parameter must be in the range (2, 4, 6 or 8). - * DSI clock frequency = f(PLLSAI2) / PLLSAI2Q - * - @endif - * @param __PLLSAI2R__ specifies the division factor for SAR ADC clock. - * This parameter must be in the range (2, 4, 6 or 8). - * - * @retval None - */ - -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - -# if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) && defined(RCC_PLLSAI2Q_DIV_SUPPORT) - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2M__, __PLLSAI2N__, __PLLSAI2P__, __PLLSAI2Q__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - ((((__PLLSAI2Q__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2Q_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | \ - ((__PLLSAI2P__) << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos) | \ - (((__PLLSAI2M__) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)) - -# elif defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2M__, __PLLSAI2N__, __PLLSAI2P__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | \ - ((__PLLSAI2P__) << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos) | \ - (((__PLLSAI2M__) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)) - -# else - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2M__, __PLLSAI2N__, __PLLSAI2P__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - (((__PLLSAI2P__) >> 4U) << RCC_PLLSAI2CFGR_PLLSAI2P_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | \ - (((__PLLSAI2M__) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)) - -# endif /* RCC_PLLSAI2P_DIV_2_31_SUPPORT && RCC_PLLSAI2Q_DIV_SUPPORT */ - -#else - -# if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) && defined(RCC_PLLSAI2Q_DIV_SUPPORT) - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2N__, __PLLSAI2P__, __PLLSAI2Q__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - ((((__PLLSAI2Q__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2Q_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | \ - ((__PLLSAI2P__) << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos)) - -# elif defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2N__, __PLLSAI2P__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | \ - ((__PLLSAI2P__) << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos)) - -# else - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2N__, __PLLSAI2P__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - (((__PLLSAI2P__) >> 4U) << RCC_PLLSAI2CFGR_PLLSAI2P_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos)) - -# endif /* RCC_PLLSAI2P_DIV_2_31_SUPPORT && RCC_PLLSAI2Q_DIV_SUPPORT */ - -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - - -/** - * @brief Macro to configure the PLLSAI2 clock multiplication factor N. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI2N__ specifies the multiplication factor for PLLSAI2 VCO output clock. - * This parameter must be a number between 8 and 86. - * @note You have to set the PLLSAI2N parameter correctly to ensure that the VCO - * output frequency is between 64 and 344 MHz. - * PLLSAI1 clock frequency = f(PLLSAI1) multiplied by PLLSAI2N - * - * @retval None - */ -#define __HAL_RCC_PLLSAI2_MULN_CONFIG(__PLLSAI2N__) \ - MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N, (__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) - -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - -/** @brief Macro to configure the PLLSAI2 input clock division factor M. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI2M__ specifies the division factor for PLLSAI2 clock. - * This parameter must be a number between Min_Data = 1 and Max_Data = 16. - * - * @retval None - */ - -#define __HAL_RCC_PLLSAI2_DIVM_CONFIG(__PLLSAI2M__) \ - MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2M, ((__PLLSAI2M__) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos) - -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - -/** @brief Macro to configure the PLLSAI2 clock division factor P. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI2P__ specifies the division factor. - * This parameter must be a number in the range (7 or 17). - * Use to set SAI2 clock frequency = f(PLLSAI2) / __PLLSAI2P__ - * - * @retval None - */ -#define __HAL_RCC_PLLSAI2_DIVP_CONFIG(__PLLSAI2P__) \ - MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2P, ((__PLLSAI2P__) >> 4U) << RCC_PLLSAI2CFGR_PLLSAI2P_Pos) - -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - -/** @brief Macro to configure the PLLSAI2 clock division factor Q. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI2Q__ specifies the division factor for USB/RNG/SDMMC1 clock. - * This parameter must be in the range (2, 4, 6 or 8). - * Use to set USB/RNG/SDMMC1 clock frequency = f(PLLSAI2) / PLLSAI2Q - * - * @retval None - */ -#define __HAL_RCC_PLLSAI2_DIVQ_CONFIG(__PLLSAI2Q__) \ - MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2Q, (((__PLLSAI2Q__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2Q_Pos) - -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ - -/** @brief Macro to configure the PLLSAI2 clock division factor R. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI2R__ specifies the division factor. - * This parameter must be in the range (2, 4, 6 or 8). - * Use to set ADC clock frequency = f(PLLSAI2) / __PLLSAI2R__ - * - * @retval None - */ -#define __HAL_RCC_PLLSAI2_DIVR_CONFIG(__PLLSAI2R__) \ - MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2R, (((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) - -/** - * @brief Macros to enable or disable the PLLSAI2. - * @note The PLLSAI2 is disabled by hardware when entering STOP and STANDBY modes. - * @retval None - */ - -#define __HAL_RCC_PLLSAI2_ENABLE() SET_BIT(RCC->CR, RCC_CR_PLLSAI2ON) - -#define __HAL_RCC_PLLSAI2_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_PLLSAI2ON) - -/** - * @brief Macros to enable or disable each clock output (PLLSAI2_SAI2, PLLSAI2_ADC2 and RCC_PLLSAI2_DSICLK). - * @note Enabling and disabling those clocks can be done without the need to stop the PLL. - * This is mainly used to save Power. - * @param __PLLSAI2_CLOCKOUT__ specifies the PLLSAI2 clock to be output. - * This parameter can be one or a combination of the following values: - @if STM32L486xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_ADC2CLK Clock used to clock ADC peripheral. - @endif - @if STM32L4A6xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_ADC2CLK Clock used to clock ADC peripheral. - @endif - @if STM32L4S9xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_DSICLK Clock used to clock DSI peripheral. - @endif - * @retval None - */ - -#define __HAL_RCC_PLLSAI2CLKOUT_ENABLE(__PLLSAI2_CLOCKOUT__) SET_BIT(RCC->PLLSAI2CFGR, (__PLLSAI2_CLOCKOUT__)) - -#define __HAL_RCC_PLLSAI2CLKOUT_DISABLE(__PLLSAI2_CLOCKOUT__) CLEAR_BIT(RCC->PLLSAI2CFGR, (__PLLSAI2_CLOCKOUT__)) - -/** - * @brief Macro to get clock output enable status (PLLSAI2_SAI2, PLLSAI2_ADC2 and RCC_PLLSAI2_DSICLK). - * @param __PLLSAI2_CLOCKOUT__ specifies the PLLSAI2 clock to be output. - * This parameter can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_ADC2CLK Clock used to clock ADC peripheral. - @endif - @if STM32L4A6xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_ADC2CLK Clock used to clock ADC peripheral. - @endif - @if STM32L4S9xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_DSICLK Clock used to clock DSI peripheral. - @endif - * @retval SET / RESET - */ -#define __HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(__PLLSAI2_CLOCKOUT__) READ_BIT(RCC->PLLSAI2CFGR, (__PLLSAI2_CLOCKOUT__)) - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** - * @brief Macro to configure the SAI1 clock source. - * @param __SAI1_CLKSOURCE__ defines the SAI1 clock source. This clock is derived - * from the PLLSAI1, system PLL or external clock (through a dedicated pin). - * This parameter can be one of the following values: - * @arg @ref RCC_SAI1CLKSOURCE_PLLSAI1 SAI1 clock = PLLSAI1 "P" clock (PLLSAI1CLK) - @if STM32L486xx - * @arg @ref RCC_SAI1CLKSOURCE_PLLSAI2 SAI1 clock = PLLSAI2 "P" clock (PLLSAI2CLK) for devices with PLLSAI2 - @endif - * @arg @ref RCC_SAI1CLKSOURCE_PLL SAI1 clock = PLL "P" clock (PLLSAI3CLK if PLLSAI2 exists, else PLLSAI2CLK) - * @arg @ref RCC_SAI1CLKSOURCE_PIN SAI1 clock = External Clock (SAI1_EXTCLK) - @if STM32L4S9xx - * @arg @ref RCC_SAI1CLKSOURCE_HSI SAI1 clock = HSI16 - @endif - * - @if STM32L443xx - * @note HSI16 is automatically set as SAI1 clock source when PLL are disabled for devices without PLLSAI2. - @endif - * - * @retval None - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_SAI1_CONFIG(__SAI1_CLKSOURCE__)\ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_SAI1SEL, (__SAI1_CLKSOURCE__)) -#else -#define __HAL_RCC_SAI1_CONFIG(__SAI1_CLKSOURCE__)\ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SAI1SEL, (__SAI1_CLKSOURCE__)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** @brief Macro to get the SAI1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_SAI1CLKSOURCE_PLLSAI1 SAI1 clock = PLLSAI1 "P" clock (PLLSAI1CLK) - @if STM32L486xx - * @arg @ref RCC_SAI1CLKSOURCE_PLLSAI2 SAI1 clock = PLLSAI2 "P" clock (PLLSAI2CLK) for devices with PLLSAI2 - @endif - * @arg @ref RCC_SAI1CLKSOURCE_PLL SAI1 clock = PLL "P" clock (PLLSAI3CLK if PLLSAI2 exists, else PLLSAI2CLK) - * @arg @ref RCC_SAI1CLKSOURCE_PIN SAI1 clock = External Clock (SAI1_EXTCLK) - * - * @note Despite returned values RCC_SAI1CLKSOURCE_PLLSAI1 or RCC_SAI1CLKSOURCE_PLL, HSI16 is automatically set as SAI1 - * clock source when PLLs are disabled for devices without PLLSAI2. - * - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_GET_SAI1_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_SAI1SEL)) -#else -#define __HAL_RCC_GET_SAI1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_SAI1SEL)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#if defined(SAI2) - -/** - * @brief Macro to configure the SAI2 clock source. - * @param __SAI2_CLKSOURCE__ defines the SAI2 clock source. This clock is derived - * from the PLLSAI2, system PLL or external clock (through a dedicated pin). - * This parameter can be one of the following values: - * @arg @ref RCC_SAI2CLKSOURCE_PLLSAI1 SAI2 clock = PLLSAI1 "P" clock (PLLSAI1CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PLLSAI2 SAI2 clock = PLLSAI2 "P" clock (PLLSAI2CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PLL SAI2 clock = PLL "P" clock (PLLSAI3CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PIN SAI2 clock = External Clock (SAI2_EXTCLK) - @if STM32L4S9xx - * @arg @ref RCC_SAI2CLKSOURCE_HSI SAI2 clock = HSI16 - @endif - * - * @retval None - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_SAI2_CONFIG(__SAI2_CLKSOURCE__ )\ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_SAI2SEL, (__SAI2_CLKSOURCE__)) -#else -#define __HAL_RCC_SAI2_CONFIG(__SAI2_CLKSOURCE__ )\ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SAI2SEL, (__SAI2_CLKSOURCE__)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** @brief Macro to get the SAI2 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_SAI2CLKSOURCE_PLLSAI1 SAI2 clock = PLLSAI1 "P" clock (PLLSAI1CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PLLSAI2 SAI2 clock = PLLSAI2 "P" clock (PLLSAI2CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PLL SAI2 clock = PLL "P" clock (PLLSAI3CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PIN SAI2 clock = External Clock (SAI2_EXTCLK) - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_GET_SAI2_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_SAI2SEL)) -#else -#define __HAL_RCC_GET_SAI2_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_SAI2SEL)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* SAI2 */ - -/** @brief Macro to configure the I2C1 clock (I2C1CLK). - * - * @param __I2C1_CLKSOURCE__ specifies the I2C1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_I2C1CLKSOURCE_PCLK1 PCLK1 selected as I2C1 clock - * @arg @ref RCC_I2C1CLKSOURCE_HSI HSI selected as I2C1 clock - * @arg @ref RCC_I2C1CLKSOURCE_SYSCLK System Clock selected as I2C1 clock - * @retval None - */ -#define __HAL_RCC_I2C1_CONFIG(__I2C1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_I2C1SEL, (__I2C1_CLKSOURCE__)) - -/** @brief Macro to get the I2C1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_I2C1CLKSOURCE_PCLK1 PCLK1 selected as I2C1 clock - * @arg @ref RCC_I2C1CLKSOURCE_HSI HSI selected as I2C1 clock - * @arg @ref RCC_I2C1CLKSOURCE_SYSCLK System Clock selected as I2C1 clock - */ -#define __HAL_RCC_GET_I2C1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_I2C1SEL)) - -#if defined(I2C2) - -/** @brief Macro to configure the I2C2 clock (I2C2CLK). - * - * @param __I2C2_CLKSOURCE__ specifies the I2C2 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_I2C2CLKSOURCE_PCLK1 PCLK1 selected as I2C2 clock - * @arg @ref RCC_I2C2CLKSOURCE_HSI HSI selected as I2C2 clock - * @arg @ref RCC_I2C2CLKSOURCE_SYSCLK System Clock selected as I2C2 clock - * @retval None - */ -#define __HAL_RCC_I2C2_CONFIG(__I2C2_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_I2C2SEL, (__I2C2_CLKSOURCE__)) - -/** @brief Macro to get the I2C2 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_I2C2CLKSOURCE_PCLK1 PCLK1 selected as I2C2 clock - * @arg @ref RCC_I2C2CLKSOURCE_HSI HSI selected as I2C2 clock - * @arg @ref RCC_I2C2CLKSOURCE_SYSCLK System Clock selected as I2C2 clock - */ -#define __HAL_RCC_GET_I2C2_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_I2C2SEL)) - -#endif /* I2C2 */ - -/** @brief Macro to configure the I2C3 clock (I2C3CLK). - * - * @param __I2C3_CLKSOURCE__ specifies the I2C3 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_I2C3CLKSOURCE_PCLK1 PCLK1 selected as I2C3 clock - * @arg @ref RCC_I2C3CLKSOURCE_HSI HSI selected as I2C3 clock - * @arg @ref RCC_I2C3CLKSOURCE_SYSCLK System Clock selected as I2C3 clock - * @retval None - */ -#define __HAL_RCC_I2C3_CONFIG(__I2C3_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_I2C3SEL, (__I2C3_CLKSOURCE__)) - -/** @brief Macro to get the I2C3 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_I2C3CLKSOURCE_PCLK1 PCLK1 selected as I2C3 clock - * @arg @ref RCC_I2C3CLKSOURCE_HSI HSI selected as I2C3 clock - * @arg @ref RCC_I2C3CLKSOURCE_SYSCLK System Clock selected as I2C3 clock - */ -#define __HAL_RCC_GET_I2C3_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_I2C3SEL)) - -#if defined(I2C4) - -/** @brief Macro to configure the I2C4 clock (I2C4CLK). - * - * @param __I2C4_CLKSOURCE__ specifies the I2C4 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_I2C4CLKSOURCE_PCLK1 PCLK1 selected as I2C4 clock - * @arg @ref RCC_I2C4CLKSOURCE_HSI HSI selected as I2C4 clock - * @arg @ref RCC_I2C4CLKSOURCE_SYSCLK System Clock selected as I2C4 clock - * @retval None - */ -#define __HAL_RCC_I2C4_CONFIG(__I2C4_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_I2C4SEL, (__I2C4_CLKSOURCE__)) - -/** @brief Macro to get the I2C4 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_I2C4CLKSOURCE_PCLK1 PCLK1 selected as I2C4 clock - * @arg @ref RCC_I2C4CLKSOURCE_HSI HSI selected as I2C4 clock - * @arg @ref RCC_I2C4CLKSOURCE_SYSCLK System Clock selected as I2C4 clock - */ -#define __HAL_RCC_GET_I2C4_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_I2C4SEL)) - -#endif /* I2C4 */ - - -/** @brief Macro to configure the USART1 clock (USART1CLK). - * - * @param __USART1_CLKSOURCE__ specifies the USART1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_USART1CLKSOURCE_PCLK2 PCLK2 selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_HSI HSI selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_SYSCLK System Clock selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_LSE SE selected as USART1 clock - * @retval None - */ -#define __HAL_RCC_USART1_CONFIG(__USART1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_USART1SEL, (__USART1_CLKSOURCE__)) - -/** @brief Macro to get the USART1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_USART1CLKSOURCE_PCLK2 PCLK2 selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_HSI HSI selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_SYSCLK System Clock selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_LSE LSE selected as USART1 clock - */ -#define __HAL_RCC_GET_USART1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_USART1SEL)) - -/** @brief Macro to configure the USART2 clock (USART2CLK). - * - * @param __USART2_CLKSOURCE__ specifies the USART2 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_USART2CLKSOURCE_PCLK1 PCLK1 selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_HSI HSI selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_SYSCLK System Clock selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_LSE LSE selected as USART2 clock - * @retval None - */ -#define __HAL_RCC_USART2_CONFIG(__USART2_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_USART2SEL, (__USART2_CLKSOURCE__)) - -/** @brief Macro to get the USART2 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_USART2CLKSOURCE_PCLK1 PCLK1 selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_HSI HSI selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_SYSCLK System Clock selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_LSE LSE selected as USART2 clock - */ -#define __HAL_RCC_GET_USART2_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_USART2SEL)) - -#if defined(USART3) - -/** @brief Macro to configure the USART3 clock (USART3CLK). - * - * @param __USART3_CLKSOURCE__ specifies the USART3 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_USART3CLKSOURCE_PCLK1 PCLK1 selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_HSI HSI selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_SYSCLK System Clock selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_LSE LSE selected as USART3 clock - * @retval None - */ -#define __HAL_RCC_USART3_CONFIG(__USART3_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_USART3SEL, (__USART3_CLKSOURCE__)) - -/** @brief Macro to get the USART3 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_USART3CLKSOURCE_PCLK1 PCLK1 selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_HSI HSI selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_SYSCLK System Clock selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_LSE LSE selected as USART3 clock - */ -#define __HAL_RCC_GET_USART3_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_USART3SEL)) - -#endif /* USART3 */ - -#if defined(UART4) - -/** @brief Macro to configure the UART4 clock (UART4CLK). - * - * @param __UART4_CLKSOURCE__ specifies the UART4 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_UART4CLKSOURCE_PCLK1 PCLK1 selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_HSI HSI selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_SYSCLK System Clock selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_LSE LSE selected as UART4 clock - * @retval None - */ -#define __HAL_RCC_UART4_CONFIG(__UART4_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_UART4SEL, (__UART4_CLKSOURCE__)) - -/** @brief Macro to get the UART4 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_UART4CLKSOURCE_PCLK1 PCLK1 selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_HSI HSI selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_SYSCLK System Clock selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_LSE LSE selected as UART4 clock - */ -#define __HAL_RCC_GET_UART4_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_UART4SEL)) - -#endif /* UART4 */ - -#if defined(UART5) - -/** @brief Macro to configure the UART5 clock (UART5CLK). - * - * @param __UART5_CLKSOURCE__ specifies the UART5 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_UART5CLKSOURCE_PCLK1 PCLK1 selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_HSI HSI selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_SYSCLK System Clock selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_LSE LSE selected as UART5 clock - * @retval None - */ -#define __HAL_RCC_UART5_CONFIG(__UART5_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_UART5SEL, (__UART5_CLKSOURCE__)) - -/** @brief Macro to get the UART5 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_UART5CLKSOURCE_PCLK1 PCLK1 selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_HSI HSI selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_SYSCLK System Clock selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_LSE LSE selected as UART5 clock - */ -#define __HAL_RCC_GET_UART5_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_UART5SEL)) - -#endif /* UART5 */ - -/** @brief Macro to configure the LPUART1 clock (LPUART1CLK). - * - * @param __LPUART1_CLKSOURCE__ specifies the LPUART1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_LPUART1CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_HSI HSI selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_SYSCLK System Clock selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_LSE LSE selected as LPUART1 clock - * @retval None - */ -#define __HAL_RCC_LPUART1_CONFIG(__LPUART1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, (__LPUART1_CLKSOURCE__)) - -/** @brief Macro to get the LPUART1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_LPUART1CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_HSI HSI selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_SYSCLK System Clock selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_LSE LSE selected as LPUART1 clock - */ -#define __HAL_RCC_GET_LPUART1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_LPUART1SEL)) - -/** @brief Macro to configure the LPTIM1 clock (LPTIM1CLK). - * - * @param __LPTIM1_CLKSOURCE__ specifies the LPTIM1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_LPTIM1CLKSOURCE_PCLK1 PCLK1 selected as LPTIM1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_LSI HSI selected as LPTIM1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_HSI LSI selected as LPTIM1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_LSE LSE selected as LPTIM1 clock - * @retval None - */ -#define __HAL_RCC_LPTIM1_CONFIG(__LPTIM1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPTIM1SEL, (__LPTIM1_CLKSOURCE__)) - -/** @brief Macro to get the LPTIM1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_LPTIM1CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_LSI HSI selected as LPUART1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_HSI System Clock selected as LPUART1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_LSE LSE selected as LPUART1 clock - */ -#define __HAL_RCC_GET_LPTIM1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_LPTIM1SEL)) - -/** @brief Macro to configure the LPTIM2 clock (LPTIM2CLK). - * - * @param __LPTIM2_CLKSOURCE__ specifies the LPTIM2 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_LPTIM2CLKSOURCE_PCLK1 PCLK1 selected as LPTIM2 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_LSI HSI selected as LPTIM2 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_HSI LSI selected as LPTIM2 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_LSE LSE selected as LPTIM2 clock - * @retval None - */ -#define __HAL_RCC_LPTIM2_CONFIG(__LPTIM2_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPTIM2SEL, (__LPTIM2_CLKSOURCE__)) - -/** @brief Macro to get the LPTIM2 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_LPTIM2CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_LSI HSI selected as LPUART1 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_HSI System Clock selected as LPUART1 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_LSE LSE selected as LPUART1 clock - */ -#define __HAL_RCC_GET_LPTIM2_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_LPTIM2SEL)) - -#if defined(SDMMC1) - -/** @brief Macro to configure the SDMMC1 clock. - * - @if STM32L486xx - * @note USB, RNG and SDMMC1 peripherals share the same 48MHz clock source. - @endif - * - @if STM32L443xx - * @note USB, RNG and SDMMC1 peripherals share the same 48MHz clock source. - @endif - * - * @param __SDMMC1_CLKSOURCE__ specifies the SDMMC1 clock source. - * This parameter can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_SDMMC1CLKSOURCE_NONE No clock selected as SDMMC1 clock for devices without HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" Clock selected as SDMMC1 clock - @endif - @if STM32L443xx - * @arg @ref RCC_SDMMC1CLKSOURCE_HSI48 HSI48 selected as SDMMC1 clock for devices with HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" Clock selected as SDMMC1 clock - @endif - @if STM32L4S9xx - * @arg @ref RCC_SDMMC1CLKSOURCE_HSI48 HSI48 selected as SDMMC1 clock for devices with HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" Clock selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLP PLL "P" Clock selected as SDMMC1 clock - @endif - * @arg @ref RCC_SDMMC1CLKSOURCE_PLL PLL "Q" Clock selected as SDMMC1 clock - * @retval None - */ -#if defined(RCC_CCIPR2_SDMMCSEL) -#define __HAL_RCC_SDMMC1_CONFIG(__SDMMC1_CLKSOURCE__) \ - do \ - { \ - if((__SDMMC1_CLKSOURCE__) == RCC_SDMMC1CLKSOURCE_PLLP) \ - { \ - SET_BIT(RCC->CCIPR2, RCC_CCIPR2_SDMMCSEL); \ - } \ - else \ - { \ - CLEAR_BIT(RCC->CCIPR2, RCC_CCIPR2_SDMMCSEL); \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_CLK48SEL, (__SDMMC1_CLKSOURCE__)); \ - } \ - } while(0) -#else -#define __HAL_RCC_SDMMC1_CONFIG(__SDMMC1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_CLK48SEL, (__SDMMC1_CLKSOURCE__)) -#endif /* RCC_CCIPR2_SDMMCSEL */ - -/** @brief Macro to get the SDMMC1 clock. - * @retval The clock source can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_SDMMC1CLKSOURCE_NONE No clock selected as SDMMC1 clock for devices without HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as SDMMC1 clock - @endif - @if STM32L443xx - * @arg @ref RCC_SDMMC1CLKSOURCE_HSI48 HSI48 selected as SDMMC1 clock for devices with HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as SDMMC1 clock - @endif - @if STM32L4S9xx - * @arg @ref RCC_SDMMC1CLKSOURCE_HSI48 HSI48 selected as SDMMC1 clock for devices with HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLP PLL "P" clock (PLLSAI3CLK) selected as SDMMC1 kernel clock - @endif - * @arg @ref RCC_SDMMC1CLKSOURCE_PLL PLL "Q" clock (PLL48M1CLK) selected as SDMMC1 clock - */ -#if defined(RCC_CCIPR2_SDMMCSEL) -#define __HAL_RCC_GET_SDMMC1_SOURCE() \ - ((READ_BIT(RCC->CCIPR2, RCC_CCIPR2_SDMMCSEL) != RESET) ? RCC_SDMMC1CLKSOURCE_PLLP : (READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL))) -#else -#define __HAL_RCC_GET_SDMMC1_SOURCE() \ - (READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL)) -#endif /* RCC_CCIPR2_SDMMCSEL */ - -#endif /* SDMMC1 */ - -/** @brief Macro to configure the RNG clock. - * - * @note USB, RNG and SDMMC1 peripherals share the same 48MHz clock source. - * - * @param __RNG_CLKSOURCE__ specifies the RNG clock source. - * This parameter can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_RNGCLKSOURCE_NONE No clock selected as RNG clock for devices without HSI48 - @endif - @if STM32L443xx - * @arg @ref RCC_RNGCLKSOURCE_HSI48 HSI48 selected as RNG clock clock for devices with HSI48 - @endif - * @arg @ref RCC_RNGCLKSOURCE_MSI MSI selected as RNG clock - * @arg @ref RCC_RNGCLKSOURCE_PLLSAI1 PLLSAI1 Clock selected as RNG clock - * @arg @ref RCC_RNGCLKSOURCE_PLL PLL Clock selected as RNG clock - * @retval None - */ -#define __HAL_RCC_RNG_CONFIG(__RNG_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_CLK48SEL, (__RNG_CLKSOURCE__)) - -/** @brief Macro to get the RNG clock. - * @retval The clock source can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_RNGCLKSOURCE_NONE No clock selected as RNG clock for devices without HSI48 - @endif - @if STM32L443xx - * @arg @ref RCC_RNGCLKSOURCE_HSI48 HSI48 selected as RNG clock clock for devices with HSI48 - @endif - * @arg @ref RCC_RNGCLKSOURCE_MSI MSI selected as RNG clock - * @arg @ref RCC_RNGCLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as RNG clock - * @arg @ref RCC_RNGCLKSOURCE_PLL PLL "Q" clock (PLL48M1CLK) selected as RNG clock - */ -#define __HAL_RCC_GET_RNG_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL)) - -#if defined(USB_OTG_FS) || defined(USB) - -/** @brief Macro to configure the USB clock (USBCLK). - * - * @note USB, RNG and SDMMC1 peripherals share the same 48MHz clock source. - * - * @param __USB_CLKSOURCE__ specifies the USB clock source. - * This parameter can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_USBCLKSOURCE_NONE No clock selected as 48MHz clock for devices without HSI48 - @endif - @if STM32L443xx - * @arg @ref RCC_USBCLKSOURCE_HSI48 HSI48 selected as 48MHz clock for devices with HSI48 - @endif - * @arg @ref RCC_USBCLKSOURCE_MSI MSI selected as USB clock - * @arg @ref RCC_USBCLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as USB clock - * @arg @ref RCC_USBCLKSOURCE_PLL PLL "Q" clock (PLL48M1CLK) selected as USB clock - * @retval None - */ -#define __HAL_RCC_USB_CONFIG(__USB_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_CLK48SEL, (__USB_CLKSOURCE__)) - -/** @brief Macro to get the USB clock source. - * @retval The clock source can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_USBCLKSOURCE_NONE No clock selected as 48MHz clock for devices without HSI48 - @endif - @if STM32L443xx - * @arg @ref RCC_USBCLKSOURCE_HSI48 HSI48 selected as 48MHz clock for devices with HSI48 - @endif - * @arg @ref RCC_USBCLKSOURCE_MSI MSI selected as USB clock - * @arg @ref RCC_USBCLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as USB clock - * @arg @ref RCC_USBCLKSOURCE_PLL PLL "Q" clock (PLL48M1CLK) selected as USB clock - */ -#define __HAL_RCC_GET_USB_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL)) - -#endif /* USB_OTG_FS || USB */ - -/** @brief Macro to configure the ADC interface clock. - * @param __ADC_CLKSOURCE__ specifies the ADC digital interface clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_ADCCLKSOURCE_NONE No clock selected as ADC clock - * @arg @ref RCC_ADCCLKSOURCE_PLLSAI1 PLLSAI1 Clock selected as ADC clock - @if STM32L486xx - * @arg @ref RCC_ADCCLKSOURCE_PLLSAI2 PLLSAI2 Clock selected as ADC clock for STM32L47x/STM32L48x/STM32L49x/STM32L4Ax devices - @endif - * @arg @ref RCC_ADCCLKSOURCE_SYSCLK System Clock selected as ADC clock - * @retval None - */ -#define __HAL_RCC_ADC_CONFIG(__ADC_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_ADCSEL, (__ADC_CLKSOURCE__)) - -/** @brief Macro to get the ADC clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_ADCCLKSOURCE_NONE No clock selected as ADC clock - * @arg @ref RCC_ADCCLKSOURCE_PLLSAI1 PLLSAI1 Clock selected as ADC clock - @if STM32L486xx - * @arg @ref RCC_ADCCLKSOURCE_PLLSAI2 PLLSAI2 Clock selected as ADC clock for STM32L47x/STM32L48x/STM32L49x/STM32L4Ax devices - @endif - * @arg @ref RCC_ADCCLKSOURCE_SYSCLK System Clock selected as ADC clock - */ -#define __HAL_RCC_GET_ADC_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_ADCSEL)) - -#if defined(SWPMI1) - -/** @brief Macro to configure the SWPMI1 clock. - * @param __SWPMI1_CLKSOURCE__ specifies the SWPMI1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_SWPMI1CLKSOURCE_PCLK1 PCLK1 Clock selected as SWPMI1 clock - * @arg @ref RCC_SWPMI1CLKSOURCE_HSI HSI Clock selected as SWPMI1 clock - * @retval None - */ -#define __HAL_RCC_SWPMI1_CONFIG(__SWPMI1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SWPMI1SEL, (__SWPMI1_CLKSOURCE__)) - -/** @brief Macro to get the SWPMI1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_SWPMI1CLKSOURCE_PCLK1 PCLK1 Clock selected as SWPMI1 clock - * @arg @ref RCC_SWPMI1CLKSOURCE_HSI HSI Clock selected as SWPMI1 clock - */ -#define __HAL_RCC_GET_SWPMI1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_SWPMI1SEL)) - -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) -/** @brief Macro to configure the DFSDM1 clock. - * @param __DFSDM1_CLKSOURCE__ specifies the DFSDM1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_DFSDM1CLKSOURCE_PCLK2 PCLK2 Clock selected as DFSDM1 clock - * @arg @ref RCC_DFSDM1CLKSOURCE_SYSCLK System Clock selected as DFSDM1 clock - * @retval None - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_DFSDM1_CONFIG(__DFSDM1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_DFSDM1SEL, (__DFSDM1_CLKSOURCE__)) -#else -#define __HAL_RCC_DFSDM1_CONFIG(__DFSDM1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_DFSDM1SEL, (__DFSDM1_CLKSOURCE__)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** @brief Macro to get the DFSDM1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_DFSDM1CLKSOURCE_PCLK2 PCLK2 Clock selected as DFSDM1 clock - * @arg @ref RCC_DFSDM1CLKSOURCE_SYSCLK System Clock selected as DFSDM1 clock - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_GET_DFSDM1_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_DFSDM1SEL)) -#else -#define __HAL_RCC_GET_DFSDM1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_DFSDM1SEL)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/** @brief Macro to configure the DFSDM1 audio clock. - * @param __DFSDM1AUDIO_CLKSOURCE__ specifies the DFSDM1 audio clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_SAI1 SAI1 clock selected as DFSDM1 audio clock - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_HSI HSI clock selected as DFSDM1 audio clock - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_MSI MSI clock selected as DFSDM1 audio clock - * @retval None - */ -#define __HAL_RCC_DFSDM1AUDIO_CONFIG(__DFSDM1AUDIO_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_ADFSDM1SEL, (__DFSDM1AUDIO_CLKSOURCE__)) - -/** @brief Macro to get the DFSDM1 audio clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_SAI1 SAI1 clock selected as DFSDM1 audio clock - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_HSI HSI clock selected as DFSDM1 audio clock - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_MSI MSI clock selected as DFSDM1 audio clock - */ -#define __HAL_RCC_GET_DFSDM1AUDIO_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_ADFSDM1SEL)) - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) - -/** @brief Macro to configure the LTDC clock. - * @param __LTDC_CLKSOURCE__ specifies the DSI clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV2 PLLSAI2 divider R divided by 2 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV4 PLLSAI2 divider R divided by 4 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV8 PLLSAI2 divider R divided by 8 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV16 PLLSAI2 divider R divided by 16 clock selected as LTDC clock - * @retval None - */ -#define __HAL_RCC_LTDC_CONFIG(__LTDC_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_PLLSAI2DIVR, (__LTDC_CLKSOURCE__)) - -/** @brief Macro to get the LTDC clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV2 PLLSAI2 divider R divided by 2 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV4 PLLSAI2 divider R divided by 4 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV8 PLLSAI2 divider R divided by 8 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV16 PLLSAI2 divider R divided by 16 clock selected as LTDC clock - */ -#define __HAL_RCC_GET_LTDC_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_PLLSAI2DIVR)) - -#endif /* LTDC */ - -#if defined(DSI) - -/** @brief Macro to configure the DSI clock. - * @param __DSI_CLKSOURCE__ specifies the DSI clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_DSICLKSOURCE_DSIPHY DSI-PHY clock selected as DSI clock - * @arg @ref RCC_DSICLKSOURCE_PLLSAI2 PLLSAI2 R divider clock selected as DSI clock - * @retval None - */ -#define __HAL_RCC_DSI_CONFIG(__DSI_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_DSISEL, (__DSI_CLKSOURCE__)) - -/** @brief Macro to get the DSI clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_DSICLKSOURCE_DSIPHY DSI-PHY clock selected as DSI clock - * @arg @ref RCC_DSICLKSOURCE_PLLSAI2 PLLSAI2 R divider clock selected as DSI clock - */ -#define __HAL_RCC_GET_DSI_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_DSISEL)) - -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - -/** @brief Macro to configure the OctoSPI clock. - * @param __OSPI_CLKSOURCE__ specifies the OctoSPI clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_OSPICLKSOURCE_SYSCLK System Clock selected as OctoSPI clock - * @arg @ref RCC_OSPICLKSOURCE_MSI MSI clock selected as OctoSPI clock - * @arg @ref RCC_OSPICLKSOURCE_PLL PLL Q divider clock selected as OctoSPI clock - * @retval None - */ -#define __HAL_RCC_OSPI_CONFIG(__OSPI_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_OSPISEL, (__OSPI_CLKSOURCE__)) - -/** @brief Macro to get the OctoSPI clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_OSPICLKSOURCE_SYSCLK System Clock selected as OctoSPI clock - * @arg @ref RCC_OSPICLKSOURCE_MSI MSI clock selected as OctoSPI clock - * @arg @ref RCC_OSPICLKSOURCE_PLL PLL Q divider clock selected as OctoSPI clock - */ -#define __HAL_RCC_GET_OSPI_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_OSPISEL)) - -#endif /* OCTOSPI1 || OCTOSPI2 */ - -/** @defgroup RCCEx_Flags_Interrupts_Management Flags Interrupts Management - * @brief macros to manage the specified RCC Flags and interrupts. - * @{ - */ - -/** @brief Enable PLLSAI1RDY interrupt. - * @retval None - */ -#define __HAL_RCC_PLLSAI1_ENABLE_IT() SET_BIT(RCC->CIER, RCC_CIER_PLLSAI1RDYIE) - -/** @brief Disable PLLSAI1RDY interrupt. - * @retval None - */ -#define __HAL_RCC_PLLSAI1_DISABLE_IT() CLEAR_BIT(RCC->CIER, RCC_CIER_PLLSAI1RDYIE) - -/** @brief Clear the PLLSAI1RDY interrupt pending bit. - * @retval None - */ -#define __HAL_RCC_PLLSAI1_CLEAR_IT() WRITE_REG(RCC->CICR, RCC_CICR_PLLSAI1RDYC) - -/** @brief Check whether PLLSAI1RDY interrupt has occurred or not. - * @retval TRUE or FALSE. - */ -#define __HAL_RCC_PLLSAI1_GET_IT_SOURCE() (READ_BIT(RCC->CIFR, RCC_CIFR_PLLSAI1RDYF) == RCC_CIFR_PLLSAI1RDYF) - -/** @brief Check whether the PLLSAI1RDY flag is set or not. - * @retval TRUE or FALSE. - */ -#define __HAL_RCC_PLLSAI1_GET_FLAG() (READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == (RCC_CR_PLLSAI1RDY)) - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** @brief Enable PLLSAI2RDY interrupt. - * @retval None - */ -#define __HAL_RCC_PLLSAI2_ENABLE_IT() SET_BIT(RCC->CIER, RCC_CIER_PLLSAI2RDYIE) - -/** @brief Disable PLLSAI2RDY interrupt. - * @retval None - */ -#define __HAL_RCC_PLLSAI2_DISABLE_IT() CLEAR_BIT(RCC->CIER, RCC_CIER_PLLSAI2RDYIE) - -/** @brief Clear the PLLSAI2RDY interrupt pending bit. - * @retval None - */ -#define __HAL_RCC_PLLSAI2_CLEAR_IT() WRITE_REG(RCC->CICR, RCC_CICR_PLLSAI2RDYC) - -/** @brief Check whether the PLLSAI2RDY interrupt has occurred or not. - * @retval TRUE or FALSE. - */ -#define __HAL_RCC_PLLSAI2_GET_IT_SOURCE() (READ_BIT(RCC->CIFR, RCC_CIFR_PLLSAI2RDYF) == RCC_CIFR_PLLSAI2RDYF) - -/** @brief Check whether the PLLSAI2RDY flag is set or not. - * @retval TRUE or FALSE. - */ -#define __HAL_RCC_PLLSAI2_GET_FLAG() (READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == (RCC_CR_PLLSAI2RDY)) - -#endif /* RCC_PLLSAI2_SUPPORT */ - - -/** - * @brief Enable the RCC LSE CSS Extended Interrupt Line. - * @retval None - */ -#define __HAL_RCC_LSECSS_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Disable the RCC LSE CSS Extended Interrupt Line. - * @retval None - */ -#define __HAL_RCC_LSECSS_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Enable the RCC LSE CSS Event Line. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Disable the RCC LSE CSS Event Line. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, RCC_EXTI_LINE_LSECSS) - - -/** - * @brief Enable the RCC LSE CSS Extended Interrupt Falling Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, RCC_EXTI_LINE_LSECSS) - - -/** - * @brief Disable the RCC LSE CSS Extended Interrupt Falling Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, RCC_EXTI_LINE_LSECSS) - - -/** - * @brief Enable the RCC LSE CSS Extended Interrupt Rising Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Disable the RCC LSE CSS Extended Interrupt Rising Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Enable the RCC LSE CSS Extended Interrupt Rising & Falling Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_RCC_LSECSS_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the RCC LSE CSS Extended Interrupt Rising & Falling Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_RCC_LSECSS_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_RCC_LSECSS_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Check whether the specified RCC LSE CSS EXTI interrupt flag is set or not. - * @retval EXTI RCC LSE CSS Line Status. - */ -#define __HAL_RCC_LSECSS_EXTI_GET_FLAG() (READ_BIT(EXTI->PR1, RCC_EXTI_LINE_LSECSS) == RCC_EXTI_LINE_LSECSS) - -/** - * @brief Clear the RCC LSE CSS EXTI flag. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Generate a Software interrupt on the RCC LSE CSS EXTI line. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, RCC_EXTI_LINE_LSECSS) - - -#if defined(CRS) - -/** - * @brief Enable the specified CRS interrupts. - * @param __INTERRUPT__ specifies the CRS interrupt sources to be enabled. - * This parameter can be any combination of the following values: - * @arg @ref RCC_CRS_IT_SYNCOK SYNC event OK interrupt - * @arg @ref RCC_CRS_IT_SYNCWARN SYNC warning interrupt - * @arg @ref RCC_CRS_IT_ERR Synchronization or trimming error interrupt - * @arg @ref RCC_CRS_IT_ESYNC Expected SYNC interrupt - * @retval None - */ -#define __HAL_RCC_CRS_ENABLE_IT(__INTERRUPT__) SET_BIT(CRS->CR, (__INTERRUPT__)) - -/** - * @brief Disable the specified CRS interrupts. - * @param __INTERRUPT__ specifies the CRS interrupt sources to be disabled. - * This parameter can be any combination of the following values: - * @arg @ref RCC_CRS_IT_SYNCOK SYNC event OK interrupt - * @arg @ref RCC_CRS_IT_SYNCWARN SYNC warning interrupt - * @arg @ref RCC_CRS_IT_ERR Synchronization or trimming error interrupt - * @arg @ref RCC_CRS_IT_ESYNC Expected SYNC interrupt - * @retval None - */ -#define __HAL_RCC_CRS_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(CRS->CR, (__INTERRUPT__)) - -/** @brief Check whether the CRS interrupt has occurred or not. - * @param __INTERRUPT__ specifies the CRS interrupt source to check. - * This parameter can be one of the following values: - * @arg @ref RCC_CRS_IT_SYNCOK SYNC event OK interrupt - * @arg @ref RCC_CRS_IT_SYNCWARN SYNC warning interrupt - * @arg @ref RCC_CRS_IT_ERR Synchronization or trimming error interrupt - * @arg @ref RCC_CRS_IT_ESYNC Expected SYNC interrupt - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_RCC_CRS_GET_IT_SOURCE(__INTERRUPT__) ((READ_BIT(CRS->CR, (__INTERRUPT__)) != RESET) ? SET : RESET) - -/** @brief Clear the CRS interrupt pending bits - * @param __INTERRUPT__ specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg @ref RCC_CRS_IT_SYNCOK SYNC event OK interrupt - * @arg @ref RCC_CRS_IT_SYNCWARN SYNC warning interrupt - * @arg @ref RCC_CRS_IT_ERR Synchronization or trimming error interrupt - * @arg @ref RCC_CRS_IT_ESYNC Expected SYNC interrupt - * @arg @ref RCC_CRS_IT_TRIMOVF Trimming overflow or underflow interrupt - * @arg @ref RCC_CRS_IT_SYNCERR SYNC error interrupt - * @arg @ref RCC_CRS_IT_SYNCMISS SYNC missed interrupt - */ -/* CRS IT Error Mask */ -#define RCC_CRS_IT_ERROR_MASK (RCC_CRS_IT_TRIMOVF | RCC_CRS_IT_SYNCERR | RCC_CRS_IT_SYNCMISS) - -#define __HAL_RCC_CRS_CLEAR_IT(__INTERRUPT__) do { \ - if(((__INTERRUPT__) & RCC_CRS_IT_ERROR_MASK) != RESET) \ - { \ - WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__INTERRUPT__) & ~RCC_CRS_IT_ERROR_MASK)); \ - } \ - else \ - { \ - WRITE_REG(CRS->ICR, (__INTERRUPT__)); \ - } \ - } while(0) - -/** - * @brief Check whether the specified CRS flag is set or not. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref RCC_CRS_FLAG_SYNCOK SYNC event OK - * @arg @ref RCC_CRS_FLAG_SYNCWARN SYNC warning - * @arg @ref RCC_CRS_FLAG_ERR Error - * @arg @ref RCC_CRS_FLAG_ESYNC Expected SYNC - * @arg @ref RCC_CRS_FLAG_TRIMOVF Trimming overflow or underflow - * @arg @ref RCC_CRS_FLAG_SYNCERR SYNC error - * @arg @ref RCC_CRS_FLAG_SYNCMISS SYNC missed - * @retval The new state of _FLAG_ (TRUE or FALSE). - */ -#define __HAL_RCC_CRS_GET_FLAG(__FLAG__) (READ_BIT(CRS->ISR, (__FLAG__)) == (__FLAG__)) - -/** - * @brief Clear the CRS specified FLAG. - * @param __FLAG__ specifies the flag to clear. - * This parameter can be one of the following values: - * @arg @ref RCC_CRS_FLAG_SYNCOK SYNC event OK - * @arg @ref RCC_CRS_FLAG_SYNCWARN SYNC warning - * @arg @ref RCC_CRS_FLAG_ERR Error - * @arg @ref RCC_CRS_FLAG_ESYNC Expected SYNC - * @arg @ref RCC_CRS_FLAG_TRIMOVF Trimming overflow or underflow - * @arg @ref RCC_CRS_FLAG_SYNCERR SYNC error - * @arg @ref RCC_CRS_FLAG_SYNCMISS SYNC missed - * @note RCC_CRS_FLAG_ERR clears RCC_CRS_FLAG_TRIMOVF, RCC_CRS_FLAG_SYNCERR, RCC_CRS_FLAG_SYNCMISS and consequently RCC_CRS_FLAG_ERR - * @retval None - */ - -/* CRS Flag Error Mask */ -#define RCC_CRS_FLAG_ERROR_MASK (RCC_CRS_FLAG_TRIMOVF | RCC_CRS_FLAG_SYNCERR | RCC_CRS_FLAG_SYNCMISS) - -#define __HAL_RCC_CRS_CLEAR_FLAG(__FLAG__) do { \ - if(((__FLAG__) & RCC_CRS_FLAG_ERROR_MASK) != RESET) \ - { \ - WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__FLAG__) & ~RCC_CRS_FLAG_ERROR_MASK)); \ - } \ - else \ - { \ - WRITE_REG(CRS->ICR, (__FLAG__)); \ - } \ - } while(0) - -#endif /* CRS */ - -/** - * @} - */ - -#if defined(CRS) - -/** @defgroup RCCEx_CRS_Extended_Features RCCEx CRS Extended Features - * @{ - */ -/** - * @brief Enable the oscillator clock for frequency error counter. - * @note when the CEN bit is set the CRS_CFGR register becomes write-protected. - * @retval None - */ -#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE() SET_BIT(CRS->CR, CRS_CR_CEN) - -/** - * @brief Disable the oscillator clock for frequency error counter. - * @retval None - */ -#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE() CLEAR_BIT(CRS->CR, CRS_CR_CEN) - -/** - * @brief Enable the automatic hardware adjustement of TRIM bits. - * @note When the AUTOTRIMEN bit is set the CRS_CFGR register becomes write-protected. - * @retval None - */ -#define __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE() SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) - -/** - * @brief Enable or disable the automatic hardware adjustement of TRIM bits. - * @retval None - */ -#define __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE() CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) - -/** - * @brief Macro to calculate reload value to be set in CRS register according to target and sync frequencies - * @note The RELOAD value should be selected according to the ratio between the target frequency and the frequency - * of the synchronization source after prescaling. It is then decreased by one in order to - * reach the expected synchronization on the zero value. The formula is the following: - * RELOAD = (fTARGET / fSYNC) -1 - * @param __FTARGET__ Target frequency (value in Hz) - * @param __FSYNC__ Synchronization signal frequency (value in Hz) - * @retval None - */ -#define __HAL_RCC_CRS_RELOADVALUE_CALCULATE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U) - -/** - * @} - */ - -#endif /* CRS */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup RCCEx_Exported_Functions - * @{ - */ - -/** @addtogroup RCCEx_Exported_Functions_Group1 - * @{ - */ - -HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit); -void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit); -uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk); - -/** - * @} - */ - -/** @addtogroup RCCEx_Exported_Functions_Group2 - * @{ - */ - -HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI1(RCC_PLLSAI1InitTypeDef *PLLSAI1Init); -HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI1(void); - -#if defined(RCC_PLLSAI2_SUPPORT) - -HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI2(RCC_PLLSAI2InitTypeDef *PLLSAI2Init); -HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI2(void); - -#endif /* RCC_PLLSAI2_SUPPORT */ - -void HAL_RCCEx_WakeUpStopCLKConfig(uint32_t WakeUpClk); -void HAL_RCCEx_StandbyMSIRangeConfig(uint32_t MSIRange); -void HAL_RCCEx_EnableLSECSS(void); -void HAL_RCCEx_DisableLSECSS(void); -void HAL_RCCEx_EnableLSECSS_IT(void); -void HAL_RCCEx_LSECSS_IRQHandler(void); -void HAL_RCCEx_LSECSS_Callback(void); -void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource); -void HAL_RCCEx_DisableLSCO(void); -void HAL_RCCEx_EnableMSIPLLMode(void); -void HAL_RCCEx_DisableMSIPLLMode(void); - -/** - * @} - */ - -#if defined(CRS) - -/** @addtogroup RCCEx_Exported_Functions_Group3 - * @{ - */ - -void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit); -void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void); -void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo); -uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout); -void HAL_RCCEx_CRS_IRQHandler(void); -void HAL_RCCEx_CRS_SyncOkCallback(void); -void HAL_RCCEx_CRS_SyncWarnCallback(void); -void HAL_RCCEx_CRS_ExpectedSyncCallback(void); -void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error); - -/** - * @} - */ - -#endif /* CRS */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup RCCEx_Private_Macros - * @{ - */ - -#define IS_RCC_LSCOSOURCE(__SOURCE__) (((__SOURCE__) == RCC_LSCOSOURCE_LSI) || \ - ((__SOURCE__) == RCC_LSCOSOURCE_LSE)) - -#if defined(STM32L431xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L432xx) || defined(STM32L442xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG)) - -#elif defined(STM32L433xx) || defined(STM32L443xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L451xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L452xx) || defined(STM32L462xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L471xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L496xx) || defined(STM32L4A6xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L4R5xx) || defined(STM32L4S5xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1AUDIO) == RCC_PERIPHCLK_DFSDM1AUDIO) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_OSPI) == RCC_PERIPHCLK_OSPI)) - -#elif defined(STM32L4R7xx) || defined(STM32L4S7xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1AUDIO) == RCC_PERIPHCLK_DFSDM1AUDIO) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_OSPI) == RCC_PERIPHCLK_OSPI) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC)) - -#elif defined(STM32L4R9xx) || defined(STM32L4S9xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1AUDIO) == RCC_PERIPHCLK_DFSDM1AUDIO) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_OSPI) == RCC_PERIPHCLK_OSPI) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DSI) == RCC_PERIPHCLK_DSI)) - -#else - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#endif /* STM32L431xx */ - -#define IS_RCC_USART1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_USART1CLKSOURCE_PCLK2) || \ - ((__SOURCE__) == RCC_USART1CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_USART1CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_USART1CLKSOURCE_HSI)) - -#define IS_RCC_USART2CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_USART2CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_USART2CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_USART2CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_USART2CLKSOURCE_HSI)) - -#if defined(USART3) - -#define IS_RCC_USART3CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_USART3CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_USART3CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_USART3CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_USART3CLKSOURCE_HSI)) - -#endif /* USART3 */ - -#if defined(UART4) - -#define IS_RCC_UART4CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_UART4CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_UART4CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_UART4CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_UART4CLKSOURCE_HSI)) - -#endif /* UART4 */ - -#if defined(UART5) - -#define IS_RCC_UART5CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_UART5CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_UART5CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_UART5CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_UART5CLKSOURCE_HSI)) - -#endif /* UART5 */ - -#define IS_RCC_LPUART1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_LPUART1CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_LPUART1CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_LPUART1CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_LPUART1CLKSOURCE_HSI)) - -#define IS_RCC_I2C1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_I2C1CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_I2C1CLKSOURCE_SYSCLK)|| \ - ((__SOURCE__) == RCC_I2C1CLKSOURCE_HSI)) - -#if defined(I2C2) - -#define IS_RCC_I2C2CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_I2C2CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_I2C2CLKSOURCE_SYSCLK)|| \ - ((__SOURCE__) == RCC_I2C2CLKSOURCE_HSI)) - -#endif /* I2C2 */ - -#define IS_RCC_I2C3CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_I2C3CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_I2C3CLKSOURCE_SYSCLK)|| \ - ((__SOURCE__) == RCC_I2C3CLKSOURCE_HSI)) - -#if defined(I2C4) - -#define IS_RCC_I2C4CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_I2C4CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_I2C4CLKSOURCE_SYSCLK)|| \ - ((__SOURCE__) == RCC_I2C4CLKSOURCE_HSI)) - -#endif /* I2C4 */ - -#if defined(RCC_PLLSAI2_SUPPORT) - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define IS_RCC_SAI1CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_SAI1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PLLSAI2) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PIN) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_HSI)) -#else -#define IS_RCC_SAI1CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_SAI1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PLLSAI2) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PIN)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#else - -#define IS_RCC_SAI1CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_SAI1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PIN)) - -#endif /* RCC_PLLSAI2_SUPPORT */ - -#if defined(RCC_PLLSAI2_SUPPORT) - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define IS_RCC_SAI2CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_SAI2CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PLLSAI2) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PIN) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_HSI)) -#else -#define IS_RCC_SAI2CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_SAI2CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PLLSAI2) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PIN)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* RCC_PLLSAI2_SUPPORT */ - -#define IS_RCC_LPTIM1CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_LPTIM1CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_LPTIM1CLKSOURCE_LSI) || \ - ((__SOURCE__) == RCC_LPTIM1CLKSOURCE_HSI) || \ - ((__SOURCE__) == RCC_LPTIM1CLKSOURCE_LSE)) - -#define IS_RCC_LPTIM2CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_LPTIM2CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_LPTIM2CLKSOURCE_LSI) || \ - ((__SOURCE__) == RCC_LPTIM2CLKSOURCE_HSI) || \ - ((__SOURCE__) == RCC_LPTIM2CLKSOURCE_LSE)) - -#if defined(SDMMC1) -#if defined(RCC_HSI48_SUPPORT) && defined(RCC_CCIPR2_SDMMCSEL) - -#define IS_RCC_SDMMC1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLLP) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_HSI48) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_MSI)) - -#elif defined(RCC_HSI48_SUPPORT) - -#define IS_RCC_SDMMC1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_SDMMC1CLKSOURCE_HSI48) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_MSI)) -#else - -#define IS_RCC_SDMMC1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_SDMMC1CLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_MSI)) - -#endif /* RCC_HSI48_SUPPORT */ -#endif /* SDMMC1 */ - -#if defined(RCC_HSI48_SUPPORT) - -#define IS_RCC_RNGCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_RNGCLKSOURCE_HSI48) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_MSI)) - -#else - -#define IS_RCC_RNGCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_RNGCLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_MSI)) - -#endif /* RCC_HSI48_SUPPORT */ - -#if defined(USB_OTG_FS) || defined(USB) -#if defined(RCC_HSI48_SUPPORT) - -#define IS_RCC_USBCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_USBCLKSOURCE_HSI48) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_MSI)) - -#else - -#define IS_RCC_USBCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_USBCLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_MSI)) - -#endif /* RCC_HSI48_SUPPORT */ -#endif /* USB_OTG_FS || USB */ - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) - -#define IS_RCC_ADCCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_ADCCLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_ADCCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_ADCCLKSOURCE_PLLSAI2) || \ - ((__SOURCE__) == RCC_ADCCLKSOURCE_SYSCLK)) - -#else - -#define IS_RCC_ADCCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_ADCCLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_ADCCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_ADCCLKSOURCE_SYSCLK)) - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ - -#if defined(SWPMI1) - -#define IS_RCC_SWPMI1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_SWPMI1CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_SWPMI1CLKSOURCE_HSI)) - -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) - -#define IS_RCC_DFSDM1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_DFSDM1CLKSOURCE_PCLK2) || \ - ((__SOURCE__) == RCC_DFSDM1CLKSOURCE_SYSCLK)) - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -#define IS_RCC_DFSDM1AUDIOCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_DFSDM1AUDIOCLKSOURCE_SAI1) || \ - ((__SOURCE__) == RCC_DFSDM1AUDIOCLKSOURCE_HSI) || \ - ((__SOURCE__) == RCC_DFSDM1AUDIOCLKSOURCE_MSI)) - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) - -#define IS_RCC_LTDCCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_LTDCCLKSOURCE_PLLSAI2_DIV2) || \ - ((__SOURCE__) == RCC_LTDCCLKSOURCE_PLLSAI2_DIV4) || \ - ((__SOURCE__) == RCC_LTDCCLKSOURCE_PLLSAI2_DIV8) || \ - ((__SOURCE__) == RCC_LTDCCLKSOURCE_PLLSAI2_DIV16)) - -#endif /* LTDC */ - -#if defined(DSI) - -#define IS_RCC_DSICLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_DSICLKSOURCE_DSIPHY) || \ - ((__SOURCE__) == RCC_DSICLKSOURCE_PLLSAI2)) - -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - -#define IS_RCC_OSPICLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_OSPICLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_OSPICLKSOURCE_MSI) || \ - ((__SOURCE__) == RCC_OSPICLKSOURCE_PLL)) - -#endif /* OCTOSPI1 || OCTOSPI2 */ - -#define IS_RCC_PLLSAI1SOURCE(__VALUE__) IS_RCC_PLLSOURCE(__VALUE__) - -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) -#define IS_RCC_PLLSAI1M_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 16U)) -#else -#define IS_RCC_PLLSAI1M_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 8U)) -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - -#define IS_RCC_PLLSAI1N_VALUE(__VALUE__) ((8U <= (__VALUE__)) && ((__VALUE__) <= 86U)) - -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) -#define IS_RCC_PLLSAI1P_VALUE(__VALUE__) (((__VALUE__) >= 2U) && ((__VALUE__) <= 31U)) -#else -#define IS_RCC_PLLSAI1P_VALUE(__VALUE__) (((__VALUE__) == 7U) || ((__VALUE__) == 17U)) -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -#define IS_RCC_PLLSAI1Q_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) - -#define IS_RCC_PLLSAI1R_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) - -#if defined(RCC_PLLSAI2_SUPPORT) - -#define IS_RCC_PLLSAI2SOURCE(__VALUE__) IS_RCC_PLLSOURCE(__VALUE__) - -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) -#define IS_RCC_PLLSAI2M_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 16U)) -#else -#define IS_RCC_PLLSAI2M_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 8U)) -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - -#define IS_RCC_PLLSAI2N_VALUE(__VALUE__) ((8U <= (__VALUE__)) && ((__VALUE__) <= 86U)) - -#if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) -#define IS_RCC_PLLSAI2P_VALUE(__VALUE__) (((__VALUE__) >= 2U) && ((__VALUE__) <= 31U)) -#else -#define IS_RCC_PLLSAI2P_VALUE(__VALUE__) (((__VALUE__) == 7U) || ((__VALUE__) == 17U)) -#endif /* RCC_PLLSAI2P_DIV_2_31_SUPPORT */ - -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) -#define IS_RCC_PLLSAI2Q_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ - -#define IS_RCC_PLLSAI2R_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) - -#endif /* RCC_PLLSAI2_SUPPORT */ - -#if defined(CRS) - -#define IS_RCC_CRS_SYNC_SOURCE(__SOURCE__) (((__SOURCE__) == RCC_CRS_SYNC_SOURCE_GPIO) || \ - ((__SOURCE__) == RCC_CRS_SYNC_SOURCE_LSE) || \ - ((__SOURCE__) == RCC_CRS_SYNC_SOURCE_USB)) - -#define IS_RCC_CRS_SYNC_DIV(__DIV__) (((__DIV__) == RCC_CRS_SYNC_DIV1) || ((__DIV__) == RCC_CRS_SYNC_DIV2) || \ - ((__DIV__) == RCC_CRS_SYNC_DIV4) || ((__DIV__) == RCC_CRS_SYNC_DIV8) || \ - ((__DIV__) == RCC_CRS_SYNC_DIV16) || ((__DIV__) == RCC_CRS_SYNC_DIV32) || \ - ((__DIV__) == RCC_CRS_SYNC_DIV64) || ((__DIV__) == RCC_CRS_SYNC_DIV128)) - -#define IS_RCC_CRS_SYNC_POLARITY(__POLARITY__) (((__POLARITY__) == RCC_CRS_SYNC_POLARITY_RISING) || \ - ((__POLARITY__) == RCC_CRS_SYNC_POLARITY_FALLING)) - -#define IS_RCC_CRS_RELOADVALUE(__VALUE__) (((__VALUE__) <= 0xFFFFU)) - -#define IS_RCC_CRS_ERRORLIMIT(__VALUE__) (((__VALUE__) <= 0xFFU)) - -#define IS_RCC_CRS_HSI48CALIBRATION(__VALUE__) (((__VALUE__) <= 0x3FU)) - -#define IS_RCC_CRS_FREQERRORDIR(__DIR__) (((__DIR__) == RCC_CRS_FREQERRORDIR_UP) || \ - ((__DIR__) == RCC_CRS_FREQERRORDIR_DOWN)) - -#endif /* CRS */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RCC_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rng.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rng.h deleted file mode 100644 index 6939084d..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rng.h +++ /dev/null @@ -1,325 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rng.h - * @author MCD Application Team - * @brief Header file of RNG HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RNG_H -#define __STM32L4xx_HAL_RNG_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RNG - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup RNG_Exported_Types RNG Exported Types - * @{ - */ - -#if defined(RNG_CR_CED) -/** - * @brief RNG Configuration Structure definition - */ -typedef struct -{ - uint32_t ClockErrorDetection; /*!< Clock error detection */ -}RNG_InitTypeDef; -#endif /* defined(RNG_CR_CED) */ - -/** - * @brief RNG HAL State Structure definition - */ -typedef enum -{ - HAL_RNG_STATE_RESET = 0x00, /*!< RNG not yet initialized or disabled */ - HAL_RNG_STATE_READY = 0x01, /*!< RNG initialized and ready for use */ - HAL_RNG_STATE_BUSY = 0x02, /*!< RNG internal process is ongoing */ - HAL_RNG_STATE_TIMEOUT = 0x03, /*!< RNG timeout state */ - HAL_RNG_STATE_ERROR = 0x04 /*!< RNG error state */ - -}HAL_RNG_StateTypeDef; - -/** - * @brief RNG Handle Structure definition - */ -typedef struct -{ - RNG_TypeDef *Instance; /*!< Register base address */ - -#if defined(RNG_CR_CED) - RNG_InitTypeDef Init; /*!< RNG configuration parameters */ -#endif /* defined(RNG_CR_CED) */ - - HAL_LockTypeDef Lock; /*!< RNG locking object */ - - __IO HAL_RNG_StateTypeDef State; /*!< RNG communication state */ - - uint32_t RandomNumber; /*!< Last Generated RNG Data */ - -}RNG_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RNG_Exported_Constants RNG Exported Constants - * @{ - */ - -/** @defgroup RNG_Interrupt_definition RNG Interrupts Definition - * @{ - */ -#define RNG_IT_DRDY RNG_SR_DRDY /*!< Data Ready interrupt */ -#define RNG_IT_CEI RNG_SR_CEIS /*!< Clock error interrupt */ -#define RNG_IT_SEI RNG_SR_SEIS /*!< Seed error interrupt */ -/** - * @} - */ - -/** @defgroup RNG_Flag_definition RNG Flags Definition - * @{ - */ -#define RNG_FLAG_DRDY RNG_SR_DRDY /*!< Data ready */ -#define RNG_FLAG_CECS RNG_SR_CECS /*!< Clock error current status */ -#define RNG_FLAG_SECS RNG_SR_SECS /*!< Seed error current status */ -/** - * @} - */ - -#if defined(RNG_CR_CED) -/** @defgroup RNG_Clock_Error_Detection RNG Clock Error Detection - * @{ - */ -#define RNG_CED_ENABLE ((uint32_t)0x00000000) /*!< Clock error detection enabled */ -#define RNG_CED_DISABLE RNG_CR_CED /*!< Clock error detection disabled */ -/** - * @} - */ -#endif /* defined(RNG_CR_CED) */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup RNG_Exported_Macros RNG Exported Macros - * @{ - */ - -/** @brief Reset RNG handle state. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET) - -/** - * @brief Enable the RNG peripheral. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_RNGEN) - -/** - * @brief Disable the RNG peripheral. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_RNGEN) - -/** - * @brief Check whether the specified RNG flag is set or not. - * @param __HANDLE__: RNG Handle - * @param __FLAG__: RNG flag - * This parameter can be one of the following values: - * @arg RNG_FLAG_DRDY: Data ready - * @arg RNG_FLAG_CECS: Clock error current status - * @arg RNG_FLAG_SECS: Seed error current status - * @retval The new state of __FLAG__ (SET or RESET). - */ -#define __HAL_RNG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) - - -/** - * @brief Clear the selected RNG flag status. - * @param __HANDLE__: RNG handle - * @param __FLAG__: RNG flag to clear - * @note WARNING: This is a dummy macro for HAL code alignment, - * flags RNG_FLAG_DRDY, RNG_FLAG_CECS and RNG_FLAG_SECS are read-only. - * @retval None - */ -#define __HAL_RNG_CLEAR_FLAG(__HANDLE__, __FLAG__) /* dummy macro */ - - - -/** - * @brief Enable the RNG interrupt. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_ENABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_IE) - -/** - * @brief Disable the RNG interrupt. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_DISABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_IE) - -/** - * @brief Check whether the specified RNG interrupt has occurred or not. - * @param __HANDLE__: RNG Handle - * @param __INTERRUPT__: specifies the RNG interrupt status flag to check. - * This parameter can be one of the following values: - * @arg RNG_IT_DRDY: Data ready interrupt - * @arg RNG_IT_CEI: Clock error interrupt - * @arg RNG_IT_SEI: Seed error interrupt - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_RNG_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__)) - -/** - * @brief Clear the RNG interrupt status flags. - * @param __HANDLE__: RNG Handle - * @param __INTERRUPT__: specifies the RNG interrupt status flag to clear. - * This parameter can be one of the following values: - * @arg RNG_IT_CEI: Clock error interrupt - * @arg RNG_IT_SEI: Seed error interrupt - * @note RNG_IT_DRDY flag is read-only, reading RNG_DR register automatically clears RNG_IT_DRDY. - * @retval None - */ -#define __HAL_RNG_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR) = ~(__INTERRUPT__)) - -/** - * @} - */ - - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup RNG_Exported_Functions RNG Exported Functions - * @{ - */ - -/* Initialization and de-initialization functions ******************************/ -/** @defgroup RNG_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng); -HAL_StatusTypeDef HAL_RNG_DeInit (RNG_HandleTypeDef *hrng); -void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng); -void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng); -/** - * @} - */ - -/* Peripheral Control functions ************************************************/ -/** @defgroup RNG_Exported_Functions_Group2 Peripheral Control functions - * @{ - */ -uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber() instead */ -uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */ - -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit); -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng); -uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng); - -void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng); -void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng); -void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef* hrng, uint32_t random32bit); -/** - * @} - */ - -/* Peripheral State functions **************************************************/ -/** @defgroup RNG_Exported_Functions_Group3 Peripheral State functions - * @{ - */ -HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng); -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup RNG_Private_Macros RNG Private Macros - * @{ - */ - -#if defined(RNG_CR_CED) -/** - * @brief Verify the RNG Clock Error Detection mode. - * @param __MODE__: RNG Clock Error Detection mode - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_RNG_CED(__MODE__) (((__MODE__) == RNG_CED_ENABLE) || \ - ((__MODE__) == RNG_CED_DISABLE)) -#endif /* defined(RNG_CR_CED) */ - -/** - * @} - */ -/* Private functions prototypes ----------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RNG_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h deleted file mode 100644 index 5d6ce906..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h +++ /dev/null @@ -1,861 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rtc.h - * @author MCD Application Team - * @brief Header file of RTC HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RTC_H -#define __STM32L4xx_HAL_RTC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RTC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup RTC_Exported_Types RTC Exported Types - * @{ - */ -/** - * @brief HAL State structures definition - */ -typedef enum -{ - HAL_RTC_STATE_RESET = 0x00, /*!< RTC not yet initialized or disabled */ - HAL_RTC_STATE_READY = 0x01, /*!< RTC initialized and ready for use */ - HAL_RTC_STATE_BUSY = 0x02, /*!< RTC process is ongoing */ - HAL_RTC_STATE_TIMEOUT = 0x03, /*!< RTC timeout state */ - HAL_RTC_STATE_ERROR = 0x04 /*!< RTC error state */ - -}HAL_RTCStateTypeDef; - -/** - * @brief RTC Configuration Structure definition - */ -typedef struct -{ - uint32_t HourFormat; /*!< Specifies the RTC Hour Format. - This parameter can be a value of @ref RTC_Hour_Formats */ - - uint32_t AsynchPrediv; /*!< Specifies the RTC Asynchronous Predivider value. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F */ - - uint32_t SynchPrediv; /*!< Specifies the RTC Synchronous Predivider value. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7FFF */ - - uint32_t OutPut; /*!< Specifies which signal will be routed to the RTC output. - This parameter can be a value of @ref RTCEx_Output_selection_Definitions */ - - uint32_t OutPutRemap; /*!< Specifies the remap for RTC output. - This parameter can be a value of @ref RTC_Output_ALARM_OUT_Remap */ - - uint32_t OutPutPolarity; /*!< Specifies the polarity of the output signal. - This parameter can be a value of @ref RTC_Output_Polarity_Definitions */ - - uint32_t OutPutType; /*!< Specifies the RTC Output Pin mode. - This parameter can be a value of @ref RTC_Output_Type_ALARM_OUT */ -}RTC_InitTypeDef; - -/** - * @brief RTC Time structure definition - */ -typedef struct -{ - uint8_t Hours; /*!< Specifies the RTC Time Hour. - This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected. - This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected */ - - uint8_t Minutes; /*!< Specifies the RTC Time Minutes. - This parameter must be a number between Min_Data = 0 and Max_Data = 59 */ - - uint8_t Seconds; /*!< Specifies the RTC Time Seconds. - This parameter must be a number between Min_Data = 0 and Max_Data = 59 */ - - uint8_t TimeFormat; /*!< Specifies the RTC AM/PM Time. - This parameter can be a value of @ref RTC_AM_PM_Definitions */ - - uint32_t SubSeconds; /*!< Specifies the RTC_SSR RTC Sub Second register content. - This parameter corresponds to a time unit range between [0-1] Second - with [1 Sec / SecondFraction +1] granularity */ - - uint32_t SecondFraction; /*!< Specifies the range or granularity of Sub Second register content - corresponding to Synchronous pre-scaler factor value (PREDIV_S) - This parameter corresponds to a time unit range between [0-1] Second - with [1 Sec / SecondFraction +1] granularity. - This field will be used only by HAL_RTC_GetTime function */ - - uint32_t DayLightSaving; /*!< Specifies RTC_DayLightSaveOperation: the value of hour adjustment. - This parameter can be a value of @ref RTC_DayLightSaving_Definitions */ - - uint32_t StoreOperation; /*!< Specifies RTC_StoreOperation value to be written in the BCK bit - in CR register to store the operation. - This parameter can be a value of @ref RTC_StoreOperation_Definitions */ -}RTC_TimeTypeDef; - -/** - * @brief RTC Date structure definition - */ -typedef struct -{ - uint8_t WeekDay; /*!< Specifies the RTC Date WeekDay. - This parameter can be a value of @ref RTC_WeekDay_Definitions */ - - uint8_t Month; /*!< Specifies the RTC Date Month (in BCD format). - This parameter can be a value of @ref RTC_Month_Date_Definitions */ - - uint8_t Date; /*!< Specifies the RTC Date. - This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ - - uint8_t Year; /*!< Specifies the RTC Date Year. - This parameter must be a number between Min_Data = 0 and Max_Data = 99 */ - -}RTC_DateTypeDef; - -/** - * @brief RTC Alarm structure definition - */ -typedef struct -{ - RTC_TimeTypeDef AlarmTime; /*!< Specifies the RTC Alarm Time members */ - - uint32_t AlarmMask; /*!< Specifies the RTC Alarm Masks. - This parameter can be a value of @ref RTC_AlarmMask_Definitions */ - - uint32_t AlarmSubSecondMask; /*!< Specifies the RTC Alarm SubSeconds Masks. - This parameter can be a value of @ref RTC_Alarm_Sub_Seconds_Masks_Definitions */ - - uint32_t AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay. - This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */ - - uint8_t AlarmDateWeekDay; /*!< Specifies the RTC Alarm Date/WeekDay. - If the Alarm Date is selected, this parameter must be set to a value in the 1-31 range. - If the Alarm WeekDay is selected, this parameter can be a value of @ref RTC_WeekDay_Definitions */ - - uint32_t Alarm; /*!< Specifies the alarm . - This parameter can be a value of @ref RTC_Alarms_Definitions */ -}RTC_AlarmTypeDef; - -/** - * @brief Time Handle Structure definition - */ -typedef struct -{ - RTC_TypeDef *Instance; /*!< Register base address */ - - RTC_InitTypeDef Init; /*!< RTC required parameters */ - - HAL_LockTypeDef Lock; /*!< RTC locking object */ - - __IO HAL_RTCStateTypeDef State; /*!< Time communication state */ - -}RTC_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RTC_Exported_Constants RTC Exported Constants - * @{ - */ - -/** @defgroup RTC_Hour_Formats RTC Hour Formats - * @{ - */ -#define RTC_HOURFORMAT_24 ((uint32_t)0x00000000) -#define RTC_HOURFORMAT_12 ((uint32_t)0x00000040) -/** - * @} - */ - -/** @defgroup RTC_Output_Polarity_Definitions RTC Output Polarity Definitions - * @{ - */ -#define RTC_OUTPUT_POLARITY_HIGH ((uint32_t)0x00000000) -#define RTC_OUTPUT_POLARITY_LOW ((uint32_t)0x00100000) -/** - * @} - */ - -/** @defgroup RTC_Output_Type_ALARM_OUT RTC Output Type ALARM OUT - * @{ - */ -#define RTC_OUTPUT_TYPE_OPENDRAIN ((uint32_t)0x00000000) -#define RTC_OUTPUT_TYPE_PUSHPULL ((uint32_t)RTC_OR_ALARMOUTTYPE) -/** - * @} - */ - -/** @defgroup RTC_Output_ALARM_OUT_Remap RTC Output ALARM OUT Remap - * @{ - */ -#define RTC_OUTPUT_REMAP_NONE ((uint32_t)0x00000000) -#define RTC_OUTPUT_REMAP_POS1 ((uint32_t)RTC_OR_OUT_RMP) -/** - * @} - */ - -/** @defgroup RTC_AM_PM_Definitions RTC AM PM Definitions - * @{ - */ -#define RTC_HOURFORMAT12_AM ((uint8_t)0x00) -#define RTC_HOURFORMAT12_PM ((uint8_t)0x40) -/** - * @} - */ - -/** @defgroup RTC_DayLightSaving_Definitions RTC DayLight Saving Definitions - * @{ - */ -#define RTC_DAYLIGHTSAVING_SUB1H ((uint32_t)0x00020000) -#define RTC_DAYLIGHTSAVING_ADD1H ((uint32_t)0x00010000) -#define RTC_DAYLIGHTSAVING_NONE ((uint32_t)0x00000000) -/** - * @} - */ - -/** @defgroup RTC_StoreOperation_Definitions RTC Store Operation Definitions - * @{ - */ -#define RTC_STOREOPERATION_RESET ((uint32_t)0x00000000) -#define RTC_STOREOPERATION_SET ((uint32_t)0x00040000) -/** - * @} - */ - -/** @defgroup RTC_Input_parameter_format_definitions RTC Input Parameter Format Definitions - * @{ - */ -#define RTC_FORMAT_BIN ((uint32_t)0x00000000) -#define RTC_FORMAT_BCD ((uint32_t)0x00000001) -/** - * @} - */ - -/** @defgroup RTC_Month_Date_Definitions RTC Month Date Definitions - * @{ - */ - -/* Coded in BCD format */ -#define RTC_MONTH_JANUARY ((uint8_t)0x01) -#define RTC_MONTH_FEBRUARY ((uint8_t)0x02) -#define RTC_MONTH_MARCH ((uint8_t)0x03) -#define RTC_MONTH_APRIL ((uint8_t)0x04) -#define RTC_MONTH_MAY ((uint8_t)0x05) -#define RTC_MONTH_JUNE ((uint8_t)0x06) -#define RTC_MONTH_JULY ((uint8_t)0x07) -#define RTC_MONTH_AUGUST ((uint8_t)0x08) -#define RTC_MONTH_SEPTEMBER ((uint8_t)0x09) -#define RTC_MONTH_OCTOBER ((uint8_t)0x10) -#define RTC_MONTH_NOVEMBER ((uint8_t)0x11) -#define RTC_MONTH_DECEMBER ((uint8_t)0x12) -/** - * @} - */ - -/** @defgroup RTC_WeekDay_Definitions RTC WeekDay Definitions - * @{ - */ -#define RTC_WEEKDAY_MONDAY ((uint8_t)0x01) -#define RTC_WEEKDAY_TUESDAY ((uint8_t)0x02) -#define RTC_WEEKDAY_WEDNESDAY ((uint8_t)0x03) -#define RTC_WEEKDAY_THURSDAY ((uint8_t)0x04) -#define RTC_WEEKDAY_FRIDAY ((uint8_t)0x05) -#define RTC_WEEKDAY_SATURDAY ((uint8_t)0x06) -#define RTC_WEEKDAY_SUNDAY ((uint8_t)0x07) -/** - * @} - */ - -/** @defgroup RTC_AlarmDateWeekDay_Definitions RTC Alarm Date WeekDay Definitions - * @{ - */ -#define RTC_ALARMDATEWEEKDAYSEL_DATE ((uint32_t)0x00000000) -#define RTC_ALARMDATEWEEKDAYSEL_WEEKDAY ((uint32_t)0x40000000) -/** - * @} - */ - - -/** @defgroup RTC_AlarmMask_Definitions RTC Alarm Mask Definitions - * @{ - */ -#define RTC_ALARMMASK_NONE ((uint32_t)0x00000000) -#define RTC_ALARMMASK_DATEWEEKDAY RTC_ALRMAR_MSK4 -#define RTC_ALARMMASK_HOURS RTC_ALRMAR_MSK3 -#define RTC_ALARMMASK_MINUTES RTC_ALRMAR_MSK2 -#define RTC_ALARMMASK_SECONDS RTC_ALRMAR_MSK1 -#define RTC_ALARMMASK_ALL ((uint32_t)0x80808080) -/** - * @} - */ - -/** @defgroup RTC_Alarms_Definitions RTC Alarms Definitions - * @{ - */ -#define RTC_ALARM_A RTC_CR_ALRAE -#define RTC_ALARM_B RTC_CR_ALRBE -/** - * @} - */ - -/** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions RTC Alarm Sub Seconds Masks Definitions - * @{ - */ -#define RTC_ALARMSUBSECONDMASK_ALL ((uint32_t)0x00000000) /*!< All Alarm SS fields are masked. - There is no comparison on sub seconds - for Alarm */ -#define RTC_ALARMSUBSECONDMASK_SS14_1 ((uint32_t)0x01000000) /*!< SS[14:1] are don't care in Alarm - comparison. Only SS[0] is compared. */ -#define RTC_ALARMSUBSECONDMASK_SS14_2 ((uint32_t)0x02000000) /*!< SS[14:2] are don't care in Alarm - comparison. Only SS[1:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_3 ((uint32_t)0x03000000) /*!< SS[14:3] are don't care in Alarm - comparison. Only SS[2:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_4 ((uint32_t)0x04000000) /*!< SS[14:4] are don't care in Alarm - comparison. Only SS[3:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_5 ((uint32_t)0x05000000) /*!< SS[14:5] are don't care in Alarm - comparison. Only SS[4:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_6 ((uint32_t)0x06000000) /*!< SS[14:6] are don't care in Alarm - comparison. Only SS[5:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_7 ((uint32_t)0x07000000) /*!< SS[14:7] are don't care in Alarm - comparison. Only SS[6:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_8 ((uint32_t)0x08000000) /*!< SS[14:8] are don't care in Alarm - comparison. Only SS[7:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_9 ((uint32_t)0x09000000) /*!< SS[14:9] are don't care in Alarm - comparison. Only SS[8:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_10 ((uint32_t)0x0A000000) /*!< SS[14:10] are don't care in Alarm - comparison. Only SS[9:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_11 ((uint32_t)0x0B000000) /*!< SS[14:11] are don't care in Alarm - comparison. Only SS[10:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_12 ((uint32_t)0x0C000000) /*!< SS[14:12] are don't care in Alarm - comparison. Only SS[11:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_13 ((uint32_t)0x0D000000) /*!< SS[14:13] are don't care in Alarm - comparison. Only SS[12:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14 ((uint32_t)0x0E000000) /*!< SS[14] is don't care in Alarm - comparison. Only SS[13:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_NONE ((uint32_t)0x0F000000) /*!< SS[14:0] are compared and must match - to activate alarm. */ -/** - * @} - */ - -/** @defgroup RTC_Interrupts_Definitions RTC Interrupts Definitions - * @{ - */ -#define RTC_IT_TS ((uint32_t)RTC_CR_TSIE) /*!< Enable Timestamp Interrupt */ -#define RTC_IT_WUT ((uint32_t)RTC_CR_WUTIE) /*!< Enable Wakeup timer Interrupt */ -#define RTC_IT_ALRA ((uint32_t)RTC_CR_ALRAIE) /*!< Enable Alarm A Interrupt */ -#define RTC_IT_ALRB ((uint32_t)RTC_CR_ALRBIE) /*!< Enable Alarm B Interrupt */ -#define RTC_IT_TAMP ((uint32_t)RTC_TAMPCR_TAMPIE) /*!< Enable all Tamper Interrupt */ -#define RTC_IT_TAMP1 ((uint32_t)RTC_TAMPCR_TAMP1IE) /*!< Enable Tamper 1 Interrupt */ -#define RTC_IT_TAMP2 ((uint32_t)RTC_TAMPCR_TAMP2IE) /*!< Enable Tamper 2 Interrupt */ -#define RTC_IT_TAMP3 ((uint32_t)RTC_TAMPCR_TAMP3IE) /*!< Enable Tamper 3 Interrupt */ -/** - * @} - */ - -/** @defgroup RTC_Flags_Definitions RTC Flags Definitions - * @{ - */ -#define RTC_FLAG_RECALPF ((uint32_t)RTC_ISR_RECALPF) -#define RTC_FLAG_TAMP3F ((uint32_t)RTC_ISR_TAMP3F) -#define RTC_FLAG_TAMP2F ((uint32_t)RTC_ISR_TAMP2F) -#define RTC_FLAG_TAMP1F ((uint32_t)RTC_ISR_TAMP1F) -#define RTC_FLAG_TSOVF ((uint32_t)RTC_ISR_TSOVF) -#define RTC_FLAG_TSF ((uint32_t)RTC_ISR_TSF) -#define RTC_FLAG_ITSF ((uint32_t)RTC_ISR_ITSF) -#define RTC_FLAG_WUTF ((uint32_t)RTC_ISR_WUTF) -#define RTC_FLAG_ALRBF ((uint32_t)RTC_ISR_ALRBF) -#define RTC_FLAG_ALRAF ((uint32_t)RTC_ISR_ALRAF) -#define RTC_FLAG_INITF ((uint32_t)RTC_ISR_INITF) -#define RTC_FLAG_RSF ((uint32_t)RTC_ISR_RSF) -#define RTC_FLAG_INITS ((uint32_t)RTC_ISR_INITS) -#define RTC_FLAG_SHPF ((uint32_t)RTC_ISR_SHPF) -#define RTC_FLAG_WUTWF ((uint32_t)RTC_ISR_WUTWF) -#define RTC_FLAG_ALRBWF ((uint32_t)RTC_ISR_ALRBWF) -#define RTC_FLAG_ALRAWF ((uint32_t)RTC_ISR_ALRAWF) -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup RTC_Exported_Macros RTC Exported Macros - * @{ - */ - -/** @brief Reset RTC handle state. - * @param __HANDLE__: RTC handle. - * @retval None - */ -#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RTC_STATE_RESET) - -/** - * @brief Disable the write protection for RTC registers. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__) \ - do{ \ - (__HANDLE__)->Instance->WPR = 0xCA; \ - (__HANDLE__)->Instance->WPR = 0x53; \ - } while(0) - -/** - * @brief Enable the write protection for RTC registers. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__) \ - do{ \ - (__HANDLE__)->Instance->WPR = 0xFF; \ - } while(0) - - -/** - * @brief Enable the RTC ALARMA peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_ALARMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRAE)) - -/** - * @brief Disable the RTC ALARMA peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_ALARMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRAE)) - -/** - * @brief Enable the RTC ALARMB peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_ALARMB_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRBE)) - -/** - * @brief Disable the RTC ALARMB peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_ALARMB_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRBE)) - -/** - * @brief Enable the RTC Alarm interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_ALRA: Alarm A interrupt - * @arg RTC_IT_ALRB: Alarm B interrupt - * @retval None - */ -#define __HAL_RTC_ALARM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) - -/** - * @brief Disable the RTC Alarm interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_ALRA: Alarm A interrupt - * @arg RTC_IT_ALRB: Alarm B interrupt - * @retval None - */ -#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified RTC Alarm interrupt has occurred or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to check. - * This parameter can be: - * @arg RTC_IT_ALRA: Alarm A interrupt - * @arg RTC_IT_ALRB: Alarm B interrupt - * @retval None - */ -#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4)) != RESET) ? SET : RESET) - -/** - * @brief Get the selected RTC Alarm's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Alarm Flag sources to check. - * This parameter can be: - * @arg RTC_FLAG_ALRAF - * @arg RTC_FLAG_ALRBF - * @arg RTC_FLAG_ALRAWF - * @arg RTC_FLAG_ALRBWF - * @retval None - */ -#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Clear the RTC Alarm's pending flags. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Alarm Flag sources to clear. - * This parameter can be: - * @arg RTC_FLAG_ALRAF - * @arg RTC_FLAG_ALRBF - * @retval None - */ -#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) - -/** - * @brief Check whether the specified RTC Alarm interrupt is enabled or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to check. - * This parameter can be: - * @arg RTC_IT_ALRA: Alarm A interrupt - * @arg RTC_IT_ALRB: Alarm B interrupt - * @retval None - */ -#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET) - -/** - * @brief Enable interrupt on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_ENABLE_IT() (EXTI->IMR1 |= RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Disable interrupt on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_DISABLE_IT() (EXTI->IMR1 &= ~(RTC_EXTI_LINE_ALARM_EVENT)) - -/** - * @brief Enable event on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_ENABLE_EVENT() (EXTI->EMR1 |= RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Disable event on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_DISABLE_EVENT() (EXTI->EMR1 &= ~(RTC_EXTI_LINE_ALARM_EVENT)) - -/** - * @brief Enable falling edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR1 |= RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Disable falling edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR1 &= ~(RTC_EXTI_LINE_ALARM_EVENT)) - -/** - * @brief Enable rising edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR1 |= RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Disable rising edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR1 &= ~(RTC_EXTI_LINE_ALARM_EVENT)) - -/** - * @brief Enable rising & falling edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable rising & falling edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Check whether the RTC Alarm associated Exti line interrupt flag is set or not. - * @retval Line Status. - */ -#define __HAL_RTC_ALARM_EXTI_GET_FLAG() (EXTI->PR1 & RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Clear the RTC Alarm associated Exti line flag. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() (EXTI->PR1 = RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Generate a Software interrupt on RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @} - */ - -/* Include RTC HAL Extended module */ -#include "stm32l4xx_hal_rtc_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup RTC_Exported_Functions - * @{ - */ - -/** @addtogroup RTC_Exported_Functions_Group1 - * @{ - */ -/* Initialization and de-initialization functions ****************************/ -HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc); -void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc); -void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc); -/** - * @} - */ - -/** @addtogroup RTC_Exported_Functions_Group2 - * @{ - */ -/* RTC Time and Date functions ************************************************/ -HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format); -HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format); -HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format); -HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format); -/** - * @} - */ - -/** @addtogroup RTC_Exported_Functions_Group3 - * @{ - */ -/* RTC Alarm functions ********************************************************/ -HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format); -HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format); -HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm); -HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format); -void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc); -/** - * @} - */ - -/** @addtogroup RTC_Exported_Functions_Group4 - * @{ - */ -/* Peripheral Control functions ***********************************************/ -HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc); -/** - * @} - */ - -/** @addtogroup RTC_Exported_Functions_Group5 - * @{ - */ -/* Peripheral State functions *************************************************/ -HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc); - -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** @defgroup RTC_Private_Constants RTC Private Constants - * @{ - */ -/* Masks Definition */ -#define RTC_TR_RESERVED_MASK 0x007F7F7FU -#define RTC_DR_RESERVED_MASK 0x00FFFF3FU -#define RTC_INIT_MASK 0xFFFFFFFFU -#define RTC_RSF_MASK 0xFFFFFF5FU - -#define RTC_TIMEOUT_VALUE 1000 - -#define RTC_EXTI_LINE_ALARM_EVENT ((uint32_t)0x00040000) /*!< External interrupt line 18 Connected to the RTC Alarm event */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup RTC_Private_Macros RTC Private Macros - * @{ - */ - -/** @defgroup RTC_IS_RTC_Definitions RTC Private macros to check input parameters - * @{ - */ - -#define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HOURFORMAT_12) || \ - ((FORMAT) == RTC_HOURFORMAT_24)) - -#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPUT_POLARITY_HIGH) || \ - ((POL) == RTC_OUTPUT_POLARITY_LOW)) - -#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OUTPUT_TYPE_OPENDRAIN) || \ - ((TYPE) == RTC_OUTPUT_TYPE_PUSHPULL)) - -#define IS_RTC_OUTPUT_REMAP(REMAP) (((REMAP) == RTC_OUTPUT_REMAP_NONE) || \ - ((REMAP) == RTC_OUTPUT_REMAP_POS1)) - -#define IS_RTC_HOURFORMAT12(PM) (((PM) == RTC_HOURFORMAT12_AM) || ((PM) == RTC_HOURFORMAT12_PM)) - -#define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DAYLIGHTSAVING_SUB1H) || \ - ((SAVE) == RTC_DAYLIGHTSAVING_ADD1H) || \ - ((SAVE) == RTC_DAYLIGHTSAVING_NONE)) - -#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_STOREOPERATION_RESET) || \ - ((OPERATION) == RTC_STOREOPERATION_SET)) - -#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_FORMAT_BIN) || ((FORMAT) == RTC_FORMAT_BCD)) - -#define IS_RTC_YEAR(YEAR) ((YEAR) <= (uint32_t)99) - -#define IS_RTC_MONTH(MONTH) (((MONTH) >= (uint32_t)1) && ((MONTH) <= (uint32_t)12)) - -#define IS_RTC_DATE(DATE) (((DATE) >= (uint32_t)1) && ((DATE) <= (uint32_t)31)) - -#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_THURSDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_SUNDAY)) - -#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) >(uint32_t) 0) && ((DATE) <= (uint32_t)31)) - -#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_THURSDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_SUNDAY)) - -#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_ALARMDATEWEEKDAYSEL_DATE) || \ - ((SEL) == RTC_ALARMDATEWEEKDAYSEL_WEEKDAY)) - -#define IS_RTC_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET) - -#define IS_RTC_ALARM(ALARM) (((ALARM) == RTC_ALARM_A) || ((ALARM) == RTC_ALARM_B)) - -#define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= (uint32_t)0x00007FFF) - -#define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_ALARMSUBSECONDMASK_ALL) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_1) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_2) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_3) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_4) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_5) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_6) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_7) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_8) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_9) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_10) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_11) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_12) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_13) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_NONE)) - -#define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= (uint32_t)0x7F) - -#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= (uint32_t)0x7FFF) - -#define IS_RTC_HOUR12(HOUR) (((HOUR) > (uint32_t)0) && ((HOUR) <= (uint32_t)12)) - -#define IS_RTC_HOUR24(HOUR) ((HOUR) <= (uint32_t)23) - -#define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= (uint32_t)59) - -#define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= (uint32_t)59) - -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @addtogroup RTC_Private_Functions - * @{ - */ - -HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc); -uint8_t RTC_ByteToBcd2(uint8_t Value); -uint8_t RTC_Bcd2ToByte(uint8_t Value); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RTC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h deleted file mode 100644 index 8ba89b0d..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h +++ /dev/null @@ -1,1100 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rtc_ex.h - * @author MCD Application Team - * @brief Header file of RTC HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RTC_EX_H -#define __STM32L4xx_HAL_RTC_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RTCEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup RTCEx_Exported_Types RTCEx Exported Types - * @{ - */ -/** - * @brief RTC Tamper structure definition - */ -typedef struct -{ - uint32_t Tamper; /*!< Specifies the Tamper Pin. - This parameter can be a value of @ref RTCEx_Tamper_Pins_Definitions */ - - uint32_t Interrupt; /*!< Specifies the Tamper Interrupt. - This parameter can be a value of @ref RTCEx_Tamper_Interrupt_Definitions */ - - uint32_t Trigger; /*!< Specifies the Tamper Trigger. - This parameter can be a value of @ref RTCEx_Tamper_Trigger_Definitions */ - - uint32_t NoErase; /*!< Specifies the Tamper no erase mode. - This parameter can be a value of @ref RTCEx_Tamper_EraseBackUp_Definitions */ - - uint32_t MaskFlag; /*!< Specifies the Tamper Flag masking. - This parameter can be a value of @ref RTCEx_Tamper_MaskFlag_Definitions */ - - uint32_t Filter; /*!< Specifies the RTC Filter Tamper. - This parameter can be a value of @ref RTCEx_Tamper_Filter_Definitions */ - - uint32_t SamplingFrequency; /*!< Specifies the sampling frequency. - This parameter can be a value of @ref RTCEx_Tamper_Sampling_Frequencies_Definitions */ - - uint32_t PrechargeDuration; /*!< Specifies the Precharge Duration . - This parameter can be a value of @ref RTCEx_Tamper_Pin_Precharge_Duration_Definitions */ - - uint32_t TamperPullUp; /*!< Specifies the Tamper PullUp . - This parameter can be a value of @ref RTCEx_Tamper_Pull_UP_Definitions */ - - uint32_t TimeStampOnTamperDetection; /*!< Specifies the TimeStampOnTamperDetection. - This parameter can be a value of @ref RTCEx_Tamper_TimeStampOnTamperDetection_Definitions */ -}RTC_TamperTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RTCEx_Exported_Constants RTCEx Exported Constants - * @{ - */ - -/** @defgroup RTCEx_Output_selection_Definitions RTC Output Selection Definitions - * @{ - */ -#define RTC_OUTPUT_DISABLE ((uint32_t)0x00000000) -#define RTC_OUTPUT_ALARMA ((uint32_t)0x00200000) -#define RTC_OUTPUT_ALARMB ((uint32_t)0x00400000) -#define RTC_OUTPUT_WAKEUP ((uint32_t)0x00600000) -/** - * @} - */ - -/** @defgroup RTCEx_Backup_Registers_Definitions RTC Backup Registers Definitions - * @{ - */ -#define RTC_BKP_DR0 ((uint32_t)0x00000000) -#define RTC_BKP_DR1 ((uint32_t)0x00000001) -#define RTC_BKP_DR2 ((uint32_t)0x00000002) -#define RTC_BKP_DR3 ((uint32_t)0x00000003) -#define RTC_BKP_DR4 ((uint32_t)0x00000004) -#define RTC_BKP_DR5 ((uint32_t)0x00000005) -#define RTC_BKP_DR6 ((uint32_t)0x00000006) -#define RTC_BKP_DR7 ((uint32_t)0x00000007) -#define RTC_BKP_DR8 ((uint32_t)0x00000008) -#define RTC_BKP_DR9 ((uint32_t)0x00000009) -#define RTC_BKP_DR10 ((uint32_t)0x0000000A) -#define RTC_BKP_DR11 ((uint32_t)0x0000000B) -#define RTC_BKP_DR12 ((uint32_t)0x0000000C) -#define RTC_BKP_DR13 ((uint32_t)0x0000000D) -#define RTC_BKP_DR14 ((uint32_t)0x0000000E) -#define RTC_BKP_DR15 ((uint32_t)0x0000000F) -#define RTC_BKP_DR16 ((uint32_t)0x00000010) -#define RTC_BKP_DR17 ((uint32_t)0x00000011) -#define RTC_BKP_DR18 ((uint32_t)0x00000012) -#define RTC_BKP_DR19 ((uint32_t)0x00000013) -#define RTC_BKP_DR20 ((uint32_t)0x00000014) -#define RTC_BKP_DR21 ((uint32_t)0x00000015) -#define RTC_BKP_DR22 ((uint32_t)0x00000016) -#define RTC_BKP_DR23 ((uint32_t)0x00000017) -#define RTC_BKP_DR24 ((uint32_t)0x00000018) -#define RTC_BKP_DR25 ((uint32_t)0x00000019) -#define RTC_BKP_DR26 ((uint32_t)0x0000001A) -#define RTC_BKP_DR27 ((uint32_t)0x0000001B) -#define RTC_BKP_DR28 ((uint32_t)0x0000001C) -#define RTC_BKP_DR29 ((uint32_t)0x0000001D) -#define RTC_BKP_DR30 ((uint32_t)0x0000001E) -#define RTC_BKP_DR31 ((uint32_t)0x0000001F) -/** - * @} - */ - -/** @defgroup RTCEx_TimeStamp_Edges_definitions RTC TimeStamp Edges Definitions - * @{ - */ -#define RTC_TIMESTAMPEDGE_RISING ((uint32_t)0x00000000) -#define RTC_TIMESTAMPEDGE_FALLING ((uint32_t)0x00000008) -/** - * @} - */ - -/** @defgroup RTCEx_TimeStamp_Pin_Selection RTC TimeStamp Pins Selection - * @{ - */ -#define RTC_TIMESTAMPPIN_DEFAULT ((uint32_t)0x00000000) -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Pins_Definitions RTC Tamper Pins Definitions - * @{ - */ -#if defined(RTC_TAMPER1_SUPPORT) -#define RTC_TAMPER_1 RTC_TAMPCR_TAMP1E -#endif /* RTC_TAMPER1_SUPPORT */ -#define RTC_TAMPER_2 RTC_TAMPCR_TAMP2E -#if defined(RTC_TAMPER3_SUPPORT) -#define RTC_TAMPER_3 RTC_TAMPCR_TAMP3E -#endif /* RTC_TAMPER3_SUPPORT */ -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Interrupt_Definitions RTC Tamper Interrupts Definitions - * @{ - */ -#if defined(RTC_TAMPER1_SUPPORT) -#define RTC_TAMPER1_INTERRUPT RTC_TAMPCR_TAMP1IE -#endif /* RTC_TAMPER1_SUPPORT */ -#define RTC_TAMPER2_INTERRUPT RTC_TAMPCR_TAMP2IE -#if defined(RTC_TAMPER3_SUPPORT) -#define RTC_TAMPER3_INTERRUPT RTC_TAMPCR_TAMP3IE -#endif /* RTC_TAMPER3_SUPPORT */ -#define RTC_ALL_TAMPER_INTERRUPT RTC_TAMPCR_TAMPIE -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Trigger_Definitions RTC Tamper Triggers Definitions - * @{ - */ -#define RTC_TAMPERTRIGGER_RISINGEDGE ((uint32_t)0x00000000) -#define RTC_TAMPERTRIGGER_FALLINGEDGE ((uint32_t)0x00000002) -#define RTC_TAMPERTRIGGER_LOWLEVEL RTC_TAMPERTRIGGER_RISINGEDGE -#define RTC_TAMPERTRIGGER_HIGHLEVEL RTC_TAMPERTRIGGER_FALLINGEDGE -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_EraseBackUp_Definitions RTC Tamper EraseBackUp Definitions -* @{ -*/ -#define RTC_TAMPER_ERASE_BACKUP_ENABLE ((uint32_t)0x00000000) -#define RTC_TAMPER_ERASE_BACKUP_DISABLE ((uint32_t)0x00020000) -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_MaskFlag_Definitions RTC Tamper Mask Flag Definitions -* @{ -*/ -#define RTC_TAMPERMASK_FLAG_DISABLE ((uint32_t)0x00000000) -#define RTC_TAMPERMASK_FLAG_ENABLE ((uint32_t)0x00040000) -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Filter_Definitions RTC Tamper Filter Definitions - * @{ - */ -#define RTC_TAMPERFILTER_DISABLE ((uint32_t)0x00000000) /*!< Tamper filter is disabled */ - -#define RTC_TAMPERFILTER_2SAMPLE ((uint32_t)0x00000800) /*!< Tamper is activated after 2 - consecutive samples at the active level */ -#define RTC_TAMPERFILTER_4SAMPLE ((uint32_t)0x00001000) /*!< Tamper is activated after 4 - consecutive samples at the active level */ -#define RTC_TAMPERFILTER_8SAMPLE ((uint32_t)0x00001800) /*!< Tamper is activated after 8 - consecutive samples at the active level. */ -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Sampling_Frequencies_Definitions RTC Tamper Sampling Frequencies Definitions - * @{ - */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768 ((uint32_t)0x00000000) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 32768 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384 ((uint32_t)0x00000100) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 16384 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192 ((uint32_t)0x00000200) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 8192 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096 ((uint32_t)0x00000300) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 4096 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048 ((uint32_t)0x00000400) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 2048 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024 ((uint32_t)0x00000500) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 1024 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512 ((uint32_t)0x00000600) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 512 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256 ((uint32_t)0x00000700) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 256 */ -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Pin_Precharge_Duration_Definitions RTC Tamper Pin Precharge Duration Definitions - * @{ - */ -#define RTC_TAMPERPRECHARGEDURATION_1RTCCLK ((uint32_t)0x00000000) /*!< Tamper pins are pre-charged before - sampling during 1 RTCCLK cycle */ -#define RTC_TAMPERPRECHARGEDURATION_2RTCCLK ((uint32_t)0x00002000) /*!< Tamper pins are pre-charged before - sampling during 2 RTCCLK cycles */ -#define RTC_TAMPERPRECHARGEDURATION_4RTCCLK ((uint32_t)0x00004000) /*!< Tamper pins are pre-charged before - sampling during 4 RTCCLK cycles */ -#define RTC_TAMPERPRECHARGEDURATION_8RTCCLK ((uint32_t)0x00006000) /*!< Tamper pins are pre-charged before - sampling during 8 RTCCLK cycles */ -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_TimeStampOnTamperDetection_Definitions RTC Tamper TimeStamp On Tamper Detection Definitions - * @{ - */ -#define RTC_TIMESTAMPONTAMPERDETECTION_ENABLE ((uint32_t)RTC_TAMPCR_TAMPTS) /*!< TimeStamp on Tamper Detection event saved */ -#define RTC_TIMESTAMPONTAMPERDETECTION_DISABLE ((uint32_t)0x00000000) /*!< TimeStamp on Tamper Detection event is not saved */ -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Pull_UP_Definitions RTC Tamper Pull Up Definitions - * @{ - */ -#define RTC_TAMPER_PULLUP_ENABLE ((uint32_t)0x00000000) /*!< TimeStamp on Tamper Detection event saved */ -#define RTC_TAMPER_PULLUP_DISABLE ((uint32_t)RTC_TAMPCR_TAMPPUDIS) /*!< TimeStamp on Tamper Detection event is not saved */ -/** - * @} - */ - -/** @defgroup RTCEx_Wakeup_Timer_Definitions RTC Wakeup Timer Definitions - * @{ - */ -#define RTC_WAKEUPCLOCK_RTCCLK_DIV16 ((uint32_t)0x00000000) -#define RTC_WAKEUPCLOCK_RTCCLK_DIV8 ((uint32_t)0x00000001) -#define RTC_WAKEUPCLOCK_RTCCLK_DIV4 ((uint32_t)0x00000002) -#define RTC_WAKEUPCLOCK_RTCCLK_DIV2 ((uint32_t)0x00000003) -#define RTC_WAKEUPCLOCK_CK_SPRE_16BITS ((uint32_t)0x00000004) -#define RTC_WAKEUPCLOCK_CK_SPRE_17BITS ((uint32_t)0x00000006) -/** - * @} - */ - -/** @defgroup RTCEx_Smooth_calib_period_Definitions RTC Smooth Calib Period Definitions - * @{ - */ -#define RTC_SMOOTHCALIB_PERIOD_32SEC ((uint32_t)0x00000000) /*!< If RTCCLK = 32768 Hz, Smooth calibration - period is 32s, else 2exp20 RTCCLK seconds */ -#define RTC_SMOOTHCALIB_PERIOD_16SEC ((uint32_t)0x00002000) /*!< If RTCCLK = 32768 Hz, Smooth calibration - period is 16s, else 2exp19 RTCCLK seconds */ -#define RTC_SMOOTHCALIB_PERIOD_8SEC ((uint32_t)0x00004000) /*!< If RTCCLK = 32768 Hz, Smooth calibration - period is 8s, else 2exp18 RTCCLK seconds */ -/** - * @} - */ - -/** @defgroup RTCEx_Smooth_calib_Plus_pulses_Definitions RTC Smooth Calib Plus Pulses Definitions - * @{ - */ -#define RTC_SMOOTHCALIB_PLUSPULSES_SET ((uint32_t)0x00008000) /*!< The number of RTCCLK pulses added - during a X -second window = Y - CALM[8:0] - with Y = 512, 256, 128 when X = 32, 16, 8 */ -#define RTC_SMOOTHCALIB_PLUSPULSES_RESET ((uint32_t)0x00000000) /*!< The number of RTCCLK pulses subbstited - during a 32-second window = CALM[8:0] */ -/** - * @} - */ - -/** @defgroup RTCEx_Calib_Output_selection_Definitions RTC Calib Output Selection Definitions - * @{ - */ -#define RTC_CALIBOUTPUT_512HZ ((uint32_t)0x00000000) -#define RTC_CALIBOUTPUT_1HZ ((uint32_t)0x00080000) -/** - * @} - */ - -/** @defgroup RTCEx_Add_1_Second_Parameter_Definitions RTC Add 1 Second Parameter Definitions - * @{ - */ -#define RTC_SHIFTADD1S_RESET ((uint32_t)0x00000000) -#define RTC_SHIFTADD1S_SET ((uint32_t)0x80000000) -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup RTCEx_Exported_Macros RTCEx Exported Macros - * @{ - */ - -/** - * @brief Enable the RTC WakeUp Timer peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_WUTE)) - -/** - * @brief Disable the RTC WakeUp Timer peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE)) - -/** - * @brief Enable the RTC WakeUpTimer interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to be enabled. - * This parameter can be: - * @arg RTC_IT_WUT: WakeUpTimer interrupt - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) - -/** - * @brief Disable the RTC WakeUpTimer interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to be disabled. - * This parameter can be: - * @arg RTC_IT_WUT: WakeUpTimer interrupt - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified RTC WakeUpTimer interrupt has occurred or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to check. - * This parameter can be: - * @arg RTC_IT_WUT: WakeUpTimer interrupt - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4)) != RESET) ? SET : RESET) - -/** - * @brief Check whether the specified RTC Wake Up timer interrupt is enabled or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Wake Up timer interrupt sources to check. - * This parameter can be: - * @arg RTC_IT_WUT: WakeUpTimer interrupt - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET) - -/** - * @brief Get the selected RTC WakeUpTimer's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC WakeUpTimer Flag is pending or not. - * This parameter can be: - * @arg RTC_FLAG_WUTF - * @arg RTC_FLAG_WUTWF - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Clear the RTC Wake Up timer's pending flags. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC WakeUpTimer Flag to clear. - * This parameter can be: - * @arg RTC_FLAG_WUTF - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) - -#if defined(RTC_TAMPER1_SUPPORT) -/** - * @brief Enable the RTC Tamper1 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP1E)) - -/** - * @brief Disable the RTC Tamper1 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP1E)) -#endif /* RTC_TAMPER1_SUPPORT */ - -/** - * @brief Enable the RTC Tamper2 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP2E)) - -/** - * @brief Disable the RTC Tamper2 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP2E)) - -#if defined(RTC_TAMPER3_SUPPORT) -/** - * @brief Enable the RTC Tamper3 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP3E)) - -/** - * @brief Disable the RTC Tamper3 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP3E)) -#endif /* RTC_TAMPER3_SUPPORT */ - -/** - * @brief Enable the RTC Tamper interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Tamper interrupt sources to be enabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_TAMP: All tampers interrupts - * @arg RTC_IT_TAMP1: Tamper1 interrupt - * @arg RTC_IT_TAMP2: Tamper2 interrupt - * @arg RTC_IT_TAMP3: Tamper3 interrupt - * @retval None - */ -#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAMPCR |= (__INTERRUPT__)) - -/** - * @brief Disable the RTC Tamper interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Tamper interrupt sources to be disabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_TAMP: All tampers interrupts - * @arg RTC_IT_TAMP1: Tamper1 interrupt - * @arg RTC_IT_TAMP2: Tamper2 interrupt - * @arg RTC_IT_TAMP3: Tamper3 interrupt - * @retval None - */ -#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAMPCR &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified RTC Tamper interrupt has occurred or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Tamper interrupt to check. - * This parameter can be: - * @arg RTC_IT_TAMP1: Tamper1 interrupt - * @arg RTC_IT_TAMP2: Tamper2 interrupt - * @arg RTC_IT_TAMP3: Tamper3 interrupt - * @retval None - */ -#if defined(RTC_TAMPER1_SUPPORT) && defined(RTC_TAMPER3_SUPPORT) -#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) == RTC_IT_TAMP1) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 3)) != RESET) ? SET : RESET) : \ - ((__INTERRUPT__) == RTC_IT_TAMP2) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 5)) != RESET) ? SET : RESET) : \ - (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 7)) != RESET) ? SET : RESET)) -#else -#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 5)) != RESET) ? SET : RESET) -#endif /* RTC_TAMPER1_SUPPORT && RTC_TAMPER3_SUPPORT */ - -/** - * @brief Check whether the specified RTC Tamper interrupt is enabled or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Tamper interrupt source to check. - * This parameter can be: - * @arg RTC_IT_TAMP: All tampers interrupts - * @arg RTC_IT_TAMP1: Tamper1 interrupt - * @arg RTC_IT_TAMP2: Tamper2 interrupt - * @arg RTC_IT_TAMP3: Tamper3 interrupt - * @retval None - */ -#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAMPCR) & (__INTERRUPT__)) != RESET) ? SET : RESET) - -/** - * @brief Get the selected RTC Tamper's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Tamper Flag is pending or not. - * This parameter can be: - * @arg RTC_FLAG_TAMP1F: Tamper1 flag - * @arg RTC_FLAG_TAMP2F: Tamper2 flag - * @arg RTC_FLAG_TAMP3F: Tamper3 flag - * @retval None - */ -#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Clear the RTC Tamper's pending flags. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Tamper Flag sources to clear. - * This parameter can be: - * @arg RTC_FLAG_TAMP1F: Tamper1 flag - * @arg RTC_FLAG_TAMP2F: Tamper2 flag - * @arg RTC_FLAG_TAMP3F: Tamper3 flag - * @retval None - */ -#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) - -/** - * @brief Enable the RTC TimeStamp peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TSE)) - -/** - * @brief Disable the RTC TimeStamp peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE)) - -/** - * @brief Enable the RTC TimeStamp interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC TimeStamp interrupt source to be enabled. - * This parameter can be: - * @arg RTC_IT_TS: TimeStamp interrupt - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) - -/** - * @brief Disable the RTC TimeStamp interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC TimeStamp interrupt source to be disabled. - * This parameter can be: - * @arg RTC_IT_TS: TimeStamp interrupt - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified RTC TimeStamp interrupt has occurred or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC TimeStamp interrupt source to check. - * This parameter can be: - * @arg RTC_IT_TS: TimeStamp interrupt - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4)) != RESET) ? SET : RESET) - -/** - * @brief Check whether the specified RTC Time Stamp interrupt is enabled or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Time Stamp interrupt source to check. - * This parameter can be: - * @arg RTC_IT_TS: TimeStamp interrupt - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET) - -/** - * @brief Get the selected RTC TimeStamp's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC TimeStamp Flag is pending or not. - * This parameter can be: - * @arg RTC_FLAG_TSF - * @arg RTC_FLAG_TSOVF - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Clear the RTC Time Stamp's pending flags. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Alarm Flag sources to clear. - * This parameter can be: - * @arg RTC_FLAG_TSF - * @arg RTC_FLAG_TSOVF - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) - -/** - * @brief Enable the RTC internal TimeStamp peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_INTERNAL_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ITSE)) - -/** - * @brief Disable the RTC internal TimeStamp peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_INTERNAL_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ITSE)) - -/** - * @brief Get the selected RTC Internal Time Stamp's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Internal Time Stamp Flag is pending or not. - * This parameter can be: - * @arg RTC_FLAG_ITSF - * @retval None - */ -#define __HAL_RTC_INTERNAL_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Clear the RTC Internal Time Stamp's pending flags. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Internal Time Stamp Flag source to clear. - * This parameter can be: - * @arg RTC_FLAG_ITSF - * @retval None - */ -#define __HAL_RTC_INTERNAL_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) - -/** - * @brief Enable the RTC calibration output. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_COE)) - -/** - * @brief Disable the calibration output. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_COE)) - -/** - * @brief Enable the clock reference detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_REFCKON)) - -/** - * @brief Disable the clock reference detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_REFCKON)) - -/** - * @brief Get the selected RTC shift operation's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC shift operation Flag is pending or not. - * This parameter can be: - * @arg RTC_FLAG_SHPF - * @retval None - */ -#define __HAL_RTC_SHIFT_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Enable interrupt on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Disable interrupt on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT)) - -/** - * @brief Enable event on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Disable event on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT)) - -/** - * @brief Enable falling edge trigger on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Disable falling edge trigger on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT)) - -/** - * @brief Enable rising edge trigger on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Disable rising edge trigger on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT)) - -/** - * @brief Enable rising & falling edge trigger on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable rising & falling edge trigger on the RTC WakeUp Timer associated Exti line. - * This parameter can be: - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Check whether the RTC WakeUp Timer associated Exti line interrupt flag is set or not. - * @retval Line Status. - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Clear the RTC WakeUp Timer associated Exti line flag. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR1 = RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Generate a Software interrupt on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Enable interrupt on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT() (EXTI->IMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Disable interrupt on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI->IMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)) - -/** - * @brief Enable event on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Disable event on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)) - -/** - * @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Disable falling edge trigger on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)) - -/** - * @brief Enable rising edge trigger on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Disable rising edge trigger on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)) - -/** - * @brief Enable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line. - * This parameter can be: - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Check whether the RTC Tamper and Timestamp associated Exti line interrupt flag is set or not. - * @retval Line Status. - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI->PR1 & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Clear the RTC Tamper and Timestamp associated Exti line flag. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG() (EXTI->PR1 = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Generate a Software interrupt on the RTC Tamper and Timestamp associated Exti line - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup RTCEx_Exported_Functions - * @{ - */ - -/* RTC TimeStamp and Tamper functions *****************************************/ -/** @addtogroup RTCEx_Exported_Functions_Group1 - * @{ - */ -HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin); -HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin); -HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_SetInternalTimeStamp(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTimeStamp(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format); - -HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper); -HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper); -HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper); -void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc); - -#if defined(RTC_TAMPER1_SUPPORT) -void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc); -#endif /* RTC_TAMPER1_SUPPORT */ -void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc); -#if defined(RTC_TAMPER3_SUPPORT) -void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc); -#endif /* RTC_TAMPER3_SUPPORT */ -void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -#if defined(RTC_TAMPER1_SUPPORT) -HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -#endif /* RTC_TAMPER1_SUPPORT */ -HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -#if defined(RTC_TAMPER3_SUPPORT) -HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -#endif /* RTC_TAMPER3_SUPPORT */ -/** - * @} - */ - -/* RTC Wake-up functions ******************************************************/ -/** @addtogroup RTCEx_Exported_Functions_Group2 - * @{ - */ -HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock); -HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock); -uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc); -uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc); -void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc); -void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -/** - * @} - */ - -/* Extended Control functions ************************************************/ -/** @addtogroup RTCEx_Exported_Functions_Group3 - * @{ - */ -void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data); -uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister); - -HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue); -HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS); -HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc, uint32_t CalibOutput); -HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc); -/** - * @} - */ - -/* Extended RTC features functions *******************************************/ -/** @addtogroup RTCEx_Exported_Functions_Group4 - * @{ - */ -void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** @defgroup RTCEx_Private_Constants RTCEx Private Constants - * @{ - */ -#define RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT ((uint32_t)0x00080000) /*!< External interrupt line 19 Connected to the RTC Tamper and Time Stamp events */ -#define RTC_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)0x00100000) /*!< External interrupt line 20 Connected to the RTC Wakeup event */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup RTCEx_Private_Macros RTCEx Private Macros - * @{ - */ - -/** @defgroup RTCEx_IS_RTC_Definitions Private macros to check input parameters - * @{ - */ - -#define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_OUTPUT_DISABLE) || \ - ((OUTPUT) == RTC_OUTPUT_ALARMA) || \ - ((OUTPUT) == RTC_OUTPUT_ALARMB) || \ - ((OUTPUT) == RTC_OUTPUT_WAKEUP)) - -#define IS_RTC_BKP(BKP) ((BKP) < (uint32_t) RTC_BKP_NUMBER) - -#define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) || \ - ((EDGE) == RTC_TIMESTAMPEDGE_FALLING)) - -#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & (uint32_t)0xFFFFFFD6) == 0x00) && ((TAMPER) != (uint32_t)RESET)) - -#define IS_RTC_TAMPER_INTERRUPT(INTERRUPT) ((((INTERRUPT) & (uint32_t)0xFFB6FFFB) == 0x00) && ((INTERRUPT) != (uint32_t)RESET)) - -#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_DEFAULT)) - -#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \ - ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE) || \ - ((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) || \ - ((TRIGGER) == RTC_TAMPERTRIGGER_HIGHLEVEL)) - -#define IS_RTC_TAMPER_ERASE_MODE(MODE) (((MODE) == RTC_TAMPER_ERASE_BACKUP_ENABLE) || \ - ((MODE) == RTC_TAMPER_ERASE_BACKUP_DISABLE)) - -#define IS_RTC_TAMPER_MASKFLAG_STATE(STATE) (((STATE) == RTC_TAMPERMASK_FLAG_ENABLE) || \ - ((STATE) == RTC_TAMPERMASK_FLAG_DISABLE)) - -#define IS_RTC_TAMPER_FILTER(FILTER) (((FILTER) == RTC_TAMPERFILTER_DISABLE) || \ - ((FILTER) == RTC_TAMPERFILTER_2SAMPLE) || \ - ((FILTER) == RTC_TAMPERFILTER_4SAMPLE) || \ - ((FILTER) == RTC_TAMPERFILTER_8SAMPLE)) - -#define IS_RTC_TAMPER_SAMPLING_FREQ(FREQ) (((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768)|| \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384)|| \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192) || \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096) || \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048) || \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024) || \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512) || \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256)) - -#define IS_RTC_TAMPER_PRECHARGE_DURATION(DURATION) (((DURATION) == RTC_TAMPERPRECHARGEDURATION_1RTCCLK) || \ - ((DURATION) == RTC_TAMPERPRECHARGEDURATION_2RTCCLK) || \ - ((DURATION) == RTC_TAMPERPRECHARGEDURATION_4RTCCLK) || \ - ((DURATION) == RTC_TAMPERPRECHARGEDURATION_8RTCCLK)) - -#define IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(DETECTION) (((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_ENABLE) || \ - ((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_DISABLE)) - -#define IS_RTC_TAMPER_PULLUP_STATE(STATE) (((STATE) == RTC_TAMPER_PULLUP_ENABLE) || \ - ((STATE) == RTC_TAMPER_PULLUP_DISABLE)) - -#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV16) || \ - ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV8) || \ - ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV4) || \ - ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV2) || \ - ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_16BITS) || \ - ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_17BITS)) - -#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= 0xFFFF) - -#define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SMOOTHCALIB_PERIOD_32SEC) || \ - ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_16SEC) || \ - ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_8SEC)) - -#define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_SET) || \ - ((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_RESET)) - -#define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= 0x000001FF) - -#define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_SHIFTADD1S_RESET) || \ - ((SEL) == RTC_SHIFTADD1S_SET)) - -#define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= 0x00007FFF) - -#define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CALIBOUTPUT_512HZ) || \ - ((OUTPUT) == RTC_CALIBOUTPUT_1HZ)) - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RTC_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h deleted file mode 100644 index bfc0194b..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h +++ /dev/null @@ -1,2043 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim.h - * @author MCD Application Team - * @brief Header file of TIM HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_TIM_H -#define __STM32L4xx_HAL_TIM_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup TIM - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup TIM_Exported_Types TIM Exported Types - * @{ - */ - -/** - * @brief TIM Time base Configuration Structure definition - */ -typedef struct -{ - uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t CounterMode; /*!< Specifies the counter mode. - This parameter can be a value of @ref TIM_Counter_Mode */ - - uint32_t Period; /*!< Specifies the period value to be loaded into the active - Auto-Reload Register at the next update event. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ - - uint32_t ClockDivision; /*!< Specifies the clock division. - This parameter can be a value of @ref TIM_ClockDivision */ - - uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter - reaches zero, an update event is generated and counting restarts - from the RCR value (N). - This means in PWM mode that (N+1) corresponds to: - - the number of PWM periods in edge-aligned mode - - the number of half PWM period in center-aligned mode - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t AutoReloadPreload; /*!< Specifies the auto-reload preload. - This parameter can be a value of @ref TIM_AutoReloadPreload */ -} TIM_Base_InitTypeDef; - -/** - * @brief TIM Output Compare Configuration Structure definition - */ -typedef struct -{ - uint32_t OCMode; /*!< Specifies the TIM mode. - This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ - - uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t OCPolarity; /*!< Specifies the output polarity. - This parameter can be a value of @ref TIM_Output_Compare_Polarity */ - - uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. - This parameter can be a value of @ref TIM_Output_Compare_N_Polarity - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCFastMode; /*!< Specifies the Fast mode state. - This parameter can be a value of @ref TIM_Output_Fast_State - @note This parameter is valid only in PWM1 and PWM2 mode. */ - - - uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ -} TIM_OC_InitTypeDef; - -/** - * @brief TIM One Pulse Mode Configuration Structure definition - */ -typedef struct -{ - uint32_t OCMode; /*!< Specifies the TIM mode. - This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ - - uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t OCPolarity; /*!< Specifies the output polarity. - This parameter can be a value of @ref TIM_Output_Compare_Polarity */ - - uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. - This parameter can be a value of @ref TIM_Output_Compare_N_Polarity - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t ICSelection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t ICFilter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -} TIM_OnePulse_InitTypeDef; - - -/** - * @brief TIM Input Capture Configuration Structure definition - */ -typedef struct -{ - uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t ICSelection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t ICFilter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -} TIM_IC_InitTypeDef; - -/** - * @brief TIM Encoder Configuration Structure definition - */ -typedef struct -{ - uint32_t EncoderMode; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Encoder_Mode */ - - uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t IC1Selection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t IC1Filter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - - uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t IC2Selection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t IC2Filter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -} TIM_Encoder_InitTypeDef; - - -/** - * @brief Clock Configuration Handle Structure definition - */ -typedef struct -{ - uint32_t ClockSource; /*!< TIM clock sources - This parameter can be a value of @ref TIM_Clock_Source */ - uint32_t ClockPolarity; /*!< TIM clock polarity - This parameter can be a value of @ref TIM_Clock_Polarity */ - uint32_t ClockPrescaler; /*!< TIM clock prescaler - This parameter can be a value of @ref TIM_Clock_Prescaler */ - uint32_t ClockFilter; /*!< TIM clock filter - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -}TIM_ClockConfigTypeDef; - -/** - * @brief Clear Input Configuration Handle Structure definition - */ -typedef struct -{ - uint32_t ClearInputState; /*!< TIM clear Input state - This parameter can be ENABLE or DISABLE */ - uint32_t ClearInputSource; /*!< TIM clear Input sources - This parameter can be a value of @ref TIM_ClearInput_Source */ - uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity - This parameter can be a value of @ref TIM_ClearInput_Polarity */ - uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler - This parameter can be a value of @ref TIM_ClearInput_Prescaler */ - uint32_t ClearInputFilter; /*!< TIM Clear Input filter - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -}TIM_ClearInputConfigTypeDef; - -/** - * @brief TIM Master configuration Structure definition - * @note Advanced timers provide TRGO2 internal line which is redirected - * to the ADC - */ -typedef struct { - uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection - This parameter can be a value of @ref TIM_Master_Mode_Selection */ - uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection - This parameter can be a value of @ref TIM_Master_Mode_Selection_2 */ - uint32_t MasterSlaveMode; /*!< Master/slave mode selection - This parameter can be a value of @ref TIM_Master_Slave_Mode */ -}TIM_MasterConfigTypeDef; - -/** - * @brief TIM Slave configuration Structure definition - */ -typedef struct { - uint32_t SlaveMode; /*!< Slave mode selection - This parameter can be a value of @ref TIM_Slave_Mode */ - uint32_t InputTrigger; /*!< Input Trigger source - This parameter can be a value of @ref TIM_Trigger_Selection */ - uint32_t TriggerPolarity; /*!< Input Trigger polarity - This parameter can be a value of @ref TIM_Trigger_Polarity */ - uint32_t TriggerPrescaler; /*!< Input trigger prescaler - This parameter can be a value of @ref TIM_Trigger_Prescaler */ - uint32_t TriggerFilter; /*!< Input trigger filter - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - -}TIM_SlaveConfigTypeDef; - -/** - * @brief TIM Break input(s) and Dead time configuration Structure definition - * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable - * filter and polarity. - */ -typedef struct -{ - uint32_t OffStateRunMode; /*!< TIM off state in run mode - This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ - uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode - This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ - uint32_t LockLevel; /*!< TIM Lock level - This parameter can be a value of @ref TIM_Lock_level */ - uint32_t DeadTime; /*!< TIM dead Time - This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ - uint32_t BreakState; /*!< TIM Break State - This parameter can be a value of @ref TIM_Break_Input_enable_disable */ - uint32_t BreakPolarity; /*!< TIM Break input polarity - This parameter can be a value of @ref TIM_Break_Polarity */ - uint32_t BreakFilter; /*!< Specifies the break input filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - uint32_t Break2State; /*!< TIM Break2 State - This parameter can be a value of @ref TIM_Break2_Input_enable_disable */ - uint32_t Break2Polarity; /*!< TIM Break2 input polarity - This parameter can be a value of @ref TIM_Break2_Polarity */ - uint32_t Break2Filter; /*!< TIM break2 input filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state - This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ -} TIM_BreakDeadTimeConfigTypeDef; - -/** - * @brief HAL State structures definition - */ -typedef enum -{ - HAL_TIM_STATE_RESET = 0x00, /*!< Peripheral not yet initialized or disabled */ - HAL_TIM_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ - HAL_TIM_STATE_BUSY = 0x02, /*!< An internal process is ongoing */ - HAL_TIM_STATE_TIMEOUT = 0x03, /*!< Timeout state */ - HAL_TIM_STATE_ERROR = 0x04 /*!< Reception process is ongoing */ -}HAL_TIM_StateTypeDef; - -/** - * @brief HAL Active channel structures definition - */ -typedef enum -{ - HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /*!< The active channel is 1 */ - HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /*!< The active channel is 2 */ - HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /*!< The active channel is 3 */ - HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /*!< The active channel is 4 */ - HAL_TIM_ACTIVE_CHANNEL_5 = 0x10, /*!< The active channel is 5 */ - HAL_TIM_ACTIVE_CHANNEL_6 = 0x20, /*!< The active channel is 6 */ - HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /*!< All active channels cleared */ -}HAL_TIM_ActiveChannel; - -/** - * @brief TIM Time Base Handle Structure definition - */ -typedef struct -{ - TIM_TypeDef *Instance; /*!< Register base address */ - TIM_Base_InitTypeDef Init; /*!< TIM Time Base required parameters */ - HAL_TIM_ActiveChannel Channel; /*!< Active channel */ - DMA_HandleTypeDef *hdma[7]; /*!< DMA Handlers array - This array is accessed by a @ref DMA_Handle_index */ - HAL_LockTypeDef Lock; /*!< Locking object */ - __IO HAL_TIM_StateTypeDef State; /*!< TIM operation state */ -}TIM_HandleTypeDef; - -/** - * @} - */ -/* End of exported types -----------------------------------------------------*/ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup TIM_Exported_Constants TIM Exported Constants - * @{ - */ - -/** @defgroup TIM_ClearInput_Source TIM Clear Input Source - * @{ - */ -#define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001) -#define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002) -#define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_DMA_Base_address TIM DMA Base Address - * @{ - */ -#define TIM_DMABASE_CR1 (0x00000000) -#define TIM_DMABASE_CR2 (0x00000001) -#define TIM_DMABASE_SMCR (0x00000002) -#define TIM_DMABASE_DIER (0x00000003) -#define TIM_DMABASE_SR (0x00000004) -#define TIM_DMABASE_EGR (0x00000005) -#define TIM_DMABASE_CCMR1 (0x00000006) -#define TIM_DMABASE_CCMR2 (0x00000007) -#define TIM_DMABASE_CCER (0x00000008) -#define TIM_DMABASE_CNT (0x00000009) -#define TIM_DMABASE_PSC (0x0000000A) -#define TIM_DMABASE_ARR (0x0000000B) -#define TIM_DMABASE_RCR (0x0000000C) -#define TIM_DMABASE_CCR1 (0x0000000D) -#define TIM_DMABASE_CCR2 (0x0000000E) -#define TIM_DMABASE_CCR3 (0x0000000F) -#define TIM_DMABASE_CCR4 (0x00000010) -#define TIM_DMABASE_BDTR (0x00000011) -#define TIM_DMABASE_DCR (0x00000012) -#define TIM_DMABASE_DMAR (0x00000013) -#define TIM_DMABASE_OR1 (0x00000014) -#define TIM_DMABASE_CCMR3 (0x00000015) -#define TIM_DMABASE_CCR5 (0x00000016) -#define TIM_DMABASE_CCR6 (0x00000017) -#define TIM_DMABASE_OR2 (0x00000018) -#define TIM_DMABASE_OR3 (0x00000019) -/** - * @} - */ - -/** @defgroup TIM_Event_Source TIM Extended Event Source - * @{ - */ -#define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */ -#define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */ -#define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */ -#define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */ -#define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */ -#define TIM_EVENTSOURCE_COM TIM_EGR_COMG /*!< A commutation event is generated */ -#define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /*!< A trigger event is generated */ -#define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /*!< A break event is generated */ -#define TIM_EVENTSOURCE_BREAK2 TIM_EGR_B2G /*!< A break 2 event is generated */ -/** - * @} - */ - -/** @defgroup TIM_Input_Channel_Polarity TIM Input Channel polarity - * @{ - */ -#define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /*!< Polarity for TIx source */ -#define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /*!< Polarity for TIx source */ -#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for TIx source */ -/** - * @} - */ - -/** @defgroup TIM_ETR_Polarity TIM ETR Polarity - * @{ - */ -#define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /*!< Polarity for ETR source */ -#define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /*!< Polarity for ETR source */ -/** - * @} - */ - -/** @defgroup TIM_ETR_Prescaler TIM ETR Prescaler - * @{ - */ -#define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /*!< No prescaler is used */ -#define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /*!< ETR input source is divided by 2 */ -#define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /*!< ETR input source is divided by 4 */ -#define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /*!< ETR input source is divided by 8 */ -/** - * @} - */ - -/** @defgroup TIM_Counter_Mode TIM Counter Mode - * @{ - */ -#define TIM_COUNTERMODE_UP ((uint32_t)0x0000) -#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR -#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0 -#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1 -#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS -/** - * @} - */ - -/** @defgroup TIM_ClockDivision TIM Clock Division - * @{ - */ -#define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000) -#define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0) -#define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1) -/** - * @} - */ - -/** @defgroup TIM_AutoReloadPreload TIM Auto-Reload Preload - * @{ - */ -#define TIM_AUTORELOAD_PRELOAD_DISABLE ((uint32_t)0x0000) /*!< TIMx_ARR register is not buffered */ -#define TIM_AUTORELOAD_PRELOAD_ENABLE (TIM_CR1_ARPE) /*!< TIMx_ARR register is buffered */ -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_State TIM Output Compare State - * @{ - */ -#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000) -#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_State TIM Complementary Output Compare State - * @{ - */ -#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000) -#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE) -/** - * @} - */ - -/** @defgroup TIM_Output_Fast_State TIM Output Fast State - * @{ - */ -#define TIM_OCFAST_DISABLE ((uint32_t)0x0000) -#define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Polarity TIM Output Compare Polarity - * @{ - */ -#define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000) -#define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_Polarity TIM Complementary Output Compare Polarity - * @{ - */ -#define TIM_OCNPOLARITY_HIGH ((uint32_t)0x0000) -#define TIM_OCNPOLARITY_LOW (TIM_CCER_CC1NP) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Idle_State TIM Output Compare Idle State - * @{ - */ -#define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1) -#define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_Idle_State TIM Complementary Output Compare Idle State - * @{ - */ -#define TIM_OCNIDLESTATE_SET (TIM_CR2_OIS1N) -#define TIM_OCNIDLESTATE_RESET ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity - * @{ - */ -#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING -#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING -#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection - * @{ - */ -#define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC1, IC2, IC3 or IC4, respectively */ -#define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC2, IC1, IC4 or IC3, respectively */ -#define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC */ -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Prescaler TIM Input Capture Prescaler - * @{ - */ -#define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input */ -#define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /*!< Capture performed once every 2 events */ -#define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /*!< Capture performed once every 4 events */ -#define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /*!< Capture performed once every 8 events */ -/** - * @} - */ - -/** @defgroup TIM_One_Pulse_Mode TIM One Pulse Mode - * @{ - */ -#define TIM_OPMODE_SINGLE (TIM_CR1_OPM) -#define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Encoder_Mode TIM Encoder Mode - * @{ - */ -#define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0) -#define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1) -#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0) -/** - * @} - */ - -/** @defgroup TIM_Interrupt_definition TIM interrupt Definition - * @{ - */ -#define TIM_IT_UPDATE (TIM_DIER_UIE) -#define TIM_IT_CC1 (TIM_DIER_CC1IE) -#define TIM_IT_CC2 (TIM_DIER_CC2IE) -#define TIM_IT_CC3 (TIM_DIER_CC3IE) -#define TIM_IT_CC4 (TIM_DIER_CC4IE) -#define TIM_IT_COM (TIM_DIER_COMIE) -#define TIM_IT_TRIGGER (TIM_DIER_TIE) -#define TIM_IT_BREAK (TIM_DIER_BIE) -/** - * @} - */ - -/** @defgroup TIM_Commutation_Source TIM Commutation Source - * @{ - */ -#define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS) -#define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_DMA_sources TIM DMA Sources - * @{ - */ -#define TIM_DMA_UPDATE (TIM_DIER_UDE) -#define TIM_DMA_CC1 (TIM_DIER_CC1DE) -#define TIM_DMA_CC2 (TIM_DIER_CC2DE) -#define TIM_DMA_CC3 (TIM_DIER_CC3DE) -#define TIM_DMA_CC4 (TIM_DIER_CC4DE) -#define TIM_DMA_COM (TIM_DIER_COMDE) -#define TIM_DMA_TRIGGER (TIM_DIER_TDE) -/** - * @} - */ - -/** @defgroup TIM_Flag_definition TIM Flag Definition - * @{ - */ -#define TIM_FLAG_UPDATE (TIM_SR_UIF) -#define TIM_FLAG_CC1 (TIM_SR_CC1IF) -#define TIM_FLAG_CC2 (TIM_SR_CC2IF) -#define TIM_FLAG_CC3 (TIM_SR_CC3IF) -#define TIM_FLAG_CC4 (TIM_SR_CC4IF) -#define TIM_FLAG_CC5 (TIM_SR_CC5IF) -#define TIM_FLAG_CC6 (TIM_SR_CC6IF) -#define TIM_FLAG_COM (TIM_SR_COMIF) -#define TIM_FLAG_TRIGGER (TIM_SR_TIF) -#define TIM_FLAG_BREAK (TIM_SR_BIF) -#define TIM_FLAG_BREAK2 (TIM_SR_B2IF) -#define TIM_FLAG_SYSTEM_BREAK (TIM_SR_SBIF) -#define TIM_FLAG_CC1OF (TIM_SR_CC1OF) -#define TIM_FLAG_CC2OF (TIM_SR_CC2OF) -#define TIM_FLAG_CC3OF (TIM_SR_CC3OF) -#define TIM_FLAG_CC4OF (TIM_SR_CC4OF) -/** - * @} - */ - -/** @defgroup TIM_Channel TIM Channel - * @{ - */ -#define TIM_CHANNEL_1 ((uint32_t)0x0000) -#define TIM_CHANNEL_2 ((uint32_t)0x0004) -#define TIM_CHANNEL_3 ((uint32_t)0x0008) -#define TIM_CHANNEL_4 ((uint32_t)0x000C) -#define TIM_CHANNEL_5 ((uint32_t)0x0010) -#define TIM_CHANNEL_6 ((uint32_t)0x0014) -#define TIM_CHANNEL_ALL ((uint32_t)0x003C) -/** - * @} - */ - -/** @defgroup TIM_Clock_Source TIM Clock Source - * @{ - */ -#define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1) -#define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0) -#define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000) -#define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0) -#define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1) -#define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1) -#define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2) -#define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 | TIM_SMCR_TS_2) -#define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 | TIM_SMCR_TS_2) -#define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS) -/** - * @} - */ - -/** @defgroup TIM_Clock_Polarity TIM Clock Polarity - * @{ - */ -#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx clock sources */ -#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx clock sources */ -#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIx clock sources */ -#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIx clock sources */ -#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIx clock sources */ -/** - * @} - */ - -/** @defgroup TIM_Clock_Prescaler TIM Clock Prescaler - * @{ - */ -#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ -#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Clock: Capture performed once every 2 events. */ -#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Clock: Capture performed once every 4 events. */ -#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Clock: Capture performed once every 8 events. */ -/** - * @} - */ - -/** @defgroup TIM_ClearInput_Polarity TIM Clear Input Polarity - * @{ - */ -#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */ -#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx pin */ -/** - * @} - */ - -/** @defgroup TIM_ClearInput_Prescaler TIM Clear Input Prescaler - * @{ - */ -#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ -#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */ -#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */ -#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */ -/** - * @} - */ - -/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM OSSR OffState Selection for Run mode state - * @{ - */ -#define TIM_OSSR_ENABLE (TIM_BDTR_OSSR) -#define TIM_OSSR_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM OSSI OffState Selection for Idle mode state - * @{ - */ -#define TIM_OSSI_ENABLE (TIM_BDTR_OSSI) -#define TIM_OSSI_DISABLE ((uint32_t)0x0000) -/** - * @} - */ -/** @defgroup TIM_Lock_level TIM Lock level - * @{ - */ -#define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000) -#define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0) -#define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1) -#define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK) -/** - * @} - */ - -/** @defgroup TIM_Break_Input_enable_disable TIM Break Input Enable - * @{ - */ -#define TIM_BREAK_ENABLE (TIM_BDTR_BKE) -#define TIM_BREAK_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Break_Polarity TIM Break Input Polarity - * @{ - */ -#define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000) -#define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP) -/** - * @} - */ - -/** @defgroup TIM_Break2_Input_enable_disable TIM Break input 2 Enable - * @{ - */ -#define TIM_BREAK2_DISABLE ((uint32_t)0x00000000) -#define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E) -/** - * @} - */ - -/** @defgroup TIM_Break2_Polarity TIM Break Input 2 Polarity - * @{ - */ -#define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000) -#define TIM_BREAK2POLARITY_HIGH ((uint32_t)TIM_BDTR_BK2P) -/** - * @} - */ - -/** @defgroup TIM_AOE_Bit_Set_Reset TIM Automatic Output Enable - * @{ - */ -#define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE) -#define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3 - * @{ - */ -#define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */ -#define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */ -#define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */ -#define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */ -/** - * @} - */ - -/** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection - * @{ - */ -#define TIM_TRGO_RESET ((uint32_t)0x0000) -#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0) -#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1) -#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0)) -#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2) -#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0)) -#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1)) -#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0)) -/** - * @} - */ - -/** @defgroup TIM_Master_Mode_Selection_2 TIM Master Mode Selection 2 (TRGO2) - * @{ - */ -#define TIM_TRGO2_RESET ((uint32_t)0x00000000) -#define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0)) -#define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2)) -#define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3)) -#define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2)) -#define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -/** - * @} - */ - -/** @defgroup TIM_Master_Slave_Mode TIM Master/Slave Mode - * @{ - */ -#define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080) -#define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Slave_Mode TIM Slave mode - * @{ - */ -#define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000) -#define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2)) -#define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)) -#define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)) -#define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)) -#define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_and_PWM_modes TIM Output Compare and PWM Modes - * @{ - */ -#define TIM_OCMODE_TIMING ((uint32_t)0x0000) -#define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1) -#define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) -#define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2) - -#define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3) -#define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) -#define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2) -#define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) -#define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M) -/** - * @} - */ - -/** @defgroup TIM_Trigger_Selection TIM Trigger Selection - * @{ - */ -#define TIM_TS_ITR0 ((uint32_t)0x0000) -#define TIM_TS_ITR1 ((uint32_t)0x0010) -#define TIM_TS_ITR2 ((uint32_t)0x0020) -#define TIM_TS_ITR3 ((uint32_t)0x0030) -#define TIM_TS_TI1F_ED ((uint32_t)0x0040) -#define TIM_TS_TI1FP1 ((uint32_t)0x0050) -#define TIM_TS_TI2FP2 ((uint32_t)0x0060) -#define TIM_TS_ETRF ((uint32_t)0x0070) -#define TIM_TS_NONE ((uint32_t)0xFFFF) -/** - * @} - */ - -/** @defgroup TIM_Trigger_Polarity TIM Trigger Polarity - * @{ - */ -#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx trigger sources */ -#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx trigger sources */ -#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIxFPx or TI1_ED trigger sources */ -#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIxFPx or TI1_ED trigger sources */ -#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIxFPx or TI1_ED trigger sources */ -/** - * @} - */ - -/** @defgroup TIM_Trigger_Prescaler TIM Trigger Prescaler - * @{ - */ -#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ -#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Trigger: Capture performed once every 2 events. */ -#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Trigger: Capture performed once every 4 events. */ -#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Trigger: Capture performed once every 8 events. */ -/** - * @} - */ - -/** @defgroup TIM_TI1_Selection TIM TI1 Input Selection - * @{ - */ -#define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000) -#define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S) -/** - * @} - */ - -/** @defgroup TIM_DMA_Burst_Length TIM DMA Burst Length - * @{ - */ -#define TIM_DMABURSTLENGTH_1TRANSFER (0x00000000) -#define TIM_DMABURSTLENGTH_2TRANSFERS (0x00000100) -#define TIM_DMABURSTLENGTH_3TRANSFERS (0x00000200) -#define TIM_DMABURSTLENGTH_4TRANSFERS (0x00000300) -#define TIM_DMABURSTLENGTH_5TRANSFERS (0x00000400) -#define TIM_DMABURSTLENGTH_6TRANSFERS (0x00000500) -#define TIM_DMABURSTLENGTH_7TRANSFERS (0x00000600) -#define TIM_DMABURSTLENGTH_8TRANSFERS (0x00000700) -#define TIM_DMABURSTLENGTH_9TRANSFERS (0x00000800) -#define TIM_DMABURSTLENGTH_10TRANSFERS (0x00000900) -#define TIM_DMABURSTLENGTH_11TRANSFERS (0x00000A00) -#define TIM_DMABURSTLENGTH_12TRANSFERS (0x00000B00) -#define TIM_DMABURSTLENGTH_13TRANSFERS (0x00000C00) -#define TIM_DMABURSTLENGTH_14TRANSFERS (0x00000D00) -#define TIM_DMABURSTLENGTH_15TRANSFERS (0x00000E00) -#define TIM_DMABURSTLENGTH_16TRANSFERS (0x00000F00) -#define TIM_DMABURSTLENGTH_17TRANSFERS (0x00001000) -#define TIM_DMABURSTLENGTH_18TRANSFERS (0x00001100) -/** - * @} - */ - -/** @defgroup DMA_Handle_index TIM DMA Handle Index - * @{ - */ -#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /*!< Index of the DMA handle used for Update DMA requests */ -#define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /*!< Index of the DMA handle used for Capture/Compare 1 DMA requests */ -#define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /*!< Index of the DMA handle used for Capture/Compare 2 DMA requests */ -#define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /*!< Index of the DMA handle used for Capture/Compare 3 DMA requests */ -#define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /*!< Index of the DMA handle used for Capture/Compare 4 DMA requests */ -#define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x5) /*!< Index of the DMA handle used for Commutation DMA requests */ -#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /*!< Index of the DMA handle used for Trigger DMA requests */ -/** - * @} - */ - -/** @defgroup Channel_CC_State TIM Capture/Compare Channel State - * @{ - */ -#define TIM_CCx_ENABLE ((uint32_t)0x0001) -#define TIM_CCx_DISABLE ((uint32_t)0x0000) -#define TIM_CCxN_ENABLE ((uint32_t)0x0004) -#define TIM_CCxN_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Break_System TIM Break System - * @{ - */ -#define TIM_BREAK_SYSTEM_ECC SYSCFG_CFGR2_ECCL /*!< Enables and locks the ECC error signal with Break Input of TIM1/8/15/16/17 */ -#define TIM_BREAK_SYSTEM_PVD SYSCFG_CFGR2_PVDL /*!< Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVDE and PLS bits of the Power Control Interface */ -#define TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR SYSCFG_CFGR2_SPL /*!< Enables and locks the SRAM2_PARITY error signal with Break Input of TIM1/8/15/16/17 */ -#define TIM_BREAK_SYSTEM_LOCKUP SYSCFG_CFGR2_CLL /*!< Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/15/16/17 */ -/** - * @} - */ - -/** - * @} - */ -/* End of exported constants -------------------------------------------------*/ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup TIM_Exported_Macros TIM Exported Macros - * @{ - */ - -/** @brief Reset TIM handle state. - * @param __HANDLE__ TIM handle. - * @retval None - */ -#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET) - -/** - * @brief Enable the TIM peripheral. - * @param __HANDLE__ TIM handle - * @retval None - */ -#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN)) - -/** - * @brief Enable the TIM main Output. - * @param __HANDLE__ TIM handle - * @retval None - */ -#define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR|=(TIM_BDTR_MOE)) - -/** - * @brief Disable the TIM peripheral. - * @param __HANDLE__ TIM handle - * @retval None - */ -#define __HAL_TIM_DISABLE(__HANDLE__) \ - do { \ - if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \ - { \ - if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \ - { \ - (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \ - } \ - } \ - } while(0) - -/** - * @brief Disable the TIM main Output. - * @param __HANDLE__ TIM handle - * @retval None - * @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been disabled - */ -#define __HAL_TIM_MOE_DISABLE(__HANDLE__) \ - do { \ - if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \ - { \ - if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \ - { \ - (__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \ - } \ - } \ - } while(0) - -/** - * @brief Disable the TIM main Output. - * @param __HANDLE__ TIM handle - * @retval None - * @note The Main Output Enable of a timer instance is disabled unconditionally - */ -#define __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY(__HANDLE__) (__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE) - -/** @brief Enable the specified TIM interrupt. - * @param __HANDLE__ specifies the TIM Handle. - * @param __INTERRUPT__ specifies the TIM interrupt source to enable. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval None - */ -#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__)) - - -/** @brief Disable the specified TIM interrupt. - * @param __HANDLE__ specifies the TIM Handle. - * @param __INTERRUPT__ specifies the TIM interrupt source to disable. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval None - */ -#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__)) - -/** @brief Enable the specified DMA request. - * @param __HANDLE__ specifies the TIM Handle. - * @param __DMA__ specifies the TIM DMA request to enable. - * This parameter can be one of the following values: - * @arg TIM_DMA_UPDATE: Update DMA request - * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request - * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request - * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request - * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request - * @arg TIM_DMA_COM: Commutation DMA request - * @arg TIM_DMA_TRIGGER: Trigger DMA request - * @retval None - */ -#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__)) - -/** @brief Disable the specified DMA request. - * @param __HANDLE__ specifies the TIM Handle. - * @param __DMA__ specifies the TIM DMA request to disable. - * This parameter can be one of the following values: - * @arg TIM_DMA_UPDATE: Update DMA request - * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request - * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request - * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request - * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request - * @arg TIM_DMA_COM: Commutation DMA request - * @arg TIM_DMA_TRIGGER: Trigger DMA request - * @retval None - */ -#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__)) - -/** @brief Check whether the specified TIM interrupt flag is set or not. - * @param __HANDLE__ specifies the TIM Handle. - * @param __FLAG__ specifies the TIM interrupt flag to check. - * This parameter can be one of the following values: - * @arg TIM_FLAG_UPDATE: Update interrupt flag - * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag - * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag - * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag - * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag - * @arg TIM_FLAG_CC5: Compare 5 interrupt flag - * @arg TIM_FLAG_CC6: Compare 6 interrupt flag - * @arg TIM_FLAG_COM: Commutation interrupt flag - * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag - * @arg TIM_FLAG_BREAK: Break interrupt flag - * @arg TIM_FLAG_BREAK2: Break 2 interrupt flag - * @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag - * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag - * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag - * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag - * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__)) - -/** @brief Clear the specified TIM interrupt flag. - * @param __HANDLE__ specifies the TIM Handle. - * @param __FLAG__ specifies the TIM interrupt flag to clear. - * This parameter can be one of the following values: - * @arg TIM_FLAG_UPDATE: Update interrupt flag - * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag - * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag - * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag - * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag - * @arg TIM_FLAG_CC5: Compare 5 interrupt flag - * @arg TIM_FLAG_CC6: Compare 6 interrupt flag - * @arg TIM_FLAG_COM: Commutation interrupt flag - * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag - * @arg TIM_FLAG_BREAK: Break interrupt flag - * @arg TIM_FLAG_BREAK2: Break 2 interrupt flag - * @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag - * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag - * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag - * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag - * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) - -/** - * @brief Check whether the specified TIM interrupt source is enabled or not. - * @param __HANDLE__ TIM handle - * @param __INTERRUPT__ specifies the TIM interrupt source to check. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval The state of TIM_IT (SET or RESET). - */ -#define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) - -/** @brief Clear the TIM interrupt pending bits. - * @param __HANDLE__ TIM handle - * @param __INTERRUPT__ specifies the interrupt pending bit to clear. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval None - */ -#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__)) - -/** - * @brief Indicates whether or not the TIM Counter is used as downcounter. - * @param __HANDLE__ TIM handle. - * @retval False (Counter used as upcounter) or True (Counter used as downcounter) - * @note This macro is particularly useful to get the counting mode when the timer operates in Center-aligned mode or Encoder -mode. - */ -#define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR)) - - -/** - * @brief Set the TIM Prescaler on runtime. - * @param __HANDLE__ TIM handle. - * @param __PRESC__ specifies the Prescaler new value. - * @retval None - */ -#define __HAL_TIM_SET_PRESCALER(__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__)) - -/** - * @brief Set the TIM Counter Register value on runtime. - * @param __HANDLE__ TIM handle. - * @param __COUNTER__ specifies the Counter register new value. - * @retval None - */ -#define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__)) - -/** - * @brief Get the TIM Counter Register value on runtime. - * @param __HANDLE__ TIM handle. - * @retval 16-bit or 32-bit value of the timer counter register (TIMx_CNT) - */ -#define __HAL_TIM_GET_COUNTER(__HANDLE__) \ - ((__HANDLE__)->Instance->CNT) - -/** - * @brief Set the TIM Autoreload Register value on runtime without calling another time any Init function. - * @param __HANDLE__ TIM handle. - * @param __AUTORELOAD__ specifies the Counter register new value. - * @retval None - */ -#define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__) \ - do{ \ - (__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \ - (__HANDLE__)->Init.Period = (__AUTORELOAD__); \ - } while(0) - -/** - * @brief Get the TIM Autoreload Register value on runtime. - * @param __HANDLE__ TIM handle. - * @retval 16-bit or 32-bit value of the timer auto-reload register(TIMx_ARR) - */ -#define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) \ - ((__HANDLE__)->Instance->ARR) - -/** - * @brief Set the TIM Clock Division value on runtime without calling another time any Init function. - * @param __HANDLE__ TIM handle. - * @param __CKD__ specifies the clock division value. - * This parameter can be one of the following value: - * @arg TIM_CLOCKDIVISION_DIV1: tDTS=tCK_INT - * @arg TIM_CLOCKDIVISION_DIV2: tDTS=2*tCK_INT - * @arg TIM_CLOCKDIVISION_DIV4: tDTS=4*tCK_INT - * @retval None - */ -#define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__) \ - do{ \ - (__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \ - (__HANDLE__)->Instance->CR1 |= (__CKD__); \ - (__HANDLE__)->Init.ClockDivision = (__CKD__); \ - } while(0) - -/** - * @brief Get the TIM Clock Division value on runtime. - * @param __HANDLE__ TIM handle. - * @retval The clock division can be one of the following values: - * @arg TIM_CLOCKDIVISION_DIV1: tDTS=tCK_INT - * @arg TIM_CLOCKDIVISION_DIV2: tDTS=2*tCK_INT - * @arg TIM_CLOCKDIVISION_DIV4: tDTS=4*tCK_INT - */ -#define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) \ - ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD) - -/** - * @brief Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel() function. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param __ICPSC__ specifies the Input Capture4 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -#define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__) \ - do{ \ - TIM_RESET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__)); \ - TIM_SET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \ - } while(0) - -/** - * @brief Get the TIM Input Capture prescaler on runtime. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: get input capture 1 prescaler value - * @arg TIM_CHANNEL_2: get input capture 2 prescaler value - * @arg TIM_CHANNEL_3: get input capture 3 prescaler value - * @arg TIM_CHANNEL_4: get input capture 4 prescaler value - * @retval The input capture prescaler can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - */ -#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\ - (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8) - -/** - * @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @param __COMPARE__ specifies the Capture Compare register new value. - * @retval None - */ -#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\ - ((__HANDLE__)->Instance->CCR6 = (__COMPARE__))) - -/** - * @brief Get the TIM Capture Compare Register value on runtime. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channel associated with the capture compare register - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: get capture/compare 1 register value - * @arg TIM_CHANNEL_2: get capture/compare 2 register value - * @arg TIM_CHANNEL_3: get capture/compare 3 register value - * @arg TIM_CHANNEL_4: get capture/compare 4 register value - * @arg TIM_CHANNEL_5: get capture/compare 5 register value - * @arg TIM_CHANNEL_6: get capture/compare 6 register value - * @retval 16-bit or 32-bit value of the capture/compare register (TIMx_CCRy) - */ -#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\ - ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\ - ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\ - ((__HANDLE__)->Instance->CCR6)) - -/** - * @brief Set the TIM Output compare preload. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval None - */ -#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCMR3 |= TIM_CCMR3_OC5PE) :\ - ((__HANDLE__)->Instance->CCMR3 |= TIM_CCMR3_OC6PE)) - -/** - * @brief Reset the TIM Output compare preload. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval None - */ -#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC1PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC2PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC3PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC4PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCMR3 &= (uint16_t)~TIM_CCMR3_OC5PE) :\ - ((__HANDLE__)->Instance->CCMR3 &= (uint16_t)~TIM_CCMR3_OC6PE)) - -/** - * @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register. - * @param __HANDLE__ TIM handle. - * @note When the USR bit of the TIMx_CR1 register is set, only counter - * overflow/underflow generates an update interrupt or DMA request (if - * enabled) - * @retval None - */ -#define __HAL_TIM_URS_ENABLE(__HANDLE__) \ - ((__HANDLE__)->Instance->CR1|= (TIM_CR1_URS)) - -/** - * @brief Reset the Update Request Source (URS) bit of the TIMx_CR1 register. - * @param __HANDLE__ TIM handle. - * @note When the USR bit of the TIMx_CR1 register is reset, any of the - * following events generate an update interrupt or DMA request (if - * enabled): - * _ Counter overflow underflow - * _ Setting the UG bit - * _ Update generation through the slave mode controller - * @retval None - */ -#define __HAL_TIM_URS_DISABLE(__HANDLE__) \ - ((__HANDLE__)->Instance->CR1&=~(TIM_CR1_URS)) - -/** - * @brief Set the TIM Capture x input polarity on runtime. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param __POLARITY__ Polarity for TIx source - * @arg TIM_INPUTCHANNELPOLARITY_RISING: Rising Edge - * @arg TIM_INPUTCHANNELPOLARITY_FALLING: Falling Edge - * @arg TIM_INPUTCHANNELPOLARITY_BOTHEDGE: Rising and Falling Edge - * @retval None - */ -#define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ - do{ \ - TIM_RESET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__)); \ - TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \ - }while(0) - -/** - * @} - */ -/* End of exported macros ----------------------------------------------------*/ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup TIM_Private_Constants TIM Private Constants - * @{ - */ -/* The counter of a timer instance is disabled only if all the CCx and CCxN - channels have been disabled */ -#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E)) -#define TIM_CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) -/** - * @} - */ -/* End of private constants --------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup TIM_Private_Macros TIM Private Macros - * @{ - */ - -#define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ - ((__MODE__) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \ - ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE)) - -#define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ - ((__BASE__) == TIM_DMABASE_CR2) || \ - ((__BASE__) == TIM_DMABASE_SMCR) || \ - ((__BASE__) == TIM_DMABASE_DIER) || \ - ((__BASE__) == TIM_DMABASE_SR) || \ - ((__BASE__) == TIM_DMABASE_EGR) || \ - ((__BASE__) == TIM_DMABASE_CCMR1) || \ - ((__BASE__) == TIM_DMABASE_CCMR2) || \ - ((__BASE__) == TIM_DMABASE_CCER) || \ - ((__BASE__) == TIM_DMABASE_CNT) || \ - ((__BASE__) == TIM_DMABASE_PSC) || \ - ((__BASE__) == TIM_DMABASE_ARR) || \ - ((__BASE__) == TIM_DMABASE_RCR) || \ - ((__BASE__) == TIM_DMABASE_CCR1) || \ - ((__BASE__) == TIM_DMABASE_CCR2) || \ - ((__BASE__) == TIM_DMABASE_CCR3) || \ - ((__BASE__) == TIM_DMABASE_CCR4) || \ - ((__BASE__) == TIM_DMABASE_BDTR) || \ - ((__BASE__) == TIM_DMABASE_CCMR3) || \ - ((__BASE__) == TIM_DMABASE_CCR5) || \ - ((__BASE__) == TIM_DMABASE_CCR6) || \ - ((__BASE__) == TIM_DMABASE_OR1) || \ - ((__BASE__) == TIM_DMABASE_OR2) || \ - ((__BASE__) == TIM_DMABASE_OR3)) - - -#define IS_TIM_EVENT_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFFFE00U) == 0x00000000U) && ((__SOURCE__) != 0x00000000U)) - - -#define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ - ((__MODE__) == TIM_COUNTERMODE_DOWN) || \ - ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \ - ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \ - ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3)) - -#define IS_TIM_CLOCKDIVISION_DIV(__DIV__) (((__DIV__) == TIM_CLOCKDIVISION_DIV1) || \ - ((__DIV__) == TIM_CLOCKDIVISION_DIV2) || \ - ((__DIV__) == TIM_CLOCKDIVISION_DIV4)) - -#define IS_TIM_AUTORELOAD_PRELOAD(PRELOAD) (((PRELOAD) == TIM_AUTORELOAD_PRELOAD_DISABLE) || \ - ((PRELOAD) == TIM_AUTORELOAD_PRELOAD_ENABLE)) - -#define IS_TIM_FAST_STATE(__STATE__) (((__STATE__) == TIM_OCFAST_DISABLE) || \ - ((__STATE__) == TIM_OCFAST_ENABLE)) - -#define IS_TIM_OC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCPOLARITY_HIGH) || \ - ((__POLARITY__) == TIM_OCPOLARITY_LOW)) - -#define IS_TIM_OCN_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCNPOLARITY_HIGH) || \ - ((__POLARITY__) == TIM_OCNPOLARITY_LOW)) - -#define IS_TIM_OCIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCIDLESTATE_SET) || \ - ((__STATE__) == TIM_OCIDLESTATE_RESET)) - -#define IS_TIM_OCNIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCNIDLESTATE_SET) || \ - ((__STATE__) == TIM_OCNIDLESTATE_RESET)) - -#define IS_TIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ICPOLARITY_RISING) || \ - ((__POLARITY__) == TIM_ICPOLARITY_FALLING) || \ - ((__POLARITY__) == TIM_ICPOLARITY_BOTHEDGE)) - -#define IS_TIM_IC_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_ICSELECTION_DIRECTTI) || \ - ((__SELECTION__) == TIM_ICSELECTION_INDIRECTTI) || \ - ((__SELECTION__) == TIM_ICSELECTION_TRC)) - -#define IS_TIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ICPSC_DIV1) || \ - ((__PRESCALER__) == TIM_ICPSC_DIV2) || \ - ((__PRESCALER__) == TIM_ICPSC_DIV4) || \ - ((__PRESCALER__) == TIM_ICPSC_DIV8)) - -#define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \ - ((__MODE__) == TIM_OPMODE_REPETITIVE)) - -#define IS_TIM_ENCODER_MODE(__MODE__) (((__MODE__) == TIM_ENCODERMODE_TI1) || \ - ((__MODE__) == TIM_ENCODERMODE_TI2) || \ - ((__MODE__) == TIM_ENCODERMODE_TI12)) - -#define IS_TIM_DMA_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFF80FFU) == 0x00000000U) && ((__SOURCE__) != 0x00000000U)) - -#define IS_TIM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ - ((__CHANNEL__) == TIM_CHANNEL_2) || \ - ((__CHANNEL__) == TIM_CHANNEL_3) || \ - ((__CHANNEL__) == TIM_CHANNEL_4) || \ - ((__CHANNEL__) == TIM_CHANNEL_5) || \ - ((__CHANNEL__) == TIM_CHANNEL_6) || \ - ((__CHANNEL__) == TIM_CHANNEL_ALL)) - -#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ - ((__CHANNEL__) == TIM_CHANNEL_2)) - -#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ - ((__CHANNEL__) == TIM_CHANNEL_2) || \ - ((__CHANNEL__) == TIM_CHANNEL_3)) - -#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1)) - -#define IS_TIM_CLOCKPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_RISING) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_FALLING) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_BOTHEDGE)) - -#define IS_TIM_CLOCKPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV1) || \ - ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV2) || \ - ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV4) || \ - ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV8)) - -#define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF) - -#define IS_TIM_CLEARINPUT_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLEARINPUTPOLARITY_INVERTED) || \ - ((__POLARITY__) == TIM_CLEARINPUTPOLARITY_NONINVERTED)) - -#define IS_TIM_CLEARINPUT_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV1) || \ - ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV2) || \ - ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV4) || \ - ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV8)) - -#define IS_TIM_CLEARINPUT_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF) - - -#define IS_TIM_OSSR_STATE(__STATE__) (((__STATE__) == TIM_OSSR_ENABLE) || \ - ((__STATE__) == TIM_OSSR_DISABLE)) - -#define IS_TIM_OSSI_STATE(__STATE__) (((__STATE__) == TIM_OSSI_ENABLE) || \ - ((__STATE__) == TIM_OSSI_DISABLE)) - -#define IS_TIM_LOCK_LEVEL(__LEVEL__) (((__LEVEL__) == TIM_LOCKLEVEL_OFF) || \ - ((__LEVEL__) == TIM_LOCKLEVEL_1) || \ - ((__LEVEL__) == TIM_LOCKLEVEL_2) || \ - ((__LEVEL__) == TIM_LOCKLEVEL_3)) - -#define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xF) - - -#define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \ - ((__STATE__) == TIM_BREAK_DISABLE)) - -#define IS_TIM_BREAK_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKPOLARITY_LOW) || \ - ((__POLARITY__) == TIM_BREAKPOLARITY_HIGH)) - -#define IS_TIM_BREAK2_STATE(__STATE__) (((__STATE__) == TIM_BREAK2_ENABLE) || \ - ((__STATE__) == TIM_BREAK2_DISABLE)) - -#define IS_TIM_BREAK2_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAK2POLARITY_LOW) || \ - ((__POLARITY__) == TIM_BREAK2POLARITY_HIGH)) - -#define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__) (((__STATE__) == TIM_AUTOMATICOUTPUT_ENABLE) || \ - ((__STATE__) == TIM_AUTOMATICOUTPUT_DISABLE)) - -#define IS_TIM_GROUPCH5(__OCREF__) ((((__OCREF__) & 0x1FFFFFFF) == 0x00000000)) - -#define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) || \ - ((__SOURCE__) == TIM_TRGO_ENABLE) || \ - ((__SOURCE__) == TIM_TRGO_UPDATE) || \ - ((__SOURCE__) == TIM_TRGO_OC1) || \ - ((__SOURCE__) == TIM_TRGO_OC1REF) || \ - ((__SOURCE__) == TIM_TRGO_OC2REF) || \ - ((__SOURCE__) == TIM_TRGO_OC3REF) || \ - ((__SOURCE__) == TIM_TRGO_OC4REF)) - -#define IS_TIM_TRGO2_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO2_RESET) || \ - ((__SOURCE__) == TIM_TRGO2_ENABLE) || \ - ((__SOURCE__) == TIM_TRGO2_UPDATE) || \ - ((__SOURCE__) == TIM_TRGO2_OC1) || \ - ((__SOURCE__) == TIM_TRGO2_OC1REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC2REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC3REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC3REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC5REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC6REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF_RISINGFALLING) || \ - ((__SOURCE__) == TIM_TRGO2_OC6REF_RISINGFALLING) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \ - ((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \ - ((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING)) - -#define IS_TIM_MSM_STATE(__STATE__) (((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) || \ - ((__STATE__) == TIM_MASTERSLAVEMODE_DISABLE)) - -#define IS_TIM_SLAVE_MODE(__MODE__) (((__MODE__) == TIM_SLAVEMODE_DISABLE) || \ - ((__MODE__) == TIM_SLAVEMODE_RESET) || \ - ((__MODE__) == TIM_SLAVEMODE_GATED) || \ - ((__MODE__) == TIM_SLAVEMODE_TRIGGER) || \ - ((__MODE__) == TIM_SLAVEMODE_EXTERNAL1) || \ - ((__MODE__) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER)) - -#define IS_TIM_PWM_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_PWM1) || \ - ((__MODE__) == TIM_OCMODE_PWM2) || \ - ((__MODE__) == TIM_OCMODE_COMBINED_PWM1) || \ - ((__MODE__) == TIM_OCMODE_COMBINED_PWM2) || \ - ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM1) || \ - ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM2)) - -#define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING) || \ - ((__MODE__) == TIM_OCMODE_ACTIVE) || \ - ((__MODE__) == TIM_OCMODE_INACTIVE) || \ - ((__MODE__) == TIM_OCMODE_TOGGLE) || \ - ((__MODE__) == TIM_OCMODE_FORCED_ACTIVE) || \ - ((__MODE__) == TIM_OCMODE_FORCED_INACTIVE) || \ - ((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \ - ((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM2)) - -#define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \ - ((__SELECTION__) == TIM_TS_ITR1) || \ - ((__SELECTION__) == TIM_TS_ITR2) || \ - ((__SELECTION__) == TIM_TS_ITR3) || \ - ((__SELECTION__) == TIM_TS_TI1F_ED) || \ - ((__SELECTION__) == TIM_TS_TI1FP1) || \ - ((__SELECTION__) == TIM_TS_TI2FP2) || \ - ((__SELECTION__) == TIM_TS_ETRF)) - -#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \ - ((__SELECTION__) == TIM_TS_ITR1) || \ - ((__SELECTION__) == TIM_TS_ITR2) || \ - ((__SELECTION__) == TIM_TS_ITR3) || \ - ((__SELECTION__) == TIM_TS_NONE)) - - -#define IS_TIM_TRIGGERPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_TRIGGERPOLARITY_INVERTED ) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_NONINVERTED) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_RISING ) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_FALLING ) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_BOTHEDGE )) - -#define IS_TIM_TRIGGERPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV1) || \ - ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV2) || \ - ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV4) || \ - ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV8)) - -#define IS_TIM_TRIGGERFILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF) - -#define IS_TIM_TI1SELECTION(__TI1SELECTION__) (((__TI1SELECTION__) == TIM_TI1SELECTION_CH1) || \ - ((__TI1SELECTION__) == TIM_TI1SELECTION_XORCOMBINATION)) - -#define IS_TIM_DMA_LENGTH(__LENGTH__) (((__LENGTH__) == TIM_DMABURSTLENGTH_1TRANSFER) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_2TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_3TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_4TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_5TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_6TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_7TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_8TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_9TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_10TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_11TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_12TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_13TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_14TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_15TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_16TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_17TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_18TRANSFERS)) - -#define IS_TIM_IC_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF) - -#define IS_TIM_DEADTIME(__DEADTIME__) ((__DEADTIME__) <= 0xFF) - -#define IS_TIM_BREAK_SYSTEM(__CONFIG__) (((__CONFIG__) == TIM_BREAK_SYSTEM_ECC) || \ - ((__CONFIG__) == TIM_BREAK_SYSTEM_PVD) || \ - ((__CONFIG__) == TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR) || \ - ((__CONFIG__) == TIM_BREAK_SYSTEM_LOCKUP)) - -#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\ - ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8))) - -#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\ - ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC)) - -#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8)) :\ - ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12)))) - -#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC3P | TIM_CCER_CC3NP)) :\ - ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC4P | TIM_CCER_CC4NP))) - -/** - * @} - */ -/* End of private macros -----------------------------------------------------*/ - -/* Include TIM HAL Extended module */ -#include "stm32l4xx_hal_tim_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup TIM_Exported_Functions TIM Exported Functions - * @{ - */ - -/** @addtogroup TIM_Exported_Functions_Group1 Time Base functions - * @brief Time Base functions - * @{ - */ -/* Time Base functions ********************************************************/ -HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group2 Time Output Compare functions - * @brief Time Output Compare functions - * @{ - */ -/* Timer Output Compare functions *********************************************/ -HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group3 Time PWM functions - * @brief Time PWM functions - * @{ - */ -/* Timer PWM functions ********************************************************/ -HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group4 Time Input Capture functions - * @brief Time Input Capture functions - * @{ - */ -/* Timer Input Capture functions **********************************************/ -HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group5 Time One Pulse functions - * @brief Time One Pulse functions - * @{ - */ -/* Timer One Pulse functions **************************************************/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode); -HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group6 Time Encoder functions - * @brief Time Encoder functions - * @{ - */ -/* Timer Encoder functions ****************************************************/ -HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig); -HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim); - /* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group7 TIM IRQ handler management - * @brief IRQ handler management - * @{ - */ -/* Interrupt Handler functions ***********************************************/ -void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions - * @brief Peripheral Control functions - * @{ - */ -/* Control functions *********************************************************/ -HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel); -HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig); -HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection); -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig); -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig); -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \ - uint32_t *BurstBuffer, uint32_t BurstLength); -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc); -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \ - uint32_t *BurstBuffer, uint32_t BurstLength); -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc); -HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource); -uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions - * @brief TIM Callbacks functions - * @{ - */ -/* Callback in non blocking modes (Interrupt and DMA) *************************/ -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions - * @brief Peripheral State functions - * @{ - */ -/* Peripheral State functions ************************************************/ -HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** - * @} - */ -/* End of exported functions -------------------------------------------------*/ - -/* Private functions----------------------------------------------------------*/ -/** @defgroup TIM_Private_Functions TIM Private Functions -* @{ -*/ -void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure); -void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter); -void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter); - -void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma); -void TIM_DMAError(DMA_HandleTypeDef *hdma); -void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma); -void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState); -/** -* @} -*/ -/* End of private functions --------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_TIM_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h deleted file mode 100644 index eae1c9a3..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h +++ /dev/null @@ -1,484 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim_ex.h - * @author MCD Application Team - * @brief Header file of TIM HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_TIM_EX_H -#define __STM32L4xx_HAL_TIM_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup TIMEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types - * @{ - */ - -/** - * @brief TIM Hall sensor Configuration Structure definition - */ - -typedef struct -{ - - uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t IC1Filter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - - uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ -} TIM_HallSensor_InitTypeDef; - -/** - * @brief TIM Break/Break2 input configuration - */ -typedef struct { - uint32_t Source; /*!< Specifies the source of the timer break input. - This parameter can be a value of @ref TIMEx_Break_Input_Source */ - uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. - This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ - uint32_t Polarity; /*!< Specifies the break input source polarity. - This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity - Not relevant when analog watchdog output of the DFSDM1 used as break input source */ -} TIMEx_BreakInputConfigTypeDef; - -/** - * @} - */ -/* End of exported types -----------------------------------------------------*/ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants - * @{ - */ - -/** @defgroup TIMEx_Remap TIM Extended Remapping - * @{ - */ -#define TIM_TIM1_ETR_ADC1_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */ -#define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_OR1_ETR_ADC1_RMP_1) /* !< TIM1_ETR is connected to ADC1 AWD2 */ -#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */ -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) -#define TIM_TIM1_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD1 */ -#define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_OR1_ETR_ADC3_RMP_1) /* !< TIM1_ETR is connected to ADC3 AWD2 */ -#define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx */ -#define TIM_TIM1_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM1 TI1 is connected to GPIO */ -#define TIM_TIM1_TI1_COMP1 (TIM1_OR1_TI1_RMP) /* !< TIM1 TI1 is connected to COMP1 */ -#define TIM_TIM1_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM1_ETR is connected to GPIO */ -#define TIM_TIM1_ETR_COMP1 (TIM1_OR2_ETRSEL_0) /* !< TIM1_ETR is connected to COMP1 output */ -#define TIM_TIM1_ETR_COMP2 (TIM1_OR2_ETRSEL_1) /* !< TIM1_ETR is connected to COMP2 output */ - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM2_ITR1_TIM8_TRGO ((uint32_t)(0x00000000)) /* !< TIM2_ITR1 is connected to TIM8_TRGO */ -#define TIM_TIM2_ITR1_OTG_FS_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to OTG_FS SOF */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define TIM_TIM2_ITR1_NONE ((uint32_t)(0x00000000)) /* !< No internal trigger on TIM2_ITR1 */ -#define TIM_TIM2_ITR1_USB_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to USB SOF */ -#endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */ - /* STM32L451xx || STM32L452xx || STM32L462xx */ -#define TIM_TIM2_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM2_ETR is connected to GPIO */ -#define TIM_TIM2_ETR_LSE (TIM2_OR1_ETR1_RMP) /* !< TIM2_ETR is connected to LSE */ -#define TIM_TIM2_ETR_COMP1 (TIM2_OR2_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 output */ -#define TIM_TIM2_ETR_COMP2 (TIM2_OR2_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 output */ -#define TIM_TIM2_TI4_GPIO ((uint32_t)(0x00000000)) /* !< TIM2 TI4 is connected to GPIO */ -#define TIM_TIM2_TI4_COMP1 (TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to COMP1 output */ -#define TIM_TIM2_TI4_COMP2 (TIM2_OR1_TI4_RMP_1) /* !< TIM2 TI4 is connected to COMP2 output */ -#define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */ - -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM3_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM3 TI1 is connected to GPIO */ -#define TIM_TIM3_TI1_COMP1 (TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to COMP1 output */ -#define TIM_TIM3_TI1_COMP2 (TIM3_OR1_TI1_RMP_1) /* !< TIM3 TI1 is connected to COMP2 output */ -#define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */ -#define TIM_TIM3_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM3_ETR is connected to GPIO */ -#define TIM_TIM3_ETR_COMP1 (TIM3_OR2_ETRSEL_0) /* !< TIM3_ETR is connected to COMP1 output */ -#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) -#define TIM_TIM8_ETR_ADC2_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */ -#define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_OR1_ETR_ADC2_RMP_1) /* !< TIM8_ETR is connected to ADC2 AWD2 */ -#define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */ -#define TIM_TIM8_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD1 */ -#define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_OR1_ETR_ADC3_RMP_1) /* !< TIM8_ETR is connected to ADC3 AWD2 */ -#define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx */ -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM8_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM8 TI1 is connected to GPIO */ -#define TIM_TIM8_TI1_COMP2 (TIM8_OR1_TI1_RMP) /* !< TIM8 TI1 is connected to COMP1 */ -#define TIM_TIM8_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM8_ETR is connected to GPIO */ -#define TIM_TIM8_ETR_COMP1 (TIM8_OR2_ETRSEL_0) /* !< TIM8_ETR is connected to COMP1 output */ -#define TIM_TIM8_ETR_COMP2 (TIM8_OR2_ETRSEL_1) /* !< TIM8_ETR is connected to COMP2 output */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#define TIM_TIM15_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM15 TI1 is connected to GPIO */ -#define TIM_TIM15_TI1_LSE (TIM15_OR1_TI1_RMP) /* !< TIM15 TI1 is connected to LSE */ -#define TIM_TIM15_ENCODERMODE_NONE ((uint32_t)(0x00000000)) /* !< No redirection */ -#define TIM_TIM15_ENCODERMODE_TIM2 (TIM15_OR1_ENCODER_MODE_0) /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM15_ENCODERMODE_TIM3 (TIM15_OR1_ENCODER_MODE_1) /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ -#endif /* STM32L451xx || STM32L452xx || STM32L462xx */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#define TIM_TIM16_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM16 TI1 is connected to GPIO */ -#define TIM_TIM16_TI1_LSI (TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to LSI */ -#define TIM_TIM16_TI1_LSE (TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to LSE */ -#define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */ -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) -#define TIM_TIM16_TI1_MSI (TIM16_OR1_TI1_RMP_2) /* !< TIM16 TI1 is connected to MSI */ -#define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */ -#define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */ -#endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */ - /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L496xx || STM32L4A6xx */ - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM17_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM17 TI1 is connected to GPIO */ -#define TIM_TIM17_TI1_MSI (TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MSI */ -#define TIM_TIM17_TI1_HSE_32 (TIM17_OR1_TI1_RMP_1) /* !< TIM17 TI1 is connected to HSE div 32 */ -#define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input TIM Extended Break input - * @{ - */ -#define TIM_BREAKINPUT_BRK ((uint32_t)(0x00000001)) /* !< Timer break input */ -#define TIM_BREAKINPUT_BRK2 ((uint32_t)(0x00000002)) /* !< Timer break2 input */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source - * @{ - */ -#define TIM_BREAKINPUTSOURCE_BKIN ((uint32_t)(0x00000001)) /* !< An external source (GPIO) is connected to the BKIN pin */ -#define TIM_BREAKINPUTSOURCE_COMP1 ((uint32_t)(0x00000002)) /* !< The COMP1 output is connected to the break input */ -#define TIM_BREAKINPUTSOURCE_COMP2 ((uint32_t)(0x00000004)) /* !< The COMP2 output is connected to the break input */ -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_BREAKINPUTSOURCE_DFSDM1 ((uint32_t)(0x00000008)) /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */ -#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling - * @{ - */ -#define TIM_BREAKINPUTSOURCE_DISABLE ((uint32_t)(0x00000000)) /* !< Break input source is disabled */ -#define TIM_BREAKINPUTSOURCE_ENABLE ((uint32_t)(0x00000001)) /* !< Break input source is enabled */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity - * @{ - */ -#define TIM_BREAKINPUTSOURCE_POLARITY_LOW ((uint32_t)(0x00000001)) /* !< Break input source is active low */ -#define TIM_BREAKINPUTSOURCE_POLARITY_HIGH ((uint32_t)(0x00000000)) /* !< Break input source is active_high */ -/** - * @} - */ - -/** - * @} - */ -/* End of exported constants -------------------------------------------------*/ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros - * @{ - */ - -/** - * @} - */ -/* End of exported macro -----------------------------------------------------*/ - -/* Private macro -------------------------------------------------------------*/ -/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros - * @{ - */ -#define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F)) - -#define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ - ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) - -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1)) -#else -#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2)) -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ - ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) - -#define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ - ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) -/** - * @} - */ -/* End of private macro ------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions - * @{ - */ - -/** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions - * @brief Timer Hall Sensor functions - * @{ - */ -/* Timer Hall Sensor functions **********************************************/ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); - -void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); - - /* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions - * @brief Timer Complementary Output Compare functions - * @{ - */ -/* Timer Complementary Output Compare functions *****************************/ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); - -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); - -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions - * @brief Timer Complementary PWM functions - * @{ - */ -/* Timer Complementary PWM functions ****************************************/ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); - -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions - * @brief Timer Complementary One Pulse functions - * @{ - */ -/* Timer Complementary One Pulse functions **********************************/ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); - -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions - * @brief Peripheral Control functions - * @{ - */ -/* Extended Control functions ************************************************/ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); -HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig); -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); -HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); -HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); - -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions - * @brief Extended Callbacks functions - * @{ - */ -/* Extended Callback **********************************************************/ -void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim); -void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions - * @brief Extended Peripheral State functions - * @{ - */ -/* Extended Peripheral State functions ***************************************/ -HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** - * @} - */ -/* End of exported functions -------------------------------------------------*/ - -/* Private functions----------------------------------------------------------*/ -/** @defgroup TIMEx_Private_Functions TIMEx Private Functions -* @{ -*/ -void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); -/** -* @} -*/ -/* End of private functions --------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_TIM_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h deleted file mode 100644 index c1b04893..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h +++ /dev/null @@ -1,1638 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_uart.h - * @author MCD Application Team - * @brief Header file of UART HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_UART_H -#define __STM32L4xx_HAL_UART_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup UART - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup UART_Exported_Types UART Exported Types - * @{ - */ - -/** - * @brief UART Init Structure definition - */ -typedef struct -{ - uint32_t BaudRate; /*!< This member configures the UART communication baud rate. - The baud rate register is computed using the following formula: - UART: - ===== - - If oversampling is 16 or in LIN mode, - Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) - - If oversampling is 8, - Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4] - Baud Rate Register[3] = 0 - Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1 - LPUART: - ======= - Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) - - where (uart/lpuart)_ker_ck_pres is the UART input clock divided by a prescaler */ - - uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. - This parameter can be a value of @ref UARTEx_Word_Length. */ - - uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. - This parameter can be a value of @ref UART_Stop_Bits. */ - - uint32_t Parity; /*!< Specifies the parity mode. - This parameter can be a value of @ref UART_Parity - @note When parity is enabled, the computed parity is inserted - at the MSB position of the transmitted data (9th bit when - the word length is set to 9 data bits; 8th bit when the - word length is set to 8 data bits). */ - - uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. - This parameter can be a value of @ref UART_Mode. */ - - uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled - or disabled. - This parameter can be a value of @ref UART_Hardware_Flow_Control. */ - - uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). - This parameter can be a value of @ref UART_Over_Sampling. */ - - uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. - Selecting the single sample method increases the receiver tolerance to clock - deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ - -#if defined(USART_PRESC_PRESCALER) - uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. - This parameter can be a value of @ref UART_ClockPrescaler. */ -#endif - -}UART_InitTypeDef; - -/** - * @brief UART Advanced Features initalization structure definition - */ -typedef struct -{ - uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several - Advanced Features may be initialized at the same time . - This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ - - uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. - This parameter can be a value of @ref UART_Tx_Inv. */ - - uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. - This parameter can be a value of @ref UART_Rx_Inv. */ - - uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic - vs negative/inverted logic). - This parameter can be a value of @ref UART_Data_Inv. */ - - uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. - This parameter can be a value of @ref UART_Rx_Tx_Swap. */ - - uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. - This parameter can be a value of @ref UART_Overrun_Disable. */ - - uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. - This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ - - uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. - This parameter can be a value of @ref UART_AutoBaudRate_Enable */ - - uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate - detection is carried out. - This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ - - uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. - This parameter can be a value of @ref UART_MSB_First. */ -} UART_AdvFeatureInitTypeDef; - - - -/** - * @brief HAL UART State structures definition - * @note HAL UART State value is a combination of 2 different substates: gState and RxState. - * - gState contains UART state information related to global Handle management - * and also information related to Tx operations. - * gState value coding follow below described bitmap : - * b7-b6 Error information - * 00 : No Error - * 01 : (Not Used) - * 10 : Timeout - * 11 : Error - * b5 IP initilisation status - * 0 : Reset (IP not initialized) - * 1 : Init done (IP not initialized. HAL UART Init function already called) - * b4-b3 (not used) - * xx : Should be set to 00 - * b2 Intrinsic process state - * 0 : Ready - * 1 : Busy (IP busy with some configuration or internal operations) - * b1 (not used) - * x : Should be set to 0 - * b0 Tx state - * 0 : Ready (no Tx operation ongoing) - * 1 : Busy (Tx operation ongoing) - * - RxState contains information related to Rx operations. - * RxState value coding follow below described bitmap : - * b7-b6 (not used) - * xx : Should be set to 00 - * b5 IP initilisation status - * 0 : Reset (IP not initialized) - * 1 : Init done (IP not initialized) - * b4-b2 (not used) - * xxx : Should be set to 000 - * b1 Rx state - * 0 : Ready (no Rx operation ongoing) - * 1 : Busy (Rx operation ongoing) - * b0 (not used) - * x : Should be set to 0. - */ -typedef enum -{ - HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized - Value is allowed for gState and RxState */ - HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use - Value is allowed for gState and RxState */ - HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing - Value is allowed for gState only */ - HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing - Value is allowed for gState only */ - HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing - Value is allowed for RxState only */ - HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing - Not to be used for neither gState nor RxState. - Value is result of combination (Or) between gState and RxState values */ - HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state - Value is allowed for gState only */ - HAL_UART_STATE_ERROR = 0xE0U /*!< Error - Value is allowed for gState only */ -}HAL_UART_StateTypeDef; - -/** - * @brief HAL UART Error Code structure definition - */ -typedef enum -{ - HAL_UART_ERROR_NONE = 0x00U, /*!< No error */ - HAL_UART_ERROR_PE = 0x01U, /*!< Parity error */ - HAL_UART_ERROR_NE = 0x02U, /*!< Noise error */ - HAL_UART_ERROR_FE = 0x04U, /*!< frame error */ - HAL_UART_ERROR_ORE = 0x08U, /*!< Overrun error */ - HAL_UART_ERROR_DMA = 0x10U /*!< DMA transfer error */ -}HAL_UART_ErrorTypeDef; - -/** - * @brief UART clock sources definition - */ -typedef enum -{ - UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ - UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ - UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ - UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ - UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ - UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ -}UART_ClockSourceTypeDef; - -/** - * @brief UART handle Structure definition - */ -typedef struct __UART_HandleTypeDef -{ - USART_TypeDef *Instance; /*!< UART registers base address */ - - UART_InitTypeDef Init; /*!< UART communication parameters */ - - UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ - - uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ - - uint16_t TxXferSize; /*!< UART Tx Transfer size */ - - __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ - - uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ - - uint16_t RxXferSize; /*!< UART Rx Transfer size */ - - __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ - - uint16_t Mask; /*!< UART Rx RDR register mask */ - -#if defined(USART_CR1_FIFOEN) - uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ - - uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ - - uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. - This parameter can be a value of @ref UARTEx_FIFO_mode. */ -#endif - -#if defined(USART_CR2_SLVEN) - uint32_t SlaveMode; /*!< Specifies if the UART SPI Slave mode is being used. - This parameter can be a value of @ref UARTEx_Slave_Mode. */ -#endif - - void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ - - void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ - - DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ - - DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ - - HAL_LockTypeDef Lock; /*!< Locking object */ - - __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management - and also related to Tx operations. - This parameter can be a value of @ref HAL_UART_StateTypeDef */ - - __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. - This parameter can be a value of @ref HAL_UART_StateTypeDef */ - - __IO uint32_t ErrorCode; /*!< UART Error code */ - -}UART_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup UART_Exported_Constants UART Exported Constants - * @{ - */ - -/** @defgroup UART_Stop_Bits UART Number of Stop Bits - * @{ - */ -#define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ -#define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ -#define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ -#define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ -/** - * @} - */ - -/** @defgroup UART_Parity UART Parity - * @{ - */ -#define UART_PARITY_NONE 0x00000000U /*!< No parity */ -#define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ -#define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ -/** - * @} - */ - -/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control - * @{ - */ -#define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ -#define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ -#define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ -#define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ -/** - * @} - */ - -/** @defgroup UART_Mode UART Transfer Mode - * @{ - */ -#define UART_MODE_RX USART_CR1_RE /*!< RX mode */ -#define UART_MODE_TX USART_CR1_TE /*!< TX mode */ -#define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ -/** - * @} - */ - -/** @defgroup UART_State UART State - * @{ - */ -#define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ -#define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ -/** - * @} - */ - -/** @defgroup UART_Over_Sampling UART Over Sampling - * @{ - */ -#define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ -#define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ -/** - * @} - */ - -/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method - * @{ - */ -#define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ -#define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ -/** - * @} - */ - -#if defined(USART_PRESC_PRESCALER) -/** @defgroup UART_ClockPrescaler UART Clock Prescaler - * @{ - */ -#define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ -#define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ -#define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ -#define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ -#define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ -#define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ -#define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ -#define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ -#define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ -#define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ -#define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ -#define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ -/** - * @} - */ -#endif - -/** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode - * @{ - */ -#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ -#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ -#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ -#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ -/** - * @} - */ - -/** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut - * @{ - */ -#define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART receiver timeout disable */ -#define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART receiver timeout enable */ -/** - * @} - */ - -/** @defgroup UART_LIN UART Local Interconnection Network mode - * @{ - */ -#define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ -#define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ -/** - * @} - */ - -/** @defgroup UART_LIN_Break_Detection UART LIN Break Detection - * @{ - */ -#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ -#define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ -/** - * @} - */ - -/** @defgroup UART_DMA_Tx UART DMA Tx - * @{ - */ -#define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ -#define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ -/** - * @} - */ - -/** @defgroup UART_DMA_Rx UART DMA Rx - * @{ - */ -#define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ -#define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ -/** - * @} - */ - -/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection - * @{ - */ -#define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ -#define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ -/** - * @} - */ - -/** @defgroup UART_WakeUp_Methods UART WakeUp Methods - * @{ - */ -#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ -#define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ -/** - * @} - */ - -/** @defgroup UART_Request_Parameters UART Request Parameters - * @{ - */ -#define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ -#define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ -#define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ -#define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ -#define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ -/** - * @} - */ - -/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type - * @{ - */ -#define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ -#define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ -#define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ -#define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ -#define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ -#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ -#define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ -#define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ -#define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ -/** - * @} - */ - -/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion - * @{ - */ -#define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ -#define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ -/** - * @} - */ - -/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion - * @{ - */ -#define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ -#define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ -/** - * @} - */ - -/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion - * @{ - */ -#define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ -#define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ -/** - * @} - */ - -/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap - * @{ - */ -#define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ -#define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ -/** - * @} - */ - -/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable - * @{ - */ -#define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ -#define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ -/** - * @} - */ - -/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable - * @{ - */ -#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ -#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ -/** - * @} - */ - -/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error - * @{ - */ -#define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ -#define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ -/** - * @} - */ - -/** @defgroup UART_MSB_First UART Advanced Feature MSB First - * @{ - */ -#define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ -#define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ -/** - * @} - */ - -/** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable - * @{ - */ -#define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ -#define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ -/** - * @} - */ - -/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable - * @{ - */ -#define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ -#define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ -/** - * @} - */ - -/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register - * @{ - */ -#define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ -/** - * @} - */ - -/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection - * @{ - */ -#define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ -#define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ -#define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ -/** - * @} - */ - -/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity - * @{ - */ -#define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ -#define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ -/** - * @} - */ - -/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register - * @{ - */ -#define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ -/** - * @} - */ - -/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register - * @{ - */ -#define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ -/** - * @} - */ - -/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask - * @{ - */ -#define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ -/** - * @} - */ - -/** @defgroup UART_TimeOut_Value UART polling-based communications time-out value - * @{ - */ -#define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ -/** - * @} - */ - -/** @defgroup UART_Flags UART Status Flags - * Elements values convention: 0xXXXX - * - 0xXXXX : Flag mask in the ISR register - * @{ - */ -#define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ -#define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ -#define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ -#define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ -#define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ -#define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ -#define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ -#define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ -#define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ -#define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ -#define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ -#define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ -#define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ -#define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ -#define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ -#define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ -#if defined(USART_CR1_FIFOEN) -#define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ -#define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ -#else -#define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ -#endif -#define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ -#if defined(USART_CR1_FIFOEN) -#define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ -#define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ -#else -#define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ -#endif -#define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ -#define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ -#define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ -#define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ -#define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ -/** - * @} - */ - -/** @defgroup UART_Interrupt_definition UART Interrupts Definition - * Elements values convention: 000ZZZZZ0XXYYYYYb - * - YYYYY : Interrupt source position in the XX register (5bits) - * - XX : Interrupt source register (2bits) - * - 01: CR1 register - * - 10: CR2 register - * - 11: CR3 register - * - ZZZZZ : Flag position in the ISR register(5bits) - * @{ - */ -#define UART_IT_PE 0x0028U /*!< UART parity error interruption */ -#define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ -#if defined(USART_CR1_FIFOEN) -#define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ -#endif -#define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ -#define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ -#if defined(USART_CR1_FIFOEN) -#define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ -#endif -#define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ -#define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ -#define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ -#define UART_IT_CM 0x112EU /*!< UART character match interruption */ -#define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ -#if defined(USART_CR1_FIFOEN) -#define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ -#define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ -#define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ -#define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ -#endif - -/* Elements values convention: 000000000XXYYYYYb - - YYYYY : Interrupt source position in the XX register (5bits) - - XX : Interrupt source register (2bits) - - 01: CR1 register - - 10: CR2 register - - 11: CR3 register */ -#define UART_IT_ERR 0x0060U /*!< UART error interruption */ - -/* Elements values convention: 0000ZZZZ00000000b - - ZZZZ : Flag position in the ISR register(4bits) */ -#define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ -#define UART_IT_NE 0x0200U /*!< UART noise error interruption */ -#define UART_IT_FE 0x0100U /*!< UART frame error interruption */ -/** - * @} - */ - -/** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags - * @{ - */ -#define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ -#define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ -#define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ -#define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ -#define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ -#if defined(USART_CR1_FIFOEN) -#define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ -#endif -#define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ -#define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ -#define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ -#define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ -#define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ -/** - * @} - */ - - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup UART_Exported_Macros UART Exported Macros - * @{ - */ - -/** @brief Reset UART handle states. - * @param __HANDLE__ UART handle. - * @retval None - */ -#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ - (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ - (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ - } while(0) -/** @brief Flush the UART Data registers. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ - do{ \ - SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ - SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ - } while(0) - -/** @brief Clear the specified UART pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @param __FLAG__ specifies the flag to check. - * This parameter can be any combination of the following values: - * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag - * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag - * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag - * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag - * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag - * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag - * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag - * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag - * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag - * @arg @ref UART_CLEAR_CMF Character Match Clear Flag - * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag - * @retval None - */ -#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) - -/** @brief Clear the UART PE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) - -/** @brief Clear the UART FE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) - -/** @brief Clear the UART NE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) - -/** @brief Clear the UART ORE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) - -/** @brief Clear the UART IDLE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) - -#if defined(USART_CR1_FIFOEN) -/** @brief Clear the UART TX FIFO empty clear flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) -#endif - -/** @brief Check whether the specified UART flag is set or not. - * @param __HANDLE__ specifies the UART Handle. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag - * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag - * @arg @ref UART_FLAG_RXFF RXFIFO Full flag - * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag - * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag - * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag - * @arg @ref UART_FLAG_WUF Wake up from stop mode flag - * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) - * @arg @ref UART_FLAG_SBKF Send Break flag - * @arg @ref UART_FLAG_CMF Character match flag - * @arg @ref UART_FLAG_BUSY Busy flag - * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag - * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag - * @arg @ref UART_FLAG_CTS CTS Change flag - * @arg @ref UART_FLAG_LBDF LIN Break detection flag - * @arg @ref UART_FLAG_TXE Transmit data register empty flag - * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag - * @arg @ref UART_FLAG_TC Transmission Complete flag - * @arg @ref UART_FLAG_RXNE Receive data register not empty flag - * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag - * @arg @ref UART_FLAG_IDLE Idle Line detection flag - * @arg @ref UART_FLAG_ORE Overrun Error flag - * @arg @ref UART_FLAG_NE Noise Error flag - * @arg @ref UART_FLAG_FE Framing Error flag - * @arg @ref UART_FLAG_PE Parity Error flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) - -/** @brief Enable the specified UART interrupt. - * @param __HANDLE__ specifies the UART Handle. - * @param __INTERRUPT__ specifies the UART interrupt source to enable. - * This parameter can be one of the following values: - * @arg @ref UART_IT_RXFF RXFIFO Full interrupt - * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt - * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt - * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt - * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt - * @arg @ref UART_IT_CM Character match interrupt - * @arg @ref UART_IT_CTS CTS change interrupt - * @arg @ref UART_IT_LBD LIN Break detection interrupt - * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt - * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt - * @arg @ref UART_IT_TC Transmission complete interrupt - * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt - * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt - * @arg @ref UART_IT_IDLE Idle line detection interrupt - * @arg @ref UART_IT_PE Parity Error interrupt - * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ - ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) - - -/** @brief Disable the specified UART interrupt. - * @param __HANDLE__ specifies the UART Handle. - * @param __INTERRUPT__ specifies the UART interrupt source to disable. - * This parameter can be one of the following values: - * @arg @ref UART_IT_RXFF RXFIFO Full interrupt - * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt - * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt - * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt - * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt - * @arg @ref UART_IT_CM Character match interrupt - * @arg @ref UART_IT_CTS CTS change interrupt - * @arg @ref UART_IT_LBD LIN Break detection interrupt - * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt - * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt - * @arg @ref UART_IT_TC Transmission complete interrupt - * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt - * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt - * @arg @ref UART_IT_IDLE Idle line detection interrupt - * @arg @ref UART_IT_PE Parity Error interrupt - * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ - ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) - -/** @brief Check whether the specified UART interrupt has occurred or not. - * @param __HANDLE__ specifies the UART Handle. - * @param __INTERRUPT__ specifies the UART interrupt to check. - * This parameter can be one of the following values: - * @arg @ref UART_IT_RXFF RXFIFO Full interrupt - * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt - * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt - * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt - * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt - * @arg @ref UART_IT_CM Character match interrupt - * @arg @ref UART_IT_CTS CTS change interrupt - * @arg @ref UART_IT_LBD LIN Break detection interrupt - * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt - * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt - * @arg @ref UART_IT_TC Transmission complete interrupt - * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt - * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt - * @arg @ref UART_IT_IDLE Idle line detection interrupt - * @arg @ref UART_IT_PE Parity Error interrupt - * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) - -/** @brief Check whether the specified UART interrupt source is enabled or not. - * @param __HANDLE__ specifies the UART Handle. - * @param __INTERRUPT__ specifies the UART interrupt source to check. - * This parameter can be one of the following values: - * @arg @ref UART_IT_RXFF RXFIFO Full interrupt - * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt - * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt - * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt - * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt - * @arg @ref UART_IT_CM Character match interrupt - * @arg @ref UART_IT_CTS CTS change interrupt - * @arg @ref UART_IT_LBD LIN Break detection interrupt - * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt - * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt - * @arg @ref UART_IT_TC Transmission complete interrupt - * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt - * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt - * @arg @ref UART_IT_IDLE Idle line detection interrupt - * @arg @ref UART_IT_PE Parity Error interrupt - * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ - (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ - (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) - -/** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. - * @param __HANDLE__ specifies the UART Handle. - * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set - * to clear the corresponding interrupt - * This parameter can be one of the following values: - * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag - * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag - * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag - * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag - * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag - * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag - * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag - * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag - * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag - * @arg @ref UART_CLEAR_CMF Character Match Clear Flag - * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag - * @retval None - */ -#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) - -/** @brief Set a specific UART request flag. - * @param __HANDLE__ specifies the UART Handle. - * @param __REQ__ specifies the request flag to set - * This parameter can be one of the following values: - * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request - * @arg @ref UART_SENDBREAK_REQUEST Send Break Request - * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request - * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request - * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request - * @retval None - */ -#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__)) - -/** @brief Enable the UART one bit sample method. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) - -/** @brief Disable the UART one bit sample method. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) - -/** @brief Enable UART. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) - -/** @brief Disable UART. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) - -/** @brief Enable CTS flow control. - * @note This macro allows to enable CTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ - do{ \ - SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ - (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ - } while(0) - -/** @brief Disable CTS flow control. - * @note This macro allows to disable CTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ - do{ \ - CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ - (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ - } while(0) - -/** @brief Enable RTS flow control. - * @note This macro allows to enable RTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ - do{ \ - SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ - (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ - } while(0) - -/** @brief Disable RTS flow control. - * @note This macro allows to disable RTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ - do{ \ - CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ - (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ - } while(0) -/** - * @} - */ - -/* Private variables -----------------------------------------------------*/ -#if defined(USART_PRESC_PRESCALER) -/** @defgroup UART_Private_Variables UART Private Variables - * @{ - */ -static const uint16_t UARTPrescTable[12] = {1, 2, 4, 6, 8, 10, 12, 16, 32, 64, 128, 256}; -/** - * @} - */ -#endif - -/* Private macros --------------------------------------------------------*/ -/** @defgroup UART_Private_Macros UART Private Macros - * @{ - */ -#if defined(USART_PRESC_PRESCALER) - -/** @brief BRR division operation to set BRR register with LPUART. - * @param __PCLK__ LPUART clock. - * @param __BAUD__ Baud rate set by the user. - * @param __CLOCKPRESCALER__ UART prescaler value. - * @retval Division result - */ -#define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((((uint64_t)(__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*256)) + ((__BAUD__)/2)) / (__BAUD__)) - -/** @brief BRR division operation to set BRR register in 8-bit oversampling mode. - * @param __PCLK__ UART clock. - * @param __BAUD__ Baud rate set by the user. - * @param __CLOCKPRESCALER__ UART prescaler value. - * @retval Division result - */ -#define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2) + ((__BAUD__)/2)) / (__BAUD__)) - -/** @brief BRR division operation to set BRR register in 16-bit oversampling mode. - * @param __PCLK__ UART clock. - * @param __BAUD__ Baud rate set by the user. - * @param __CLOCKPRESCALER__ UART prescaler value. - * @retval Division result - */ -#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2)) / (__BAUD__)) - -#else - -/** @brief BRR division operation to set BRR register with LPUART. - * @param __PCLK__ LPUART clock. - * @param __BAUD__ Baud rate set by the user. - * @retval Division result - */ -#define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256)) + ((__BAUD__)/2)) / (__BAUD__)) - -/** @brief BRR division operation to set BRR register in 8-bit oversampling mode. - * @param __PCLK__ UART clock. - * @param __BAUD__ Baud rate set by the user. - * @retval Division result - */ -#define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2) + ((__BAUD__)/2)) / (__BAUD__)) - -/** @brief BRR division operation to set BRR register in 16-bit oversampling mode. - * @param __PCLK__ UART clock. - * @param __BAUD__ Baud rate set by the user. - * @retval Division result - */ -#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2)) / (__BAUD__)) - -#endif /* USART_PRESC_PRESCALER */ - -/** @brief Check whether or not UART instance is Low Power UART. - * @param __HANDLE__ specifies the UART Handle. - * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) - */ -#define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE(__HANDLE__->Instance)) - -/** @brief Check UART Baud rate. - * @param __BAUDRATE__ Baudrate specified by the user. - * The maximum Baud Rate is derived from the maximum clock on G0 (i.e. 52 MHz) - * divided by the smallest oversampling used on the USART (i.e. 8) - * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) - */ -#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6500001U) - -/** @brief Check UART assertion time. - * @param __TIME__ 5-bit value assertion time. - * @retval Test result (TRUE or FALSE). - */ -#define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) - -/** @brief Check UART deassertion time. - * @param __TIME__ 5-bit value deassertion time. - * @retval Test result (TRUE or FALSE). - */ -#define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) - -/** - * @brief Ensure that UART frame number of stop bits is valid. - * @param __STOPBITS__ UART frame number of stop bits. - * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) - */ -#define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ - ((__STOPBITS__) == UART_STOPBITS_1) || \ - ((__STOPBITS__) == UART_STOPBITS_1_5) || \ - ((__STOPBITS__) == UART_STOPBITS_2)) - -/** - * @brief Ensure that LPUART frame number of stop bits is valid. - * @param __STOPBITS__ LPUART frame number of stop bits. - * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) - */ -#define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ - ((__STOPBITS__) == UART_STOPBITS_2)) - -/** - * @brief Ensure that UART frame parity is valid. - * @param __PARITY__ UART frame parity. - * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) - */ -#define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ - ((__PARITY__) == UART_PARITY_EVEN) || \ - ((__PARITY__) == UART_PARITY_ODD)) - -/** - * @brief Ensure that UART hardware flow control is valid. - * @param __CONTROL__ UART hardware flow control. - * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) - */ -#define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ - (((__CONTROL__) == UART_HWCONTROL_NONE) || \ - ((__CONTROL__) == UART_HWCONTROL_RTS) || \ - ((__CONTROL__) == UART_HWCONTROL_CTS) || \ - ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) - -/** - * @brief Ensure that UART communication mode is valid. - * @param __MODE__ UART communication mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) - -/** - * @brief Ensure that UART state is valid. - * @param __STATE__ UART state. - * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) - */ -#define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ - ((__STATE__) == UART_STATE_ENABLE)) - -/** - * @brief Ensure that UART oversampling is valid. - * @param __SAMPLING__ UART oversampling. - * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) - */ -#define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ - ((__SAMPLING__) == UART_OVERSAMPLING_8)) - -/** - * @brief Ensure that UART frame sampling is valid. - * @param __ONEBIT__ UART frame sampling. - * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) - */ -#define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ - ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) - -/** - * @brief Ensure that UART auto Baud rate detection mode is valid. - * @param __MODE__ UART auto Baud rate detection mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ - ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ - ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ - ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) - -/** - * @brief Ensure that UART receiver timeout setting is valid. - * @param __TIMEOUT__ UART receiver timeout setting. - * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) - */ -#define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ - ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) - -/** - * @brief Ensure that UART LIN state is valid. - * @param __LIN__ UART LIN state. - * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) - */ -#define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ - ((__LIN__) == UART_LIN_ENABLE)) - -/** - * @brief Ensure that UART LIN break detection length is valid. - * @param __LENGTH__ UART LIN break detection length. - * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) - */ -#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ - ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) - -/** - * @brief Ensure that UART DMA TX state is valid. - * @param __DMATX__ UART DMA TX state. - * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) - */ -#define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ - ((__DMATX__) == UART_DMA_TX_ENABLE)) - -/** - * @brief Ensure that UART DMA RX state is valid. - * @param __DMARX__ UART DMA RX state. - * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) - */ -#define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ - ((__DMARX__) == UART_DMA_RX_ENABLE)) - -/** - * @brief Ensure that UART half-duplex state is valid. - * @param __HDSEL__ UART half-duplex state. - * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) - */ -#define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ - ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) - -/** - * @brief Ensure that UART wake-up method is valid. - * @param __WAKEUP__ UART wake-up method . - * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) - */ -#define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ - ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) - -/** - * @brief Ensure that UART request parameter is valid. - * @param __PARAM__ UART request parameter. - * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) - */ -#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ - ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ - ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ - ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ - ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) - -/** - * @brief Ensure that UART advanced features initialization is valid. - * @param __INIT__ UART advanced features initialization. - * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) - */ -#define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ - UART_ADVFEATURE_TXINVERT_INIT | \ - UART_ADVFEATURE_RXINVERT_INIT | \ - UART_ADVFEATURE_DATAINVERT_INIT | \ - UART_ADVFEATURE_SWAP_INIT | \ - UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ - UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ - UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ - UART_ADVFEATURE_MSBFIRST_INIT)) - -/** - * @brief Ensure that UART frame TX inversion setting is valid. - * @param __TXINV__ UART frame TX inversion setting. - * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) - */ -#define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ - ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) - -/** - * @brief Ensure that UART frame RX inversion setting is valid. - * @param __RXINV__ UART frame RX inversion setting. - * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) - */ -#define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ - ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) - -/** - * @brief Ensure that UART frame data inversion setting is valid. - * @param __DATAINV__ UART frame data inversion setting. - * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) - */ -#define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ - ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) - -/** - * @brief Ensure that UART frame RX/TX pins swap setting is valid. - * @param __SWAP__ UART frame RX/TX pins swap setting. - * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) - */ -#define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ - ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) - -/** - * @brief Ensure that UART frame overrun setting is valid. - * @param __OVERRUN__ UART frame overrun setting. - * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) - */ -#define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ - ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) - -/** - * @brief Ensure that UART auto Baud rate state is valid. - * @param __AUTOBAUDRATE__ UART auto Baud rate state. - * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) - */ -#define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ - ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) - -/** - * @brief Ensure that UART DMA enabling or disabling on error setting is valid. - * @param __DMA__ UART DMA enabling or disabling on error setting. - * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) - */ -#define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ - ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) - -/** - * @brief Ensure that UART frame MSB first setting is valid. - * @param __MSBFIRST__ UART frame MSB first setting. - * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) - */ -#define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ - ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) - -/** - * @brief Ensure that UART stop mode state is valid. - * @param __STOPMODE__ UART stop mode state. - * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) - */ -#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ - ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) - -/** - * @brief Ensure that UART mute mode state is valid. - * @param __MUTE__ UART mute mode state. - * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) - */ -#define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ - ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) - -/** - * @brief Ensure that UART wake-up selection is valid. - * @param __WAKE__ UART wake-up selection. - * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) - */ -#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ - ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ - ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) - -/** - * @brief Ensure that UART driver enable polarity is valid. - * @param __POLARITY__ UART driver enable polarity. - * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) - */ -#define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ - ((__POLARITY__) == UART_DE_POLARITY_LOW)) - -#if defined(USART_PRESC_PRESCALER) -/** - * @brief Ensure that UART Prescaler is valid. - * @param __CLOCKPRESCALER__ UART Prescaler value. - * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) - */ -#define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) -#endif - -#if defined(USART_CR1_FIFOEN) -/** - * @brief Ensure that UART TXFIFO threshold level is valid. - * @param __THRESHOLD__ UART TXFIFO threshold level. - * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) - */ -#define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) - -/** - * @brief Ensure that UART RXFIFO threshold level is valid. - * @param __THRESHOLD__ UART RXFIFO threshold level. - * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) - */ -#define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) -#endif - -/** - * @} - */ - -/* Include UART HAL Extended module */ -#include "stm32l4xx_hal_uart_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup UART_Exported_Functions UART Exported Functions - * @{ - */ - -/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ - -/* Initialization and de-initialization functions ****************************/ -HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); -HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); -HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart); -void HAL_UART_MspInit(UART_HandleTypeDef *huart); -void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); - -/** - * @} - */ - -/** @addtogroup UART_Exported_Functions_Group2 IO operation functions - * @{ - */ - -/* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); -/* Transfer Abort functions */ -HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); - -void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); -void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); -void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart); -void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart); -void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart); - -/** - * @} - */ - -/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ - -/* Peripheral Control functions ************************************************/ -HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); -void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); - -/** - * @} - */ - -/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions - * @{ - */ - -/* Peripheral State and Errors functions **************************************************/ -HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); -uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); - -/** - * @} - */ - -/** - * @} - */ - -/* Private functions -----------------------------------------------------------*/ -/** @addtogroup UART_Private_Functions UART Private Functions - * @{ - */ - -HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); -HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); -HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout); -void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_UART_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h deleted file mode 100644 index 06d6c927..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h +++ /dev/null @@ -1,771 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_uart_ex.h - * @author MCD Application Team - * @brief Header file of UART HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_UART_EX_H -#define __STM32L4xx_HAL_UART_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup UARTEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup UARTEx_Exported_Types UARTEx Exported Types - * @{ - */ - -/** - * @brief UART wake up from stop mode parameters - */ -typedef struct -{ - uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF). - This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. - If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must - be filled up. */ - - uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. - This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ - - uint8_t Address; /*!< UART/USART node address (7-bit long max). */ -} UART_WakeUpTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants - * @{ - */ - -/** @defgroup UARTEx_Word_Length UARTEx Word Length - * @{ - */ -#define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ -#define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ -#define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ -/** - * @} - */ - -/** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length - * @{ - */ -#define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ -#define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ -/** - * @} - */ - -#if defined(USART_CR2_SLVEN) -/** @defgroup UARTEx_Slave_Select_management UARTEx Slave Select Management - * @{ - */ -#define UART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */ -#define UART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */ -/** - * @} - */ -#endif - -#if defined(USART_CR1_FIFOEN) -/** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level - * @brief UART TXFIFO level - * @{ - */ -#define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ -#define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ -#define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ -#define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ -#define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ -#define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ -/** - * @} - */ - -/** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level - * @brief UART RXFIFO level - * @{ - */ -#define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ -#define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ -#define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ -#define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ -#define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ -#define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ -/** - * @} - */ -#endif - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup UARTEx_Exported_Functions - * @{ - */ - -/** @addtogroup UARTEx_Exported_Functions_Group1 - * @{ - */ - -/* Initialization and de-initialization functions ****************************/ -HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime); - -/** - * @} - */ - -/** @addtogroup UARTEx_Exported_Functions_Group2 - * @{ - */ - -/* IO operation functions *****************************************************/ -void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); - -#if defined(USART_CR1_FIFOEN) -void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); -void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); -#endif - -/** - * @} - */ - -/** @addtogroup UARTEx_Exported_Functions_Group3 - * @{ - */ - -/* Peripheral Control functions **********************************************/ -HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); -HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); - -#if defined(USART_CR2_SLVEN) -HAL_StatusTypeDef HAL_UARTEx_EnableSlaveMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UARTEx_DisableSlaveMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UARTEx_ConfigNSS(UART_HandleTypeDef *huart, uint32_t NSSConfig); -#endif - -#if defined(USART_CR1_FIFOEN) -HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); -HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); -#endif - - -/** - * @} - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup UARTEx_Private_Constants UARTEx Private Constants - * @{ - */ -#if defined(USART_CR2_SLVEN) -/** @defgroup UARTEx_Slave_Mode UARTEx Synchronous Slave mode - * @{ - */ -#define UART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */ -#define UART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */ -/** - * @} - */ -#endif - -#if defined(USART_CR1_FIFOEN) -/** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode - * @{ - */ -#define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ -#define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ -/** - * @} - */ -#endif -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup UARTEx_Private_Macros UARTEx Private Macros - * @{ - */ - -/** @brief Report the UART clock source. - * @param __HANDLE__ specifies the UART Handle. - * @param __CLOCKSOURCE__ output variable. - * @retval UART clocking source, written in __CLOCKSOURCE__. - */ -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART3) \ - { \ - switch(__HAL_RCC_GET_USART3_SOURCE()) \ - { \ - case RCC_USART3CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART3CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART3CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART3CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == UART4) \ - { \ - switch(__HAL_RCC_GET_UART4_SOURCE()) \ - { \ - case RCC_UART4CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_UART4CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_UART4CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_UART4CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == UART5) \ - { \ - switch(__HAL_RCC_GET_UART5_SOURCE()) \ - { \ - case RCC_UART5CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_UART5CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_UART5CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_UART5CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == LPUART1) \ - { \ - switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ - { \ - case RCC_LPUART1CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_LPUART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_LPUART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_LPUART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) -#elif defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) -#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART3) \ - { \ - switch(__HAL_RCC_GET_USART3_SOURCE()) \ - { \ - case RCC_USART3CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART3CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART3CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART3CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == LPUART1) \ - { \ - switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ - { \ - case RCC_LPUART1CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_LPUART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_LPUART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_LPUART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) -#elif defined (STM32L432xx) || defined (STM32L442xx) -#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == LPUART1) \ - { \ - switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ - { \ - case RCC_LPUART1CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_LPUART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_LPUART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_LPUART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) -#elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART3) \ - { \ - switch(__HAL_RCC_GET_USART3_SOURCE()) \ - { \ - case RCC_USART3CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART3CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART3CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART3CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == UART4) \ - { \ - switch(__HAL_RCC_GET_UART4_SOURCE()) \ - { \ - case RCC_UART4CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_UART4CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_UART4CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_UART4CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == LPUART1) \ - { \ - switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ - { \ - case RCC_LPUART1CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_LPUART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_LPUART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_LPUART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) -#endif - -/** @brief Report the UART mask to apply to retrieve the received data - * according to the word length and to the parity bits activation. - * @note If PCE = 1, the parity bit is not included in the data extracted - * by the reception API(). - * This masking operation is not carried out in the case of - * DMA transfers. - * @param __HANDLE__: specifies the UART Handle. - * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. - */ -#define UART_MASK_COMPUTATION(__HANDLE__) \ - do { \ - if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ - { \ - if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x01FF ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x00FF ; \ - } \ - } \ - else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ - { \ - if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x00FF ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x007F ; \ - } \ - } \ - else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ - { \ - if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x007F ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x003F ; \ - } \ - } \ -} while(0) - - -/** - * @brief Ensure that UART frame length is valid. - * @param __LENGTH__ UART frame length. - * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) - */ -#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ - ((__LENGTH__) == UART_WORDLENGTH_8B) || \ - ((__LENGTH__) == UART_WORDLENGTH_9B)) - -/** - * @brief Ensure that UART wake-up address length is valid. - * @param __ADDRESS__ UART wake-up address length. - * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) - */ -#define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ - ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) - -#if defined(USART_CR2_SLVEN) -/** - * @brief Ensure that UART Negative Slave Select (NSS) pin management is valid. - * @param __NSS__ UART Negative Slave Select pin management. - * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid) - */ -#define IS_UART_NSS(__NSS__) (((__NSS__) == UART_NSS_HARD) || \ - ((__NSS__) == UART_NSS_SOFT)) -#endif - -#if defined(USART_CR1_FIFOEN) -/** - * @brief Ensure that UART TXFIFO threshold level is valid. - * @param __THRESHOLD__ UART TXFIFO threshold level. - * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) - */ -#define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) - -/** - * @brief Ensure that USART RXFIFO threshold level is valid. - * @param __THRESHOLD__ USART RXFIFO threshold level. - * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) - */ -#define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) -#endif - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_UART_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h deleted file mode 100644 index d4a19ed6..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h +++ /dev/null @@ -1,617 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_ll_usb.h - * @author MCD Application Team - * @brief Header file of USB Core HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_LL_USB_H -#define __STM32L4xx_LL_USB_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL - * @{ - */ - -/** @addtogroup USB_Core - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** - * @brief USB Mode definition - */ -typedef enum -{ - USB_DEVICE_MODE = 0, - USB_HOST_MODE = 1, - USB_DRD_MODE = 2 - -}USB_ModeTypeDef; - -#if defined (USB_OTG_FS) -/** - * @brief URB States definition - */ -typedef enum { - URB_IDLE = 0, - URB_DONE, - URB_NOTREADY, - URB_NYET, - URB_ERROR, - URB_STALL - -}USB_OTG_URBStateTypeDef; - -/** - * @brief Host channel States definition - */ -typedef enum { - HC_IDLE = 0, - HC_XFRC, - HC_HALTED, - HC_NAK, - HC_NYET, - HC_STALL, - HC_XACTERR, - HC_BBLERR, - HC_DATATGLERR - -}USB_OTG_HCStateTypeDef; - -/** - * @brief PCD Initialization Structure definition - */ -typedef struct -{ - uint32_t dev_endpoints; /*!< Device Endpoints number. - This parameter depends on the used USB core. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint32_t Host_channels; /*!< Host Channels number. - This parameter Depends on the used USB core. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint32_t speed; /*!< USB Core speed. - This parameter can be any value of @ref USB_Core_Speed_ */ - - uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */ - - uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. - This parameter can be any value of @ref USB_EP0_MPS_ */ - - uint32_t phy_itface; /*!< Select the used PHY interface. - This parameter can be any value of @ref USB_Core_PHY_ */ - - uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ - - uint32_t low_power_enable; /*!< Enable or disable the low power mode. */ - - uint32_t lpm_enable; /*!< Enable or disable Battery charging. */ - - uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ - - uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */ - - uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */ - - uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */ - -}USB_OTG_CfgTypeDef; - -typedef struct -{ - uint8_t num; /*!< Endpoint number - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint8_t is_in; /*!< Endpoint direction - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t is_stall; /*!< Endpoint stall condition - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t type; /*!< Endpoint type - This parameter can be any value of @ref USB_EP_Type_ */ - - uint8_t data_pid_start; /*!< Initial data PID - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t even_odd_frame; /*!< IFrame parity - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint16_t tx_fifo_num; /*!< Transmission FIFO number - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint32_t maxpacket; /*!< Endpoint Max packet size - This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ - - uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ - - uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */ - - uint32_t xfer_len; /*!< Current transfer length */ - - uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ - -}USB_OTG_EPTypeDef; - -typedef struct -{ - uint8_t dev_addr ; /*!< USB device address. - This parameter must be a number between Min_Data = 1 and Max_Data = 255 */ - - uint8_t ch_num; /*!< Host channel number. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint8_t ep_num; /*!< Endpoint number. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint8_t ep_is_in; /*!< Endpoint direction - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t speed; /*!< USB Host speed. - This parameter can be any value of @ref USB_Core_Speed_ */ - - uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */ - - uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */ - - uint8_t ep_type; /*!< Endpoint Type. - This parameter can be any value of @ref USB_EP_Type_ */ - - uint16_t max_packet; /*!< Endpoint Max packet size. - This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ - - uint8_t data_pid; /*!< Initial data PID. - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */ - - uint32_t xfer_len; /*!< Current transfer length. */ - - uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */ - - uint8_t toggle_in; /*!< IN transfer current toggle flag. - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t toggle_out; /*!< OUT transfer current toggle flag - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */ - - uint32_t ErrCnt; /*!< Host channel error count.*/ - - USB_OTG_URBStateTypeDef urb_state; /*!< URB state. - This parameter can be any value of @ref USB_OTG_URBStateTypeDef */ - - USB_OTG_HCStateTypeDef state; /*!< Host Channel state. - This parameter can be any value of @ref USB_OTG_HCStateTypeDef */ - -}USB_OTG_HCTypeDef; -#endif /* USB_OTG_FS */ - -#if defined (USB) -/** - * @brief USB Initialization Structure definition - */ -typedef struct -{ - uint32_t dev_endpoints; /*!< Device Endpoints number. - This parameter depends on the used USB core. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint32_t speed; /*!< USB Core speed. - This parameter can be any value of @ref USB_Core_Speed */ - - uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */ - - uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. - This parameter can be any value of @ref USB_EP0_MPS */ - - uint32_t phy_itface; /*!< Select the used PHY interface. - This parameter can be any value of @ref USB_Core_PHY */ - - uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ - - uint32_t low_power_enable; /*!< Enable or disable Low Power mode */ - - uint32_t lpm_enable; /*!< Enable or disable Battery charging. */ - - uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ -} USB_CfgTypeDef; - -typedef struct -{ - uint8_t num; /*!< Endpoint number - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint8_t is_in; /*!< Endpoint direction - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t is_stall; /*!< Endpoint stall condition - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t type; /*!< Endpoint type - This parameter can be any value of @ref USB_EP_Type */ - - uint16_t pmaadress; /*!< PMA Address - This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ - - uint16_t pmaaddr0; /*!< PMA Address0 - This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ - - uint16_t pmaaddr1; /*!< PMA Address1 - This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ - - uint8_t doublebuffer; /*!< Double buffer enable - This parameter can be 0 or 1 */ - - uint16_t tx_fifo_num; /*!< This parameter is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral - This parameter is added to ensure compatibility across USB peripherals */ - - uint32_t maxpacket; /*!< Endpoint Max packet size - This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ - - uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ - - uint32_t xfer_len; /*!< Current transfer length */ - - uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ - -} USB_EPTypeDef; -#endif /* USB */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup PCD_Exported_Constants PCD Exported Constants - * @{ - */ -#if defined (USB_OTG_FS) -/** @defgroup USB_Core_Mode_ USB Core Mode - * @{ - */ -#define USB_OTG_MODE_DEVICE 0 -#define USB_OTG_MODE_HOST 1 -#define USB_OTG_MODE_DRD 2 -/** - * @} - */ - -/** @defgroup USB_Core_Speed_ USB Core Speed - * @{ - */ -#define USB_OTG_SPEED_HIGH 0 -#define USB_OTG_SPEED_HIGH_IN_FULL 1 -#define USB_OTG_SPEED_LOW 2 -#define USB_OTG_SPEED_FULL 3 -/** - * @} - */ - -/** @defgroup USB_Core_PHY_ USB Core PHY - * @{ - */ -#define USB_OTG_EMBEDDED_PHY 1 -/** - * @} - */ - -/** @defgroup USB_Core_MPS_ USB Core MPS - * @{ - */ -#define USB_OTG_FS_MAX_PACKET_SIZE 64 -#define USB_OTG_MAX_EP0_SIZE 64 -/** - * @} - */ - -/** @defgroup USB_Core_Phy_Frequency_ USB Core Phy Frequency - * @{ - */ -#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0 << 1) -#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1 << 1) -#define DSTS_ENUMSPD_LS_PHY_6MHZ (2 << 1) -#define DSTS_ENUMSPD_FS_PHY_48MHZ (3 << 1) -/** - * @} - */ - -/** @defgroup USB_CORE_Frame_Interval_ USB CORE Frame Interval - * @{ - */ -#define DCFG_FRAME_INTERVAL_80 0 -#define DCFG_FRAME_INTERVAL_85 1 -#define DCFG_FRAME_INTERVAL_90 2 -#define DCFG_FRAME_INTERVAL_95 3 -/** - * @} - */ - -/** @defgroup USB_EP0_MPS_ USB EP0 MPS - * @{ - */ -#define DEP0CTL_MPS_64 0 -#define DEP0CTL_MPS_32 1 -#define DEP0CTL_MPS_16 2 -#define DEP0CTL_MPS_8 3 -/** - * @} - */ - -/** @defgroup USB_EP_Speed_ USB EP Speed - * @{ - */ -#define EP_SPEED_LOW 0 -#define EP_SPEED_FULL 1 -#define EP_SPEED_HIGH 2 -/** - * @} - */ - -/** @defgroup USB_EP_Type_ USB EP Type - * @{ - */ -#define EP_TYPE_CTRL 0 -#define EP_TYPE_ISOC 1 -#define EP_TYPE_BULK 2 -#define EP_TYPE_INTR 3 -#define EP_TYPE_MSK 3 -/** - * @} - */ - -/** @defgroup USB_STS_Defines_ USB STS Defines - * @{ - */ -#define STS_GOUT_NAK 1 -#define STS_DATA_UPDT 2 -#define STS_XFER_COMP 3 -#define STS_SETUP_COMP 4 -#define STS_SETUP_UPDT 6 -/** - * @} - */ - -/** @defgroup HCFG_SPEED_Defines_ HCFG SPEED Defines - * @{ - */ -#define HCFG_30_60_MHZ 0 -#define HCFG_48_MHZ 1 -#define HCFG_6_MHZ 2 -/** - * @} - */ - -/** @defgroup HPRT0_PRTSPD_SPEED_Defines_ HPRT0 PRTSPD SPEED Defines - * @{ - */ -#define HPRT0_PRTSPD_HIGH_SPEED 0 -#define HPRT0_PRTSPD_FULL_SPEED 1 -#define HPRT0_PRTSPD_LOW_SPEED 2 -/** - * @} - */ - -#define HCCHAR_CTRL 0 -#define HCCHAR_ISOC 1 -#define HCCHAR_BULK 2 -#define HCCHAR_INTR 3 - -#define HC_PID_DATA0 0 -#define HC_PID_DATA2 1 -#define HC_PID_DATA1 2 -#define HC_PID_SETUP 3 - -#define GRXSTS_PKTSTS_IN 2 -#define GRXSTS_PKTSTS_IN_XFER_COMP 3 -#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5 -#define GRXSTS_PKTSTS_CH_HALTED 7 - -#define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE) -#define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE) - -#define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE)) -#define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) -#define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) -#define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE) - -#define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE)) -#define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE)) - -#endif /* USB_OTG_FS */ - -#if defined (USB) -/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS - * @{ - */ -#define DEP0CTL_MPS_64 0 -#define DEP0CTL_MPS_32 1 -#define DEP0CTL_MPS_16 2 -#define DEP0CTL_MPS_8 3 -/** - * @} - */ - -/** @defgroup USB_LL_EP_Type USB Low Layer EP Type - * @{ - */ -#define EP_TYPE_CTRL 0 -#define EP_TYPE_ISOC 1 -#define EP_TYPE_BULK 2 -#define EP_TYPE_INTR 3 -#define EP_TYPE_MSK 3 -/** - * @} - */ - -#define BTABLE_ADDRESS (0x000) -#endif /* USB */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -#if defined (USB_OTG_FS) -#define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__)) -#define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__)) - -#define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__)) -#define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__)) -#endif /* USB_OTG_FS */ - -/* Exported functions --------------------------------------------------------*/ -#if defined (USB_OTG_FS) -HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init); -HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init); -HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_ModeTypeDef mode); -HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed); -HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num ); -HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); -HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); -HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); -void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); -HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address); -HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup); -uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum); -uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum); -void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt); - -HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg); -HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq); -HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state); -uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, - uint8_t ch_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps); -HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma); -uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num); -HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num); -HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx); -#endif /* USB_OTG_FS */ - -#if defined (USB) -HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef Init); -HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef Init); -HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx , USB_ModeTypeDef mode); -HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx , uint8_t speed); -HAL_StatusTypeDef USB_FlushRxFifo (USB_TypeDef *USBx); -HAL_StatusTypeDef USB_FlushTxFifo (USB_TypeDef *USBx, uint32_t num ); -HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx , USB_EPTypeDef *ep ,uint8_t dma); -HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len); -void * USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len); -HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx , USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx , USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_SetDevAddress (USB_TypeDef *USBx, uint8_t address); -HAL_StatusTypeDef USB_DevConnect (USB_TypeDef *USBx); -HAL_StatusTypeDef USB_DevDisconnect (USB_TypeDef *USBx); -HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t dma, uint8_t *psetup); -uint32_t USB_ReadInterrupts (USB_TypeDef *USBx); -uint32_t USB_ReadDevAllOutEpInterrupt (USB_TypeDef *USBx); -uint32_t USB_ReadDevOutEPInterrupt (USB_TypeDef *USBx , uint8_t epnum); -uint32_t USB_ReadDevAllInEpInterrupt (USB_TypeDef *USBx); -uint32_t USB_ReadDevInEPInterrupt (USB_TypeDef *USBx , uint8_t epnum); -void USB_ClearInterrupts (USB_TypeDef *USBx, uint32_t interrupt); - -HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx); -void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); -void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); -#endif /* USB */ -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_LL_USB_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c deleted file mode 100644 index 18706063..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +++ /dev/null @@ -1,693 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal.c - * @author MCD Application Team - * @brief HAL module driver. - * This is the common part of the HAL initialization - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The common HAL driver contains a set of generic and common APIs that can be - used by the PPP peripheral drivers and the user to start using the HAL. - [..] - The HAL contains two APIs' categories: - (+) Common HAL APIs - (+) Services HAL APIs - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup HAL HAL - * @brief HAL module driver - * @{ - */ - -#ifdef HAL_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** - * @brief STM32L4xx HAL Driver version number - */ -#define __STM32L4xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */ -#define __STM32L4xx_HAL_VERSION_SUB1 (0x08) /*!< [23:16] sub1 version */ -#define __STM32L4xx_HAL_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */ -#define __STM32L4xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */ -#define __STM32L4xx_HAL_VERSION ((__STM32L4xx_HAL_VERSION_MAIN << 24)\ - |(__STM32L4xx_HAL_VERSION_SUB1 << 16)\ - |(__STM32L4xx_HAL_VERSION_SUB2 << 8 )\ - |(__STM32L4xx_HAL_VERSION_RC)) - -#if defined(VREFBUF) -#define VREFBUF_TIMEOUT_VALUE (uint32_t)10 /* 10 ms (to be confirmed) */ -#endif /* VREFBUF */ - -/* ------------ SYSCFG registers bit address in the alias region ------------ */ -#define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE) -/* --- MEMRMP Register ---*/ -/* Alias word address of FB_MODE bit */ -#define MEMRMP_OFFSET SYSCFG_OFFSET -#define FB_MODE_BitNumber ((uint8_t)0x8) -#define FB_MODE_BB (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (FB_MODE_BitNumber * 4)) - -/* --- SCSR Register ---*/ -/* Alias word address of SRAM2ER bit */ -#define SCSR_OFFSET (SYSCFG_OFFSET + 0x18) -#define BRER_BitNumber ((uint8_t)0x0) -#define SCSR_SRAM2ER_BB (PERIPH_BB_BASE + (SCSR_OFFSET * 32) + (BRER_BitNumber * 4)) - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -__IO uint32_t uwTick; - -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup HAL_Exported_Functions HAL Exported Functions - * @{ - */ - -/** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions - * @brief Initialization and de-initialization functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Initialize the Flash interface the NVIC allocation and initial time base - clock configuration. - (+) De-initialize common part of the HAL. - (+) Configure the time base source to have 1ms time base with a dedicated - Tick interrupt priority. - (++) SysTick timer is used by default as source of time base, but user - can eventually implement his proper time base source (a general purpose - timer for example or other time source), keeping in mind that Time base - duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and - handled in milliseconds basis. - (++) Time base configuration function (HAL_InitTick ()) is called automatically - at the beginning of the program after reset by HAL_Init() or at any time - when clock is configured, by HAL_RCC_ClockConfig(). - (++) Source of time base is configured to generate interrupts at regular - time intervals. Care must be taken if HAL_Delay() is called from a - peripheral ISR process, the Tick interrupt line must have higher priority - (numerically lower) than the peripheral interrupt. Otherwise the caller - ISR process will be blocked. - (++) functions affecting time base configurations are declared as __weak - to make override possible in case of other implementations in user file. -@endverbatim - * @{ - */ - -/** - * @brief Configure the Flash prefetch, the Instruction and Data caches, - * the time base source, NVIC and any required global low level hardware - * by calling the HAL_MspInit() callback function to be optionally defined in user file - * stm32l4xx_hal_msp.c. - * - * @note HAL_Init() function is called at the beginning of program after reset and before - * the clock configuration. - * - * @note In the default implementation the System Timer (Systick) is used as source of time base. - * The Systick configuration is based on MSI clock, as MSI is the clock - * used after a system Reset and the NVIC configuration is set to Priority group 4. - * Once done, time base tick starts incrementing: the tick variable counter is incremented - * each 1ms in the SysTick_Handler() interrupt handler. - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_Init(void) -{ - /* Configure Flash prefetch, Instruction cache, Data cache */ - /* Default configuration at reset is: */ - /* - Prefetch disabled */ - /* - Instruction cache enabled */ - /* - Data cache enabled */ -#if (INSTRUCTION_CACHE_ENABLE == 0) - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); -#endif /* INSTRUCTION_CACHE_ENABLE */ - -#if (DATA_CACHE_ENABLE == 0) - __HAL_FLASH_DATA_CACHE_DISABLE(); -#endif /* DATA_CACHE_ENABLE */ - -#if (PREFETCH_ENABLE != 0) - __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); -#endif /* PREFETCH_ENABLE */ - - /* Set Interrupt Group Priority */ - HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - - /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */ - HAL_InitTick(TICK_INT_PRIORITY); - - /* Init the low level hardware */ - HAL_MspInit(); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief De-initialize common part of the HAL and stop the source of time base. - * @note This function is optional. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DeInit(void) -{ - /* Reset of all peripherals */ - __HAL_RCC_APB1_FORCE_RESET(); - __HAL_RCC_APB1_RELEASE_RESET(); - - __HAL_RCC_APB2_FORCE_RESET(); - __HAL_RCC_APB2_RELEASE_RESET(); - - __HAL_RCC_AHB1_FORCE_RESET(); - __HAL_RCC_AHB1_RELEASE_RESET(); - - __HAL_RCC_AHB2_FORCE_RESET(); - __HAL_RCC_AHB2_RELEASE_RESET(); - - __HAL_RCC_AHB3_FORCE_RESET(); - __HAL_RCC_AHB3_RELEASE_RESET(); - - /* De-Init the low level hardware */ - HAL_MspDeInit(); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Initialize the MSP. - * @retval None - */ -__weak void HAL_MspInit(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the MSP. - * @retval None - */ -__weak void HAL_MspDeInit(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief This function configures the source of the time base: - * The time source is configured to have 1ms time base with a dedicated - * Tick interrupt priority. - * @note This function is called automatically at the beginning of program after - * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig(). - * @note In the default implementation, SysTick timer is the source of time base. - * It is used to generate interrupts at regular time intervals. - * Care must be taken if HAL_Delay() is called from a peripheral ISR process, - * The SysTick interrupt must have higher priority (numerically lower) - * than the peripheral interrupt. Otherwise the caller ISR process will be blocked. - * The function is declared as __weak to be overwritten in case of other - * implementation in user file. - * @param TickPriority Tick interrupt priority. - * @retval HAL status - */ -__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) -{ - /*Configure the SysTick to have interrupt in 1ms time basis*/ - HAL_SYSTICK_Config(SystemCoreClock/1000); - - /*Configure the SysTick IRQ priority */ - HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup HAL_Exported_Functions_Group2 HAL Control functions - * @brief HAL Control functions - * -@verbatim - =============================================================================== - ##### HAL Control functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Provide a tick value in millisecond - (+) Provide a blocking delay in millisecond - (+) Suspend the time base source interrupt - (+) Resume the time base source interrupt - (+) Get the HAL API driver version - (+) Get the device identifier - (+) Get the device revision identifier - -@endverbatim - * @{ - */ - -/** - * @brief This function is called to increment a global variable "uwTick" - * used as application time base. - * @note In the default implementation, this variable is incremented each 1ms - * in SysTick ISR. - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval None - */ -__weak void HAL_IncTick(void) -{ - uwTick++; -} - -/** - * @brief Provide a tick value in millisecond. - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval tick value - */ -__weak uint32_t HAL_GetTick(void) -{ - return uwTick; -} - -/** - * @brief This function provides minimum delay (in milliseconds) based - * on variable incremented. - * @note In the default implementation , SysTick timer is the source of time base. - * It is used to generate interrupts at regular time intervals where uwTick - * is incremented. - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @param Delay specifies the delay time length, in milliseconds. - * @retval None - */ -__weak void HAL_Delay(uint32_t Delay) -{ - uint32_t tickstart = HAL_GetTick(); - uint32_t wait = Delay; - - /* Add a period to guaranty minimum wait */ - if (wait < HAL_MAX_DELAY) - { - wait++; - } - - while((HAL_GetTick() - tickstart) < wait) - { - } -} - -/** - * @brief Suspend Tick increment. - * @note In the default implementation , SysTick timer is the source of time base. It is - * used to generate interrupts at regular time intervals. Once HAL_SuspendTick() - * is called, the SysTick interrupt will be disabled and so Tick increment - * is suspended. - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval None - */ -__weak void HAL_SuspendTick(void) -{ - /* Disable SysTick Interrupt */ - SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk; -} - -/** - * @brief Resume Tick increment. - * @note In the default implementation , SysTick timer is the source of time base. It is - * used to generate interrupts at regular time intervals. Once HAL_ResumeTick() - * is called, the SysTick interrupt will be enabled and so Tick increment - * is resumed. - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval None - */ -__weak void HAL_ResumeTick(void) -{ - /* Enable SysTick Interrupt */ - SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk; -} - -/** - * @brief Return the HAL revision. - * @retval version : 0xXYZR (8bits for each decimal, R for RC) - */ -uint32_t HAL_GetHalVersion(void) -{ - return __STM32L4xx_HAL_VERSION; -} - -/** - * @brief Return the device revision identifier. - * @retval Device revision identifier - */ -uint32_t HAL_GetREVID(void) -{ - return((DBGMCU->IDCODE & DBGMCU_IDCODE_REV_ID) >> 16); -} - -/** - * @brief Return the device identifier. - * @retval Device identifier - */ -uint32_t HAL_GetDEVID(void) -{ - return(DBGMCU->IDCODE & DBGMCU_IDCODE_DEV_ID); -} - -/** - * @brief Return the first word of the unique device identifier (UID based on 96 bits) - * @retval Device identifier - */ -uint32_t HAL_GetUIDw0(void) -{ - return(READ_REG(*((uint32_t *)UID_BASE))); -} - -/** - * @brief Return the second word of the unique device identifier (UID based on 96 bits) - * @retval Device identifier - */ -uint32_t HAL_GetUIDw1(void) -{ - return(READ_REG(*((uint32_t *)(UID_BASE + 4U)))); -} - -/** - * @brief Return the third word of the unique device identifier (UID based on 96 bits) - * @retval Device identifier - */ -uint32_t HAL_GetUIDw2(void) -{ - return(READ_REG(*((uint32_t *)(UID_BASE + 8U)))); -} - -/** - * @} - */ - -/** @defgroup HAL_Exported_Functions_Group3 HAL Debug functions - * @brief HAL Debug functions - * -@verbatim - =============================================================================== - ##### HAL Debug functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Enable/Disable Debug module during SLEEP mode - (+) Enable/Disable Debug module during STOP0/STOP1/STOP2 modes - (+) Enable/Disable Debug module during STANDBY mode - -@endverbatim - * @{ - */ - -/** - * @brief Enable the Debug Module during SLEEP mode. - * @retval None - */ -void HAL_DBGMCU_EnableDBGSleepMode(void) -{ - SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); -} - -/** - * @brief Disable the Debug Module during SLEEP mode. - * @retval None - */ -void HAL_DBGMCU_DisableDBGSleepMode(void) -{ - CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); -} - -/** - * @brief Enable the Debug Module during STOP0/STOP1/STOP2 modes. - * @retval None - */ -void HAL_DBGMCU_EnableDBGStopMode(void) -{ - SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); -} - -/** - * @brief Disable the Debug Module during STOP0/STOP1/STOP2 modes. - * @retval None - */ -void HAL_DBGMCU_DisableDBGStopMode(void) -{ - CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); -} - -/** - * @brief Enable the Debug Module during STANDBY mode. - * @retval None - */ -void HAL_DBGMCU_EnableDBGStandbyMode(void) -{ - SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); -} - -/** - * @brief Disable the Debug Module during STANDBY mode. - * @retval None - */ -void HAL_DBGMCU_DisableDBGStandbyMode(void) -{ - CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); -} - -/** - * @} - */ - -/** @defgroup HAL_Exported_Functions_Group4 HAL SYSCFG configuration functions - * @brief HAL SYSCFG configuration functions - * -@verbatim - =============================================================================== - ##### HAL SYSCFG configuration functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Start a hardware SRAM2 erase operation - (+) Enable/Disable the Internal FLASH Bank Swapping - (+) Configure the Voltage reference buffer - (+) Enable/Disable the Voltage reference buffer - (+) Enable/Disable the I/O analog switch voltage booster - -@endverbatim - * @{ - */ - -/** - * @brief Start a hardware SRAM2 erase operation. - * @note As long as SRAM2 is not erased the SRAM2ER bit will be set. - * This bit is automatically reset at the end of the SRAM2 erase operation. - * @retval None - */ -void HAL_SYSCFG_SRAM2Erase(void) -{ - /* unlock the write protection of the SRAM2ER bit */ - SYSCFG->SKR = 0xCA; - SYSCFG->SKR = 0x53; - /* Starts a hardware SRAM2 erase operation*/ - *(__IO uint32_t *) SCSR_SRAM2ER_BB = (uint8_t)0x00000001; -} - -/** - * @brief Enable the Internal FLASH Bank Swapping. - * - * @note This function can be used only for STM32L4xx devices. - * - * @note Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000) - * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000) - * - * @retval None - */ -void HAL_SYSCFG_EnableMemorySwappingBank(void) -{ - *(__IO uint32_t *)FB_MODE_BB = (uint32_t)ENABLE; -} - -/** - * @brief Disable the Internal FLASH Bank Swapping. - * - * @note This function can be used only for STM32L4xx devices. - * - * @note The default state : Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000) - * and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000) - * - * @retval None - */ -void HAL_SYSCFG_DisableMemorySwappingBank(void) -{ - - *(__IO uint32_t *)FB_MODE_BB = (uint32_t)DISABLE; -} - -#if defined(VREFBUF) -/** - * @brief Configure the internal voltage reference buffer voltage scale. - * @param VoltageScaling specifies the output voltage to achieve - * This parameter can be one of the following values: - * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE0: VREF_OUT1 around 2.048 V. - * This requires VDDA equal to or higher than 2.4 V. - * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE1: VREF_OUT2 around 2.5 V. - * This requires VDDA equal to or higher than 2.8 V. - * @retval None - */ -void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling) -{ - /* Check the parameters */ - assert_param(IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(VoltageScaling)); - - MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, VoltageScaling); -} - -/** - * @brief Configure the internal voltage reference buffer high impedance mode. - * @param Mode specifies the high impedance mode - * This parameter can be one of the following values: - * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE: VREF+ pin is internally connect to VREFINT output. - * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE: VREF+ pin is high impedance. - * @retval None - */ -void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode) -{ - /* Check the parameters */ - assert_param(IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(Mode)); - - MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode); -} - -/** - * @brief Tune the Internal Voltage Reference buffer (VREFBUF). - * @retval None - */ -void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue) -{ - /* Check the parameters */ - assert_param(IS_SYSCFG_VREFBUF_TRIMMING(TrimmingValue)); - - MODIFY_REG(VREFBUF->CCR, VREFBUF_CCR_TRIM, TrimmingValue); -} - -/** - * @brief Enable the Internal Voltage Reference buffer (VREFBUF). - * @retval HAL_OK/HAL_TIMEOUT - */ -HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void) -{ - uint32_t tickstart = 0; - - SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait for VRR bit */ - while(READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == RESET) - { - if((HAL_GetTick() - tickstart) > VREFBUF_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - return HAL_OK; -} - -/** - * @brief Disable the Internal Voltage Reference buffer (VREFBUF). - * - * @retval None - */ -void HAL_SYSCFG_DisableVREFBUF(void) -{ - CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR); -} -#endif /* VREFBUF */ - -/** - * @brief Enable the I/O analog switch voltage booster - * - * @retval None - */ -void HAL_SYSCFG_EnableIOAnalogSwitchBooster(void) -{ - SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); -} - -/** - * @brief Disable the I/O analog switch voltage booster - * - * @retval None - */ -void HAL_SYSCFG_DisableIOAnalogSwitchBooster(void) -{ - CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c deleted file mode 100644 index 4c99c721..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +++ /dev/null @@ -1,539 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_cortex.c - * @author MCD Application Team - * @brief CORTEX HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the CORTEX: - * + Initialization and Configuration functions - * + Peripheral Control functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - - [..] - *** How to configure Interrupts using CORTEX HAL driver *** - =========================================================== - [..] - This section provides functions allowing to configure the NVIC interrupts (IRQ). - The Cortex-M4 exceptions are managed by CMSIS functions. - - (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping() function. - (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority(). - (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ(). - - -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible. - The pending IRQ priority will be managed only by the sub priority. - - -@- IRQ priority order (sorted by highest to lowest priority): - (+@) Lowest pre-emption priority - (+@) Lowest sub priority - (+@) Lowest hardware priority (IRQ number) - - [..] - *** How to configure SysTick using CORTEX HAL driver *** - ======================================================== - [..] - Setup SysTick Timer for time base. - - (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which - is a CMSIS function that: - (++) Configures the SysTick Reload register with value passed as function parameter. - (++) Configures the SysTick IRQ priority to the lowest value (0x0F). - (++) Resets the SysTick Counter register. - (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). - (++) Enables the SysTick Interrupt. - (++) Starts the SysTick Counter. - - (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro - __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the - HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined - inside the stm32l4xx_hal_cortex.h file. - - (+) You can change the SysTick IRQ priority by calling the - HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function - call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function. - - (+) To adjust the SysTick time base, use the following formula: - - Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) - (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function - (++) Reload Value should not exceed 0xFFFFFF - - @endverbatim - ****************************************************************************** - - The table below gives the allowed values of the pre-emption priority and subpriority according - to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function. - - ========================================================================================================================== - NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description - ========================================================================================================================== - NVIC_PRIORITYGROUP_0 | 0 | 0-15 | 0 bit for pre-emption priority - | | | 4 bits for subpriority - -------------------------------------------------------------------------------------------------------------------------- - NVIC_PRIORITYGROUP_1 | 0-1 | 0-7 | 1 bit for pre-emption priority - | | | 3 bits for subpriority - -------------------------------------------------------------------------------------------------------------------------- - NVIC_PRIORITYGROUP_2 | 0-3 | 0-3 | 2 bits for pre-emption priority - | | | 2 bits for subpriority - -------------------------------------------------------------------------------------------------------------------------- - NVIC_PRIORITYGROUP_3 | 0-7 | 0-1 | 3 bits for pre-emption priority - | | | 1 bit for subpriority - -------------------------------------------------------------------------------------------------------------------------- - NVIC_PRIORITYGROUP_4 | 0-15 | 0 | 4 bits for pre-emption priority - | | | 0 bit for subpriority - ========================================================================================================================== - - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup CORTEX - * @{ - */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup CORTEX_Exported_Functions - * @{ - */ - - -/** @addtogroup CORTEX_Exported_Functions_Group1 - * @brief Initialization and Configuration functions - * -@verbatim - ============================================================================== - ##### Initialization and Configuration functions ##### - ============================================================================== - [..] - This section provides the CORTEX HAL driver functions allowing to configure Interrupts - SysTick functionalities - -@endverbatim - * @{ - */ - - -/** - * @brief Set the priority grouping field (pre-emption priority and subpriority) - * using the required unlock sequence. - * @param PriorityGroup: The priority grouping bits length. - * This parameter can be one of the following values: - * @arg NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority, - * 4 bits for subpriority - * @arg NVIC_PRIORITYGROUP_1: 1 bit for pre-emption priority, - * 3 bits for subpriority - * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority, - * 2 bits for subpriority - * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority, - * 1 bit for subpriority - * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority, - * 0 bit for subpriority - * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. - * The pending IRQ priority will be managed only by the subpriority. - * @retval None - */ -void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - /* Check the parameters */ - assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); - - /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ - NVIC_SetPriorityGrouping(PriorityGroup); -} - -/** - * @brief Set the priority of an interrupt. - * @param IRQn: External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @param PreemptPriority: The pre-emption priority for the IRQn channel. - * This parameter can be a value between 0 and 15 - * A lower priority value indicates a higher priority - * @param SubPriority: the subpriority level for the IRQ channel. - * This parameter can be a value between 0 and 15 - * A lower priority value indicates a higher priority. - * @retval None - */ -void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t prioritygroup = 0x00; - - /* Check the parameters */ - assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); - assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); - - prioritygroup = NVIC_GetPriorityGrouping(); - - NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); -} - -/** - * @brief Enable a device specific interrupt in the NVIC interrupt controller. - * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() - * function should be called before. - * @param IRQn External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval None - */ -void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) -{ - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Enable interrupt */ - NVIC_EnableIRQ(IRQn); -} - -/** - * @brief Disable a device specific interrupt in the NVIC interrupt controller. - * @param IRQn External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval None - */ -void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) -{ - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Disable interrupt */ - NVIC_DisableIRQ(IRQn); -} - -/** - * @brief Initiate a system reset request to reset the MCU. - * @retval None - */ -void HAL_NVIC_SystemReset(void) -{ - /* System Reset */ - NVIC_SystemReset(); -} - -/** - * @brief Initialize the System Timer with interrupt enabled and start the System Tick Timer (SysTick): - * Counter is in free running mode to generate periodic interrupts. - * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. - * @retval status: - 0 Function succeeded. - * - 1 Function failed. - */ -uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) -{ - return SysTick_Config(TicksNumb); -} -/** - * @} - */ - -/** @addtogroup CORTEX_Exported_Functions_Group2 - * @brief Cortex control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to control the CORTEX - (NVIC, SYSTICK, MPU) functionalities. - - -@endverbatim - * @{ - */ - -/** - * @brief Get the priority grouping field from the NVIC Interrupt Controller. - * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field) - */ -uint32_t HAL_NVIC_GetPriorityGrouping(void) -{ - /* Get the PRIGROUP[10:8] field value */ - return NVIC_GetPriorityGrouping(); -} - -/** - * @brief Get the priority of an interrupt. - * @param IRQn: External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @param PriorityGroup: the priority grouping bits length. - * This parameter can be one of the following values: - * @arg NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority, - * 4 bits for subpriority - * @arg NVIC_PRIORITYGROUP_1: 1 bit for pre-emption priority, - * 3 bits for subpriority - * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority, - * 2 bits for subpriority - * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority, - * 1 bit for subpriority - * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority, - * 0 bit for subpriority - * @param pPreemptPriority: Pointer on the Preemptive priority value (starting from 0). - * @param pSubPriority: Pointer on the Subpriority value (starting from 0). - * @retval None - */ -void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority) -{ - /* Check the parameters */ - assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); - /* Get priority for Cortex-M system or device specific interrupts */ - NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority); -} - -/** - * @brief Set Pending bit of an external interrupt. - * @param IRQn External interrupt number - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval None - */ -void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Set interrupt pending */ - NVIC_SetPendingIRQ(IRQn); -} - -/** - * @brief Get Pending Interrupt (read the pending register in the NVIC - * and return the pending bit for the specified interrupt). - * @param IRQn External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval status: - 0 Interrupt status is not pending. - * - 1 Interrupt status is pending. - */ -uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Return 1 if pending else 0 */ - return NVIC_GetPendingIRQ(IRQn); -} - -/** - * @brief Clear the pending bit of an external interrupt. - * @param IRQn External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval None - */ -void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Clear pending interrupt */ - NVIC_ClearPendingIRQ(IRQn); -} - -/** - * @brief Get active interrupt (read the active register in NVIC and return the active bit). - * @param IRQn External interrupt number - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval status: - 0 Interrupt status is not pending. - * - 1 Interrupt status is pending. - */ -uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn) -{ - /* Return 1 if active else 0 */ - return NVIC_GetActive(IRQn); -} - -/** - * @brief Configure the SysTick clock source. - * @param CLKSource: specifies the SysTick clock source. - * This parameter can be one of the following values: - * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source. - * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. - * @retval None - */ -void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) -{ - /* Check the parameters */ - assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); - if (CLKSource == SYSTICK_CLKSOURCE_HCLK) - { - SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; - } - else - { - SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; - } -} - -/** - * @brief Handle SYSTICK interrupt request. - * @retval None - */ -void HAL_SYSTICK_IRQHandler(void) -{ - HAL_SYSTICK_Callback(); -} - -/** - * @brief SYSTICK callback. - * @retval None - */ -__weak void HAL_SYSTICK_Callback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SYSTICK_Callback could be implemented in the user file - */ -} - -#if (__MPU_PRESENT == 1) -/** - * @brief Disable the MPU. - * @retval None - */ -void HAL_MPU_Disable(void) -{ - /* Make sure outstanding transfers are done */ - __DMB(); - - /* Disable fault exceptions */ - SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; - - /* Disable the MPU and clear the control register*/ - MPU->CTRL = 0U; -} - -/** - * @brief Enable the MPU. - * @param MPU_Control: Specifies the control mode of the MPU during hard fault, - * NMI, FAULTMASK and privileged accessto the default memory - * This parameter can be one of the following values: - * @arg MPU_HFNMI_PRIVDEF_NONE - * @arg MPU_HARDFAULT_NMI - * @arg MPU_PRIVILEGED_DEFAULT - * @arg MPU_HFNMI_PRIVDEF - * @retval None - */ -void HAL_MPU_Enable(uint32_t MPU_Control) -{ - /* Enable the MPU */ - MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; - - /* Enable fault exceptions */ - SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; - - /* Ensure MPU settings take effects */ - __DSB(); - __ISB(); -} - -/** - * @brief Initialize and configure the Region and the memory to be protected. - * @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains - * the initialization and configuration information. - * @retval None - */ -void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) -{ - /* Check the parameters */ - assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number)); - assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable)); - - /* Set the Region number */ - MPU->RNR = MPU_Init->Number; - - if ((MPU_Init->Enable) != RESET) - { - /* Check the parameters */ - assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec)); - assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission)); - assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField)); - assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable)); - assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); - assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); - assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); - assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); - - MPU->RBAR = MPU_Init->BaseAddress; - MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) | - ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | - ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | - ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | - ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | - ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | - ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); - } - else - { - MPU->RBAR = 0x00; - MPU->RASR = 0x00; - } -} -#endif /* __MPU_PRESENT */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_CORTEX_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c deleted file mode 100644 index 8d30b49a..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +++ /dev/null @@ -1,1179 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dma.c - * @author MCD Application Team - * @brief DMA HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Direct Memory Access (DMA) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral State and errors functions - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Enable and configure the peripheral to be connected to the DMA Channel - (except for internal SRAM / FLASH memories: no initialization is - necessary). Please refer to the Reference manual for connection between peripherals - and DMA requests. - - (#) For a given Channel, program the required configuration through the following parameters: - Channel request, Transfer Direction, Source and Destination data formats, - Circular or Normal mode, Channel Priority level, Source and Destination Increment mode - using HAL_DMA_Init() function. - - Prior to HAL_DMA_Init the peripheral clock shall be enabled for both DMA & DMAMUX - thanks to: - (##) DMA1 or DMA2: __HAL_RCC_DMA1_CLK_ENABLE() or __HAL_RCC_DMA2_CLK_ENABLE() ; - (##) DMAMUX1: __HAL_RCC_DMAMUX1_CLK_ENABLE(); - - (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error - detection. - - (#) Use HAL_DMA_Abort() function to abort the current transfer - - -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. - - *** Polling mode IO operation *** - ================================= - [..] - (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source - address and destination address and the Length of data to be transferred - (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this - case a fixed Timeout can be configured by User depending from his application. - - *** Interrupt mode IO operation *** - =================================== - [..] - (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() - (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() - (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of - Source address and destination address and the Length of data to be transferred. - In this case the DMA interrupt is configured - (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine - (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can - add his own function to register callbacks with HAL_DMA_RegisterCallback(). - - *** DMA HAL driver macros list *** - ============================================= - [..] - Below the list of macros in DMA HAL driver. - - (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel. - (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel. - (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags. - (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags. - (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts. - (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts. - (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt is enabled or not. - - [..] - (@) You can refer to the DMA HAL driver header file for more useful macros - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup DMA DMA - * @brief DMA HAL module driver - * @{ - */ - -#ifdef HAL_DMA_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup DMA_Private_Functions DMA Private Functions - * @{ - */ -static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); -#if defined(DMAMUX1) -static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma); -static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma); -#endif /* DMAMUX1 */ - -/** - * @} - */ - -/* Exported functions ---------------------------------------------------------*/ - -/** @defgroup DMA_Exported_Functions DMA Exported Functions - * @{ - */ - -/** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and de-initialization functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] - This section provides functions allowing to initialize the DMA Channel source - and destination addresses, incrementation and data sizes, transfer direction, - circular/normal mode selection, memory-to-memory mode selection and Channel priority value. - [..] - The HAL_DMA_Init() function follows the DMA configuration procedures as described in - reference manual. - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the DMA according to the specified - * parameters in the DMA_InitTypeDef and initialize the associated handle. - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) -{ - uint32_t tmp = 0; - - /* Check the DMA handle allocation */ - if(hdma == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); - assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); - assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); - assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); - assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); - assert_param(IS_DMA_MODE(hdma->Init.Mode)); - assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); - - assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request)); - - /* Compute the channel index */ - if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) - { - /* DMA1 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; - hdma->DmaBaseAddress = DMA1; - } - else - { - /* DMA2 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; - hdma->DmaBaseAddress = DMA2; - } - - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - - /* Get the CR register value */ - tmp = hdma->Instance->CCR; - - /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and MEM2MEM bits */ - tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | - DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | - DMA_CCR_DIR | DMA_CCR_MEM2MEM)); - - /* Prepare the DMA Channel configuration */ - tmp |= hdma->Init.Direction | - hdma->Init.PeriphInc | hdma->Init.MemInc | - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - hdma->Init.Mode | hdma->Init.Priority; - - /* Write to DMA Channel CR register */ - hdma->Instance->CCR = tmp; - - -#if defined(DMAMUX1) - /* Initialize parameters for DMAMUX channel : - DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask - */ - DMA_CalcDMAMUXChannelBaseAndMask(hdma); - - if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY) - { - /* if memory to memory force the request to 0*/ - hdma->Init.Request = DMA_REQUEST_MEM2MEM; - } - - /* Set peripheral request to DMAMUX channel */ - hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID); - - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - if(((hdma->Init.Request > 0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) - { - /* Initialize parameters for DMAMUX request generator : - DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask - */ - DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); - - /* Reset the DMAMUX request generator register*/ - hdma->DMAmuxRequestGen->RGCR = 0U; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } - else - { - hdma->DMAmuxRequestGen = 0U; - hdma->DMAmuxRequestGenStatus = 0U; - hdma->DMAmuxRequestGenStatusMask = 0U; - } -#endif /* DMAMUX1 */ - -#if !defined (DMAMUX1) - - /* Set request selection */ - if(hdma->Init.Direction != DMA_MEMORY_TO_MEMORY) - { - /* Write to DMA channel selection register */ - if (DMA1 == hdma->DmaBaseAddress) - { - /* Reset request selection for DMA1 Channelx */ - DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << hdma->ChannelIndex); - - /* Configure request selection for DMA1 Channelx */ - DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex)); - } - else /* DMA2 */ - { - /* Reset request selection for DMA2 Channelx */ - DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << hdma->ChannelIndex); - - /* Configure request selection for DMA2 Channelx */ - DMA2_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex)); - } - } - -#endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L442xx || STM32L486xx */ - /* STM32L496xx || STM32L4A6xx */ - - /* Clean callbacks */ - hdma->XferCpltCallback = NULL; - hdma->XferHalfCpltCallback = NULL; - hdma->XferErrorCallback = NULL; - hdma->XferAbortCallback = NULL; - - /* Initialise the error code */ - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - - /* Initialize the DMA state*/ - hdma->State = HAL_DMA_STATE_READY; - - /* Allocate lock resource and initialize it */ - hdma->Lock = HAL_UNLOCKED; - - return HAL_OK; -} - -/** - * @brief DeInitialize the DMA peripheral. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) -{ - - /* Check the DMA handle allocation */ - if (NULL == hdma ) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - - /* Disable the selected DMA Channelx */ - __HAL_DMA_DISABLE(hdma); - - /* Compute the channel index */ - if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) - { - /* DMA1 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; - hdma->DmaBaseAddress = DMA1; - } - else - { - /* DMA2 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; - hdma->DmaBaseAddress = DMA2; - } - - /* Reset DMA Channel control register */ - hdma->Instance->CCR = 0; - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex)); - -#if !defined (DMAMUX1) - - /* Reset DMA channel selection register */ - if (DMA1 == hdma->DmaBaseAddress) - { - /* DMA1 */ - DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex)); - } - else - { - /* DMA2 */ - DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex)); - } -#endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L442xx || STM32L486xx */ - /* STM32L496xx || STM32L4A6xx */ - -#if defined(DMAMUX1) - - /* Initialize parameters for DMAMUX channel : - DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask */ - - DMA_CalcDMAMUXChannelBaseAndMask(hdma); - - /* Reset the DMAMUX channel that corresponds to the DMA channel */ - hdma->DMAmuxChannel->CCR = 0; - - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - /* Reset Request generator parameters if any */ - if(((hdma->Init.Request > 0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) - { - /* Initialize parameters for DMAMUX request generator : - DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask - */ - DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); - - /* Reset the DMAMUX request generator register*/ - hdma->DMAmuxRequestGen->RGCR = 0U; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } - - hdma->DMAmuxRequestGen = 0U; - hdma->DMAmuxRequestGenStatus = 0U; - hdma->DMAmuxRequestGenStatusMask = 0U; - -#endif /* DMAMUX1 */ - - /* Initialise the error code */ - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - - /* Initialize the DMA state */ - hdma->State = HAL_DMA_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hdma); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions - * @brief Input and Output operation functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Configure the source, destination address and data length and Start DMA transfer - (+) Configure the source, destination address and data length and - Start DMA transfer with interrupt - (+) Abort DMA transfer - (+) Poll for transfer complete - (+) Handle DMA interrupt request - -@endverbatim - * @{ - */ - -/** - * @brief Start the DMA Transfer. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param SrcAddress: The source memory Buffer address - * @param DstAddress: The destination memory Buffer address - * @param DataLength: The length of data to be transferred from source to destination - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_DMA_BUFFER_SIZE(DataLength)); - - /* Process locked */ - __HAL_LOCK(hdma); - - if(HAL_DMA_STATE_READY == hdma->State) - { - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - - /* Disable the peripheral */ - __HAL_DMA_DISABLE(hdma); - - /* Configure the source, destination address and the data length & clear flags*/ - DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - - /* Enable the Peripheral */ - __HAL_DMA_ENABLE(hdma); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - status = HAL_BUSY; - } - return status; -} - -/** - * @brief Start the DMA Transfer with interrupt enabled. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param SrcAddress: The source memory Buffer address - * @param DstAddress: The destination memory Buffer address - * @param DataLength: The length of data to be transferred from source to destination - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_DMA_BUFFER_SIZE(DataLength)); - - /* Process locked */ - __HAL_LOCK(hdma); - - if(HAL_DMA_STATE_READY == hdma->State) - { - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - - /* Disable the peripheral */ - __HAL_DMA_DISABLE(hdma); - - /* Configure the source, destination address and the data length & clear flags*/ - DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - - /* Enable the transfer complete interrupt */ - /* Enable the transfer Error interrupt */ - if(NULL != hdma->XferHalfCpltCallback ) - { - /* Enable the Half transfer complete interrupt as well */ - __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - } - else - { - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); - } - -#ifdef DMAMUX1 - - /* Check if DMAMUX Synchronization is enabled*/ - if((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U) - { - /* Enable DMAMUX sync overrun IT*/ - hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE; - } - - if(hdma->DMAmuxRequestGen != 0U) - { - /* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/ - /* enable the request gen overrun IT*/ - hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; - } - -#endif /* DMAMUX1 */ - - /* Enable the Peripheral */ - __HAL_DMA_ENABLE(hdma); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - /* Remain BUSY */ - status = HAL_BUSY; - } - return status; -} - -/** - * @brief Abort the DMA Transfer. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the DMA peripheral handle */ - if(NULL == hdma) - { - return HAL_ERROR; - } - - /* Disable DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - -#if defined(DMAMUX1) - /* disable the DMAMUX sync overrun IT*/ - hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; -#endif /* DMAMUX1 */ - - /* Disable the channel */ - __HAL_DMA_DISABLE(hdma); - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - -#if defined(DMAMUX1) - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - if(hdma->DMAmuxRequestGen != 0U) - { - /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/ - /* disable the request gen overrun IT*/ - hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } - -#endif /* DMAMUX1 */ - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - return status; -} - -/** - * @brief Aborts the DMA Transfer in Interrupt mode. - * @param hdma : pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) -{ - HAL_StatusTypeDef status = HAL_OK; - - if(HAL_DMA_STATE_BUSY != hdma->State) - { - /* no transfer ongoing */ - hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - - status = HAL_ERROR; - } - else - { - /* Disable DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - - /* Disable the channel */ - __HAL_DMA_DISABLE(hdma); - -#if defined(DMAMUX1) - /* disable the DMAMUX sync overrun IT*/ - hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - if(hdma->DMAmuxRequestGen != 0U) - { - /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/ - /* disable the request gen overrun IT*/ - hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } - -#else - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); -#endif /* DMAMUX1 */ - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - /* Call User Abort callback */ - if(hdma->XferAbortCallback != NULL) - { - hdma->XferAbortCallback(hdma); - } - } - return status; -} - -/** - * @brief Polling for transfer complete. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param CompleteLevel: Specifies the DMA level complete. - * @param Timeout: Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout) -{ - uint32_t temp; - uint32_t tickstart = 0; - - if(HAL_DMA_STATE_BUSY != hdma->State) - { - /* no transfer ongoing */ - hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - __HAL_UNLOCK(hdma); - return HAL_ERROR; - } - - /* Polling mode not supported in circular mode */ - if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC)) - { - hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; - return HAL_ERROR; - } - - /* Get the level transfer complete flag */ - if (HAL_DMA_FULL_TRANSFER == CompleteLevel) - { - /* Transfer Complete flag */ - temp = DMA_FLAG_TC1 << hdma->ChannelIndex; - } - else - { - /* Half Transfer Complete flag */ - temp = DMA_FLAG_HT1 << hdma->ChannelIndex; - } - - /* Get tick */ - tickstart = HAL_GetTick(); - - while(RESET == (hdma->DmaBaseAddress->ISR & temp)) - { - if((RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex)))) - { - /* When a DMA transfer error occurs */ - /* A hardware clear of its EN bits is performed */ - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TE; - - /* Change the DMA state */ - hdma->State= HAL_DMA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - return HAL_ERROR; - } - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) - { - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - return HAL_ERROR; - } - } - } - -#if defined(DMAMUX1) - /*Check for DMAMUX Request generator (if used) overrun status */ - if(hdma->DMAmuxRequestGen != 0U) - { - /* if using DMAMUX request generator Check for DMAMUX request generator overrun */ - if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U) - { - /* Disable the request gen overrun interrupt */ - hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN; - } - } - - /* Check for DMAMUX Synchronization overrun */ - if((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U) - { - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_SYNC; - } -#endif /* DMAMUX1 */ - - if(HAL_DMA_FULL_TRANSFER == CompleteLevel) - { - /* Clear the transfer complete flag */ - hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << hdma->ChannelIndex); - - /* The selected Channelx EN bit is cleared (DMA is disabled and - all transfers are complete) */ - hdma->State = HAL_DMA_STATE_READY; - } - else - { - /* Clear the half transfer complete flag */ - hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << hdma->ChannelIndex); - } - - /* Process unlocked */ - __HAL_UNLOCK(hdma); - - return HAL_OK; -} - -/** - * @brief Handle DMA interrupt request. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval None - */ -void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) -{ - uint32_t flag_it = hdma->DmaBaseAddress->ISR; - uint32_t source_it = hdma->Instance->CCR; - - /* Half Transfer Complete Interrupt management ******************************/ - if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT))) - { - /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ - if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) - { - /* Disable the half transfer interrupt */ - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - } - /* Clear the half transfer complete flag */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_HTIF1 << hdma->ChannelIndex); - - /* DMA peripheral state is not updated in Half Transfer */ - /* but in Transfer Complete case */ - - if(hdma->XferHalfCpltCallback != NULL) - { - /* Half transfer callback */ - hdma->XferHalfCpltCallback(hdma); - } - } - - /* Transfer Complete Interrupt management ***********************************/ - else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TC))) - { - if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) - { - /* Disable the transfer complete and error interrupt */ - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - } - /* Clear the transfer complete flag */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << hdma->ChannelIndex); - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - if(hdma->XferCpltCallback != NULL) - { - /* Transfer complete callback */ - hdma->XferCpltCallback(hdma); - } - } - - /* Transfer Error Interrupt management **************************************/ - else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) - { - /* When a DMA transfer error occurs */ - /* A hardware clear of its EN bits is performed */ - /* Disable ALL DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TE; - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - if (hdma->XferErrorCallback != NULL) - { - /* Transfer error callback */ - hdma->XferErrorCallback(hdma); - } - } - return; -} - -/** - * @brief Register callbacks - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param CallbackID: User Callback identifer - * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. - * @param pCallback: pointer to private callbacsk function which has pointer to - * a DMA_HandleTypeDef structure as parameter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma)) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hdma); - - if(HAL_DMA_STATE_READY == hdma->State) - { - switch (CallbackID) - { - case HAL_DMA_XFER_CPLT_CB_ID: - hdma->XferCpltCallback = pCallback; - break; - - case HAL_DMA_XFER_HALFCPLT_CB_ID: - hdma->XferHalfCpltCallback = pCallback; - break; - - case HAL_DMA_XFER_ERROR_CB_ID: - hdma->XferErrorCallback = pCallback; - break; - - case HAL_DMA_XFER_ABORT_CB_ID: - hdma->XferAbortCallback = pCallback; - break; - - default: - status = HAL_ERROR; - break; - } - } - else - { - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hdma); - - return status; -} - -/** - * @brief UnRegister callbacks - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param CallbackID: User Callback identifer - * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hdma); - - if(HAL_DMA_STATE_READY == hdma->State) - { - switch (CallbackID) - { - case HAL_DMA_XFER_CPLT_CB_ID: - hdma->XferCpltCallback = NULL; - break; - - case HAL_DMA_XFER_HALFCPLT_CB_ID: - hdma->XferHalfCpltCallback = NULL; - break; - - case HAL_DMA_XFER_ERROR_CB_ID: - hdma->XferErrorCallback = NULL; - break; - - case HAL_DMA_XFER_ABORT_CB_ID: - hdma->XferAbortCallback = NULL; - break; - - case HAL_DMA_XFER_ALL_CB_ID: - hdma->XferCpltCallback = NULL; - hdma->XferHalfCpltCallback = NULL; - hdma->XferErrorCallback = NULL; - hdma->XferAbortCallback = NULL; - break; - - default: - status = HAL_ERROR; - break; - } - } - else - { - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hdma); - - return status; -} - -/** - * @} - */ - - - -/** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions - * @brief Peripheral State and Errors functions - * -@verbatim - =============================================================================== - ##### Peripheral State and Errors functions ##### - =============================================================================== - [..] - This subsection provides functions allowing to - (+) Check the DMA state - (+) Get error code - -@endverbatim - * @{ - */ - -/** - * @brief Return the DMA hande state. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL state - */ -HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) -{ - /* Return DMA handle state */ - return hdma->State; -} - -/** - * @brief Return the DMA error code. - * @param hdma : pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval DMA Error Code - */ -uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) -{ - return hdma->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup DMA_Private_Functions - * @{ - */ - -/** - * @brief Sets the DMA Transfer parameter. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param SrcAddress: The source memory Buffer address - * @param DstAddress: The destination memory Buffer address - * @param DataLength: The length of data to be transferred from source to destination - * @retval HAL status - */ -static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ -#if defined(DMAMUX1) - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - if(hdma->DMAmuxRequestGen != 0U) - { - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } -#endif - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - - /* Configure DMA Channel data length */ - hdma->Instance->CNDTR = DataLength; - - /* Peripheral to Memory */ - if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - { - /* Configure DMA Channel destination address */ - hdma->Instance->CPAR = DstAddress; - - /* Configure DMA Channel source address */ - hdma->Instance->CMAR = SrcAddress; - } - /* Memory to Peripheral */ - else - { - /* Configure DMA Channel source address */ - hdma->Instance->CPAR = SrcAddress; - - /* Configure DMA Channel destination address */ - hdma->Instance->CMAR = DstAddress; - } -} - -#if defined(DMAMUX1) - -/** - * @brief Updates the DMA handle with the DMAMUX channel and status mask depending on stream number - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval None - */ -static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma) -{ - uint32_t channel_number = 0; - DMAMUX_Channel_TypeDef *DMAMUX1_ChannelBase; - - /* check if instance is not outside the DMA channel range */ - if ((uint32_t)hdma->Instance < (uint32_t)DMA2_Channel1) - { - /* DMA1 */ - DMAMUX1_ChannelBase = DMAMUX1_Channel0; - } - else - { - /* DMA2 */ - DMAMUX1_ChannelBase = DMAMUX1_Channel7; - } - channel_number = (((uint32_t)hdma->Instance & 0xFF) - 8) / 20; - hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)((uint32_t)DMAMUX1_ChannelBase + (hdma->ChannelIndex >> 2) * ((uint32_t)DMAMUX1_Channel1 - (uint32_t)DMAMUX1_Channel0)); - hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; - hdma->DMAmuxChannelStatusMask = 1U << channel_number; -} - -/** - * @brief Updates the DMA handle with the DMAMUX request generator params - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval None - */ - -static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma) -{ - uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID; - - /* DMA Channels are connected to DMAMUX1 request generator blocks*/ - hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U))); - - hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus; - - hdma->DMAmuxRequestGenStatusMask = 1U << (request - 1U); -} - -#endif /* DMAMUX1 */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_DMA_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c deleted file mode 100644 index 50b09d59..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +++ /dev/null @@ -1,319 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dma_ex.c - * @author MCD Application Team - * @brief DMA Extension HAL module driver - * This file provides firmware functions to manage the following - * functionalities of the DMA Extension peripheral: - * + Extended features functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The DMA Extension HAL driver can be used as follows: - - (+) Configure the DMA_MUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function. - (+) Configure the DMA_MUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function. - Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used - to respectively enable/disable the request generator. - - (+) To handle the DMAMUX Interrupts, the function HAL_DMAEx_MUX_IRQHandler should be called from - the DMAMUX IRQ handler i.e DMAMUX1_OVR_IRQHandler. - As only one interrupt line is available for all DMAMUX channels and request generators , HAL_DMAEx_MUX_IRQHandler should be - called with, as parameter, the appropriate DMA handle as many as used DMAs in the user project - (exception done if a given DMA is not using the DMAMUX SYNC block neither a request generator) - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -#if defined(DMAMUX1) - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup DMAEx DMAEx - * @brief DMA Extended HAL module driver - * @{ - */ - -#ifdef HAL_DMA_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private Constants ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - - -/** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions - * @{ - */ - -/** @defgroup DMAEx_Exported_Functions_Group1 DMAEx Extended features functions - * @brief Extended features functions - * -@verbatim - =============================================================================== - ##### Extended features functions ##### - =============================================================================== - [..] This section provides functions allowing to: - - (+) Configure the DMAMUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function. - (+) Configure the DMAMUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function. - Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used - to respectively enable/disable the request generator. - -@endverbatim - * @{ - */ - - -/** - * @brief Configure the DMAMUX synchronization parameters for a given DMA channel (instance). - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA channel. - * @param pSyncConfig : pointer to HAL_DMA_MuxSyncConfigTypeDef : contains the DMAMUX synchronization parameters - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - - assert_param(IS_DMAMUX_SYNC_SIGNAL_ID(pSyncConfig->SyncSignalID)); - - assert_param(IS_DMAMUX_SYNC_POLARITY(pSyncConfig-> SyncPolarity)); - assert_param(IS_DMAMUX_SYNC_STATE(pSyncConfig->SyncEnable)); - assert_param(IS_DMAMUX_SYNC_EVENT(pSyncConfig->EventEnable)); - assert_param(IS_DMAMUX_SYNC_REQUEST_NUMBER(pSyncConfig->RequestNumber)); - - /*Check if the DMA state is ready */ - if(hdma->State == HAL_DMA_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hdma); - - /* Set the new synchronization parameters (and keep the request ID filled during the Init)*/ - MODIFY_REG( hdma->DMAmuxChannel->CCR, \ - (~DMAMUX_CxCR_DMAREQ_ID) , \ - ((pSyncConfig->SyncSignalID) << DMAMUX_CxCR_SYNC_ID_Pos) | ((pSyncConfig->RequestNumber - 1U) << DMAMUX_CxCR_NBREQ_Pos) | \ - pSyncConfig->SyncPolarity | (pSyncConfig->SyncEnable << DMAMUX_CxCR_SE_Pos) | \ - (pSyncConfig->EventEnable << DMAMUX_CxCR_EGE_Pos)); - - /* Process UnLocked */ - __HAL_UNLOCK(hdma); - - return HAL_OK; - } - else - { - /*DMA State not Ready*/ - return HAL_ERROR; - } -} - -/** - * @brief Configure the DMAMUX request generator block used by the given DMA channel (instance). - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA channel. - * @param pRequestGeneratorConfig : pointer to HAL_DMA_MuxRequestGeneratorConfigTypeDef : - * contains the request generator parameters. - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - - assert_param(IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(pRequestGeneratorConfig->SignalID)); - - assert_param(IS_DMAMUX_REQUEST_GEN_POLARITY(pRequestGeneratorConfig->Polarity)); - assert_param(IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(pRequestGeneratorConfig->RequestNumber)); - - /* check if the DMA state is ready - and DMA is using a DMAMUX request generator block - */ - if((hdma->State == HAL_DMA_STATE_READY) && (hdma->DMAmuxRequestGen != 0U)) - { - /* Process Locked */ - __HAL_LOCK(hdma); - - /* Set the request generator new parameters*/ - hdma->DMAmuxRequestGen->RGCR = pRequestGeneratorConfig->SignalID | \ - ((pRequestGeneratorConfig->RequestNumber - 1U) << POSITION_VAL(DMAMUX_RGxCR_GNBREQ))| \ - pRequestGeneratorConfig->Polarity; - /* Process UnLocked */ - __HAL_UNLOCK(hdma); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Enable the DMAMUX request generator block used by the given DMA channel (instance). - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - - /* check if the DMA state is ready - and DMA is using a DMAMUX request generator block - */ - if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0)) - { - - /* Enable the request generator*/ - hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_GE; - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Disable the DMAMUX request generator block used by the given DMA channel (instance). - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - - /* check if the DMA state is ready - and DMA is using a DMAMUX request generator block - */ - if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0)) - { - - /* Disable the request generator*/ - hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_GE; - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Handles DMAMUX interrupt request. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA channel. - * @retval None - */ -void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma) -{ - /* Check for DMAMUX Synchronization overrun */ - if((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U) - { - /* Disable the synchro overrun interrupt */ - hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_SYNC; - - if(hdma->XferErrorCallback != NULL) - { - /* Transfer error callback */ - hdma->XferErrorCallback(hdma); - } - } - - if(hdma->DMAmuxRequestGen != 0) - { - /* if using a DMAMUX request generator block Check for DMAMUX request generator overrun */ - if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U) - { - /* Disable the request gen overrun interrupt */ - hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN; - - if(hdma->XferErrorCallback != NULL) - { - /* Transfer error callback */ - hdma->XferErrorCallback(hdma); - } - } - } -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_DMA_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* DMAMUX1 */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c deleted file mode 100644 index 0c035a60..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +++ /dev/null @@ -1,835 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash.c - * @author MCD Application Team - * @brief FLASH HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the internal FLASH memory: - * + Program operations functions - * + Memory Control functions - * + Peripheral Errors functions - * - @verbatim - ============================================================================== - ##### FLASH peripheral features ##### - ============================================================================== - - [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses - to the Flash memory. It implements the erase and program Flash memory operations - and the read and write protection mechanisms. - - [..] The Flash memory interface accelerates code execution with a system of instruction - prefetch and cache lines. - - [..] The FLASH main features are: - (+) Flash memory read operations - (+) Flash memory program/erase operations - (+) Read / write protections - (+) Option bytes programming - (+) Prefetch on I-Code - (+) 32 cache lines of 4*64 bits on I-Code - (+) 8 cache lines of 4*64 bits on D-Code - (+) Error code correction (ECC) : Data in flash are 72-bits word - (8 bits added per double word) - - - ##### How to use this driver ##### - ============================================================================== - [..] - This driver provides functions and macros to configure and program the FLASH - memory of all STM32L4xx devices. - - (#) Flash Memory IO Programming functions: - (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and - HAL_FLASH_Lock() functions - (++) Program functions: double word and fast program (full row programming) - (++) There Two modes of programming : - (+++) Polling mode using HAL_FLASH_Program() function - (+++) Interrupt mode using HAL_FLASH_Program_IT() function - - (#) Interrupts and flags management functions : - (++) Handle FLASH interrupts by calling HAL_FLASH_IRQHandler() - (++) Callback functions are called when the flash operations are finished : - HAL_FLASH_EndOfOperationCallback() when everything is ok, otherwise - HAL_FLASH_OperationErrorCallback() - (++) Get error flag status by calling HAL_GetError() - - (#) Option bytes management functions : - (++) Lock and Unlock the option bytes using HAL_FLASH_OB_Unlock() and - HAL_FLASH_OB_Lock() functions - (++) Launch the reload of the option bytes using HAL_FLASH_Launch() function. - In this case, a reset is generated - - [..] - In addition to these functions, this driver includes a set of macros allowing - to handle the following operations: - (+) Set the latency - (+) Enable/Disable the prefetch buffer - (+) Enable/Disable the Instruction cache and the Data cache - (+) Reset the Instruction cache and the Data cache - (+) Enable/Disable the Flash power-down during low-power run and sleep modes - (+) Enable/Disable the Flash interrupts - (+) Monitor the Flash flags status - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup FLASH FLASH - * @brief FLASH HAL module driver - * @{ - */ - -#ifdef HAL_FLASH_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define FLASH_NB_DOUBLE_WORDS_IN_ROW 64 -#else -#define FLASH_NB_DOUBLE_WORDS_IN_ROW 32 -#endif -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/** @defgroup FLASH_Private_Variables FLASH Private Variables - * @{ - */ -/** - * @brief Variable used for Program/Erase sectors under interruption - */ -FLASH_ProcessTypeDef pFlash; -/** - * @} - */ - -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup FLASH_Private_Functions FLASH Private Functions - * @{ - */ -HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); -extern void FLASH_PageErase(uint32_t Page, uint32_t Banks); -extern void FLASH_FlushCaches(void); -static void FLASH_SetErrorCode(void); -static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data); -static void FLASH_Program_Fast(uint32_t Address, uint32_t DataAddress); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup FLASH_Exported_Functions FLASH Exported Functions - * @{ - */ - -/** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions - * @brief Programming operation functions - * -@verbatim - =============================================================================== - ##### Programming operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the FLASH - program operations. - -@endverbatim - * @{ - */ - -/** - * @brief Program double word or fast program of a row at a specified address. - * @param TypeProgram: Indicate the way to program at a specified address. - * This parameter can be a value of @ref FLASH_Type_Program - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed - * This parameter is the data for the double word program and the address where - * are stored the data for the row fast program - * - * @retval HAL_StatusTypeDef HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) -{ - HAL_StatusTypeDef status = HAL_ERROR; - uint32_t prog_bit = 0; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check the parameters */ - assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if(status == HAL_OK) - { - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - - /* Deactivate the data cache if they are activated to avoid data misbehavior */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_DISABLED; - } - - if(TypeProgram == FLASH_TYPEPROGRAM_DOUBLEWORD) - { - /* Program double-word (64-bit) at a specified address */ - FLASH_Program_DoubleWord(Address, Data); - prog_bit = FLASH_CR_PG; - } - else if((TypeProgram == FLASH_TYPEPROGRAM_FAST) || (TypeProgram == FLASH_TYPEPROGRAM_FAST_AND_LAST)) - { - /* Fast program a 32 row double-word (64-bit) at a specified address */ - FLASH_Program_Fast(Address, (uint32_t)Data); - - /* If it is the last row, the bit will be cleared at the end of the operation */ - if(TypeProgram == FLASH_TYPEPROGRAM_FAST_AND_LAST) - { - prog_bit = FLASH_CR_FSTPG; - } - } - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the program operation is completed, disable the PG or FSTPG Bit */ - if (prog_bit != 0) - { - CLEAR_BIT(FLASH->CR, prog_bit); - } - - /* Flush the caches to be sure of the data consistency */ - FLASH_FlushCaches(); - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - - return status; -} - -/** - * @brief Program double word or fast program of a row at a specified address with interrupt enabled. - * @param TypeProgram: Indicate the way to program at a specified address. - * This parameter can be a value of @ref FLASH_Type_Program - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed - * This parameter is the data for the double word program and the address where - * are stored the data for the row fast program - * - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - - /* Deactivate the data cache if they are activated to avoid data misbehavior */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_DISABLED; - } - - /* Set internal variables used by the IRQ handler */ - if(TypeProgram == FLASH_TYPEPROGRAM_FAST_AND_LAST) - { - pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAM_LAST; - } - else - { - pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAM; - } - pFlash.Address = Address; - - /* Enable End of Operation and Error interrupts */ - __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_OPERR); - - if(TypeProgram == FLASH_TYPEPROGRAM_DOUBLEWORD) - { - /* Program double-word (64-bit) at a specified address */ - FLASH_Program_DoubleWord(Address, Data); - } - else if((TypeProgram == FLASH_TYPEPROGRAM_FAST) || (TypeProgram == FLASH_TYPEPROGRAM_FAST_AND_LAST)) - { - /* Fast program a 32 row double-word (64-bit) at a specified address */ - FLASH_Program_Fast(Address, (uint32_t)Data); - } - - return status; -} - -/** - * @brief Handle FLASH interrupt request. - * @retval None - */ -void HAL_FLASH_IRQHandler(void) -{ - uint32_t tmp_page; - - /* If the operation is completed, disable the PG, PNB, MER1, MER2 and PER Bit */ - CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_MER1 | FLASH_CR_PER | FLASH_CR_PNB)); -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - CLEAR_BIT(FLASH->CR, FLASH_CR_MER2); -#endif - - /* Disable the FSTPG Bit only if it is the last row programmed */ - if(pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAM_LAST) - { - CLEAR_BIT(FLASH->CR, FLASH_CR_FSTPG); - } - - /* Check FLASH operation error flags */ - if((__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PROGERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGSERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_MISERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_FASTERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) || -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PEMPTY))) -#else - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD))) -#endif - { - /*Save the error code*/ - FLASH_SetErrorCode(); - - /* Flush the caches to be sure of the data consistency */ - FLASH_FlushCaches() ; - - /* FLASH error interrupt user callback */ - if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGE_ERASE) - { - HAL_FLASH_OperationErrorCallback(pFlash.Page); - } - else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASS_ERASE) - { - HAL_FLASH_OperationErrorCallback(pFlash.Bank); - } - else if((pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAM) || - (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAM_LAST)) - { - HAL_FLASH_OperationErrorCallback(pFlash.Address); - } - - /*Stop the procedure ongoing*/ - pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - } - - /* Check FLASH End of Operation flag */ - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) - { - /* Clear FLASH End of Operation pending bit */ - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); - - if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGE_ERASE) - { - /* Nb of pages to erased can be decreased */ - pFlash.NbPagesToErase--; - - /* Check if there are still pages to erase*/ - if(pFlash.NbPagesToErase != 0) - { - /* Indicate user which page has been erased*/ - HAL_FLASH_EndOfOperationCallback(pFlash.Page); - - /* Increment page number */ - pFlash.Page++; - tmp_page = pFlash.Page; - FLASH_PageErase(tmp_page, pFlash.Bank); - } - else - { - /* No more pages to Erase */ - /* Reset Address and stop Erase pages procedure */ - pFlash.Page = 0xFFFFFFFF; - pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - - /* Flush the caches to be sure of the data consistency */ - FLASH_FlushCaches() ; - - /* FLASH EOP interrupt user callback */ - HAL_FLASH_EndOfOperationCallback(pFlash.Page); - } - } - else - { - /* Flush the caches to be sure of the data consistency */ - FLASH_FlushCaches() ; - - if(pFlash.ProcedureOnGoing == FLASH_PROC_MASS_ERASE) - { - /* MassErase ended. Return the selected bank */ - /* FLASH EOP interrupt user callback */ - HAL_FLASH_EndOfOperationCallback(pFlash.Bank); - } - else if((pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAM) || - (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAM_LAST)) - { - /* Program ended. Return the selected address */ - /* FLASH EOP interrupt user callback */ - HAL_FLASH_EndOfOperationCallback(pFlash.Address); - } - - /*Clear the procedure ongoing*/ - pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - } - } - - if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE) - { - /* Disable End of Operation and Error interrupts */ - __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_OPERR); - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - } -} - -/** - * @brief FLASH end of operation interrupt callback. - * @param ReturnValue: The value saved in this parameter depends on the ongoing procedure - * Mass Erase: Bank number which has been requested to erase - * Page Erase: Page which has been erased - * (if 0xFFFFFFFF, it means that all the selected pages have been erased) - * Program: Address which was selected for data program - * @retval None - */ -__weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(ReturnValue); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_FLASH_EndOfOperationCallback could be implemented in the user file - */ -} - -/** - * @brief FLASH operation error interrupt callback. - * @param ReturnValue: The value saved in this parameter depends on the ongoing procedure - * Mass Erase: Bank number which has been requested to erase - * Page Erase: Page number which returned an error - * Program: Address which was selected for data program - * @retval None - */ -__weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(ReturnValue); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_FLASH_OperationErrorCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions - * @brief Management functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the FLASH - memory operations. - -@endverbatim - * @{ - */ - -/** - * @brief Unlock the FLASH control register access. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Unlock(void) -{ - HAL_StatusTypeDef status = HAL_OK; - - if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) - { - /* Authorize the FLASH Registers access */ - WRITE_REG(FLASH->KEYR, FLASH_KEY1); - WRITE_REG(FLASH->KEYR, FLASH_KEY2); - - /* Verify Flash is unlocked */ - if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) - { - status = HAL_ERROR; - } - } - - return status; -} - -/** - * @brief Lock the FLASH control register access. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Lock(void) -{ - /* Set the LOCK Bit to lock the FLASH Registers access */ - SET_BIT(FLASH->CR, FLASH_CR_LOCK); - - return HAL_OK; -} - -/** - * @brief Unlock the FLASH Option Bytes Registers access. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void) -{ - if(READ_BIT(FLASH->CR, FLASH_CR_OPTLOCK) != RESET) - { - /* Authorizes the Option Byte register programming */ - WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1); - WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); - } - else - { - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief Lock the FLASH Option Bytes Registers access. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_OB_Lock(void) -{ - /* Set the OPTLOCK Bit to lock the FLASH Option Byte Registers access */ - SET_BIT(FLASH->CR, FLASH_CR_OPTLOCK); - - return HAL_OK; -} - -/** - * @brief Launch the option byte loading. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_OB_Launch(void) -{ - /* Set the bit to force the option byte reloading */ - SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); - - /* Wait for last operation to be completed */ - return(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE)); -} - -/** - * @} - */ - -/** @defgroup FLASH_Exported_Functions_Group3 Peripheral State and Errors functions - * @brief Peripheral Errors functions - * -@verbatim - =============================================================================== - ##### Peripheral Errors functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time Errors of the FLASH peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Get the specific FLASH error flag. - * @retval FLASH_ErrorCode: The returned value can be: - * @arg HAL_FLASH_ERROR_RD: FLASH Read Protection error flag (PCROP) - * @arg HAL_FLASH_ERROR_PGS: FLASH Programming Sequence error flag - * @arg HAL_FLASH_ERROR_PGP: FLASH Programming Parallelism error flag - * @arg HAL_FLASH_ERROR_PGA: FLASH Programming Alignment error flag - * @arg HAL_FLASH_ERROR_WRP: FLASH Write protected error flag - * @arg HAL_FLASH_ERROR_OPERATION: FLASH operation Error flag - * @arg HAL_FLASH_ERROR_NONE: No error set - * @arg HAL_FLASH_ERROR_OP: FLASH Operation error - * @arg HAL_FLASH_ERROR_PROG: FLASH Programming error - * @arg HAL_FLASH_ERROR_WRP: FLASH Write protection error - * @arg HAL_FLASH_ERROR_PGA: FLASH Programming alignment error - * @arg HAL_FLASH_ERROR_SIZ: FLASH Size error - * @arg HAL_FLASH_ERROR_PGS: FLASH Programming sequence error - * @arg HAL_FLASH_ERROR_MIS: FLASH Fast programming data miss error - * @arg HAL_FLASH_ERROR_FAST: FLASH Fast programming error - * @arg HAL_FLASH_ERROR_RD: FLASH PCROP read error - * @arg HAL_FLASH_ERROR_OPTV: FLASH Option validity error - * @arg FLASH_FLAG_PEMPTY : FLASH Boot from not programmed flash (apply only for STM32L43x/STM32L44x devices) - * @arg HAL_FLASH_ERROR_ECCD: FLASH two ECC errors have been detected - */ -uint32_t HAL_FLASH_GetError(void) -{ - return pFlash.ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** @addtogroup FLASH_Private_Functions - * @{ - */ - -/** - * @brief Wait for a FLASH operation to complete. - * @param Timeout: maximum flash operation timeout - * @retval HAL_StatusTypeDef HAL Status - */ -HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) -{ - /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. - Even if the FLASH operation fails, the BUSY flag will be reset and an error - flag will be set */ - - uint32_t tickstart = HAL_GetTick(); - - while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) - { - if(Timeout != HAL_MAX_DELAY) - { - if((HAL_GetTick() - tickstart) >= Timeout) - { - return HAL_TIMEOUT; - } - } - } - - if((__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PROGERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGSERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_MISERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_FASTERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) || -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PEMPTY))) -#else - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD))) -#endif - { - /*Save the error code*/ - FLASH_SetErrorCode(); - - return HAL_ERROR; - } - - /* Check FLASH End of Operation flag */ - if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) - { - /* Clear FLASH End of Operation pending bit */ - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); - } - - /* If there is an error flag set */ - return HAL_OK; -} - -/** - * @brief Set the specific FLASH error flag. - * @retval None - */ -static void FLASH_SetErrorCode(void) -{ - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_OP; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PROGERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_SIZ; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGSERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_PGS; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_MISERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_MIS; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_FASTERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_FAST; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_RD; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_ECCD; - } - -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PEMPTY)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_PEMPTY; - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PEMPTY); - } -#endif - - /* Clear error programming flags */ - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS); -} - -/** - * @brief Program double-word (64-bit) at a specified address. - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed. - * @retval None - */ -static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data) -{ - /* Check the parameters */ - assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); - - /* Set PG bit */ - SET_BIT(FLASH->CR, FLASH_CR_PG); - - /* Program the double word */ - *(__IO uint32_t*)Address = (uint32_t)Data; - *(__IO uint32_t*)(Address+4) = (uint32_t)(Data >> 32); -} - -/** - * @brief Fast program a row double-word (64-bit) at a specified address. - * @param Address: specifies the address to be programmed. - * @param DataAddress: specifies the address where the data are stored. - * @retval None - */ -static void FLASH_Program_Fast(uint32_t Address, uint32_t DataAddress) -{ - uint8_t row_index = (2*FLASH_NB_DOUBLE_WORDS_IN_ROW); - __IO uint32_t *dest_addr = (__IO uint32_t*)Address; - __IO uint32_t *src_addr = (__IO uint32_t*)DataAddress; - - /* Check the parameters */ - assert_param(IS_FLASH_MAIN_MEM_ADDRESS(Address)); - - /* Set FSTPG bit */ - SET_BIT(FLASH->CR, FLASH_CR_FSTPG); - - /* Disable interrupts to avoid any interruption during the loop */ - __disable_irq(); - - /* Program the double word of the row */ - do - { - *dest_addr++ = *src_addr++; - } while (--row_index != 0); - - /* Re-enable the interrupts */ - __enable_irq(); -} - -/** - * @} - */ - -#endif /* HAL_FLASH_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c deleted file mode 100644 index 8f093595..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +++ /dev/null @@ -1,1305 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash_ex.c - * @author MCD Application Team - * @brief Extended FLASH HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the FLASH extended peripheral: - * + Extended programming operations functions - * - @verbatim - ============================================================================== - ##### Flash Extended features ##### - ============================================================================== - - [..] Comparing to other previous devices, the FLASH interface for STM32L4xx - devices contains the following additional features - - (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write - capability (RWW) - (+) Dual bank memory organization - (+) PCROP protection for all banks - - ##### How to use this driver ##### - ============================================================================== - [..] This driver provides functions to configure and program the FLASH memory - of all STM32L4xx devices. It includes - (#) Flash Memory Erase functions: - (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and - HAL_FLASH_Lock() functions - (++) Erase function: Erase page, erase all sectors - (++) There are two modes of erase : - (+++) Polling Mode using HAL_FLASHEx_Erase() - (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT() - - (#) Option Bytes Programming function: Use HAL_FLASHEx_OBProgram() to : - (++) Set/Reset the write protection - (++) Set the Read protection Level - (++) Program the user Option Bytes - (++) Configure the PCROP protection - - (#) Get Option Bytes Configuration function: Use HAL_FLASHEx_OBGetConfig() to : - (++) Get the value of a write protection area - (++) Know if the read protection is activated - (++) Get the value of the user Option Bytes - (++) Get the value of a PCROP area - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup FLASHEx FLASHEx - * @brief FLASH Extended HAL module driver - * @{ - */ - -#ifdef HAL_FLASH_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/** @defgroup FLASHEx_Private_Variables FLASHEx Private Variables - * @{ - */ -extern FLASH_ProcessTypeDef pFlash; -/** - * @} - */ - -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions - * @{ - */ -extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); -void FLASH_PageErase(uint32_t Page, uint32_t Banks); -static void FLASH_MassErase(uint32_t Banks); -void FLASH_FlushCaches(void); -static HAL_StatusTypeDef FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRDPEndOffset); -static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint32_t RDPLevel); -static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig); -static HAL_StatusTypeDef FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr); -static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRDPEndOffset); -static uint32_t FLASH_OB_GetRDP(void); -static uint32_t FLASH_OB_GetUser(void); -static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr, uint32_t * PCROPEndAddr); -/** - * @} - */ - -/* Exported functions -------------------------------------------------------*/ -/** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions - * @{ - */ - -/** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions - * @brief Extended IO operation functions - * -@verbatim - =============================================================================== - ##### Extended programming operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the Extended FLASH - programming operations Operations. - -@endverbatim - * @{ - */ -/** - * @brief Perform a mass erase or erase the specified FLASH memory pages. - * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that - * contains the configuration information for the erasing. - * - * @param[out] PageError : pointer to variable that contains the configuration - * information on faulty page in case of error (0xFFFFFFFF means that all - * the pages have been correctly erased) - * - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) -{ - HAL_StatusTypeDef status = HAL_ERROR; - uint32_t page_index = 0; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check the parameters */ - assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if (status == HAL_OK) - { - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - - /* Deactivate the cache if they are activated to avoid data misbehavior */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET) - { - /* Disable instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); - - if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_ICACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_ICACHE_ENABLED; - } - } - else if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_DISABLED; - } - - if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) - { - /* Mass erase to be done */ - FLASH_MassErase(pEraseInit->Banks); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - /* If the erase operation is completed, disable the MER1 and MER2 Bits */ - CLEAR_BIT(FLASH->CR, (FLASH_CR_MER1 | FLASH_CR_MER2)); -#else - /* If the erase operation is completed, disable the MER1 Bit */ - CLEAR_BIT(FLASH->CR, (FLASH_CR_MER1)); -#endif - } - else - { - /*Initialization of PageError variable*/ - *PageError = 0xFFFFFFFF; - - for(page_index = pEraseInit->Page; page_index < (pEraseInit->Page + pEraseInit->NbPages); page_index++) - { - FLASH_PageErase(page_index, pEraseInit->Banks); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the erase operation is completed, disable the PER Bit */ - CLEAR_BIT(FLASH->CR, (FLASH_CR_PER | FLASH_CR_PNB)); - - if (status != HAL_OK) - { - /* In case of error, stop erase procedure and return the faulty address */ - *PageError = page_index; - break; - } - } - } - - /* Flush the caches to be sure of the data consistency */ - FLASH_FlushCaches(); - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - - return status; -} - -/** - * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled. - * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that - * contains the configuration information for the erasing. - * - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check the parameters */ - assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); - - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - - /* Deactivate the cache if they are activated to avoid data misbehavior */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET) - { - /* Disable instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); - - if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_ICACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_ICACHE_ENABLED; - } - } - else if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_DISABLED; - } - - /* Enable End of Operation and Error interrupts */ - __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_OPERR); - - pFlash.Bank = pEraseInit->Banks; - - if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) - { - /* Mass erase to be done */ - pFlash.ProcedureOnGoing = FLASH_PROC_MASS_ERASE; - FLASH_MassErase(pEraseInit->Banks); - } - else - { - /* Erase by page to be done */ - pFlash.ProcedureOnGoing = FLASH_PROC_PAGE_ERASE; - pFlash.NbPagesToErase = pEraseInit->NbPages; - pFlash.Page = pEraseInit->Page; - - /*Erase 1st page and wait for IT */ - FLASH_PageErase(pEraseInit->Page, pEraseInit->Banks); - } - - return status; -} - -/** - * @brief Program Option bytes. - * @param pOBInit: pointer to an FLASH_OBInitStruct structure that - * contains the configuration information for the programming. - * - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check the parameters */ - assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); - - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - - /* Write protection configuration */ - if((pOBInit->OptionType & OPTIONBYTE_WRP) != RESET) - { - /* Configure of Write protection on the selected area */ - if(FLASH_OB_WRPConfig(pOBInit->WRPArea, pOBInit->WRPStartOffset, pOBInit->WRPEndOffset) != HAL_OK) - { - status = HAL_ERROR; - } - - } - - /* Read protection configuration */ - if((pOBInit->OptionType & OPTIONBYTE_RDP) != RESET) - { - /* Configure the Read protection level */ - if(FLASH_OB_RDPConfig(pOBInit->RDPLevel) != HAL_OK) - { - status = HAL_ERROR; - } - } - - /* User Configuration */ - if((pOBInit->OptionType & OPTIONBYTE_USER) != RESET) - { - /* Configure the user option bytes */ - if(FLASH_OB_UserConfig(pOBInit->USERType, pOBInit->USERConfig) != HAL_OK) - { - status = HAL_ERROR; - } - } - - /* PCROP Configuration */ - if((pOBInit->OptionType & OPTIONBYTE_PCROP) != RESET) - { - if (pOBInit->PCROPStartAddr != pOBInit->PCROPEndAddr) - { - /* Configure the Proprietary code readout protection */ - if(FLASH_OB_PCROPConfig(pOBInit->PCROPConfig, pOBInit->PCROPStartAddr, pOBInit->PCROPEndAddr) != HAL_OK) - { - status = HAL_ERROR; - } - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - - return status; -} - -/** - * @brief Get the Option bytes configuration. - * @param pOBInit: pointer to an FLASH_OBInitStruct structure that contains the - * configuration information. - * @note The fields pOBInit->WRPArea and pOBInit->PCROPConfig should indicate - * which area is requested for the WRP and PCROP, else no information will be returned - * - * @retval None - */ -void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) -{ - pOBInit->OptionType = (OPTIONBYTE_RDP | OPTIONBYTE_USER); - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if((pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAA) || (pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAB) || - (pOBInit->WRPArea == OB_WRPAREA_BANK2_AREAA) || (pOBInit->WRPArea == OB_WRPAREA_BANK2_AREAB)) -#else - if((pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAA) || (pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAB)) -#endif - { - pOBInit->OptionType |= OPTIONBYTE_WRP; - /* Get write protection on the selected area */ - FLASH_OB_GetWRP(pOBInit->WRPArea, &(pOBInit->WRPStartOffset), &(pOBInit->WRPEndOffset)); - } - - /* Get Read protection level */ - pOBInit->RDPLevel = FLASH_OB_GetRDP(); - - /* Get the user option bytes */ - pOBInit->USERConfig = FLASH_OB_GetUser(); - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if((pOBInit->PCROPConfig == FLASH_BANK_1) || (pOBInit->PCROPConfig == FLASH_BANK_2)) -#else - if(pOBInit->PCROPConfig == FLASH_BANK_1) -#endif - { - pOBInit->OptionType |= OPTIONBYTE_PCROP; - /* Get the Proprietary code readout protection */ - FLASH_OB_GetPCROP(&(pOBInit->PCROPConfig), &(pOBInit->PCROPStartAddr), &(pOBInit->PCROPEndAddr)); - } -} - -/** - * @} - */ - -#if defined (FLASH_CFGR_LVEN) -/** @defgroup FLASHEx_Exported_Functions_Group2 Extended specific configuration functions - * @brief Extended specific configuration functions - * -@verbatim - =============================================================================== - ##### Extended specific configuration functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the Extended FLASH - specific configurations. - -@endverbatim - * @{ - */ - -/** - * @brief Configuration of the LVE pin of the Flash (managed by power controller - * or forced to low in order to use an external SMPS) - * @param ConfigLVE: Configuration of the LVE pin, - * This parameter can be one of the following values: - * @arg FLASH_LVE_PIN_CTRL: LVE FLASH pin controlled by power controller - * @arg FLASH_LVE_PIN_FORCED: LVE FLASH pin enforced to low (external SMPS used) - * - * @note Before enforcing the LVE pin to low, the SOC should be in low voltage - * range 2 and the voltage VDD12 should be higher than 1.08V and SMPS is ON. - * - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check the parameters */ - assert_param(IS_FLASH_LVE_PIN(ConfigLVE)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if (status == HAL_OK) - { - /* Check that the voltage scaling is range 2 */ - if (HAL_PWREx_GetVoltageRange() == PWR_REGULATOR_VOLTAGE_SCALE2) - { - /* Configure the LVEN bit */ - MODIFY_REG(FLASH->CFGR, FLASH_CFGR_LVEN, ConfigLVE); - - /* Check that the bit has been correctly configured */ - if (READ_BIT(FLASH->CFGR, FLASH_CFGR_LVEN) != ConfigLVE) - { - status = HAL_ERROR; - } - } - else - { - /* Not allow to force Flash LVE pin if not in voltage range 2 */ - status = HAL_ERROR; - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - - return status; -} - -/** - * @} - */ -#endif /* FLASH_CFGR_LVEN */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** @addtogroup FLASHEx_Private_Functions - * @{ - */ -/** - * @brief Mass erase of FLASH memory. - * @param Banks: Banks to be erased - * This parameter can be one of the following values: - * @arg FLASH_BANK_1: Bank1 to be erased - * @arg FLASH_BANK_2: Bank2 to be erased - * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased - * @retval None - */ -static void FLASH_MassErase(uint32_t Banks) -{ -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (READ_BIT(FLASH->OPTR, FLASH_OPTR_DBANK) != RESET) -#endif - { - /* Check the parameters */ - assert_param(IS_FLASH_BANK(Banks)); - - /* Set the Mass Erase Bit for the bank 1 if requested */ - if((Banks & FLASH_BANK_1) != RESET) - { - SET_BIT(FLASH->CR, FLASH_CR_MER1); - } - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - /* Set the Mass Erase Bit for the bank 2 if requested */ - if((Banks & FLASH_BANK_2) != RESET) - { - SET_BIT(FLASH->CR, FLASH_CR_MER2); - } -#endif - } -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - else - { - SET_BIT(FLASH->CR, (FLASH_CR_MER1 | FLASH_CR_MER2)); - } -#endif - - /* Proceed to erase all sectors */ - SET_BIT(FLASH->CR, FLASH_CR_STRT); -} - -/** - * @brief Erase the specified FLASH memory page. - * @param Page: FLASH page to erase - * This parameter must be a value between 0 and (max number of pages in the bank - 1) - * @param Banks: Bank(s) where the page will be erased - * This parameter can be one of the following values: - * @arg FLASH_BANK_1: Page in bank 1 to be erased - * @arg FLASH_BANK_2: Page in bank 2 to be erased - * @retval None - */ -void FLASH_PageErase(uint32_t Page, uint32_t Banks) -{ - /* Check the parameters */ - assert_param(IS_FLASH_PAGE(Page)); - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if(READ_BIT(FLASH->OPTR, FLASH_OPTR_DBANK) == RESET) - { - CLEAR_BIT(FLASH->CR, FLASH_CR_BKER); - } - else -#endif - { - assert_param(IS_FLASH_BANK_EXCLUSIVE(Banks)); - - if((Banks & FLASH_BANK_1) != RESET) - { - CLEAR_BIT(FLASH->CR, FLASH_CR_BKER); - } - else - { - SET_BIT(FLASH->CR, FLASH_CR_BKER); - } - } -#endif - - /* Proceed to erase the page */ - MODIFY_REG(FLASH->CR, FLASH_CR_PNB, (Page << POSITION_VAL(FLASH_CR_PNB))); - SET_BIT(FLASH->CR, FLASH_CR_PER); - SET_BIT(FLASH->CR, FLASH_CR_STRT); -} - -/** - * @brief Flush the instruction and data caches. - * @retval None - */ -void FLASH_FlushCaches(void) -{ - /* Flush instruction cache */ - if((pFlash.CacheToReactivate == FLASH_CACHE_ICACHE_ENABLED) || - (pFlash.CacheToReactivate == FLASH_CACHE_ICACHE_DCACHE_ENABLED)) - { - /* Reset instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_RESET(); - /* Enable instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); - } - - /* Flush data cache */ - if((pFlash.CacheToReactivate == FLASH_CACHE_DCACHE_ENABLED) || - (pFlash.CacheToReactivate == FLASH_CACHE_ICACHE_DCACHE_ENABLED)) - { - /* Reset data cache */ - __HAL_FLASH_DATA_CACHE_RESET(); - /* Enable data cache */ - __HAL_FLASH_DATA_CACHE_ENABLE(); - } - - /* Reset internal variable */ - pFlash.CacheToReactivate = FLASH_CACHE_DISABLED; -} - -/** - * @brief Configure the write protection of the desired pages. - * - * @note When the memory read protection level is selected (RDP level = 1), - * it is not possible to program or erase Flash memory if the CPU debug - * features are connected (JTAG or single wire) or boot code is being - * executed from RAM or System flash, even if WRP is not activated. - * @note To configure the WRP options, the option lock bit OPTLOCK must be - * cleared with the call of the HAL_FLASH_OB_Unlock() function. - * @note To validate the WRP options, the option bytes must be reloaded - * through the call of the HAL_FLASH_OB_Launch() function. - * - * @param WRPArea: specifies the area to be configured. - * This parameter can be one of the following values: - * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A - * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B - * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A (don't apply for STM32L43x/STM32L44x devices) - * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B (don't apply for STM32L43x/STM32L44x devices) - * - * @param WRPStartOffset: specifies the start page of the write protected area - * This parameter can be page number between 0 and (max number of pages in the bank - 1) - * - * @param WRDPEndOffset: specifies the end page of the write protected area - * This parameter can be page number between WRPStartOffset and (max number of pages in the bank - 1) - * - * @retval HAL Status - */ -static HAL_StatusTypeDef FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRDPEndOffset) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_OB_WRPAREA(WRPArea)); - assert_param(IS_FLASH_PAGE(WRPStartOffset)); - assert_param(IS_FLASH_PAGE(WRDPEndOffset)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if(status == HAL_OK) - { - /* Configure the write protected area */ - if(WRPArea == OB_WRPAREA_BANK1_AREAA) - { - MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), - (WRPStartOffset | (WRDPEndOffset << 16))); - } - else if(WRPArea == OB_WRPAREA_BANK1_AREAB) - { - MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), - (WRPStartOffset | (WRDPEndOffset << 16))); - } -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - else if(WRPArea == OB_WRPAREA_BANK2_AREAA) - { - MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), - (WRPStartOffset | (WRDPEndOffset << 16))); - } - else if(WRPArea == OB_WRPAREA_BANK2_AREAB) - { - MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), - (WRPStartOffset | (WRDPEndOffset << 16))); - } -#endif - - /* Set OPTSTRT Bit */ - SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the option byte program operation is completed, disable the OPTSTRT Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - } - - return status; -} - -/** - * @brief Set the read protection level. - * - * @note To configure the RDP level, the option lock bit OPTLOCK must be - * cleared with the call of the HAL_FLASH_OB_Unlock() function. - * @note To validate the RDP level, the option bytes must be reloaded - * through the call of the HAL_FLASH_OB_Launch() function. - * @note !!! Warning : When enabling OB_RDP level 2 it's no more possible - * to go back to level 1 or 0 !!! - * - * @param RDPLevel: specifies the read protection level. - * This parameter can be one of the following values: - * @arg OB_RDP_LEVEL_0: No protection - * @arg OB_RDP_LEVEL_1: Read protection of the memory - * @arg OB_RDP_LEVEL_2: Full chip protection - * - * @retval HAL status - */ -static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint32_t RDPLevel) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_OB_RDP_LEVEL(RDPLevel)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if(status == HAL_OK) - { - /* Configure the RDP level in the option bytes register */ - MODIFY_REG(FLASH->OPTR, FLASH_OPTR_RDP, RDPLevel); - - /* Set OPTSTRT Bit */ - SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the option byte program operation is completed, disable the OPTSTRT Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - } - - return status; -} - -/** - * @brief Program the FLASH User Option Byte. - * - * @note To configure the user option bytes, the option lock bit OPTLOCK must - * be cleared with the call of the HAL_FLASH_OB_Unlock() function. - * @note To validate the user option bytes, the option bytes must be reloaded - * through the call of the HAL_FLASH_OB_Launch() function. - * - * @param UserType: The FLASH User Option Bytes to be modified - * @param UserConfig: The FLASH User Option Bytes values: - * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), IWDG_SW(Bit16), - * IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), BFB2(Bit20), - * DUALBANK(Bit21), nBOOT1(Bit23), SRAM2_PE(Bit24) and SRAM2_RST(Bit25). - * - * @retval HAL status - */ -static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig) -{ - uint32_t optr_reg_val = 0; - uint32_t optr_reg_mask = 0; - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_OB_USER_TYPE(UserType)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if(status == HAL_OK) - { - if((UserType & OB_USER_BOR_LEV) != RESET) - { - /* BOR level option byte should be modified */ - assert_param(IS_OB_USER_BOR_LEVEL(UserConfig & FLASH_OPTR_BOR_LEV)); - - /* Set value and mask for BOR level option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_BOR_LEV); - optr_reg_mask |= FLASH_OPTR_BOR_LEV; - } - - if((UserType & OB_USER_nRST_STOP) != RESET) - { - /* nRST_STOP option byte should be modified */ - assert_param(IS_OB_USER_STOP(UserConfig & FLASH_OPTR_nRST_STOP)); - - /* Set value and mask for nRST_STOP option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STOP); - optr_reg_mask |= FLASH_OPTR_nRST_STOP; - } - - if((UserType & OB_USER_nRST_STDBY) != RESET) - { - /* nRST_STDBY option byte should be modified */ - assert_param(IS_OB_USER_STANDBY(UserConfig & FLASH_OPTR_nRST_STDBY)); - - /* Set value and mask for nRST_STDBY option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STDBY); - optr_reg_mask |= FLASH_OPTR_nRST_STDBY; - } - - if((UserType & OB_USER_nRST_SHDW) != RESET) - { - /* nRST_SHDW option byte should be modified */ - assert_param(IS_OB_USER_SHUTDOWN(UserConfig & FLASH_OPTR_nRST_SHDW)); - - /* Set value and mask for nRST_SHDW option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_SHDW); - optr_reg_mask |= FLASH_OPTR_nRST_SHDW; - } - - if((UserType & OB_USER_IWDG_SW) != RESET) - { - /* IWDG_SW option byte should be modified */ - assert_param(IS_OB_USER_IWDG(UserConfig & FLASH_OPTR_IWDG_SW)); - - /* Set value and mask for IWDG_SW option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_SW); - optr_reg_mask |= FLASH_OPTR_IWDG_SW; - } - - if((UserType & OB_USER_IWDG_STOP) != RESET) - { - /* IWDG_STOP option byte should be modified */ - assert_param(IS_OB_USER_IWDG_STOP(UserConfig & FLASH_OPTR_IWDG_STOP)); - - /* Set value and mask for IWDG_STOP option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STOP); - optr_reg_mask |= FLASH_OPTR_IWDG_STOP; - } - - if((UserType & OB_USER_IWDG_STDBY) != RESET) - { - /* IWDG_STDBY option byte should be modified */ - assert_param(IS_OB_USER_IWDG_STDBY(UserConfig & FLASH_OPTR_IWDG_STDBY)); - - /* Set value and mask for IWDG_STDBY option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STDBY); - optr_reg_mask |= FLASH_OPTR_IWDG_STDBY; - } - - if((UserType & OB_USER_WWDG_SW) != RESET) - { - /* WWDG_SW option byte should be modified */ - assert_param(IS_OB_USER_WWDG(UserConfig & FLASH_OPTR_WWDG_SW)); - - /* Set value and mask for WWDG_SW option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_WWDG_SW); - optr_reg_mask |= FLASH_OPTR_WWDG_SW; - } - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if((UserType & OB_USER_BFB2) != RESET) - { - /* BFB2 option byte should be modified */ - assert_param(IS_OB_USER_BFB2(UserConfig & FLASH_OPTR_BFB2)); - - /* Set value and mask for BFB2 option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_BFB2); - optr_reg_mask |= FLASH_OPTR_BFB2; - } - - if((UserType & OB_USER_DUALBANK) != RESET) - { -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - /* DUALBANK option byte should be modified */ - assert_param(IS_OB_USER_DUALBANK(UserConfig & FLASH_OPTR_DB1M)); - - /* Set value and mask for DUALBANK option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_DB1M); - optr_reg_mask |= FLASH_OPTR_DB1M; -#else - /* DUALBANK option byte should be modified */ - assert_param(IS_OB_USER_DUALBANK(UserConfig & FLASH_OPTR_DUALBANK)); - - /* Set value and mask for DUALBANK option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_DUALBANK); - optr_reg_mask |= FLASH_OPTR_DUALBANK; -#endif - } -#endif - - if((UserType & OB_USER_nBOOT1) != RESET) - { - /* nBOOT1 option byte should be modified */ - assert_param(IS_OB_USER_BOOT1(UserConfig & FLASH_OPTR_nBOOT1)); - - /* Set value and mask for nBOOT1 option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT1); - optr_reg_mask |= FLASH_OPTR_nBOOT1; - } - - if((UserType & OB_USER_SRAM2_PE) != RESET) - { - /* SRAM2_PE option byte should be modified */ - assert_param(IS_OB_USER_SRAM2_PARITY(UserConfig & FLASH_OPTR_SRAM2_PE)); - - /* Set value and mask for SRAM2_PE option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_PE); - optr_reg_mask |= FLASH_OPTR_SRAM2_PE; - } - - if((UserType & OB_USER_SRAM2_RST) != RESET) - { - /* SRAM2_RST option byte should be modified */ - assert_param(IS_OB_USER_SRAM2_RST(UserConfig & FLASH_OPTR_SRAM2_RST)); - - /* Set value and mask for SRAM2_RST option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_RST); - optr_reg_mask |= FLASH_OPTR_SRAM2_RST; - } - -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || \ - defined (STM32L443xx) || defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if((UserType & OB_USER_nSWBOOT0) != RESET) - { - /* nSWBOOT0 option byte should be modified */ - assert_param(IS_OB_USER_SWBOOT0(UserConfig & FLASH_OPTR_nSWBOOT0)); - - /* Set value and mask for nSWBOOT0 option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nSWBOOT0); - optr_reg_mask |= FLASH_OPTR_nSWBOOT0; - } - - if((UserType & OB_USER_nBOOT0) != RESET) - { - /* nBOOT0 option byte should be modified */ - assert_param(IS_OB_USER_BOOT0(UserConfig & FLASH_OPTR_nBOOT0)); - - /* Set value and mask for nBOOT0 option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT0); - optr_reg_mask |= FLASH_OPTR_nBOOT0; - } -#endif - - /* Configure the option bytes register */ - MODIFY_REG(FLASH->OPTR, optr_reg_mask, optr_reg_val); - - /* Set OPTSTRT Bit */ - SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the option byte program operation is completed, disable the OPTSTRT Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - } - - return status; -} - -/** - * @brief Configure the Proprietary code readout protection of the desired addresses. - * - * @note To configure the PCROP options, the option lock bit OPTLOCK must be - * cleared with the call of the HAL_FLASH_OB_Unlock() function. - * @note To validate the PCROP options, the option bytes must be reloaded - * through the call of the HAL_FLASH_OB_Launch() function. - * - * @param PCROPConfig: specifies the configuration (Bank to be configured and PCROP_RDP option). - * This parameter must be a combination of FLASH_BANK_1 or FLASH_BANK_2 - * with OB_PCROP_RDP_NOT_ERASE or OB_PCROP_RDP_ERASE - * - * @param PCROPStartAddr: specifies the start address of the Proprietary code readout protection - * This parameter can be an address between begin and end of the bank - * - * @param PCROPEndAddr: specifies the end address of the Proprietary code readout protection - * This parameter can be an address between PCROPStartAddr and end of the bank - * - * @retval HAL Status - */ -static HAL_StatusTypeDef FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr) -{ - HAL_StatusTypeDef status = HAL_OK; - uint32_t reg_value = 0; - uint32_t bank1_addr; -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - uint32_t bank2_addr; -#endif - - /* Check the parameters */ - assert_param(IS_FLASH_BANK_EXCLUSIVE(PCROPConfig & FLASH_BANK_BOTH)); - assert_param(IS_OB_PCROP_RDP(PCROPConfig & FLASH_PCROP1ER_PCROP_RDP)); - assert_param(IS_FLASH_MAIN_MEM_ADDRESS(PCROPStartAddr)); - assert_param(IS_FLASH_MAIN_MEM_ADDRESS(PCROPEndAddr)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if(status == HAL_OK) - { -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - /* Get the information about the bank swapping */ - if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) - { - bank1_addr = FLASH_BASE; - bank2_addr = FLASH_BASE + FLASH_BANK_SIZE; - } - else - { - bank1_addr = FLASH_BASE + FLASH_BANK_SIZE; - bank2_addr = FLASH_BASE; - } -#else - bank1_addr = FLASH_BASE; -#endif - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (READ_BIT(FLASH->OPTR, FLASH_OPTR_DBANK) == RESET) - { - /* Configure the Proprietary code readout protection */ - if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_1) - { - reg_value = ((PCROPStartAddr - FLASH_BASE) >> 4); - MODIFY_REG(FLASH->PCROP1SR, FLASH_PCROP1SR_PCROP1_STRT, reg_value); - - reg_value = ((PCROPEndAddr - FLASH_BASE) >> 4); - MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP1_END, reg_value); - } - else if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_2) - { - reg_value = ((PCROPStartAddr - FLASH_BASE) >> 4); - MODIFY_REG(FLASH->PCROP2SR, FLASH_PCROP2SR_PCROP2_STRT, reg_value); - - reg_value = ((PCROPEndAddr - FLASH_BASE) >> 4); - MODIFY_REG(FLASH->PCROP2ER, FLASH_PCROP2ER_PCROP2_END, reg_value); - } - } - else -#endif - { - /* Configure the Proprietary code readout protection */ - if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_1) - { - reg_value = ((PCROPStartAddr - bank1_addr) >> 3); - MODIFY_REG(FLASH->PCROP1SR, FLASH_PCROP1SR_PCROP1_STRT, reg_value); - - reg_value = ((PCROPEndAddr - bank1_addr) >> 3); - MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP1_END, reg_value); - } -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - else if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_2) - { - reg_value = ((PCROPStartAddr - bank2_addr) >> 3); - MODIFY_REG(FLASH->PCROP2SR, FLASH_PCROP2SR_PCROP2_STRT, reg_value); - - reg_value = ((PCROPEndAddr - bank2_addr) >> 3); - MODIFY_REG(FLASH->PCROP2ER, FLASH_PCROP2ER_PCROP2_END, reg_value); - } -#endif - } - - MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP_RDP, (PCROPConfig & FLASH_PCROP1ER_PCROP_RDP)); - - /* Set OPTSTRT Bit */ - SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the option byte program operation is completed, disable the OPTSTRT Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - } - - return status; -} - -/** - * @brief Return the FLASH Write Protection Option Bytes value. - * - * @param[in] WRPArea: specifies the area to be returned. - * This parameter can be one of the following values: - * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A - * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B - * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A (don't apply to STM32L43x/STM32L44x devices) - * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B (don't apply to STM32L43x/STM32L44x devices) - * - * @param[out] WRPStartOffset: specifies the address where to copied the start page - * of the write protected area - * - * @param[out] WRDPEndOffset: specifies the address where to copied the end page of - * the write protected area - * - * @retval None - */ -static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRDPEndOffset) -{ - /* Get the configuration of the write protected area */ - if(WRPArea == OB_WRPAREA_BANK1_AREAA) - { - *WRPStartOffset = READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_STRT); - *WRDPEndOffset = (READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_END) >> 16); - } - else if(WRPArea == OB_WRPAREA_BANK1_AREAB) - { - *WRPStartOffset = READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_STRT); - *WRDPEndOffset = (READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_END) >> 16); - } -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - else if(WRPArea == OB_WRPAREA_BANK2_AREAA) - { - *WRPStartOffset = READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_STRT); - *WRDPEndOffset = (READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_END) >> 16); - } - else if(WRPArea == OB_WRPAREA_BANK2_AREAB) - { - *WRPStartOffset = READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_STRT); - *WRDPEndOffset = (READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_END) >> 16); - } -#endif -} - -/** - * @brief Return the FLASH Read Protection level. - * @retval FLASH ReadOut Protection Status: - * This return value can be one of the following values: - * @arg OB_RDP_LEVEL_0: No protection - * @arg OB_RDP_LEVEL_1: Read protection of the memory - * @arg OB_RDP_LEVEL_2: Full chip protection - */ -static uint32_t FLASH_OB_GetRDP(void) -{ - if ((READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP) != OB_RDP_LEVEL_0) && - (READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP) != OB_RDP_LEVEL_2)) - { - return (OB_RDP_LEVEL_1); - } - else - { - return (READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP)); - } -} - -/** - * @brief Return the FLASH User Option Byte value. - * @retval The FLASH User Option Bytes values: - * For STM32L47x/STM32L48x devices : - * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), nRST_SHDW(Bit14), - * IWDG_SW(Bit16), IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), - * BFB2(Bit20), DUALBANK(Bit21), nBOOT1(Bit23), SRAM2_PE(Bit24) and SRAM2_RST(Bit25). - * For STM32L43x/STM32L44x devices : - * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), nRST_SHDW(Bit14), - * IWDG_SW(Bit16), IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), - * nBOOT1(Bit23), SRAM2_PE(Bit24), SRAM2_RST(Bit25), nSWBOOT0(Bit26) and nBOOT0(Bit27). - */ -static uint32_t FLASH_OB_GetUser(void) -{ - uint32_t user_config = READ_REG(FLASH->OPTR); - CLEAR_BIT(user_config, FLASH_OPTR_RDP); - - return user_config; -} - -/** - * @brief Return the FLASH Write Protection Option Bytes value. - * - * @param PCROPConfig [inout]: specifies the configuration (Bank to be configured and PCROP_RDP option). - * This parameter must be a combination of FLASH_BANK_1 or FLASH_BANK_2 - * with OB_PCROP_RDP_NOT_ERASE or OB_PCROP_RDP_ERASE - * - * @param PCROPStartAddr [out]: specifies the address where to copied the start address - * of the Proprietary code readout protection - * - * @param PCROPEndAddr [out]: specifies the address where to copied the end address of - * the Proprietary code readout protection - * - * @retval None - */ -static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr, uint32_t * PCROPEndAddr) -{ - uint32_t reg_value = 0; - uint32_t bank1_addr; -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - uint32_t bank2_addr; -#endif - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - /* Get the information about the bank swapping */ - if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) - { - bank1_addr = FLASH_BASE; - bank2_addr = FLASH_BASE + FLASH_BANK_SIZE; - } - else - { - bank1_addr = FLASH_BASE + FLASH_BANK_SIZE; - bank2_addr = FLASH_BASE; - } -#else - bank1_addr = FLASH_BASE; -#endif - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (READ_BIT(FLASH->OPTR, FLASH_OPTR_DBANK) == RESET) - { - if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_1) - { - reg_value = (READ_REG(FLASH->PCROP1SR) & FLASH_PCROP1SR_PCROP1_STRT); - *PCROPStartAddr = (reg_value << 4) + FLASH_BASE; - - reg_value = (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP1_END); - *PCROPEndAddr = (reg_value << 4) + FLASH_BASE; - } - else if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_2) - { - reg_value = (READ_REG(FLASH->PCROP2SR) & FLASH_PCROP2SR_PCROP2_STRT); - *PCROPStartAddr = (reg_value << 4) + FLASH_BASE; - - reg_value = (READ_REG(FLASH->PCROP2ER) & FLASH_PCROP2ER_PCROP2_END); - *PCROPEndAddr = (reg_value << 4) + FLASH_BASE; - } - } - else -#endif - { - if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_1) - { - reg_value = (READ_REG(FLASH->PCROP1SR) & FLASH_PCROP1SR_PCROP1_STRT); - *PCROPStartAddr = (reg_value << 3) + bank1_addr; - - reg_value = (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP1_END); - *PCROPEndAddr = (reg_value << 3) + bank1_addr; - } -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - else if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_2) - { - reg_value = (READ_REG(FLASH->PCROP2SR) & FLASH_PCROP2SR_PCROP2_STRT); - *PCROPStartAddr = (reg_value << 3) + bank2_addr; - - reg_value = (READ_REG(FLASH->PCROP2ER) & FLASH_PCROP2ER_PCROP2_END); - *PCROPEndAddr = (reg_value << 3) + bank2_addr; - } -#endif - } - - *PCROPConfig |= (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP_RDP); -} -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_FLASH_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c deleted file mode 100644 index 537560f7..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +++ /dev/null @@ -1,271 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash_ramfunc.c - * @author MCD Application Team - * @brief FLASH RAMFUNC driver. - * This file provides a Flash firmware functions which should be - * executed from internal SRAM - * + FLASH HalfPage Programming - * + FLASH Power Down in Run mode - * - * @verbatim - ============================================================================== - ##### Flash RAM functions ##### - ============================================================================== - - *** ARM Compiler *** - -------------------- - [..] RAM functions are defined using the toolchain options. - Functions that are executed in RAM should reside in a separate - source module. Using the 'Options for File' dialog you can simply change - the 'Code / Const' area of a module to a memory space in physical RAM. - Available memory areas are declared in the 'Target' tab of the - Options for Target' dialog. - - *** ICCARM Compiler *** - ----------------------- - [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". - - *** GNU Compiler *** - -------------------- - [..] RAM functions are defined using a specific toolchain attribute - "__attribute__((section(".RamFunc")))". - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC - * @brief FLASH functions executed from RAM - * @{ - */ - -#ifdef HAL_FLASH_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -extern FLASH_ProcessTypeDef pFlash; - -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions -------------------------------------------------------*/ - -/** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH in RAM function Exported Functions - * @{ - */ - -/** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### ramfunc functions ##### - =============================================================================== - [..] - This subsection provides a set of functions that should be executed from RAM. - -@endverbatim - * @{ - */ - -/** - * @brief Enable the Power down in Run Mode - * @note This function should be called and executed from SRAM memory - * @retval None - */ -__RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void) -{ - /* Enable the Power Down in Run mode*/ - __HAL_FLASH_POWER_DOWN_ENABLE(); - - return HAL_OK; - -} - -/** - * @brief Disable the Power down in Run Mode - * @note This function should be called and executed from SRAM memory - * @retval None - */ -__RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void) -{ - /* Disable the Power Down in Run mode*/ - __HAL_FLASH_POWER_DOWN_DISABLE(); - - return HAL_OK; -} - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -/** - * @brief Program the FLASH DBANK User Option Byte. - * - * @note To configure the user option bytes, the option lock bit OPTLOCK must - * be cleared with the call of the HAL_FLASH_OB_Unlock() function. - * @note To modify the DBANK option byte, no PCROP region should be defined. - * To deactivate PCROP, user should perform RDP changing - * - * @param DBankConfig: The FLASH DBANK User Option Byte value. - * This parameter can be one of the following values: - * @arg OB_DBANK_128_BITS: Single-bank with 128-bits data - * @arg OB_DBANK_64_BITS: Dual-bank with 64-bits data - * - * @retval HAL status - */ -__RAM_FUNC HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig) -{ - register uint32_t count, reg; - HAL_StatusTypeDef status = HAL_ERROR; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check if the PCROP is disabled */ - reg = FLASH->PCROP1SR; - if (reg > FLASH->PCROP1ER) - { - reg = FLASH->PCROP2SR; - if (reg > FLASH->PCROP2ER) - { - /* Disable Flash prefetch */ - __HAL_FLASH_PREFETCH_BUFFER_DISABLE(); - - if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET) - { - /* Disable Flash instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); - - /* Flush Flash instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_RESET(); - } - - if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable Flash data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - - /* Flush Flash data cache */ - __HAL_FLASH_DATA_CACHE_RESET(); - } - - /* Disable WRP zone 1 of 1st bank if needed */ - reg = FLASH->WRP1AR; - if (((reg & FLASH_WRP1AR_WRP1A_STRT) >> POSITION_VAL(FLASH_WRP1AR_WRP1A_STRT)) <= - ((reg & FLASH_WRP1AR_WRP1A_END) >> POSITION_VAL(FLASH_WRP1AR_WRP1A_END))) - { - MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), FLASH_WRP1AR_WRP1A_STRT); - } - - /* Disable WRP zone 2 of 1st bank if needed */ - reg = FLASH->WRP1BR; - if (((reg & FLASH_WRP1BR_WRP1B_STRT) >> POSITION_VAL(FLASH_WRP1BR_WRP1B_STRT)) <= - ((reg & FLASH_WRP1BR_WRP1B_END) >> POSITION_VAL(FLASH_WRP1BR_WRP1B_END))) - { - MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), FLASH_WRP1BR_WRP1B_STRT); - } - - /* Disable WRP zone 1 of 2nd bank if needed */ - reg = FLASH->WRP2AR; - if (((reg & FLASH_WRP2AR_WRP2A_STRT) >> POSITION_VAL(FLASH_WRP2AR_WRP2A_STRT)) <= - ((reg & FLASH_WRP2AR_WRP2A_END) >> POSITION_VAL(FLASH_WRP2AR_WRP2A_END))) - { - MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), FLASH_WRP2AR_WRP2A_STRT); - } - - /* Disable WRP zone 2 of 2nd bank if needed */ - reg = FLASH->WRP2BR; - if (((reg & FLASH_WRP2BR_WRP2B_STRT) >> POSITION_VAL(FLASH_WRP2BR_WRP2B_STRT)) <= - ((reg & FLASH_WRP2BR_WRP2B_END) >> POSITION_VAL(FLASH_WRP2BR_WRP2B_END))) - { - MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), FLASH_WRP2BR_WRP2B_STRT); - } - - /* Modify the DBANK user option byte */ - MODIFY_REG(FLASH->OPTR, FLASH_OPTR_DBANK, DBankConfig); - - /* Set OPTSTRT Bit */ - SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Wait for last operation to be completed */ - /* 8 is the number of required instruction cycles for the below loop statement (timeout expressed in ms) */ - count = FLASH_TIMEOUT_VALUE * (SystemCoreClock / 8 / 1000); - do - { - if (count-- == 0) - { - break; - } - } while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET); - - /* If the option byte program operation is completed, disable the OPTSTRT Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Set the bit to force the option byte reloading */ - SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - - return status; -} -#endif - -/** - * @} - */ - -/** - * @} - */ -#endif /* HAL_FLASH_MODULE_ENABLED */ - - - -/** - * @} - */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c deleted file mode 100644 index a2cf3292..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +++ /dev/null @@ -1,568 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_gpio.c - * @author MCD Application Team - * @brief GPIO HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the General Purpose Input/Output (GPIO) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * - @verbatim - ============================================================================== - ##### GPIO Peripheral features ##### - ============================================================================== - [..] - (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually - configured by software in several modes: - (++) Input mode - (++) Analog mode - (++) Output mode - (++) Alternate function mode - (++) External interrupt/event lines - - (+) During and just after reset, the alternate functions and external interrupt - lines are not active and the I/O ports are configured in input floating mode. - - (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be - activated or not. - - (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull - type and the IO speed can be selected depending on the VDD value. - - (+) The microcontroller IO pins are connected to onboard peripherals/modules through a - multiplexer that allows only one peripheral alternate function (AF) connected - to an IO pin at a time. In this way, there can be no conflict between peripherals - sharing the same IO pin. - - (+) All ports have external interrupt/event capability. To use external interrupt - lines, the port must be configured in input mode. All available GPIO pins are - connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. - - (+) The external interrupt/event controller consists of up to 39 edge detectors - (16 lines are connected to GPIO) for generating event/interrupt requests (each - input line can be independently configured to select the type (interrupt or event) - and the corresponding trigger event (rising or falling or both). Each line can - also be masked independently. - - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE(). - - (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). - (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure - (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef - structure. - (++) In case of Output or alternate function mode selection: the speed is - configured through "Speed" member from GPIO_InitTypeDef structure. - (++) In alternate mode is selection, the alternate function connected to the IO - is configured through "Alternate" member from GPIO_InitTypeDef structure. - (++) Analog mode is required when a pin is to be used as ADC channel - or DAC output. - (++) In case of external interrupt/event selection the "Mode" member from - GPIO_InitTypeDef structure select the type (interrupt or event) and - the corresponding trigger event (rising or falling or both). - - (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority - mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using - HAL_NVIC_EnableIRQ(). - - (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). - - (#) To set/reset the level of a pin configured in output mode use - HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). - - (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). - - (#) During and just after reset, the alternate functions are not - active and the GPIO pins are configured in input floating mode (except JTAG - pins). - - (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose - (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has - priority over the GPIO function. - - (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as - general purpose PH0 and PH1, respectively, when the HSE oscillator is off. - The HSE has priority over the GPIO function. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup GPIO GPIO - * @brief GPIO HAL module driver - * @{ - */ - -#ifdef HAL_GPIO_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/** @defgroup GPIO_Private_Defines GPIO Private Defines - * @{ - */ -#define GPIO_MODE ((uint32_t)0x00000003) -#define ANALOG_MODE ((uint32_t)0x00000008) -#define EXTI_MODE ((uint32_t)0x10000000) -#define GPIO_MODE_IT ((uint32_t)0x00010000) -#define GPIO_MODE_EVT ((uint32_t)0x00020000) -#define RISING_EDGE ((uint32_t)0x00100000) -#define FALLING_EDGE ((uint32_t)0x00200000) -#define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010) - -#define GPIO_NUMBER ((uint32_t)16) -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/** @defgroup GPIO_Private_Macros GPIO Private Macros - * @{ - */ -/** - * @} - */ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup GPIO_Exported_Functions GPIO Exported Functions - * @{ - */ - -/** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init. - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains - * the configuration information for the specified GPIO peripheral. - * @retval None - */ -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) -{ - uint32_t position = 0x00; - uint32_t iocurrent = 0x00; - uint32_t temp = 0x00; - - /* Check the parameters */ - assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); - assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); - assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); - - /* Configure the port pins */ - while (((GPIO_Init->Pin) >> position) != RESET) - { - /* Get current io position */ - iocurrent = (GPIO_Init->Pin) & (1U << position); - - if(iocurrent) - { - /*--------------------- GPIO Mode Configuration ------------------------*/ - /* In case of Alternate function mode selection */ - if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - { - /* Check the Alternate function parameters */ - assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); - assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); - - /* Configure Alternate function mapped with the current IO */ - temp = GPIOx->AFR[position >> 3]; - temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; - temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4)); - GPIOx->AFR[position >> 3] = temp; - } - - /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - temp = GPIOx->MODER; - temp &= ~(GPIO_MODER_MODE0 << (position * 2)); - temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2)); - GPIOx->MODER = temp; - - /* In case of Output or Alternate function mode selection */ - if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - { - /* Check the Speed parameter */ - assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); - /* Configure the IO Speed */ - temp = GPIOx->OSPEEDR; - temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2)); - temp |= (GPIO_Init->Speed << (position * 2)); - GPIOx->OSPEEDR = temp; - - /* Configure the IO Output Type */ - temp = GPIOx->OTYPER; - temp &= ~(GPIO_OTYPER_OT0 << position) ; - temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position); - GPIOx->OTYPER = temp; - } - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - - /* In case of Analog mode, check if ADC control mode is selected */ - if((GPIO_Init->Mode & GPIO_MODE_ANALOG) == GPIO_MODE_ANALOG) - { - /* Configure the IO Output Type */ - temp = GPIOx->ASCR; - temp &= ~(GPIO_ASCR_ASC0 << position) ; - temp |= (((GPIO_Init->Mode & ANALOG_MODE) >> 3) << position); - GPIOx->ASCR = temp; - } - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - - /* Activate the Pull-up or Pull down resistor for the current IO */ - temp = GPIOx->PUPDR; - temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2)); - temp |= ((GPIO_Init->Pull) << (position * 2)); - GPIOx->PUPDR = temp; - - /*--------------------- EXTI Mode Configuration ------------------------*/ - /* Configure the External Interrupt or event for the current IO */ - if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - { - /* Enable SYSCFG Clock */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - - temp = SYSCFG->EXTICR[position >> 2]; - temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03))); - temp |= (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03))); - SYSCFG->EXTICR[position >> 2] = temp; - - /* Clear EXTI line configuration */ - temp = EXTI->IMR1; - temp &= ~((uint32_t)iocurrent); - if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - { - temp |= iocurrent; - } - EXTI->IMR1 = temp; - - temp = EXTI->EMR1; - temp &= ~((uint32_t)iocurrent); - if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - { - temp |= iocurrent; - } - EXTI->EMR1 = temp; - - /* Clear Rising Falling edge configuration */ - temp = EXTI->RTSR1; - temp &= ~((uint32_t)iocurrent); - if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - { - temp |= iocurrent; - } - EXTI->RTSR1 = temp; - - temp = EXTI->FTSR1; - temp &= ~((uint32_t)iocurrent); - if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - { - temp |= iocurrent; - } - EXTI->FTSR1 = temp; - } - } - - position++; - } -} - -/** - * @brief De-initialize the GPIOx peripheral registers to their default reset values. - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Pin: specifies the port bit to be written. - * This parameter can be one of GPIO_PIN_x where x can be (0..15). - * @retval None - */ -void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) -{ - uint32_t position = 0x00; - uint32_t iocurrent = 0x00; - uint32_t tmp = 0x00; - - /* Check the parameters */ - assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - /* Configure the port pins */ - while ((GPIO_Pin >> position) != RESET) - { - /* Get current io position */ - iocurrent = (GPIO_Pin) & (1U << position); - - if (iocurrent) - { - /*------------------------- GPIO Mode Configuration --------------------*/ - /* Configure IO in Analog Mode */ - GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * 2)); - - /* Configure the default Alternate Function in current IO */ - GPIOx->AFR[position >> 3] &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; - - /* Configure the default value for IO Speed */ - GPIOx->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2)); - - /* Configure the default value IO Output Type */ - GPIOx->OTYPER &= ~(GPIO_OTYPER_OT0 << position) ; - - /* Deactivate the Pull-up and Pull-down resistor for the current IO */ - GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2)); - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - - /* Deactivate the Control bit of Analog mode for the current IO */ - GPIOx->ASCR &= ~(GPIO_ASCR_ASC0<< position); - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - - /*------------------------- EXTI Mode Configuration --------------------*/ - /* Clear the External Interrupt or Event for the current IO */ - - tmp = SYSCFG->EXTICR[position >> 2]; - tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03))); - if(tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03)))) - { - tmp = ((uint32_t)0x0F) << (4 * (position & 0x03)); - SYSCFG->EXTICR[position >> 2] &= ~tmp; - - /* Clear EXTI line configuration */ - EXTI->IMR1 &= ~((uint32_t)iocurrent); - EXTI->EMR1 &= ~((uint32_t)iocurrent); - - /* Clear Rising Falling edge configuration */ - EXTI->RTSR1 &= ~((uint32_t)iocurrent); - EXTI->FTSR1 &= ~((uint32_t)iocurrent); - } - } - - position++; - } -} - -/** - * @} - */ - -/** @defgroup GPIO_Exported_Functions_Group2 IO operation functions - * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - -@endverbatim - * @{ - */ - -/** - * @brief Read the specified input port pin. - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Pin: specifies the port bit to read. - * This parameter can be GPIO_PIN_x where x can be (0..15). - * @retval The input port pin value. - */ -GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - GPIO_PinState bitstatus; - - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - { - bitstatus = GPIO_PIN_SET; - } - else - { - bitstatus = GPIO_PIN_RESET; - } - return bitstatus; -} - -/** - * @brief Set or clear the selected data port bit. - * - * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify - * accesses. In this way, there is no risk of an IRQ occurring between - * the read and the modify access. - * - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Pin: specifies the port bit to be written. - * This parameter can be one of GPIO_PIN_x where x can be (0..15). - * @param PinState: specifies the value to be written to the selected bit. - * This parameter can be one of the GPIO_PinState enum values: - * @arg GPIO_PIN_RESET: to clear the port pin - * @arg GPIO_PIN_SET: to set the port pin - * @retval None - */ -void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) -{ - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - assert_param(IS_GPIO_PIN_ACTION(PinState)); - - if(PinState != GPIO_PIN_RESET) - { - GPIOx->BSRR = (uint32_t)GPIO_Pin; - } - else - { - GPIOx->BRR = (uint32_t)GPIO_Pin; - } -} - -/** - * @brief Toggle the specified GPIO pin. - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Pin: specifies the pin to be toggled. - * @retval None - */ -void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - GPIOx->ODR ^= GPIO_Pin; -} - -/** -* @brief Lock GPIO Pins configuration registers. - * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, - * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. - * @note The configuration of the locked GPIO pins can no longer be modified - * until the next reset. - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Pin: specifies the port bits to be locked. - * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). - * @retval None - */ -HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - __IO uint32_t tmp = GPIO_LCKR_LCKK; - - /* Check the parameters */ - assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - /* Apply lock key write sequence */ - tmp |= GPIO_Pin; - /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ - GPIOx->LCKR = tmp; - /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ - GPIOx->LCKR = GPIO_Pin; - /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ - GPIOx->LCKR = tmp; - /* Read LCKK bit*/ - tmp = GPIOx->LCKR; - - if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) - { - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Handle EXTI interrupt request. - * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. - * @retval None - */ -void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) -{ - /* EXTI line interrupt detected */ - if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) - { - __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); - HAL_GPIO_EXTI_Callback(GPIO_Pin); - } -} - -/** - * @brief EXTI line detection callback. - * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. - * @retval None - */ -__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(GPIO_Pin); - - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_GPIO_EXTI_Callback could be implemented in the user file - */ -} - -/** - * @} - */ - - -/** - * @} - */ - -#endif /* HAL_GPIO_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c deleted file mode 100644 index 63d38c33..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +++ /dev/null @@ -1,4868 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_i2c.c - * @author MCD Application Team - * @brief I2C HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Inter Integrated Circuit (I2C) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral State and Errors functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The I2C HAL driver can be used as follows: - - (#) Declare a I2C_HandleTypeDef handle structure, for example: - I2C_HandleTypeDef hi2c; - - (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: - (##) Enable the I2Cx interface clock - (##) I2C pins configuration - (+++) Enable the clock for the I2C GPIOs - (+++) Configure I2C pins as alternate function open-drain - (##) NVIC configuration if you need to use interrupt process - (+++) Configure the I2Cx interrupt priority - (+++) Enable the NVIC I2C IRQ Channel - (##) DMA Configuration if you need to use DMA process - (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel - (+++) Enable the DMAx interface clock using - (+++) Configure the DMA handle parameters - (+++) Configure the DMA Tx or Rx channel - (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on - the DMA Tx or Rx channel - - (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode, - Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure. - - (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware - (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. - - (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady() - - (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : - - *** Polling mode IO operation *** - ================================= - [..] - (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit() - (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() - (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() - (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() - - *** Polling mode IO MEM operation *** - ===================================== - [..] - (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write() - (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read() - - - *** Interrupt mode IO operation *** - =================================== - [..] - (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT() - (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() - (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT() - (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT() - (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() - (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT() - (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() - (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. - This action will inform Master to generate a Stop condition to discard the communication. - - - *** Interrupt mode IO sequential operation *** - ============================================== - [..] - (@) These interfaces allow to manage a sequential transfer with a repeated start condition - when a direction change during transfer - [..] - (+) A specific option field manage the different steps of a sequential transfer - (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below: - (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode - (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address - and data to transfer without a final stop condition - (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address - and data to transfer without a final stop condition, an then permit a call the same master sequential interface - several times (like HAL_I2C_Master_Sequential_Transmit_IT() then HAL_I2C_Master_Sequential_Transmit_IT()) - (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address - and with new data to transfer if the direction change or manage only the new data to transfer - if no direction change and without a final stop condition in both cases - (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address - and with new data to transfer if the direction change or manage only the new data to transfer - if no direction change and with a final stop condition in both cases - - (+) Differents sequential I2C interfaces are listed below: - (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT() - (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() - (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT() - (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT() - (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can - add his own code to check the Address Match Code and the transmission direction request by master (Write/Read). - (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_ListenCpltCallback() - (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT() - (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() - (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT() - (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() - (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_I2C_ErrorCallback() - (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. - This action will inform Master to generate a Stop condition to discard the communication. - - *** Interrupt mode IO MEM operation *** - ======================================= - [..] - (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using - HAL_I2C_Mem_Write_IT() - (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback() - (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using - HAL_I2C_Mem_Read_IT() - (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback() - (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_I2C_ErrorCallback() - - *** DMA mode IO operation *** - ============================== - [..] - (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using - HAL_I2C_Master_Transmit_DMA() - (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() - (+) Receive in master mode an amount of data in non-blocking mode (DMA) using - HAL_I2C_Master_Receive_DMA() - (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using - HAL_I2C_Slave_Transmit_DMA() - (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() - (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using - HAL_I2C_Slave_Receive_DMA() - (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() - (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. - This action will inform Master to generate a Stop condition to discard the communication. - - *** DMA mode IO MEM operation *** - ================================= - [..] - (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using - HAL_I2C_Mem_Write_DMA() - (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback() - (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using - HAL_I2C_Mem_Read_DMA() - (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback() - (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_I2C_ErrorCallback() - - - *** I2C HAL driver macros list *** - ================================== - [..] - Below the list of most used macros in I2C HAL driver. - - (+) __HAL_I2C_ENABLE: Enable the I2C peripheral - (+) __HAL_I2C_DISABLE: Disable the I2C peripheral - (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode - (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not - (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag - (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt - (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt - - [..] - (@) You can refer to the I2C HAL driver header file for more useful macros - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup I2C I2C - * @brief I2C HAL module driver - * @{ - */ - -#ifdef HAL_I2C_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -/** @defgroup I2C_Private_Define I2C Private Define - * @{ - */ -#define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */ -#define I2C_TIMEOUT_ADDR (10000U) /*!< 10 s */ -#define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_DIR (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_RXNE (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_STOPF (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_TC (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_TCR (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_TXIS (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */ - -#define MAX_NBYTE_SIZE 255U -#define SlaveAddr_SHIFT 7U -#define SlaveAddr_MSK 0x06U - -/* Private define for @ref PreviousState usage */ -#define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits */ -#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */ -#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_MEM_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM)) /*!< Memory Busy TX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_MEM_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM)) /*!< Memory Busy RX, combinaison of State LSB and Mode enum */ - - -/* Private define to centralize the enable/disable of Interrupts */ -#define I2C_XFER_TX_IT (0x00000001U) -#define I2C_XFER_RX_IT (0x00000002U) -#define I2C_XFER_LISTEN_IT (0x00000004U) - -#define I2C_XFER_ERROR_IT (0x00000011U) -#define I2C_XFER_CPLT_IT (0x00000012U) -#define I2C_XFER_RELOAD_IT (0x00000012U) - -/* Private define Sequential Transfer Options default/reset value */ -#define I2C_NO_OPTION_FRAME (0xFFFF0000U) -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -#define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) ((((__HANDLE__)->State) == HAL_I2C_STATE_BUSY_TX) ? \ - ((uint32_t)(((DMA_Channel_TypeDef *)(__HANDLE__)->hdmatx->Instance)->CNDTR)) : \ - ((uint32_t)(((DMA_Channel_TypeDef *)(__HANDLE__)->hdmarx->Instance)->CNDTR))) - -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ - -/** @defgroup I2C_Private_Functions I2C Private Functions - * @{ - */ -/* Private functions to handle DMA transfer */ -static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); -static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); -static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); -static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); -static void I2C_DMAError(DMA_HandleTypeDef *hdma); -static void I2C_DMAAbort(DMA_HandleTypeDef *hdma); - -/* Private functions to handle IT transfer */ -static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); -static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c); -static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c); -static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); -static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); -static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); -static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode); - -/* Private functions to handle IT transfer */ -static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart); - -/* Private functions for I2C transfer IRQ handler */ -static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); -static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); -static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); -static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); - -/* Private functions to handle flags during polling transfer */ -static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); - -/* Private functions to centralize the enable/disable of Interrupts */ -static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); -static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); - -/* Private functions to flush TXDR register */ -static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c); - -/* Private functions to handle start, restart or stop a transfer */ -static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup I2C_Exported_Functions I2C Exported Functions - * @{ - */ - -/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This subsection provides a set of functions allowing to initialize and - deinitialize the I2Cx peripheral: - - (+) User must Implement HAL_I2C_MspInit() function in which he configures - all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). - - (+) Call the function HAL_I2C_Init() to configure the selected device with - the selected configuration: - (++) Clock Timing - (++) Own Address 1 - (++) Addressing mode (Master, Slave) - (++) Dual Addressing mode - (++) Own Address 2 - (++) Own Address 2 Mask - (++) General call mode - (++) Nostretch mode - - (+) Call the function HAL_I2C_DeInit() to restore the default configuration - of the selected I2Cx peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the I2C according to the specified parameters - * in the I2C_InitTypeDef and initialize the associated handle. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) -{ - /* Check the I2C handle allocation */ - if (hi2c == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); - assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); - assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); - assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); - assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); - assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); - assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); - - if (hi2c->State == HAL_I2C_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hi2c->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ - HAL_I2C_MspInit(hi2c); - } - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - - /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ - /* Configure I2Cx: Frequency range */ - hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; - - /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ - /* Disable Own Address1 before set the Own Address1 configuration */ - hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; - - /* Configure I2Cx: Own Address1 and ack own address1 mode */ - if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - { - hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); - } - else /* I2C_ADDRESSINGMODE_10BIT */ - { - hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); - } - - /*---------------------------- I2Cx CR2 Configuration ----------------------*/ - /* Configure I2Cx: Addressing Master mode */ - if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - { - hi2c->Instance->CR2 = (I2C_CR2_ADD10); - } - /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ - hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); - - /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ - /* Disable Own Address2 before set the Own Address2 configuration */ - hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; - - /* Configure I2Cx: Dual mode and Own Address2 */ - hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8)); - - /*---------------------------- I2Cx CR1 Configuration ----------------------*/ - /* Configure I2Cx: Generalcall and NoStretch mode */ - hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); - - /* Enable the selected I2C peripheral */ - __HAL_I2C_ENABLE(hi2c); - - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->Mode = HAL_I2C_MODE_NONE; - - return HAL_OK; -} - -/** - * @brief DeInitialize the I2C peripheral. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) -{ - /* Check the I2C handle allocation */ - if (hi2c == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the I2C Peripheral Clock */ - __HAL_I2C_DISABLE(hi2c); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_I2C_MspDeInit(hi2c); - - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - hi2c->State = HAL_I2C_STATE_RESET; - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Release Lock */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; -} - -/** - * @brief Initialize the I2C MSP. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the I2C MSP. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the I2C data - transfers. - - (#) There are two modes of transfer: - (++) Blocking mode : The communication is performed in the polling mode. - The status of all data processing is returned by the same function - after finishing transfer. - (++) No-Blocking mode : The communication is performed using Interrupts - or DMA. These functions return the status of the transfer startup. - The end of the data processing will be indicated through the - dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - - (#) Blocking mode functions are : - (++) HAL_I2C_Master_Transmit() - (++) HAL_I2C_Master_Receive() - (++) HAL_I2C_Slave_Transmit() - (++) HAL_I2C_Slave_Receive() - (++) HAL_I2C_Mem_Write() - (++) HAL_I2C_Mem_Read() - (++) HAL_I2C_IsDeviceReady() - - (#) No-Blocking mode functions with Interrupt are : - (++) HAL_I2C_Master_Transmit_IT() - (++) HAL_I2C_Master_Receive_IT() - (++) HAL_I2C_Slave_Transmit_IT() - (++) HAL_I2C_Slave_Receive_IT() - (++) HAL_I2C_Mem_Write_IT() - (++) HAL_I2C_Mem_Read_IT() - - (#) No-Blocking mode functions with DMA are : - (++) HAL_I2C_Master_Transmit_DMA() - (++) HAL_I2C_Master_Receive_DMA() - (++) HAL_I2C_Slave_Transmit_DMA() - (++) HAL_I2C_Slave_Receive_DMA() - (++) HAL_I2C_Mem_Write_DMA() - (++) HAL_I2C_Mem_Read_DMA() - - (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: - (++) HAL_I2C_MemTxCpltCallback() - (++) HAL_I2C_MemRxCpltCallback() - (++) HAL_I2C_MasterTxCpltCallback() - (++) HAL_I2C_MasterRxCpltCallback() - (++) HAL_I2C_SlaveTxCpltCallback() - (++) HAL_I2C_SlaveRxCpltCallback() - (++) HAL_I2C_ErrorCallback() - -@endverbatim - * @{ - */ - -/** - * @brief Transmits in master mode an amount of data in blocking mode. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); - } - - while (hi2c->XferCount > 0U) - { - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - /* Write data to TXDR */ - hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - hi2c->XferCount--; - hi2c->XferSize--; - - if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - { - /* Wait until TCR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - } - } - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receives in master mode an amount of data in blocking mode. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); - } - - while (hi2c->XferCount > 0U) - { - /* Wait until RXNE flag is set */ - if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferSize--; - hi2c->XferCount--; - - if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - { - /* Wait until TCR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - } - } - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmits in slave mode an amount of data in blocking mode. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Wait until ADDR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - - /* If 10bit addressing mode is selected */ - if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - { - /* Wait until ADDR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - } - - /* Wait until DIR flag is set Transmitter mode */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - while (hi2c->XferCount > 0U) - { - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Write data to TXDR */ - hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - hi2c->XferCount--; - } - - /* Wait until STOP flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Normal use case for Transmitter mode */ - /* A NACK is generated to confirm the end of transfer */ - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Wait until BUSY flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in slave mode an amount of data in blocking mode - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Wait until ADDR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - - /* Wait until DIR flag is reset Receiver mode */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - while (hi2c->XferCount > 0U) - { - /* Wait until RXNE flag is set */ - if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - /* Store Last receive data if any */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) - { - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferCount--; - } - - if (hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) - { - return HAL_TIMEOUT; - } - else - { - return HAL_ERROR; - } - } - - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferCount--; - } - - /* Wait until STOP flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Wait until BUSY flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) -{ - uint32_t xfermode = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_IT; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) -{ - uint32_t xfermode = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_IT; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -{ - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Slave_ISR_IT; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -{ - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Slave_ISR_IT; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmit in master mode an amount of data in non-blocking mode with DMA - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) -{ - uint32_t xfermode = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_DMA; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - if (hi2c->XferSize > 0U) - { - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; - - /* Set the DMA error callback */ - hi2c->hdmatx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmatx->XferHalfCpltCallback = NULL; - hi2c->hdmatx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR and NACK interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - } - else - { - /* Update Transfer ISR function pointer */ - hi2c->XferISR = I2C_Master_ISR_IT; - - /* Send Slave Address */ - /* Set NBYTES to write and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in master mode an amount of data in non-blocking mode with DMA - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) -{ - uint32_t xfermode = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_DMA; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - if (hi2c->XferSize > 0U) - { - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; - - /* Set the DMA error callback */ - hi2c->hdmarx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmarx->XferHalfCpltCallback = NULL; - hi2c->hdmarx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); - - /* Send Slave Address */ - /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR and NACK interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - } - else - { - /* Update Transfer ISR function pointer */ - hi2c->XferISR = I2C_Master_ISR_IT; - - /* Send Slave Address */ - /* Set NBYTES to read and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); - } - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -{ - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Slave_ISR_DMA; - - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; - - /* Set the DMA error callback */ - hi2c->hdmatx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmatx->XferHalfCpltCallback = NULL; - hi2c->hdmatx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR, STOP, NACK, ADDR interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in slave mode an amount of data in non-blocking mode with DMA - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -{ - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Slave_ISR_DMA; - - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; - - /* Set the DMA error callback */ - hi2c->hdmarx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmarx->XferHalfCpltCallback = NULL; - hi2c->hdmarx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR, STOP, NACK, ADDR interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} -/** - * @brief Write an amount of data in blocking mode to a specific memory address - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - - do - { - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Write data to TXDR */ - hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - hi2c->XferCount--; - hi2c->XferSize--; - - if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - { - /* Wait until TCR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - } - - } - while (hi2c->XferCount > 0U); - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Read an amount of data in blocking mode from a specific memory address - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); - } - - do - { - /* Wait until RXNE flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferSize--; - hi2c->XferCount--; - - if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - { - /* Wait until TCR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - } - } - while (hi2c->XferCount > 0U); - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} -/** - * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) -{ - uint32_t tickstart = 0U; - uint32_t xfermode = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_IT; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) -{ - uint32_t tickstart = 0U; - uint32_t xfermode = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_IT; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} -/** - * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) -{ - uint32_t tickstart = 0U; - uint32_t xfermode = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_DMA; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; - - /* Set the DMA error callback */ - hi2c->hdmatx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmatx->XferHalfCpltCallback = NULL; - hi2c->hdmatx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR and NACK interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be read - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) -{ - uint32_t tickstart = 0U; - uint32_t xfermode = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_DMA; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; - - /* Set the DMA error callback */ - hi2c->hdmarx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmarx->XferHalfCpltCallback = NULL; - hi2c->hdmarx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); - - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR and NACK interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Checks if target device is ready for communication. - * @note This function is used with Memory devices - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param Trials Number of trials - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - __IO uint32_t I2C_Trials = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - do - { - /* Generate Start */ - hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress); - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is set or a NACK flag is set*/ - tickstart = HAL_GetTick(); - while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT)) - { - if (Timeout != HAL_MAX_DELAY) - { - if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) - { - /* Device is ready */ - hi2c->State = HAL_I2C_STATE_READY; - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - } - - /* Check if the NACKF flag has not been set */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) - { - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Device is ready */ - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Clear STOP Flag, auto generated with autoend*/ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - } - - /* Check if the maximum allowed number of trials has been reached */ - if (I2C_Trials++ == Trials) - { - /* Generate Stop */ - hi2c->Instance->CR2 |= I2C_CR2_STOP; - - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - } - } - while (I2C_Trials < Trials); - - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_TIMEOUT; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt. - * @note This interface allow to manage repeated start condition when a direction change during transfer - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - uint32_t xfermode = 0U; - uint32_t xferrequest = I2C_GENERATE_START_WRITE; - - /* Check the parameters */ - assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = XferOptions; - hi2c->XferISR = I2C_Master_ISR_IT; - - /* If size > MAX_NBYTE_SIZE, use reload mode */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = hi2c->XferOptions; - } - - /* If transfer direction not change, do not generate Restart Condition */ - /* Mean Previous state is same as current state */ - if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) - { - xferrequest = I2C_NO_STARTSTOP; - } - - /* Send Slave Address and set NBYTES to write */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt - * @note This interface allow to manage repeated start condition when a direction change during transfer - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - uint32_t xfermode = 0U; - uint32_t xferrequest = I2C_GENERATE_START_READ; - - /* Check the parameters */ - assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = XferOptions; - hi2c->XferISR = I2C_Master_ISR_IT; - - /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = hi2c->XferOptions; - } - - /* If transfer direction not change, do not generate Restart Condition */ - /* Mean Previous state is same as current state */ - if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) - { - xferrequest = I2C_NO_STARTSTOP; - } - - /* Send Slave Address and set NBYTES to read */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode with Interrupt - * @note This interface allow to manage repeated start condition when a direction change during transfer - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - /* Check the parameters */ - assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ - /* and then toggle the HAL slave RX state to TX state */ - if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) - { - /* Disable associated Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - } - - hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = XferOptions; - hi2c->XferISR = I2C_Slave_ISR_IT; - - if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) - { - /* Clear ADDR flag after prepare the transfer parameters */ - /* This action will generate an acknowledge to the Master */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* REnable ADDR interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with Interrupt - * @note This interface allow to manage repeated start condition when a direction change during transfer - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - /* Check the parameters */ - assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ - /* and then toggle the HAL slave TX state to RX state */ - if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) - { - /* Disable associated Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - } - - hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = XferOptions; - hi2c->XferISR = I2C_Slave_ISR_IT; - - if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) - { - /* Clear ADDR flag after prepare the transfer parameters */ - /* This action will generate an acknowledge to the Master */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* REnable ADDR interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Enable the Address listen mode with Interrupt. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c) -{ - if (hi2c->State == HAL_I2C_STATE_READY) - { - hi2c->State = HAL_I2C_STATE_LISTEN; - hi2c->XferISR = I2C_Slave_ISR_IT; - - /* Enable the Address Match interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Disable the Address listen mode with Interrupt. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) -{ - /* Declaration of tmp to prevent undefined behavior of volatile usage */ - uint32_t tmp; - - /* Disable Address listen mode only if a transfer is not ongoing */ - if (hi2c->State == HAL_I2C_STATE_LISTEN) - { - tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK; - hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - hi2c->XferISR = NULL; - - /* Disable the Address Match interrupt */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Abort a master I2C IT or DMA process communication with Interrupt. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) -{ - if (hi2c->Mode == HAL_I2C_MODE_MASTER) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - - /* Set State at HAL_I2C_STATE_ABORT */ - hi2c->State = HAL_I2C_STATE_ABORT; - - /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */ - /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */ - I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); - - return HAL_OK; - } - else - { - /* Wrong usage of abort function */ - /* This function should be used only in case of abort monitored by master device */ - return HAL_ERROR; - } -} - -/** - * @} - */ - -/** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks - * @{ - */ - -/** - * @brief This function handles I2C event interrupt request. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) -{ - /* Get current IT Flags and IT sources value */ - uint32_t itflags = READ_REG(hi2c->Instance->ISR); - uint32_t itsources = READ_REG(hi2c->Instance->CR1); - - /* I2C events treatment -------------------------------------*/ - if (hi2c->XferISR != NULL) - { - hi2c->XferISR(hi2c, itflags, itsources); - } -} - -/** - * @brief This function handles I2C error interrupt request. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) -{ - uint32_t itflags = READ_REG(hi2c->Instance->ISR); - uint32_t itsources = READ_REG(hi2c->Instance->CR1); - - /* I2C Bus error interrupt occurred ------------------------------------*/ - if (((itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; - - /* Clear BERR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); - } - - /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ - if (((itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; - - /* Clear OVR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); - } - - /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ - if (((itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERRI) != RESET)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; - - /* Clear ARLO flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); - } - - /* Call the Error Callback in case of Error detected */ - if ((hi2c->ErrorCode & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_NONE) - { - I2C_ITError(hi2c, hi2c->ErrorCode); - } -} - -/** - * @brief Master Tx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MasterTxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Master Rx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MasterRxCpltCallback could be implemented in the user file - */ -} - -/** @brief Slave Tx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Slave Rx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Slave Address Match callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFERDIRECTION - * @param AddrMatchCode Address Match Code - * @retval None - */ -__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - UNUSED(TransferDirection); - UNUSED(AddrMatchCode); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_AddrCallback() could be implemented in the user file - */ -} - -/** - * @brief Listen Complete callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_ListenCpltCallback() could be implemented in the user file - */ -} - -/** - * @brief Memory Tx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MemTxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Memory Rx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MemRxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief I2C error callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_ErrorCallback could be implemented in the user file - */ -} - -/** - * @brief I2C abort callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_AbortCpltCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions - * @brief Peripheral State, Mode and Error functions - * -@verbatim - =============================================================================== - ##### Peripheral State, Mode and Error functions ##### - =============================================================================== - [..] - This subsection permit to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the I2C handle state. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval HAL state - */ -HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) -{ - /* Return I2C handle state */ - return hi2c->State; -} - -/** - * @brief Returns the I2C Master, Slave, Memory or no mode. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for I2C module - * @retval HAL mode - */ -HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c) -{ - return hi2c->Mode; -} - -/** -* @brief Return the I2C error code. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. -* @retval I2C Error Code -*/ -uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) -{ - return hi2c->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup I2C_Private_Functions - * @{ - */ - -/** - * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param ITFlags Interrupt flags to handle. - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) -{ - uint16_t devaddress = 0U; - - /* Process Locked */ - __HAL_LOCK(hi2c); - - if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Set corresponding Error Code */ - /* No need to generate STOP, it is automatically done */ - /* Error callback will be send during stop flag treatment */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - } - else if (((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET)) - { - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferSize--; - hi2c->XferCount--; - } - else if (((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET)) - { - /* Write data to TXDR */ - hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - hi2c->XferSize--; - hi2c->XferCount--; - } - else if (((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET)) - { - if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - { - devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) - { - I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, hi2c->XferOptions, I2C_NO_STARTSTOP); - } - else - { - I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - } - } - else - { - /* Call TxCpltCallback() if no stop mode is set */ - if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) - { - /* Call I2C Master Sequential complete process */ - I2C_ITMasterSequentialCplt(hi2c); - } - else - { - /* Wrong size Status regarding TCR flag event */ - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); - } - } - } - else if (((ITFlags & I2C_FLAG_TC) != RESET) && ((ITSources & I2C_IT_TCI) != RESET)) - { - if (hi2c->XferCount == 0U) - { - if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) - { - /* Generate a stop condition in case of no transfer option */ - if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) - { - /* Generate Stop */ - hi2c->Instance->CR2 |= I2C_CR2_STOP; - } - else - { - /* Call I2C Master Sequential complete process */ - I2C_ITMasterSequentialCplt(hi2c); - } - } - } - else - { - /* Wrong size Status regarding TC flag event */ - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); - } - } - - if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) - { - /* Call I2C Master complete process */ - I2C_ITMasterCplt(hi2c, ITFlags); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; -} - -/** - * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param ITFlags Interrupt flags to handle. - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) -{ - /* Process locked */ - __HAL_LOCK(hi2c); - - if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) - { - /* Check that I2C transfer finished */ - /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ - /* Mean XferCount == 0*/ - /* So clear Flag NACKF only */ - if (hi2c->XferCount == 0U) - { - if (((hi2c->XferOptions == I2C_FIRST_AND_LAST_FRAME) || (hi2c->XferOptions == I2C_LAST_FRAME)) && \ - (hi2c->State == HAL_I2C_STATE_LISTEN)) - { - /* Call I2C Listen complete process */ - I2C_ITListenCplt(hi2c, ITFlags); - } - else if ((hi2c->XferOptions != I2C_NO_OPTION_FRAME) && (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)) - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - - /* Last Byte is Transmitted */ - /* Call I2C Slave Sequential complete process */ - I2C_ITSlaveSequentialCplt(hi2c); - } - else - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - } - } - else - { - /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - } - else if (((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET)) - { - if (hi2c->XferCount > 0U) - { - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferSize--; - hi2c->XferCount--; - } - - if ((hi2c->XferCount == 0U) && \ - (hi2c->XferOptions != I2C_NO_OPTION_FRAME)) - { - /* Call I2C Slave Sequential complete process */ - I2C_ITSlaveSequentialCplt(hi2c); - } - } - else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET)) - { - I2C_ITAddrCplt(hi2c, ITFlags); - } - else if (((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET)) - { - /* Write data to TXDR only if XferCount not reach "0" */ - /* A TXIS flag can be set, during STOP treatment */ - /* Check if all Datas have already been sent */ - /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ - if (hi2c->XferCount > 0U) - { - /* Write data to TXDR */ - hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - hi2c->XferCount--; - hi2c->XferSize--; - } - else - { - if ((hi2c->XferOptions == I2C_NEXT_FRAME) || (hi2c->XferOptions == I2C_FIRST_FRAME)) - { - /* Last Byte is Transmitted */ - /* Call I2C Slave Sequential complete process */ - I2C_ITSlaveSequentialCplt(hi2c); - } - } - } - - /* Check if STOPF is set */ - if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) - { - /* Call I2C Slave complete process */ - I2C_ITSlaveCplt(hi2c, ITFlags); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; -} - -/** - * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param ITFlags Interrupt flags to handle. - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) -{ - uint16_t devaddress = 0U; - uint32_t xfermode = 0U; - - /* Process Locked */ - __HAL_LOCK(hi2c); - - if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Set corresponding Error Code */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - - /* No need to generate STOP, it is automatically done */ - /* But enable STOP interrupt, to treat it */ - /* Error callback will be send during stop flag treatment */ - I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - } - else if (((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET)) - { - /* Disable TC interrupt */ - __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI); - - if (hi2c->XferCount != 0U) - { - /* Recover Slave address */ - devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); - - /* Prepare the new XferSize to transfer */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Set the new XferSize in Nbytes register */ - I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - - /* Enable DMA Request */ - if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - { - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - } - else - { - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - } - } - else - { - /* Wrong size Status regarding TCR flag event */ - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); - } - } - else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) - { - /* Call I2C Master complete process */ - I2C_ITMasterCplt(hi2c, ITFlags); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; -} - -/** - * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param ITFlags Interrupt flags to handle. - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) -{ - /* Process locked */ - __HAL_LOCK(hi2c); - - if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) - { - /* Check that I2C transfer finished */ - /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ - /* Mean XferCount == 0 */ - /* So clear Flag NACKF only */ - if (I2C_GET_DMA_REMAIN_DATA(hi2c) == 0U) - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - } - else - { - /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - } - else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET)) - { - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - } - else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) - { - /* Call I2C Slave complete process */ - I2C_ITSlaveCplt(hi2c, ITFlags); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; -} - -/** - * @brief Master sends target device address followed by internal memory address for write request. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) -{ - I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); - - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* If Memory address size is 8Bit */ - if (MemAddSize == I2C_MEMADD_SIZE_8BIT) - { - /* Send Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); - } - /* If Memory address size is 16Bit */ - else - { - /* Send MSB of Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); - - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Send LSB of Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); - } - - /* Wait until TCR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - return HAL_OK; -} - -/** - * @brief Master sends target device address followed by internal memory address for read request. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) -{ - I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); - - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* If Memory address size is 8Bit */ - if (MemAddSize == I2C_MEMADD_SIZE_8BIT) - { - /* Send Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); - } - /* If Memory address size is 16Bit */ - else - { - /* Send MSB of Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); - - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Send LSB of Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); - } - - /* Wait until TC flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - return HAL_OK; -} - -/** - * @brief I2C Address complete process callback. - * @param hi2c I2C handle. - * @param ITFlags Interrupt flags to handle. - * @retval None - */ -static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -{ - uint8_t transferdirection = 0U; - uint16_t slaveaddrcode = 0U; - uint16_t ownadd1code = 0U; - uint16_t ownadd2code = 0U; - - /* Prevent unused argument(s) compilation warning */ - UNUSED(ITFlags); - - /* In case of Listen state, need to inform upper layer of address match code event */ - if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN) - { - transferdirection = I2C_GET_DIR(hi2c); - slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); - ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); - ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); - - /* If 10bits addressing mode is selected */ - if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - { - if ((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK)) - { - slaveaddrcode = ownadd1code; - hi2c->AddrEventCount++; - if (hi2c->AddrEventCount == 2U) - { - /* Reset Address Event counter */ - hi2c->AddrEventCount = 0U; - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call Slave Addr callback */ - HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - } - } - else - { - slaveaddrcode = ownadd2code; - - /* Disable ADDR Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call Slave Addr callback */ - HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - } - } - /* else 7 bits addressing mode is selected */ - else - { - /* Disable ADDR Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call Slave Addr callback */ - HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - } - } - /* Else clear address flag only */ - else - { - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - } -} - -/** - * @brief I2C Master sequential complete process. - * @param hi2c I2C handle. - * @retval None - */ -static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c) -{ - /* Reset I2C handle mode */ - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* No Generate Stop, to permit restart mode */ - /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */ - if (hi2c->State == HAL_I2C_STATE_BUSY_TX) - { - hi2c->State = HAL_I2C_STATE_READY; - hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; - hi2c->XferISR = NULL; - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_MasterTxCpltCallback(hi2c); - } - /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ - else - { - hi2c->State = HAL_I2C_STATE_READY; - hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; - hi2c->XferISR = NULL; - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_MasterRxCpltCallback(hi2c); - } -} - -/** - * @brief I2C Slave sequential complete process. - * @param hi2c I2C handle. - * @retval None - */ -static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c) -{ - /* Reset I2C handle mode */ - hi2c->Mode = HAL_I2C_MODE_NONE; - - if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) - { - /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ - hi2c->State = HAL_I2C_STATE_LISTEN; - hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Tx complete callback to inform upper layer of the end of transmit process */ - HAL_I2C_SlaveTxCpltCallback(hi2c); - } - - else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) - { - /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */ - hi2c->State = HAL_I2C_STATE_LISTEN; - hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Rx complete callback to inform upper layer of the end of receive process */ - HAL_I2C_SlaveRxCpltCallback(hi2c); - } -} - -/** - * @brief I2C Master complete process. - * @param hi2c I2C handle. - * @param ITFlags Interrupt flags to handle. - * @retval None - */ -static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -{ - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - /* Reset handle parameters */ - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->XferISR = NULL; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - - if ((ITFlags & I2C_FLAG_AF) != RESET) - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Set acknowledge error code */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_RX_IT); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - if ((hi2c->ErrorCode != HAL_I2C_ERROR_NONE) || (hi2c->State == HAL_I2C_STATE_ABORT)) - { - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, hi2c->ErrorCode); - } - /* hi2c->State == HAL_I2C_STATE_BUSY_TX */ - else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) - { - hi2c->State = HAL_I2C_STATE_READY; - - if (hi2c->Mode == HAL_I2C_MODE_MEM) - { - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_MemTxCpltCallback(hi2c); - } - else - { - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_MasterTxCpltCallback(hi2c); - } - } - /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ - else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - { - hi2c->State = HAL_I2C_STATE_READY; - - if (hi2c->Mode == HAL_I2C_MODE_MEM) - { - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - HAL_I2C_MemRxCpltCallback(hi2c); - } - else - { - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - HAL_I2C_MasterRxCpltCallback(hi2c); - } - } -} - -/** - * @brief I2C Slave complete process. - * @param hi2c I2C handle. - * @param ITFlags Interrupt flags to handle. - * @retval None - */ -static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -{ - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - - /* Disable all interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT); - - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - - /* If a DMA is ongoing, Update handle size context */ - if (((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) || - ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)) - { - hi2c->XferCount = I2C_GET_DMA_REMAIN_DATA(hi2c); - } - - /* All data are not transferred, so set error code accordingly */ - if (hi2c->XferCount != 0U) - { - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - - /* Store Last receive data if any */ - if (((ITFlags & I2C_FLAG_RXNE) != RESET)) - { - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - - if ((hi2c->XferSize > 0U)) - { - hi2c->XferSize--; - hi2c->XferCount--; - - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - } - - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->Mode = HAL_I2C_MODE_NONE; - hi2c->XferISR = NULL; - - if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) - { - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, hi2c->ErrorCode); - - /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ - if (hi2c->State == HAL_I2C_STATE_LISTEN) - { - /* Call I2C Listen complete process */ - I2C_ITListenCplt(hi2c, ITFlags); - } - } - else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) - { - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ - HAL_I2C_ListenCpltCallback(hi2c); - } - /* Call the corresponding callback to inform upper layer of End of Transfer */ - else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - { - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Slave Rx Complete callback */ - HAL_I2C_SlaveRxCpltCallback(hi2c); - } - else - { - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Slave Tx Complete callback */ - HAL_I2C_SlaveTxCpltCallback(hi2c); - } -} - -/** - * @brief I2C Listen complete process. - * @param hi2c I2C handle. - * @param ITFlags Interrupt flags to handle. - * @retval None - */ -static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -{ - /* Reset handle parameters */ - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - hi2c->XferISR = NULL; - - /* Store Last receive data if any */ - if (((ITFlags & I2C_FLAG_RXNE) != RESET)) - { - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - - if ((hi2c->XferSize > 0U)) - { - hi2c->XferSize--; - hi2c->XferCount--; - - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - } - - /* Disable all Interrupts*/ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); - - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ - HAL_I2C_ListenCpltCallback(hi2c); -} - -/** - * @brief I2C interrupts error process. - * @param hi2c I2C handle. - * @param ErrorCode Error code to handle. - * @retval None - */ -static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) -{ - /* Reset handle parameters */ - hi2c->Mode = HAL_I2C_MODE_NONE; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferCount = 0U; - - /* Set new error code */ - hi2c->ErrorCode |= ErrorCode; - - /* Disable Interrupts */ - if ((hi2c->State == HAL_I2C_STATE_LISTEN) || - (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) || - (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)) - { - /* Disable all interrupts, except interrupts related to LISTEN state */ - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); - - /* keep HAL_I2C_STATE_LISTEN if set */ - hi2c->State = HAL_I2C_STATE_LISTEN; - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->XferISR = I2C_Slave_ISR_IT; - } - else - { - /* Disable all interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); - - /* If state is an abort treatment on goind, don't change state */ - /* This change will be do later */ - if (hi2c->State != HAL_I2C_STATE_ABORT) - { - /* Set HAL_I2C_STATE_READY */ - hi2c->State = HAL_I2C_STATE_READY; - } - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->XferISR = NULL; - } - - /* Abort DMA TX transfer if any */ - if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) - { - hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - - /* Set the I2C DMA Abort callback : - will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ - hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Abort DMA TX */ - if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) - { - /* Call Directly XferAbortCallback function in case of error */ - hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); - } - } - /* Abort DMA RX transfer if any */ - else if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) - { - hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - - /* Set the I2C DMA Abort callback : - will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ - hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Abort DMA RX */ - if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) - { - /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ - hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); - } - } - else if (hi2c->State == HAL_I2C_STATE_ABORT) - { - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_AbortCpltCallback(hi2c); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_ErrorCallback(hi2c); - } -} - -/** - * @brief I2C Tx data register flush process. - * @param hi2c I2C handle. - * @retval None - */ -static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) -{ - /* If a pending TXIS flag is set */ - /* Write a dummy data in TXDR to clear it */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) - { - hi2c->Instance->TXDR = 0x00U; - } - - /* Flush TX register if not empty */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - { - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); - } -} - -/** - * @brief DMA I2C master transmit process complete callback. - * @param hdma DMA handle - * @retval None - */ -static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) -{ - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - /* Disable DMA Request */ - hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - - /* If last transfer, enable STOP interrupt */ - if (hi2c->XferCount == 0U) - { - /* Enable STOP interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); - } - /* else prepare a new DMA transfer and enable TCReload interrupt */ - else - { - /* Update Buffer pointer */ - hi2c->pBuffPtr += hi2c->XferSize; - - /* Set the XferSize to transfer */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - } - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); - - /* Enable TC interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); - } -} - -/** - * @brief DMA I2C slave transmit process complete callback. - * @param hdma DMA handle - * @retval None - */ -static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hdma); - - /* No specific action, Master fully manage the generation of STOP condition */ - /* Mean that this generation can arrive at any time, at the end or during DMA process */ - /* So STOP condition should be manage through Interrupt treatment */ -} - -/** - * @brief DMA I2C master receive process complete callback. - * @param hdma DMA handle - * @retval None - */ -static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) -{ - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - /* Disable DMA Request */ - hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - - /* If last transfer, enable STOP interrupt */ - if (hi2c->XferCount == 0U) - { - /* Enable STOP interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); - } - /* else prepare a new DMA transfer and enable TCReload interrupt */ - else - { - /* Update Buffer pointer */ - hi2c->pBuffPtr += hi2c->XferSize; - - /* Set the XferSize to transfer */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - } - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize); - - /* Enable TC interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); - } -} - -/** - * @brief DMA I2C slave receive process complete callback. - * @param hdma DMA handle - * @retval None - */ -static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hdma); - - /* No specific action, Master fully manage the generation of STOP condition */ - /* Mean that this generation can arrive at any time, at the end or during DMA process */ - /* So STOP condition should be manage through Interrupt treatment */ -} - -/** - * @brief DMA I2C communication error callback. - * @param hdma DMA handle - * @retval None - */ -static void I2C_DMAError(DMA_HandleTypeDef *hdma) -{ - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - /* Disable Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); -} - -/** - * @brief DMA I2C communication abort callback - * (To be called at end of DMA Abort procedure). - * @param hdma DMA handle. - * @retval None - */ -static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) -{ - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - /* Disable Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - /* Reset AbortCpltCallback */ - hi2c->hdmatx->XferAbortCallback = NULL; - hi2c->hdmarx->XferAbortCallback = NULL; - - /* Check if come from abort from user */ - if (hi2c->State == HAL_I2C_STATE_ABORT) - { - hi2c->State = HAL_I2C_STATE_READY; - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_AbortCpltCallback(hi2c); - } - else - { - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_ErrorCallback(hi2c); - } -} - -/** - * @brief This function handles I2C Communication Timeout. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param Flag Specifies the I2C flag to check. - * @param Status The new Flag status (SET or RESET). - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) -{ - while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - { - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - { - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - } - return HAL_OK; -} - -/** - * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) -{ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) - { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) - { - return HAL_ERROR; - } - - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - { - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_TIMEOUT; - } - } - } - return HAL_OK; -} - -/** - * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) -{ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) - { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) - { - return HAL_ERROR; - } - - /* Check for the Timeout */ - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_TIMEOUT; - } - } - return HAL_OK; -} - -/** - * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) -{ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) - { - return HAL_ERROR; - } - - /* Check if a STOPF is detected */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) - { - /* Check if an RXNE is pending */ - /* Store Last receive data if any */ - if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && (hi2c->XferSize > 0U)) - { - /* Return HAL_OK */ - /* The Reading of data from RXDR will be done in caller function */ - return HAL_OK; - } - else - { - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_ERROR; - } - } - - /* Check for the Timeout */ - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_TIMEOUT; - } - } - return HAL_OK; -} - -/** - * @brief This function handles Acknowledge failed detection during an I2C Communication. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) -{ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - { - /* Wait until STOP Flag is reset */ - /* AutoEnd should be initiate after AF */ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) - { - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - { - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - } - - /* Clear NACKF Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->ErrorCode = HAL_I2C_ERROR_AF; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_ERROR; - } - return HAL_OK; -} - -/** - * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set). - * @param hi2c I2C handle. - * @param DevAddress Specifies the slave address to be programmed. - * @param Size Specifies the number of bytes to be programmed. - * This parameter must be a value between 0 and 255. - * @param Mode New state of the I2C START condition generation. - * This parameter can be one of the following values: - * @arg @ref I2C_RELOAD_MODE Enable Reload mode . - * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode. - * @arg @ref I2C_SOFTEND_MODE Enable Software end mode. - * @param Request New state of the I2C START condition generation. - * This parameter can be one of the following values: - * @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition. - * @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0). - * @arg @ref I2C_GENERATE_START_READ Generate Restart for read request. - * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. - * @retval None - */ -static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_TRANSFER_MODE(Mode)); - assert_param(IS_TRANSFER_REQUEST(Request)); - - /* update CR2 register */ - MODIFY_REG(hi2c->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP)), \ - (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request)); -} - -/** - * @brief Manage the enabling of Interrupts. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) -{ - uint32_t tmpisr = 0U; - - if ((hi2c->XferISR == I2C_Master_ISR_DMA) || \ - (hi2c->XferISR == I2C_Slave_ISR_DMA)) - { - if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - { - /* Enable ERR, STOP, NACK and ADDR interrupts */ - tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - } - - if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT) - { - /* Enable ERR and NACK interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; - } - - if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) - { - /* Enable STOP interrupts */ - tmpisr |= I2C_IT_STOPI; - } - - if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT) - { - /* Enable TC interrupts */ - tmpisr |= I2C_IT_TCI; - } - } - else - { - if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - { - /* Enable ERR, STOP, NACK, and ADDR interrupts */ - tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - } - - if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) - { - /* Enable ERR, TC, STOP, NACK and RXI interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; - } - - if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) - { - /* Enable ERR, TC, STOP, NACK and TXI interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; - } - - if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) - { - /* Enable STOP interrupts */ - tmpisr |= I2C_IT_STOPI; - } - } - - /* Enable interrupts only at the end */ - /* to avoid the risk of I2C interrupt handle execution before */ - /* all interrupts requested done */ - __HAL_I2C_ENABLE_IT(hi2c, tmpisr); - - return HAL_OK; -} - -/** - * @brief Manage the disabling of Interrupts. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) -{ - uint32_t tmpisr = 0U; - - if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) - { - /* Disable TC and TXI interrupts */ - tmpisr |= I2C_IT_TCI | I2C_IT_TXI; - - if ((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN) - { - /* Disable NACK and STOP interrupts */ - tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - } - } - - if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) - { - /* Disable TC and RXI interrupts */ - tmpisr |= I2C_IT_TCI | I2C_IT_RXI; - - if ((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN) - { - /* Disable NACK and STOP interrupts */ - tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - } - } - - if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - { - /* Disable ADDR, NACK and STOP interrupts */ - tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - } - - if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT) - { - /* Enable ERR and NACK interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; - } - - if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) - { - /* Enable STOP interrupts */ - tmpisr |= I2C_IT_STOPI; - } - - if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT) - { - /* Enable TC interrupts */ - tmpisr |= I2C_IT_TCI; - } - - /* Disable interrupts only at the end */ - /* to avoid a breaking situation like at "t" time */ - /* all disable interrupts request are not done */ - __HAL_I2C_DISABLE_IT(hi2c, tmpisr); - - return HAL_OK; -} - -/** - * @} - */ - -#endif /* HAL_I2C_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c deleted file mode 100644 index bd4e329d..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +++ /dev/null @@ -1,355 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_i2c_ex.c - * @author MCD Application Team - * @brief I2C Extended HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of I2C Extended peripheral: - * + Extended features functions - * - @verbatim - ============================================================================== - ##### I2C peripheral Extended features ##### - ============================================================================== - - [..] Comparing to other previous devices, the I2C interface for STM32L4xx - devices contains the following additional features - - (+) Possibility to disable or enable Analog Noise Filter - (+) Use of a configured Digital Noise Filter - (+) Disable or enable wakeup from Stop mode(s) - (+) Disable or enable Fast Mode Plus - - ##### How to use this driver ##### - ============================================================================== - [..] This driver provides functions to configure Noise Filter and Wake Up Feature - (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter() - (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter() - (#) Configure the enable or disable of I2C Wake Up Mode using the functions : - (++) HAL_I2CEx_EnableWakeUp() - (++) HAL_I2CEx_DisableWakeUp() - (#) Configure the enable or disable of fast mode plus driving capability using the functions : - (++) HAL_I2CEx_EnableFastModePlus() - (++) HAL_I2CEx_DisableFastModePlus() - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup I2CEx I2CEx - * @brief I2C Extended HAL module driver - * @{ - */ - -#ifdef HAL_I2C_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions - * @{ - */ - -/** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions - * @brief Extended features functions - * -@verbatim - =============================================================================== - ##### Extended features functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Configure Noise Filters - (+) Configure Wake Up Feature - (+) Configure Fast Mode Plus - -@endverbatim - * @{ - */ - -/** - * @brief Configure I2C Analog noise filter. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2Cx peripheral. - * @param AnalogFilter New state of the Analog filter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - - /* Reset I2Cx ANOFF bit */ - hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); - - /* Set analog filter bit*/ - hi2c->Instance->CR1 |= AnalogFilter; - - __HAL_I2C_ENABLE(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Configure I2C Digital noise filter. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2Cx peripheral. - * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) -{ - uint32_t tmpreg = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - - /* Get the old register value */ - tmpreg = hi2c->Instance->CR1; - - /* Reset I2Cx DNF bits [11:8] */ - tmpreg &= ~(I2C_CR1_DNF); - - /* Set I2Cx DNF coefficient */ - tmpreg |= DigitalFilter << 8U; - - /* Store the new register value */ - hi2c->Instance->CR1 = tmpreg; - - __HAL_I2C_ENABLE(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Enable I2C wakeup from Stop mode(s). - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2Cx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c) -{ - /* Check the parameters */ - assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - - /* Enable wakeup from stop mode */ - hi2c->Instance->CR1 |= I2C_CR1_WUPEN; - - __HAL_I2C_ENABLE(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Disable I2C wakeup from Stop mode(s). - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2Cx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c) -{ - /* Check the parameters */ - assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - - /* Enable wakeup from stop mode */ - hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN); - - __HAL_I2C_ENABLE(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Enable the I2C fast mode plus driving capability. - * @param ConfigFastModePlus Selects the pin. - * This parameter can be one of the @ref I2CEx_FastModePlus values - * @note For I2C1, fast mode plus driving capability can be enabled on all selected - * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently - * on each one of the following pins PB6, PB7, PB8 and PB9. - * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability - * can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter. - * @note For all I2C2 pins fast mode plus driving capability can be enabled - * only by using I2C_FASTMODEPLUS_I2C2 parameter. - * @note For all I2C3 pins fast mode plus driving capability can be enabled - * only by using I2C_FASTMODEPLUS_I2C3 parameter. - * @note For all I2C4 pins fast mode plus driving capability can be enabled - * only by using I2C_FASTMODEPLUS_I2C4 parameter. - * @retval None - */ -void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus) -{ - /* Check the parameter */ - assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); - - /* Enable SYSCFG clock */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - - /* Enable fast mode plus driving capability for selected pin */ - SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); -} - -/** - * @brief Disable the I2C fast mode plus driving capability. - * @param ConfigFastModePlus Selects the pin. - * This parameter can be one of the @ref I2CEx_FastModePlus values - * @note For I2C1, fast mode plus driving capability can be disabled on all selected - * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently - * on each one of the following pins PB6, PB7, PB8 and PB9. - * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability - * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter. - * @note For all I2C2 pins fast mode plus driving capability can be disabled - * only by using I2C_FASTMODEPLUS_I2C2 parameter. - * @note For all I2C3 pins fast mode plus driving capability can be disabled - * only by using I2C_FASTMODEPLUS_I2C3 parameter. - * @note For all I2C4 pins fast mode plus driving capability can be disabled - * only by using I2C_FASTMODEPLUS_I2C4 parameter. - * @retval None - */ -void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus) -{ - /* Check the parameter */ - assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); - - /* Enable SYSCFG clock */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - - /* Disable fast mode plus driving capability for selected pin */ - CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_I2C_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c deleted file mode 100644 index de415ad3..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c +++ /dev/null @@ -1,1675 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd.c - * @author MCD Application Team - * @brief PCD HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The PCD HAL driver can be used as follows: - - (#) Declare a PCD_HandleTypeDef handle structure, for example: - PCD_HandleTypeDef hpcd; - - (#) Fill parameters of Init structure in HCD handle - - (#) Call HAL_PCD_Init() API to initialize the PCD peripheral (Core, Device core, ...) - - (#) Initialize the PCD low level resources through the HAL_PCD_MspInit() API: - (##) Enable the PCD/USB Low Level interface clock using - (+++) __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - (##) Initialize the related GPIO clocks - (##) Configure PCD pin-out - (##) Configure PCD NVIC interrupt - - (#)Associate the Upper USB device stack to the HAL PCD Driver: - (##) hpcd.pData = pdev; - - (#)Enable PCD transmission and reception: - (##) HAL_PCD_Start(); - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup PCD PCD - * @brief PCD HAL module driver - * @{ - */ - -#ifdef HAL_PCD_MODULE_ENABLED - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** - * USB_OTG_CORE VERSION ID - */ -#define USB_OTG_CORE_ID_310A 0x4F54310A -#define USB_OTG_CORE_ID_320A 0x4F54320A - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup PCD_Private_Macros PCD Private Macros - * @{ - */ -#define PCD_MIN(a, b) (((a) < (b)) ? (a) : (b)) -#define PCD_MAX(a, b) (((a) > (b)) ? (a) : (b)) -/** - * @} - */ - -/* Private functions prototypes ----------------------------------------------*/ -/** @defgroup PCD_Private_Functions PCD Private Functions - * @{ - */ -#if defined (USB_OTG_FS) -static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum); -#endif /* USB_OTG_FS */ -#if defined (USB) -static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd); -#endif /* USB */ -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup PCD_Exported_Functions PCD Exported Functions - * @{ - */ - -/** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the PCD according to the specified - * parameters in the PCD_InitTypeDef and initialize the associated handle. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) -{ - uint32_t index = 0U; - - /* Check the PCD handle allocation */ - if(hpcd == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); - - if(hpcd->State == HAL_PCD_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hpcd->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC... */ - HAL_PCD_MspInit(hpcd); - } - - hpcd->State = HAL_PCD_STATE_BUSY; - - /* Disable the Interrupts */ - __HAL_PCD_DISABLE(hpcd); - - /*Init the Core (common init.) */ - USB_CoreInit(hpcd->Instance, hpcd->Init); - - /* Force Device Mode*/ - USB_SetCurrentMode(hpcd->Instance , USB_DEVICE_MODE); - - /* Init endpoints structures */ - for (index = 0; index < hpcd->Init.dev_endpoints ; index++) - { - /* Init ep structure */ - hpcd->IN_ep[index].is_in = 1; - hpcd->IN_ep[index].num = index; - hpcd->IN_ep[index].tx_fifo_num = index; - /* Control until ep is activated */ - hpcd->IN_ep[index].type = EP_TYPE_CTRL; - hpcd->IN_ep[index].maxpacket = 0; - hpcd->IN_ep[index].xfer_buff = 0; - hpcd->IN_ep[index].xfer_len = 0; - } - - for (index = 0; index < 15 ; index++) - { - hpcd->OUT_ep[index].is_in = 0; - hpcd->OUT_ep[index].num = index; - hpcd->IN_ep[index].tx_fifo_num = index; - /* Control until ep is activated */ - hpcd->OUT_ep[index].type = EP_TYPE_CTRL; - hpcd->OUT_ep[index].maxpacket = 0; - hpcd->OUT_ep[index].xfer_buff = 0; - hpcd->OUT_ep[index].xfer_len = 0; - } - - /* Init Device */ - USB_DevInit(hpcd->Instance, hpcd->Init); - - hpcd->USB_Address = 0; - - hpcd->State= HAL_PCD_STATE_READY; - - /* Activate LPM */ - if (hpcd->Init.lpm_enable ==1) - { - HAL_PCDEx_ActivateLPM(hpcd); - } - /* Activate Battery charging */ - if (hpcd->Init.battery_charging_enable ==1) - { - HAL_PCDEx_ActivateBCD(hpcd); - } - USB_DevDisconnect (hpcd->Instance); - return HAL_OK; -} - -/** - * @brief DeInitializes the PCD peripheral. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd) -{ - /* Check the PCD handle allocation */ - if(hpcd == NULL) - { - return HAL_ERROR; - } - - hpcd->State = HAL_PCD_STATE_BUSY; - - /* Stop Device */ - HAL_PCD_Stop(hpcd); - - /* DeInit the low level hardware */ - HAL_PCD_MspDeInit(hpcd); - - hpcd->State = HAL_PCD_STATE_RESET; - - return HAL_OK; -} - -/** - * @brief Initializes the PCD MSP. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitializes PCD MSP. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group2 Input and Output operation functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the PCD data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Start The USB OTG Device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - USB_DevConnect (hpcd->Instance); - __HAL_PCD_ENABLE(hpcd); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - -/** - * @brief Stop The USB OTG Device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - __HAL_PCD_DISABLE(hpcd); - USB_StopDevice(hpcd->Instance); - USB_DevDisconnect (hpcd->Instance); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} -#if defined (USB_OTG_FS) -/** - * @brief Handles PCD interrupt request. - * @param hpcd: PCD handle - * @retval HAL status - */ -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - uint32_t index = 0U, ep_intr = 0U, epint = 0U, epnum = 0U; - uint32_t fifoemptymsk = 0U, temp = 0U; - USB_OTG_EPTypeDef *ep = NULL; - uint32_t hclk = 80000000; - - /* ensure that we are in device mode */ - if (USB_GetMode(hpcd->Instance) == USB_OTG_MODE_DEVICE) - { - /* avoid spurious interrupt */ - if(__HAL_PCD_IS_INVALID_INTERRUPT(hpcd)) - { - return; - } - - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_MMIS)) - { - /* incorrect mode, acknowledge the interrupt */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS); - } - - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OEPINT)) - { - epnum = 0; - - /* Read in the device interrupt bits */ - ep_intr = USB_ReadDevAllOutEpInterrupt(hpcd->Instance); - - while (ep_intr) - { - if (ep_intr & 0x1) - { - epint = USB_ReadDevOutEPInterrupt(hpcd->Instance, epnum); - - if (( epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) - { - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_XFRC); - - /* setup/out transaction management for Core ID 310A */ - if (USBx->GSNPSID == USB_OTG_CORE_ID_310A) - { - if (!(USBx_OUTEP(0)->DOEPINT & (0x1 << 15))) - { - if (hpcd->Init.dma_enable == 1) - { - hpcd->OUT_ep[epnum].xfer_count = - hpcd->OUT_ep[epnum].maxpacket - - (USBx_OUTEP(epnum)->DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ); - - hpcd->OUT_ep[epnum].xfer_buff += - hpcd->OUT_ep[epnum].maxpacket; - } - - HAL_PCD_DataOutStageCallback(hpcd, epnum); - - if (hpcd->Init.dma_enable == 1) - { - if (!epnum && !hpcd->OUT_ep[epnum].xfer_len) - { - /* this is ZLP, so prepare EP0 for next setup */ - USB_EP0_OutStart(hpcd->Instance, 1, (uint8_t *)hpcd->Setup); - } - } - } - - /* Clear the SetPktRcvd flag*/ - USBx_OUTEP(0)->DOEPINT |= (0x1 << 15) | (0x1 << 5); - } - else - { - if (hpcd->Init.dma_enable == 1) - { - hpcd->OUT_ep[epnum].xfer_count = - hpcd->OUT_ep[epnum].maxpacket - - (USBx_OUTEP(epnum)->DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ); - hpcd->OUT_ep[epnum].xfer_buff += hpcd->OUT_ep[epnum].maxpacket; - } - - HAL_PCD_DataOutStageCallback(hpcd, epnum); - - if (hpcd->Init.dma_enable == 1) - { - if (!epnum && !hpcd->OUT_ep[epnum].xfer_len) - { - /* this is ZLP, so prepare EP0 for next setup */ - USB_EP0_OutStart(hpcd->Instance, 1, (uint8_t *)hpcd->Setup); - } - } - } - } - - if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) - { - /* Inform the upper layer that a setup packet is available */ - HAL_PCD_SetupStageCallback(hpcd); - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP); - } - - if(( epint & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS) - { - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPDIS); - } - -#ifdef USB_OTG_DOEPINT_OTEPSPR - /* Clear Status Phase Received interrupt */ - if(( epint & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR) - { - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR); - } -#endif /* USB_OTG_DOEPINT_OTEPSPR */ - } - epnum++; - ep_intr >>= 1; - } - } - - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IEPINT)) - { - /* Read in the device interrupt bits */ - ep_intr = USB_ReadDevAllInEpInterrupt(hpcd->Instance); - - epnum = 0; - - while ( ep_intr ) - { - if (ep_intr & 0x1) /* In ITR */ - { - epint = USB_ReadDevInEPInterrupt(hpcd->Instance, epnum); - - if(( epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) - { - fifoemptymsk = 0x1 << epnum; - USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk; - - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC); - - if (hpcd->Init.dma_enable == 1) - { - hpcd->IN_ep[epnum].xfer_buff += hpcd->IN_ep[epnum].maxpacket; - } - - HAL_PCD_DataInStageCallback(hpcd, epnum); - - if (hpcd->Init.dma_enable == 1) - { - /* this is ZLP, so prepare EP0 for next setup */ - if((epnum == 0) && (hpcd->IN_ep[epnum].xfer_len == 0)) - { - /* prepare to rx more setup packets */ - USB_EP0_OutStart(hpcd->Instance, 1, (uint8_t *)hpcd->Setup); - } - } - } - if(( epint & USB_OTG_DIEPINT_TOC) == USB_OTG_DIEPINT_TOC) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_TOC); - } - if(( epint & USB_OTG_DIEPINT_ITTXFE) == USB_OTG_DIEPINT_ITTXFE) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_ITTXFE); - } - if(( epint & USB_OTG_DIEPINT_INEPNE) == USB_OTG_DIEPINT_INEPNE) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_INEPNE); - } - if(( epint & USB_OTG_DIEPINT_EPDISD) == USB_OTG_DIEPINT_EPDISD) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_EPDISD); - } - if(( epint & USB_OTG_DIEPINT_TXFE) == USB_OTG_DIEPINT_TXFE) - { - PCD_WriteEmptyTxFifo(hpcd , epnum); - } - } - epnum++; - ep_intr >>= 1; - } - } - - /* Handle Resume Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT)) - { - /* Clear the Remote Wake-up Signaling */ - USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG; - - if(hpcd->LPM_State == LPM_L1) - { - hpcd->LPM_State = LPM_L0; - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE); - } - else - { - HAL_PCD_ResumeCallback(hpcd); - } - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT); - } - - /* Handle Suspend Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP)) - { - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS) - { - - HAL_PCD_SuspendCallback(hpcd); - } - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP); - } - - /* Handle LPM Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT); - if( hpcd->LPM_State == LPM_L0) - { - hpcd->LPM_State = LPM_L1; - hpcd->BESL = (hpcd->Instance->GLPMCFG & USB_OTG_GLPMCFG_BESL) >>2 ; - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE); - } - else - { - HAL_PCD_SuspendCallback(hpcd); - } - } - - /* Handle Reset Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBRST)) - { - USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG; - USB_FlushTxFifo(hpcd->Instance , 0x10); - - for (index = 0; index < hpcd->Init.dev_endpoints ; index++) - { - USBx_INEP(index)->DIEPINT = 0xFF; - USBx_OUTEP(index)->DOEPINT = 0xFF; - } - USBx_DEVICE->DAINT = 0xFFFFFFFF; - USBx_DEVICE->DAINTMSK |= 0x10001; - - if(hpcd->Init.use_dedicated_ep1) - { - USBx_DEVICE->DOUTEP1MSK |= (USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM); - USBx_DEVICE->DINEP1MSK |= (USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM); - } - else - { -#ifdef USB_OTG_DOEPINT_OTEPSPR - USBx_DEVICE->DOEPMSK |= (USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM | USB_OTG_DOEPMSK_OTEPSPRM); -#else - USBx_DEVICE->DOEPMSK |= (USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM); -#endif /* USB_OTG_DOEPINT_OTEPSPR */ - USBx_DEVICE->DIEPMSK |= (USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM); - } - - /* Set Default Address to 0 */ - USBx_DEVICE->DCFG &= ~USB_OTG_DCFG_DAD; - - /* setup EP0 to receive SETUP packets */ - USB_EP0_OutStart(hpcd->Instance, hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup); - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBRST); - } - - /* Handle Enumeration done Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE)) - { - USB_ActivateSetup(hpcd->Instance); - hpcd->Instance->GUSBCFG &= ~USB_OTG_GUSBCFG_TRDT; - - hpcd->Init.speed = USB_OTG_SPEED_FULL; - hpcd->Init.ep0_mps = USB_OTG_FS_MAX_PACKET_SIZE ; - - /* The USBTRD is configured according to the tables below, depending on AHB frequency - used by application. In the low AHB frequency range it is used to stretch enough the USB response - time to IN tokens, the USB turnaround time, so to compensate for the longer AHB read access - latency to the Data FIFO */ - - /* Get hclk frequency value */ - hclk = HAL_RCC_GetHCLKFreq(); - - if((hclk >= 14200000)&&(hclk < 15000000)) - { - /* hclk Clock Range between 14.2-15 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xF << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 15000000)&&(hclk < 16000000)) - { - /* hclk Clock Range between 15-16 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xE << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 16000000)&&(hclk < 17200000)) - { - /* hclk Clock Range between 16-17.2 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xD << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 17200000)&&(hclk < 18500000)) - { - /* hclk Clock Range between 17.2-18.5 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xC << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 18500000)&&(hclk < 20000000)) - { - /* hclk Clock Range between 18.5-20 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xB << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 20000000)&&(hclk < 21800000)) - { - /* hclk Clock Range between 20-21.8 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xA << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 21800000)&&(hclk < 24000000)) - { - /* hclk Clock Range between 21.8-24 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0x9 << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 24000000)&&(hclk < 27700000)) - { - /* hclk Clock Range between 24-27.7 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0x8 << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 27700000)&&(hclk < 32000000)) - { - /* hclk Clock Range between 27.7-32 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0x7 << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else /* if(hclk >= 32000000) */ - { - /* hclk Clock Range between 32-80 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0x6 << 10) & USB_OTG_GUSBCFG_TRDT); - } - - HAL_PCD_ResetCallback(hpcd); - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE); - } - - /* Handle RxQLevel Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) - { - USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - - temp = USBx->GRXSTSP; - - ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; - - if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT) - { - if((temp & USB_OTG_GRXSTSP_BCNT) != 0) - { - USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4); - ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - } - } - else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT) - { - USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8); - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - } - USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - } - - /* Handle SOF Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SOF)) - { - HAL_PCD_SOFCallback(hpcd); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SOF); - } - - /* Handle Incomplete ISO IN Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR)) - { - HAL_PCD_ISOINIncompleteCallback(hpcd, epnum); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR); - } - - /* Handle Incomplete ISO OUT Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT)) - { - HAL_PCD_ISOOUTIncompleteCallback(hpcd, epnum); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT); - } - - /* Handle Connection event Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT)) - { - HAL_PCD_ConnectCallback(hpcd); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT); - } - - /* Handle Disconnection event Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OTGINT)) - { - temp = hpcd->Instance->GOTGINT; - - if((temp & USB_OTG_GOTGINT_SEDET) == USB_OTG_GOTGINT_SEDET) - { - HAL_PCD_DisconnectCallback(hpcd); - } - hpcd->Instance->GOTGINT |= temp; - } - } -} - -#endif /* USB_OTG_FS */ - -#if defined (USB) -/** - * @brief This function handles PCD interrupt request. - * @param hpcd: PCD handle - * @retval HAL status - */ -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) -{ - uint32_t wInterrupt_Mask = 0; - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_CTR)) - { - /* servicing of the endpoint correct transfer interrupt */ - /* clear of the CTR flag into the sub */ - PCD_EP_ISR_Handler(hpcd); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_RESET)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); - HAL_PCD_ResetCallback(hpcd); - HAL_PCD_SetAddress(hpcd, 0); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_PMAOVR)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_ERR)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_WKUP)) - { - - hpcd->Instance->CNTR &= ~(USB_CNTR_LPMODE); - - /*set wInterrupt_Mask global variable*/ - wInterrupt_Mask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \ - | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; - - /*Set interrupt mask*/ - hpcd->Instance->CNTR = wInterrupt_Mask; - - /* enable L1REQ interrupt */ - if (hpcd->Init.lpm_enable ==1) - { - wInterrupt_Mask |= USB_CNTR_L1REQM; - - /* Enable LPM support and enable ACK answer to LPM request*/ - USB_TypeDef *USBx = hpcd->Instance; - hpcd->lpm_active = ENABLE; - hpcd->LPM_State = LPM_L0; - - USBx->LPMCSR |= (USB_LPMCSR_LMPEN); - USBx->LPMCSR |= (USB_LPMCSR_LPMACK); - } - - if(hpcd->LPM_State == LPM_L1) - { - hpcd->LPM_State = LPM_L0; - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE); - } - - HAL_PCD_ResumeCallback(hpcd); - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_SUSP)) - { - /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP); - - /* Force low-power mode in the macrocell */ - hpcd->Instance->CNTR |= USB_CNTR_FSUSP; - hpcd->Instance->CNTR |= USB_CNTR_LPMODE; - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_WKUP) == 0) - { - HAL_PCD_SuspendCallback(hpcd); - } - } - - /* Handle LPM Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_L1REQ)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_L1REQ); - if( hpcd->LPM_State == LPM_L0) - { - /* Force suspend and low-power mode before going to L1 state*/ - hpcd->Instance->CNTR |= USB_CNTR_LPMODE; - hpcd->Instance->CNTR |= USB_CNTR_FSUSP; - - hpcd->LPM_State = LPM_L1; - hpcd->BESL = (hpcd->Instance->LPMCSR & USB_LPMCSR_BESL) >>2 ; - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE); - } - else - { - HAL_PCD_SuspendCallback(hpcd); - } - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_SOF)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); - HAL_PCD_SOFCallback(hpcd); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_ESOF)) - { - /* clear ESOF flag in ISTR */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); - } -} -#endif /* USB */ - -/** - * @brief Data OUT stage callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ -__weak void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DataOutStageCallback could be implemented in the user file - */ -} - -/** - * @brief Data IN stage callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ -__weak void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DataInStageCallback could be implemented in the user file - */ -} -/** - * @brief Setup stage callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SetupStageCallback could be implemented in the user file - */ -} - -/** - * @brief USB Start Of Frame callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SOFCallback could be implemented in the user file - */ -} - -/** - * @brief USB Reset callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ResetCallback could be implemented in the user file - */ -} - -/** - * @brief Suspend event callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SuspendCallback could be implemented in the user file - */ -} - -/** - * @brief Resume event callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ResumeCallback could be implemented in the user file - */ -} - -/** - * @brief Incomplete ISO OUT callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ -__weak void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ISOOUTIncompleteCallback could be implemented in the user file - */ -} - -/** - * @brief Incomplete ISO IN callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ -__weak void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ISOINIncompleteCallback could be implemented in the user file - */ -} - -/** - * @brief Connection event callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ConnectCallback could be implemented in the user file - */ -} - -/** - * @brief Disconnection event callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DisconnectCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions - * @brief management functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the PCD data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Connect the USB device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - USB_DevConnect(hpcd->Instance); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - -/** - * @brief Disconnect the USB device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - USB_DevDisconnect(hpcd->Instance); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - -/** - * @brief Set the USB Device address. - * @param hpcd: PCD handle - * @param address: new device address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) -{ - __HAL_LOCK(hpcd); - hpcd->USB_Address = address; - USB_SetDevAddress(hpcd->Instance, address); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} -/** - * @brief Open and configure an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param ep_mps: endpoint max packet size - * @param ep_type: endpoint type - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) -{ - HAL_StatusTypeDef ret = HAL_OK; - PCD_EPTypeDef *ep = NULL; - - if ((ep_addr & 0x80) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr & 0x7F]; - } - ep->num = ep_addr & 0x7F; - - ep->is_in = (0x80 & ep_addr) != 0; - ep->maxpacket = ep_mps; - ep->type = ep_type; - - __HAL_LOCK(hpcd); - USB_ActivateEndpoint(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); - return ret; - -} - - -/** - * @brief Deactivate an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - PCD_EPTypeDef *ep = NULL; - - if ((ep_addr & 0x80) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr & 0x7F]; - } - ep->num = ep_addr & 0x7F; - - ep->is_in = (0x80 & ep_addr) != 0; - - __HAL_LOCK(hpcd); - USB_DeactivateEndpoint(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - - -/** - * @brief Receive an amount of data. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param pBuf: pointer to the reception buffer - * @param len: amount of data to be received - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) -{ - PCD_EPTypeDef *ep = NULL; - - ep = &hpcd->OUT_ep[ep_addr & 0x7F]; - - /*setup and start the Xfer */ - ep->xfer_buff = pBuf; - ep->xfer_len = len; - ep->xfer_count = 0; - ep->is_in = 0; - ep->num = ep_addr & 0x7F; - - if ((ep_addr & 0x7F) == 0 ) - { - USB_EP0StartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable); - } - else - { - USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable); - } - - return HAL_OK; -} - -/** - * @brief Get Received Data Size. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval Data Size - */ -uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - return hpcd->OUT_ep[ep_addr & 0x7F].xfer_count; -} -/** - * @brief Send an amount of data. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param pBuf: pointer to the transmission buffer - * @param len: amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) -{ - PCD_EPTypeDef *ep = NULL; - - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - - /*setup and start the Xfer */ - ep->xfer_buff = pBuf; - ep->xfer_len = len; - ep->xfer_count = 0; - ep->is_in = 1; - ep->num = ep_addr & 0x7F; - - if ((ep_addr & 0x7F) == 0 ) - { - USB_EP0StartXfer(hpcd->Instance,ep, hpcd->Init.dma_enable); - } - else - { - USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable); - } - - return HAL_OK; -} - -/** - * @brief Set a STALL condition over an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - PCD_EPTypeDef *ep = NULL; - - if ((0x80 & ep_addr) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - } - - ep->is_stall = 1; - ep->num = ep_addr & 0x7F; - ep->is_in = ((ep_addr & 0x80) == 0x80); - - __HAL_LOCK(hpcd); - USB_EPSetStall(hpcd->Instance , ep); - if((ep_addr & 0x7F) == 0) - { - USB_EP0_OutStart(hpcd->Instance, hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup); - } - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Clear a STALL condition over in an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - PCD_EPTypeDef *ep = NULL; - - if ((0x80 & ep_addr) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - } - - ep->is_stall = 0; - ep->num = ep_addr & 0x7F; - ep->is_in = ((ep_addr & 0x80) == 0x80); - - __HAL_LOCK(hpcd); - USB_EPClearStall(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Flush an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - __HAL_LOCK(hpcd); - - if ((ep_addr & 0x80) == 0x80) - { - USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F); - } - else - { - USB_FlushRxFifo(hpcd->Instance); - } - - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Activate remote wakeup signalling. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) -{ - return(USB_ActivateRemoteWakeup(hpcd->Instance)); -} - -/** - * @brief De-activate remote wakeup signalling. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) -{ - return(USB_DeActivateRemoteWakeup(hpcd->Instance)); -} -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the PCD handle state. - * @param hpcd: PCD handle - * @retval HAL state - */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd) -{ - return hpcd->State; -} -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @addtogroup PCD_Private_Functions - * @{ - */ -#if defined (USB_OTG_FS) -/** - * @brief Check FIFO for the next packet to be loaded. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval HAL status - */ -static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - USB_OTG_EPTypeDef *ep = NULL; - int32_t len = 0U; - uint32_t len32b = 0; - uint32_t fifoemptymsk = 0; - - ep = &hpcd->IN_ep[epnum]; - len = ep->xfer_len - ep->xfer_count; - - if (len > ep->maxpacket) - { - len = ep->maxpacket; - } - - - len32b = (len + 3) / 4; - - while ( (USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) > len32b && - ep->xfer_count < ep->xfer_len && - ep->xfer_len != 0) - { - /* Write the FIFO */ - len = ep->xfer_len - ep->xfer_count; - - if (len > ep->maxpacket) - { - len = ep->maxpacket; - } - len32b = (len + 3) / 4; - - USB_WritePacket(USBx, ep->xfer_buff, epnum, len, hpcd->Init.dma_enable); - - ep->xfer_buff += len; - ep->xfer_count += len; - } - - if(len <= 0) - { - fifoemptymsk = 0x1 << epnum; - USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk; - - } - - return HAL_OK; -} -#endif /* USB_OTG_FS */ - -#if defined (USB) -/** - * @brief This function handles PCD Endpoint interrupt request. - * @param hpcd: PCD handle - * @retval HAL status - */ -static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) -{ - PCD_EPTypeDef *ep = NULL; - uint16_t count = 0; - uint8_t epindex = 0; - __IO uint16_t wIstr = 0; - __IO uint16_t wEPVal = 0; - - /* stay in loop while pending interrupts */ - while (((wIstr = hpcd->Instance->ISTR) & USB_ISTR_CTR) != 0) - { - /* extract highest priority endpoint number */ - epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); - - if (epindex == 0) - { - /* Decode and service control endpoint interrupt */ - - /* DIR bit = origin of the interrupt */ - if ((wIstr & USB_ISTR_DIR) == 0) - { - /* DIR = 0 */ - - /* DIR = 0 => IN int */ - /* DIR = 0 implies that (EP_CTR_TX = 1) always */ - PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0); - ep = &hpcd->IN_ep[0]; - - ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); - ep->xfer_buff += ep->xfer_count; - - /* TX COMPLETE */ - HAL_PCD_DataInStageCallback(hpcd, 0); - - - if((hpcd->USB_Address > 0)&& ( ep->xfer_len == 0)) - { - hpcd->Instance->DADDR = (hpcd->USB_Address | USB_DADDR_EF); - hpcd->USB_Address = 0; - } - - } - else - { - /* DIR = 1 */ - - /* DIR = 1 & CTR_RX => SETUP or OUT int */ - /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ - ep = &hpcd->OUT_ep[0]; - wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); - - if ((wEPVal & USB_EP_SETUP) != 0) - { - /* Get SETUP Packet*/ - ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - USB_ReadPMA(hpcd->Instance, (uint8_t*)hpcd->Setup ,ep->pmaadress , ep->xfer_count); - /* SETUP bit kept frozen while CTR_RX = 1*/ - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); - - /* Process SETUP Packet*/ - HAL_PCD_SetupStageCallback(hpcd); - } - - else if ((wEPVal & USB_EP_CTR_RX) != 0) - { - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); - /* Get Control Data OUT Packet*/ - ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - - if (ep->xfer_count != 0) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count); - ep->xfer_buff+=ep->xfer_count; - } - - /* Process Control Data OUT Packet*/ - HAL_PCD_DataOutStageCallback(hpcd, 0); - - PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); - PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); - } - } - } - else - { - /* Decode and service non control endpoints interrupt */ - - /* process related endpoint register */ - wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex); - if ((wEPVal & USB_EP_CTR_RX) != 0) - { - /* clear int flag */ - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex); - ep = &hpcd->OUT_ep[epindex]; - - /* OUT double Buffering*/ - if (ep->doublebuffer == 0) - { - count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - if (count != 0) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); - } - } - else - { - if (PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) - { - /*read from endpoint BUF0Addr buffer*/ - count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); - if (count != 0) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); - } - } - else - { - /*read from endpoint BUF1Addr buffer*/ - count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); - if (count != 0) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); - } - } - PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_OUT); - } - /*multi-packet on the NON control OUT endpoint*/ - ep->xfer_count+=count; - ep->xfer_buff+=count; - - if ((ep->xfer_len == 0) || (count < ep->maxpacket)) - { - /* RX COMPLETE */ - HAL_PCD_DataOutStageCallback(hpcd, ep->num); - } - else - { - HAL_PCD_EP_Receive(hpcd, ep->num, ep->xfer_buff, ep->xfer_len); - } - - } /* if((wEPVal & EP_CTR_RX) */ - - if ((wEPVal & USB_EP_CTR_TX) != 0) - { - ep = &hpcd->IN_ep[epindex]; - - /* clear int flag */ - PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); - - /* IN double Buffering*/ - if (ep->doublebuffer == 0) - { - ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); - if (ep->xfer_count != 0) - { - USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count); - } - } - else - { - if (PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_TX) - { - /*read from endpoint BUF0Addr buffer*/ - ep->xfer_count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); - if (ep->xfer_count != 0) - { - USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, ep->xfer_count); - } - } - else - { - /*read from endpoint BUF1Addr buffer*/ - ep->xfer_count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); - if (ep->xfer_count != 0) - { - USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, ep->xfer_count); - } - } - PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_IN); - } - /*multi-packet on the NON control IN endpoint*/ - ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); - ep->xfer_buff+=ep->xfer_count; - - /* Zero Length Packet? */ - if (ep->xfer_len == 0) - { - /* TX COMPLETE */ - HAL_PCD_DataInStageCallback(hpcd, ep->num); - } - else - { - HAL_PCD_EP_Transmit(hpcd, ep->num, ep->xfer_buff, ep->xfer_len); - } - } - } - } - return HAL_OK; -} -#endif /* USB */ - -/** - * @} - */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* HAL_PCD_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c deleted file mode 100644 index 80fc7f9d..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c +++ /dev/null @@ -1,523 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd_ex.c - * @author MCD Application Team - * @brief PCD Extended HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Extended features functions - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup PCDEx PCDEx - * @brief PCD Extended HAL module driver - * @{ - */ - -#ifdef HAL_PCD_MODULE_ENABLED - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions - * @{ - */ - -/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions - * @brief PCDEx control functions - * -@verbatim - =============================================================================== - ##### Extended features functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Update FIFO configuration - -@endverbatim - * @{ - */ -#if defined (USB_OTG_FS) -/** - * @brief Set Tx FIFO - * @param hpcd: PCD handle - * @param fifo: The number of Tx fifo - * @param size: Fifo size - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size) -{ - uint8_t index = 0; - uint32_t Tx_Offset = 0; - - /* TXn min size = 16 words. (n : Transmit FIFO index) - When a TxFIFO is not used, the Configuration should be as follows: - case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes) - --> Txm can use the space allocated for Txn. - case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes) - --> Txn should be configured with the minimum space of 16 words - The FIFO is used optimally when used TxFIFOs are allocated in the top - of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones. - When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */ - - Tx_Offset = hpcd->Instance->GRXFSIZ; - - if(fifo == 0) - { - hpcd->Instance->DIEPTXF0_HNPTXFSIZ = (size << 16) | Tx_Offset; - } - else - { - Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16; - for (index = 0; index < (fifo - 1); index++) - { - Tx_Offset += (hpcd->Instance->DIEPTXF[index] >> 16); - } - - /* Multiply Tx_Size by 2 to get higher performance */ - hpcd->Instance->DIEPTXF[fifo - 1] = (size << 16) | Tx_Offset; - } - - return HAL_OK; -} - -/** - * @brief Set Rx FIFO - * @param hpcd: PCD handle - * @param size: Size of Rx fifo - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size) -{ - hpcd->Instance->GRXFSIZ = size; - - return HAL_OK; -} - -/** - * @brief Activate LPM feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - hpcd->lpm_active = ENABLE; - hpcd->LPM_State = LPM_L0; - USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM; - USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); - - return HAL_OK; -} - -/** - * @brief Deactivate LPM feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - hpcd->lpm_active = DISABLE; - USBx->GINTMSK &= ~USB_OTG_GINTMSK_LPMINTM; - USBx->GLPMCFG &= ~(USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); - - return HAL_OK; -} - -/** - * @brief Handle BatteryCharging Process. - * @param hpcd: PCD handle - * @retval HAL status - */ -void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - uint32_t tickstart = HAL_GetTick(); - - /* Start BCD When device is connected */ - if (USBx_DEVICE->DCTL & USB_OTG_DCTL_SDIS) - { - /* Enable DCD : Data Contact Detect */ - USBx->GCCFG |= USB_OTG_GCCFG_DCDEN; - - /* Wait Detect flag or a timeout is happen*/ - while ((USBx->GCCFG & USB_OTG_GCCFG_DCDET) == 0) - { - /* Check for the Timeout */ - if((HAL_GetTick() - tickstart ) > 1000) - { - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); - return; - } - } - - /* Right response got */ - HAL_Delay(100); - - /* Check Detect flag*/ - if (USBx->GCCFG & USB_OTG_GCCFG_DCDET) - { - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); - } - - /*Primary detection: checks if connected to Standard Downstream Port - (without charging capability) */ - USBx->GCCFG &=~ USB_OTG_GCCFG_DCDEN; - USBx->GCCFG |= USB_OTG_GCCFG_PDEN; - HAL_Delay(100); - - if (!(USBx->GCCFG & USB_OTG_GCCFG_PDET)) - { - /* Case of Standard Downstream Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); - } - else - { - /* start secondary detection to check connection to Charging Downstream - Port or Dedicated Charging Port */ - USBx->GCCFG &=~ USB_OTG_GCCFG_PDEN; - USBx->GCCFG |= USB_OTG_GCCFG_SDEN; - HAL_Delay(100); - - if ((USBx->GCCFG) & USB_OTG_GCCFG_SDET) - { - /* case Dedicated Charging Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); - } - else - { - /* case Charging Downstream Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); - } - } - /* Battery Charging capability discovery finished */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); - } -} - -/** - * @brief Activate BatteryCharging feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - hpcd->battery_charging_active = ENABLE; - USBx->GCCFG |= (USB_OTG_GCCFG_BCDEN); - - return HAL_OK; -} - -/** - * @brief Deactivate BatteryCharging feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - hpcd->battery_charging_active = DISABLE; - USBx->GCCFG &= ~(USB_OTG_GCCFG_BCDEN); - return HAL_OK; -} -#endif /* USB_OTG_FS */ - -#if defined (USB) -/** - * @brief Configure PMA for EP - * @param hpcd : Device instance - * @param ep_addr: endpoint address - * @param ep_kind: endpoint Kind - * USB_SNG_BUF: Single Buffer used - * USB_DBL_BUF: Double Buffer used - * @param pmaadress: EP address in The PMA: In case of single buffer endpoint - * this parameter is 16-bit value providing the address - * in PMA allocated to endpoint. - * In case of double buffer endpoint this parameter - * is a 32-bit value providing the endpoint buffer 0 address - * in the LSB part of 32-bit value and endpoint buffer 1 address - * in the MSB part of 32-bit value. - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, - uint16_t ep_addr, - uint16_t ep_kind, - uint32_t pmaadress) - -{ - PCD_EPTypeDef *ep = NULL; - - /* initialize ep structure*/ - if ((0x80 & ep_addr) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - } - - /* Here we check if the endpoint is single or double Buffer*/ - if (ep_kind == PCD_SNG_BUF) - { - /*Single Buffer*/ - ep->doublebuffer = 0; - /*Configure te PMA*/ - ep->pmaadress = (uint16_t)pmaadress; - } - else /*USB_DBL_BUF*/ - { - /*Double Buffer Endpoint*/ - ep->doublebuffer = 1; - /*Configure the PMA*/ - ep->pmaaddr0 = pmaadress & 0xFFFF; - ep->pmaaddr1 = (pmaadress & 0xFFFF0000) >> 16; - } - - return HAL_OK; -} - -/** - * @brief Activate BatteryCharging feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - hpcd->battery_charging_active = ENABLE; - - USBx->BCDR |= (USB_BCDR_BCDEN); - /* Enable DCD : Data Contact Detect */ - USBx->BCDR |= (USB_BCDR_DCDEN); - - return HAL_OK; -} - -/** - * @brief Deactivate BatteryCharging feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - hpcd->battery_charging_active = DISABLE; - - USBx->BCDR &= ~(USB_BCDR_BCDEN); - return HAL_OK; -} - -/** - * @brief Handle BatteryCharging Process. - * @param hpcd: PCD handle - * @retval HAL status - */ -void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - uint32_t tickstart = HAL_GetTick(); - - /* Wait Detect flag or a timeout is happen*/ - while ((USBx->BCDR & USB_BCDR_DCDET) == 0) - { - /* Check for the Timeout */ - if((HAL_GetTick() - tickstart ) > 1000) - { - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); - return; - } - } - - HAL_Delay(300); - - /* Data Pin Contact ? Check Detect flag */ - if (USBx->BCDR & USB_BCDR_DCDET) - { - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); - } - /* Primary detection: checks if connected to Standard Downstream Port - (without charging capability) */ - USBx->BCDR &= ~(USB_BCDR_DCDEN); - USBx->BCDR |= (USB_BCDR_PDEN); - HAL_Delay(300); - - /* If Charger detect ? */ - if (USBx->BCDR & USB_BCDR_PDET) - { - /* Start secondary detection to check connection to Charging Downstream - Port or Dedicated Charging Port */ - USBx->BCDR &= ~(USB_BCDR_PDEN); - USBx->BCDR |= (USB_BCDR_SDEN); - HAL_Delay(300); - - /* If CDP ? */ - if (USBx->BCDR & USB_BCDR_SDET) - { - /* Dedicated Downstream Port DCP */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); - } - else - { - /* Charging Downstream Port CDP */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); - - /* Battery Charging capability discovery finished - Start Enumeration*/ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); - } - } - else /* NO */ - { - /* Standard Downstream Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); - } -} - -/** - * @brief Activate LPM feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) -{ - - USB_TypeDef *USBx = hpcd->Instance; - hpcd->lpm_active = ENABLE; - hpcd->LPM_State = LPM_L0; - - USBx->LPMCSR |= (USB_LPMCSR_LMPEN); - USBx->LPMCSR |= (USB_LPMCSR_LPMACK); - - - return HAL_OK; -} - -/** - * @brief Deactivate LPM feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - - hpcd->lpm_active = DISABLE; - - USBx->LPMCSR &= ~ (USB_LPMCSR_LMPEN); - USBx->LPMCSR &= ~ (USB_LPMCSR_LPMACK); - - return HAL_OK; -} - -#endif /* USB */ - -/** - * @brief Send LPM message to user layer callback. - * @param hpcd: PCD handle - * @param msg: LPM message - * @retval HAL status - */ -__weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(msg); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCDEx_LPM_Callback could be implemented in the user file - */ -} - -/** - * @brief Send BatteryCharging message to user layer callback. - * @param hpcd: PCD handle - * @param msg: LPM message - * @retval HAL status - */ -__weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(msg); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCDEx_BCD_Callback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* HAL_PCD_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c deleted file mode 100644 index 919b9926..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +++ /dev/null @@ -1,674 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pwr.c - * @author MCD Application Team - * @brief PWR HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Power Controller (PWR) peripheral: - * + Initialization/de-initialization functions - * + Peripheral Control functions - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup PWR PWR - * @brief PWR HAL module driver - * @{ - */ - -#ifdef HAL_PWR_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -/** @defgroup PWR_Private_Defines PWR Private Defines - * @{ - */ - -/** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask - * @{ - */ -#define PVD_MODE_IT ((uint32_t)0x00010000) /*!< Mask for interruption yielded by PVD threshold crossing */ -#define PVD_MODE_EVT ((uint32_t)0x00020000) /*!< Mask for event yielded by PVD threshold crossing */ -#define PVD_RISING_EDGE ((uint32_t)0x00000001) /*!< Mask for rising edge set as PVD trigger */ -#define PVD_FALLING_EDGE ((uint32_t)0x00000002) /*!< Mask for falling edge set as PVD trigger */ -/** - * @} - */ - -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup PWR_Exported_Functions PWR Exported Functions - * @{ - */ - -/** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and de-initialization functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] - -@endverbatim - * @{ - */ - -/** - * @brief Deinitialize the HAL PWR peripheral registers to their default reset values. - * @retval None - */ -void HAL_PWR_DeInit(void) -{ - __HAL_RCC_PWR_FORCE_RESET(); - __HAL_RCC_PWR_RELEASE_RESET(); -} - -/** - * @brief Enable access to the backup domain - * (RTC registers, RTC backup data registers). - * @note After reset, the backup domain is protected against - * possible unwanted write accesses. - * @note RTCSEL that sets the RTC clock source selection is in the RTC back-up domain. - * In order to set or modify the RTC clock, the backup domain access must be - * disabled. - * @note LSEON bit that switches on and off the LSE crystal belongs as well to the - * back-up domain. - * @retval None - */ -void HAL_PWR_EnableBkUpAccess(void) -{ - SET_BIT(PWR->CR1, PWR_CR1_DBP); -} - -/** - * @brief Disable access to the backup domain - * (RTC registers, RTC backup data registers). - * @retval None - */ -void HAL_PWR_DisableBkUpAccess(void) -{ - CLEAR_BIT(PWR->CR1, PWR_CR1_DBP); -} - - - - -/** - * @} - */ - - - -/** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions - * @brief Low Power modes configuration functions - * -@verbatim - - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - - [..] - *** PVD configuration *** - ========================= - [..] - (+) The PVD is used to monitor the VDD power supply by comparing it to a - threshold selected by the PVD Level (PLS[2:0] bits in PWR_CR2 register). - - (+) PVDO flag is available to indicate if VDD/VDDA is higher or lower - than the PVD threshold. This event is internally connected to the EXTI - line16 and can generate an interrupt if enabled. This is done through - __HAL_PVD_EXTI_ENABLE_IT() macro. - (+) The PVD is stopped in Standby mode. - - - *** WakeUp pin configuration *** - ================================ - [..] - (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode. - The polarity of these pins can be set to configure event detection on high - level (rising edge) or low level (falling edge). - - - - *** Low Power modes configuration *** - ===================================== - [..] - The devices feature 8 low-power modes: - (+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator on. - (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on. - (+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, low power regulator on. - (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on. - (+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on. - (+) Stop 2 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on, reduced set of waking up IPs compared to Stop 1 mode. - (+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, main regulator off, low power regulator on. - (+) Standby mode without SRAM2: all clocks are stopped except LSI and LSE, main and low power regulators off. - (+) Shutdown mode: all clocks are stopped except LSE, main and low power regulators off. - - - *** Low-power run mode *** - ========================== - [..] - (+) Entry: (from main run mode) - (++) set LPR bit with HAL_PWREx_EnableLowPowerRunMode() API after having decreased the system clock below 2 MHz. - - (+) Exit: - (++) clear LPR bit then wait for REGLP bit to be reset with HAL_PWREx_DisableLowPowerRunMode() API. Only - then can the system clock frequency be increased above 2 MHz. - - - *** Sleep mode / Low-power sleep mode *** - ========================================= - [..] - (+) Entry: - The Sleep mode / Low-power Sleep mode is entered thru HAL_PWR_EnterSLEEPMode() API - in specifying whether or not the regulator is forced to low-power mode and if exit is interrupt or event-triggered. - (++) PWR_MAINREGULATOR_ON: Sleep mode (regulator in main mode). - (++) PWR_LOWPOWERREGULATOR_ON: Low-power sleep (regulator in low power mode). - In the latter case, the system clock frequency must have been decreased below 2 MHz beforehand. - (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction - (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction - - (+) WFI Exit: - (++) Any peripheral interrupt acknowledged by the nested vectored interrupt - controller (NVIC) or any wake-up event. - - (+) WFE Exit: - (++) Any wake-up event such as an EXTI line configured in event mode. - - [..] When exiting the Low-power sleep mode by issuing an interrupt or a wakeup event, - the MCU is in Low-power Run mode. - - *** Stop 0, Stop 1 and Stop 2 modes *** - =============================== - [..] - (+) Entry: - The Stop 0, Stop 1 or Stop 2 modes are entered thru the following API's: - (++) HAL_PWREx_EnterSTOP0Mode() for mode 0 or HAL_PWREx_EnterSTOP1Mode() for mode 1 or for porting reasons HAL_PWR_EnterSTOPMode(). - (++) HAL_PWREx_EnterSTOP2Mode() for mode 2. - (+) Regulator setting (applicable to HAL_PWR_EnterSTOPMode() only): - (++) PWR_MAINREGULATOR_ON - (++) PWR_LOWPOWERREGULATOR_ON - (+) Exit (interrupt or event-triggered, specified when entering STOP mode): - (++) PWR_STOPENTRY_WFI: enter Stop mode with WFI instruction - (++) PWR_STOPENTRY_WFE: enter Stop mode with WFE instruction - - (+) WFI Exit: - (++) Any EXTI Line (Internal or External) configured in Interrupt mode. - (++) Some specific communication peripherals (USART, LPUART, I2C) interrupts - when programmed in wakeup mode. - (+) WFE Exit: - (++) Any EXTI Line (Internal or External) configured in Event mode. - - [..] - When exiting Stop 0 and Stop 1 modes, the MCU is either in Run mode or in Low-power Run mode - depending on the LPR bit setting. - When exiting Stop 2 mode, the MCU is in Run mode. - - *** Standby mode *** - ==================== - [..] - The Standby mode offers two options: - (+) option a) all clocks off except LSI and LSE, RRS bit set (keeps voltage regulator in low power mode). - SRAM and registers contents are lost except for the SRAM2 content, the RTC registers, RTC backup registers - and Standby circuitry. - (+) option b) all clocks off except LSI and LSE, RRS bit cleared (voltage regulator then disabled). - SRAM and register contents are lost except for the RTC registers, RTC backup registers - and Standby circuitry. - - (++) Entry: - (+++) The Standby mode is entered thru HAL_PWR_EnterSTANDBYMode() API. - SRAM1 and register contents are lost except for registers in the Backup domain and - Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register. - To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API - to set RRS bit. - - (++) Exit: - (+++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event, - external reset in NRST pin, IWDG reset. - - [..] After waking up from Standby mode, program execution restarts in the same way as after a Reset. - - - *** Shutdown mode *** - ====================== - [..] - In Shutdown mode, - voltage regulator is disabled, all clocks are off except LSE, RRS bit is cleared. - SRAM and registers contents are lost except for backup domain registers. - - (+) Entry: - The Shutdown mode is entered thru HAL_PWREx_EnterSHUTDOWNMode() API. - - (+) Exit: - (++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event, - external reset in NRST pin. - - [..] After waking up from Shutdown mode, program execution restarts in the same way as after a Reset. - - - *** Auto-wakeup (AWU) from low-power mode *** - ============================================= - [..] - The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC - Wakeup event, a tamper event or a time-stamp event, without depending on - an external interrupt (Auto-wakeup mode). - - (+) RTC auto-wakeup (AWU) from the Stop, Standby and Shutdown modes - - - (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to - configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. - - (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it - is necessary to configure the RTC to detect the tamper or time stamp event using the - HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions. - - (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to - configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer_IT() function. - -@endverbatim - * @{ - */ - - - -/** - * @brief Configure the voltage threshold detected by the Power Voltage Detector (PVD). - * @param sConfigPVD: pointer to a PWR_PVDTypeDef structure that contains the PVD - * configuration information. - * @note Refer to the electrical characteristics of your device datasheet for - * more details about the voltage thresholds corresponding to each - * detection level. - * @retval None - */ -HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) -{ - /* Check the parameters */ - assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); - assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); - - /* Set PLS bits according to PVDLevel value */ - MODIFY_REG(PWR->CR2, PWR_CR2_PLS, sConfigPVD->PVDLevel); - - /* Clear any previous config. Keep it clear if no event or IT mode is selected */ - __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); - __HAL_PWR_PVD_EXTI_DISABLE_IT(); - __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); - __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); - - /* Configure interrupt mode */ - if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) - { - __HAL_PWR_PVD_EXTI_ENABLE_IT(); - } - - /* Configure event mode */ - if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) - { - __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); - } - - /* Configure the edge */ - if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) - { - __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); - } - - if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) - { - __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); - } - - return HAL_OK; -} - - -/** - * @brief Enable the Power Voltage Detector (PVD). - * @retval None - */ -void HAL_PWR_EnablePVD(void) -{ - SET_BIT(PWR->CR2, PWR_CR2_PVDE); -} - -/** - * @brief Disable the Power Voltage Detector (PVD). - * @retval None - */ -void HAL_PWR_DisablePVD(void) -{ - CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE); -} - - - - -/** - * @brief Enable the WakeUp PINx functionality. - * @param WakeUpPinPolarity: Specifies which Wake-Up pin to enable. - * This parameter can be one of the following legacy values which set the default polarity - * i.e. detection on high level (rising edge): - * @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5 - * - * or one of the following value where the user can explicitly specify the enabled pin and - * the chosen polarity: - * @arg @ref PWR_WAKEUP_PIN1_HIGH or PWR_WAKEUP_PIN1_LOW - * @arg @ref PWR_WAKEUP_PIN2_HIGH or PWR_WAKEUP_PIN2_LOW - * @arg @ref PWR_WAKEUP_PIN3_HIGH or PWR_WAKEUP_PIN3_LOW - * @arg @ref PWR_WAKEUP_PIN4_HIGH or PWR_WAKEUP_PIN4_LOW - * @arg @ref PWR_WAKEUP_PIN5_HIGH or PWR_WAKEUP_PIN5_LOW - * @note PWR_WAKEUP_PINx and PWR_WAKEUP_PINx_HIGH are equivalent. - * @retval None - */ -void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity) -{ - assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinPolarity)); - - /* Specifies the Wake-Up pin polarity for the event detection - (rising or falling edge) */ - MODIFY_REG(PWR->CR4, (PWR_CR3_EWUP & WakeUpPinPolarity), (WakeUpPinPolarity >> PWR_WUP_POLARITY_SHIFT)); - - /* Enable wake-up pin */ - SET_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinPolarity)); - - -} - -/** - * @brief Disable the WakeUp PINx functionality. - * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable. - * This parameter can be one of the following values: - * @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5 - * @retval None - */ -void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) -{ - assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); - - CLEAR_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinx)); -} - - -/** - * @brief Enter Sleep or Low-power Sleep mode. - * @note In Sleep/Low-power Sleep mode, all I/O pins keep the same state as in Run mode. - * @param Regulator: Specifies the regulator state in Sleep/Low-power Sleep mode. - * This parameter can be one of the following values: - * @arg @ref PWR_MAINREGULATOR_ON Sleep mode (regulator in main mode) - * @arg @ref PWR_LOWPOWERREGULATOR_ON Low-power Sleep mode (regulator in low-power mode) - * @note Low-power Sleep mode is entered from Low-power Run mode. Therefore, if not yet - * in Low-power Run mode before calling HAL_PWR_EnterSLEEPMode() with Regulator set - * to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the - * Flash in power-down monde in setting the SLEEP_PD bit in FLASH_ACR register. - * Additionally, the clock frequency must be reduced below 2 MHz. - * Setting SLEEP_PD in FLASH_ACR then appropriately reducing the clock frequency must - * be done before calling HAL_PWR_EnterSLEEPMode() API. - * @note When exiting Low-power Sleep mode, the MCU is in Low-power Run mode. To move in - * Run mode, the user must resort to HAL_PWREx_DisableLowPowerRunMode() API. - * @param SLEEPEntry: Specifies if Sleep mode is entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg @ref PWR_SLEEPENTRY_WFI enter Sleep or Low-power Sleep mode with WFI instruction - * @arg @ref PWR_SLEEPENTRY_WFE enter Sleep or Low-power Sleep mode with WFE instruction - * @note When WFI entry is used, tick interrupt have to be disabled if not desired as - * the interrupt wake up source. - * @retval None - */ -void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) -{ - /* Check the parameters */ - assert_param(IS_PWR_REGULATOR(Regulator)); - assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); - - /* Set Regulator parameter */ - if (Regulator == PWR_MAINREGULATOR_ON) - { - /* If in low-power run mode at this point, exit it */ - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) - { - HAL_PWREx_DisableLowPowerRunMode(); - } - /* Regulator now in main mode. */ - } - else - { - /* If in run mode, first move to low-power run mode. - The system clock frequency must be below 2 MHz at this point. */ - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF) == RESET) - { - HAL_PWREx_EnableLowPowerRunMode(); - } - } - - /* Clear SLEEPDEEP bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - - /* Select SLEEP mode entry -------------------------------------------------*/ - if(SLEEPEntry == PWR_SLEEPENTRY_WFI) - { - /* Request Wait For Interrupt */ - __WFI(); - } - else - { - /* Request Wait For Event */ - __SEV(); - __WFE(); - __WFE(); - } - -} - - -/** - * @brief Enter Stop mode - * @note This API is named HAL_PWR_EnterSTOPMode to ensure compatibility with legacy code running - * on devices where only "Stop mode" is mentioned with main or low power regulator ON. - * @note In Stop mode, all I/O pins keep the same state as in Run mode. - * @note All clocks in the VCORE domain are stopped; the PLL, the MSI, - * the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability - * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI - * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated - * only to the peripheral requesting it. - * SRAM1, SRAM2 and register contents are preserved. - * The BOR is available. - * The voltage regulator can be configured either in normal (Stop 0) or low-power mode (Stop 1). - * @note When exiting Stop 0 or Stop 1 mode by issuing an interrupt or a wakeup event, - * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register - * is set; the MSI oscillator is selected if STOPWUCK is cleared. - * @note When the voltage regulator operates in low power mode (Stop 1), an additional - * startup delay is incurred when waking up. - * By keeping the internal regulator ON during Stop mode (Stop 0), the consumption - * is higher although the startup time is reduced. - * @param Regulator: Specifies the regulator state in Stop mode. - * This parameter can be one of the following values: - * @arg @ref PWR_MAINREGULATOR_ON Stop 0 mode (main regulator ON) - * @arg @ref PWR_LOWPOWERREGULATOR_ON Stop 1 mode (low power regulator ON) - * @param STOPEntry: Specifies Stop 0 or Stop 1 mode is entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg @ref PWR_STOPENTRY_WFI Enter Stop 0 or Stop 1 mode with WFI instruction. - * @arg @ref PWR_STOPENTRY_WFE Enter Stop 0 or Stop 1 mode with WFE instruction. - * @retval None - */ -void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) -{ - /* Check the parameters */ - assert_param(IS_PWR_REGULATOR(Regulator)); - - if(Regulator == PWR_LOWPOWERREGULATOR_ON) - { - HAL_PWREx_EnterSTOP1Mode(STOPEntry); - } - else - { - HAL_PWREx_EnterSTOP0Mode(STOPEntry); - } -} - -/** - * @brief Enter Standby mode. - * @note In Standby mode, the PLL, the HSI, the MSI and the HSE oscillators are switched - * off. The voltage regulator is disabled, except when SRAM2 content is preserved - * in which case the regulator is in low-power mode. - * SRAM1 and register contents are lost except for registers in the Backup domain and - * Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register. - * To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API - * to set RRS bit. - * The BOR is available. - * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog state. - * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() respectively enable Pull Up and - * Pull Down state, HAL_PWREx_DisableGPIOPullUp() and HAL_PWREx_DisableGPIOPullDown() disable the - * same. - * These states are effective in Standby mode only if APC bit is set through - * HAL_PWREx_EnablePullUpPullDownConfig() API. - * @retval None - */ -void HAL_PWR_EnterSTANDBYMode(void) -{ - /* Set Stand-by mode */ - MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STANDBY); - - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - -/* This option is used to ensure that store operations are completed */ -#if defined ( __CC_ARM) - __force_stores(); -#endif - /* Request Wait For Interrupt */ - __WFI(); -} - - - -/** - * @brief Indicate Sleep-On-Exit when returning from Handler mode to Thread mode. - * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor - * re-enters SLEEP mode when an interruption handling is over. - * Setting this bit is useful when the processor is expected to run only on - * interruptions handling. - * @retval None - */ -void HAL_PWR_EnableSleepOnExit(void) -{ - /* Set SLEEPONEXIT bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); -} - - -/** - * @brief Disable Sleep-On-Exit feature when returning from Handler mode to Thread mode. - * @note Clear SLEEPONEXIT bit of SCR register. When this bit is set, the processor - * re-enters SLEEP mode when an interruption handling is over. - * @retval None - */ -void HAL_PWR_DisableSleepOnExit(void) -{ - /* Clear SLEEPONEXIT bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); -} - - - -/** - * @brief Enable CORTEX M4 SEVONPEND bit. - * @note Set SEVONPEND bit of SCR register. When this bit is set, this causes - * WFE to wake up when an interrupt moves from inactive to pended. - * @retval None - */ -void HAL_PWR_EnableSEVOnPend(void) -{ - /* Set SEVONPEND bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); -} - - -/** - * @brief Disable CORTEX M4 SEVONPEND bit. - * @note Clear SEVONPEND bit of SCR register. When this bit is set, this causes - * WFE to wake up when an interrupt moves from inactive to pended. - * @retval None - */ -void HAL_PWR_DisableSEVOnPend(void) -{ - /* Clear SEVONPEND bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); -} - - - - - -/** - * @brief PWR PVD interrupt callback - * @retval None - */ -__weak void HAL_PWR_PVDCallback(void) -{ - /* NOTE : This function should not be modified; when the callback is needed, - the HAL_PWR_PVDCallback can be implemented in the user file - */ -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_PWR_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c deleted file mode 100644 index bdd89602..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +++ /dev/null @@ -1,1399 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pwr_ex.c - * @author MCD Application Team - * @brief Extended PWR HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Power Controller (PWR) peripheral: - * + Extended Initialization and de-initialization functions - * + Extended Peripheral Control functions - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup PWREx PWREx - * @brief PWR Extended HAL module driver - * @{ - */ - -#ifdef HAL_PWR_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) -#define PWR_PORTH_AVAILABLE_PINS ((uint32_t)0x0000000B) /* PH0/PH1/PH3 */ -#elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define PWR_PORTH_AVAILABLE_PINS ((uint32_t)0x0000000B) /* PH0/PH1/PH3 */ -#elif defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) -#define PWR_PORTH_AVAILABLE_PINS ((uint32_t)0x00000003) /* PH0/PH1 */ -#elif defined (STM32L496xx) || defined (STM32L4A6xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define PWR_PORTH_AVAILABLE_PINS ((uint32_t)0x0000FFFF) /* PH0..PH15 */ -#endif - -#if defined (STM32L496xx) || defined (STM32L4A6xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define PWR_PORTI_AVAILABLE_PINS ((uint32_t)0x00000FFF) /* PI0..PI11 */ -#endif - -/** @defgroup PWR_Extended_Private_Defines PWR Extended Private Defines - * @{ - */ - -/** @defgroup PWREx_PVM_Mode_Mask PWR PVM Mode Mask - * @{ - */ -#define PVM_MODE_IT ((uint32_t)0x00010000) /*!< Mask for interruption yielded by PVM threshold crossing */ -#define PVM_MODE_EVT ((uint32_t)0x00020000) /*!< Mask for event yielded by PVM threshold crossing */ -#define PVM_RISING_EDGE ((uint32_t)0x00000001) /*!< Mask for rising edge set as PVM trigger */ -#define PVM_FALLING_EDGE ((uint32_t)0x00000002) /*!< Mask for falling edge set as PVM trigger */ -/** - * @} - */ - -/** @defgroup PWREx_TimeOut_Value PWR Extended Flag Setting Time Out Value - * @{ - */ -#define PWR_FLAG_SETTING_DELAY_US 50 /*!< Time out value for REGLPF and VOSF flags setting */ -/** - * @} - */ - - - -/** - * @} - */ - - - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions - * @{ - */ - -/** @defgroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions - * @brief Extended Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Extended Peripheral Initialization and de-initialization functions ##### - =============================================================================== - [..] - -@endverbatim - * @{ - */ - - -/** - * @brief Return Voltage Scaling Range. - * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_RANGE1 or PWR_REGULATOR_VOLTAGE_RANGE2 - * or PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when applicable) - */ -uint32_t HAL_PWREx_GetVoltageRange(void) -{ -#if defined(PWR_CR5_R1MODE) - if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2) - { - return PWR_REGULATOR_VOLTAGE_SCALE2; - } - else if (READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == PWR_CR5_R1MODE) - { - /* PWR_CR5_R1MODE bit set means that Range 1 Boost is disabled */ - return PWR_REGULATOR_VOLTAGE_SCALE1; - } - else - { - return PWR_REGULATOR_VOLTAGE_SCALE1_BOOST; - } -#else - return (PWR->CR1 & PWR_CR1_VOS); -#endif -} - - - -/** - * @brief Configure the main internal regulator output voltage. - * @param VoltageScaling: specifies the regulator output voltage to achieve - * a tradeoff between performance and power consumption. - * This parameter can be one of the following values: - @if STM32L4S9xx - * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when available, Regulator voltage output range 1 boost mode, - * typical output voltage at 1.2 V, - * system frequency up to 120 MHz. - @endif - * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode, - * typical output voltage at 1.2 V, - * system frequency up to 80 MHz. - * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode, - * typical output voltage at 1.0 V, - * system frequency up to 26 MHz. - * @note When moving from Range 1 to Range 2, the system frequency must be decreased to - * a value below 26 MHz before calling HAL_PWREx_ControlVoltageScaling() API. - * When moving from Range 2 to Range 1, the system frequency can be increased to - * a value up to 80 MHz after calling HAL_PWREx_ControlVoltageScaling() API. For - * some devices, the system frequency can be increased up to 120 MHz. - * @note When moving from Range 2 to Range 1, the API waits for VOSF flag to be - * cleared before returning the status. If the flag is not cleared within - * 50 microseconds, HAL_TIMEOUT status is reported. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) -{ - uint32_t wait_loop_index = 0; - - assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); - -#if defined(PWR_CR5_R1MODE) - if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) - { - /* If current range is range 2 */ - if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2) - { - /* Make sure Range 1 Boost is enabled */ - CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); - - /* Set Range 1 */ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); - - /* Wait until VOSF is cleared */ - wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000)); - while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))) - { - wait_loop_index--; - } - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) - { - return HAL_TIMEOUT; - } - } - /* If current range is range 1 normal or boost mode */ - else - { - /* Enable Range 1 Boost (no issue if bit already reset) */ - CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); - } - } - else if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1) - { - /* If current range is range 2 */ - if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2) - { - /* Make sure Range 1 Boost is disabled */ - SET_BIT(PWR->CR5, PWR_CR5_R1MODE); - - /* Set Range 1 */ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); - - /* Wait until VOSF is cleared */ - wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000)); - while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))) - { - wait_loop_index--; - } - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) - { - return HAL_TIMEOUT; - } - } - /* If current range is range 1 normal or boost mode */ - else - { - /* Disable Range 1 Boost (no issue if bit already set) */ - SET_BIT(PWR->CR5, PWR_CR5_R1MODE); - } - } - else - { - /* Set Range 2 */ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2); - /* No need to wait for VOSF to be cleared for this transition */ - /* PWR_CR5_R1MODE bit setting has no effect in Range 2 */ - } - -#else - - /* If Set Range 1 */ - if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1) - { - if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE1) - { - /* Set Range 1 */ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); - - /* Wait until VOSF is cleared */ - wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000)); - while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))) - { - wait_loop_index--; - } - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) - { - return HAL_TIMEOUT; - } - } - } - else - { - if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE2) - { - /* Set Range 2 */ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2); - /* No need to wait for VOSF to be cleared for this transition */ - } - } -#endif - - return HAL_OK; -} - - -/** - * @brief Enable battery charging. - * When VDD is present, charge the external battery on VBAT thru an internal resistor. - * @param ResistorSelection: specifies the resistor impedance. - * This parameter can be one of the following values: - * @arg @ref PWR_BATTERY_CHARGING_RESISTOR_5 5 kOhms resistor - * @arg @ref PWR_BATTERY_CHARGING_RESISTOR_1_5 1.5 kOhms resistor - * @retval None - */ -void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection) -{ - assert_param(IS_PWR_BATTERY_RESISTOR_SELECT(ResistorSelection)); - - /* Specify resistor selection */ - MODIFY_REG(PWR->CR4, PWR_CR4_VBRS, ResistorSelection); - - /* Enable battery charging */ - SET_BIT(PWR->CR4, PWR_CR4_VBE); -} - - -/** - * @brief Disable battery charging. - * @retval None - */ -void HAL_PWREx_DisableBatteryCharging(void) -{ - CLEAR_BIT(PWR->CR4, PWR_CR4_VBE); -} - - -#if defined(PWR_CR2_USV) -/** - * @brief Enable VDDUSB supply. - * @note Remove VDDUSB electrical and logical isolation, once VDDUSB supply is present. - * @retval None - */ -void HAL_PWREx_EnableVddUSB(void) -{ - SET_BIT(PWR->CR2, PWR_CR2_USV); -} - - -/** - * @brief Disable VDDUSB supply. - * @retval None - */ -void HAL_PWREx_DisableVddUSB(void) -{ - CLEAR_BIT(PWR->CR2, PWR_CR2_USV); -} -#endif /* PWR_CR2_USV */ - -#if defined(PWR_CR2_IOSV) -/** - * @brief Enable VDDIO2 supply. - * @note Remove VDDIO2 electrical and logical isolation, once VDDIO2 supply is present. - * @retval None - */ -void HAL_PWREx_EnableVddIO2(void) -{ - SET_BIT(PWR->CR2, PWR_CR2_IOSV); -} - - -/** - * @brief Disable VDDIO2 supply. - * @retval None - */ -void HAL_PWREx_DisableVddIO2(void) -{ - CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); -} -#endif /* PWR_CR2_IOSV */ - - -/** - * @brief Enable Internal Wake-up Line. - * @retval None - */ -void HAL_PWREx_EnableInternalWakeUpLine(void) -{ - SET_BIT(PWR->CR3, PWR_CR3_EIWF); -} - - -/** - * @brief Disable Internal Wake-up Line. - * @retval None - */ -void HAL_PWREx_DisableInternalWakeUpLine(void) -{ - CLEAR_BIT(PWR->CR3, PWR_CR3_EIWF); -} - - - -/** - * @brief Enable GPIO pull-up state in Standby and Shutdown modes. - * @note Set the relevant PUy bits of PWR_PUCRx register to configure the I/O in - * pull-up state in Standby and Shutdown modes. - * @note This state is effective in Standby and Shutdown modes only if APC bit - * is set through HAL_PWREx_EnablePullUpPullDownConfig() API. - * @note The configuration is lost when exiting the Shutdown mode due to the - * power-on reset, maintained when exiting the Standby mode. - * @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding - * PDy bit of PWR_PDCRx register is cleared unless it is reserved. - * @note Even if a PUy bit to set is reserved, the other PUy bits entered as input - * parameter at the same time are set. - * @param GPIO: Specify the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_H - * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. - * @param GPIONumber: Specify the I/O pins numbers. - * This parameter can be one of the following values: - * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less - * I/O pins are available) or the logical OR of several of them to set - * several bits for a given port in a single API call. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) -{ - assert_param(IS_PWR_GPIO(GPIO)); - assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); - - switch (GPIO) - { - case PWR_GPIO_A: - SET_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); - CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15)))); - break; - case PWR_GPIO_B: - SET_BIT(PWR->PUCRB, GPIONumber); - CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4)))); - break; - case PWR_GPIO_C: - SET_BIT(PWR->PUCRC, GPIONumber); - CLEAR_BIT(PWR->PDCRC, GPIONumber); - break; -#if defined(GPIOD) - case PWR_GPIO_D: - SET_BIT(PWR->PUCRD, GPIONumber); - CLEAR_BIT(PWR->PDCRD, GPIONumber); - break; -#endif -#if defined(GPIOE) - case PWR_GPIO_E: - SET_BIT(PWR->PUCRE, GPIONumber); - CLEAR_BIT(PWR->PDCRE, GPIONumber); - break; -#endif -#if defined(GPIOF) - case PWR_GPIO_F: - SET_BIT(PWR->PUCRF, GPIONumber); - CLEAR_BIT(PWR->PDCRF, GPIONumber); - break; -#endif -#if defined(GPIOG) - case PWR_GPIO_G: - SET_BIT(PWR->PUCRG, GPIONumber); - CLEAR_BIT(PWR->PDCRG, GPIONumber); - break; -#endif - case PWR_GPIO_H: - SET_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); -#if defined (STM32L496xx) || defined (STM32L4A6xx) - CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); -#else - CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); -#endif - break; -#if defined(GPIOI) - case PWR_GPIO_I: - SET_BIT(PWR->PUCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - CLEAR_BIT(PWR->PDCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - break; -#endif - default: - return HAL_ERROR; - } - - return HAL_OK; -} - - -/** - * @brief Disable GPIO pull-up state in Standby mode and Shutdown modes. - * @note Reset the relevant PUy bits of PWR_PUCRx register used to configure the I/O - * in pull-up state in Standby and Shutdown modes. - * @note Even if a PUy bit to reset is reserved, the other PUy bits entered as input - * parameter at the same time are reset. - * @param GPIO: Specifies the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_H - * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. - * @param GPIONumber: Specify the I/O pins numbers. - * This parameter can be one of the following values: - * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less - * I/O pins are available) or the logical OR of several of them to reset - * several bits for a given port in a single API call. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) -{ - assert_param(IS_PWR_GPIO(GPIO)); - assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); - - switch (GPIO) - { - case PWR_GPIO_A: - CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); - break; - case PWR_GPIO_B: - CLEAR_BIT(PWR->PUCRB, GPIONumber); - break; - case PWR_GPIO_C: - CLEAR_BIT(PWR->PUCRC, GPIONumber); - break; -#if defined(GPIOD) - case PWR_GPIO_D: - CLEAR_BIT(PWR->PUCRD, GPIONumber); - break; -#endif -#if defined(GPIOE) - case PWR_GPIO_E: - CLEAR_BIT(PWR->PUCRE, GPIONumber); - break; -#endif -#if defined(GPIOF) - case PWR_GPIO_F: - CLEAR_BIT(PWR->PUCRF, GPIONumber); - break; -#endif -#if defined(GPIOG) - case PWR_GPIO_G: - CLEAR_BIT(PWR->PUCRG, GPIONumber); - break; -#endif - case PWR_GPIO_H: - CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); - break; -#if defined(GPIOI) - case PWR_GPIO_I: - CLEAR_BIT(PWR->PUCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - break; -#endif - default: - return HAL_ERROR; - } - - return HAL_OK; -} - - - -/** - * @brief Enable GPIO pull-down state in Standby and Shutdown modes. - * @note Set the relevant PDy bits of PWR_PDCRx register to configure the I/O in - * pull-down state in Standby and Shutdown modes. - * @note This state is effective in Standby and Shutdown modes only if APC bit - * is set through HAL_PWREx_EnablePullUpPullDownConfig() API. - * @note The configuration is lost when exiting the Shutdown mode due to the - * power-on reset, maintained when exiting the Standby mode. - * @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding - * PUy bit of PWR_PUCRx register is cleared unless it is reserved. - * @note Even if a PDy bit to set is reserved, the other PDy bits entered as input - * parameter at the same time are set. - * @param GPIO: Specify the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_H - * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. - * @param GPIONumber: Specify the I/O pins numbers. - * This parameter can be one of the following values: - * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less - * I/O pins are available) or the logical OR of several of them to set - * several bits for a given port in a single API call. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) -{ - assert_param(IS_PWR_GPIO(GPIO)); - assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); - - switch (GPIO) - { - case PWR_GPIO_A: - SET_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15)))); - CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); - break; - case PWR_GPIO_B: - SET_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4)))); - CLEAR_BIT(PWR->PUCRB, GPIONumber); - break; - case PWR_GPIO_C: - SET_BIT(PWR->PDCRC, GPIONumber); - CLEAR_BIT(PWR->PUCRC, GPIONumber); - break; -#if defined(GPIOD) - case PWR_GPIO_D: - SET_BIT(PWR->PDCRD, GPIONumber); - CLEAR_BIT(PWR->PUCRD, GPIONumber); - break; -#endif -#if defined(GPIOE) - case PWR_GPIO_E: - SET_BIT(PWR->PDCRE, GPIONumber); - CLEAR_BIT(PWR->PUCRE, GPIONumber); - break; -#endif -#if defined(GPIOF) - case PWR_GPIO_F: - SET_BIT(PWR->PDCRF, GPIONumber); - CLEAR_BIT(PWR->PUCRF, GPIONumber); - break; -#endif -#if defined(GPIOG) - case PWR_GPIO_G: - SET_BIT(PWR->PDCRG, GPIONumber); - CLEAR_BIT(PWR->PUCRG, GPIONumber); - break; -#endif - case PWR_GPIO_H: -#if defined (STM32L496xx) || defined (STM32L4A6xx) - SET_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); -#else - SET_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); -#endif - CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); - break; -#if defined(GPIOI) - case PWR_GPIO_I: - SET_BIT(PWR->PDCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - CLEAR_BIT(PWR->PUCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - break; -#endif - default: - return HAL_ERROR; - } - - return HAL_OK; -} - - -/** - * @brief Disable GPIO pull-down state in Standby and Shutdown modes. - * @note Reset the relevant PDy bits of PWR_PDCRx register used to configure the I/O - * in pull-down state in Standby and Shutdown modes. - * @note Even if a PDy bit to reset is reserved, the other PDy bits entered as input - * parameter at the same time are reset. - * @param GPIO: Specifies the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_H - * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. - * @param GPIONumber: Specify the I/O pins numbers. - * This parameter can be one of the following values: - * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less - * I/O pins are available) or the logical OR of several of them to reset - * several bits for a given port in a single API call. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) -{ - assert_param(IS_PWR_GPIO(GPIO)); - assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); - - switch (GPIO) - { - case PWR_GPIO_A: - CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15)))); - break; - case PWR_GPIO_B: - CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4)))); - break; - case PWR_GPIO_C: - CLEAR_BIT(PWR->PDCRC, GPIONumber); - break; -#if defined(GPIOD) - case PWR_GPIO_D: - CLEAR_BIT(PWR->PDCRD, GPIONumber); - break; -#endif -#if defined(GPIOE) - case PWR_GPIO_E: - CLEAR_BIT(PWR->PDCRE, GPIONumber); - break; -#endif -#if defined(GPIOF) - case PWR_GPIO_F: - CLEAR_BIT(PWR->PDCRF, GPIONumber); - break; -#endif -#if defined(GPIOG) - case PWR_GPIO_G: - CLEAR_BIT(PWR->PDCRG, GPIONumber); - break; -#endif - case PWR_GPIO_H: -#if defined (STM32L496xx) || defined (STM32L4A6xx) - CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); -#else - CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); -#endif - break; -#if defined(GPIOI) - case PWR_GPIO_I: - CLEAR_BIT(PWR->PDCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - break; -#endif - default: - return HAL_ERROR; - } - - return HAL_OK; -} - - - -/** - * @brief Enable pull-up and pull-down configuration. - * @note When APC bit is set, the I/O pull-up and pull-down configurations defined in - * PWR_PUCRx and PWR_PDCRx registers are applied in Standby and Shutdown modes. - * @note Pull-up set by PUy bit of PWR_PUCRx register is not activated if the corresponding - * PDy bit of PWR_PDCRx register is also set (pull-down configuration priority is higher). - * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() API's ensure there - * is no conflict when setting PUy or PDy bit. - * @retval None - */ -void HAL_PWREx_EnablePullUpPullDownConfig(void) -{ - SET_BIT(PWR->CR3, PWR_CR3_APC); -} - - -/** - * @brief Disable pull-up and pull-down configuration. - * @note When APC bit is cleared, the I/O pull-up and pull-down configurations defined in - * PWR_PUCRx and PWR_PDCRx registers are not applied in Standby and Shutdown modes. - * @retval None - */ -void HAL_PWREx_DisablePullUpPullDownConfig(void) -{ - CLEAR_BIT(PWR->CR3, PWR_CR3_APC); -} - - - -/** - * @brief Enable SRAM2 content retention in Standby mode. - * @note When RRS bit is set, SRAM2 is powered by the low-power regulator in - * Standby mode and its content is kept. - * @retval None - */ -void HAL_PWREx_EnableSRAM2ContentRetention(void) -{ - SET_BIT(PWR->CR3, PWR_CR3_RRS); -} - - -/** - * @brief Disable SRAM2 content retention in Standby mode. - * @note When RRS bit is reset, SRAM2 is powered off in Standby mode - * and its content is lost. - * @retval None - */ -void HAL_PWREx_DisableSRAM2ContentRetention(void) -{ - CLEAR_BIT(PWR->CR3, PWR_CR3_RRS); -} - - -#if defined(PWR_CR1_RRSTP) -/** - * @brief Enable SRAM3 content retention in Stop 2 mode. - * @note When RRSTP bit is set, SRAM3 is powered by the low-power regulator in - * Stop 2 mode and its content is kept. - * @retval None - */ -void HAL_PWREx_EnableSRAM3ContentRetention(void) -{ - SET_BIT(PWR->CR1, PWR_CR1_RRSTP); -} - - -/** - * @brief Disable SRAM3 content retention in Stop 2 mode. - * @note When RRSTP bit is reset, SRAM3 is powered off in Stop 2 mode - * and its content is lost. - * @retval None - */ -void HAL_PWREx_DisableSRAM3ContentRetention(void) -{ - CLEAR_BIT(PWR->CR1, PWR_CR1_RRSTP); -} -#endif /* PWR_CR1_RRSTP */ - -#if defined(PWR_CR3_DSIPDEN) -/** - * @brief Enable pull-down activation on DSI pins. - * @retval None - */ -void HAL_PWREx_EnableDSIPinsPDActivation(void) -{ - SET_BIT(PWR->CR3, PWR_CR3_DSIPDEN); -} - - -/** - * @brief Disable pull-down activation on DSI pins. - * @retval None - */ -void HAL_PWREx_DisableDSIPinsPDActivation(void) -{ - CLEAR_BIT(PWR->CR3, PWR_CR3_DSIPDEN); -} -#endif /* PWR_CR3_DSIPDEN */ - -#if defined(PWR_CR2_PVME1) -/** - * @brief Enable the Power Voltage Monitoring 1: VDDUSB versus 1.2V. - * @retval None - */ -void HAL_PWREx_EnablePVM1(void) -{ - SET_BIT(PWR->CR2, PWR_PVM_1); -} - -/** - * @brief Disable the Power Voltage Monitoring 1: VDDUSB versus 1.2V. - * @retval None - */ -void HAL_PWREx_DisablePVM1(void) -{ - CLEAR_BIT(PWR->CR2, PWR_PVM_1); -} -#endif /* PWR_CR2_PVME1 */ - - -#if defined(PWR_CR2_PVME2) -/** - * @brief Enable the Power Voltage Monitoring 2: VDDIO2 versus 0.9V. - * @retval None - */ -void HAL_PWREx_EnablePVM2(void) -{ - SET_BIT(PWR->CR2, PWR_PVM_2); -} - -/** - * @brief Disable the Power Voltage Monitoring 2: VDDIO2 versus 0.9V. - * @retval None - */ -void HAL_PWREx_DisablePVM2(void) -{ - CLEAR_BIT(PWR->CR2, PWR_PVM_2); -} -#endif /* PWR_CR2_PVME2 */ - - -/** - * @brief Enable the Power Voltage Monitoring 3: VDDA versus 1.62V. - * @retval None - */ -void HAL_PWREx_EnablePVM3(void) -{ - SET_BIT(PWR->CR2, PWR_PVM_3); -} - -/** - * @brief Disable the Power Voltage Monitoring 3: VDDA versus 1.62V. - * @retval None - */ -void HAL_PWREx_DisablePVM3(void) -{ - CLEAR_BIT(PWR->CR2, PWR_PVM_3); -} - - -/** - * @brief Enable the Power Voltage Monitoring 4: VDDA versus 2.2V. - * @retval None - */ -void HAL_PWREx_EnablePVM4(void) -{ - SET_BIT(PWR->CR2, PWR_PVM_4); -} - -/** - * @brief Disable the Power Voltage Monitoring 4: VDDA versus 2.2V. - * @retval None - */ -void HAL_PWREx_DisablePVM4(void) -{ - CLEAR_BIT(PWR->CR2, PWR_PVM_4); -} - - - - -/** - * @brief Configure the Peripheral Voltage Monitoring (PVM). - * @param sConfigPVM: pointer to a PWR_PVMTypeDef structure that contains the - * PVM configuration information. - * @note The API configures a single PVM according to the information contained - * in the input structure. To configure several PVMs, the API must be singly - * called for each PVM used. - * @note Refer to the electrical characteristics of your device datasheet for - * more details about the voltage thresholds corresponding to each - * detection level and to each monitored supply. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM) -{ - /* Check the parameters */ - assert_param(IS_PWR_PVM_TYPE(sConfigPVM->PVMType)); - assert_param(IS_PWR_PVM_MODE(sConfigPVM->Mode)); - - - /* Configure EXTI 35 to 38 interrupts if so required: - scan thru PVMType to detect which PVMx is set and - configure the corresponding EXTI line accordingly. */ - switch (sConfigPVM->PVMType) - { -#if defined(PWR_CR2_PVME1) - case PWR_PVM_1: - /* Clear any previous config. Keep it clear if no event or IT mode is selected */ - __HAL_PWR_PVM1_EXTI_DISABLE_EVENT(); - __HAL_PWR_PVM1_EXTI_DISABLE_IT(); - __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE(); - __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE(); - - /* Configure interrupt mode */ - if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) - { - __HAL_PWR_PVM1_EXTI_ENABLE_IT(); - } - - /* Configure event mode */ - if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) - { - __HAL_PWR_PVM1_EXTI_ENABLE_EVENT(); - } - - /* Configure the edge */ - if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) - { - __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE(); - } - - if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) - { - __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE(); - } - break; -#endif /* PWR_CR2_PVME1 */ - -#if defined(PWR_CR2_PVME2) - case PWR_PVM_2: - /* Clear any previous config. Keep it clear if no event or IT mode is selected */ - __HAL_PWR_PVM2_EXTI_DISABLE_EVENT(); - __HAL_PWR_PVM2_EXTI_DISABLE_IT(); - __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE(); - __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE(); - - /* Configure interrupt mode */ - if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) - { - __HAL_PWR_PVM2_EXTI_ENABLE_IT(); - } - - /* Configure event mode */ - if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) - { - __HAL_PWR_PVM2_EXTI_ENABLE_EVENT(); - } - - /* Configure the edge */ - if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) - { - __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE(); - } - - if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) - { - __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE(); - } - break; -#endif /* PWR_CR2_PVME2 */ - - case PWR_PVM_3: - /* Clear any previous config. Keep it clear if no event or IT mode is selected */ - __HAL_PWR_PVM3_EXTI_DISABLE_EVENT(); - __HAL_PWR_PVM3_EXTI_DISABLE_IT(); - __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE(); - __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE(); - - /* Configure interrupt mode */ - if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) - { - __HAL_PWR_PVM3_EXTI_ENABLE_IT(); - } - - /* Configure event mode */ - if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) - { - __HAL_PWR_PVM3_EXTI_ENABLE_EVENT(); - } - - /* Configure the edge */ - if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) - { - __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE(); - } - - if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) - { - __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE(); - } - break; - - case PWR_PVM_4: - /* Clear any previous config. Keep it clear if no event or IT mode is selected */ - __HAL_PWR_PVM4_EXTI_DISABLE_EVENT(); - __HAL_PWR_PVM4_EXTI_DISABLE_IT(); - __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE(); - __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE(); - - /* Configure interrupt mode */ - if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) - { - __HAL_PWR_PVM4_EXTI_ENABLE_IT(); - } - - /* Configure event mode */ - if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) - { - __HAL_PWR_PVM4_EXTI_ENABLE_EVENT(); - } - - /* Configure the edge */ - if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) - { - __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE(); - } - - if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) - { - __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE(); - } - break; - - default: - return HAL_ERROR; - - } - - - return HAL_OK; -} - - - -/** - * @brief Enter Low-power Run mode - * @note In Low-power Run mode, all I/O pins keep the same state as in Run mode. - * @note When Regulator is set to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the - * Flash in power-down monde in setting the RUN_PD bit in FLASH_ACR register. - * Additionally, the clock frequency must be reduced below 2 MHz. - * Setting RUN_PD in FLASH_ACR then appropriately reducing the clock frequency must - * be done before calling HAL_PWREx_EnableLowPowerRunMode() API. - * @retval None - */ -void HAL_PWREx_EnableLowPowerRunMode(void) -{ - /* Set Regulator parameter */ - SET_BIT(PWR->CR1, PWR_CR1_LPR); -} - - -/** - * @brief Exit Low-power Run mode. - * @note Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that - * REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode - * returns HAL_TIMEOUT status). The system clock frequency can then be - * increased above 2 MHz. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void) -{ - uint32_t wait_loop_index = 0; - - /* Clear LPR bit */ - CLEAR_BIT(PWR->CR1, PWR_CR1_LPR); - - /* Wait until REGLPF is reset */ - wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000)); - while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))) - { - wait_loop_index--; - } - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) - { - return HAL_TIMEOUT; - } - - return HAL_OK; -} - - -/** - * @brief Enter Stop 0 mode. - * @note In Stop 0 mode, main and low voltage regulators are ON. - * @note In Stop 0 mode, all I/O pins keep the same state as in Run mode. - * @note All clocks in the VCORE domain are stopped; the PLL, the MSI, - * the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability - * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI - * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated - * only to the peripheral requesting it. - * SRAM1, SRAM2 and register contents are preserved. - * The BOR is available. - * @note When exiting Stop 0 mode by issuing an interrupt or a wakeup event, - * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register - * is set; the MSI oscillator is selected if STOPWUCK is cleared. - * @note By keeping the internal regulator ON during Stop 0 mode, the consumption - * is higher although the startup time is reduced. - * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg @ref PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction - * @arg @ref PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction - * @retval None - */ -void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry) -{ - /* Check the parameters */ - assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); - - /* Stop 0 mode with Main Regulator */ - MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP0); - - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - - /* Select Stop mode entry --------------------------------------------------*/ - if(STOPEntry == PWR_STOPENTRY_WFI) - { - /* Request Wait For Interrupt */ - __WFI(); - } - else - { - /* Request Wait For Event */ - __SEV(); - __WFE(); - __WFE(); - } - - /* Reset SLEEPDEEP bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); -} - - -/** - * @brief Enter Stop 1 mode. - * @note In Stop 1 mode, only low power voltage regulator is ON. - * @note In Stop 1 mode, all I/O pins keep the same state as in Run mode. - * @note All clocks in the VCORE domain are stopped; the PLL, the MSI, - * the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability - * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI - * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated - * only to the peripheral requesting it. - * SRAM1, SRAM2 and register contents are preserved. - * The BOR is available. - * @note When exiting Stop 1 mode by issuing an interrupt or a wakeup event, - * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register - * is set; the MSI oscillator is selected if STOPWUCK is cleared. - * @note Due to low power mode, an additional startup delay is incurred when waking up from Stop 1 mode. - * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg @ref PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction - * @arg @ref PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction - * @retval None - */ -void HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry) -{ - /* Check the parameters */ - assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); - - /* Stop 1 mode with Low-Power Regulator */ - MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP1); - - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - - /* Select Stop mode entry --------------------------------------------------*/ - if(STOPEntry == PWR_STOPENTRY_WFI) - { - /* Request Wait For Interrupt */ - __WFI(); - } - else - { - /* Request Wait For Event */ - __SEV(); - __WFE(); - __WFE(); - } - - /* Reset SLEEPDEEP bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); -} - - -/** - * @brief Enter Stop 2 mode. - * @note In Stop 2 mode, only low power voltage regulator is ON. - * @note In Stop 2 mode, all I/O pins keep the same state as in Run mode. - * @note All clocks in the VCORE domain are stopped, the PLL, the MSI, - * the HSI and the HSE oscillators are disabled. Some peripherals with wakeup capability - * (LCD, LPTIM1, I2C3 and LPUART) can switch on the HSI to receive a frame, and switch off the HSI after - * receiving the frame if it is not a wakeup frame. In this case the HSI clock is propagated only - * to the peripheral requesting it. - * SRAM1, SRAM2 and register contents are preserved. - * The BOR is available. - * The voltage regulator is set in low-power mode but LPR bit must be cleared to enter stop 2 mode. - * Otherwise, Stop 1 mode is entered. - * @note When exiting Stop 2 mode by issuing an interrupt or a wakeup event, - * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register - * is set; the MSI oscillator is selected if STOPWUCK is cleared. - * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg @ref PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction - * @arg @ref PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction - * @retval None - */ -void HAL_PWREx_EnterSTOP2Mode(uint8_t STOPEntry) -{ - /* Check the parameter */ - assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); - - /* Set Stop mode 2 */ - MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP2); - - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - - /* Select Stop mode entry --------------------------------------------------*/ - if(STOPEntry == PWR_STOPENTRY_WFI) - { - /* Request Wait For Interrupt */ - __WFI(); - } - else - { - /* Request Wait For Event */ - __SEV(); - __WFE(); - __WFE(); - } - - /* Reset SLEEPDEEP bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); -} - - - - - -/** - * @brief Enter Shutdown mode. - * @note In Shutdown mode, the PLL, the HSI, the MSI, the LSI and the HSE oscillators are switched - * off. The voltage regulator is disabled and Vcore domain is powered off. - * SRAM1, SRAM2 and registers contents are lost except for registers in the Backup domain. - * The BOR is not available. - * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog state. - * @retval None - */ -void HAL_PWREx_EnterSHUTDOWNMode(void) -{ - - /* Set Shutdown mode */ - MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_SHUTDOWN); - - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - -/* This option is used to ensure that store operations are completed */ -#if defined ( __CC_ARM) - __force_stores(); -#endif - /* Request Wait For Interrupt */ - __WFI(); -} - - - - -/** - * @brief This function handles the PWR PVD/PVMx interrupt request. - * @note This API should be called under the PVD_PVM_IRQHandler(). - * @retval None - */ -void HAL_PWREx_PVD_PVM_IRQHandler(void) -{ - /* Check PWR exti flag */ - if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) - { - /* PWR PVD interrupt user callback */ - HAL_PWR_PVDCallback(); - - /* Clear PVD exti pending bit */ - __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); - } - /* Next, successively check PVMx exti flags */ -#if defined(PWR_CR2_PVME1) - if(__HAL_PWR_PVM1_EXTI_GET_FLAG() != RESET) - { - /* PWR PVM1 interrupt user callback */ - HAL_PWREx_PVM1Callback(); - - /* Clear PVM1 exti pending bit */ - __HAL_PWR_PVM1_EXTI_CLEAR_FLAG(); - } -#endif /* PWR_CR2_PVME1 */ -#if defined(PWR_CR2_PVME2) - if(__HAL_PWR_PVM2_EXTI_GET_FLAG() != RESET) - { - /* PWR PVM2 interrupt user callback */ - HAL_PWREx_PVM2Callback(); - - /* Clear PVM2 exti pending bit */ - __HAL_PWR_PVM2_EXTI_CLEAR_FLAG(); - } -#endif /* PWR_CR2_PVME2 */ - if(__HAL_PWR_PVM3_EXTI_GET_FLAG() != RESET) - { - /* PWR PVM3 interrupt user callback */ - HAL_PWREx_PVM3Callback(); - - /* Clear PVM3 exti pending bit */ - __HAL_PWR_PVM3_EXTI_CLEAR_FLAG(); - } - if(__HAL_PWR_PVM4_EXTI_GET_FLAG() != RESET) - { - /* PWR PVM4 interrupt user callback */ - HAL_PWREx_PVM4Callback(); - - /* Clear PVM4 exti pending bit */ - __HAL_PWR_PVM4_EXTI_CLEAR_FLAG(); - } -} - - -#if defined(PWR_CR2_PVME1) -/** - * @brief PWR PVM1 interrupt callback - * @retval None - */ -__weak void HAL_PWREx_PVM1Callback(void) -{ - /* NOTE : This function should not be modified; when the callback is needed, - HAL_PWREx_PVM1Callback() API can be implemented in the user file - */ -} -#endif /* PWR_CR2_PVME1 */ - -#if defined(PWR_CR2_PVME2) -/** - * @brief PWR PVM2 interrupt callback - * @retval None - */ -__weak void HAL_PWREx_PVM2Callback(void) -{ - /* NOTE : This function should not be modified; when the callback is needed, - HAL_PWREx_PVM2Callback() API can be implemented in the user file - */ -} -#endif /* PWR_CR2_PVME2 */ - -/** - * @brief PWR PVM3 interrupt callback - * @retval None - */ -__weak void HAL_PWREx_PVM3Callback(void) -{ - /* NOTE : This function should not be modified; when the callback is needed, - HAL_PWREx_PVM3Callback() API can be implemented in the user file - */ -} - -/** - * @brief PWR PVM4 interrupt callback - * @retval None - */ -__weak void HAL_PWREx_PVM4Callback(void) -{ - /* NOTE : This function should not be modified; when the callback is needed, - HAL_PWREx_PVM4Callback() API can be implemented in the user file - */ -} - - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_PWR_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c deleted file mode 100644 index 06a9b266..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +++ /dev/null @@ -1,1730 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rcc.c - * @author MCD Application Team - * @brief RCC HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Reset and Clock Control (RCC) peripheral: - * + Initialization and de-initialization functions - * + Peripheral Control functions - * - @verbatim - ============================================================================== - ##### RCC specific features ##### - ============================================================================== - [..] - After reset the device is running from Multiple Speed Internal oscillator - (4 MHz) with Flash 0 wait state. Flash prefetch buffer, D-Cache - and I-Cache are disabled, and all peripherals are off except internal - SRAM, Flash and JTAG. - - (+) There is no prescaler on High speed (AHBs) and Low speed (APBs) busses: - all peripherals mapped on these busses are running at MSI speed. - (+) The clock for all peripherals is switched off, except the SRAM and FLASH. - (+) All GPIOs are in analog mode, except the JTAG pins which - are assigned to be used for debug purpose. - - [..] - Once the device started from reset, the user application has to: - (+) Configure the clock source to be used to drive the System clock - (if the application needs higher frequency/performance) - (+) Configure the System clock frequency and Flash settings - (+) Configure the AHB and APB busses prescalers - (+) Enable the clock for the peripheral(s) to be used - (+) Configure the clock source(s) for peripherals which clocks are not - derived from the System clock (SAIx, RTC, ADC, USB OTG FS/SDMMC1/RNG) - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RCC RCC - * @brief RCC HAL module driver - * @{ - */ - -#ifdef HAL_RCC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup RCC_Private_Constants RCC Private Constants - * @{ - */ -#define HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT -#define HSI_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define MSI_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define LSI_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define HSI48_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define PLL_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define CLOCKSWITCH_TIMEOUT_VALUE 5000U /* 5 s */ -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/** @defgroup RCC_Private_Macros RCC Private Macros - * @{ - */ -#define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() -#define MCO1_GPIO_PORT GPIOA -#define MCO1_PIN GPIO_PIN_8 - -#define RCC_PLL_OSCSOURCE_CONFIG(__HAL_RCC_PLLSOURCE__) \ - (MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__HAL_RCC_PLLSOURCE__))) -/** - * @} - */ - -/* Private variables ---------------------------------------------------------*/ - -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup RCC_Private_Functions RCC Private Functions - * @{ - */ -static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t msirange); -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -static uint32_t RCC_GetSysClockFreqFromPLLSource(void); -#endif -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup RCC_Exported_Functions RCC Exported Functions - * @{ - */ - -/** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * - @verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] - This section provides functions allowing to configure the internal and external oscillators - (HSE, HSI, LSE, MSI, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1 - and APB2). - - [..] Internal/external clock and PLL configuration - (+) HSI (high-speed internal): 16 MHz factory-trimmed RC used directly or through - the PLL as System clock source. - - (+) MSI (Mutiple Speed Internal): Its frequency is software trimmable from 100KHZ to 48MHZ. - It can be used to generate the clock for the USB OTG FS (48 MHz). - The number of flash wait states is automatically adjusted when MSI range is updated with - HAL_RCC_OscConfig() and the MSI is used as System clock source. - - (+) LSI (low-speed internal): 32 KHz low consumption RC used as IWDG and/or RTC - clock source. - - (+) HSE (high-speed external): 4 to 48 MHz crystal oscillator used directly or - through the PLL as System clock source. Can be used also optionally as RTC clock source. - - (+) LSE (low-speed external): 32.768 KHz oscillator used optionally as RTC clock source. - - (+) PLL (clocked by HSI, HSE or MSI) providing up to three independent output clocks: - (++) The first output is used to generate the high speed system clock (up to 80MHz). - (++) The second output is used to generate the clock for the USB OTG FS (48 MHz), - the random analog generator (<=48 MHz) and the SDMMC1 (<= 48 MHz). - (++) The third output is used to generate an accurate clock to achieve - high-quality audio performance on SAI interface. - - (+) PLLSAI1 (clocked by HSI, HSE or MSI) providing up to three independent output clocks: - (++) The first output is used to generate SAR ADC1 clock. - (++) The second output is used to generate the clock for the USB OTG FS (48 MHz), - the random analog generator (<=48 MHz) and the SDMMC1 (<= 48 MHz). - (++) The Third output is used to generate an accurate clock to achieve - high-quality audio performance on SAI interface. - - (+) PLLSAI2 (clocked by HSI , HSE or MSI) providing up to two independent output clocks: - (++) The first output is used to generate SAR ADC2 clock. - (++) The second output is used to generate an accurate clock to achieve - high-quality audio performance on SAI interface. - - (+) CSS (Clock security system): once enabled, if a HSE clock failure occurs - (HSE used directly or through PLL as System clock source), the System clock - is automatically switched to HSI and an interrupt is generated if enabled. - The interrupt is linked to the Cortex-M4 NMI (Non-Maskable Interrupt) - exception vector. - - (+) MCO (microcontroller clock output): used to output MSI, LSI, HSI, LSE, HSE or - main PLL clock (through a configurable prescaler) on PA8 pin. - - [..] System, AHB and APB busses clocks configuration - (+) Several clock sources can be used to drive the System clock (SYSCLK): MSI, HSI, - HSE and main PLL. - The AHB clock (HCLK) is derived from System clock through configurable - prescaler and used to clock the CPU, memory and peripherals mapped - on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived - from AHB clock through configurable prescalers and used to clock - the peripherals mapped on these busses. You can use - "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. - - -@- All the peripheral clocks are derived from the System clock (SYSCLK) except: - - (+@) SAI: the SAI clock can be derived either from a specific PLL (PLLSAI1) or (PLLSAI2) or - from an external clock mapped on the SAI_CKIN pin. - You have to use HAL_RCCEx_PeriphCLKConfig() function to configure this clock. - (+@) RTC: the RTC clock can be derived either from the LSI, LSE or HSE clock - divided by 2 to 31. - You have to use __HAL_RCC_RTC_ENABLE() and HAL_RCCEx_PeriphCLKConfig() function - to configure this clock. - (+@) USB OTG FS, SDMMC1 and RNG: USB OTG FS requires a frequency equal to 48 MHz - to work correctly, while the SDMMC1 and RNG peripherals require a frequency - equal or lower than to 48 MHz. This clock is derived of the main PLL or PLLSAI1 - through PLLQ divider. You have to enable the peripheral clock and use - HAL_RCCEx_PeriphCLKConfig() function to configure this clock. - (+@) IWDG clock which is always the LSI clock. - - - (+) The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 80 MHz. - The clock source frequency should be adapted depending on the device voltage range - as listed in the Reference Manual "Clock source frequency versus voltage scaling" chapter. - - @endverbatim - - Table 1. HCLK clock frequency for STM32L4Rx/STM32L4Sx devices - +--------------------------------------------------------+ - | Latency | HCLK clock frequency (MHz) | - | |--------------------------------------| - | | voltage range 1 | voltage range 2 | - | | 1.2 V | 1.0 V | - |-----------------|-------------------|------------------| - |0WS(1 CPU cycles)| 0 < HCLK <= 20 | 0 < HCLK <= 8 | - |-----------------|-------------------|------------------| - |1WS(2 CPU cycles)| 20 < HCLK <= 40 | 8 < HCLK <= 16 | - |-----------------|-------------------|------------------| - |2WS(3 CPU cycles)| 40 < HCLK <= 60 | 16 < HCLK <= 26 | - |-----------------|-------------------|------------------| - |3WS(4 CPU cycles)| 60 < HCLK <= 80 | 16 < HCLK <= 26 | - |-----------------|-------------------|------------------| - |4WS(5 CPU cycles)| 80 < HCLK <= 100 | 16 < HCLK <= 26 | - |-----------------|-------------------|------------------| - |5WS(6 CPU cycles)| 100 < HCLK <= 120 | 16 < HCLK <= 26 | - +--------------------------------------------------------+ - - Table 2. HCLK clock frequency for other STM32L4 devices - +-------------------------------------------------------+ - | Latency | HCLK clock frequency (MHz) | - | |-------------------------------------| - | | voltage range 1 | voltage range 2 | - | | 1.2 V | 1.0 V | - |-----------------|------------------|------------------| - |0WS(1 CPU cycles)| 0 < HCLK <= 16 | 0 < HCLK <= 6 | - |-----------------|------------------|------------------| - |1WS(2 CPU cycles)| 16 < HCLK <= 32 | 6 < HCLK <= 12 | - |-----------------|------------------|------------------| - |2WS(3 CPU cycles)| 32 < HCLK <= 48 | 12 < HCLK <= 18 | - |-----------------|------------------|------------------| - |3WS(4 CPU cycles)| 48 < HCLK <= 64 | 18 < HCLK <= 26 | - |-----------------|------------------|------------------| - |4WS(5 CPU cycles)| 64 < HCLK <= 80 | 18 < HCLK <= 26 | - +-------------------------------------------------------+ - * @{ - */ - -/** - * @brief Reset the RCC clock configuration to the default reset state. - * @note The default reset state of the clock configuration is given below: - * - MSI ON and used as system clock source - * - HSE, HSI, PLL, PLLSAI1 and PLLISAI2 OFF - * - AHB, APB1 and APB2 prescaler set to 1. - * - CSS, MCO1 OFF - * - All interrupts disabled - * - All interrupt and reset flags cleared - * @note This function doesn't modify the configuration of the - * - Peripheral clocks - * - LSI, LSE and RTC clocks - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCC_DeInit(void) -{ - uint32_t tickstart = 0; - - /* Set MSION bit */ - SET_BIT(RCC->CR, RCC_CR_MSION); - - /* Insure MSIRDY bit is set before writing default MSIRANGE value */ - /* Get start tick */ - tickstart = HAL_GetTick(); - - /* Wait till MSI is ready */ - while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RESET) - { - if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - /* Set MSIRANGE default value */ - MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, RCC_MSIRANGE_6); - - /* Reset CFGR register (MSI is selected as system clock source) */ - CLEAR_REG(RCC->CFGR); - - /* Update the SystemCoreClock global variable for MSI as system clock source */ - SystemCoreClock = MSI_VALUE; - - /* Configure the source of time base considering new system clock settings */ - if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - { - return HAL_ERROR; - } - - /* Insure MSI selected as system clock source */ - /* Get start tick */ - tickstart = HAL_GetTick(); - - /* Wait till system clock source is ready */ - while(READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_MSI) - { - if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - /* Reset HSION, HSIKERON, HSIASFS, HSEON, HSECSSON, PLLON, PLLSAIxON bits */ -#if defined(RCC_PLLSAI2_SUPPORT) - - CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | RCC_CR_PLLSAI1ON | RCC_CR_PLLSAI2ON); - -#else - - CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | RCC_CR_PLLSAI1ON); - -#endif /* RCC_PLLSAI2_SUPPORT */ - - /* Insure PLLRDY, PLLSAI1RDY and PLLSAI2RDY (if present) are reset */ - /* Get start tick */ - tickstart = HAL_GetTick(); - -#if defined(RCC_PLLSAI2_SUPPORT) - - while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY | RCC_CR_PLLSAI2RDY) != 0U) - -#else - - while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY) != 0U) - -#endif - { - if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - /* Reset PLLCFGR register */ - CLEAR_REG(RCC->PLLCFGR); - SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN_4 ); - - /* Reset PLLSAI1CFGR register */ - CLEAR_REG(RCC->PLLSAI1CFGR); - SET_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N_4 ); - -#if defined(RCC_PLLSAI2_SUPPORT) - - /* Reset PLLSAI2CFGR register */ - CLEAR_REG(RCC->PLLSAI2CFGR); - SET_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N_4 ); - -#endif /* RCC_PLLSAI2_SUPPORT */ - - /* Reset HSEBYP bit */ - CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); - - /* Disable all interrupts */ - CLEAR_REG(RCC->CIER); - - /* Clear all interrupt flags */ - WRITE_REG(RCC->CICR, 0xFFFFFFFFU); - - /* Clear all reset flags */ - SET_BIT(RCC->CSR, RCC_CSR_RMVF); - - return HAL_OK; -} - -/** - * @brief Initialize the RCC Oscillators according to the specified parameters in the - * RCC_OscInitTypeDef. - * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that - * contains the configuration information for the RCC Oscillators. - * @note The PLL is not disabled when used as system clock. - * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not - * supported by this macro. User should request a transition to LSE Off - * first and then LSE On or LSE Bypass. - * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not - * supported by this macro. User should request a transition to HSE Off - * first and then HSE On or HSE Bypass. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(RCC_OscInitStruct != NULL); - assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); - - /*----------------------------- MSI Configuration --------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) - { - /* Check the parameters */ - assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState)); - assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue)); - assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); - - /* When the MSI is used as system clock it will not be disabled */ - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) ) - { - if((READ_BIT(RCC->CR, RCC_CR_MSIRDY) != RESET) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF)) - { - return HAL_ERROR; - } - - /* Otherwise, just the calibration and MSI range change are allowed */ - else - { - /* To correctly read data from FLASH memory, the number of wait states (LATENCY) - must be correctly programmed according to the frequency of the CPU clock - (HCLK) and the supply voltage of the device. */ - if(RCC_OscInitStruct->MSIClockRange > __HAL_RCC_GET_MSI_RANGE()) - { - /* First increase number of wait states update if necessary */ - if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) - { - return HAL_ERROR; - } - - /* Selects the Multiple Speed oscillator (MSI) clock range .*/ - __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ - __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - } - else - { - /* Else, keep current flash latency while decreasing applies */ - /* Selects the Multiple Speed oscillator (MSI) clock range .*/ - __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ - __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - - /* Decrease number of wait states update if necessary */ - if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) - { - return HAL_ERROR; - } - } - - /* Update the SystemCoreClock global variable */ - SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - - /* Configure the source of time base considering new system clocks settings*/ - HAL_InitTick (TICK_INT_PRIORITY); - } - } - else - { - /* Check the MSI State */ - if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF) - { - /* Enable the Internal High Speed oscillator (MSI). */ - __HAL_RCC_MSI_ENABLE(); - - /* Get timeout */ - tickstart = HAL_GetTick(); - - /* Wait till MSI is ready */ - while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RESET) - { - if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - /* Selects the Multiple Speed oscillator (MSI) clock range .*/ - __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ - __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - - } - else - { - /* Disable the Internal High Speed oscillator (MSI). */ - __HAL_RCC_MSI_DISABLE(); - - /* Get timeout */ - tickstart = HAL_GetTick(); - - /* Wait till MSI is ready */ - while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) != RESET) - { - if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - } - /*------------------------------- HSE Configuration ------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - { - /* Check the parameters */ - assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); - - /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || - ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - { - if((READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - { - return HAL_ERROR; - } - } - else - { - /* Set the new HSE configuration ---------------------------------------*/ - __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - - /* Check the HSE State */ - if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSE is ready */ - while(READ_BIT(RCC->CR, RCC_CR_HSERDY) == RESET) - { - if((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSE is disabled */ - while(READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) - { - if((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - } - /*----------------------------- HSI Configuration --------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - { - /* Check the parameters */ - assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); - assert_param(IS_RCC_HSI_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); - - /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || - ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) - { - /* When HSI is used as system clock it will not be disabled */ - if((READ_BIT(RCC->CR, RCC_CR_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - { - return HAL_ERROR; - } - /* Otherwise, just the calibration is allowed */ - else - { - /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - } - } - else - { - /* Check the HSI State */ - if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - { - /* Enable the Internal High Speed oscillator (HSI). */ - __HAL_RCC_HSI_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSI is ready */ - while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) - { - if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - } - else - { - /* Disable the Internal High Speed oscillator (HSI). */ - __HAL_RCC_HSI_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSI is disabled */ - while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) != RESET) - { - if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - } - /*------------------------------ LSI Configuration -------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - { - /* Check the parameters */ - assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); - - /* Check the LSI State */ - if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - { - /* Enable the Internal Low Speed oscillator (LSI). */ - __HAL_RCC_LSI_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till LSI is ready */ - while(READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == RESET) - { - if((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - /* Disable the Internal Low Speed oscillator (LSI). */ - __HAL_RCC_LSI_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till LSI is disabled */ - while(READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) != RESET) - { - if((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - /*------------------------------ LSE Configuration -------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - { - FlagStatus pwrclkchanged = RESET; - - /* Check the parameters */ - assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); - - /* Update LSE configuration in Backup Domain control register */ - /* Requires to enable write access to Backup Domain of necessary */ - if(HAL_IS_BIT_CLR(RCC->APB1ENR1, RCC_APB1ENR1_PWREN)) - { - __HAL_RCC_PWR_CLK_ENABLE(); - pwrclkchanged = SET; - } - - if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - { - /* Enable write access to Backup domain */ - SET_BIT(PWR->CR1, PWR_CR1_DBP); - - /* Wait for Backup domain Write protection disable */ - tickstart = HAL_GetTick(); - - while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - { - if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - - /* Set the new LSE configuration -----------------------------------------*/ - __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - - /* Check the LSE State */ - if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till LSE is ready */ - while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RESET) - { - if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till LSE is disabled */ - while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != RESET) - { - if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - - /* Restore clock configuration if changed */ - if(pwrclkchanged == SET) - { - __HAL_RCC_PWR_CLK_DISABLE(); - } - } -#if defined(RCC_HSI48_SUPPORT) - /*------------------------------ HSI48 Configuration -----------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) - { - /* Check the parameters */ - assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); - - /* Check the LSI State */ - if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF) - { - /* Enable the Internal Low Speed oscillator (HSI48). */ - __HAL_RCC_HSI48_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSI48 is ready */ - while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == RESET) - { - if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - /* Disable the Internal Low Speed oscillator (HSI48). */ - __HAL_RCC_HSI48_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSI48 is disabled */ - while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } -#endif /* RCC_HSI48_SUPPORT */ - /*-------------------------------- PLL Configuration -----------------------*/ - /* Check the parameters */ - assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); - - if(RCC_OscInitStruct->PLL.PLLState != RCC_PLL_NONE) - { - /* Check if the PLL is used as system clock or not */ - if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) - { - if(RCC_OscInitStruct->PLL.PLLState == RCC_PLL_ON) - { - /* Check the parameters */ - assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); - assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM)); - assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); - assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); - assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); - assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); - - /* Disable the main PLL. */ - __HAL_RCC_PLL_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLL is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - /* Configure the main PLL clock source, multiplication and division factors. */ - __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - RCC_OscInitStruct->PLL.PLLM, - RCC_OscInitStruct->PLL.PLLN, - RCC_OscInitStruct->PLL.PLLP, - RCC_OscInitStruct->PLL.PLLQ, - RCC_OscInitStruct->PLL.PLLR); - - /* Enable the main PLL. */ - __HAL_RCC_PLL_ENABLE(); - - /* Enable PLL System Clock output. */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SYSCLK); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLL is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RESET) - { - if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - /* Disable the main PLL. */ - __HAL_RCC_PLL_DISABLE(); - - /* Disable all PLL outputs to save power if no PLLs on */ - if((READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == RESET) -#if defined(RCC_PLLSAI2_SUPPORT) - && - (READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == RESET) -#endif /* RCC_PLLSAI2_SUPPORT */ - ) - { - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); - } - -#if defined(RCC_PLLSAI2_SUPPORT) - __HAL_RCC_PLLCLKOUT_DISABLE(RCC_PLL_SYSCLK | RCC_PLL_48M1CLK | RCC_PLL_SAI3CLK); -#else - __HAL_RCC_PLLCLKOUT_DISABLE(RCC_PLL_SYSCLK | RCC_PLL_48M1CLK | RCC_PLL_SAI2CLK); -#endif /* RCC_PLLSAI2_SUPPORT */ - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLL is disabled */ - while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - else - { - return HAL_ERROR; - } - } - return HAL_OK; -} - -/** - * @brief Initialize the CPU, AHB and APB busses clocks according to the specified - * parameters in the RCC_ClkInitStruct. - * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that - * contains the configuration information for the RCC peripheral. - * @param FLatency FLASH Latency - * This parameter can be one of the following values: - * @arg FLASH_LATENCY_0 FLASH 0 Latency cycle - * @arg FLASH_LATENCY_1 FLASH 1 Latency cycle - * @arg FLASH_LATENCY_2 FLASH 2 Latency cycles - * @arg FLASH_LATENCY_3 FLASH 3 Latency cycles - * @arg FLASH_LATENCY_4 FLASH 4 Latency cycles - @if STM32L4S9xx - * @arg FLASH_LATENCY_5 FLASH 5 Latency cycles - * @arg FLASH_LATENCY_6 FLASH 6 Latency cycles - * @arg FLASH_LATENCY_7 FLASH 7 Latency cycles - * @arg FLASH_LATENCY_8 FLASH 8 Latency cycles - * @arg FLASH_LATENCY_9 FLASH 9 Latency cycles - * @arg FLASH_LATENCY_10 FLASH 10 Latency cycles - * @arg FLASH_LATENCY_11 FLASH 11 Latency cycles - * @arg FLASH_LATENCY_12 FLASH 12 Latency cycles - * @arg FLASH_LATENCY_13 FLASH 13 Latency cycles - * @arg FLASH_LATENCY_14 FLASH 14 Latency cycles - * @arg FLASH_LATENCY_15 FLASH 15 Latency cycles - @endif - * - * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency - * and updated by HAL_RCC_GetHCLKFreq() function called within this function - * - * @note The MSI is used by default as system clock source after - * startup from Reset, wake-up from STANDBY mode. After restart from Reset, - * the MSI frequency is set to its default value 4 MHz. - * - * @note The HSI can be selected as system clock source after - * from STOP modes or in case of failure of the HSE used directly or indirectly - * as system clock (if the Clock Security System CSS is enabled). - * - * @note A switch from one clock source to another occurs only if the target - * clock source is ready (clock stable after startup delay or PLL locked). - * If a clock source which is not yet ready is selected, the switch will - * occur when the clock source is ready. - * - * @note You can use HAL_RCC_GetClockConfig() function to know which clock is - * currently used as system clock source. - * - * @note Depending on the device voltage range, the software has to set correctly - * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency - * (for more details refer to section above "Initialization/de-initialization functions") - * @retval None - */ -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) -{ - uint32_t tickstart = 0; -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - uint32_t pllfreq = 0; - uint32_t hpre = RCC_SYSCLK_DIV1; -#endif - - /* Check the parameters */ - assert_param(RCC_ClkInitStruct != NULL); - assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); - assert_param(IS_FLASH_LATENCY(FLatency)); - - /* To correctly read data from FLASH memory, the number of wait states (LATENCY) - must be correctly programmed according to the frequency of the CPU clock - (HCLK) and the supply voltage of the device. */ - - /* Increasing the number of wait states because of higher CPU frequency */ - if(FLatency > READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)) - { - /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ - __HAL_FLASH_SET_LATENCY(FLatency); - - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) != FLatency) - { - return HAL_ERROR; - } - } - - /*------------------------- SYSCLK Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - { - assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); - - /* PLL is selected as System Clock Source */ - if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - { - /* Check the PLL ready flag */ - if(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RESET) - { - return HAL_ERROR; - } -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - /* Undershoot management when selection PLL as SYSCLK source and frequency above 80Mhz */ - /* Compute target PLL output frequency */ - pllfreq = RCC_GetSysClockFreqFromPLLSource(); - - /* Intermediate step with HCLK prescaler 2 necessary before to go over 80Mhz */ - if((pllfreq > 80000000U) && - (((((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) && (RCC_ClkInitStruct->AHBCLKDivider == RCC_SYSCLK_DIV1)) - || - ((READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1)))) - { - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); - hpre = RCC_SYSCLK_DIV2; - } -#endif - } - else - { - /* HSE is selected as System Clock Source */ - if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - { - /* Check the HSE ready flag */ - if(READ_BIT(RCC->CR, RCC_CR_HSERDY) == RESET) - { - return HAL_ERROR; - } - } - /* MSI is selected as System Clock Source */ - else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI) - { - /* Check the MSI ready flag */ - if(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RESET) - { - return HAL_ERROR; - } - } - /* HSI is selected as System Clock Source */ - else - { - /* Check the HSI ready flag */ - if(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) - { - return HAL_ERROR; - } - } -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - /* Overshoot management when going down from PLL as SYSCLK source and frequency above 80Mhz */ - pllfreq = HAL_RCC_GetSysClockFreq(); - - /* Intermediate step with HCLK prescaler 2 necessary before to go under 80Mhz */ - if(pllfreq > 80000000U) - { - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); - hpre = RCC_SYSCLK_DIV2; - } -#endif - - } - - MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - { - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) - { - if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - { - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSE) - { - if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI) - { - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_MSI) - { - if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI) - { - if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - } - - /*-------------------------- HCLK Configuration --------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - { - assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - } -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - else - { - /* Is intermediate HCLK prescaler 2 applied internally, complete with HCLK prescaler 1 */ - if(hpre == RCC_SYSCLK_DIV2) - { - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV1); - } - } -#endif - - /* Decreasing the number of wait states because of lower CPU frequency */ - if(FLatency < READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)) - { - /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ - __HAL_FLASH_SET_LATENCY(FLatency); - - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) != FLatency) - { - return HAL_ERROR; - } - } - - /*-------------------------- PCLK1 Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - { - assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - } - - /*-------------------------- PCLK2 Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - { - assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); - } - - /* Update the SystemCoreClock global variable */ - SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - - /* Configure the source of time base considering new system clocks settings*/ - HAL_InitTick (TICK_INT_PRIORITY); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions - * @brief RCC clocks control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to: - - (+) Ouput clock to MCO pin. - (+) Retrieve current clock frequencies. - (+) Enable the Clock Security System. - -@endverbatim - * @{ - */ - -/** - * @brief Select the clock source to output on MCO pin(PA8). - * @note PA8 should be configured in alternate function mode. - * @param RCC_MCOx specifies the output direction for the clock source. - * For STM32L4xx family this parameter can have only one value: - * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). - * @param RCC_MCOSource specifies the clock source to output. - * This parameter can be one of the following values: - * @arg @ref RCC_MCO1SOURCE_NOCLOCK MCO output disabled, no clock on MCO - * @arg @ref RCC_MCO1SOURCE_SYSCLK system clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_MSI MSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_HSI HSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO sourcee - * @arg @ref RCC_MCO1SOURCE_PLLCLK main PLL clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_LSI LSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_LSE LSE clock selected as MCO source - @if STM32L443xx - * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 clock selected as MCO source for devices with HSI48 - @endif - * @param RCC_MCODiv specifies the MCO prescaler. - * This parameter can be one of the following values: - * @arg @ref RCC_MCODIV_1 no division applied to MCO clock - * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock - * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock - * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock - * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock - * @retval None - */ -void HAL_RCC_MCOConfig( uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) -{ - GPIO_InitTypeDef GPIO_InitStruct; - /* Check the parameters */ - assert_param(IS_RCC_MCO(RCC_MCOx)); - assert_param(IS_RCC_MCODIV(RCC_MCODiv)); - assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); - - /* MCO Clock Enable */ - __MCO1_CLK_ENABLE(); - - /* Configue the MCO1 pin in alternate function mode */ - GPIO_InitStruct.Pin = MCO1_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF0_MCO; - HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct); - - /* Mask MCOSEL[] and MCOPRE[] bits then set MCO1 clock source and prescaler */ - MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), (RCC_MCOSource | RCC_MCODiv )); -} - -/** - * @brief Return the SYSCLK frequency. - * - * @note The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * @note If SYSCLK source is MSI, function returns values based on MSI - * Value as defined by the MSI range. - * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) - * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**) - * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**), - * HSI_VALUE(*) or MSI Value multiplied/divided by the PLL factors. - * @note (*) HSI_VALUE is a constant defined in stm32l4xx_hal_conf.h file (default value - * 16 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * @note (**) HSE_VALUE is a constant defined in stm32l4xx_hal_conf.h file (default value - * 8 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * @note The result of this function could be not correct when using fractional - * value for HSE crystal. - * - * @note This function can be used by the user application to compute the - * baudrate for the communication peripherals or configure other parameters. - * - * @note Each time SYSCLK changes, this function must be called to update the - * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. - * - * - * @retval SYSCLK frequency - */ -uint32_t HAL_RCC_GetSysClockFreq(void) -{ - uint32_t msirange = 0U, pllvco = 0U, pllsource = 0U, pllr = 2U, pllm = 2U; - uint32_t sysclockfreq = 0U; - - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) || - ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_MSI))) - { - /* MSI or PLL with MSI source used as system clock source */ - - /* Get SYSCLK source */ - if(READ_BIT(RCC->CR, RCC_CR_MSIRGSEL) == RESET) - { /* MSISRANGE from RCC_CSR applies */ - msirange = READ_BIT(RCC->CSR, RCC_CSR_MSISRANGE) >> RCC_CSR_MSISRANGE_Pos; - } - else - { /* MSIRANGE from RCC_CR applies */ - msirange = READ_BIT(RCC->CR, RCC_CR_MSIRANGE) >> RCC_CR_MSIRANGE_Pos; - } - /*MSI frequency range in HZ*/ - msirange = MSIRangeTable[msirange]; - - if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) - { - /* MSI used as system clock source */ - sysclockfreq = msirange; - } - } - else if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) - { - /* HSI used as system clock source */ - sysclockfreq = HSI_VALUE; - } - else if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) - { - /* HSE used as system clock source */ - sysclockfreq = HSE_VALUE; - } - - if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) - { - /* PLL used as system clock source */ - - /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); - pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; - - switch (pllsource) - { - case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ - pllvco = (HSI_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - - case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ - pllvco = (HSE_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - - case RCC_PLLSOURCE_MSI: /* MSI used as PLL clock source */ - default: - pllvco = (msirange / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - } - pllr = ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U ) * 2U; - sysclockfreq = pllvco/pllr; - } - - return sysclockfreq; -} - -/** - * @brief Return the HCLK frequency. - * @note Each time HCLK changes, this function must be called to update the - * right HCLK value. Otherwise, any configuration based on this function will be incorrect. - * - * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency. - * @retval HCLK frequency in Hz - */ -uint32_t HAL_RCC_GetHCLKFreq(void) -{ - return SystemCoreClock; -} - -/** - * @brief Return the PCLK1 frequency. - * @note Each time PCLK1 changes, this function must be called to update the - * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK1 frequency in Hz - */ -uint32_t HAL_RCC_GetPCLK1Freq(void) -{ - /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ - return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); -} - -/** - * @brief Return the PCLK2 frequency. - * @note Each time PCLK2 changes, this function must be called to update the - * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK2 frequency in Hz - */ -uint32_t HAL_RCC_GetPCLK2Freq(void) -{ - /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ - return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); -} - -/** - * @brief Configure the RCC_OscInitStruct according to the internal - * RCC configuration registers. - * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that - * will be configured. - * @retval None - */ -void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) -{ - /* Check the parameters */ - assert_param(RCC_OscInitStruct != NULL); - - /* Set all possible values for the Oscillator type parameter ---------------*/ -#if defined(RCC_HSI48_SUPPORT) - RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_MSI | \ - RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSI48; -#else - RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_MSI | \ - RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI; -#endif /* RCC_HSI48_SUPPORT */ - - /* Get the HSE configuration -----------------------------------------------*/ - if(READ_BIT(RCC->CR, RCC_CR_HSEBYP) == RCC_CR_HSEBYP) - { - RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; - } - else if(READ_BIT(RCC->CR, RCC_CR_HSEON) == RCC_CR_HSEON) - { - RCC_OscInitStruct->HSEState = RCC_HSE_ON; - } - else - { - RCC_OscInitStruct->HSEState = RCC_HSE_OFF; - } - - /* Get the MSI configuration -----------------------------------------------*/ - if(READ_BIT(RCC->CR, RCC_CR_MSION) == RCC_CR_MSION) - { - RCC_OscInitStruct->MSIState = RCC_MSI_ON; - } - else - { - RCC_OscInitStruct->MSIState = RCC_MSI_OFF; - } - - RCC_OscInitStruct->MSICalibrationValue = READ_BIT(RCC->ICSCR, RCC_ICSCR_MSITRIM) >> RCC_ICSCR_MSITRIM_Pos; - RCC_OscInitStruct->MSIClockRange = READ_BIT(RCC->CR, RCC_CR_MSIRANGE); - - /* Get the HSI configuration -----------------------------------------------*/ - if(READ_BIT(RCC->CR, RCC_CR_HSION) == RCC_CR_HSION) - { - RCC_OscInitStruct->HSIState = RCC_HSI_ON; - } - else - { - RCC_OscInitStruct->HSIState = RCC_HSI_OFF; - } - - RCC_OscInitStruct->HSICalibrationValue = READ_BIT(RCC->ICSCR, RCC_ICSCR_HSITRIM) >> RCC_ICSCR_HSITRIM_Pos; - - /* Get the LSE configuration -----------------------------------------------*/ - if(READ_BIT(RCC->BDCR, RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) - { - RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; - } - else if(READ_BIT(RCC->BDCR, RCC_BDCR_LSEON) == RCC_BDCR_LSEON) - { - RCC_OscInitStruct->LSEState = RCC_LSE_ON; - } - else - { - RCC_OscInitStruct->LSEState = RCC_LSE_OFF; - } - - /* Get the LSI configuration -----------------------------------------------*/ - if(READ_BIT(RCC->CSR, RCC_CSR_LSION) == RCC_CSR_LSION) - { - RCC_OscInitStruct->LSIState = RCC_LSI_ON; - } - else - { - RCC_OscInitStruct->LSIState = RCC_LSI_OFF; - } - -#if defined(RCC_HSI48_SUPPORT) - /* Get the HSI48 configuration ---------------------------------------------*/ - if(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) == RCC_CRRCR_HSI48ON) - { - RCC_OscInitStruct->HSI48State = RCC_HSI48_ON; - } - else - { - RCC_OscInitStruct->HSI48State = RCC_HSI48_OFF; - } -#else - RCC_OscInitStruct->HSI48State = RCC_HSI48_OFF; -#endif /* RCC_HSI48_SUPPORT */ - - /* Get the PLL configuration -----------------------------------------------*/ - if(READ_BIT(RCC->CR, RCC_CR_PLLON) == RCC_CR_PLLON) - { - RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; - } - else - { - RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; - } - RCC_OscInitStruct->PLL.PLLSource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); - RCC_OscInitStruct->PLL.PLLM = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U; - RCC_OscInitStruct->PLL.PLLN = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; - RCC_OscInitStruct->PLL.PLLQ = (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos) + 1U) << 1U); - RCC_OscInitStruct->PLL.PLLR = (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U) << 1U); -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) - RCC_OscInitStruct->PLL.PLLP = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; -#else - if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) - { - RCC_OscInitStruct->PLL.PLLP = RCC_PLLP_DIV17; - } - else - { - RCC_OscInitStruct->PLL.PLLP = RCC_PLLP_DIV7; - } -#endif /* RCC_PLLP_DIV_2_31_SUPPORT */ -} - -/** - * @brief Configure the RCC_ClkInitStruct according to the internal - * RCC configuration registers. - * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that - * will be configured. - * @param pFLatency Pointer on the Flash Latency. - * @retval None - */ -void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) -{ - /* Check the parameters */ - assert_param(RCC_ClkInitStruct != NULL); - assert_param(pFLatency != NULL); - - /* Set all possible values for the Clock type parameter --------------------*/ - RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - - /* Get the SYSCLK configuration --------------------------------------------*/ - RCC_ClkInitStruct->SYSCLKSource = READ_BIT(RCC->CFGR, RCC_CFGR_SW); - - /* Get the HCLK configuration ----------------------------------------------*/ - RCC_ClkInitStruct->AHBCLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_HPRE); - - /* Get the APB1 configuration ----------------------------------------------*/ - RCC_ClkInitStruct->APB1CLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1); - - /* Get the APB2 configuration ----------------------------------------------*/ - RCC_ClkInitStruct->APB2CLKDivider = (READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2) >> 3U); - - /* Get the Flash Wait State (Latency) configuration ------------------------*/ - *pFLatency = READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY); -} - -/** - * @brief Enable the Clock Security System. - * @note If a failure is detected on the HSE oscillator clock, this oscillator - * is automatically disabled and an interrupt is generated to inform the - * software about the failure (Clock Security System Interrupt, CSSI), - * allowing the MCU to perform rescue operations. The CSSI is linked to - * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. - * @note The Clock Security System can only be cleared by reset. - * @retval None - */ -void HAL_RCC_EnableCSS(void) -{ - SET_BIT(RCC->CR, RCC_CR_CSSON) ; -} - -/** - * @brief Handle the RCC Clock Security System interrupt request. - * @note This API should be called under the NMI_Handler(). - * @retval None - */ -void HAL_RCC_NMI_IRQHandler(void) -{ - /* Check RCC CSSF interrupt flag */ - if(__HAL_RCC_GET_IT(RCC_IT_CSS)) - { - /* RCC Clock Security System interrupt user callback */ - HAL_RCC_CSSCallback(); - - /* Clear RCC CSS pending bit */ - __HAL_RCC_CLEAR_IT(RCC_IT_CSS); - } -} - -/** - * @brief RCC Clock Security System interrupt callback. - * @retval none - */ -__weak void HAL_RCC_CSSCallback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RCC_CSSCallback should be implemented in the user file - */ -} - -/** - * @} - */ - -/** - * @} - */ - -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup RCC_Private_Functions - * @{ - */ -/** - * @brief Update number of Flash wait states in line with MSI range and current - voltage range. - * @param msirange MSI range value from RCC_MSIRANGE_0 to RCC_MSIRANGE_11 - * @retval HAL status - */ -static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t msirange) -{ - uint32_t vos = 0; - uint32_t latency = FLASH_LATENCY_0; /* default value 0WS */ - - if(__HAL_RCC_PWR_IS_CLK_ENABLED()) - { - vos = HAL_PWREx_GetVoltageRange(); - } - else - { - __HAL_RCC_PWR_CLK_ENABLE(); - vos = HAL_PWREx_GetVoltageRange(); - __HAL_RCC_PWR_CLK_DISABLE(); - } - - if(vos == PWR_REGULATOR_VOLTAGE_SCALE1) - { - if(msirange > RCC_MSIRANGE_8) - { - /* MSI > 16Mhz */ - if(msirange > RCC_MSIRANGE_10) - { - /* MSI 48Mhz */ - latency = FLASH_LATENCY_2; /* 2WS */ - } - else - { - /* MSI 24Mhz or 32Mhz */ - latency = FLASH_LATENCY_1; /* 1WS */ - } - } - /* else MSI <= 16Mhz default FLASH_LATENCY_0 0WS */ - } - else - { -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - if(msirange >= RCC_MSIRANGE_8) - { - /* MSI >= 16Mhz */ - latency = FLASH_LATENCY_2; /* 2WS */ - } - else - { - if(msirange == RCC_MSIRANGE_7) - { - /* MSI 8Mhz */ - latency = FLASH_LATENCY_1; /* 1WS */ - } - /* else MSI < 8Mhz default FLASH_LATENCY_0 0WS */ - } -#else - if(msirange > RCC_MSIRANGE_8) - { - /* MSI > 16Mhz */ - latency = FLASH_LATENCY_3; /* 3WS */ - } - else - { - if(msirange == RCC_MSIRANGE_8) - { - /* MSI 16Mhz */ - latency = FLASH_LATENCY_2; /* 2WS */ - } - else if(msirange == RCC_MSIRANGE_7) - { - /* MSI 8Mhz */ - latency = FLASH_LATENCY_1; /* 1WS */ - } - /* else MSI < 8Mhz default FLASH_LATENCY_0 0WS */ - } -#endif - } - - __HAL_FLASH_SET_LATENCY(latency); - - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) != latency) - { - return HAL_ERROR; - } - - return HAL_OK; -} - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -/** - * @brief Compute SYSCLK frequency based on PLL SYSCLK source. - * @retval SYSCLK frequency - */ -static uint32_t RCC_GetSysClockFreqFromPLLSource(void) -{ - uint32_t msirange = 0U, pllvco = 0U, pllsource = 0U, pllr = 2U, pllm = 2U; - uint32_t sysclockfreq = 0U; - - if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_MSI) - { - /* Get MSI range source */ - if(READ_BIT(RCC->CR, RCC_CR_MSIRGSEL) == RESET) - { /* MSISRANGE from RCC_CSR applies */ - msirange = READ_BIT(RCC->CSR, RCC_CSR_MSISRANGE) >> RCC_CSR_MSISRANGE_Pos; - } - else - { /* MSIRANGE from RCC_CR applies */ - msirange = READ_BIT(RCC->CR, RCC_CR_MSIRANGE) >> RCC_CR_MSIRANGE_Pos; - } - /*MSI frequency range in HZ*/ - msirange = MSIRangeTable[msirange]; - } - - /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); - pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; - - switch (pllsource) - { - case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ - pllvco = (HSI_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - - case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ - pllvco = (HSE_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - - case RCC_PLLSOURCE_MSI: /* MSI used as PLL clock source */ - default: - pllvco = (msirange / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - } - - pllr = ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U ) * 2U; - sysclockfreq = pllvco/pllr; - - return sysclockfreq; -} -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** - * @} - */ - -#endif /* HAL_RCC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c deleted file mode 100644 index 7c31e73f..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +++ /dev/null @@ -1,3358 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rcc_ex.c - * @author MCD Application Team - * @brief Extended RCC HAL module driver. - * This file provides firmware functions to manage the following - * functionalities RCC extended peripheral: - * + Extended Peripheral Control functions - * + Extended Clock management functions - * + Extended Clock Recovery System Control functions - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RCCEx RCCEx - * @brief RCC Extended HAL module driver - * @{ - */ - -#ifdef HAL_RCC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/** @defgroup RCCEx_Private_Constants RCCEx Private Constants - * @{ - */ -#define PLLSAI1_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define PLLSAI2_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define PLL_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ - -#define DIVIDER_P_UPDATE 0U -#define DIVIDER_Q_UPDATE 1U -#define DIVIDER_R_UPDATE 2U - -#define __LSCO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() -#define LSCO_GPIO_PORT GPIOA -#define LSCO_PIN GPIO_PIN_2 -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup RCCEx_Private_Functions RCCEx Private Functions - * @{ - */ -static HAL_StatusTypeDef RCCEx_PLLSAI1_Config(RCC_PLLSAI1InitTypeDef *PllSai1, uint32_t Divider); - -#if defined(RCC_PLLSAI2_SUPPORT) - -static HAL_StatusTypeDef RCCEx_PLLSAI2_Config(RCC_PLLSAI2InitTypeDef *PllSai2, uint32_t Divider); - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions - * @{ - */ - -/** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions - * @brief Extended Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Extended Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the RCC Clocks - frequencies. - [..] - (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to - select the RTC clock source; in this case the Backup domain will be reset in - order to modify the RTC Clock source, as consequence RTC registers (including - the backup registers) are set to their reset values. - -@endverbatim - * @{ - */ -/** - * @brief Initialize the RCC extended peripherals clocks according to the specified - * parameters in the RCC_PeriphCLKInitTypeDef. - * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that - * contains a field PeriphClockSelection which can be a combination of the following values: - * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock - * @arg @ref RCC_PERIPHCLK_ADC ADC peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM1) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM1) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM1) - @endif - * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock - * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock - * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - * @arg @ref RCC_PERIPHCLK_LPTIM1 LPTIM1 peripheral clock - * @arg @ref RCC_PERIPHCLK_LPTIM2 LPTIM2 peripheral clock - * @arg @ref RCC_PERIPHCLK_LPUART1 LPUART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_RNG RNG peripheral clock - * @arg @ref RCC_PERIPHCLK_SAI1 SAI1 peripheral clock - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - * @arg @ref RCC_PERIPHCLK_SDMMC1 SDMMC1 peripheral clock - @if STM32L443xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_USART2 USART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_USART3 USART1 peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock (only for devices with UART4) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 USART1 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 USART1 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 USART1 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral kernel clock (only for devices with DFSDM1) - * @arg @ref RCC_PERIPHCLK_DFSDM1AUDIO DFSDM1 peripheral audio clock (only for devices with DFSDM1) - * @arg @ref RCC_PERIPHCLK_LTDC LTDC peripheral clock (only for devices with LTDC) - * @arg @ref RCC_PERIPHCLK_DSI DSI peripheral clock (only for devices with DSI) - * @arg @ref RCC_PERIPHCLK_OSPI OctoSPI peripheral clock (only for devices with OctoSPI) - @endif - * - * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select - * the RTC clock source: in this case the access to Backup domain is enabled. - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) -{ - uint32_t tmpregister = 0; - uint32_t tickstart = 0U; - HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */ - HAL_StatusTypeDef status = HAL_OK; /* Final status */ - - /* Check the parameters */ - assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); - - /*-------------------------- SAI1 clock source configuration ---------------------*/ - if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)) - { - /* Check the parameters */ - assert_param(IS_RCC_SAI1CLK(PeriphClkInit->Sai1ClockSelection)); - - switch(PeriphClkInit->Sai1ClockSelection) - { - case RCC_SAI1CLKSOURCE_PLL: /* PLL is used as clock source for SAI1*/ - /* Enable SAI Clock output generated form System PLL . */ -#if defined(RCC_PLLSAI2_SUPPORT) - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); -#else - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI2CLK); -#endif /* RCC_PLLSAI2_SUPPORT */ - /* SAI1 clock source config set later after clock selection check */ - break; - - case RCC_SAI1CLKSOURCE_PLLSAI1: /* PLLSAI1 is used as clock source for SAI1*/ - /* PLLSAI1 input clock, parameters M, N & P configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); - /* SAI1 clock source config set later after clock selection check */ - break; - -#if defined(RCC_PLLSAI2_SUPPORT) - - case RCC_SAI1CLKSOURCE_PLLSAI2: /* PLLSAI2 is used as clock source for SAI1*/ - /* PLLSAI2 input clock, parameters M, N & P configuration clock output (PLLSAI2ClockOut) */ - ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_P_UPDATE); - /* SAI1 clock source config set later after clock selection check */ - break; - -#endif /* RCC_PLLSAI2_SUPPORT */ - - case RCC_SAI1CLKSOURCE_PIN: /* External clock is used as source of SAI1 clock*/ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - case RCC_SAI1CLKSOURCE_HSI: /* HSI is used as source of SAI1 clock*/ -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - /* SAI1 clock source config set later after clock selection check */ - break; - - default: - ret = HAL_ERROR; - break; - } - - if(ret == HAL_OK) - { - /* Set the source of SAI1 clock*/ - __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); - } - else - { - /* set overall return value */ - status = ret; - } - } - -#if defined(SAI2) - - /*-------------------------- SAI2 clock source configuration ---------------------*/ - if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2)) - { - /* Check the parameters */ - assert_param(IS_RCC_SAI2CLK(PeriphClkInit->Sai2ClockSelection)); - - switch(PeriphClkInit->Sai2ClockSelection) - { - case RCC_SAI2CLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/ - /* Enable SAI Clock output generated form System PLL . */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); - /* SAI2 clock source config set later after clock selection check */ - break; - - case RCC_SAI2CLKSOURCE_PLLSAI1: /* PLLSAI1 is used as clock source for SAI2*/ - /* PLLSAI1 input clock, parameters M, N & P configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); - /* SAI2 clock source config set later after clock selection check */ - break; - - case RCC_SAI2CLKSOURCE_PLLSAI2: /* PLLSAI2 is used as clock source for SAI2*/ - /* PLLSAI2 input clock, parameters M, N & P configuration and clock output (PLLSAI2ClockOut) */ - ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_P_UPDATE); - /* SAI2 clock source config set later after clock selection check */ - break; - - case RCC_SAI2CLKSOURCE_PIN: /* External clock is used as source of SAI2 clock*/ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - case RCC_SAI2CLKSOURCE_HSI: /* HSI is used as source of SAI2 clock*/ -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - /* SAI2 clock source config set later after clock selection check */ - break; - - default: - ret = HAL_ERROR; - break; - } - - if(ret == HAL_OK) - { - /* Set the source of SAI2 clock*/ - __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection); - } - else - { - /* set overall return value */ - status = ret; - } - } -#endif /* SAI2 */ - - /*-------------------------- RTC clock source configuration ----------------------*/ - if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - { - FlagStatus pwrclkchanged = RESET; - - /* Check for RTC Parameters used to output RTCCLK */ - assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); - - /* Enable Power Clock */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - pwrclkchanged = SET; - } - - /* Enable write access to Backup domain */ - SET_BIT(PWR->CR1, PWR_CR1_DBP); - - /* Wait for Backup domain Write protection disable */ - tickstart = HAL_GetTick(); - - while(READ_BIT(PWR->CR1, PWR_CR1_DBP) == RESET) - { - if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - { - ret = HAL_TIMEOUT; - break; - } - } - - if(ret == HAL_OK) - { - /* Reset the Backup domain only if the RTC Clock source selection is modified from default */ - tmpregister = READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL); - - if((tmpregister != RCC_RTCCLKSOURCE_NONE) && (tmpregister != PeriphClkInit->RTCClockSelection)) - { - /* Store the content of BDCR register before the reset of Backup Domain */ - tmpregister = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL)); - /* RTC Clock selection can be changed only if the Backup Domain is reset */ - __HAL_RCC_BACKUPRESET_FORCE(); - __HAL_RCC_BACKUPRESET_RELEASE(); - /* Restore the Content of BDCR register */ - RCC->BDCR = tmpregister; - } - - /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ - if (HAL_IS_BIT_SET(tmpregister, RCC_BDCR_LSEON)) - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till LSE is ready */ - while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RESET) - { - if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - { - ret = HAL_TIMEOUT; - break; - } - } - } - - if(ret == HAL_OK) - { - /* Apply new RTC clock source selection */ - __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - } - else - { - /* set overall return value */ - status = ret; - } - } - else - { - /* set overall return value */ - status = ret; - } - - /* Restore clock configuration if changed */ - if(pwrclkchanged == SET) - { - __HAL_RCC_PWR_CLK_DISABLE(); - } - } - - /*-------------------------- USART1 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) - { - /* Check the parameters */ - assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); - - /* Configure the USART1 clock source */ - __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); - } - - /*-------------------------- USART2 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) - { - /* Check the parameters */ - assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); - - /* Configure the USART2 clock source */ - __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); - } - -#if defined(USART3) - - /*-------------------------- USART3 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) - { - /* Check the parameters */ - assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); - - /* Configure the USART3 clock source */ - __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); - } - -#endif /* USART3 */ - -#if defined(UART4) - - /*-------------------------- UART4 clock source configuration --------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) - { - /* Check the parameters */ - assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection)); - - /* Configure the UART4 clock source */ - __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); - } - -#endif /* UART4 */ - -#if defined(UART5) - - /*-------------------------- UART5 clock source configuration --------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) - { - /* Check the parameters */ - assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection)); - - /* Configure the UART5 clock source */ - __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection); - } - -#endif /* UART5 */ - - /*-------------------------- LPUART1 clock source configuration ------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) - { - /* Check the parameters */ - assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection)); - - /* Configure the LPUAR1 clock source */ - __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection); - } - - /*-------------------------- LPTIM1 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1)) - { - assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection)); - __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection); - } - - /*-------------------------- LPTIM2 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == (RCC_PERIPHCLK_LPTIM2)) - { - assert_param(IS_RCC_LPTIM2CLK(PeriphClkInit->Lptim2ClockSelection)); - __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection); - } - - /*-------------------------- I2C1 clock source configuration ---------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) - { - /* Check the parameters */ - assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); - - /* Configure the I2C1 clock source */ - __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); - } - -#if defined(I2C2) - - /*-------------------------- I2C2 clock source configuration ---------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) - { - /* Check the parameters */ - assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection)); - - /* Configure the I2C2 clock source */ - __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection); - } - -#endif /* I2C2 */ - - /*-------------------------- I2C3 clock source configuration ---------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) - { - /* Check the parameters */ - assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection)); - - /* Configure the I2C3 clock source */ - __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection); - } - -#if defined(I2C4) - - /*-------------------------- I2C4 clock source configuration ---------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) - { - /* Check the parameters */ - assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection)); - - /* Configure the I2C4 clock source */ - __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection); - } - -#endif /* I2C4 */ - -#if defined(USB_OTG_FS) || defined(USB) - - /*-------------------------- USB clock source configuration ----------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == (RCC_PERIPHCLK_USB)) - { - assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection)); - __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - - if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLL) - { - /* Enable PLL48M1CLK output */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); - } - else - { - if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLLSAI1) - { - /* PLLSAI1 input clock, parameters M, N & Q configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_Q_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - } - } - -#endif /* USB_OTG_FS || USB */ - -#if defined(SDMMC1) - - /*-------------------------- SDMMC1 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == (RCC_PERIPHCLK_SDMMC1)) - { - assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection)); - __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection); - - if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLL) /* PLL "Q" ? */ - { - /* Enable PLL48M1CLK output */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); - } -#if defined(RCC_CCIPR2_SDMMCSEL) - else if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLLP) /* PLL "P" ? */ - { - /* Enable PLLSAI3CLK output */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); - } -#endif - else if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLLSAI1) - { - /* PLLSAI1 input clock, parameters M, N & Q configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_Q_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - } - -#endif /* SDMMC1 */ - - /*-------------------------- RNG clock source configuration ----------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == (RCC_PERIPHCLK_RNG)) - { - assert_param(IS_RCC_RNGCLKSOURCE(PeriphClkInit->RngClockSelection)); - __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection); - - if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLL) - { - /* Enable PLL48M1CLK output */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); - } - else if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLLSAI1) - { - /* PLLSAI1 input clock, parameters M, N & Q configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_Q_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - } - - /*-------------------------- ADC clock source configuration ----------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - { - /* Check the parameters */ - assert_param(IS_RCC_ADCCLKSOURCE(PeriphClkInit->AdcClockSelection)); - - /* Configure the ADC interface clock source */ - __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - - if(PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLSAI1) - { - /* PLLSAI1 input clock, parameters M, N & R configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_R_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) - - else if(PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLSAI2) - { - /* PLLSAI2 input clock, parameters M, N & R configuration and clock output (PLLSAI2ClockOut) */ - ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_R_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ - - } - -#if defined(SWPMI1) - - /*-------------------------- SWPMI1 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) - { - /* Check the parameters */ - assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection)); - - /* Configure the SWPMI1 clock source */ - __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection); - } - -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) - - /*-------------------------- DFSDM1 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) - { - /* Check the parameters */ - assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection)); - - /* Configure the DFSDM1 interface clock source */ - __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection); - } - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - /*-------------------------- DFSDM1 audio clock source configuration -------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1AUDIO) == RCC_PERIPHCLK_DFSDM1AUDIO) - { - /* Check the parameters */ - assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection)); - - /* Configure the DFSDM1 interface audio clock source */ - __HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection); - } - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) - - /*-------------------------- LTDC clock source configuration --------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC) - { - /* Check the parameters */ - assert_param(IS_RCC_LTDCCLKSOURCE(PeriphClkInit->LtdcClockSelection)); - - /* Disable the PLLSAI2 */ - __HAL_RCC_PLLSAI2_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - ret = HAL_TIMEOUT; - break; - } - } - - if(ret == HAL_OK) - { - /* Configure the LTDC clock source */ - __HAL_RCC_LTDC_CONFIG(PeriphClkInit->LtdcClockSelection); - - /* PLLSAI2 input clock, parameters M, N & R configuration and clock output (PLLSAI2ClockOut) */ - ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_R_UPDATE); - } - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - -#endif /* LTDC */ - -#if defined(DSI) - - /*-------------------------- DSI clock source configuration ---------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DSI) == RCC_PERIPHCLK_DSI) - { - /* Check the parameters */ - assert_param(IS_RCC_DSICLKSOURCE(PeriphClkInit->DsiClockSelection)); - - /* Configure the DSI clock source */ - __HAL_RCC_DSI_CONFIG(PeriphClkInit->DsiClockSelection); - - if(PeriphClkInit->DsiClockSelection == RCC_DSICLKSOURCE_PLLSAI2) - { - /* PLLSAI2 input clock, parameters M, N & Q configuration and clock output (PLLSAI2ClockOut) */ - ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_Q_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - } - -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - - /*-------------------------- OctoSPIx clock source configuration ----------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_OSPI) == RCC_PERIPHCLK_OSPI) - { - /* Check the parameters */ - assert_param(IS_RCC_OSPICLKSOURCE(PeriphClkInit->OspiClockSelection)); - - /* Configure the OctoSPI clock source */ - __HAL_RCC_OSPI_CONFIG(PeriphClkInit->OspiClockSelection); - - if(PeriphClkInit->OspiClockSelection == RCC_OSPICLKSOURCE_PLL) - { - /* Enable PLL48M1CLK output */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); - } - } - -#endif /* OCTOSPI1 || OCTOSPI2 */ - - return status; -} - -/** - * @brief Get the RCC_ClkInitStruct according to the internal RCC configuration registers. - * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that - * returns the configuration information for the Extended Peripherals - * clocks(SAI1, SAI2, LPTIM1, LPTIM2, I2C1, I2C2, I2C3, I2C4, LPUART, - * USART1, USART2, USART3, UART4, UART5, RTC, ADCx, DFSDMx, SWPMI1, USB, SDMMC1 and RNG). - * @retval None - */ -void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) -{ - /* Set all possible values for the extended clock type parameter------------*/ - -#if defined(STM32L431xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L432xx) || defined(STM32L442xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C3 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L433xx) || defined(STM32L443xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L451xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L452xx) || defined(STM32L462xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L471xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L496xx) || defined(STM32L4A6xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L4R5xx) || defined(STM32L4S5xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_DFSDM1AUDIO | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_OSPI; - -#elif defined(STM32L4R7xx) || defined(STM32L4S7xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_DFSDM1AUDIO | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_OSPI | RCC_PERIPHCLK_LTDC; - -#elif defined(STM32L4R9xx) || defined(STM32L4S9xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_DFSDM1AUDIO | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_OSPI | RCC_PERIPHCLK_LTDC | RCC_PERIPHCLK_DSI; - -#endif /* STM32L431xx */ - - /* Get the PLLSAI1 Clock configuration -----------------------------------------------*/ - - PeriphClkInit->PLLSAI1.PLLSAI1Source = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC) >> RCC_PLLCFGR_PLLSRC_Pos; -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U; -#else - PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U; -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - PeriphClkInit->PLLSAI1.PLLSAI1N = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; - PeriphClkInit->PLLSAI1.PLLSAI1P = ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P) >> RCC_PLLSAI1CFGR_PLLSAI1P_Pos) << 4U) + 7U; - PeriphClkInit->PLLSAI1.PLLSAI1Q = ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q) >> RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) + 1U) * 2U; - PeriphClkInit->PLLSAI1.PLLSAI1R = ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1R) >> RCC_PLLSAI1CFGR_PLLSAI1R_Pos) + 1U) * 2U; - -#if defined(RCC_PLLSAI2_SUPPORT) - - /* Get the PLLSAI2 Clock configuration -----------------------------------------------*/ - - PeriphClkInit->PLLSAI2.PLLSAI2Source = PeriphClkInit->PLLSAI1.PLLSAI1Source; -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - PeriphClkInit->PLLSAI2.PLLSAI2M = (READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2M) >> RCC_PLLSAI2CFGR_PLLSAI2M_Pos) + 1U; -#else - PeriphClkInit->PLLSAI2.PLLSAI2M = PeriphClkInit->PLLSAI1.PLLSAI1M; -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - PeriphClkInit->PLLSAI2.PLLSAI2N = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N) >> RCC_PLLSAI2CFGR_PLLSAI2N_Pos; - PeriphClkInit->PLLSAI2.PLLSAI2P = ((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2P) >> RCC_PLLSAI2CFGR_PLLSAI2P_Pos) << 4U) + 7U; -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - PeriphClkInit->PLLSAI2.PLLSAI2Q = ((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2Q) >> RCC_PLLSAI2CFGR_PLLSAI2Q_Pos) + 1U) * 2U; -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ - PeriphClkInit->PLLSAI2.PLLSAI2R = ((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2R)>> RCC_PLLSAI2CFGR_PLLSAI2R_Pos) + 1U) * 2U; - -#endif /* RCC_PLLSAI2_SUPPORT */ - - /* Get the USART1 clock source ---------------------------------------------*/ - PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE(); - /* Get the USART2 clock source ---------------------------------------------*/ - PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE(); - -#if defined(USART3) - /* Get the USART3 clock source ---------------------------------------------*/ - PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE(); -#endif /* USART3 */ - -#if defined(UART4) - /* Get the UART4 clock source ----------------------------------------------*/ - PeriphClkInit->Uart4ClockSelection = __HAL_RCC_GET_UART4_SOURCE(); -#endif /* UART4 */ - -#if defined(UART5) - /* Get the UART5 clock source ----------------------------------------------*/ - PeriphClkInit->Uart5ClockSelection = __HAL_RCC_GET_UART5_SOURCE(); -#endif /* UART5 */ - - /* Get the LPUART1 clock source --------------------------------------------*/ - PeriphClkInit->Lpuart1ClockSelection = __HAL_RCC_GET_LPUART1_SOURCE(); - - /* Get the I2C1 clock source -----------------------------------------------*/ - PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE(); - -#if defined(I2C2) - /* Get the I2C2 clock source ----------------------------------------------*/ - PeriphClkInit->I2c2ClockSelection = __HAL_RCC_GET_I2C2_SOURCE(); -#endif /* I2C2 */ - - /* Get the I2C3 clock source -----------------------------------------------*/ - PeriphClkInit->I2c3ClockSelection = __HAL_RCC_GET_I2C3_SOURCE(); - -#if defined(I2C4) - /* Get the I2C4 clock source -----------------------------------------------*/ - PeriphClkInit->I2c4ClockSelection = __HAL_RCC_GET_I2C4_SOURCE(); -#endif /* I2C4 */ - - /* Get the LPTIM1 clock source ---------------------------------------------*/ - PeriphClkInit->Lptim1ClockSelection = __HAL_RCC_GET_LPTIM1_SOURCE(); - - /* Get the LPTIM2 clock source ---------------------------------------------*/ - PeriphClkInit->Lptim2ClockSelection = __HAL_RCC_GET_LPTIM2_SOURCE(); - - /* Get the SAI1 clock source -----------------------------------------------*/ - PeriphClkInit->Sai1ClockSelection = __HAL_RCC_GET_SAI1_SOURCE(); - -#if defined(SAI2) - /* Get the SAI2 clock source -----------------------------------------------*/ - PeriphClkInit->Sai2ClockSelection = __HAL_RCC_GET_SAI2_SOURCE(); -#endif /* SAI2 */ - - /* Get the RTC clock source ------------------------------------------------*/ - PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE(); - -#if defined(USB_OTG_FS) || defined(USB) - /* Get the USB clock source ------------------------------------------------*/ - PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE(); -#endif /* USB_OTG_FS || USB */ - -#if defined(SDMMC1) - /* Get the SDMMC1 clock source ---------------------------------------------*/ - PeriphClkInit->Sdmmc1ClockSelection = __HAL_RCC_GET_SDMMC1_SOURCE(); -#endif /* SDMMC1 */ - - /* Get the RNG clock source ------------------------------------------------*/ - PeriphClkInit->RngClockSelection = __HAL_RCC_GET_RNG_SOURCE(); - - /* Get the ADC clock source ------------------------------------------------*/ - PeriphClkInit->AdcClockSelection = __HAL_RCC_GET_ADC_SOURCE(); - -#if defined(SWPMI1) - /* Get the SWPMI1 clock source ---------------------------------------------*/ - PeriphClkInit->Swpmi1ClockSelection = __HAL_RCC_GET_SWPMI1_SOURCE(); -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) - /* Get the DFSDM1 clock source ---------------------------------------------*/ - PeriphClkInit->Dfsdm1ClockSelection = __HAL_RCC_GET_DFSDM1_SOURCE(); - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - /* Get the DFSDM1 audio clock source ---------------------------------------*/ - PeriphClkInit->Dfsdm1AudioClockSelection = __HAL_RCC_GET_DFSDM1AUDIO_SOURCE(); -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) - /* Get the LTDC clock source -----------------------------------------------*/ - PeriphClkInit->LtdcClockSelection = __HAL_RCC_GET_LTDC_SOURCE(); -#endif /* LTDC */ - -#if defined(DSI) - /* Get the DSI clock source ------------------------------------------------*/ - PeriphClkInit->DsiClockSelection = __HAL_RCC_GET_DSI_SOURCE(); -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - /* Get the OctoSPIclock source --------------------------------------------*/ - PeriphClkInit->OspiClockSelection = __HAL_RCC_GET_OSPI_SOURCE(); -#endif /* OCTOSPI1 || OCTOSPI2 */ -} - -/** - * @brief Return the peripheral clock frequency for peripherals with clock source from PLLSAIs - * @note Return 0 if peripheral clock identifier not managed by this API - * @param PeriphClk Peripheral clock identifier - * This parameter can be one of the following values: - * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock - * @arg @ref RCC_PERIPHCLK_ADC ADC peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM) - @endif - * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock - * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock - * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - * @arg @ref RCC_PERIPHCLK_LPTIM1 LPTIM1 peripheral clock - * @arg @ref RCC_PERIPHCLK_LPTIM2 LPTIM2 peripheral clock - * @arg @ref RCC_PERIPHCLK_LPUART1 LPUART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_RNG RNG peripheral clock - * @arg @ref RCC_PERIPHCLK_SAI1 SAI1 peripheral clock - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - * @arg @ref RCC_PERIPHCLK_SDMMC1 SDMMC1 peripheral clock - @if STM32L443xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_USART2 USART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_USART3 USART1 peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 USART1 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral kernel clock (only for devices with DFSDM1) - * @arg @ref RCC_PERIPHCLK_DFSDM1AUDIO DFSDM1 peripheral audio clock (only for devices with DFSDM1) - * @arg @ref RCC_PERIPHCLK_LTDC LTDC peripheral clock (only for devices with LTDC) - * @arg @ref RCC_PERIPHCLK_DSI DSI peripheral clock (only for devices with DSI) - * @arg @ref RCC_PERIPHCLK_OSPI OctoSPI peripheral clock (only for devices with OctoSPI) - @endif - * @retval Frequency in Hz - */ -uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) -{ - uint32_t frequency = 0U; - uint32_t srcclk = 0U; - uint32_t pllvco = 0U, plln = 0U, pllp = 0U; - - /* Check the parameters */ - assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); - - if(PeriphClk == RCC_PERIPHCLK_RTC) - { - /* Get the current RTC source */ - srcclk = __HAL_RCC_GET_RTC_SOURCE(); - - /* Check if LSE is ready and if RTC clock selection is LSE */ - if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Check if LSI is ready and if RTC clock selection is LSI */ - else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) - { - frequency = LSI_VALUE; - } - /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/ - else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) - { - frequency = HSE_VALUE / 32U; - } - /* Clock not enabled for RTC*/ - else - { - frequency = 0U; - } - } - else - { - /* Other external peripheral clock source than RTC */ - - /* Compute PLL clock input */ - if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_MSI) /* MSI ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) - { - /*MSI frequency range in HZ*/ - pllvco = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> 4U)]; - } - else - { - pllvco = 0U; - } - } - else if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI) /* HSI ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) - { - pllvco = HSI_VALUE; - } - else - { - pllvco = 0U; - } - } - else if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) /* HSE ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) - { - pllvco = HSE_VALUE; - } - else - { - pllvco = 0U; - } - } - else /* No source */ - { - pllvco = 0U; - } - -#if !defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) && !defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLL Source) / PLLM */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); -#endif - - switch(PeriphClk) - { -#if defined(SAI2) - - case RCC_PERIPHCLK_SAI1: - case RCC_PERIPHCLK_SAI2: - - if(PeriphClk == RCC_PERIPHCLK_SAI1) - { - srcclk = __HAL_RCC_GET_SAI1_SOURCE(); - - if(srcclk == RCC_SAI1CLKSOURCE_PIN) - { - frequency = EXTERNAL_SAI1_CLOCK_VALUE; - } - /* Else, PLL clock output to check below */ - } - else /* RCC_PERIPHCLK_SAI2 */ - { - srcclk = __HAL_RCC_GET_SAI2_SOURCE(); - - if(srcclk == RCC_SAI2CLKSOURCE_PIN) - { - frequency = EXTERNAL_SAI2_CLOCK_VALUE; - } - /* Else, PLL clock output to check below */ - } - -#else - - case RCC_PERIPHCLK_SAI1: - - if(PeriphClk == RCC_PERIPHCLK_SAI1) - { - srcclk = READ_BIT(RCC->CCIPR, RCC_CCIPR_SAI1SEL); - - if(srcclk == RCC_SAI1CLKSOURCE_PIN) - { - frequency = EXTERNAL_SAI1_CLOCK_VALUE; - } - /* Else, PLL clock output to check below */ - } - -#endif /* SAI2 */ - - if(frequency == 0U) - { -#if defined(SAI2) - if((srcclk == RCC_SAI1CLKSOURCE_PLL) || (srcclk == RCC_SAI2CLKSOURCE_PLL)) - { - if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_SAI3CLK) != RESET) - { - /* f(PLLSAI3CLK) = f(VCO input) * PLLN / PLLP */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - frequency = (pllvco * plln) / pllp; - } - } - else if(srcclk == 0U) /* RCC_SAI1CLKSOURCE_PLLSAI1 || RCC_SAI2CLKSOURCE_PLLSAI1 */ - { - if(__HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(RCC_PLLSAI1_SAI1CLK) != RESET) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* f(PLLSAI1 Source) / PLLSAI1M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U)); -#endif - /* f(PLLSAI1CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1P */ - plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1PDIV) >> RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - frequency = (pllvco * plln) / pllp; - } - } -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - else if((srcclk == RCC_SAI1CLKSOURCE_HSI) || (srcclk == RCC_SAI2CLKSOURCE_HSI)) - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) - { - frequency = HSI_VALUE; - } - } -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#else - if(srcclk == RCC_SAI1CLKSOURCE_PLL) - { - if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_SAI2CLK) != RESET) - { - /* f(PLLSAI2CLK) = f(VCO input) * PLLN / PLLP */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - - frequency = (pllvco * plln) / pllp; - } - else if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) - { - /* HSI automatically selected as clock source if PLLs not enabled */ - frequency = HSI_VALUE; - } - else - { - /* No clock source */ - frequency = 0U; - } - } - else if(srcclk == RCC_SAI1CLKSOURCE_PLLSAI1) - { - if(__HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(RCC_PLLSAI1_SAI1CLK) != RESET) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* f(PLLSAI1 Source) / PLLSAI1M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U)); -#endif - /* f(PLLSAI1CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1P */ - plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1PDIV) >> RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - - frequency = (pllvco * plln) / pllp; - } - else if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) - { - /* HSI automatically selected as clock source if PLLs not enabled */ - frequency = HSI_VALUE; - } - else - { - /* No clock source */ - frequency = 0U; - } - } -#endif /* SAI2 */ - -#if defined(RCC_PLLSAI2_SUPPORT) - - else if((srcclk == RCC_SAI1CLKSOURCE_PLLSAI2) || (srcclk == RCC_SAI2CLKSOURCE_PLLSAI2)) - { - if(__HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(RCC_PLLSAI2_SAI2CLK) != RESET) - { -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLLSAI2 Source) / PLLSAI2M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2M) >> RCC_PLLSAI2CFGR_PLLSAI2M_Pos) + 1U)); -#endif - /* f(PLLSAI2CLK) = f(VCOSAI2 input) * PLLSAI2N / PLLSAI2P */ - plln = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N) >> RCC_PLLSAI2CFGR_PLLSAI2N_Pos; -#if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2PDIV) >> RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2P) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - frequency = (pllvco * plln) / pllp; - } - } - -#endif /* RCC_PLLSAI2_SUPPORT */ - - else - { - /* No clock source */ - frequency = 0U; - } - } - break; - -#if defined(USB_OTG_FS) || defined(USB) - - case RCC_PERIPHCLK_USB: - -#endif /* USB_OTG_FS || USB */ - - case RCC_PERIPHCLK_RNG: - -#if defined(SDMMC1) && !defined(RCC_CCIPR2_SDMMCSEL) - - case RCC_PERIPHCLK_SDMMC1: - -#endif /* SDMMC1 && !RCC_CCIPR2_SDMMCSEL */ - - srcclk = READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL); - - if(srcclk == RCC_CCIPR_CLK48SEL) /* MSI ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) - { - /*MSI frequency range in HZ*/ - frequency = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> 4U)]; - } - else - { - frequency = 0U; - } - } - else if(srcclk == RCC_CCIPR_CLK48SEL_1) /* PLL ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY) && HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) || defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLL Source) / PLLM */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); -#endif - /* f(PLL48M1CLK) = f(VCO input) * PLLN / PLLQ */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos) + 1U) << 1U); - } - else - { - frequency = 0U; - } - } - else if(srcclk == RCC_CCIPR_CLK48SEL_0) /* PLLSAI1 ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLSAI1RDY) && HAL_IS_BIT_SET(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1QEN)) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* f(PLLSAI1 Source) / PLLSAI1M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U)); -#endif - /* f(PLL48M2CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1Q */ - plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q) >> RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) + 1U) << 1U); - } - else - { - frequency = 0U; - } - } -#if defined(RCC_HSI48_SUPPORT) - else if((srcclk == 0U) && (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY))) /* HSI48 ? */ - { - frequency = HSI48_VALUE; - } - else /* No clock source */ - { - frequency = 0U; - } -#else - else /* No clock source */ - { - frequency = 0U; - } -#endif /* RCC_HSI48_SUPPORT */ - break; - -#if defined(SDMMC1) && defined(RCC_CCIPR2_SDMMCSEL) - - case RCC_PERIPHCLK_SDMMC1: - - if(HAL_IS_BIT_SET(RCC->CCIPR2, RCC_CCIPR2_SDMMCSEL)) /* PLL "P" ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY) && HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN)) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) || defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLL Source) / PLLM */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); -#endif - /* f(PLLSAI3CLK) = f(VCO input) * PLLN / PLLP */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - frequency = (pllvco * plln) / pllp; - } - else - { - frequency = 0U; - } - } - else /* 48MHz from PLL "Q" or MSI or PLLSAI1Q or HSI48 */ - { - srcclk = READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL); - - if(srcclk == RCC_CCIPR_CLK48SEL) /* MSI ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) - { - /*MSI frequency range in HZ*/ - frequency = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> 4U)]; - } - else - { - frequency = 0U; - } - } - else if(srcclk == RCC_CCIPR_CLK48SEL_1) /* PLL "Q" ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY) && HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) || defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLL Source) / PLLM */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); -#endif - /* f(PLL48M1CLK) = f(VCO input) * PLLN / PLLQ */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos) + 1U) << 1U); - } - else - { - frequency = 0U; - } - } - else if(srcclk == RCC_CCIPR_CLK48SEL_0) /* PLLSAI1 ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLSAI1RDY) && HAL_IS_BIT_SET(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1QEN)) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* f(PLLSAI1 Source) / PLLSAI1M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U)); -#endif - /* f(PLL48M2CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1Q */ - plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q) >> RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) + 1U) << 1U); - } - else - { - frequency = 0U; - } - } - else if((srcclk == 0U) && (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY))) /* HSI48 ? */ - { - frequency = HSI48_VALUE; - } - else /* No clock source */ - { - frequency = 0U; - } - } - break; - -#endif /* SDMMC1 && RCC_CCIPR2_SDMMCSEL */ - - case RCC_PERIPHCLK_USART1: - /* Get the current USART1 source */ - srcclk = __HAL_RCC_GET_USART1_SOURCE(); - - if(srcclk == RCC_USART1CLKSOURCE_PCLK2) - { - frequency = HAL_RCC_GetPCLK2Freq(); - } - else if(srcclk == RCC_USART1CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for USART1 */ - else - { - frequency = 0U; - } - break; - - case RCC_PERIPHCLK_USART2: - /* Get the current USART2 source */ - srcclk = __HAL_RCC_GET_USART2_SOURCE(); - - if(srcclk == RCC_USART2CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_USART2CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for USART2 */ - else - { - frequency = 0U; - } - break; - -#if defined(USART3) - - case RCC_PERIPHCLK_USART3: - /* Get the current USART3 source */ - srcclk = __HAL_RCC_GET_USART3_SOURCE(); - - if(srcclk == RCC_USART3CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_USART3CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for USART3 */ - else - { - frequency = 0U; - } - break; - -#endif /* USART3 */ - -#if defined(UART4) - - case RCC_PERIPHCLK_UART4: - /* Get the current UART4 source */ - srcclk = __HAL_RCC_GET_UART4_SOURCE(); - - if(srcclk == RCC_UART4CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_UART4CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_UART4CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_UART4CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for UART4 */ - else - { - frequency = 0U; - } - break; - -#endif /* UART4 */ - -#if defined(UART5) - - case RCC_PERIPHCLK_UART5: - /* Get the current UART5 source */ - srcclk = __HAL_RCC_GET_UART5_SOURCE(); - - if(srcclk == RCC_UART5CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_UART5CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_UART5CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_UART5CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for UART5 */ - else - { - frequency = 0U; - } - break; - -#endif /* UART5 */ - - case RCC_PERIPHCLK_LPUART1: - /* Get the current LPUART1 source */ - srcclk = __HAL_RCC_GET_LPUART1_SOURCE(); - - if(srcclk == RCC_LPUART1CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_LPUART1CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_LPUART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_LPUART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for LPUART1 */ - else - { - frequency = 0U; - } - break; - - case RCC_PERIPHCLK_ADC: - - srcclk = __HAL_RCC_GET_ADC_SOURCE(); - - if(srcclk == RCC_ADCCLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if(srcclk == RCC_ADCCLKSOURCE_PLLSAI1) - { - if(__HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(RCC_PLLSAI1_ADC1CLK) != RESET) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* f(PLLSAI1 Source) / PLLSAI1M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U)); -#endif - /* f(PLLADC1CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1R */ - plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1R) >> RCC_PLLSAI1CFGR_PLLSAI1R_Pos) + 1U) << 1U); - } - } -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) - else if(srcclk == RCC_ADCCLKSOURCE_PLLSAI2) - { - if(__HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(RCC_PLLSAI2_ADC2CLK) != RESET) - { -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLLSAI2 Source) / PLLSAI2M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2M) >> RCC_PLLSAI2CFGR_PLLSAI2M_Pos) + 1U)); -#endif - /* f(PLLADC2CLK) = f(VCOSAI2 input) * PLLSAI2N / PLLSAI2R */ - plln = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N) >> RCC_PLLSAI2CFGR_PLLSAI2N_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2R) >> RCC_PLLSAI2CFGR_PLLSAI2R_Pos) + 1U) << 1U); - } - } -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ - /* Clock not enabled for ADC */ - else - { - frequency = 0U; - } - break; - -#if defined(DFSDM1_Filter0) - - case RCC_PERIPHCLK_DFSDM1: - /* Get the current DFSDM1 source */ - srcclk = __HAL_RCC_GET_DFSDM1_SOURCE(); - - if(srcclk == RCC_DFSDM1CLKSOURCE_PCLK2) - { - frequency = HAL_RCC_GetPCLK2Freq(); - } - else - { - frequency = HAL_RCC_GetSysClockFreq(); - } - break; - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - - case RCC_PERIPHCLK_DFSDM1AUDIO: - /* Get the current DFSDM1 audio source */ - srcclk = __HAL_RCC_GET_DFSDM1AUDIO_SOURCE(); - - if(srcclk == RCC_DFSDM1AUDIOCLKSOURCE_SAI1) - { - frequency = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI1); - } - else if((srcclk == RCC_DFSDM1AUDIOCLKSOURCE_MSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY))) - { - /*MSI frequency range in HZ*/ - frequency = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> 4U)]; - } - else if((srcclk == RCC_DFSDM1AUDIOCLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for DFSDM1 audio source */ - else - { - frequency = 0U; - } - break; - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* DFSDM1_Filter0 */ - - case RCC_PERIPHCLK_I2C1: - /* Get the current I2C1 source */ - srcclk = __HAL_RCC_GET_I2C1_SOURCE(); - - if(srcclk == RCC_I2C1CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_I2C1CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for I2C1 */ - else - { - frequency = 0U; - } - break; - -#if defined(I2C2) - - case RCC_PERIPHCLK_I2C2: - /* Get the current I2C2 source */ - srcclk = __HAL_RCC_GET_I2C2_SOURCE(); - - if(srcclk == RCC_I2C2CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_I2C2CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_I2C2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for I2C2 */ - else - { - frequency = 0U; - } - break; - -#endif /* I2C2 */ - - case RCC_PERIPHCLK_I2C3: - /* Get the current I2C3 source */ - srcclk = __HAL_RCC_GET_I2C3_SOURCE(); - - if(srcclk == RCC_I2C3CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_I2C3CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_I2C3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for I2C3 */ - else - { - frequency = 0U; - } - break; - -#if defined(I2C4) - - case RCC_PERIPHCLK_I2C4: - /* Get the current I2C4 source */ - srcclk = __HAL_RCC_GET_I2C4_SOURCE(); - - if(srcclk == RCC_I2C4CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_I2C4CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_I2C4CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for I2C4 */ - else - { - frequency = 0U; - } - break; - -#endif /* I2C4 */ - - case RCC_PERIPHCLK_LPTIM1: - /* Get the current LPTIM1 source */ - srcclk = __HAL_RCC_GET_LPTIM1_SOURCE(); - - if(srcclk == RCC_LPTIM1CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if((srcclk == RCC_LPTIM1CLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) - { - frequency = LSI_VALUE; - } - else if((srcclk == RCC_LPTIM1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if ((srcclk == RCC_LPTIM1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for LPTIM1 */ - else - { - frequency = 0U; - } - break; - - case RCC_PERIPHCLK_LPTIM2: - /* Get the current LPTIM2 source */ - srcclk = __HAL_RCC_GET_LPTIM2_SOURCE(); - - if(srcclk == RCC_LPTIM2CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if((srcclk == RCC_LPTIM2CLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) - { - frequency = LSI_VALUE; - } - else if((srcclk == RCC_LPTIM2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if ((srcclk == RCC_LPTIM2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for LPTIM2 */ - else - { - frequency = 0U; - } - break; - -#if defined(SWPMI1) - - case RCC_PERIPHCLK_SWPMI1: - /* Get the current SWPMI1 source */ - srcclk = __HAL_RCC_GET_SWPMI1_SOURCE(); - - if(srcclk == RCC_SWPMI1CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if((srcclk == RCC_SWPMI1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for SWPMI1 */ - else - { - frequency = 0U; - } - break; - -#endif /* SWPMI1 */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - - case RCC_PERIPHCLK_OSPI: - /* Get the current OctoSPI clock source */ - srcclk = __HAL_RCC_GET_OSPI_SOURCE(); - - if(srcclk == RCC_OSPICLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_OSPICLKSOURCE_MSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY))) - { - /*MSI frequency range in HZ*/ - frequency = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> 4U)]; - } - else if(srcclk == RCC_OSPICLKSOURCE_PLL) - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY) && HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) - { - /* f(PLL Source) / PLLM */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); - /* f(PLL48M1CLK) = f(VCO input) * PLLN / PLLQ */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos) + 1U) << 1U); - } - else - { - frequency = 0U; - } - } - /* Clock not enabled for OctoSPI */ - else - { - frequency = 0U; - } - break; - -#endif /* OCTOSPI1 || OCTOSPI2 */ - - default: - break; - } - } - - return(frequency); -} - -/** - * @} - */ - -/** @defgroup RCCEx_Exported_Functions_Group2 Extended Clock management functions - * @brief Extended Clock management functions - * -@verbatim - =============================================================================== - ##### Extended clock management functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the - activation or deactivation of MSI PLL-mode, PLLSAI1, PLLSAI2, LSE CSS, - Low speed clock output and clock after wake-up from STOP mode. -@endverbatim - * @{ - */ - -/** - * @brief Enable PLLSAI1. - * @param PLLSAI1Init pointer to an RCC_PLLSAI1InitTypeDef structure that - * contains the configuration information for the PLLSAI1 - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI1(RCC_PLLSAI1InitTypeDef *PLLSAI1Init) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */ - assert_param(IS_RCC_PLLSAI1SOURCE(PLLSAI1Init->PLLSAI1Source)); - assert_param(IS_RCC_PLLSAI1M_VALUE(PLLSAI1Init->PLLSAI1M)); - assert_param(IS_RCC_PLLSAI1N_VALUE(PLLSAI1Init->PLLSAI1N)); - assert_param(IS_RCC_PLLSAI1P_VALUE(PLLSAI1Init->PLLSAI1P)); - assert_param(IS_RCC_PLLSAI1Q_VALUE(PLLSAI1Init->PLLSAI1Q)); - assert_param(IS_RCC_PLLSAI1R_VALUE(PLLSAI1Init->PLLSAI1R)); - assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PLLSAI1Init->PLLSAI1ClockOut)); - - /* Disable the PLLSAI1 */ - __HAL_RCC_PLLSAI1_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI1 is ready to be updated */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI1 Multiplication factor N */ - /* Configure the PLLSAI1 Division factors M, P, Q and R */ - __HAL_RCC_PLLSAI1_CONFIG(PLLSAI1Init->PLLSAI1M, PLLSAI1Init->PLLSAI1N, PLLSAI1Init->PLLSAI1P, PLLSAI1Init->PLLSAI1Q, PLLSAI1Init->PLLSAI1R); -#else - /* Configure the PLLSAI1 Multiplication factor N */ - /* Configure the PLLSAI1 Division factors P, Q and R */ - __HAL_RCC_PLLSAI1_CONFIG(PLLSAI1Init->PLLSAI1N, PLLSAI1Init->PLLSAI1P, PLLSAI1Init->PLLSAI1Q, PLLSAI1Init->PLLSAI1R); -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - /* Configure the PLLSAI1 Clock output(s) */ - __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PLLSAI1Init->PLLSAI1ClockOut); - - /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/ - __HAL_RCC_PLLSAI1_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI1 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - } - - return status; -} - -/** - * @brief Disable PLLSAI1. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI1(void) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* Disable the PLLSAI1 */ - __HAL_RCC_PLLSAI1_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI1 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - /* Disable the PLLSAI1 Clock outputs */ - __HAL_RCC_PLLSAI1CLKOUT_DISABLE(RCC_PLLSAI1CFGR_PLLSAI1PEN|RCC_PLLSAI1CFGR_PLLSAI1QEN|RCC_PLLSAI1CFGR_PLLSAI1REN); - - /* Reset PLL source to save power if no PLLs on */ - if((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RESET) -#if defined(RCC_PLLSAI2_SUPPORT) - && - (READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == RESET) -#endif /* RCC_PLLSAI2_SUPPORT */ - ) - { - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); - } - - return status; -} - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** - * @brief Enable PLLSAI2. - * @param PLLSAI2Init pointer to an RCC_PLLSAI2InitTypeDef structure that - * contains the configuration information for the PLLSAI2 - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI2(RCC_PLLSAI2InitTypeDef *PLLSAI2Init) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* check for PLLSAI2 Parameters used to output PLLSAI2CLK */ - assert_param(IS_RCC_PLLSAI2SOURCE(PLLSAI2Init->PLLSAI2Source)); - assert_param(IS_RCC_PLLSAI2M_VALUE(PLLSAI2Init->PLLSAI2M)); - assert_param(IS_RCC_PLLSAI2N_VALUE(PLLSAI2Init->PLLSAI2N)); - assert_param(IS_RCC_PLLSAI2P_VALUE(PLLSAI2Init->PLLSAI2P)); -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - assert_param(IS_RCC_PLLSAI2Q_VALUE(PLLSAI2Init->PLLSAI2Q)); -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ - assert_param(IS_RCC_PLLSAI2R_VALUE(PLLSAI2Init->PLLSAI2R)); - assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PLLSAI2Init->PLLSAI2ClockOut)); - - /* Disable the PLLSAI2 */ - __HAL_RCC_PLLSAI2_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready to be updated */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) && defined(RCC_PLLSAI2Q_DIV_SUPPORT) - /* Configure the PLLSAI2 Multiplication factor N */ - /* Configure the PLLSAI2 Division factors M, P, Q and R */ - __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2M, PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2Q, PLLSAI2Init->PLLSAI2R); -#elif defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI2 Multiplication factor N */ - /* Configure the PLLSAI2 Division factors M, P and R */ - __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2M, PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2R); -#elif defined(RCC_PLLSAI2Q_DIV_SUPPORT) - /* Configure the PLLSAI2 Multiplication factor N */ - /* Configure the PLLSAI2 Division factors P, Q and R */ - __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2Q, PLLSAI2Init->PLLSAI2R); -#else - /* Configure the PLLSAI2 Multiplication factor N */ - /* Configure the PLLSAI2 Division factors P and R */ - __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2R); -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT && RCC_PLLSAI2Q_DIV_SUPPORT */ - /* Configure the PLLSAI2 Clock output(s) */ - __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PLLSAI2Init->PLLSAI2ClockOut); - - /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/ - __HAL_RCC_PLLSAI2_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - } - - return status; -} - -/** - * @brief Disable PLLISAI2. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI2(void) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* Disable the PLLSAI2 */ - __HAL_RCC_PLLSAI2_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - /* Disable the PLLSAI2 Clock outputs */ -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - __HAL_RCC_PLLSAI2CLKOUT_DISABLE(RCC_PLLSAI2CFGR_PLLSAI2PEN|RCC_PLLSAI2CFGR_PLLSAI2QEN|RCC_PLLSAI2CFGR_PLLSAI2REN); -#else - __HAL_RCC_PLLSAI2CLKOUT_DISABLE(RCC_PLLSAI2CFGR_PLLSAI2PEN|RCC_PLLSAI2CFGR_PLLSAI2REN); -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT && RCC_PLLSAI2Q_DIV_SUPPORT */ - - /* Reset PLL source to save power if no PLLs on */ - if((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RESET) - && - (READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == RESET) - ) - { - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); - } - - return status; -} - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** - * @brief Configure the oscillator clock source for wakeup from Stop and CSS backup clock. - * @param WakeUpClk Wakeup clock - * This parameter can be one of the following values: - * @arg @ref RCC_STOP_WAKEUPCLOCK_MSI MSI oscillator selection - * @arg @ref RCC_STOP_WAKEUPCLOCK_HSI HSI oscillator selection - * @note This function shall not be called after the Clock Security System on HSE has been - * enabled. - * @retval None - */ -void HAL_RCCEx_WakeUpStopCLKConfig(uint32_t WakeUpClk) -{ - assert_param(IS_RCC_STOP_WAKEUPCLOCK(WakeUpClk)); - - __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(WakeUpClk); -} - -/** - * @brief Configure the MSI range after standby mode. - * @note After Standby its frequency can be selected between 4 possible values (1, 2, 4 or 8 MHz). - * @param MSIRange MSI range - * This parameter can be one of the following values: - * @arg @ref RCC_MSIRANGE_4 Range 4 around 1 MHz - * @arg @ref RCC_MSIRANGE_5 Range 5 around 2 MHz - * @arg @ref RCC_MSIRANGE_6 Range 6 around 4 MHz (reset value) - * @arg @ref RCC_MSIRANGE_7 Range 7 around 8 MHz - * @retval None - */ -void HAL_RCCEx_StandbyMSIRangeConfig(uint32_t MSIRange) -{ - assert_param(IS_RCC_MSI_STANDBY_CLOCK_RANGE(MSIRange)); - - __HAL_RCC_MSI_STANDBY_RANGE_CONFIG(MSIRange); -} - -/** - * @brief Enable the LSE Clock Security System. - * @note Prior to enable the LSE Clock Security System, LSE oscillator is to be enabled - * with HAL_RCC_OscConfig() and the LSE oscillator clock is to be selected as RTC - * clock with HAL_RCCEx_PeriphCLKConfig(). - * @retval None - */ -void HAL_RCCEx_EnableLSECSS(void) -{ - SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; -} - -/** - * @brief Disable the LSE Clock Security System. - * @note LSE Clock Security System can only be disabled after a LSE failure detection. - * @retval None - */ -void HAL_RCCEx_DisableLSECSS(void) -{ - CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; - - /* Disable LSE CSS IT if any */ - __HAL_RCC_DISABLE_IT(RCC_IT_LSECSS); -} - -/** - * @brief Enable the LSE Clock Security System Interrupt & corresponding EXTI line. - * @note LSE Clock Security System Interrupt is mapped on RTC EXTI line 19 - * @retval None - */ -void HAL_RCCEx_EnableLSECSS_IT(void) -{ - /* Enable LSE CSS */ - SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; - - /* Enable LSE CSS IT */ - __HAL_RCC_ENABLE_IT(RCC_IT_LSECSS); - - /* Enable IT on EXTI Line 19 */ - __HAL_RCC_LSECSS_EXTI_ENABLE_IT(); - __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE(); -} - -/** - * @brief Handle the RCC LSE Clock Security System interrupt request. - * @retval None - */ -void HAL_RCCEx_LSECSS_IRQHandler(void) -{ - /* Check RCC LSE CSSF flag */ - if(__HAL_RCC_GET_IT(RCC_IT_LSECSS)) - { - /* RCC LSE Clock Security System interrupt user callback */ - HAL_RCCEx_LSECSS_Callback(); - - /* Clear RCC LSE CSS pending bit */ - __HAL_RCC_CLEAR_IT(RCC_IT_LSECSS); - } -} - -/** - * @brief RCCEx LSE Clock Security System interrupt callback. - * @retval none - */ -__weak void HAL_RCCEx_LSECSS_Callback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the @ref HAL_RCCEx_LSECSS_Callback should be implemented in the user file - */ -} - -/** - * @brief Select the Low Speed clock source to output on LSCO pin (PA2). - * @param LSCOSource specifies the Low Speed clock source to output. - * This parameter can be one of the following values: - * @arg @ref RCC_LSCOSOURCE_LSI LSI clock selected as LSCO source - * @arg @ref RCC_LSCOSOURCE_LSE LSE clock selected as LSCO source - * @retval None - */ -void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource) -{ - GPIO_InitTypeDef GPIO_InitStruct; - FlagStatus pwrclkchanged = RESET; - FlagStatus backupchanged = RESET; - - /* Check the parameters */ - assert_param(IS_RCC_LSCOSOURCE(LSCOSource)); - - /* LSCO Pin Clock Enable */ - __LSCO_CLK_ENABLE(); - - /* Configue the LSCO pin in analog mode */ - GPIO_InitStruct.Pin = LSCO_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(LSCO_GPIO_PORT, &GPIO_InitStruct); - - /* Update LSCOSEL clock source in Backup Domain control register */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - pwrclkchanged = SET; - } - if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - { - HAL_PWR_EnableBkUpAccess(); - backupchanged = SET; - } - - MODIFY_REG(RCC->BDCR, RCC_BDCR_LSCOSEL | RCC_BDCR_LSCOEN, LSCOSource | RCC_BDCR_LSCOEN); - - if(backupchanged == SET) - { - HAL_PWR_DisableBkUpAccess(); - } - if(pwrclkchanged == SET) - { - __HAL_RCC_PWR_CLK_DISABLE(); - } -} - -/** - * @brief Disable the Low Speed clock output. - * @retval None - */ -void HAL_RCCEx_DisableLSCO(void) -{ - FlagStatus pwrclkchanged = RESET; - FlagStatus backupchanged = RESET; - - /* Update LSCOEN bit in Backup Domain control register */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - pwrclkchanged = SET; - } - if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - { - /* Enable access to the backup domain */ - HAL_PWR_EnableBkUpAccess(); - backupchanged = SET; - } - - CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSCOEN); - - /* Restore previous configuration */ - if(backupchanged == SET) - { - /* Disable access to the backup domain */ - HAL_PWR_DisableBkUpAccess(); - } - if(pwrclkchanged == SET) - { - __HAL_RCC_PWR_CLK_DISABLE(); - } -} - -/** - * @brief Enable the PLL-mode of the MSI. - * @note Prior to enable the PLL-mode of the MSI for automatic hardware - * calibration LSE oscillator is to be enabled with HAL_RCC_OscConfig(). - * @retval None - */ -void HAL_RCCEx_EnableMSIPLLMode(void) -{ - SET_BIT(RCC->CR, RCC_CR_MSIPLLEN) ; -} - -/** - * @brief Disable the PLL-mode of the MSI. - * @note PLL-mode of the MSI is automatically reset when LSE oscillator is disabled. - * @retval None - */ -void HAL_RCCEx_DisableMSIPLLMode(void) -{ - CLEAR_BIT(RCC->CR, RCC_CR_MSIPLLEN) ; -} - -/** - * @} - */ - -#if defined(CRS) - -/** @defgroup RCCEx_Exported_Functions_Group3 Extended Clock Recovery System Control functions - * @brief Extended Clock Recovery System Control functions - * -@verbatim - =============================================================================== - ##### Extended Clock Recovery System Control functions ##### - =============================================================================== - [..] - For devices with Clock Recovery System feature (CRS), RCC Extention HAL driver can be used as follows: - - (#) In System clock config, HSI48 needs to be enabled - - (#) Enable CRS clock in IP MSP init which will use CRS functions - - (#) Call CRS functions as follows: - (##) Prepare synchronization configuration necessary for HSI48 calibration - (+++) Default values can be set for frequency Error Measurement (reload and error limit) - and also HSI48 oscillator smooth trimming. - (+++) Macro __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate - directly reload value with target and sychronization frequencies values - (##) Call function HAL_RCCEx_CRSConfig which - (+++) Resets CRS registers to their default values. - (+++) Configures CRS registers with synchronization configuration - (+++) Enables automatic calibration and frequency error counter feature - Note: When using USB LPM (Link Power Management) and the device is in Sleep mode, the - periodic USB SOF will not be generated by the host. No SYNC signal will therefore be - provided to the CRS to calibrate the HSI48 on the run. To guarantee the required clock - precision after waking up from Sleep mode, the LSE or reference clock on the GPIOs - should be used as SYNC signal. - - (##) A polling function is provided to wait for complete synchronization - (+++) Call function HAL_RCCEx_CRSWaitSynchronization() - (+++) According to CRS status, user can decide to adjust again the calibration or continue - application if synchronization is OK - - (#) User can retrieve information related to synchronization in calling function - HAL_RCCEx_CRSGetSynchronizationInfo() - - (#) Regarding synchronization status and synchronization information, user can try a new calibration - in changing synchronization configuration and call again HAL_RCCEx_CRSConfig. - Note: When the SYNC event is detected during the downcounting phase (before reaching the zero value), - it means that the actual frequency is lower than the target (and so, that the TRIM value should be - incremented), while when it is detected during the upcounting phase it means that the actual frequency - is higher (and that the TRIM value should be decremented). - - (#) In interrupt mode, user can resort to the available macros (__HAL_RCC_CRS_XXX_IT). Interrupts will go - through CRS Handler (CRS_IRQn/CRS_IRQHandler) - (++) Call function HAL_RCCEx_CRSConfig() - (++) Enable CRS_IRQn (thanks to NVIC functions) - (++) Enable CRS interrupt (__HAL_RCC_CRS_ENABLE_IT) - (++) Implement CRS status management in the following user callbacks called from - HAL_RCCEx_CRS_IRQHandler(): - (+++) HAL_RCCEx_CRS_SyncOkCallback() - (+++) HAL_RCCEx_CRS_SyncWarnCallback() - (+++) HAL_RCCEx_CRS_ExpectedSyncCallback() - (+++) HAL_RCCEx_CRS_ErrorCallback() - - (#) To force a SYNC EVENT, user can use the function HAL_RCCEx_CRSSoftwareSynchronizationGenerate(). - This function can be called before calling HAL_RCCEx_CRSConfig (for instance in Systick handler) - -@endverbatim - * @{ - */ - -/** - * @brief Start automatic synchronization for polling mode - * @param pInit Pointer on RCC_CRSInitTypeDef structure - * @retval None - */ -void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit) -{ - uint32_t value = 0; - - /* Check the parameters */ - assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler)); - assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source)); - assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity)); - assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue)); - assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue)); - assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue)); - - /* CONFIGURATION */ - - /* Before configuration, reset CRS registers to their default values*/ - __HAL_RCC_CRS_FORCE_RESET(); - __HAL_RCC_CRS_RELEASE_RESET(); - - /* Set the SYNCDIV[2:0] bits according to Prescaler value */ - /* Set the SYNCSRC[1:0] bits according to Source value */ - /* Set the SYNCSPOL bit according to Polarity value */ - value = (pInit->Prescaler | pInit->Source | pInit->Polarity); - /* Set the RELOAD[15:0] bits according to ReloadValue value */ - value |= pInit->ReloadValue; - /* Set the FELIM[7:0] bits according to ErrorLimitValue value */ - value |= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_Pos); - WRITE_REG(CRS->CFGR, value); - - /* Adjust HSI48 oscillator smooth trimming */ - /* Set the TRIM[5:0] bits according to RCC_CRS_HSI48CalibrationValue value */ - MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_Pos)); - - /* START AUTOMATIC SYNCHRONIZATION*/ - - /* Enable Automatic trimming & Frequency error counter */ - SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); -} - -/** - * @brief Generate the software synchronization event - * @retval None - */ -void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void) -{ - SET_BIT(CRS->CR, CRS_CR_SWSYNC); -} - -/** - * @brief Return synchronization info - * @param pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure - * @retval None - */ -void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo) -{ - /* Check the parameter */ - assert_param(pSynchroInfo != NULL); - - /* Get the reload value */ - pSynchroInfo->ReloadValue = (READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); - - /* Get HSI48 oscillator smooth trimming */ - pSynchroInfo->HSI48CalibrationValue = (READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); - - /* Get Frequency error capture */ - pSynchroInfo->FreqErrorCapture = (READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos); - - /* Get Frequency error direction */ - pSynchroInfo->FreqErrorDirection = (READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); -} - -/** -* @brief Wait for CRS Synchronization status. -* @param Timeout Duration of the timeout -* @note Timeout is based on the maximum time to receive a SYNC event based on synchronization -* frequency. -* @note If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned. -* @retval Combination of Synchronization status -* This parameter can be a combination of the following values: -* @arg @ref RCC_CRS_TIMEOUT -* @arg @ref RCC_CRS_SYNCOK -* @arg @ref RCC_CRS_SYNCWARN -* @arg @ref RCC_CRS_SYNCERR -* @arg @ref RCC_CRS_SYNCMISS -* @arg @ref RCC_CRS_TRIMOVF -*/ -uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout) -{ - uint32_t crsstatus = RCC_CRS_NONE; - uint32_t tickstart = 0U; - - /* Get timeout */ - tickstart = HAL_GetTick(); - - /* Wait for CRS flag or timeout detection */ - do - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) - { - crsstatus = RCC_CRS_TIMEOUT; - } - } - /* Check CRS SYNCOK flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK)) - { - /* CRS SYNC event OK */ - crsstatus |= RCC_CRS_SYNCOK; - - /* Clear CRS SYNC event OK bit */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK); - } - - /* Check CRS SYNCWARN flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN)) - { - /* CRS SYNC warning */ - crsstatus |= RCC_CRS_SYNCWARN; - - /* Clear CRS SYNCWARN bit */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN); - } - - /* Check CRS TRIM overflow flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF)) - { - /* CRS SYNC Error */ - crsstatus |= RCC_CRS_TRIMOVF; - - /* Clear CRS Error bit */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF); - } - - /* Check CRS Error flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR)) - { - /* CRS SYNC Error */ - crsstatus |= RCC_CRS_SYNCERR; - - /* Clear CRS Error bit */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR); - } - - /* Check CRS SYNC Missed flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS)) - { - /* CRS SYNC Missed */ - crsstatus |= RCC_CRS_SYNCMISS; - - /* Clear CRS SYNC Missed bit */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS); - } - - /* Check CRS Expected SYNC flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC)) - { - /* frequency error counter reached a zero value */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC); - } - } while(RCC_CRS_NONE == crsstatus); - - return crsstatus; -} - -/** - * @brief Handle the Clock Recovery System interrupt request. - * @retval None - */ -void HAL_RCCEx_CRS_IRQHandler(void) -{ - uint32_t crserror = RCC_CRS_NONE; - /* Get current IT flags and IT sources values */ - uint32_t itflags = READ_REG(CRS->ISR); - uint32_t itsources = READ_REG(CRS->CR); - - /* Check CRS SYNCOK flag */ - if(((itflags & RCC_CRS_FLAG_SYNCOK) != RESET) && ((itsources & RCC_CRS_IT_SYNCOK) != RESET)) - { - /* Clear CRS SYNC event OK flag */ - WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC); - - /* user callback */ - HAL_RCCEx_CRS_SyncOkCallback(); - } - /* Check CRS SYNCWARN flag */ - else if(((itflags & RCC_CRS_FLAG_SYNCWARN) != RESET) && ((itsources & RCC_CRS_IT_SYNCWARN) != RESET)) - { - /* Clear CRS SYNCWARN flag */ - WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC); - - /* user callback */ - HAL_RCCEx_CRS_SyncWarnCallback(); - } - /* Check CRS Expected SYNC flag */ - else if(((itflags & RCC_CRS_FLAG_ESYNC) != RESET) && ((itsources & RCC_CRS_IT_ESYNC) != RESET)) - { - /* frequency error counter reached a zero value */ - WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC); - - /* user callback */ - HAL_RCCEx_CRS_ExpectedSyncCallback(); - } - /* Check CRS Error flags */ - else - { - if(((itflags & RCC_CRS_FLAG_ERR) != RESET) && ((itsources & RCC_CRS_IT_ERR) != RESET)) - { - if((itflags & RCC_CRS_FLAG_SYNCERR) != RESET) - { - crserror |= RCC_CRS_SYNCERR; - } - if((itflags & RCC_CRS_FLAG_SYNCMISS) != RESET) - { - crserror |= RCC_CRS_SYNCMISS; - } - if((itflags & RCC_CRS_FLAG_TRIMOVF) != RESET) - { - crserror |= RCC_CRS_TRIMOVF; - } - - /* Clear CRS Error flags */ - WRITE_REG(CRS->ICR, CRS_ICR_ERRC); - - /* user error callback */ - HAL_RCCEx_CRS_ErrorCallback(crserror); - } - } -} - -/** - * @brief RCCEx Clock Recovery System SYNCOK interrupt callback. - * @retval none - */ -__weak void HAL_RCCEx_CRS_SyncOkCallback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the @ref HAL_RCCEx_CRS_SyncOkCallback should be implemented in the user file - */ -} - -/** - * @brief RCCEx Clock Recovery System SYNCWARN interrupt callback. - * @retval none - */ -__weak void HAL_RCCEx_CRS_SyncWarnCallback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the @ref HAL_RCCEx_CRS_SyncWarnCallback should be implemented in the user file - */ -} - -/** - * @brief RCCEx Clock Recovery System Expected SYNC interrupt callback. - * @retval none - */ -__weak void HAL_RCCEx_CRS_ExpectedSyncCallback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the @ref HAL_RCCEx_CRS_ExpectedSyncCallback should be implemented in the user file - */ -} - -/** - * @brief RCCEx Clock Recovery System Error interrupt callback. - * @param Error Combination of Error status. - * This parameter can be a combination of the following values: - * @arg @ref RCC_CRS_SYNCERR - * @arg @ref RCC_CRS_SYNCMISS - * @arg @ref RCC_CRS_TRIMOVF - * @retval none - */ -__weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(Error); - - /* NOTE : This function should not be modified, when the callback is needed, - the @ref HAL_RCCEx_CRS_ErrorCallback should be implemented in the user file - */ -} - -/** - * @} - */ - -#endif /* CRS */ - -/** - * @} - */ - -/** @addtogroup RCCEx_Private_Functions - * @{ - */ - -/** - * @brief Configure the parameters N & P & optionally M of PLLSAI1 and enable PLLSAI1 output clock(s). - * @param PllSai1 pointer to an RCC_PLLSAI1InitTypeDef structure that - * contains the configuration parameters N & P & optionally M as well as PLLSAI1 output clock(s) - * @param Divider divider parameter to be updated - * - * @note PLLSAI1 is temporary disable to apply new parameters - * - * @retval HAL status - */ -static HAL_StatusTypeDef RCCEx_PLLSAI1_Config(RCC_PLLSAI1InitTypeDef *PllSai1, uint32_t Divider) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */ - /* P, Q and R dividers are verified in each specific divider case below */ - assert_param(IS_RCC_PLLSAI1SOURCE(PllSai1->PLLSAI1Source)); - assert_param(IS_RCC_PLLSAI1M_VALUE(PllSai1->PLLSAI1M)); - assert_param(IS_RCC_PLLSAI1N_VALUE(PllSai1->PLLSAI1N)); - assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PllSai1->PLLSAI1ClockOut)); - - /* Check that PLLSAI1 clock source and divider M can be applied */ - if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_NONE) - { - /* PLL clock source and divider M already set, check that no request for change */ - if((__HAL_RCC_GET_PLL_OSCSOURCE() != PllSai1->PLLSAI1Source) - || - (PllSai1->PLLSAI1Source == RCC_PLLSOURCE_NONE) -#if !defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - || - (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U) != PllSai1->PLLSAI1M) -#endif - ) - { - status = HAL_ERROR; - } - } - else - { - /* Check PLLSAI1 clock source availability */ - switch(PllSai1->PLLSAI1Source) - { - case RCC_PLLSOURCE_MSI: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_MSIRDY)) - { - status = HAL_ERROR; - } - break; - case RCC_PLLSOURCE_HSI: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSIRDY)) - { - status = HAL_ERROR; - } - break; - case RCC_PLLSOURCE_HSE: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSERDY) && HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSEBYP)) - { - status = HAL_ERROR; - } - break; - default: - status = HAL_ERROR; - break; - } - - if(status == HAL_OK) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* Set PLLSAI1 clock source */ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PllSai1->PLLSAI1Source); -#else - /* Set PLLSAI1 clock source and divider M */ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, PllSai1->PLLSAI1Source | (PllSai1->PLLSAI1M - 1U) << RCC_PLLCFGR_PLLM_Pos); -#endif - } - } - - if(status == HAL_OK) - { - /* Disable the PLLSAI1 */ - __HAL_RCC_PLLSAI1_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI1 is ready to be updated */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { - if(Divider == DIVIDER_P_UPDATE) - { - assert_param(IS_RCC_PLLSAI1P_VALUE(PllSai1->PLLSAI1P)); -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - - /* Configure the PLLSAI1 Division factor M, P and Multiplication factor N*/ -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1PDIV | RCC_PLLSAI1CFGR_PLLSAI1M, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (PllSai1->PLLSAI1P << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos) | - ((PllSai1->PLLSAI1M - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)); -#else - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1P | RCC_PLLSAI1CFGR_PLLSAI1M, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - ((PllSai1->PLLSAI1P >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos) | - ((PllSai1->PLLSAI1M - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)); -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -#else - /* Configure the PLLSAI1 Division factor P and Multiplication factor N*/ -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1PDIV, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (PllSai1->PLLSAI1P << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos)); -#else - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1P, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - ((PllSai1->PLLSAI1P >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos)); -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - } - else if(Divider == DIVIDER_Q_UPDATE) - { - assert_param(IS_RCC_PLLSAI1Q_VALUE(PllSai1->PLLSAI1Q)); -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI1 Division factor M, Q and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1Q | RCC_PLLSAI1CFGR_PLLSAI1M, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (((PllSai1->PLLSAI1Q >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | - ((PllSai1->PLLSAI1M - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)); -#else - /* Configure the PLLSAI1 Division factor Q and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1Q, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (((PllSai1->PLLSAI1Q >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos)); -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - } - else - { - assert_param(IS_RCC_PLLSAI1R_VALUE(PllSai1->PLLSAI1R)); -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI1 Division factor M, R and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1R | RCC_PLLSAI1CFGR_PLLSAI1M, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (((PllSai1->PLLSAI1R >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) | - ((PllSai1->PLLSAI1M - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)); -#else - /* Configure the PLLSAI1 Division factor R and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1R, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (((PllSai1->PLLSAI1R >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos)); -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - } - - /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/ - __HAL_RCC_PLLSAI1_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI1 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { - /* Configure the PLLSAI1 Clock output(s) */ - __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PllSai1->PLLSAI1ClockOut); - } - } - } - - return status; -} - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** - * @brief Configure the parameters N & P & optionally M of PLLSAI2 and enable PLLSAI2 output clock(s). - * @param PllSai2 pointer to an RCC_PLLSAI2InitTypeDef structure that - * contains the configuration parameters N & P & optionally M as well as PLLSAI2 output clock(s) - * @param Divider divider parameter to be updated - * - * @note PLLSAI2 is temporary disable to apply new parameters - * - * @retval HAL status - */ -static HAL_StatusTypeDef RCCEx_PLLSAI2_Config(RCC_PLLSAI2InitTypeDef *PllSai2, uint32_t Divider) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* check for PLLSAI2 Parameters used to output PLLSAI2CLK */ - /* P, Q and R dividers are verified in each specific divider case below */ - assert_param(IS_RCC_PLLSAI2SOURCE(PllSai2->PLLSAI2Source)); - assert_param(IS_RCC_PLLSAI2M_VALUE(PllSai2->PLLSAI2M)); - assert_param(IS_RCC_PLLSAI2N_VALUE(PllSai2->PLLSAI2N)); - assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PllSai2->PLLSAI2ClockOut)); - - /* Check that PLLSAI2 clock source and divider M can be applied */ - if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_NONE) - { - /* PLL clock source and divider M already set, check that no request for change */ - if((__HAL_RCC_GET_PLL_OSCSOURCE() != PllSai2->PLLSAI2Source) - || - (PllSai2->PLLSAI2Source == RCC_PLLSOURCE_NONE) -#if !defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - || - (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U) != PllSai2->PLLSAI2M) -#endif - ) - { - status = HAL_ERROR; - } - } - else - { - /* Check PLLSAI2 clock source availability */ - switch(PllSai2->PLLSAI2Source) - { - case RCC_PLLSOURCE_MSI: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_MSIRDY)) - { - status = HAL_ERROR; - } - break; - case RCC_PLLSOURCE_HSI: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSIRDY)) - { - status = HAL_ERROR; - } - break; - case RCC_PLLSOURCE_HSE: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSERDY) && HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSEBYP)) - { - status = HAL_ERROR; - } - break; - default: - status = HAL_ERROR; - break; - } - - if(status == HAL_OK) - { -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* Set PLLSAI2 clock source */ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PllSai2->PLLSAI2Source); -#else - /* Set PLLSAI2 clock source and divider M */ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, PllSai2->PLLSAI2Source | (PllSai2->PLLSAI2M - 1U) << RCC_PLLCFGR_PLLM_Pos); -#endif - } - } - - if(status == HAL_OK) - { - /* Disable the PLLSAI2 */ - __HAL_RCC_PLLSAI2_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready to be updated */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { - if(Divider == DIVIDER_P_UPDATE) - { - assert_param(IS_RCC_PLLSAI2P_VALUE(PllSai2->PLLSAI2P)); -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - - /* Configure the PLLSAI2 Division factor M, P and Multiplication factor N*/ -#if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2PDIV | RCC_PLLSAI2CFGR_PLLSAI2M, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (PllSai2->PLLSAI2P << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos) | - ((PllSai2->PLLSAI2M - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)); -#else - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2P | RCC_PLLSAI2CFGR_PLLSAI2M, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - ((PllSai2->PLLSAI2P >> 4U) << RCC_PLLSAI2CFGR_PLLSAI2P_Pos) | - ((PllSai2->PLLSAI2M - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)); -#endif /* RCC_PLLSAI2P_DIV_2_31_SUPPORT */ - -#else - /* Configure the PLLSAI2 Division factor P and Multiplication factor N*/ -#if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2PDIV, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (PllSai2->PLLSAI2P << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos)); -#else - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2P, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - ((PllSai2->PLLSAI2P >> 4U) << RCC_PLLSAI2CFGR_PLLSAI2P_Pos)); -#endif /* RCC_PLLSAI2P_DIV_2_31_SUPPORT */ - -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - } -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - else if(Divider == DIVIDER_Q_UPDATE) - { - assert_param(IS_RCC_PLLSAI2Q_VALUE(PllSai2->PLLSAI2Q)); -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI2 Division factor M, Q and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2Q | RCC_PLLSAI2CFGR_PLLSAI2M, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (((PllSai2->PLLSAI2Q >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2Q_Pos) | - ((PllSai2->PLLSAI2M - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)); -#else - /* Configure the PLLSAI2 Division factor Q and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2Q, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (((PllSai2->PLLSAI2Q >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2Q_Pos)); -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - } -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ - else - { - assert_param(IS_RCC_PLLSAI2R_VALUE(PllSai2->PLLSAI2R)); -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI2 Division factor M, R and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2R | RCC_PLLSAI2CFGR_PLLSAI2M, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (((PllSai2->PLLSAI2R >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | - ((PllSai2->PLLSAI2M - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)); -#else - /* Configure the PLLSAI2 Division factor R and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2R, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (((PllSai2->PLLSAI2R >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos)); -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - } - - /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/ - __HAL_RCC_PLLSAI2_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { - /* Configure the PLLSAI2 Clock output(s) */ - __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PllSai2->PLLSAI2ClockOut); - } - } - } - - return status; -} - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_RCC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c deleted file mode 100644 index b5df2809..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c +++ /dev/null @@ -1,527 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rng.c - * @author MCD Application Team - * @brief RNG HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Random Number Generator (RNG) peripheral: - * + Initialization/de-initialization functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The RNG HAL driver can be used as follows: - - (#) Enable the RNG controller clock using __HAL_RCC_RNG_CLK_ENABLE() macro - in HAL_RNG_MspInit(). - (#) Activate the RNG peripheral using HAL_RNG_Init() function. - (#) Wait until the 32-bit Random Number Generator contains a valid - random data using (polling/interrupt) mode. - (#) Get the 32 bit random number using HAL_RNG_GenerateRandomNumber() function. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RNG RNG - * @brief RNG HAL module driver. - * @{ - */ - -#ifdef HAL_RNG_MODULE_ENABLED - - - -/* Private types -------------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/** @defgroup RNG_Private_Constants RNG_Private_Constants - * @{ - */ -#define RNG_TIMEOUT_VALUE 2 -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup RNG_Exported_Functions - * @{ - */ - -/** @addtogroup RNG_Exported_Functions_Group1 - * @brief Initialization and de-initialization functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Initialize the RNG according to the specified parameters - in the RNG_InitTypeDef and create the associated handle - (+) DeInitialize the RNG peripheral - (+) Initialize the RNG MSP (MCU Specific Package) - (+) DeInitialize the RNG MSP - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the RNG peripheral and initialize the associated handle. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng) -{ - /* Check the RNG handle allocation */ - if(hrng == NULL) - { - return HAL_ERROR; - } - - assert_param(IS_RNG_ALL_INSTANCE(hrng->Instance)); -#if defined(RNG_CR_CED) - assert_param(IS_RNG_CED(hrng->Init.ClockErrorDetection)); -#endif /* defined(RNG_CR_CED) */ - - if(hrng->State == HAL_RNG_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hrng->Lock = HAL_UNLOCKED; - - /* Init the low level hardware */ - HAL_RNG_MspInit(hrng); - } - - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - -#if defined(RNG_CR_CED) - /* Clock Error Detection configuration */ - MODIFY_REG(hrng->Instance->CR, RNG_CR_CED, hrng->Init.ClockErrorDetection); -#endif /* defined(RNG_CR_CED) */ - - /* Enable the RNG Peripheral */ - __HAL_RNG_ENABLE(hrng); - - /* Initialize the RNG state */ - hrng->State = HAL_RNG_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief DeInitialize the RNG peripheral. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RNG_DeInit(RNG_HandleTypeDef *hrng) -{ - /* Check the RNG handle allocation */ - if(hrng == NULL) - { - return HAL_ERROR; - } - -#if defined(RNG_CR_CED) - /* Clear Clock Error Detection bit */ - CLEAR_BIT(hrng->Instance->CR, RNG_CR_CED); -#endif /* defined(RNG_CR_CED) */ - - /* Disable the RNG Peripheral */ - CLEAR_BIT(hrng->Instance->CR, RNG_CR_IE | RNG_CR_RNGEN); - - /* Clear RNG interrupt status flags */ - CLEAR_BIT(hrng->Instance->SR, RNG_SR_CEIS | RNG_SR_SEIS); - - /* DeInit the low level hardware */ - HAL_RNG_MspDeInit(hrng); - - /* Update the RNG state */ - hrng->State = HAL_RNG_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hrng); - - /* Return the function status */ - return HAL_OK; -} - -/** - * @brief Initialize the RNG MSP. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - */ -__weak void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrng); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_MspInit must be implemented in the user file. - */ -} - -/** - * @brief DeInitialize the RNG MSP. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - */ -__weak void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrng); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_MspDeInit must be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @addtogroup RNG_Exported_Functions_Group2 - * @brief Management functions. - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Get the 32 bit Random number - (+) Get the 32 bit Random number with interrupt enabled - (+) Handle RNG interrupt request - -@endverbatim - * @{ - */ - -/** - * @brief Generate a 32-bit random number. - * @note Each time the random number data is read the RNG_FLAG_DRDY flag - * is automatically cleared. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @param random32bit: pointer to generated random number variable if successful. - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit) -{ - uint32_t tickstart = 0; - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(hrng); - - /* Check RNS peripheral state */ - if(hrng->State == HAL_RNG_STATE_READY) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Check if data register contains valid random data */ - while(__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET) - { - if((HAL_GetTick() - tickstart ) > RNG_TIMEOUT_VALUE) - { - hrng->State = HAL_RNG_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - return HAL_TIMEOUT; - } - } - - /* Get a 32bit Random number */ - hrng->RandomNumber = hrng->Instance->DR; - *random32bit = hrng->RandomNumber; - - hrng->State = HAL_RNG_STATE_READY; - } - else - { - status = HAL_ERROR; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - return status; -} - -/** - * @brief Generate a 32-bit random number in interrupt mode. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(hrng); - - /* Check RNG peripheral state */ - if(hrng->State == HAL_RNG_STATE_READY) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - /* Enable the RNG Interrupts: Data Ready, Clock error, Seed error */ - __HAL_RNG_ENABLE_IT(hrng); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - status = HAL_ERROR; - } - - return status; -} - -/** - * @brief Handle RNG interrupt request. - * @note In the case of a clock error, the RNG is no more able to generate - * random numbers because the PLL48CLK clock is not correct. User has - * to check that the clock controller is correctly configured to provide - * the RNG clock and clear the CEIS bit using __HAL_RNG_CLEAR_IT(). - * The clock error has no impact on the previously generated - * random numbers, and the RNG_DR register contents can be used. - * @note In the case of a seed error, the generation of random numbers is - * interrupted as long as the SECS bit is '1'. If a number is - * available in the RNG_DR register, it must not be used because it may - * not have enough entropy. In this case, it is recommended to clear the - * SEIS bit using __HAL_RNG_CLEAR_IT(), then disable and enable - * the RNG peripheral to reinitialize and restart the RNG. - * @note User-written HAL_RNG_ErrorCallback() API is called once whether SEIS - * or CEIS are set. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - - */ -void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng) -{ - /* RNG clock error interrupt occurred */ - if((__HAL_RNG_GET_IT(hrng, RNG_IT_CEI) != RESET) || (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_ERROR; - - HAL_RNG_ErrorCallback(hrng); - - /* Clear the clock error flag */ - __HAL_RNG_CLEAR_IT(hrng, RNG_IT_CEI|RNG_IT_SEI); - - } - - /* Check RNG data ready interrupt occurred */ - if(__HAL_RNG_GET_IT(hrng, RNG_IT_DRDY) != RESET) - { - /* Generate random number once, so disable the IT */ - __HAL_RNG_DISABLE_IT(hrng); - - /* Get the 32bit Random number (DRDY flag automatically cleared) */ - hrng->RandomNumber = hrng->Instance->DR; - - if(hrng->State != HAL_RNG_STATE_ERROR) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_READY; - - /* Data Ready callback */ - HAL_RNG_ReadyDataCallback(hrng, hrng->RandomNumber); - } - } -} - -/** - * @brief Return generated random number in polling mode (Obsolete). - * @note Use HAL_RNG_GenerateRandomNumber() API instead. - * @param hrng: pointer to a RNG_HandleTypeDef structure that contains - * the configuration information for RNG. - * @retval random value - */ -uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng) -{ - if(HAL_RNG_GenerateRandomNumber(hrng, &(hrng->RandomNumber)) == HAL_OK) - { - return hrng->RandomNumber; - } - else - { - return 0; - } -} - - -/** - * @brief Return a 32-bit random number with interrupt enabled (Obsolete). - * @note Use HAL_RNG_GenerateRandomNumber_IT() API instead. - * @param hrng: RNG handle - * @retval 32-bit random number - */ -uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng) -{ - uint32_t random32bit = 0; - - /* Process locked */ - __HAL_LOCK(hrng); - - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - - /* Get a 32bit Random number */ - random32bit = hrng->Instance->DR; - - /* Enable the RNG Interrupts: Data Ready, Clock error, Seed error */ - __HAL_RNG_ENABLE_IT(hrng); - - /* Return the 32 bit random number */ - return random32bit; -} - - - -/** - * @brief Read latest generated random number. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval random value - */ -uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng) -{ - return(hrng->RandomNumber); -} - -/** - * @brief Data Ready callback in non-blocking mode. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @param random32bit: generated random value - * @retval None - */ -__weak void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef *hrng, uint32_t random32bit) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrng); - UNUSED(random32bit); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_ReadyDataCallback must be implemented in the user file. - */ -} - -/** - * @brief RNG error callback. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - */ -__weak void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrng); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_ErrorCallback must be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @addtogroup RNG_Exported_Functions_Group3 - * @brief Peripheral State functions. - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Return the RNG handle state. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL state - */ -HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng) -{ - /* Return RNG handle state */ - return hrng->State; -} - -/** - * @} - */ - -/** - * @} - */ - - -#endif /* HAL_RNG_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c deleted file mode 100644 index eb08d776..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c +++ /dev/null @@ -1,1539 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rtc.c - * @author MCD Application Team - * @brief RTC HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Real-Time Clock (RTC) peripheral: - * + Initialization - * + Calendar (Time and Date) configuration - * + Alarms (Alarm A and Alarm B) configuration - * + WakeUp Timer configuration - * + TimeStamp configuration - * + Tampers configuration - * + Backup Data Registers configuration - * + RTC Tamper and TimeStamp Pins Selection - * + Interrupts and flags management - * - @verbatim - =============================================================================== - ##### RTC Operating Condition ##### - =============================================================================== - [..] The real-time clock (RTC) and the RTC backup registers can be powered - from the VBAT voltage when the main VDD supply is powered off. - To retain the content of the RTC backup registers and supply the RTC - when VDD is turned off, VBAT pin can be connected to an optional - standby voltage supplied by a battery or by another source. - - ##### Backup Domain Reset ##### - =============================================================================== - [..] The backup domain reset sets all RTC registers and the RCC_BDCR register - to their reset values. - A backup domain reset is generated when one of the following events occurs: - (#) Software reset, triggered by setting the BDRST bit in the - RCC Backup domain control register (RCC_BDCR). - (#) VDD or VBAT power on, if both supplies have previously been powered off. - (#) Tamper detection event resets all data backup registers. - - ##### Backup Domain Access ##### - =================================================================== - [..] After reset, the backup domain (RTC registers, RTC backup data - registers and backup SRAM) is protected against possible unwanted write - accesses. - - [..] To enable access to the RTC Domain and RTC registers, proceed as follows: - (#) Call the function HAL_RCCEx_PeriphCLKConfig with RCC_PERIPHCLK_RTC for - PeriphClockSelection and select RTCClockSelection (LSE, LSI or HSEdiv32) - (#) Enable RTC Clock using the __HAL_RCC_RTC_ENABLE() macro. - - ##### How to use RTC Driver ##### - =================================================================== - [..] - (#) Enable the RTC domain access (see description in the section above). - (#) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour - format using the HAL_RTC_Init() function. - - *** Time and Date configuration *** - =================================== - [..] - (#) To configure the RTC Calendar (Time and Date) use the HAL_RTC_SetTime() - and HAL_RTC_SetDate() functions. - (#) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate() functions. - - *** Alarm configuration *** - =========================== - [..] - (#) To configure the RTC Alarm use the HAL_RTC_SetAlarm() function. - You can also configure the RTC Alarm with interrupt mode using the - HAL_RTC_SetAlarm_IT() function. - (#) To read the RTC Alarm, use the HAL_RTC_GetAlarm() function. - - ##### RTC and low power modes ##### - =================================================================== - [..] The MCU can be woken up from a low power mode by an RTC alternate - function. - [..] The RTC alternate functions are the RTC alarms (Alarm A and Alarm B), - RTC wakeup, RTC tamper event detection and RTC time stamp event detection. - These RTC alternate functions can wake up the system from the Stop and - Standby low power modes. - [..] The system can also wake up from low power modes without depending - on an external interrupt (Auto-wakeup mode), by using the RTC alarm - or the RTC wakeup events. - [..] The RTC provides a programmable time base for waking up from the - Stop or Standby mode at regular intervals. - Wakeup from STOP and Standby modes is possible only when the RTC clock source - is LSE or LSI. - - @endverbatim - - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RTC RTC - * @brief RTC HAL module driver - * @{ - */ - -#ifdef HAL_RTC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup RTC_Exported_Functions RTC Exported Functions - * @{ - */ - -/** @defgroup RTC_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provide functions allowing to initialize and configure the - RTC Prescaler (Synchronous and Asynchronous), RTC Hour format, disable - RTC registers Write protection, enter and exit the RTC initialization mode, - RTC registers synchronization check and reference clock detection enable. - (#) The RTC Prescaler is programmed to generate the RTC 1Hz time base. - It is split into 2 programmable prescalers to minimize power consumption. - (++) A 7-bit asynchronous prescaler and a 15-bit synchronous prescaler. - (++) When both prescalers are used, it is recommended to configure the - asynchronous prescaler to a high value to minimize power consumption. - (#) All RTC registers are Write protected. Writing to the RTC registers - is enabled by writing a key into the Write Protection register, RTC_WPR. - (#) To configure the RTC Calendar, user application should enter - initialization mode. In this mode, the calendar counter is stopped - and its value can be updated. When the initialization sequence is - complete, the calendar restarts counting after 4 RTCCLK cycles. - (#) To read the calendar through the shadow registers after Calendar - initialization, calendar update or after wakeup from low power modes - the software must first clear the RSF flag. The software must then - wait until it is set again before reading the calendar, which means - that the calendar registers have been correctly copied into the - RTC_TR and RTC_DR shadow registers. The HAL_RTC_WaitForSynchro() function - implements the above software sequence (RSF clear and RSF check). - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the RTC according to the specified parameters - * in the RTC_InitTypeDef structure and initialize the associated handle. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) -{ - /* Check the RTC peripheral state */ - if(hrtc == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); - assert_param(IS_RTC_HOUR_FORMAT(hrtc->Init.HourFormat)); - assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv)); - assert_param(IS_RTC_SYNCH_PREDIV(hrtc->Init.SynchPrediv)); - assert_param(IS_RTC_OUTPUT(hrtc->Init.OutPut)); - assert_param(IS_RTC_OUTPUT_REMAP(hrtc->Init.OutPutRemap)); - assert_param(IS_RTC_OUTPUT_POL(hrtc->Init.OutPutPolarity)); - assert_param(IS_RTC_OUTPUT_TYPE(hrtc->Init.OutPutType)); - - if(hrtc->State == HAL_RTC_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hrtc->Lock = HAL_UNLOCKED; - - /* Initialize RTC MSP */ - HAL_RTC_MspInit(hrtc); - } - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } - else - { - /* Clear RTC_CR FMT, OSEL and POL Bits */ - hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL)); - /* Set RTC_CR register */ - hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity); - - /* Configure the RTC PRER */ - hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv); - hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16); - - /* Exit Initialization mode */ - hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); - - /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) - { - if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } - } - - hrtc->Instance->OR &= (uint32_t)~(RTC_OR_ALARMOUTTYPE | RTC_OR_OUT_RMP); - hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType | hrtc->Init.OutPutRemap); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; - } -} - -/** - * @brief DeInitialize the RTC peripheral. - * @param hrtc: RTC handle - * @note This function doesn't reset the RTC Backup Data registers. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } - else - { - /* Reset TR, DR and CR registers */ - hrtc->Instance->TR = (uint32_t)0x00000000; - hrtc->Instance->DR = ((uint32_t)(RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0)); - /* Reset All CR bits except CR[2:0] */ - hrtc->Instance->CR &= RTC_CR_WUCKSEL; - - tickstart = HAL_GetTick(); - - /* Wait till WUTWF flag is set and if Time out is reached exit */ - while(((hrtc->Instance->ISR) & RTC_ISR_WUTWF) == (uint32_t)RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - return HAL_TIMEOUT; - } - } - - /* Reset all RTC CR register bits */ - hrtc->Instance->CR &= (uint32_t)0x00000000; - hrtc->Instance->WUTR = RTC_WUTR_WUT; - hrtc->Instance->PRER = ((uint32_t)(RTC_PRER_PREDIV_A | 0x000000FF)); - hrtc->Instance->ALRMAR = (uint32_t)0x00000000; - hrtc->Instance->ALRMBR = (uint32_t)0x00000000; - hrtc->Instance->SHIFTR = (uint32_t)0x00000000; - hrtc->Instance->CALR = (uint32_t)0x00000000; - hrtc->Instance->ALRMASSR = (uint32_t)0x00000000; - hrtc->Instance->ALRMBSSR = (uint32_t)0x00000000; - - /* Reset ISR register and exit initialization mode */ - hrtc->Instance->ISR = (uint32_t)0x00000000; - - /* Reset Tamper configuration register */ - hrtc->Instance->TAMPCR = 0x00000000; - - /* Reset Option register */ - hrtc->Instance->OR = 0x00000000; - - /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) - { - if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } - } - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* De-Initialize RTC MSP */ - HAL_RTC_MspDeInit(hrtc); - - hrtc->State = HAL_RTC_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Initialize the RTC MSP. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTC_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the RTC MSP. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTC_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup RTC_Exported_Functions_Group2 RTC Time and Date functions - * @brief RTC Time and Date functions - * -@verbatim - =============================================================================== - ##### RTC Time and Date functions ##### - =============================================================================== - - [..] This section provides functions allowing to configure Time and Date features - -@endverbatim - * @{ - */ - -/** - * @brief Set RTC current time. - * @param hrtc: RTC handle - * @param sTime: Pointer to Time structure - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving)); - assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - if(Format == RTC_FORMAT_BIN) - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - assert_param(IS_RTC_HOUR12(sTime->Hours)); - assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); - } - else - { - sTime->TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(sTime->Hours)); - } - assert_param(IS_RTC_MINUTES(sTime->Minutes)); - assert_param(IS_RTC_SECONDS(sTime->Seconds)); - - tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8) | \ - ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \ - (((uint32_t)sTime->TimeFormat) << 16)); - } - else - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - tmpreg = RTC_Bcd2ToByte(sTime->Hours); - assert_param(IS_RTC_HOUR12(tmpreg)); - assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); - } - else - { - sTime->TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours))); - } - assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes))); - assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds))); - tmpreg = (((uint32_t)(sTime->Hours) << 16) | \ - ((uint32_t)(sTime->Minutes) << 8) | \ - ((uint32_t)sTime->Seconds) | \ - ((uint32_t)(sTime->TimeFormat) << 16)); - } - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - else - { - /* Set the RTC_TR register */ - hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK); - - /* Clear the bits to be configured */ - hrtc->Instance->CR &= ((uint32_t)~RTC_CR_BCK); - - /* Configure the RTC_CR register */ - hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation); - - /* Exit Initialization mode */ - hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); - - /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) - { - if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - __HAL_UNLOCK(hrtc); - - return HAL_OK; - } -} - -/** - * @brief Get RTC current time. - * @param hrtc: RTC handle - * @param sTime: Pointer to Time structure with Hours, Minutes and Seconds fields returned - * with input format (BIN or BCD), also SubSeconds field returning the - * RTC_SSR register content and SecondFraction field the Synchronous pre-scaler - * factor to be used for second fraction ratio computation. - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @note You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds - * value in second fraction ratio with time unit following generic formula: - * Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit - * This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS - * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values - * in the higher-order calendar shadow registers to ensure consistency between the time and date values. - * Reading RTC current time locks the values in calendar shadow registers until Current date is read - * to ensure consistency between the time and date values. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - - /* Get subseconds structure field from the corresponding register*/ - sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR); - - /* Get SecondFraction structure field from the corresponding register field*/ - sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S); - - /* Get the TR register */ - tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK); - - /* Fill the structure fields with the read parameters */ - sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16); - sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >>8); - sTime->Seconds = (uint8_t)(tmpreg & (RTC_TR_ST | RTC_TR_SU)); - sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16); - - /* Check the input parameters format */ - if(Format == RTC_FORMAT_BIN) - { - /* Convert the time structure parameters to Binary format */ - sTime->Hours = (uint8_t)RTC_Bcd2ToByte(sTime->Hours); - sTime->Minutes = (uint8_t)RTC_Bcd2ToByte(sTime->Minutes); - sTime->Seconds = (uint8_t)RTC_Bcd2ToByte(sTime->Seconds); - } - - return HAL_OK; -} - -/** - * @brief Set RTC current date. - * @param hrtc: RTC handle - * @param sDate: Pointer to date structure - * @param Format: specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format) -{ - uint32_t datetmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U)) - { - sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU); - } - - assert_param(IS_RTC_WEEKDAY(sDate->WeekDay)); - - if(Format == RTC_FORMAT_BIN) - { - assert_param(IS_RTC_YEAR(sDate->Year)); - assert_param(IS_RTC_MONTH(sDate->Month)); - assert_param(IS_RTC_DATE(sDate->Date)); - - datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8) | \ - ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \ - ((uint32_t)sDate->WeekDay << 13)); - } - else - { - assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year))); - datetmpreg = RTC_Bcd2ToByte(sDate->Month); - assert_param(IS_RTC_MONTH(datetmpreg)); - datetmpreg = RTC_Bcd2ToByte(sDate->Date); - assert_param(IS_RTC_DATE(datetmpreg)); - - datetmpreg = ((((uint32_t)sDate->Year) << 16) | \ - (((uint32_t)sDate->Month) << 8) | \ - ((uint32_t)sDate->Date) | \ - (((uint32_t)sDate->WeekDay) << 13)); - } - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state*/ - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - else - { - /* Set the RTC_DR register */ - hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK); - - /* Exit Initialization mode */ - hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); - - /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) - { - if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY ; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; - } -} - -/** - * @brief Get RTC current date. - * @param hrtc: RTC handle - * @param sDate: Pointer to Date structure - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values - * in the higher-order calendar shadow registers to ensure consistency between the time and date values. - * Reading RTC current time locks the values in calendar shadow registers until Current date is read. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format) -{ - uint32_t datetmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - - /* Get the DR register */ - datetmpreg = (uint32_t)(hrtc->Instance->DR & RTC_DR_RESERVED_MASK); - - /* Fill the structure fields with the read parameters */ - sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> 16); - sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT | RTC_DR_MU)) >> 8); - sDate->Date = (uint8_t)(datetmpreg & (RTC_DR_DT | RTC_DR_DU)); - sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> 13); - - /* Check the input parameters format */ - if(Format == RTC_FORMAT_BIN) - { - /* Convert the date structure parameters to Binary format */ - sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year); - sDate->Month = (uint8_t)RTC_Bcd2ToByte(sDate->Month); - sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date); - } - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup RTC_Exported_Functions_Group3 RTC Alarm functions - * @brief RTC Alarm functions - * -@verbatim - =============================================================================== - ##### RTC Alarm functions ##### - =============================================================================== - - [..] This section provides functions allowing to configure Alarm feature - -@endverbatim - * @{ - */ -/** - * @brief Set the specified RTC Alarm. - * @param hrtc: RTC handle - * @param sAlarm: Pointer to Alarm structure - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format) -{ - uint32_t tickstart = 0; - uint32_t tmpreg = 0, subsecondtmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - assert_param(IS_RTC_ALARM(sAlarm->Alarm)); - assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask)); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel)); - assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds)); - assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - if(Format == RTC_FORMAT_BIN) - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours)); - assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); - } - else - { - sAlarm->AlarmTime.TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours)); - } - assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes)); - assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds)); - - if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) - { - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay)); - } - else - { - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay)); - } - - tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24) | \ - ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ - ((uint32_t)sAlarm->AlarmMask)); - } - else - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); - assert_param(IS_RTC_HOUR12(tmpreg)); - assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); - } - else - { - sAlarm->AlarmTime.TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours))); - } - - assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes))); - assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds))); - - if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg)); - } - else - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg)); - } - - tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \ - ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8) | \ - ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \ - ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24) | \ - ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ - ((uint32_t)sAlarm->AlarmMask)); - } - - /* Configure the Alarm A or Alarm B Sub Second registers */ - subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask)); - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the Alarm register */ - if(sAlarm->Alarm == RTC_ALARM_A) - { - /* Disable the Alarm A interrupt */ - __HAL_RTC_ALARMA_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); - - tickstart = HAL_GetTick(); - /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Sub Second register */ - hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ - __HAL_RTC_ALARMA_ENABLE(hrtc); - } - else - { - /* Disable the Alarm B interrupt */ - __HAL_RTC_ALARMB_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB); - - tickstart = HAL_GetTick(); - /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - hrtc->Instance->ALRMBR = (uint32_t)tmpreg; - /* Configure the Alarm B Sub Second register */ - hrtc->Instance->ALRMBSSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ - __HAL_RTC_ALARMB_ENABLE(hrtc); - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Set the specified RTC Alarm with Interrupt. - * @param hrtc: RTC handle - * @param sAlarm: Pointer to Alarm structure - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @note The Alarm register can only be written when the corresponding Alarm - * is disabled (Use the HAL_RTC_DeactivateAlarm()). - * @note The HAL_RTC_SetTime() must be called before enabling the Alarm feature. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format) -{ - uint32_t tickstart = 0; - uint32_t tmpreg = 0, subsecondtmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - assert_param(IS_RTC_ALARM(sAlarm->Alarm)); - assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask)); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel)); - assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds)); - assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - if(Format == RTC_FORMAT_BIN) - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours)); - assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); - } - else - { - sAlarm->AlarmTime.TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours)); - } - assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes)); - assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds)); - - if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) - { - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay)); - } - else - { - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay)); - } - tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24) | \ - ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ - ((uint32_t)sAlarm->AlarmMask)); - } - else - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); - assert_param(IS_RTC_HOUR12(tmpreg)); - assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); - } - else - { - sAlarm->AlarmTime.TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours))); - } - - assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes))); - assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds))); - - if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg)); - } - else - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg)); - } - tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \ - ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8) | \ - ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \ - ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24) | \ - ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ - ((uint32_t)sAlarm->AlarmMask)); - } - /* Configure the Alarm A or Alarm B Sub Second registers */ - subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask)); - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the Alarm register */ - if(sAlarm->Alarm == RTC_ALARM_A) - { - /* Disable the Alarm A interrupt */ - __HAL_RTC_ALARMA_DISABLE(hrtc); - - /* Clear flag alarm A */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); - - tickstart = HAL_GetTick(); - /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Sub Second register */ - hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ - __HAL_RTC_ALARMA_ENABLE(hrtc); - /* Configure the Alarm interrupt */ - __HAL_RTC_ALARM_ENABLE_IT(hrtc,RTC_IT_ALRA); - } - else - { - /* Disable the Alarm B interrupt */ - __HAL_RTC_ALARMB_DISABLE(hrtc); - - /* Clear flag alarm B */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); - - tickstart = HAL_GetTick(); - /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - hrtc->Instance->ALRMBR = (uint32_t)tmpreg; - /* Configure the Alarm B Sub Second register */ - hrtc->Instance->ALRMBSSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ - __HAL_RTC_ALARMB_ENABLE(hrtc); - /* Configure the Alarm interrupt */ - __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB); - } - - /* RTC Alarm Interrupt Configuration: EXTI configuration */ - __HAL_RTC_ALARM_EXTI_ENABLE_IT(); - - __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate the specified RTC Alarm. - * @param hrtc: RTC handle - * @param Alarm: Specifies the Alarm. - * This parameter can be one of the following values: - * @arg RTC_ALARM_A: AlarmA - * @arg RTC_ALARM_B: AlarmB - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_ALARM(Alarm)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - if(Alarm == RTC_ALARM_A) - { - /* AlarmA */ - __HAL_RTC_ALARMA_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); - - tickstart = HAL_GetTick(); - - /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) - { - if( (HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - } - else - { - /* AlarmB */ - __HAL_RTC_ALARMB_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_ALARM_DISABLE_IT(hrtc,RTC_IT_ALRB); - - tickstart = HAL_GetTick(); - - /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - } - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Get the RTC Alarm value and masks. - * @param hrtc: RTC handle - * @param sAlarm: Pointer to Date structure - * @param Alarm: Specifies the Alarm. - * This parameter can be one of the following values: - * @arg RTC_ALARM_A: AlarmA - * @arg RTC_ALARM_B: AlarmB - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format) -{ - uint32_t tmpreg = 0, subsecondtmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - assert_param(IS_RTC_ALARM(Alarm)); - - if(Alarm == RTC_ALARM_A) - { - /* AlarmA */ - sAlarm->Alarm = RTC_ALARM_A; - - tmpreg = (uint32_t)(hrtc->Instance->ALRMAR); - subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMASSR ) & RTC_ALRMASSR_SS); - } - else - { - sAlarm->Alarm = RTC_ALARM_B; - - tmpreg = (uint32_t)(hrtc->Instance->ALRMBR); - subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMBSSR) & RTC_ALRMBSSR_SS); - } - - /* Fill the structure with the read parameters */ - /* ALRMAR/ALRMBR registers have same mapping) */ - sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> 16); - sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU)) >> 8); - sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST | RTC_ALRMAR_SU)); - sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16); - sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg; - sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> 24); - sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL); - sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL); - - if(Format == RTC_FORMAT_BIN) - { - sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); - sAlarm->AlarmTime.Minutes = RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes); - sAlarm->AlarmTime.Seconds = RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds); - sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); - } - - return HAL_OK; -} - -/** - * @brief Handle Alarm interrupt request. - * @param hrtc: RTC handle - * @retval None - */ -void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef* hrtc) -{ - /* Clear the EXTI's line Flag for RTC Alarm */ - __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); - - /* As alarms are sharing the same EXTI line, exit when no more pending Alarm event */ - while(((__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRA) != RESET) && (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) != RESET)) || - ((__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRB) != RESET) && (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) != RESET))) - { - /* Get the AlarmA interrupt source enable status and pending flag status*/ - if((__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRA) != RESET) && (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) != RESET)) - { - /* Clear the AlarmA interrupt pending bit */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); - - /* AlarmA callback */ - HAL_RTC_AlarmAEventCallback(hrtc); - } - - /* Get the AlarmB interrupt source enable status and pending flag status*/ - if((__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRB) != RESET) && (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) != RESET)) - { - /* Clear the AlarmB interrupt pending bit */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); - - /* AlarmB callback */ - HAL_RTCEx_AlarmBEventCallback(hrtc); - } - } - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; -} - -/** - * @brief Alarm A callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTC_AlarmAEventCallback could be implemented in the user file - */ -} - -/** - * @brief Handle AlarmA Polling request. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - - uint32_t tickstart = HAL_GetTick(); - - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Clear the Alarm interrupt pending bit */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup RTC_Exported_Functions_Group4 Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides functions allowing to - (+) Wait for RTC Time and Date Synchronization - -@endverbatim - * @{ - */ - -/** - * @brief Wait until the RTC Time and Date registers (RTC_TR and RTC_DR) are - * synchronized with RTC APB clock. - * @note The RTC Resynchronization mode is write protected, use the - * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function. - * @note To read the calendar through the shadow registers after Calendar - * initialization, calendar update or after wakeup from low power modes - * the software must first clear the RSF flag. - * The software must then wait until it is set again before reading - * the calendar, which means that the calendar registers have been - * correctly copied into the RTC_TR and RTC_DR shadow registers. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc) -{ - uint32_t tickstart = 0; - - /* Clear RSF flag */ - hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK; - - tickstart = HAL_GetTick(); - - /* Wait the registers to be synchronised */ - while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup RTC_Exported_Functions_Group5 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection provides functions allowing to - (+) Get RTC state - -@endverbatim - * @{ - */ -/** - * @brief Return the RTC handle state. - * @param hrtc: RTC handle - * @retval HAL state - */ -HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef* hrtc) -{ - /* Return RTC handle state */ - return hrtc->State; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup RTC_Private_Functions RTC Private functions - * @{ - */ -/** - * @brief Enter the RTC Initialization mode. - * @note The RTC Initialization mode is write protected, use the - * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc) -{ - uint32_t tickstart = 0; - - /* Check if the Initialization mode is set */ - if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET) - { - /* Set the Initialization mode */ - hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK; - - tickstart = HAL_GetTick(); - /* Wait till RTC is in INIT state and if Time out is reached exit */ - while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - - return HAL_OK; -} - - -/** - * @brief Convert a 2 digit decimal to BCD format. - * @param Value: Byte to be converted - * @retval Converted byte - */ -uint8_t RTC_ByteToBcd2(uint8_t Value) -{ - uint32_t bcdhigh = 0; - - while(Value >= 10) - { - bcdhigh++; - Value -= 10; - } - - return ((uint8_t)(bcdhigh << 4) | Value); -} - -/** - * @brief Convert from 2 digit BCD to Binary. - * @param Value: BCD value to be converted - * @retval Converted word - */ -uint8_t RTC_Bcd2ToByte(uint8_t Value) -{ - uint32_t tmp = 0; - tmp = ((uint8_t)(Value & (uint8_t)0xF0) >> (uint8_t)0x4) * 10; - return (tmp + (Value & (uint8_t)0x0F)); -} - -/** - * @} - */ - -#endif /* HAL_RTC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c deleted file mode 100644 index 35be397e..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c +++ /dev/null @@ -1,1875 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rtc_ex.c - * @author MCD Application Team - * @brief Extended RTC HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Real Time Clock (RTC) Extended peripheral: - * + RTC Time Stamp functions - * + RTC Tamper functions - * + RTC Wake-up functions - * + Extended Control functions - * + Extended RTC features functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - (+) Enable the RTC domain access. - (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour - format using the HAL_RTC_Init() function. - - *** RTC Wakeup configuration *** - ================================ - [..] - (+) To configure the RTC Wakeup Clock source and Counter use the HAL_RTCEx_SetWakeUpTimer() - function. You can also configure the RTC Wakeup timer with interrupt mode - using the HAL_RTCEx_SetWakeUpTimer_IT() function. - (+) To read the RTC WakeUp Counter register, use the HAL_RTCEx_GetWakeUpTimer() - function. - - *** Outputs configuration *** - ============================= - [..] The RTC has 2 different outputs: - (+) RTC_ALARM: this output is used to manage the RTC Alarm A, Alarm B - and WaKeUp signals. - To output the selected RTC signal, use the HAL_RTC_Init() function. - (+) RTC_CALIB: this output is 512Hz signal or 1Hz. - To enable the RTC_CALIB, use the HAL_RTCEx_SetCalibrationOutPut() function. - (+) Two pins can be used as RTC_ALARM or RTC_CALIB (PC13, PB2) managed on - the RTC_OR register. - (+) When the RTC_CALIB or RTC_ALARM output is selected, the RTC_OUT pin is - automatically configured in output alternate function. - - *** Smooth digital Calibration configuration *** - ================================================ - [..] - (+) Configure the RTC Original Digital Calibration Value and the corresponding - calibration cycle period (32s,16s and 8s) using the HAL_RTCEx_SetSmoothCalib() - function. - - *** TimeStamp configuration *** - =============================== - [..] - (+) Enable the RTC TimeStamp using the HAL_RTCEx_SetTimeStamp() function. - You can also configure the RTC TimeStamp with interrupt mode using the - HAL_RTCEx_SetTimeStamp_IT() function. - (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTCEx_GetTimeStamp() - function. - - *** Internal TimeStamp configuration *** - =============================== - [..] - (+) Enable the RTC internal TimeStamp using the HAL_RTCEx_SetInternalTimeStamp() function. - User has to check internal timestamp occurrence using __HAL_RTC_INTERNAL_TIMESTAMP_GET_FLAG. - (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTCEx_GetTimeStamp() - function. - - *** Tamper configuration *** - ============================ - [..] - (+) Enable the RTC Tamper and configure the Tamper filter count, trigger Edge - or Level according to the Tamper filter (if equal to 0 Edge else Level) - value, sampling frequency, NoErase, MaskFlag, precharge or discharge and - Pull-UP using the HAL_RTCEx_SetTamper() function. You can configure RTC Tamper - with interrupt mode using HAL_RTCEx_SetTamper_IT() function. - (+) The default configuration of the Tamper erases the backup registers. To avoid - erase, enable the NoErase field on the RTC_TAMPCR register. - - *** Backup Data Registers configuration *** - =========================================== - [..] - (+) To write to the RTC Backup Data registers, use the HAL_RTCEx_BKUPWrite() - function. - (+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead() - function. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RTCEx RTCEx - * @brief RTC Extended HAL module driver - * @{ - */ - -#ifdef HAL_RTC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -#if defined(RTC_TAMPER1_SUPPORT) && defined(RTC_TAMPER3_SUPPORT) -#define RTC_TAMPCR_MASK ((uint32_t)RTC_TAMPCR_TAMPTS |\ - (uint32_t)RTC_TAMPCR_TAMPFREQ | (uint32_t)RTC_TAMPCR_TAMPFLT | (uint32_t)RTC_TAMPCR_TAMPPRCH |\ - (uint32_t)RTC_TAMPCR_TAMPPUDIS | (uint32_t)RTC_TAMPCR_TAMPIE |\ - (uint32_t)RTC_TAMPCR_TAMP1IE | (uint32_t)RTC_TAMPCR_TAMP1NOERASE | (uint32_t)RTC_TAMPCR_TAMP1MF |\ - (uint32_t)RTC_TAMPCR_TAMP2IE | (uint32_t)RTC_TAMPCR_TAMP2NOERASE | (uint32_t)RTC_TAMPCR_TAMP2MF |\ - (uint32_t)RTC_TAMPCR_TAMP3IE | (uint32_t)RTC_TAMPCR_TAMP3NOERASE | (uint32_t)RTC_TAMPCR_TAMP3MF) -#elif defined(RTC_TAMPER1_SUPPORT) -#define RTC_TAMPCR_MASK ((uint32_t)RTC_TAMPCR_TAMPTS |\ - (uint32_t)RTC_TAMPCR_TAMPFREQ | (uint32_t)RTC_TAMPCR_TAMPFLT | (uint32_t)RTC_TAMPCR_TAMPPRCH |\ - (uint32_t)RTC_TAMPCR_TAMPPUDIS | (uint32_t)RTC_TAMPCR_TAMPIE |\ - (uint32_t)RTC_TAMPCR_TAMP1IE | (uint32_t)RTC_TAMPCR_TAMP1NOERASE | (uint32_t)RTC_TAMPCR_TAMP1MF |\ - (uint32_t)RTC_TAMPCR_TAMP2IE | (uint32_t)RTC_TAMPCR_TAMP2NOERASE | (uint32_t)RTC_TAMPCR_TAMP2MF) -#elif defined(RTC_TAMPER3_SUPPORT) -#define RTC_TAMPCR_MASK ((uint32_t)RTC_TAMPCR_TAMPTS |\ - (uint32_t)RTC_TAMPCR_TAMPFREQ | (uint32_t)RTC_TAMPCR_TAMPFLT | (uint32_t)RTC_TAMPCR_TAMPPRCH |\ - (uint32_t)RTC_TAMPCR_TAMPPUDIS | (uint32_t)RTC_TAMPCR_TAMPIE |\ - (uint32_t)RTC_TAMPCR_TAMP2IE | (uint32_t)RTC_TAMPCR_TAMP2NOERASE | (uint32_t)RTC_TAMPCR_TAMP2MF |\ - (uint32_t)RTC_TAMPCR_TAMP3IE | (uint32_t)RTC_TAMPCR_TAMP3NOERASE | (uint32_t)RTC_TAMPCR_TAMP3MF) -#else -#define RTC_TAMPCR_MASK ((uint32_t)RTC_TAMPCR_TAMPTS |\ - (uint32_t)RTC_TAMPCR_TAMPFREQ | (uint32_t)RTC_TAMPCR_TAMPFLT | (uint32_t)RTC_TAMPCR_TAMPPRCH |\ - (uint32_t)RTC_TAMPCR_TAMPPUDIS | (uint32_t)RTC_TAMPCR_TAMPIE |\ - (uint32_t)RTC_TAMPCR_TAMP2IE | (uint32_t)RTC_TAMPCR_TAMP2NOERASE | (uint32_t)RTC_TAMPCR_TAMP2MF) -#endif /* RTC_TAMPER1_SUPPORT && RTC_TAMPER3_SUPPORT */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup RTCEx_Exported_Functions RTCEx Exported Functions - * @{ - */ - - -/** @defgroup RTCEx_Exported_Functions_Group1 RTC TimeStamp and Tamper functions - * @brief RTC TimeStamp and Tamper functions - * -@verbatim - =============================================================================== - ##### RTC TimeStamp and Tamper functions ##### - =============================================================================== - - [..] This section provide functions allowing to configure TimeStamp feature - -@endverbatim - * @{ - */ - -/** - * @brief Set TimeStamp. - * @note This API must be called before enabling the TimeStamp feature. - * @param hrtc: RTC handle - * @param TimeStampEdge: Specifies the pin edge on which the TimeStamp is - * activated. - * This parameter can be one of the following values: - * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the - * rising edge of the related pin. - * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the - * falling edge of the related pin. - * @param RTC_TimeStampPin: specifies the RTC TimeStamp Pin. - * This parameter can be one of the following values: - * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin. - * The RTC TimeStamp Pin is per default PC13, but for reasons of - * compatibility, this parameter is required. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge)); - assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Get the RTC_CR register and clear the bits to be configured */ - tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE)); - - tmpreg|= TimeStampEdge; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the Time Stamp TSEDGE and Enable bits */ - hrtc->Instance->CR = (uint32_t)tmpreg; - - __HAL_RTC_TIMESTAMP_ENABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Set TimeStamp with Interrupt. - * @param hrtc: RTC handle - * @note This API must be called before enabling the TimeStamp feature. - * @param TimeStampEdge: Specifies the pin edge on which the TimeStamp is - * activated. - * This parameter can be one of the following values: - * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the - * rising edge of the related pin. - * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the - * falling edge of the related pin. - * @param RTC_TimeStampPin: Specifies the RTC TimeStamp Pin. - * This parameter can be one of the following values: - * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin. - * The RTC TimeStamp Pin is per default PC13, but for reasons of - * compatibility, this parameter is required. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge)); - assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Get the RTC_CR register and clear the bits to be configured */ - tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE)); - - tmpreg |= TimeStampEdge; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the Time Stamp TSEDGE and Enable bits */ - hrtc->Instance->CR = (uint32_t)tmpreg; - - __HAL_RTC_TIMESTAMP_ENABLE(hrtc); - - /* Enable IT timestamp */ - __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc,RTC_IT_TS); - - /* RTC timestamp Interrupt Configuration: EXTI configuration */ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); - - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate TimeStamp. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc) -{ - uint32_t tmpreg = 0; - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS); - - /* Get the RTC_CR register and clear the bits to be configured */ - tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE)); - - /* Configure the Time Stamp TSEDGE and Enable bits */ - hrtc->Instance->CR = (uint32_t)tmpreg; - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Set Internal TimeStamp. - * @note This API must be called before enabling the internal TimeStamp feature. - * @param hrtc: pointer to a RTC_HandleTypeDef structure that contains - * the configuration information for RTC. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetInternalTimeStamp(RTC_HandleTypeDef *hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the internal Time Stamp Enable bits */ - __HAL_RTC_INTERNAL_TIMESTAMP_ENABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate Internal TimeStamp. - * @param hrtc: pointer to a RTC_HandleTypeDef structure that contains - * the configuration information for RTC. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTimeStamp(RTC_HandleTypeDef *hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the internal Time Stamp Enable bits */ - __HAL_RTC_INTERNAL_TIMESTAMP_DISABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Get the RTC TimeStamp value. - * @param hrtc: RTC handle - * @param sTimeStamp: Pointer to Time structure - * @param sTimeStampDate: Pointer to Date structure - * @param Format: specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef* sTimeStamp, RTC_DateTypeDef* sTimeStampDate, uint32_t Format) -{ - uint32_t tmptime = 0, tmpdate = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - - /* Get the TimeStamp time and date registers values */ - tmptime = (uint32_t)(hrtc->Instance->TSTR & RTC_TR_RESERVED_MASK); - tmpdate = (uint32_t)(hrtc->Instance->TSDR & RTC_DR_RESERVED_MASK); - - /* Fill the Time structure fields with the read parameters */ - sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TR_HT | RTC_TR_HU)) >> 16); - sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TR_MNT | RTC_TR_MNU)) >> 8); - sTimeStamp->Seconds = (uint8_t)(tmptime & (RTC_TR_ST | RTC_TR_SU)); - sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TR_PM)) >> 16); - sTimeStamp->SubSeconds = (uint32_t) hrtc->Instance->TSSSR; - - /* Fill the Date structure fields with the read parameters */ - sTimeStampDate->Year = 0; - sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_DR_MT | RTC_DR_MU)) >> 8); - sTimeStampDate->Date = (uint8_t)(tmpdate & (RTC_DR_DT | RTC_DR_DU)); - sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_DR_WDU)) >> 13); - - /* Check the input parameters format */ - if(Format == RTC_FORMAT_BIN) - { - /* Convert the TimeStamp structure parameters to Binary format */ - sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours); - sTimeStamp->Minutes = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Minutes); - sTimeStamp->Seconds = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Seconds); - - /* Convert the DateTimeStamp structure parameters to Binary format */ - sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month); - sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date); - sTimeStampDate->WeekDay = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->WeekDay); - } - - /* Clear the TIMESTAMP Flags */ - __HAL_RTC_INTERNAL_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_ITSF); - __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF); - - return HAL_OK; -} - -/** - * @brief Set Tamper. - * @note By calling this API we disable the tamper interrupt for all tampers. - * @param hrtc: RTC handle - * @param sTamper: Pointer to Tamper Structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_TAMPER(sTamper->Tamper)); - assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger)); - assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase)); - assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag)); - assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter)); - assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency)); - assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration)); - assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp)); - assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Configure the tamper trigger */ - if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE) - { - sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1); - } - - if(sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE) - { - sTamper->NoErase = 0; -#if defined(RTC_TAMPER1_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_1) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP1NOERASE; - } -#endif /* RTC_TAMPER1_SUPPORT */ - if((sTamper->Tamper & RTC_TAMPER_2) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP2NOERASE; - } -#if defined(RTC_TAMPER3_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_3) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP3NOERASE; - } -#endif /* RTC_TAMPER3_SUPPORT */ - } - - if(sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE) - { - sTamper->MaskFlag = 0; -#if defined(RTC_TAMPER1_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_1) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP1MF; - } -#endif /* RTC_TAMPER1_SUPPORT */ - if((sTamper->Tamper & RTC_TAMPER_2) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP2MF; - } -#if defined(RTC_TAMPER3_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_3) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP3MF; - } -#endif /* RTC_TAMPER3_SUPPORT */ - } - - tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->NoErase |\ - (uint32_t)sTamper->MaskFlag | (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency |\ - (uint32_t)sTamper->PrechargeDuration | (uint32_t)sTamper->TamperPullUp | sTamper->TimeStampOnTamperDetection); - - hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1) | RTC_TAMPCR_MASK); - - hrtc->Instance->TAMPCR |= tmpreg; - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Set Tamper with interrupt. - * @note By calling this API we force the tamper interrupt for all tampers. - * @param hrtc: RTC handle - * @param sTamper: Pointer to RTC Tamper. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_TAMPER(sTamper->Tamper)); - assert_param(IS_RTC_TAMPER_INTERRUPT(sTamper->Interrupt)); - assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger)); - assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase)); - assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag)); - assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter)); - assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency)); - assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration)); - assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp)); - assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Configure the tamper trigger */ - if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE) - { - sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1); - } - - if(sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE) - { - sTamper->NoErase = 0; -#if defined(RTC_TAMPER1_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_1) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP1NOERASE; - } -#endif /* RTC_TAMPER1_SUPPORT */ - if((sTamper->Tamper & RTC_TAMPER_2) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP2NOERASE; - } -#if defined(RTC_TAMPER3_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_3) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP3NOERASE; - } -#endif /* RTC_TAMPER3_SUPPORT */ - } - - if(sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE) - { - sTamper->MaskFlag = 0; -#if defined(RTC_TAMPER1_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_1) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP1MF; - } -#endif /* RTC_TAMPER1_SUPPORT */ - if((sTamper->Tamper & RTC_TAMPER_2) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP2MF; - } -#if defined(RTC_TAMPER3_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_3) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP3MF; - } -#endif /* RTC_TAMPER3_SUPPORT */ - } - - tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Interrupt | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->NoErase |\ - (uint32_t)sTamper->MaskFlag | (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency |\ - (uint32_t)sTamper->PrechargeDuration | (uint32_t)sTamper->TamperPullUp | sTamper->TimeStampOnTamperDetection); - - hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1) | RTC_TAMPCR_MASK); - - hrtc->Instance->TAMPCR |= tmpreg; - - /* RTC Tamper Interrupt Configuration: EXTI configuration */ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); - - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate Tamper. - * @param hrtc: RTC handle - * @param Tamper: Selected tamper pin. - * This parameter can be any combination of RTC_TAMPER_1, RTC_TAMPER_2 and RTC_TAMPER_3. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper) -{ - assert_param(IS_RTC_TAMPER(Tamper)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the selected Tamper pin */ - hrtc->Instance->TAMPCR &= ((uint32_t)~Tamper); - -#if defined(RTC_TAMPER1_SUPPORT) - if ((Tamper & RTC_TAMPER_1) != 0) - { - /* Disable the Tamper1 interrupt */ - hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP1)); - } -#endif /* RTC_TAMPER1_SUPPORT */ - if ((Tamper & RTC_TAMPER_2) != 0) - { - /* Disable the Tamper2 interrupt */ - hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP2)); - } -#if defined(RTC_TAMPER3_SUPPORT) - if ((Tamper & RTC_TAMPER_3) != 0) - { - /* Disable the Tamper3 interrupt */ - hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP3)); - } -#endif /* RTC_TAMPER3_SUPPORT */ - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Handle TimeStamp interrupt request. - * @param hrtc: RTC handle - * @retval None - */ -void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc) -{ - /* Clear the EXTI's Flag for RTC TimeStamp and Tamper */ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG(); - - /* As Tampers and TimeStamp are sharing the same EXTI line, exit when no more pending event */ - while( - ((__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != RESET) && (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != RESET)) -#if defined(RTC_TAMPER1_SUPPORT) - || ((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP1) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != RESET)) -#endif /* RTC_TAMPER1_SUPPORT */ - || ((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP2) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) != RESET)) -#if defined(RTC_TAMPER3_SUPPORT) - || ((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP3) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) != RESET)) -#endif /* RTC_TAMPER3_SUPPORT */ - ) - { - - /* Get the TimeStamp interrupt source enable status and pending flag status */ - if((__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != RESET) && (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != RESET)) - { - /* TIMESTAMP callback */ - HAL_RTCEx_TimeStampEventCallback(hrtc); - - /* Clear the TIMESTAMP interrupt pending bit (this will clear timestamp time and date registers) */ - __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF); - } - -#if defined(RTC_TAMPER1_SUPPORT) - /* Get the Tamper1 interrupt source enable status and pending flag status */ - if((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP1) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != RESET)) - { - /* Clear the Tamper1 interrupt pending bit */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F); - - /* Tamper1 callback */ - HAL_RTCEx_Tamper1EventCallback(hrtc); - } -#endif /* RTC_TAMPER1_SUPPORT */ - - /* Get the Tamper2 interrupt source enable status and pending flag status */ - if((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP2) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) != RESET)) - { - /* Clear the Tamper2 interrupt pending bit */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F); - - /* Tamper2 callback */ - HAL_RTCEx_Tamper2EventCallback(hrtc); - } - -#if defined(RTC_TAMPER3_SUPPORT) - /* Get the Tamper3 interrupts source enable status and pending flag status */ - if((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP3) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) != RESET)) - { - /* Clear the Tamper3 interrupt pending bit */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F); - - /* Tamper3 callback */ - HAL_RTCEx_Tamper3EventCallback(hrtc); - } -#endif /* RTC_TAMPER3_SUPPORT */ - - } - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; -} - -/** - * @brief TimeStamp callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_TimeStampEventCallback could be implemented in the user file - */ -} - -#if defined(RTC_TAMPER1_SUPPORT) -/** - * @brief Tamper 1 callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_Tamper1EventCallback could be implemented in the user file - */ -} -#endif /* RTC_TAMPER1_SUPPORT */ - -/** - * @brief Tamper 2 callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_Tamper2EventCallback could be implemented in the user file - */ -} - -#if defined(RTC_TAMPER3_SUPPORT) -/** - * @brief Tamper 3 callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_Tamper3EventCallback could be implemented in the user file - */ -} -#endif /* RTC_TAMPER3_SUPPORT */ - -/** - * @brief Handle TimeStamp polling request. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - while(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == RESET) - { - if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != RESET) - { - /* Clear the TIMESTAMP OverRun Flag */ - __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF); - - /* Change TIMESTAMP state */ - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } - - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} - -#if defined(RTC_TAMPER1_SUPPORT) -/** - * @brief Handle Tamper 1 Polling. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - /* Get the status of the Interrupt */ - while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F)== RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Clear the Tamper Flag */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} -#endif /* RTC_TAMPER1_SUPPORT */ - -/** - * @brief Handle Tamper 2 Polling. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - /* Get the status of the Interrupt */ - while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) == RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Clear the Tamper Flag */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} - -#if defined(RTC_TAMPER3_SUPPORT) -/** - * @brief Handle Tamper 3 Polling. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - /* Get the status of the Interrupt */ - while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) == RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Clear the Tamper Flag */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} -#endif /* RTC_TAMPER3_SUPPORT */ - -/** - * @} - */ - -/** @defgroup RTCEx_Exported_Functions_Group2 RTC Wake-up functions - * @brief RTC Wake-up functions - * -@verbatim - =============================================================================== - ##### RTC Wake-up functions ##### - =============================================================================== - - [..] This section provide functions allowing to configure Wake-up feature - -@endverbatim - * @{ - */ - -/** - * @brief Set wake up timer. - * @param hrtc: RTC handle - * @param WakeUpCounter: Wake up counter - * @param WakeUpClock: Wake up clock - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock)); - assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /*Check RTC WUTWF flag is reset only when wake up timer enabled*/ - if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET) - { - tickstart = HAL_GetTick(); - - /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */ - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - } - - __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); - - tickstart = HAL_GetTick(); - - /* Wait till RTC WUTWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - /* Clear the Wakeup Timer clock source bits in CR register */ - hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL; - - /* Configure the clock source */ - hrtc->Instance->CR |= (uint32_t)WakeUpClock; - - /* Configure the Wakeup Timer counter */ - hrtc->Instance->WUTR = (uint32_t)WakeUpCounter; - - /* Enable the Wakeup Timer */ - __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Set wake up timer with interrupt. - * @param hrtc: RTC handle - * @param WakeUpCounter: Wake up counter - * @param WakeUpClock: Wake up clock - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock)); - assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /*Check RTC WUTWF flag is reset only when wake up timer enabled*/ - if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET) - { - tickstart = HAL_GetTick(); - - /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */ - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - } - /* Disable the Wake-Up timer */ - __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); - - /* Clear flag Wake-Up */ - __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF); - - tickstart = HAL_GetTick(); - - /* Wait till RTC WUTWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - /* Configure the Wakeup Timer counter */ - hrtc->Instance->WUTR = (uint32_t)WakeUpCounter; - - /* Clear the Wakeup Timer clock source bits in CR register */ - hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL; - - /* Configure the clock source */ - hrtc->Instance->CR |= (uint32_t)WakeUpClock; - - /* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */ - __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT(); - - __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); - - /* Configure the Interrupt in the RTC_CR register */ - __HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc,RTC_IT_WUT); - - /* Enable the Wakeup Timer */ - __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate wake up timer counter. - * @param hrtc: RTC handle - * @retval HAL status - */ -uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc) -{ - uint32_t tickstart = 0; - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Disable the Wakeup Timer */ - __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc,RTC_IT_WUT); - - tickstart = HAL_GetTick(); - /* Wait till RTC WUTWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Get wake up timer counter. - * @param hrtc: RTC handle - * @retval Counter value - */ -uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc) -{ - /* Get the counter value */ - return ((uint32_t)(hrtc->Instance->WUTR & RTC_WUTR_WUT)); -} - -/** - * @brief Handle Wake Up Timer interrupt request. - * @param hrtc: RTC handle - * @retval None - */ -void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc) -{ - /* Clear the EXTI's line Flag for RTC WakeUpTimer */ - __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); - - /* Get the pending status of the WAKEUPTIMER Interrupt */ - if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) != RESET) - { - /* Clear the WAKEUPTIMER interrupt pending bit */ - __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF); - - /* WAKEUPTIMER callback */ - HAL_RTCEx_WakeUpTimerEventCallback(hrtc); - } - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; -} - -/** - * @brief Wake Up Timer callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_WakeUpTimerEventCallback could be implemented in the user file - */ -} - -/** - * @brief Handle Wake Up Timer Polling. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - return HAL_TIMEOUT; - } - } - } - - /* Clear the WAKEUPTIMER Flag */ - __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} - -/** - * @} - */ - - -/** @defgroup RTCEx_Exported_Functions_Group3 Extended Peripheral Control functions - * @brief Extended Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Extended Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides functions allowing to - (+) Write a data in a specified RTC Backup data register - (+) Read a data in a specified RTC Backup data register - (+) Set the Coarse calibration parameters. - (+) Deactivate the Coarse calibration parameters - (+) Set the Smooth calibration parameters. - (+) Configure the Synchronization Shift Control Settings. - (+) Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). - (+) Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). - (+) Enable the RTC reference clock detection. - (+) Disable the RTC reference clock detection. - (+) Enable the Bypass Shadow feature. - (+) Disable the Bypass Shadow feature. - -@endverbatim - * @{ - */ - -/** - * @brief Write a data in a specified RTC Backup data register. - * @param hrtc: RTC handle - * @param BackupRegister: RTC Backup data Register number. - * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to - * specify the register. - * @param Data: Data to be written in the specified RTC Backup data register. - * @retval None - */ -void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data) -{ - uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_RTC_BKP(BackupRegister)); - - tmp = (uint32_t)&(hrtc->Instance->BKP0R); - tmp += (BackupRegister * 4); - - /* Write the specified register */ - *(__IO uint32_t *)tmp = (uint32_t)Data; -} - -/** - * @brief Read data from the specified RTC Backup data Register. - * @param hrtc: RTC handle - * @param BackupRegister: RTC Backup data Register number. - * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to - * specify the register. - * @retval Read value - */ -uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister) -{ - uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_RTC_BKP(BackupRegister)); - - tmp = (uint32_t)&(hrtc->Instance->BKP0R); - tmp += (BackupRegister * 4); - - /* Read the specified register */ - return (*(__IO uint32_t *)tmp); -} - -/** - * @brief Set the Smooth calibration parameters. - * @param hrtc: RTC handle - * @param SmoothCalibPeriod: Select the Smooth Calibration Period. - * This parameter can be can be one of the following values : - * @arg RTC_SMOOTHCALIB_PERIOD_32SEC: The smooth calibration period is 32s. - * @arg RTC_SMOOTHCALIB_PERIOD_16SEC: The smooth calibration period is 16s. - * @arg RTC_SMOOTHCALIB_PERIOD_8SEC: The smooth calibration period is 8s. - * @param SmoothCalibPlusPulses: Select to Set or reset the CALP bit. - * This parameter can be one of the following values: - * @arg RTC_SMOOTHCALIB_PLUSPULSES_SET: Add one RTCCLK pulse every 2*11 pulses. - * @arg RTC_SMOOTHCALIB_PLUSPULSES_RESET: No RTCCLK pulses are added. - * @param SmoothCalibMinusPulsesValue: Select the value of CALM[8:0] bits. - * This parameter can be one any value from 0 to 0x000001FF. - * @note To deactivate the smooth calibration, the field SmoothCalibPlusPulses - * must be equal to SMOOTHCALIB_PLUSPULSES_RESET and the field - * SmoothCalibMinusPulsesValue must be equal to 0. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef* hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_SMOOTH_CALIB_PERIOD(SmoothCalibPeriod)); - assert_param(IS_RTC_SMOOTH_CALIB_PLUS(SmoothCalibPlusPulses)); - assert_param(IS_RTC_SMOOTH_CALIB_MINUS(SmoothCalibMinusPulsesValue)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* check if a calibration is pending*/ - if((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET) - { - tickstart = HAL_GetTick(); - - /* check if a calibration is pending*/ - while((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - } - - /* Configure the Smooth calibration settings */ - hrtc->Instance->CALR = (uint32_t)((uint32_t)SmoothCalibPeriod | (uint32_t)SmoothCalibPlusPulses | (uint32_t)SmoothCalibMinusPulsesValue); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Configure the Synchronization Shift Control Settings. - * @note When REFCKON is set, firmware must not write to Shift control register. - * @param hrtc: RTC handle - * @param ShiftAdd1S: Select to add or not 1 second to the time calendar. - * This parameter can be one of the following values : - * @arg RTC_SHIFTADD1S_SET: Add one second to the clock calendar. - * @arg RTC_SHIFTADD1S_RESET: No effect. - * @param ShiftSubFS: Select the number of Second Fractions to substitute. - * This parameter can be one any value from 0 to 0x7FFF. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef* hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_SHIFT_ADD1S(ShiftAdd1S)); - assert_param(IS_RTC_SHIFT_SUBFS(ShiftSubFS)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - tickstart = HAL_GetTick(); - - /* Wait until the shift is completed*/ - while((hrtc->Instance->ISR & RTC_ISR_SHPF) != RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - /* Check if the reference clock detection is disabled */ - if((hrtc->Instance->CR & RTC_CR_REFCKON) == RESET) - { - /* Configure the Shift settings */ - hrtc->Instance->SHIFTR = (uint32_t)(uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S); - - /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) - { - if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - } - } - else - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). - * @param hrtc: RTC handle - * @param CalibOutput : Select the Calibration output Selection . - * This parameter can be one of the following values: - * @arg RTC_CALIBOUTPUT_512HZ: A signal has a regular waveform at 512Hz. - * @arg RTC_CALIBOUTPUT_1HZ: A signal has a regular waveform at 1Hz. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef* hrtc, uint32_t CalibOutput) -{ - /* Check the parameters */ - assert_param(IS_RTC_CALIB_OUTPUT(CalibOutput)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Clear flags before config */ - hrtc->Instance->CR &= (uint32_t)~RTC_CR_COSEL; - - /* Configure the RTC_CR register */ - hrtc->Instance->CR |= (uint32_t)CalibOutput; - - __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef* hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Enable the RTC reference clock detection. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef* hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state*/ - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - else - { - __HAL_RTC_CLOCKREF_DETECTION_ENABLE(hrtc); - - /* Exit Initialization mode */ - hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT; - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Disable the RTC reference clock detection. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef* hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state*/ - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - else - { - __HAL_RTC_CLOCKREF_DETECTION_DISABLE(hrtc); - - /* Exit Initialization mode */ - hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT; - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Enable the Bypass Shadow feature. - * @param hrtc: RTC handle - * @note When the Bypass Shadow is enabled the calendar value are taken - * directly from the Calendar counter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef* hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set the BYPSHAD bit */ - hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD; - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Disable the Bypass Shadow feature. - * @param hrtc: RTC handle - * @note When the Bypass Shadow is enabled the calendar value are taken - * directly from the Calendar counter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef* hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Reset the BYPSHAD bit */ - hrtc->Instance->CR &= ((uint8_t)~RTC_CR_BYPSHAD); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup RTCEx_Exported_Functions_Group4 Extended features functions - * @brief Extended features functions - * -@verbatim - =============================================================================== - ##### Extended features functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) RTC Alarm B callback - (+) RTC Poll for Alarm B request - -@endverbatim - * @{ - */ - -/** - * @brief Alarm B callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_AlarmBEventCallback could be implemented in the user file - */ -} - -/** - * @brief Handle Alarm B Polling request. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) == RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Clear the Alarm Flag */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_RTC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c deleted file mode 100644 index 41d343d6..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +++ /dev/null @@ -1,5675 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim.c - * @author MCD Application Team - * @brief TIM HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Timer (TIM) peripheral: - * + Time Base Initialization - * + Time Base Start - * + Time Base Start Interruption - * + Time Base Start DMA - * + Time Output Compare/PWM Initialization - * + Time Output Compare/PWM Channel Configuration - * + Time Output Compare/PWM Start - * + Time Output Compare/PWM Start Interruption - * + Time Output Compare/PWM Start DMA - * + Time Input Capture Initialization - * + Time Input Capture Channel Configuration - * + Time Input Capture Start - * + Time Input Capture Start Interruption - * + Time Input Capture Start DMA - * + Time One Pulse Initialization - * + Time One Pulse Channel Configuration - * + Time One Pulse Start - * + Time Encoder Interface Initialization - * + Time Encoder Interface Start - * + Time Encoder Interface Start Interruption - * + Time Encoder Interface Start DMA - * + Commutation Event configuration with Interruption and DMA - * + Time OCRef clear configuration - * + Time External Clock configuration - @verbatim - ============================================================================== - ##### TIMER Generic features ##### - ============================================================================== - [..] The Timer features include: - (#) 16-bit up, down, up/down auto-reload counter. - (#) 16-bit programmable prescaler allowing dividing (also on the fly) the - counter clock frequency either by any factor between 1 and 65536. - (#) Up to 4 independent channels for: - (++) Input Capture - (++) Output Compare - (++) PWM generation (Edge and Center-aligned Mode) - (++) One-pulse mode output - - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Initialize the TIM low level resources by implementing the following functions - depending on the selected feature: - (++) Time Base : HAL_TIM_Base_MspInit() - (++) Input Capture : HAL_TIM_IC_MspInit() - (++) Output Compare : HAL_TIM_OC_MspInit() - (++) PWM generation : HAL_TIM_PWM_MspInit() - (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit() - (++) Encoder mode output : HAL_TIM_Encoder_MspInit() - - (#) Initialize the TIM low level resources : - (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); - (##) TIM pins configuration - (+++) Enable the clock for the TIM GPIOs using the following function: - __HAL_RCC_GPIOx_CLK_ENABLE(); - (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); - - (#) The external Clock can be configured, if needed (the default clock is the - internal clock from the APBx), using the following function: - HAL_TIM_ConfigClockSource, the clock configuration should be done before - any start function. - - (#) Configure the TIM in the desired functioning mode using one of the - Initialization function of this driver: - (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base - (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an - Output Compare signal. - (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a - PWM signal. - (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an - external signal. - (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer - in One Pulse Mode. - (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface. - - (#) Activate the TIM peripheral using one of the start functions depending from the feature used: - (++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT() - (++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT() - (++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT() - (++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT() - (++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT() - (++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM_Encoder_Start_IT(). - - (#) The DMA Burst is managed with the two following functions: - HAL_TIM_DMABurst_WriteStart() - HAL_TIM_DMABurst_ReadStart() - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup TIM TIM - * @brief TIM HAL module driver - * @{ - */ - -#ifdef HAL_TIM_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter); -static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter); -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter); -static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter); -static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter); -static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t InputTriggerSource); -static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma); -static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma); -static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, - TIM_SlaveConfigTypeDef * sSlaveConfig); -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup TIM_Exported_Functions TIM Exported Functions - * @{ - */ - -/** @defgroup TIM_Exported_Functions_Group1 Time Base functions - * @brief Time Base functions - * -@verbatim - ============================================================================== - ##### Time Base functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM base. - (+) De-initialize the TIM base. - (+) Start the Time Base. - (+) Stop the Time Base. - (+) Start the Time Base and enable interrupt. - (+) Stop the Time Base and disable interrupt. - (+) Start the Time Base and enable DMA transfer. - (+) Stop the Time Base and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Time base Unit according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - HAL_TIM_Base_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Set the Time Base configuration */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM Base peripheral - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIM_Base_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Base MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Base_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Base MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Base_MspDeInit could be implemented in the user file - */ -} - - -/** - * @brief Starts the TIM Base generation. - * @param htim TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Change the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Base generation. - * @param htim TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Base generation in interrupt mode. - * @param htim TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Enable the TIM Update interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Base generation in interrupt mode. - * @param htim TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - /* Disable the TIM Update interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Base generation in DMA mode. - * @param htim TIM handle - * @param pData The source Buffer address. - * @param Length The length of data to be transferred from memory to peripheral. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length); - - /* Enable the TIM Update DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Base generation in DMA mode. - * @param htim TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); - - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group2 Time Output Compare functions - * @brief Time Output Compare functions - * -@verbatim - ============================================================================== - ##### Time Output Compare functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM Output Compare. - (+) De-initialize the TIM Output Compare. - (+) Start the Time Output Compare. - (+) Stop the Time Output Compare. - (+) Start the Time Output Compare and enable interrupt. - (+) Stop the Time Output Compare and disable interrupt. - (+) Start the Time Output Compare and enable DMA transfer. - (+) Stop the Time Output Compare and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Output Compare according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init() - * @param htim TIM Output Compare handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_OC_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Init the base time for the Output Compare */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM peripheral - * @param htim TIM Output Compare handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_OC_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Output Compare MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OC_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Output Compare MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OC_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Output Compare signal generation. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation. - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in interrupt mode. - * @param htim TIM OC handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in interrupt mode. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in DMA mode. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @param pData The source Buffer address. - * @param Length The length of data to be transferred from memory to TIM peripheral - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in DMA mode. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group3 Time PWM functions - * @brief Time PWM functions - * -@verbatim - ============================================================================== - ##### Time PWM functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM OPWM. - (+) De-initialize the TIM PWM. - (+) Start the Time PWM. - (+) Stop the Time PWM. - (+) Start the Time PWM and enable interrupt. - (+) Stop the Time PWM and disable interrupt. - (+) Start the Time PWM and enable DMA transfer. - (+) Stop the Time PWM and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM PWM Time Base according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() - * @param htim TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_PWM_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Init the base time for the PWM */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM peripheral - * @param htim TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_PWM_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM PWM MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM PWM MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the PWM signal generation. - * @param htim TIM handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation. - * @param htim TIM handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the PWM signal generation in interrupt mode. - * @param htim TIM handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation in interrupt mode. - * @param htim TIM handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM PWM signal generation in DMA mode. - * @param htim TIM handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param pData The source Buffer address. - * @param Length The length of data to be transferred from memory to TIM peripheral - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Output Capture/Compare 3 request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM PWM signal generation in DMA mode. - * @param htim TIM handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group4 Time Input Capture functions - * @brief Time Input Capture functions - * -@verbatim - ============================================================================== - ##### Time Input Capture functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM Input Capture. - (+) De-initialize the TIM Input Capture. - (+) Start the Time Input Capture. - (+) Stop the Time Input Capture. - (+) Start the Time Input Capture and enable interrupt. - (+) Stop the Time Input Capture and disable interrupt. - (+) Start the Time Input Capture and enable DMA transfer. - (+) Stop the Time Input Capture and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Input Capture Time base according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init() - * @param htim TIM Input Capture handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_IC_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Init the base time for the input capture */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM peripheral - * @param htim TIM Input Capture handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_IC_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM INput Capture MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_IC_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Input Capture MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_IC_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Input Capture measurement. - * @param htim TIM Input Capture handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Input Capture measurement. - * @param htim TIM handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Disable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Input Capture measurement in interrupt mode. - * @param htim TIM Input Capture handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Input Capture measurement in interrupt mode. - * @param htim TIM handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Input Capture measurement on in DMA mode. - * @param htim TIM Input Capture handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param pData The destination Buffer address. - * @param Length The length of data to be transferred from TIM peripheral to memory. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Input Capture measurement in DMA mode. - * @param htim TIM Input Capture handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group5 Time One Pulse functions - * @brief Time One Pulse functions - * -@verbatim - ============================================================================== - ##### Time One Pulse functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM One Pulse. - (+) De-initialize the TIM One Pulse. - (+) Start the Time One Pulse. - (+) Stop the Time One Pulse. - (+) Start the Time One Pulse and enable interrupt. - (+) Stop the Time One Pulse and disable interrupt. - (+) Start the Time One Pulse and enable DMA transfer. - (+) Stop the Time One Pulse and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM One Pulse Time Base according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_OnePulse_DeInit() before HAL_TIM_OnePulse_Init() - * @param htim TIM OnePulse handle - * @param OnePulseMode Select the One pulse mode. - * This parameter can be one of the following values: - * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated. - * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_OPM_MODE(OnePulseMode)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_OnePulse_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Configure the Time base in the One Pulse Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Reset the OPM Bit */ - htim->Instance->CR1 &= ~TIM_CR1_OPM; - - /* Configure the OPM Mode */ - htim->Instance->CR1 |= OnePulseMode; - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM One Pulse - * @param htim TIM One Pulse handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIM_OnePulse_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM One Pulse MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OnePulse_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM One Pulse MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM One Pulse signal generation. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(OutputChannel); - - /* Enable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together - - No need to enable the counter, it's enabled automatically by hardware - (the counter starts in response to a stimulus and generate a pulse */ - - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channels to be disable - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(OutputChannel); - - /* Disable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ - - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM One Pulse signal generation in interrupt mode. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(OutputChannel); - - /* Enable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together - - No need to enable the counter, it's enabled automatically by hardware - (the counter starts in response to a stimulus and generate a pulse */ - - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation in interrupt mode. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(OutputChannel); - - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - - /* Disable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group6 Time Encoder functions - * @brief Time Encoder functions - * -@verbatim - ============================================================================== - ##### Time Encoder functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM Encoder. - (+) De-initialize the TIM Encoder. - (+) Start the Time Encoder. - (+) Stop the Time Encoder. - (+) Start the Time Encoder and enable interrupt. - (+) Stop the Time Encoder and disable interrupt. - (+) Start the Time Encoder and enable DMA transfer. - (+) Stop the Time Encoder and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Encoder Interface and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_Encoder_DeInit() before HAL_TIM_Encoder_Init() - * @param htim TIM Encoder Interface handle - * @param sConfig TIM Encoder Interface configuration structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig) -{ - uint32_t tmpsmcr = 0; - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode)); - assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection)); - assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection)); - assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); - assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_Encoder_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Reset the SMS bits */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - - /* Configure the Time base in the Encoder Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = htim->Instance->CCMR1; - - /* Get the TIMx CCER register value */ - tmpccer = htim->Instance->CCER; - - /* Set the encoder Mode */ - tmpsmcr |= sConfig->EncoderMode; - - /* Select the Capture Compare 1 and the Capture Compare 2 as input */ - tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); - tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8)); - - /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ - tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); - tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); - tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8); - tmpccmr1 |= (sConfig->IC1Filter << 4) | (sConfig->IC2Filter << 12); - - /* Set the TI1 and the TI2 Polarities */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); - tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); - tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4); - - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - - /* Write to TIMx CCMR1 */ - htim->Instance->CCMR1 = tmpccmr1; - - /* Write to TIMx CCER */ - htim->Instance->CCER = tmpccer; - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - - -/** - * @brief DeInitialize the TIM Encoder interface - * @param htim TIM Encoder handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIM_Encoder_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Encoder Interface MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Encoder_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Encoder Interface MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Encoder_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Encoder Interface. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Enable the encoder interface channels */ - switch (Channel) - { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - } - break; - - case TIM_CHANNEL_2: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - } - break; - - default : - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - } - break; - } - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Encoder Interface. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 and 2 - (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ - switch (Channel) - { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - } - break; - - case TIM_CHANNEL_2: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - } - break; - - default : - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - } - break; - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Encoder Interface in interrupt mode. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Enable the encoder interface channels */ - /* Enable the capture compare Interrupts 1 and/or 2 */ - switch (Channel) - { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - default : - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Encoder Interface in interrupt mode. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 and 2 - (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ - if(Channel == TIM_CHANNEL_1) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts 1 */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - else if(Channel == TIM_CHANNEL_2) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts 2 */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - else - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts 1 and 2 */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Encoder Interface in DMA mode. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @param pData1 The destination Buffer address for IC1. - * @param pData2 The destination Buffer address for IC2. - * @param Length The length of data to be transferred from TIM peripheral to memory. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length); - - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError; - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length); - - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - } - break; - - case TIM_CHANNEL_ALL: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length); - - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - default: - break; - } - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Encoder Interface in DMA mode. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 and 2 - (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ - if(Channel == TIM_CHANNEL_1) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the capture compare DMA Request 1 */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - else if(Channel == TIM_CHANNEL_2) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare DMA Request 2 */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - else - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare DMA Request 1 and 2 */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ -/** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management - * @brief IRQ handler management - * -@verbatim - ============================================================================== - ##### IRQ handler management ##### - ============================================================================== - [..] - This section provides Timer IRQ handler function. - -@endverbatim - * @{ - */ -/** - * @brief This function handles TIM interrupts requests. - * @param htim TIM handle - * @retval None - */ -void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) -{ - /* Capture compare 1 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) - { - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - - /* Input capture event */ - if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - } - /* Capture compare 2 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - /* Input capture event */ - if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - /* Capture compare 3 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - /* Input capture event */ - if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - /* Capture compare 4 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - /* Input capture event */ - if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - /* TIM Update event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - HAL_TIM_PeriodElapsedCallback(htim); - } - } - /* TIM Break input event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); - HAL_TIMEx_BreakCallback(htim); - } - } - /* TIM Trigger detection event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - HAL_TIM_TriggerCallback(htim); - } - } - /* TIM commutation event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); - HAL_TIMEx_CommutationCallback(htim); - } - } -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. - (+) Configure External Clock source. - (+) Configure Complementary channels, break features and dead time. - (+) Configure Master and the Slave synchronization. - (+) Configure the DMA Burst Mode. - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the TIM Output Compare Channels according to the specified - * parameters in the TIM_OC_InitTypeDef. - * @param htim TIM Output Compare handle - * @param sConfig TIM Output Compare configuration structure - * @param Channel TIM Channels to configure - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, - TIM_OC_InitTypeDef* sConfig, - uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CHANNELS(Channel)); - assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 1 in Output Compare */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 2 in Output Compare */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_3: - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 3 in Output Compare */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_4: - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 4 in Output Compare */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_5: - { - /* Check the parameters */ - assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 5 in Output Compare */ - TIM_OC5_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_6: - { - /* Check the parameters */ - assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 6 in Output Compare */ - TIM_OC6_SetConfig(htim->Instance, sConfig); - } - break; - - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Input Capture Channels according to the specified - * parameters in the TIM_IC_InitTypeDef. - * @param htim TIM IC handle - * @param sConfig TIM Input Capture configuration structure - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity)); - assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - if (Channel == TIM_CHANNEL_1) - { - /* TI1 Configuration */ - TIM_TI1_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - - /* Set the IC1PSC value */ - htim->Instance->CCMR1 |= sConfig->ICPrescaler; - } - else if (Channel == TIM_CHANNEL_2) - { - /* TI2 Configuration */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_TI2_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC2PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; - - /* Set the IC2PSC value */ - htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8); - } - else if (Channel == TIM_CHANNEL_3) - { - /* TI3 Configuration */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - TIM_TI3_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC3PSC Bits */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; - - /* Set the IC3PSC value */ - htim->Instance->CCMR2 |= sConfig->ICPrescaler; - } - else - { - /* TI4 Configuration */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - TIM_TI4_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC4PSC Bits */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; - - /* Set the IC4PSC value */ - htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8); - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM PWM channels according to the specified - * parameters in the TIM_OC_InitTypeDef. - * @param htim TIM PWM handle - * @param sConfig TIM PWM configuration structure - * @param Channel TIM Channels to be configured - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, - TIM_OC_InitTypeDef* sConfig, - uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CHANNELS(Channel)); - assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Configure the Channel 1 in PWM mode */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; - htim->Instance->CCMR1 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Configure the Channel 2 in PWM mode */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; - htim->Instance->CCMR1 |= sConfig->OCFastMode << 8; - } - break; - - case TIM_CHANNEL_3: - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Configure the Channel 3 in PWM mode */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; - htim->Instance->CCMR2 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_4: - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Configure the Channel 4 in PWM mode */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; - htim->Instance->CCMR2 |= sConfig->OCFastMode << 8; - } - break; - - case TIM_CHANNEL_5: - { - /* Check the parameters */ - assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); - - /* Configure the Channel 5 in PWM mode */ - TIM_OC5_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel5*/ - htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; - htim->Instance->CCMR3 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_6: - { - /* Check the parameters */ - assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); - - /* Configure the Channel 5 in PWM mode */ - TIM_OC6_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel6 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; - htim->Instance->CCMR3 |= sConfig->OCFastMode << 8; - } - break; - - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM One Pulse Channels according to the specified - * parameters in the TIM_OnePulse_InitTypeDef. - * @param htim TIM One Pulse handle - * @param sConfig TIM One Pulse configuration structure - * @param OutputChannel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @param InputChannel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel) -{ - TIM_OC_InitTypeDef temp1; - - /* Check the parameters */ - assert_param(IS_TIM_OPM_CHANNELS(OutputChannel)); - assert_param(IS_TIM_OPM_CHANNELS(InputChannel)); - - if(OutputChannel != InputChannel) - { - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Extract the Ouput compare configuration from sConfig structure */ - temp1.OCMode = sConfig->OCMode; - temp1.Pulse = sConfig->Pulse; - temp1.OCPolarity = sConfig->OCPolarity; - temp1.OCNPolarity = sConfig->OCNPolarity; - temp1.OCIdleState = sConfig->OCIdleState; - temp1.OCNIdleState = sConfig->OCNIdleState; - - switch (OutputChannel) - { - case TIM_CHANNEL_1: - { - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - TIM_OC1_SetConfig(htim->Instance, &temp1); - } - break; - case TIM_CHANNEL_2: - { - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_OC2_SetConfig(htim->Instance, &temp1); - } - break; - default: - break; - } - - switch (InputChannel) - { - case TIM_CHANNEL_1: - { - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity, - sConfig->ICSelection, sConfig->ICFilter); - - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - - /* Select the Trigger source */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI1FP1; - - /* Select the Slave Mode */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; - } - break; - case TIM_CHANNEL_2: - { - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity, - sConfig->ICSelection, sConfig->ICFilter); - - /* Reset the IC2PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; - - /* Select the Trigger source */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI2FP2; - - /* Select the Slave Mode */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; - } - break; - - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral - * @param htim TIM handle - * @param BurstBaseAddress TIM Base address from when the DMA will starts the Data write - * This parameters can be on of the following values: - * @arg TIM_DMABASE_CR1 - * @arg TIM_DMABASE_CR2 - * @arg TIM_DMABASE_SMCR - * @arg TIM_DMABASE_DIER - * @arg TIM_DMABASE_SR - * @arg TIM_DMABASE_EGR - * @arg TIM_DMABASE_CCMR1 - * @arg TIM_DMABASE_CCMR2 - * @arg TIM_DMABASE_CCER - * @arg TIM_DMABASE_CNT - * @arg TIM_DMABASE_PSC - * @arg TIM_DMABASE_ARR - * @arg TIM_DMABASE_RCR - * @arg TIM_DMABASE_CCR1 - * @arg TIM_DMABASE_CCR2 - * @arg TIM_DMABASE_CCR3 - * @arg TIM_DMABASE_CCR4 - * @arg TIM_DMABASE_BDTR - * @arg TIM_DMABASE_DCR - * @param BurstRequestSrc TIM DMA Request sources - * This parameters can be on of the following values: - * @arg TIM_DMA_UPDATE: TIM update Interrupt source - * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source - * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source - * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source - * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source - * @arg TIM_DMA_COM: TIM Commutation DMA source - * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source - * @param BurstBuffer The Buffer address. - * @param BurstLength DMA Burst length. This parameter can be one value - * between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, - uint32_t* BurstBuffer, uint32_t BurstLength) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); - assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - assert_param(IS_TIM_DMA_LENGTH(BurstLength)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((BurstBuffer == 0 ) && (BurstLength > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_COM: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_TRIGGER: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - default: - break; - } - /* configure the DMA Burst Mode */ - htim->Instance->DCR = BurstBaseAddress | BurstLength; - - /* Enable the TIM DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); - - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM DMA Burst mode - * @param htim TIM handle - * @param BurstRequestSrc TIM DMA Request sources to disable - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - - /* Abort the DMA transfer (at least disable the DMA channel) */ - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]); - } - break; - case TIM_DMA_CC1: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]); - } - break; - case TIM_DMA_CC2: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]); - } - break; - case TIM_DMA_CC3: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]); - } - break; - case TIM_DMA_CC4: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]); - } - break; - case TIM_DMA_COM: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]); - } - break; - case TIM_DMA_TRIGGER: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]); - } - break; - default: - break; - } - - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory - * @param htim TIM handle - * @param BurstBaseAddress TIM Base address from when the DMA will starts the Data read - * This parameters can be on of the following values: - * @arg TIM_DMABASE_CR1 - * @arg TIM_DMABASE_CR2 - * @arg TIM_DMABASE_SMCR - * @arg TIM_DMABASE_DIER - * @arg TIM_DMABASE_SR - * @arg TIM_DMABASE_EGR - * @arg TIM_DMABASE_CCMR1 - * @arg TIM_DMABASE_CCMR2 - * @arg TIM_DMABASE_CCER - * @arg TIM_DMABASE_CNT - * @arg TIM_DMABASE_PSC - * @arg TIM_DMABASE_ARR - * @arg TIM_DMABASE_RCR - * @arg TIM_DMABASE_CCR1 - * @arg TIM_DMABASE_CCR2 - * @arg TIM_DMABASE_CCR3 - * @arg TIM_DMABASE_CCR4 - * @arg TIM_DMABASE_BDTR - * @arg TIM_DMABASE_DCR - * @param BurstRequestSrc TIM DMA Request sources - * This parameters can be on of the following values: - * @arg TIM_DMA_UPDATE: TIM update Interrupt source - * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source - * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source - * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source - * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source - * @arg TIM_DMA_COM: TIM Commutation DMA source - * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source - * @param BurstBuffer The Buffer address. - * @param BurstLength DMA Burst length. This parameter can be one value - * between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, - uint32_t *BurstBuffer, uint32_t BurstLength) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); - assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - assert_param(IS_TIM_DMA_LENGTH(BurstLength)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((BurstBuffer == 0 ) && (BurstLength > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_COM: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_TRIGGER: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - default: - break; - } - - /* configure the DMA Burst Mode */ - htim->Instance->DCR = BurstBaseAddress | BurstLength; - - /* Enable the TIM DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); - - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stop the DMA burst reading - * @param htim TIM handle - * @param BurstRequestSrc TIM DMA Request sources to disable. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - - /* Abort the DMA transfer (at least disable the DMA channel) */ - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]); - } - break; - case TIM_DMA_CC1: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]); - } - break; - case TIM_DMA_CC2: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]); - } - break; - case TIM_DMA_CC3: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]); - } - break; - case TIM_DMA_CC4: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]); - } - break; - case TIM_DMA_COM: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]); - } - break; - case TIM_DMA_TRIGGER: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]); - } - break; - default: - break; - } - - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Generate a software event - * @param htim TIM handle - * @param EventSource specifies the event source. - * This parameter can be one of the following values: - * @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source - * @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source - * @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source - * @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source - * @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source - * @arg TIM_EVENTSOURCE_COM: Timer COM event source - * @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source - * @arg TIM_EVENTSOURCE_BREAK: Timer Break event source - * @arg TIM_EVENTSOURCE_BREAK2: Timer Break2 event source - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_EVENT_SOURCE(EventSource)); - - /* Process Locked */ - __HAL_LOCK(htim); - - /* Change the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - - /* Set the event sources */ - htim->Instance->EGR = EventSource; - - /* Change the TIM state */ - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Configures the OCRef clear feature - * @param htim TIM handle - * @param sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that - * contains the OCREF clear feature and parameters for the TIM peripheral. - * @param Channel specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @arg TIM_Channel_4: TIM Channel 4 - * @arg TIM_Channel_5: TIM Channel 5 - * @arg TIM_Channel_6: TIM Channel 6 - * @retval None - */ -HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, - TIM_ClearInputConfigTypeDef *sClearInputConfig, - uint32_t Channel) -{ - uint32_t tmpsmcr = 0; - - /* Check the parameters */ - assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); - assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); - - /* Process Locked */ - __HAL_LOCK(htim); - - switch (sClearInputConfig->ClearInputSource) - { - case TIM_CLEARINPUTSOURCE_NONE: - { - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* Clear the OCREF clear selection bit */ - tmpsmcr &= ~TIM_SMCR_OCCS; - - /* Clear the ETR Bits */ - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - - /* Set TIMx_SMCR */ - htim->Instance->SMCR = tmpsmcr; - } - break; - - case TIM_CLEARINPUTSOURCE_OCREFCLR: - { - /* Clear the OCREF clear selection bit */ - htim->Instance->SMCR &= ~TIM_SMCR_OCCS; - } - break; - - case TIM_CLEARINPUTSOURCE_ETR: - { - /* Check the parameters */ - assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity)); - assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); - assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); - - TIM_ETR_SetConfig(htim->Instance, - sClearInputConfig->ClearInputPrescaler, - sClearInputConfig->ClearInputPolarity, - sClearInputConfig->ClearInputFilter); - - /* Set the OCREF clear selection bit */ - htim->Instance->SMCR |= TIM_SMCR_OCCS; - } - break; - - default: - break; - } - - switch (Channel) - { - case TIM_CHANNEL_1: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE; - } - else - { - /* Disable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE; - } - } - break; - case TIM_CHANNEL_2: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE; - } - else - { - /* Disable the OCREF clear feature for Channel 2 */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE; - } - } - break; - case TIM_CHANNEL_3: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE; - } - else - { - /* Disable the OCREF clear feature for Channel 3 */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE; - } - } - break; - case TIM_CHANNEL_4: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE; - } - else - { - /* Disable the OCREF clear feature for Channel 4 */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE; - } - } - break; - case TIM_CHANNEL_5: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC5CE; - } - else - { - /* Disable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5CE; - } - } - break; - case TIM_CHANNEL_6: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC6CE; - } - else - { - /* Disable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6CE; - } - } - break; - default: - break; - } - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the clock source to be used - * @param htim TIM handle - * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that - * contains the clock source information for the TIM peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig) -{ - uint32_t tmpsmcr = 0; - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Check the parameters */ - assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); - - /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ - tmpsmcr = htim->Instance->SMCR; - tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - htim->Instance->SMCR = tmpsmcr; - - switch (sClockSourceConfig->ClockSource) - { - case TIM_CLOCKSOURCE_INTERNAL: - { - assert_param(IS_TIM_INSTANCE(htim->Instance)); - /* Disable slave mode to clock the prescaler directly with the internal clock */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - } - break; - - case TIM_CLOCKSOURCE_ETRMODE1: - { - /* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/ - assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); - - /* Check ETR input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - /* Configure the ETR Clock source */ - TIM_ETR_SetConfig(htim->Instance, - sClockSourceConfig->ClockPrescaler, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - /* Reset the SMS and TS Bits */ - tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - /* Select the External clock mode1 and the ETRF trigger */ - tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - } - break; - - case TIM_CLOCKSOURCE_ETRMODE2: - { - /* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/ - assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance)); - - /* Check ETR input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - /* Configure the ETR Clock source */ - TIM_ETR_SetConfig(htim->Instance, - sClockSourceConfig->ClockPrescaler, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - /* Enable the External clock mode2 */ - htim->Instance->SMCR |= TIM_SMCR_ECE; - } - break; - - case TIM_CLOCKSOURCE_TI1: - { - /* Check whether or not the timer instance supports external clock mode 1 */ - assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); - - /* Check TI1 input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - TIM_TI1_ConfigInputStage(htim->Instance, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - } - break; - - case TIM_CLOCKSOURCE_TI2: - { - /* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/ - assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); - - /* Check TI2 input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - TIM_TI2_ConfigInputStage(htim->Instance, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - } - break; - - case TIM_CLOCKSOURCE_TI1ED: - { - /* Check whether or not the timer instance supports external clock mode 1 */ - assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); - - /* Check TI1 input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - TIM_TI1_ConfigInputStage(htim->Instance, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - } - break; - - case TIM_CLOCKSOURCE_ITR0: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0); - } - break; - - case TIM_CLOCKSOURCE_ITR1: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1); - } - break; - - case TIM_CLOCKSOURCE_ITR2: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2); - } - break; - - case TIM_CLOCKSOURCE_ITR3: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3); - } - break; - - default: - break; - } - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Selects the signal connected to the TI1 input: direct from CH1_input - * or a XOR combination between CH1_input, CH2_input & CH3_input - * @param htim TIM handle. - * @param TI1_Selection Indicate whether or not channel 1 is connected to the - * output of a XOR gate. - * This parameter can be one of the following values: - * @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input - * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3 - * pins are connected to the TI1 input (XOR combination) - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection) -{ - uint32_t tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TI1SELECTION(TI1_Selection)); - - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - - /* Reset the TI1 selection */ - tmpcr2 &= ~TIM_CR2_TI1S; - - /* Set the TI1 selection */ - tmpcr2 |= TI1_Selection; - - /* Write to TIMxCR2 */ - htim->Instance->CR2 = tmpcr2; - - return HAL_OK; -} - -/** - * @brief Configures the TIM in Slave mode - * @param htim TIM handle. - * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that - * contains the selected trigger (internal trigger input, filtered - * timer input or external trigger input) and the ) and the Slave - * mode (Disable, Reset, Gated, Trigger, External clock mode 1). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig) -{ - /* Check the parameters */ - assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); - assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); - assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); - - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - TIM_SlaveTimer_SetConfig(htim, sSlaveConfig); - - /* Disable Trigger Interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER); - - /* Disable Trigger DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; - } - -/** - * @brief Configures the TIM in Slave mode in interrupt mode - * @param htim TIM handle. - * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that - * contains the selected trigger (internal trigger input, filtered - * timer input or external trigger input) and the ) and the Slave - * mode (Disable, Reset, Gated, Trigger, External clock mode 1). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim, - TIM_SlaveConfigTypeDef * sSlaveConfig) - { - /* Check the parameters */ - assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); - assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); - assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); - - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - TIM_SlaveTimer_SetConfig(htim, sSlaveConfig); - - /* Enable Trigger Interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER); - - /* Disable Trigger DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; - } - -/** - * @brief Read the captured value from Capture Compare unit - * @param htim TIM handle. - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval Captured value - */ -uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - uint32_t tmpreg = 0; - - __HAL_LOCK(htim); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Return the capture 1 value */ - tmpreg = htim->Instance->CCR1; - - break; - } - case TIM_CHANNEL_2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Return the capture 2 value */ - tmpreg = htim->Instance->CCR2; - - break; - } - - case TIM_CHANNEL_3: - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Return the capture 3 value */ - tmpreg = htim->Instance->CCR3; - - break; - } - - case TIM_CHANNEL_4: - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Return the capture 4 value */ - tmpreg = htim->Instance->CCR4; - - break; - } - - default: - break; - } - - __HAL_UNLOCK(htim); - return tmpreg; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions - * @brief TIM Callbacks functions - * -@verbatim - ============================================================================== - ##### TIM Callbacks functions ##### - ============================================================================== - [..] - This section provides TIM callback functions: - (+) Timer Period elapsed callback - (+) Timer Output Compare callback - (+) Timer Input capture callback - (+) Timer Trigger callback - (+) Timer Error callback - -@endverbatim - * @{ - */ - -/** - * @brief Period elapsed callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file - */ - -} -/** - * @brief Output Compare callback in non-blocking mode - * @param htim TIM OC handle - * @retval None - */ -__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file - */ -} -/** - * @brief Input Capture callback in non-blocking mode - * @param htim TIM IC handle - * @retval None - */ -__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_IC_CaptureCallback could be implemented in the user file - */ -} - -/** - * @brief PWM Pulse finished callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file - */ -} - -/** - * @brief Hall Trigger detection callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_TriggerCallback could be implemented in the user file - */ -} - -/** - * @brief Timer error callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_ErrorCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - ============================================================================== - ##### Peripheral State functions ##### - ============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the TIM Base handle state. - * @param htim TIM Base handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM OC handle state. - * @param htim TIM Ouput Compare handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM PWM handle state. - * @param htim TIM handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM Input Capture handle state. - * @param htim TIM IC handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM One Pulse Mode handle state. - * @param htim TIM OPM handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM Encoder Mode handle state. - * @param htim TIM Encoder handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @} - */ - -/** - * @brief TIM DMA error callback - * @param hdma pointer to DMA handle. - * @retval None - */ -void TIM_DMAError(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIM_ErrorCallback(htim); -} - -/** - * @brief TIM DMA Delay Pulse complete callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - if (hdma == htim->hdma[TIM_DMA_ID_CC1]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - } - - HAL_TIM_PWM_PulseFinishedCallback(htim); - - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; -} -/** - * @brief TIM DMA Capture complete callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - if (hdma == htim->hdma[TIM_DMA_ID_CC1]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - } - - HAL_TIM_IC_CaptureCallback(htim); - - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; -} - -/** - * @brief TIM DMA Period Elapse complete callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIM_PeriodElapsedCallback(htim); -} - -/** - * @brief TIM DMA Trigger callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIM_TriggerCallback(htim); -} - -/** - * @brief Time Base configuration - * @param TIMx TIM peripheral - * @param Structure TIM Base configuration structure - * @retval None - */ -void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) -{ - uint32_t tmpcr1 = 0; - tmpcr1 = TIMx->CR1; - - /* Set TIM Time Base Unit parameters ---------------------------------------*/ - if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - { - /* Select the Counter Mode */ - tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - tmpcr1 |= Structure->CounterMode; - } - - if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - { - /* Set the clock division */ - tmpcr1 &= ~TIM_CR1_CKD; - tmpcr1 |= (uint32_t)Structure->ClockDivision; - } - - /* Set the auto-reload preload */ - tmpcr1 &= ~TIM_CR1_ARPE; - tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; - - TIMx->CR1 = tmpcr1; - - /* Set the Autoreload value */ - TIMx->ARR = (uint32_t)Structure->Period ; - - /* Set the Prescaler value */ - TIMx->PSC = (uint32_t)Structure->Prescaler; - - if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - { - /* Set the Repetition Counter value */ - TIMx->RCR = Structure->RepetitionCounter; - } - - /* Generate an update event to reload the Prescaler - and the repetition counter(only for TIM1 and TIM8) value immediately */ - TIMx->EGR = TIM_EGR_UG; -} - -/** - * @brief Time Ouput Compare 1 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= ~TIM_CCER_CC1E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~TIM_CCMR1_OC1M; - tmpccmrx &= ~TIM_CCMR1_CC1S; - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC1P; - /* Set the Output Compare Polarity */ - tmpccer |= OC_Config->OCPolarity; - - if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) - { - /* Check parameters */ - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC1NP; - /* Set the Output N Polarity */ - tmpccer |= OC_Config->OCNPolarity; - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC1NE; - } - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS1; - tmpcr2 &= ~TIM_CR2_OIS1N; - /* Set the Output Idle state */ - tmpcr2 |= OC_Config->OCIdleState; - /* Set the Output N Idle state */ - tmpcr2 |= OC_Config->OCNIdleState; - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR1 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Time Ouput Compare 2 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR1_OC2M; - tmpccmrx &= ~TIM_CCMR1_CC2S; - - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC2P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 4); - - if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) - { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC2NP; - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 4); - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC2NE; - - } - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS2; - tmpcr2 &= ~TIM_CR2_OIS2N; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 2); - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 2); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR2 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Time Ouput Compare 3 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 3: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC3M; - tmpccmrx &= ~TIM_CCMR2_CC3S; - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC3P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 8); - - if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) - { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC3NP; - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 8); - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC3NE; - } - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS3; - tmpcr2 &= ~TIM_CR2_OIS3N; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 4); - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 4); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR3 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Time Ouput Compare 4 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC4M; - tmpccmrx &= ~TIM_CCMR2_CC4S; - - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC4P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 12); - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS4; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 6); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR4 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Timer Ouput Compare 5 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the output: Reset the CCxE Bit */ - TIMx->CCER &= ~TIM_CCER_CC5E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR3; - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~(TIM_CCMR3_OC5M); - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC5P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 16); - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS5; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 8); - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR3 */ - TIMx->CCMR3 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR5 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Timer Ouput Compare 6 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the output: Reset the CCxE Bit */ - TIMx->CCER &= ~TIM_CCER_CC6E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR3; - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~(TIM_CCMR3_OC6M); - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= (uint32_t)~TIM_CCER_CC6P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 20); - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS6; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 10); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR3 */ - TIMx->CCMR3 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR6 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, - TIM_SlaveConfigTypeDef * sSlaveConfig) -{ - uint32_t tmpsmcr = 0; - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* Reset the Trigger Selection Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - /* Set the Input Trigger source */ - tmpsmcr |= sSlaveConfig->InputTrigger; - - /* Reset the slave mode Bits */ - tmpsmcr &= ~TIM_SMCR_SMS; - /* Set the slave mode */ - tmpsmcr |= sSlaveConfig->SlaveMode; - - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - - /* Configure the trigger prescaler, filter, and polarity */ - switch (sSlaveConfig->InputTrigger) - { - case TIM_TS_ETRF: - { - /* Check the parameters */ - assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler)); - assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - /* Configure the ETR Trigger source */ - TIM_ETR_SetConfig(htim->Instance, - sSlaveConfig->TriggerPrescaler, - sSlaveConfig->TriggerPolarity, - sSlaveConfig->TriggerFilter); - } - break; - - case TIM_TS_TI1F_ED: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = htim->Instance->CCER; - htim->Instance->CCER &= ~TIM_CCER_CC1E; - tmpccmr1 = htim->Instance->CCMR1; - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4); - - /* Write to TIMx CCMR1 and CCER registers */ - htim->Instance->CCMR1 = tmpccmr1; - htim->Instance->CCER = tmpccer; - - } - break; - - case TIM_TS_TI1FP1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - - /* Configure TI1 Filter and Polarity */ - TIM_TI1_ConfigInputStage(htim->Instance, - sSlaveConfig->TriggerPolarity, - sSlaveConfig->TriggerFilter); - } - break; - - case TIM_TS_TI2FP2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - - /* Configure TI2 Filter and Polarity */ - TIM_TI2_ConfigInputStage(htim->Instance, - sSlaveConfig->TriggerPolarity, - sSlaveConfig->TriggerFilter); - } - break; - - case TIM_TS_ITR0: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - case TIM_TS_ITR1: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - case TIM_TS_ITR2: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - case TIM_TS_ITR3: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - default: - break; - } -} - -/** - * @brief Configure the TI1 as Input. - * @param TIMx to select the TIM peripheral. - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1. - * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2. - * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC. - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1 - * (on channel2 path) is used as the input signal. Therefore CCMR1 must be - * protected against un-initialized filter and polarity values. - */ -void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= ~TIM_CCER_CC1E; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - - /* Select the Input */ - if(IS_TIM_CC2_INSTANCE(TIMx) != RESET) - { - tmpccmr1 &= ~TIM_CCMR1_CC1S; - tmpccmr1 |= TIM_ICSelection; - } - else - { - tmpccmr1 |= TIM_CCMR1_CC1S_0; - } - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - tmpccmr1 |= ((TIM_ICFilter << 4) & TIM_CCMR1_IC1F); - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the Polarity and Filter for TI1. - * @param TIMx to select the TIM peripheral. - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = TIMx->CCER; - TIMx->CCER &= ~TIM_CCER_CC1E; - tmpccmr1 = TIMx->CCMR1; - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - tmpccmr1 |= (TIM_ICFilter << 4); - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - tmpccer |= TIM_ICPolarity; - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI2 as Input. - * @param TIMx to select the TIM peripheral - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2. - * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1. - * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC. - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2 - * (on channel1 path) is used as the input signal. Therefore CCMR1 must be - * protected against un-initialized filter and polarity values. - */ -static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - - /* Select the Input */ - tmpccmr1 &= ~TIM_CCMR1_CC2S; - tmpccmr1 |= (TIM_ICSelection << 8); - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - tmpccmr1 |= ((TIM_ICFilter << 12) & TIM_CCMR1_IC2F); - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - tmpccer |= ((TIM_ICPolarity << 4) & (TIM_CCER_CC2P | TIM_CCER_CC2NP)); - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the Polarity and Filter for TI2. - * @param TIMx to select the TIM peripheral. - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - tmpccmr1 |= (TIM_ICFilter << 12); - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - tmpccer |= (TIM_ICPolarity << 4); - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI3 as Input. - * @param TIMx to select the TIM peripheral - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3. - * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4. - * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC. - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4 - * (on channel1 path) is used as the input signal. Therefore CCMR2 must be - * protected against un-initialized filter and polarity values. - */ -static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr2 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 3: Reset the CC3E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; - - /* Select the Input */ - tmpccmr2 &= ~TIM_CCMR2_CC3S; - tmpccmr2 |= TIM_ICSelection; - - /* Set the filter */ - tmpccmr2 &= ~TIM_CCMR2_IC3F; - tmpccmr2 |= ((TIM_ICFilter << 4) & TIM_CCMR2_IC3F); - - /* Select the Polarity and set the CC3E Bit */ - tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP); - tmpccer |= ((TIM_ICPolarity << 8) & (TIM_CCER_CC3P | TIM_CCER_CC3NP)); - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI4 as Input. - * @param TIMx to select the TIM peripheral - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4. - * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3. - * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC. - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3 - * (on channel1 path) is used as the input signal. Therefore CCMR2 must be - * protected against un-initialized filter and polarity values. - * @retval None - */ -static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr2 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; - - /* Select the Input */ - tmpccmr2 &= ~TIM_CCMR2_CC4S; - tmpccmr2 |= (TIM_ICSelection << 8); - - /* Set the filter */ - tmpccmr2 &= ~TIM_CCMR2_IC4F; - tmpccmr2 |= ((TIM_ICFilter << 12) & TIM_CCMR2_IC4F); - - /* Select the Polarity and set the CC4E Bit */ - tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP); - tmpccer |= ((TIM_ICPolarity << 12) & (TIM_CCER_CC4P | TIM_CCER_CC4NP)); - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - TIMx->CCER = tmpccer ; -} - -/** - * @brief Selects the Input Trigger source - * @param TIMx to select the TIM peripheral - * @param InputTriggerSource The Input Trigger source. - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal Trigger 0 - * @arg TIM_TS_ITR1: Internal Trigger 1 - * @arg TIM_TS_ITR2: Internal Trigger 2 - * @arg TIM_TS_ITR3: Internal Trigger 3 - * @arg TIM_TS_TI1F_ED: TI1 Edge Detector - * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 - * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 - * @arg TIM_TS_ETRF: External Trigger input - * @retval None - */ -static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t InputTriggerSource) -{ - uint32_t tmpsmcr = 0; - - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - /* Reset the TS Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - /* Set the Input Trigger source and the slave mode*/ - tmpsmcr |= InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1; - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} -/** - * @brief Configures the TIMx External Trigger (ETR). - * @param TIMx to select the TIM peripheral - * @param TIM_ExtTRGPrescaler The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ETRPRESCALER_DIV1 : ETRP Prescaler OFF. - * @arg TIM_ETRPRESCALER_DIV2 : ETRP frequency divided by 2. - * @arg TIM_ETRPRESCALER_DIV4 : ETRP frequency divided by 4. - * @arg TIM_ETRPRESCALER_DIV8 : ETRP frequency divided by 8. - * @param TIM_ExtTRGPolarity The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ETRPOLARITY_INVERTED : active low or falling edge active. - * @arg TIM_ETRPOLARITY_NONINVERTED : active high or rising edge active. - * @param ExtTRGFilter External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) -{ - uint32_t tmpsmcr = 0; - - tmpsmcr = TIMx->SMCR; - - /* Reset the ETR Bits */ - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - - /* Set the Prescaler, the Filter value and the Polarity */ - tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8))); - - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} - -/** - * @brief Enables or disables the TIM Capture Compare Channel x. - * @param TIMx to select the TIM peripheral - * @param Channel specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 - * @arg TIM_CHANNEL_2: TIM Channel 2 - * @arg TIM_CHANNEL_3: TIM Channel 3 - * @arg TIM_CHANNEL_4: TIM Channel 4 - * @param ChannelState: specifies the TIM Channel CCxE bit new state. - * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable. - * @retval None - */ -void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState) -{ - uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(TIMx)); - assert_param(IS_TIM_CHANNELS(Channel)); - - tmp = TIM_CCER_CC1E << Channel; - - /* Reset the CCxE Bit */ - TIMx->CCER &= ~tmp; - - /* Set or reset the CCxE Bit */ - TIMx->CCER |= (uint32_t)(ChannelState << Channel); -} - - -/** - * @} - */ - -#endif /* HAL_TIM_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c deleted file mode 100644 index 754c1a71..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +++ /dev/null @@ -1,2243 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim_ex.c - * @author MCD Application Team - * @brief TIM HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Timer Extended peripheral: - * + Time Hall Sensor Interface Initialization - * + Time Hall Sensor Interface Start - * + Time Complementary signal break and dead time configuration - * + Time Master and Slave synchronization configuration - * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6) - * + Time OCRef clear configuration - * + Timer remapping capabilities configuration - @verbatim - ============================================================================== - ##### TIMER Extended features ##### - ============================================================================== - [..] - The Timer Extended features include: - (#) Complementary outputs with programmable dead-time for : - (++) Output Compare - (++) PWM generation (Edge and Center-aligned Mode) - (++) One-pulse mode output - (#) Synchronization circuit to control the timer with external signals and to - interconnect several timers together. - (#) Break input to put the timer output signals in reset state or in a known state. - (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for - positioning purposes - - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Initialize the TIM low level resources by implementing the following functions - depending on the selected feature: - (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit() - - (#) Initialize the TIM low level resources : - (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); - (##) TIM pins configuration - (+++) Enable the clock for the TIM GPIOs using the following function: - __HAL_RCC_GPIOx_CLK_ENABLE(); - (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); - - (#) The external Clock can be configured, if needed (the default clock is the - internal clock from the APBx), using the following function: - HAL_TIM_ConfigClockSource, the clock configuration should be done before - any start function. - - (#) Configure the TIM in the desired functioning mode using one of the - initialization function of this driver: - (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutationEvent(): to use the - Timer Hall Sensor Interface and the commutation event with the corresponding - Interrupt and DMA request if needed (Note that One Timer is used to interface - with the Hall sensor Interface and another Timer should be used to use - the commutation event). - - (#) Activate the TIM peripheral using one of the start functions: - (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() - (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() - (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() - (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). - - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** -*/ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup TIMEx TIMEx - * @brief TIM Extended HAL module driver - * @{ - */ - -#ifdef HAL_TIM_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -#define BDTR_BKF_SHIFT (16) -#define BDTR_BK2F_SHIFT (20) -#define TIMx_ETRSEL_MASK ((uint32_t)0x0003C000) - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); - -/* Private functions ---------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions - * @{ - */ - -/** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions - * @brief Timer Hall Sensor functions - * -@verbatim - ============================================================================== - ##### Timer Hall Sensor functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure TIM HAL Sensor. - (+) De-initialize TIM HAL Sensor. - (+) Start the Hall Sensor Interface. - (+) Stop the Hall Sensor Interface. - (+) Start the Hall Sensor Interface and enable interrupts. - (+) Stop the Hall Sensor Interface and disable interrupts. - (+) Start the Hall Sensor Interface and enable DMA transfers. - (+) Stop the Hall Sensor Interface and disable DMA transfers. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle. - * @param htim TIM Encoder Interface handle - * @param sConfig TIM Hall Sensor configuration structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) -{ - TIM_OC_InitTypeDef OC_Config; - - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIMEx_HallSensor_MspInit(htim); - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - - /* Configure the Time base in the Encoder Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ - TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); - - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - /* Set the IC1PSC value */ - htim->Instance->CCMR1 |= sConfig->IC1Prescaler; - - /* Enable the Hall sensor interface (XOR function of the three inputs) */ - htim->Instance->CR2 |= TIM_CR2_TI1S; - - /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI1F_ED; - - /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; - - /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ - OC_Config.OCFastMode = TIM_OCFAST_DISABLE; - OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; - OC_Config.OCMode = TIM_OCMODE_PWM2; - OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; - OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; - OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; - OC_Config.Pulse = sConfig->Commutation_Delay; - - TIM_OC2_SetConfig(htim->Instance, &OC_Config); - - /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 - register to 101 */ - htim->Instance->CR2 &= ~TIM_CR2_MMS; - htim->Instance->CR2 |= TIM_TRGO_OC2REF; - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM Hall Sensor interface - * @param htim TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIMEx_HallSensor_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Hall Sensor MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Hall Sensor MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Hall Sensor Interface. - * @param htim TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - /* Enable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Hall sensor Interface. - * @param htim TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1, 2 and 3 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Hall Sensor Interface in interrupt mode. - * @param htim TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - /* Enable the capture compare Interrupts 1 event */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - - /* Enable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Hall Sensor Interface in interrupt mode. - * @param htim TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts event */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Hall Sensor Interface in DMA mode. - * @param htim TIM Hall Sensor handle - * @param pData The destination Buffer address. - * @param Length The length of data to be transferred from TIM peripheral to memory. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - /* Enable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - - /* Set the DMA Input Capture 1 Callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel for Capture 1*/ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); - - /* Enable the capture compare 1 Interrupt */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Hall Sensor Interface in DMA mode. - * @param htim TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - - /* Disable the capture compare Interrupts 1 event */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions - * @brief Timer Complementary Output Compare functions - * -@verbatim - ============================================================================== - ##### Timer Complementary Output Compare functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Start the Complementary Output Compare/PWM. - (+) Stop the Complementary Output Compare/PWM. - (+) Start the Complementary Output Compare/PWM and enable interrupts. - (+) Stop the Complementary Output Compare/PWM and disable interrupts. - (+) Start the Complementary Output Compare/PWM and enable DMA transfers. - (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Starts the TIM Output Compare signal generation on the complementary - * output. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation on the complementary - * output. - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in interrupt mode - * on the complementary output. - * @param htim TIM OC handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the TIM Break interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); - - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in interrupt mode - * on the complementary output. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - uint32_t tmpccer = 0; - - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the TIM Break interrupt (only if no more channel is active) */ - tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) - { - __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); - } - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in DMA mode - * on the complementary output. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @param pData The source Buffer address. - * @param Length The length of data to be transferred from memory to TIM peripheral - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: -{ - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in DMA mode - * on the complementary output. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Output Compare DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Output Compare DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Output Compare DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions - * @brief Timer Complementary PWM functions - * -@verbatim - ============================================================================== - ##### Timer Complementary PWM functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Start the Complementary PWM. - (+) Stop the Complementary PWM. - (+) Start the Complementary PWM and enable interrupts. - (+) Stop the Complementary PWM and disable interrupts. - (+) Start the Complementary PWM and enable DMA transfers. - (+) Stop the Complementary PWM and disable DMA transfers. - (+) Start the Complementary Input Capture measurement. - (+) Stop the Complementary Input Capture. - (+) Start the Complementary Input Capture and enable interrupts. - (+) Stop the Complementary Input Capture and disable interrupts. - (+) Start the Complementary Input Capture and enable DMA transfers. - (+) Stop the Complementary Input Capture and disable DMA transfers. - (+) Start the Complementary One Pulse generation. - (+) Stop the Complementary One Pulse. - (+) Start the Complementary One Pulse and enable interrupts. - (+) Stop the Complementary One Pulse and disable interrupts. - -@endverbatim - * @{ - */ - -/** - * @brief Starts the PWM signal generation on the complementary output. - * @param htim TIM handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation on the complementary output. - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the PWM signal generation in interrupt mode on the - * complementary output. - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the TIM Break interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation in interrupt mode on the - * complementary output. - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - uint32_t tmpccer = 0; - - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - - /* Disable the TIM Break interrupt (only if no more channel is active) */ - tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) - { - __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); - } - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM PWM signal generation in DMA mode on the - * complementary output - * @param htim TIM handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @param pData The source Buffer address. - * @param Length The length of data to be transferred from memory to TIM peripheral - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM PWM signal generation in DMA mode on the complementary - * output - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions - * @brief Timer Complementary One Pulse functions - * -@verbatim - ============================================================================== - ##### Timer Complementary One Pulse functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Start the Complementary One Pulse generation. - (+) Stop the Complementary One Pulse. - (+) Start the Complementary One Pulse and enable interrupts. - (+) Stop the Complementary One Pulse and disable interrupts. - -@endverbatim - * @{ - */ - -/** - * @brief Starts the TIM One Pulse signal generation on the complementary - * output. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) - { - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Enable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation on the complementary - * output. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Disable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM One Pulse signal generation in interrupt mode on the - * complementary channel. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - - /* Enable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation in interrupt mode on the - * complementary channel. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - - /* Disable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Configure the commutation event in case of use of the Hall sensor interface. - (+) Configure Output channels for OC and PWM mode. - - (+) Configure Complementary channels, break features and dead time. - (+) Configure Master synchronization. - (+) Configure timer remapping capabilities. - (+) Enable or disable channel grouping - -@endverbatim - * @{ - */ - -/** - * @brief Configure the TIM commutation event sequence. - * @note This function is mandatory to use the commutation event in order to - * update the configuration at each commutation detection on the TRGI input of the Timer, - * the typical use of this feature is with the use of another Timer(interface Timer) - * configured in Hall sensor interface, this interface Timer will generate the - * commutation at its TRGO output (connected to Timer used in this function) each time - * the TI1 of the Interface Timer detect a commutation at its input TI1. - * @param htim TIM handle - * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal trigger 0 selected - * @arg TIM_TS_ITR1: Internal trigger 1 selected - * @arg TIM_TS_ITR2: Internal trigger 2 selected - * @arg TIM_TS_ITR3: Internal trigger 3 selected - * @arg TIM_TS_NONE: No trigger is needed - * @param CommutationSource the Commutation Event source - * This parameter can be one of the following values: - * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer - * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); - assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - - __HAL_LOCK(htim); - - if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || - (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) - { - /* Select the Input trigger */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= InputTrigger; - } - - /* Select the Capture Compare preload feature */ - htim->Instance->CR2 |= TIM_CR2_CCPC; - /* Select the Commutation event source */ - htim->Instance->CR2 &= ~TIM_CR2_CCUS; - htim->Instance->CR2 |= CommutationSource; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configure the TIM commutation event sequence with interrupt. - * @note This function is mandatory to use the commutation event in order to - * update the configuration at each commutation detection on the TRGI input of the Timer, - * the typical use of this feature is with the use of another Timer(interface Timer) - * configured in Hall sensor interface, this interface Timer will generate the - * commutation at its TRGO output (connected to Timer used in this function) each time - * the TI1 of the Interface Timer detect a commutation at its input TI1. - * @param htim TIM handle - * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal trigger 0 selected - * @arg TIM_TS_ITR1: Internal trigger 1 selected - * @arg TIM_TS_ITR2: Internal trigger 2 selected - * @arg TIM_TS_ITR3: Internal trigger 3 selected - * @arg TIM_TS_NONE: No trigger is needed - * @param CommutationSource the Commutation Event source - * This parameter can be one of the following values: - * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer - * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); - assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - - __HAL_LOCK(htim); - - if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || - (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) - { - /* Select the Input trigger */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= InputTrigger; - } - - /* Select the Capture Compare preload feature */ - htim->Instance->CR2 |= TIM_CR2_CCPC; - /* Select the Commutation event source */ - htim->Instance->CR2 &= ~TIM_CR2_CCUS; - htim->Instance->CR2 |= CommutationSource; - - /* Enable the Commutation Interrupt Request */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configure the TIM commutation event sequence with DMA. - * @note This function is mandatory to use the commutation event in order to - * update the configuration at each commutation detection on the TRGI input of the Timer, - * the typical use of this feature is with the use of another Timer(interface Timer) - * configured in Hall sensor interface, this interface Timer will generate the - * commutation at its TRGO output (connected to Timer used in this function) each time - * the TI1 of the Interface Timer detect a commutation at its input TI1. - * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set - * @param htim TIM handle - * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal trigger 0 selected - * @arg TIM_TS_ITR1: Internal trigger 1 selected - * @arg TIM_TS_ITR2: Internal trigger 2 selected - * @arg TIM_TS_ITR3: Internal trigger 3 selected - * @arg TIM_TS_NONE: No trigger is needed - * @param CommutationSource the Commutation Event source - * This parameter can be one of the following values: - * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer - * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); - assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - - __HAL_LOCK(htim); - - if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || - (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) - { - /* Select the Input trigger */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= InputTrigger; - } - - /* Select the Capture Compare preload feature */ - htim->Instance->CR2 |= TIM_CR2_CCPC; - /* Select the Commutation event source */ - htim->Instance->CR2 &= ~TIM_CR2_CCUS; - htim->Instance->CR2 |= CommutationSource; - - /* Enable the Commutation DMA Request */ - /* Set the DMA Commutation Callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; - - /* Enable the Commutation DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the TIM in master mode. - * @param htim TIM handle. - * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that - * contains the selected trigger output (TRGO) and the Master/Slave - * mode. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, - TIM_MasterConfigTypeDef * sMasterConfig) -{ - uint32_t tmpcr2; - uint32_t tmpsmcr; - - /* Check the parameters */ - assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); - assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); - - /* Check input state */ - __HAL_LOCK(htim); - - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ - if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - { - /* Check the parameters */ - assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); - - /* Clear the MMS2 bits */ - tmpcr2 &= ~TIM_CR2_MMS2; - /* Select the TRGO2 source*/ - tmpcr2 |= sMasterConfig->MasterOutputTrigger2; - } - - /* Reset the MMS Bits */ - tmpcr2 &= ~TIM_CR2_MMS; - /* Select the TRGO source */ - tmpcr2 |= sMasterConfig->MasterOutputTrigger; - - /* Reset the MSM Bit */ - tmpsmcr &= ~TIM_SMCR_MSM; - /* Set master mode */ - tmpsmcr |= sMasterConfig->MasterSlaveMode; - - /* Update TIMx CR2 */ - htim->Instance->CR2 = tmpcr2; - - /* Update TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State - * and the AOE(automatic output enable). - * @param htim TIM handle - * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that - * contains the BDTR Register configuration information for the TIM peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, - TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig) -{ - uint32_t tmpbdtr = 0; - - /* Check the parameters */ - assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); - assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); - assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); - assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); - assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); - assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); - assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); - assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter)); - assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); - - /* Check input state */ - __HAL_LOCK(htim); - - /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, - the OSSI State, the dead time value and the Automatic Output Enable Bit */ - - /* Set the BDTR bits */ - MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); - MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); - MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); - MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); - MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); - MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); - MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); - MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, sBreakDeadTimeConfig->AutomaticOutput); - MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT)); - - if (IS_TIM_BKIN2_INSTANCE(htim->Instance)) - { - /* Check the parameters */ - assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State)); - assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); - assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); - - /* Set the BREAK2 input related BDTR bits */ - MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT)); - MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State); - MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity); - } - - /* Set TIMx_BDTR */ - htim->Instance->BDTR = tmpbdtr; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the break input source. - * @param htim TIM handle. - * @param BreakInput Break input to configure - * This parameter can be one of the following values: - * @arg TIM_BREAKINPUT_BRK: Timer break input - * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input - * @param sBreakInputConfig Break input source configuration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, - uint32_t BreakInput, - TIMEx_BreakInputConfigTypeDef *sBreakInputConfig) - -{ - uint32_t tmporx = 0; - uint32_t bkin_enable_mask = 0; - uint32_t bkin_polarity_mask = 0; - uint32_t bkin_enable_bitpos = 0; - uint32_t bkin_polarity_bitpos = 0; - - /* Check the parameters */ - assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); - assert_param(IS_TIM_BREAKINPUT(BreakInput)); - assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source)); - assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable)); - -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1) - { - assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity)); - } -#else - assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity)); -#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - - /* Check input state */ - __HAL_LOCK(htim); - - switch(sBreakInputConfig->Source) - { - case TIM_BREAKINPUTSOURCE_BKIN: - { - bkin_enable_mask = TIM1_OR2_BKINE; - bkin_enable_bitpos = 0; - bkin_polarity_mask = TIM1_OR2_BKINP; - bkin_polarity_bitpos = 9; - } - break; - case TIM_BREAKINPUTSOURCE_COMP1: - { - bkin_enable_mask = TIM1_OR2_BKCMP1E; - bkin_enable_bitpos = 1; - bkin_polarity_mask = TIM1_OR2_BKCMP1P; - bkin_polarity_bitpos = 10; - } - break; - case TIM_BREAKINPUTSOURCE_COMP2: - { - bkin_enable_mask = TIM1_OR2_BKCMP2E; - bkin_enable_bitpos = 2; - bkin_polarity_mask = TIM1_OR2_BKCMP2P; - bkin_polarity_bitpos = 11; - } - break; - -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - case TIM_BREAKINPUTSOURCE_DFSDM1: - { - bkin_enable_mask = TIM1_OR2_BKDF1BK0E; - bkin_enable_bitpos = 8; - } - break; -#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - - default: - break; - } - - switch(BreakInput) - { - case TIM_BREAKINPUT_BRK: - { - /* Get the TIMx_OR2 register value */ - tmporx = htim->Instance->OR2; - - /* Enable the break input */ - tmporx &= ~bkin_enable_mask; - tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask; - - /* Set the break input polarity */ -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1) -#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - { - tmporx &= ~bkin_polarity_mask; - tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask; - } - - /* Set TIMx_OR2 */ - htim->Instance->OR2 = tmporx; - } - break; - case TIM_BREAKINPUT_BRK2: - { - /* Get the TIMx_OR3 register value */ - tmporx = htim->Instance->OR3; - - /* Enable the break input */ - tmporx &= ~bkin_enable_mask; - tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask; - - /* Set the break input polarity */ -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1) -#endif /* STM32L451xx || STM32L452xx || STM32L462xx */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - { - tmporx &= ~bkin_polarity_mask; - tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask; - } - - /* Set TIMx_OR3 */ - htim->Instance->OR3 = tmporx; - } - break; - default: - break; - } - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the TIMx Remapping input capabilities. - * @param htim TIM handle. - * @param Remap: specifies the TIM remapping source. - * - @if STM32L486xx - * For TIM1, the parameter is a combination of 4 fields (field1 | field2 | field3 | field4): - * - * field1 can have the following values: - * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog) - * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1 - * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2 - * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3 - * - * field2 can have the following values: - * @arg TIM_TIM1_ETR_ADC3_NONE: TIM1_ETR is not connected to any ADC3 AWD (analog watchdog) - * @arg TIM_TIM1_ETR_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1 - * @arg TIM_TIM1_ETR_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2 - * @arg TIM_TIM1_ETR_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3 - * - * field3 can have the following values: - * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO - * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output - * - * field4 can have the following values: - * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output - * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output - * @note When field4 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 and field2 values are not significant - @endif - @if STM32L443xx - * For TIM1, the parameter is a combination of 3 fields (field1 | field2 | field3): - * - * field1 can have the following values: - * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog) - * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1 - * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2 - * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3 - * - * field2 can have the following values: - * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO - * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output - * - * field3 can have the following values: - * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output - * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output - * - * @note When field3 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 values is not significant - * - @endif - @if STM32L486xx - * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3): - * - * field1 can have the following values: - * @arg TIM_TIM2_ITR1_TIM8_TRGO: TIM2_ITR1 is connected to TIM8_TRGO - * @arg TIM_TIM2_ITR1_OTG_FS_SOF: TIM2_ITR1 is connected to OTG_FS SOF - * - * field2 can have the following values: - * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO - * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE - * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output - * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output - * - * field3 can have the following values: - * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO - * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output - * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output - * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output - @endif - @if STM32L443xx - * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3): - * - * field1 can have the following values: - * @arg TIM_TIM2_ITR1_NONE: No internal trigger on TIM2_ITR1 - * @arg TIM_TIM2_ITR1_USB_SOF: TIM2_ITR1 is connected to USB SOF - * - * field2 can have the following values: - * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO - * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE - * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output - * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output - * - * field3 can have the following values: - * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO - * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output - * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output - * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output - * - @endif - @if STM32L486xx - * For TIM3, the parameter is a combination 2 fields(field1 | field2): - * - * field1 can have the following values: - * @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO - * @arg TIM_TIM3_TI1_COMP1: TIM3 TI1 is connected to COMP1 output - * @arg TIM_TIM3_TI1_COMP2: TIM3 TI1 is connected to COMP2 output - * @arg TIM_TIM3_TI1_COMP1_COMP2: TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output - * - * field2 can have the following values: - * @arg TIM_TIM3_ETR_GPIO: TIM3_ETR is connected to GPIO - * @arg TIM_TIM3_ETR_COMP1: TIM3_ETR is connected to COMP1 output - * - @endif - @if STM32L486xx - * For TIM8, the parameter is a combination of 3 fields (field1 | field2 | field3): - * - * field1 can have the following values: - * @arg TIM_TIM8_ETR_ADC2_NONE: TIM8_ETR is not connected to any ADC2 AWD (analog watchdog) - * @arg TIM_TIM8_ETR_ADC2_AWD1: TIM8_ETR is connected to ADC2 AWD1 - * @arg TIM_TIM8_ETR_ADC2_AWD2: TIM8_ETR is connected to ADC2 AWD2 - * @arg TIM_TIM8_ETR_ADC2_AWD3: TIM8_ETR is connected to ADC2 AWD3 - * - * field2 can have the following values: - * @arg TIM_TIM8_ETR_ADC3_NONE: TIM8_ETR is not connected to any ADC3 AWD (analog watchdog) - * @arg TIM_TIM8_ETR_ADC3_AWD1: TIM8_ETR is connected to ADC3 AWD1 - * @arg TIM_TIM8_ETR_ADC3_AWD2: TIM8_ETR is connected to ADC3 AWD2 - * @arg TIM_TIM8_ETR_ADC3_AWD3: TIM8_ETR is connected to ADC3 AWD3 - * - * field3 can have the following values: - * @arg TIM_TIM8_TI1_GPIO: TIM8 TI1 is connected to GPIO - * @arg TIM_TIM8_TI1_COMP2: TIM8 TI1 is connected to COMP2 output - * - * field4 can have the following values: - * @arg TIM_TIM8_ETR_COMP1: TIM8_ETR is connected to COMP1 output - * @arg TIM_TIM8_ETR_COMP2: TIM8_ETR is connected to COMP2 output - * @note When field4 is set to TIM_TIM8_ETR_COMP1 or TIM_TIM8_ETR_COMP2 field1 and field2 values are not significant - * - @endif - * For TIM15, the parameter is a combination of 3 fields (field1 | field2): - * - * field1 can have the following values: - * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO - * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE - * - * field2 can have the following values: - * @arg TIM_TIM15_ENCODERMODE_NONE: No redirection - * @arg TIM_TIM15_ENCODERMODE_TIM2: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively - * @arg TIM_TIM15_ENCODERMODE_TIM3: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively - * @arg TIM_TIM15_ENCODERMODE_TIM4: TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively - * - @if STM32L486xx - * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO - * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI - * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE - * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt - * - @endif - @if STM32L443xx - * For TIM16, the parameter can have the following values: - * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO - * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI - * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE - * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt - * @arg TIM_TIM16_TI1_MSI: TIM16 TI1 is connected to MSI (contraints: MSI clock < 1/4 TIM APB clock) - * @arg TIM_TIM16_TI1_HSE_32: TIM16 TI1 is connected to HSE div 32 (note that HSE div 32 must be selected as RTC clock source) - * @arg TIM_TIM16_TI1_MCO: TIM16 TI1 is connected to MCO - * - @endif - @if STM32L486xx - * For TIM17, the parameter can have the following values: - * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO - * @arg TIM_TIM17_TI1_MSI: TIM17 TI1 is connected to MSI (contraints: MSI clock < 1/4 TIM APB clock) - * @arg TIM_TIM17_TI1_HSE_32: TIM17 TI1 is connected to HSE div 32 - * @arg TIM_TIM17_TI1_MCO: TIM17 TI1 is connected to MCO - @endif - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) -{ - uint32_t tmpor1 = 0; - uint32_t tmpor2 = 0; - - __HAL_LOCK(htim); - - /* Check parameters */ - assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); - assert_param(IS_TIM_REMAP(Remap)); - - /* Set ETR_SEL bit field (if required) */ - if (IS_TIM_ETRSEL_INSTANCE(htim->Instance)) - { - tmpor2 = htim->Instance->OR2; - tmpor2 &= ~TIMx_ETRSEL_MASK; - tmpor2 |= (Remap & TIMx_ETRSEL_MASK); - - /* Set TIMx_OR2 */ - htim->Instance->OR2 = tmpor2; - } - - /* Set other remapping capabilities */ - tmpor1 = Remap; - tmpor1 &= ~TIMx_ETRSEL_MASK; - - /* Set TIMx_OR1 */ - htim->Instance->OR1 = tmpor1; - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Group channel 5 and channel 1, 2 or 3 - * @param htim TIM handle. - * @param Channels specifies the reference signal(s) the OC5REF is combined with. - * This parameter can be any combination of the following values: - * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC - * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF - * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF - * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels) -{ - /* Check parameters */ - assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_GROUPCH5(Channels)); - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Clear GC5Cx bit fields */ - htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3|TIM_CCR5_GC5C2|TIM_CCR5_GC5C1); - - /* Set GC5Cx bit fields */ - htim->Instance->CCR5 |= Channels; - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions - * @brief Extended Callbacks functions - * -@verbatim - ============================================================================== - ##### Extended Callbacks functions ##### - ============================================================================== - [..] - This section provides Extended TIM callback functions: - (+) Timer Commutation callback - (+) Timer Break callback - -@endverbatim - * @{ - */ - -/** - * @brief Hall commutation changed callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_CommutationCallback could be implemented in the user file - */ -} - -/** - * @brief Hall Break detection callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_BreakCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions - * @brief Extended Peripheral State functions - * -@verbatim - ============================================================================== - ##### Extended Peripheral State functions ##### - ============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the TIM Hall Sensor interface handle state. - * @param htim TIM Hall Sensor handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @} - */ - -/** - * @brief TIM DMA Commutation callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIMEx_CommutationCallback(htim); -} - -/** - * @brief Enables or disables the TIM Capture Compare Channel xN. - * @param TIMx to select the TIM peripheral - * @param Channel specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @param ChannelNState specifies the TIM Channel CCxNE bit new state. - * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. - * @retval None - */ -static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) -{ - uint32_t tmp = 0; - - tmp = TIM_CCER_CC1NE << Channel; - - /* Reset the CCxNE Bit */ - TIMx->CCER &= ~tmp; - - /* Set or reset the CCxNE Bit */ - TIMx->CCER |= (uint32_t)(ChannelNState << Channel); -} - -/** - * @} - */ - -#endif /* HAL_TIM_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c deleted file mode 100644 index 7cbb8588..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c +++ /dev/null @@ -1,3448 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_uart.c - * @author MCD Application Team - * @brief UART HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * - * - @verbatim - =============================================================================== - ##### How to use this driver ##### - =============================================================================== - [..] - The UART HAL driver can be used as follows: - - (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart). - (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API: - (++) Enable the USARTx interface clock. - (++) UART pins configuration: - (+++) Enable the clock for the UART GPIOs. - (+++) Configure these UART pins as alternate function pull-up. - (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT() - and HAL_UART_Receive_IT() APIs): - (+++) Configure the USARTx interrupt priority. - (+++) Enable the NVIC USART IRQ handle. - (++) UART interrupts handling: - -@@- The specific UART interrupts (Transmission complete interrupt, - RXNE interrupt, RX/TX FIFOs related interrupts and Error Interrupts) - are managed using the macros __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() - inside the transmit and receive processes. - (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA() - and HAL_UART_Receive_DMA() APIs): - (+++) Declare a DMA handle structure for the Tx/Rx channel. - (+++) Enable the DMAx interface clock. - (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. - (+++) Configure the DMA Tx/Rx channel. - (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle. - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel. - - (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Prescaler value , Hardware - flow control and Mode (Receiver/Transmitter) in the huart handle Init structure. - - (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...) - in the huart handle AdvancedInit structure. - - (#) For the UART asynchronous mode, initialize the UART registers by calling - the HAL_UART_Init() API. - - (#) For the UART Half duplex mode, initialize the UART registers by calling - the HAL_HalfDuplex_Init() API. - - (#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers - by calling the HAL_LIN_Init() API. - - (#) For the UART Multiprocessor mode, initialize the UART registers - by calling the HAL_MultiProcessor_Init() API. - - (#) For the UART RS485 Driver Enabled mode, initialize the UART registers - by calling the HAL_RS485Ex_Init() API. - - [..] - (@) These API's (HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Init(), - also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by - calling the customized HAL_UART_MspInit() API. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup UART UART - * @brief HAL UART module driver - * @{ - */ - -#ifdef HAL_UART_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup UART_Private_Constants UART Private Constants - * @{ - */ -#if defined(USART_CR1_FIFOEN) -#define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \ - USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8| \ - USART_CR1_FIFOEN )) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */ -#else -#define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \ - USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8 )) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */ -#endif - -#if defined(USART_CR1_FIFOEN) -#define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT| \ - USART_CR3_TXFTCFG | USART_CR3_RXFTCFG )) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */ -#else -#define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */ -#endif - -#define LPUART_BRR_MIN 0x00000300U /* LPUART BRR minimum authorized value */ -#define LPUART_BRR_MAX 0x000FFFFFU /* LPUART BRR maximum authorized value */ - -#define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */ -#define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup UART_Private_Functions - * @{ - */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart); -static void UART_EndRxTransfer(UART_HandleTypeDef *huart); -static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma); -static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); -static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); -static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma); -static void UART_DMAError(DMA_HandleTypeDef *hdma); -static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma); -static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_TxISR_8BIT(UART_HandleTypeDef *huart); -static void UART_TxISR_16BIT(UART_HandleTypeDef *huart); -#if defined(USART_CR1_FIFOEN) -static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart); -static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart); -#endif -static void UART_EndTransmit_IT(UART_HandleTypeDef *huart); -static void UART_RxISR_8BIT(UART_HandleTypeDef *huart); -static void UART_RxISR_16BIT(UART_HandleTypeDef *huart); -#if defined(USART_CR1_FIFOEN) -static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart); -static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart); -#endif - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup UART_Exported_Functions UART Exported Functions - * @{ - */ - -/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim -=============================================================================== - ##### Initialization and Configuration functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to initialize the USARTx or the UARTy - in asynchronous mode. - (+) For the asynchronous mode the parameters below can be configured: - (++) Baud Rate - (++) Word Length - (++) Stop Bit - (++) Parity: If the parity is enabled, then the MSB bit of the data written - in the data register is transmitted but is changed by the parity bit. - (++) Hardware flow control - (++) Receiver/transmitter modes - (++) Over Sampling Method - (++) One-Bit Sampling Method - (+) For the asynchronous mode, the following advanced features can be configured as well: - (++) TX and/or RX pin level inversion - (++) data logical level inversion - (++) RX and TX pins swap - (++) RX overrun detection disabling - (++) DMA disabling on RX error - (++) MSB first on communication line - (++) auto Baud rate detection - [..] - The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessor_Init()API - follow respectively the UART asynchronous, UART Half duplex, UART LIN mode - and UART multiprocessor mode configuration procedures (details for the procedures - are available in reference manual). - -@endverbatim - - Depending on the frame length defined by the M1 and M0 bits (7-bit, - 8-bit or 9-bit), the possible UART formats are listed in the - following table. - - Table 1. UART frame format. - +-----------------------------------------------------------------------+ - | M1 bit | M0 bit | PCE bit | UART frame | - |---------|---------|-----------|---------------------------------------| - | 0 | 0 | 0 | | SB | 8 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 1 | 0 | | SB | 9 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | - |---------|---------|-----------|---------------------------------------| - | 1 | 0 | 0 | | SB | 7 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | - +-----------------------------------------------------------------------+ - - * @{ - */ - -/** - * @brief Initialize the UART mode according to the specified - * parameters in the UART_InitTypeDef and initialize the associated handle. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE) - { - /* Check the parameters */ - assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance)); - } - else - { - /* Check the parameters */ - assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); - } - - if(huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - { - return HAL_ERROR; - } - - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - - /* In asynchronous mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); -} - -/** - * @brief Initialize the half-duplex mode according to the specified - * parameters in the UART_InitTypeDef and creates the associated handle. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - /* Check UART instance */ - assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance)); - - if(huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - { - return HAL_ERROR; - } - - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - - /* In half-duplex mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); - - /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); -} - - -/** - * @brief Initialize the LIN mode according to the specified - * parameters in the UART_InitTypeDef and creates the associated handle . - * @param huart UART handle. - * @param BreakDetectLength Specifies the LIN break detection length. - * This parameter can be one of the following values: - * @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection - * @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection - * @retval HAL status - */ -HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - /* Check the LIN UART instance */ - assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); - /* Check the Break detection length parameter */ - assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength)); - - /* LIN mode limited to 16-bit oversampling only */ - if(huart->Init.OverSampling == UART_OVERSAMPLING_8) - { - return HAL_ERROR; - } - /* LIN mode limited to 8-bit data length */ - if(huart->Init.WordLength != UART_WORDLENGTH_8B) - { - return HAL_ERROR; - } - - if(huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - { - return HAL_ERROR; - } - - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - - /* In LIN mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN)); - - /* Enable the LIN mode by setting the LINEN bit in the CR2 register */ - SET_BIT(huart->Instance->CR2, USART_CR2_LINEN); - - /* Set the USART LIN Break detection length. */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); -} - - -/** - * @brief Initialize the multiprocessor mode according to the specified - * parameters in the UART_InitTypeDef and initialize the associated handle. - * @param huart UART handle. - * @param Address UART node address (4-, 6-, 7- or 8-bit long). - * @param WakeUpMethod Specifies the UART wakeup method. - * This parameter can be one of the following values: - * @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection - * @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark - * @note If the user resorts to idle line detection wake up, the Address parameter - * is useless and ignored by the initialization function. - * @note If the user resorts to address mark wake up, the address length detection - * is configured by default to 4 bits only. For the UART to be able to - * manage 6-, 7- or 8-bit long addresses detection, the API - * HAL_MultiProcessorEx_AddressLength_Set() must be called after - * HAL_MultiProcessor_Init(). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - /* Check the wake up method parameter */ - assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod)); - - if(huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - { - return HAL_ERROR; - } - - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - - /* In multiprocessor mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN, HDSEL and IREN bits in the USART_CR3 register. */ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - - if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK) - { - /* If address mark wake up method is chosen, set the USART address node */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS)); - } - - /* Set the wake up method by setting the WAKE bit in the CR1 register */ - MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); -} - - -/** - * @brief DeInitialize the UART peripheral. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - huart->Instance->CR1 = 0x0U; - huart->Instance->CR2 = 0x0U; - huart->Instance->CR3 = 0x0U; - - /* DeInit the low level hardware */ - HAL_UART_MspDeInit(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_RESET; - huart->RxState = HAL_UART_STATE_RESET; - - /* Process Unlock */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Initialize the UART MSP. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_MspInit can be implemented in the user file - */ -} - -/** - * @brief DeInitialize the UART MSP. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_MspDeInit can be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup UART_Exported_Functions_Group2 IO operation functions - * @brief UART Transmit/Receive functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - This subsection provides a set of functions allowing to manage the UART asynchronous - and Half duplex data transfers. - - (#) There are two mode of transfer: - (+) Blocking mode: The communication is performed in polling mode. - The HAL status of all data processing is returned by the same function - after finishing transfer. - (+) Non-Blocking mode: The communication is performed using Interrupts - or DMA, These API's return the HAL status. - The end of the data processing will be indicated through the - dedicated UART IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks - will be executed respectively at the end of the transmit or Receive process - The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected - - (#) Blocking mode API's are : - (+) HAL_UART_Transmit() - (+) HAL_UART_Receive() - - (#) Non-Blocking mode API's with Interrupt are : - (+) HAL_UART_Transmit_IT() - (+) HAL_UART_Receive_IT() - (+) HAL_UART_IRQHandler() - - (#) Non-Blocking mode API's with DMA are : - (+) HAL_UART_Transmit_DMA() - (+) HAL_UART_Receive_DMA() - (+) HAL_UART_DMAPause() - (+) HAL_UART_DMAResume() - (+) HAL_UART_DMAStop() - - (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode: - (+) HAL_UART_TxHalfCpltCallback() - (+) HAL_UART_TxCpltCallback() - (+) HAL_UART_RxHalfCpltCallback() - (+) HAL_UART_RxCpltCallback() - (+) HAL_UART_ErrorCallback() - - (#) Non-Blocking mode transfers could be aborted using Abort API's : - (+) HAL_UART_Abort() - (+) HAL_UART_AbortTransmit() - (+) HAL_UART_AbortReceive() - (+) HAL_UART_Abort_IT() - (+) HAL_UART_AbortTransmit_IT() - (+) HAL_UART_AbortReceive_IT() - - (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided: - (+) HAL_UART_AbortCpltCallback() - (+) HAL_UART_AbortTransmitCpltCallback() - (+) HAL_UART_AbortReceiveCpltCallback() - - (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. - Errors are handled as follows : - (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is - to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception . - Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type, - and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side. - If user wants to abort it, Abort services should be called by user. - (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted. - This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. - Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed. - - -@- In the Half duplex communication, it is forbidden to run the transmit - and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful. - -@endverbatim - * @{ - */ - -/** - * @brief Send an amount of data in blocking mode. - * @note When FIFO mode is enabled, writing a data in the TDR register adds one - * data to the TXFIFO. Write operations to the TDR register are performed - * when TXFNF flag is set. From hardware perspective, TXFNF flag and - * TXE are mapped on the same bit-field. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be sent. - * @param Timeout Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint16_t* tmp; - uint32_t tickstart = 0U; - - /* Check that a Tx process is not already ongoing */ - if(huart->gState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_BUSY_TX; - - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - - huart->TxXferSize = Size; - huart->TxXferCount = Size; - - while(huart->TxXferCount > 0U) - { - if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - tmp = (uint16_t*) pData; - huart->Instance->TDR = (*tmp & (uint16_t)0x01FFU); - pData += 2U; - } - else - { - huart->Instance->TDR = (*pData++ & (uint8_t)0xFFU); - } - huart->TxXferCount--; - } - - if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* At end of Tx process, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in blocking mode. - * @note When FIFO mode is enabled, the RXFNE flag is set as long as the RXFIFO - * is not empty. Read operations from the RDR register are performed when - * RXFNE flag is set. From hardware perspective, RXFNE flag and - * RXNE are mapped on the same bit-field. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be received. - * @param Timeout Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint16_t* tmp; - uint16_t uhMask; - uint32_t tickstart = 0; - - /* Check that a Rx process is not already ongoing */ - if(huart->RxState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->RxState = HAL_UART_STATE_BUSY_RX; - - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - - huart->RxXferSize = Size; - huart->RxXferCount = Size; - - /* Computation of UART mask to apply to RDR register */ - UART_MASK_COMPUTATION(huart); - uhMask = huart->Mask; - - /* as long as data have to be received */ - while(huart->RxXferCount > 0U) - { - if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - tmp = (uint16_t*) pData ; - *tmp = (uint16_t)(huart->Instance->RDR & uhMask); - pData +=2U; - } - else - { - *pData++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); - } - huart->RxXferCount--; - } - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Send an amount of data in interrupt mode. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - /* Check that a Tx process is not already ongoing */ - if(huart->gState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->pTxBuffPtr = pData; - huart->TxXferSize = Size; - huart->TxXferCount = Size; - huart->TxISR = NULL; - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_BUSY_TX; - -#if defined(USART_CR1_FIFOEN) - /* Configure Tx interrupt processing */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - /* Set the Tx ISR function pointer according to the data word length */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - huart->TxISR = UART_TxISR_16BIT_FIFOEN; - } - else - { - huart->TxISR = UART_TxISR_8BIT_FIFOEN; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the TX FIFO threshold interrupt */ - SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); - } - else -#endif - { - /* Set the Tx ISR function pointer according to the data word length */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - huart->TxISR = UART_TxISR_16BIT; - } - else - { - huart->TxISR = UART_TxISR_8BIT; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the Transmit Data Register Empty interrupt */ -#if defined(USART_CR1_FIFOEN) - SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); -#else - SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); -#endif - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in interrupt mode. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be received. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - /* Check that a Rx process is not already ongoing */ - if(huart->RxState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->pRxBuffPtr = pData; - huart->RxXferSize = Size; - huart->RxXferCount = Size; - huart->RxISR = NULL; - - /* Computation of UART mask to apply to RDR register */ - UART_MASK_COMPUTATION(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->RxState = HAL_UART_STATE_BUSY_RX; - - /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - -#if defined(USART_CR1_FIFOEN) - /* Configure Rx interrupt processing*/ - if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess)) - { - /* Set the Rx ISR function pointer according to the data word length */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - huart->RxISR = UART_RxISR_16BIT_FIFOEN; - } - else - { - huart->RxISR = UART_RxISR_8BIT_FIFOEN; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - } - else -#endif - { - /* Set the Rx ISR function pointer according to the data word length */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - huart->RxISR = UART_RxISR_16BIT; - } - else - { - huart->RxISR = UART_RxISR_8BIT; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ -#if defined(USART_CR1_FIFOEN) - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); -#else - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE); -#endif - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Send an amount of data in DMA mode. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - /* Check that a Tx process is not already ongoing */ - if(huart->gState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->pTxBuffPtr = pData; - huart->TxXferSize = Size; - huart->TxXferCount = Size; - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_BUSY_TX; - - /* Set the UART DMA transfer complete callback */ - huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; - - /* Set the UART DMA Half transfer complete callback */ - huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; - - /* Set the DMA error callback */ - huart->hdmatx->XferErrorCallback = UART_DMAError; - - /* Set the DMA abort callback */ - huart->hdmatx->XferAbortCallback = NULL; - - /* Enable the UART transmit DMA channel */ - HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size); - - /* Clear the TC flag in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the UART CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in DMA mode. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be received. - * @note When the UART parity is enabled (PCE = 1), the received data contain - * the parity bit (MSB position). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - /* Check that a Rx process is not already ongoing */ - if(huart->RxState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->pRxBuffPtr = pData; - huart->RxXferSize = Size; - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->RxState = HAL_UART_STATE_BUSY_RX; - - /* Set the UART DMA transfer complete callback */ - huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; - - /* Set the UART DMA Half transfer complete callback */ - huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; - - /* Set the DMA error callback */ - huart->hdmarx->XferErrorCallback = UART_DMAError; - - /* Set the DMA abort callback */ - huart->hdmarx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size); - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the UART Parity Error Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - - /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the UART CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Pause the DMA Transfer. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - if ((huart->gState == HAL_UART_STATE_BUSY_TX) && - (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))) - { - /* Disable the UART DMA Tx request */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - } - if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && - (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))) - { - /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the UART DMA Rx request */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Resume the DMA Transfer. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - if(huart->gState == HAL_UART_STATE_BUSY_TX) - { - /* Enable the UART DMA Tx request */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); - } - if(huart->RxState == HAL_UART_STATE_BUSY_RX) - { - /* Clear the Overrun flag before resuming the Rx transfer */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - - /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Enable the UART DMA Rx request */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Stop the DMA Transfer. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) -{ - /* The Lock is not implemented on this API to allow the user application - to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() / - HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback: - indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete - interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of - the stream and the corresponding call back is executed. */ - - /* Stop UART DMA Tx request if ongoing */ - if ((huart->gState == HAL_UART_STATE_BUSY_TX) && - (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx channel */ - if(huart->hdmatx != NULL) - { - HAL_DMA_Abort(huart->hdmatx); - } - - UART_EndTxTransfer(huart); - } - - /* Stop UART DMA Rx request if ongoing */ - if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && - (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel */ - if(huart->hdmarx != NULL) - { - HAL_DMA_Abort(huart->hdmarx); - } - - UART_EndRxTransfer(huart); - } - - return HAL_OK; -} - -/** - * @brief Abort ongoing transfers (blocking mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx and Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) - * - Set handle State to READY - * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the UART DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ - if(huart->hdmatx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmatx->XferAbortCallback = NULL; - - HAL_DMA_Abort(huart->hdmatx); - } - } - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ - if(huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = NULL; - - HAL_DMA_Abort(huart->hdmarx); - } - } - - /* Reset Tx and Rx transfer counters */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* Reset Handle ErrorCode to No Error */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - return HAL_OK; -} - -/** - * @brief Abort ongoing Transmit transfer (blocking mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) - * - Set handle State to READY - * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE and TCIE interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); -#endif - - /* Disable the UART DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ - if(huart->hdmatx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmatx->XferAbortCallback = NULL; - - HAL_DMA_Abort(huart->hdmatx); - } - } - - /* Reset Tx transfer counter */ - huart->TxXferCount = 0U; - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Abort ongoing Receive transfer (blocking mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) - * - Set handle State to READY - * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) -{ - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ - if(huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = NULL; - - HAL_DMA_Abort(huart->hdmarx); - } - } - - /* Reset Rx transfer counter */ - huart->RxXferCount = 0U; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Abort ongoing transfers (Interrupt mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx and Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) - * - Set handle State to READY - * - At abort completion, call user abort complete callback - * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - * considered as completed only when user abort complete callback is executed (not when exiting function). - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) -{ - uint32_t abortcplt = 1U; - - /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised - before any call to DMA Abort functions */ - /* DMA Tx Handle is valid */ - if(huart->hdmatx != NULL) - { - /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. - Otherwise, set it to NULL */ - if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback; - } - else - { - huart->hdmatx->XferAbortCallback = NULL; - } - } - /* DMA Rx Handle is valid */ - if(huart->hdmarx != NULL) - { - /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. - Otherwise, set it to NULL */ - if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback; - } - else - { - huart->hdmarx->XferAbortCallback = NULL; - } - } - - /* Disable the UART DMA Tx request if enabled */ - if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - /* Disable DMA Tx at UART level */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ - if(huart->hdmatx != NULL) - { - /* UART Tx DMA Abort callback has already been initialised : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - - /* Abort DMA TX */ - if(HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) - { - huart->hdmatx->XferAbortCallback = NULL; - } - else - { - abortcplt = 0U; - } - } - } - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ - if(huart->hdmarx != NULL) - { - /* UART Rx DMA Abort callback has already been initialised : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - - /* Abort DMA RX */ - if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - { - huart->hdmarx->XferAbortCallback = NULL; - abortcplt = 1U; - } - else - { - abortcplt = 0U; - } - } - } - - /* if no DMA abort complete callback execution is required => call user Abort Complete callback */ - if (abortcplt == 1U) - { - /* Reset Tx and Rx transfer counters */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - - /* Clear ISR function pointers */ - huart->RxISR = NULL; - huart->TxISR = NULL; - - /* Reset errorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ - HAL_UART_AbortCpltCallback(huart); - } - - return HAL_OK; -} - -/** - * @brief Abort ongoing Transmit transfer (Interrupt mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) - * - Set handle State to READY - * - At abort completion, call user abort complete callback - * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - * considered as completed only when user abort complete callback is executed (not when exiting function). - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE and TCIE interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); -#endif - - /* Disable the UART DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ - if(huart->hdmatx != NULL) - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback; - - /* Abort DMA TX */ - if(HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) - { - /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */ - huart->hdmatx->XferAbortCallback(huart->hdmatx); - } - } - else - { - /* Reset Tx transfer counter */ - huart->TxXferCount = 0U; - - /* Clear TxISR function pointers */ - huart->TxISR = NULL; - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ - HAL_UART_AbortTransmitCpltCallback(huart); - } - } - else - { - /* Reset Tx transfer counter */ - huart->TxXferCount = 0U; - - /* Clear TxISR function pointers */ - huart->TxISR = NULL; - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ - HAL_UART_AbortTransmitCpltCallback(huart); - } - - return HAL_OK; -} - -/** - * @brief Abort ongoing Receive transfer (Interrupt mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) - * - Set handle State to READY - * - At abort completion, call user abort complete callback - * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - * considered as completed only when user abort complete callback is executed (not when exiting function). - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) -{ - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ - if(huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback; - - /* Abort DMA RX */ - if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - { - /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ - huart->hdmarx->XferAbortCallback(huart->hdmarx); - } - } - else - { - /* Reset Rx transfer counter */ - huart->RxXferCount = 0U; - - /* Clear RxISR function pointer */ - huart->pRxBuffPtr = NULL; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ - HAL_UART_AbortReceiveCpltCallback(huart); - } - } - else - { - /* Reset Rx transfer counter */ - huart->RxXferCount = 0U; - - /* Clear RxISR function pointer */ - huart->pRxBuffPtr = NULL; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ - HAL_UART_AbortReceiveCpltCallback(huart); - } - - return HAL_OK; -} - -/** - * @brief Handle UART interrupt request. - * @param huart UART handle. - * @retval None - */ -void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) -{ - uint32_t isrflags = READ_REG(huart->Instance->ISR); - uint32_t cr1its = READ_REG(huart->Instance->CR1); - uint32_t cr3its = READ_REG(huart->Instance->CR3); - uint32_t errorflags; - - /* If no error occurs */ - errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE)); - if (errorflags == RESET) - { - /* UART in mode Receiver ---------------------------------------------------*/ -#if defined(USART_CR1_FIFOEN) - if(((isrflags & USART_ISR_RXNE_RXFNE) != RESET) - && ( ((cr1its & USART_CR1_RXNEIE_RXFNEIE) != RESET) - || ((cr3its & USART_CR3_RXFTIE) != RESET)) ) -#else - if(((isrflags & USART_ISR_RXNE) != RESET) - && ((cr1its & USART_CR1_RXNEIE) != RESET)) -#endif - { - if (huart->RxISR != NULL) {huart->RxISR(huart);} - return; - } - } - - /* If some errors occur */ -#if defined(USART_CR1_FIFOEN) - if( (errorflags != RESET) - && ( (((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != RESET) - || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)) != RESET))) ) -#else - if( (errorflags != RESET) - && ( ((cr3its & USART_CR3_EIE) != RESET) - || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) ) -#endif - { - /* UART parity error interrupt occurred -------------------------------------*/ - if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - - huart->ErrorCode |= HAL_UART_ERROR_PE; - } - - /* UART frame error interrupt occurred --------------------------------------*/ - if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); - - huart->ErrorCode |= HAL_UART_ERROR_FE; - } - - /* UART noise error interrupt occurred --------------------------------------*/ - if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); - - huart->ErrorCode |= HAL_UART_ERROR_NE; - } - - /* UART Over-Run interrupt occurred -----------------------------------------*/ -#if defined(USART_CR1_FIFOEN) - if( ((isrflags & USART_ISR_ORE) != RESET) - &&( ((cr1its & USART_CR1_RXNEIE_RXFNEIE) != RESET) || - ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != RESET))) -#else - if( ((isrflags & USART_ISR_ORE) != RESET) - &&( ((cr1its & USART_CR1_RXNEIE) != RESET) || - ((cr3its & USART_CR3_EIE) != RESET))) -#endif - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - - huart->ErrorCode |= HAL_UART_ERROR_ORE; - } - - /* Call UART Error Call back function if need be --------------------------*/ - if(huart->ErrorCode != HAL_UART_ERROR_NONE) - { - /* UART in mode Receiver ---------------------------------------------------*/ -#if defined(USART_CR1_FIFOEN) - if(((isrflags & USART_ISR_RXNE_RXFNE) != RESET) - && ( ((cr1its & USART_CR1_RXNEIE_RXFNEIE) != RESET) - || ((cr3its & USART_CR3_RXFTIE) != RESET)) ) -#else - if(((isrflags & USART_ISR_RXNE) != RESET) - && ((cr1its & USART_CR1_RXNEIE) != RESET)) -#endif - { - if (huart->RxISR != NULL) {huart->RxISR(huart);} - } - - /* If Overrun error occurs, or if any error occurs in DMA mode reception, - consider error as blocking */ - if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || - (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))) - { - /* Blocking error : transfer is aborted - Set the UART state ready to be able to start again the process, - Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ - UART_EndRxTransfer(huart); - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel */ - if(huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - - /* Abort DMA RX */ - if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - { - /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ - huart->hdmarx->XferAbortCallback(huart->hdmarx); - } - } - else - { - /* Call user error callback */ - HAL_UART_ErrorCallback(huart); - } - } - else - { - /* Call user error callback */ - HAL_UART_ErrorCallback(huart); - } - } - else - { - /* Non Blocking error : transfer could go on. - Error is notified to user through user error callback */ - HAL_UART_ErrorCallback(huart); - huart->ErrorCode = HAL_UART_ERROR_NONE; - } - } - return; - - } /* End if some error occurs */ - - /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ - if(((isrflags & USART_ISR_WUF) != RESET) && ((cr3its & USART_CR3_WUFIE) != RESET)) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); - /* Set the UART state ready to be able to start again the process */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - HAL_UARTEx_WakeupCallback(huart); - return; - } - - /* UART in mode Transmitter ------------------------------------------------*/ -#if defined(USART_CR1_FIFOEN) - if(((isrflags & USART_ISR_TXE_TXFNF) != RESET) - && ( ((cr1its & USART_CR1_TXEIE_TXFNFIE) != RESET) - || ((cr3its & USART_CR3_TXFTIE) != RESET)) ) -#else - if(((isrflags & USART_ISR_TXE) != RESET) - && ((cr1its & USART_CR1_TXEIE) != RESET)) -#endif - { - if (huart->TxISR != NULL) {huart->TxISR(huart);} - return; - } - - /* UART in mode Transmitter (transmission end) -----------------------------*/ - if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) - { - UART_EndTransmit_IT(huart); - return; - } - -#if defined(USART_CR1_FIFOEN) - /* UART TX Fifo Empty occurred ----------------------------------------------*/ - if(((isrflags & USART_ISR_TXFE) != RESET) && ((cr1its & USART_CR1_TXFEIE) != RESET)) - { - HAL_UARTEx_TxFifoEmptyCallback(huart); - return; - } - - /* UART RX Fifo Full occurred ----------------------------------------------*/ - if(((isrflags & USART_ISR_RXFF) != RESET) && ((cr1its & USART_CR1_RXFFIE) != RESET)) - { - HAL_UARTEx_RxFifoFullCallback(huart); - return; - } -#endif -} - -/** - * @brief Tx Transfer completed callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_TxCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Tx Half Transfer completed callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_TxHalfCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Rx Transfer completed callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_RxCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Rx Half Transfer completed callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_RxHalfCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief UART error callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_ErrorCallback can be implemented in the user file. - */ -} - -/** - * @brief UART Abort Complete callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_AbortCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief UART Abort Complete callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief UART Abort Receive Complete callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions - * @brief UART control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the UART. - (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode - (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode - (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode - (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode - (+) UART_SetConfig() API configures the UART peripheral - (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features - (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization - (+) UART_Wakeup_AddressConfig() API configures the wake-up from stop mode parameters - (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter - (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver - (+) HAL_LIN_SendBreak() API transmits the break characters -@endverbatim - * @{ - */ - -/** - * @brief Enable UART in mute mode (does not mean UART enters mute mode; - * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called). - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Enable USART mute mode by setting the MME bit in the CR1 register */ - SET_BIT(huart->Instance->CR1, USART_CR1_MME); - - huart->gState = HAL_UART_STATE_READY; - - return (UART_CheckIdleState(huart)); -} - -/** - * @brief Disable UART mute mode (does not mean the UART actually exits mute mode - * as it may not have been in mute mode at this very moment). - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable USART mute mode by clearing the MME bit in the CR1 register */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME); - - huart->gState = HAL_UART_STATE_READY; - - return (UART_CheckIdleState(huart)); -} - -/** - * @brief Enter UART mute mode (means UART actually enters mute mode). - * @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called. - * @param huart UART handle. - * @retval None - */ -void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart) -{ - __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST); -} - -/** - * @brief Enable the UART transmitter and disable the UART receiver. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - huart->gState = HAL_UART_STATE_BUSY; - - /* Clear TE and RE bits */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); - - /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */ - SET_BIT(huart->Instance->CR1, USART_CR1_TE); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Enable the UART receiver and disable the UART transmitter. - * @param huart UART handle. - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - huart->gState = HAL_UART_STATE_BUSY; - - /* Clear TE and RE bits */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); - - /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */ - SET_BIT(huart->Instance->CR1, USART_CR1_RE); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - - -/** - * @brief Transmit break characters. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart) -{ - /* Check the parameters */ - assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Send break characters */ - SET_BIT(huart->Instance->RQR, UART_SENDBREAK_REQUEST); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions - * @brief UART Peripheral State functions - * -@verbatim - ============================================================================== - ##### Peripheral State and Error functions ##### - ============================================================================== - [..] - This subsection provides functions allowing to : - (+) Return the UART handle state. - (+) Return the UART handle error code - -@endverbatim - * @{ - */ - -/** - * @brief Return the UART handle state. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART. - * @retval HAL state - */ -HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart) -{ - uint32_t temp1= 0x00U, temp2 = 0x00U; - temp1 = huart->gState; - temp2 = huart->RxState; - - return (HAL_UART_StateTypeDef)(temp1 | temp2); -} - -/** -* @brief Return the UART handle error code. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART. -* @retval UART Error Code -*/ -uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart) -{ - return huart->ErrorCode; -} -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup UART_Private_Functions UART Private Functions - * @{ - */ - -/** - * @brief Configure the UART peripheral. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) -{ - uint32_t tmpreg = 0x00000000U; - UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED; - uint16_t brrtemp = 0x0000U; - uint32_t usartdiv = 0x00000000U; - HAL_StatusTypeDef ret = HAL_OK; - uint32_t lpuart_ker_ck_pres = 0x00000000U; - - /* Check the parameters */ - assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate)); - assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); - if(UART_INSTANCE_LOWPOWER(huart)) - { - assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits)); - } - else - { - assert_param(IS_UART_STOPBITS(huart->Init.StopBits)); - assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling)); - } - - assert_param(IS_UART_PARITY(huart->Init.Parity)); - assert_param(IS_UART_MODE(huart->Init.Mode)); - assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl)); - assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); -#if defined(USART_PRESC_PRESCALER) - assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler)); -#endif - - /*-------------------------- USART CR1 Configuration -----------------------*/ - /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure - * the UART Word Length, Parity, Mode and oversampling: - * set the M bits according to huart->Init.WordLength value - * set PCE and PS bits according to huart->Init.Parity value - * set TE and RE bits according to huart->Init.Mode value - * set OVER8 bit according to huart->Init.OverSampling value */ - tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - - /*-------------------------- USART CR2 Configuration -----------------------*/ - /* Configure the UART Stop Bits: Set STOP[13:12] bits according - * to huart->Init.StopBits value */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - - /*-------------------------- USART CR3 Configuration -----------------------*/ - /* Configure - * - UART HardWare Flow Control: set CTSE and RTSE bits according - * to huart->Init.HwFlowCtl value - * - one-bit sampling method versus three samples' majority rule according - * to huart->Init.OneBitSampling (not applicable to LPUART) - * - set TXFTCFG bit according to huart->Init.TxFifoThreshold value - * - set RXFTCFG bit according to huart->Init.RxFifoThreshold value */ - tmpreg = (uint32_t)huart->Init.HwFlowCtl; - - if (!(UART_INSTANCE_LOWPOWER(huart))) - { - tmpreg |= huart->Init.OneBitSampling; - } - MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - -#if defined(USART_PRESC_PRESCALER) - /*-------------------------- USART PRESC Configuration -----------------------*/ - /* Configure - * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */ - MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); -#endif - - /*-------------------------- USART BRR Configuration -----------------------*/ - UART_GETCLOCKSOURCE(huart, clocksource); - - /* Check LPUART instance */ - if(UART_INSTANCE_LOWPOWER(huart)) - { - /* Retrieve frequency clock */ - switch (clocksource) - { - case UART_CLOCKSOURCE_PCLK1: -#if defined(USART_PRESC_PRESCALER) - lpuart_ker_ck_pres = (HAL_RCC_GetPCLK1Freq()/UARTPrescTable[huart->Init.ClockPrescaler]); -#else - lpuart_ker_ck_pres = HAL_RCC_GetPCLK1Freq(); -#endif - break; - case UART_CLOCKSOURCE_HSI: -#if defined(USART_PRESC_PRESCALER) - lpuart_ker_ck_pres = ((uint32_t)HSI_VALUE/UARTPrescTable[huart->Init.ClockPrescaler]); -#else - lpuart_ker_ck_pres = (uint32_t)HSI_VALUE; -#endif - break; - case UART_CLOCKSOURCE_SYSCLK: -#if defined(USART_PRESC_PRESCALER) - lpuart_ker_ck_pres = (HAL_RCC_GetSysClockFreq()/UARTPrescTable[huart->Init.ClockPrescaler]); -#else - lpuart_ker_ck_pres = HAL_RCC_GetSysClockFreq(); -#endif - break; - case UART_CLOCKSOURCE_LSE: -#if defined(USART_PRESC_PRESCALER) - lpuart_ker_ck_pres = ((uint32_t)LSE_VALUE/UARTPrescTable[huart->Init.ClockPrescaler]); -#else - lpuart_ker_ck_pres = (uint32_t)LSE_VALUE; -#endif - break; - case UART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - /* if proper clock source reported */ - if (lpuart_ker_ck_pres != 0U) - { - /* ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */ - if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || - (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) - { - ret = HAL_ERROR; - } - else - { - switch (clocksource) - { - case UART_CLOCKSOURCE_PCLK1: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_HSI: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint32_t)(UART_DIV_LPUART(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint32_t)(UART_DIV_LPUART(HSI_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_SYSCLK: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_LSE: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint32_t)(UART_DIV_LPUART(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint32_t)(UART_DIV_LPUART(LSE_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - /* It is forbidden to write values lower than 0x300 in the LPUART_BRR register */ - if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX)) - { - huart->Instance->BRR = usartdiv; - } - else - { - ret = HAL_ERROR; - } - } /* if ( (tmpreg < (3 * huart->Init.BaudRate) ) || (tmpreg > (4096 * huart->Init.BaudRate) )) */ - } /* if (tmpreg != 0) */ - } - /* Check UART Over Sampling to set Baud Rate Register */ - else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - { - switch (clocksource) - { - case UART_CLOCKSOURCE_PCLK1: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_PCLK2: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_HSI: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_SYSCLK: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_LSE: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - /* USARTDIV must be greater than or equal to 0d16 */ - if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - { - brrtemp = usartdiv & 0xFFF0U; - brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - huart->Instance->BRR = brrtemp; - } - else - { - ret = HAL_ERROR; - } - } - else - { - switch (clocksource) - { - case UART_CLOCKSOURCE_PCLK1: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_PCLK2: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_HSI: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_SYSCLK: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_LSE: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - /* USARTDIV must be greater than or equal to 0d16 */ - if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - { - huart->Instance->BRR = usartdiv; - } - else - { - ret = HAL_ERROR; - } - } - -#if defined(USART_CR1_FIFOEN) - /* Initialize the number of data to process during RX/TX ISR execution */ - huart->NbTxDataToProcess = 1; - huart->NbRxDataToProcess = 1; -#endif - - /* Clear ISR function pointers */ - huart->RxISR = NULL; - huart->TxISR = NULL; - - return ret; -} - -/** - * @brief Configure the UART peripheral advanced features. - * @param huart UART handle. - * @retval None - */ -void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) -{ - /* Check whether the set of advanced features to configure is properly set */ - assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); - - /* if required, configure TX pin active level inversion */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - { - assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - } - - /* if required, configure RX pin active level inversion */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - { - assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - } - - /* if required, configure data inversion */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - { - assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - } - - /* if required, configure RX/TX pins swap */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - { - assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - } - - /* if required, configure RX overrun detection disabling */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - { - assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); - MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - } - - /* if required, configure DMA disabling on reception error */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - { - assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); - MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - } - - /* if required, configure auto Baud rate detection scheme */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - { - assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); - assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - /* set auto Baudrate detection parameters if detection is enabled */ - if(huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - { - assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - } - } - - /* if required, configure MSB first on communication line */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - { - assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - } -} - -/** - * @brief Check the UART Idle State. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) -{ - uint32_t tickstart = 0U; - - /* Initialize the UART ErrorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - - /* Check if the Transmitter is enabled */ - if((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - { - /* Wait until TEACK flag is set */ - if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - { - /* Timeout occurred */ - return HAL_TIMEOUT; - } - } - /* Check if the Receiver is enabled */ - if((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - { - /* Wait until REACK flag is set */ - if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - { - /* Timeout occurred */ - return HAL_TIMEOUT; - } - } - - /* Initialize the UART State */ - huart->gState= HAL_UART_STATE_READY; - huart->RxState= HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Handle UART Communication Timeout. - * @param huart UART handle. - * @param Flag Specifies the UART flag to check - * @param Status Flag status (SET or RESET) - * @param Tickstart Tick start value - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) -{ - /* Wait until flag is set */ - while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_TIMEOUT; - } - } - } - return HAL_OK; -} - - -/** - * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). - * @param huart UART handle. - * @retval None - */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE and TCIE interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); -#endif - - /* At end of Tx process, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; -} - - -/** - * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). - * @param huart UART handle. - * @retval None - */ -static void UART_EndRxTransfer(UART_HandleTypeDef *huart) -{ - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Reset RxIsr function pointer */ - huart->RxISR = NULL; -} - - -/** - * @brief DMA UART transmit process complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - /* DMA Normal mode */ - if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) ) - { - huart->TxXferCount = 0U; - - /* Disable the DMA transfer for transmit request by resetting the DMAT bit - in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - } - /* DMA Circular mode */ - else - { - HAL_UART_TxCpltCallback(huart); - } -} - -/** - * @brief DMA UART transmit process half complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - HAL_UART_TxHalfCpltCallback(huart); -} - -/** - * @brief DMA UART receive process complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - /* DMA Normal mode */ - if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) ) - { - huart->RxXferCount = 0U; - - /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the DMA transfer for the receiver request by resetting the DMAR bit - in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - } - - HAL_UART_RxCpltCallback(huart); -} - -/** - * @brief DMA UART receive process half complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - HAL_UART_RxHalfCpltCallback(huart); -} - -/** - * @brief DMA UART communication error callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMAError(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - /* Stop UART DMA Tx request if ongoing */ - if ( (huart->gState == HAL_UART_STATE_BUSY_TX) - &&(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) ) - { - huart->TxXferCount = 0U; - UART_EndTxTransfer(huart); - } - - /* Stop UART DMA Rx request if ongoing */ - if ( (huart->RxState == HAL_UART_STATE_BUSY_RX) - &&(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ) - { - huart->RxXferCount = 0U; - UART_EndRxTransfer(huart); - } - - huart->ErrorCode |= HAL_UART_ERROR_DMA; - HAL_UART_ErrorCallback(huart); -} - -/** - * @brief DMA UART communication abort callback, when initiated by HAL services on Error - * (To be called at end of DMA Abort procedure following error occurrence). - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - huart->RxXferCount = 0U; - huart->TxXferCount = 0U; - - HAL_UART_ErrorCallback(huart); -} - -/** - * @brief DMA UART Tx communication abort callback, when initiated by user - * (To be called at end of DMA Tx Abort procedure following user abort request). - * @note When this callback is executed, User Abort complete call back is called only if no - * Abort still ongoing for Rx DMA Handle. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef* )(hdma->Parent); - - huart->hdmatx->XferAbortCallback = NULL; - - /* Check if an Abort process is still ongoing */ - if(huart->hdmarx != NULL) - { - if(huart->hdmarx->XferAbortCallback != NULL) - { - return; - } - } - - /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - - /* Reset errorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* Call user Abort complete callback */ - HAL_UART_AbortCpltCallback(huart); -} - - -/** - * @brief DMA UART Rx communication abort callback, when initiated by user - * (To be called at end of DMA Rx Abort procedure following user abort request). - * @note When this callback is executed, User Abort complete call back is called only if no - * Abort still ongoing for Tx DMA Handle. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef* )(hdma->Parent); - - huart->hdmarx->XferAbortCallback = NULL; - - /* Check if an Abort process is still ongoing */ - if(huart->hdmatx != NULL) - { - if(huart->hdmatx->XferAbortCallback != NULL) - { - return; - } - } - - /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - - /* Reset errorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* Call user Abort complete callback */ - HAL_UART_AbortCpltCallback(huart); -} - - -/** - * @brief DMA UART Tx communication abort callback, when initiated by user by a call to - * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer) - * (This callback is executed at end of DMA Tx Abort procedure following user abort request, - * and leads to user Tx Abort Complete callback execution). - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - huart->TxXferCount = 0U; - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* Call user Abort complete callback */ - HAL_UART_AbortTransmitCpltCallback(huart); -} - -/** - * @brief DMA UART Rx communication abort callback, when initiated by user by a call to - * HAL_UART_AbortReceive_IT API (Abort only Rx transfer) - * (This callback is executed at end of DMA Rx Abort procedure following user abort request, - * and leads to user Rx Abort Complete callback execution). - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - huart->RxXferCount = 0U; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Call user Abort complete callback */ - HAL_UART_AbortReceiveCpltCallback(huart); -} - -/** - * @brief TX interrrupt handler for 7 or 8 bits data word length . - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Transmit_IT(). - * @param huart UART handle. - * @retval None - */ -static void UART_TxISR_8BIT(UART_HandleTypeDef *huart) -{ - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - { - if(huart->TxXferCount == 0) - { - /* Disable the UART Transmit Data Register Empty Interrupt */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); -#else - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); -#endif - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - } - else - { - huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF); - huart->TxXferCount--; - } - } -} - -/** - * @brief TX interrrupt handler for 9 bits data word length. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Transmit_IT(). - * @param huart UART handle. - * @retval None - */ -static void UART_TxISR_16BIT(UART_HandleTypeDef *huart) -{ - uint16_t* tmp; - - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - { - if(huart->TxXferCount == 0) - { - /* Disable the UART Transmit Data Register Empty Interrupt */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); -#else - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); -#endif - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - } - else - { - tmp = (uint16_t*) huart->pTxBuffPtr; - huart->Instance->TDR = (*tmp & (uint16_t)0x01FF); - huart->pTxBuffPtr += 2; - huart->TxXferCount--; - } - } -} - -#if defined(USART_CR1_FIFOEN) -/** - * @brief TX interrrupt handler for 7 or 8 bits data word length and FIFO mode is enabled. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Transmit_IT(). - * @param huart UART handle. - * @retval None - */ -static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) -{ - uint8_t nb_tx_data; - - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - { - for(nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0 ; nb_tx_data--) - { - if(huart->TxXferCount == 0U) - { - /* Disable the TX FIFO threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - - break; /* force exit loop */ - } - else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != RESET) - { - huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF); - huart->TxXferCount--; - } - } - } -} - -/** - * @brief TX interrrupt handler for 9 bits data word length and FIFO mode is enabled. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Transmit_IT(). - * @param huart UART handle. - * @retval None - */ -static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) -{ - uint16_t* tmp; - uint8_t nb_tx_data; - - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - { - for(nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0 ; nb_tx_data--) - { - if(huart->TxXferCount == 0U) - { - /* Disable the TX FIFO threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - - break; /* force exit loop */ - } - else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != RESET) - { - tmp = (uint16_t*) huart->pTxBuffPtr; - huart->Instance->TDR = (*tmp & (uint16_t)0x01FFU); - huart->pTxBuffPtr += 2U; - huart->TxXferCount--; - } - } - } -} -#endif - -/** - * @brief Wrap up transmission in non-blocking mode. - * @param huart pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) -{ - /* Disable the UART Transmit Complete Interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); - - /* Tx process is ended, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* Cleat TxISR function pointer */ - huart->TxISR = NULL; - - HAL_UART_TxCpltCallback(huart); -} - -/** - * @brief RX interrrupt handler for 7 or 8 bits data word length . - * @param huart UART handle. - * @retval None - */ -static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) -{ - uint16_t uhMask = huart->Mask; - uint16_t uhdata; - - /* Check that a Rx process is ongoing */ - if(huart->RxState == HAL_UART_STATE_BUSY_RX) - { - uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - *huart->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask); - - if(--huart->RxXferCount == 0) - { - /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); -#endif - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Clear RxISR function pointer */ - huart->RxISR = NULL; - - HAL_UART_RxCpltCallback(huart); - } - } - else - { - /* Clear RXNE interrupt flag */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - } -} - -/** - * @brief RX interrrupt handler for 9 bits data word length . - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Receive_IT() - * @param huart UART handle. - * @retval None - */ -static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) -{ - uint16_t* tmp; - uint16_t uhMask = huart->Mask; - uint16_t uhdata; - - /* Check that a Rx process is ongoing */ - if(huart->RxState == HAL_UART_STATE_BUSY_RX) - { - uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - tmp = (uint16_t*) huart->pRxBuffPtr ; - *tmp = (uint16_t)(uhdata & uhMask); - huart->pRxBuffPtr +=2; - - if(--huart->RxXferCount == 0) - { - /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); -#endif - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Clear RxISR function pointer */ - huart->RxISR = NULL; - - HAL_UART_RxCpltCallback(huart); - } - } - else - { - /* Clear RXNE interrupt flag */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - } -} - -#if defined(USART_CR1_FIFOEN) -/** - * @brief RX interrrupt handler for 7 or 8 bits data word length and FIFO mode is enabled. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Receive_IT() - * @param huart UART handle. - * @retval None - */ -static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) -{ - uint16_t uhMask = huart->Mask; - uint16_t uhdata; - uint8_t nb_rx_data; - - /* Check that a Rx process is ongoing */ - if(huart->RxState == HAL_UART_STATE_BUSY_RX) - { - for(nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0 ; nb_rx_data--) - { - uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - *huart->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask); - huart->RxXferCount--; - - if(huart->RxXferCount == 0U) - { - /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Clear RxISR function pointer */ - huart->RxISR = NULL; - - HAL_UART_RxCpltCallback(huart); - } - } - - /* When remaining number of bytes to receive is less than the RX FIFO - threshold, next incoming frames are processed as if FIFO mode was - disabled (i.e. one interrupt per received frame). - */ - if (((huart->RxXferCount != 0U)) && (huart->RxXferCount < huart->NbRxDataToProcess)) - { - /* Disable the UART RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - - /* Update the RxISR function pointer */ - huart->RxISR = UART_RxISR_8BIT; - - /* Enable the UART Data Register Not Empty interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); - } - } - else - { - /* Clear RXNE interrupt flag */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - } -} - -/** - * @brief RX interrrupt handler for 9 bits data word length and FIFO mode is enabled. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Receive_IT() - * @param huart UART handle. - * @retval None - */ -static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) -{ - uint16_t* tmp; - uint16_t uhMask = huart->Mask; - uint16_t uhdata; - uint8_t nb_rx_data; - - /* Check that a Rx process is ongoing */ - if(huart->RxState == HAL_UART_STATE_BUSY_RX) - { - for(nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0 ; nb_rx_data--) - { - uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - tmp = (uint16_t*) huart->pRxBuffPtr ; - *tmp = (uint16_t)(uhdata & uhMask); - huart->pRxBuffPtr +=2; - huart->RxXferCount--; - - if(huart->RxXferCount == 0U) - { - /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Clear RxISR function pointer */ - huart->RxISR = NULL; - - HAL_UART_RxCpltCallback(huart); - } - } - - /* When remaining number of bytes to receive is less than the RX FIFO - threshold, next incoming frames are processed as if FIFO mode was - disabled (i.e. one interrupt per received frame). - */ - if (((huart->RxXferCount != 0U)) && (huart->RxXferCount < huart->NbRxDataToProcess)) - { - /* Disable the UART RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - - /* Update the RxISR function pointer */ - huart->RxISR = UART_RxISR_16BIT; - - /* Enable the UART Data Register Not Empty interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); - } - } - else - { - /* Clear RXNE interrupt flag */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - } -} -#endif - -/** - * @} - */ - -#endif /* HAL_UART_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c deleted file mode 100644 index c8c80f5d..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c +++ /dev/null @@ -1,900 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_uart_ex.c - * @author MCD Application Team - * @brief Extended UART HAL module driver. - * This file provides firmware functions to manage the following extended - * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). - * + Initialization and de-initialization functions - * + Peripheral Control functions - * - * - @verbatim - ============================================================================== - ##### UART peripheral extended features ##### - ============================================================================== - - (#) Declare a UART_HandleTypeDef handle structure. - - (#) For the UART RS485 Driver Enable mode, initialize the UART registers - by calling the HAL_RS485Ex_Init() API. - - (#) FIFO mode enabling/disabling and RX/TX FIFO threshold programming. - - -@- When USART operates in FIFO mode, FIFO mode must be enabled prior - starting RX/TX transfers. Also RX/TX FIFO thresholds must be - configured prior starting RX/TX transfers. - - (#) Slave mode enabling/disabling and NSS pin configuration. - - -@- When USART operates in Slave mode, Slave mode must be enabled prior - starting RX/TX transfers. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup UARTEx UARTEx - * @brief UART Extended HAL module driver - * @{ - */ - -#ifdef HAL_UART_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup UARTEx_Private_Functions UARTEx Private Functions - * @{ - */ -static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); -#if defined(USART_CR1_FIFOEN) -static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart); -#endif -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup UARTEx_Exported_Functions UARTEx Exported Functions - * @{ - */ - -/** @defgroup UARTEx_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Extended Initialization and Configuration Functions - * -@verbatim -=============================================================================== - ##### Initialization and Configuration functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to initialize the USARTx or the UARTy - in asynchronous mode. - (+) For the asynchronous mode the parameters below can be configured: - (++) Baud Rate - (++) Word Length - (++) Stop Bit - (++) Parity: If the parity is enabled, then the MSB bit of the data written - in the data register is transmitted but is changed by the parity bit. - (++) Hardware flow control - (++) Receiver/transmitter modes - (++) Over Sampling Method - (++) One-Bit Sampling Method - (+) For the asynchronous mode, the following advanced features can be configured as well: - (++) TX and/or RX pin level inversion - (++) data logical level inversion - (++) RX and TX pins swap - (++) RX overrun detection disabling - (++) DMA disabling on RX error - (++) MSB first on communication line - (++) auto Baud rate detection - [..] - The HAL_RS485Ex_Init() API follows the UART RS485 mode configuration - procedures (details for the procedures are available in reference manual). - -@endverbatim - - Depending on the frame length defined by the M1 and M0 bits (7-bit, - 8-bit or 9-bit), the possible UART formats are listed in the - following table. - - Table 1. UART frame format. - +-----------------------------------------------------------------------+ - | M1 bit | M0 bit | PCE bit | UART frame | - |---------|---------|-----------|---------------------------------------| - | 0 | 0 | 0 | | SB | 8 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 1 | 0 | | SB | 9 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | - |---------|---------|-----------|---------------------------------------| - | 1 | 0 | 0 | | SB | 7 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | - +-----------------------------------------------------------------------+ - - * @{ - */ - -/** - * @brief Initialize the RS485 Driver enable feature according to the specified - * parameters in the UART_InitTypeDef and creates the associated handle. - * @param huart UART handle. - * @param Polarity Select the driver enable polarity. - * This parameter can be one of the following values: - * @arg @ref UART_DE_POLARITY_HIGH DE signal is active high - * @arg @ref UART_DE_POLARITY_LOW DE signal is active low - * @param AssertionTime Driver Enable assertion time: - * 5-bit value defining the time between the activation of the DE (Driver Enable) - * signal and the beginning of the start bit. It is expressed in sample time - * units (1/8 or 1/16 bit time, depending on the oversampling rate) - * @param DeassertionTime Driver Enable deassertion time: - * 5-bit value defining the time between the end of the last stop bit, in a - * transmitted message, and the de-activation of the DE (Driver Enable) signal. - * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the - * oversampling rate). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime) -{ - uint32_t temp = 0x0; - - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - /* Check the Driver Enable UART instance */ - assert_param(IS_UART_DRIVER_ENABLE_INSTANCE(huart->Instance)); - - /* Check the Driver Enable polarity */ - assert_param(IS_UART_DE_POLARITY(Polarity)); - - /* Check the Driver Enable assertion time */ - assert_param(IS_UART_ASSERTIONTIME(AssertionTime)); - - /* Check the Driver Enable deassertion time */ - assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime)); - - if(huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, CORTEX */ - HAL_UART_MspInit(huart); - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - { - return HAL_ERROR; - } - - if(huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - - /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DEM); - - /* Set the Driver Enable polarity */ - MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); - - /* Set the Driver Enable assertion and deassertion times */ - temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS); - temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS); - MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT|USART_CR1_DEAT), temp); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); -} - - -/** - * @} - */ - -/** @defgroup UARTEx_Exported_Functions_Group2 IO operation functions - * @brief Extended functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - This subsection provides a set of Wakeup and FIFO mode related callback functions. - - (#) Wakeup from Stop mode Callback: - (+) HAL_UARTEx_WakeupCallback() - - (#) TX/RX Fifos Callbacks: - (+) HAL_UARTEx_RxFifoFullCallback() - (+) HAL_UARTEx_TxFifoEmptyCallback() - -@endverbatim - * @{ - */ - -/** - * @brief UART wakeup from Stop mode callback. - * @param huart UART handle. - * @retval None - */ - __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UARTEx_WakeupCallback can be implemented in the user file. - */ -} - -#if defined(USART_CR1_FIFOEN) -/** - * @brief UART RX Fifo full callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UARTEx_RxFifoFullCallback (UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file. - */ -} - -/** - * @brief UART TX Fifo empty callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UARTEx_TxFifoEmptyCallback (UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file. - */ -} -#endif - -/** - * @} - */ - -/** @defgroup UARTEx_Exported_Functions_Group3 Peripheral Control functions - * @brief Extended Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] This section provides the following functions: - (+) HAL_UARTEx_EnableClockStopMode() API enables the UART clock (HSI or LSE only) during stop mode - (+) HAL_UARTEx_DisableClockStopMode() API disables the above functionality - (+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address - detection length to more than 4 bits for multiprocessor address mark wake up. - (+) HAL_UARTEx_StopModeWakeUpSourceConfig() API defines the wake-up from stop mode - trigger: address match, Start Bit detection or RXNE bit status. - (+) HAL_UARTEx_EnableStopMode() API enables the UART to wake up the MCU from stop mode - (+) HAL_UARTEx_DisableStopMode() API disables the above functionality - (+) HAL_UARTEx_WakeupCallback() called upon UART wakeup interrupt - (+) HAL_UARTEx_EnableSPISlaveMode() API enables the SPI slave mode - (+) HAL_UARTEx_DisableSPISlaveMode() API disables the SPI slave mode - (+) HAL_UARTEx_ConfigNSS API configures the Slave Select input pin (NSS) - (+) HAL_UARTEx_EnableFifoMode() API enables the FIFO mode - (+) HAL_UARTEx_DisableFifoMode() API disables the FIFO mode - (+) HAL_UARTEx_SetTxFifoThreshold() API sets the TX FIFO threshold - (+) HAL_UARTEx_SetRxFifoThreshold() API sets the RX FIFO threshold - -@endverbatim - * @{ - */ - - - - -/** - * @brief By default in multiprocessor mode, when the wake up method is set - * to address mark, the UART handles only 4-bit long addresses detection; - * this API allows to enable longer addresses detection (6-, 7- or 8-bit - * long). - * @note Addresses detection lengths are: 6-bit address detection in 7-bit data mode, - * 7-bit address detection in 8-bit data mode, 8-bit address detection in 9-bit data mode. - * @param huart UART handle. - * @param AddressLength This parameter can be one of the following values: - * @arg @ref UART_ADDRESS_DETECT_4B 4-bit long address - * @arg @ref UART_ADDRESS_DETECT_7B 6-, 7- or 8-bit long address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - /* Check the address length parameter */ - assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength)); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the address length */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState to Ready */ - return (UART_CheckIdleState(huart)); -} - - -/** - * @brief Set Wakeup from Stop mode interrupt flag selection. - * @note It is the application responsibility to enable the interrupt used as - * usart_wkup interrupt source before entering low-power mode. - * @param huart UART handle. - * @param WakeUpSelection Address match, Start Bit detection or RXNE/RXFNE bit status. - * This parameter can be one of the following values: - * @arg @ref UART_WAKEUP_ON_ADDRESS - * @arg @ref UART_WAKEUP_ON_STARTBIT - * @arg @ref UART_WAKEUP_ON_READDATA_NONEMPTY - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection) -{ - HAL_StatusTypeDef status = HAL_OK; - uint32_t tickstart = 0; - - /* check the wake-up from stop mode UART instance */ - assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance)); - /* check the wake-up selection parameter */ - assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the wake-up selection scheme */ - MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent); - - if (WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS) - { - UARTEx_Wakeup_AddressConfig(huart, WakeUpSelection); - } - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - - /* Wait until REACK flag is set */ - if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - { - status = HAL_TIMEOUT; - } - else - { - /* Initialize the UART State */ - huart->gState = HAL_UART_STATE_READY; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return status; -} - - -/** - * @brief Enable UART Stop Mode. - * @note The UART is able to wake up the MCU from Stop 1 mode as long as UART clock is HSI or LSE. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Set UESM bit */ - SET_BIT(huart->Instance->CR1, USART_CR1_UESM); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Disable UART Stop Mode. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Clear UESM bit */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -#if defined(USART_CR2_SLVEN) -/** - * @brief Enable the SPI slave mode. - * @note When the UART operates in SPI slave mode, it handles data flow using - * the serial interface clock derived from the external SCLK signal - * provided by the external master SPI device. - * @note In SPI slave mode, the UART must be enabled before starting the master - * communications (or between frames while the clock is stable). Otherwise, - * if the UART slave is enabled while the master is in the middle of a - * frame, it will become desynchronized with the master. - * @note The data register of the slave needs to be ready before the first edge - * of the communication clock or before the end of the ongoing communication, - * otherwise the SPI slave will transmit zeros. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_EnableSlaveMode(UART_HandleTypeDef *huart) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_SPI_SLAVE_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* In SPI slave mode mode, the following bits must be kept cleared: - - LINEN and CLKEN bit in the USART_CR2 register - - HDSEL, SCEN and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - - /* Enable SPI slave mode */ - SET_BIT(huart->Instance->CR2, USART_CR2_SLVEN); - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->SlaveMode = UART_SLAVEMODE_ENABLE; - - huart->gState = HAL_UART_STATE_READY; - - /* Enable UART */ - __HAL_UART_ENABLE(huart); - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Disable the SPI slave mode. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_DisableSlaveMode(UART_HandleTypeDef *huart) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_SPI_SLAVE_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Disable SPI slave mode */ - CLEAR_BIT(huart->Instance->CR2, USART_CR2_SLVEN); - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->SlaveMode = UART_SLAVEMODE_ENABLE; - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Configure the Slave Select input pin (NSS). - * @note Software NSS management: SPI slave will always be selected and NSS - * input pin will be ignored. - * @note Hardware NSS management: the SPI slave selection depends on NSS - * input pin. The slave is selected when NSS is low and deselected when - * NSS is high. - * @param huart UART handle. - * @param NSSConfig NSS configuration. - * This parameter can be one of the following values: - * @arg @ref UART_NSS_HARD - * @arg @ref UART_NSS_SOFT - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_ConfigNSS(UART_HandleTypeDef *huart, uint32_t NSSConfig) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_SPI_SLAVE_INSTANCE(huart->Instance)); - assert_param(IS_UART_NSS(NSSConfig)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Program DIS_NSS bit in the USART_CR2 register */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_DIS_NSS, NSSConfig); - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} -#endif - -#if defined(USART_CR1_FIFOEN) -/** - * @brief Enable the FIFO mode. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Enable FIFO mode */ - SET_BIT(tmpcr1, USART_CR1_FIFOEN); - huart->FifoMode = UART_FIFOMODE_ENABLE; - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - /* Determine the number of data to process during RX/TX ISR execution */ - UARTEx_SetNbDataToProcess(huart); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Disable the FIFO mode. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Enable FIFO mode */ - CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN); - huart->FifoMode = UART_FIFOMODE_DISABLE; - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Set the TXFIFO threshold. - * @param huart UART handle. - * @param Threshold TX FIFO threshold value - * This parameter can be one of the following values: - * @arg @ref UART_TXFIFO_THRESHOLD_1_8 - * @arg @ref UART_TXFIFO_THRESHOLD_1_4 - * @arg @ref UART_TXFIFO_THRESHOLD_1_2 - * @arg @ref UART_TXFIFO_THRESHOLD_3_4 - * @arg @ref UART_TXFIFO_THRESHOLD_7_8 - * @arg @ref UART_TXFIFO_THRESHOLD_8_8 - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); - assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Update TX threshold configuration */ - MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); - - /* Determine the number of data to process during RX/TX ISR execution */ - UARTEx_SetNbDataToProcess(huart); - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Set the RXFIFO threshold. - * @param huart UART handle. - * @param Threshold RX FIFO threshold value - * This parameter can be one of the following values: - * @arg @ref UART_RXFIFO_THRESHOLD_1_8 - * @arg @ref UART_RXFIFO_THRESHOLD_1_4 - * @arg @ref UART_RXFIFO_THRESHOLD_1_2 - * @arg @ref UART_RXFIFO_THRESHOLD_3_4 - * @arg @ref UART_RXFIFO_THRESHOLD_7_8 - * @arg @ref UART_RXFIFO_THRESHOLD_8_8 - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) -{ - uint32_t tmpcr1 = 0; - - /* Check the parameters */ - assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); - assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Update RX threshold configuration */ - MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); - - /* Determine the number of data to process during RX/TX ISR execution */ - UARTEx_SetNbDataToProcess(huart); - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} -#endif - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup UARTEx_Private_Functions - * @{ - */ - -/** - * @brief Initialize the UART wake-up from stop mode parameters when triggered by address detection. - * @param huart UART handle. - * @param WakeUpSelection UART wake up from stop mode parameters. - * @retval None - */ -static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection) -{ - assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength)); - - /* Set the USART address length */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength); - - /* Set the USART address node */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_ADDRESS_LSB_POS)); -} - -#if defined(USART_CR1_FIFOEN) -/** - * @brief Calculate the number of data to process in RX/TX ISR. - * @note The RX FIFO depth and the TX FIFO depth is extracted from - * the UART configuration registers. - * @param huart UART handle. - * @retval None - */ -void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart) -{ - uint8_t rx_fifo_depth; - uint8_t tx_fifo_depth; - uint8_t rx_fifo_threshold; - uint8_t tx_fifo_threshold; - uint8_t numerator[] = {1, 1, 1, 3, 7, 1}; - uint8_t denominator[] = {8, 4, 2, 4, 8, 1}; - - if (huart->FifoMode == UART_FIFOMODE_DISABLE) - { - huart->NbTxDataToProcess = 1; - huart->NbRxDataToProcess = 1; - } - else - { - rx_fifo_depth = 8; /* RX Fifo size */ - tx_fifo_depth = 8; /* TX Fifo size */ - rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); - tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); - huart->NbTxDataToProcess = (uint8_t)(tx_fifo_depth * numerator[tx_fifo_threshold])/denominator[tx_fifo_threshold]; - huart->NbRxDataToProcess = (uint8_t)(rx_fifo_depth * numerator[rx_fifo_threshold])/denominator[rx_fifo_threshold]; - } -} -#endif - -/** - * @} - */ - -#endif /* HAL_UART_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c b/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c deleted file mode 100644 index 875c0c5a..00000000 --- a/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c +++ /dev/null @@ -1,2397 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_ll_usb.c - * @author MCD Application Team - * @brief USB Low Layer HAL module driver. - * - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Initialization/de-initialization functions - * + I/O operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure. - - (#) Call USB_CoreInit() API to initialize the USB Core peripheral. - - (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @defgroup USB_LL USB Low Layer - * @brief Low layer module for USB_FS and USB_OTG_FS drivers - * @{ - */ -#if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/** @addtogroup STM32L4xx_LL_USB_DRIVER - * @{ - */ - - - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -#if defined (USB_OTG_FS) -/** @defgroup USB_LL_Private_Functions USB Low Layer Private Functions - * @{ - */ -static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx); -/** - * @} - */ -#endif /* USB_OTG_FS */ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup LL_USB_Exported_Functions USB Low Layer Exported Functions - * @{ - */ - -/** @defgroup LL_USB_Group1 Initialization/de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization/de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - -@endverbatim - * @{ - */ -/*============================================================================== - USB OTG FS peripheral available on STM32L475xx, STM32L476xx, STM32L485xx and - STM32L486xx devices -==============================================================================*/ -#if defined (USB_OTG_FS) -/** - * @brief Initializes the USB Core - * @param USBx: USB Instance - * @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(cfg); - - /* Select FS Embedded PHY */ - USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL; - - /* Reset after a PHY select and set Host mode */ - USB_CoreReset(USBx); - - /* Deactivate the power down*/ - USBx->GCCFG = USB_OTG_GCCFG_PWRDWN; - - return HAL_OK; -} - -/** - * @brief USB_EnableGlobalInt - * Enables the controller's Global Int in the AHB Config reg - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx) -{ - USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT; - return HAL_OK; -} - - -/** - * @brief USB_DisableGlobalInt - * Disable the controller's Global Int in the AHB Config reg - * @param USBx: Selected device - * @retval HAL status -*/ -HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx) -{ - USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT; - return HAL_OK; -} - -/** - * @brief USB_SetCurrentMode : Set functional mode - * @param USBx: Selected device - * @param mode: current core mode - * This parameter can be one of these values: - * @arg USB_OTG_DEVICE_MODE: Peripheral mode - * @arg USB_OTG_HOST_MODE: Host mode - * @arg USB_OTG_DRD_MODE: Dual Role Device mode - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_ModeTypeDef mode) -{ - USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD); - - if ( mode == USB_HOST_MODE) - { - USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD; - } - else if ( mode == USB_DEVICE_MODE) - { - USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; - } - HAL_Delay(50); - - return HAL_OK; -} - -/** - * @brief USB_DevInit : Initializes the USB_OTG controller registers - * for device mode - * @param USBx: Selected device - * @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) -{ - uint32_t index = 0; - - /*Activate VBUS Sensing B */ - USBx->GCCFG |= USB_OTG_GCCFG_VBDEN; - - if (cfg.vbus_sensing_enable == 0) - { - /* Deactivate VBUS Sensing B */ - USBx->GCCFG &= ~ USB_OTG_GCCFG_VBDEN; - - /* B-peripheral session valid override enable*/ - USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; - USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; - } - - /* Restart the Phy Clock */ - USBx_PCGCCTL = 0; - - /* Device mode configuration */ - USBx_DEVICE->DCFG |= DCFG_FRAME_INTERVAL_80; - - /* Set Full speed phy */ - USB_SetDevSpeed (USBx , USB_OTG_SPEED_FULL); - - /* Flush the FIFOs */ - USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */ - USB_FlushRxFifo(USBx); - - /* Clear all pending Device Interrupts */ - USBx_DEVICE->DIEPMSK = 0; - USBx_DEVICE->DOEPMSK = 0; - USBx_DEVICE->DAINT = 0xFFFFFFFF; - USBx_DEVICE->DAINTMSK = 0; - - for (index = 0; index < cfg.dev_endpoints; index++) - { - if ((USBx_INEP(index)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) - { - USBx_INEP(index)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK); - } - else - { - USBx_INEP(index)->DIEPCTL = 0; - } - - USBx_INEP(index)->DIEPTSIZ = 0; - USBx_INEP(index)->DIEPINT = 0xFF; - } - - for (index = 0; index < cfg.dev_endpoints; index++) - { - if ((USBx_OUTEP(index)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) - { - USBx_OUTEP(index)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK); - } - else - { - USBx_OUTEP(index)->DOEPCTL = 0; - } - - USBx_OUTEP(index)->DOEPTSIZ = 0; - USBx_OUTEP(index)->DOEPINT = 0xFF; - } - - USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM); - - if (cfg.dma_enable == 1) - { - /*Set threshold parameters */ - USBx_DEVICE->DTHRCTL = (USB_OTG_DTHRCTL_TXTHRLEN_6 | USB_OTG_DTHRCTL_RXTHRLEN_6); - USBx_DEVICE->DTHRCTL |= (USB_OTG_DTHRCTL_RXTHREN | USB_OTG_DTHRCTL_ISOTHREN | USB_OTG_DTHRCTL_NONISOTHREN); - - index= USBx_DEVICE->DTHRCTL; - } - - /* Disable all interrupts. */ - USBx->GINTMSK = 0; - - /* Clear any pending interrupts */ - USBx->GINTSTS = 0xBFFFFFFF; - - /* Enable the common interrupts */ - if (cfg.dma_enable == DISABLE) - { - USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; - } - - /* Enable interrupts matching to the Device mode ONLY */ - USBx->GINTMSK |= (USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST |\ - USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT |\ - USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM|\ - USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM); - - if(cfg.Sof_enable) - { - USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM; - } - - if (cfg.vbus_sensing_enable == ENABLE) - { - USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT); - } - - return HAL_OK; -} - - -/** - * @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO - * @param USBx: Selected device - * @param num: FIFO number - * This parameter can be a value from 1 to 15 - 15 means Flush all Tx FIFOs - * @retval HAL status - */ -HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num) -{ - uint32_t count = 0; - - USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 6)); - - do - { - if (++count > 200000) - { - return HAL_TIMEOUT; - } - } - while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH); - - return HAL_OK; -} - - -/** - * @brief USB_FlushRxFifo : Flush Rx FIFO - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t count = 0; - - USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH; - - do - { - if (++count > 200000) - { - return HAL_TIMEOUT; - } - } - while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH); - - return HAL_OK; -} - -/** - * @brief USB_SetDevSpeed :Initializes the DevSpd field of DCFG register - * depending the PHY type and the enumeration speed of the device. - * @param USBx: Selected device - * @param speed: device speed - * This parameter can be one of these values: - * @arg USB_OTG_SPEED_HIGH: High speed mode - * @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode - * @arg USB_OTG_SPEED_FULL: Full speed mode - * @arg USB_OTG_SPEED_LOW: Low speed mode - * @retval Hal status - */ -HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed) -{ - USBx_DEVICE->DCFG |= speed; - return HAL_OK; -} - -/** - * @brief USB_GetDevSpeed :Return the Dev Speed - * @param USBx: Selected device - * @retval speed : device speed - * This parameter can be one of these values: - * @arg USB_OTG_SPEED_HIGH: High speed mode - * @arg USB_OTG_SPEED_FULL: Full speed mode - * @arg USB_OTG_SPEED_LOW: Low speed mode - */ -uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx) -{ - uint8_t speed = 0; - - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ) - { - speed = USB_OTG_SPEED_HIGH; - } - else if (((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ)|| - ((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_48MHZ)) - { - speed = USB_OTG_SPEED_FULL; - } - else if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ) - { - speed = USB_OTG_SPEED_LOW; - } - - return speed; -} - -/** - * @brief Activate and configure an endpoint - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) -{ - if (ep->is_in == 1) - { - USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))); - - if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0) - { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); - } - - } - else - { - USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16); - - if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0) - { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP)); - } - } - return HAL_OK; -} -/** - * @brief Activate and configure a dedicated endpoint - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) -{ - static __IO uint32_t debug = 0; - - /* Read DEPCTLn register */ - if (ep->is_in == 1) - { - if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0) - { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); - } - - - debug |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); - - USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))); - } - else - { - if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0) - { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP)); - - debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0)*USB_OTG_EP_REG_SIZE); - debug = (uint32_t )&USBx_OUTEP(ep->num)->DOEPCTL; - debug |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP)); - } - - USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16); - } - - return HAL_OK; -} -/** - * @brief De-activate and de-initialize an endpoint - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) -{ - /* Read DEPCTLn register */ - if (ep->is_in == 1) - { - USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)))); - USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)))); - USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP; - } - else - { - USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16)); - USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16)); - USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP; - } - return HAL_OK; -} - -/** - * @brief De-activate and de-initialize a dedicated endpoint - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) -{ - /* Read DEPCTLn register */ - if (ep->is_in == 1) - { - USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP; - USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)))); - } - else - { - USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP; - USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16)); - } - return HAL_OK; -} - -/** - * @brief USB_EPStartXfer : setup and starts a transfer over an EP - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) -{ - uint16_t pktcnt = 0; - - /* IN endpoint */ - if (ep->is_in == 1) - { - /* Zero Length Packet? */ - if (ep->xfer_len == 0) - { - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ; - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); - } - else - { - /* Program the transfer size and packet count - * as follows: xfersize = N * maxpacket + - * short_packet pktcnt = N + (short_packet - * exist ? 1 : 0) - */ - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (((ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket) << 19)) ; - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len); - - if (ep->type == EP_TYPE_ISOC) - { - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT); - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (1 << 29)); - } - } - if (ep->type != EP_TYPE_ISOC) - { - /* Enable the Tx FIFO Empty Interrupt for this EP */ - if (ep->xfer_len > 0) - { - USBx_DEVICE->DIEPEMPMSK |= 1 << ep->num; - } - } - - if (ep->type == EP_TYPE_ISOC) - { - if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0) - { - USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM; - } - else - { - USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; - } - } - - /* EP enable, IN data in FIFO */ - USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA); - - if (ep->type == EP_TYPE_ISOC) - { - USB_WritePacket(USBx, ep->xfer_buff, ep->num, ep->xfer_len, dma); - } - } - else /* OUT endpoint */ - { - /* Program the transfer size and packet count as follows: - * pktcnt = N - * xfersize = N * maxpacket - */ - USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ); - USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT); - - if (ep->xfer_len == 0) - { - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket); - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ; - } - else - { - pktcnt = (ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket; - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (pktcnt << 19)); ; - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket * pktcnt)); - } - - if (ep->type == EP_TYPE_ISOC) - { - if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0) - { - USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM; - } - else - { - USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; - } - } - /* EP enable */ - USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA); - } - return HAL_OK; -} - -/** - * @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0 - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL status - */ -HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(dma); - - /* IN endpoint */ - if (ep->is_in == 1) - { - /* Zero Length Packet? */ - if (ep->xfer_len == 0) - { - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ; - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); - } - else - { - /* Program the transfer size and packet count - * as follows: xfersize = N * maxpacket + - * short_packet pktcnt = N + (short_packet - * exist ? 1 : 0) - */ - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); - - if(ep->xfer_len > ep->maxpacket) - { - ep->xfer_len = ep->maxpacket; - } - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ; - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len); - - } - - /* Enable the Tx FIFO Empty Interrupt for this EP */ - if (ep->xfer_len > 0) - { - USBx_DEVICE->DIEPEMPMSK |= 1 << (ep->num); - } - - /* EP enable, IN data in FIFO */ - USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA); - } - else /* OUT endpoint */ - { - /* Program the transfer size and packet count as follows: - * pktcnt = N - * xfersize = N * maxpacket - */ - USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ); - USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT); - - if (ep->xfer_len > 0) - { - ep->xfer_len = ep->maxpacket; - } - - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)); - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket)); - - /* EP enable */ - USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA); - } - return HAL_OK; -} - -/** - * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated - * with the EP/channel - * @param USBx: Selected device - * @param src: pointer to source buffer - * @param ch_ep_num: endpoint or host channel number - * @param len: Number of bytes to write - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL status - */ -HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(dma); - - uint32_t count32b= 0 , index= 0; - count32b = (len + 3) / 4; - for (index = 0; index < count32b; index++, src += 4) - { - USBx_DFIFO(ch_ep_num) = *((__packed uint32_t *)src); - } - return HAL_OK; -} - -/** - * @brief USB_ReadPacket : read a packet from the Tx FIFO associated - * with the EP/channel - * @param USBx: Selected device - * @param src: source pointer - * @param ch_ep_num: endpoint or host channel number - * @param len: Number of bytes to read - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval pointer to destination buffer - */ -void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len) -{ - uint32_t index=0; - uint32_t count32b = (len + 3) / 4; - - for ( index = 0; index < count32b; index++, dest += 4 ) - { - *(__packed uint32_t *)dest = USBx_DFIFO(0); - - } - return ((void *)dest); -} - -/** - * @brief USB_EPSetStall : set a stall condition over an EP - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) -{ - if (ep->is_in == 1) - { - if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == 0) - { - USBx_INEP(ep->num)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS); - } - USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_STALL; - } - else - { - if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == 0) - { - USBx_OUTEP(ep->num)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS); - } - USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_STALL; - } - return HAL_OK; -} - - -/** - * @brief USB_EPClearStall : Clear a stall condition over an EP - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) -{ - if (ep->is_in == 1) - { - USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL; - if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK) - { - USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */ - } - } - else - { - USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL; - if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK) - { - USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */ - } - } - return HAL_OK; -} - -/** - * @brief USB_StopDevice : Stop the USB device mode - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t index; - - /* Clear Pending interrupt */ - for (index = 0; index < 15 ; index++) - { - USBx_INEP(index)->DIEPINT = 0xFF; - USBx_OUTEP(index)->DOEPINT = 0xFF; - } - USBx_DEVICE->DAINT = 0xFFFFFFFF; - - /* Clear interrupt masks */ - USBx_DEVICE->DIEPMSK = 0; - USBx_DEVICE->DOEPMSK = 0; - USBx_DEVICE->DAINTMSK = 0; - - /* Flush the FIFO */ - USB_FlushRxFifo(USBx); - USB_FlushTxFifo(USBx , 0x10 ); - - return HAL_OK; -} - -/** - * @brief USB_SetDevAddress : Stop the USB device mode - * @param USBx: Selected device - * @param address: new device address to be assigned - * This parameter can be a value from 0 to 255 - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address) -{ - USBx_DEVICE->DCFG &= ~ (USB_OTG_DCFG_DAD); - USBx_DEVICE->DCFG |= (address << 4) & USB_OTG_DCFG_DAD ; - - return HAL_OK; -} - -/** - * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx) -{ - USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS ; - HAL_Delay(3); - - return HAL_OK; -} - -/** - * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx) -{ - USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS ; - HAL_Delay(3); - - return HAL_OK; -} - -/** - * @brief USB_ReadInterrupts: return the global USB interrupt status - * @param USBx: Selected device - * @retval HAL status - */ -uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t tmpreg = 0; - - tmpreg = USBx->GINTSTS; - tmpreg &= USBx->GINTMSK; - return tmpreg; -} - -/** - * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status - * @param USBx: Selected device - * @retval HAL status - */ -uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t tmpreg; - tmpreg = USBx_DEVICE->DAINT; - tmpreg &= USBx_DEVICE->DAINTMSK; - return ((tmpreg & 0xffff0000) >> 16); -} - -/** - * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status - * @param USBx: Selected device - * @retval HAL status - */ -uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t tmpreg; - tmpreg = USBx_DEVICE->DAINT; - tmpreg &= USBx_DEVICE->DAINTMSK; - return ((tmpreg & 0xFFFF)); -} - -/** - * @brief Returns Device OUT EP Interrupt register - * @param USBx: Selected device - * @param epnum: endpoint number - * This parameter can be a value from 0 to 15 - * @retval Device OUT EP Interrupt register - */ -uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum) -{ - uint32_t tmpreg; - tmpreg = USBx_OUTEP(epnum)->DOEPINT; - tmpreg &= USBx_DEVICE->DOEPMSK; - return tmpreg; -} - -/** - * @brief Returns Device IN EP Interrupt register - * @param USBx: Selected device - * @param epnum: endpoint number - * This parameter can be a value from 0 to 15 - * @retval Device IN EP Interrupt register - */ -uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum) -{ - uint32_t tmpreg = 0, msk = 0, emp = 0; - - msk = USBx_DEVICE->DIEPMSK; - emp = USBx_DEVICE->DIEPEMPMSK; - msk |= ((emp >> epnum) & 0x1) << 7; - tmpreg = USBx_INEP(epnum)->DIEPINT & msk; - return tmpreg; -} - -/** - * @brief USB_ClearInterrupts: clear a USB interrupt - * @param USBx: Selected device - * @param interrupt: interrupt flag - * @retval None - */ -void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt) -{ - USBx->GINTSTS |= interrupt; -} - -/** - * @brief Returns USB core mode - * @param USBx: Selected device - * @retval return core mode : Host or Device - * This parameter can be one of these values: - * 0 : Host - * 1 : Device - */ -uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx) -{ - return ((USBx->GINTSTS ) & 0x1); -} - - -/** - * @brief Activate EP0 for Setup transactions - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx) -{ - /* Set the MPS of the IN EP based on the enumeration speed */ - USBx_INEP(0)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ; - - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ) - { - USBx_INEP(0)->DIEPCTL |= 3; - } - USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK; - - return HAL_OK; -} - - -/** - * @brief Prepare the EP0 to start the first control setup - * @param USBx: Selected device - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @param psetup: pointer to setup packet - * @retval HAL status - */ -HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(psetup); - - USBx_OUTEP(0)->DOEPTSIZ = 0; - USBx_OUTEP(0)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ; - USBx_OUTEP(0)->DOEPTSIZ |= (3 * 8); - USBx_OUTEP(0)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT; - - return HAL_OK; -} - -/** - * @brief USB_HostInit : Initializes the USB OTG controller registers - * for Host mode - * @param USBx: Selected device - * @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) -{ - uint32_t index = 0; - - /* Restart the Phy Clock */ - USBx_PCGCCTL = 0; - - /* Disable the FS/LS support mode only */ - if((cfg.speed == USB_OTG_SPEED_FULL)&& - (USBx != USB_OTG_FS)) - { - USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSS; - } - else - { - USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS); - } - - /* Make sure the FIFOs are flushed. */ - USB_FlushTxFifo(USBx, 0x10 ); /* all Tx FIFOs */ - USB_FlushRxFifo(USBx); - - /* Clear all pending HC Interrupts */ - for (index = 0; index < cfg.Host_channels; index++) - { - USBx_HC(index)->HCINT = 0xFFFFFFFF; - USBx_HC(index)->HCINTMSK = 0; - } - - /* Enable VBUS driving */ - USB_DriveVbus(USBx, 1); - - HAL_Delay(200); - - /* Disable all interrupts. */ - USBx->GINTMSK = 0; - - /* Clear any pending interrupts */ - USBx->GINTSTS = 0xFFFFFFFF; - - /* set Rx FIFO size */ - USBx->GRXFSIZ = (uint32_t )0x80; - USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) | 0x80); - USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0); - - /* Enable the common interrupts */ - if (cfg.dma_enable == DISABLE) - { - USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; - } - - /* Enable interrupts matching to the Host mode ONLY */ - USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM |\ - USB_OTG_GINTMSK_SOFM |USB_OTG_GINTSTS_DISCINT|\ - USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM); - - return HAL_OK; -} - -/** - * @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the - * HCFG register on the PHY type and set the right frame interval - * @param USBx: Selected device - * @param freq: clock frequency - * This parameter can be one of these values: - * HCFG_48_MHZ : Full Speed 48 MHz Clock - * HCFG_6_MHZ : Low Speed 6 MHz Clock - * @retval HAL status - */ -HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq) -{ - USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS); - USBx_HOST->HCFG |= (freq & USB_OTG_HCFG_FSLSPCS); - - if (freq == HCFG_48_MHZ) - { - USBx_HOST->HFIR = (uint32_t)48000; - } - else if (freq == HCFG_6_MHZ) - { - USBx_HOST->HFIR = (uint32_t)6000; - } - return HAL_OK; -} - -/** -* @brief USB_OTG_ResetPort : Reset Host Port - * @param USBx: Selected device - * @retval HAL status - * @note (1)The application must wait at least 10 ms - * before clearing the reset bit. - */ -HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx) -{ - __IO uint32_t hprt0 = 0; - - hprt0 = USBx_HPRT0; - - hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\ - USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG ); - - USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0); - HAL_Delay (10); /* See Note #1 */ - USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0); - return HAL_OK; -} - -/** - * @brief USB_DriveVbus : activate or de-activate vbus - * @param state: VBUS state - * This parameter can be one of these values: - * 0 : VBUS Active - * 1 : VBUS Inactive - * @retval HAL status -*/ -HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state) -{ - __IO uint32_t hprt0 = 0; - - hprt0 = USBx_HPRT0; - hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\ - USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG ); - - if (((hprt0 & USB_OTG_HPRT_PPWR) == 0 ) && (state == 1 )) - { - USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0); - } - if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0 )) - { - USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0); - } - return HAL_OK; -} - -/** - * @brief Return Host Core speed - * @param USBx: Selected device - * @retval speed : Host speed - * This parameter can be one of these values: - * @arg USB_OTG_SPEED_HIGH: High speed mode - * @arg USB_OTG_SPEED_FULL: Full speed mode - * @arg USB_OTG_SPEED_LOW: Low speed mode - */ -uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx) -{ - __IO uint32_t hprt0 = 0; - - hprt0 = USBx_HPRT0; - return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17); -} - -/** - * @brief Return Host Current Frame number - * @param USBx: Selected device - * @retval current frame number -*/ -uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx) -{ - return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM); -} - -/** - * @brief Initialize a host channel - * @param USBx: Selected device - * @param ch_num : Channel number - * This parameter can be a value from 1 to 15 - * @param epnum: Endpoint number - * This parameter can be a value from 1 to 15 - * @param dev_address: Current device address - * This parameter can be a value from 0 to 255 - * @param speed: Current device speed - * This parameter can be one of these values: - * @arg USB_OTG_SPEED_HIGH: High speed mode - * @arg USB_OTG_SPEED_FULL: Full speed mode - * @arg USB_OTG_SPEED_LOW: Low speed mode - * @param ep_type: Endpoint Type - * This parameter can be one of these values: - * @arg EP_TYPE_CTRL: Control type - * @arg EP_TYPE_ISOC: Isochronous type - * @arg EP_TYPE_BULK: Bulk type - * @arg EP_TYPE_INTR: Interrupt type - * @param mps: Max Packet Size - * This parameter can be a value from 0 to32K - * @retval HAL state - */ -HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, - uint8_t ch_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps) -{ - - /* Clear old interrupt conditions for this host channel. */ - USBx_HC(ch_num)->HCINT = 0xFFFFFFFF; - - /* Enable channel interrupts required for this transfer. */ - switch (ep_type) - { - case EP_TYPE_CTRL: - case EP_TYPE_BULK: - - USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\ - USB_OTG_HCINTMSK_STALLM |\ - USB_OTG_HCINTMSK_TXERRM |\ - USB_OTG_HCINTMSK_DTERRM |\ - USB_OTG_HCINTMSK_AHBERR |\ - USB_OTG_HCINTMSK_NAKM ; - - if (epnum & 0x80) - { - USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM; - } - break; - - case EP_TYPE_INTR: - - USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\ - USB_OTG_HCINTMSK_STALLM |\ - USB_OTG_HCINTMSK_TXERRM |\ - USB_OTG_HCINTMSK_DTERRM |\ - USB_OTG_HCINTMSK_NAKM |\ - USB_OTG_HCINTMSK_AHBERR |\ - USB_OTG_HCINTMSK_FRMORM ; - - if (epnum & 0x80) - { - USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM; - } - - break; - case EP_TYPE_ISOC: - - USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\ - USB_OTG_HCINTMSK_ACKM |\ - USB_OTG_HCINTMSK_AHBERR |\ - USB_OTG_HCINTMSK_FRMORM ; - - if (epnum & 0x80) - { - USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_TXERRM | USB_OTG_HCINTMSK_BBERRM); - } - break; - } - - /* Enable the top level host channel interrupt. */ - USBx_HOST->HAINTMSK |= (1 << ch_num); - - /* Make sure host channel interrupts are enabled. */ - USBx->GINTMSK |= USB_OTG_GINTMSK_HCIM; - - /* Program the HCCHAR register */ - USBx_HC(ch_num)->HCCHAR = (((dev_address << 22) & USB_OTG_HCCHAR_DAD) |\ - (((epnum & 0x7F)<< 11) & USB_OTG_HCCHAR_EPNUM)|\ - ((((epnum & 0x80) == 0x80)<< 15) & USB_OTG_HCCHAR_EPDIR)|\ - (((speed == HPRT0_PRTSPD_LOW_SPEED)<< 17) & USB_OTG_HCCHAR_LSDEV)|\ - ((ep_type << 18) & USB_OTG_HCCHAR_EPTYP)|\ - (mps & USB_OTG_HCCHAR_MPSIZ)); - - if (ep_type == EP_TYPE_INTR) - { - USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM ; - } - - return HAL_OK; -} - -/** - * @brief Start a transfer over a host channel - * @param USBx: Selected device - * @param hc: pointer to host channel structure - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL state - */ -#if defined (__CC_ARM) /*!< ARM Compiler */ -#pragma O0 -#elif defined (__GNUC__) /*!< GNU Compiler */ -#pragma GCC optimize ("O0") -#endif /* __CC_ARM */ -HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma) -{ - uint8_t is_oddframe = 0; - uint16_t len_words = 0; - uint16_t num_packets = 0; - uint16_t max_hc_pkt_count = 256; - uint32_t tmpreg = 0; - - /* Compute the expected number of packets associated to the transfer */ - if (hc->xfer_len > 0) - { - num_packets = (hc->xfer_len + hc->max_packet - 1) / hc->max_packet; - - if (num_packets > max_hc_pkt_count) - { - num_packets = max_hc_pkt_count; - hc->xfer_len = num_packets * hc->max_packet; - } - } - else - { - num_packets = 1; - } - if (hc->ep_is_in) - { - hc->xfer_len = num_packets * hc->max_packet; - } - - /* Initialize the HCTSIZn register */ - USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) |\ - ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\ - (((hc->data_pid) << 29) & USB_OTG_HCTSIZ_DPID); - - if (dma) - { - /* xfer_buff MUST be 32-bits aligned */ - USBx_HC(hc->ch_num)->HCDMA = (uint32_t)hc->xfer_buff; - } - - is_oddframe = (USBx_HOST->HFNUM & 0x01) ? 0 : 1; - USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM; - USBx_HC(hc->ch_num)->HCCHAR |= (is_oddframe << 29); - - /* Set host channel enable */ - tmpreg = USBx_HC(hc->ch_num)->HCCHAR; - tmpreg &= ~USB_OTG_HCCHAR_CHDIS; - tmpreg |= USB_OTG_HCCHAR_CHENA; - USBx_HC(hc->ch_num)->HCCHAR = tmpreg; - - if (dma == 0) /* Slave mode */ - { - if((hc->ep_is_in == 0) && (hc->xfer_len > 0)) - { - switch(hc->ep_type) - { - /* Non periodic transfer */ - case EP_TYPE_CTRL: - case EP_TYPE_BULK: - - len_words = (hc->xfer_len + 3) / 4; - - /* check if there is enough space in FIFO space */ - if(len_words > (USBx->HNPTXSTS & 0xFFFF)) - { - /* need to process data in nptxfempty interrupt */ - USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM; - } - break; - /* Periodic transfer */ - case EP_TYPE_INTR: - case EP_TYPE_ISOC: - len_words = (hc->xfer_len + 3) / 4; - /* check if there is enough space in FIFO space */ - if(len_words > (USBx_HOST->HPTXSTS & 0xFFFF)) /* split the transfer */ - { - /* need to process data in ptxfempty interrupt */ - USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM; - } - break; - - default: - break; - } - - /* Write packet into the Tx FIFO. */ - USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len, 0); - } - } - - return HAL_OK; -} - -/** - * @brief Read all host channel interrupts status - * @param USBx: Selected device - * @retval HAL state - */ -uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx) -{ - return ((USBx_HOST->HAINT) & 0xFFFF); -} - -/** - * @brief Halt a host channel - * @param USBx: Selected device - * @param hc_num: Host Channel number - * This parameter can be a value from 1 to 15 - * @retval HAL state - */ -HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num) -{ - uint32_t count = 0; - - /* Check for space in the request queue to issue the halt. */ - if (((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_CTRL << 18)) || ((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_BULK << 18))) - { - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS; - - if ((USBx->HNPTXSTS & 0xFFFF) == 0) - { - USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA; - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA; - USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR; - do - { - if (++count > 1000) - { - break; - } - } - while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA); - } - else - { - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA; - } - } - else - { - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS; - - if ((USBx_HOST->HPTXSTS & 0xFFFF) == 0) - { - USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA; - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA; - USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR; - do - { - if (++count > 1000) - { - break; - } - } - while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA); - } - else - { - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA; - } - } - - return HAL_OK; -} - -/** - * @brief Initiate Do Ping protocol - * @param USBx: Selected device - * @param hc_num: Host Channel number - * This parameter can be a value from 1 to 15 - * @retval HAL state - */ -HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num) -{ - uint8_t num_packets = 1; - uint32_t tmpreg = 0; - - USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\ - USB_OTG_HCTSIZ_DOPING; - - /* Set host channel enable */ - tmpreg = USBx_HC(ch_num)->HCCHAR; - tmpreg &= ~USB_OTG_HCCHAR_CHDIS; - tmpreg |= USB_OTG_HCCHAR_CHENA; - USBx_HC(ch_num)->HCCHAR = tmpreg; - - return HAL_OK; -} - -/** - * @brief Stop Host Core - * @param USBx: Selected device - * @retval HAL state - */ -HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx) -{ - uint8_t index; - uint32_t count = 0; - uint32_t value = 0; - - USB_DisableGlobalInt(USBx); - - /* Flush FIFO */ - USB_FlushTxFifo(USBx, 0x10); - USB_FlushRxFifo(USBx); - - /* Flush out any leftover queued requests. */ - for (index = 0; index <= 15; index++) - { - value = USBx_HC(index)->HCCHAR; - value |= USB_OTG_HCCHAR_CHDIS; - value &= ~USB_OTG_HCCHAR_CHENA; - value &= ~USB_OTG_HCCHAR_EPDIR; - USBx_HC(index)->HCCHAR = value; - } - - /* Halt all channels to put them into a known state. */ - for (index = 0; index <= 15; index++) - { - value = USBx_HC(index)->HCCHAR ; - value |= USB_OTG_HCCHAR_CHDIS; - value |= USB_OTG_HCCHAR_CHENA; - value &= ~USB_OTG_HCCHAR_EPDIR; - USBx_HC(index)->HCCHAR = value; - - USBx_HC(index)->HCCHAR = value; - do - { - if (++count > 1000) - { - break; - } - } - while ((USBx_HC(index)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA); - } - - /* Clear any pending Host interrupts */ - USBx_HOST->HAINT = 0xFFFFFFFF; - USBx->GINTSTS = 0xFFFFFFFF; - USB_EnableGlobalInt(USBx); - return HAL_OK; -} - -/** - * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx) -{ - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS) - { - /* active Remote wakeup signalling */ - USBx_DEVICE->DCTL |= USB_OTG_DCTL_RWUSIG; - } - return HAL_OK; -} - -/** - * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx) -{ - /* active Remote wakeup signalling */ - USBx_DEVICE->DCTL &= ~(USB_OTG_DCTL_RWUSIG); - return HAL_OK; -} - -#endif /* USB_OTG_FS */ - -/*============================================================================== - USB Device FS peripheral available on STM32L432xx, STM32L433xx, STM32L442xx) - and STM32L443xx devices -==============================================================================*/ -#if defined (USB) -/** - * @brief Initializes the USB Core - * @param USBx: USB Instance - * @param cfg : pointer to a USB_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(cfg); - - return HAL_OK; -} - -/** - * @brief USB_EnableGlobalInt - * Enables the controller's Global Int in the AHB Config reg - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx) -{ - uint32_t winterruptmask = 0; - - /* Set winterruptmask variable */ - winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \ - | USB_CNTR_ESOFM | USB_CNTR_RESETM; - - /* Set interrupt mask */ - USBx->CNTR |= winterruptmask; - - return HAL_OK; -} - -/** - * @brief USB_DisableGlobalInt - * Disable the controller's Global Int in the AHB Config reg - * @param USBx : Selected device - * @retval HAL status -*/ -HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) -{ - uint32_t winterruptmask = 0; - - /* Set winterruptmask variable */ - winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \ - | USB_CNTR_ESOFM | USB_CNTR_RESETM; - - /* Clear interrupt mask */ - USBx->CNTR &= ~winterruptmask; - - return HAL_OK; -} - -/** - * @brief USB_SetCurrentMode : Set functional mode - * @param USBx : Selected device - * @param mode : current core mode - * This parameter can be one of the these values: - * @arg USB_DEVICE_MODE: Peripheral mode mode - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx , USB_ModeTypeDef mode) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(mode); - - return HAL_OK; -} - -/** - * @brief USB_DevInit : Initializes the USB controller registers - * for device mode - * @param USBx : Selected device - * @param cfg : pointer to a USB_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevInit (USB_TypeDef *USBx, USB_CfgTypeDef cfg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(cfg); - - /* Init Device */ - /*CNTR_FRES = 1*/ - USBx->CNTR = USB_CNTR_FRES; - - /*CNTR_FRES = 0*/ - USBx->CNTR = 0; - - /*Clear pending interrupts*/ - USBx->ISTR = 0; - - /*Set Btable Address*/ - USBx->BTABLE = BTABLE_ADDRESS; - - return HAL_OK; -} - -/** - * @brief USB_FlushTxFifo : Flush a Tx FIFO - * @param USBx : Selected device - * @param num : FIFO number - * This parameter can be a value from 1 to 15 - 15 means Flush all Tx FIFOs - * @retval HAL status - */ -HAL_StatusTypeDef USB_FlushTxFifo (USB_TypeDef *USBx, uint32_t num ) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(num); - - return HAL_OK; -} - -/** - * @brief USB_FlushRxFifo : Flush Rx FIFO - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - - return HAL_OK; -} - -/** - * @brief Activate and configure an endpoint - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - /* initialize Endpoint */ - switch (ep->type) - { - case EP_TYPE_CTRL: - PCD_SET_EPTYPE(USBx, ep->num, USB_EP_CONTROL); - break; - case EP_TYPE_BULK: - PCD_SET_EPTYPE(USBx, ep->num, USB_EP_BULK); - break; - case EP_TYPE_INTR: - PCD_SET_EPTYPE(USBx, ep->num, USB_EP_INTERRUPT); - break; - case EP_TYPE_ISOC: - PCD_SET_EPTYPE(USBx, ep->num, USB_EP_ISOCHRONOUS); - break; - default: - break; - } - - PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); - - if (ep->doublebuffer == 0) - { - if (ep->is_in) - { - /*Set the endpoint Transmit buffer address */ - PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - /* Configure NAK status for the Endpoint*/ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); - } - else - { - /*Set the endpoint Receive buffer address */ - PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); - /*Set the endpoint Receive buffer counter*/ - PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); - PCD_CLEAR_RX_DTOG(USBx, ep->num); - /* Configure VALID status for the Endpoint*/ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - } - } - /*Double Buffer*/ - else - { - /*Set the endpoint as double buffered*/ - PCD_SET_EP_DBUF(USBx, ep->num); - /*Set buffer address for double buffered mode*/ - PCD_SET_EP_DBUF_ADDR(USBx, ep->num,ep->pmaaddr0, ep->pmaaddr1); - - if (ep->is_in==0) - { - /* Clear the data toggle bits for the endpoint IN/OUT*/ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - - /* Reset value of the data toggle bits for the endpoint out*/ - PCD_TX_DTOG(USBx, ep->num); - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - else - { - /* Clear the data toggle bits for the endpoint IN/OUT*/ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - PCD_RX_DTOG(USBx, ep->num); - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - } - } - - return HAL_OK; -} - -/** - * @brief De-activate and de-initialize an endpoint - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - if (ep->doublebuffer == 0) - { - if (ep->is_in) - { - PCD_CLEAR_TX_DTOG(USBx, ep->num); - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - else - { - PCD_CLEAR_RX_DTOG(USBx, ep->num); - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - } - } - /*Double Buffer*/ - else - { - if (ep->is_in==0) - { - /* Clear the data toggle bits for the endpoint IN/OUT*/ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - - /* Reset value of the data toggle bits for the endpoint out*/ - PCD_TX_DTOG(USBx, ep->num); - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - else - { - /* Clear the data toggle bits for the endpoint IN/OUT*/ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - PCD_RX_DTOG(USBx, ep->num); - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - } - } - - return HAL_OK; -} - -/** - * @brief USB_EPStartXfer : setup and starts a transfer over an EP - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx , USB_EPTypeDef *ep, uint8_t dma) -{ - uint16_t pmabuffer = 0; - uint32_t len = ep->xfer_len; - - /* IN endpoint */ - if (ep->is_in == 1) - { - /*Multi packet transfer*/ - if (ep->xfer_len > ep->maxpacket) - { - len=ep->maxpacket; - ep->xfer_len-=len; - } - else - { - len=ep->xfer_len; - ep->xfer_len =0; - } - - /* configure and validate Tx endpoint */ - if (ep->doublebuffer == 0) - { - USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, len); - PCD_SET_EP_TX_CNT(USBx, ep->num, len); - } - else - { - /* Write the data to the USB endpoint */ - if (PCD_GET_ENDPOINT(USBx, ep->num)& USB_EP_DTOG_TX) - { - /* Set the Double buffer counter for pmabuffer1 */ - PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr1; - } - else - { - /* Set the Double buffer counter for pmabuffer0 */ - PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr0; - } - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, len); - PCD_FreeUserBuffer(USBx, ep->num, ep->is_in); - } - - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); - } - else /* OUT endpoint */ - { - /* Multi packet transfer*/ - if (ep->xfer_len > ep->maxpacket) - { - len=ep->maxpacket; - ep->xfer_len-=len; - } - else - { - len=ep->xfer_len; - ep->xfer_len =0; - } - - /* configure and validate Rx endpoint */ - if (ep->doublebuffer == 0) - { - /*Set RX buffer count*/ - PCD_SET_EP_RX_CNT(USBx, ep->num, len); - } - else - { - /*Set the Double buffer counter*/ - PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); - } - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - } - - return HAL_OK; -} - -/** - * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated - * with the EP/channel - * @param USBx : Selected device - * @param src : pointer to source buffer - * @param ch_ep_num : endpoint or host channel number - * @param len : Number of bytes to write - * @retval HAL status - */ -HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(src); - UNUSED(ch_ep_num); - UNUSED(len); - - return HAL_OK; -} - -/** - * @brief USB_ReadPacket : read a packet from the Tx FIFO associated - * with the EP/channel - * @param USBx : Selected device - * @param dest : destination pointer - * @param len : Number of bytes to read - * @retval pointer to destination buffer - */ -void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(dest); - UNUSED(len); - - return ((void *)NULL); -} - -/** - * @brief USB_EPSetStall : set a stall condition over an EP - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx , USB_EPTypeDef *ep) -{ - if (ep->num == 0) - { - /* This macro sets STALL status for RX & TX*/ - PCD_SET_EP_TXRX_STATUS(USBx, ep->num, USB_EP_RX_STALL, USB_EP_TX_STALL); - } - else - { - if (ep->is_in) - { - PCD_SET_EP_TX_STATUS(USBx, ep->num , USB_EP_TX_STALL); - } - else - { - PCD_SET_EP_RX_STATUS(USBx, ep->num , USB_EP_RX_STALL); - } - } - return HAL_OK; -} - -/** - * @brief USB_EPClearStall : Clear a stall condition over an EP - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - if (ep->is_in) - { - PCD_CLEAR_TX_DTOG(USBx, ep->num); - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); - } - else - { - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - } - return HAL_OK; -} - -/** - * @brief USB_StopDevice : Stop the usb device mode - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx) -{ - /* disable all interrupts and force USB reset */ - USBx->CNTR = USB_CNTR_FRES; - - /* clear interrupt status register */ - USBx->ISTR = 0; - - /* switch-off device */ - USBx->CNTR = (USB_CNTR_FRES | USB_CNTR_PDWN); - - return HAL_OK; -} - -/** - * @brief USB_SetDevAddress : Stop the usb device mode - * @param USBx : Selected device - * @param address : new device address to be assigned - * This parameter can be a value from 0 to 255 - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetDevAddress (USB_TypeDef *USBx, uint8_t address) -{ - if(address == 0) - { - /* set device address and enable function */ - USBx->DADDR = USB_DADDR_EF; - } - - return HAL_OK; -} - -/** - * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevConnect (USB_TypeDef *USBx) -{ - /* Enabling DP Pull-Down bit to Connect internal pull-up on USB DP line */ - USB->BCDR |= USB_BCDR_DPPU; - - return HAL_OK; -} - -/** - * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevDisconnect (USB_TypeDef *USBx) -{ - /* Disable DP Pull-Down bit*/ - USB->BCDR &= ~(USB_BCDR_DPPU); - - return HAL_OK; -} - -/** - * @brief USB_ReadInterrupts: return the global USB interrupt status - * @param USBx : Selected device - * @retval HAL status - */ -uint32_t USB_ReadInterrupts (USB_TypeDef *USBx) -{ - uint32_t tmpreg = 0; - - tmpreg = USBx->ISTR; - return tmpreg; -} - -/** - * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status - * @param USBx : Selected device - * @retval HAL status - */ -uint32_t USB_ReadDevAllOutEpInterrupt (USB_TypeDef *USBx) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - - return (0); -} - -/** - * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status - * @param USBx : Selected device - * @retval HAL status - */ -uint32_t USB_ReadDevAllInEpInterrupt (USB_TypeDef *USBx) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - - return (0); -} - -/** - * @brief Returns Device OUT EP Interrupt register - * @param USBx : Selected device - * @param epnum : endpoint number - * This parameter can be a value from 0 to 15 - * @retval Device OUT EP Interrupt register - */ -uint32_t USB_ReadDevOutEPInterrupt (USB_TypeDef *USBx , uint8_t epnum) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(epnum); - - return (0); -} - -/** - * @brief Returns Device IN EP Interrupt register - * @param USBx : Selected device - * @param epnum : endpoint number - * This parameter can be a value from 0 to 15 - * @retval Device IN EP Interrupt register - */ -uint32_t USB_ReadDevInEPInterrupt (USB_TypeDef *USBx , uint8_t epnum) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(epnum); - - return (0); -} - -/** - * @brief USB_ClearInterrupts: clear a USB interrupt - * @param USBx : Selected device - * @param interrupt : interrupt flag - * @retval None - */ -void USB_ClearInterrupts (USB_TypeDef *USBx, uint32_t interrupt) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(interrupt); -} - -/** - * @brief Prepare the EP0 to start the first control setup - * @param USBx : Selected device - * @param psetup : pointer to setup packet - * @retval HAL status - */ -HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t dma ,uint8_t *psetup) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(psetup); - UNUSED(dma); - - return HAL_OK; -} - -/** - * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx) -{ - USBx->CNTR |= USB_CNTR_RESUME; - - return HAL_OK; -} - -/** - * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx) -{ - USBx->CNTR &= ~(USB_CNTR_RESUME); - return HAL_OK; -} - -/** - * @brief Copy a buffer from user memory area to packet memory area (PMA) - * @param USBx : pointer to USB register. - * @param pbUsrBuf : pointer to user memory area. - * @param wPMABufAddr : address into PMA. - * @param wNBytes : number of bytes to be copied. - * @retval None - */ -void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - uint32_t n = (wNBytes + 1) >> 1; - uint32_t i; - uint16_t temp1, temp2; - uint16_t *pdwVal; - pdwVal = (uint16_t *)(wPMABufAddr + (uint32_t)USBx + 0x400); - - for (i = n; i != 0; i--) - { - temp1 = (uint16_t) * pbUsrBuf; - pbUsrBuf++; - temp2 = temp1 | (uint16_t) * pbUsrBuf << 8; - *pdwVal++ = temp2; - pbUsrBuf++; - } -} - -/** - * @brief Copy a buffer from user memory area to packet memory area (PMA) - * @param USBx : pointer to USB register. -* @param pbUsrBuf : pointer to user memory area. - * @param wPMABufAddr : address into PMA. - * @param wNBytes : number of bytes to be copied. - * @retval None - */ -void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - uint32_t n = (wNBytes + 1) >> 1; - uint32_t i; - uint16_t *pdwVal; - pdwVal = (uint16_t *)(wPMABufAddr + (uint32_t)USBx + 0x400); - for (i = n; i != 0; i--) - { - *(uint16_t*)pbUsrBuf++ = *pdwVal++; - pbUsrBuf++; - } -} -#endif /* USB */ -/** - * @} - */ -/** - * @} - */ - -#if defined (USB_OTG_FS) -/** @addtogroup USB_LL_Private_Functions - * @{ - */ -/** - * @brief Reset the USB Core (needed after USB clock settings change) - * @param USBx : Selected device - * @retval HAL status - */ -static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t count = 0; - - /* Wait for AHB master IDLE state. */ - do - { - if (++count > 200000) - { - return HAL_TIMEOUT; - } - } - while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0); - - /* Core Soft Reset */ - count = 0; - USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; - - do - { - if (++count > 200000) - { - return HAL_TIMEOUT; - } - } - while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); - - return HAL_OK; -} -/** - * @} - */ -#endif /* USB_OTG_FS */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) */ -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Inc/main.h b/Samples/Nucleo-TPM/L476RG/Inc/main.h deleted file mode 100644 index d9797db9..00000000 --- a/Samples/Nucleo-TPM/L476RG/Inc/main.h +++ /dev/null @@ -1,100 +0,0 @@ -/** - ****************************************************************************** - * @file : main.h - * @brief : Header for main.c file. - * This file contains the common defines of the application. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __MAIN_H__ -#define __MAIN_H__ - -/* Includes ------------------------------------------------------------------*/ - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* Private define ------------------------------------------------------------*/ - -#define B1_Pin GPIO_PIN_13 -#define B1_GPIO_Port GPIOC -#define USART_TX_Pin GPIO_PIN_2 -#define USART_TX_GPIO_Port GPIOA -#define USART_RX_Pin GPIO_PIN_3 -#define USART_RX_GPIO_Port GPIOA -#define LD2_Pin GPIO_PIN_5 -#define LD2_GPIO_Port GPIOA -#define TMS_Pin GPIO_PIN_13 -#define TMS_GPIO_Port GPIOA -#define TCK_Pin GPIO_PIN_14 -#define TCK_GPIO_Port GPIOA -#define SWO_Pin GPIO_PIN_3 -#define SWO_GPIO_Port GPIOB - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1U */ - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -#ifdef __cplusplus - extern "C" { -#endif -void _Error_Handler(char *, int); - -#define Error_Handler() _Error_Handler(__FILE__, __LINE__) -#ifdef __cplusplus -} -#endif - -#endif /* __MAIN_H__ */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Inc/stm32l4xx_hal_conf.h b/Samples/Nucleo-TPM/L476RG/Inc/stm32l4xx_hal_conf.h deleted file mode 100644 index 0d3dd607..00000000 --- a/Samples/Nucleo-TPM/L476RG/Inc/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,430 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2018 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -#include "main.h" -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ - -#define HAL_MODULE_ENABLED -/*#define HAL_ADC_MODULE_ENABLED */ -/*#define HAL_CRYP_MODULE_ENABLED */ -/*#define HAL_CAN_MODULE_ENABLED */ -/*#define HAL_COMP_MODULE_ENABLED */ -/*#define HAL_CRC_MODULE_ENABLED */ -/*#define HAL_CRYP_MODULE_ENABLED */ -/*#define HAL_DAC_MODULE_ENABLED */ -/*#define HAL_DCMI_MODULE_ENABLED */ -/*#define HAL_DMA2D_MODULE_ENABLED */ -/*#define HAL_DFSDM_MODULE_ENABLED */ -/*#define HAL_DSI_MODULE_ENABLED */ -/*#define HAL_FIREWALL_MODULE_ENABLED */ -/*#define HAL_GFXMMU_MODULE_ENABLED */ -/*#define HAL_HCD_MODULE_ENABLED */ -/*#define HAL_HASH_MODULE_ENABLED */ -/*#define HAL_I2S_MODULE_ENABLED */ -/*#define HAL_IRDA_MODULE_ENABLED */ -/*#define HAL_IWDG_MODULE_ENABLED */ -/*#define HAL_LTDC_MODULE_ENABLED */ -/*#define HAL_LCD_MODULE_ENABLED */ -/*#define HAL_LPTIM_MODULE_ENABLED */ -/*#define HAL_NAND_MODULE_ENABLED */ -/*#define HAL_NOR_MODULE_ENABLED */ -/*#define HAL_OPAMP_MODULE_ENABLED */ -/*#define HAL_OSPI_MODULE_ENABLED */ -/*#define HAL_OSPI_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -/*#define HAL_QSPI_MODULE_ENABLED */ -/*#define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/*#define HAL_SAI_MODULE_ENABLED */ -/*#define HAL_SD_MODULE_ENABLED */ -/*#define HAL_SMBUS_MODULE_ENABLED */ -/*#define HAL_SMARTCARD_MODULE_ENABLED */ -/*#define HAL_SPI_MODULE_ENABLED */ -/*#define HAL_SRAM_MODULE_ENABLED */ -/*#define HAL_SWPMI_MODULE_ENABLED */ -/*#define HAL_TIM_MODULE_ENABLED */ -/*#define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/*#define HAL_USART_MODULE_ENABLED */ -/*#define HAL_WWDG_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)48000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. - * This internal oscillator is mainly dedicated to provide a high precision clock to - * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. - * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency - * which is subject to manufacturing process variations. - */ -#if !defined (HSI48_VALUE) - #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. - The real value my vary depending on manufacturing process variations.*/ -#endif /* HSI48_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature.*/ - -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ - -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define INSTRUCTION_CACHE_ENABLE 1U -#define DATA_CACHE_ENABLE 1U - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1U */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver - * Activated: CRC code is present inside driver - * Deactivated: CRC code cleaned from driver - */ - -#define USE_SPI_CRC 0U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" - #include "stm32l4xx_hal_rcc_ex.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" - #include "stm32l4xx_hal_dma_ex.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32l4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32l4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32l4xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32l4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32l4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED - #include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_OSPI_MODULE_ENABLED - #include "stm32l4xx_hal_ospi.h" -#endif /* HAL_OSPI_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_GFXMMU_MODULE_ENABLED - #include "stm32l4xx_hal_gfxmmu.h" -#endif /* HAL_GFXMMU_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Inc/stm32l4xx_it.h b/Samples/Nucleo-TPM/L476RG/Inc/stm32l4xx_it.h deleted file mode 100644 index a3463972..00000000 --- a/Samples/Nucleo-TPM/L476RG/Inc/stm32l4xx_it.h +++ /dev/null @@ -1,59 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_it.h - * @brief This file contains the headers of the interrupt handlers. - ****************************************************************************** - * - * COPYRIGHT(c) 2018 STMicroelectronics - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_IT_H -#define __STM32L4xx_IT_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" -#include "main.h" -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -void SysTick_Handler(void); -void OTG_FS_IRQHandler(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_IT_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Inc/usb_device.h b/Samples/Nucleo-TPM/L476RG/Inc/usb_device.h deleted file mode 100644 index 3c661eac..00000000 --- a/Samples/Nucleo-TPM/L476RG/Inc/usb_device.h +++ /dev/null @@ -1,115 +0,0 @@ -/** - ****************************************************************************** - * @file : usb_device.h - * @version : v2.0_Cube - * @brief : Header for usb_device.c file. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_DEVICE__H__ -#define __USB_DEVICE__H__ - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx.h" -#include "stm32l4xx_hal.h" -#include "usbd_def.h" - -/* USER CODE BEGIN INCLUDE */ - void MX_USB_DEVICE_DeInit(void); - -/* USER CODE END INCLUDE */ - -/** @addtogroup USBD_OTG_DRIVER - * @{ - */ - -/** @defgroup USBD_DEVICE USBD_DEVICE - * @brief Device file for Usb otg low level driver. - * @{ - */ - -/** @defgroup USBD_DEVICE_Exported_Variables USBD_DEVICE_Exported_Variables - * @brief Public variables. - * @{ - */ - -/** USB device core handle. */ -extern USBD_HandleTypeDef hUsbDeviceFS; - -/** - * @} - */ - -/** @defgroup USBD_DEVICE_Exported_FunctionsPrototype USBD_DEVICE_Exported_FunctionsPrototype - * @brief Declaration of public functions for Usb device. - * @{ - */ - -/** USB Device initialization function. */ -void MX_USB_DEVICE_Init(void); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USB_DEVICE__H__ */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Inc/usbd_cdc_if.h b/Samples/Nucleo-TPM/L476RG/Inc/usbd_cdc_if.h deleted file mode 100644 index 605b7785..00000000 --- a/Samples/Nucleo-TPM/L476RG/Inc/usbd_cdc_if.h +++ /dev/null @@ -1,158 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_cdc_if.h - * @version : v2.0_Cube - * @brief : Header for usbd_cdc_if.c file. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_CDC_IF_H__ -#define __USBD_CDC_IF_H__ - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_cdc.h" - -/* USER CODE BEGIN INCLUDE */ - -/* USER CODE END INCLUDE */ - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @brief For Usb device. - * @{ - */ - -/** @defgroup USBD_CDC_IF USBD_CDC_IF - * @brief Usb VCP device module - * @{ - */ - -/** @defgroup USBD_CDC_IF_Exported_Defines USBD_CDC_IF_Exported_Defines - * @brief Defines. - * @{ - */ -/* USER CODE BEGIN EXPORTED_DEFINES */ - -/* USER CODE END EXPORTED_DEFINES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Exported_Types USBD_CDC_IF_Exported_Types - * @brief Types. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_TYPES */ - -/* USER CODE END EXPORTED_TYPES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Exported_Macros USBD_CDC_IF_Exported_Macros - * @brief Aliases. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_MACRO */ - -/* USER CODE END EXPORTED_MACRO */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Exported_Variables USBD_CDC_IF_Exported_Variables - * @brief Public variables. - * @{ - */ - -/** CDC Interface callback. */ -extern USBD_CDC_ItfTypeDef USBD_Interface_fops_FS; - -/* USER CODE BEGIN EXPORTED_VARIABLES */ - -/* USER CODE END EXPORTED_VARIABLES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Exported_FunctionsPrototype USBD_CDC_IF_Exported_FunctionsPrototype - * @brief Public functions declaration. - * @{ - */ - -uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len); - -/* USER CODE BEGIN EXPORTED_FUNCTIONS */ - -/* USER CODE END EXPORTED_FUNCTIONS */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_CDC_IF_H__ */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Inc/usbd_conf.h b/Samples/Nucleo-TPM/L476RG/Inc/usbd_conf.h deleted file mode 100644 index df2e31c1..00000000 --- a/Samples/Nucleo-TPM/L476RG/Inc/usbd_conf.h +++ /dev/null @@ -1,204 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_conf.h - * @version : v2.0_Cube - * @brief : Header for usbd_conf.c file. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_CONF__H__ -#define __USBD_CONF__H__ - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include -#include -#include -#include "stm32l4xx.h" -#include "stm32l4xx_hal.h" - -/* USER CODE BEGIN INCLUDE */ - -/* USER CODE END INCLUDE */ - -/** @addtogroup USBD_OTG_DRIVER - * @brief Driver for Usb device. - * @{ - */ - -/** @defgroup USBD_CONF USBD_CONF - * @brief Configuration file for Usb otg low level driver. - * @{ - */ - -/** @defgroup USBD_CONF_Exported_Variables USBD_CONF_Exported_Variables - * @brief Public variables. - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_CONF_Exported_Defines USBD_CONF_Exported_Defines - * @brief Defines for configuration of the Usb device. - * @{ - */ - -/*---------- -----------*/ -#define USBD_MAX_NUM_INTERFACES 1 -/*---------- -----------*/ -#define USBD_MAX_NUM_CONFIGURATION 1 -/*---------- -----------*/ -#define USBD_MAX_STR_DESC_SIZ 512 -/*---------- -----------*/ -#define USBD_SUPPORT_USER_STRING 0 -/*---------- -----------*/ -#define USBD_DEBUG_LEVEL 0 -/*---------- -----------*/ -#define USBD_LPM_ENABLED 1 -/*---------- -----------*/ -#define USBD_SELF_POWERED 1 - -/****************************************/ -/* #define for FS and HS identification */ -#define DEVICE_FS 0 - -/** - * @} - */ - -/** @defgroup USBD_CONF_Exported_Macros USBD_CONF_Exported_Macros - * @brief Aliases. - * @{ - */ - -/* Memory management macros */ - -/** Alias for memory allocation. */ -#define USBD_malloc (uint32_t *)USBD_static_malloc - -/** Alias for memory release. */ -#define USBD_free USBD_static_free - -/** Alias for memory set. */ -#define USBD_memset /* Not used */ - -/** Alias for memory copy. */ -#define USBD_memcpy /* Not used */ - -/** Alias for delay. */ -#define USBD_Delay HAL_Delay - -/* DEBUG macros */ - -#if (USBD_DEBUG_LEVEL > 0) -#define USBD_UsrLog(...) printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBD_UsrLog(...) -#endif - -#if (USBD_DEBUG_LEVEL > 1) - -#define USBD_ErrLog(...) printf("ERROR: ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBD_ErrLog(...) -#endif - -#if (USBD_DEBUG_LEVEL > 2) -#define USBD_DbgLog(...) printf("DEBUG : ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBD_DbgLog(...) -#endif - -/** - * @} - */ - -/** @defgroup USBD_CONF_Exported_Types USBD_CONF_Exported_Types - * @brief Types. - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_CONF_Exported_FunctionsPrototype USBD_CONF_Exported_FunctionsPrototype - * @brief Declaration of public functions for Usb device. - * @{ - */ - -/* Exported functions -------------------------------------------------------*/ -void *USBD_static_malloc(uint32_t size); -void USBD_static_free(void *p); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_CONF__H__ */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Inc/usbd_desc.h b/Samples/Nucleo-TPM/L476RG/Inc/usbd_desc.h deleted file mode 100644 index 98fd79dc..00000000 --- a/Samples/Nucleo-TPM/L476RG/Inc/usbd_desc.h +++ /dev/null @@ -1,156 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_desc.h - * @version : v2.0_Cube - * @brief : Header for usbd_desc.c file. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_DESC__H__ -#define __USBD_DESC__H__ - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" - -/* USER CODE BEGIN INCLUDE */ - -/* USER CODE END INCLUDE */ - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_DESC USBD_DESC - * @brief Usb device descriptors module. - * @{ - */ - -/** @defgroup USBD_DESC_Exported_Defines USBD_DESC_Exported_Defines - * @brief Defines. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_DEFINES */ - -/* USER CODE END EXPORTED_DEFINES */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Exported_TypesDefinitions USBD_DESC_Exported_TypesDefinitions - * @brief Types. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_TYPES */ - -/* USER CODE END EXPORTED_TYPES */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Exported_Macros USBD_DESC_Exported_Macros - * @brief Aliases. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_MACRO */ - -/* USER CODE END EXPORTED_MACRO */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Exported_Variables USBD_DESC_Exported_Variables - * @brief Public variables. - * @{ - */ - -/** Descriptor for the Usb device. */ -extern USBD_DescriptorsTypeDef FS_Desc; - -/* USER CODE BEGIN EXPORTED_VARIABLES */ - -/* USER CODE END EXPORTED_VARIABLES */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Exported_FunctionsPrototype USBD_DESC_Exported_FunctionsPrototype - * @brief Public functions declaration. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_FUNCTIONS */ - -/* USER CODE END EXPORTED_FUNCTIONS */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_DESC__H__ */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h b/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h deleted file mode 100644 index 36badcdb..00000000 --- a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h +++ /dev/null @@ -1,179 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_cdc.h - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief header file for the usbd_cdc.c file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_CDC_H -#define __USB_CDC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_ioreq.h" - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup usbd_cdc - * @brief This file is the Header file for usbd_cdc.c - * @{ - */ - - -/** @defgroup usbd_cdc_Exported_Defines - * @{ - */ -#define CDC_IN_EP 0x81 /* EP1 for data IN */ -#define CDC_OUT_EP 0x01 /* EP1 for data OUT */ -#define CDC_CMD_EP 0x82 /* EP2 for CDC commands */ - -/* CDC Endpoints parameters: you can fine tune these values depending on the needed baudrates and performance. */ -#define CDC_DATA_HS_MAX_PACKET_SIZE 512 /* Endpoint IN & OUT Packet size */ -#define CDC_DATA_FS_MAX_PACKET_SIZE 64 /* Endpoint IN & OUT Packet size */ -#define CDC_CMD_PACKET_SIZE 8 /* Control Endpoint Packet size */ - -#define USB_CDC_CONFIG_DESC_SIZ 67 -#define CDC_DATA_HS_IN_PACKET_SIZE CDC_DATA_HS_MAX_PACKET_SIZE -#define CDC_DATA_HS_OUT_PACKET_SIZE CDC_DATA_HS_MAX_PACKET_SIZE - -#define CDC_DATA_FS_IN_PACKET_SIZE CDC_DATA_FS_MAX_PACKET_SIZE -#define CDC_DATA_FS_OUT_PACKET_SIZE CDC_DATA_FS_MAX_PACKET_SIZE - -/*---------------------------------------------------------------------*/ -/* CDC definitions */ -/*---------------------------------------------------------------------*/ -#define CDC_SEND_ENCAPSULATED_COMMAND 0x00 -#define CDC_GET_ENCAPSULATED_RESPONSE 0x01 -#define CDC_SET_COMM_FEATURE 0x02 -#define CDC_GET_COMM_FEATURE 0x03 -#define CDC_CLEAR_COMM_FEATURE 0x04 -#define CDC_SET_LINE_CODING 0x20 -#define CDC_GET_LINE_CODING 0x21 -#define CDC_SET_CONTROL_LINE_STATE 0x22 -#define CDC_SEND_BREAK 0x23 - -/** - * @} - */ - - -/** @defgroup USBD_CORE_Exported_TypesDefinitions - * @{ - */ - -/** - * @} - */ -typedef struct -{ - uint32_t bitrate; - uint8_t format; - uint8_t paritytype; - uint8_t datatype; -}USBD_CDC_LineCodingTypeDef; - -typedef struct _USBD_CDC_Itf -{ - int8_t (* Init) (void); - int8_t (* DeInit) (void); - int8_t (* Control) (uint8_t, uint8_t * , uint16_t); - int8_t (* Receive) (uint8_t *, uint32_t *); - -}USBD_CDC_ItfTypeDef; - - -typedef struct -{ - uint32_t data[CDC_DATA_HS_MAX_PACKET_SIZE/4]; /* Force 32bits alignment */ - uint8_t CmdOpCode; - uint8_t CmdLength; - uint8_t *RxBuffer; - uint8_t *TxBuffer; - uint32_t RxLength; - uint32_t TxLength; - - __IO uint32_t TxState; - __IO uint32_t RxState; -} -USBD_CDC_HandleTypeDef; - - - -/** @defgroup USBD_CORE_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_CORE_Exported_Variables - * @{ - */ - -extern USBD_ClassTypeDef USBD_CDC; -#define USBD_CDC_CLASS &USBD_CDC -/** - * @} - */ - -/** @defgroup USB_CORE_Exported_Functions - * @{ - */ -uint8_t USBD_CDC_RegisterInterface (USBD_HandleTypeDef *pdev, - USBD_CDC_ItfTypeDef *fops); - -uint8_t USBD_CDC_SetTxBuffer (USBD_HandleTypeDef *pdev, - uint8_t *pbuff, - uint16_t length); - -uint8_t USBD_CDC_SetRxBuffer (USBD_HandleTypeDef *pdev, - uint8_t *pbuff); - -uint8_t USBD_CDC_ReceivePacket (USBD_HandleTypeDef *pdev); - -uint8_t USBD_CDC_TransmitPacket (USBD_HandleTypeDef *pdev); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USB_CDC_H */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c b/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c deleted file mode 100644 index cb77a71a..00000000 --- a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c +++ /dev/null @@ -1,925 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_cdc.c - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief This file provides the high layer firmware functions to manage the - * following functionalities of the USB CDC Class: - * - Initialization and Configuration of high and low layer - * - Enumeration as CDC Device (and enumeration for each implemented memory interface) - * - OUT/IN data transfer - * - Command IN transfer (class requests management) - * - Error management - * - * @verbatim - * - * =================================================================== - * CDC Class Driver Description - * =================================================================== - * This driver manages the "Universal Serial Bus Class Definitions for Communications Devices - * Revision 1.2 November 16, 2007" and the sub-protocol specification of "Universal Serial Bus - * Communications Class Subclass Specification for PSTN Devices Revision 1.2 February 9, 2007" - * This driver implements the following aspects of the specification: - * - Device descriptor management - * - Configuration descriptor management - * - Enumeration as CDC device with 2 data endpoints (IN and OUT) and 1 command endpoint (IN) - * - Requests management (as described in section 6.2 in specification) - * - Abstract Control Model compliant - * - Union Functional collection (using 1 IN endpoint for control) - * - Data interface class - * - * These aspects may be enriched or modified for a specific user application. - * - * This driver doesn't implement the following aspects of the specification - * (but it is possible to manage these features with some modifications on this driver): - * - Any class-specific aspect relative to communication classes should be managed by user application. - * - All communication classes other than PSTN are not managed - * - * @endverbatim - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_cdc.h" -#include "usbd_desc.h" -#include "usbd_ctlreq.h" - - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup USBD_CDC - * @brief usbd core module - * @{ - */ - -/** @defgroup USBD_CDC_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_CDC_Private_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_CDC_Private_Macros - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_CDC_Private_FunctionPrototypes - * @{ - */ - - -static uint8_t USBD_CDC_Init (USBD_HandleTypeDef *pdev, - uint8_t cfgidx); - -static uint8_t USBD_CDC_DeInit (USBD_HandleTypeDef *pdev, - uint8_t cfgidx); - -static uint8_t USBD_CDC_Setup (USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req); - -static uint8_t USBD_CDC_DataIn (USBD_HandleTypeDef *pdev, - uint8_t epnum); - -static uint8_t USBD_CDC_DataOut (USBD_HandleTypeDef *pdev, - uint8_t epnum); - -static uint8_t USBD_CDC_EP0_RxReady (USBD_HandleTypeDef *pdev); - -static uint8_t *USBD_CDC_GetFSCfgDesc (uint16_t *length); - -static uint8_t *USBD_CDC_GetHSCfgDesc (uint16_t *length); - -static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length); - -static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length); - -uint8_t *USBD_CDC_GetDeviceQualifierDescriptor (uint16_t *length); - -/* USB Standard Device Descriptor */ -__ALIGN_BEGIN static uint8_t USBD_CDC_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] __ALIGN_END = -{ - USB_LEN_DEV_QUALIFIER_DESC, - USB_DESC_TYPE_DEVICE_QUALIFIER, - 0x00, - 0x02, - 0x00, - 0x00, - 0x00, - 0x40, - 0x01, - 0x00, -}; - -/** - * @} - */ - -/** @defgroup USBD_CDC_Private_Variables - * @{ - */ - - -/* CDC interface class callbacks structure */ -USBD_ClassTypeDef USBD_CDC = -{ - USBD_CDC_Init, - USBD_CDC_DeInit, - USBD_CDC_Setup, - NULL, /* EP0_TxSent, */ - USBD_CDC_EP0_RxReady, - USBD_CDC_DataIn, - USBD_CDC_DataOut, - NULL, - NULL, - NULL, - USBD_CDC_GetHSCfgDesc, - USBD_CDC_GetFSCfgDesc, - USBD_CDC_GetOtherSpeedCfgDesc, - USBD_CDC_GetDeviceQualifierDescriptor, -}; - -/* USB CDC device Configuration Descriptor */ -__ALIGN_BEGIN uint8_t USBD_CDC_CfgHSDesc[USB_CDC_CONFIG_DESC_SIZ] __ALIGN_END = -{ - /*Configuration Descriptor*/ - 0x09, /* bLength: Configuration Descriptor size */ - USB_DESC_TYPE_CONFIGURATION, /* bDescriptorType: Configuration */ - USB_CDC_CONFIG_DESC_SIZ, /* wTotalLength:no of returned bytes */ - 0x00, - 0x02, /* bNumInterfaces: 2 interface */ - 0x01, /* bConfigurationValue: Configuration value */ - 0x00, /* iConfiguration: Index of string descriptor describing the configuration */ - 0xC0, /* bmAttributes: self powered */ - 0x32, /* MaxPower 0 mA */ - - /*---------------------------------------------------------------------------*/ - - /*Interface Descriptor */ - 0x09, /* bLength: Interface Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: Interface */ - /* Interface descriptor type */ - 0x00, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x01, /* bNumEndpoints: One endpoints used */ - 0x02, /* bInterfaceClass: Communication Interface Class */ - 0x02, /* bInterfaceSubClass: Abstract Control Model */ - 0x01, /* bInterfaceProtocol: Common AT commands */ - 0x00, /* iInterface: */ - - /*Header Functional Descriptor*/ - 0x05, /* bLength: Endpoint Descriptor size */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x00, /* bDescriptorSubtype: Header Func Desc */ - 0x10, /* bcdCDC: spec release number */ - 0x01, - - /*Call Management Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x01, /* bDescriptorSubtype: Call Management Func Desc */ - 0x00, /* bmCapabilities: D0+D1 */ - 0x01, /* bDataInterface: 1 */ - - /*ACM Functional Descriptor*/ - 0x04, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x02, /* bDescriptorSubtype: Abstract Control Management desc */ - 0x02, /* bmCapabilities */ - - /*Union Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x06, /* bDescriptorSubtype: Union func desc */ - 0x00, /* bMasterInterface: Communication class interface */ - 0x01, /* bSlaveInterface0: Data Class Interface */ - - /*Endpoint 2 Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_CMD_EP, /* bEndpointAddress */ - 0x03, /* bmAttributes: Interrupt */ - LOBYTE(CDC_CMD_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_CMD_PACKET_SIZE), - 0x10, /* bInterval: */ - /*---------------------------------------------------------------------------*/ - - /*Data class interface descriptor*/ - 0x09, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: */ - 0x01, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x02, /* bNumEndpoints: Two endpoints used */ - 0x0A, /* bInterfaceClass: CDC */ - 0x00, /* bInterfaceSubClass: */ - 0x00, /* bInterfaceProtocol: */ - 0x00, /* iInterface: */ - - /*Endpoint OUT Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_OUT_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - LOBYTE(CDC_DATA_HS_MAX_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_DATA_HS_MAX_PACKET_SIZE), - 0x00, /* bInterval: ignore for Bulk transfer */ - - /*Endpoint IN Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_IN_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - LOBYTE(CDC_DATA_HS_MAX_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_DATA_HS_MAX_PACKET_SIZE), - 0x00 /* bInterval: ignore for Bulk transfer */ -} ; - - -/* USB CDC device Configuration Descriptor */ -__ALIGN_BEGIN uint8_t USBD_CDC_CfgFSDesc[USB_CDC_CONFIG_DESC_SIZ] __ALIGN_END = -{ - /*Configuration Descriptor*/ - 0x09, /* bLength: Configuration Descriptor size */ - USB_DESC_TYPE_CONFIGURATION, /* bDescriptorType: Configuration */ - USB_CDC_CONFIG_DESC_SIZ, /* wTotalLength:no of returned bytes */ - 0x00, - 0x02, /* bNumInterfaces: 2 interface */ - 0x01, /* bConfigurationValue: Configuration value */ - 0x00, /* iConfiguration: Index of string descriptor describing the configuration */ - 0xC0, /* bmAttributes: self powered */ - 0x32, /* MaxPower 0 mA */ - - /*---------------------------------------------------------------------------*/ - - /*Interface Descriptor */ - 0x09, /* bLength: Interface Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: Interface */ - /* Interface descriptor type */ - 0x00, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x01, /* bNumEndpoints: One endpoints used */ - 0x02, /* bInterfaceClass: Communication Interface Class */ - 0x02, /* bInterfaceSubClass: Abstract Control Model */ - 0x01, /* bInterfaceProtocol: Common AT commands */ - 0x00, /* iInterface: */ - - /*Header Functional Descriptor*/ - 0x05, /* bLength: Endpoint Descriptor size */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x00, /* bDescriptorSubtype: Header Func Desc */ - 0x10, /* bcdCDC: spec release number */ - 0x01, - - /*Call Management Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x01, /* bDescriptorSubtype: Call Management Func Desc */ - 0x00, /* bmCapabilities: D0+D1 */ - 0x01, /* bDataInterface: 1 */ - - /*ACM Functional Descriptor*/ - 0x04, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x02, /* bDescriptorSubtype: Abstract Control Management desc */ - 0x02, /* bmCapabilities */ - - /*Union Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x06, /* bDescriptorSubtype: Union func desc */ - 0x00, /* bMasterInterface: Communication class interface */ - 0x01, /* bSlaveInterface0: Data Class Interface */ - - /*Endpoint 2 Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_CMD_EP, /* bEndpointAddress */ - 0x03, /* bmAttributes: Interrupt */ - LOBYTE(CDC_CMD_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_CMD_PACKET_SIZE), - 0x10, /* bInterval: */ - /*---------------------------------------------------------------------------*/ - - /*Data class interface descriptor*/ - 0x09, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: */ - 0x01, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x02, /* bNumEndpoints: Two endpoints used */ - 0x0A, /* bInterfaceClass: CDC */ - 0x00, /* bInterfaceSubClass: */ - 0x00, /* bInterfaceProtocol: */ - 0x00, /* iInterface: */ - - /*Endpoint OUT Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_OUT_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, /* bInterval: ignore for Bulk transfer */ - - /*Endpoint IN Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_IN_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00 /* bInterval: ignore for Bulk transfer */ -} ; - -__ALIGN_BEGIN uint8_t USBD_CDC_OtherSpeedCfgDesc[USB_CDC_CONFIG_DESC_SIZ] __ALIGN_END = -{ - 0x09, /* bLength: Configuation Descriptor size */ - USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION, - USB_CDC_CONFIG_DESC_SIZ, - 0x00, - 0x02, /* bNumInterfaces: 2 interfaces */ - 0x01, /* bConfigurationValue: */ - 0x04, /* iConfiguration: */ - 0xC0, /* bmAttributes: */ - 0x32, /* MaxPower 100 mA */ - - /*Interface Descriptor */ - 0x09, /* bLength: Interface Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: Interface */ - /* Interface descriptor type */ - 0x00, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x01, /* bNumEndpoints: One endpoints used */ - 0x02, /* bInterfaceClass: Communication Interface Class */ - 0x02, /* bInterfaceSubClass: Abstract Control Model */ - 0x01, /* bInterfaceProtocol: Common AT commands */ - 0x00, /* iInterface: */ - - /*Header Functional Descriptor*/ - 0x05, /* bLength: Endpoint Descriptor size */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x00, /* bDescriptorSubtype: Header Func Desc */ - 0x10, /* bcdCDC: spec release number */ - 0x01, - - /*Call Management Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x01, /* bDescriptorSubtype: Call Management Func Desc */ - 0x00, /* bmCapabilities: D0+D1 */ - 0x01, /* bDataInterface: 1 */ - - /*ACM Functional Descriptor*/ - 0x04, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x02, /* bDescriptorSubtype: Abstract Control Management desc */ - 0x02, /* bmCapabilities */ - - /*Union Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x06, /* bDescriptorSubtype: Union func desc */ - 0x00, /* bMasterInterface: Communication class interface */ - 0x01, /* bSlaveInterface0: Data Class Interface */ - - /*Endpoint 2 Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT , /* bDescriptorType: Endpoint */ - CDC_CMD_EP, /* bEndpointAddress */ - 0x03, /* bmAttributes: Interrupt */ - LOBYTE(CDC_CMD_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_CMD_PACKET_SIZE), - 0xFF, /* bInterval: */ - - /*---------------------------------------------------------------------------*/ - - /*Data class interface descriptor*/ - 0x09, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: */ - 0x01, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x02, /* bNumEndpoints: Two endpoints used */ - 0x0A, /* bInterfaceClass: CDC */ - 0x00, /* bInterfaceSubClass: */ - 0x00, /* bInterfaceProtocol: */ - 0x00, /* iInterface: */ - - /*Endpoint OUT Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_OUT_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - 0x40, /* wMaxPacketSize: */ - 0x00, - 0x00, /* bInterval: ignore for Bulk transfer */ - - /*Endpoint IN Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_IN_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - 0x40, /* wMaxPacketSize: */ - 0x00, - 0x00 /* bInterval */ -}; - -/** - * @} - */ - -/** @defgroup USBD_CDC_Private_Functions - * @{ - */ - -/** - * @brief USBD_CDC_Init - * Initialize the CDC interface - * @param pdev: device instance - * @param cfgidx: Configuration index - * @retval status - */ -static uint8_t USBD_CDC_Init (USBD_HandleTypeDef *pdev, - uint8_t cfgidx) -{ - uint8_t ret = 0; - USBD_CDC_HandleTypeDef *hcdc; - - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - /* Open EP IN */ - USBD_LL_OpenEP(pdev, - CDC_IN_EP, - USBD_EP_TYPE_BULK, - CDC_DATA_HS_IN_PACKET_SIZE); - - /* Open EP OUT */ - USBD_LL_OpenEP(pdev, - CDC_OUT_EP, - USBD_EP_TYPE_BULK, - CDC_DATA_HS_OUT_PACKET_SIZE); - - } - else - { - /* Open EP IN */ - USBD_LL_OpenEP(pdev, - CDC_IN_EP, - USBD_EP_TYPE_BULK, - CDC_DATA_FS_IN_PACKET_SIZE); - - /* Open EP OUT */ - USBD_LL_OpenEP(pdev, - CDC_OUT_EP, - USBD_EP_TYPE_BULK, - CDC_DATA_FS_OUT_PACKET_SIZE); - } - /* Open Command IN EP */ - USBD_LL_OpenEP(pdev, - CDC_CMD_EP, - USBD_EP_TYPE_INTR, - CDC_CMD_PACKET_SIZE); - - - pdev->pClassData = USBD_malloc(sizeof (USBD_CDC_HandleTypeDef)); - - if(pdev->pClassData == NULL) - { - ret = 1; - } - else - { - hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - /* Init physical Interface components */ - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init(); - - /* Init Xfer states */ - hcdc->TxState =0; - hcdc->RxState =0; - - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - /* Prepare Out endpoint to receive next packet */ - USBD_LL_PrepareReceive(pdev, - CDC_OUT_EP, - hcdc->RxBuffer, - CDC_DATA_HS_OUT_PACKET_SIZE); - } - else - { - /* Prepare Out endpoint to receive next packet */ - USBD_LL_PrepareReceive(pdev, - CDC_OUT_EP, - hcdc->RxBuffer, - CDC_DATA_FS_OUT_PACKET_SIZE); - } - - - } - return ret; -} - -/** - * @brief USBD_CDC_Init - * DeInitialize the CDC layer - * @param pdev: device instance - * @param cfgidx: Configuration index - * @retval status - */ -static uint8_t USBD_CDC_DeInit (USBD_HandleTypeDef *pdev, - uint8_t cfgidx) -{ - uint8_t ret = 0; - - /* Open EP IN */ - USBD_LL_CloseEP(pdev, - CDC_IN_EP); - - /* Open EP OUT */ - USBD_LL_CloseEP(pdev, - CDC_OUT_EP); - - /* Open Command IN EP */ - USBD_LL_CloseEP(pdev, - CDC_CMD_EP); - - - /* DeInit physical Interface components */ - if(pdev->pClassData != NULL) - { - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit(); - USBD_free(pdev->pClassData); - pdev->pClassData = NULL; - } - - return ret; -} - -/** - * @brief USBD_CDC_Setup - * Handle the CDC specific requests - * @param pdev: instance - * @param req: usb requests - * @retval status - */ -static uint8_t USBD_CDC_Setup (USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - static uint8_t ifalt = 0; - - switch (req->bmRequest & USB_REQ_TYPE_MASK) - { - case USB_REQ_TYPE_CLASS : - if (req->wLength) - { - if (req->bmRequest & 0x80) - { - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, - (uint8_t *)hcdc->data, - req->wLength); - USBD_CtlSendData (pdev, - (uint8_t *)hcdc->data, - req->wLength); - } - else - { - hcdc->CmdOpCode = req->bRequest; - hcdc->CmdLength = req->wLength; - - USBD_CtlPrepareRx (pdev, - (uint8_t *)hcdc->data, - req->wLength); - } - - } - else - { - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, - (uint8_t*)req, - 0); - } - break; - - case USB_REQ_TYPE_STANDARD: - switch (req->bRequest) - { - case USB_REQ_GET_INTERFACE : - USBD_CtlSendData (pdev, - &ifalt, - 1); - break; - - case USB_REQ_SET_INTERFACE : - break; - } - - default: - break; - } - return USBD_OK; -} - -/** - * @brief USBD_CDC_DataIn - * Data sent on non-control IN endpoint - * @param pdev: device instance - * @param epnum: endpoint number - * @retval status - */ -static uint8_t USBD_CDC_DataIn (USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - if(pdev->pClassData != NULL) - { - - hcdc->TxState = 0; - - return USBD_OK; - } - else - { - return USBD_FAIL; - } -} - -/** - * @brief USBD_CDC_DataOut - * Data received on non-control Out endpoint - * @param pdev: device instance - * @param epnum: endpoint number - * @retval status - */ -static uint8_t USBD_CDC_DataOut (USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - /* Get the received data length */ - hcdc->RxLength = USBD_LL_GetRxDataSize (pdev, epnum); - - /* USB data will be immediately processed, this allow next USB traffic being - NAKed till the end of the application Xfer */ - if(pdev->pClassData != NULL) - { - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength); - - return USBD_OK; - } - else - { - return USBD_FAIL; - } -} - - - -/** - * @brief USBD_CDC_DataOut - * Data received on non-control Out endpoint - * @param pdev: device instance - * @param epnum: endpoint number - * @retval status - */ -static uint8_t USBD_CDC_EP0_RxReady (USBD_HandleTypeDef *pdev) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - if((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFF)) - { - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, - (uint8_t *)hcdc->data, - hcdc->CmdLength); - hcdc->CmdOpCode = 0xFF; - - } - return USBD_OK; -} - -/** - * @brief USBD_CDC_GetFSCfgDesc - * Return configuration descriptor - * @param speed : current device speed - * @param length : pointer data length - * @retval pointer to descriptor buffer - */ -static uint8_t *USBD_CDC_GetFSCfgDesc (uint16_t *length) -{ - *length = sizeof (USBD_CDC_CfgFSDesc); - return USBD_CDC_CfgFSDesc; -} - -/** - * @brief USBD_CDC_GetHSCfgDesc - * Return configuration descriptor - * @param speed : current device speed - * @param length : pointer data length - * @retval pointer to descriptor buffer - */ -static uint8_t *USBD_CDC_GetHSCfgDesc (uint16_t *length) -{ - *length = sizeof (USBD_CDC_CfgHSDesc); - return USBD_CDC_CfgHSDesc; -} - -/** - * @brief USBD_CDC_GetCfgDesc - * Return configuration descriptor - * @param speed : current device speed - * @param length : pointer data length - * @retval pointer to descriptor buffer - */ -static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length) -{ - *length = sizeof (USBD_CDC_OtherSpeedCfgDesc); - return USBD_CDC_OtherSpeedCfgDesc; -} - -/** -* @brief DeviceQualifierDescriptor -* return Device Qualifier descriptor -* @param length : pointer data length -* @retval pointer to descriptor buffer -*/ -uint8_t *USBD_CDC_GetDeviceQualifierDescriptor (uint16_t *length) -{ - *length = sizeof (USBD_CDC_DeviceQualifierDesc); - return USBD_CDC_DeviceQualifierDesc; -} - -/** -* @brief USBD_CDC_RegisterInterface - * @param pdev: device instance - * @param fops: CD Interface callback - * @retval status - */ -uint8_t USBD_CDC_RegisterInterface (USBD_HandleTypeDef *pdev, - USBD_CDC_ItfTypeDef *fops) -{ - uint8_t ret = USBD_FAIL; - - if(fops != NULL) - { - pdev->pUserData= fops; - ret = USBD_OK; - } - - return ret; -} - -/** - * @brief USBD_CDC_SetTxBuffer - * @param pdev: device instance - * @param pbuff: Tx Buffer - * @retval status - */ -uint8_t USBD_CDC_SetTxBuffer (USBD_HandleTypeDef *pdev, - uint8_t *pbuff, - uint16_t length) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - hcdc->TxBuffer = pbuff; - hcdc->TxLength = length; - - return USBD_OK; -} - - -/** - * @brief USBD_CDC_SetRxBuffer - * @param pdev: device instance - * @param pbuff: Rx Buffer - * @retval status - */ -uint8_t USBD_CDC_SetRxBuffer (USBD_HandleTypeDef *pdev, - uint8_t *pbuff) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - hcdc->RxBuffer = pbuff; - - return USBD_OK; -} - -/** - * @brief USBD_CDC_DataOut - * Data received on non-control Out endpoint - * @param pdev: device instance - * @param epnum: endpoint number - * @retval status - */ -uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - if(pdev->pClassData != NULL) - { - if(hcdc->TxState == 0) - { - /* Tx Transfer in progress */ - hcdc->TxState = 1; - - /* Transmit next packet */ - USBD_LL_Transmit(pdev, - CDC_IN_EP, - hcdc->TxBuffer, - hcdc->TxLength); - - return USBD_OK; - } - else - { - return USBD_BUSY; - } - } - else - { - return USBD_FAIL; - } -} - - -/** - * @brief USBD_CDC_ReceivePacket - * prepare OUT Endpoint for reception - * @param pdev: device instance - * @retval status - */ -uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - /* Suspend or Resume USB Out process */ - if(pdev->pClassData != NULL) - { - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - /* Prepare Out endpoint to receive next packet */ - USBD_LL_PrepareReceive(pdev, - CDC_OUT_EP, - hcdc->RxBuffer, - CDC_DATA_HS_OUT_PACKET_SIZE); - } - else - { - /* Prepare Out endpoint to receive next packet */ - USBD_LL_PrepareReceive(pdev, - CDC_OUT_EP, - hcdc->RxBuffer, - CDC_DATA_FS_OUT_PACKET_SIZE); - } - return USBD_OK; - } - else - { - return USBD_FAIL; - } -} -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h b/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h deleted file mode 100644 index fcfffa1e..00000000 --- a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h +++ /dev/null @@ -1,167 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_core.h - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief Header file for usbd_core.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_CORE_H -#define __USBD_CORE_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_conf.h" -#include "usbd_def.h" -#include "usbd_ioreq.h" -#include "usbd_ctlreq.h" - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_CORE - * @brief This file is the Header file for usbd_core.c file - * @{ - */ - - -/** @defgroup USBD_CORE_Exported_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_CORE_Exported_TypesDefinitions - * @{ - */ - - -/** - * @} - */ - - - -/** @defgroup USBD_CORE_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_CORE_Exported_Variables - * @{ - */ -#define USBD_SOF USBD_LL_SOF -/** - * @} - */ - -/** @defgroup USBD_CORE_Exported_FunctionsPrototype - * @{ - */ -USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id); -USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass); - -USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); -USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); - -USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup); -USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata); -USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata); - -USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed); -USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev); - -USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); -USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); - -USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev); - -/* USBD Low Level Driver */ -USBD_StatusTypeDef USBD_LL_Init (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_DeInit (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Stop (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_OpenEP (USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_mps); - -USBD_StatusTypeDef USBD_LL_CloseEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_FlushEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_StallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_ClearStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -uint8_t USBD_LL_IsStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_SetUSBAddress (USBD_HandleTypeDef *pdev, uint8_t dev_addr); -USBD_StatusTypeDef USBD_LL_Transmit (USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t *pbuf, - uint16_t size); - -USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t *pbuf, - uint16_t size); - -uint32_t USBD_LL_GetRxDataSize (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -void USBD_LL_Delay (uint32_t Delay); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_CORE_H */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h b/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h deleted file mode 100644 index f4ddfb2d..00000000 --- a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h +++ /dev/null @@ -1,113 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_req.h - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief Header file for the usbd_req.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_REQUEST_H -#define __USB_REQUEST_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" - - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_REQ - * @brief header file for the usbd_req.c file - * @{ - */ - -/** @defgroup USBD_REQ_Exported_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Exported_Types - * @{ - */ -/** - * @} - */ - - - -/** @defgroup USBD_REQ_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBD_REQ_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBD_REQ_Exported_FunctionsPrototype - * @{ - */ - -USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); -USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); -USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); - - -void USBD_CtlError (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); - -void USBD_ParseSetupRequest (USBD_SetupReqTypedef *req, uint8_t *pdata); - -void USBD_GetString (uint8_t *desc, uint8_t *unicode, uint16_t *len); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USB_REQUEST_H */ - -/** - * @} - */ - -/** -* @} -*/ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h b/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h deleted file mode 100644 index 34a42200..00000000 --- a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h +++ /dev/null @@ -1,330 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_def.h - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief General defines for the usb device library - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_DEF_H -#define __USBD_DEF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_conf.h" - -/** @addtogroup STM32_USBD_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USB_DEF - * @brief general defines for the usb device library file - * @{ - */ - -/** @defgroup USB_DEF_Exported_Defines - * @{ - */ - -#ifndef NULL -#define NULL 0 -#endif - - -#define USB_LEN_DEV_QUALIFIER_DESC 0x0A -#define USB_LEN_DEV_DESC 0x12 -#define USB_LEN_CFG_DESC 0x09 -#define USB_LEN_IF_DESC 0x09 -#define USB_LEN_EP_DESC 0x07 -#define USB_LEN_OTG_DESC 0x03 -#define USB_LEN_LANGID_STR_DESC 0x04 -#define USB_LEN_OTHER_SPEED_DESC_SIZ 0x09 - -#define USBD_IDX_LANGID_STR 0x00 -#define USBD_IDX_MFC_STR 0x01 -#define USBD_IDX_PRODUCT_STR 0x02 -#define USBD_IDX_SERIAL_STR 0x03 -#define USBD_IDX_CONFIG_STR 0x04 -#define USBD_IDX_INTERFACE_STR 0x05 - -#define USB_REQ_TYPE_STANDARD 0x00 -#define USB_REQ_TYPE_CLASS 0x20 -#define USB_REQ_TYPE_VENDOR 0x40 -#define USB_REQ_TYPE_MASK 0x60 - -#define USB_REQ_RECIPIENT_DEVICE 0x00 -#define USB_REQ_RECIPIENT_INTERFACE 0x01 -#define USB_REQ_RECIPIENT_ENDPOINT 0x02 -#define USB_REQ_RECIPIENT_MASK 0x03 - -#define USB_REQ_GET_STATUS 0x00 -#define USB_REQ_CLEAR_FEATURE 0x01 -#define USB_REQ_SET_FEATURE 0x03 -#define USB_REQ_SET_ADDRESS 0x05 -#define USB_REQ_GET_DESCRIPTOR 0x06 -#define USB_REQ_SET_DESCRIPTOR 0x07 -#define USB_REQ_GET_CONFIGURATION 0x08 -#define USB_REQ_SET_CONFIGURATION 0x09 -#define USB_REQ_GET_INTERFACE 0x0A -#define USB_REQ_SET_INTERFACE 0x0B -#define USB_REQ_SYNCH_FRAME 0x0C - -#define USB_DESC_TYPE_DEVICE 1 -#define USB_DESC_TYPE_CONFIGURATION 2 -#define USB_DESC_TYPE_STRING 3 -#define USB_DESC_TYPE_INTERFACE 4 -#define USB_DESC_TYPE_ENDPOINT 5 -#define USB_DESC_TYPE_DEVICE_QUALIFIER 6 -#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7 -#define USB_DESC_TYPE_BOS 0x0F - -#define USB_CONFIG_REMOTE_WAKEUP 2 -#define USB_CONFIG_SELF_POWERED 1 - -#define USB_FEATURE_EP_HALT 0 -#define USB_FEATURE_REMOTE_WAKEUP 1 -#define USB_FEATURE_TEST_MODE 2 - -#define USB_DEVICE_CAPABITY_TYPE 0x10 - -#define USB_HS_MAX_PACKET_SIZE 512 -#define USB_FS_MAX_PACKET_SIZE 64 -#define USB_MAX_EP0_SIZE 64 - -/* Device Status */ -#define USBD_STATE_DEFAULT 1 -#define USBD_STATE_ADDRESSED 2 -#define USBD_STATE_CONFIGURED 3 -#define USBD_STATE_SUSPENDED 4 - - -/* EP0 State */ -#define USBD_EP0_IDLE 0 -#define USBD_EP0_SETUP 1 -#define USBD_EP0_DATA_IN 2 -#define USBD_EP0_DATA_OUT 3 -#define USBD_EP0_STATUS_IN 4 -#define USBD_EP0_STATUS_OUT 5 -#define USBD_EP0_STALL 6 - -#define USBD_EP_TYPE_CTRL 0 -#define USBD_EP_TYPE_ISOC 1 -#define USBD_EP_TYPE_BULK 2 -#define USBD_EP_TYPE_INTR 3 - - -/** - * @} - */ - - -/** @defgroup USBD_DEF_Exported_TypesDefinitions - * @{ - */ - -typedef struct usb_setup_req -{ - - uint8_t bmRequest; - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; -}USBD_SetupReqTypedef; - -struct _USBD_HandleTypeDef; - -typedef struct _Device_cb -{ - uint8_t (*Init) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx); - uint8_t (*DeInit) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx); - /* Control Endpoints*/ - uint8_t (*Setup) (struct _USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req); - uint8_t (*EP0_TxSent) (struct _USBD_HandleTypeDef *pdev ); - uint8_t (*EP0_RxReady) (struct _USBD_HandleTypeDef *pdev ); - /* Class Specific Endpoints*/ - uint8_t (*DataIn) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*DataOut) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*SOF) (struct _USBD_HandleTypeDef *pdev); - uint8_t (*IsoINIncomplete) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*IsoOUTIncomplete) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - - uint8_t *(*GetHSConfigDescriptor)(uint16_t *length); - uint8_t *(*GetFSConfigDescriptor)(uint16_t *length); - uint8_t *(*GetOtherSpeedConfigDescriptor)(uint16_t *length); - uint8_t *(*GetDeviceQualifierDescriptor)(uint16_t *length); -#if (USBD_SUPPORT_USER_STRING == 1) - uint8_t *(*GetUsrStrDescriptor)(struct _USBD_HandleTypeDef *pdev ,uint8_t index, uint16_t *length); -#endif - -} USBD_ClassTypeDef; - -/* Following USB Device Speed */ -typedef enum -{ - USBD_SPEED_HIGH = 0, - USBD_SPEED_FULL = 1, - USBD_SPEED_LOW = 2, -}USBD_SpeedTypeDef; - -/* Following USB Device status */ -typedef enum { - USBD_OK = 0, - USBD_BUSY, - USBD_FAIL, -}USBD_StatusTypeDef; - -/* USB Device descriptors structure */ -typedef struct -{ - uint8_t *(*GetDeviceDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetLangIDStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetManufacturerStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetProductStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetSerialStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetConfigurationStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetInterfaceStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); -#if (USBD_LPM_ENABLED == 1) - uint8_t *(*GetBOSDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); -#endif -} USBD_DescriptorsTypeDef; - -/* USB Device handle structure */ -typedef struct -{ - uint32_t status; - uint32_t total_length; - uint32_t rem_length; - uint32_t maxpacket; -} USBD_EndpointTypeDef; - -/* USB Device handle structure */ -typedef struct _USBD_HandleTypeDef -{ - uint8_t id; - uint32_t dev_config; - uint32_t dev_default_config; - uint32_t dev_config_status; - USBD_SpeedTypeDef dev_speed; - USBD_EndpointTypeDef ep_in[15]; - USBD_EndpointTypeDef ep_out[15]; - uint32_t ep0_state; - uint32_t ep0_data_len; - uint8_t dev_state; - uint8_t dev_old_state; - uint8_t dev_address; - uint8_t dev_connection_status; - uint8_t dev_test_mode; - uint32_t dev_remote_wakeup; - - USBD_SetupReqTypedef request; - USBD_DescriptorsTypeDef *pDesc; - USBD_ClassTypeDef *pClass; - void *pClassData; - void *pUserData; - void *pData; -} USBD_HandleTypeDef; - -/** - * @} - */ - - - -/** @defgroup USBD_DEF_Exported_Macros - * @{ - */ -#define SWAPBYTE(addr) (((uint16_t)(*((uint8_t *)(addr)))) + \ - (((uint16_t)(*(((uint8_t *)(addr)) + 1))) << 8)) - -#define LOBYTE(x) ((uint8_t)(x & 0x00FF)) -#define HIBYTE(x) ((uint8_t)((x & 0xFF00) >>8)) -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) - - -#if defined ( __GNUC__ ) - #ifndef __weak - #define __weak __attribute__((weak)) - #endif /* __weak */ - #ifndef __packed - #define __packed __attribute__((__packed__)) - #endif /* __packed */ -#endif /* __GNUC__ */ - - -/* In HS mode and when the DMA is used, all variables and data structures dealing - with the DMA during the transaction process should be 4-bytes aligned */ - -#if defined (__GNUC__) /* GNU Compiler */ - #define __ALIGN_END __attribute__ ((aligned (4))) - #define __ALIGN_BEGIN -#else - #define __ALIGN_END - #if defined (__CC_ARM) /* ARM Compiler */ - #define __ALIGN_BEGIN __align(4) - #elif defined (__ICCARM__) /* IAR Compiler */ - #define __ALIGN_BEGIN - #elif defined (__TASKING__) /* TASKING Compiler */ - #define __ALIGN_BEGIN __align(4) - #endif /* __CC_ARM */ -#endif /* __GNUC__ */ - - -/** - * @} - */ - -/** @defgroup USBD_DEF_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_DEF_Exported_FunctionsPrototype - * @{ - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_DEF_H */ - -/** - * @} - */ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h b/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h deleted file mode 100644 index bb5d85ca..00000000 --- a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h +++ /dev/null @@ -1,128 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_ioreq.h - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief Header file for the usbd_ioreq.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_IOREQ_H -#define __USBD_IOREQ_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" -#include "usbd_core.h" - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_IOREQ - * @brief header file for the usbd_ioreq.c file - * @{ - */ - -/** @defgroup USBD_IOREQ_Exported_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Exported_Types - * @{ - */ - - -/** - * @} - */ - - - -/** @defgroup USBD_IOREQ_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_IOREQ_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_IOREQ_Exported_FunctionsPrototype - * @{ - */ - -USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, - uint8_t *buf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev); - -USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev); - -uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , - uint8_t epnum); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_IOREQ_H */ - -/** - * @} - */ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c b/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c deleted file mode 100644 index ff3ed446..00000000 --- a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c +++ /dev/null @@ -1,565 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_core.c - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief This file provides all the USBD core functions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_core.h" - -/** @addtogroup STM32_USBD_DEVICE_LIBRARY -* @{ -*/ - - -/** @defgroup USBD_CORE -* @brief usbd core module -* @{ -*/ - -/** @defgroup USBD_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBD_CORE_Private_Defines -* @{ -*/ - -/** -* @} -*/ - - -/** @defgroup USBD_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - - - -/** @defgroup USBD_CORE_Private_FunctionPrototypes -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBD_CORE_Private_Variables -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBD_CORE_Private_Functions -* @{ -*/ - -/** -* @brief USBD_Init -* Initializes the device stack and load the class driver -* @param pdev: device instance -* @param pdesc: Descriptor structure address -* @param id: Low level core index -* @retval None -*/ -USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) -{ - /* Check whether the USB Host handle is valid */ - if(pdev == NULL) - { - USBD_ErrLog("Invalid Device handle"); - return USBD_FAIL; - } - - /* Unlink previous class*/ - if(pdev->pClass != NULL) - { - pdev->pClass = NULL; - } - - /* Assign USBD Descriptors */ - if(pdesc != NULL) - { - pdev->pDesc = pdesc; - } - - /* Set Device initial State */ - pdev->dev_state = USBD_STATE_DEFAULT; - pdev->id = id; - /* Initialize low level driver */ - USBD_LL_Init(pdev); - - return USBD_OK; -} - -/** -* @brief USBD_DeInit -* Re-Initialize th device library -* @param pdev: device instance -* @retval status: status -*/ -USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev) -{ - /* Set Default State */ - pdev->dev_state = USBD_STATE_DEFAULT; - - /* Free Class Resources */ - pdev->pClass->DeInit(pdev, pdev->dev_config); - - /* Stop the low level driver */ - USBD_LL_Stop(pdev); - - /* Initialize low level driver */ - USBD_LL_DeInit(pdev); - - return USBD_OK; -} - - -/** - * @brief USBD_RegisterClass - * Link class driver to Device Core. - * @param pDevice : Device Handle - * @param pclass: Class handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass) -{ - USBD_StatusTypeDef status = USBD_OK; - if(pclass != 0) - { - /* link the class to the USB Device handle */ - pdev->pClass = pclass; - status = USBD_OK; - } - else - { - USBD_ErrLog("Invalid Class handle"); - status = USBD_FAIL; - } - - return status; -} - -/** - * @brief USBD_Start - * Start the USB Device Core. - * @param pdev: Device Handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev) -{ - - /* Start the low level driver */ - USBD_LL_Start(pdev); - - return USBD_OK; -} - -/** - * @brief USBD_Stop - * Stop the USB Device Core. - * @param pdev: Device Handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev) -{ - /* Free Class Resources */ - pdev->pClass->DeInit(pdev, pdev->dev_config); - - /* Stop the low level driver */ - USBD_LL_Stop(pdev); - - return USBD_OK; -} - -/** -* @brief USBD_RunTestMode -* Launch test mode process -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev) -{ - return USBD_OK; -} - - -/** -* @brief USBD_SetClassConfig -* Configure device and start the interface -* @param pdev: device instance -* @param cfgidx: configuration index -* @retval status -*/ - -USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) -{ - USBD_StatusTypeDef ret = USBD_FAIL; - - if(pdev->pClass != NULL) - { - /* Set configuration and Start the Class*/ - if(pdev->pClass->Init(pdev, cfgidx) == 0) - { - ret = USBD_OK; - } - } - return ret; -} - -/** -* @brief USBD_ClrClassConfig -* Clear current configuration -* @param pdev: device instance -* @param cfgidx: configuration index -* @retval status: USBD_StatusTypeDef -*/ -USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) -{ - /* Clear configuration and De-initialize the Class process*/ - pdev->pClass->DeInit(pdev, cfgidx); - return USBD_OK; -} - - -/** -* @brief USBD_SetupStage -* Handle the setup stage -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) -{ - - USBD_ParseSetupRequest(&pdev->request, psetup); - - pdev->ep0_state = USBD_EP0_SETUP; - pdev->ep0_data_len = pdev->request.wLength; - - switch (pdev->request.bmRequest & 0x1F) - { - case USB_REQ_RECIPIENT_DEVICE: - USBD_StdDevReq (pdev, &pdev->request); - break; - - case USB_REQ_RECIPIENT_INTERFACE: - USBD_StdItfReq(pdev, &pdev->request); - break; - - case USB_REQ_RECIPIENT_ENDPOINT: - USBD_StdEPReq(pdev, &pdev->request); - break; - - default: - USBD_LL_StallEP(pdev , pdev->request.bmRequest & 0x80); - break; - } - return USBD_OK; -} - -/** -* @brief USBD_DataOutStage -* Handle data OUT stage -* @param pdev: device instance -* @param epnum: endpoint index -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata) -{ - USBD_EndpointTypeDef *pep; - - if(epnum == 0) - { - pep = &pdev->ep_out[0]; - - if ( pdev->ep0_state == USBD_EP0_DATA_OUT) - { - if(pep->rem_length > pep->maxpacket) - { - pep->rem_length -= pep->maxpacket; - - USBD_CtlContinueRx (pdev, - pdata, - MIN(pep->rem_length ,pep->maxpacket)); - } - else - { - if((pdev->pClass->EP0_RxReady != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->EP0_RxReady(pdev); - } - USBD_CtlSendStatus(pdev); - } - } - } - else if((pdev->pClass->DataOut != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->DataOut(pdev, epnum); - } - return USBD_OK; -} - -/** -* @brief USBD_DataInStage -* Handle data in stage -* @param pdev: device instance -* @param epnum: endpoint index -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev ,uint8_t epnum, uint8_t *pdata) -{ - USBD_EndpointTypeDef *pep; - - if(epnum == 0) - { - pep = &pdev->ep_in[0]; - - if ( pdev->ep0_state == USBD_EP0_DATA_IN) - { - if(pep->rem_length > pep->maxpacket) - { - pep->rem_length -= pep->maxpacket; - - USBD_CtlContinueSendData (pdev, - pdata, - pep->rem_length); - - /* Prepare endpoint for premature end of transfer */ - USBD_LL_PrepareReceive (pdev, - 0, - NULL, - 0); - } - else - { /* last packet is MPS multiple, so send ZLP packet */ - if((pep->total_length % pep->maxpacket == 0) && - (pep->total_length >= pep->maxpacket) && - (pep->total_length < pdev->ep0_data_len )) - { - - USBD_CtlContinueSendData(pdev , NULL, 0); - pdev->ep0_data_len = 0; - - /* Prepare endpoint for premature end of transfer */ - USBD_LL_PrepareReceive (pdev, - 0, - NULL, - 0); - } - else - { - if((pdev->pClass->EP0_TxSent != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->EP0_TxSent(pdev); - } - USBD_CtlReceiveStatus(pdev); - } - } - } - if (pdev->dev_test_mode == 1) - { - USBD_RunTestMode(pdev); - pdev->dev_test_mode = 0; - } - } - else if((pdev->pClass->DataIn != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->DataIn(pdev, epnum); - } - return USBD_OK; -} - -/** -* @brief USBD_LL_Reset -* Handle Reset event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) -{ - /* Open EP0 OUT */ - USBD_LL_OpenEP(pdev, - 0x00, - USBD_EP_TYPE_CTRL, - USB_MAX_EP0_SIZE); - - pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; - - /* Open EP0 IN */ - USBD_LL_OpenEP(pdev, - 0x80, - USBD_EP_TYPE_CTRL, - USB_MAX_EP0_SIZE); - - pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; - /* Upon Reset call user call back */ - pdev->dev_state = USBD_STATE_DEFAULT; - - if (pdev->pClassData) - pdev->pClass->DeInit(pdev, pdev->dev_config); - - - return USBD_OK; -} - - - - -/** -* @brief USBD_LL_Reset -* Handle Reset event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) -{ - pdev->dev_speed = speed; - return USBD_OK; -} - -/** -* @brief USBD_Suspend -* Handle Suspend event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) -{ - pdev->dev_old_state = pdev->dev_state; - pdev->dev_state = USBD_STATE_SUSPENDED; - return USBD_OK; -} - -/** -* @brief USBD_Resume -* Handle Resume event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) -{ - pdev->dev_state = pdev->dev_old_state; - return USBD_OK; -} - -/** -* @brief USBD_SOF -* Handle SOF event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) -{ - if(pdev->dev_state == USBD_STATE_CONFIGURED) - { - if(pdev->pClass->SOF != NULL) - { - pdev->pClass->SOF(pdev); - } - } - return USBD_OK; -} - -/** -* @brief USBD_IsoINIncomplete -* Handle iso in incomplete event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - return USBD_OK; -} - -/** -* @brief USBD_IsoOUTIncomplete -* Handle iso out incomplete event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - return USBD_OK; -} - -/** -* @brief USBD_DevConnected -* Handle device connection event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev) -{ - return USBD_OK; -} - -/** -* @brief USBD_DevDisconnected -* Handle device disconnection event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev) -{ - /* Free Class Resources */ - pdev->dev_state = USBD_STATE_DEFAULT; - pdev->pClass->DeInit(pdev, pdev->dev_config); - - return USBD_OK; -} -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c b/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c deleted file mode 100644 index 22f815d0..00000000 --- a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c +++ /dev/null @@ -1,782 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_req.c - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief This file provides the standard USB requests following chapter 9. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_ctlreq.h" -#include "usbd_ioreq.h" - - -/** @addtogroup STM32_USBD_STATE_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup USBD_REQ - * @brief USB standard requests module - * @{ - */ - -/** @defgroup USBD_REQ_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Variables - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_FunctionPrototypes - * @{ - */ -static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetAddress(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_GetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_GetStatus(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_ClrFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static uint8_t USBD_GetLen(uint8_t *buf); - -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Functions - * @{ - */ - - -/** -* @brief USBD_StdDevReq -* Handle standard usb device requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - USBD_StatusTypeDef ret = USBD_OK; - - switch (req->bRequest) - { - case USB_REQ_GET_DESCRIPTOR: - - USBD_GetDescriptor (pdev, req) ; - break; - - case USB_REQ_SET_ADDRESS: - USBD_SetAddress(pdev, req); - break; - - case USB_REQ_SET_CONFIGURATION: - USBD_SetConfig (pdev , req); - break; - - case USB_REQ_GET_CONFIGURATION: - USBD_GetConfig (pdev , req); - break; - - case USB_REQ_GET_STATUS: - USBD_GetStatus (pdev , req); - break; - - - case USB_REQ_SET_FEATURE: - USBD_SetFeature (pdev , req); - break; - - case USB_REQ_CLEAR_FEATURE: - USBD_ClrFeature (pdev , req); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - - return ret; -} - -/** -* @brief USBD_StdItfReq -* Handle standard usb interface requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - USBD_StatusTypeDef ret = USBD_OK; - - switch (pdev->dev_state) - { - case USBD_STATE_CONFIGURED: - - if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) - { - pdev->pClass->Setup (pdev, req); - - if((req->wLength == 0)&& (ret == USBD_OK)) - { - USBD_CtlSendStatus(pdev); - } - } - else - { - USBD_CtlError(pdev , req); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - return USBD_OK; -} - -/** -* @brief USBD_StdEPReq -* Handle standard usb endpoint requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - - uint8_t ep_addr; - USBD_StatusTypeDef ret = USBD_OK; - USBD_EndpointTypeDef *pep; - ep_addr = LOBYTE(req->wIndex); - - /* Check if it is a class request */ - if ((req->bmRequest & 0x60) == 0x20) - { - pdev->pClass->Setup (pdev, req); - - return USBD_OK; - } - - switch (req->bRequest) - { - - case USB_REQ_SET_FEATURE : - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_EP_HALT) - { - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - - } - } - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - case USB_REQ_CLEAR_FEATURE : - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_EP_HALT) - { - if ((ep_addr & 0x7F) != 0x00) - { - USBD_LL_ClearStallEP(pdev , ep_addr); - pdev->pClass->Setup (pdev, req); - } - USBD_CtlSendStatus(pdev); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - case USB_REQ_GET_STATUS: - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr & 0x7F) != 0x00) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - pep = ((ep_addr & 0x80) == 0x80) ? &pdev->ep_in[ep_addr & 0x7F]:\ - &pdev->ep_out[ep_addr & 0x7F]; - if(USBD_LL_IsStallEP(pdev, ep_addr)) - { - pep->status = 0x0001; - } - else - { - pep->status = 0x0000; - } - - USBD_CtlSendData (pdev, - (uint8_t *)&pep->status, - 2); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - default: - break; - } - return ret; -} -/** -* @brief USBD_GetDescriptor -* Handle Get Descriptor requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - uint16_t len; - uint8_t *pbuf; - - - switch (req->wValue >> 8) - { -#if (USBD_LPM_ENABLED == 1) - case USB_DESC_TYPE_BOS: - pbuf = pdev->pDesc->GetBOSDescriptor(pdev->dev_speed, &len); - break; -#endif - case USB_DESC_TYPE_DEVICE: - pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); - break; - - case USB_DESC_TYPE_CONFIGURATION: - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetHSConfigDescriptor(&len); - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - } - else - { - pbuf = (uint8_t *)pdev->pClass->GetFSConfigDescriptor(&len); - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - } - break; - - case USB_DESC_TYPE_STRING: - switch ((uint8_t)(req->wValue)) - { - case USBD_IDX_LANGID_STR: - pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); - break; - - case USBD_IDX_MFC_STR: - pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); - break; - - case USBD_IDX_PRODUCT_STR: - pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); - break; - - case USBD_IDX_SERIAL_STR: - pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); - break; - - case USBD_IDX_CONFIG_STR: - pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); - break; - - case USBD_IDX_INTERFACE_STR: - pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); - break; - - default: -#if (USBD_SUPPORT_USER_STRING == 1) - pbuf = pdev->pClass->GetUsrStrDescriptor(pdev, (req->wValue) , &len); - break; -#else - USBD_CtlError(pdev , req); - return; -#endif - } - break; - case USB_DESC_TYPE_DEVICE_QUALIFIER: - - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetDeviceQualifierDescriptor(&len); - break; - } - else - { - USBD_CtlError(pdev , req); - return; - } - - case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetOtherSpeedConfigDescriptor(&len); - pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; - break; - } - else - { - USBD_CtlError(pdev , req); - return; - } - - default: - USBD_CtlError(pdev , req); - return; - } - - if((len != 0)&& (req->wLength != 0)) - { - - len = MIN(len , req->wLength); - - USBD_CtlSendData (pdev, - pbuf, - len); - } - -} - -/** -* @brief USBD_SetAddress -* Set device address -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetAddress(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - uint8_t dev_addr; - - if ((req->wIndex == 0) && (req->wLength == 0)) - { - dev_addr = (uint8_t)(req->wValue) & 0x7F; - - if (pdev->dev_state == USBD_STATE_CONFIGURED) - { - USBD_CtlError(pdev , req); - } - else - { - pdev->dev_address = dev_addr; - USBD_LL_SetUSBAddress(pdev, dev_addr); - USBD_CtlSendStatus(pdev); - - if (dev_addr != 0) - { - pdev->dev_state = USBD_STATE_ADDRESSED; - } - else - { - pdev->dev_state = USBD_STATE_DEFAULT; - } - } - } - else - { - USBD_CtlError(pdev , req); - } -} - -/** -* @brief USBD_SetConfig -* Handle Set device configuration request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - static uint8_t cfgidx; - - cfgidx = (uint8_t)(req->wValue); - - if (cfgidx > USBD_MAX_NUM_CONFIGURATION ) - { - USBD_CtlError(pdev , req); - } - else - { - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if (cfgidx) - { - pdev->dev_config = cfgidx; - pdev->dev_state = USBD_STATE_CONFIGURED; - if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) - { - USBD_CtlError(pdev , req); - return; - } - USBD_CtlSendStatus(pdev); - } - else - { - USBD_CtlSendStatus(pdev); - } - break; - - case USBD_STATE_CONFIGURED: - if (cfgidx == 0) - { - pdev->dev_state = USBD_STATE_ADDRESSED; - pdev->dev_config = cfgidx; - USBD_ClrClassConfig(pdev , cfgidx); - USBD_CtlSendStatus(pdev); - - } - else if (cfgidx != pdev->dev_config) - { - /* Clear old configuration */ - USBD_ClrClassConfig(pdev , pdev->dev_config); - - /* set new configuration */ - pdev->dev_config = cfgidx; - if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) - { - USBD_CtlError(pdev , req); - return; - } - USBD_CtlSendStatus(pdev); - } - else - { - USBD_CtlSendStatus(pdev); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - } -} - -/** -* @brief USBD_GetConfig -* Handle Get device configuration request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - if (req->wLength != 1) - { - USBD_CtlError(pdev , req); - } - else - { - switch (pdev->dev_state ) - { - case USBD_STATE_ADDRESSED: - pdev->dev_default_config = 0; - USBD_CtlSendData (pdev, - (uint8_t *)&pdev->dev_default_config, - 1); - break; - - case USBD_STATE_CONFIGURED: - - USBD_CtlSendData (pdev, - (uint8_t *)&pdev->dev_config, - 1); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - } -} - -/** -* @brief USBD_GetStatus -* Handle Get Status request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetStatus(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - -#if ( USBD_SELF_POWERED == 1) - pdev->dev_config_status = USB_CONFIG_SELF_POWERED; -#else - pdev->dev_config_status = 0; -#endif - - if (pdev->dev_remote_wakeup) - { - pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; - } - - USBD_CtlSendData (pdev, - (uint8_t *)& pdev->dev_config_status, - 2); - break; - - default : - USBD_CtlError(pdev , req); - break; - } -} - - -/** -* @brief USBD_SetFeature -* Handle Set device feature request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) - { - pdev->dev_remote_wakeup = 1; - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - } - -} - - -/** -* @brief USBD_ClrFeature -* Handle clear device feature request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_ClrFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) - { - pdev->dev_remote_wakeup = 0; - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - } - break; - - default : - USBD_CtlError(pdev , req); - break; - } -} - -/** -* @brief USBD_ParseSetupRequest -* Copy buffer into setup structure -* @param pdev: device instance -* @param req: usb request -* @retval None -*/ - -void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) -{ - req->bmRequest = *(uint8_t *) (pdata); - req->bRequest = *(uint8_t *) (pdata + 1); - req->wValue = SWAPBYTE (pdata + 2); - req->wIndex = SWAPBYTE (pdata + 4); - req->wLength = SWAPBYTE (pdata + 6); - -} - -/** -* @brief USBD_CtlError -* Handle USB low level Error -* @param pdev: device instance -* @param req: usb request -* @retval None -*/ - -void USBD_CtlError( USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - USBD_LL_StallEP(pdev , 0x80); - USBD_LL_StallEP(pdev , 0); -} - - -/** - * @brief USBD_GetString - * Convert Ascii string into unicode one - * @param desc : descriptor buffer - * @param unicode : Formatted string buffer (unicode) - * @param len : descriptor length - * @retval None - */ -void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) -{ - uint8_t idx = 0; - - if (desc != NULL) - { - *len = USBD_GetLen(desc) * 2 + 2; - unicode[idx++] = *len; - unicode[idx++] = USB_DESC_TYPE_STRING; - - while (*desc != '\0') - { - unicode[idx++] = *desc++; - unicode[idx++] = 0x00; - } - } -} - -/** - * @brief USBD_GetLen - * return the string length - * @param buf : pointer to the ascii string buffer - * @retval string length - */ -static uint8_t USBD_GetLen(uint8_t *buf) -{ - uint8_t len = 0; - - while (*buf != '\0') - { - len++; - buf++; - } - - return len; -} -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c b/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c deleted file mode 100644 index e1b9c75c..00000000 --- a/Samples/Nucleo-TPM/L476RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c +++ /dev/null @@ -1,236 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_ioreq.c - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief This file provides the IO requests APIs for control endpoints. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_ioreq.h" - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup USBD_IOREQ - * @brief control I/O requests module - * @{ - */ - -/** @defgroup USBD_IOREQ_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_FunctionPrototypes - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Functions - * @{ - */ - -/** -* @brief USBD_CtlSendData -* send data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be sent -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_DATA_IN; - pdev->ep_in[0].total_length = len; - pdev->ep_in[0].rem_length = len; - /* Start the transfer */ - USBD_LL_Transmit (pdev, 0x00, pbuf, len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlContinueSendData -* continue sending data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be sent -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Start the next transfer */ - USBD_LL_Transmit (pdev, 0x00, pbuf, len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlPrepareRx -* receive data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be received -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_DATA_OUT; - pdev->ep_out[0].total_length = len; - pdev->ep_out[0].rem_length = len; - /* Start the transfer */ - USBD_LL_PrepareReceive (pdev, - 0, - pbuf, - len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlContinueRx -* continue receive data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be received -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - - USBD_LL_PrepareReceive (pdev, - 0, - pbuf, - len); - return USBD_OK; -} -/** -* @brief USBD_CtlSendStatus -* send zero lzngth packet on the ctl pipe -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev) -{ - - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_STATUS_IN; - - /* Start the transfer */ - USBD_LL_Transmit (pdev, 0x00, NULL, 0); - - return USBD_OK; -} - -/** -* @brief USBD_CtlReceiveStatus -* receive zero lzngth packet on the ctl pipe -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_STATUS_OUT; - - /* Start the transfer */ - USBD_LL_PrepareReceive ( pdev, - 0, - NULL, - 0); - - return USBD_OK; -} - - -/** -* @brief USBD_GetRxCount -* returns the received data length -* @param pdev: device instance -* @param ep_addr: endpoint address -* @retval Rx Data blength -*/ -uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , uint8_t ep_addr) -{ - return USBD_LL_GetRxDataSize(pdev, ep_addr); -} - -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.elf.launch b/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.elf.launch deleted file mode 100644 index b2828f8b..00000000 --- a/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.elf.launch +++ /dev/null @@ -1,67 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.ioc b/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.ioc deleted file mode 100644 index fa582a92..00000000 --- a/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.ioc +++ /dev/null @@ -1,227 +0,0 @@ -#MicroXplorer Configuration settings - do not modify -File.Version=6 -KeepUserPlacement=false -Mcu.Family=STM32L4 -Mcu.IP0=NVIC -Mcu.IP1=RCC -Mcu.IP2=RNG -Mcu.IP3=RTC -Mcu.IP4=SYS -Mcu.IP5=USART2 -Mcu.IP6=USB_DEVICE -Mcu.IP7=USB_OTG_FS -Mcu.IPNb=8 -Mcu.Name=STM32L476R(C-E-G)Tx -Mcu.Package=LQFP64 -Mcu.Pin0=PC13 -Mcu.Pin1=PC14-OSC32_IN (PC14) -Mcu.Pin10=PA13 (JTMS-SWDIO) -Mcu.Pin11=PA14 (JTCK-SWCLK) -Mcu.Pin12=PB3 (JTDO-TRACESWO) -Mcu.Pin13=VP_RNG_VS_RNG -Mcu.Pin14=VP_RTC_VS_RTC_Activate -Mcu.Pin15=VP_RTC_VS_RTC_Calendar -Mcu.Pin16=VP_SYS_VS_Systick -Mcu.Pin17=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS -Mcu.Pin2=PC15-OSC32_OUT (PC15) -Mcu.Pin3=PH0-OSC_IN (PH0) -Mcu.Pin4=PH1-OSC_OUT (PH1) -Mcu.Pin5=PA2 -Mcu.Pin6=PA3 -Mcu.Pin7=PA5 -Mcu.Pin8=PA11 -Mcu.Pin9=PA12 -Mcu.PinsNb=18 -Mcu.ThirdPartyNb=0 -Mcu.UserConstants= -Mcu.UserName=STM32L476RGTx -MxCube.Version=4.25.0 -MxDb.Version=DB.4.0.250 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-RCC.LPTIM1Freq_Value=80000000 -RCC.LPTIM2Freq_Value=80000000 -RCC.LPUART1Freq_Value=80000000 -RCC.LSCOPinFreq_Value=32000 -RCC.LSI_VALUE=32000 -RCC.MCO1PinFreq_Value=80000000 -RCC.MSIClockRange=RCC_MSIRANGE_11 -RCC.MSI_VALUE=48000000 -RCC.PLLN=10 -RCC.PLLPoutputFreq_Value=22857142.85714286 -RCC.PLLQoutputFreq_Value=80000000 -RCC.PLLRCLKFreq_Value=80000000 -RCC.PLLSAI1PoutputFreq_Value=18285714.285714287 -RCC.PLLSAI1QoutputFreq_Value=64000000 -RCC.PLLSAI1RoutputFreq_Value=64000000 -RCC.PLLSAI2PoutputFreq_Value=18285714.285714287 -RCC.PLLSAI2RoutputFreq_Value=64000000 -RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSI -RCC.PREFETCH_ENABLE=1 -RCC.PWRFreq_Value=80000000 -RCC.RNGFreq_Value=48000000 -RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE -RCC.RTCFreq_Value=32768 -RCC.SAI1Freq_Value=18285714.285714287 -RCC.SAI2Freq_Value=18285714.285714287 -RCC.SDMMCFreq_Value=48000000 -RCC.SWPMI1Freq_Value=80000000 -RCC.SYSCLKFreq_VALUE=80000000 -RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK -RCC.UART4Freq_Value=80000000 -RCC.UART5Freq_Value=80000000 -RCC.USART1Freq_Value=80000000 -RCC.USART2Freq_Value=80000000 -RCC.USART3Freq_Value=80000000 -RCC.USBFreq_Value=48000000 -RCC.VCOInputFreq_Value=16000000 -RCC.VCOOutputFreq_Value=160000000 -RCC.VCOSAI1OutputFreq_Value=128000000 -RCC.VCOSAI2OutputFreq_Value=128000000 -RTC.Format=RTC_FORMAT_BIN -RTC.IPParameters=Format -SH.GPXTI13.0=GPIO_EXTI13 -SH.GPXTI13.ConfNb=1 -USART2.IPParameters=VirtualMode-Asynchronous,Mode,WordLength -USART2.Mode=MODE_TX -USART2.VirtualMode-Asynchronous=VM_ASYNC -USART2.WordLength=WORDLENGTH_8B -USB_DEVICE.CLASS_NAME_FS=CDC -USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS -USB_DEVICE.VirtualMode=Cdc -USB_DEVICE.VirtualModeFS=Cdc_FS -USB_OTG_FS.IPParameters=VirtualMode -USB_OTG_FS.VirtualMode=Device_Only -VP_RNG_VS_RNG.Mode=RNG_Activate -VP_RNG_VS_RNG.Signal=RNG_VS_RNG -VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled -VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate -VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar -VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar -VP_SYS_VS_Systick.Mode=SysTick -VP_SYS_VS_Systick.Signal=SYS_VS_Systick -VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS -VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_FS -board=NUCLEO-L476RG -boardIOC=true diff --git a/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.pdf b/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.pdf deleted file mode 100644 index 4e56c304..00000000 Binary files a/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.pdf and /dev/null differ diff --git a/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.txt b/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.txt deleted file mode 100644 index 01922acf..00000000 --- a/Samples/Nucleo-TPM/L476RG/Nucleo-L476RG.txt +++ /dev/null @@ -1,65 +0,0 @@ -Configuration Nucleo-L476RG -STM32CubeMX 4.25.0 -Date 03/19/2018 -MCU STM32L476RGTx - - - -PERIPHERALS MODES FUNCTIONS PINS -RCC Crystal/Ceramic Resonator RCC_OSC32_IN PC14-OSC32_IN (PC14) -RCC Crystal/Ceramic Resonator RCC_OSC32_OUT PC15-OSC32_OUT (PC15) -RTC Activate RTC Clock Source RTC_VS_RTC_Activate VP_RTC_VS_RTC_Activate -RTC RTC Enabled RTC_VS_RTC_Calendar VP_RTC_VS_RTC_Calendar -SYS Trace Asynchronous Sw SYS_JTMS-SWDIO PA13 (JTMS-SWDIO) -SYS Trace Asynchronous Sw SYS_JTCK-SWCLK PA14 (JTCK-SWCLK) -SYS Trace Asynchronous Sw SYS_JTDO-SWO PB3 (JTDO-TRACESWO) -SYS SysTick SYS_VS_Systick VP_SYS_VS_Systick -USART2 Asynchronous USART2_RX PA3 -USART2 Asynchronous USART2_TX PA2 -USB_OTG_FS Device_Only USB_OTG_FS_DM PA11 -USB_OTG_FS Device_Only USB_OTG_FS_DP PA12 - - - -Pin Nb PINs FUNCTIONs LABELs -2 PC13 GPIO_EXTI13 B1 [Blue PushButton] -3 PC14-OSC32_IN (PC14) RCC_OSC32_IN -4 PC15-OSC32_OUT (PC15) RCC_OSC32_OUT -5 PH0-OSC_IN (PH0)* RCC_OSC_IN -6 PH1-OSC_OUT (PH1)* RCC_OSC_OUT -16 PA2 USART2_TX USART_TX -17 PA3 USART2_RX USART_RX -21 PA5 GPIO_Output LD2 [green Led] -44 PA11 USB_OTG_FS_DM -45 PA12 USB_OTG_FS_DP -46 PA13 (JTMS-SWDIO) SYS_JTMS-SWDIO TMS -49 PA14 (JTCK-SWCLK) SYS_JTCK-SWCLK TCK -55 PB3 (JTDO-TRACESWO) SYS_JTDO-SWO SWO - - - -SOFTWARE PROJECT - -Project Settings : -Project Name : Nucleo-L476RG -Project Folder : D:\VS\brianTPM\Samples\Nucleo-TPM\L476RG -Toolchain / IDE : TrueSTUDIO -Firmware Package Name and Version : STM32Cube FW_L4 V1.11.0 - - -Code Generation Settings : -STM32Cube Firmware Library Package : Copy only the necessary library files -Generate peripheral initialization as a pair of '.c/.h' files per peripheral : No -Backup previously generated files when re-generating : No -Delete previously generated files when not re-generated : Yes -Set all free pins as analog (to optimize the power consumption) : No - - -Toolchains Settings : -Compiler Optimizations : Balanced Size/Speed - - - - - - diff --git a/Samples/Nucleo-TPM/L476RG/STM32L476RG_FLASH.ld b/Samples/Nucleo-TPM/L476RG/STM32L476RG_FLASH.ld deleted file mode 100644 index 304e63d0..00000000 --- a/Samples/Nucleo-TPM/L476RG/STM32L476RG_FLASH.ld +++ /dev/null @@ -1,204 +0,0 @@ -/* -***************************************************************************** -** - -** File : stm32_flash.ld -** -** Abstract : Linker script for STM32L476RG Device with -** 1024KByte FLASH, 128KByte RAM -** -** Set heap size, stack size and stack location according -** to application requirements. -** -** Set memory bank area and size if external memory is used. -** -** Target : STMicroelectronics STM32 -** -** Environment : Atollic TrueSTUDIO(R) -** -** Distribution: The file is distributed as is, without any warranty -** of any kind. -** -** (c)Copyright Atollic AB. -** You may use this file as-is or modify it according to the needs of your -** project. This file may only be built (assembled or compiled and linked) -** using the Atollic TrueSTUDIO(R) product. The use of this file together -** with other tools than Atollic TrueSTUDIO(R) is not permitted. -** -***************************************************************************** -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = 0x20018000; /* end of RAM */ -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0x200; /* required amount of heap */ -_Min_Stack_Size = 0xf000; /* required amount of stack */ - -/* Specify the memory areas */ -MEMORY -{ -RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K -RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K -FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1006K -INTEGRITY (rx) : ORIGIN = 0x80FB800, LENGTH = 2K -NVFILE (rx) : ORIGIN = 0x80FC000, LENGTH = 16K -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - /* Constant data goes into FLASH */ - .rodata : - { - . = ALIGN(4); - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - . = ALIGN(4); - } >FLASH - - .integrity (NOLOAD): - { - . = ALIGN(4); - *(.integrity) /* .integrity internal integrity protection of NVFile */ - *(.integrity*) /* .integrity* internal integrity protection of NVFile */ - . = ALIGN(4); - } >INTEGRITY - - .nvfile (NOLOAD): - { - . = ALIGN(4); - *(.nvfile) /* .nvfile persisted NV storage for the TPM */ - *(.nvfile*) /* .nvfile* persisted NV storage for the TPM */ - . = ALIGN(4); - } >NVFILE - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT(.fini_array.*))) - KEEP (*(.fini_array*)) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM AT> FLASH - - - /* Uninitialized data section */ - . = ALIGN(4); - .bss2 : - { - . = ALIGN(4); - *(.ram2) - *(.ram2*) - Middlewares\Platform\Cancel.o - Middlewares\Platform\Clock.o - Middlewares\Platform\Entropy.o -/* Middlewares\Platform\LocalityPlat.o*/ -/* Middlewares\Platform\NVMem.o*/ - Middlewares\Platform\PlatformData.o -/* Middlewares\Platform\PowerPlat.o*/ -/* Middlewares\Platform\PPPlat.o*/ -/* Middlewares\Platform\RunCommand.o*/ -/* Middlewares\Platform\Unique.o*/ - . = ALIGN(4); - } >RAM2 - .bss : - { - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(4); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(4); - } >RAM - - - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - - diff --git a/Samples/Nucleo-TPM/L476RG/Src/main.c b/Samples/Nucleo-TPM/L476RG/Src/main.c deleted file mode 100644 index a09cdc8a..00000000 --- a/Samples/Nucleo-TPM/L476RG/Src/main.c +++ /dev/null @@ -1,409 +0,0 @@ - -/** - ****************************************************************************** - * @file : main.c - * @brief : Main program body - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -#include "stm32l4xx_hal.h" -#include "usb_device.h" - -/* USER CODE BEGIN Includes */ -#include -#include -#include -#include "TpmDevice.h" -#include "StmUtil.h" - -/* USER CODE END Includes */ - -/* Private variables ---------------------------------------------------------*/ -RNG_HandleTypeDef hrng; - -RTC_HandleTypeDef hrtc; - -UART_HandleTypeDef huart2; - -/* USER CODE BEGIN PV */ -/* Private variables ---------------------------------------------------------*/ - -/* USER CODE END PV */ - -/* Private function prototypes -----------------------------------------------*/ -void SystemClock_Config(void); -static void MX_GPIO_Init(void); -static void MX_RNG_Init(void); -static void MX_RTC_Init(void); -static void MX_USART2_UART_Init(void); - -/* USER CODE BEGIN PFP */ -/* Private function prototypes -----------------------------------------------*/ -#define CPU_CORE_FREQUENCY_HZ 800000000 /* CPU core frequency in Hz */ -void SWO_Init(uint32_t portBits, uint32_t cpuCoreFreqHz); -/* USER CODE END PFP */ - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/** - * @brief The application entry point. - * - * @retval None - */ -int main(void) -{ - /* USER CODE BEGIN 1 */ - - /* USER CODE END 1 */ - - /* MCU Configuration----------------------------------------------------------*/ - - /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - HAL_Init(); - - /* USER CODE BEGIN Init */ - - /* USER CODE END Init */ - - /* Configure the system clock */ - SystemClock_Config(); - - /* USER CODE BEGIN SysInit */ - - /* USER CODE END SysInit */ - - /* Initialize all configured peripherals */ - MX_GPIO_Init(); - MX_RNG_Init(); - MX_RTC_Init(); - MX_USART2_UART_Init(); - MX_USB_DEVICE_Init(); - /* USER CODE BEGIN 2 */ - InitializeITM(); - fprintf(stderr, "\r\n\r\n=========================\r\n" - "= Nucleo-L476RG TPM 2.0 =\r\n" - "=========================\r\n"); - printf("Nucleo-L476RG TPM 2.0\r\n"); - - if(!TpmInitializeDevice()) - { - _Error_Handler(__FILE__, __LINE__); - } - - /* USER CODE END 2 */ - - /* Infinite loop */ - /* USER CODE BEGIN WHILE */ - while (1) - { - - /* USER CODE END WHILE */ - - /* USER CODE BEGIN 3 */ - if(!TpmOperationsLoop()) - { - _Error_Handler(__FILE__, __LINE__); - } - - } - /* USER CODE END 3 */ - -} - -/** - * @brief System Clock Configuration - * @retval None - */ -void SystemClock_Config(void) -{ - - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_PeriphCLKInitTypeDef PeriphClkInit; - - /**Configure LSE Drive Capability - */ - HAL_PWR_EnableBkUpAccess(); - - __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - - /**Initializes the CPU, AHB and APB busses clocks - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSE - |RCC_OSCILLATORTYPE_MSI; - RCC_OscInitStruct.LSEState = RCC_LSE_ON; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSICalibrationValue = 16; - RCC_OscInitStruct.MSIState = RCC_MSI_ON; - RCC_OscInitStruct.MSICalibrationValue = 0; - RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLM = 1; // <-- This one gets dropped by V1.11.0 add me manually back in when CubeMX ran - RCC_OscInitStruct.PLL.PLLN = 10; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; - RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - /**Initializes the CPU, AHB and APB busses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART2 - |RCC_PERIPHCLK_USB|RCC_PERIPHCLK_RNG; - PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; - PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; - PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_MSI; - PeriphClkInit.RngClockSelection = RCC_RNGCLKSOURCE_MSI; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - /**Configure the main internal regulator output voltage - */ - if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - /**Configure the Systick interrupt time - */ - HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); - - /**Configure the Systick - */ - HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); - - /**Enable MSI Auto calibration - */ - HAL_RCCEx_EnableMSIPLLMode(); - - /* SysTick_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); -} - -/* RNG init function */ -static void MX_RNG_Init(void) -{ - - hrng.Instance = RNG; - if (HAL_RNG_Init(&hrng) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - -} - -/* RTC init function */ -static void MX_RTC_Init(void) -{ - - RTC_TimeTypeDef sTime; - RTC_DateTypeDef sDate; - - /**Initialize RTC Only - */ - hrtc.Instance = RTC; -if(HAL_RTCEx_BKUPRead(&hrtc, RTC_BKP_DR0) != 0x32F2){ - hrtc.Init.HourFormat = RTC_HOURFORMAT_24; - hrtc.Init.AsynchPrediv = 127; - hrtc.Init.SynchPrediv = 255; - hrtc.Init.OutPut = RTC_OUTPUT_DISABLE; - hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE; - hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; - hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; - if (HAL_RTC_Init(&hrtc) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - /**Initialize RTC and set the Time and Date - */ - sTime.Hours = 0; - sTime.Minutes = 0; - sTime.Seconds = 0; - sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; - sTime.StoreOperation = RTC_STOREOPERATION_RESET; - if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BIN) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - sDate.WeekDay = RTC_WEEKDAY_MONDAY; - sDate.Month = RTC_MONTH_JANUARY; - sDate.Date = 1; - sDate.Year = 0; - - if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BIN) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - HAL_RTCEx_BKUPWrite(&hrtc,RTC_BKP_DR0,0x32F2); - } - -} - -/* USART2 init function */ -static void MX_USART2_UART_Init(void) -{ - - huart2.Instance = USART2; - huart2.Init.BaudRate = 115200; - huart2.Init.WordLength = UART_WORDLENGTH_8B; - huart2.Init.StopBits = UART_STOPBITS_1; - huart2.Init.Parity = UART_PARITY_NONE; - huart2.Init.Mode = UART_MODE_TX; - huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart2.Init.OverSampling = UART_OVERSAMPLING_16; - huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - if (HAL_UART_Init(&huart2) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - -} - -/** Configure pins as - * Analog - * Input - * Output - * EVENT_OUT - * EXTI -*/ -static void MX_GPIO_Init(void) -{ - - GPIO_InitTypeDef GPIO_InitStruct; - - /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOH_CLK_ENABLE(); - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET); - - /*Configure GPIO pin : B1_Pin */ - GPIO_InitStruct.Pin = B1_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); - - /*Configure GPIO pin : LD2_Pin */ - GPIO_InitStruct.Pin = LD2_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct); - -} - -/* USER CODE BEGIN 4 */ - -/* USER CODE END 4 */ - -/** - * @brief This function is executed in case of error occurrence. - * @param file: The file name as string. - * @param line: The line in file as a number. - * @retval None - */ -void _Error_Handler(char *file, int line) -{ - /* USER CODE BEGIN Error_Handler_Debug */ - dbgPrint("PANIC: EXECUTION HALTED %s@%d\r\n", file, line); - /* User can add his own implementation to report the HAL error return state */ - while(1) - { - } - /* USER CODE END Error_Handler_Debug */ -} - -#ifdef USE_FULL_ASSERT -/** - * @brief Reports the name of the source file and the source line number - * where the assert_param error has occurred. - * @param file: pointer to the source file name - * @param line: assert_param error line source number - * @retval None - */ -void assert_failed(uint8_t* file, uint32_t line) -{ - /* USER CODE BEGIN 6 */ - /* User can add his own implementation to report the file name and line number, - tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ - /* USER CODE END 6 */ -} -#endif /* USE_FULL_ASSERT */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Src/stm32l4xx_hal_msp.c b/Samples/Nucleo-TPM/L476RG/Src/stm32l4xx_hal_msp.c deleted file mode 100644 index be26bc52..00000000 --- a/Samples/Nucleo-TPM/L476RG/Src/stm32l4xx_hal_msp.c +++ /dev/null @@ -1,225 +0,0 @@ -/** - ****************************************************************************** - * File Name : stm32l4xx_hal_msp.c - * Description : This file provides code for the MSP Initialization - * and de-Initialization codes. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -extern void _Error_Handler(char *, int); -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ -/** - * Initializes the Global MSP. - */ -void HAL_MspInit(void) -{ - /* USER CODE BEGIN MspInit 0 */ - - /* USER CODE END MspInit 0 */ - - __HAL_RCC_SYSCFG_CLK_ENABLE(); - __HAL_RCC_PWR_CLK_ENABLE(); - - HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - - /* System interrupt init*/ - /* MemoryManagement_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); - /* BusFault_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); - /* UsageFault_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); - /* SVCall_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); - /* DebugMonitor_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); - /* PendSV_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); - /* SysTick_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); - - /* USER CODE BEGIN MspInit 1 */ - - /* USER CODE END MspInit 1 */ -} - -void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng) -{ - - if(hrng->Instance==RNG) - { - /* USER CODE BEGIN RNG_MspInit 0 */ - - /* USER CODE END RNG_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_RNG_CLK_ENABLE(); - /* USER CODE BEGIN RNG_MspInit 1 */ - - /* USER CODE END RNG_MspInit 1 */ - } - -} - -void HAL_RNG_MspDeInit(RNG_HandleTypeDef* hrng) -{ - - if(hrng->Instance==RNG) - { - /* USER CODE BEGIN RNG_MspDeInit 0 */ - - /* USER CODE END RNG_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_RNG_CLK_DISABLE(); - /* USER CODE BEGIN RNG_MspDeInit 1 */ - - /* USER CODE END RNG_MspDeInit 1 */ - } - -} - -void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) -{ - - if(hrtc->Instance==RTC) - { - /* USER CODE BEGIN RTC_MspInit 0 */ - - /* USER CODE END RTC_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_RTC_ENABLE(); - /* USER CODE BEGIN RTC_MspInit 1 */ - - /* USER CODE END RTC_MspInit 1 */ - } - -} - -void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) -{ - - if(hrtc->Instance==RTC) - { - /* USER CODE BEGIN RTC_MspDeInit 0 */ - - /* USER CODE END RTC_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_RTC_DISABLE(); - /* USER CODE BEGIN RTC_MspDeInit 1 */ - - /* USER CODE END RTC_MspDeInit 1 */ - } - -} - -void HAL_UART_MspInit(UART_HandleTypeDef* huart) -{ - - GPIO_InitTypeDef GPIO_InitStruct; - if(huart->Instance==USART2) - { - /* USER CODE BEGIN USART2_MspInit 0 */ - - /* USER CODE END USART2_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_USART2_CLK_ENABLE(); - - /**USART2 GPIO Configuration - PA2 ------> USART2_TX - PA3 ------> USART2_RX - */ - GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF7_USART2; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* USER CODE BEGIN USART2_MspInit 1 */ - - /* USER CODE END USART2_MspInit 1 */ - } - -} - -void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) -{ - - if(huart->Instance==USART2) - { - /* USER CODE BEGIN USART2_MspDeInit 0 */ - - /* USER CODE END USART2_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USART2_CLK_DISABLE(); - - /**USART2 GPIO Configuration - PA2 ------> USART2_TX - PA3 ------> USART2_RX - */ - HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin); - - /* USER CODE BEGIN USART2_MspDeInit 1 */ - - /* USER CODE END USART2_MspDeInit 1 */ - } - -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Src/stm32l4xx_it.c b/Samples/Nucleo-TPM/L476RG/Src/stm32l4xx_it.c deleted file mode 100644 index 1a173f8f..00000000 --- a/Samples/Nucleo-TPM/L476RG/Src/stm32l4xx_it.c +++ /dev/null @@ -1,88 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_it.c - * @brief Interrupt Service Routines. - ****************************************************************************** - * - * COPYRIGHT(c) 2018 STMicroelectronics - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" -#include "stm32l4xx.h" -#include "stm32l4xx_it.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* External variables --------------------------------------------------------*/ -extern PCD_HandleTypeDef hpcd_USB_OTG_FS; - -/******************************************************************************/ -/* Cortex-M4 Processor Interruption and Exception Handlers */ -/******************************************************************************/ - -/** -* @brief This function handles System tick timer. -*/ -void SysTick_Handler(void) -{ - /* USER CODE BEGIN SysTick_IRQn 0 */ - - /* USER CODE END SysTick_IRQn 0 */ - HAL_IncTick(); - HAL_SYSTICK_IRQHandler(); - /* USER CODE BEGIN SysTick_IRQn 1 */ - - /* USER CODE END SysTick_IRQn 1 */ -} - -/******************************************************************************/ -/* STM32L4xx Peripheral Interrupt Handlers */ -/* Add here the Interrupt Handlers for the used peripherals. */ -/* For the available peripheral interrupt handler names, */ -/* please refer to the startup file (startup_stm32l4xx.s). */ -/******************************************************************************/ - -/** -* @brief This function handles USB OTG FS global interrupt. -*/ -void OTG_FS_IRQHandler(void) -{ - /* USER CODE BEGIN OTG_FS_IRQn 0 */ - - /* USER CODE END OTG_FS_IRQn 0 */ - HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS); - /* USER CODE BEGIN OTG_FS_IRQn 1 */ - - /* USER CODE END OTG_FS_IRQn 1 */ -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Src/system_stm32l4xx.c b/Samples/Nucleo-TPM/L476RG/Src/system_stm32l4xx.c deleted file mode 100644 index c76fe45e..00000000 --- a/Samples/Nucleo-TPM/L476RG/Src/system_stm32l4xx.c +++ /dev/null @@ -1,353 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32l4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32l4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick - * timer or configure other parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the MSI (4 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | MSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 4000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 4000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 8 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * PLLSAI1_P | NA - *----------------------------------------------------------------------------- - * PLLSAI1_Q | NA - *----------------------------------------------------------------------------- - * PLLSAI1_R | NA - *----------------------------------------------------------------------------- - * PLLSAI2_P | NA - *----------------------------------------------------------------------------- - * PLLSAI2_Q | NA - *----------------------------------------------------------------------------- - * PLLSAI2_R | NA - *----------------------------------------------------------------------------- - * Require 48MHz for USB OTG FS, | Disabled - * SDIO and RNG clock | - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32l4xx_system - * @{ - */ - -/** @addtogroup STM32L4xx_System_Private_Includes - * @{ - */ - -#include "stm32l4xx.h" - -#if !defined (HSE_VALUE) - #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (MSI_VALUE) - #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -#if !defined (HSI_VALUE) - #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/*!< Uncomment the following line if you need to relocate your vector Table in - Internal SRAM. */ -/* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Variables - * @{ - */ - /* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency - Note: If you use this function to configure the system clock; then there - is no need to call the 2 first functions listed above, since SystemCoreClock - variable is updated automatically. - */ - uint32_t SystemCoreClock = 4000000U; - - const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; - const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ - 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ - /* FPU settings ------------------------------------------------------------*/ - #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - #endif - - /* Reset the RCC clock configuration to the default reset state ------------*/ - /* Set MSION bit */ - RCC->CR |= RCC_CR_MSION; - - /* Reset CFGR register */ - RCC->CFGR = 0x00000000U; - - /* Reset HSEON, CSSON , HSION, and PLLON bits */ - RCC->CR &= 0xEAF6FFFFU; - - /* Reset PLLCFGR register */ - RCC->PLLCFGR = 0x00001000U; - - /* Reset HSEBYP bit */ - RCC->CR &= 0xFFFBFFFFU; - - /* Disable all interrupts */ - RCC->CIER = 0x00000000U; - - /* Configure the Vector Table location add offset address ------------------*/ -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ -#endif -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or configure - * other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) - * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value - * 4 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * - * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value - * 16 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value - * 8 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using fractional - * value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; - - /* Get MSI Range frequency--------------------------------------------------*/ - if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) - { /* MSISRANGE from RCC_CSR applies */ - msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; - } - else - { /* MSIRANGE from RCC_CR applies */ - msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; - } - /*MSI frequency range in HZ*/ - msirange = MSIRangeTable[msirange]; - - /* Get SYSCLK source -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) - { - case 0x00: /* MSI used as system clock source */ - SystemCoreClock = msirange; - break; - - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; - - switch (pllsource) - { - case 0x02: /* HSI used as PLL clock source */ - pllvco = (HSI_VALUE / pllm); - break; - - case 0x03: /* HSE used as PLL clock source */ - pllvco = (HSE_VALUE / pllm); - break; - - default: /* MSI used as PLL clock source */ - pllvco = (msirange / pllm); - break; - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; - SystemCoreClock = pllvco/pllr; - break; - - default: - SystemCoreClock = msirange; - break; - } - /* Compute HCLK clock frequency --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Src/usb_device.c b/Samples/Nucleo-TPM/L476RG/Src/usb_device.c deleted file mode 100644 index 75e5d8d5..00000000 --- a/Samples/Nucleo-TPM/L476RG/Src/usb_device.c +++ /dev/null @@ -1,173 +0,0 @@ -/** - ****************************************************************************** - * @file : usb_device.c - * @version : v2.0_Cube - * @brief : This file implements the USB Device - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ - -#include "usb_device.h" -#include "usbd_core.h" -#include "usbd_desc.h" -#include "usbd_cdc.h" -#include "usbd_cdc_if.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* USER CODE BEGIN PV */ -/* Private variables ---------------------------------------------------------*/ - -/* USER CODE END PV */ - -/* USER CODE BEGIN PFP */ -/* Private function prototypes -----------------------------------------------*/ - -/* USER CODE END PFP */ - -/* Return USBD_OK if the Battery Charging Detection mode (BCD) is used, else USBD_FAIL. */ -extern USBD_StatusTypeDef USBD_LL_BatteryCharging(USBD_HandleTypeDef *pdev); - -/* USB Device Core handle declaration. */ -USBD_HandleTypeDef hUsbDeviceFS; - -/* - * -- Insert your variables declaration here -- - */ -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* - * -- Insert your external function declaration here -- - */ -/* USER CODE BEGIN 1 */ -void MX_USB_DEVICE_DeInit(void) -{ - USBD_DeInit(&hUsbDeviceFS); -} - -/* USER CODE END 1 */ - -/** - * Init USB device Library, add supported class and start the library - * @retval None - */ -void MX_USB_DEVICE_Init(void) -{ - /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ - - /* USER CODE END USB_DEVICE_Init_PreTreatment */ - - /* Init Device Library, add supported class and start the library. */ - USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS); - USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC); - USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS); - /* Verify if the Battery Charging Detection mode (BCD) is used : */ - /* If yes, the USB device is started in the HAL_PCDEx_BCD_Callback */ - /* upon reception of PCD_BCD_DISCOVERY_COMPLETED message. */ - /* If no, the USB device is started now. */ - if (USBD_LL_BatteryCharging(&hUsbDeviceFS) != USBD_OK) { - USBD_Start(&hUsbDeviceFS); - } - /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ - - /* USER CODE END USB_DEVICE_Init_PostTreatment */ -} - -/** - * @brief Send BCD message to user layer - * @param hpcd: PCD handle - * @param msg: LPM message - * @retval None - */ -void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) -{ - USBD_HandleTypeDef usbdHandle = hUsbDeviceFS; - - /* USER CODE BEGIN 7 */ - if (hpcd->battery_charging_active == ENABLE) - { - switch(msg) - { - case PCD_BCD_CONTACT_DETECTION: - - break; - - case PCD_BCD_STD_DOWNSTREAM_PORT: - - break; - - case PCD_BCD_CHARGING_DOWNSTREAM_PORT: - - break; - - case PCD_BCD_DEDICATED_CHARGING_PORT: - - break; - - case PCD_BCD_DISCOVERY_COMPLETED: - USBD_Start(&usbdHandle); - break; - - case PCD_BCD_ERROR: - default: - break; - } - } - /* USER CODE END 7 */ -} - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Src/usbd_cdc_if.c b/Samples/Nucleo-TPM/L476RG/Src/usbd_cdc_if.c deleted file mode 100644 index f5490fe9..00000000 --- a/Samples/Nucleo-TPM/L476RG/Src/usbd_cdc_if.c +++ /dev/null @@ -1,392 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_cdc_if.c - * @version : v2.0_Cube - * @brief : Usb device for Virtual Com Port. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_cdc_if.h" - -/* USER CODE BEGIN INCLUDE */ -#include -#include -#include "StmUtil.h" -#include "stm32l4xx_hal.h" - -/* USER CODE END INCLUDE */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ - -/* USER CODE BEGIN PV */ -/* Private variables ---------------------------------------------------------*/ - -/* USER CODE END PV */ - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @brief Usb device library. - * @{ - */ - -/** @addtogroup USBD_CDC_IF - * @{ - */ - -/** @defgroup USBD_CDC_IF_Private_TypesDefinitions USBD_CDC_IF_Private_TypesDefinitions - * @brief Private types. - * @{ - */ - -/* USER CODE BEGIN PRIVATE_TYPES */ -#define CDC_RTS_MASK 0x0002 -#define CDC_DTR_MASK 0x0001 -void TpmConnectionReset(void); -int TpmSignalEvent(uint8_t* Buf, uint32_t *Len); - -/* USER CODE END PRIVATE_TYPES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Private_Defines USBD_CDC_IF_Private_Defines - * @brief Private defines. - * @{ - */ - -/* USER CODE BEGIN PRIVATE_DEFINES */ -/* Define size for the receive and transmit buffer over CDC */ -/* It's up to user to redefine and/or remove those define */ -#define APP_RX_DATA_SIZE 2048 -#define APP_TX_DATA_SIZE 2048 -typedef struct -{ - uint8_t bReqType; - uint8_t bRequest; - uint16_t wVal; - uint16_t wIndex; - uint16_t wLength; -} USBD_SETUP_PKT, *PUSBD_SETUP_PKT; -extern RTC_HandleTypeDef hrtc; -/* USER CODE END PRIVATE_DEFINES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Private_Macros USBD_CDC_IF_Private_Macros - * @brief Private macros. - * @{ - */ - -/* USER CODE BEGIN PRIVATE_MACRO */ - -/* USER CODE END PRIVATE_MACRO */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Private_Variables USBD_CDC_IF_Private_Variables - * @brief Private variables. - * @{ - */ -/* Create buffer for reception and transmission */ -/* It's up to user to redefine and/or remove those define */ -/** Received data over USB are stored in this buffer */ -uint8_t UserRxBufferFS[APP_RX_DATA_SIZE]; - -/** Data to send over USB CDC are stored in this buffer */ -uint8_t UserTxBufferFS[APP_TX_DATA_SIZE]; - -/* USER CODE BEGIN PRIVATE_VARIABLES */ - -/* USER CODE END PRIVATE_VARIABLES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Exported_Variables USBD_CDC_IF_Exported_Variables - * @brief Public variables. - * @{ - */ - -extern USBD_HandleTypeDef hUsbDeviceFS; - -/* USER CODE BEGIN EXPORTED_VARIABLES */ -USBD_CDC_LineCodingTypeDef LineCoding = -{ - 115200, /* baud rate*/ - 0x00, /* stop bits-1*/ - 0x00, /* parity - none*/ - 0x08 /* nb. of bits 8*/ -}; -volatile uint8_t CDC_RTS = 0; // RequestToSend -volatile uint8_t CDC_DTR = 0; // DataTerminalReady - -/* USER CODE END EXPORTED_VARIABLES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Private_FunctionPrototypes USBD_CDC_IF_Private_FunctionPrototypes - * @brief Private functions declaration. - * @{ - */ - -static int8_t CDC_Init_FS(void); -static int8_t CDC_DeInit_FS(void); -static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length); -static int8_t CDC_Receive_FS(uint8_t* pbuf, uint32_t *Len); - -/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */ - -/* USER CODE END PRIVATE_FUNCTIONS_DECLARATION */ - -/** - * @} - */ - -USBD_CDC_ItfTypeDef USBD_Interface_fops_FS = -{ - CDC_Init_FS, - CDC_DeInit_FS, - CDC_Control_FS, - CDC_Receive_FS -}; - -/* Private functions ---------------------------------------------------------*/ -/** - * @brief Initializes the CDC media low layer over the FS USB IP - * @retval USBD_OK if all operations are OK else USBD_FAIL - */ -static int8_t CDC_Init_FS(void) -{ - /* USER CODE BEGIN 3 */ - /* Set Application Buffers */ - USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0); - USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS); - return (USBD_OK); - /* USER CODE END 3 */ -} - -/** - * @brief DeInitializes the CDC media low layer - * @retval USBD_OK if all operations are OK else USBD_FAIL - */ -static int8_t CDC_DeInit_FS(void) -{ - /* USER CODE BEGIN 4 */ - return (USBD_OK); - /* USER CODE END 4 */ -} - -/** - * @brief Manage the CDC class requests - * @param cmd: Command code - * @param pbuf: Buffer containing command data (request parameters) - * @param length: Number of data to be sent (in bytes) - * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL - */ -static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length) -{ - /* USER CODE BEGIN 5 */ - char parity[] = {'N', 'O', 'E', 'M', 'S'}; - uint8_t stop[] = {1, 15, 2}; - switch (cmd) - { - case CDC_SEND_ENCAPSULATED_COMMAND: - - break; - - case CDC_GET_ENCAPSULATED_RESPONSE: - - break; - - case CDC_SET_COMM_FEATURE: - - break; - - case CDC_GET_COMM_FEATURE: - - break; - - case CDC_CLEAR_COMM_FEATURE: - - break; - - /*******************************************************************************/ - /* Line Coding Structure */ - /*-----------------------------------------------------------------------------*/ - /* Offset | Field | Size | Value | Description */ - /* 0 | dwDTERate | 4 | Number |Data terminal rate, in bits per second*/ - /* 4 | bCharFormat | 1 | Number | Stop bits */ - /* 0 - 1 Stop bit */ - /* 1 - 1.5 Stop bits */ - /* 2 - 2 Stop bits */ - /* 5 | bParityType | 1 | Number | Parity */ - /* 0 - None */ - /* 1 - Odd */ - /* 2 - Even */ - /* 3 - Mark */ - /* 4 - Space */ - /* 6 | bDataBits | 1 | Number Data bits (5, 6, 7, 8 or 16). */ - /*******************************************************************************/ - case CDC_SET_LINE_CODING: - { - LineCoding.bitrate = pbuf[0] | (pbuf[1] << 8) | (pbuf[2] << 16) | (pbuf[3] << 24); - LineCoding.format = pbuf[4]; - LineCoding.paritytype = pbuf[5]; - LineCoding.datatype = pbuf[6]; - dbgPrint("CDC_SET_LINE_CODING: %lu-%d%c%d\r\n", LineCoding.bitrate, LineCoding.datatype, parity[LineCoding.paritytype], stop[LineCoding.format]); - break; - } - - case CDC_GET_LINE_CODING: - { - pbuf[0] = (uint8_t)(LineCoding.bitrate); - pbuf[1] = (uint8_t)(LineCoding.bitrate >> 8); - pbuf[2] = (uint8_t)(LineCoding.bitrate >> 16); - pbuf[3] = (uint8_t)(LineCoding.bitrate >> 24); - pbuf[4] = LineCoding.format; - pbuf[5] = LineCoding.paritytype; - pbuf[6] = LineCoding.datatype; - dbgPrint("CDC_GET_LINE_CODING: %lu-%d%c%d\r\n", LineCoding.bitrate, LineCoding.datatype, parity[LineCoding.paritytype], stop[LineCoding.format]); - break; - } - - case CDC_SET_CONTROL_LINE_STATE: - { - PUSBD_SETUP_PKT setupPkt = (PUSBD_SETUP_PKT)pbuf; - CDC_RTS = ((setupPkt->wVal & CDC_RTS_MASK) != 0); - CDC_DTR = ((setupPkt->wVal & CDC_DTR_MASK) != 0); - dbgPrint("CDC_SET_CONTROL_LINE_STATE: RTS=%d, DTR=%d\r\n", CDC_RTS, CDC_DTR); - // Reset any ongoing cmd transfers - TpmConnectionReset(); - break; - } - - case CDC_SEND_BREAK: - - break; - - default: - break; - } - - return (USBD_OK); - /* USER CODE END 5 */ -} - -/** - * @brief Data received over USB OUT endpoint are sent over CDC interface - * through this function. - * - * @note - * This function will block any OUT packet reception on USB endpoint - * untill exiting this function. If you exit this function before transfer - * is complete on CDC interface (ie. using DMA controller) it will result - * in receiving more data while previous ones are still not sent. - * - * @param Buf: Buffer of data to be received - * @param Len: Number of data received (in bytes) - * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL - */ -static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len) -{ - /* USER CODE BEGIN 6 */ - if(!TpmSignalEvent(Buf, Len)) - { - return(USBD_FAIL); - } - - USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]); - USBD_CDC_ReceivePacket(&hUsbDeviceFS); - return (USBD_OK); - /* USER CODE END 6 */ -} - -/** - * @brief CDC_Transmit_FS - * Data to send over USB IN endpoint are sent over CDC interface - * through this function. - * @note - * - * - * @param Buf: Buffer of data to be sent - * @param Len: Number of data to be sent (in bytes) - * @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY - */ -uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len) -{ - uint8_t result = USBD_OK; - /* USER CODE BEGIN 7 */ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData; - if (hcdc->TxState != 0){ - return USBD_BUSY; - } - USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len); - result = USBD_CDC_TransmitPacket(&hUsbDeviceFS); - /* USER CODE END 7 */ - return result; -} - -/* USER CODE BEGIN PRIVATE_FUNCTIONS_IMPLEMENTATION */ - -/* USER CODE END PRIVATE_FUNCTIONS_IMPLEMENTATION */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Src/usbd_conf.c b/Samples/Nucleo-TPM/L476RG/Src/usbd_conf.c deleted file mode 100644 index 1b9075fe..00000000 --- a/Samples/Nucleo-TPM/L476RG/Src/usbd_conf.c +++ /dev/null @@ -1,894 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_conf.c - * @version : v2.0_Cube - * @brief : This file implements the board support package for the USB device library - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx.h" -#include "stm32l4xx_hal.h" -#include "usbd_def.h" -#include "usbd_core.h" -#include "usbd_cdc.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ - -/* USER CODE BEGIN PV */ -/* Private variables ---------------------------------------------------------*/ - -/* USER CODE END PV */ - -PCD_HandleTypeDef hpcd_USB_OTG_FS; -void _Error_Handler(char * file, int line); - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* Exported function prototypes ----------------------------------------------*/ -extern USBD_StatusTypeDef USBD_LL_BatteryCharging(USBD_HandleTypeDef *pdev); - -/* USER CODE BEGIN PFP */ -/* Private function prototypes -----------------------------------------------*/ - -/* USER CODE END PFP */ - -/* Private functions ---------------------------------------------------------*/ - -/* USER CODE BEGIN 1 */ -static void SystemClockConfig_Resume(void); - -/* USER CODE END 1 */ - -void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state); -extern void SystemClock_Config(void); - -/******************************************************************************* - LL Driver Callbacks (PCD -> USB Device Library) -*******************************************************************************/ -/* MSP Init */ - -void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) -{ - GPIO_InitTypeDef GPIO_InitStruct; - if(pcdHandle->Instance==USB_OTG_FS) - { - /* USER CODE BEGIN USB_OTG_FS_MspInit 0 */ - - /* USER CODE END USB_OTG_FS_MspInit 0 */ - - /**USB_OTG_FS GPIO Configuration - PA11 ------> USB_OTG_FS_DM - PA12 ------> USB_OTG_FS_DP - */ - GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* Peripheral clock enable */ - __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - - /* Enable VDDUSB */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - HAL_PWREx_EnableVddUSB(); - __HAL_RCC_PWR_CLK_DISABLE(); - } - else - { - HAL_PWREx_EnableVddUSB(); - } - - /* Peripheral interrupt init */ - HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(OTG_FS_IRQn); - /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */ - - /* USER CODE END USB_OTG_FS_MspInit 1 */ - } -} - -void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle) -{ - if(pcdHandle->Instance==USB_OTG_FS) - { - /* USER CODE BEGIN USB_OTG_FS_MspDeInit 0 */ - - /* USER CODE END USB_OTG_FS_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USB_OTG_FS_CLK_DISABLE(); - - /**USB_OTG_FS GPIO Configuration - PA11 ------> USB_OTG_FS_DM - PA12 ------> USB_OTG_FS_DP - */ - HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); - - /* Disable VDDUSB */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - HAL_PWREx_DisableVddUSB(); - __HAL_RCC_PWR_CLK_DISABLE(); - } - else - { - HAL_PWREx_DisableVddUSB(); - } - - /* Peripheral interrupt Deinit*/ - HAL_NVIC_DisableIRQ(OTG_FS_IRQn); - - /* USER CODE BEGIN USB_OTG_FS_MspDeInit 1 */ - - /* USER CODE END USB_OTG_FS_MspDeInit 1 */ - } -} - -/** - * @brief Setup stage callback - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); -} - -/** - * @brief Data Out stage callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint number - * @retval None - */ -void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); -} - -/** - * @brief Data In stage callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint number - * @retval None - */ -void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); -} - -/** - * @brief SOF callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); -} - -/** - * @brief Reset callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_SpeedTypeDef speed = USBD_SPEED_FULL; - - /* Set USB current speed. */ - switch (hpcd->Init.speed) - { - case PCD_SPEED_FULL: - speed = USBD_SPEED_FULL; - break; - - default: - speed = USBD_SPEED_FULL; - break; - } - USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); - - /* Reset Device. */ - USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); -} - -/** - * @brief Suspend callback. - * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it) - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) -{ - __HAL_PCD_GATE_PHYCLOCK(hpcd); - /* Inform USB library that core enters in suspend Mode. */ - USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); - /* Enter in STOP mode. */ - /* USER CODE BEGIN 2 */ - if (hpcd->Init.low_power_enable) - { - /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ - SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - } - /* USER CODE END 2 */ -} - -/** - * @brief Resume callback. - * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it) - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) -{ - __HAL_PCD_UNGATE_PHYCLOCK(hpcd); - - /* USER CODE BEGIN 3 */ - if (hpcd->Init.low_power_enable) - { - /* Reset SLEEPDEEP bit of Cortex System Control Register. */ - SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - SystemClockConfig_Resume(); - } - /* USER CODE END 3 */ - USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); -} - -/** - * @brief ISOOUTIncomplete callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint number - * @retval None - */ -void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); -} - -/** - * @brief ISOINIncomplete callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint number - * @retval None - */ -void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); -} - -/** - * @brief Connect callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData); -} - -/** - * @brief Disconnect callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData); -} - -/******************************************************************************* - LL Driver Interface (USB Device Library --> PCD) -*******************************************************************************/ - -/** - * @brief Initializes the low level portion of the device driver. - * @param pdev: Device handle - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) -{ - /* Init USB Ip. */ - if (pdev->id == DEVICE_FS) { - /* Enable USB power on Pwrctrl CR2 register. */ - /* Link the driver to the stack. */ - hpcd_USB_OTG_FS.pData = pdev; - pdev->pData = &hpcd_USB_OTG_FS; - - hpcd_USB_OTG_FS.Instance = USB_OTG_FS; - hpcd_USB_OTG_FS.Init.dev_endpoints = 6; - hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; - hpcd_USB_OTG_FS.Init.ep0_mps = DEP0CTL_MPS_64; - hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; - hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE; - hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; - hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; - hpcd_USB_OTG_FS.Init.battery_charging_enable = DISABLE; - hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; - hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE; - if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80); - HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40); - HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80); - } - return USBD_OK; -} - -/** - * @brief De-Initializes the low level portion of the device driver. - * @param pdev: Device handle - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_DeInit(pdev->pData); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Starts the low level portion of the device driver. - * @param pdev: Device handle - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_Start(pdev->pData); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Stops the low level portion of the device driver. - * @param pdev: Device handle - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_Stop(pdev->pData); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Opens an endpoint of the low level driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @param ep_type: Endpoint type - * @param ep_mps: Endpoint max packet size - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Closes an endpoint of the low level driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Flushes an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Sets a Stall condition on an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Clears a Stall condition on an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Returns Stall condition. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval Stall (1: Yes, 0: No) - */ -uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; - - if((ep_addr & 0x80) == 0x80) - { - return hpcd->IN_ep[ep_addr & 0x7F].is_stall; - } - else - { - return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; - } -} - -/** - * @brief Assigns a USB address to the device. - * @param pdev: Device handle - * @param dev_addr: Device address - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Transmits data over an endpoint. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @param pbuf: Pointer to data to be sent - * @param size: Data size - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Prepares an endpoint for reception. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @param pbuf: Pointer to data to be received - * @param size: Data size - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Returns the last transfered packet size. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval Recived Data Size - */ -uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr); -} - -#if (USBD_LPM_ENABLED == 1) -/** - * @brief Send LPM message to user layer - * @param hpcd: PCD handle - * @param msg: LPM message - * @retval None - */ -void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) -{ - switch (msg) - { - case PCD_LPM_L0_ACTIVE: - if (hpcd->Init.low_power_enable) - { - SystemClock_Config(); - - /* Reset SLEEPDEEP bit of Cortex System Control Register. */ - SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - } - __HAL_PCD_UNGATE_PHYCLOCK(hpcd); - USBD_LL_Resume(hpcd->pData); - break; - - case PCD_LPM_L1_ACTIVE: - __HAL_PCD_GATE_PHYCLOCK(hpcd); - USBD_LL_Suspend(hpcd->pData); - - /* Enter in STOP mode. */ - if (hpcd->Init.low_power_enable) - { - /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ - SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - } - break; - } -} -#endif /* (USBD_LPM_ENABLED == 1) */ - -/** - * @brief Delays routine for the USB Device Library. - * @param Delay: Delay in ms - * @retval None - */ -void USBD_LL_Delay(uint32_t Delay) -{ - HAL_Delay(Delay); -} - -/** - * @brief Static single allocation. - * @param size: Size of allocated memory - * @retval None - */ -void *USBD_static_malloc(uint32_t size) -{ - static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */ - return mem; -} - -/** - * @brief Dummy memory free - * @param p: Pointer to allocated memory address - * @retval None - */ -void USBD_static_free(void *p) -{ - -} - -/* USER CODE BEGIN 5 */ -/** - * @brief Configures system clock after wake-up from USB resume callBack: - * enable HSI, PLL and select PLL as system clock source. - * @retval None - */ -static void SystemClockConfig_Resume(void) -{ - SystemClock_Config(); -} -/* USER CODE END 5 */ - -/** - * @brief Software device connection - * @param hpcd: PCD handle - * @param state: Connection state (0: disconnected / 1: connected) - * @retval None - */ -void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) -{ - /* USER CODE BEGIN 6 */ - if (state == 1) - { - /* Configure Low connection state. */ - - } - else - { - /* Configure High connection state. */ - - } - /* USER CODE END 6 */ -} - -/** - * @brief Verify if the Battery Charging Detection mode (BCD) is used : - * return USBD_OK if true - * else return USBD_FAIL if false - * @param pdev: Device handle - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_BatteryCharging(USBD_HandleTypeDef *pdev) -{ - PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*)pdev->pData; - if (hpcd->Init.battery_charging_enable == ENABLE) - { - return USBD_OK; - } - else - { - return USBD_FAIL; - } -} - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/Src/usbd_desc.c b/Samples/Nucleo-TPM/L476RG/Src/usbd_desc.c deleted file mode 100644 index 2e3a7e1c..00000000 --- a/Samples/Nucleo-TPM/L476RG/Src/usbd_desc.c +++ /dev/null @@ -1,405 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_desc.c - * @version : v2.0_Cube - * @brief : This file implements the USB device descriptors. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_core.h" -#include "usbd_desc.h" -#include "usbd_conf.h" - -/* USER CODE BEGIN INCLUDE */ - -/* USER CODE END INCLUDE */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ - -/* USER CODE BEGIN PV */ -/* Private variables ---------------------------------------------------------*/ - -/* USER CODE END PV */ - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @addtogroup USBD_DESC - * @{ - */ - -/** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions - * @brief Private types. - * @{ - */ - -/* USER CODE BEGIN PRIVATE_TYPES */ - -/* USER CODE END PRIVATE_TYPES */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines - * @brief Private defines. - * @{ - */ - -#define USBD_VID 1155 -#define USBD_LANGID_STRING 1033 -#define USBD_MANUFACTURER_STRING "STMicroelectronics" -#define USBD_PID_FS 22336 -#define USBD_PRODUCT_STRING_FS "STM32 Virtual ComPort" -#define USBD_SERIALNUMBER_STRING_FS "00000000001A" -#define USBD_CONFIGURATION_STRING_FS "CDC Config" -#define USBD_INTERFACE_STRING_FS "CDC Interface" - -#define USB_SIZ_BOS_DESC 0x0C - -/* USER CODE BEGIN PRIVATE_DEFINES */ - -/* USER CODE END PRIVATE_DEFINES */ - -/** - * @} - */ - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros - * @brief Private macros. - * @{ - */ - -/* USER CODE BEGIN PRIVATE_MACRO */ - -/* USER CODE END PRIVATE_MACRO */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes - * @brief Private functions declaration. - * @{ - */ - -uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); - -#ifdef USB_SUPPORT_USER_STRING_DESC -uint8_t * USBD_FS_USRStringDesc(USBD_SpeedTypeDef speed, uint8_t idx, uint16_t *length); -#endif /* USB_SUPPORT_USER_STRING_DESC */ - -#if (USBD_LPM_ENABLED == 1) -uint8_t * USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -#endif /* (USBD_LPM_ENABLED == 1) */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables - * @brief Private variables. - * @{ - */ - -USBD_DescriptorsTypeDef FS_Desc = -{ - USBD_FS_DeviceDescriptor -, USBD_FS_LangIDStrDescriptor -, USBD_FS_ManufacturerStrDescriptor -, USBD_FS_ProductStrDescriptor -, USBD_FS_SerialStrDescriptor -, USBD_FS_ConfigStrDescriptor -, USBD_FS_InterfaceStrDescriptor -#if (USBD_LPM_ENABLED == 1) -, USBD_FS_USR_BOSDescriptor -#endif /* (USBD_LPM_ENABLED == 1) */ -}; - -#if defined ( __ICCARM__ ) /* IAR Compiler */ - #pragma data_alignment=4 -#endif /* defined ( __ICCARM__ ) */ -/** USB standard device descriptor. */ -__ALIGN_BEGIN uint8_t USBD_FS_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END = -{ - 0x12, /*bLength */ - USB_DESC_TYPE_DEVICE, /*bDescriptorType*/ -#if (USBD_LPM_ENABLED == 1) - 0x01, /*bcdUSB */ /* changed to USB version 2.01 - in order to support LPM L1 suspend - resume test of USBCV3.0*/ -#else - 0x00, /*bcdUSB */ -#endif /* (USBD_LPM_ENABLED == 1) */ - 0x02, - 0x02, /*bDeviceClass*/ - 0x02, /*bDeviceSubClass*/ - 0x00, /*bDeviceProtocol*/ - USB_MAX_EP0_SIZE, /*bMaxPacketSize*/ - LOBYTE(USBD_VID), /*idVendor*/ - HIBYTE(USBD_VID), /*idVendor*/ - LOBYTE(USBD_PID_FS), /*idProduct*/ - HIBYTE(USBD_PID_FS), /*idProduct*/ - 0x00, /*bcdDevice rel. 2.00*/ - 0x02, - USBD_IDX_MFC_STR, /*Index of manufacturer string*/ - USBD_IDX_PRODUCT_STR, /*Index of product string*/ - USBD_IDX_SERIAL_STR, /*Index of serial number string*/ - USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/ -}; - -/* USB_DeviceDescriptor */ -/** BOS descriptor. */ -#if (USBD_LPM_ENABLED == 1) -#if defined ( __ICCARM__ ) /* IAR Compiler */ - #pragma data_alignment=4 -#endif /* defined ( __ICCARM__ ) */ -__ALIGN_BEGIN uint8_t USBD_FS_BOSDesc[USB_SIZ_BOS_DESC] __ALIGN_END = -{ - 0x5, - USB_DESC_TYPE_BOS, - 0xC, - 0x0, - 0x1, /* 1 device capability*/ - /* device capability*/ - 0x7, - USB_DEVICE_CAPABITY_TYPE, - 0x2, - 0x2, /* LPM capability bit set*/ - 0x0, - 0x0, - 0x0 -}; -#endif /* (USBD_LPM_ENABLED == 1) */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables - * @brief Private variables. - * @{ - */ - -#if defined ( __ICCARM__ ) /* IAR Compiler */ - #pragma data_alignment=4 -#endif /* defined ( __ICCARM__ ) */ - -/** USB lang indentifier descriptor. */ -__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END = -{ - USB_LEN_LANGID_STR_DESC, - USB_DESC_TYPE_STRING, - LOBYTE(USBD_LANGID_STRING), - HIBYTE(USBD_LANGID_STRING) -}; - -#if defined ( __ICCARM__ ) /* IAR Compiler */ - #pragma data_alignment=4 -#endif /* defined ( __ICCARM__ ) */ -/* Internal string descriptor. */ -__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END; - -/** - * @} - */ - -/** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions - * @brief Private functions. - * @{ - */ - -/** - * @brief Return the device descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - *length = sizeof(USBD_FS_DeviceDesc); - return USBD_FS_DeviceDesc; -} - -/** - * @brief Return the LangID string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - *length = sizeof(USBD_LangIDDesc); - return USBD_LangIDDesc; -} - -/** - * @brief Return the product string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - if(speed == 0) - { - USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); - } - else - { - USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); - } - return USBD_StrDesc; -} - -/** - * @brief Return the manufacturer string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); - return USBD_StrDesc; -} - -/** - * @brief Return the serial number string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - if(speed == USBD_SPEED_HIGH) - { - USBD_GetString((uint8_t *)USBD_SERIALNUMBER_STRING_FS, USBD_StrDesc, length); - } - else - { - USBD_GetString((uint8_t *)USBD_SERIALNUMBER_STRING_FS, USBD_StrDesc, length); - } - return USBD_StrDesc; -} - -/** - * @brief Return the configuration string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - if(speed == USBD_SPEED_HIGH) - { - USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); - } - else - { - USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); - } - return USBD_StrDesc; -} - -/** - * @brief Return the interface string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - if(speed == 0) - { - USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); - } - else - { - USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); - } - return USBD_StrDesc; -} - -#if (USBD_LPM_ENABLED == 1) -/** - * @brief Return the BOS descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - *length = sizeof(USBD_FS_BOSDesc); - return (uint8_t*)USBD_FS_BOSDesc; -} -#endif /* (USBD_LPM_ENABLED == 1) */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L476RG/mx.scratch b/Samples/Nucleo-TPM/L476RG/mx.scratch deleted file mode 100644 index aafcf5af..00000000 --- a/Samples/Nucleo-TPM/L476RG/mx.scratch +++ /dev/null @@ -1,91 +0,0 @@ - - -D:\VS\brianTPM\Samples\Nucleo-TPM\L476RG\\Nucleo-L476RG -C -..\Drivers\CMSIS -C:\Users\Stefanth\STM32Cube\Repository\STM32Cube_FW_L4_V1.11.0\Drivers\CMSIS -TrueSTUDIO -0 - - - - - - - - - - - - - - - - - Nucleo-L476RG - STM32L476RGTx - 0x200 - 0xf000 - - NUCLEO-L476RG - - true - swd - - 1 - - - - - - - - - - - - __weak=__attribute__((weak)) - __packed=__attribute__((__packed__)) - - - - - - - USE_FULL_LL_DRIVER - MBEDTLS_CONFIG_FILE="mbedtls_config.h" - - - - - ..\Inc - ..\Drivers\STM32L4xx_HAL_Driver\Inc - ..\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy - ..\Middlewares\ST\STM32_USB_Device_Library\Core\Inc - ..\Middlewares\ST\STM32_USB_Device_Library\Class\CDC\Inc - ..\Drivers\CMSIS\Device\ST\STM32L4xx\Include - ..\Drivers\CMSIS\Include - - - - - - true - false - - - - Inc - - - Src - - - Drivers - - - Middlewares - - - - diff --git a/Samples/Nucleo-TPM/L476RG/startup/startup_stm32l476xx.s b/Samples/Nucleo-TPM/L476RG/startup/startup_stm32l476xx.s deleted file mode 100644 index f3537008..00000000 --- a/Samples/Nucleo-TPM/L476RG/startup/startup_stm32l476xx.s +++ /dev/null @@ -1,524 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32l476xx.s - * @author MCD Application Team - * @brief STM32L476xx devices vector table GCC toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address, - * - Configure the clock system - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m4 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - -.equ BootRAM, 0xF1E0F85F -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* Atollic update: set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call static constructors */ - bl __libc_init_array -/* Call the application's entry point.*/ - bl main - -LoopForever: - b LoopForever - -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * - * @param None - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex-M4. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler - .word PVD_PVM_IRQHandler - .word TAMP_STAMP_IRQHandler - .word RTC_WKUP_IRQHandler - .word FLASH_IRQHandler - .word RCC_IRQHandler - .word EXTI0_IRQHandler - .word EXTI1_IRQHandler - .word EXTI2_IRQHandler - .word EXTI3_IRQHandler - .word EXTI4_IRQHandler - .word DMA1_Channel1_IRQHandler - .word DMA1_Channel2_IRQHandler - .word DMA1_Channel3_IRQHandler - .word DMA1_Channel4_IRQHandler - .word DMA1_Channel5_IRQHandler - .word DMA1_Channel6_IRQHandler - .word DMA1_Channel7_IRQHandler - .word ADC1_2_IRQHandler - .word CAN1_TX_IRQHandler - .word CAN1_RX0_IRQHandler - .word CAN1_RX1_IRQHandler - .word CAN1_SCE_IRQHandler - .word EXTI9_5_IRQHandler - .word TIM1_BRK_TIM15_IRQHandler - .word TIM1_UP_TIM16_IRQHandler - .word TIM1_TRG_COM_TIM17_IRQHandler - .word TIM1_CC_IRQHandler - .word TIM2_IRQHandler - .word TIM3_IRQHandler - .word TIM4_IRQHandler - .word I2C1_EV_IRQHandler - .word I2C1_ER_IRQHandler - .word I2C2_EV_IRQHandler - .word I2C2_ER_IRQHandler - .word SPI1_IRQHandler - .word SPI2_IRQHandler - .word USART1_IRQHandler - .word USART2_IRQHandler - .word USART3_IRQHandler - .word EXTI15_10_IRQHandler - .word RTC_Alarm_IRQHandler - .word DFSDM1_FLT3_IRQHandler - .word TIM8_BRK_IRQHandler - .word TIM8_UP_IRQHandler - .word TIM8_TRG_COM_IRQHandler - .word TIM8_CC_IRQHandler - .word ADC3_IRQHandler - .word FMC_IRQHandler - .word SDMMC1_IRQHandler - .word TIM5_IRQHandler - .word SPI3_IRQHandler - .word UART4_IRQHandler - .word UART5_IRQHandler - .word TIM6_DAC_IRQHandler - .word TIM7_IRQHandler - .word DMA2_Channel1_IRQHandler - .word DMA2_Channel2_IRQHandler - .word DMA2_Channel3_IRQHandler - .word DMA2_Channel4_IRQHandler - .word DMA2_Channel5_IRQHandler - .word DFSDM1_FLT0_IRQHandler - .word DFSDM1_FLT1_IRQHandler - .word DFSDM1_FLT2_IRQHandler - .word COMP_IRQHandler - .word LPTIM1_IRQHandler - .word LPTIM2_IRQHandler - .word OTG_FS_IRQHandler - .word DMA2_Channel6_IRQHandler - .word DMA2_Channel7_IRQHandler - .word LPUART1_IRQHandler - .word QUADSPI_IRQHandler - .word I2C3_EV_IRQHandler - .word I2C3_ER_IRQHandler - .word SAI1_IRQHandler - .word SAI2_IRQHandler - .word SWPMI1_IRQHandler - .word TSC_IRQHandler - .word LCD_IRQHandler - .word 0 - .word RNG_IRQHandler - .word FPU_IRQHandler - - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_PVM_IRQHandler - .thumb_set PVD_PVM_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC1_2_IRQHandler - .thumb_set ADC1_2_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM15_IRQHandler - .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM16_IRQHandler - .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM17_IRQHandler - .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak DFSDM1_FLT3_IRQHandler - .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler - - .weak TIM8_BRK_IRQHandler - .thumb_set TIM8_BRK_IRQHandler,Default_Handler - - .weak TIM8_UP_IRQHandler - .thumb_set TIM8_UP_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_IRQHandler - .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak ADC3_IRQHandler - .thumb_set ADC3_IRQHandler,Default_Handler - - .weak FMC_IRQHandler - .thumb_set FMC_IRQHandler,Default_Handler - - .weak SDMMC1_IRQHandler - .thumb_set SDMMC1_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Channel1_IRQHandler - .thumb_set DMA2_Channel1_IRQHandler,Default_Handler - - .weak DMA2_Channel2_IRQHandler - .thumb_set DMA2_Channel2_IRQHandler,Default_Handler - - .weak DMA2_Channel3_IRQHandler - .thumb_set DMA2_Channel3_IRQHandler,Default_Handler - - .weak DMA2_Channel4_IRQHandler - .thumb_set DMA2_Channel4_IRQHandler,Default_Handler - - .weak DMA2_Channel5_IRQHandler - .thumb_set DMA2_Channel5_IRQHandler,Default_Handler - - .weak DFSDM1_FLT0_IRQHandler - .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler - - .weak DFSDM1_FLT1_IRQHandler - .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler - - .weak DFSDM1_FLT2_IRQHandler - .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler - - .weak COMP_IRQHandler - .thumb_set COMP_IRQHandler,Default_Handler - - .weak LPTIM1_IRQHandler - .thumb_set LPTIM1_IRQHandler,Default_Handler - - .weak LPTIM2_IRQHandler - .thumb_set LPTIM2_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Channel6_IRQHandler - .thumb_set DMA2_Channel6_IRQHandler,Default_Handler - - .weak DMA2_Channel7_IRQHandler - .thumb_set DMA2_Channel7_IRQHandler,Default_Handler - - .weak LPUART1_IRQHandler - .thumb_set LPUART1_IRQHandler,Default_Handler - - .weak QUADSPI_IRQHandler - .thumb_set QUADSPI_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak SAI1_IRQHandler - .thumb_set SAI1_IRQHandler,Default_Handler - - .weak SAI2_IRQHandler - .thumb_set SAI2_IRQHandler,Default_Handler - - .weak SWPMI1_IRQHandler - .thumb_set SWPMI1_IRQHandler,Default_Handler - - .weak TSC_IRQHandler - .thumb_set TSC_IRQHandler,Default_Handler - - .weak LCD_IRQHandler - .thumb_set LCD_IRQHandler,Default_Handler - - .weak RNG_IRQHandler - .thumb_set RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/.cproject b/Samples/Nucleo-TPM/L4A6RG/.cproject deleted file mode 100644 index 74237474..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/.cproject +++ /dev/null @@ -1,325 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/Samples/Nucleo-TPM/L4A6RG/.mxproject b/Samples/Nucleo-TPM/L4A6RG/.mxproject deleted file mode 100644 index 8142fc17..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/.mxproject +++ /dev/null @@ -1,14 +0,0 @@ -[PreviousGenFiles] -HeaderPath=D:/VS/brianTPM/Samples/Nucleo-TPM/L4A6RG/Inc -HeaderFiles=usb_device.h;usbd_conf.h;usbd_desc.h;usbd_cdc_if.h;stm32l4xx_it.h;stm32l4xx_hal_conf.h;main.h; -SourcePath=D:/VS/brianTPM/Samples/Nucleo-TPM/L4A6RG/Src -SourceFiles=usb_device.c;usbd_conf.c;usbd_desc.c;usbd_cdc_if.c;stm32l4xx_it.c;stm32l4xx_hal_msp.c;main.c; - -[PreviousLibFiles] -LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rng.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4a6xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; - -[PreviousUsedTStudioFiles] -SourceFiles=..\Src\main.c;..\Src\usb_device.c;..\Src\usbd_conf.c;..\Src\usbd_desc.c;..\Src\usbd_cdc_if.c;..\Src\stm32l4xx_it.c;..\Src\stm32l4xx_hal_msp.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;../\Src/system_stm32l4xx.c;../Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;null;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;../Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;../Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c; -HeaderPath=..\Drivers\STM32L4xx_HAL_Driver\Inc;..\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy;..\Middlewares\ST\STM32_USB_Device_Library\Core\Inc;..\Middlewares\ST\STM32_USB_Device_Library\Class\CDC\Inc;..\Drivers\CMSIS\Device\ST\STM32L4xx\Include;..\Drivers\CMSIS\Include;..\Inc; -CDefines=__weak:__attribute__((weak));__packed:__attribute__((__packed__)); - diff --git a/Samples/Nucleo-TPM/L4A6RG/.project b/Samples/Nucleo-TPM/L4A6RG/.project deleted file mode 100644 index 7413f294..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/.project +++ /dev/null @@ -1,160 +0,0 @@ - - - Nucleo-L4A6RG - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?children? - ?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\|| - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.buildLocation - ${workspace_loc:/STM32100B-EVAL/Debug} - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - Inc/Platform - 2 - PARENT-1-PROJECT_LOC/Shared/Platform/include - - - Inc/TPMCmd - 2 - PARENT-3-PROJECT_LOC/TPMCmd/tpm/include - - - Inc/TPMDevice - 2 - PARENT-1-PROJECT_LOC/Shared/TPMDevice/include - - - Middlewares/Platform - 2 - PARENT-1-PROJECT_LOC/Shared/Platform/src - - - Middlewares/TPMCmd - 2 - PARENT-3-PROJECT_LOC/TPMCmd/tpm/src - - - Middlewares/TPMDevice - 2 - PARENT-1-PROJECT_LOC/Shared/TPMDevice/src - - - Middlewares/WolfCypt - 2 - virtual:/virtual - - - Src/syscalls.c - 1 - $%7BPARENT-1-PROJECT_LOC%7D/Shared/syscalls.c - - - Middlewares/WolfCypt/aes.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/aes.c - - - Middlewares/WolfCypt/ecc.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/ecc.c - - - Middlewares/WolfCypt/integer.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/integer.c - - - Middlewares/WolfCypt/memory.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/memory.c - - - Middlewares/WolfCypt/sha.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/sha.c - - - Middlewares/WolfCypt/sha256.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/sha256.c - - - Middlewares/WolfCypt/sha512.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/sha512.c - - - Middlewares/WolfCypt/tfm.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/tfm.c - - - Middlewares/WolfCypt/wolfmath.c - 1 - PARENT-3-PROJECT_LOC/external/wolfssl/wolfcrypt/src/wolfmath.c - - - diff --git a/Samples/Nucleo-TPM/L4A6RG/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/Samples/Nucleo-TPM/L4A6RG/.settings/com.atollic.truestudio.debug.hardware_device.prefs deleted file mode 100644 index 2fed9c1a..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/.settings/com.atollic.truestudio.debug.hardware_device.prefs +++ /dev/null @@ -1,11 +0,0 @@ -BOARD=None -CODE_LOCATION=FLASH -ENDIAN=Little-endian -MCU=STM32L4A6RG -MCU_VENDOR=STMicroelectronics -MODEL=Lite -PROBE=ST-LINK -PROJECT_FORMAT_VERSION=2 -TARGET=ARM\u00AE -VERSION=4.1.0 -eclipse.preferences.version=1 diff --git a/Samples/Nucleo-TPM/L4A6RG/.settings/language.settings.xml b/Samples/Nucleo-TPM/L4A6RG/.settings/language.settings.xml deleted file mode 100644 index 175a2039..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/.settings/language.settings.xml +++ /dev/null @@ -1,20 +0,0 @@ - - - - - - - - - - - - - - - - - - - - diff --git a/Samples/Nucleo-TPM/L4A6RG/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/Samples/Nucleo-TPM/L4A6RG/.settings/org.eclipse.cdt.managedbuilder.core.prefs deleted file mode 100644 index 66eb6736..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/.settings/org.eclipse.cdt.managedbuilder.core.prefs +++ /dev/null @@ -1,11 +0,0 @@ -eclipse.preferences.version=1 -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/CPATH/delimiter=; -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/CPATH/operation=remove -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/C_INCLUDE_PATH/delimiter=; -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/C_INCLUDE_PATH/operation=remove -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/append=true -environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.1518366166/appendContributed=true -environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/LIBRARY_PATH/delimiter=; -environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/LIBRARY_PATH/operation=remove -environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/append=true -environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/appendContributed=true diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4a6xx.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4a6xx.h deleted file mode 100644 index df8de8ec..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4a6xx.h +++ /dev/null @@ -1,20127 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4a6xx.h - * @author MCD Application Team - * @brief CMSIS STM32L4A6xx Device Peripheral Access Layer Header File. - * - * This file contains: - * - Data structures and the address mapping for all peripherals - * - Peripheral's registers declarations and bits definition - * - Macros to access peripherals registers hardware - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS_Device - * @{ - */ - -/** @addtogroup stm32l4a6xx - * @{ - */ - -#ifndef __STM32L4A6xx_H -#define __STM32L4A6xx_H - -#ifdef __cplusplus - extern "C" { -#endif /* __cplusplus */ - -/** @addtogroup Configuration_section_for_CMSIS - * @{ - */ - -/** - * @brief Configuration of the Cortex-M4 Processor and Core Peripherals - */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32L4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32L4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ - -/** - * @} - */ - -/** @addtogroup Peripheral_interrupt_number_definition - * @{ - */ - -/** - * @brief STM32L4XX Interrupt Number Definition, according to the selected device - * in @ref Library_configuration_section - */ -typedef enum -{ -/****** Cortex-M4 Processor Exceptions Numbers ****************************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Cortex-M4 Non Maskable Interrupt */ - HardFault_IRQn = -13, /*!< 3 Cortex-M4 Hard Fault Interrupt */ - MemoryManagement_IRQn = -12, /*!< 4 Cortex-M4 Memory Management Interrupt */ - BusFault_IRQn = -11, /*!< 5 Cortex-M4 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /*!< 6 Cortex-M4 Usage Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M4 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /*!< 12 Cortex-M4 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M4 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M4 System Tick Interrupt */ -/****** STM32 specific Interrupt Numbers **********************************************************************/ - WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */ - PVD_PVM_IRQn = 1, /*!< PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection Interrupts */ - TAMP_STAMP_IRQn = 2, /*!< Tamper and TimeStamp interrupts through the EXTI line */ - RTC_WKUP_IRQn = 3, /*!< RTC Wakeup interrupt through the EXTI line */ - FLASH_IRQn = 4, /*!< FLASH global Interrupt */ - RCC_IRQn = 5, /*!< RCC global Interrupt */ - EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */ - EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */ - EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */ - EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */ - EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */ - DMA1_Channel1_IRQn = 11, /*!< DMA1 Channel 1 global Interrupt */ - DMA1_Channel2_IRQn = 12, /*!< DMA1 Channel 2 global Interrupt */ - DMA1_Channel3_IRQn = 13, /*!< DMA1 Channel 3 global Interrupt */ - DMA1_Channel4_IRQn = 14, /*!< DMA1 Channel 4 global Interrupt */ - DMA1_Channel5_IRQn = 15, /*!< DMA1 Channel 5 global Interrupt */ - DMA1_Channel6_IRQn = 16, /*!< DMA1 Channel 6 global Interrupt */ - DMA1_Channel7_IRQn = 17, /*!< DMA1 Channel 7 global Interrupt */ - ADC1_2_IRQn = 18, /*!< ADC1, ADC2 SAR global Interrupts */ - CAN1_TX_IRQn = 19, /*!< CAN1 TX Interrupt */ - CAN1_RX0_IRQn = 20, /*!< CAN1 RX0 Interrupt */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break interrupt and TIM15 global interrupt */ - TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update Interrupt and TIM16 global interrupt */ - TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt and TIM17 global interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTC_Alarm_IRQn = 41, /*!< RTC Alarm (A and B) through EXTI Line Interrupt */ - DFSDM1_FLT3_IRQn = 42, /*!< DFSDM1 Filter 3 global Interrupt */ - TIM8_BRK_IRQn = 43, /*!< TIM8 Break Interrupt */ - TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */ - TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt */ - TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ - ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ - FMC_IRQn = 48, /*!< FMC global Interrupt */ - SDMMC1_IRQn = 49, /*!< SDMMC1 global Interrupt */ - TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ - SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ - UART4_IRQn = 52, /*!< UART4 global Interrupt */ - UART5_IRQn = 53, /*!< UART5 global Interrupt */ - TIM6_DAC_IRQn = 54, /*!< TIM6 global and DAC1&2 underrun error interrupts */ - TIM7_IRQn = 55, /*!< TIM7 global interrupt */ - DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ - DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ - DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ - DMA2_Channel4_IRQn = 59, /*!< DMA2 Channel 4 global Interrupt */ - DMA2_Channel5_IRQn = 60, /*!< DMA2 Channel 5 global Interrupt */ - DFSDM1_FLT0_IRQn = 61, /*!< DFSDM1 Filter 0 global Interrupt */ - DFSDM1_FLT1_IRQn = 62, /*!< DFSDM1 Filter 1 global Interrupt */ - DFSDM1_FLT2_IRQn = 63, /*!< DFSDM1 Filter 2 global Interrupt */ - COMP_IRQn = 64, /*!< COMP1 and COMP2 Interrupts */ - LPTIM1_IRQn = 65, /*!< LP TIM1 interrupt */ - LPTIM2_IRQn = 66, /*!< LP TIM2 interrupt */ - OTG_FS_IRQn = 67, /*!< USB OTG FS global Interrupt */ - DMA2_Channel6_IRQn = 68, /*!< DMA2 Channel 6 global interrupt */ - DMA2_Channel7_IRQn = 69, /*!< DMA2 Channel 7 global interrupt */ - LPUART1_IRQn = 70, /*!< LP UART1 interrupt */ - QUADSPI_IRQn = 71, /*!< Quad SPI global interrupt */ - I2C3_EV_IRQn = 72, /*!< I2C3 event interrupt */ - I2C3_ER_IRQn = 73, /*!< I2C3 error interrupt */ - SAI1_IRQn = 74, /*!< Serial Audio Interface 1 global interrupt */ - SAI2_IRQn = 75, /*!< Serial Audio Interface 2 global interrupt */ - SWPMI1_IRQn = 76, /*!< Serial Wire Interface 1 global interrupt */ - TSC_IRQn = 77, /*!< Touch Sense Controller global interrupt */ - LCD_IRQn = 78, /*!< LCD global interrupt */ - AES_IRQn = 79, /*!< AES global interrupt */ - HASH_RNG_IRQn = 80, /*!< HASH and RNG global interrupt */ - FPU_IRQn = 81, /*!< FPU global interrupt */ - CRS_IRQn = 82, /*!< CRS global interrupt */ - I2C4_EV_IRQn = 83, /*!< I2C4 Event interrupt */ - I2C4_ER_IRQn = 84, /*!< I2C4 Error interrupt */ - DCMI_IRQn = 85, /*!< DCMI global interrupt */ - CAN2_TX_IRQn = 86, /*!< CAN2 TX interrupt */ - CAN2_RX0_IRQn = 87, /*!< CAN2 RX0 interrupt */ - CAN2_RX1_IRQn = 88, /*!< CAN2 RX1 interrupt */ - CAN2_SCE_IRQn = 89, /*!< CAN2 SCE interrupt */ - DMA2D_IRQn = 90 /*!< DMA2D global interrupt */ -} IRQn_Type; - -/** - * @} - */ - -#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ -#include "system_stm32l4xx.h" -#include - -/** @addtogroup Peripheral_registers_structures - * @{ - */ - -/** - * @brief Analog to Digital Converter - */ - -typedef struct -{ - __IO uint32_t ISR; /*!< ADC interrupt and status register, Address offset: 0x00 */ - __IO uint32_t IER; /*!< ADC interrupt enable register, Address offset: 0x04 */ - __IO uint32_t CR; /*!< ADC control register, Address offset: 0x08 */ - __IO uint32_t CFGR; /*!< ADC configuration register 1, Address offset: 0x0C */ - __IO uint32_t CFGR2; /*!< ADC configuration register 2, Address offset: 0x10 */ - __IO uint32_t SMPR1; /*!< ADC sampling time register 1, Address offset: 0x14 */ - __IO uint32_t SMPR2; /*!< ADC sampling time register 2, Address offset: 0x18 */ - uint32_t RESERVED1; /*!< Reserved, 0x1C */ - __IO uint32_t TR1; /*!< ADC analog watchdog 1 threshold register, Address offset: 0x20 */ - __IO uint32_t TR2; /*!< ADC analog watchdog 2 threshold register, Address offset: 0x24 */ - __IO uint32_t TR3; /*!< ADC analog watchdog 3 threshold register, Address offset: 0x28 */ - uint32_t RESERVED2; /*!< Reserved, 0x2C */ - __IO uint32_t SQR1; /*!< ADC group regular sequencer register 1, Address offset: 0x30 */ - __IO uint32_t SQR2; /*!< ADC group regular sequencer register 2, Address offset: 0x34 */ - __IO uint32_t SQR3; /*!< ADC group regular sequencer register 3, Address offset: 0x38 */ - __IO uint32_t SQR4; /*!< ADC group regular sequencer register 4, Address offset: 0x3C */ - __IO uint32_t DR; /*!< ADC group regular data register, Address offset: 0x40 */ - uint32_t RESERVED3; /*!< Reserved, 0x44 */ - uint32_t RESERVED4; /*!< Reserved, 0x48 */ - __IO uint32_t JSQR; /*!< ADC group injected sequencer register, Address offset: 0x4C */ - uint32_t RESERVED5[4]; /*!< Reserved, 0x50 - 0x5C */ - __IO uint32_t OFR1; /*!< ADC offset register 1, Address offset: 0x60 */ - __IO uint32_t OFR2; /*!< ADC offset register 2, Address offset: 0x64 */ - __IO uint32_t OFR3; /*!< ADC offset register 3, Address offset: 0x68 */ - __IO uint32_t OFR4; /*!< ADC offset register 4, Address offset: 0x6C */ - uint32_t RESERVED6[4]; /*!< Reserved, 0x70 - 0x7C */ - __IO uint32_t JDR1; /*!< ADC group injected rank 1 data register, Address offset: 0x80 */ - __IO uint32_t JDR2; /*!< ADC group injected rank 2 data register, Address offset: 0x84 */ - __IO uint32_t JDR3; /*!< ADC group injected rank 3 data register, Address offset: 0x88 */ - __IO uint32_t JDR4; /*!< ADC group injected rank 4 data register, Address offset: 0x8C */ - uint32_t RESERVED7[4]; /*!< Reserved, 0x090 - 0x09C */ - __IO uint32_t AWD2CR; /*!< ADC analog watchdog 1 configuration register, Address offset: 0xA0 */ - __IO uint32_t AWD3CR; /*!< ADC analog watchdog 3 Configuration Register, Address offset: 0xA4 */ - uint32_t RESERVED8; /*!< Reserved, 0x0A8 */ - uint32_t RESERVED9; /*!< Reserved, 0x0AC */ - __IO uint32_t DIFSEL; /*!< ADC differential mode selection register, Address offset: 0xB0 */ - __IO uint32_t CALFACT; /*!< ADC calibration factors, Address offset: 0xB4 */ - -} ADC_TypeDef; - -typedef struct -{ - __IO uint32_t CSR; /*!< ADC common status register, Address offset: ADC1 base address + 0x300 */ - uint32_t RESERVED; /*!< Reserved, Address offset: ADC1 base address + 0x304 */ - __IO uint32_t CCR; /*!< ADC common configuration register, Address offset: ADC1 base address + 0x308 */ - __IO uint32_t CDR; /*!< ADC common group regular data register Address offset: ADC1 base address + 0x30C */ -} ADC_Common_TypeDef; - -/** - * @brief DCMI - */ - -typedef struct -{ - __IO uint32_t CR; /*!< DCMI control register, Address offset: 0x00 */ - __IO uint32_t SR; /*!< DCMI status register, Address offset: 0x04 */ - __IO uint32_t RISR; /*!< DCMI raw interrupt status register, Address offset: 0x08 */ - __IO uint32_t IER; /*!< DCMI interrupt enable register, Address offset: 0x0C */ - __IO uint32_t MISR; /*!< DCMI masked interrupt status register, Address offset: 0x10 */ - __IO uint32_t ICR; /*!< DCMI interrupt clear register, Address offset: 0x14 */ - __IO uint32_t ESCR; /*!< DCMI embedded synchronization code register, Address offset: 0x18 */ - __IO uint32_t ESUR; /*!< DCMI embedded synchronization unmask register, Address offset: 0x1C */ - __IO uint32_t CWSTRTR; /*!< DCMI crop window start, Address offset: 0x20 */ - __IO uint32_t CWSIZER; /*!< DCMI crop window size, Address offset: 0x24 */ - __IO uint32_t DR; /*!< DCMI data register, Address offset: 0x28 */ -} DCMI_TypeDef; - -/** - * @brief Controller Area Network TxMailBox - */ - -typedef struct -{ - __IO uint32_t TIR; /*!< CAN TX mailbox identifier register */ - __IO uint32_t TDTR; /*!< CAN mailbox data length control and time stamp register */ - __IO uint32_t TDLR; /*!< CAN mailbox data low register */ - __IO uint32_t TDHR; /*!< CAN mailbox data high register */ -} CAN_TxMailBox_TypeDef; - -/** - * @brief Controller Area Network FIFOMailBox - */ - -typedef struct -{ - __IO uint32_t RIR; /*!< CAN receive FIFO mailbox identifier register */ - __IO uint32_t RDTR; /*!< CAN receive FIFO mailbox data length control and time stamp register */ - __IO uint32_t RDLR; /*!< CAN receive FIFO mailbox data low register */ - __IO uint32_t RDHR; /*!< CAN receive FIFO mailbox data high register */ -} CAN_FIFOMailBox_TypeDef; - -/** - * @brief Controller Area Network FilterRegister - */ - -typedef struct -{ - __IO uint32_t FR1; /*!< CAN Filter bank register 1 */ - __IO uint32_t FR2; /*!< CAN Filter bank register 1 */ -} CAN_FilterRegister_TypeDef; - -/** - * @brief Controller Area Network - */ - -typedef struct -{ - __IO uint32_t MCR; /*!< CAN master control register, Address offset: 0x00 */ - __IO uint32_t MSR; /*!< CAN master status register, Address offset: 0x04 */ - __IO uint32_t TSR; /*!< CAN transmit status register, Address offset: 0x08 */ - __IO uint32_t RF0R; /*!< CAN receive FIFO 0 register, Address offset: 0x0C */ - __IO uint32_t RF1R; /*!< CAN receive FIFO 1 register, Address offset: 0x10 */ - __IO uint32_t IER; /*!< CAN interrupt enable register, Address offset: 0x14 */ - __IO uint32_t ESR; /*!< CAN error status register, Address offset: 0x18 */ - __IO uint32_t BTR; /*!< CAN bit timing register, Address offset: 0x1C */ - uint32_t RESERVED0[88]; /*!< Reserved, 0x020 - 0x17F */ - CAN_TxMailBox_TypeDef sTxMailBox[3]; /*!< CAN Tx MailBox, Address offset: 0x180 - 0x1AC */ - CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; /*!< CAN FIFO MailBox, Address offset: 0x1B0 - 0x1CC */ - uint32_t RESERVED1[12]; /*!< Reserved, 0x1D0 - 0x1FF */ - __IO uint32_t FMR; /*!< CAN filter master register, Address offset: 0x200 */ - __IO uint32_t FM1R; /*!< CAN filter mode register, Address offset: 0x204 */ - uint32_t RESERVED2; /*!< Reserved, 0x208 */ - __IO uint32_t FS1R; /*!< CAN filter scale register, Address offset: 0x20C */ - uint32_t RESERVED3; /*!< Reserved, 0x210 */ - __IO uint32_t FFA1R; /*!< CAN filter FIFO assignment register, Address offset: 0x214 */ - uint32_t RESERVED4; /*!< Reserved, 0x218 */ - __IO uint32_t FA1R; /*!< CAN filter activation register, Address offset: 0x21C */ - uint32_t RESERVED5[8]; /*!< Reserved, 0x220-0x23F */ - CAN_FilterRegister_TypeDef sFilterRegister[28]; /*!< CAN Filter Register, Address offset: 0x240-0x31C */ -} CAN_TypeDef; - - -/** - * @brief Comparator - */ - -typedef struct -{ - __IO uint32_t CSR; /*!< COMP control and status register, Address offset: 0x00 */ -} COMP_TypeDef; - -typedef struct -{ - __IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several COMP instances, Address offset: 0x00 */ -} COMP_Common_TypeDef; - -/** - * @brief CRC calculation unit - */ - -typedef struct -{ - __IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */ - __IO uint8_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */ - uint8_t RESERVED0; /*!< Reserved, 0x05 */ - uint16_t RESERVED1; /*!< Reserved, 0x06 */ - __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ - uint32_t RESERVED2; /*!< Reserved, 0x0C */ - __IO uint32_t INIT; /*!< Initial CRC value register, Address offset: 0x10 */ - __IO uint32_t POL; /*!< CRC polynomial register, Address offset: 0x14 */ -} CRC_TypeDef; - -/** - * @brief Clock Recovery System - */ -typedef struct -{ -__IO uint32_t CR; /*!< CRS ccontrol register, Address offset: 0x00 */ -__IO uint32_t CFGR; /*!< CRS configuration register, Address offset: 0x04 */ -__IO uint32_t ISR; /*!< CRS interrupt and status register, Address offset: 0x08 */ -__IO uint32_t ICR; /*!< CRS interrupt flag clear register, Address offset: 0x0C */ -} CRS_TypeDef; - -/** - * @brief Digital to Analog Converter - */ - -typedef struct -{ - __IO uint32_t CR; /*!< DAC control register, Address offset: 0x00 */ - __IO uint32_t SWTRIGR; /*!< DAC software trigger register, Address offset: 0x04 */ - __IO uint32_t DHR12R1; /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */ - __IO uint32_t DHR12L1; /*!< DAC channel1 12-bit left aligned data holding register, Address offset: 0x0C */ - __IO uint32_t DHR8R1; /*!< DAC channel1 8-bit right aligned data holding register, Address offset: 0x10 */ - __IO uint32_t DHR12R2; /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */ - __IO uint32_t DHR12L2; /*!< DAC channel2 12-bit left aligned data holding register, Address offset: 0x18 */ - __IO uint32_t DHR8R2; /*!< DAC channel2 8-bit right-aligned data holding register, Address offset: 0x1C */ - __IO uint32_t DHR12RD; /*!< Dual DAC 12-bit right-aligned data holding register, Address offset: 0x20 */ - __IO uint32_t DHR12LD; /*!< DUAL DAC 12-bit left aligned data holding register, Address offset: 0x24 */ - __IO uint32_t DHR8RD; /*!< DUAL DAC 8-bit right aligned data holding register, Address offset: 0x28 */ - __IO uint32_t DOR1; /*!< DAC channel1 data output register, Address offset: 0x2C */ - __IO uint32_t DOR2; /*!< DAC channel2 data output register, Address offset: 0x30 */ - __IO uint32_t SR; /*!< DAC status register, Address offset: 0x34 */ - __IO uint32_t CCR; /*!< DAC calibration control register, Address offset: 0x38 */ - __IO uint32_t MCR; /*!< DAC mode control register, Address offset: 0x3C */ - __IO uint32_t SHSR1; /*!< DAC Sample and Hold sample time register 1, Address offset: 0x40 */ - __IO uint32_t SHSR2; /*!< DAC Sample and Hold sample time register 2, Address offset: 0x44 */ - __IO uint32_t SHHR; /*!< DAC Sample and Hold hold time register, Address offset: 0x48 */ - __IO uint32_t SHRR; /*!< DAC Sample and Hold refresh time register, Address offset: 0x4C */ -} DAC_TypeDef; - -/** - * @brief DFSDM module registers - */ -typedef struct -{ - __IO uint32_t FLTCR1; /*!< DFSDM control register1, Address offset: 0x100 */ - __IO uint32_t FLTCR2; /*!< DFSDM control register2, Address offset: 0x104 */ - __IO uint32_t FLTISR; /*!< DFSDM interrupt and status register, Address offset: 0x108 */ - __IO uint32_t FLTICR; /*!< DFSDM interrupt flag clear register, Address offset: 0x10C */ - __IO uint32_t FLTJCHGR; /*!< DFSDM injected channel group selection register, Address offset: 0x110 */ - __IO uint32_t FLTFCR; /*!< DFSDM filter control register, Address offset: 0x114 */ - __IO uint32_t FLTJDATAR; /*!< DFSDM data register for injected group, Address offset: 0x118 */ - __IO uint32_t FLTRDATAR; /*!< DFSDM data register for regular group, Address offset: 0x11C */ - __IO uint32_t FLTAWHTR; /*!< DFSDM analog watchdog high threshold register, Address offset: 0x120 */ - __IO uint32_t FLTAWLTR; /*!< DFSDM analog watchdog low threshold register, Address offset: 0x124 */ - __IO uint32_t FLTAWSR; /*!< DFSDM analog watchdog status register Address offset: 0x128 */ - __IO uint32_t FLTAWCFR; /*!< DFSDM analog watchdog clear flag register Address offset: 0x12C */ - __IO uint32_t FLTEXMAX; /*!< DFSDM extreme detector maximum register, Address offset: 0x130 */ - __IO uint32_t FLTEXMIN; /*!< DFSDM extreme detector minimum register Address offset: 0x134 */ - __IO uint32_t FLTCNVTIMR; /*!< DFSDM conversion timer, Address offset: 0x138 */ -} DFSDM_Filter_TypeDef; - -/** - * @brief DFSDM channel configuration registers - */ -typedef struct -{ - __IO uint32_t CHCFGR1; /*!< DFSDM channel configuration register1, Address offset: 0x00 */ - __IO uint32_t CHCFGR2; /*!< DFSDM channel configuration register2, Address offset: 0x04 */ - __IO uint32_t CHAWSCDR; /*!< DFSDM channel analog watchdog and - short circuit detector register, Address offset: 0x08 */ - __IO uint32_t CHWDATAR; /*!< DFSDM channel watchdog filter data register, Address offset: 0x0C */ - __IO uint32_t CHDATINR; /*!< DFSDM channel data input register, Address offset: 0x10 */ -} DFSDM_Channel_TypeDef; - -/** - * @brief Debug MCU - */ - -typedef struct -{ - __IO uint32_t IDCODE; /*!< MCU device ID code, Address offset: 0x00 */ - __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ - __IO uint32_t APB1FZR1; /*!< Debug MCU APB1 freeze register 1, Address offset: 0x08 */ - __IO uint32_t APB1FZR2; /*!< Debug MCU APB1 freeze register 2, Address offset: 0x0C */ - __IO uint32_t APB2FZ; /*!< Debug MCU APB2 freeze register, Address offset: 0x10 */ -} DBGMCU_TypeDef; - - -/** - * @brief DMA Controller - */ - -typedef struct -{ - __IO uint32_t CCR; /*!< DMA channel x configuration register */ - __IO uint32_t CNDTR; /*!< DMA channel x number of data register */ - __IO uint32_t CPAR; /*!< DMA channel x peripheral address register */ - __IO uint32_t CMAR; /*!< DMA channel x memory address register */ -} DMA_Channel_TypeDef; - -typedef struct -{ - __IO uint32_t ISR; /*!< DMA interrupt status register, Address offset: 0x00 */ - __IO uint32_t IFCR; /*!< DMA interrupt flag clear register, Address offset: 0x04 */ -} DMA_TypeDef; - -typedef struct -{ - __IO uint32_t CSELR; /*!< DMA channel selection register */ -} DMA_Request_TypeDef; - -/* Legacy define */ -#define DMA_request_TypeDef DMA_Request_TypeDef - - -/** - * @brief DMA2D Controller - */ - -typedef struct -{ - __IO uint32_t CR; /*!< DMA2D Control Register, Address offset: 0x00 */ - __IO uint32_t ISR; /*!< DMA2D Interrupt Status Register, Address offset: 0x04 */ - __IO uint32_t IFCR; /*!< DMA2D Interrupt Flag Clear Register, Address offset: 0x08 */ - __IO uint32_t FGMAR; /*!< DMA2D Foreground Memory Address Register, Address offset: 0x0C */ - __IO uint32_t FGOR; /*!< DMA2D Foreground Offset Register, Address offset: 0x10 */ - __IO uint32_t BGMAR; /*!< DMA2D Background Memory Address Register, Address offset: 0x14 */ - __IO uint32_t BGOR; /*!< DMA2D Background Offset Register, Address offset: 0x18 */ - __IO uint32_t FGPFCCR; /*!< DMA2D Foreground PFC Control Register, Address offset: 0x1C */ - __IO uint32_t FGCOLR; /*!< DMA2D Foreground Color Register, Address offset: 0x20 */ - __IO uint32_t BGPFCCR; /*!< DMA2D Background PFC Control Register, Address offset: 0x24 */ - __IO uint32_t BGCOLR; /*!< DMA2D Background Color Register, Address offset: 0x28 */ - __IO uint32_t FGCMAR; /*!< DMA2D Foreground CLUT Memory Address Register, Address offset: 0x2C */ - __IO uint32_t BGCMAR; /*!< DMA2D Background CLUT Memory Address Register, Address offset: 0x30 */ - __IO uint32_t OPFCCR; /*!< DMA2D Output PFC Control Register, Address offset: 0x34 */ - __IO uint32_t OCOLR; /*!< DMA2D Output Color Register, Address offset: 0x38 */ - __IO uint32_t OMAR; /*!< DMA2D Output Memory Address Register, Address offset: 0x3C */ - __IO uint32_t OOR; /*!< DMA2D Output Offset Register, Address offset: 0x40 */ - __IO uint32_t NLR; /*!< DMA2D Number of Line Register, Address offset: 0x44 */ - __IO uint32_t LWR; /*!< DMA2D Line Watermark Register, Address offset: 0x48 */ - __IO uint32_t AMTCR; /*!< DMA2D AHB Master Timer Configuration Register, Address offset: 0x4C */ - uint32_t RESERVED[236]; /*!< Reserved, Address offset: 0x50-0x3FF */ - __IO uint32_t FGCLUT[256]; /*!< DMA2D Foreground CLUT, Address offset:0x400-0x7FF */ - __IO uint32_t BGCLUT[256]; /*!< DMA2D Background CLUT, Address offset:0x800-0xBFF */ -} DMA2D_TypeDef; - -/** - * @brief External Interrupt/Event Controller - */ - -typedef struct -{ - __IO uint32_t IMR1; /*!< EXTI Interrupt mask register 1, Address offset: 0x00 */ - __IO uint32_t EMR1; /*!< EXTI Event mask register 1, Address offset: 0x04 */ - __IO uint32_t RTSR1; /*!< EXTI Rising trigger selection register 1, Address offset: 0x08 */ - __IO uint32_t FTSR1; /*!< EXTI Falling trigger selection register 1, Address offset: 0x0C */ - __IO uint32_t SWIER1; /*!< EXTI Software interrupt event register 1, Address offset: 0x10 */ - __IO uint32_t PR1; /*!< EXTI Pending register 1, Address offset: 0x14 */ - uint32_t RESERVED1; /*!< Reserved, 0x18 */ - uint32_t RESERVED2; /*!< Reserved, 0x1C */ - __IO uint32_t IMR2; /*!< EXTI Interrupt mask register 2, Address offset: 0x20 */ - __IO uint32_t EMR2; /*!< EXTI Event mask register 2, Address offset: 0x24 */ - __IO uint32_t RTSR2; /*!< EXTI Rising trigger selection register 2, Address offset: 0x28 */ - __IO uint32_t FTSR2; /*!< EXTI Falling trigger selection register 2, Address offset: 0x2C */ - __IO uint32_t SWIER2; /*!< EXTI Software interrupt event register 2, Address offset: 0x30 */ - __IO uint32_t PR2; /*!< EXTI Pending register 2, Address offset: 0x34 */ -} EXTI_TypeDef; - - -/** - * @brief Firewall - */ - -typedef struct -{ - __IO uint32_t CSSA; /*!< Code Segment Start Address register, Address offset: 0x00 */ - __IO uint32_t CSL; /*!< Code Segment Length register, Address offset: 0x04 */ - __IO uint32_t NVDSSA; /*!< NON volatile data Segment Start Address register, Address offset: 0x08 */ - __IO uint32_t NVDSL; /*!< NON volatile data Segment Length register, Address offset: 0x0C */ - __IO uint32_t VDSSA ; /*!< Volatile data Segment Start Address register, Address offset: 0x10 */ - __IO uint32_t VDSL ; /*!< Volatile data Segment Length register, Address offset: 0x14 */ - uint32_t RESERVED1; /*!< Reserved1, Address offset: 0x18 */ - uint32_t RESERVED2; /*!< Reserved2, Address offset: 0x1C */ - __IO uint32_t CR ; /*!< Configuration register, Address offset: 0x20 */ -} FIREWALL_TypeDef; - - -/** - * @brief FLASH Registers - */ - -typedef struct -{ - __IO uint32_t ACR; /*!< FLASH access control register, Address offset: 0x00 */ - __IO uint32_t PDKEYR; /*!< FLASH power down key register, Address offset: 0x04 */ - __IO uint32_t KEYR; /*!< FLASH key register, Address offset: 0x08 */ - __IO uint32_t OPTKEYR; /*!< FLASH option key register, Address offset: 0x0C */ - __IO uint32_t SR; /*!< FLASH status register, Address offset: 0x10 */ - __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x14 */ - __IO uint32_t ECCR; /*!< FLASH ECC register, Address offset: 0x18 */ - __IO uint32_t RESERVED1; /*!< Reserved1, Address offset: 0x1C */ - __IO uint32_t OPTR; /*!< FLASH option register, Address offset: 0x20 */ - __IO uint32_t PCROP1SR; /*!< FLASH bank1 PCROP start address register, Address offset: 0x24 */ - __IO uint32_t PCROP1ER; /*!< FLASH bank1 PCROP end address register, Address offset: 0x28 */ - __IO uint32_t WRP1AR; /*!< FLASH bank1 WRP area A address register, Address offset: 0x2C */ - __IO uint32_t WRP1BR; /*!< FLASH bank1 WRP area B address register, Address offset: 0x30 */ - uint32_t RESERVED2[4]; /*!< Reserved2, Address offset: 0x34-0x40 */ - __IO uint32_t PCROP2SR; /*!< FLASH bank2 PCROP start address register, Address offset: 0x44 */ - __IO uint32_t PCROP2ER; /*!< FLASH bank2 PCROP end address register, Address offset: 0x48 */ - __IO uint32_t WRP2AR; /*!< FLASH bank2 WRP area A address register, Address offset: 0x4C */ - __IO uint32_t WRP2BR; /*!< FLASH bank2 WRP area B address register, Address offset: 0x50 */ -} FLASH_TypeDef; - - -/** - * @brief Flexible Memory Controller - */ - -typedef struct -{ - __IO uint32_t BTCR[8]; /*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */ -} FMC_Bank1_TypeDef; - -/** - * @brief Flexible Memory Controller Bank1E - */ - -typedef struct -{ - __IO uint32_t BWTR[7]; /*!< NOR/PSRAM write timing registers, Address offset: 0x104-0x11C */ -} FMC_Bank1E_TypeDef; - -/** - * @brief Flexible Memory Controller Bank3 - */ - -typedef struct -{ - __IO uint32_t PCR; /*!< NAND Flash control register, Address offset: 0x80 */ - __IO uint32_t SR; /*!< NAND Flash FIFO status and interrupt register, Address offset: 0x84 */ - __IO uint32_t PMEM; /*!< NAND Flash Common memory space timing register, Address offset: 0x88 */ - __IO uint32_t PATT; /*!< NAND Flash Attribute memory space timing register, Address offset: 0x8C */ - uint32_t RESERVED0; /*!< Reserved, 0x90 */ - __IO uint32_t ECCR; /*!< NAND Flash ECC result registers, Address offset: 0x94 */ -} FMC_Bank3_TypeDef; - -/** - * @brief General Purpose I/O - */ - -typedef struct -{ - __IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */ - __IO uint32_t OTYPER; /*!< GPIO port output type register, Address offset: 0x04 */ - __IO uint32_t OSPEEDR; /*!< GPIO port output speed register, Address offset: 0x08 */ - __IO uint32_t PUPDR; /*!< GPIO port pull-up/pull-down register, Address offset: 0x0C */ - __IO uint32_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */ - __IO uint32_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */ - __IO uint32_t BSRR; /*!< GPIO port bit set/reset register, Address offset: 0x18 */ - __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ - __IO uint32_t AFR[2]; /*!< GPIO alternate function registers, Address offset: 0x20-0x24 */ - __IO uint32_t BRR; /*!< GPIO Bit Reset register, Address offset: 0x28 */ - -} GPIO_TypeDef; - - -/** - * @brief Inter-integrated Circuit Interface - */ - -typedef struct -{ - __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ - __IO uint32_t CR2; /*!< I2C Control register 2, Address offset: 0x04 */ - __IO uint32_t OAR1; /*!< I2C Own address 1 register, Address offset: 0x08 */ - __IO uint32_t OAR2; /*!< I2C Own address 2 register, Address offset: 0x0C */ - __IO uint32_t TIMINGR; /*!< I2C Timing register, Address offset: 0x10 */ - __IO uint32_t TIMEOUTR; /*!< I2C Timeout register, Address offset: 0x14 */ - __IO uint32_t ISR; /*!< I2C Interrupt and status register, Address offset: 0x18 */ - __IO uint32_t ICR; /*!< I2C Interrupt clear register, Address offset: 0x1C */ - __IO uint32_t PECR; /*!< I2C PEC register, Address offset: 0x20 */ - __IO uint32_t RXDR; /*!< I2C Receive data register, Address offset: 0x24 */ - __IO uint32_t TXDR; /*!< I2C Transmit data register, Address offset: 0x28 */ -} I2C_TypeDef; - -/** - * @brief Independent WATCHDOG - */ - -typedef struct -{ - __IO uint32_t KR; /*!< IWDG Key register, Address offset: 0x00 */ - __IO uint32_t PR; /*!< IWDG Prescaler register, Address offset: 0x04 */ - __IO uint32_t RLR; /*!< IWDG Reload register, Address offset: 0x08 */ - __IO uint32_t SR; /*!< IWDG Status register, Address offset: 0x0C */ - __IO uint32_t WINR; /*!< IWDG Window register, Address offset: 0x10 */ -} IWDG_TypeDef; - -/** - * @brief LCD - */ - -typedef struct -{ - __IO uint32_t CR; /*!< LCD control register, Address offset: 0x00 */ - __IO uint32_t FCR; /*!< LCD frame control register, Address offset: 0x04 */ - __IO uint32_t SR; /*!< LCD status register, Address offset: 0x08 */ - __IO uint32_t CLR; /*!< LCD clear register, Address offset: 0x0C */ - uint32_t RESERVED; /*!< Reserved, Address offset: 0x10 */ - __IO uint32_t RAM[16]; /*!< LCD display memory, Address offset: 0x14-0x50 */ -} LCD_TypeDef; - -/** - * @brief LPTIMER - */ -typedef struct -{ - __IO uint32_t ISR; /*!< LPTIM Interrupt and Status register, Address offset: 0x00 */ - __IO uint32_t ICR; /*!< LPTIM Interrupt Clear register, Address offset: 0x04 */ - __IO uint32_t IER; /*!< LPTIM Interrupt Enable register, Address offset: 0x08 */ - __IO uint32_t CFGR; /*!< LPTIM Configuration register, Address offset: 0x0C */ - __IO uint32_t CR; /*!< LPTIM Control register, Address offset: 0x10 */ - __IO uint32_t CMP; /*!< LPTIM Compare register, Address offset: 0x14 */ - __IO uint32_t ARR; /*!< LPTIM Autoreload register, Address offset: 0x18 */ - __IO uint32_t CNT; /*!< LPTIM Counter register, Address offset: 0x1C */ - __IO uint32_t OR; /*!< LPTIM Option register, Address offset: 0x20 */ -} LPTIM_TypeDef; - -/** - * @brief Operational Amplifier (OPAMP) - */ - -typedef struct -{ - __IO uint32_t CSR; /*!< OPAMP control/status register, Address offset: 0x00 */ - __IO uint32_t OTR; /*!< OPAMP offset trimming register for normal mode, Address offset: 0x04 */ - __IO uint32_t LPOTR; /*!< OPAMP offset trimming register for low power mode, Address offset: 0x08 */ -} OPAMP_TypeDef; - -typedef struct -{ - __IO uint32_t CSR; /*!< OPAMP control/status register, used for bits common to several OPAMP instances, Address offset: 0x00 */ -} OPAMP_Common_TypeDef; - -/** - * @brief Power Control - */ - -typedef struct -{ - __IO uint32_t CR1; /*!< PWR power control register 1, Address offset: 0x00 */ - __IO uint32_t CR2; /*!< PWR power control register 2, Address offset: 0x04 */ - __IO uint32_t CR3; /*!< PWR power control register 3, Address offset: 0x08 */ - __IO uint32_t CR4; /*!< PWR power control register 4, Address offset: 0x0C */ - __IO uint32_t SR1; /*!< PWR power status register 1, Address offset: 0x10 */ - __IO uint32_t SR2; /*!< PWR power status register 2, Address offset: 0x14 */ - __IO uint32_t SCR; /*!< PWR power status reset register, Address offset: 0x18 */ - uint32_t RESERVED; /*!< Reserved, Address offset: 0x1C */ - __IO uint32_t PUCRA; /*!< Pull_up control register of portA, Address offset: 0x20 */ - __IO uint32_t PDCRA; /*!< Pull_Down control register of portA, Address offset: 0x24 */ - __IO uint32_t PUCRB; /*!< Pull_up control register of portB, Address offset: 0x28 */ - __IO uint32_t PDCRB; /*!< Pull_Down control register of portB, Address offset: 0x2C */ - __IO uint32_t PUCRC; /*!< Pull_up control register of portC, Address offset: 0x30 */ - __IO uint32_t PDCRC; /*!< Pull_Down control register of portC, Address offset: 0x34 */ - __IO uint32_t PUCRD; /*!< Pull_up control register of portD, Address offset: 0x38 */ - __IO uint32_t PDCRD; /*!< Pull_Down control register of portD, Address offset: 0x3C */ - __IO uint32_t PUCRE; /*!< Pull_up control register of portE, Address offset: 0x40 */ - __IO uint32_t PDCRE; /*!< Pull_Down control register of portE, Address offset: 0x44 */ - __IO uint32_t PUCRF; /*!< Pull_up control register of portF, Address offset: 0x48 */ - __IO uint32_t PDCRF; /*!< Pull_Down control register of portF, Address offset: 0x4C */ - __IO uint32_t PUCRG; /*!< Pull_up control register of portG, Address offset: 0x50 */ - __IO uint32_t PDCRG; /*!< Pull_Down control register of portG, Address offset: 0x54 */ - __IO uint32_t PUCRH; /*!< Pull_up control register of portH, Address offset: 0x58 */ - __IO uint32_t PDCRH; /*!< Pull_Down control register of portH, Address offset: 0x5C */ - __IO uint32_t PUCRI; /*!< Pull_up control register of portI, Address offset: 0x60 */ - __IO uint32_t PDCRI; /*!< Pull_Down control register of portI, Address offset: 0x64 */ -} PWR_TypeDef; - - -/** - * @brief QUAD Serial Peripheral Interface - */ - -typedef struct -{ - __IO uint32_t CR; /*!< QUADSPI Control register, Address offset: 0x00 */ - __IO uint32_t DCR; /*!< QUADSPI Device Configuration register, Address offset: 0x04 */ - __IO uint32_t SR; /*!< QUADSPI Status register, Address offset: 0x08 */ - __IO uint32_t FCR; /*!< QUADSPI Flag Clear register, Address offset: 0x0C */ - __IO uint32_t DLR; /*!< QUADSPI Data Length register, Address offset: 0x10 */ - __IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset: 0x14 */ - __IO uint32_t AR; /*!< QUADSPI Address register, Address offset: 0x18 */ - __IO uint32_t ABR; /*!< QUADSPI Alternate Bytes register, Address offset: 0x1C */ - __IO uint32_t DR; /*!< QUADSPI Data register, Address offset: 0x20 */ - __IO uint32_t PSMKR; /*!< QUADSPI Polling Status Mask register, Address offset: 0x24 */ - __IO uint32_t PSMAR; /*!< QUADSPI Polling Status Match register, Address offset: 0x28 */ - __IO uint32_t PIR; /*!< QUADSPI Polling Interval register, Address offset: 0x2C */ - __IO uint32_t LPTR; /*!< QUADSPI Low Power Timeout register, Address offset: 0x30 */ -} QUADSPI_TypeDef; - - -/** - * @brief Reset and Clock Control - */ - -typedef struct -{ - __IO uint32_t CR; /*!< RCC clock control register, Address offset: 0x00 */ - __IO uint32_t ICSCR; /*!< RCC internal clock sources calibration register, Address offset: 0x04 */ - __IO uint32_t CFGR; /*!< RCC clock configuration register, Address offset: 0x08 */ - __IO uint32_t PLLCFGR; /*!< RCC system PLL configuration register, Address offset: 0x0C */ - __IO uint32_t PLLSAI1CFGR; /*!< RCC PLL SAI1 configuration register, Address offset: 0x10 */ - __IO uint32_t PLLSAI2CFGR; /*!< RCC PLL SAI2 configuration register, Address offset: 0x14 */ - __IO uint32_t CIER; /*!< RCC clock interrupt enable register, Address offset: 0x18 */ - __IO uint32_t CIFR; /*!< RCC clock interrupt flag register, Address offset: 0x1C */ - __IO uint32_t CICR; /*!< RCC clock interrupt clear register, Address offset: 0x20 */ - uint32_t RESERVED0; /*!< Reserved, Address offset: 0x24 */ - __IO uint32_t AHB1RSTR; /*!< RCC AHB1 peripheral reset register, Address offset: 0x28 */ - __IO uint32_t AHB2RSTR; /*!< RCC AHB2 peripheral reset register, Address offset: 0x2C */ - __IO uint32_t AHB3RSTR; /*!< RCC AHB3 peripheral reset register, Address offset: 0x30 */ - uint32_t RESERVED1; /*!< Reserved, Address offset: 0x34 */ - __IO uint32_t APB1RSTR1; /*!< RCC APB1 peripheral reset register 1, Address offset: 0x38 */ - __IO uint32_t APB1RSTR2; /*!< RCC APB1 peripheral reset register 2, Address offset: 0x3C */ - __IO uint32_t APB2RSTR; /*!< RCC APB2 peripheral reset register, Address offset: 0x40 */ - uint32_t RESERVED2; /*!< Reserved, Address offset: 0x44 */ - __IO uint32_t AHB1ENR; /*!< RCC AHB1 peripheral clocks enable register, Address offset: 0x48 */ - __IO uint32_t AHB2ENR; /*!< RCC AHB2 peripheral clocks enable register, Address offset: 0x4C */ - __IO uint32_t AHB3ENR; /*!< RCC AHB3 peripheral clocks enable register, Address offset: 0x50 */ - uint32_t RESERVED3; /*!< Reserved, Address offset: 0x54 */ - __IO uint32_t APB1ENR1; /*!< RCC APB1 peripheral clocks enable register 1, Address offset: 0x58 */ - __IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, Address offset: 0x5C */ - __IO uint32_t APB2ENR; /*!< RCC APB2 peripheral clocks enable register, Address offset: 0x60 */ - uint32_t RESERVED4; /*!< Reserved, Address offset: 0x64 */ - __IO uint32_t AHB1SMENR; /*!< RCC AHB1 peripheral clocks enable in sleep and stop modes register, Address offset: 0x68 */ - __IO uint32_t AHB2SMENR; /*!< RCC AHB2 peripheral clocks enable in sleep and stop modes register, Address offset: 0x6C */ - __IO uint32_t AHB3SMENR; /*!< RCC AHB3 peripheral clocks enable in sleep and stop modes register, Address offset: 0x70 */ - uint32_t RESERVED5; /*!< Reserved, Address offset: 0x74 */ - __IO uint32_t APB1SMENR1; /*!< RCC APB1 peripheral clocks enable in sleep mode and stop modes register 1, Address offset: 0x78 */ - __IO uint32_t APB1SMENR2; /*!< RCC APB1 peripheral clocks enable in sleep mode and stop modes register 2, Address offset: 0x7C */ - __IO uint32_t APB2SMENR; /*!< RCC APB2 peripheral clocks enable in sleep mode and stop modes register, Address offset: 0x80 */ - uint32_t RESERVED6; /*!< Reserved, Address offset: 0x84 */ - __IO uint32_t CCIPR; /*!< RCC peripherals independent clock configuration register, Address offset: 0x88 */ - uint32_t RESERVED7; /*!< Reserved, Address offset: 0x8C */ - __IO uint32_t BDCR; /*!< RCC backup domain control register, Address offset: 0x90 */ - __IO uint32_t CSR; /*!< RCC clock control & status register, Address offset: 0x94 */ - __IO uint32_t CRRCR; /*!< RCC clock recovery RC register, Address offset: 0x98 */ - __IO uint32_t CCIPR2; /*!< RCC peripherals independent clock configuration register 2, Address offset: 0x9C */ -} RCC_TypeDef; - -/** - * @brief Real-Time Clock - */ - -typedef struct -{ - __IO uint32_t TR; /*!< RTC time register, Address offset: 0x00 */ - __IO uint32_t DR; /*!< RTC date register, Address offset: 0x04 */ - __IO uint32_t CR; /*!< RTC control register, Address offset: 0x08 */ - __IO uint32_t ISR; /*!< RTC initialization and status register, Address offset: 0x0C */ - __IO uint32_t PRER; /*!< RTC prescaler register, Address offset: 0x10 */ - __IO uint32_t WUTR; /*!< RTC wakeup timer register, Address offset: 0x14 */ - uint32_t reserved; /*!< Reserved */ - __IO uint32_t ALRMAR; /*!< RTC alarm A register, Address offset: 0x1C */ - __IO uint32_t ALRMBR; /*!< RTC alarm B register, Address offset: 0x20 */ - __IO uint32_t WPR; /*!< RTC write protection register, Address offset: 0x24 */ - __IO uint32_t SSR; /*!< RTC sub second register, Address offset: 0x28 */ - __IO uint32_t SHIFTR; /*!< RTC shift control register, Address offset: 0x2C */ - __IO uint32_t TSTR; /*!< RTC time stamp time register, Address offset: 0x30 */ - __IO uint32_t TSDR; /*!< RTC time stamp date register, Address offset: 0x34 */ - __IO uint32_t TSSSR; /*!< RTC time-stamp sub second register, Address offset: 0x38 */ - __IO uint32_t CALR; /*!< RTC calibration register, Address offset: 0x3C */ - __IO uint32_t TAMPCR; /*!< RTC tamper configuration register, Address offset: 0x40 */ - __IO uint32_t ALRMASSR; /*!< RTC alarm A sub second register, Address offset: 0x44 */ - __IO uint32_t ALRMBSSR; /*!< RTC alarm B sub second register, Address offset: 0x48 */ - __IO uint32_t OR; /*!< RTC option register, Address offset: 0x4C */ - __IO uint32_t BKP0R; /*!< RTC backup register 0, Address offset: 0x50 */ - __IO uint32_t BKP1R; /*!< RTC backup register 1, Address offset: 0x54 */ - __IO uint32_t BKP2R; /*!< RTC backup register 2, Address offset: 0x58 */ - __IO uint32_t BKP3R; /*!< RTC backup register 3, Address offset: 0x5C */ - __IO uint32_t BKP4R; /*!< RTC backup register 4, Address offset: 0x60 */ - __IO uint32_t BKP5R; /*!< RTC backup register 5, Address offset: 0x64 */ - __IO uint32_t BKP6R; /*!< RTC backup register 6, Address offset: 0x68 */ - __IO uint32_t BKP7R; /*!< RTC backup register 7, Address offset: 0x6C */ - __IO uint32_t BKP8R; /*!< RTC backup register 8, Address offset: 0x70 */ - __IO uint32_t BKP9R; /*!< RTC backup register 9, Address offset: 0x74 */ - __IO uint32_t BKP10R; /*!< RTC backup register 10, Address offset: 0x78 */ - __IO uint32_t BKP11R; /*!< RTC backup register 11, Address offset: 0x7C */ - __IO uint32_t BKP12R; /*!< RTC backup register 12, Address offset: 0x80 */ - __IO uint32_t BKP13R; /*!< RTC backup register 13, Address offset: 0x84 */ - __IO uint32_t BKP14R; /*!< RTC backup register 14, Address offset: 0x88 */ - __IO uint32_t BKP15R; /*!< RTC backup register 15, Address offset: 0x8C */ - __IO uint32_t BKP16R; /*!< RTC backup register 16, Address offset: 0x90 */ - __IO uint32_t BKP17R; /*!< RTC backup register 17, Address offset: 0x94 */ - __IO uint32_t BKP18R; /*!< RTC backup register 18, Address offset: 0x98 */ - __IO uint32_t BKP19R; /*!< RTC backup register 19, Address offset: 0x9C */ - __IO uint32_t BKP20R; /*!< RTC backup register 20, Address offset: 0xA0 */ - __IO uint32_t BKP21R; /*!< RTC backup register 21, Address offset: 0xA4 */ - __IO uint32_t BKP22R; /*!< RTC backup register 22, Address offset: 0xA8 */ - __IO uint32_t BKP23R; /*!< RTC backup register 23, Address offset: 0xAC */ - __IO uint32_t BKP24R; /*!< RTC backup register 24, Address offset: 0xB0 */ - __IO uint32_t BKP25R; /*!< RTC backup register 25, Address offset: 0xB4 */ - __IO uint32_t BKP26R; /*!< RTC backup register 26, Address offset: 0xB8 */ - __IO uint32_t BKP27R; /*!< RTC backup register 27, Address offset: 0xBC */ - __IO uint32_t BKP28R; /*!< RTC backup register 28, Address offset: 0xC0 */ - __IO uint32_t BKP29R; /*!< RTC backup register 29, Address offset: 0xC4 */ - __IO uint32_t BKP30R; /*!< RTC backup register 30, Address offset: 0xC8 */ - __IO uint32_t BKP31R; /*!< RTC backup register 31, Address offset: 0xCC */ -} RTC_TypeDef; - - -/** - * @brief Serial Audio Interface - */ - -typedef struct -{ - __IO uint32_t GCR; /*!< SAI global configuration register, Address offset: 0x00 */ -} SAI_TypeDef; - -typedef struct -{ - __IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x04 */ - __IO uint32_t CR2; /*!< SAI block x configuration register 2, Address offset: 0x08 */ - __IO uint32_t FRCR; /*!< SAI block x frame configuration register, Address offset: 0x0C */ - __IO uint32_t SLOTR; /*!< SAI block x slot register, Address offset: 0x10 */ - __IO uint32_t IMR; /*!< SAI block x interrupt mask register, Address offset: 0x14 */ - __IO uint32_t SR; /*!< SAI block x status register, Address offset: 0x18 */ - __IO uint32_t CLRFR; /*!< SAI block x clear flag register, Address offset: 0x1C */ - __IO uint32_t DR; /*!< SAI block x data register, Address offset: 0x20 */ -} SAI_Block_TypeDef; - - -/** - * @brief Secure digital input/output Interface - */ - -typedef struct -{ - __IO uint32_t POWER; /*!< SDMMC power control register, Address offset: 0x00 */ - __IO uint32_t CLKCR; /*!< SDMMC clock control register, Address offset: 0x04 */ - __IO uint32_t ARG; /*!< SDMMC argument register, Address offset: 0x08 */ - __IO uint32_t CMD; /*!< SDMMC command register, Address offset: 0x0C */ - __I uint32_t RESPCMD; /*!< SDMMC command response register, Address offset: 0x10 */ - __I uint32_t RESP1; /*!< SDMMC response 1 register, Address offset: 0x14 */ - __I uint32_t RESP2; /*!< SDMMC response 2 register, Address offset: 0x18 */ - __I uint32_t RESP3; /*!< SDMMC response 3 register, Address offset: 0x1C */ - __I uint32_t RESP4; /*!< SDMMC response 4 register, Address offset: 0x20 */ - __IO uint32_t DTIMER; /*!< SDMMC data timer register, Address offset: 0x24 */ - __IO uint32_t DLEN; /*!< SDMMC data length register, Address offset: 0x28 */ - __IO uint32_t DCTRL; /*!< SDMMC data control register, Address offset: 0x2C */ - __I uint32_t DCOUNT; /*!< SDMMC data counter register, Address offset: 0x30 */ - __I uint32_t STA; /*!< SDMMC status register, Address offset: 0x34 */ - __IO uint32_t ICR; /*!< SDMMC interrupt clear register, Address offset: 0x38 */ - __IO uint32_t MASK; /*!< SDMMC mask register, Address offset: 0x3C */ - uint32_t RESERVED0[2]; /*!< Reserved, 0x40-0x44 */ - __I uint32_t FIFOCNT; /*!< SDMMC FIFO counter register, Address offset: 0x48 */ - uint32_t RESERVED1[13]; /*!< Reserved, 0x4C-0x7C */ - __IO uint32_t FIFO; /*!< SDMMC data FIFO register, Address offset: 0x80 */ -} SDMMC_TypeDef; - - -/** - * @brief Serial Peripheral Interface - */ - -typedef struct -{ - __IO uint32_t CR1; /*!< SPI Control register 1, Address offset: 0x00 */ - __IO uint32_t CR2; /*!< SPI Control register 2, Address offset: 0x04 */ - __IO uint32_t SR; /*!< SPI Status register, Address offset: 0x08 */ - __IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */ - __IO uint32_t CRCPR; /*!< SPI CRC polynomial register, Address offset: 0x10 */ - __IO uint32_t RXCRCR; /*!< SPI Rx CRC register, Address offset: 0x14 */ - __IO uint32_t TXCRCR; /*!< SPI Tx CRC register, Address offset: 0x18 */ -} SPI_TypeDef; - - -/** - * @brief Single Wire Protocol Master Interface SPWMI - */ - -typedef struct -{ - __IO uint32_t CR; /*!< SWPMI Configuration/Control register, Address offset: 0x00 */ - __IO uint32_t BRR; /*!< SWPMI bitrate register, Address offset: 0x04 */ - uint32_t RESERVED1; /*!< Reserved, 0x08 */ - __IO uint32_t ISR; /*!< SWPMI Interrupt and Status register, Address offset: 0x0C */ - __IO uint32_t ICR; /*!< SWPMI Interrupt Flag Clear register, Address offset: 0x10 */ - __IO uint32_t IER; /*!< SWPMI Interrupt Enable register, Address offset: 0x14 */ - __IO uint32_t RFL; /*!< SWPMI Receive Frame Length register, Address offset: 0x18 */ - __IO uint32_t TDR; /*!< SWPMI Transmit data register, Address offset: 0x1C */ - __IO uint32_t RDR; /*!< SWPMI Receive data register, Address offset: 0x20 */ - __IO uint32_t OR; /*!< SWPMI Option register, Address offset: 0x24 */ -} SWPMI_TypeDef; - - -/** - * @brief System configuration controller - */ - -typedef struct -{ - __IO uint32_t MEMRMP; /*!< SYSCFG memory remap register, Address offset: 0x00 */ - __IO uint32_t CFGR1; /*!< SYSCFG configuration register 1, Address offset: 0x04 */ - __IO uint32_t EXTICR[4]; /*!< SYSCFG external interrupt configuration registers, Address offset: 0x08-0x14 */ - __IO uint32_t SCSR; /*!< SYSCFG SRAM2 control and status register, Address offset: 0x18 */ - __IO uint32_t CFGR2; /*!< SYSCFG configuration register 2, Address offset: 0x1C */ - __IO uint32_t SWPR; /*!< SYSCFG SRAM2 write protection register, Address offset: 0x20 */ - __IO uint32_t SKR; /*!< SYSCFG SRAM2 key register, Address offset: 0x24 */ - __IO uint32_t SWPR2; /*!< SYSCFG SRAM2 write protection register 2, Address offset: 0x28 */ -} SYSCFG_TypeDef; - - -/** - * @brief TIM - */ - -typedef struct -{ - __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ - __IO uint32_t CR2; /*!< TIM control register 2, Address offset: 0x04 */ - __IO uint32_t SMCR; /*!< TIM slave mode control register, Address offset: 0x08 */ - __IO uint32_t DIER; /*!< TIM DMA/interrupt enable register, Address offset: 0x0C */ - __IO uint32_t SR; /*!< TIM status register, Address offset: 0x10 */ - __IO uint32_t EGR; /*!< TIM event generation register, Address offset: 0x14 */ - __IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ - __IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */ - __IO uint32_t CCER; /*!< TIM capture/compare enable register, Address offset: 0x20 */ - __IO uint32_t CNT; /*!< TIM counter register, Address offset: 0x24 */ - __IO uint32_t PSC; /*!< TIM prescaler, Address offset: 0x28 */ - __IO uint32_t ARR; /*!< TIM auto-reload register, Address offset: 0x2C */ - __IO uint32_t RCR; /*!< TIM repetition counter register, Address offset: 0x30 */ - __IO uint32_t CCR1; /*!< TIM capture/compare register 1, Address offset: 0x34 */ - __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */ - __IO uint32_t CCR3; /*!< TIM capture/compare register 3, Address offset: 0x3C */ - __IO uint32_t CCR4; /*!< TIM capture/compare register 4, Address offset: 0x40 */ - __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ - __IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */ - __IO uint32_t DMAR; /*!< TIM DMA address for full transfer, Address offset: 0x4C */ - __IO uint32_t OR1; /*!< TIM option register 1, Address offset: 0x50 */ - __IO uint32_t CCMR3; /*!< TIM capture/compare mode register 3, Address offset: 0x54 */ - __IO uint32_t CCR5; /*!< TIM capture/compare register5, Address offset: 0x58 */ - __IO uint32_t CCR6; /*!< TIM capture/compare register6, Address offset: 0x5C */ - __IO uint32_t OR2; /*!< TIM option register 2, Address offset: 0x60 */ - __IO uint32_t OR3; /*!< TIM option register 3, Address offset: 0x64 */ -} TIM_TypeDef; - - -/** - * @brief Touch Sensing Controller (TSC) - */ - -typedef struct -{ - __IO uint32_t CR; /*!< TSC control register, Address offset: 0x00 */ - __IO uint32_t IER; /*!< TSC interrupt enable register, Address offset: 0x04 */ - __IO uint32_t ICR; /*!< TSC interrupt clear register, Address offset: 0x08 */ - __IO uint32_t ISR; /*!< TSC interrupt status register, Address offset: 0x0C */ - __IO uint32_t IOHCR; /*!< TSC I/O hysteresis control register, Address offset: 0x10 */ - uint32_t RESERVED1; /*!< Reserved, Address offset: 0x14 */ - __IO uint32_t IOASCR; /*!< TSC I/O analog switch control register, Address offset: 0x18 */ - uint32_t RESERVED2; /*!< Reserved, Address offset: 0x1C */ - __IO uint32_t IOSCR; /*!< TSC I/O sampling control register, Address offset: 0x20 */ - uint32_t RESERVED3; /*!< Reserved, Address offset: 0x24 */ - __IO uint32_t IOCCR; /*!< TSC I/O channel control register, Address offset: 0x28 */ - uint32_t RESERVED4; /*!< Reserved, Address offset: 0x2C */ - __IO uint32_t IOGCSR; /*!< TSC I/O group control status register, Address offset: 0x30 */ - __IO uint32_t IOGXCR[8]; /*!< TSC I/O group x counter register, Address offset: 0x34-50 */ -} TSC_TypeDef; - -/** - * @brief Universal Synchronous Asynchronous Receiver Transmitter - */ - -typedef struct -{ - __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ - __IO uint32_t CR2; /*!< USART Control register 2, Address offset: 0x04 */ - __IO uint32_t CR3; /*!< USART Control register 3, Address offset: 0x08 */ - __IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x0C */ - __IO uint16_t GTPR; /*!< USART Guard time and prescaler register, Address offset: 0x10 */ - uint16_t RESERVED2; /*!< Reserved, 0x12 */ - __IO uint32_t RTOR; /*!< USART Receiver Time Out register, Address offset: 0x14 */ - __IO uint16_t RQR; /*!< USART Request register, Address offset: 0x18 */ - uint16_t RESERVED3; /*!< Reserved, 0x1A */ - __IO uint32_t ISR; /*!< USART Interrupt and status register, Address offset: 0x1C */ - __IO uint32_t ICR; /*!< USART Interrupt flag Clear register, Address offset: 0x20 */ - __IO uint16_t RDR; /*!< USART Receive Data register, Address offset: 0x24 */ - uint16_t RESERVED4; /*!< Reserved, 0x26 */ - __IO uint16_t TDR; /*!< USART Transmit Data register, Address offset: 0x28 */ - uint16_t RESERVED5; /*!< Reserved, 0x2A */ -} USART_TypeDef; - -/** - * @brief VREFBUF - */ - -typedef struct -{ - __IO uint32_t CSR; /*!< VREFBUF control and status register, Address offset: 0x00 */ - __IO uint32_t CCR; /*!< VREFBUF calibration and control register, Address offset: 0x04 */ -} VREFBUF_TypeDef; - -/** - * @brief Window WATCHDOG - */ - -typedef struct -{ - __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ - __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ - __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ -} WWDG_TypeDef; - -/** - * @brief AES hardware accelerator - */ - -typedef struct -{ - __IO uint32_t CR; /*!< AES control register, Address offset: 0x00 */ - __IO uint32_t SR; /*!< AES status register, Address offset: 0x04 */ - __IO uint32_t DINR; /*!< AES data input register, Address offset: 0x08 */ - __IO uint32_t DOUTR; /*!< AES data output register, Address offset: 0x0C */ - __IO uint32_t KEYR0; /*!< AES key register 0, Address offset: 0x10 */ - __IO uint32_t KEYR1; /*!< AES key register 1, Address offset: 0x14 */ - __IO uint32_t KEYR2; /*!< AES key register 2, Address offset: 0x18 */ - __IO uint32_t KEYR3; /*!< AES key register 3, Address offset: 0x1C */ - __IO uint32_t IVR0; /*!< AES initialization vector register 0, Address offset: 0x20 */ - __IO uint32_t IVR1; /*!< AES initialization vector register 1, Address offset: 0x24 */ - __IO uint32_t IVR2; /*!< AES initialization vector register 2, Address offset: 0x28 */ - __IO uint32_t IVR3; /*!< AES initialization vector register 3, Address offset: 0x2C */ - __IO uint32_t KEYR4; /*!< AES key register 4, Address offset: 0x30 */ - __IO uint32_t KEYR5; /*!< AES key register 5, Address offset: 0x34 */ - __IO uint32_t KEYR6; /*!< AES key register 6, Address offset: 0x38 */ - __IO uint32_t KEYR7; /*!< AES key register 7, Address offset: 0x3C */ - __IO uint32_t SUSP0R; /*!< AES Suspend register 0, Address offset: 0x40 */ - __IO uint32_t SUSP1R; /*!< AES Suspend register 1, Address offset: 0x44 */ - __IO uint32_t SUSP2R; /*!< AES Suspend register 2, Address offset: 0x48 */ - __IO uint32_t SUSP3R; /*!< AES Suspend register 3, Address offset: 0x4C */ - __IO uint32_t SUSP4R; /*!< AES Suspend register 4, Address offset: 0x50 */ - __IO uint32_t SUSP5R; /*!< AES Suspend register 5, Address offset: 0x54 */ - __IO uint32_t SUSP6R; /*!< AES Suspend register 6, Address offset: 0x58 */ - __IO uint32_t SUSP7R; /*!< AES Suspend register 7, Address offset: 0x6C */ -} AES_TypeDef; - -/** - * @brief HASH - */ - -typedef struct -{ - __IO uint32_t CR; /*!< HASH control register, Address offset: 0x00 */ - __IO uint32_t DIN; /*!< HASH data input register, Address offset: 0x04 */ - __IO uint32_t STR; /*!< HASH start register, Address offset: 0x08 */ - __IO uint32_t HR[5]; /*!< HASH digest registers, Address offset: 0x0C-0x1C */ - __IO uint32_t IMR; /*!< HASH interrupt enable register, Address offset: 0x20 */ - __IO uint32_t SR; /*!< HASH status register, Address offset: 0x24 */ - uint32_t RESERVED[52]; /*!< Reserved, 0x28-0xF4 */ - __IO uint32_t CSR[54]; /*!< HASH context swap registers, Address offset: 0x0F8-0x1CC */ -} HASH_TypeDef; - -/** - * @brief HASH_DIGEST - */ - -typedef struct -{ - __IO uint32_t HR[8]; /*!< HASH digest registers, Address offset: 0x310-0x32C */ -} HASH_DIGEST_TypeDef; - -/** - * @brief RNG - */ - -typedef struct -{ - __IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */ - __IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */ - __IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */ -} RNG_TypeDef; - -/** - * @brief USB_OTG_Core_register - */ -typedef struct -{ - __IO uint32_t GOTGCTL; /*!< USB_OTG Control and Status Register 000h*/ - __IO uint32_t GOTGINT; /*!< USB_OTG Interrupt Register 004h*/ - __IO uint32_t GAHBCFG; /*!< Core AHB Configuration Register 008h*/ - __IO uint32_t GUSBCFG; /*!< Core USB Configuration Register 00Ch*/ - __IO uint32_t GRSTCTL; /*!< Core Reset Register 010h*/ - __IO uint32_t GINTSTS; /*!< Core Interrupt Register 014h*/ - __IO uint32_t GINTMSK; /*!< Core Interrupt Mask Register 018h*/ - __IO uint32_t GRXSTSR; /*!< Receive Sts Q Read Register 01Ch*/ - __IO uint32_t GRXSTSP; /*!< Receive Sts Q Read & POP Register 020h*/ - __IO uint32_t GRXFSIZ; /* Receive FIFO Size Register 024h*/ - __IO uint32_t DIEPTXF0_HNPTXFSIZ; /*!< EP0 / Non Periodic Tx FIFO Size Register 028h*/ - __IO uint32_t HNPTXSTS; /*!< Non Periodic Tx FIFO/Queue Sts reg 02Ch*/ - uint32_t Reserved30[2]; /* Reserved 030h*/ - __IO uint32_t GCCFG; /* General Purpose IO Register 038h*/ - __IO uint32_t CID; /* User ID Register 03Ch*/ - __IO uint32_t GSNPSID; /* USB_OTG core ID 040h*/ - __IO uint32_t GHWCFG1; /* User HW config1 044h*/ - __IO uint32_t GHWCFG2; /* User HW config2 048h*/ - __IO uint32_t GHWCFG3; /* User HW config3 04Ch*/ - uint32_t Reserved6; /* Reserved 050h*/ - __IO uint32_t GLPMCFG; /* LPM Register 054h*/ - __IO uint32_t GPWRDN; /* Power Down Register 058h*/ - __IO uint32_t GDFIFOCFG; /* DFIFO Software Config Register 05Ch*/ - __IO uint32_t GADPCTL; /* ADP Timer, Control and Status Register 60Ch*/ - uint32_t Reserved43[39]; /* Reserved 058h-0FFh*/ - __IO uint32_t HPTXFSIZ; /* Host Periodic Tx FIFO Size Reg 100h*/ - __IO uint32_t DIEPTXF[0x0F]; /* dev Periodic Transmit FIFO */ -} USB_OTG_GlobalTypeDef; - -/** - * @brief USB_OTG_device_Registers - */ -typedef struct -{ - __IO uint32_t DCFG; /* dev Configuration Register 800h*/ - __IO uint32_t DCTL; /* dev Control Register 804h*/ - __IO uint32_t DSTS; /* dev Status Register (RO) 808h*/ - uint32_t Reserved0C; /* Reserved 80Ch*/ - __IO uint32_t DIEPMSK; /* dev IN Endpoint Mask 810h*/ - __IO uint32_t DOEPMSK; /* dev OUT Endpoint Mask 814h*/ - __IO uint32_t DAINT; /* dev All Endpoints Itr Reg 818h*/ - __IO uint32_t DAINTMSK; /* dev All Endpoints Itr Mask 81Ch*/ - uint32_t Reserved20; /* Reserved 820h*/ - uint32_t Reserved9; /* Reserved 824h*/ - __IO uint32_t DVBUSDIS; /* dev VBUS discharge Register 828h*/ - __IO uint32_t DVBUSPULSE; /* dev VBUS Pulse Register 82Ch*/ - __IO uint32_t DTHRCTL; /* dev thr 830h*/ - __IO uint32_t DIEPEMPMSK; /* dev empty msk 834h*/ - __IO uint32_t DEACHINT; /* dedicated EP interrupt 838h*/ - __IO uint32_t DEACHMSK; /* dedicated EP msk 83Ch*/ - uint32_t Reserved40; /* dedicated EP mask 840h*/ - __IO uint32_t DINEP1MSK; /* dedicated EP mask 844h*/ - uint32_t Reserved44[15]; /* Reserved 844-87Ch*/ - __IO uint32_t DOUTEP1MSK; /* dedicated EP msk 884h*/ -} USB_OTG_DeviceTypeDef; - -/** - * @brief USB_OTG_IN_Endpoint-Specific_Register - */ -typedef struct -{ - __IO uint32_t DIEPCTL; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/ - uint32_t Reserved04; /* Reserved 900h + (ep_num * 20h) + 04h*/ - __IO uint32_t DIEPINT; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/ - uint32_t Reserved0C; /* Reserved 900h + (ep_num * 20h) + 0Ch*/ - __IO uint32_t DIEPTSIZ; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/ - __IO uint32_t DIEPDMA; /* IN Endpoint DMA Address Reg 900h + (ep_num * 20h) + 14h*/ - __IO uint32_t DTXFSTS; /*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/ - uint32_t Reserved18; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/ -} USB_OTG_INEndpointTypeDef; - -/** - * @brief USB_OTG_OUT_Endpoint-Specific_Registers - */ -typedef struct -{ - __IO uint32_t DOEPCTL; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/ - uint32_t Reserved04; /* Reserved B00h + (ep_num * 20h) + 04h*/ - __IO uint32_t DOEPINT; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/ - uint32_t Reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/ - __IO uint32_t DOEPTSIZ; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/ - __IO uint32_t DOEPDMA; /* dev OUT Endpoint DMA Address B00h + (ep_num * 20h) + 14h*/ - uint32_t Reserved18[2]; /* Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/ -} USB_OTG_OUTEndpointTypeDef; - -/** - * @brief USB_OTG_Host_Mode_Register_Structures - */ -typedef struct -{ - __IO uint32_t HCFG; /* Host Configuration Register 400h*/ - __IO uint32_t HFIR; /* Host Frame Interval Register 404h*/ - __IO uint32_t HFNUM; /* Host Frame Nbr/Frame Remaining 408h*/ - uint32_t Reserved40C; /* Reserved 40Ch*/ - __IO uint32_t HPTXSTS; /* Host Periodic Tx FIFO/ Queue Status 410h*/ - __IO uint32_t HAINT; /* Host All Channels Interrupt Register 414h*/ - __IO uint32_t HAINTMSK; /* Host All Channels Interrupt Mask 418h*/ -} USB_OTG_HostTypeDef; - -/** - * @brief USB_OTG_Host_Channel_Specific_Registers - */ -typedef struct -{ - __IO uint32_t HCCHAR; - __IO uint32_t HCSPLT; - __IO uint32_t HCINT; - __IO uint32_t HCINTMSK; - __IO uint32_t HCTSIZ; - __IO uint32_t HCDMA; - uint32_t Reserved[2]; -} USB_OTG_HostChannelTypeDef; - -/** - * @} - */ - -/** @addtogroup Peripheral_memory_map - * @{ - */ -#define FLASH_BASE ((uint32_t)0x08000000U) /*!< FLASH(up to 1 MB) base address */ -#define SRAM1_BASE ((uint32_t)0x20000000U) /*!< SRAM1(up to 256 KB) base address */ -#define SRAM2_BASE ((uint32_t)0x10000000U) /*!< SRAM2(64 KB) base address */ -#define PERIPH_BASE ((uint32_t)0x40000000U) /*!< Peripheral base address */ -#define FMC_BASE ((uint32_t)0x60000000U) /*!< FMC base address */ -#define QSPI_BASE ((uint32_t)0x90000000U) /*!< QUADSPI memories accessible over AHB base address */ - -#define FMC_R_BASE ((uint32_t)0xA0000000U) /*!< FMC control registers base address */ -#define QSPI_R_BASE ((uint32_t)0xA0001000U) /*!< QUADSPI control registers base address */ -#define SRAM1_BB_BASE ((uint32_t)0x22000000U) /*!< SRAM1(96 KB) base address in the bit-band region */ -#define PERIPH_BB_BASE ((uint32_t)0x42000000U) /*!< Peripheral base address in the bit-band region */ - -/* Legacy defines */ -#define SRAM_BASE SRAM1_BASE -#define SRAM_BB_BASE SRAM1_BB_BASE - -#define SRAM1_SIZE_MAX ((uint32_t)0x00040000U) /*!< maximum SRAM1 size (up to 256 KBytes) */ -#define SRAM2_SIZE ((uint32_t)0x00010000U) /*!< SRAM2 size (64 KBytes) */ - -/*!< Peripheral memory map */ -#define APB1PERIPH_BASE PERIPH_BASE -#define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000U) -#define AHB1PERIPH_BASE (PERIPH_BASE + 0x00020000U) -#define AHB2PERIPH_BASE (PERIPH_BASE + 0x08000000U) - -#define FMC_BANK1 FMC_BASE -#define FMC_BANK1_1 FMC_BANK1 -#define FMC_BANK1_2 (FMC_BANK1 + 0x04000000U) -#define FMC_BANK1_3 (FMC_BANK1 + 0x08000000U) -#define FMC_BANK1_4 (FMC_BANK1 + 0x0C000000U) -#define FMC_BANK3 (FMC_BASE + 0x20000000U) - -/*!< APB1 peripherals */ -#define TIM2_BASE (APB1PERIPH_BASE + 0x0000U) -#define TIM3_BASE (APB1PERIPH_BASE + 0x0400U) -#define TIM4_BASE (APB1PERIPH_BASE + 0x0800U) -#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00U) -#define TIM6_BASE (APB1PERIPH_BASE + 0x1000U) -#define TIM7_BASE (APB1PERIPH_BASE + 0x1400U) -#define LCD_BASE (APB1PERIPH_BASE + 0x2400U) -#define RTC_BASE (APB1PERIPH_BASE + 0x2800U) -#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00U) -#define IWDG_BASE (APB1PERIPH_BASE + 0x3000U) -#define SPI2_BASE (APB1PERIPH_BASE + 0x3800U) -#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00U) -#define USART2_BASE (APB1PERIPH_BASE + 0x4400U) -#define USART3_BASE (APB1PERIPH_BASE + 0x4800U) -#define UART4_BASE (APB1PERIPH_BASE + 0x4C00U) -#define UART5_BASE (APB1PERIPH_BASE + 0x5000U) -#define I2C1_BASE (APB1PERIPH_BASE + 0x5400U) -#define I2C2_BASE (APB1PERIPH_BASE + 0x5800U) -#define I2C3_BASE (APB1PERIPH_BASE + 0x5C00U) -#define CRS_BASE (APB1PERIPH_BASE + 0x6000U) -#define CAN1_BASE (APB1PERIPH_BASE + 0x6400U) -#define CAN2_BASE (APB1PERIPH_BASE + 0x6800U) -#define I2C4_BASE (APB1PERIPH_BASE + 0x8400U) -#define PWR_BASE (APB1PERIPH_BASE + 0x7000U) -#define DAC_BASE (APB1PERIPH_BASE + 0x7400U) -#define DAC1_BASE (APB1PERIPH_BASE + 0x7400U) -#define OPAMP_BASE (APB1PERIPH_BASE + 0x7800U) -#define OPAMP1_BASE (APB1PERIPH_BASE + 0x7800U) -#define OPAMP2_BASE (APB1PERIPH_BASE + 0x7810U) -#define LPTIM1_BASE (APB1PERIPH_BASE + 0x7C00U) -#define LPUART1_BASE (APB1PERIPH_BASE + 0x8000U) -#define SWPMI1_BASE (APB1PERIPH_BASE + 0x8800U) -#define LPTIM2_BASE (APB1PERIPH_BASE + 0x9400U) - - -/*!< APB2 peripherals */ -#define SYSCFG_BASE (APB2PERIPH_BASE + 0x0000U) -#define VREFBUF_BASE (APB2PERIPH_BASE + 0x0030U) -#define COMP1_BASE (APB2PERIPH_BASE + 0x0200U) -#define COMP2_BASE (APB2PERIPH_BASE + 0x0204U) -#define EXTI_BASE (APB2PERIPH_BASE + 0x0400U) -#define FIREWALL_BASE (APB2PERIPH_BASE + 0x1C00U) -#define SDMMC1_BASE (APB2PERIPH_BASE + 0x2800U) -#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00U) -#define SPI1_BASE (APB2PERIPH_BASE + 0x3000U) -#define TIM8_BASE (APB2PERIPH_BASE + 0x3400U) -#define USART1_BASE (APB2PERIPH_BASE + 0x3800U) -#define TIM15_BASE (APB2PERIPH_BASE + 0x4000U) -#define TIM16_BASE (APB2PERIPH_BASE + 0x4400U) -#define TIM17_BASE (APB2PERIPH_BASE + 0x4800U) -#define SAI1_BASE (APB2PERIPH_BASE + 0x5400U) -#define SAI1_Block_A_BASE (SAI1_BASE + 0x004) -#define SAI1_Block_B_BASE (SAI1_BASE + 0x024) -#define SAI2_BASE (APB2PERIPH_BASE + 0x5800U) -#define SAI2_Block_A_BASE (SAI2_BASE + 0x004) -#define SAI2_Block_B_BASE (SAI2_BASE + 0x024) -#define DFSDM1_BASE (APB2PERIPH_BASE + 0x6000U) -#define DFSDM1_Channel0_BASE (DFSDM1_BASE + 0x00) -#define DFSDM1_Channel1_BASE (DFSDM1_BASE + 0x20) -#define DFSDM1_Channel2_BASE (DFSDM1_BASE + 0x40) -#define DFSDM1_Channel3_BASE (DFSDM1_BASE + 0x60) -#define DFSDM1_Channel4_BASE (DFSDM1_BASE + 0x80) -#define DFSDM1_Channel5_BASE (DFSDM1_BASE + 0xA0) -#define DFSDM1_Channel6_BASE (DFSDM1_BASE + 0xC0) -#define DFSDM1_Channel7_BASE (DFSDM1_BASE + 0xE0) -#define DFSDM1_Filter0_BASE (DFSDM1_BASE + 0x100) -#define DFSDM1_Filter1_BASE (DFSDM1_BASE + 0x180) -#define DFSDM1_Filter2_BASE (DFSDM1_BASE + 0x200) -#define DFSDM1_Filter3_BASE (DFSDM1_BASE + 0x280) - -/*!< AHB1 peripherals */ -#define DMA1_BASE (AHB1PERIPH_BASE) -#define DMA2_BASE (AHB1PERIPH_BASE + 0x0400U) -#define RCC_BASE (AHB1PERIPH_BASE + 0x1000U) -#define FLASH_R_BASE (AHB1PERIPH_BASE + 0x2000U) -#define CRC_BASE (AHB1PERIPH_BASE + 0x3000U) -#define TSC_BASE (AHB1PERIPH_BASE + 0x4000U) -#define DMA2D_BASE (AHB1PERIPH_BASE + 0xB000U) - - -#define DMA1_Channel1_BASE (DMA1_BASE + 0x0008U) -#define DMA1_Channel2_BASE (DMA1_BASE + 0x001CU) -#define DMA1_Channel3_BASE (DMA1_BASE + 0x0030U) -#define DMA1_Channel4_BASE (DMA1_BASE + 0x0044U) -#define DMA1_Channel5_BASE (DMA1_BASE + 0x0058U) -#define DMA1_Channel6_BASE (DMA1_BASE + 0x006CU) -#define DMA1_Channel7_BASE (DMA1_BASE + 0x0080U) -#define DMA1_CSELR_BASE (DMA1_BASE + 0x00A8U) - - -#define DMA2_Channel1_BASE (DMA2_BASE + 0x0008U) -#define DMA2_Channel2_BASE (DMA2_BASE + 0x001CU) -#define DMA2_Channel3_BASE (DMA2_BASE + 0x0030U) -#define DMA2_Channel4_BASE (DMA2_BASE + 0x0044U) -#define DMA2_Channel5_BASE (DMA2_BASE + 0x0058U) -#define DMA2_Channel6_BASE (DMA2_BASE + 0x006CU) -#define DMA2_Channel7_BASE (DMA2_BASE + 0x0080U) -#define DMA2_CSELR_BASE (DMA2_BASE + 0x00A8U) - - -/*!< AHB2 peripherals */ -#define GPIOA_BASE (AHB2PERIPH_BASE + 0x0000U) -#define GPIOB_BASE (AHB2PERIPH_BASE + 0x0400U) -#define GPIOC_BASE (AHB2PERIPH_BASE + 0x0800U) -#define GPIOD_BASE (AHB2PERIPH_BASE + 0x0C00U) -#define GPIOE_BASE (AHB2PERIPH_BASE + 0x1000U) -#define GPIOF_BASE (AHB2PERIPH_BASE + 0x1400U) -#define GPIOG_BASE (AHB2PERIPH_BASE + 0x1800U) -#define GPIOH_BASE (AHB2PERIPH_BASE + 0x1C00U) -#define GPIOI_BASE (AHB2PERIPH_BASE + 0x2000U) - -#define USBOTG_BASE (AHB2PERIPH_BASE + 0x08000000U) - -#define ADC1_BASE (AHB2PERIPH_BASE + 0x08040000U) -#define ADC2_BASE (AHB2PERIPH_BASE + 0x08040100U) -#define ADC3_BASE (AHB2PERIPH_BASE + 0x08040200U) -#define ADC123_COMMON_BASE (AHB2PERIPH_BASE + 0x08040300U) - -#define DCMI_BASE (AHB2PERIPH_BASE + 0x08050000U) - -#define AES_BASE (AHB2PERIPH_BASE + 0x08060000U) -#define HASH_BASE (AHB2PERIPH_BASE + 0x08060400U) -#define HASH_DIGEST_BASE (AHB2PERIPH_BASE + 0x08060710U) -#define RNG_BASE (AHB2PERIPH_BASE + 0x08060800U) - - -/*!< FMC Banks registers base address */ -#define FMC_Bank1_R_BASE (FMC_R_BASE + 0x0000U) -#define FMC_Bank1E_R_BASE (FMC_R_BASE + 0x0104U) -#define FMC_Bank3_R_BASE (FMC_R_BASE + 0x0080U) - -/* Debug MCU registers base address */ -#define DBGMCU_BASE ((uint32_t)0xE0042000U) - -/*!< USB registers base address */ -#define USB_OTG_FS_PERIPH_BASE ((uint32_t)0x50000000U) - -#define USB_OTG_GLOBAL_BASE ((uint32_t)0x00000000U) -#define USB_OTG_DEVICE_BASE ((uint32_t)0x00000800U) -#define USB_OTG_IN_ENDPOINT_BASE ((uint32_t)0x00000900U) -#define USB_OTG_OUT_ENDPOINT_BASE ((uint32_t)0x00000B00U) -#define USB_OTG_EP_REG_SIZE ((uint32_t)0x00000020U) -#define USB_OTG_HOST_BASE ((uint32_t)0x00000400U) -#define USB_OTG_HOST_PORT_BASE ((uint32_t)0x00000440U) -#define USB_OTG_HOST_CHANNEL_BASE ((uint32_t)0x00000500U) -#define USB_OTG_HOST_CHANNEL_SIZE ((uint32_t)0x00000020U) -#define USB_OTG_PCGCCTL_BASE ((uint32_t)0x00000E00U) -#define USB_OTG_FIFO_BASE ((uint32_t)0x00001000U) -#define USB_OTG_FIFO_SIZE ((uint32_t)0x00001000U) - - -#define PACKAGE_BASE ((uint32_t)0x1FFF7500U) /*!< Package data register base address */ -#define UID_BASE ((uint32_t)0x1FFF7590U) /*!< Unique device ID register base address */ -#define FLASHSIZE_BASE ((uint32_t)0x1FFF75E0U) /*!< Flash size data register base address */ -/** - * @} - */ - -/** @addtogroup Peripheral_declaration - * @{ - */ -#define TIM2 ((TIM_TypeDef *) TIM2_BASE) -#define TIM3 ((TIM_TypeDef *) TIM3_BASE) -#define TIM4 ((TIM_TypeDef *) TIM4_BASE) -#define TIM5 ((TIM_TypeDef *) TIM5_BASE) -#define TIM6 ((TIM_TypeDef *) TIM6_BASE) -#define TIM7 ((TIM_TypeDef *) TIM7_BASE) -#define LCD ((LCD_TypeDef *) LCD_BASE) -#define RTC ((RTC_TypeDef *) RTC_BASE) -#define WWDG ((WWDG_TypeDef *) WWDG_BASE) -#define IWDG ((IWDG_TypeDef *) IWDG_BASE) -#define SPI2 ((SPI_TypeDef *) SPI2_BASE) -#define SPI3 ((SPI_TypeDef *) SPI3_BASE) -#define USART2 ((USART_TypeDef *) USART2_BASE) -#define USART3 ((USART_TypeDef *) USART3_BASE) -#define UART4 ((USART_TypeDef *) UART4_BASE) -#define UART5 ((USART_TypeDef *) UART5_BASE) -#define I2C1 ((I2C_TypeDef *) I2C1_BASE) -#define I2C2 ((I2C_TypeDef *) I2C2_BASE) -#define I2C3 ((I2C_TypeDef *) I2C3_BASE) -#define CRS ((CRS_TypeDef *) CRS_BASE) -#define CAN ((CAN_TypeDef *) CAN1_BASE) -#define CAN1 ((CAN_TypeDef *) CAN1_BASE) -#define CAN2 ((CAN_TypeDef *) CAN2_BASE) -#define I2C4 ((I2C_TypeDef *) I2C4_BASE) -#define PWR ((PWR_TypeDef *) PWR_BASE) -#define DAC ((DAC_TypeDef *) DAC1_BASE) -#define DAC1 ((DAC_TypeDef *) DAC1_BASE) -#define OPAMP ((OPAMP_TypeDef *) OPAMP_BASE) -#define OPAMP1 ((OPAMP_TypeDef *) OPAMP1_BASE) -#define OPAMP2 ((OPAMP_TypeDef *) OPAMP2_BASE) -#define OPAMP12_COMMON ((OPAMP_Common_TypeDef *) OPAMP1_BASE) -#define LPTIM1 ((LPTIM_TypeDef *) LPTIM1_BASE) -#define LPUART1 ((USART_TypeDef *) LPUART1_BASE) -#define SWPMI1 ((SWPMI_TypeDef *) SWPMI1_BASE) -#define LPTIM2 ((LPTIM_TypeDef *) LPTIM2_BASE) - -#define SYSCFG ((SYSCFG_TypeDef *) SYSCFG_BASE) -#define VREFBUF ((VREFBUF_TypeDef *) VREFBUF_BASE) -#define COMP1 ((COMP_TypeDef *) COMP1_BASE) -#define COMP2 ((COMP_TypeDef *) COMP2_BASE) -#define COMP12_COMMON ((COMP_Common_TypeDef *) COMP2_BASE) -#define EXTI ((EXTI_TypeDef *) EXTI_BASE) -#define FIREWALL ((FIREWALL_TypeDef *) FIREWALL_BASE) -#define SDMMC1 ((SDMMC_TypeDef *) SDMMC1_BASE) -#define TIM1 ((TIM_TypeDef *) TIM1_BASE) -#define SPI1 ((SPI_TypeDef *) SPI1_BASE) -#define TIM8 ((TIM_TypeDef *) TIM8_BASE) -#define USART1 ((USART_TypeDef *) USART1_BASE) -#define TIM15 ((TIM_TypeDef *) TIM15_BASE) -#define TIM16 ((TIM_TypeDef *) TIM16_BASE) -#define TIM17 ((TIM_TypeDef *) TIM17_BASE) -#define SAI1 ((SAI_TypeDef *) SAI1_BASE) -#define SAI1_Block_A ((SAI_Block_TypeDef *)SAI1_Block_A_BASE) -#define SAI1_Block_B ((SAI_Block_TypeDef *)SAI1_Block_B_BASE) -#define SAI2 ((SAI_TypeDef *) SAI2_BASE) -#define SAI2_Block_A ((SAI_Block_TypeDef *)SAI2_Block_A_BASE) -#define SAI2_Block_B ((SAI_Block_TypeDef *)SAI2_Block_B_BASE) -#define DFSDM1_Channel0 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel0_BASE) -#define DFSDM1_Channel1 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel1_BASE) -#define DFSDM1_Channel2 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel2_BASE) -#define DFSDM1_Channel3 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel3_BASE) -#define DFSDM1_Channel4 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel4_BASE) -#define DFSDM1_Channel5 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel5_BASE) -#define DFSDM1_Channel6 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel6_BASE) -#define DFSDM1_Channel7 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel7_BASE) -#define DFSDM1_Filter0 ((DFSDM_Filter_TypeDef *) DFSDM1_Filter0_BASE) -#define DFSDM1_Filter1 ((DFSDM_Filter_TypeDef *) DFSDM1_Filter1_BASE) -#define DFSDM1_Filter2 ((DFSDM_Filter_TypeDef *) DFSDM1_Filter2_BASE) -#define DFSDM1_Filter3 ((DFSDM_Filter_TypeDef *) DFSDM1_Filter3_BASE) -/* Aliases to keep compatibility after DFSDM renaming */ -#define DFSDM_Channel0 DFSDM1_Channel0 -#define DFSDM_Channel1 DFSDM1_Channel1 -#define DFSDM_Channel2 DFSDM1_Channel2 -#define DFSDM_Channel3 DFSDM1_Channel3 -#define DFSDM_Channel4 DFSDM1_Channel4 -#define DFSDM_Channel5 DFSDM1_Channel5 -#define DFSDM_Channel6 DFSDM1_Channel6 -#define DFSDM_Channel7 DFSDM1_Channel7 -#define DFSDM_Filter0 DFSDM1_Filter0 -#define DFSDM_Filter1 DFSDM1_Filter1 -#define DFSDM_Filter2 DFSDM1_Filter2 -#define DFSDM_Filter3 DFSDM1_Filter3 -#define DMA1 ((DMA_TypeDef *) DMA1_BASE) -#define DMA2 ((DMA_TypeDef *) DMA2_BASE) -#define RCC ((RCC_TypeDef *) RCC_BASE) -#define FLASH ((FLASH_TypeDef *) FLASH_R_BASE) -#define CRC ((CRC_TypeDef *) CRC_BASE) -#define TSC ((TSC_TypeDef *) TSC_BASE) - -#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) -#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) -#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) -#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) -#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) -#define GPIOF ((GPIO_TypeDef *) GPIOF_BASE) -#define GPIOG ((GPIO_TypeDef *) GPIOG_BASE) -#define GPIOH ((GPIO_TypeDef *) GPIOH_BASE) -#define GPIOI ((GPIO_TypeDef *) GPIOI_BASE) -#define ADC1 ((ADC_TypeDef *) ADC1_BASE) -#define ADC2 ((ADC_TypeDef *) ADC2_BASE) -#define ADC3 ((ADC_TypeDef *) ADC3_BASE) -#define ADC123_COMMON ((ADC_Common_TypeDef *) ADC123_COMMON_BASE) -#define DCMI ((DCMI_TypeDef *) DCMI_BASE) -#define DMA2D ((DMA2D_TypeDef *)DMA2D_BASE) -#define HASH ((HASH_TypeDef *) HASH_BASE) -#define HASH_DIGEST ((HASH_DIGEST_TypeDef *) HASH_DIGEST_BASE) -#define AES ((AES_TypeDef *) AES_BASE) -#define RNG ((RNG_TypeDef *) RNG_BASE) - - -#define DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE) -#define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE) -#define DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE) -#define DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE) -#define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE) -#define DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE) -#define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE) -#define DMA1_CSELR ((DMA_Request_TypeDef *) DMA1_CSELR_BASE) - - -#define DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE) -#define DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE) -#define DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE) -#define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE) -#define DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE) -#define DMA2_Channel6 ((DMA_Channel_TypeDef *) DMA2_Channel6_BASE) -#define DMA2_Channel7 ((DMA_Channel_TypeDef *) DMA2_Channel7_BASE) -#define DMA2_CSELR ((DMA_Request_TypeDef *) DMA2_CSELR_BASE) - - -#define FMC_Bank1_R ((FMC_Bank1_TypeDef *) FMC_Bank1_R_BASE) -#define FMC_Bank1E_R ((FMC_Bank1E_TypeDef *) FMC_Bank1E_R_BASE) -#define FMC_Bank3_R ((FMC_Bank3_TypeDef *) FMC_Bank3_R_BASE) - -#define QUADSPI ((QUADSPI_TypeDef *) QSPI_R_BASE) - -#define DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE) - -#define USB_OTG_FS ((USB_OTG_GlobalTypeDef *) USB_OTG_FS_PERIPH_BASE) -/** - * @} - */ - -/** @addtogroup Exported_constants - * @{ - */ - -/** @addtogroup Peripheral_Registers_Bits_Definition - * @{ - */ - -/******************************************************************************/ -/* Peripheral Registers_Bits_Definition */ -/******************************************************************************/ - -/******************************************************************************/ -/* */ -/* Analog to Digital Converter */ -/* */ -/******************************************************************************/ - -/* - * @brief Specific device feature definitions (not present on all devices in the STM32L4 serie) - */ -#define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ - -/******************** Bit definition for ADC_ISR register *******************/ -#define ADC_ISR_ADRDY_Pos (0U) -#define ADC_ISR_ADRDY_Msk (0x1U << ADC_ISR_ADRDY_Pos) /*!< 0x00000001 */ -#define ADC_ISR_ADRDY ADC_ISR_ADRDY_Msk /*!< ADC ready flag */ -#define ADC_ISR_EOSMP_Pos (1U) -#define ADC_ISR_EOSMP_Msk (0x1U << ADC_ISR_EOSMP_Pos) /*!< 0x00000002 */ -#define ADC_ISR_EOSMP ADC_ISR_EOSMP_Msk /*!< ADC group regular end of sampling flag */ -#define ADC_ISR_EOC_Pos (2U) -#define ADC_ISR_EOC_Msk (0x1U << ADC_ISR_EOC_Pos) /*!< 0x00000004 */ -#define ADC_ISR_EOC ADC_ISR_EOC_Msk /*!< ADC group regular end of unitary conversion flag */ -#define ADC_ISR_EOS_Pos (3U) -#define ADC_ISR_EOS_Msk (0x1U << ADC_ISR_EOS_Pos) /*!< 0x00000008 */ -#define ADC_ISR_EOS ADC_ISR_EOS_Msk /*!< ADC group regular end of sequence conversions flag */ -#define ADC_ISR_OVR_Pos (4U) -#define ADC_ISR_OVR_Msk (0x1U << ADC_ISR_OVR_Pos) /*!< 0x00000010 */ -#define ADC_ISR_OVR ADC_ISR_OVR_Msk /*!< ADC group regular overrun flag */ -#define ADC_ISR_JEOC_Pos (5U) -#define ADC_ISR_JEOC_Msk (0x1U << ADC_ISR_JEOC_Pos) /*!< 0x00000020 */ -#define ADC_ISR_JEOC ADC_ISR_JEOC_Msk /*!< ADC group injected end of unitary conversion flag */ -#define ADC_ISR_JEOS_Pos (6U) -#define ADC_ISR_JEOS_Msk (0x1U << ADC_ISR_JEOS_Pos) /*!< 0x00000040 */ -#define ADC_ISR_JEOS ADC_ISR_JEOS_Msk /*!< ADC group injected end of sequence conversions flag */ -#define ADC_ISR_AWD1_Pos (7U) -#define ADC_ISR_AWD1_Msk (0x1U << ADC_ISR_AWD1_Pos) /*!< 0x00000080 */ -#define ADC_ISR_AWD1 ADC_ISR_AWD1_Msk /*!< ADC analog watchdog 1 flag */ -#define ADC_ISR_AWD2_Pos (8U) -#define ADC_ISR_AWD2_Msk (0x1U << ADC_ISR_AWD2_Pos) /*!< 0x00000100 */ -#define ADC_ISR_AWD2 ADC_ISR_AWD2_Msk /*!< ADC analog watchdog 2 flag */ -#define ADC_ISR_AWD3_Pos (9U) -#define ADC_ISR_AWD3_Msk (0x1U << ADC_ISR_AWD3_Pos) /*!< 0x00000200 */ -#define ADC_ISR_AWD3 ADC_ISR_AWD3_Msk /*!< ADC analog watchdog 3 flag */ -#define ADC_ISR_JQOVF_Pos (10U) -#define ADC_ISR_JQOVF_Msk (0x1U << ADC_ISR_JQOVF_Pos) /*!< 0x00000400 */ -#define ADC_ISR_JQOVF ADC_ISR_JQOVF_Msk /*!< ADC group injected contexts queue overflow flag */ - -/******************** Bit definition for ADC_IER register *******************/ -#define ADC_IER_ADRDYIE_Pos (0U) -#define ADC_IER_ADRDYIE_Msk (0x1U << ADC_IER_ADRDYIE_Pos) /*!< 0x00000001 */ -#define ADC_IER_ADRDYIE ADC_IER_ADRDYIE_Msk /*!< ADC ready interrupt */ -#define ADC_IER_EOSMPIE_Pos (1U) -#define ADC_IER_EOSMPIE_Msk (0x1U << ADC_IER_EOSMPIE_Pos) /*!< 0x00000002 */ -#define ADC_IER_EOSMPIE ADC_IER_EOSMPIE_Msk /*!< ADC group regular end of sampling interrupt */ -#define ADC_IER_EOCIE_Pos (2U) -#define ADC_IER_EOCIE_Msk (0x1U << ADC_IER_EOCIE_Pos) /*!< 0x00000004 */ -#define ADC_IER_EOCIE ADC_IER_EOCIE_Msk /*!< ADC group regular end of unitary conversion interrupt */ -#define ADC_IER_EOSIE_Pos (3U) -#define ADC_IER_EOSIE_Msk (0x1U << ADC_IER_EOSIE_Pos) /*!< 0x00000008 */ -#define ADC_IER_EOSIE ADC_IER_EOSIE_Msk /*!< ADC group regular end of sequence conversions interrupt */ -#define ADC_IER_OVRIE_Pos (4U) -#define ADC_IER_OVRIE_Msk (0x1U << ADC_IER_OVRIE_Pos) /*!< 0x00000010 */ -#define ADC_IER_OVRIE ADC_IER_OVRIE_Msk /*!< ADC group regular overrun interrupt */ -#define ADC_IER_JEOCIE_Pos (5U) -#define ADC_IER_JEOCIE_Msk (0x1U << ADC_IER_JEOCIE_Pos) /*!< 0x00000020 */ -#define ADC_IER_JEOCIE ADC_IER_JEOCIE_Msk /*!< ADC group injected end of unitary conversion interrupt */ -#define ADC_IER_JEOSIE_Pos (6U) -#define ADC_IER_JEOSIE_Msk (0x1U << ADC_IER_JEOSIE_Pos) /*!< 0x00000040 */ -#define ADC_IER_JEOSIE ADC_IER_JEOSIE_Msk /*!< ADC group injected end of sequence conversions interrupt */ -#define ADC_IER_AWD1IE_Pos (7U) -#define ADC_IER_AWD1IE_Msk (0x1U << ADC_IER_AWD1IE_Pos) /*!< 0x00000080 */ -#define ADC_IER_AWD1IE ADC_IER_AWD1IE_Msk /*!< ADC analog watchdog 1 interrupt */ -#define ADC_IER_AWD2IE_Pos (8U) -#define ADC_IER_AWD2IE_Msk (0x1U << ADC_IER_AWD2IE_Pos) /*!< 0x00000100 */ -#define ADC_IER_AWD2IE ADC_IER_AWD2IE_Msk /*!< ADC analog watchdog 2 interrupt */ -#define ADC_IER_AWD3IE_Pos (9U) -#define ADC_IER_AWD3IE_Msk (0x1U << ADC_IER_AWD3IE_Pos) /*!< 0x00000200 */ -#define ADC_IER_AWD3IE ADC_IER_AWD3IE_Msk /*!< ADC analog watchdog 3 interrupt */ -#define ADC_IER_JQOVFIE_Pos (10U) -#define ADC_IER_JQOVFIE_Msk (0x1U << ADC_IER_JQOVFIE_Pos) /*!< 0x00000400 */ -#define ADC_IER_JQOVFIE ADC_IER_JQOVFIE_Msk /*!< ADC group injected contexts queue overflow interrupt */ - -/* Legacy defines */ -#define ADC_IER_ADRDY (ADC_IER_ADRDYIE) -#define ADC_IER_EOSMP (ADC_IER_EOSMPIE) -#define ADC_IER_EOC (ADC_IER_EOCIE) -#define ADC_IER_EOS (ADC_IER_EOSIE) -#define ADC_IER_OVR (ADC_IER_OVRIE) -#define ADC_IER_JEOC (ADC_IER_JEOCIE) -#define ADC_IER_JEOS (ADC_IER_JEOSIE) -#define ADC_IER_AWD1 (ADC_IER_AWD1IE) -#define ADC_IER_AWD2 (ADC_IER_AWD2IE) -#define ADC_IER_AWD3 (ADC_IER_AWD3IE) -#define ADC_IER_JQOVF (ADC_IER_JQOVFIE) - -/******************** Bit definition for ADC_CR register ********************/ -#define ADC_CR_ADEN_Pos (0U) -#define ADC_CR_ADEN_Msk (0x1U << ADC_CR_ADEN_Pos) /*!< 0x00000001 */ -#define ADC_CR_ADEN ADC_CR_ADEN_Msk /*!< ADC enable */ -#define ADC_CR_ADDIS_Pos (1U) -#define ADC_CR_ADDIS_Msk (0x1U << ADC_CR_ADDIS_Pos) /*!< 0x00000002 */ -#define ADC_CR_ADDIS ADC_CR_ADDIS_Msk /*!< ADC disable */ -#define ADC_CR_ADSTART_Pos (2U) -#define ADC_CR_ADSTART_Msk (0x1U << ADC_CR_ADSTART_Pos) /*!< 0x00000004 */ -#define ADC_CR_ADSTART ADC_CR_ADSTART_Msk /*!< ADC group regular conversion start */ -#define ADC_CR_JADSTART_Pos (3U) -#define ADC_CR_JADSTART_Msk (0x1U << ADC_CR_JADSTART_Pos) /*!< 0x00000008 */ -#define ADC_CR_JADSTART ADC_CR_JADSTART_Msk /*!< ADC group injected conversion start */ -#define ADC_CR_ADSTP_Pos (4U) -#define ADC_CR_ADSTP_Msk (0x1U << ADC_CR_ADSTP_Pos) /*!< 0x00000010 */ -#define ADC_CR_ADSTP ADC_CR_ADSTP_Msk /*!< ADC group regular conversion stop */ -#define ADC_CR_JADSTP_Pos (5U) -#define ADC_CR_JADSTP_Msk (0x1U << ADC_CR_JADSTP_Pos) /*!< 0x00000020 */ -#define ADC_CR_JADSTP ADC_CR_JADSTP_Msk /*!< ADC group injected conversion stop */ -#define ADC_CR_ADVREGEN_Pos (28U) -#define ADC_CR_ADVREGEN_Msk (0x1U << ADC_CR_ADVREGEN_Pos) /*!< 0x10000000 */ -#define ADC_CR_ADVREGEN ADC_CR_ADVREGEN_Msk /*!< ADC voltage regulator enable */ -#define ADC_CR_DEEPPWD_Pos (29U) -#define ADC_CR_DEEPPWD_Msk (0x1U << ADC_CR_DEEPPWD_Pos) /*!< 0x20000000 */ -#define ADC_CR_DEEPPWD ADC_CR_DEEPPWD_Msk /*!< ADC deep power down enable */ -#define ADC_CR_ADCALDIF_Pos (30U) -#define ADC_CR_ADCALDIF_Msk (0x1U << ADC_CR_ADCALDIF_Pos) /*!< 0x40000000 */ -#define ADC_CR_ADCALDIF ADC_CR_ADCALDIF_Msk /*!< ADC differential mode for calibration */ -#define ADC_CR_ADCAL_Pos (31U) -#define ADC_CR_ADCAL_Msk (0x1U << ADC_CR_ADCAL_Pos) /*!< 0x80000000 */ -#define ADC_CR_ADCAL ADC_CR_ADCAL_Msk /*!< ADC calibration */ - -/******************** Bit definition for ADC_CFGR register ******************/ -#define ADC_CFGR_DMAEN_Pos (0U) -#define ADC_CFGR_DMAEN_Msk (0x1U << ADC_CFGR_DMAEN_Pos) /*!< 0x00000001 */ -#define ADC_CFGR_DMAEN ADC_CFGR_DMAEN_Msk /*!< ADC DMA transfer enable */ -#define ADC_CFGR_DMACFG_Pos (1U) -#define ADC_CFGR_DMACFG_Msk (0x1U << ADC_CFGR_DMACFG_Pos) /*!< 0x00000002 */ -#define ADC_CFGR_DMACFG ADC_CFGR_DMACFG_Msk /*!< ADC DMA transfer configuration */ - -#define ADC_CFGR_DFSDMCFG_Pos (2U) -#define ADC_CFGR_DFSDMCFG_Msk (0x1U << ADC_CFGR_DFSDMCFG_Pos) /*!< 0x00000004 */ -#define ADC_CFGR_DFSDMCFG ADC_CFGR_DFSDMCFG_Msk /*!< ADC DFSDM mode configuration */ - -#define ADC_CFGR_RES_Pos (3U) -#define ADC_CFGR_RES_Msk (0x3U << ADC_CFGR_RES_Pos) /*!< 0x00000018 */ -#define ADC_CFGR_RES ADC_CFGR_RES_Msk /*!< ADC data resolution */ -#define ADC_CFGR_RES_0 (0x1U << ADC_CFGR_RES_Pos) /*!< 0x00000008 */ -#define ADC_CFGR_RES_1 (0x2U << ADC_CFGR_RES_Pos) /*!< 0x00000010 */ - -#define ADC_CFGR_ALIGN_Pos (5U) -#define ADC_CFGR_ALIGN_Msk (0x1U << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ - -#define ADC_CFGR_EXTSEL_Pos (6U) -#define ADC_CFGR_EXTSEL_Msk (0xFU << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ -#define ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_Msk /*!< ADC group regular external trigger source */ -#define ADC_CFGR_EXTSEL_0 (0x1U << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000040 */ -#define ADC_CFGR_EXTSEL_1 (0x2U << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000080 */ -#define ADC_CFGR_EXTSEL_2 (0x4U << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000100 */ -#define ADC_CFGR_EXTSEL_3 (0x8U << ADC_CFGR_EXTSEL_Pos) /*!< 0x00000200 */ - -#define ADC_CFGR_EXTEN_Pos (10U) -#define ADC_CFGR_EXTEN_Msk (0x3U << ADC_CFGR_EXTEN_Pos) /*!< 0x00000C00 */ -#define ADC_CFGR_EXTEN ADC_CFGR_EXTEN_Msk /*!< ADC group regular external trigger polarity */ -#define ADC_CFGR_EXTEN_0 (0x1U << ADC_CFGR_EXTEN_Pos) /*!< 0x00000400 */ -#define ADC_CFGR_EXTEN_1 (0x2U << ADC_CFGR_EXTEN_Pos) /*!< 0x00000800 */ - -#define ADC_CFGR_OVRMOD_Pos (12U) -#define ADC_CFGR_OVRMOD_Msk (0x1U << ADC_CFGR_OVRMOD_Pos) /*!< 0x00001000 */ -#define ADC_CFGR_OVRMOD ADC_CFGR_OVRMOD_Msk /*!< ADC group regular overrun configuration */ -#define ADC_CFGR_CONT_Pos (13U) -#define ADC_CFGR_CONT_Msk (0x1U << ADC_CFGR_CONT_Pos) /*!< 0x00002000 */ -#define ADC_CFGR_CONT ADC_CFGR_CONT_Msk /*!< ADC group regular continuous conversion mode */ -#define ADC_CFGR_AUTDLY_Pos (14U) -#define ADC_CFGR_AUTDLY_Msk (0x1U << ADC_CFGR_AUTDLY_Pos) /*!< 0x00004000 */ -#define ADC_CFGR_AUTDLY ADC_CFGR_AUTDLY_Msk /*!< ADC low power auto wait */ - -#define ADC_CFGR_DISCEN_Pos (16U) -#define ADC_CFGR_DISCEN_Msk (0x1U << ADC_CFGR_DISCEN_Pos) /*!< 0x00010000 */ -#define ADC_CFGR_DISCEN ADC_CFGR_DISCEN_Msk /*!< ADC group regular sequencer discontinuous mode */ - -#define ADC_CFGR_DISCNUM_Pos (17U) -#define ADC_CFGR_DISCNUM_Msk (0x7U << ADC_CFGR_DISCNUM_Pos) /*!< 0x000E0000 */ -#define ADC_CFGR_DISCNUM ADC_CFGR_DISCNUM_Msk /*!< ADC group regular sequencer discontinuous number of ranks */ -#define ADC_CFGR_DISCNUM_0 (0x1U << ADC_CFGR_DISCNUM_Pos) /*!< 0x00020000 */ -#define ADC_CFGR_DISCNUM_1 (0x2U << ADC_CFGR_DISCNUM_Pos) /*!< 0x00040000 */ -#define ADC_CFGR_DISCNUM_2 (0x4U << ADC_CFGR_DISCNUM_Pos) /*!< 0x00080000 */ - -#define ADC_CFGR_JDISCEN_Pos (20U) -#define ADC_CFGR_JDISCEN_Msk (0x1U << ADC_CFGR_JDISCEN_Pos) /*!< 0x00100000 */ -#define ADC_CFGR_JDISCEN ADC_CFGR_JDISCEN_Msk /*!< ADC group injected sequencer discontinuous mode */ -#define ADC_CFGR_JQM_Pos (21U) -#define ADC_CFGR_JQM_Msk (0x1U << ADC_CFGR_JQM_Pos) /*!< 0x00200000 */ -#define ADC_CFGR_JQM ADC_CFGR_JQM_Msk /*!< ADC group injected contexts queue mode */ -#define ADC_CFGR_AWD1SGL_Pos (22U) -#define ADC_CFGR_AWD1SGL_Msk (0x1U << ADC_CFGR_AWD1SGL_Pos) /*!< 0x00400000 */ -#define ADC_CFGR_AWD1SGL ADC_CFGR_AWD1SGL_Msk /*!< ADC analog watchdog 1 monitoring a single channel or all channels */ -#define ADC_CFGR_AWD1EN_Pos (23U) -#define ADC_CFGR_AWD1EN_Msk (0x1U << ADC_CFGR_AWD1EN_Pos) /*!< 0x00800000 */ -#define ADC_CFGR_AWD1EN ADC_CFGR_AWD1EN_Msk /*!< ADC analog watchdog 1 enable on scope ADC group regular */ -#define ADC_CFGR_JAWD1EN_Pos (24U) -#define ADC_CFGR_JAWD1EN_Msk (0x1U << ADC_CFGR_JAWD1EN_Pos) /*!< 0x01000000 */ -#define ADC_CFGR_JAWD1EN ADC_CFGR_JAWD1EN_Msk /*!< ADC analog watchdog 1 enable on scope ADC group injected */ -#define ADC_CFGR_JAUTO_Pos (25U) -#define ADC_CFGR_JAUTO_Msk (0x1U << ADC_CFGR_JAUTO_Pos) /*!< 0x02000000 */ -#define ADC_CFGR_JAUTO ADC_CFGR_JAUTO_Msk /*!< ADC group injected automatic trigger mode */ - -#define ADC_CFGR_AWD1CH_Pos (26U) -#define ADC_CFGR_AWD1CH_Msk (0x1FU << ADC_CFGR_AWD1CH_Pos) /*!< 0x7C000000 */ -#define ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_Msk /*!< ADC analog watchdog 1 monitored channel selection */ -#define ADC_CFGR_AWD1CH_0 (0x01U << ADC_CFGR_AWD1CH_Pos) /*!< 0x04000000 */ -#define ADC_CFGR_AWD1CH_1 (0x02U << ADC_CFGR_AWD1CH_Pos) /*!< 0x08000000 */ -#define ADC_CFGR_AWD1CH_2 (0x04U << ADC_CFGR_AWD1CH_Pos) /*!< 0x10000000 */ -#define ADC_CFGR_AWD1CH_3 (0x08U << ADC_CFGR_AWD1CH_Pos) /*!< 0x20000000 */ -#define ADC_CFGR_AWD1CH_4 (0x10U << ADC_CFGR_AWD1CH_Pos) /*!< 0x40000000 */ - -#define ADC_CFGR_JQDIS_Pos (31U) -#define ADC_CFGR_JQDIS_Msk (0x1U << ADC_CFGR_JQDIS_Pos) /*!< 0x80000000 */ -#define ADC_CFGR_JQDIS ADC_CFGR_JQDIS_Msk /*!< ADC group injected contexts queue disable */ - -/******************** Bit definition for ADC_CFGR2 register *****************/ -#define ADC_CFGR2_ROVSE_Pos (0U) -#define ADC_CFGR2_ROVSE_Msk (0x1U << ADC_CFGR2_ROVSE_Pos) /*!< 0x00000001 */ -#define ADC_CFGR2_ROVSE ADC_CFGR2_ROVSE_Msk /*!< ADC oversampler enable on scope ADC group regular */ -#define ADC_CFGR2_JOVSE_Pos (1U) -#define ADC_CFGR2_JOVSE_Msk (0x1U << ADC_CFGR2_JOVSE_Pos) /*!< 0x00000002 */ -#define ADC_CFGR2_JOVSE ADC_CFGR2_JOVSE_Msk /*!< ADC oversampler enable on scope ADC group injected */ - -#define ADC_CFGR2_OVSR_Pos (2U) -#define ADC_CFGR2_OVSR_Msk (0x7U << ADC_CFGR2_OVSR_Pos) /*!< 0x0000001C */ -#define ADC_CFGR2_OVSR ADC_CFGR2_OVSR_Msk /*!< ADC oversampling ratio */ -#define ADC_CFGR2_OVSR_0 (0x1U << ADC_CFGR2_OVSR_Pos) /*!< 0x00000004 */ -#define ADC_CFGR2_OVSR_1 (0x2U << ADC_CFGR2_OVSR_Pos) /*!< 0x00000008 */ -#define ADC_CFGR2_OVSR_2 (0x4U << ADC_CFGR2_OVSR_Pos) /*!< 0x00000010 */ - -#define ADC_CFGR2_OVSS_Pos (5U) -#define ADC_CFGR2_OVSS_Msk (0xFU << ADC_CFGR2_OVSS_Pos) /*!< 0x000001E0 */ -#define ADC_CFGR2_OVSS ADC_CFGR2_OVSS_Msk /*!< ADC oversampling shift */ -#define ADC_CFGR2_OVSS_0 (0x1U << ADC_CFGR2_OVSS_Pos) /*!< 0x00000020 */ -#define ADC_CFGR2_OVSS_1 (0x2U << ADC_CFGR2_OVSS_Pos) /*!< 0x00000040 */ -#define ADC_CFGR2_OVSS_2 (0x4U << ADC_CFGR2_OVSS_Pos) /*!< 0x00000080 */ -#define ADC_CFGR2_OVSS_3 (0x8U << ADC_CFGR2_OVSS_Pos) /*!< 0x00000100 */ - -#define ADC_CFGR2_TROVS_Pos (9U) -#define ADC_CFGR2_TROVS_Msk (0x1U << ADC_CFGR2_TROVS_Pos) /*!< 0x00000200 */ -#define ADC_CFGR2_TROVS ADC_CFGR2_TROVS_Msk /*!< ADC oversampling discontinuous mode (triggered mode) for ADC group regular */ -#define ADC_CFGR2_ROVSM_Pos (10U) -#define ADC_CFGR2_ROVSM_Msk (0x1U << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */ -#define ADC_CFGR2_ROVSM ADC_CFGR2_ROVSM_Msk /*!< ADC oversampling mode managing interlaced conversions of ADC group regular and group injected */ - -/******************** Bit definition for ADC_SMPR1 register *****************/ -#define ADC_SMPR1_SMP0_Pos (0U) -#define ADC_SMPR1_SMP0_Msk (0x7U << ADC_SMPR1_SMP0_Pos) /*!< 0x00000007 */ -#define ADC_SMPR1_SMP0 ADC_SMPR1_SMP0_Msk /*!< ADC channel 0 sampling time selection */ -#define ADC_SMPR1_SMP0_0 (0x1U << ADC_SMPR1_SMP0_Pos) /*!< 0x00000001 */ -#define ADC_SMPR1_SMP0_1 (0x2U << ADC_SMPR1_SMP0_Pos) /*!< 0x00000002 */ -#define ADC_SMPR1_SMP0_2 (0x4U << ADC_SMPR1_SMP0_Pos) /*!< 0x00000004 */ - -#define ADC_SMPR1_SMP1_Pos (3U) -#define ADC_SMPR1_SMP1_Msk (0x7U << ADC_SMPR1_SMP1_Pos) /*!< 0x00000038 */ -#define ADC_SMPR1_SMP1 ADC_SMPR1_SMP1_Msk /*!< ADC channel 1 sampling time selection */ -#define ADC_SMPR1_SMP1_0 (0x1U << ADC_SMPR1_SMP1_Pos) /*!< 0x00000008 */ -#define ADC_SMPR1_SMP1_1 (0x2U << ADC_SMPR1_SMP1_Pos) /*!< 0x00000010 */ -#define ADC_SMPR1_SMP1_2 (0x4U << ADC_SMPR1_SMP1_Pos) /*!< 0x00000020 */ - -#define ADC_SMPR1_SMP2_Pos (6U) -#define ADC_SMPR1_SMP2_Msk (0x7U << ADC_SMPR1_SMP2_Pos) /*!< 0x000001C0 */ -#define ADC_SMPR1_SMP2 ADC_SMPR1_SMP2_Msk /*!< ADC channel 2 sampling time selection */ -#define ADC_SMPR1_SMP2_0 (0x1U << ADC_SMPR1_SMP2_Pos) /*!< 0x00000040 */ -#define ADC_SMPR1_SMP2_1 (0x2U << ADC_SMPR1_SMP2_Pos) /*!< 0x00000080 */ -#define ADC_SMPR1_SMP2_2 (0x4U << ADC_SMPR1_SMP2_Pos) /*!< 0x00000100 */ - -#define ADC_SMPR1_SMP3_Pos (9U) -#define ADC_SMPR1_SMP3_Msk (0x7U << ADC_SMPR1_SMP3_Pos) /*!< 0x00000E00 */ -#define ADC_SMPR1_SMP3 ADC_SMPR1_SMP3_Msk /*!< ADC channel 3 sampling time selection */ -#define ADC_SMPR1_SMP3_0 (0x1U << ADC_SMPR1_SMP3_Pos) /*!< 0x00000200 */ -#define ADC_SMPR1_SMP3_1 (0x2U << ADC_SMPR1_SMP3_Pos) /*!< 0x00000400 */ -#define ADC_SMPR1_SMP3_2 (0x4U << ADC_SMPR1_SMP3_Pos) /*!< 0x00000800 */ - -#define ADC_SMPR1_SMP4_Pos (12U) -#define ADC_SMPR1_SMP4_Msk (0x7U << ADC_SMPR1_SMP4_Pos) /*!< 0x00007000 */ -#define ADC_SMPR1_SMP4 ADC_SMPR1_SMP4_Msk /*!< ADC channel 4 sampling time selection */ -#define ADC_SMPR1_SMP4_0 (0x1U << ADC_SMPR1_SMP4_Pos) /*!< 0x00001000 */ -#define ADC_SMPR1_SMP4_1 (0x2U << ADC_SMPR1_SMP4_Pos) /*!< 0x00002000 */ -#define ADC_SMPR1_SMP4_2 (0x4U << ADC_SMPR1_SMP4_Pos) /*!< 0x00004000 */ - -#define ADC_SMPR1_SMP5_Pos (15U) -#define ADC_SMPR1_SMP5_Msk (0x7U << ADC_SMPR1_SMP5_Pos) /*!< 0x00038000 */ -#define ADC_SMPR1_SMP5 ADC_SMPR1_SMP5_Msk /*!< ADC channel 5 sampling time selection */ -#define ADC_SMPR1_SMP5_0 (0x1U << ADC_SMPR1_SMP5_Pos) /*!< 0x00008000 */ -#define ADC_SMPR1_SMP5_1 (0x2U << ADC_SMPR1_SMP5_Pos) /*!< 0x00010000 */ -#define ADC_SMPR1_SMP5_2 (0x4U << ADC_SMPR1_SMP5_Pos) /*!< 0x00020000 */ - -#define ADC_SMPR1_SMP6_Pos (18U) -#define ADC_SMPR1_SMP6_Msk (0x7U << ADC_SMPR1_SMP6_Pos) /*!< 0x001C0000 */ -#define ADC_SMPR1_SMP6 ADC_SMPR1_SMP6_Msk /*!< ADC channel 6 sampling time selection */ -#define ADC_SMPR1_SMP6_0 (0x1U << ADC_SMPR1_SMP6_Pos) /*!< 0x00040000 */ -#define ADC_SMPR1_SMP6_1 (0x2U << ADC_SMPR1_SMP6_Pos) /*!< 0x00080000 */ -#define ADC_SMPR1_SMP6_2 (0x4U << ADC_SMPR1_SMP6_Pos) /*!< 0x00100000 */ - -#define ADC_SMPR1_SMP7_Pos (21U) -#define ADC_SMPR1_SMP7_Msk (0x7U << ADC_SMPR1_SMP7_Pos) /*!< 0x00E00000 */ -#define ADC_SMPR1_SMP7 ADC_SMPR1_SMP7_Msk /*!< ADC channel 7 sampling time selection */ -#define ADC_SMPR1_SMP7_0 (0x1U << ADC_SMPR1_SMP7_Pos) /*!< 0x00200000 */ -#define ADC_SMPR1_SMP7_1 (0x2U << ADC_SMPR1_SMP7_Pos) /*!< 0x00400000 */ -#define ADC_SMPR1_SMP7_2 (0x4U << ADC_SMPR1_SMP7_Pos) /*!< 0x00800000 */ - -#define ADC_SMPR1_SMP8_Pos (24U) -#define ADC_SMPR1_SMP8_Msk (0x7U << ADC_SMPR1_SMP8_Pos) /*!< 0x07000000 */ -#define ADC_SMPR1_SMP8 ADC_SMPR1_SMP8_Msk /*!< ADC channel 8 sampling time selection */ -#define ADC_SMPR1_SMP8_0 (0x1U << ADC_SMPR1_SMP8_Pos) /*!< 0x01000000 */ -#define ADC_SMPR1_SMP8_1 (0x2U << ADC_SMPR1_SMP8_Pos) /*!< 0x02000000 */ -#define ADC_SMPR1_SMP8_2 (0x4U << ADC_SMPR1_SMP8_Pos) /*!< 0x04000000 */ - -#define ADC_SMPR1_SMP9_Pos (27U) -#define ADC_SMPR1_SMP9_Msk (0x7U << ADC_SMPR1_SMP9_Pos) /*!< 0x38000000 */ -#define ADC_SMPR1_SMP9 ADC_SMPR1_SMP9_Msk /*!< ADC channel 9 sampling time selection */ -#define ADC_SMPR1_SMP9_0 (0x1U << ADC_SMPR1_SMP9_Pos) /*!< 0x08000000 */ -#define ADC_SMPR1_SMP9_1 (0x2U << ADC_SMPR1_SMP9_Pos) /*!< 0x10000000 */ -#define ADC_SMPR1_SMP9_2 (0x4U << ADC_SMPR1_SMP9_Pos) /*!< 0x20000000 */ - -#define ADC_SMPR1_SMPPLUS_Pos (31U) -#define ADC_SMPR1_SMPPLUS_Msk (0x1U << ADC_SMPR1_SMPPLUS_Pos) /*!< 0x80000000 */ -#define ADC_SMPR1_SMPPLUS ADC_SMPR1_SMPPLUS_Msk /*!< ADC channels sampling time additional setting */ - -/******************** Bit definition for ADC_SMPR2 register *****************/ -#define ADC_SMPR2_SMP10_Pos (0U) -#define ADC_SMPR2_SMP10_Msk (0x7U << ADC_SMPR2_SMP10_Pos) /*!< 0x00000007 */ -#define ADC_SMPR2_SMP10 ADC_SMPR2_SMP10_Msk /*!< ADC channel 10 sampling time selection */ -#define ADC_SMPR2_SMP10_0 (0x1U << ADC_SMPR2_SMP10_Pos) /*!< 0x00000001 */ -#define ADC_SMPR2_SMP10_1 (0x2U << ADC_SMPR2_SMP10_Pos) /*!< 0x00000002 */ -#define ADC_SMPR2_SMP10_2 (0x4U << ADC_SMPR2_SMP10_Pos) /*!< 0x00000004 */ - -#define ADC_SMPR2_SMP11_Pos (3U) -#define ADC_SMPR2_SMP11_Msk (0x7U << ADC_SMPR2_SMP11_Pos) /*!< 0x00000038 */ -#define ADC_SMPR2_SMP11 ADC_SMPR2_SMP11_Msk /*!< ADC channel 11 sampling time selection */ -#define ADC_SMPR2_SMP11_0 (0x1U << ADC_SMPR2_SMP11_Pos) /*!< 0x00000008 */ -#define ADC_SMPR2_SMP11_1 (0x2U << ADC_SMPR2_SMP11_Pos) /*!< 0x00000010 */ -#define ADC_SMPR2_SMP11_2 (0x4U << ADC_SMPR2_SMP11_Pos) /*!< 0x00000020 */ - -#define ADC_SMPR2_SMP12_Pos (6U) -#define ADC_SMPR2_SMP12_Msk (0x7U << ADC_SMPR2_SMP12_Pos) /*!< 0x000001C0 */ -#define ADC_SMPR2_SMP12 ADC_SMPR2_SMP12_Msk /*!< ADC channel 12 sampling time selection */ -#define ADC_SMPR2_SMP12_0 (0x1U << ADC_SMPR2_SMP12_Pos) /*!< 0x00000040 */ -#define ADC_SMPR2_SMP12_1 (0x2U << ADC_SMPR2_SMP12_Pos) /*!< 0x00000080 */ -#define ADC_SMPR2_SMP12_2 (0x4U << ADC_SMPR2_SMP12_Pos) /*!< 0x00000100 */ - -#define ADC_SMPR2_SMP13_Pos (9U) -#define ADC_SMPR2_SMP13_Msk (0x7U << ADC_SMPR2_SMP13_Pos) /*!< 0x00000E00 */ -#define ADC_SMPR2_SMP13 ADC_SMPR2_SMP13_Msk /*!< ADC channel 13 sampling time selection */ -#define ADC_SMPR2_SMP13_0 (0x1U << ADC_SMPR2_SMP13_Pos) /*!< 0x00000200 */ -#define ADC_SMPR2_SMP13_1 (0x2U << ADC_SMPR2_SMP13_Pos) /*!< 0x00000400 */ -#define ADC_SMPR2_SMP13_2 (0x4U << ADC_SMPR2_SMP13_Pos) /*!< 0x00000800 */ - -#define ADC_SMPR2_SMP14_Pos (12U) -#define ADC_SMPR2_SMP14_Msk (0x7U << ADC_SMPR2_SMP14_Pos) /*!< 0x00007000 */ -#define ADC_SMPR2_SMP14 ADC_SMPR2_SMP14_Msk /*!< ADC channel 14 sampling time selection */ -#define ADC_SMPR2_SMP14_0 (0x1U << ADC_SMPR2_SMP14_Pos) /*!< 0x00001000 */ -#define ADC_SMPR2_SMP14_1 (0x2U << ADC_SMPR2_SMP14_Pos) /*!< 0x00002000 */ -#define ADC_SMPR2_SMP14_2 (0x4U << ADC_SMPR2_SMP14_Pos) /*!< 0x00004000 */ - -#define ADC_SMPR2_SMP15_Pos (15U) -#define ADC_SMPR2_SMP15_Msk (0x7U << ADC_SMPR2_SMP15_Pos) /*!< 0x00038000 */ -#define ADC_SMPR2_SMP15 ADC_SMPR2_SMP15_Msk /*!< ADC channel 15 sampling time selection */ -#define ADC_SMPR2_SMP15_0 (0x1U << ADC_SMPR2_SMP15_Pos) /*!< 0x00008000 */ -#define ADC_SMPR2_SMP15_1 (0x2U << ADC_SMPR2_SMP15_Pos) /*!< 0x00010000 */ -#define ADC_SMPR2_SMP15_2 (0x4U << ADC_SMPR2_SMP15_Pos) /*!< 0x00020000 */ - -#define ADC_SMPR2_SMP16_Pos (18U) -#define ADC_SMPR2_SMP16_Msk (0x7U << ADC_SMPR2_SMP16_Pos) /*!< 0x001C0000 */ -#define ADC_SMPR2_SMP16 ADC_SMPR2_SMP16_Msk /*!< ADC channel 16 sampling time selection */ -#define ADC_SMPR2_SMP16_0 (0x1U << ADC_SMPR2_SMP16_Pos) /*!< 0x00040000 */ -#define ADC_SMPR2_SMP16_1 (0x2U << ADC_SMPR2_SMP16_Pos) /*!< 0x00080000 */ -#define ADC_SMPR2_SMP16_2 (0x4U << ADC_SMPR2_SMP16_Pos) /*!< 0x00100000 */ - -#define ADC_SMPR2_SMP17_Pos (21U) -#define ADC_SMPR2_SMP17_Msk (0x7U << ADC_SMPR2_SMP17_Pos) /*!< 0x00E00000 */ -#define ADC_SMPR2_SMP17 ADC_SMPR2_SMP17_Msk /*!< ADC channel 17 sampling time selection */ -#define ADC_SMPR2_SMP17_0 (0x1U << ADC_SMPR2_SMP17_Pos) /*!< 0x00200000 */ -#define ADC_SMPR2_SMP17_1 (0x2U << ADC_SMPR2_SMP17_Pos) /*!< 0x00400000 */ -#define ADC_SMPR2_SMP17_2 (0x4U << ADC_SMPR2_SMP17_Pos) /*!< 0x00800000 */ - -#define ADC_SMPR2_SMP18_Pos (24U) -#define ADC_SMPR2_SMP18_Msk (0x7U << ADC_SMPR2_SMP18_Pos) /*!< 0x07000000 */ -#define ADC_SMPR2_SMP18 ADC_SMPR2_SMP18_Msk /*!< ADC channel 18 sampling time selection */ -#define ADC_SMPR2_SMP18_0 (0x1U << ADC_SMPR2_SMP18_Pos) /*!< 0x01000000 */ -#define ADC_SMPR2_SMP18_1 (0x2U << ADC_SMPR2_SMP18_Pos) /*!< 0x02000000 */ -#define ADC_SMPR2_SMP18_2 (0x4U << ADC_SMPR2_SMP18_Pos) /*!< 0x04000000 */ - -/******************** Bit definition for ADC_TR1 register *******************/ -#define ADC_TR1_LT1_Pos (0U) -#define ADC_TR1_LT1_Msk (0xFFFU << ADC_TR1_LT1_Pos) /*!< 0x00000FFF */ -#define ADC_TR1_LT1 ADC_TR1_LT1_Msk /*!< ADC analog watchdog 1 threshold low */ -#define ADC_TR1_LT1_0 (0x001U << ADC_TR1_LT1_Pos) /*!< 0x00000001 */ -#define ADC_TR1_LT1_1 (0x002U << ADC_TR1_LT1_Pos) /*!< 0x00000002 */ -#define ADC_TR1_LT1_2 (0x004U << ADC_TR1_LT1_Pos) /*!< 0x00000004 */ -#define ADC_TR1_LT1_3 (0x008U << ADC_TR1_LT1_Pos) /*!< 0x00000008 */ -#define ADC_TR1_LT1_4 (0x010U << ADC_TR1_LT1_Pos) /*!< 0x00000010 */ -#define ADC_TR1_LT1_5 (0x020U << ADC_TR1_LT1_Pos) /*!< 0x00000020 */ -#define ADC_TR1_LT1_6 (0x040U << ADC_TR1_LT1_Pos) /*!< 0x00000040 */ -#define ADC_TR1_LT1_7 (0x080U << ADC_TR1_LT1_Pos) /*!< 0x00000080 */ -#define ADC_TR1_LT1_8 (0x100U << ADC_TR1_LT1_Pos) /*!< 0x00000100 */ -#define ADC_TR1_LT1_9 (0x200U << ADC_TR1_LT1_Pos) /*!< 0x00000200 */ -#define ADC_TR1_LT1_10 (0x400U << ADC_TR1_LT1_Pos) /*!< 0x00000400 */ -#define ADC_TR1_LT1_11 (0x800U << ADC_TR1_LT1_Pos) /*!< 0x00000800 */ - -#define ADC_TR1_HT1_Pos (16U) -#define ADC_TR1_HT1_Msk (0xFFFU << ADC_TR1_HT1_Pos) /*!< 0x0FFF0000 */ -#define ADC_TR1_HT1 ADC_TR1_HT1_Msk /*!< ADC Analog watchdog 1 threshold high */ -#define ADC_TR1_HT1_0 (0x001U << ADC_TR1_HT1_Pos) /*!< 0x00010000 */ -#define ADC_TR1_HT1_1 (0x002U << ADC_TR1_HT1_Pos) /*!< 0x00020000 */ -#define ADC_TR1_HT1_2 (0x004U << ADC_TR1_HT1_Pos) /*!< 0x00040000 */ -#define ADC_TR1_HT1_3 (0x008U << ADC_TR1_HT1_Pos) /*!< 0x00080000 */ -#define ADC_TR1_HT1_4 (0x010U << ADC_TR1_HT1_Pos) /*!< 0x00100000 */ -#define ADC_TR1_HT1_5 (0x020U << ADC_TR1_HT1_Pos) /*!< 0x00200000 */ -#define ADC_TR1_HT1_6 (0x040U << ADC_TR1_HT1_Pos) /*!< 0x00400000 */ -#define ADC_TR1_HT1_7 (0x080U << ADC_TR1_HT1_Pos) /*!< 0x00800000 */ -#define ADC_TR1_HT1_8 (0x100U << ADC_TR1_HT1_Pos) /*!< 0x01000000 */ -#define ADC_TR1_HT1_9 (0x200U << ADC_TR1_HT1_Pos) /*!< 0x02000000 */ -#define ADC_TR1_HT1_10 (0x400U << ADC_TR1_HT1_Pos) /*!< 0x04000000 */ -#define ADC_TR1_HT1_11 (0x800U << ADC_TR1_HT1_Pos) /*!< 0x08000000 */ - -/******************** Bit definition for ADC_TR2 register *******************/ -#define ADC_TR2_LT2_Pos (0U) -#define ADC_TR2_LT2_Msk (0xFFU << ADC_TR2_LT2_Pos) /*!< 0x000000FF */ -#define ADC_TR2_LT2 ADC_TR2_LT2_Msk /*!< ADC analog watchdog 2 threshold low */ -#define ADC_TR2_LT2_0 (0x01U << ADC_TR2_LT2_Pos) /*!< 0x00000001 */ -#define ADC_TR2_LT2_1 (0x02U << ADC_TR2_LT2_Pos) /*!< 0x00000002 */ -#define ADC_TR2_LT2_2 (0x04U << ADC_TR2_LT2_Pos) /*!< 0x00000004 */ -#define ADC_TR2_LT2_3 (0x08U << ADC_TR2_LT2_Pos) /*!< 0x00000008 */ -#define ADC_TR2_LT2_4 (0x10U << ADC_TR2_LT2_Pos) /*!< 0x00000010 */ -#define ADC_TR2_LT2_5 (0x20U << ADC_TR2_LT2_Pos) /*!< 0x00000020 */ -#define ADC_TR2_LT2_6 (0x40U << ADC_TR2_LT2_Pos) /*!< 0x00000040 */ -#define ADC_TR2_LT2_7 (0x80U << ADC_TR2_LT2_Pos) /*!< 0x00000080 */ - -#define ADC_TR2_HT2_Pos (16U) -#define ADC_TR2_HT2_Msk (0xFFU << ADC_TR2_HT2_Pos) /*!< 0x00FF0000 */ -#define ADC_TR2_HT2 ADC_TR2_HT2_Msk /*!< ADC analog watchdog 2 threshold high */ -#define ADC_TR2_HT2_0 (0x01U << ADC_TR2_HT2_Pos) /*!< 0x00010000 */ -#define ADC_TR2_HT2_1 (0x02U << ADC_TR2_HT2_Pos) /*!< 0x00020000 */ -#define ADC_TR2_HT2_2 (0x04U << ADC_TR2_HT2_Pos) /*!< 0x00040000 */ -#define ADC_TR2_HT2_3 (0x08U << ADC_TR2_HT2_Pos) /*!< 0x00080000 */ -#define ADC_TR2_HT2_4 (0x10U << ADC_TR2_HT2_Pos) /*!< 0x00100000 */ -#define ADC_TR2_HT2_5 (0x20U << ADC_TR2_HT2_Pos) /*!< 0x00200000 */ -#define ADC_TR2_HT2_6 (0x40U << ADC_TR2_HT2_Pos) /*!< 0x00400000 */ -#define ADC_TR2_HT2_7 (0x80U << ADC_TR2_HT2_Pos) /*!< 0x00800000 */ - -/******************** Bit definition for ADC_TR3 register *******************/ -#define ADC_TR3_LT3_Pos (0U) -#define ADC_TR3_LT3_Msk (0xFFU << ADC_TR3_LT3_Pos) /*!< 0x000000FF */ -#define ADC_TR3_LT3 ADC_TR3_LT3_Msk /*!< ADC analog watchdog 3 threshold low */ -#define ADC_TR3_LT3_0 (0x01U << ADC_TR3_LT3_Pos) /*!< 0x00000001 */ -#define ADC_TR3_LT3_1 (0x02U << ADC_TR3_LT3_Pos) /*!< 0x00000002 */ -#define ADC_TR3_LT3_2 (0x04U << ADC_TR3_LT3_Pos) /*!< 0x00000004 */ -#define ADC_TR3_LT3_3 (0x08U << ADC_TR3_LT3_Pos) /*!< 0x00000008 */ -#define ADC_TR3_LT3_4 (0x10U << ADC_TR3_LT3_Pos) /*!< 0x00000010 */ -#define ADC_TR3_LT3_5 (0x20U << ADC_TR3_LT3_Pos) /*!< 0x00000020 */ -#define ADC_TR3_LT3_6 (0x40U << ADC_TR3_LT3_Pos) /*!< 0x00000040 */ -#define ADC_TR3_LT3_7 (0x80U << ADC_TR3_LT3_Pos) /*!< 0x00000080 */ - -#define ADC_TR3_HT3_Pos (16U) -#define ADC_TR3_HT3_Msk (0xFFU << ADC_TR3_HT3_Pos) /*!< 0x00FF0000 */ -#define ADC_TR3_HT3 ADC_TR3_HT3_Msk /*!< ADC analog watchdog 3 threshold high */ -#define ADC_TR3_HT3_0 (0x01U << ADC_TR3_HT3_Pos) /*!< 0x00010000 */ -#define ADC_TR3_HT3_1 (0x02U << ADC_TR3_HT3_Pos) /*!< 0x00020000 */ -#define ADC_TR3_HT3_2 (0x04U << ADC_TR3_HT3_Pos) /*!< 0x00040000 */ -#define ADC_TR3_HT3_3 (0x08U << ADC_TR3_HT3_Pos) /*!< 0x00080000 */ -#define ADC_TR3_HT3_4 (0x10U << ADC_TR3_HT3_Pos) /*!< 0x00100000 */ -#define ADC_TR3_HT3_5 (0x20U << ADC_TR3_HT3_Pos) /*!< 0x00200000 */ -#define ADC_TR3_HT3_6 (0x40U << ADC_TR3_HT3_Pos) /*!< 0x00400000 */ -#define ADC_TR3_HT3_7 (0x80U << ADC_TR3_HT3_Pos) /*!< 0x00800000 */ - -/******************** Bit definition for ADC_SQR1 register ******************/ -#define ADC_SQR1_L_Pos (0U) -#define ADC_SQR1_L_Msk (0xFU << ADC_SQR1_L_Pos) /*!< 0x0000000F */ -#define ADC_SQR1_L ADC_SQR1_L_Msk /*!< ADC group regular sequencer scan length */ -#define ADC_SQR1_L_0 (0x1U << ADC_SQR1_L_Pos) /*!< 0x00000001 */ -#define ADC_SQR1_L_1 (0x2U << ADC_SQR1_L_Pos) /*!< 0x00000002 */ -#define ADC_SQR1_L_2 (0x4U << ADC_SQR1_L_Pos) /*!< 0x00000004 */ -#define ADC_SQR1_L_3 (0x8U << ADC_SQR1_L_Pos) /*!< 0x00000008 */ - -#define ADC_SQR1_SQ1_Pos (6U) -#define ADC_SQR1_SQ1_Msk (0x1FU << ADC_SQR1_SQ1_Pos) /*!< 0x000007C0 */ -#define ADC_SQR1_SQ1 ADC_SQR1_SQ1_Msk /*!< ADC group regular sequencer rank 1 */ -#define ADC_SQR1_SQ1_0 (0x01U << ADC_SQR1_SQ1_Pos) /*!< 0x00000040 */ -#define ADC_SQR1_SQ1_1 (0x02U << ADC_SQR1_SQ1_Pos) /*!< 0x00000080 */ -#define ADC_SQR1_SQ1_2 (0x04U << ADC_SQR1_SQ1_Pos) /*!< 0x00000100 */ -#define ADC_SQR1_SQ1_3 (0x08U << ADC_SQR1_SQ1_Pos) /*!< 0x00000200 */ -#define ADC_SQR1_SQ1_4 (0x10U << ADC_SQR1_SQ1_Pos) /*!< 0x00000400 */ - -#define ADC_SQR1_SQ2_Pos (12U) -#define ADC_SQR1_SQ2_Msk (0x1FU << ADC_SQR1_SQ2_Pos) /*!< 0x0001F000 */ -#define ADC_SQR1_SQ2 ADC_SQR1_SQ2_Msk /*!< ADC group regular sequencer rank 2 */ -#define ADC_SQR1_SQ2_0 (0x01U << ADC_SQR1_SQ2_Pos) /*!< 0x00001000 */ -#define ADC_SQR1_SQ2_1 (0x02U << ADC_SQR1_SQ2_Pos) /*!< 0x00002000 */ -#define ADC_SQR1_SQ2_2 (0x04U << ADC_SQR1_SQ2_Pos) /*!< 0x00004000 */ -#define ADC_SQR1_SQ2_3 (0x08U << ADC_SQR1_SQ2_Pos) /*!< 0x00008000 */ -#define ADC_SQR1_SQ2_4 (0x10U << ADC_SQR1_SQ2_Pos) /*!< 0x00010000 */ - -#define ADC_SQR1_SQ3_Pos (18U) -#define ADC_SQR1_SQ3_Msk (0x1FU << ADC_SQR1_SQ3_Pos) /*!< 0x007C0000 */ -#define ADC_SQR1_SQ3 ADC_SQR1_SQ3_Msk /*!< ADC group regular sequencer rank 3 */ -#define ADC_SQR1_SQ3_0 (0x01U << ADC_SQR1_SQ3_Pos) /*!< 0x00040000 */ -#define ADC_SQR1_SQ3_1 (0x02U << ADC_SQR1_SQ3_Pos) /*!< 0x00080000 */ -#define ADC_SQR1_SQ3_2 (0x04U << ADC_SQR1_SQ3_Pos) /*!< 0x00100000 */ -#define ADC_SQR1_SQ3_3 (0x08U << ADC_SQR1_SQ3_Pos) /*!< 0x00200000 */ -#define ADC_SQR1_SQ3_4 (0x10U << ADC_SQR1_SQ3_Pos) /*!< 0x00400000 */ - -#define ADC_SQR1_SQ4_Pos (24U) -#define ADC_SQR1_SQ4_Msk (0x1FU << ADC_SQR1_SQ4_Pos) /*!< 0x1F000000 */ -#define ADC_SQR1_SQ4 ADC_SQR1_SQ4_Msk /*!< ADC group regular sequencer rank 4 */ -#define ADC_SQR1_SQ4_0 (0x01U << ADC_SQR1_SQ4_Pos) /*!< 0x01000000 */ -#define ADC_SQR1_SQ4_1 (0x02U << ADC_SQR1_SQ4_Pos) /*!< 0x02000000 */ -#define ADC_SQR1_SQ4_2 (0x04U << ADC_SQR1_SQ4_Pos) /*!< 0x04000000 */ -#define ADC_SQR1_SQ4_3 (0x08U << ADC_SQR1_SQ4_Pos) /*!< 0x08000000 */ -#define ADC_SQR1_SQ4_4 (0x10U << ADC_SQR1_SQ4_Pos) /*!< 0x10000000 */ - -/******************** Bit definition for ADC_SQR2 register ******************/ -#define ADC_SQR2_SQ5_Pos (0U) -#define ADC_SQR2_SQ5_Msk (0x1FU << ADC_SQR2_SQ5_Pos) /*!< 0x0000001F */ -#define ADC_SQR2_SQ5 ADC_SQR2_SQ5_Msk /*!< ADC group regular sequencer rank 5 */ -#define ADC_SQR2_SQ5_0 (0x01U << ADC_SQR2_SQ5_Pos) /*!< 0x00000001 */ -#define ADC_SQR2_SQ5_1 (0x02U << ADC_SQR2_SQ5_Pos) /*!< 0x00000002 */ -#define ADC_SQR2_SQ5_2 (0x04U << ADC_SQR2_SQ5_Pos) /*!< 0x00000004 */ -#define ADC_SQR2_SQ5_3 (0x08U << ADC_SQR2_SQ5_Pos) /*!< 0x00000008 */ -#define ADC_SQR2_SQ5_4 (0x10U << ADC_SQR2_SQ5_Pos) /*!< 0x00000010 */ - -#define ADC_SQR2_SQ6_Pos (6U) -#define ADC_SQR2_SQ6_Msk (0x1FU << ADC_SQR2_SQ6_Pos) /*!< 0x000007C0 */ -#define ADC_SQR2_SQ6 ADC_SQR2_SQ6_Msk /*!< ADC group regular sequencer rank 6 */ -#define ADC_SQR2_SQ6_0 (0x01U << ADC_SQR2_SQ6_Pos) /*!< 0x00000040 */ -#define ADC_SQR2_SQ6_1 (0x02U << ADC_SQR2_SQ6_Pos) /*!< 0x00000080 */ -#define ADC_SQR2_SQ6_2 (0x04U << ADC_SQR2_SQ6_Pos) /*!< 0x00000100 */ -#define ADC_SQR2_SQ6_3 (0x08U << ADC_SQR2_SQ6_Pos) /*!< 0x00000200 */ -#define ADC_SQR2_SQ6_4 (0x10U << ADC_SQR2_SQ6_Pos) /*!< 0x00000400 */ - -#define ADC_SQR2_SQ7_Pos (12U) -#define ADC_SQR2_SQ7_Msk (0x1FU << ADC_SQR2_SQ7_Pos) /*!< 0x0001F000 */ -#define ADC_SQR2_SQ7 ADC_SQR2_SQ7_Msk /*!< ADC group regular sequencer rank 7 */ -#define ADC_SQR2_SQ7_0 (0x01U << ADC_SQR2_SQ7_Pos) /*!< 0x00001000 */ -#define ADC_SQR2_SQ7_1 (0x02U << ADC_SQR2_SQ7_Pos) /*!< 0x00002000 */ -#define ADC_SQR2_SQ7_2 (0x04U << ADC_SQR2_SQ7_Pos) /*!< 0x00004000 */ -#define ADC_SQR2_SQ7_3 (0x08U << ADC_SQR2_SQ7_Pos) /*!< 0x00008000 */ -#define ADC_SQR2_SQ7_4 (0x10U << ADC_SQR2_SQ7_Pos) /*!< 0x00010000 */ - -#define ADC_SQR2_SQ8_Pos (18U) -#define ADC_SQR2_SQ8_Msk (0x1FU << ADC_SQR2_SQ8_Pos) /*!< 0x007C0000 */ -#define ADC_SQR2_SQ8 ADC_SQR2_SQ8_Msk /*!< ADC group regular sequencer rank 8 */ -#define ADC_SQR2_SQ8_0 (0x01U << ADC_SQR2_SQ8_Pos) /*!< 0x00040000 */ -#define ADC_SQR2_SQ8_1 (0x02U << ADC_SQR2_SQ8_Pos) /*!< 0x00080000 */ -#define ADC_SQR2_SQ8_2 (0x04U << ADC_SQR2_SQ8_Pos) /*!< 0x00100000 */ -#define ADC_SQR2_SQ8_3 (0x08U << ADC_SQR2_SQ8_Pos) /*!< 0x00200000 */ -#define ADC_SQR2_SQ8_4 (0x10U << ADC_SQR2_SQ8_Pos) /*!< 0x00400000 */ - -#define ADC_SQR2_SQ9_Pos (24U) -#define ADC_SQR2_SQ9_Msk (0x1FU << ADC_SQR2_SQ9_Pos) /*!< 0x1F000000 */ -#define ADC_SQR2_SQ9 ADC_SQR2_SQ9_Msk /*!< ADC group regular sequencer rank 9 */ -#define ADC_SQR2_SQ9_0 (0x01U << ADC_SQR2_SQ9_Pos) /*!< 0x01000000 */ -#define ADC_SQR2_SQ9_1 (0x02U << ADC_SQR2_SQ9_Pos) /*!< 0x02000000 */ -#define ADC_SQR2_SQ9_2 (0x04U << ADC_SQR2_SQ9_Pos) /*!< 0x04000000 */ -#define ADC_SQR2_SQ9_3 (0x08U << ADC_SQR2_SQ9_Pos) /*!< 0x08000000 */ -#define ADC_SQR2_SQ9_4 (0x10U << ADC_SQR2_SQ9_Pos) /*!< 0x10000000 */ - -/******************** Bit definition for ADC_SQR3 register ******************/ -#define ADC_SQR3_SQ10_Pos (0U) -#define ADC_SQR3_SQ10_Msk (0x1FU << ADC_SQR3_SQ10_Pos) /*!< 0x0000001F */ -#define ADC_SQR3_SQ10 ADC_SQR3_SQ10_Msk /*!< ADC group regular sequencer rank 10 */ -#define ADC_SQR3_SQ10_0 (0x01U << ADC_SQR3_SQ10_Pos) /*!< 0x00000001 */ -#define ADC_SQR3_SQ10_1 (0x02U << ADC_SQR3_SQ10_Pos) /*!< 0x00000002 */ -#define ADC_SQR3_SQ10_2 (0x04U << ADC_SQR3_SQ10_Pos) /*!< 0x00000004 */ -#define ADC_SQR3_SQ10_3 (0x08U << ADC_SQR3_SQ10_Pos) /*!< 0x00000008 */ -#define ADC_SQR3_SQ10_4 (0x10U << ADC_SQR3_SQ10_Pos) /*!< 0x00000010 */ - -#define ADC_SQR3_SQ11_Pos (6U) -#define ADC_SQR3_SQ11_Msk (0x1FU << ADC_SQR3_SQ11_Pos) /*!< 0x000007C0 */ -#define ADC_SQR3_SQ11 ADC_SQR3_SQ11_Msk /*!< ADC group regular sequencer rank 11 */ -#define ADC_SQR3_SQ11_0 (0x01U << ADC_SQR3_SQ11_Pos) /*!< 0x00000040 */ -#define ADC_SQR3_SQ11_1 (0x02U << ADC_SQR3_SQ11_Pos) /*!< 0x00000080 */ -#define ADC_SQR3_SQ11_2 (0x04U << ADC_SQR3_SQ11_Pos) /*!< 0x00000100 */ -#define ADC_SQR3_SQ11_3 (0x08U << ADC_SQR3_SQ11_Pos) /*!< 0x00000200 */ -#define ADC_SQR3_SQ11_4 (0x10U << ADC_SQR3_SQ11_Pos) /*!< 0x00000400 */ - -#define ADC_SQR3_SQ12_Pos (12U) -#define ADC_SQR3_SQ12_Msk (0x1FU << ADC_SQR3_SQ12_Pos) /*!< 0x0001F000 */ -#define ADC_SQR3_SQ12 ADC_SQR3_SQ12_Msk /*!< ADC group regular sequencer rank 12 */ -#define ADC_SQR3_SQ12_0 (0x01U << ADC_SQR3_SQ12_Pos) /*!< 0x00001000 */ -#define ADC_SQR3_SQ12_1 (0x02U << ADC_SQR3_SQ12_Pos) /*!< 0x00002000 */ -#define ADC_SQR3_SQ12_2 (0x04U << ADC_SQR3_SQ12_Pos) /*!< 0x00004000 */ -#define ADC_SQR3_SQ12_3 (0x08U << ADC_SQR3_SQ12_Pos) /*!< 0x00008000 */ -#define ADC_SQR3_SQ12_4 (0x10U << ADC_SQR3_SQ12_Pos) /*!< 0x00010000 */ - -#define ADC_SQR3_SQ13_Pos (18U) -#define ADC_SQR3_SQ13_Msk (0x1FU << ADC_SQR3_SQ13_Pos) /*!< 0x007C0000 */ -#define ADC_SQR3_SQ13 ADC_SQR3_SQ13_Msk /*!< ADC group regular sequencer rank 13 */ -#define ADC_SQR3_SQ13_0 (0x01U << ADC_SQR3_SQ13_Pos) /*!< 0x00040000 */ -#define ADC_SQR3_SQ13_1 (0x02U << ADC_SQR3_SQ13_Pos) /*!< 0x00080000 */ -#define ADC_SQR3_SQ13_2 (0x04U << ADC_SQR3_SQ13_Pos) /*!< 0x00100000 */ -#define ADC_SQR3_SQ13_3 (0x08U << ADC_SQR3_SQ13_Pos) /*!< 0x00200000 */ -#define ADC_SQR3_SQ13_4 (0x10U << ADC_SQR3_SQ13_Pos) /*!< 0x00400000 */ - -#define ADC_SQR3_SQ14_Pos (24U) -#define ADC_SQR3_SQ14_Msk (0x1FU << ADC_SQR3_SQ14_Pos) /*!< 0x1F000000 */ -#define ADC_SQR3_SQ14 ADC_SQR3_SQ14_Msk /*!< ADC group regular sequencer rank 14 */ -#define ADC_SQR3_SQ14_0 (0x01U << ADC_SQR3_SQ14_Pos) /*!< 0x01000000 */ -#define ADC_SQR3_SQ14_1 (0x02U << ADC_SQR3_SQ14_Pos) /*!< 0x02000000 */ -#define ADC_SQR3_SQ14_2 (0x04U << ADC_SQR3_SQ14_Pos) /*!< 0x04000000 */ -#define ADC_SQR3_SQ14_3 (0x08U << ADC_SQR3_SQ14_Pos) /*!< 0x08000000 */ -#define ADC_SQR3_SQ14_4 (0x10U << ADC_SQR3_SQ14_Pos) /*!< 0x10000000 */ - -/******************** Bit definition for ADC_SQR4 register ******************/ -#define ADC_SQR4_SQ15_Pos (0U) -#define ADC_SQR4_SQ15_Msk (0x1FU << ADC_SQR4_SQ15_Pos) /*!< 0x0000001F */ -#define ADC_SQR4_SQ15 ADC_SQR4_SQ15_Msk /*!< ADC group regular sequencer rank 15 */ -#define ADC_SQR4_SQ15_0 (0x01U << ADC_SQR4_SQ15_Pos) /*!< 0x00000001 */ -#define ADC_SQR4_SQ15_1 (0x02U << ADC_SQR4_SQ15_Pos) /*!< 0x00000002 */ -#define ADC_SQR4_SQ15_2 (0x04U << ADC_SQR4_SQ15_Pos) /*!< 0x00000004 */ -#define ADC_SQR4_SQ15_3 (0x08U << ADC_SQR4_SQ15_Pos) /*!< 0x00000008 */ -#define ADC_SQR4_SQ15_4 (0x10U << ADC_SQR4_SQ15_Pos) /*!< 0x00000010 */ - -#define ADC_SQR4_SQ16_Pos (6U) -#define ADC_SQR4_SQ16_Msk (0x1FU << ADC_SQR4_SQ16_Pos) /*!< 0x000007C0 */ -#define ADC_SQR4_SQ16 ADC_SQR4_SQ16_Msk /*!< ADC group regular sequencer rank 16 */ -#define ADC_SQR4_SQ16_0 (0x01U << ADC_SQR4_SQ16_Pos) /*!< 0x00000040 */ -#define ADC_SQR4_SQ16_1 (0x02U << ADC_SQR4_SQ16_Pos) /*!< 0x00000080 */ -#define ADC_SQR4_SQ16_2 (0x04U << ADC_SQR4_SQ16_Pos) /*!< 0x00000100 */ -#define ADC_SQR4_SQ16_3 (0x08U << ADC_SQR4_SQ16_Pos) /*!< 0x00000200 */ -#define ADC_SQR4_SQ16_4 (0x10U << ADC_SQR4_SQ16_Pos) /*!< 0x00000400 */ - -/******************** Bit definition for ADC_DR register ********************/ -#define ADC_DR_RDATA_Pos (0U) -#define ADC_DR_RDATA_Msk (0xFFFFU << ADC_DR_RDATA_Pos) /*!< 0x0000FFFF */ -#define ADC_DR_RDATA ADC_DR_RDATA_Msk /*!< ADC group regular conversion data */ -#define ADC_DR_RDATA_0 (0x0001U << ADC_DR_RDATA_Pos) /*!< 0x00000001 */ -#define ADC_DR_RDATA_1 (0x0002U << ADC_DR_RDATA_Pos) /*!< 0x00000002 */ -#define ADC_DR_RDATA_2 (0x0004U << ADC_DR_RDATA_Pos) /*!< 0x00000004 */ -#define ADC_DR_RDATA_3 (0x0008U << ADC_DR_RDATA_Pos) /*!< 0x00000008 */ -#define ADC_DR_RDATA_4 (0x0010U << ADC_DR_RDATA_Pos) /*!< 0x00000010 */ -#define ADC_DR_RDATA_5 (0x0020U << ADC_DR_RDATA_Pos) /*!< 0x00000020 */ -#define ADC_DR_RDATA_6 (0x0040U << ADC_DR_RDATA_Pos) /*!< 0x00000040 */ -#define ADC_DR_RDATA_7 (0x0080U << ADC_DR_RDATA_Pos) /*!< 0x00000080 */ -#define ADC_DR_RDATA_8 (0x0100U << ADC_DR_RDATA_Pos) /*!< 0x00000100 */ -#define ADC_DR_RDATA_9 (0x0200U << ADC_DR_RDATA_Pos) /*!< 0x00000200 */ -#define ADC_DR_RDATA_10 (0x0400U << ADC_DR_RDATA_Pos) /*!< 0x00000400 */ -#define ADC_DR_RDATA_11 (0x0800U << ADC_DR_RDATA_Pos) /*!< 0x00000800 */ -#define ADC_DR_RDATA_12 (0x1000U << ADC_DR_RDATA_Pos) /*!< 0x00001000 */ -#define ADC_DR_RDATA_13 (0x2000U << ADC_DR_RDATA_Pos) /*!< 0x00002000 */ -#define ADC_DR_RDATA_14 (0x4000U << ADC_DR_RDATA_Pos) /*!< 0x00004000 */ -#define ADC_DR_RDATA_15 (0x8000U << ADC_DR_RDATA_Pos) /*!< 0x00008000 */ - -/******************** Bit definition for ADC_JSQR register ******************/ -#define ADC_JSQR_JL_Pos (0U) -#define ADC_JSQR_JL_Msk (0x3U << ADC_JSQR_JL_Pos) /*!< 0x00000003 */ -#define ADC_JSQR_JL ADC_JSQR_JL_Msk /*!< ADC group injected sequencer scan length */ -#define ADC_JSQR_JL_0 (0x1U << ADC_JSQR_JL_Pos) /*!< 0x00000001 */ -#define ADC_JSQR_JL_1 (0x2U << ADC_JSQR_JL_Pos) /*!< 0x00000002 */ - -#define ADC_JSQR_JEXTSEL_Pos (2U) -#define ADC_JSQR_JEXTSEL_Msk (0xFU << ADC_JSQR_JEXTSEL_Pos) /*!< 0x0000003C */ -#define ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_Msk /*!< ADC group injected external trigger source */ -#define ADC_JSQR_JEXTSEL_0 (0x1U << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000004 */ -#define ADC_JSQR_JEXTSEL_1 (0x2U << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000008 */ -#define ADC_JSQR_JEXTSEL_2 (0x4U << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000010 */ -#define ADC_JSQR_JEXTSEL_3 (0x8U << ADC_JSQR_JEXTSEL_Pos) /*!< 0x00000020 */ - -#define ADC_JSQR_JEXTEN_Pos (6U) -#define ADC_JSQR_JEXTEN_Msk (0x3U << ADC_JSQR_JEXTEN_Pos) /*!< 0x000000C0 */ -#define ADC_JSQR_JEXTEN ADC_JSQR_JEXTEN_Msk /*!< ADC group injected external trigger polarity */ -#define ADC_JSQR_JEXTEN_0 (0x1U << ADC_JSQR_JEXTEN_Pos) /*!< 0x00000040 */ -#define ADC_JSQR_JEXTEN_1 (0x2U << ADC_JSQR_JEXTEN_Pos) /*!< 0x00000080 */ - -#define ADC_JSQR_JSQ1_Pos (8U) -#define ADC_JSQR_JSQ1_Msk (0x1FU << ADC_JSQR_JSQ1_Pos) /*!< 0x00001F00 */ -#define ADC_JSQR_JSQ1 ADC_JSQR_JSQ1_Msk /*!< ADC group injected sequencer rank 1 */ -#define ADC_JSQR_JSQ1_0 (0x01U << ADC_JSQR_JSQ1_Pos) /*!< 0x00000100 */ -#define ADC_JSQR_JSQ1_1 (0x02U << ADC_JSQR_JSQ1_Pos) /*!< 0x00000200 */ -#define ADC_JSQR_JSQ1_2 (0x04U << ADC_JSQR_JSQ1_Pos) /*!< 0x00000400 */ -#define ADC_JSQR_JSQ1_3 (0x08U << ADC_JSQR_JSQ1_Pos) /*!< 0x00000800 */ -#define ADC_JSQR_JSQ1_4 (0x10U << ADC_JSQR_JSQ1_Pos) /*!< 0x00001000 */ - -#define ADC_JSQR_JSQ2_Pos (14U) -#define ADC_JSQR_JSQ2_Msk (0x1FU << ADC_JSQR_JSQ2_Pos) /*!< 0x0007C000 */ -#define ADC_JSQR_JSQ2 ADC_JSQR_JSQ2_Msk /*!< ADC group injected sequencer rank 2 */ -#define ADC_JSQR_JSQ2_0 (0x01U << ADC_JSQR_JSQ2_Pos) /*!< 0x00004000 */ -#define ADC_JSQR_JSQ2_1 (0x02U << ADC_JSQR_JSQ2_Pos) /*!< 0x00008000 */ -#define ADC_JSQR_JSQ2_2 (0x04U << ADC_JSQR_JSQ2_Pos) /*!< 0x00010000 */ -#define ADC_JSQR_JSQ2_3 (0x08U << ADC_JSQR_JSQ2_Pos) /*!< 0x00020000 */ -#define ADC_JSQR_JSQ2_4 (0x10U << ADC_JSQR_JSQ2_Pos) /*!< 0x00040000 */ - -#define ADC_JSQR_JSQ3_Pos (20U) -#define ADC_JSQR_JSQ3_Msk (0x1FU << ADC_JSQR_JSQ3_Pos) /*!< 0x01F00000 */ -#define ADC_JSQR_JSQ3 ADC_JSQR_JSQ3_Msk /*!< ADC group injected sequencer rank 3 */ -#define ADC_JSQR_JSQ3_0 (0x01U << ADC_JSQR_JSQ3_Pos) /*!< 0x00100000 */ -#define ADC_JSQR_JSQ3_1 (0x02U << ADC_JSQR_JSQ3_Pos) /*!< 0x00200000 */ -#define ADC_JSQR_JSQ3_2 (0x04U << ADC_JSQR_JSQ3_Pos) /*!< 0x00400000 */ -#define ADC_JSQR_JSQ3_3 (0x08U << ADC_JSQR_JSQ3_Pos) /*!< 0x00800000 */ -#define ADC_JSQR_JSQ3_4 (0x10U << ADC_JSQR_JSQ3_Pos) /*!< 0x01000000 */ - -#define ADC_JSQR_JSQ4_Pos (26U) -#define ADC_JSQR_JSQ4_Msk (0x1FU << ADC_JSQR_JSQ4_Pos) /*!< 0x7C000000 */ -#define ADC_JSQR_JSQ4 ADC_JSQR_JSQ4_Msk /*!< ADC group injected sequencer rank 4 */ -#define ADC_JSQR_JSQ4_0 (0x01U << ADC_JSQR_JSQ4_Pos) /*!< 0x04000000 */ -#define ADC_JSQR_JSQ4_1 (0x02U << ADC_JSQR_JSQ4_Pos) /*!< 0x08000000 */ -#define ADC_JSQR_JSQ4_2 (0x04U << ADC_JSQR_JSQ4_Pos) /*!< 0x10000000 */ -#define ADC_JSQR_JSQ4_3 (0x08U << ADC_JSQR_JSQ4_Pos) /*!< 0x20000000 */ -#define ADC_JSQR_JSQ4_4 (0x10U << ADC_JSQR_JSQ4_Pos) /*!< 0x40000000 */ - -/******************** Bit definition for ADC_OFR1 register ******************/ -#define ADC_OFR1_OFFSET1_Pos (0U) -#define ADC_OFR1_OFFSET1_Msk (0xFFFU << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000FFF */ -#define ADC_OFR1_OFFSET1 ADC_OFR1_OFFSET1_Msk /*!< ADC offset number 1 offset level */ -#define ADC_OFR1_OFFSET1_0 (0x001U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000001 */ -#define ADC_OFR1_OFFSET1_1 (0x002U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000002 */ -#define ADC_OFR1_OFFSET1_2 (0x004U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000004 */ -#define ADC_OFR1_OFFSET1_3 (0x008U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000008 */ -#define ADC_OFR1_OFFSET1_4 (0x010U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000010 */ -#define ADC_OFR1_OFFSET1_5 (0x020U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000020 */ -#define ADC_OFR1_OFFSET1_6 (0x040U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000040 */ -#define ADC_OFR1_OFFSET1_7 (0x080U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000080 */ -#define ADC_OFR1_OFFSET1_8 (0x100U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000100 */ -#define ADC_OFR1_OFFSET1_9 (0x200U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000200 */ -#define ADC_OFR1_OFFSET1_10 (0x400U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000400 */ -#define ADC_OFR1_OFFSET1_11 (0x800U << ADC_OFR1_OFFSET1_Pos) /*!< 0x00000800 */ - -#define ADC_OFR1_OFFSET1_CH_Pos (26U) -#define ADC_OFR1_OFFSET1_CH_Msk (0x1FU << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x7C000000 */ -#define ADC_OFR1_OFFSET1_CH ADC_OFR1_OFFSET1_CH_Msk /*!< ADC offset number 1 channel selection */ -#define ADC_OFR1_OFFSET1_CH_0 (0x01U << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x04000000 */ -#define ADC_OFR1_OFFSET1_CH_1 (0x02U << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x08000000 */ -#define ADC_OFR1_OFFSET1_CH_2 (0x04U << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x10000000 */ -#define ADC_OFR1_OFFSET1_CH_3 (0x08U << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x20000000 */ -#define ADC_OFR1_OFFSET1_CH_4 (0x10U << ADC_OFR1_OFFSET1_CH_Pos) /*!< 0x40000000 */ - -#define ADC_OFR1_OFFSET1_EN_Pos (31U) -#define ADC_OFR1_OFFSET1_EN_Msk (0x1U << ADC_OFR1_OFFSET1_EN_Pos) /*!< 0x80000000 */ -#define ADC_OFR1_OFFSET1_EN ADC_OFR1_OFFSET1_EN_Msk /*!< ADC offset number 1 enable */ - -/******************** Bit definition for ADC_OFR2 register ******************/ -#define ADC_OFR2_OFFSET2_Pos (0U) -#define ADC_OFR2_OFFSET2_Msk (0xFFFU << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000FFF */ -#define ADC_OFR2_OFFSET2 ADC_OFR2_OFFSET2_Msk /*!< ADC offset number 2 offset level */ -#define ADC_OFR2_OFFSET2_0 (0x001U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000001 */ -#define ADC_OFR2_OFFSET2_1 (0x002U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000002 */ -#define ADC_OFR2_OFFSET2_2 (0x004U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000004 */ -#define ADC_OFR2_OFFSET2_3 (0x008U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000008 */ -#define ADC_OFR2_OFFSET2_4 (0x010U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000010 */ -#define ADC_OFR2_OFFSET2_5 (0x020U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000020 */ -#define ADC_OFR2_OFFSET2_6 (0x040U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000040 */ -#define ADC_OFR2_OFFSET2_7 (0x080U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000080 */ -#define ADC_OFR2_OFFSET2_8 (0x100U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000100 */ -#define ADC_OFR2_OFFSET2_9 (0x200U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000200 */ -#define ADC_OFR2_OFFSET2_10 (0x400U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000400 */ -#define ADC_OFR2_OFFSET2_11 (0x800U << ADC_OFR2_OFFSET2_Pos) /*!< 0x00000800 */ - -#define ADC_OFR2_OFFSET2_CH_Pos (26U) -#define ADC_OFR2_OFFSET2_CH_Msk (0x1FU << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x7C000000 */ -#define ADC_OFR2_OFFSET2_CH ADC_OFR2_OFFSET2_CH_Msk /*!< ADC offset number 2 channel selection */ -#define ADC_OFR2_OFFSET2_CH_0 (0x01U << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x04000000 */ -#define ADC_OFR2_OFFSET2_CH_1 (0x02U << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x08000000 */ -#define ADC_OFR2_OFFSET2_CH_2 (0x04U << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x10000000 */ -#define ADC_OFR2_OFFSET2_CH_3 (0x08U << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x20000000 */ -#define ADC_OFR2_OFFSET2_CH_4 (0x10U << ADC_OFR2_OFFSET2_CH_Pos) /*!< 0x40000000 */ - -#define ADC_OFR2_OFFSET2_EN_Pos (31U) -#define ADC_OFR2_OFFSET2_EN_Msk (0x1U << ADC_OFR2_OFFSET2_EN_Pos) /*!< 0x80000000 */ -#define ADC_OFR2_OFFSET2_EN ADC_OFR2_OFFSET2_EN_Msk /*!< ADC offset number 2 enable */ - -/******************** Bit definition for ADC_OFR3 register ******************/ -#define ADC_OFR3_OFFSET3_Pos (0U) -#define ADC_OFR3_OFFSET3_Msk (0xFFFU << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000FFF */ -#define ADC_OFR3_OFFSET3 ADC_OFR3_OFFSET3_Msk /*!< ADC offset number 3 offset level */ -#define ADC_OFR3_OFFSET3_0 (0x001U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000001 */ -#define ADC_OFR3_OFFSET3_1 (0x002U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000002 */ -#define ADC_OFR3_OFFSET3_2 (0x004U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000004 */ -#define ADC_OFR3_OFFSET3_3 (0x008U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000008 */ -#define ADC_OFR3_OFFSET3_4 (0x010U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000010 */ -#define ADC_OFR3_OFFSET3_5 (0x020U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000020 */ -#define ADC_OFR3_OFFSET3_6 (0x040U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000040 */ -#define ADC_OFR3_OFFSET3_7 (0x080U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000080 */ -#define ADC_OFR3_OFFSET3_8 (0x100U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000100 */ -#define ADC_OFR3_OFFSET3_9 (0x200U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000200 */ -#define ADC_OFR3_OFFSET3_10 (0x400U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000400 */ -#define ADC_OFR3_OFFSET3_11 (0x800U << ADC_OFR3_OFFSET3_Pos) /*!< 0x00000800 */ - -#define ADC_OFR3_OFFSET3_CH_Pos (26U) -#define ADC_OFR3_OFFSET3_CH_Msk (0x1FU << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x7C000000 */ -#define ADC_OFR3_OFFSET3_CH ADC_OFR3_OFFSET3_CH_Msk /*!< ADC offset number 3 channel selection */ -#define ADC_OFR3_OFFSET3_CH_0 (0x01U << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x04000000 */ -#define ADC_OFR3_OFFSET3_CH_1 (0x02U << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x08000000 */ -#define ADC_OFR3_OFFSET3_CH_2 (0x04U << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x10000000 */ -#define ADC_OFR3_OFFSET3_CH_3 (0x08U << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x20000000 */ -#define ADC_OFR3_OFFSET3_CH_4 (0x10U << ADC_OFR3_OFFSET3_CH_Pos) /*!< 0x40000000 */ - -#define ADC_OFR3_OFFSET3_EN_Pos (31U) -#define ADC_OFR3_OFFSET3_EN_Msk (0x1U << ADC_OFR3_OFFSET3_EN_Pos) /*!< 0x80000000 */ -#define ADC_OFR3_OFFSET3_EN ADC_OFR3_OFFSET3_EN_Msk /*!< ADC offset number 3 enable */ - -/******************** Bit definition for ADC_OFR4 register ******************/ -#define ADC_OFR4_OFFSET4_Pos (0U) -#define ADC_OFR4_OFFSET4_Msk (0xFFFU << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000FFF */ -#define ADC_OFR4_OFFSET4 ADC_OFR4_OFFSET4_Msk /*!< ADC offset number 4 offset level */ -#define ADC_OFR4_OFFSET4_0 (0x001U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000001 */ -#define ADC_OFR4_OFFSET4_1 (0x002U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000002 */ -#define ADC_OFR4_OFFSET4_2 (0x004U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000004 */ -#define ADC_OFR4_OFFSET4_3 (0x008U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000008 */ -#define ADC_OFR4_OFFSET4_4 (0x010U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000010 */ -#define ADC_OFR4_OFFSET4_5 (0x020U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000020 */ -#define ADC_OFR4_OFFSET4_6 (0x040U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000040 */ -#define ADC_OFR4_OFFSET4_7 (0x080U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000080 */ -#define ADC_OFR4_OFFSET4_8 (0x100U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000100 */ -#define ADC_OFR4_OFFSET4_9 (0x200U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000200 */ -#define ADC_OFR4_OFFSET4_10 (0x400U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000400 */ -#define ADC_OFR4_OFFSET4_11 (0x800U << ADC_OFR4_OFFSET4_Pos) /*!< 0x00000800 */ - -#define ADC_OFR4_OFFSET4_CH_Pos (26U) -#define ADC_OFR4_OFFSET4_CH_Msk (0x1FU << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x7C000000 */ -#define ADC_OFR4_OFFSET4_CH ADC_OFR4_OFFSET4_CH_Msk /*!< ADC offset number 4 channel selection */ -#define ADC_OFR4_OFFSET4_CH_0 (0x01U << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x04000000 */ -#define ADC_OFR4_OFFSET4_CH_1 (0x02U << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x08000000 */ -#define ADC_OFR4_OFFSET4_CH_2 (0x04U << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x10000000 */ -#define ADC_OFR4_OFFSET4_CH_3 (0x08U << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x20000000 */ -#define ADC_OFR4_OFFSET4_CH_4 (0x10U << ADC_OFR4_OFFSET4_CH_Pos) /*!< 0x40000000 */ - -#define ADC_OFR4_OFFSET4_EN_Pos (31U) -#define ADC_OFR4_OFFSET4_EN_Msk (0x1U << ADC_OFR4_OFFSET4_EN_Pos) /*!< 0x80000000 */ -#define ADC_OFR4_OFFSET4_EN ADC_OFR4_OFFSET4_EN_Msk /*!< ADC offset number 4 enable */ - -/******************** Bit definition for ADC_JDR1 register ******************/ -#define ADC_JDR1_JDATA_Pos (0U) -#define ADC_JDR1_JDATA_Msk (0xFFFFU << ADC_JDR1_JDATA_Pos) /*!< 0x0000FFFF */ -#define ADC_JDR1_JDATA ADC_JDR1_JDATA_Msk /*!< ADC group injected sequencer rank 1 conversion data */ -#define ADC_JDR1_JDATA_0 (0x0001U << ADC_JDR1_JDATA_Pos) /*!< 0x00000001 */ -#define ADC_JDR1_JDATA_1 (0x0002U << ADC_JDR1_JDATA_Pos) /*!< 0x00000002 */ -#define ADC_JDR1_JDATA_2 (0x0004U << ADC_JDR1_JDATA_Pos) /*!< 0x00000004 */ -#define ADC_JDR1_JDATA_3 (0x0008U << ADC_JDR1_JDATA_Pos) /*!< 0x00000008 */ -#define ADC_JDR1_JDATA_4 (0x0010U << ADC_JDR1_JDATA_Pos) /*!< 0x00000010 */ -#define ADC_JDR1_JDATA_5 (0x0020U << ADC_JDR1_JDATA_Pos) /*!< 0x00000020 */ -#define ADC_JDR1_JDATA_6 (0x0040U << ADC_JDR1_JDATA_Pos) /*!< 0x00000040 */ -#define ADC_JDR1_JDATA_7 (0x0080U << ADC_JDR1_JDATA_Pos) /*!< 0x00000080 */ -#define ADC_JDR1_JDATA_8 (0x0100U << ADC_JDR1_JDATA_Pos) /*!< 0x00000100 */ -#define ADC_JDR1_JDATA_9 (0x0200U << ADC_JDR1_JDATA_Pos) /*!< 0x00000200 */ -#define ADC_JDR1_JDATA_10 (0x0400U << ADC_JDR1_JDATA_Pos) /*!< 0x00000400 */ -#define ADC_JDR1_JDATA_11 (0x0800U << ADC_JDR1_JDATA_Pos) /*!< 0x00000800 */ -#define ADC_JDR1_JDATA_12 (0x1000U << ADC_JDR1_JDATA_Pos) /*!< 0x00001000 */ -#define ADC_JDR1_JDATA_13 (0x2000U << ADC_JDR1_JDATA_Pos) /*!< 0x00002000 */ -#define ADC_JDR1_JDATA_14 (0x4000U << ADC_JDR1_JDATA_Pos) /*!< 0x00004000 */ -#define ADC_JDR1_JDATA_15 (0x8000U << ADC_JDR1_JDATA_Pos) /*!< 0x00008000 */ - -/******************** Bit definition for ADC_JDR2 register ******************/ -#define ADC_JDR2_JDATA_Pos (0U) -#define ADC_JDR2_JDATA_Msk (0xFFFFU << ADC_JDR2_JDATA_Pos) /*!< 0x0000FFFF */ -#define ADC_JDR2_JDATA ADC_JDR2_JDATA_Msk /*!< ADC group injected sequencer rank 2 conversion data */ -#define ADC_JDR2_JDATA_0 (0x0001U << ADC_JDR2_JDATA_Pos) /*!< 0x00000001 */ -#define ADC_JDR2_JDATA_1 (0x0002U << ADC_JDR2_JDATA_Pos) /*!< 0x00000002 */ -#define ADC_JDR2_JDATA_2 (0x0004U << ADC_JDR2_JDATA_Pos) /*!< 0x00000004 */ -#define ADC_JDR2_JDATA_3 (0x0008U << ADC_JDR2_JDATA_Pos) /*!< 0x00000008 */ -#define ADC_JDR2_JDATA_4 (0x0010U << ADC_JDR2_JDATA_Pos) /*!< 0x00000010 */ -#define ADC_JDR2_JDATA_5 (0x0020U << ADC_JDR2_JDATA_Pos) /*!< 0x00000020 */ -#define ADC_JDR2_JDATA_6 (0x0040U << ADC_JDR2_JDATA_Pos) /*!< 0x00000040 */ -#define ADC_JDR2_JDATA_7 (0x0080U << ADC_JDR2_JDATA_Pos) /*!< 0x00000080 */ -#define ADC_JDR2_JDATA_8 (0x0100U << ADC_JDR2_JDATA_Pos) /*!< 0x00000100 */ -#define ADC_JDR2_JDATA_9 (0x0200U << ADC_JDR2_JDATA_Pos) /*!< 0x00000200 */ -#define ADC_JDR2_JDATA_10 (0x0400U << ADC_JDR2_JDATA_Pos) /*!< 0x00000400 */ -#define ADC_JDR2_JDATA_11 (0x0800U << ADC_JDR2_JDATA_Pos) /*!< 0x00000800 */ -#define ADC_JDR2_JDATA_12 (0x1000U << ADC_JDR2_JDATA_Pos) /*!< 0x00001000 */ -#define ADC_JDR2_JDATA_13 (0x2000U << ADC_JDR2_JDATA_Pos) /*!< 0x00002000 */ -#define ADC_JDR2_JDATA_14 (0x4000U << ADC_JDR2_JDATA_Pos) /*!< 0x00004000 */ -#define ADC_JDR2_JDATA_15 (0x8000U << ADC_JDR2_JDATA_Pos) /*!< 0x00008000 */ - -/******************** Bit definition for ADC_JDR3 register ******************/ -#define ADC_JDR3_JDATA_Pos (0U) -#define ADC_JDR3_JDATA_Msk (0xFFFFU << ADC_JDR3_JDATA_Pos) /*!< 0x0000FFFF */ -#define ADC_JDR3_JDATA ADC_JDR3_JDATA_Msk /*!< ADC group injected sequencer rank 3 conversion data */ -#define ADC_JDR3_JDATA_0 (0x0001U << ADC_JDR3_JDATA_Pos) /*!< 0x00000001 */ -#define ADC_JDR3_JDATA_1 (0x0002U << ADC_JDR3_JDATA_Pos) /*!< 0x00000002 */ -#define ADC_JDR3_JDATA_2 (0x0004U << ADC_JDR3_JDATA_Pos) /*!< 0x00000004 */ -#define ADC_JDR3_JDATA_3 (0x0008U << ADC_JDR3_JDATA_Pos) /*!< 0x00000008 */ -#define ADC_JDR3_JDATA_4 (0x0010U << ADC_JDR3_JDATA_Pos) /*!< 0x00000010 */ -#define ADC_JDR3_JDATA_5 (0x0020U << ADC_JDR3_JDATA_Pos) /*!< 0x00000020 */ -#define ADC_JDR3_JDATA_6 (0x0040U << ADC_JDR3_JDATA_Pos) /*!< 0x00000040 */ -#define ADC_JDR3_JDATA_7 (0x0080U << ADC_JDR3_JDATA_Pos) /*!< 0x00000080 */ -#define ADC_JDR3_JDATA_8 (0x0100U << ADC_JDR3_JDATA_Pos) /*!< 0x00000100 */ -#define ADC_JDR3_JDATA_9 (0x0200U << ADC_JDR3_JDATA_Pos) /*!< 0x00000200 */ -#define ADC_JDR3_JDATA_10 (0x0400U << ADC_JDR3_JDATA_Pos) /*!< 0x00000400 */ -#define ADC_JDR3_JDATA_11 (0x0800U << ADC_JDR3_JDATA_Pos) /*!< 0x00000800 */ -#define ADC_JDR3_JDATA_12 (0x1000U << ADC_JDR3_JDATA_Pos) /*!< 0x00001000 */ -#define ADC_JDR3_JDATA_13 (0x2000U << ADC_JDR3_JDATA_Pos) /*!< 0x00002000 */ -#define ADC_JDR3_JDATA_14 (0x4000U << ADC_JDR3_JDATA_Pos) /*!< 0x00004000 */ -#define ADC_JDR3_JDATA_15 (0x8000U << ADC_JDR3_JDATA_Pos) /*!< 0x00008000 */ - -/******************** Bit definition for ADC_JDR4 register ******************/ -#define ADC_JDR4_JDATA_Pos (0U) -#define ADC_JDR4_JDATA_Msk (0xFFFFU << ADC_JDR4_JDATA_Pos) /*!< 0x0000FFFF */ -#define ADC_JDR4_JDATA ADC_JDR4_JDATA_Msk /*!< ADC group injected sequencer rank 4 conversion data */ -#define ADC_JDR4_JDATA_0 (0x0001U << ADC_JDR4_JDATA_Pos) /*!< 0x00000001 */ -#define ADC_JDR4_JDATA_1 (0x0002U << ADC_JDR4_JDATA_Pos) /*!< 0x00000002 */ -#define ADC_JDR4_JDATA_2 (0x0004U << ADC_JDR4_JDATA_Pos) /*!< 0x00000004 */ -#define ADC_JDR4_JDATA_3 (0x0008U << ADC_JDR4_JDATA_Pos) /*!< 0x00000008 */ -#define ADC_JDR4_JDATA_4 (0x0010U << ADC_JDR4_JDATA_Pos) /*!< 0x00000010 */ -#define ADC_JDR4_JDATA_5 (0x0020U << ADC_JDR4_JDATA_Pos) /*!< 0x00000020 */ -#define ADC_JDR4_JDATA_6 (0x0040U << ADC_JDR4_JDATA_Pos) /*!< 0x00000040 */ -#define ADC_JDR4_JDATA_7 (0x0080U << ADC_JDR4_JDATA_Pos) /*!< 0x00000080 */ -#define ADC_JDR4_JDATA_8 (0x0100U << ADC_JDR4_JDATA_Pos) /*!< 0x00000100 */ -#define ADC_JDR4_JDATA_9 (0x0200U << ADC_JDR4_JDATA_Pos) /*!< 0x00000200 */ -#define ADC_JDR4_JDATA_10 (0x0400U << ADC_JDR4_JDATA_Pos) /*!< 0x00000400 */ -#define ADC_JDR4_JDATA_11 (0x0800U << ADC_JDR4_JDATA_Pos) /*!< 0x00000800 */ -#define ADC_JDR4_JDATA_12 (0x1000U << ADC_JDR4_JDATA_Pos) /*!< 0x00001000 */ -#define ADC_JDR4_JDATA_13 (0x2000U << ADC_JDR4_JDATA_Pos) /*!< 0x00002000 */ -#define ADC_JDR4_JDATA_14 (0x4000U << ADC_JDR4_JDATA_Pos) /*!< 0x00004000 */ -#define ADC_JDR4_JDATA_15 (0x8000U << ADC_JDR4_JDATA_Pos) /*!< 0x00008000 */ - -/******************** Bit definition for ADC_AWD2CR register ****************/ -#define ADC_AWD2CR_AWD2CH_Pos (0U) -#define ADC_AWD2CR_AWD2CH_Msk (0x7FFFFU << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x0007FFFF */ -#define ADC_AWD2CR_AWD2CH ADC_AWD2CR_AWD2CH_Msk /*!< ADC analog watchdog 2 monitored channel selection */ -#define ADC_AWD2CR_AWD2CH_0 (0x00001U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ -#define ADC_AWD2CR_AWD2CH_1 (0x00002U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000002 */ -#define ADC_AWD2CR_AWD2CH_2 (0x00004U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000004 */ -#define ADC_AWD2CR_AWD2CH_3 (0x00008U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000008 */ -#define ADC_AWD2CR_AWD2CH_4 (0x00010U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000010 */ -#define ADC_AWD2CR_AWD2CH_5 (0x00020U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000020 */ -#define ADC_AWD2CR_AWD2CH_6 (0x00040U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000040 */ -#define ADC_AWD2CR_AWD2CH_7 (0x00080U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000080 */ -#define ADC_AWD2CR_AWD2CH_8 (0x00100U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000100 */ -#define ADC_AWD2CR_AWD2CH_9 (0x00200U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000200 */ -#define ADC_AWD2CR_AWD2CH_10 (0x00400U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000400 */ -#define ADC_AWD2CR_AWD2CH_11 (0x00800U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000800 */ -#define ADC_AWD2CR_AWD2CH_12 (0x01000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00001000 */ -#define ADC_AWD2CR_AWD2CH_13 (0x02000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00002000 */ -#define ADC_AWD2CR_AWD2CH_14 (0x04000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00004000 */ -#define ADC_AWD2CR_AWD2CH_15 (0x08000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00008000 */ -#define ADC_AWD2CR_AWD2CH_16 (0x10000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00010000 */ -#define ADC_AWD2CR_AWD2CH_17 (0x20000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00020000 */ -#define ADC_AWD2CR_AWD2CH_18 (0x40000U << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00040000 */ - -/******************** Bit definition for ADC_AWD3CR register ****************/ -#define ADC_AWD3CR_AWD3CH_Pos (0U) -#define ADC_AWD3CR_AWD3CH_Msk (0x7FFFFU << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x0007FFFF */ -#define ADC_AWD3CR_AWD3CH ADC_AWD3CR_AWD3CH_Msk /*!< ADC analog watchdog 3 monitored channel selection */ -#define ADC_AWD3CR_AWD3CH_0 (0x00001U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000001 */ -#define ADC_AWD3CR_AWD3CH_1 (0x00002U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000002 */ -#define ADC_AWD3CR_AWD3CH_2 (0x00004U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000004 */ -#define ADC_AWD3CR_AWD3CH_3 (0x00008U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000008 */ -#define ADC_AWD3CR_AWD3CH_4 (0x00010U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000010 */ -#define ADC_AWD3CR_AWD3CH_5 (0x00020U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000020 */ -#define ADC_AWD3CR_AWD3CH_6 (0x00040U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000040 */ -#define ADC_AWD3CR_AWD3CH_7 (0x00080U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000080 */ -#define ADC_AWD3CR_AWD3CH_8 (0x00100U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000100 */ -#define ADC_AWD3CR_AWD3CH_9 (0x00200U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000200 */ -#define ADC_AWD3CR_AWD3CH_10 (0x00400U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000400 */ -#define ADC_AWD3CR_AWD3CH_11 (0x00800U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00000800 */ -#define ADC_AWD3CR_AWD3CH_12 (0x01000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00001000 */ -#define ADC_AWD3CR_AWD3CH_13 (0x02000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00002000 */ -#define ADC_AWD3CR_AWD3CH_14 (0x04000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00004000 */ -#define ADC_AWD3CR_AWD3CH_15 (0x08000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00008000 */ -#define ADC_AWD3CR_AWD3CH_16 (0x10000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00010000 */ -#define ADC_AWD3CR_AWD3CH_17 (0x20000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00020000 */ -#define ADC_AWD3CR_AWD3CH_18 (0x40000U << ADC_AWD3CR_AWD3CH_Pos) /*!< 0x00040000 */ - -/******************** Bit definition for ADC_DIFSEL register ****************/ -#define ADC_DIFSEL_DIFSEL_Pos (0U) -#define ADC_DIFSEL_DIFSEL_Msk (0x7FFFFU << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x0007FFFF */ -#define ADC_DIFSEL_DIFSEL ADC_DIFSEL_DIFSEL_Msk /*!< ADC channel differential or single-ended mode */ -#define ADC_DIFSEL_DIFSEL_0 (0x00001U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000001 */ -#define ADC_DIFSEL_DIFSEL_1 (0x00002U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000002 */ -#define ADC_DIFSEL_DIFSEL_2 (0x00004U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000004 */ -#define ADC_DIFSEL_DIFSEL_3 (0x00008U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000008 */ -#define ADC_DIFSEL_DIFSEL_4 (0x00010U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000010 */ -#define ADC_DIFSEL_DIFSEL_5 (0x00020U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000020 */ -#define ADC_DIFSEL_DIFSEL_6 (0x00040U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000040 */ -#define ADC_DIFSEL_DIFSEL_7 (0x00080U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000080 */ -#define ADC_DIFSEL_DIFSEL_8 (0x00100U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000100 */ -#define ADC_DIFSEL_DIFSEL_9 (0x00200U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000200 */ -#define ADC_DIFSEL_DIFSEL_10 (0x00400U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000400 */ -#define ADC_DIFSEL_DIFSEL_11 (0x00800U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00000800 */ -#define ADC_DIFSEL_DIFSEL_12 (0x01000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00001000 */ -#define ADC_DIFSEL_DIFSEL_13 (0x02000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00002000 */ -#define ADC_DIFSEL_DIFSEL_14 (0x04000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00004000 */ -#define ADC_DIFSEL_DIFSEL_15 (0x08000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00008000 */ -#define ADC_DIFSEL_DIFSEL_16 (0x10000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00010000 */ -#define ADC_DIFSEL_DIFSEL_17 (0x20000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00020000 */ -#define ADC_DIFSEL_DIFSEL_18 (0x40000U << ADC_DIFSEL_DIFSEL_Pos) /*!< 0x00040000 */ - -/******************** Bit definition for ADC_CALFACT register ***************/ -#define ADC_CALFACT_CALFACT_S_Pos (0U) -#define ADC_CALFACT_CALFACT_S_Msk (0x7FU << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x0000007F */ -#define ADC_CALFACT_CALFACT_S ADC_CALFACT_CALFACT_S_Msk /*!< ADC calibration factor in single-ended mode */ -#define ADC_CALFACT_CALFACT_S_0 (0x01U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000001 */ -#define ADC_CALFACT_CALFACT_S_1 (0x02U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000002 */ -#define ADC_CALFACT_CALFACT_S_2 (0x04U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000004 */ -#define ADC_CALFACT_CALFACT_S_3 (0x08U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000008 */ -#define ADC_CALFACT_CALFACT_S_4 (0x10U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000010 */ -#define ADC_CALFACT_CALFACT_S_5 (0x20U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000020 */ -#define ADC_CALFACT_CALFACT_S_6 (0x40U << ADC_CALFACT_CALFACT_S_Pos) /*!< 0x00000040 */ - -#define ADC_CALFACT_CALFACT_D_Pos (16U) -#define ADC_CALFACT_CALFACT_D_Msk (0x7FU << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x007F0000 */ -#define ADC_CALFACT_CALFACT_D ADC_CALFACT_CALFACT_D_Msk /*!< ADC calibration factor in differential mode */ -#define ADC_CALFACT_CALFACT_D_0 (0x01U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00010000 */ -#define ADC_CALFACT_CALFACT_D_1 (0x02U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00020000 */ -#define ADC_CALFACT_CALFACT_D_2 (0x04U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00040000 */ -#define ADC_CALFACT_CALFACT_D_3 (0x08U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00080000 */ -#define ADC_CALFACT_CALFACT_D_4 (0x10U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00100000 */ -#define ADC_CALFACT_CALFACT_D_5 (0x20U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00200000 */ -#define ADC_CALFACT_CALFACT_D_6 (0x40U << ADC_CALFACT_CALFACT_D_Pos) /*!< 0x00400000 */ - -/************************* ADC Common registers *****************************/ -/******************** Bit definition for ADC_CSR register *******************/ -#define ADC_CSR_ADRDY_MST_Pos (0U) -#define ADC_CSR_ADRDY_MST_Msk (0x1U << ADC_CSR_ADRDY_MST_Pos) /*!< 0x00000001 */ -#define ADC_CSR_ADRDY_MST ADC_CSR_ADRDY_MST_Msk /*!< ADC multimode master ready flag */ -#define ADC_CSR_EOSMP_MST_Pos (1U) -#define ADC_CSR_EOSMP_MST_Msk (0x1U << ADC_CSR_EOSMP_MST_Pos) /*!< 0x00000002 */ -#define ADC_CSR_EOSMP_MST ADC_CSR_EOSMP_MST_Msk /*!< ADC multimode master group regular end of sampling flag */ -#define ADC_CSR_EOC_MST_Pos (2U) -#define ADC_CSR_EOC_MST_Msk (0x1U << ADC_CSR_EOC_MST_Pos) /*!< 0x00000004 */ -#define ADC_CSR_EOC_MST ADC_CSR_EOC_MST_Msk /*!< ADC multimode master group regular end of unitary conversion flag */ -#define ADC_CSR_EOS_MST_Pos (3U) -#define ADC_CSR_EOS_MST_Msk (0x1U << ADC_CSR_EOS_MST_Pos) /*!< 0x00000008 */ -#define ADC_CSR_EOS_MST ADC_CSR_EOS_MST_Msk /*!< ADC multimode master group regular end of sequence conversions flag */ -#define ADC_CSR_OVR_MST_Pos (4U) -#define ADC_CSR_OVR_MST_Msk (0x1U << ADC_CSR_OVR_MST_Pos) /*!< 0x00000010 */ -#define ADC_CSR_OVR_MST ADC_CSR_OVR_MST_Msk /*!< ADC multimode master group regular overrun flag */ -#define ADC_CSR_JEOC_MST_Pos (5U) -#define ADC_CSR_JEOC_MST_Msk (0x1U << ADC_CSR_JEOC_MST_Pos) /*!< 0x00000020 */ -#define ADC_CSR_JEOC_MST ADC_CSR_JEOC_MST_Msk /*!< ADC multimode master group injected end of unitary conversion flag */ -#define ADC_CSR_JEOS_MST_Pos (6U) -#define ADC_CSR_JEOS_MST_Msk (0x1U << ADC_CSR_JEOS_MST_Pos) /*!< 0x00000040 */ -#define ADC_CSR_JEOS_MST ADC_CSR_JEOS_MST_Msk /*!< ADC multimode master group injected end of sequence conversions flag */ -#define ADC_CSR_AWD1_MST_Pos (7U) -#define ADC_CSR_AWD1_MST_Msk (0x1U << ADC_CSR_AWD1_MST_Pos) /*!< 0x00000080 */ -#define ADC_CSR_AWD1_MST ADC_CSR_AWD1_MST_Msk /*!< ADC multimode master analog watchdog 1 flag */ -#define ADC_CSR_AWD2_MST_Pos (8U) -#define ADC_CSR_AWD2_MST_Msk (0x1U << ADC_CSR_AWD2_MST_Pos) /*!< 0x00000100 */ -#define ADC_CSR_AWD2_MST ADC_CSR_AWD2_MST_Msk /*!< ADC multimode master analog watchdog 2 flag */ -#define ADC_CSR_AWD3_MST_Pos (9U) -#define ADC_CSR_AWD3_MST_Msk (0x1U << ADC_CSR_AWD3_MST_Pos) /*!< 0x00000200 */ -#define ADC_CSR_AWD3_MST ADC_CSR_AWD3_MST_Msk /*!< ADC multimode master analog watchdog 3 flag */ -#define ADC_CSR_JQOVF_MST_Pos (10U) -#define ADC_CSR_JQOVF_MST_Msk (0x1U << ADC_CSR_JQOVF_MST_Pos) /*!< 0x00000400 */ -#define ADC_CSR_JQOVF_MST ADC_CSR_JQOVF_MST_Msk /*!< ADC multimode master group injected contexts queue overflow flag */ - -#define ADC_CSR_ADRDY_SLV_Pos (16U) -#define ADC_CSR_ADRDY_SLV_Msk (0x1U << ADC_CSR_ADRDY_SLV_Pos) /*!< 0x00010000 */ -#define ADC_CSR_ADRDY_SLV ADC_CSR_ADRDY_SLV_Msk /*!< ADC multimode slave ready flag */ -#define ADC_CSR_EOSMP_SLV_Pos (17U) -#define ADC_CSR_EOSMP_SLV_Msk (0x1U << ADC_CSR_EOSMP_SLV_Pos) /*!< 0x00020000 */ -#define ADC_CSR_EOSMP_SLV ADC_CSR_EOSMP_SLV_Msk /*!< ADC multimode slave group regular end of sampling flag */ -#define ADC_CSR_EOC_SLV_Pos (18U) -#define ADC_CSR_EOC_SLV_Msk (0x1U << ADC_CSR_EOC_SLV_Pos) /*!< 0x00040000 */ -#define ADC_CSR_EOC_SLV ADC_CSR_EOC_SLV_Msk /*!< ADC multimode slave group regular end of unitary conversion flag */ -#define ADC_CSR_EOS_SLV_Pos (19U) -#define ADC_CSR_EOS_SLV_Msk (0x1U << ADC_CSR_EOS_SLV_Pos) /*!< 0x00080000 */ -#define ADC_CSR_EOS_SLV ADC_CSR_EOS_SLV_Msk /*!< ADC multimode slave group regular end of sequence conversions flag */ -#define ADC_CSR_OVR_SLV_Pos (20U) -#define ADC_CSR_OVR_SLV_Msk (0x1U << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */ -#define ADC_CSR_OVR_SLV ADC_CSR_OVR_SLV_Msk /*!< ADC multimode slave group regular overrun flag */ -#define ADC_CSR_JEOC_SLV_Pos (21U) -#define ADC_CSR_JEOC_SLV_Msk (0x1U << ADC_CSR_JEOC_SLV_Pos) /*!< 0x00200000 */ -#define ADC_CSR_JEOC_SLV ADC_CSR_JEOC_SLV_Msk /*!< ADC multimode slave group injected end of unitary conversion flag */ -#define ADC_CSR_JEOS_SLV_Pos (22U) -#define ADC_CSR_JEOS_SLV_Msk (0x1U << ADC_CSR_JEOS_SLV_Pos) /*!< 0x00400000 */ -#define ADC_CSR_JEOS_SLV ADC_CSR_JEOS_SLV_Msk /*!< ADC multimode slave group injected end of sequence conversions flag */ -#define ADC_CSR_AWD1_SLV_Pos (23U) -#define ADC_CSR_AWD1_SLV_Msk (0x1U << ADC_CSR_AWD1_SLV_Pos) /*!< 0x00800000 */ -#define ADC_CSR_AWD1_SLV ADC_CSR_AWD1_SLV_Msk /*!< ADC multimode slave analog watchdog 1 flag */ -#define ADC_CSR_AWD2_SLV_Pos (24U) -#define ADC_CSR_AWD2_SLV_Msk (0x1U << ADC_CSR_AWD2_SLV_Pos) /*!< 0x01000000 */ -#define ADC_CSR_AWD2_SLV ADC_CSR_AWD2_SLV_Msk /*!< ADC multimode slave analog watchdog 2 flag */ -#define ADC_CSR_AWD3_SLV_Pos (25U) -#define ADC_CSR_AWD3_SLV_Msk (0x1U << ADC_CSR_AWD3_SLV_Pos) /*!< 0x02000000 */ -#define ADC_CSR_AWD3_SLV ADC_CSR_AWD3_SLV_Msk /*!< ADC multimode slave analog watchdog 3 flag */ -#define ADC_CSR_JQOVF_SLV_Pos (26U) -#define ADC_CSR_JQOVF_SLV_Msk (0x1U << ADC_CSR_JQOVF_SLV_Pos) /*!< 0x04000000 */ -#define ADC_CSR_JQOVF_SLV ADC_CSR_JQOVF_SLV_Msk /*!< ADC multimode slave group injected contexts queue overflow flag */ - -/******************** Bit definition for ADC_CCR register *******************/ -#define ADC_CCR_DUAL_Pos (0U) -#define ADC_CCR_DUAL_Msk (0x1FU << ADC_CCR_DUAL_Pos) /*!< 0x0000001F */ -#define ADC_CCR_DUAL ADC_CCR_DUAL_Msk /*!< ADC multimode mode selection */ -#define ADC_CCR_DUAL_0 (0x01U << ADC_CCR_DUAL_Pos) /*!< 0x00000001 */ -#define ADC_CCR_DUAL_1 (0x02U << ADC_CCR_DUAL_Pos) /*!< 0x00000002 */ -#define ADC_CCR_DUAL_2 (0x04U << ADC_CCR_DUAL_Pos) /*!< 0x00000004 */ -#define ADC_CCR_DUAL_3 (0x08U << ADC_CCR_DUAL_Pos) /*!< 0x00000008 */ -#define ADC_CCR_DUAL_4 (0x10U << ADC_CCR_DUAL_Pos) /*!< 0x00000010 */ - -#define ADC_CCR_DELAY_Pos (8U) -#define ADC_CCR_DELAY_Msk (0xFU << ADC_CCR_DELAY_Pos) /*!< 0x00000F00 */ -#define ADC_CCR_DELAY ADC_CCR_DELAY_Msk /*!< ADC multimode delay between 2 sampling phases */ -#define ADC_CCR_DELAY_0 (0x1U << ADC_CCR_DELAY_Pos) /*!< 0x00000100 */ -#define ADC_CCR_DELAY_1 (0x2U << ADC_CCR_DELAY_Pos) /*!< 0x00000200 */ -#define ADC_CCR_DELAY_2 (0x4U << ADC_CCR_DELAY_Pos) /*!< 0x00000400 */ -#define ADC_CCR_DELAY_3 (0x8U << ADC_CCR_DELAY_Pos) /*!< 0x00000800 */ - -#define ADC_CCR_DMACFG_Pos (13U) -#define ADC_CCR_DMACFG_Msk (0x1U << ADC_CCR_DMACFG_Pos) /*!< 0x00002000 */ -#define ADC_CCR_DMACFG ADC_CCR_DMACFG_Msk /*!< ADC multimode DMA transfer configuration */ - -#define ADC_CCR_MDMA_Pos (14U) -#define ADC_CCR_MDMA_Msk (0x3U << ADC_CCR_MDMA_Pos) /*!< 0x0000C000 */ -#define ADC_CCR_MDMA ADC_CCR_MDMA_Msk /*!< ADC multimode DMA transfer enable */ -#define ADC_CCR_MDMA_0 (0x1U << ADC_CCR_MDMA_Pos) /*!< 0x00004000 */ -#define ADC_CCR_MDMA_1 (0x2U << ADC_CCR_MDMA_Pos) /*!< 0x00008000 */ - -#define ADC_CCR_CKMODE_Pos (16U) -#define ADC_CCR_CKMODE_Msk (0x3U << ADC_CCR_CKMODE_Pos) /*!< 0x00030000 */ -#define ADC_CCR_CKMODE ADC_CCR_CKMODE_Msk /*!< ADC common clock source and prescaler (prescaler only for clock source synchronous) */ -#define ADC_CCR_CKMODE_0 (0x1U << ADC_CCR_CKMODE_Pos) /*!< 0x00010000 */ -#define ADC_CCR_CKMODE_1 (0x2U << ADC_CCR_CKMODE_Pos) /*!< 0x00020000 */ - -#define ADC_CCR_PRESC_Pos (18U) -#define ADC_CCR_PRESC_Msk (0xFU << ADC_CCR_PRESC_Pos) /*!< 0x003C0000 */ -#define ADC_CCR_PRESC ADC_CCR_PRESC_Msk /*!< ADC common clock prescaler, only for clock source asynchronous */ -#define ADC_CCR_PRESC_0 (0x1U << ADC_CCR_PRESC_Pos) /*!< 0x00040000 */ -#define ADC_CCR_PRESC_1 (0x2U << ADC_CCR_PRESC_Pos) /*!< 0x00080000 */ -#define ADC_CCR_PRESC_2 (0x4U << ADC_CCR_PRESC_Pos) /*!< 0x00100000 */ -#define ADC_CCR_PRESC_3 (0x8U << ADC_CCR_PRESC_Pos) /*!< 0x00200000 */ - -#define ADC_CCR_VREFEN_Pos (22U) -#define ADC_CCR_VREFEN_Msk (0x1U << ADC_CCR_VREFEN_Pos) /*!< 0x00400000 */ -#define ADC_CCR_VREFEN ADC_CCR_VREFEN_Msk /*!< ADC internal path to VrefInt enable */ -#define ADC_CCR_TSEN_Pos (23U) -#define ADC_CCR_TSEN_Msk (0x1U << ADC_CCR_TSEN_Pos) /*!< 0x00800000 */ -#define ADC_CCR_TSEN ADC_CCR_TSEN_Msk /*!< ADC internal path to temperature sensor enable */ -#define ADC_CCR_VBATEN_Pos (24U) -#define ADC_CCR_VBATEN_Msk (0x1U << ADC_CCR_VBATEN_Pos) /*!< 0x01000000 */ -#define ADC_CCR_VBATEN ADC_CCR_VBATEN_Msk /*!< ADC internal path to battery voltage enable */ - -/******************** Bit definition for ADC_CDR register *******************/ -#define ADC_CDR_RDATA_MST_Pos (0U) -#define ADC_CDR_RDATA_MST_Msk (0xFFFFU << ADC_CDR_RDATA_MST_Pos) /*!< 0x0000FFFF */ -#define ADC_CDR_RDATA_MST ADC_CDR_RDATA_MST_Msk /*!< ADC multimode master group regular conversion data */ -#define ADC_CDR_RDATA_MST_0 (0x0001U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000001 */ -#define ADC_CDR_RDATA_MST_1 (0x0002U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000002 */ -#define ADC_CDR_RDATA_MST_2 (0x0004U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000004 */ -#define ADC_CDR_RDATA_MST_3 (0x0008U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000008 */ -#define ADC_CDR_RDATA_MST_4 (0x0010U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000010 */ -#define ADC_CDR_RDATA_MST_5 (0x0020U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000020 */ -#define ADC_CDR_RDATA_MST_6 (0x0040U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000040 */ -#define ADC_CDR_RDATA_MST_7 (0x0080U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000080 */ -#define ADC_CDR_RDATA_MST_8 (0x0100U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000100 */ -#define ADC_CDR_RDATA_MST_9 (0x0200U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000200 */ -#define ADC_CDR_RDATA_MST_10 (0x0400U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000400 */ -#define ADC_CDR_RDATA_MST_11 (0x0800U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00000800 */ -#define ADC_CDR_RDATA_MST_12 (0x1000U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00001000 */ -#define ADC_CDR_RDATA_MST_13 (0x2000U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00002000 */ -#define ADC_CDR_RDATA_MST_14 (0x4000U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00004000 */ -#define ADC_CDR_RDATA_MST_15 (0x8000U << ADC_CDR_RDATA_MST_Pos) /*!< 0x00008000 */ - -#define ADC_CDR_RDATA_SLV_Pos (16U) -#define ADC_CDR_RDATA_SLV_Msk (0xFFFFU << ADC_CDR_RDATA_SLV_Pos) /*!< 0xFFFF0000 */ -#define ADC_CDR_RDATA_SLV ADC_CDR_RDATA_SLV_Msk /*!< ADC multimode slave group regular conversion data */ -#define ADC_CDR_RDATA_SLV_0 (0x0001U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00010000 */ -#define ADC_CDR_RDATA_SLV_1 (0x0002U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00020000 */ -#define ADC_CDR_RDATA_SLV_2 (0x0004U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00040000 */ -#define ADC_CDR_RDATA_SLV_3 (0x0008U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00080000 */ -#define ADC_CDR_RDATA_SLV_4 (0x0010U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00100000 */ -#define ADC_CDR_RDATA_SLV_5 (0x0020U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00200000 */ -#define ADC_CDR_RDATA_SLV_6 (0x0040U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00400000 */ -#define ADC_CDR_RDATA_SLV_7 (0x0080U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x00800000 */ -#define ADC_CDR_RDATA_SLV_8 (0x0100U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x01000000 */ -#define ADC_CDR_RDATA_SLV_9 (0x0200U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x02000000 */ -#define ADC_CDR_RDATA_SLV_10 (0x0400U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x04000000 */ -#define ADC_CDR_RDATA_SLV_11 (0x0800U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x08000000 */ -#define ADC_CDR_RDATA_SLV_12 (0x1000U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x10000000 */ -#define ADC_CDR_RDATA_SLV_13 (0x2000U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x20000000 */ -#define ADC_CDR_RDATA_SLV_14 (0x4000U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x40000000 */ -#define ADC_CDR_RDATA_SLV_15 (0x8000U << ADC_CDR_RDATA_SLV_Pos) /*!< 0x80000000 */ - -/******************************************************************************/ -/* */ -/* Controller Area Network */ -/* */ -/******************************************************************************/ -/*!*/ -#define DAC_CR_CEN1_Pos (14U) -#define DAC_CR_CEN1_Msk (0x1U << DAC_CR_CEN1_Pos) /*!< 0x00004000 */ -#define DAC_CR_CEN1 DAC_CR_CEN1_Msk /*!*/ - -#define DAC_CR_EN2_Pos (16U) -#define DAC_CR_EN2_Msk (0x1U << DAC_CR_EN2_Pos) /*!< 0x00010000 */ -#define DAC_CR_EN2 DAC_CR_EN2_Msk /*!*/ -#define DAC_CR_CEN2_Pos (30U) -#define DAC_CR_CEN2_Msk (0x1U << DAC_CR_CEN2_Pos) /*!< 0x40000000 */ -#define DAC_CR_CEN2 DAC_CR_CEN2_Msk /*!*/ - -/***************** Bit definition for DAC_SWTRIGR register ******************/ -#define DAC_SWTRIGR_SWTRIG1_Pos (0U) -#define DAC_SWTRIGR_SWTRIG1_Msk (0x1U << DAC_SWTRIGR_SWTRIG1_Pos) /*!< 0x00000001 */ -#define DAC_SWTRIGR_SWTRIG1 DAC_SWTRIGR_SWTRIG1_Msk /*!
© COPYRIGHT(c) 2017 STMicroelectronics
- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32l4xx - * @{ - */ - -#ifndef __STM32L4xx_H -#define __STM32L4xx_H - -#ifdef __cplusplus - extern "C" { -#endif /* __cplusplus */ - -/** @addtogroup Library_configuration_section - * @{ - */ - -/** - * @brief STM32 Family - */ -#if !defined (STM32L4) -#define STM32L4 -#endif /* STM32L4 */ - -/* Uncomment the line below according to the target STM32L4 device used in your - application - */ - -#if !defined (STM32L431xx) && !defined (STM32L432xx) && !defined (STM32L433xx) && !defined (STM32L442xx) && !defined (STM32L443xx) && \ - !defined (STM32L451xx) && !defined (STM32L452xx) && !defined (STM32L462xx) && \ - !defined (STM32L471xx) && !defined (STM32L475xx) && !defined (STM32L476xx) && !defined (STM32L485xx) && !defined (STM32L486xx) && \ - !defined (STM32L496xx) && !defined (STM32L4A6xx) && \ - !defined (STM32L4R5xx) && !defined (STM32L4R7xx) && !defined (STM32L4R9xx) && !defined (STM32L4S5xx) && !defined (STM32L4S7xx) && !defined (STM32L4S9xx) - /* #define STM32L431xx */ /*!< STM32L431xx Devices */ - /* #define STM32L432xx */ /*!< STM32L432xx Devices */ - /* #define STM32L433xx */ /*!< STM32L433xx Devices */ - /* #define STM32L442xx */ /*!< STM32L442xx Devices */ - /* #define STM32L443xx */ /*!< STM32L443xx Devices */ - /* #define STM32L451xx */ /*!< STM32L451xx Devices */ - /* #define STM32L452xx */ /*!< STM32L452xx Devices */ - /* #define STM32L462xx */ /*!< STM32L462xx Devices */ - /* #define STM32L471xx */ /*!< STM32L471xx Devices */ - /* #define STM32L475xx */ /*!< STM32L475xx Devices */ - /* #define STM32L476xx */ /*!< STM32L476xx Devices */ - /* #define STM32L485xx */ /*!< STM32L485xx Devices */ - /* #define STM32L486xx */ /*!< STM32L486xx Devices */ - /* #define STM32L496xx */ /*!< STM32L496xx Devices */ - /* #define STM32L4A6xx */ /*!< STM32L4A6xx Devices */ - /* #define STM32L4R5xx */ /*!< STM32L4R5xx Devices */ - /* #define STM32L4R7xx */ /*!< STM32L4R7xx Devices */ - /* #define STM32L4R9xx */ /*!< STM32L4R9xx Devices */ - /* #define STM32L4S5xx */ /*!< STM32L4S5xx Devices */ - /* #define STM32L4S7xx */ /*!< STM32L4S7xx Devices */ - /* #define STM32L4S9xx */ /*!< STM32L4S9xx Devices */ -#endif - -/* Tip: To avoid modifying this file each time you need to switch between these - devices, you can define the device in your toolchain compiler preprocessor. - */ -#if !defined (USE_HAL_DRIVER) -/** - * @brief Comment the line below if you will not use the peripherals drivers. - In this case, these drivers will not be included and the application code will - be based on direct access to peripherals registers - */ - /*#define USE_HAL_DRIVER */ -#endif /* USE_HAL_DRIVER */ - -/** - * @brief CMSIS Device version number - */ -#define __STM32L4_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */ -#define __STM32L4_CMSIS_VERSION_SUB1 (0x04) /*!< [23:16] sub1 version */ -#define __STM32L4_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */ -#define __STM32L4_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */ -#define __STM32L4_CMSIS_VERSION ((__STM32L4_CMSIS_VERSION_MAIN << 24)\ - |(__STM32L4_CMSIS_VERSION_SUB1 << 16)\ - |(__STM32L4_CMSIS_VERSION_SUB2 << 8 )\ - |(__STM32L4_CMSIS_VERSION_RC)) - -/** - * @} - */ - -/** @addtogroup Device_Included - * @{ - */ - -#if defined(STM32L431xx) - #include "stm32l431xx.h" -#elif defined(STM32L432xx) - #include "stm32l432xx.h" -#elif defined(STM32L433xx) - #include "stm32l433xx.h" -#elif defined(STM32L442xx) - #include "stm32l442xx.h" -#elif defined(STM32L443xx) - #include "stm32l443xx.h" -#elif defined(STM32L451xx) - #include "stm32l451xx.h" -#elif defined(STM32L452xx) - #include "stm32l452xx.h" -#elif defined(STM32L462xx) - #include "stm32l462xx.h" -#elif defined(STM32L471xx) - #include "stm32l471xx.h" -#elif defined(STM32L475xx) - #include "stm32l475xx.h" -#elif defined(STM32L476xx) - #include "stm32l476xx.h" -#elif defined(STM32L485xx) - #include "stm32l485xx.h" -#elif defined(STM32L486xx) - #include "stm32l486xx.h" -#elif defined(STM32L496xx) - #include "stm32l496xx.h" -#elif defined(STM32L4A6xx) - #include "stm32l4a6xx.h" -#elif defined(STM32L4R5xx) - #include "stm32l4r5xx.h" -#elif defined(STM32L4R7xx) - #include "stm32l4r7xx.h" -#elif defined(STM32L4R9xx) - #include "stm32l4r9xx.h" -#elif defined(STM32L4S5xx) - #include "stm32l4s5xx.h" -#elif defined(STM32L4S7xx) - #include "stm32l4s7xx.h" -#elif defined(STM32L4S9xx) - #include "stm32l4s9xx.h" -#else - #error "Please select first the target STM32L4xx device used in your application (in stm32l4xx.h file)" -#endif - -/** - * @} - */ - -/** @addtogroup Exported_types - * @{ - */ -typedef enum -{ - RESET = 0, - SET = !RESET -} FlagStatus, ITStatus; - -typedef enum -{ - DISABLE = 0, - ENABLE = !DISABLE -} FunctionalState; -#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) - -typedef enum -{ - ERROR = 0, - SUCCESS = !ERROR -} ErrorStatus; - -/** - * @} - */ - - -/** @addtogroup Exported_macros - * @{ - */ -#define SET_BIT(REG, BIT) ((REG) |= (BIT)) - -#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) - -#define READ_BIT(REG, BIT) ((REG) & (BIT)) - -#define CLEAR_REG(REG) ((REG) = (0x0)) - -#define WRITE_REG(REG, VAL) ((REG) = (VAL)) - -#define READ_REG(REG) ((REG)) - -#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) - -#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) - - -/** - * @} - */ - -#if defined (USE_HAL_DRIVER) - #include "stm32l4xx_hal.h" -#endif /* USE_HAL_DRIVER */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* __STM32L4xx_H */ -/** - * @} - */ - -/** - * @} - */ - - - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h deleted file mode 100644 index e6e4376f..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h +++ /dev/null @@ -1,123 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32l4xx.h - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device System Source File for STM32L4xx devices. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32l4xx_system - * @{ - */ - -/** - * @brief Define to prevent recursive inclusion - */ -#ifndef __SYSTEM_STM32L4XX_H -#define __SYSTEM_STM32L4XX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/** @addtogroup STM32L4xx_System_Includes - * @{ - */ - -/** - * @} - */ - - -/** @addtogroup STM32L4xx_System_Exported_Variables - * @{ - */ - /* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetSysClockFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency - Note: If you use this function to configure the system clock; then there - is no need to call the 2 first functions listed above, since SystemCoreClock - variable is updated automatically. - */ -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ - -extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ -extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ -extern const uint32_t MSIRangeTable[12]; /*!< MSI ranges table values */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Exported_Constants - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Exported_Functions - * @{ - */ - -extern void SystemInit(void); -extern void SystemCoreClockUpdate(void); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /*__SYSTEM_STM32L4XX_H */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/arm_common_tables.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/arm_common_tables.h deleted file mode 100644 index 8742a569..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/arm_common_tables.h +++ /dev/null @@ -1,136 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. October 2015 -* $Revision: V.1.4.5 a -* -* Project: CMSIS DSP Library -* Title: arm_common_tables.h -* -* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#ifndef _ARM_COMMON_TABLES_H -#define _ARM_COMMON_TABLES_H - -#include "arm_math.h" - -extern const uint16_t armBitRevTable[1024]; -extern const q15_t armRecipTableQ15[64]; -extern const q31_t armRecipTableQ31[64]; -/* extern const q31_t realCoefAQ31[1024]; */ -/* extern const q31_t realCoefBQ31[1024]; */ -extern const float32_t twiddleCoef_16[32]; -extern const float32_t twiddleCoef_32[64]; -extern const float32_t twiddleCoef_64[128]; -extern const float32_t twiddleCoef_128[256]; -extern const float32_t twiddleCoef_256[512]; -extern const float32_t twiddleCoef_512[1024]; -extern const float32_t twiddleCoef_1024[2048]; -extern const float32_t twiddleCoef_2048[4096]; -extern const float32_t twiddleCoef_4096[8192]; -#define twiddleCoef twiddleCoef_4096 -extern const q31_t twiddleCoef_16_q31[24]; -extern const q31_t twiddleCoef_32_q31[48]; -extern const q31_t twiddleCoef_64_q31[96]; -extern const q31_t twiddleCoef_128_q31[192]; -extern const q31_t twiddleCoef_256_q31[384]; -extern const q31_t twiddleCoef_512_q31[768]; -extern const q31_t twiddleCoef_1024_q31[1536]; -extern const q31_t twiddleCoef_2048_q31[3072]; -extern const q31_t twiddleCoef_4096_q31[6144]; -extern const q15_t twiddleCoef_16_q15[24]; -extern const q15_t twiddleCoef_32_q15[48]; -extern const q15_t twiddleCoef_64_q15[96]; -extern const q15_t twiddleCoef_128_q15[192]; -extern const q15_t twiddleCoef_256_q15[384]; -extern const q15_t twiddleCoef_512_q15[768]; -extern const q15_t twiddleCoef_1024_q15[1536]; -extern const q15_t twiddleCoef_2048_q15[3072]; -extern const q15_t twiddleCoef_4096_q15[6144]; -extern const float32_t twiddleCoef_rfft_32[32]; -extern const float32_t twiddleCoef_rfft_64[64]; -extern const float32_t twiddleCoef_rfft_128[128]; -extern const float32_t twiddleCoef_rfft_256[256]; -extern const float32_t twiddleCoef_rfft_512[512]; -extern const float32_t twiddleCoef_rfft_1024[1024]; -extern const float32_t twiddleCoef_rfft_2048[2048]; -extern const float32_t twiddleCoef_rfft_4096[4096]; - - -/* floating-point bit reversal tables */ -#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) -#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) -#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) -#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) -#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) -#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) -#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) -#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) -#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) - -extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; - -/* fixed-point bit reversal tables */ -#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) -#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) -#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) -#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) -#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) -#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) -#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) -#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) -#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) - -extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; -extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; - -/* Tables for Fast Math Sine and Cosine */ -extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; -extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; -extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; - -#endif /* ARM_COMMON_TABLES_H */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/arm_const_structs.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/arm_const_structs.h deleted file mode 100644 index 726d06eb..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/arm_const_structs.h +++ /dev/null @@ -1,79 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2014 ARM Limited. All rights reserved. -* -* $Date: 19. March 2015 -* $Revision: V.1.4.5 -* -* Project: CMSIS DSP Library -* Title: arm_const_structs.h -* -* Description: This file has constant structs that are initialized for -* user convenience. For example, some can be given as -* arguments to the arm_cfft_f32() function. -* -* Target Processor: Cortex-M4/Cortex-M3 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -------------------------------------------------------------------- */ - -#ifndef _ARM_CONST_STRUCTS_H -#define _ARM_CONST_STRUCTS_H - -#include "arm_math.h" -#include "arm_common_tables.h" - - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; - extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; - - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; - extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; - - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; - extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; - -#endif diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/arm_math.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/arm_math.h deleted file mode 100644 index d33f8a9b..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/arm_math.h +++ /dev/null @@ -1,7154 +0,0 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010-2015 ARM Limited. All rights reserved. -* -* $Date: 20. October 2015 -* $Revision: V1.4.5 b -* -* Project: CMSIS DSP Library -* Title: arm_math.h -* -* Description: Public header file for CMSIS DSP Library -* -* Target Processor: Cortex-M7/Cortex-M4/Cortex-M3/Cortex-M0 -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions -* are met: -* - Redistributions of source code must retain the above copyright -* notice, this list of conditions and the following disclaimer. -* - Redistributions in binary form must reproduce the above copyright -* notice, this list of conditions and the following disclaimer in -* the documentation and/or other materials provided with the -* distribution. -* - Neither the name of ARM LIMITED nor the names of its contributors -* may be used to endorse or promote products derived from this -* software without specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. - * -------------------------------------------------------------------- */ - -/** - \mainpage CMSIS DSP Software Library - * - * Introduction - * ------------ - * - * This user manual describes the CMSIS DSP software library, - * a suite of common signal processing functions for use on Cortex-M processor based devices. - * - * The library is divided into a number of functions each covering a specific category: - * - Basic math functions - * - Fast math functions - * - Complex math functions - * - Filters - * - Matrix functions - * - Transforms - * - Motor control functions - * - Statistical functions - * - Support functions - * - Interpolation functions - * - * The library has separate functions for operating on 8-bit integers, 16-bit integers, - * 32-bit integer and 32-bit floating-point values. - * - * Using the Library - * ------------ - * - * The library installer contains prebuilt versions of the libraries in the Lib folder. - * - arm_cortexM7lfdp_math.lib (Little endian and Double Precision Floating Point Unit on Cortex-M7) - * - arm_cortexM7bfdp_math.lib (Big endian and Double Precision Floating Point Unit on Cortex-M7) - * - arm_cortexM7lfsp_math.lib (Little endian and Single Precision Floating Point Unit on Cortex-M7) - * - arm_cortexM7bfsp_math.lib (Big endian and Single Precision Floating Point Unit on Cortex-M7) - * - arm_cortexM7l_math.lib (Little endian on Cortex-M7) - * - arm_cortexM7b_math.lib (Big endian on Cortex-M7) - * - arm_cortexM4lf_math.lib (Little endian and Floating Point Unit on Cortex-M4) - * - arm_cortexM4bf_math.lib (Big endian and Floating Point Unit on Cortex-M4) - * - arm_cortexM4l_math.lib (Little endian on Cortex-M4) - * - arm_cortexM4b_math.lib (Big endian on Cortex-M4) - * - arm_cortexM3l_math.lib (Little endian on Cortex-M3) - * - arm_cortexM3b_math.lib (Big endian on Cortex-M3) - * - arm_cortexM0l_math.lib (Little endian on Cortex-M0 / CortexM0+) - * - arm_cortexM0b_math.lib (Big endian on Cortex-M0 / CortexM0+) - * - * The library functions are declared in the public file arm_math.h which is placed in the Include folder. - * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single - * public header file arm_math.h for Cortex-M7/M4/M3/M0/M0+ with little endian and big endian. Same header file will be used for floating point unit(FPU) variants. - * Define the appropriate pre processor MACRO ARM_MATH_CM7 or ARM_MATH_CM4 or ARM_MATH_CM3 or - * ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application. - * - * Examples - * -------- - * - * The library ships with a number of examples which demonstrate how to use the library functions. - * - * Toolchain Support - * ------------ - * - * The library has been developed and tested with MDK-ARM version 5.14.0.0 - * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly. - * - * Building the Library - * ------------ - * - * The library installer contains a project file to re build libraries on MDK-ARM Tool chain in the CMSIS\\DSP_Lib\\Source\\ARM folder. - * - arm_cortexM_math.uvprojx - * - * - * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target, and defining the optional pre processor MACROs detailed above. - * - * Pre-processor Macros - * ------------ - * - * Each library project have differant pre-processor macros. - * - * - UNALIGNED_SUPPORT_DISABLE: - * - * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access - * - * - ARM_MATH_BIG_ENDIAN: - * - * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets. - * - * - ARM_MATH_MATRIX_CHECK: - * - * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices - * - * - ARM_MATH_ROUNDING: - * - * Define macro ARM_MATH_ROUNDING for rounding on support functions - * - * - ARM_MATH_CMx: - * - * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target - * and ARM_MATH_CM0 for building library on Cortex-M0 target, ARM_MATH_CM0PLUS for building library on Cortex-M0+ target, and - * ARM_MATH_CM7 for building the library on cortex-M7. - * - * - __FPU_PRESENT: - * - * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries - * - *
- * CMSIS-DSP in ARM::CMSIS Pack - * ----------------------------- - * - * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directories: - * |File/Folder |Content | - * |------------------------------|------------------------------------------------------------------------| - * |\b CMSIS\\Documentation\\DSP | This documentation | - * |\b CMSIS\\DSP_Lib | Software license agreement (license.txt) | - * |\b CMSIS\\DSP_Lib\\Examples | Example projects demonstrating the usage of the library functions | - * |\b CMSIS\\DSP_Lib\\Source | Source files for rebuilding the library | - * - *
- * Revision History of CMSIS-DSP - * ------------ - * Please refer to \ref ChangeLog_pg. - * - * Copyright Notice - * ------------ - * - * Copyright (C) 2010-2015 ARM Limited. All rights reserved. - */ - - -/** - * @defgroup groupMath Basic Math Functions - */ - -/** - * @defgroup groupFastMath Fast Math Functions - * This set of functions provides a fast approximation to sine, cosine, and square root. - * As compared to most of the other functions in the CMSIS math library, the fast math functions - * operate on individual values and not arrays. - * There are separate functions for Q15, Q31, and floating-point data. - * - */ - -/** - * @defgroup groupCmplxMath Complex Math Functions - * This set of functions operates on complex data vectors. - * The data in the complex arrays is stored in an interleaved fashion - * (real, imag, real, imag, ...). - * In the API functions, the number of samples in a complex array refers - * to the number of complex values; the array contains twice this number of - * real values. - */ - -/** - * @defgroup groupFilters Filtering Functions - */ - -/** - * @defgroup groupMatrix Matrix Functions - * - * This set of functions provides basic matrix math operations. - * The functions operate on matrix data structures. For example, - * the type - * definition for the floating-point matrix structure is shown - * below: - * 
- *     typedef struct
- *     {
- *       uint16_t numRows;     // number of rows of the matrix.
- *       uint16_t numCols;     // number of columns of the matrix.
- *       float32_t *pData;     // points to the data of the matrix.
- *     } arm_matrix_instance_f32;
- *
- * There are similar definitions for Q15 and Q31 data types. - * - * The structure specifies the size of the matrix and then points to - * an array of data. The array is of size numRows X numCols - * and the values are arranged in row order. That is, the - * matrix element (i, j) is stored at: - * 
- *     pData[i*numCols + j]
- *
- * - * \par Init Functions - * There is an associated initialization function for each type of matrix - * data structure. - * The initialization function sets the values of the internal structure fields. - * Refer to the function arm_mat_init_f32(), arm_mat_init_q31() - * and arm_mat_init_q15() for floating-point, Q31 and Q15 types, respectively. - * - * \par - * Use of the initialization function is optional. However, if initialization function is used - * then the instance structure cannot be placed into a const data section. - * To place the instance structure in a const data - * section, manually initialize the data structure. For example: - * 
- * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
- * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
- * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
- *
- * where nRows specifies the number of rows, nColumns - * specifies the number of columns, and pData points to the - * data array. - * - * \par Size Checking - * By default all of the matrix functions perform size checking on the input and - * output matrices. For example, the matrix addition function verifies that the - * two input matrices and the output matrix all have the same number of rows and - * columns. If the size check fails the functions return: - * 
- *     ARM_MATH_SIZE_MISMATCH
- *
- * Otherwise the functions return - * 
- *     ARM_MATH_SUCCESS
- *
- * There is some overhead associated with this matrix size checking. - * The matrix size checking is enabled via the \#define - * 
- *     ARM_MATH_MATRIX_CHECK
- *
- * within the library project settings. By default this macro is defined - * and size checking is enabled. By changing the project settings and - * undefining this macro size checking is eliminated and the functions - * run a bit faster. With size checking disabled the functions always - * return ARM_MATH_SUCCESS. - */ - -/** - * @defgroup groupTransforms Transform Functions - */ - -/** - * @defgroup groupController Controller Functions - */ - -/** - * @defgroup groupStats Statistics Functions - */ -/** - * @defgroup groupSupport Support Functions - */ - -/** - * @defgroup groupInterpolation Interpolation Functions - * These functions perform 1- and 2-dimensional interpolation of data. - * Linear interpolation is used for 1-dimensional data and - * bilinear interpolation is used for 2-dimensional data. - */ - -/** - * @defgroup groupExamples Examples - */ -#ifndef _ARM_MATH_H -#define _ARM_MATH_H - -/* ignore some GCC warnings */ -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wsign-conversion" -#pragma GCC diagnostic ignored "-Wconversion" -#pragma GCC diagnostic ignored "-Wunused-parameter" -#endif - -#define __CMSIS_GENERIC /* disable NVIC and Systick functions */ - -#if defined(ARM_MATH_CM7) - #include "core_cm7.h" -#elif defined (ARM_MATH_CM4) - #include "core_cm4.h" -#elif defined (ARM_MATH_CM3) - #include "core_cm3.h" -#elif defined (ARM_MATH_CM0) - #include "core_cm0.h" - #define ARM_MATH_CM0_FAMILY -#elif defined (ARM_MATH_CM0PLUS) - #include "core_cm0plus.h" - #define ARM_MATH_CM0_FAMILY -#else - #error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS or ARM_MATH_CM0" -#endif - -#undef __CMSIS_GENERIC /* enable NVIC and Systick functions */ -#include "string.h" -#include "math.h" -#ifdef __cplusplus -extern "C" -{ -#endif - - - /** - * @brief Macros required for reciprocal calculation in Normalized LMS - */ - -#define DELTA_Q31 (0x100) -#define DELTA_Q15 0x5 -#define INDEX_MASK 0x0000003F -#ifndef PI -#define PI 3.14159265358979f -#endif - - /** - * @brief Macros required for SINE and COSINE Fast math approximations - */ - -#define FAST_MATH_TABLE_SIZE 512 -#define FAST_MATH_Q31_SHIFT (32 - 10) -#define FAST_MATH_Q15_SHIFT (16 - 10) -#define CONTROLLER_Q31_SHIFT (32 - 9) -#define TABLE_SIZE 256 -#define TABLE_SPACING_Q31 0x400000 -#define TABLE_SPACING_Q15 0x80 - - /** - * @brief Macros required for SINE and COSINE Controller functions - */ - /* 1.31(q31) Fixed value of 2/360 */ - /* -1 to +1 is divided into 360 values so total spacing is (2/360) */ -#define INPUT_SPACING 0xB60B61 - - /** - * @brief Macro for Unaligned Support - */ -#ifndef UNALIGNED_SUPPORT_DISABLE - #define ALIGN4 -#else - #if defined (__GNUC__) - #define ALIGN4 __attribute__((aligned(4))) - #else - #define ALIGN4 __align(4) - #endif -#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */ - - /** - * @brief Error status returned by some functions in the library. - */ - - typedef enum - { - ARM_MATH_SUCCESS = 0, /**< No error */ - ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */ - ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */ - ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation. */ - ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */ - ARM_MATH_SINGULAR = -5, /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */ - ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */ - } arm_status; - - /** - * @brief 8-bit fractional data type in 1.7 format. - */ - typedef int8_t q7_t; - - /** - * @brief 16-bit fractional data type in 1.15 format. - */ - typedef int16_t q15_t; - - /** - * @brief 32-bit fractional data type in 1.31 format. - */ - typedef int32_t q31_t; - - /** - * @brief 64-bit fractional data type in 1.63 format. - */ - typedef int64_t q63_t; - - /** - * @brief 32-bit floating-point type definition. - */ - typedef float float32_t; - - /** - * @brief 64-bit floating-point type definition. - */ - typedef double float64_t; - - /** - * @brief definition to read/write two 16 bit values. - */ -#if defined __CC_ARM - #define __SIMD32_TYPE int32_t __packed - #define CMSIS_UNUSED __attribute__((unused)) - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __SIMD32_TYPE int32_t - #define CMSIS_UNUSED __attribute__((unused)) - -#elif defined __GNUC__ - #define __SIMD32_TYPE int32_t - #define CMSIS_UNUSED __attribute__((unused)) - -#elif defined __ICCARM__ - #define __SIMD32_TYPE int32_t __packed - #define CMSIS_UNUSED - -#elif defined __CSMC__ - #define __SIMD32_TYPE int32_t - #define CMSIS_UNUSED - -#elif defined __TASKING__ - #define __SIMD32_TYPE __unaligned int32_t - #define CMSIS_UNUSED - -#else - #error Unknown compiler -#endif - -#define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr)) -#define __SIMD32_CONST(addr) ((__SIMD32_TYPE *)(addr)) -#define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE *) (addr)) -#define __SIMD64(addr) (*(int64_t **) & (addr)) - -#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) - /** - * @brief definition to pack two 16 bit values. - */ -#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \ - (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) ) -#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \ - (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) ) - -#endif - - - /** - * @brief definition to pack four 8 bit values. - */ -#ifndef ARM_MATH_BIG_ENDIAN - -#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \ - (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \ - (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \ - (((int32_t)(v3) << 24) & (int32_t)0xFF000000) ) -#else - -#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \ - (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \ - (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \ - (((int32_t)(v0) << 24) & (int32_t)0xFF000000) ) - -#endif - - - /** - * @brief Clips Q63 to Q31 values. - */ - static __INLINE q31_t clip_q63_to_q31( - q63_t x) - { - return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? - ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x; - } - - /** - * @brief Clips Q63 to Q15 values. - */ - static __INLINE q15_t clip_q63_to_q15( - q63_t x) - { - return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? - ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15); - } - - /** - * @brief Clips Q31 to Q7 values. - */ - static __INLINE q7_t clip_q31_to_q7( - q31_t x) - { - return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ? - ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x; - } - - /** - * @brief Clips Q31 to Q15 values. - */ - static __INLINE q15_t clip_q31_to_q15( - q31_t x) - { - return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ? - ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x; - } - - /** - * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format. - */ - - static __INLINE q63_t mult32x64( - q63_t x, - q31_t y) - { - return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) + - (((q63_t) (x >> 32) * y))); - } - -/* - #if defined (ARM_MATH_CM0_FAMILY) && defined ( __CC_ARM ) - #define __CLZ __clz - #endif - */ -/* note: function can be removed when all toolchain support __CLZ for Cortex-M0 */ -#if defined (ARM_MATH_CM0_FAMILY) && ((defined (__ICCARM__)) ) - static __INLINE uint32_t __CLZ( - q31_t data); - - static __INLINE uint32_t __CLZ( - q31_t data) - { - uint32_t count = 0; - uint32_t mask = 0x80000000; - - while((data & mask) == 0) - { - count += 1u; - mask = mask >> 1u; - } - - return (count); - } -#endif - - /** - * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type. - */ - - static __INLINE uint32_t arm_recip_q31( - q31_t in, - q31_t * dst, - q31_t * pRecipTable) - { - q31_t out; - uint32_t tempVal; - uint32_t index, i; - uint32_t signBits; - - if(in > 0) - { - signBits = ((uint32_t) (__CLZ( in) - 1)); - } - else - { - signBits = ((uint32_t) (__CLZ(-in) - 1)); - } - - /* Convert input sample to 1.31 format */ - in = (in << signBits); - - /* calculation of index for initial approximated Val */ - index = (uint32_t)(in >> 24); - index = (index & INDEX_MASK); - - /* 1.31 with exp 1 */ - out = pRecipTable[index]; - - /* calculation of reciprocal value */ - /* running approximation for two iterations */ - for (i = 0u; i < 2u; i++) - { - tempVal = (uint32_t) (((q63_t) in * out) >> 31); - tempVal = 0x7FFFFFFFu - tempVal; - /* 1.31 with exp 1 */ - /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */ - out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30); - } - - /* write output */ - *dst = out; - - /* return num of signbits of out = 1/in value */ - return (signBits + 1u); - } - - - /** - * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type. - */ - static __INLINE uint32_t arm_recip_q15( - q15_t in, - q15_t * dst, - q15_t * pRecipTable) - { - q15_t out = 0; - uint32_t tempVal = 0; - uint32_t index = 0, i = 0; - uint32_t signBits = 0; - - if(in > 0) - { - signBits = ((uint32_t)(__CLZ( in) - 17)); - } - else - { - signBits = ((uint32_t)(__CLZ(-in) - 17)); - } - - /* Convert input sample to 1.15 format */ - in = (in << signBits); - - /* calculation of index for initial approximated Val */ - index = (uint32_t)(in >> 8); - index = (index & INDEX_MASK); - - /* 1.15 with exp 1 */ - out = pRecipTable[index]; - - /* calculation of reciprocal value */ - /* running approximation for two iterations */ - for (i = 0u; i < 2u; i++) - { - tempVal = (uint32_t) (((q31_t) in * out) >> 15); - tempVal = 0x7FFFu - tempVal; - /* 1.15 with exp 1 */ - out = (q15_t) (((q31_t) out * tempVal) >> 14); - /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */ - } - - /* write output */ - *dst = out; - - /* return num of signbits of out = 1/in value */ - return (signBits + 1); - } - - - /* - * @brief C custom defined intrinisic function for only M0 processors - */ -#if defined(ARM_MATH_CM0_FAMILY) - static __INLINE q31_t __SSAT( - q31_t x, - uint32_t y) - { - int32_t posMax, negMin; - uint32_t i; - - posMax = 1; - for (i = 0; i < (y - 1); i++) - { - posMax = posMax * 2; - } - - if(x > 0) - { - posMax = (posMax - 1); - - if(x > posMax) - { - x = posMax; - } - } - else - { - negMin = -posMax; - - if(x < negMin) - { - x = negMin; - } - } - return (x); - } -#endif /* end of ARM_MATH_CM0_FAMILY */ - - - /* - * @brief C custom defined intrinsic function for M3 and M0 processors - */ -#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) - - /* - * @brief C custom defined QADD8 for M3 and M0 processors - */ - static __INLINE uint32_t __QADD8( - uint32_t x, - uint32_t y) - { - q31_t r, s, t, u; - - r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; - s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; - t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; - u = __SSAT(((((q31_t)x ) >> 24) + (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; - - return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); - } - - - /* - * @brief C custom defined QSUB8 for M3 and M0 processors - */ - static __INLINE uint32_t __QSUB8( - uint32_t x, - uint32_t y) - { - q31_t r, s, t, u; - - r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; - s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; - t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; - u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; - - return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); - } - - - /* - * @brief C custom defined QADD16 for M3 and M0 processors - */ - static __INLINE uint32_t __QADD16( - uint32_t x, - uint32_t y) - { -/* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass! for armCC */ - q31_t r = 0, s = 0; - - r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHADD16 for M3 and M0 processors - */ - static __INLINE uint32_t __SHADD16( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined QSUB16 for M3 and M0 processors - */ - static __INLINE uint32_t __QSUB16( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHSUB16 for M3 and M0 processors - */ - static __INLINE uint32_t __SHSUB16( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined QASX for M3 and M0 processors - */ - static __INLINE uint32_t __QASX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHASX for M3 and M0 processors - */ - static __INLINE uint32_t __SHASX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined QSAX for M3 and M0 processors - */ - static __INLINE uint32_t __QSAX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; - s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SHSAX for M3 and M0 processors - */ - static __INLINE uint32_t __SHSAX( - uint32_t x, - uint32_t y) - { - q31_t r, s; - - r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; - s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; - - return ((uint32_t)((s << 16) | (r ))); - } - - - /* - * @brief C custom defined SMUSDX for M3 and M0 processors - */ - static __INLINE uint32_t __SMUSDX( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); - } - - /* - * @brief C custom defined SMUADX for M3 and M0 processors - */ - static __INLINE uint32_t __SMUADX( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); - } - - - /* - * @brief C custom defined QADD for M3 and M0 processors - */ - static __INLINE int32_t __QADD( - int32_t x, - int32_t y) - { - return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y))); - } - - - /* - * @brief C custom defined QSUB for M3 and M0 processors - */ - static __INLINE int32_t __QSUB( - int32_t x, - int32_t y) - { - return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y))); - } - - - /* - * @brief C custom defined SMLAD for M3 and M0 processors - */ - static __INLINE uint32_t __SMLAD( - uint32_t x, - uint32_t y, - uint32_t sum) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + - ( ((q31_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLADX for M3 and M0 processors - */ - static __INLINE uint32_t __SMLADX( - uint32_t x, - uint32_t y, - uint32_t sum) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + - ( ((q31_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLSDX for M3 and M0 processors - */ - static __INLINE uint32_t __SMLSDX( - uint32_t x, - uint32_t y, - uint32_t sum) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + - ( ((q31_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLALD for M3 and M0 processors - */ - static __INLINE uint64_t __SMLALD( - uint32_t x, - uint32_t y, - uint64_t sum) - { -/* return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */ - return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + - ( ((q63_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMLALDX for M3 and M0 processors - */ - static __INLINE uint64_t __SMLALDX( - uint32_t x, - uint32_t y, - uint64_t sum) - { -/* return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */ - return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + - ( ((q63_t)sum ) ) )); - } - - - /* - * @brief C custom defined SMUAD for M3 and M0 processors - */ - static __INLINE uint32_t __SMUAD( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); - } - - - /* - * @brief C custom defined SMUSD for M3 and M0 processors - */ - static __INLINE uint32_t __SMUSD( - uint32_t x, - uint32_t y) - { - return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) - - ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); - } - - - /* - * @brief C custom defined SXTB16 for M3 and M0 processors - */ - static __INLINE uint32_t __SXTB16( - uint32_t x) - { - return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) | - ((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000) )); - } - -#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */ - - - /** - * @brief Instance structure for the Q7 FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - q7_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - } arm_fir_instance_q7; - - /** - * @brief Instance structure for the Q15 FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - } arm_fir_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - } arm_fir_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of filter coefficients in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - } arm_fir_instance_f32; - - - /** - * @brief Processing function for the Q7 FIR filter. - * @param[in] S points to an instance of the Q7 FIR filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_q7( - const arm_fir_instance_q7 * S, - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q7 FIR filter. - * @param[in,out] S points to an instance of the Q7 FIR structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed. - */ - void arm_fir_init_q7( - arm_fir_instance_q7 * S, - uint16_t numTaps, - q7_t * pCoeffs, - q7_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 FIR filter. - * @param[in] S points to an instance of the Q15 FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_q15( - const arm_fir_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q15 FIR filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_fast_q15( - const arm_fir_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 FIR filter. - * @param[in,out] S points to an instance of the Q15 FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if - * numTaps is not a supported value. - */ - arm_status arm_fir_init_q15( - arm_fir_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 FIR filter. - * @param[in] S points to an instance of the Q31 FIR filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_q31( - const arm_fir_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q31 FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_fast_q31( - const arm_fir_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR filter. - * @param[in,out] S points to an instance of the Q31 FIR structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - */ - void arm_fir_init_q31( - arm_fir_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point FIR filter. - * @param[in] S points to an instance of the floating-point FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_f32( - const arm_fir_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point FIR filter. - * @param[in,out] S points to an instance of the floating-point FIR filter structure. - * @param[in] numTaps Number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of samples that are processed at a time. - */ - void arm_fir_init_f32( - arm_fir_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 Biquad cascade filter. - */ - typedef struct - { - int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ - q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ - int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */ - } arm_biquad_casd_df1_inst_q15; - - /** - * @brief Instance structure for the Q31 Biquad cascade filter. - */ - typedef struct - { - uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ - q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ - uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */ - } arm_biquad_casd_df1_inst_q31; - - /** - * @brief Instance structure for the floating-point Biquad cascade filter. - */ - typedef struct - { - uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */ - float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_casd_df1_inst_f32; - - - /** - * @brief Processing function for the Q15 Biquad cascade filter. - * @param[in] S points to an instance of the Q15 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_q15( - const arm_biquad_casd_df1_inst_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 Biquad cascade filter. - * @param[in,out] S points to an instance of the Q15 Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format - */ - void arm_biquad_cascade_df1_init_q15( - arm_biquad_casd_df1_inst_q15 * S, - uint8_t numStages, - q15_t * pCoeffs, - q15_t * pState, - int8_t postShift); - - - /** - * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q15 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_fast_q15( - const arm_biquad_casd_df1_inst_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 Biquad cascade filter - * @param[in] S points to an instance of the Q31 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_q31( - const arm_biquad_casd_df1_inst_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q31 Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_fast_q31( - const arm_biquad_casd_df1_inst_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 Biquad cascade filter. - * @param[in,out] S points to an instance of the Q31 Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format - */ - void arm_biquad_cascade_df1_init_q31( - arm_biquad_casd_df1_inst_q31 * S, - uint8_t numStages, - q31_t * pCoeffs, - q31_t * pState, - int8_t postShift); - - - /** - * @brief Processing function for the floating-point Biquad cascade filter. - * @param[in] S points to an instance of the floating-point Biquad cascade structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df1_f32( - const arm_biquad_casd_df1_inst_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point Biquad cascade filter. - * @param[in,out] S points to an instance of the floating-point Biquad cascade structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_df1_init_f32( - arm_biquad_casd_df1_inst_f32 * S, - uint8_t numStages, - float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Instance structure for the floating-point matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - float32_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_f32; - - - /** - * @brief Instance structure for the floating-point matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - float64_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_f64; - - /** - * @brief Instance structure for the Q15 matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - q15_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_q15; - - /** - * @brief Instance structure for the Q31 matrix structure. - */ - typedef struct - { - uint16_t numRows; /**< number of rows of the matrix. */ - uint16_t numCols; /**< number of columns of the matrix. */ - q31_t *pData; /**< points to the data of the matrix. */ - } arm_matrix_instance_q31; - - - /** - * @brief Floating-point matrix addition. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_add_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix addition. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_add_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst); - - - /** - * @brief Q31 matrix addition. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_add_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Floating-point, complex, matrix multiplication. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_cmplx_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15, complex, matrix multiplication. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_cmplx_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pScratch); - - - /** - * @brief Q31, complex, matrix multiplication. - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_cmplx_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Floating-point matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_trans_f32( - const arm_matrix_instance_f32 * pSrc, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_trans_q15( - const arm_matrix_instance_q15 * pSrc, - arm_matrix_instance_q15 * pDst); - - - /** - * @brief Q31 matrix transpose. - * @param[in] pSrc points to the input matrix - * @param[out] pDst points to the output matrix - * @return The function returns either ARM_MATH_SIZE_MISMATCH - * or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_trans_q31( - const arm_matrix_instance_q31 * pSrc, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Floating-point matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_mult_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @param[in] pState points to the array for storing intermediate results - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_mult_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState); - - - /** - * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @param[in] pState points to the array for storing intermediate results - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_mult_fast_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst, - q15_t * pState); - - - /** - * @brief Q31 matrix multiplication - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_mult_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_mult_fast_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Floating-point matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_sub_f32( - const arm_matrix_instance_f32 * pSrcA, - const arm_matrix_instance_f32 * pSrcB, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_sub_q15( - const arm_matrix_instance_q15 * pSrcA, - const arm_matrix_instance_q15 * pSrcB, - arm_matrix_instance_q15 * pDst); - - - /** - * @brief Q31 matrix subtraction - * @param[in] pSrcA points to the first input matrix structure - * @param[in] pSrcB points to the second input matrix structure - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_sub_q31( - const arm_matrix_instance_q31 * pSrcA, - const arm_matrix_instance_q31 * pSrcB, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Floating-point matrix scaling. - * @param[in] pSrc points to the input matrix - * @param[in] scale scale factor - * @param[out] pDst points to the output matrix - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_scale_f32( - const arm_matrix_instance_f32 * pSrc, - float32_t scale, - arm_matrix_instance_f32 * pDst); - - - /** - * @brief Q15 matrix scaling. - * @param[in] pSrc points to input matrix - * @param[in] scaleFract fractional portion of the scale factor - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to output matrix - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_scale_q15( - const arm_matrix_instance_q15 * pSrc, - q15_t scaleFract, - int32_t shift, - arm_matrix_instance_q15 * pDst); - - - /** - * @brief Q31 matrix scaling. - * @param[in] pSrc points to input matrix - * @param[in] scaleFract fractional portion of the scale factor - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to output matrix structure - * @return The function returns either - * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking. - */ - arm_status arm_mat_scale_q31( - const arm_matrix_instance_q31 * pSrc, - q31_t scaleFract, - int32_t shift, - arm_matrix_instance_q31 * pDst); - - - /** - * @brief Q31 matrix initialization. - * @param[in,out] S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] pData points to the matrix data array. - */ - void arm_mat_init_q31( - arm_matrix_instance_q31 * S, - uint16_t nRows, - uint16_t nColumns, - q31_t * pData); - - - /** - * @brief Q15 matrix initialization. - * @param[in,out] S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] pData points to the matrix data array. - */ - void arm_mat_init_q15( - arm_matrix_instance_q15 * S, - uint16_t nRows, - uint16_t nColumns, - q15_t * pData); - - - /** - * @brief Floating-point matrix initialization. - * @param[in,out] S points to an instance of the floating-point matrix structure. - * @param[in] nRows number of rows in the matrix. - * @param[in] nColumns number of columns in the matrix. - * @param[in] pData points to the matrix data array. - */ - void arm_mat_init_f32( - arm_matrix_instance_f32 * S, - uint16_t nRows, - uint16_t nColumns, - float32_t * pData); - - - - /** - * @brief Instance structure for the Q15 PID Control. - */ - typedef struct - { - q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ -#ifdef ARM_MATH_CM0_FAMILY - q15_t A1; - q15_t A2; -#else - q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/ -#endif - q15_t state[3]; /**< The state array of length 3. */ - q15_t Kp; /**< The proportional gain. */ - q15_t Ki; /**< The integral gain. */ - q15_t Kd; /**< The derivative gain. */ - } arm_pid_instance_q15; - - /** - * @brief Instance structure for the Q31 PID Control. - */ - typedef struct - { - q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ - q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ - q31_t A2; /**< The derived gain, A2 = Kd . */ - q31_t state[3]; /**< The state array of length 3. */ - q31_t Kp; /**< The proportional gain. */ - q31_t Ki; /**< The integral gain. */ - q31_t Kd; /**< The derivative gain. */ - } arm_pid_instance_q31; - - /** - * @brief Instance structure for the floating-point PID Control. - */ - typedef struct - { - float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ - float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ - float32_t A2; /**< The derived gain, A2 = Kd . */ - float32_t state[3]; /**< The state array of length 3. */ - float32_t Kp; /**< The proportional gain. */ - float32_t Ki; /**< The integral gain. */ - float32_t Kd; /**< The derivative gain. */ - } arm_pid_instance_f32; - - - - /** - * @brief Initialization function for the floating-point PID Control. - * @param[in,out] S points to an instance of the PID structure. - * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. - */ - void arm_pid_init_f32( - arm_pid_instance_f32 * S, - int32_t resetStateFlag); - - - /** - * @brief Reset function for the floating-point PID Control. - * @param[in,out] S is an instance of the floating-point PID Control structure - */ - void arm_pid_reset_f32( - arm_pid_instance_f32 * S); - - - /** - * @brief Initialization function for the Q31 PID Control. - * @param[in,out] S points to an instance of the Q15 PID structure. - * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. - */ - void arm_pid_init_q31( - arm_pid_instance_q31 * S, - int32_t resetStateFlag); - - - /** - * @brief Reset function for the Q31 PID Control. - * @param[in,out] S points to an instance of the Q31 PID Control structure - */ - - void arm_pid_reset_q31( - arm_pid_instance_q31 * S); - - - /** - * @brief Initialization function for the Q15 PID Control. - * @param[in,out] S points to an instance of the Q15 PID structure. - * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. - */ - void arm_pid_init_q15( - arm_pid_instance_q15 * S, - int32_t resetStateFlag); - - - /** - * @brief Reset function for the Q15 PID Control. - * @param[in,out] S points to an instance of the q15 PID Control structure - */ - void arm_pid_reset_q15( - arm_pid_instance_q15 * S); - - - /** - * @brief Instance structure for the floating-point Linear Interpolate function. - */ - typedef struct - { - uint32_t nValues; /**< nValues */ - float32_t x1; /**< x1 */ - float32_t xSpacing; /**< xSpacing */ - float32_t *pYData; /**< pointer to the table of Y values */ - } arm_linear_interp_instance_f32; - - /** - * @brief Instance structure for the floating-point bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - float32_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_f32; - - /** - * @brief Instance structure for the Q31 bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - q31_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_q31; - - /** - * @brief Instance structure for the Q15 bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - q15_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_q15; - - /** - * @brief Instance structure for the Q15 bilinear interpolation function. - */ - typedef struct - { - uint16_t numRows; /**< number of rows in the data table. */ - uint16_t numCols; /**< number of columns in the data table. */ - q7_t *pData; /**< points to the data table. */ - } arm_bilinear_interp_instance_q7; - - - /** - * @brief Q7 vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Floating-point vector multiplication. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_mult_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix2_instance_q15; - -/* Deprecated */ - arm_status arm_cfft_radix2_init_q15( - arm_cfft_radix2_instance_q15 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix2_q15( - const arm_cfft_radix2_instance_q15 * S, - q15_t * pSrc); - - - /** - * @brief Instance structure for the Q15 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - q15_t *pTwiddle; /**< points to the twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix4_instance_q15; - -/* Deprecated */ - arm_status arm_cfft_radix4_init_q15( - arm_cfft_radix4_instance_q15 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix4_q15( - const arm_cfft_radix4_instance_q15 * S, - q15_t * pSrc); - - /** - * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - q31_t *pTwiddle; /**< points to the Twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix2_instance_q31; - -/* Deprecated */ - arm_status arm_cfft_radix2_init_q31( - arm_cfft_radix2_instance_q31 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix2_q31( - const arm_cfft_radix2_instance_q31 * S, - q31_t * pSrc); - - /** - * @brief Instance structure for the Q31 CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - q31_t *pTwiddle; /**< points to the twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - } arm_cfft_radix4_instance_q31; - -/* Deprecated */ - void arm_cfft_radix4_q31( - const arm_cfft_radix4_instance_q31 * S, - q31_t * pSrc); - -/* Deprecated */ - arm_status arm_cfft_radix4_init_q31( - arm_cfft_radix4_instance_q31 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - float32_t *pTwiddle; /**< points to the Twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - float32_t onebyfftLen; /**< value of 1/fftLen. */ - } arm_cfft_radix2_instance_f32; - -/* Deprecated */ - arm_status arm_cfft_radix2_init_f32( - arm_cfft_radix2_instance_f32 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix2_f32( - const arm_cfft_radix2_instance_f32 * S, - float32_t * pSrc); - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */ - uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */ - float32_t *pTwiddle; /**< points to the Twiddle factor table. */ - uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */ - float32_t onebyfftLen; /**< value of 1/fftLen. */ - } arm_cfft_radix4_instance_f32; - -/* Deprecated */ - arm_status arm_cfft_radix4_init_f32( - arm_cfft_radix4_instance_f32 * S, - uint16_t fftLen, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - -/* Deprecated */ - void arm_cfft_radix4_f32( - const arm_cfft_radix4_instance_f32 * S, - float32_t * pSrc); - - /** - * @brief Instance structure for the fixed-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const q15_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ - } arm_cfft_instance_q15; - -void arm_cfft_q15( - const arm_cfft_instance_q15 * S, - q15_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the fixed-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const q31_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ - } arm_cfft_instance_q31; - -void arm_cfft_q31( - const arm_cfft_instance_q31 * S, - q31_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the floating-point CFFT/CIFFT function. - */ - typedef struct - { - uint16_t fftLen; /**< length of the FFT. */ - const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ - const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ - uint16_t bitRevLength; /**< bit reversal table length. */ - } arm_cfft_instance_f32; - - void arm_cfft_f32( - const arm_cfft_instance_f32 * S, - float32_t * p1, - uint8_t ifftFlag, - uint8_t bitReverseFlag); - - /** - * @brief Instance structure for the Q15 RFFT/RIFFT function. - */ - typedef struct - { - uint32_t fftLenReal; /**< length of the real FFT. */ - uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ - uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ - uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ - q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ - const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */ - } arm_rfft_instance_q15; - - arm_status arm_rfft_init_q15( - arm_rfft_instance_q15 * S, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag); - - void arm_rfft_q15( - const arm_rfft_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst); - - /** - * @brief Instance structure for the Q31 RFFT/RIFFT function. - */ - typedef struct - { - uint32_t fftLenReal; /**< length of the real FFT. */ - uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ - uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ - uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ - q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ - const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */ - } arm_rfft_instance_q31; - - arm_status arm_rfft_init_q31( - arm_rfft_instance_q31 * S, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag); - - void arm_rfft_q31( - const arm_rfft_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst); - - /** - * @brief Instance structure for the floating-point RFFT/RIFFT function. - */ - typedef struct - { - uint32_t fftLenReal; /**< length of the real FFT. */ - uint16_t fftLenBy2; /**< length of the complex FFT. */ - uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */ - uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */ - uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */ - float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */ - float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */ - arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ - } arm_rfft_instance_f32; - - arm_status arm_rfft_init_f32( - arm_rfft_instance_f32 * S, - arm_cfft_radix4_instance_f32 * S_CFFT, - uint32_t fftLenReal, - uint32_t ifftFlagR, - uint32_t bitReverseFlag); - - void arm_rfft_f32( - const arm_rfft_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst); - - /** - * @brief Instance structure for the floating-point RFFT/RIFFT function. - */ -typedef struct - { - arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */ - uint16_t fftLenRFFT; /**< length of the real sequence */ - float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */ - } arm_rfft_fast_instance_f32 ; - -arm_status arm_rfft_fast_init_f32 ( - arm_rfft_fast_instance_f32 * S, - uint16_t fftLen); - -void arm_rfft_fast_f32( - arm_rfft_fast_instance_f32 * S, - float32_t * p, float32_t * pOut, - uint8_t ifftFlag); - - /** - * @brief Instance structure for the floating-point DCT4/IDCT4 function. - */ - typedef struct - { - uint16_t N; /**< length of the DCT4. */ - uint16_t Nby2; /**< half of the length of the DCT4. */ - float32_t normalize; /**< normalizing factor. */ - float32_t *pTwiddle; /**< points to the twiddle factor table. */ - float32_t *pCosFactor; /**< points to the cosFactor table. */ - arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */ - arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ - } arm_dct4_instance_f32; - - - /** - * @brief Initialization function for the floating-point DCT4/IDCT4. - * @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure. - * @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure. - * @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure. - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length. - */ - arm_status arm_dct4_init_f32( - arm_dct4_instance_f32 * S, - arm_rfft_instance_f32 * S_RFFT, - arm_cfft_radix4_instance_f32 * S_CFFT, - uint16_t N, - uint16_t Nby2, - float32_t normalize); - - - /** - * @brief Processing function for the floating-point DCT4/IDCT4. - * @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure. - * @param[in] pState points to state buffer. - * @param[in,out] pInlineBuffer points to the in-place input and output buffer. - */ - void arm_dct4_f32( - const arm_dct4_instance_f32 * S, - float32_t * pState, - float32_t * pInlineBuffer); - - - /** - * @brief Instance structure for the Q31 DCT4/IDCT4 function. - */ - typedef struct - { - uint16_t N; /**< length of the DCT4. */ - uint16_t Nby2; /**< half of the length of the DCT4. */ - q31_t normalize; /**< normalizing factor. */ - q31_t *pTwiddle; /**< points to the twiddle factor table. */ - q31_t *pCosFactor; /**< points to the cosFactor table. */ - arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */ - arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */ - } arm_dct4_instance_q31; - - - /** - * @brief Initialization function for the Q31 DCT4/IDCT4. - * @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure. - * @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure - * @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length. - */ - arm_status arm_dct4_init_q31( - arm_dct4_instance_q31 * S, - arm_rfft_instance_q31 * S_RFFT, - arm_cfft_radix4_instance_q31 * S_CFFT, - uint16_t N, - uint16_t Nby2, - q31_t normalize); - - - /** - * @brief Processing function for the Q31 DCT4/IDCT4. - * @param[in] S points to an instance of the Q31 DCT4 structure. - * @param[in] pState points to state buffer. - * @param[in,out] pInlineBuffer points to the in-place input and output buffer. - */ - void arm_dct4_q31( - const arm_dct4_instance_q31 * S, - q31_t * pState, - q31_t * pInlineBuffer); - - - /** - * @brief Instance structure for the Q15 DCT4/IDCT4 function. - */ - typedef struct - { - uint16_t N; /**< length of the DCT4. */ - uint16_t Nby2; /**< half of the length of the DCT4. */ - q15_t normalize; /**< normalizing factor. */ - q15_t *pTwiddle; /**< points to the twiddle factor table. */ - q15_t *pCosFactor; /**< points to the cosFactor table. */ - arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */ - arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */ - } arm_dct4_instance_q15; - - - /** - * @brief Initialization function for the Q15 DCT4/IDCT4. - * @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure. - * @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure. - * @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure. - * @param[in] N length of the DCT4. - * @param[in] Nby2 half of the length of the DCT4. - * @param[in] normalize normalizing factor. - * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length. - */ - arm_status arm_dct4_init_q15( - arm_dct4_instance_q15 * S, - arm_rfft_instance_q15 * S_RFFT, - arm_cfft_radix4_instance_q15 * S_CFFT, - uint16_t N, - uint16_t Nby2, - q15_t normalize); - - - /** - * @brief Processing function for the Q15 DCT4/IDCT4. - * @param[in] S points to an instance of the Q15 DCT4 structure. - * @param[in] pState points to state buffer. - * @param[in,out] pInlineBuffer points to the in-place input and output buffer. - */ - void arm_dct4_q15( - const arm_dct4_instance_q15 * S, - q15_t * pState, - q15_t * pInlineBuffer); - - - /** - * @brief Floating-point vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q7 vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector addition. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_add_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Floating-point vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q7 vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_q7( - q7_t * pSrcA, - q7_t * pSrcB, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector subtraction. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in each vector - */ - void arm_sub_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a floating-point vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scale scale factor to be applied - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_f32( - float32_t * pSrc, - float32_t scale, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a Q7 vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_q7( - q7_t * pSrc, - q7_t scaleFract, - int8_t shift, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a Q15 vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_q15( - q15_t * pSrc, - q15_t scaleFract, - int8_t shift, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Multiplies a Q31 vector by a scalar. - * @param[in] pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_scale_q31( - q31_t * pSrc, - q31_t scaleFract, - int8_t shift, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q7 vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Floating-point vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q15 vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Q31 vector absolute value. - * @param[in] pSrc points to the input buffer - * @param[out] pDst points to the output buffer - * @param[in] blockSize number of samples in each vector - */ - void arm_abs_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Dot product of floating-point vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_f32( - float32_t * pSrcA, - float32_t * pSrcB, - uint32_t blockSize, - float32_t * result); - - - /** - * @brief Dot product of Q7 vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_q7( - q7_t * pSrcA, - q7_t * pSrcB, - uint32_t blockSize, - q31_t * result); - - - /** - * @brief Dot product of Q15 vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_q15( - q15_t * pSrcA, - q15_t * pSrcB, - uint32_t blockSize, - q63_t * result); - - - /** - * @brief Dot product of Q31 vectors. - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] blockSize number of samples in each vector - * @param[out] result output result returned here - */ - void arm_dot_prod_q31( - q31_t * pSrcA, - q31_t * pSrcB, - uint32_t blockSize, - q63_t * result); - - - /** - * @brief Shifts the elements of a Q7 vector a specified number of bits. - * @param[in] pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_shift_q7( - q7_t * pSrc, - int8_t shiftBits, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Shifts the elements of a Q15 vector a specified number of bits. - * @param[in] pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_shift_q15( - q15_t * pSrc, - int8_t shiftBits, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Shifts the elements of a Q31 vector a specified number of bits. - * @param[in] pSrc points to the input vector - * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_shift_q31( - q31_t * pSrc, - int8_t shiftBits, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a floating-point vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_f32( - float32_t * pSrc, - float32_t offset, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a Q7 vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_q7( - q7_t * pSrc, - q7_t offset, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a Q15 vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_q15( - q15_t * pSrc, - q15_t offset, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Adds a constant offset to a Q31 vector. - * @param[in] pSrc points to the input vector - * @param[in] offset is the offset to be added - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_offset_q31( - q31_t * pSrc, - q31_t offset, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a floating-point vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a Q7 vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a Q15 vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Negates the elements of a Q31 vector. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] blockSize number of samples in the vector - */ - void arm_negate_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Copies the elements of a floating-point vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Copies the elements of a Q7 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_q7( - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Copies the elements of a Q15 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Copies the elements of a Q31 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_copy_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a floating-point vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_f32( - float32_t value, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a Q7 vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_q7( - q7_t value, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a Q15 vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_q15( - q15_t value, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Fills a constant value into a Q31 vector. - * @param[in] value input value to be filled - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_fill_q31( - q31_t value, - q31_t * pDst, - uint32_t blockSize); - - -/** - * @brief Convolution of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - */ - void arm_conv_f32( - float32_t * pSrcA, - uint32_t srcALen, - float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst); - - - /** - * @brief Convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - */ - void arm_conv_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - -/** - * @brief Convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the location where the output result is written. Length srcALen+srcBLen-1. - */ - void arm_conv_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - - /** - * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_fast_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - - /** - * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - */ - void arm_conv_fast_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Convolution of Q31 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_fast_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Convolution of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - */ - void arm_conv_opt_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Convolution of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. - */ - void arm_conv_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst); - - - /** - * @brief Partial convolution of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_f32( - float32_t * pSrcA, - uint32_t srcALen, - float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Partial convolution of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_fast_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_fast_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Partial convolution of Q31 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_fast_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Partial convolution of Q7 sequences - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_opt_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints, - q15_t * pScratch1, - q15_t * pScratch2); - - -/** - * @brief Partial convolution of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data - * @param[in] firstIndex is the first output sample to start with. - * @param[in] numPoints is the number of output points to be computed. - * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2]. - */ - arm_status arm_conv_partial_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - uint32_t firstIndex, - uint32_t numPoints); - - - /** - * @brief Instance structure for the Q15 FIR decimator. - */ - typedef struct - { - uint8_t M; /**< decimation factor. */ - uint16_t numTaps; /**< number of coefficients in the filter. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - } arm_fir_decimate_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR decimator. - */ - typedef struct - { - uint8_t M; /**< decimation factor. */ - uint16_t numTaps; /**< number of coefficients in the filter. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - } arm_fir_decimate_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR decimator. - */ - typedef struct - { - uint8_t M; /**< decimation factor. */ - uint16_t numTaps; /**< number of coefficients in the filter. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - } arm_fir_decimate_instance_f32; - - - /** - * @brief Processing function for the floating-point FIR decimator. - * @param[in] S points to an instance of the floating-point FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_f32( - const arm_fir_decimate_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point FIR decimator. - * @param[in,out] S points to an instance of the floating-point FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - */ - arm_status arm_fir_decimate_init_f32( - arm_fir_decimate_instance_f32 * S, - uint16_t numTaps, - uint8_t M, - float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 FIR decimator. - * @param[in] S points to an instance of the Q15 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_q15( - const arm_fir_decimate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q15 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_fast_q15( - const arm_fir_decimate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 FIR decimator. - * @param[in,out] S points to an instance of the Q15 FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - */ - arm_status arm_fir_decimate_init_q15( - arm_fir_decimate_instance_q15 * S, - uint16_t numTaps, - uint8_t M, - q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 FIR decimator. - * @param[in] S points to an instance of the Q31 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_q31( - const arm_fir_decimate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - /** - * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4. - * @param[in] S points to an instance of the Q31 FIR decimator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_decimate_fast_q31( - arm_fir_decimate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR decimator. - * @param[in,out] S points to an instance of the Q31 FIR decimator structure. - * @param[in] numTaps number of coefficients in the filter. - * @param[in] M decimation factor. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * blockSize is not a multiple of M. - */ - arm_status arm_fir_decimate_init_q31( - arm_fir_decimate_instance_q31 * S, - uint16_t numTaps, - uint8_t M, - q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 FIR interpolator. - */ - typedef struct - { - uint8_t L; /**< upsample factor. */ - uint16_t phaseLength; /**< length of each polyphase filter component. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ - q15_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */ - } arm_fir_interpolate_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR interpolator. - */ - typedef struct - { - uint8_t L; /**< upsample factor. */ - uint16_t phaseLength; /**< length of each polyphase filter component. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ - q31_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */ - } arm_fir_interpolate_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR interpolator. - */ - typedef struct - { - uint8_t L; /**< upsample factor. */ - uint16_t phaseLength; /**< length of each polyphase filter component. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */ - float32_t *pState; /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */ - } arm_fir_interpolate_instance_f32; - - - /** - * @brief Processing function for the Q15 FIR interpolator. - * @param[in] S points to an instance of the Q15 FIR interpolator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_interpolate_q15( - const arm_fir_interpolate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 FIR interpolator. - * @param[in,out] S points to an instance of the Q15 FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - */ - arm_status arm_fir_interpolate_init_q15( - arm_fir_interpolate_instance_q15 * S, - uint8_t L, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 FIR interpolator. - * @param[in] S points to an instance of the Q15 FIR interpolator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_interpolate_q31( - const arm_fir_interpolate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR interpolator. - * @param[in,out] S points to an instance of the Q31 FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - */ - arm_status arm_fir_interpolate_init_q31( - arm_fir_interpolate_instance_q31 * S, - uint8_t L, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point FIR interpolator. - * @param[in] S points to an instance of the floating-point FIR interpolator structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_interpolate_f32( - const arm_fir_interpolate_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point FIR interpolator. - * @param[in,out] S points to an instance of the floating-point FIR interpolator structure. - * @param[in] L upsample factor. - * @param[in] numTaps number of filter coefficients in the filter. - * @param[in] pCoeffs points to the filter coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] blockSize number of input samples to process per call. - * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if - * the filter length numTaps is not a multiple of the interpolation factor L. - */ - arm_status arm_fir_interpolate_init_f32( - arm_fir_interpolate_instance_f32 * S, - uint8_t L, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the high precision Q31 Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - q63_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */ - q31_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */ - } arm_biquad_cas_df1_32x64_ins_q31; - - - /** - * @param[in] S points to an instance of the high precision Q31 Biquad cascade filter structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cas_df1_32x64_q31( - const arm_biquad_cas_df1_32x64_ins_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @param[in,out] S points to an instance of the high precision Q31 Biquad cascade filter structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] postShift shift to be applied to the output. Varies according to the coefficients format - */ - void arm_biquad_cas_df1_32x64_init_q31( - arm_biquad_cas_df1_32x64_ins_q31 * S, - uint8_t numStages, - q31_t * pCoeffs, - q63_t * pState, - uint8_t postShift); - - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float32_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */ - float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_df2T_instance_f32; - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float32_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */ - float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_stereo_df2T_instance_f32; - - /** - * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter. - */ - typedef struct - { - uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */ - float64_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */ - float64_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */ - } arm_biquad_cascade_df2T_instance_f64; - - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df2T_f32( - const arm_biquad_cascade_df2T_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_stereo_df2T_f32( - const arm_biquad_cascade_stereo_df2T_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in] S points to an instance of the filter data structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_biquad_cascade_df2T_f64( - const arm_biquad_cascade_df2T_instance_f64 * S, - float64_t * pSrc, - float64_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_df2T_init_f32( - arm_biquad_cascade_df2T_instance_f32 * S, - uint8_t numStages, - float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_stereo_df2T_init_f32( - arm_biquad_cascade_stereo_df2T_instance_f32 * S, - uint8_t numStages, - float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter. - * @param[in,out] S points to an instance of the filter data structure. - * @param[in] numStages number of 2nd order stages in the filter. - * @param[in] pCoeffs points to the filter coefficients. - * @param[in] pState points to the state buffer. - */ - void arm_biquad_cascade_df2T_init_f64( - arm_biquad_cascade_df2T_instance_f64 * S, - uint8_t numStages, - float64_t * pCoeffs, - float64_t * pState); - - - /** - * @brief Instance structure for the Q15 FIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of filter stages. */ - q15_t *pState; /**< points to the state variable array. The array is of length numStages. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ - } arm_fir_lattice_instance_q15; - - /** - * @brief Instance structure for the Q31 FIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of filter stages. */ - q31_t *pState; /**< points to the state variable array. The array is of length numStages. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ - } arm_fir_lattice_instance_q31; - - /** - * @brief Instance structure for the floating-point FIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of filter stages. */ - float32_t *pState; /**< points to the state variable array. The array is of length numStages. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */ - } arm_fir_lattice_instance_f32; - - - /** - * @brief Initialization function for the Q15 FIR lattice filter. - * @param[in] S points to an instance of the Q15 FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] pState points to the state buffer. The array is of length numStages. - */ - void arm_fir_lattice_init_q15( - arm_fir_lattice_instance_q15 * S, - uint16_t numStages, - q15_t * pCoeffs, - q15_t * pState); - - - /** - * @brief Processing function for the Q15 FIR lattice filter. - * @param[in] S points to an instance of the Q15 FIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_fir_lattice_q15( - const arm_fir_lattice_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 FIR lattice filter. - * @param[in] S points to an instance of the Q31 FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] pState points to the state buffer. The array is of length numStages. - */ - void arm_fir_lattice_init_q31( - arm_fir_lattice_instance_q31 * S, - uint16_t numStages, - q31_t * pCoeffs, - q31_t * pState); - - - /** - * @brief Processing function for the Q31 FIR lattice filter. - * @param[in] S points to an instance of the Q31 FIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_fir_lattice_q31( - const arm_fir_lattice_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - -/** - * @brief Initialization function for the floating-point FIR lattice filter. - * @param[in] S points to an instance of the floating-point FIR lattice structure. - * @param[in] numStages number of filter stages. - * @param[in] pCoeffs points to the coefficient buffer. The array is of length numStages. - * @param[in] pState points to the state buffer. The array is of length numStages. - */ - void arm_fir_lattice_init_f32( - arm_fir_lattice_instance_f32 * S, - uint16_t numStages, - float32_t * pCoeffs, - float32_t * pState); - - - /** - * @brief Processing function for the floating-point FIR lattice filter. - * @param[in] S points to an instance of the floating-point FIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] blockSize number of samples to process. - */ - void arm_fir_lattice_f32( - const arm_fir_lattice_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 IIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of stages in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */ - q15_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ - q15_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */ - } arm_iir_lattice_instance_q15; - - /** - * @brief Instance structure for the Q31 IIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of stages in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */ - q31_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ - q31_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */ - } arm_iir_lattice_instance_q31; - - /** - * @brief Instance structure for the floating-point IIR lattice filter. - */ - typedef struct - { - uint16_t numStages; /**< number of stages in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */ - float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */ - float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */ - } arm_iir_lattice_instance_f32; - - - /** - * @brief Processing function for the floating-point IIR lattice filter. - * @param[in] S points to an instance of the floating-point IIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_f32( - const arm_iir_lattice_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point IIR lattice filter. - * @param[in] S points to an instance of the floating-point IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages. - * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1. - * @param[in] pState points to the state buffer. The array is of length numStages+blockSize-1. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_init_f32( - arm_iir_lattice_instance_f32 * S, - uint16_t numStages, - float32_t * pkCoeffs, - float32_t * pvCoeffs, - float32_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 IIR lattice filter. - * @param[in] S points to an instance of the Q31 IIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_q31( - const arm_iir_lattice_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 IIR lattice filter. - * @param[in] S points to an instance of the Q31 IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] pkCoeffs points to the reflection coefficient buffer. The array is of length numStages. - * @param[in] pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1. - * @param[in] pState points to the state buffer. The array is of length numStages+blockSize. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_init_q31( - arm_iir_lattice_instance_q31 * S, - uint16_t numStages, - q31_t * pkCoeffs, - q31_t * pvCoeffs, - q31_t * pState, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 IIR lattice filter. - * @param[in] S points to an instance of the Q15 IIR lattice structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data. - * @param[in] blockSize number of samples to process. - */ - void arm_iir_lattice_q15( - const arm_iir_lattice_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - -/** - * @brief Initialization function for the Q15 IIR lattice filter. - * @param[in] S points to an instance of the fixed-point Q15 IIR lattice structure. - * @param[in] numStages number of stages in the filter. - * @param[in] pkCoeffs points to reflection coefficient buffer. The array is of length numStages. - * @param[in] pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1. - * @param[in] pState points to state buffer. The array is of length numStages+blockSize. - * @param[in] blockSize number of samples to process per call. - */ - void arm_iir_lattice_init_q15( - arm_iir_lattice_instance_q15 * S, - uint16_t numStages, - q15_t * pkCoeffs, - q15_t * pvCoeffs, - q15_t * pState, - uint32_t blockSize); - - - /** - * @brief Instance structure for the floating-point LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - float32_t mu; /**< step size that controls filter coefficient updates. */ - } arm_lms_instance_f32; - - - /** - * @brief Processing function for floating-point LMS filter. - * @param[in] S points to an instance of the floating-point LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_f32( - const arm_lms_instance_f32 * S, - float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for floating-point LMS filter. - * @param[in] S points to an instance of the floating-point LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to the coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_init_f32( - arm_lms_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - float32_t mu, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q15 LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q15_t mu; /**< step size that controls filter coefficient updates. */ - uint32_t postShift; /**< bit shift applied to coefficients. */ - } arm_lms_instance_q15; - - - /** - * @brief Initialization function for the Q15 LMS filter. - * @param[in] S points to an instance of the Q15 LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to the coefficient buffer. - * @param[in] pState points to the state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_init_q15( - arm_lms_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - q15_t mu, - uint32_t blockSize, - uint32_t postShift); - - - /** - * @brief Processing function for Q15 LMS filter. - * @param[in] S points to an instance of the Q15 LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_q15( - const arm_lms_instance_q15 * S, - q15_t * pSrc, - q15_t * pRef, - q15_t * pOut, - q15_t * pErr, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q31 LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q31_t mu; /**< step size that controls filter coefficient updates. */ - uint32_t postShift; /**< bit shift applied to coefficients. */ - } arm_lms_instance_q31; - - - /** - * @brief Processing function for Q31 LMS filter. - * @param[in] S points to an instance of the Q15 LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_q31( - const arm_lms_instance_q31 * S, - q31_t * pSrc, - q31_t * pRef, - q31_t * pOut, - q31_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for Q31 LMS filter. - * @param[in] S points to an instance of the Q31 LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_init_q31( - arm_lms_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - q31_t mu, - uint32_t blockSize, - uint32_t postShift); - - - /** - * @brief Instance structure for the floating-point normalized LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - float32_t mu; /**< step size that control filter coefficient updates. */ - float32_t energy; /**< saves previous frame energy. */ - float32_t x0; /**< saves previous input sample. */ - } arm_lms_norm_instance_f32; - - - /** - * @brief Processing function for floating-point normalized LMS filter. - * @param[in] S points to an instance of the floating-point normalized LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_f32( - arm_lms_norm_instance_f32 * S, - float32_t * pSrc, - float32_t * pRef, - float32_t * pOut, - float32_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for floating-point normalized LMS filter. - * @param[in] S points to an instance of the floating-point LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_init_f32( - arm_lms_norm_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - float32_t mu, - uint32_t blockSize); - - - /** - * @brief Instance structure for the Q31 normalized LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q31_t mu; /**< step size that controls filter coefficient updates. */ - uint8_t postShift; /**< bit shift applied to coefficients. */ - q31_t *recipTable; /**< points to the reciprocal initial value table. */ - q31_t energy; /**< saves previous frame energy. */ - q31_t x0; /**< saves previous input sample. */ - } arm_lms_norm_instance_q31; - - - /** - * @brief Processing function for Q31 normalized LMS filter. - * @param[in] S points to an instance of the Q31 normalized LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_q31( - arm_lms_norm_instance_q31 * S, - q31_t * pSrc, - q31_t * pRef, - q31_t * pOut, - q31_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for Q31 normalized LMS filter. - * @param[in] S points to an instance of the Q31 normalized LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_norm_init_q31( - arm_lms_norm_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - q31_t mu, - uint32_t blockSize, - uint8_t postShift); - - - /** - * @brief Instance structure for the Q15 normalized LMS filter. - */ - typedef struct - { - uint16_t numTaps; /**< Number of coefficients in the filter. */ - q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */ - q15_t mu; /**< step size that controls filter coefficient updates. */ - uint8_t postShift; /**< bit shift applied to coefficients. */ - q15_t *recipTable; /**< Points to the reciprocal initial value table. */ - q15_t energy; /**< saves previous frame energy. */ - q15_t x0; /**< saves previous input sample. */ - } arm_lms_norm_instance_q15; - - - /** - * @brief Processing function for Q15 normalized LMS filter. - * @param[in] S points to an instance of the Q15 normalized LMS filter structure. - * @param[in] pSrc points to the block of input data. - * @param[in] pRef points to the block of reference data. - * @param[out] pOut points to the block of output data. - * @param[out] pErr points to the block of error data. - * @param[in] blockSize number of samples to process. - */ - void arm_lms_norm_q15( - arm_lms_norm_instance_q15 * S, - q15_t * pSrc, - q15_t * pRef, - q15_t * pOut, - q15_t * pErr, - uint32_t blockSize); - - - /** - * @brief Initialization function for Q15 normalized LMS filter. - * @param[in] S points to an instance of the Q15 normalized LMS filter structure. - * @param[in] numTaps number of filter coefficients. - * @param[in] pCoeffs points to coefficient buffer. - * @param[in] pState points to state buffer. - * @param[in] mu step size that controls filter coefficient updates. - * @param[in] blockSize number of samples to process. - * @param[in] postShift bit shift applied to coefficients. - */ - void arm_lms_norm_init_q15( - arm_lms_norm_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - q15_t mu, - uint32_t blockSize, - uint8_t postShift); - - - /** - * @brief Correlation of floating-point sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_f32( - float32_t * pSrcA, - uint32_t srcALen, - float32_t * pSrcB, - uint32_t srcBLen, - float32_t * pDst); - - - /** - * @brief Correlation of Q15 sequences - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - */ - void arm_correlate_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch); - - - /** - * @brief Correlation of Q15 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - - void arm_correlate_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - - /** - * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - - void arm_correlate_fast_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst); - - - /** - * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - * @param[in] pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - */ - void arm_correlate_fast_opt_q15( - q15_t * pSrcA, - uint32_t srcALen, - q15_t * pSrcB, - uint32_t srcBLen, - q15_t * pDst, - q15_t * pScratch); - - - /** - * @brief Correlation of Q31 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_fast_q31( - q31_t * pSrcA, - uint32_t srcALen, - q31_t * pSrcB, - uint32_t srcBLen, - q31_t * pDst); - - - /** - * @brief Correlation of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2. - * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). - */ - void arm_correlate_opt_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst, - q15_t * pScratch1, - q15_t * pScratch2); - - - /** - * @brief Correlation of Q7 sequences. - * @param[in] pSrcA points to the first input sequence. - * @param[in] srcALen length of the first input sequence. - * @param[in] pSrcB points to the second input sequence. - * @param[in] srcBLen length of the second input sequence. - * @param[out] pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1. - */ - void arm_correlate_q7( - q7_t * pSrcA, - uint32_t srcALen, - q7_t * pSrcB, - uint32_t srcBLen, - q7_t * pDst); - - - /** - * @brief Instance structure for the floating-point sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - float32_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_f32; - - /** - * @brief Instance structure for the Q31 sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - q31_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_q31; - - /** - * @brief Instance structure for the Q15 sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - q15_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_q15; - - /** - * @brief Instance structure for the Q7 sparse FIR filter. - */ - typedef struct - { - uint16_t numTaps; /**< number of coefficients in the filter. */ - uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */ - q7_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */ - q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/ - uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */ - int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */ - } arm_fir_sparse_instance_q7; - - - /** - * @brief Processing function for the floating-point sparse FIR filter. - * @param[in] S points to an instance of the floating-point sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_f32( - arm_fir_sparse_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - float32_t * pScratchIn, - uint32_t blockSize); - - - /** - * @brief Initialization function for the floating-point sparse FIR filter. - * @param[in,out] S points to an instance of the floating-point sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_f32( - arm_fir_sparse_instance_f32 * S, - uint16_t numTaps, - float32_t * pCoeffs, - float32_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q31 sparse FIR filter. - * @param[in] S points to an instance of the Q31 sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_q31( - arm_fir_sparse_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - q31_t * pScratchIn, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q31 sparse FIR filter. - * @param[in,out] S points to an instance of the Q31 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_q31( - arm_fir_sparse_instance_q31 * S, - uint16_t numTaps, - q31_t * pCoeffs, - q31_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q15 sparse FIR filter. - * @param[in] S points to an instance of the Q15 sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] pScratchOut points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_q15( - arm_fir_sparse_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - q15_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q15 sparse FIR filter. - * @param[in,out] S points to an instance of the Q15 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_q15( - arm_fir_sparse_instance_q15 * S, - uint16_t numTaps, - q15_t * pCoeffs, - q15_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Processing function for the Q7 sparse FIR filter. - * @param[in] S points to an instance of the Q7 sparse FIR structure. - * @param[in] pSrc points to the block of input data. - * @param[out] pDst points to the block of output data - * @param[in] pScratchIn points to a temporary buffer of size blockSize. - * @param[in] pScratchOut points to a temporary buffer of size blockSize. - * @param[in] blockSize number of input samples to process per call. - */ - void arm_fir_sparse_q7( - arm_fir_sparse_instance_q7 * S, - q7_t * pSrc, - q7_t * pDst, - q7_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize); - - - /** - * @brief Initialization function for the Q7 sparse FIR filter. - * @param[in,out] S points to an instance of the Q7 sparse FIR structure. - * @param[in] numTaps number of nonzero coefficients in the filter. - * @param[in] pCoeffs points to the array of filter coefficients. - * @param[in] pState points to the state buffer. - * @param[in] pTapDelay points to the array of offset times. - * @param[in] maxDelay maximum offset time supported. - * @param[in] blockSize number of samples that will be processed per block. - */ - void arm_fir_sparse_init_q7( - arm_fir_sparse_instance_q7 * S, - uint16_t numTaps, - q7_t * pCoeffs, - q7_t * pState, - int32_t * pTapDelay, - uint16_t maxDelay, - uint32_t blockSize); - - - /** - * @brief Floating-point sin_cos function. - * @param[in] theta input value in degrees - * @param[out] pSinVal points to the processed sine output. - * @param[out] pCosVal points to the processed cos output. - */ - void arm_sin_cos_f32( - float32_t theta, - float32_t * pSinVal, - float32_t * pCosVal); - - - /** - * @brief Q31 sin_cos function. - * @param[in] theta scaled input value in degrees - * @param[out] pSinVal points to the processed sine output. - * @param[out] pCosVal points to the processed cosine output. - */ - void arm_sin_cos_q31( - q31_t theta, - q31_t * pSinVal, - q31_t * pCosVal); - - - /** - * @brief Floating-point complex conjugate. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_conj_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples); - - /** - * @brief Q31 complex conjugate. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_conj_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex conjugate. - * @param[in] pSrc points to the input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_conj_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @brief Floating-point complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex magnitude squared - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_squared_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @ingroup groupController - */ - - /** - * @defgroup PID PID Motor Control - * - * A Proportional Integral Derivative (PID) controller is a generic feedback control - * loop mechanism widely used in industrial control systems. - * A PID controller is the most commonly used type of feedback controller. - * - * This set of functions implements (PID) controllers - * for Q15, Q31, and floating-point data types. The functions operate on a single sample - * of data and each call to the function returns a single processed value. - * S points to an instance of the PID control data structure. in - * is the input sample value. The functions return the output value. - * - * \par Algorithm: - * 
-   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
-   *    A0 = Kp + Ki + Kd
-   *    A1 = (-Kp ) - (2 * Kd )
-   *    A2 = Kd
- * - * \par - * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant - * - * \par - * \image html PID.gif "Proportional Integral Derivative Controller" - * - * \par - * The PID controller calculates an "error" value as the difference between - * the measured output and the reference input. - * The controller attempts to minimize the error by adjusting the process control inputs. - * The proportional value determines the reaction to the current error, - * the integral value determines the reaction based on the sum of recent errors, - * and the derivative value determines the reaction based on the rate at which the error has been changing. - * - * \par Instance Structure - * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. - * A separate instance structure must be defined for each PID Controller. - * There are separate instance structure declarations for each of the 3 supported data types. - * - * \par Reset Functions - * There is also an associated reset function for each data type which clears the state array. - * - * \par Initialization Functions - * There is also an associated initialization function for each data type. - * The initialization function performs the following operations: - * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains. - * - Zeros out the values in the state buffer. - * - * \par - * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. - * - * \par Fixed-Point Behavior - * Care must be taken when using the fixed-point versions of the PID Controller functions. - * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup PID - * @{ - */ - - /** - * @brief Process function for the floating-point PID Control. - * @param[in,out] S is an instance of the floating-point PID Control structure - * @param[in] in input sample to process - * @return out processed output sample. - */ - static __INLINE float32_t arm_pid_f32( - arm_pid_instance_f32 * S, - float32_t in) - { - float32_t out; - - /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */ - out = (S->A0 * in) + - (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]); - - /* Update state */ - S->state[1] = S->state[0]; - S->state[0] = in; - S->state[2] = out; - - /* return to application */ - return (out); - - } - - /** - * @brief Process function for the Q31 PID Control. - * @param[in,out] S points to an instance of the Q31 PID Control structure - * @param[in] in input sample to process - * @return out processed output sample. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 64-bit accumulator. - * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. - * Thus, if the accumulator result overflows it wraps around rather than clip. - * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. - * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. - */ - static __INLINE q31_t arm_pid_q31( - arm_pid_instance_q31 * S, - q31_t in) - { - q63_t acc; - q31_t out; - - /* acc = A0 * x[n] */ - acc = (q63_t) S->A0 * in; - - /* acc += A1 * x[n-1] */ - acc += (q63_t) S->A1 * S->state[0]; - - /* acc += A2 * x[n-2] */ - acc += (q63_t) S->A2 * S->state[1]; - - /* convert output to 1.31 format to add y[n-1] */ - out = (q31_t) (acc >> 31u); - - /* out += y[n-1] */ - out += S->state[2]; - - /* Update state */ - S->state[1] = S->state[0]; - S->state[0] = in; - S->state[2] = out; - - /* return to application */ - return (out); - } - - - /** - * @brief Process function for the Q15 PID Control. - * @param[in,out] S points to an instance of the Q15 PID Control structure - * @param[in] in input sample to process - * @return out processed output sample. - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using a 64-bit internal accumulator. - * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. - * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. - * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. - * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. - * Lastly, the accumulator is saturated to yield a result in 1.15 format. - */ - static __INLINE q15_t arm_pid_q15( - arm_pid_instance_q15 * S, - q15_t in) - { - q63_t acc; - q15_t out; - -#ifndef ARM_MATH_CM0_FAMILY - __SIMD32_TYPE *vstate; - - /* Implementation of PID controller */ - - /* acc = A0 * x[n] */ - acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in); - - /* acc += A1 * x[n-1] + A2 * x[n-2] */ - vstate = __SIMD32_CONST(S->state); - acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)*vstate, (uint64_t)acc); -#else - /* acc = A0 * x[n] */ - acc = ((q31_t) S->A0) * in; - - /* acc += A1 * x[n-1] + A2 * x[n-2] */ - acc += (q31_t) S->A1 * S->state[0]; - acc += (q31_t) S->A2 * S->state[1]; -#endif - - /* acc += y[n-1] */ - acc += (q31_t) S->state[2] << 15; - - /* saturate the output */ - out = (q15_t) (__SSAT((acc >> 15), 16)); - - /* Update state */ - S->state[1] = S->state[0]; - S->state[0] = in; - S->state[2] = out; - - /* return to application */ - return (out); - } - - /** - * @} end of PID group - */ - - - /** - * @brief Floating-point matrix inverse. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] dst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR. - */ - arm_status arm_mat_inverse_f32( - const arm_matrix_instance_f32 * src, - arm_matrix_instance_f32 * dst); - - - /** - * @brief Floating-point matrix inverse. - * @param[in] src points to the instance of the input floating-point matrix structure. - * @param[out] dst points to the instance of the output floating-point matrix structure. - * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. - * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR. - */ - arm_status arm_mat_inverse_f64( - const arm_matrix_instance_f64 * src, - arm_matrix_instance_f64 * dst); - - - - /** - * @ingroup groupController - */ - - /** - * @defgroup clarke Vector Clarke Transform - * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector. - * Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents - * in the two-phase orthogonal stator axis Ialpha and Ibeta. - * When Ialpha is superposed with Ia as shown in the figure below - * \image html clarke.gif Stator current space vector and its components in (a,b). - * and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta - * can be calculated using only Ia and Ib. - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html clarkeFormula.gif - * where Ia and Ib are the instantaneous stator phases and - * pIalpha and pIbeta are the two coordinates of time invariant vector. - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Clarke transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup clarke - * @{ - */ - - /** - * - * @brief Floating-point Clarke transform - * @param[in] Ia input three-phase coordinate a - * @param[in] Ib input three-phase coordinate b - * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - * @param[out] pIbeta points to output two-phase orthogonal vector axis beta - */ - static __INLINE void arm_clarke_f32( - float32_t Ia, - float32_t Ib, - float32_t * pIalpha, - float32_t * pIbeta) - { - /* Calculate pIalpha using the equation, pIalpha = Ia */ - *pIalpha = Ia; - - /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */ - *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib); - } - - - /** - * @brief Clarke transform for Q31 version - * @param[in] Ia input three-phase coordinate a - * @param[in] Ib input three-phase coordinate b - * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - * @param[out] pIbeta points to output two-phase orthogonal vector axis beta - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 32-bit accumulator. - * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - * There is saturation on the addition, hence there is no risk of overflow. - */ - static __INLINE void arm_clarke_q31( - q31_t Ia, - q31_t Ib, - q31_t * pIalpha, - q31_t * pIbeta) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - - /* Calculating pIalpha from Ia by equation pIalpha = Ia */ - *pIalpha = Ia; - - /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */ - product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30); - - /* Intermediate product is calculated by (2/sqrt(3) * Ib) */ - product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30); - - /* pIbeta is calculated by adding the intermediate products */ - *pIbeta = __QADD(product1, product2); - } - - /** - * @} end of clarke group - */ - - /** - * @brief Converts the elements of the Q7 vector to Q31 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_q7_to_q31( - q7_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - - /** - * @ingroup groupController - */ - - /** - * @defgroup inv_clarke Vector Inverse Clarke Transform - * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases. - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html clarkeInvFormula.gif - * where pIa and pIb are the instantaneous stator phases and - * Ialpha and Ibeta are the two coordinates of time invariant vector. - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Clarke transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup inv_clarke - * @{ - */ - - /** - * @brief Floating-point Inverse Clarke transform - * @param[in] Ialpha input two-phase orthogonal vector axis alpha - * @param[in] Ibeta input two-phase orthogonal vector axis beta - * @param[out] pIa points to output three-phase coordinate a - * @param[out] pIb points to output three-phase coordinate b - */ - static __INLINE void arm_inv_clarke_f32( - float32_t Ialpha, - float32_t Ibeta, - float32_t * pIa, - float32_t * pIb) - { - /* Calculating pIa from Ialpha by equation pIa = Ialpha */ - *pIa = Ialpha; - - /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */ - *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta; - } - - - /** - * @brief Inverse Clarke transform for Q31 version - * @param[in] Ialpha input two-phase orthogonal vector axis alpha - * @param[in] Ibeta input two-phase orthogonal vector axis beta - * @param[out] pIa points to output three-phase coordinate a - * @param[out] pIb points to output three-phase coordinate b - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 32-bit accumulator. - * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - * There is saturation on the subtraction, hence there is no risk of overflow. - */ - static __INLINE void arm_inv_clarke_q31( - q31_t Ialpha, - q31_t Ibeta, - q31_t * pIa, - q31_t * pIb) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - - /* Calculating pIa from Ialpha by equation pIa = Ialpha */ - *pIa = Ialpha; - - /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */ - product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31); - - /* Intermediate product is calculated by (1/sqrt(3) * pIb) */ - product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31); - - /* pIb is calculated by subtracting the products */ - *pIb = __QSUB(product2, product1); - } - - /** - * @} end of inv_clarke group - */ - - /** - * @brief Converts the elements of the Q7 vector to Q15 vector. - * @param[in] pSrc input pointer - * @param[out] pDst output pointer - * @param[in] blockSize number of samples to process - */ - void arm_q7_to_q15( - q7_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - - /** - * @ingroup groupController - */ - - /** - * @defgroup park Vector Park Transform - * - * Forward Park transform converts the input two-coordinate vector to flux and torque components. - * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents - * from the stationary to the moving reference frame and control the spatial relationship between - * the stator vector current and rotor flux vector. - * If we consider the d axis aligned with the rotor flux, the diagram below shows the - * current vector and the relationship from the two reference frames: - * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame" - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html parkFormula.gif - * where Ialpha and Ibeta are the stator vector components, - * pId and pIq are rotor vector components and cosVal and sinVal are the - * cosine and sine values of theta (rotor flux position). - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Park transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup park - * @{ - */ - - /** - * @brief Floating-point Park transform - * @param[in] Ialpha input two-phase vector coordinate alpha - * @param[in] Ibeta input two-phase vector coordinate beta - * @param[out] pId points to output rotor reference frame d - * @param[out] pIq points to output rotor reference frame q - * @param[in] sinVal sine value of rotation angle theta - * @param[in] cosVal cosine value of rotation angle theta - * - * The function implements the forward Park transform. - * - */ - static __INLINE void arm_park_f32( - float32_t Ialpha, - float32_t Ibeta, - float32_t * pId, - float32_t * pIq, - float32_t sinVal, - float32_t cosVal) - { - /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */ - *pId = Ialpha * cosVal + Ibeta * sinVal; - - /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */ - *pIq = -Ialpha * sinVal + Ibeta * cosVal; - } - - - /** - * @brief Park transform for Q31 version - * @param[in] Ialpha input two-phase vector coordinate alpha - * @param[in] Ibeta input two-phase vector coordinate beta - * @param[out] pId points to output rotor reference frame d - * @param[out] pIq points to output rotor reference frame q - * @param[in] sinVal sine value of rotation angle theta - * @param[in] cosVal cosine value of rotation angle theta - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 32-bit accumulator. - * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - * There is saturation on the addition and subtraction, hence there is no risk of overflow. - */ - static __INLINE void arm_park_q31( - q31_t Ialpha, - q31_t Ibeta, - q31_t * pId, - q31_t * pIq, - q31_t sinVal, - q31_t cosVal) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - q31_t product3, product4; /* Temporary variables used to store intermediate results */ - - /* Intermediate product is calculated by (Ialpha * cosVal) */ - product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31); - - /* Intermediate product is calculated by (Ibeta * sinVal) */ - product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31); - - - /* Intermediate product is calculated by (Ialpha * sinVal) */ - product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31); - - /* Intermediate product is calculated by (Ibeta * cosVal) */ - product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31); - - /* Calculate pId by adding the two intermediate products 1 and 2 */ - *pId = __QADD(product1, product2); - - /* Calculate pIq by subtracting the two intermediate products 3 from 4 */ - *pIq = __QSUB(product4, product3); - } - - /** - * @} end of park group - */ - - /** - * @brief Converts the elements of the Q7 vector to floating-point vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q7_to_float( - q7_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @ingroup groupController - */ - - /** - * @defgroup inv_park Vector Inverse Park transform - * Inverse Park transform converts the input flux and torque components to two-coordinate vector. - * - * The function operates on a single sample of data and each call to the function returns the processed output. - * The library provides separate functions for Q31 and floating-point data types. - * \par Algorithm - * \image html parkInvFormula.gif - * where pIalpha and pIbeta are the stator vector components, - * Id and Iq are rotor vector components and cosVal and sinVal are the - * cosine and sine values of theta (rotor flux position). - * \par Fixed-Point Behavior - * Care must be taken when using the Q31 version of the Park transform. - * In particular, the overflow and saturation behavior of the accumulator used must be considered. - * Refer to the function specific documentation below for usage guidelines. - */ - - /** - * @addtogroup inv_park - * @{ - */ - - /** - * @brief Floating-point Inverse Park transform - * @param[in] Id input coordinate of rotor reference frame d - * @param[in] Iq input coordinate of rotor reference frame q - * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - * @param[out] pIbeta points to output two-phase orthogonal vector axis beta - * @param[in] sinVal sine value of rotation angle theta - * @param[in] cosVal cosine value of rotation angle theta - */ - static __INLINE void arm_inv_park_f32( - float32_t Id, - float32_t Iq, - float32_t * pIalpha, - float32_t * pIbeta, - float32_t sinVal, - float32_t cosVal) - { - /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */ - *pIalpha = Id * cosVal - Iq * sinVal; - - /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */ - *pIbeta = Id * sinVal + Iq * cosVal; - } - - - /** - * @brief Inverse Park transform for Q31 version - * @param[in] Id input coordinate of rotor reference frame d - * @param[in] Iq input coordinate of rotor reference frame q - * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha - * @param[out] pIbeta points to output two-phase orthogonal vector axis beta - * @param[in] sinVal sine value of rotation angle theta - * @param[in] cosVal cosine value of rotation angle theta - * - * Scaling and Overflow Behavior: - * \par - * The function is implemented using an internal 32-bit accumulator. - * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. - * There is saturation on the addition, hence there is no risk of overflow. - */ - static __INLINE void arm_inv_park_q31( - q31_t Id, - q31_t Iq, - q31_t * pIalpha, - q31_t * pIbeta, - q31_t sinVal, - q31_t cosVal) - { - q31_t product1, product2; /* Temporary variables used to store intermediate results */ - q31_t product3, product4; /* Temporary variables used to store intermediate results */ - - /* Intermediate product is calculated by (Id * cosVal) */ - product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31); - - /* Intermediate product is calculated by (Iq * sinVal) */ - product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31); - - - /* Intermediate product is calculated by (Id * sinVal) */ - product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31); - - /* Intermediate product is calculated by (Iq * cosVal) */ - product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31); - - /* Calculate pIalpha by using the two intermediate products 1 and 2 */ - *pIalpha = __QSUB(product1, product2); - - /* Calculate pIbeta by using the two intermediate products 3 and 4 */ - *pIbeta = __QADD(product4, product3); - } - - /** - * @} end of Inverse park group - */ - - - /** - * @brief Converts the elements of the Q31 vector to floating-point vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q31_to_float( - q31_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - /** - * @ingroup groupInterpolation - */ - - /** - * @defgroup LinearInterpolate Linear Interpolation - * - * Linear interpolation is a method of curve fitting using linear polynomials. - * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line - * - * \par - * \image html LinearInterp.gif "Linear interpolation" - * - * \par - * A Linear Interpolate function calculates an output value(y), for the input(x) - * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values) - * - * \par Algorithm: - * 
-   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
-   *       where x0, x1 are nearest values of input x
-   *             y0, y1 are nearest values to output y
-   *
- * - * \par - * This set of functions implements Linear interpolation process - * for Q7, Q15, Q31, and floating-point data types. The functions operate on a single - * sample of data and each call to the function returns a single processed value. - * S points to an instance of the Linear Interpolate function data structure. - * x is the input sample value. The functions returns the output value. - * - * \par - * if x is outside of the table boundary, Linear interpolation returns first value of the table - * if x is below input range and returns last value of table if x is above range. - */ - - /** - * @addtogroup LinearInterpolate - * @{ - */ - - /** - * @brief Process function for the floating-point Linear Interpolation Function. - * @param[in,out] S is an instance of the floating-point Linear Interpolation structure - * @param[in] x input sample to process - * @return y processed output sample. - * - */ - static __INLINE float32_t arm_linear_interp_f32( - arm_linear_interp_instance_f32 * S, - float32_t x) - { - float32_t y; - float32_t x0, x1; /* Nearest input values */ - float32_t y0, y1; /* Nearest output values */ - float32_t xSpacing = S->xSpacing; /* spacing between input values */ - int32_t i; /* Index variable */ - float32_t *pYData = S->pYData; /* pointer to output table */ - - /* Calculation of index */ - i = (int32_t) ((x - S->x1) / xSpacing); - - if(i < 0) - { - /* Iniatilize output for below specified range as least output value of table */ - y = pYData[0]; - } - else if((uint32_t)i >= S->nValues) - { - /* Iniatilize output for above specified range as last output value of table */ - y = pYData[S->nValues - 1]; - } - else - { - /* Calculation of nearest input values */ - x0 = S->x1 + i * xSpacing; - x1 = S->x1 + (i + 1) * xSpacing; - - /* Read of nearest output values */ - y0 = pYData[i]; - y1 = pYData[i + 1]; - - /* Calculation of output */ - y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0)); - - } - - /* returns output value */ - return (y); - } - - - /** - * - * @brief Process function for the Q31 Linear Interpolation Function. - * @param[in] pYData pointer to Q31 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - * - */ - static __INLINE q31_t arm_linear_interp_q31( - q31_t * pYData, - q31_t x, - uint32_t nValues) - { - q31_t y; /* output */ - q31_t y0, y1; /* Nearest output values */ - q31_t fract; /* fractional part */ - int32_t index; /* Index to read nearest output values */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - index = ((x & (q31_t)0xFFF00000) >> 20); - - if(index >= (int32_t)(nValues - 1)) - { - return (pYData[nValues - 1]); - } - else if(index < 0) - { - return (pYData[0]); - } - else - { - /* 20 bits for the fractional part */ - /* shift left by 11 to keep fract in 1.31 format */ - fract = (x & 0x000FFFFF) << 11; - - /* Read two nearest output values from the index in 1.31(q31) format */ - y0 = pYData[index]; - y1 = pYData[index + 1]; - - /* Calculation of y0 * (1-fract) and y is in 2.30 format */ - y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32)); - - /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */ - y += ((q31_t) (((q63_t) y1 * fract) >> 32)); - - /* Convert y to 1.31 format */ - return (y << 1u); - } - } - - - /** - * - * @brief Process function for the Q15 Linear Interpolation Function. - * @param[in] pYData pointer to Q15 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - * - */ - static __INLINE q15_t arm_linear_interp_q15( - q15_t * pYData, - q31_t x, - uint32_t nValues) - { - q63_t y; /* output */ - q15_t y0, y1; /* Nearest output values */ - q31_t fract; /* fractional part */ - int32_t index; /* Index to read nearest output values */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - index = ((x & (int32_t)0xFFF00000) >> 20); - - if(index >= (int32_t)(nValues - 1)) - { - return (pYData[nValues - 1]); - } - else if(index < 0) - { - return (pYData[0]); - } - else - { - /* 20 bits for the fractional part */ - /* fract is in 12.20 format */ - fract = (x & 0x000FFFFF); - - /* Read two nearest output values from the index */ - y0 = pYData[index]; - y1 = pYData[index + 1]; - - /* Calculation of y0 * (1-fract) and y is in 13.35 format */ - y = ((q63_t) y0 * (0xFFFFF - fract)); - - /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */ - y += ((q63_t) y1 * (fract)); - - /* convert y to 1.15 format */ - return (q15_t) (y >> 20); - } - } - - - /** - * - * @brief Process function for the Q7 Linear Interpolation Function. - * @param[in] pYData pointer to Q7 Linear Interpolation table - * @param[in] x input sample to process - * @param[in] nValues number of table values - * @return y processed output sample. - * - * \par - * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. - * This function can support maximum of table size 2^12. - */ - static __INLINE q7_t arm_linear_interp_q7( - q7_t * pYData, - q31_t x, - uint32_t nValues) - { - q31_t y; /* output */ - q7_t y0, y1; /* Nearest output values */ - q31_t fract; /* fractional part */ - uint32_t index; /* Index to read nearest output values */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - if (x < 0) - { - return (pYData[0]); - } - index = (x >> 20) & 0xfff; - - if(index >= (nValues - 1)) - { - return (pYData[nValues - 1]); - } - else - { - /* 20 bits for the fractional part */ - /* fract is in 12.20 format */ - fract = (x & 0x000FFFFF); - - /* Read two nearest output values from the index and are in 1.7(q7) format */ - y0 = pYData[index]; - y1 = pYData[index + 1]; - - /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */ - y = ((y0 * (0xFFFFF - fract))); - - /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */ - y += (y1 * fract); - - /* convert y to 1.7(q7) format */ - return (q7_t) (y >> 20); - } - } - - /** - * @} end of LinearInterpolate group - */ - - /** - * @brief Fast approximation to the trigonometric sine function for floating-point data. - * @param[in] x input value in radians. - * @return sin(x). - */ - float32_t arm_sin_f32( - float32_t x); - - - /** - * @brief Fast approximation to the trigonometric sine function for Q31 data. - * @param[in] x Scaled input value in radians. - * @return sin(x). - */ - q31_t arm_sin_q31( - q31_t x); - - - /** - * @brief Fast approximation to the trigonometric sine function for Q15 data. - * @param[in] x Scaled input value in radians. - * @return sin(x). - */ - q15_t arm_sin_q15( - q15_t x); - - - /** - * @brief Fast approximation to the trigonometric cosine function for floating-point data. - * @param[in] x input value in radians. - * @return cos(x). - */ - float32_t arm_cos_f32( - float32_t x); - - - /** - * @brief Fast approximation to the trigonometric cosine function for Q31 data. - * @param[in] x Scaled input value in radians. - * @return cos(x). - */ - q31_t arm_cos_q31( - q31_t x); - - - /** - * @brief Fast approximation to the trigonometric cosine function for Q15 data. - * @param[in] x Scaled input value in radians. - * @return cos(x). - */ - q15_t arm_cos_q15( - q15_t x); - - - /** - * @ingroup groupFastMath - */ - - - /** - * @defgroup SQRT Square Root - * - * Computes the square root of a number. - * There are separate functions for Q15, Q31, and floating-point data types. - * The square root function is computed using the Newton-Raphson algorithm. - * This is an iterative algorithm of the form: - * 
-   *      x1 = x0 - f(x0)/f'(x0)
-   *
- * where x1 is the current estimate, - * x0 is the previous estimate, and - * f'(x0) is the derivative of f() evaluated at x0. - * For the square root function, the algorithm reduces to: - * 
-   *     x0 = in/2                         [initial guess]
-   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
-   *
- */ - - - /** - * @addtogroup SQRT - * @{ - */ - - /** - * @brief Floating-point square root function. - * @param[in] in input value. - * @param[out] pOut square root of input value. - * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if - * in is negative value and returns zero output for negative values. - */ - static __INLINE arm_status arm_sqrt_f32( - float32_t in, - float32_t * pOut) - { - if(in >= 0.0f) - { - -#if (__FPU_USED == 1) && defined ( __CC_ARM ) - *pOut = __sqrtf(in); -#elif (__FPU_USED == 1) && (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) - *pOut = __builtin_sqrtf(in); -#elif (__FPU_USED == 1) && defined(__GNUC__) - *pOut = __builtin_sqrtf(in); -#elif (__FPU_USED == 1) && defined ( __ICCARM__ ) && (__VER__ >= 6040000) - __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in)); -#else - *pOut = sqrtf(in); -#endif - - return (ARM_MATH_SUCCESS); - } - else - { - *pOut = 0.0f; - return (ARM_MATH_ARGUMENT_ERROR); - } - } - - - /** - * @brief Q31 square root function. - * @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF. - * @param[out] pOut square root of input value. - * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if - * in is negative value and returns zero output for negative values. - */ - arm_status arm_sqrt_q31( - q31_t in, - q31_t * pOut); - - - /** - * @brief Q15 square root function. - * @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF. - * @param[out] pOut square root of input value. - * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if - * in is negative value and returns zero output for negative values. - */ - arm_status arm_sqrt_q15( - q15_t in, - q15_t * pOut); - - /** - * @} end of SQRT group - */ - - - /** - * @brief floating-point Circular write function. - */ - static __INLINE void arm_circularWrite_f32( - int32_t * circBuffer, - int32_t L, - uint16_t * writeOffset, - int32_t bufferInc, - const int32_t * src, - int32_t srcInc, - uint32_t blockSize) - { - uint32_t i = 0u; - int32_t wOffset; - - /* Copy the value of Index pointer that points - * to the current location where the input samples to be copied */ - wOffset = *writeOffset; - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the input sample to the circular buffer */ - circBuffer[wOffset] = *src; - - /* Update the input pointer */ - src += srcInc; - - /* Circularly update wOffset. Watch out for positive and negative value */ - wOffset += bufferInc; - if(wOffset >= L) - wOffset -= L; - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *writeOffset = (uint16_t)wOffset; - } - - - - /** - * @brief floating-point Circular Read function. - */ - static __INLINE void arm_circularRead_f32( - int32_t * circBuffer, - int32_t L, - int32_t * readOffset, - int32_t bufferInc, - int32_t * dst, - int32_t * dst_base, - int32_t dst_length, - int32_t dstInc, - uint32_t blockSize) - { - uint32_t i = 0u; - int32_t rOffset, dst_end; - - /* Copy the value of Index pointer that points - * to the current location from where the input samples to be read */ - rOffset = *readOffset; - dst_end = (int32_t) (dst_base + dst_length); - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the sample from the circular buffer to the destination buffer */ - *dst = circBuffer[rOffset]; - - /* Update the input pointer */ - dst += dstInc; - - if(dst == (int32_t *) dst_end) - { - dst = dst_base; - } - - /* Circularly update rOffset. Watch out for positive and negative value */ - rOffset += bufferInc; - - if(rOffset >= L) - { - rOffset -= L; - } - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *readOffset = rOffset; - } - - - /** - * @brief Q15 Circular write function. - */ - static __INLINE void arm_circularWrite_q15( - q15_t * circBuffer, - int32_t L, - uint16_t * writeOffset, - int32_t bufferInc, - const q15_t * src, - int32_t srcInc, - uint32_t blockSize) - { - uint32_t i = 0u; - int32_t wOffset; - - /* Copy the value of Index pointer that points - * to the current location where the input samples to be copied */ - wOffset = *writeOffset; - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the input sample to the circular buffer */ - circBuffer[wOffset] = *src; - - /* Update the input pointer */ - src += srcInc; - - /* Circularly update wOffset. Watch out for positive and negative value */ - wOffset += bufferInc; - if(wOffset >= L) - wOffset -= L; - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *writeOffset = (uint16_t)wOffset; - } - - - /** - * @brief Q15 Circular Read function. - */ - static __INLINE void arm_circularRead_q15( - q15_t * circBuffer, - int32_t L, - int32_t * readOffset, - int32_t bufferInc, - q15_t * dst, - q15_t * dst_base, - int32_t dst_length, - int32_t dstInc, - uint32_t blockSize) - { - uint32_t i = 0; - int32_t rOffset, dst_end; - - /* Copy the value of Index pointer that points - * to the current location from where the input samples to be read */ - rOffset = *readOffset; - - dst_end = (int32_t) (dst_base + dst_length); - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the sample from the circular buffer to the destination buffer */ - *dst = circBuffer[rOffset]; - - /* Update the input pointer */ - dst += dstInc; - - if(dst == (q15_t *) dst_end) - { - dst = dst_base; - } - - /* Circularly update wOffset. Watch out for positive and negative value */ - rOffset += bufferInc; - - if(rOffset >= L) - { - rOffset -= L; - } - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *readOffset = rOffset; - } - - - /** - * @brief Q7 Circular write function. - */ - static __INLINE void arm_circularWrite_q7( - q7_t * circBuffer, - int32_t L, - uint16_t * writeOffset, - int32_t bufferInc, - const q7_t * src, - int32_t srcInc, - uint32_t blockSize) - { - uint32_t i = 0u; - int32_t wOffset; - - /* Copy the value of Index pointer that points - * to the current location where the input samples to be copied */ - wOffset = *writeOffset; - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the input sample to the circular buffer */ - circBuffer[wOffset] = *src; - - /* Update the input pointer */ - src += srcInc; - - /* Circularly update wOffset. Watch out for positive and negative value */ - wOffset += bufferInc; - if(wOffset >= L) - wOffset -= L; - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *writeOffset = (uint16_t)wOffset; - } - - - /** - * @brief Q7 Circular Read function. - */ - static __INLINE void arm_circularRead_q7( - q7_t * circBuffer, - int32_t L, - int32_t * readOffset, - int32_t bufferInc, - q7_t * dst, - q7_t * dst_base, - int32_t dst_length, - int32_t dstInc, - uint32_t blockSize) - { - uint32_t i = 0; - int32_t rOffset, dst_end; - - /* Copy the value of Index pointer that points - * to the current location from where the input samples to be read */ - rOffset = *readOffset; - - dst_end = (int32_t) (dst_base + dst_length); - - /* Loop over the blockSize */ - i = blockSize; - - while(i > 0u) - { - /* copy the sample from the circular buffer to the destination buffer */ - *dst = circBuffer[rOffset]; - - /* Update the input pointer */ - dst += dstInc; - - if(dst == (q7_t *) dst_end) - { - dst = dst_base; - } - - /* Circularly update rOffset. Watch out for positive and negative value */ - rOffset += bufferInc; - - if(rOffset >= L) - { - rOffset -= L; - } - - /* Decrement the loop counter */ - i--; - } - - /* Update the index pointer */ - *readOffset = rOffset; - } - - - /** - * @brief Sum of the squares of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_q31( - q31_t * pSrc, - uint32_t blockSize, - q63_t * pResult); - - - /** - * @brief Sum of the squares of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Sum of the squares of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_q15( - q15_t * pSrc, - uint32_t blockSize, - q63_t * pResult); - - - /** - * @brief Sum of the squares of the elements of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_power_q7( - q7_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Mean value of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_q7( - q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult); - - - /** - * @brief Mean value of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Mean value of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Mean value of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_mean_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Variance of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Variance of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Variance of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_var_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Root Mean Square of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_rms_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Root Mean Square of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_rms_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Root Mean Square of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_rms_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Standard deviation of the elements of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult); - - - /** - * @brief Standard deviation of the elements of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult); - - - /** - * @brief Standard deviation of the elements of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output value. - */ - void arm_std_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult); - - - /** - * @brief Floating-point complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_f32( - float32_t * pSrc, - float32_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_q31( - q31_t * pSrc, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex magnitude - * @param[in] pSrc points to the complex input vector - * @param[out] pDst points to the real output vector - * @param[in] numSamples number of complex samples in the input vector - */ - void arm_cmplx_mag_q15( - q15_t * pSrc, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q15 complex dot product - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] numSamples number of complex samples in each vector - * @param[out] realResult real part of the result returned here - * @param[out] imagResult imaginary part of the result returned here - */ - void arm_cmplx_dot_prod_q15( - q15_t * pSrcA, - q15_t * pSrcB, - uint32_t numSamples, - q31_t * realResult, - q31_t * imagResult); - - - /** - * @brief Q31 complex dot product - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] numSamples number of complex samples in each vector - * @param[out] realResult real part of the result returned here - * @param[out] imagResult imaginary part of the result returned here - */ - void arm_cmplx_dot_prod_q31( - q31_t * pSrcA, - q31_t * pSrcB, - uint32_t numSamples, - q63_t * realResult, - q63_t * imagResult); - - - /** - * @brief Floating-point complex dot product - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[in] numSamples number of complex samples in each vector - * @param[out] realResult real part of the result returned here - * @param[out] imagResult imaginary part of the result returned here - */ - void arm_cmplx_dot_prod_f32( - float32_t * pSrcA, - float32_t * pSrcB, - uint32_t numSamples, - float32_t * realResult, - float32_t * imagResult); - - - /** - * @brief Q15 complex-by-real multiplication - * @param[in] pSrcCmplx points to the complex input vector - * @param[in] pSrcReal points to the real input vector - * @param[out] pCmplxDst points to the complex output vector - * @param[in] numSamples number of samples in each vector - */ - void arm_cmplx_mult_real_q15( - q15_t * pSrcCmplx, - q15_t * pSrcReal, - q15_t * pCmplxDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex-by-real multiplication - * @param[in] pSrcCmplx points to the complex input vector - * @param[in] pSrcReal points to the real input vector - * @param[out] pCmplxDst points to the complex output vector - * @param[in] numSamples number of samples in each vector - */ - void arm_cmplx_mult_real_q31( - q31_t * pSrcCmplx, - q31_t * pSrcReal, - q31_t * pCmplxDst, - uint32_t numSamples); - - - /** - * @brief Floating-point complex-by-real multiplication - * @param[in] pSrcCmplx points to the complex input vector - * @param[in] pSrcReal points to the real input vector - * @param[out] pCmplxDst points to the complex output vector - * @param[in] numSamples number of samples in each vector - */ - void arm_cmplx_mult_real_f32( - float32_t * pSrcCmplx, - float32_t * pSrcReal, - float32_t * pCmplxDst, - uint32_t numSamples); - - - /** - * @brief Minimum value of a Q7 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] result is output pointer - * @param[in] index is the array index of the minimum value in the input buffer. - */ - void arm_min_q7( - q7_t * pSrc, - uint32_t blockSize, - q7_t * result, - uint32_t * index); - - - /** - * @brief Minimum value of a Q15 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[in] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex); - - - /** - * @brief Minimum value of a Q31 vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex); - - - /** - * @brief Minimum value of a floating-point vector. - * @param[in] pSrc is input pointer - * @param[in] blockSize is the number of samples to process - * @param[out] pResult is output pointer - * @param[out] pIndex is the array index of the minimum value in the input buffer. - */ - void arm_min_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex); - - -/** - * @brief Maximum value of a Q7 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_q7( - q7_t * pSrc, - uint32_t blockSize, - q7_t * pResult, - uint32_t * pIndex); - - -/** - * @brief Maximum value of a Q15 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_q15( - q15_t * pSrc, - uint32_t blockSize, - q15_t * pResult, - uint32_t * pIndex); - - -/** - * @brief Maximum value of a Q31 vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_q31( - q31_t * pSrc, - uint32_t blockSize, - q31_t * pResult, - uint32_t * pIndex); - - -/** - * @brief Maximum value of a floating-point vector. - * @param[in] pSrc points to the input buffer - * @param[in] blockSize length of the input vector - * @param[out] pResult maximum value returned here - * @param[out] pIndex index of maximum value returned here - */ - void arm_max_f32( - float32_t * pSrc, - uint32_t blockSize, - float32_t * pResult, - uint32_t * pIndex); - - - /** - * @brief Q15 complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_mult_cmplx_q15( - q15_t * pSrcA, - q15_t * pSrcB, - q15_t * pDst, - uint32_t numSamples); - - - /** - * @brief Q31 complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_mult_cmplx_q31( - q31_t * pSrcA, - q31_t * pSrcB, - q31_t * pDst, - uint32_t numSamples); - - - /** - * @brief Floating-point complex-by-complex multiplication - * @param[in] pSrcA points to the first input vector - * @param[in] pSrcB points to the second input vector - * @param[out] pDst points to the output vector - * @param[in] numSamples number of complex samples in each vector - */ - void arm_cmplx_mult_cmplx_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t numSamples); - - - /** - * @brief Converts the elements of the floating-point vector to Q31 vector. - * @param[in] pSrc points to the floating-point input vector - * @param[out] pDst points to the Q31 output vector - * @param[in] blockSize length of the input vector - */ - void arm_float_to_q31( - float32_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the floating-point vector to Q15 vector. - * @param[in] pSrc points to the floating-point input vector - * @param[out] pDst points to the Q15 output vector - * @param[in] blockSize length of the input vector - */ - void arm_float_to_q15( - float32_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the floating-point vector to Q7 vector. - * @param[in] pSrc points to the floating-point input vector - * @param[out] pDst points to the Q7 output vector - * @param[in] blockSize length of the input vector - */ - void arm_float_to_q7( - float32_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q31 vector to Q15 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q31_to_q15( - q31_t * pSrc, - q15_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q31 vector to Q7 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q31_to_q7( - q31_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q15 vector to floating-point vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q15_to_float( - q15_t * pSrc, - float32_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q15 vector to Q31 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q15_to_q31( - q15_t * pSrc, - q31_t * pDst, - uint32_t blockSize); - - - /** - * @brief Converts the elements of the Q15 vector to Q7 vector. - * @param[in] pSrc is input pointer - * @param[out] pDst is output pointer - * @param[in] blockSize is the number of samples to process - */ - void arm_q15_to_q7( - q15_t * pSrc, - q7_t * pDst, - uint32_t blockSize); - - - /** - * @ingroup groupInterpolation - */ - - /** - * @defgroup BilinearInterpolate Bilinear Interpolation - * - * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid. - * The underlying function f(x, y) is sampled on a regular grid and the interpolation process - * determines values between the grid points. - * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension. - * Bilinear interpolation is often used in image processing to rescale images. - * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types. - * - * Algorithm - * \par - * The instance structure used by the bilinear interpolation functions describes a two dimensional data table. - * For floating-point, the instance structure is defined as: - * 
-   *   typedef struct
-   *   {
-   *     uint16_t numRows;
-   *     uint16_t numCols;
-   *     float32_t *pData;
-   * } arm_bilinear_interp_instance_f32;
-   *
- * - * \par - * where numRows specifies the number of rows in the table; - * numCols specifies the number of columns in the table; - * and pData points to an array of size numRows*numCols values. - * The data table pTable is organized in row order and the supplied data values fall on integer indexes. - * That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers. - * - * \par - * Let (x, y) specify the desired interpolation point. Then define: - * 
-   *     XF = floor(x)
-   *     YF = floor(y)
-   *
- * \par - * The interpolated output point is computed as: - * 
-   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
-   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
-   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
-   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
-   *
- * Note that the coordinates (x, y) contain integer and fractional components. - * The integer components specify which portion of the table to use while the - * fractional components control the interpolation processor. - * - * \par - * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. - */ - - /** - * @addtogroup BilinearInterpolate - * @{ - */ - - - /** - * - * @brief Floating-point bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate. - * @param[in] Y interpolation coordinate. - * @return out interpolated value. - */ - static __INLINE float32_t arm_bilinear_interp_f32( - const arm_bilinear_interp_instance_f32 * S, - float32_t X, - float32_t Y) - { - float32_t out; - float32_t f00, f01, f10, f11; - float32_t *pData = S->pData; - int32_t xIndex, yIndex, index; - float32_t xdiff, ydiff; - float32_t b1, b2, b3, b4; - - xIndex = (int32_t) X; - yIndex = (int32_t) Y; - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if(xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1)) - { - return (0); - } - - /* Calculation of index for two nearest points in X-direction */ - index = (xIndex - 1) + (yIndex - 1) * S->numCols; - - - /* Read two nearest points in X-direction */ - f00 = pData[index]; - f01 = pData[index + 1]; - - /* Calculation of index for two nearest points in Y-direction */ - index = (xIndex - 1) + (yIndex) * S->numCols; - - - /* Read two nearest points in Y-direction */ - f10 = pData[index]; - f11 = pData[index + 1]; - - /* Calculation of intermediate values */ - b1 = f00; - b2 = f01 - f00; - b3 = f10 - f00; - b4 = f00 - f01 - f10 + f11; - - /* Calculation of fractional part in X */ - xdiff = X - xIndex; - - /* Calculation of fractional part in Y */ - ydiff = Y - yIndex; - - /* Calculation of bi-linear interpolated output */ - out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff; - - /* return to application */ - return (out); - } - - - /** - * - * @brief Q31 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - static __INLINE q31_t arm_bilinear_interp_q31( - arm_bilinear_interp_instance_q31 * S, - q31_t X, - q31_t Y) - { - q31_t out; /* Temporary output */ - q31_t acc = 0; /* output */ - q31_t xfract, yfract; /* X, Y fractional parts */ - q31_t x1, x2, y1, y2; /* Nearest output values */ - int32_t rI, cI; /* Row and column indices */ - q31_t *pYData = S->pData; /* pointer to output table values */ - uint32_t nCols = S->numCols; /* num of rows */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - rI = ((X & (q31_t)0xFFF00000) >> 20); - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - cI = ((Y & (q31_t)0xFFF00000) >> 20); - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) - { - return (0); - } - - /* 20 bits for the fractional part */ - /* shift left xfract by 11 to keep 1.31 format */ - xfract = (X & 0x000FFFFF) << 11u; - - /* Read two nearest output values from the index */ - x1 = pYData[(rI) + (int32_t)nCols * (cI) ]; - x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1]; - - /* 20 bits for the fractional part */ - /* shift left yfract by 11 to keep 1.31 format */ - yfract = (Y & 0x000FFFFF) << 11u; - - /* Read two nearest output values from the index */ - y1 = pYData[(rI) + (int32_t)nCols * (cI + 1) ]; - y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1]; - - /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */ - out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32)); - acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32)); - - /* x2 * (xfract) * (1-yfract) in 3.29(q29) and adding to acc */ - out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32)); - acc += ((q31_t) ((q63_t) out * (xfract) >> 32)); - - /* y1 * (1 - xfract) * (yfract) in 3.29(q29) and adding to acc */ - out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32)); - acc += ((q31_t) ((q63_t) out * (yfract) >> 32)); - - /* y2 * (xfract) * (yfract) in 3.29(q29) and adding to acc */ - out = ((q31_t) ((q63_t) y2 * (xfract) >> 32)); - acc += ((q31_t) ((q63_t) out * (yfract) >> 32)); - - /* Convert acc to 1.31(q31) format */ - return ((q31_t)(acc << 2)); - } - - - /** - * @brief Q15 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - static __INLINE q15_t arm_bilinear_interp_q15( - arm_bilinear_interp_instance_q15 * S, - q31_t X, - q31_t Y) - { - q63_t acc = 0; /* output */ - q31_t out; /* Temporary output */ - q15_t x1, x2, y1, y2; /* Nearest output values */ - q31_t xfract, yfract; /* X, Y fractional parts */ - int32_t rI, cI; /* Row and column indices */ - q15_t *pYData = S->pData; /* pointer to output table values */ - uint32_t nCols = S->numCols; /* num of rows */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - rI = ((X & (q31_t)0xFFF00000) >> 20); - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - cI = ((Y & (q31_t)0xFFF00000) >> 20); - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) - { - return (0); - } - - /* 20 bits for the fractional part */ - /* xfract should be in 12.20 format */ - xfract = (X & 0x000FFFFF); - - /* Read two nearest output values from the index */ - x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ]; - x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1]; - - /* 20 bits for the fractional part */ - /* yfract should be in 12.20 format */ - yfract = (Y & 0x000FFFFF); - - /* Read two nearest output values from the index */ - y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ]; - y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1]; - - /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */ - - /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */ - /* convert 13.35 to 13.31 by right shifting and out is in 1.31 */ - out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u); - acc = ((q63_t) out * (0xFFFFF - yfract)); - - /* x2 * (xfract) * (1-yfract) in 1.51 and adding to acc */ - out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u); - acc += ((q63_t) out * (xfract)); - - /* y1 * (1 - xfract) * (yfract) in 1.51 and adding to acc */ - out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u); - acc += ((q63_t) out * (yfract)); - - /* y2 * (xfract) * (yfract) in 1.51 and adding to acc */ - out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u); - acc += ((q63_t) out * (yfract)); - - /* acc is in 13.51 format and down shift acc by 36 times */ - /* Convert out to 1.15 format */ - return ((q15_t)(acc >> 36)); - } - - - /** - * @brief Q7 bilinear interpolation. - * @param[in,out] S points to an instance of the interpolation structure. - * @param[in] X interpolation coordinate in 12.20 format. - * @param[in] Y interpolation coordinate in 12.20 format. - * @return out interpolated value. - */ - static __INLINE q7_t arm_bilinear_interp_q7( - arm_bilinear_interp_instance_q7 * S, - q31_t X, - q31_t Y) - { - q63_t acc = 0; /* output */ - q31_t out; /* Temporary output */ - q31_t xfract, yfract; /* X, Y fractional parts */ - q7_t x1, x2, y1, y2; /* Nearest output values */ - int32_t rI, cI; /* Row and column indices */ - q7_t *pYData = S->pData; /* pointer to output table values */ - uint32_t nCols = S->numCols; /* num of rows */ - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - rI = ((X & (q31_t)0xFFF00000) >> 20); - - /* Input is in 12.20 format */ - /* 12 bits for the table index */ - /* Index value calculation */ - cI = ((Y & (q31_t)0xFFF00000) >> 20); - - /* Care taken for table outside boundary */ - /* Returns zero output when values are outside table boundary */ - if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1)) - { - return (0); - } - - /* 20 bits for the fractional part */ - /* xfract should be in 12.20 format */ - xfract = (X & (q31_t)0x000FFFFF); - - /* Read two nearest output values from the index */ - x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) ]; - x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1]; - - /* 20 bits for the fractional part */ - /* yfract should be in 12.20 format */ - yfract = (Y & (q31_t)0x000FFFFF); - - /* Read two nearest output values from the index */ - y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) ]; - y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1]; - - /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */ - out = ((x1 * (0xFFFFF - xfract))); - acc = (((q63_t) out * (0xFFFFF - yfract))); - - /* x2 * (xfract) * (1-yfract) in 2.22 and adding to acc */ - out = ((x2 * (0xFFFFF - yfract))); - acc += (((q63_t) out * (xfract))); - - /* y1 * (1 - xfract) * (yfract) in 2.22 and adding to acc */ - out = ((y1 * (0xFFFFF - xfract))); - acc += (((q63_t) out * (yfract))); - - /* y2 * (xfract) * (yfract) in 2.22 and adding to acc */ - out = ((y2 * (yfract))); - acc += (((q63_t) out * (xfract))); - - /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */ - return ((q7_t)(acc >> 40)); - } - - /** - * @} end of BilinearInterpolate group - */ - - -/* SMMLAR */ -#define multAcc_32x32_keep32_R(a, x, y) \ - a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32) - -/* SMMLSR */ -#define multSub_32x32_keep32_R(a, x, y) \ - a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32) - -/* SMMULR */ -#define mult_32x32_keep32_R(a, x, y) \ - a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32) - -/* SMMLA */ -#define multAcc_32x32_keep32(a, x, y) \ - a += (q31_t) (((q63_t) x * y) >> 32) - -/* SMMLS */ -#define multSub_32x32_keep32(a, x, y) \ - a -= (q31_t) (((q63_t) x * y) >> 32) - -/* SMMUL */ -#define mult_32x32_keep32(a, x, y) \ - a = (q31_t) (((q63_t) x * y ) >> 32) - - -#if defined ( __CC_ARM ) - /* Enter low optimization region - place directly above function definition */ - #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) - #define LOW_OPTIMIZATION_ENTER \ - _Pragma ("push") \ - _Pragma ("O1") - #else - #define LOW_OPTIMIZATION_ENTER - #endif - - /* Exit low optimization region - place directly after end of function definition */ - #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) - #define LOW_OPTIMIZATION_EXIT \ - _Pragma ("pop") - #else - #define LOW_OPTIMIZATION_EXIT - #endif - - /* Enter low optimization region - place directly above function definition */ - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - - /* Exit low optimization region - place directly after end of function definition */ - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined(__GNUC__) - #define LOW_OPTIMIZATION_ENTER __attribute__(( optimize("-O1") )) - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined(__ICCARM__) - /* Enter low optimization region - place directly above function definition */ - #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) - #define LOW_OPTIMIZATION_ENTER \ - _Pragma ("optimize=low") - #else - #define LOW_OPTIMIZATION_ENTER - #endif - - /* Exit low optimization region - place directly after end of function definition */ - #define LOW_OPTIMIZATION_EXIT - - /* Enter low optimization region - place directly above function definition */ - #if defined( ARM_MATH_CM4 ) || defined( ARM_MATH_CM7) - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \ - _Pragma ("optimize=low") - #else - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #endif - - /* Exit low optimization region - place directly after end of function definition */ - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined(__CSMC__) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#elif defined(__TASKING__) - #define LOW_OPTIMIZATION_ENTER - #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER - #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - -#endif - - -#ifdef __cplusplus -} -#endif - - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -#endif /* _ARM_MATH_H */ - -/** - * - * End of file. - */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/cmsis_armcc.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/cmsis_armcc.h deleted file mode 100644 index 74c49c67..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/cmsis_armcc.h +++ /dev/null @@ -1,734 +0,0 @@ -/**************************************************************************//** - * @file cmsis_armcc.h - * @brief CMSIS Cortex-M Core Function/Instruction Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#ifndef __CMSIS_ARMCC_H -#define __CMSIS_ARMCC_H - - -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677) - #error "Please use ARM Compiler Toolchain V4.0.677 or later!" -#endif - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ - */ - -/* intrinsic void __enable_irq(); */ -/* intrinsic void __disable_irq(); */ - -/** - \brief Get Control Register - \details Returns the content of the Control Register. - \return Control Register value - */ -__STATIC_INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - - -/** - \brief Set Control Register - \details Writes the given value to the Control Register. - \param [in] control Control Register value to set - */ -__STATIC_INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - - -/** - \brief Get IPSR Register - \details Returns the content of the IPSR Register. - \return IPSR Register value - */ -__STATIC_INLINE uint32_t __get_IPSR(void) -{ - register uint32_t __regIPSR __ASM("ipsr"); - return(__regIPSR); -} - - -/** - \brief Get APSR Register - \details Returns the content of the APSR Register. - \return APSR Register value - */ -__STATIC_INLINE uint32_t __get_APSR(void) -{ - register uint32_t __regAPSR __ASM("apsr"); - return(__regAPSR); -} - - -/** - \brief Get xPSR Register - \details Returns the content of the xPSR Register. - \return xPSR Register value - */ -__STATIC_INLINE uint32_t __get_xPSR(void) -{ - register uint32_t __regXPSR __ASM("xpsr"); - return(__regXPSR); -} - - -/** - \brief Get Process Stack Pointer - \details Returns the current value of the Process Stack Pointer (PSP). - \return PSP Register value - */ -__STATIC_INLINE uint32_t __get_PSP(void) -{ - register uint32_t __regProcessStackPointer __ASM("psp"); - return(__regProcessStackPointer); -} - - -/** - \brief Set Process Stack Pointer - \details Assigns the given value to the Process Stack Pointer (PSP). - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) -{ - register uint32_t __regProcessStackPointer __ASM("psp"); - __regProcessStackPointer = topOfProcStack; -} - - -/** - \brief Get Main Stack Pointer - \details Returns the current value of the Main Stack Pointer (MSP). - \return MSP Register value - */ -__STATIC_INLINE uint32_t __get_MSP(void) -{ - register uint32_t __regMainStackPointer __ASM("msp"); - return(__regMainStackPointer); -} - - -/** - \brief Set Main Stack Pointer - \details Assigns the given value to the Main Stack Pointer (MSP). - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) -{ - register uint32_t __regMainStackPointer __ASM("msp"); - __regMainStackPointer = topOfMainStack; -} - - -/** - \brief Get Priority Mask - \details Returns the current state of the priority mask bit from the Priority Mask Register. - \return Priority Mask value - */ -__STATIC_INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - - -/** - \brief Set Priority Mask - \details Assigns the given value to the Priority Mask Register. - \param [in] priMask Priority Mask - */ -__STATIC_INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - - -#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) - -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -#define __enable_fault_irq __enable_fiq - - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -#define __disable_fault_irq __disable_fiq - - -/** - \brief Get Base Priority - \details Returns the current value of the Base Priority register. - \return Base Priority register value - */ -__STATIC_INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - - -/** - \brief Set Base Priority - \details Assigns the given value to the Base Priority register. - \param [in] basePri Base Priority value to set - */ -__STATIC_INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0xFFU); -} - - -/** - \brief Set Base Priority with condition - \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri) -{ - register uint32_t __regBasePriMax __ASM("basepri_max"); - __regBasePriMax = (basePri & 0xFFU); -} - - -/** - \brief Get Fault Mask - \details Returns the current value of the Fault Mask register. - \return Fault Mask register value - */ -__STATIC_INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - - -/** - \brief Set Fault Mask - \details Assigns the given value to the Fault Mask register. - \param [in] faultMask Fault Mask value to set - */ -__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & (uint32_t)1); -} - -#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */ - - -#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) - -/** - \brief Get FPSCR - \details Returns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -__STATIC_INLINE uint32_t __get_FPSCR(void) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - register uint32_t __regfpscr __ASM("fpscr"); - return(__regfpscr); -#else - return(0U); -#endif -} - - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -__STATIC_INLINE void __set_FPSCR(uint32_t fpscr) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - register uint32_t __regfpscr __ASM("fpscr"); - __regfpscr = (fpscr); -#endif -} - -#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */ - - - -/*@} end of CMSIS_Core_RegAccFunctions */ - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/** - \brief No Operation - \details No Operation does nothing. This instruction can be used for code alignment purposes. - */ -#define __NOP __nop - - -/** - \brief Wait For Interrupt - \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. - */ -#define __WFI __wfi - - -/** - \brief Wait For Event - \details Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -#define __WFE __wfe - - -/** - \brief Send Event - \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -#define __SEV __sev - - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -#define __ISB() do {\ - __schedule_barrier();\ - __isb(0xF);\ - __schedule_barrier();\ - } while (0U) - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -#define __DSB() do {\ - __schedule_barrier();\ - __dsb(0xF);\ - __schedule_barrier();\ - } while (0U) - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -#define __DMB() do {\ - __schedule_barrier();\ - __dmb(0xF);\ - __schedule_barrier();\ - } while (0U) - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in integer value. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV __rev - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in two unsigned short values. - \param [in] value Value to reverse - \return Reversed value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) -{ - rev16 r0, r0 - bx lr -} -#endif - -/** - \brief Reverse byte order in signed short value - \details Reverses the byte order in a signed short value with sign extension to integer. - \param [in] value Value to reverse - \return Reversed value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value) -{ - revsh r0, r0 - bx lr -} -#endif - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] value Value to rotate - \param [in] value Number of Bits to rotate - \return Rotated value - */ -#define __ROR __ror - - -/** - \brief Breakpoint - \details Causes the processor to enter Debug state. - Debug tools can use this to investigate system state when the instruction at a particular address is reached. - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __breakpoint(value) - - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ -#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) - #define __RBIT __rbit -#else -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) -{ - uint32_t result; - int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */ - - result = value; /* r will be reversed bits of v; first get LSB of v */ - for (value >>= 1U; value; value >>= 1U) - { - result <<= 1U; - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ - return(result); -} -#endif - - -/** - \brief Count leading zeros - \details Counts the number of leading zeros of a data value. - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -#define __CLZ __clz - - -#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) -#else - #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") -#endif - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) -#else - #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") -#endif - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) -#else - #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") -#endif - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXB(value, ptr) __strex(value, ptr) -#else - #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXH(value, ptr) __strex(value, ptr) -#else - #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) - #define __STREXW(value, ptr) __strex(value, ptr) -#else - #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") -#endif - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -#define __CLREX __clrex - - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT __ssat - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT __usat - - -/** - \brief Rotate Right with Extend (32 bit) - \details Moves each bit of a bitstring right by one bit. - The carry input is shifted in at the left end of the bitstring. - \param [in] value Value to rotate - \return Rotated value - */ -#ifndef __NO_EMBEDDED_ASM -__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value) -{ - rrx r0, r0 - bx lr -} -#endif - - -/** - \brief LDRT Unprivileged (8 bit) - \details Executes a Unprivileged LDRT instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr)) - - -/** - \brief LDRT Unprivileged (16 bit) - \details Executes a Unprivileged LDRT instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr)) - - -/** - \brief LDRT Unprivileged (32 bit) - \details Executes a Unprivileged LDRT instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr)) - - -/** - \brief STRT Unprivileged (8 bit) - \details Executes a Unprivileged STRT instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -#define __STRBT(value, ptr) __strt(value, ptr) - - -/** - \brief STRT Unprivileged (16 bit) - \details Executes a Unprivileged STRT instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -#define __STRHT(value, ptr) __strt(value, ptr) - - -/** - \brief STRT Unprivileged (32 bit) - \details Executes a Unprivileged STRT instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -#define __STRT(value, ptr) __strt(value, ptr) - -#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */ - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */ - -#define __SADD8 __sadd8 -#define __QADD8 __qadd8 -#define __SHADD8 __shadd8 -#define __UADD8 __uadd8 -#define __UQADD8 __uqadd8 -#define __UHADD8 __uhadd8 -#define __SSUB8 __ssub8 -#define __QSUB8 __qsub8 -#define __SHSUB8 __shsub8 -#define __USUB8 __usub8 -#define __UQSUB8 __uqsub8 -#define __UHSUB8 __uhsub8 -#define __SADD16 __sadd16 -#define __QADD16 __qadd16 -#define __SHADD16 __shadd16 -#define __UADD16 __uadd16 -#define __UQADD16 __uqadd16 -#define __UHADD16 __uhadd16 -#define __SSUB16 __ssub16 -#define __QSUB16 __qsub16 -#define __SHSUB16 __shsub16 -#define __USUB16 __usub16 -#define __UQSUB16 __uqsub16 -#define __UHSUB16 __uhsub16 -#define __SASX __sasx -#define __QASX __qasx -#define __SHASX __shasx -#define __UASX __uasx -#define __UQASX __uqasx -#define __UHASX __uhasx -#define __SSAX __ssax -#define __QSAX __qsax -#define __SHSAX __shsax -#define __USAX __usax -#define __UQSAX __uqsax -#define __UHSAX __uhsax -#define __USAD8 __usad8 -#define __USADA8 __usada8 -#define __SSAT16 __ssat16 -#define __USAT16 __usat16 -#define __UXTB16 __uxtb16 -#define __UXTAB16 __uxtab16 -#define __SXTB16 __sxtb16 -#define __SXTAB16 __sxtab16 -#define __SMUAD __smuad -#define __SMUADX __smuadx -#define __SMLAD __smlad -#define __SMLADX __smladx -#define __SMLALD __smlald -#define __SMLALDX __smlaldx -#define __SMUSD __smusd -#define __SMUSDX __smusdx -#define __SMLSD __smlsd -#define __SMLSDX __smlsdx -#define __SMLSLD __smlsld -#define __SMLSLDX __smlsldx -#define __SEL __sel -#define __QADD __qadd -#define __QSUB __qsub - -#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ - ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) - -#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ - ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) - -#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \ - ((int64_t)(ARG3) << 32U) ) >> 32U)) - -#endif /* (__CORTEX_M >= 0x04) */ -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#endif /* __CMSIS_ARMCC_H */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/cmsis_armcc_V6.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/cmsis_armcc_V6.h deleted file mode 100644 index cd13240c..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/cmsis_armcc_V6.h +++ /dev/null @@ -1,1800 +0,0 @@ -/**************************************************************************//** - * @file cmsis_armcc_V6.h - * @brief CMSIS Cortex-M Core Function/Instruction Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#ifndef __CMSIS_ARMCC_V6_H -#define __CMSIS_ARMCC_V6_H - - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ - */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void) -{ - __ASM volatile ("cpsie i" : : : "memory"); -} - - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); -} - - -/** - \brief Get Control Register - \details Returns the content of the Control Register. - \return Control Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Control Register (non-secure) - \details Returns the content of the non-secure Control Register when in secure mode. - \return non-secure Control Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Control Register - \details Writes the given value to the Control Register. - \param [in] control Control Register value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Control Register (non-secure) - \details Writes the given value to the non-secure Control Register when in secure state. - \param [in] control Control Register value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control) -{ - __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); -} -#endif - - -/** - \brief Get IPSR Register - \details Returns the content of the IPSR Register. - \return IPSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get IPSR Register (non-secure) - \details Returns the content of the non-secure IPSR Register when in secure state. - \return IPSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_IPSR_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, ipsr_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Get APSR Register - \details Returns the content of the APSR Register. - \return APSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, apsr" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get APSR Register (non-secure) - \details Returns the content of the non-secure APSR Register when in secure state. - \return APSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_APSR_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, apsr_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Get xPSR Register - \details Returns the content of the xPSR Register. - \return xPSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get xPSR Register (non-secure) - \details Returns the content of the non-secure xPSR Register when in secure state. - \return xPSR Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_xPSR_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, xpsr_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Get Process Stack Pointer - \details Returns the current value of the Process Stack Pointer (PSP). - \return PSP Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, psp" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Process Stack Pointer (non-secure) - \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. - \return PSP Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Process Stack Pointer - \details Assigns the given value to the Process Stack Pointer (PSP). - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : "sp"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Process Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state. - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : "sp"); -} -#endif - - -/** - \brief Get Main Stack Pointer - \details Returns the current value of the Main Stack Pointer (MSP). - \return MSP Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, msp" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Main Stack Pointer (non-secure) - \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. - \return MSP Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Main Stack Pointer - \details Assigns the given value to the Main Stack Pointer (MSP). - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : "sp"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Main Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : "sp"); -} -#endif - - -/** - \brief Get Priority Mask - \details Returns the current state of the priority mask bit from the Priority Mask Register. - \return Priority Mask value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Priority Mask (non-secure) - \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state. - \return Priority Mask value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Priority Mask - \details Assigns the given value to the Priority Mask Register. - \param [in] priMask Priority Mask - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Priority Mask (non-secure) - \details Assigns the given value to the non-secure Priority Mask Register when in secure state. - \param [in] priMask Priority Mask - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) -{ - __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); -} -#endif - - -#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */ - -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void) -{ - __ASM volatile ("cpsie f" : : : "memory"); -} - - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void) -{ - __ASM volatile ("cpsid f" : : : "memory"); -} - - -/** - \brief Get Base Priority - \details Returns the current value of the Base Priority register. - \return Base Priority register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Base Priority (non-secure) - \details Returns the current value of the non-secure Base Priority register when in secure state. - \return Base Priority register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Base Priority - \details Assigns the given value to the Base Priority register. - \param [in] basePri Base Priority value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t value) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Base Priority (non-secure) - \details Assigns the given value to the non-secure Base Priority register when in secure state. - \param [in] basePri Base Priority value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t value) -{ - __ASM volatile ("MSR basepri_ns, %0" : : "r" (value) : "memory"); -} -#endif - - -/** - \brief Set Base Priority with condition - \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value) -{ - __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Base Priority with condition (non_secure) - \details Assigns the given value to the non-secure Base Priority register when in secure state only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_MAX_NS(uint32_t value) -{ - __ASM volatile ("MSR basepri_max_ns, %0" : : "r" (value) : "memory"); -} -#endif - - -/** - \brief Get Fault Mask - \details Returns the current value of the Fault Mask register. - \return Fault Mask register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get Fault Mask (non-secure) - \details Returns the current value of the non-secure Fault Mask register when in secure state. - \return Fault Mask register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Fault Mask - \details Assigns the given value to the Fault Mask register. - \param [in] faultMask Fault Mask value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); -} - - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set Fault Mask (non-secure) - \details Assigns the given value to the non-secure Fault Mask register when in secure state. - \param [in] faultMask Fault Mask value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); -} -#endif - - -#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */ - - -#if (__ARM_ARCH_8M__ == 1U) - -/** - \brief Get Process Stack Pointer Limit - \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). - \return PSPLIM Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, psplim" : "=r" (result) ); - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ -/** - \brief Get Process Stack Pointer Limit (non-secure) - \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. - \return PSPLIM Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Process Stack Pointer Limit - \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). - \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) -{ - __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); -} - - -#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ -/** - \brief Set Process Stack Pointer (non-secure) - \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. - \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) -{ - __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); -} -#endif - - -/** - \brief Get Main Stack Pointer Limit - \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). - \return MSPLIM Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, msplim" : "=r" (result) ); - - return(result); -} - - -#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ -/** - \brief Get Main Stack Pointer Limit (non-secure) - \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. - \return MSPLIM Register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); - return(result); -} -#endif - - -/** - \brief Set Main Stack Pointer Limit - \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). - \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) -{ - __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); -} - - -#if (__ARM_FEATURE_CMSE == 3U) && (__ARM_ARCH_PROFILE == 'M') /* ToDo: ARMCC_V6: check predefined macro for mainline */ -/** - \brief Set Main Stack Pointer Limit (non-secure) - \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state. - \param [in] MainStackPtrLimit Main Stack Pointer value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) -{ - __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); -} -#endif - -#endif /* (__ARM_ARCH_8M__ == 1U) */ - - -#if ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=4 */ - -/** - \brief Get FPSCR - \details eturns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -#define __get_FPSCR __builtin_arm_get_fpscr -#if 0 -__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - uint32_t result; - - __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ - __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); - __ASM volatile (""); - return(result); -#else - return(0); -#endif -} -#endif - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Get FPSCR (non-secure) - \details Returns the current value of the non-secure Floating Point Status/Control register when in secure state. - \return Floating Point Status/Control register value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FPSCR_NS(void) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - uint32_t result; - - __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ - __ASM volatile ("VMRS %0, fpscr_ns" : "=r" (result) ); - __ASM volatile (""); - return(result); -#else - return(0); -#endif -} -#endif - - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -#define __set_FPSCR __builtin_arm_set_fpscr -#if 0 -__attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ - __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); - __ASM volatile (""); -#endif -} -#endif - -#if (__ARM_FEATURE_CMSE == 3U) -/** - \brief Set FPSCR (non-secure) - \details Assigns the given value to the non-secure Floating Point Status/Control register when in secure state. - \param [in] fpscr Floating Point Status/Control value to set - */ -__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FPSCR_NS(uint32_t fpscr) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - __ASM volatile (""); /* Empty asm statement works as a scheduling barrier */ - __ASM volatile ("VMSR fpscr_ns, %0" : : "r" (fpscr) : "vfpcc"); - __ASM volatile (""); -#endif -} -#endif - -#endif /* ((__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */ - - - -/*@} end of CMSIS_Core_RegAccFunctions */ - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/* Define macros for porting to both thumb1 and thumb2. - * For thumb1, use low register (r0-r7), specified by constraint "l" - * Otherwise, use general registers, specified by constraint "r" */ -#if defined (__thumb__) && !defined (__thumb2__) -#define __CMSIS_GCC_OUT_REG(r) "=l" (r) -#define __CMSIS_GCC_USE_REG(r) "l" (r) -#else -#define __CMSIS_GCC_OUT_REG(r) "=r" (r) -#define __CMSIS_GCC_USE_REG(r) "r" (r) -#endif - -/** - \brief No Operation - \details No Operation does nothing. This instruction can be used for code alignment purposes. - */ -#define __NOP __builtin_arm_nop - -/** - \brief Wait For Interrupt - \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. - */ -#define __WFI __builtin_arm_wfi - - -/** - \brief Wait For Event - \details Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -#define __WFE __builtin_arm_wfe - - -/** - \brief Send Event - \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -#define __SEV __builtin_arm_sev - - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -#define __ISB() __builtin_arm_isb(0xF); - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -#define __DSB() __builtin_arm_dsb(0xF); - - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -#define __DMB() __builtin_arm_dmb(0xF); - - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in integer value. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV __builtin_bswap32 - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in two unsigned short values. - \param [in] value Value to reverse - \return Reversed value - */ -#define __REV16 __builtin_bswap16 /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */ -#if 0 -__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} -#endif - - -/** - \brief Reverse byte order in signed short value - \details Reverses the byte order in a signed short value with sign extension to integer. - \param [in] value Value to reverse - \return Reversed value - */ - /* ToDo: ARMCC_V6: check if __builtin_bswap16 could be used */ -__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value) -{ - int32_t result; - - __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] op1 Value to rotate - \param [in] op2 Number of Bits to rotate - \return Rotated value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) -{ - return (op1 >> op2) | (op1 << (32U - op2)); -} - - -/** - \brief Breakpoint - \details Causes the processor to enter Debug state. - Debug tools can use this to investigate system state when the instruction at a particular address is reached. - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __ASM volatile ("bkpt "#value) - - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ - /* ToDo: ARMCC_V6: check if __builtin_arm_rbit is supported */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) -{ - uint32_t result; - -#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */ - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); -#else - int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */ - - result = value; /* r will be reversed bits of v; first get LSB of v */ - for (value >>= 1U; value; value >>= 1U) - { - result <<= 1U; - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ -#endif - return(result); -} - - -/** - \brief Count leading zeros - \details Counts the number of leading zeros of a data value. - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -#define __CLZ __builtin_clz - - -#if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) /* ToDo: ARMCC_V6: check if this is ok for cortex >=3 */ - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDREXB (uint8_t)__builtin_arm_ldrex - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDREXH (uint16_t)__builtin_arm_ldrex - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDREXW (uint32_t)__builtin_arm_ldrex - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXB (uint32_t)__builtin_arm_strex - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXH (uint32_t)__builtin_arm_strex - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STREXW (uint32_t)__builtin_arm_strex - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -#define __CLREX __builtin_arm_clrex - - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -/*#define __SSAT __builtin_arm_ssat*/ -#define __SSAT(ARG1,ARG2) \ -({ \ - int32_t __RES, __ARG1 = (ARG1); \ - __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT __builtin_arm_usat -#if 0 -#define __USAT(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) -#endif - - -/** - \brief Rotate Right with Extend (32 bit) - \details Moves each bit of a bitstring right by one bit. - The carry input is shifted in at the left end of the bitstring. - \param [in] value Value to rotate - \return Rotated value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief LDRT Unprivileged (8 bit) - \details Executes a Unprivileged LDRT instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (16 bit) - \details Executes a Unprivileged LDRT instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (32 bit) - \details Executes a Unprivileged LDRT instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); - return(result); -} - - -/** - \brief STRT Unprivileged (8 bit) - \details Executes a Unprivileged STRT instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) -{ - __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (16 bit) - \details Executes a Unprivileged STRT instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) -{ - __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (32 bit) - \details Executes a Unprivileged STRT instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr) -{ - __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); -} - -#endif /* ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_8M__ == 1U)) */ - - -#if (__ARM_ARCH_8M__ == 1U) - -/** - \brief Load-Acquire (8 bit) - \details Executes a LDAB instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint8_t) result); -} - - -/** - \brief Load-Acquire (16 bit) - \details Executes a LDAH instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr) -{ - uint32_t result; - - __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); - return ((uint16_t) result); -} - - -/** - \brief Load-Acquire (32 bit) - \details Executes a LDA instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr) -{ - uint32_t result; - - __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); - return(result); -} - - -/** - \brief Store-Release (8 bit) - \details Executes a STLB instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr) -{ - __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief Store-Release (16 bit) - \details Executes a STLH instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr) -{ - __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief Store-Release (32 bit) - \details Executes a STL instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr) -{ - __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); -} - - -/** - \brief Load-Acquire Exclusive (8 bit) - \details Executes a LDAB exclusive instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -#define __LDAEXB (uint8_t)__builtin_arm_ldaex - - -/** - \brief Load-Acquire Exclusive (16 bit) - \details Executes a LDAH exclusive instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -#define __LDAEXH (uint16_t)__builtin_arm_ldaex - - -/** - \brief Load-Acquire Exclusive (32 bit) - \details Executes a LDA exclusive instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -#define __LDAEX (uint32_t)__builtin_arm_ldaex - - -/** - \brief Store-Release Exclusive (8 bit) - \details Executes a STLB exclusive instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEXB (uint32_t)__builtin_arm_stlex - - -/** - \brief Store-Release Exclusive (16 bit) - \details Executes a STLH exclusive instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEXH (uint32_t)__builtin_arm_stlex - - -/** - \brief Store-Release Exclusive (32 bit) - \details Executes a STL exclusive instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -#define __STLEX (uint32_t)__builtin_arm_stlex - -#endif /* (__ARM_ARCH_8M__ == 1U) */ - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if (__ARM_FEATURE_DSP == 1U) /* ToDo: ARMCC_V6: This should be ARCH >= ARMv7-M + SIMD */ - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#define __SSAT16(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - -#define __USAT16(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -#define __PKHBT(ARG1,ARG2,ARG3) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - -#define __PKHTB(ARG1,ARG2,ARG3) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - if (ARG3 == 0) \ - __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ - else \ - __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - -__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) -{ - int32_t result; - - __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#endif /* (__ARM_FEATURE_DSP == 1U) */ -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#endif /* __CMSIS_ARMCC_V6_H */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/cmsis_gcc.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/cmsis_gcc.h deleted file mode 100644 index bb89fbba..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/cmsis_gcc.h +++ /dev/null @@ -1,1373 +0,0 @@ -/**************************************************************************//** - * @file cmsis_gcc.h - * @brief CMSIS Cortex-M Core Function/Instruction Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#ifndef __CMSIS_GCC_H -#define __CMSIS_GCC_H - -/* ignore some GCC warnings */ -#if defined ( __GNUC__ ) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wsign-conversion" -#pragma GCC diagnostic ignored "-Wconversion" -#pragma GCC diagnostic ignored "-Wunused-parameter" -#endif - - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ - */ - -/** - \brief Enable IRQ Interrupts - \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void) -{ - __ASM volatile ("cpsie i" : : : "memory"); -} - - -/** - \brief Disable IRQ Interrupts - \details Disables IRQ interrupts by setting the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) -{ - __ASM volatile ("cpsid i" : : : "memory"); -} - - -/** - \brief Get Control Register - \details Returns the content of the Control Register. - \return Control Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Control Register - \details Writes the given value to the Control Register. - \param [in] control Control Register value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); -} - - -/** - \brief Get IPSR Register - \details Returns the content of the IPSR Register. - \return IPSR Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get APSR Register - \details Returns the content of the APSR Register. - \return APSR Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, apsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get xPSR Register - \details Returns the content of the xPSR Register. - - \return xPSR Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - return(result); -} - - -/** - \brief Get Process Stack Pointer - \details Returns the current value of the Process Stack Pointer (PSP). - \return PSP Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, psp\n" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Process Stack Pointer - \details Assigns the given value to the Process Stack Pointer (PSP). - \param [in] topOfProcStack Process Stack Pointer value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp"); -} - - -/** - \brief Get Main Stack Pointer - \details Returns the current value of the Main Stack Pointer (MSP). - \return MSP Register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void) -{ - register uint32_t result; - - __ASM volatile ("MRS %0, msp\n" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Main Stack Pointer - \details Assigns the given value to the Main Stack Pointer (MSP). - - \param [in] topOfMainStack Main Stack Pointer value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); -} - - -/** - \brief Get Priority Mask - \details Returns the current state of the priority mask bit from the Priority Mask Register. - \return Priority Mask value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Priority Mask - \details Assigns the given value to the Priority Mask Register. - \param [in] priMask Priority Mask - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); -} - - -#if (__CORTEX_M >= 0x03U) - -/** - \brief Enable FIQ - \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void) -{ - __ASM volatile ("cpsie f" : : : "memory"); -} - - -/** - \brief Disable FIQ - \details Disables FIQ interrupts by setting the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void) -{ - __ASM volatile ("cpsid f" : : : "memory"); -} - - -/** - \brief Get Base Priority - \details Returns the current value of the Base Priority register. - \return Base Priority register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, basepri" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Base Priority - \details Assigns the given value to the Base Priority register. - \param [in] basePri Base Priority value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); -} - - -/** - \brief Set Base Priority with condition - \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, - or the new value increases the BASEPRI priority level. - \param [in] basePri Base Priority value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value) -{ - __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory"); -} - - -/** - \brief Get Fault Mask - \details Returns the current value of the Fault Mask register. - \return Fault Mask register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void) -{ - uint32_t result; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - - -/** - \brief Set Fault Mask - \details Assigns the given value to the Fault Mask register. - \param [in] faultMask Fault Mask value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); -} - -#endif /* (__CORTEX_M >= 0x03U) */ - - -#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) - -/** - \brief Get FPSCR - \details Returns the current value of the Floating Point Status/Control register. - \return Floating Point Status/Control register value - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - uint32_t result; - - /* Empty asm statement works as a scheduling barrier */ - __ASM volatile (""); - __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); - __ASM volatile (""); - return(result); -#else - return(0); -#endif -} - - -/** - \brief Set FPSCR - \details Assigns the given value to the Floating Point Status/Control register. - \param [in] fpscr Floating Point Status/Control value to set - */ -__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) -{ -#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - /* Empty asm statement works as a scheduling barrier */ - __ASM volatile (""); - __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); - __ASM volatile (""); -#endif -} - -#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */ - - - -/*@} end of CMSIS_Core_RegAccFunctions */ - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/* Define macros for porting to both thumb1 and thumb2. - * For thumb1, use low register (r0-r7), specified by constraint "l" - * Otherwise, use general registers, specified by constraint "r" */ -#if defined (__thumb__) && !defined (__thumb2__) -#define __CMSIS_GCC_OUT_REG(r) "=l" (r) -#define __CMSIS_GCC_USE_REG(r) "l" (r) -#else -#define __CMSIS_GCC_OUT_REG(r) "=r" (r) -#define __CMSIS_GCC_USE_REG(r) "r" (r) -#endif - -/** - \brief No Operation - \details No Operation does nothing. This instruction can be used for code alignment purposes. - */ -__attribute__((always_inline)) __STATIC_INLINE void __NOP(void) -{ - __ASM volatile ("nop"); -} - - -/** - \brief Wait For Interrupt - \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. - */ -__attribute__((always_inline)) __STATIC_INLINE void __WFI(void) -{ - __ASM volatile ("wfi"); -} - - -/** - \brief Wait For Event - \details Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -__attribute__((always_inline)) __STATIC_INLINE void __WFE(void) -{ - __ASM volatile ("wfe"); -} - - -/** - \brief Send Event - \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -__attribute__((always_inline)) __STATIC_INLINE void __SEV(void) -{ - __ASM volatile ("sev"); -} - - -/** - \brief Instruction Synchronization Barrier - \details Instruction Synchronization Barrier flushes the pipeline in the processor, - so that all instructions following the ISB are fetched from cache or memory, - after the instruction has been completed. - */ -__attribute__((always_inline)) __STATIC_INLINE void __ISB(void) -{ - __ASM volatile ("isb 0xF":::"memory"); -} - - -/** - \brief Data Synchronization Barrier - \details Acts as a special kind of Data Memory Barrier. - It completes when all explicit memory accesses before this instruction complete. - */ -__attribute__((always_inline)) __STATIC_INLINE void __DSB(void) -{ - __ASM volatile ("dsb 0xF":::"memory"); -} - - -/** - \brief Data Memory Barrier - \details Ensures the apparent order of the explicit memory operations before - and after the instruction, without ensuring their completion. - */ -__attribute__((always_inline)) __STATIC_INLINE void __DMB(void) -{ - __ASM volatile ("dmb 0xF":::"memory"); -} - - -/** - \brief Reverse byte order (32 bit) - \details Reverses the byte order in integer value. - \param [in] value Value to reverse - \return Reversed value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value) -{ -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) - return __builtin_bswap32(value); -#else - uint32_t result; - - __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -#endif -} - - -/** - \brief Reverse byte order (16 bit) - \details Reverses the byte order in two unsigned short values. - \param [in] value Value to reverse - \return Reversed value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief Reverse byte order in signed short value - \details Reverses the byte order in a signed short value with sign extension to integer. - \param [in] value Value to reverse - \return Reversed value - */ -__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value) -{ -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - return (short)__builtin_bswap16(value); -#else - int32_t result; - - __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -#endif -} - - -/** - \brief Rotate Right in unsigned value (32 bit) - \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. - \param [in] value Value to rotate - \param [in] value Number of Bits to rotate - \return Rotated value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) -{ - return (op1 >> op2) | (op1 << (32U - op2)); -} - - -/** - \brief Breakpoint - \details Causes the processor to enter Debug state. - Debug tools can use this to investigate system state when the instruction at a particular address is reached. - \param [in] value is ignored by the processor. - If required, a debugger can use it to store additional information about the breakpoint. - */ -#define __BKPT(value) __ASM volatile ("bkpt "#value) - - -/** - \brief Reverse bit order of value - \details Reverses the bit order of the given value. - \param [in] value Value to reverse - \return Reversed value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) -{ - uint32_t result; - -#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); -#else - int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */ - - result = value; /* r will be reversed bits of v; first get LSB of v */ - for (value >>= 1U; value; value >>= 1U) - { - result <<= 1U; - result |= value & 1U; - s--; - } - result <<= s; /* shift when v's highest bits are zero */ -#endif - return(result); -} - - -/** - \brief Count leading zeros - \details Counts the number of leading zeros of a data value. - \param [in] value Value to count the leading zeros - \return number of leading zeros in value - */ -#define __CLZ __builtin_clz - - -#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) - -/** - \brief LDR Exclusive (8 bit) - \details Executes a exclusive LDR instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDR Exclusive (16 bit) - \details Executes a exclusive LDR instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDR Exclusive (32 bit) - \details Executes a exclusive LDR instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - return(result); -} - - -/** - \brief STR Exclusive (8 bit) - \details Executes a exclusive STR instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) -{ - uint32_t result; - - __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - return(result); -} - - -/** - \brief STR Exclusive (16 bit) - \details Executes a exclusive STR instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) -{ - uint32_t result; - - __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); - return(result); -} - - -/** - \brief STR Exclusive (32 bit) - \details Executes a exclusive STR instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - return(result); -} - - -/** - \brief Remove the exclusive lock - \details Removes the exclusive lock which is created by LDREX. - */ -__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void) -{ - __ASM volatile ("clrex" ::: "memory"); -} - - -/** - \brief Signed Saturate - \details Saturates a signed value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (1..32) - \return Saturated value - */ -#define __SSAT(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - - -/** - \brief Unsigned Saturate - \details Saturates an unsigned value. - \param [in] value Value to be saturated - \param [in] sat Bit position to saturate to (0..31) - \return Saturated value - */ -#define __USAT(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - - -/** - \brief Rotate Right with Extend (32 bit) - \details Moves each bit of a bitstring right by one bit. - The carry input is shifted in at the left end of the bitstring. - \param [in] value Value to rotate - \return Rotated value - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value) -{ - uint32_t result; - - __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - return(result); -} - - -/** - \brief LDRT Unprivileged (8 bit) - \details Executes a Unprivileged LDRT instruction for 8 bit value. - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint8_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (16 bit) - \details Executes a Unprivileged LDRT instruction for 16 bit values. - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr) -{ - uint32_t result; - -#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) - __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) ); -#else - /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not - accepted by assembler. So has to use following less efficient pattern. - */ - __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); -#endif - return ((uint16_t) result); /* Add explicit type cast here */ -} - - -/** - \brief LDRT Unprivileged (32 bit) - \details Executes a Unprivileged LDRT instruction for 32 bit values. - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr) -{ - uint32_t result; - - __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) ); - return(result); -} - - -/** - \brief STRT Unprivileged (8 bit) - \details Executes a Unprivileged STRT instruction for 8 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr) -{ - __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (16 bit) - \details Executes a Unprivileged STRT instruction for 16 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr) -{ - __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) ); -} - - -/** - \brief STRT Unprivileged (32 bit) - \details Executes a Unprivileged STRT instruction for 32 bit values. - \param [in] value Value to store - \param [in] ptr Pointer to location - */ -__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr) -{ - __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) ); -} - -#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */ - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */ - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#define __SSAT16(ARG1,ARG2) \ -({ \ - int32_t __RES, __ARG1 = (ARG1); \ - __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - -#define __USAT16(ARG1,ARG2) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1); \ - __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ - __RES; \ - }) - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1) -{ - uint32_t result; - - __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) -{ - uint32_t result; - - __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) -{ - union llreg_u{ - uint32_t w32[2]; - uint64_t w64; - } llr; - llr.w64 = acc; - -#ifndef __ARMEB__ /* Little endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); -#else /* Big endian */ - __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); -#endif - - return(llr.w64); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2) -{ - uint32_t result; - - __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2) -{ - int32_t result; - - __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); - return(result); -} - -#define __PKHBT(ARG1,ARG2,ARG3) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - -#define __PKHTB(ARG1,ARG2,ARG3) \ -({ \ - uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ - if (ARG3 == 0) \ - __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ - else \ - __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ - __RES; \ - }) - -__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) -{ - int32_t result; - - __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); - return(result); -} - -#endif /* (__CORTEX_M >= 0x04) */ -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#if defined ( __GNUC__ ) -#pragma GCC diagnostic pop -#endif - -#endif /* __CMSIS_GCC_H */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm0.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm0.h deleted file mode 100644 index 711dad55..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm0.h +++ /dev/null @@ -1,798 +0,0 @@ -/**************************************************************************//** - * @file core_cm0.h - * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM0_H_GENERIC -#define __CORE_CM0_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M0 - @{ - */ - -/* CMSIS CM0 definitions */ -#define __CM0_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __CM0_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \ - __CM0_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x00U) /*!< Cortex-M Core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM0_H_DEPENDANT -#define __CORE_CM0_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM0_REV - #define __CM0_REV 0x0000U - #warning "__CM0_REV not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M0 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t _reserved0:1; /*!< bit: 0 Reserved */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - uint32_t RESERVED0; - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED1; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the Cortex-M0 header file. - @{ - */ -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M0 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/* Interrupt Priorities are WORD accessible only under ARMv6M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm0plus.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm0plus.h deleted file mode 100644 index b04aa390..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm0plus.h +++ /dev/null @@ -1,914 +0,0 @@ -/**************************************************************************//** - * @file core_cm0plus.h - * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM0PLUS_H_GENERIC -#define __CORE_CM0PLUS_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex-M0+ - @{ - */ - -/* CMSIS CM0+ definitions */ -#define __CM0PLUS_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __CM0PLUS_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ - __CM0PLUS_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x00U) /*!< Cortex-M Core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0PLUS_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM0PLUS_H_DEPENDANT -#define __CORE_CM0PLUS_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM0PLUS_REV - #define __CM0PLUS_REV 0x0000U - #warning "__CM0PLUS_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __VTOR_PRESENT - #define __VTOR_PRESENT 0U - #warning "__VTOR_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex-M0+ */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ -#if (__VTOR_PRESENT == 1U) - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ -#else - uint32_t RESERVED0; -#endif - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED1; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -#if (__VTOR_PRESENT == 1U) -/* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#endif - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the Cortex-M0+ header file. - @{ - */ -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M0+ Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/* Interrupt Priorities are WORD accessible only under ARMv6M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM0PLUS_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm3.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm3.h deleted file mode 100644 index b4ac4c7b..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm3.h +++ /dev/null @@ -1,1763 +0,0 @@ -/**************************************************************************//** - * @file core_cm3.h - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM3_H_GENERIC -#define __CORE_CM3_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M3 - @{ - */ - -/* CMSIS CM3 definitions */ -#define __CM3_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \ - __CM3_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03U) /*!< Cortex-M Core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM3_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM3_H_DEPENDANT -#define __CORE_CM3_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM3_REV - #define __CM3_REV 0x0200U - #warning "__CM3_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M3 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[5U]; - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#if (__CM3_REV < 0x0201U) /* core r2p1 */ -#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ -#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ - -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#else -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ -#endif - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200U)) - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -#else - uint32_t RESERVED1[1U]; -#endif -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ - -#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ -#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ - -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[29U]; - __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ - __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ - __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ -#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ -#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in NVIC and returns the active bit. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - */ -__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM3_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm4.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm4.h deleted file mode 100644 index dc840ebf..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm4.h +++ /dev/null @@ -1,1937 +0,0 @@ -/**************************************************************************//** - * @file core_cm4.h - * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM4_H_GENERIC -#define __CORE_CM4_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M4 - @{ - */ - -/* CMSIS CM4 definitions */ -#define __CM4_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __CM4_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \ - __CM4_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x04U) /*!< Cortex-M Core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. -*/ -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #if (__FPU_PRESENT == 1) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ -#include "core_cmSimd.h" /* Compiler specific SIMD Intrinsics */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM4_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM4_H_DEPENDANT -#define __CORE_CM4_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM4_REV - #define __CM4_REV 0x0000U - #warning "__CM4_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M4 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ - uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[5U]; - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */ -#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */ - -#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */ -#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */ - -#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ -#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ - -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[29U]; - __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ - __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ - __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ -#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ -#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if (__FPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -/* Media and FP Feature Register 0 Definitions */ -#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ -#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ - -#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ -#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ - -#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ -#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ - -#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ -#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ -#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ - -#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ -#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ - -#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ -#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ - -#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ -#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ - -/* Media and FP Feature Register 1 Definitions */ -#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ -#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ - -#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ -#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ - -#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ -#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ - -#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ -#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ - -/*@} end of group CMSIS_FPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M4 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -#if (__FPU_PRESENT == 1U) - #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ - #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in NVIC and returns the active bit. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - */ -__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM4_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm7.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm7.h deleted file mode 100644 index 3b7530ad..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cm7.h +++ /dev/null @@ -1,2512 +0,0 @@ -/**************************************************************************//** - * @file core_cm7.h - * @brief CMSIS Cortex-M7 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CM7_H_GENERIC -#define __CORE_CM7_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup Cortex_M7 - @{ - */ - -/* CMSIS CM7 definitions */ -#define __CM7_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __CM7_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __CM7_CMSIS_VERSION ((__CM7_CMSIS_VERSION_MAIN << 16U) | \ - __CM7_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x07U) /*!< Cortex-M Core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. -*/ -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #if (__FPU_PRESENT == 1) - #define __FPU_USED 1U - #else - #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #if (__FPU_PRESENT == 1U) - #define __FPU_USED 1U - #else - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #define __FPU_USED 0U - #endif - #else - #define __FPU_USED 0U - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ -#include "core_cmSimd.h" /* Compiler specific SIMD Intrinsics */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM7_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_CM7_H_DEPENDANT -#define __CORE_CM7_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __CM7_REV - #define __CM7_REV 0x0000U - #warning "__CM7_REV not defined in device header file; using default!" - #endif - - #ifndef __FPU_PRESENT - #define __FPU_PRESENT 0U - #warning "__FPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __ICACHE_PRESENT - #define __ICACHE_PRESENT 0U - #warning "__ICACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DCACHE_PRESENT - #define __DCACHE_PRESENT 0U - #warning "__DCACHE_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __DTCM_PRESENT - #define __DTCM_PRESENT 0U - #warning "__DTCM_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 3U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group Cortex_M7 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - - Core FPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - -#define APSR_GE_Pos 16U /*!< APSR: GE Position */ -#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ - uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ - uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ -#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ - uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ -#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ - -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t ID_MFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ID_ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[1U]; - __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ - __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ - __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ - __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - uint32_t RESERVED3[93U]; - __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ - uint32_t RESERVED4[15U]; - __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 1 */ - uint32_t RESERVED5[1U]; - __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ - uint32_t RESERVED6[1U]; - __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ - __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ - __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ - __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ - __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ - __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ - __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ - __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ - uint32_t RESERVED7[6U]; - __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */ - __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */ - __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */ - __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ - __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */ - uint32_t RESERVED8[1U]; - __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: Branch prediction enable bit Position */ -#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */ - -#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: Instruction cache enable bit Position */ -#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */ - -#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: Cache enable bit Position */ -#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */ - -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/* SCB Cache Level ID Register Definitions */ -#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ -#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ - -#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ -#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ - -/* SCB Cache Type Register Definitions */ -#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ -#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ - -#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ -#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ - -#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ -#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ - -#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ -#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ - -#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ -#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ - -/* SCB Cache Size ID Register Definitions */ -#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ -#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ - -#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ -#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ - -#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ -#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ - -#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ -#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ - -#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ -#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ - -#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ -#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ - -#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ -#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ - -/* SCB Cache Size Selection Register Definitions */ -#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ -#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ - -#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ -#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ - -/* SCB Software Triggered Interrupt Register Definitions */ -#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ -#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ - -/* SCB D-Cache Invalidate by Set-way Register Definitions */ -#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ -#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ - -#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ -#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ - -/* SCB D-Cache Clean by Set-way Register Definitions */ -#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ -#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ - -#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ -#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ - -/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ -#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ -#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ - -#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ -#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ - -/* Instruction Tightly-Coupled Memory Control Register Definitions */ -#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */ -#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */ - -#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */ -#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */ - -#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */ -#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */ - -#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */ -#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */ - -/* Data Tightly-Coupled Memory Control Register Definitions */ -#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */ -#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */ - -#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */ -#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */ - -#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */ -#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */ - -#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */ -#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */ - -/* AHBP Control Register Definitions */ -#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */ -#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */ - -#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */ -#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */ - -/* L1 Cache Control Register Definitions */ -#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */ -#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */ - -#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */ -#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */ - -#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */ -#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */ - -/* AHBS Control Register Definitions */ -#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */ -#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */ - -#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */ -#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */ - -#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/ -#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */ - -/* Auxiliary Bus Fault Status Register Definitions */ -#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/ -#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */ - -#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/ -#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */ - -#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/ -#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */ - -#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/ -#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */ - -#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/ -#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */ - -#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/ -#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U /*!< ACTLR: DISITMATBFLUSH Position */ -#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */ - -#define SCnSCB_ACTLR_DISRAMODE_Pos 11U /*!< ACTLR: DISRAMODE Position */ -#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos) /*!< ACTLR: DISRAMODE Mask */ - -#define SCnSCB_ACTLR_FPEXCODIS_Pos 10U /*!< ACTLR: FPEXCODIS Position */ -#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */ - -#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ -#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ - -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[29U]; - __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ - __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ - __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ - uint32_t RESERVED3[981U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( W) Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ -#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ -#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -#if (__FPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_FPU Floating Point Unit (FPU) - \brief Type definitions for the Floating Point Unit (FPU) - @{ - */ - -/** - \brief Structure type to access the Floating Point Unit (FPU). - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ - __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ - __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ - __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ - __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ - __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */ -} FPU_Type; - -/* Floating-Point Context Control Register Definitions */ -#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ -#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ - -#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ -#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ - -#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ -#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ - -#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ -#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ - -#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ -#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ - -#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ -#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ - -#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ -#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ - -#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ -#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ - -#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ -#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ - -/* Floating-Point Context Address Register Definitions */ -#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ -#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ - -/* Floating-Point Default Status Control Register Definitions */ -#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ -#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ - -#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ -#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ - -#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ -#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ - -#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ -#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ - -/* Media and FP Feature Register 0 Definitions */ -#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ -#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ - -#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ -#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ - -#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ -#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ - -#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ -#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ - -#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ -#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ - -#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ -#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ - -#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ -#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ - -#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ -#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ - -/* Media and FP Feature Register 1 Definitions */ -#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ -#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ - -#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ -#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ - -#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ -#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ - -#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ -#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ - -/* Media and FP Feature Register 2 Definitions */ - -/*@} end of group CMSIS_FPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M4 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -#if (__FPU_PRESENT == 1U) - #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ - #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in NVIC and returns the active bit. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - */ -__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return(((uint32_t)SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - -/* ########################## FPU functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_FpuFunctions FPU Functions - \brief Function that provides FPU type. - @{ - */ - -/** - \brief get FPU type - \details returns the FPU type - \returns - - \b 0: No FPU - - \b 1: Single precision FPU - - \b 2: Double + Single precision FPU - */ -__STATIC_INLINE uint32_t SCB_GetFPUType(void) -{ - uint32_t mvfr0; - - mvfr0 = SCB->MVFR0; - if ((mvfr0 & 0x00000FF0UL) == 0x220UL) - { - return 2UL; /* Double + Single precision FPU */ - } - else if ((mvfr0 & 0x00000FF0UL) == 0x020UL) - { - return 1UL; /* Single precision FPU */ - } - else - { - return 0UL; /* No FPU */ - } -} - - -/*@} end of CMSIS_Core_FpuFunctions */ - - - -/* ########################## Cache functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_CacheFunctions Cache Functions - \brief Functions that configure Instruction and Data cache. - @{ - */ - -/* Cache Size ID Register Macros */ -#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos) -#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos ) - - -/** - \brief Enable I-Cache - \details Turns on I-Cache - */ -__STATIC_INLINE void SCB_EnableICache (void) -{ - #if (__ICACHE_PRESENT == 1U) - __DSB(); - __ISB(); - SCB->ICIALLU = 0UL; /* invalidate I-Cache */ - SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */ - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Disable I-Cache - \details Turns off I-Cache - */ -__STATIC_INLINE void SCB_DisableICache (void) -{ - #if (__ICACHE_PRESENT == 1U) - __DSB(); - __ISB(); - SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */ - SCB->ICIALLU = 0UL; /* invalidate I-Cache */ - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Invalidate I-Cache - \details Invalidates I-Cache - */ -__STATIC_INLINE void SCB_InvalidateICache (void) -{ - #if (__ICACHE_PRESENT == 1U) - __DSB(); - __ISB(); - SCB->ICIALLU = 0UL; - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Enable D-Cache - \details Turns on D-Cache - */ -__STATIC_INLINE void SCB_EnableDCache (void) -{ - #if (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | - ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways--); - } while(sets--); - __DSB(); - - SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */ - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Disable D-Cache - \details Turns off D-Cache - */ -__STATIC_INLINE void SCB_DisableDCache (void) -{ - #if (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */ - - /* clean & invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | - ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways--); - } while(sets--); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Invalidate D-Cache - \details Invalidates D-Cache - */ -__STATIC_INLINE void SCB_InvalidateDCache (void) -{ - #if (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | - ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways--); - } while(sets--); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Clean D-Cache - \details Cleans D-Cache - */ -__STATIC_INLINE void SCB_CleanDCache (void) -{ - #if (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* clean D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) | - ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways--); - } while(sets--); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief Clean & Invalidate D-Cache - \details Cleans and Invalidates D-Cache - */ -__STATIC_INLINE void SCB_CleanInvalidateDCache (void) -{ - #if (__DCACHE_PRESENT == 1U) - uint32_t ccsidr; - uint32_t sets; - uint32_t ways; - - SCB->CSSELR = (0U << 1U) | 0U; /* Level 1 data cache */ - __DSB(); - - ccsidr = SCB->CCSIDR; - - /* clean & invalidate D-Cache */ - sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - do { - ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - do { - SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | - ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); - #if defined ( __CC_ARM ) - __schedule_barrier(); - #endif - } while (ways--); - } while(sets--); - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief D-Cache Invalidate by address - \details Invalidates D-Cache for the given address - \param[in] addr address (aligned to 32-byte boundary) - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) -{ - #if (__DCACHE_PRESENT == 1U) - int32_t op_size = dsize; - uint32_t op_addr = (uint32_t)addr; - int32_t linesize = 32U; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ - - __DSB(); - - while (op_size > 0) { - SCB->DCIMVAC = op_addr; - op_addr += linesize; - op_size -= linesize; - } - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief D-Cache Clean by address - \details Cleans D-Cache for the given address - \param[in] addr address (aligned to 32-byte boundary) - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize) -{ - #if (__DCACHE_PRESENT == 1) - int32_t op_size = dsize; - uint32_t op_addr = (uint32_t) addr; - int32_t linesize = 32U; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ - - __DSB(); - - while (op_size > 0) { - SCB->DCCMVAC = op_addr; - op_addr += linesize; - op_size -= linesize; - } - - __DSB(); - __ISB(); - #endif -} - - -/** - \brief D-Cache Clean and Invalidate by address - \details Cleans and invalidates D_Cache for the given address - \param[in] addr address (aligned to 32-byte boundary) - \param[in] dsize size of memory block (in number of bytes) -*/ -__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) -{ - #if (__DCACHE_PRESENT == 1U) - int32_t op_size = dsize; - uint32_t op_addr = (uint32_t) addr; - int32_t linesize = 32U; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ - - __DSB(); - - while (op_size > 0) { - SCB->DCCIMVAC = op_addr; - op_addr += linesize; - op_size -= linesize; - } - - __DSB(); - __ISB(); - #endif -} - - -/*@} end of CMSIS_Core_CacheFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CM7_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cmFunc.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cmFunc.h deleted file mode 100644 index 652a48af..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cmFunc.h +++ /dev/null @@ -1,87 +0,0 @@ -/**************************************************************************//** - * @file core_cmFunc.h - * @brief CMSIS Cortex-M Core Function Access Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CMFUNC_H -#define __CORE_CMFUNC_H - - -/* ########################### Core Function Access ########################### */ -/** \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - @{ -*/ - -/*------------------ RealView Compiler -----------------*/ -#if defined ( __CC_ARM ) - #include "cmsis_armcc.h" - -/*------------------ ARM Compiler V6 -------------------*/ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #include "cmsis_armcc_V6.h" - -/*------------------ GNU Compiler ----------------------*/ -#elif defined ( __GNUC__ ) - #include "cmsis_gcc.h" - -/*------------------ ICC Compiler ----------------------*/ -#elif defined ( __ICCARM__ ) - #include - -/*------------------ TI CCS Compiler -------------------*/ -#elif defined ( __TMS470__ ) - #include - -/*------------------ TASKING Compiler ------------------*/ -#elif defined ( __TASKING__ ) - /* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all intrinsics, - * Including the CMSIS ones. - */ - -/*------------------ COSMIC Compiler -------------------*/ -#elif defined ( __CSMC__ ) - #include - -#endif - -/*@} end of CMSIS_Core_RegAccFunctions */ - -#endif /* __CORE_CMFUNC_H */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cmInstr.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cmInstr.h deleted file mode 100644 index f474b0e6..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cmInstr.h +++ /dev/null @@ -1,87 +0,0 @@ -/**************************************************************************//** - * @file core_cmInstr.h - * @brief CMSIS Cortex-M Core Instruction Access Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CMINSTR_H -#define __CORE_CMINSTR_H - - -/* ########################## Core Instruction Access ######################### */ -/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - Access to dedicated instructions - @{ -*/ - -/*------------------ RealView Compiler -----------------*/ -#if defined ( __CC_ARM ) - #include "cmsis_armcc.h" - -/*------------------ ARM Compiler V6 -------------------*/ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #include "cmsis_armcc_V6.h" - -/*------------------ GNU Compiler ----------------------*/ -#elif defined ( __GNUC__ ) - #include "cmsis_gcc.h" - -/*------------------ ICC Compiler ----------------------*/ -#elif defined ( __ICCARM__ ) - #include - -/*------------------ TI CCS Compiler -------------------*/ -#elif defined ( __TMS470__ ) - #include - -/*------------------ TASKING Compiler ------------------*/ -#elif defined ( __TASKING__ ) - /* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all intrinsics, - * Including the CMSIS ones. - */ - -/*------------------ COSMIC Compiler -------------------*/ -#elif defined ( __CSMC__ ) - #include - -#endif - -/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ - -#endif /* __CORE_CMINSTR_H */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cmSimd.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cmSimd.h deleted file mode 100644 index 66bf5c2a..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_cmSimd.h +++ /dev/null @@ -1,96 +0,0 @@ -/**************************************************************************//** - * @file core_cmSimd.h - * @brief CMSIS Cortex-M SIMD Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_CMSIMD_H -#define __CORE_CMSIMD_H - -#ifdef __cplusplus - extern "C" { -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ -/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics - Access to dedicated SIMD instructions - @{ -*/ - -/*------------------ RealView Compiler -----------------*/ -#if defined ( __CC_ARM ) - #include "cmsis_armcc.h" - -/*------------------ ARM Compiler V6 -------------------*/ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #include "cmsis_armcc_V6.h" - -/*------------------ GNU Compiler ----------------------*/ -#elif defined ( __GNUC__ ) - #include "cmsis_gcc.h" - -/*------------------ ICC Compiler ----------------------*/ -#elif defined ( __ICCARM__ ) - #include - -/*------------------ TI CCS Compiler -------------------*/ -#elif defined ( __TMS470__ ) - #include - -/*------------------ TASKING Compiler ------------------*/ -#elif defined ( __TASKING__ ) - /* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all intrinsics, - * Including the CMSIS ones. - */ - -/*------------------ COSMIC Compiler -------------------*/ -#elif defined ( __CSMC__ ) - #include - -#endif - -/*@} end of group CMSIS_SIMD_intrinsics */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_CMSIMD_H */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_sc000.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_sc000.h deleted file mode 100644 index 514dbd81..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_sc000.h +++ /dev/null @@ -1,926 +0,0 @@ -/**************************************************************************//** - * @file core_sc000.h - * @brief CMSIS SC000 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_SC000_H_GENERIC -#define __CORE_SC000_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup SC000 - @{ - */ - -/* CMSIS SC000 definitions */ -#define __SC000_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __SC000_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16U) | \ - __SC000_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_SC (000U) /*!< Cortex secure core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC000_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_SC000_H_DEPENDANT -#define __CORE_SC000_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __SC000_REV - #define __SC000_REV 0x0000U - #warning "__SC000_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 2U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group SC000 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t _reserved0:1; /*!< bit: 0 Reserved */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ -} NVIC_Type; - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED0[1U]; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - uint32_t RESERVED1[154U]; - __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ -} SCnSCB_Type; - -/* Auxiliary Control Register Definitions */ -#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ -#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. - Therefore they are not covered by the SC000 header file. - @{ - */ -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of SC000 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/* Interrupt Priorities are WORD accessible only under ARMv6M */ -/* The following MACROS handle generation of the register offset and byte masks */ -#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) -#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) -#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - SCB_AIRCR_SYSRESETREQ_Msk); - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC000_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_sc300.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_sc300.h deleted file mode 100644 index 8bd18aa3..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/core_sc300.h +++ /dev/null @@ -1,1745 +0,0 @@ -/**************************************************************************//** - * @file core_sc300.h - * @brief CMSIS SC300 Core Peripheral Access Layer Header File - * @version V4.30 - * @date 20. October 2015 - ******************************************************************************/ -/* Copyright (c) 2009 - 2015 ARM LIMITED - - All rights reserved. - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - - Neither the name of ARM nor the names of its contributors may be used - to endorse or promote products derived from this software without - specific prior written permission. - * - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - POSSIBILITY OF SUCH DAMAGE. - ---------------------------------------------------------------------------*/ - - -#if defined ( __ICCARM__ ) - #pragma system_include /* treat file as system include file for MISRA check */ -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #pragma clang system_header /* treat file as system include file */ -#endif - -#ifndef __CORE_SC300_H_GENERIC -#define __CORE_SC300_H_GENERIC - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/** - \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - CMSIS violates the following MISRA-C:2004 rules: - - \li Required Rule 8.5, object/function definition in header file.
- Function definitions in header files are used to allow 'inlining'. - - \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- Unions are used for effective representation of core registers. - - \li Advisory Rule 19.7, Function-like macro defined.
- Function-like macros are used to allow more efficient code. - */ - - -/******************************************************************************* - * CMSIS definitions - ******************************************************************************/ -/** - \ingroup SC3000 - @{ - */ - -/* CMSIS SC300 definitions */ -#define __SC300_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS HAL main version */ -#define __SC300_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS HAL sub version */ -#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16U) | \ - __SC300_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */ - -#define __CORTEX_SC (300U) /*!< Cortex secure core */ - - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - #define __STATIC_INLINE static __inline - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ - #define __STATIC_INLINE static inline - -#elif defined ( __TMS470__ ) - #define __ASM __asm /*!< asm keyword for TI CCS Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - #define __STATIC_INLINE static inline - -#elif defined ( __CSMC__ ) - #define __packed - #define __ASM _asm /*!< asm keyword for COSMIC Compiler */ - #define __INLINE inline /*!< inline keyword for COSMIC Compiler. Use -pc99 on compile line */ - #define __STATIC_INLINE static inline - -#else - #error Unknown compiler -#endif - -/** __FPU_USED indicates whether an FPU is used or not. - This core does not support an FPU at all -*/ -#define __FPU_USED 0U - -#if defined ( __CC_ARM ) - #if defined __TARGET_FPU_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if defined __ARM_PCS_VFP - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __GNUC__ ) - #if defined (__VFP_FP__) && !defined(__SOFTFP__) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __ICCARM__ ) - #if defined __ARMVFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TMS470__ ) - #if defined __TI_VFP_SUPPORT__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __TASKING__ ) - #if defined __FPU_VFP__ - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#elif defined ( __CSMC__ ) - #if ( __CSMC__ & 0x400U) - #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - #endif - -#endif - -#include "core_cmInstr.h" /* Core Instruction Access */ -#include "core_cmFunc.h" /* Core Function Access */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC300_H_GENERIC */ - -#ifndef __CMSIS_GENERIC - -#ifndef __CORE_SC300_H_DEPENDANT -#define __CORE_SC300_H_DEPENDANT - -#ifdef __cplusplus - extern "C" { -#endif - -/* check device defines and use defaults */ -#if defined __CHECK_DEVICE_DEFINES - #ifndef __SC300_REV - #define __SC300_REV 0x0000U - #warning "__SC300_REV not defined in device header file; using default!" - #endif - - #ifndef __MPU_PRESENT - #define __MPU_PRESENT 0U - #warning "__MPU_PRESENT not defined in device header file; using default!" - #endif - - #ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4U - #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - #endif - - #ifndef __Vendor_SysTickConfig - #define __Vendor_SysTickConfig 0U - #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - #endif -#endif - -/* IO definitions (access restrictions to peripheral registers) */ -/** - \defgroup CMSIS_glob_defs CMSIS Global Defines - - IO Type Qualifiers are used - \li to specify the access to peripheral variables. - \li for automatic generation of peripheral register debug information. -*/ -#ifdef __cplusplus - #define __I volatile /*!< Defines 'read only' permissions */ -#else - #define __I volatile const /*!< Defines 'read only' permissions */ -#endif -#define __O volatile /*!< Defines 'write only' permissions */ -#define __IO volatile /*!< Defines 'read / write' permissions */ - -/* following defines should be used for structure members */ -#define __IM volatile const /*! Defines 'read only' structure member permissions */ -#define __OM volatile /*! Defines 'write only' structure member permissions */ -#define __IOM volatile /*! Defines 'read / write' structure member permissions */ - -/*@} end of group SC300 */ - - - -/******************************************************************************* - * Register Abstraction - Core Register contain: - - Core Register - - Core NVIC Register - - Core SCB Register - - Core SysTick Register - - Core Debug Register - - Core MPU Register - ******************************************************************************/ -/** - \defgroup CMSIS_core_register Defines and Type Definitions - \brief Type definitions and defines for Cortex-M processor based devices. -*/ - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CORE Status and Control Registers - \brief Core Register type definitions. - @{ - */ - -/** - \brief Union type to access the Application Program Status Register (APSR). - */ -typedef union -{ - struct - { - uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} APSR_Type; - -/* APSR Register Definitions */ -#define APSR_N_Pos 31U /*!< APSR: N Position */ -#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ - -#define APSR_Z_Pos 30U /*!< APSR: Z Position */ -#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ - -#define APSR_C_Pos 29U /*!< APSR: C Position */ -#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ - -#define APSR_V_Pos 28U /*!< APSR: V Position */ -#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ - -#define APSR_Q_Pos 27U /*!< APSR: Q Position */ -#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ - - -/** - \brief Union type to access the Interrupt Program Status Register (IPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} IPSR_Type; - -/* IPSR Register Definitions */ -#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ -#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ - - -/** - \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - */ -typedef union -{ - struct - { - uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ - uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ - uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} xPSR_Type; - -/* xPSR Register Definitions */ -#define xPSR_N_Pos 31U /*!< xPSR: N Position */ -#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ - -#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ -#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ - -#define xPSR_C_Pos 29U /*!< xPSR: C Position */ -#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ - -#define xPSR_V_Pos 28U /*!< xPSR: V Position */ -#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ - -#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ -#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ - -#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ -#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ - -#define xPSR_T_Pos 24U /*!< xPSR: T Position */ -#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ - -#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ -#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ - - -/** - \brief Union type to access the Control Registers (CONTROL). - */ -typedef union -{ - struct - { - uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - } b; /*!< Structure used for bit access */ - uint32_t w; /*!< Type used for word access */ -} CONTROL_Type; - -/* CONTROL Register Definitions */ -#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ -#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ - -#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ -#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ - -/*@} end of group CMSIS_CORE */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - \brief Type definitions for the NVIC Registers - @{ - */ - -/** - \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - */ -typedef struct -{ - __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[24U]; - __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[24U]; - __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[24U]; - __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[24U]; - __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ - uint32_t RESERVED4[56U]; - __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644U]; - __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ -} NVIC_Type; - -/* Software Triggered Interrupt Register Definitions */ -#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ -#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_NVIC */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCB System Control Block (SCB) - \brief Type definitions for the System Control Block Registers - @{ - */ - -/** - \brief Structure type to access the System Control Block (SCB). - */ -typedef struct -{ - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ - __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ - __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ - __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ - __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ - __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ - __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ - __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ - __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ - __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ - __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ - __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ - uint32_t RESERVED0[5U]; - __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ - uint32_t RESERVED1[129U]; - __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ -#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ - -#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Vector Table Offset Register Definitions */ -#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ -#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ - -#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Register Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Register Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ - -/*@} end of group CMSIS_SCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) - \brief Type definitions for the System Control and ID Register not in the SCB - @{ - */ - -/** - \brief Structure type to access the System Control and ID Register not in the SCB. - */ -typedef struct -{ - uint32_t RESERVED0[1U]; - __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ - uint32_t RESERVED1[1U]; -} SCnSCB_Type; - -/* Interrupt Controller Type Register Definitions */ -#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ -#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ - -/*@} end of group CMSIS_SCnotSCB */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_SysTick System Tick Timer (SysTick) - \brief Type definitions for the System Timer Registers. - @{ - */ - -/** - \brief Structure type to access the System Timer (SysTick). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ - __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ - __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ - -/*@} end of group CMSIS_SysTick */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) - \brief Type definitions for the Instrumentation Trace Macrocell (ITM) - @{ - */ - -/** - \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). - */ -typedef struct -{ - __OM union - { - __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ - __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ - __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ - } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ - uint32_t RESERVED0[864U]; - __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ - uint32_t RESERVED1[15U]; - __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ - uint32_t RESERVED2[15U]; - __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ - uint32_t RESERVED3[29U]; - __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ - __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ - __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ - uint32_t RESERVED4[43U]; - __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ - __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ - uint32_t RESERVED5[6U]; - __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ - __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ - __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ - __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ - __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ - __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ - __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ - __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ - __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ - __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ - __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ - __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ -#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ - -#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ - -/*@}*/ /* end of group CMSIS_ITM */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) - \brief Type definitions for the Data Watchpoint and Trace (DWT) - @{ - */ - -/** - \brief Structure type to access the Data Watchpoint and Trace Register (DWT). - */ -typedef struct -{ - __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ - __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ - __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ - __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ - __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ - __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ - __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ - __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ - __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ - __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ - __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ - uint32_t RESERVED0[1U]; - __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ - __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ - __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ - uint32_t RESERVED1[1U]; - __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ - __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ - __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ - uint32_t RESERVED2[1U]; - __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ - __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ - __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ -} DWT_Type; - -/* DWT Control Register Definitions */ -#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ -#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ - -#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ -#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ - -#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ -#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ - -#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ -#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ - -#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ -#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ - -#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ -#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ - -#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ -#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ - -#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ -#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ - -#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ -#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ - -#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ -#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ - -#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ -#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ - -#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ -#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ - -#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ -#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ - -#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ -#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ - -#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ -#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ - -#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ -#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ - -#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ -#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ - -#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ -#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ - -/* DWT CPI Count Register Definitions */ -#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ -#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ - -/* DWT Exception Overhead Count Register Definitions */ -#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ -#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ - -/* DWT Sleep Count Register Definitions */ -#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ -#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ - -/* DWT LSU Count Register Definitions */ -#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ -#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ - -/* DWT Folded-instruction Count Register Definitions */ -#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ -#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ - -/* DWT Comparator Mask Register Definitions */ -#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ -#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ - -/* DWT Comparator Function Register Definitions */ -#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ -#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ - -#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ -#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ - -#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ -#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ - -#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ -#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ - -#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ -#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ - -#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ -#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ - -#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ -#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ - -#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ -#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ - -#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ -#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ - -/*@}*/ /* end of group CMSIS_DWT */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_TPI Trace Port Interface (TPI) - \brief Type definitions for the Trace Port Interface (TPI) - @{ - */ - -/** - \brief Structure type to access the Trace Port Interface Register (TPI). - */ -typedef struct -{ - __IOM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ - __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ - uint32_t RESERVED0[2U]; - __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ - uint32_t RESERVED1[55U]; - __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ - uint32_t RESERVED2[131U]; - __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ - __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ - __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ - uint32_t RESERVED3[759U]; - __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */ - __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ - __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ - uint32_t RESERVED4[1U]; - __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ - __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ - uint32_t RESERVED5[39U]; - __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ - __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ - uint32_t RESERVED7[8U]; - __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ - __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ -} TPI_Type; - -/* TPI Asynchronous Clock Prescaler Register Definitions */ -#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ -#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ - -/* TPI Selected Pin Protocol Register Definitions */ -#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ -#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ - -/* TPI Formatter and Flush Status Register Definitions */ -#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ -#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ - -#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ -#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ - -#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ -#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ - -#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ -#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ - -/* TPI Formatter and Flush Control Register Definitions */ -#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ -#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ - -#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ -#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ - -/* TPI TRIGGER Register Definitions */ -#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ -#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ - -/* TPI Integration ETM Data Register Definitions (FIFO0) */ -#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ -#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ - -#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ -#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ - -#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ -#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ - -#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ -#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ - -#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ -#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ - -#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ -#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ - -#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ -#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ - -/* TPI ITATBCTR2 Register Definitions */ -#define TPI_ITATBCTR2_ATREADY_Pos 0U /*!< TPI ITATBCTR2: ATREADY Position */ -#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/) /*!< TPI ITATBCTR2: ATREADY Mask */ - -/* TPI Integration ITM Data Register Definitions (FIFO1) */ -#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ -#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ - -#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ -#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ - -#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ -#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ - -#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ -#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ - -#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ -#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ - -#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ -#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ - -#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ -#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ - -/* TPI ITATBCTR0 Register Definitions */ -#define TPI_ITATBCTR0_ATREADY_Pos 0U /*!< TPI ITATBCTR0: ATREADY Position */ -#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/) /*!< TPI ITATBCTR0: ATREADY Mask */ - -/* TPI Integration Mode Control Register Definitions */ -#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ -#define TPI_ITCTRL_Mode_Msk (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ - -/* TPI DEVID Register Definitions */ -#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ -#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ - -#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ -#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ - -#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ -#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ - -#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ -#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ - -#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ -#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ - -#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ -#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ - -/* TPI DEVTYPE Register Definitions */ -#define TPI_DEVTYPE_MajorType_Pos 4U /*!< TPI DEVTYPE: MajorType Position */ -#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ - -#define TPI_DEVTYPE_SubType_Pos 0U /*!< TPI DEVTYPE: SubType Position */ -#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ - -/*@}*/ /* end of group CMSIS_TPI */ - - -#if (__MPU_PRESENT == 1U) -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_MPU Memory Protection Unit (MPU) - \brief Type definitions for the Memory Protection Unit (MPU) - @{ - */ - -/** - \brief Structure type to access the Memory Protection Unit (MPU). - */ -typedef struct -{ - __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ - __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ - __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ - __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ - __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ - __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ - __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register Definitions */ -#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register Definitions */ -#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register Definitions */ -#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register Definitions */ -#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register Definitions */ -#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ -#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ - -#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ -#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ - -#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ -#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ - -#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ -#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ - -#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ -#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ - -#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ -#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ - -#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ -#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ - -#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@} end of group CMSIS_MPU */ -#endif - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - \brief Type definitions for the Core Debug Registers - @{ - */ - -/** - \brief Structure type to access the Core Debug Register (CoreDebug). - */ -typedef struct -{ - __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ - __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ - __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ - __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register Definitions */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register Definitions */ -#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register Definitions */ -#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ - -/*@} end of group CMSIS_CoreDebug */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_bitfield Core register bit field macros - \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - @{ - */ - -/** - \brief Mask and shift a bit field value for use in a register bit range. - \param[in] field Name of the register bit field. - \param[in] value Value of the bit field. - \return Masked and shifted value. -*/ -#define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - -/** - \brief Mask and shift a register value to extract a bit filed value. - \param[in] field Name of the register bit field. - \param[in] value Value of register. - \return Masked and shifted bit field value. -*/ -#define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - -/*@} end of group CMSIS_core_bitfield */ - - -/** - \ingroup CMSIS_core_register - \defgroup CMSIS_core_base Core Definitions - \brief Definitions for base addresses, unions, and structures. - @{ - */ - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ -#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ -#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ -#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - -#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ -#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ -#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ -#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if (__MPU_PRESENT == 1U) - #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ -#endif - -/*@} */ - - - -/******************************************************************************* - * Hardware Abstraction Layer - Core Function Interface contains: - - Core NVIC Functions - - Core SysTick Functions - - Core Debug Functions - - Core Register Access Functions - ******************************************************************************/ -/** - \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference -*/ - - - -/* ########################## NVIC functions #################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_NVICFunctions NVIC Functions - \brief Functions that manage interrupts and exceptions via the NVIC. - @{ - */ - -/** - \brief Set Priority Grouping - \details Sets the priority grouping field using the required unlock sequence. - The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. - Only values from 0..7 are used. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Priority grouping field. - */ -__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - reg_value = (reg_value | - ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - - -/** - \brief Get Priority Grouping - \details Reads the priority grouping field from the NVIC Interrupt Controller. - \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). - */ -__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); -} - - -/** - \brief Enable External Interrupt - \details Enables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Disable External Interrupt - \details Disables a device-specific interrupt in the NVIC interrupt controller. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Pending Interrupt - \details Reads the pending register in the NVIC and returns the pending bit for the specified interrupt. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not pending. - \return 1 Interrupt status is pending. - */ -__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Pending Interrupt - \details Sets the pending bit of an external interrupt. - \param [in] IRQn Interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Clear Pending Interrupt - \details Clears the pending bit of an external interrupt. - \param [in] IRQn External interrupt number. Value cannot be negative. - */ -__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); -} - - -/** - \brief Get Active Interrupt - \details Reads the active register in NVIC and returns the active bit. - \param [in] IRQn Interrupt number. - \return 0 Interrupt status is not active. - \return 1 Interrupt status is active. - */ -__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); -} - - -/** - \brief Set Interrupt Priority - \details Sets the priority of an interrupt. - \note The priority cannot be set for every core interrupt. - \param [in] IRQn Interrupt number. - \param [in] priority Priority to set. - */ -__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } - else - { - NVIC->IP[((uint32_t)(int32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - } -} - - -/** - \brief Get Interrupt Priority - \details Reads the priority of an interrupt. - The interrupt number can be positive to specify an external (device specific) interrupt, - or negative to specify an internal (core) interrupt. - \param [in] IRQn Interrupt number. - \return Interrupt Priority. - Value is aligned automatically to the implemented priority bits of the microcontroller. - */ -__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if ((int32_t)(IRQn) < 0) - { - return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); - } - else - { - return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); - } -} - - -/** - \brief Encode Priority - \details Encodes the priority for an interrupt with the given priority group, - preemptive priority value, and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. - \param [in] PriorityGroup Used priority group. - \param [in] PreemptPriority Preemptive priority value (starting from 0). - \param [in] SubPriority Subpriority value (starting from 0). - \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). - */ -__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - return ( - ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - ); -} - - -/** - \brief Decode Priority - \details Decodes an interrupt priority value with a given priority group to - preemptive priority value and subpriority value. - In case of a conflict between priority grouping and available - priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). - \param [in] PriorityGroup Used priority group. - \param [out] pPreemptPriority Preemptive priority value (starting from 0). - \param [out] pSubPriority Subpriority value (starting from 0). - */ -__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - - *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); - *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); -} - - -/** - \brief System Reset - \details Initiates a system reset request to reset the MCU. - */ -__STATIC_INLINE void NVIC_SystemReset(void) -{ - __DSB(); /* Ensure all outstanding memory accesses included - buffered write are completed before reset */ - SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - - for(;;) /* wait until reset */ - { - __NOP(); - } -} - -/*@} end of CMSIS_Core_NVICFunctions */ - - - -/* ################################## SysTick function ############################################ */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - \brief Functions that configure the System. - @{ - */ - -#if (__Vendor_SysTickConfig == 0U) - -/** - \brief System Tick Configuration - \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - Counter is in free running mode to generate periodic interrupts. - \param [in] ticks Number of ticks between two interrupts. - \return 0 Function succeeded. - \return 1 Function failed. - \note When the variable __Vendor_SysTickConfig is set to 1, then the - function SysTick_Config is not included. In this case, the file device.h - must contain a vendor-specific implementation of this function. - */ -__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - { - return (1UL); /* Reload value impossible */ - } - - SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0UL); /* Function successful */ -} - -#endif - -/*@} end of CMSIS_Core_SysTickFunctions */ - - - -/* ##################################### Debug In/Output function ########################################### */ -/** - \ingroup CMSIS_Core_FunctionInterface - \defgroup CMSIS_core_DebugFunctions ITM Functions - \brief Functions that access the ITM debug interface. - @{ - */ - -extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5U /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ - - -/** - \brief ITM Send Character - \details Transmits a character via the ITM channel 0, and - \li Just returns when no debugger is connected that has booked the output. - \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. - \param [in] ch Character to transmit. - \returns Character to transmit. - */ -__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ - ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0U].u32 == 0UL) - { - __NOP(); - } - ITM->PORT[0U].u8 = (uint8_t)ch; - } - return (ch); -} - - -/** - \brief ITM Receive Character - \details Inputs a character via the external variable \ref ITM_RxBuffer. - \return Received character. - \return -1 No character pending. - */ -__STATIC_INLINE int32_t ITM_ReceiveChar (void) -{ - int32_t ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) - { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - \brief ITM Check Character - \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. - \return 0 No character available. - \return 1 Character available. - */ -__STATIC_INLINE int32_t ITM_CheckChar (void) -{ - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) - { - return (0); /* no character available */ - } - else - { - return (1); /* character available */ - } -} - -/*@} end of CMSIS_core_DebugFunctions */ - - - - -#ifdef __cplusplus -} -#endif - -#endif /* __CORE_SC300_H_DEPENDANT */ - -#endif /* __CMSIS_GENERIC */ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h deleted file mode 100644 index 0ae9d0b2..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ /dev/null @@ -1,3309 +0,0 @@ -/** - ****************************************************************************** - * @file stm32_hal_legacy.h - * @author MCD Application Team - * @brief This file contains aliases definition for the STM32Cube HAL constants - * macros and functions maintained for legacy purpose. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32_HAL_LEGACY -#define __STM32_HAL_LEGACY - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose - * @{ - */ -#define AES_FLAG_RDERR CRYP_FLAG_RDERR -#define AES_FLAG_WRERR CRYP_FLAG_WRERR -#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF -#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR -#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR - -/** - * @} - */ - -/** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose - * @{ - */ -#define ADC_RESOLUTION12b ADC_RESOLUTION_12B -#define ADC_RESOLUTION10b ADC_RESOLUTION_10B -#define ADC_RESOLUTION8b ADC_RESOLUTION_8B -#define ADC_RESOLUTION6b ADC_RESOLUTION_6B -#define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN -#define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED -#define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV -#define EOC_SEQ_CONV ADC_EOC_SEQ_CONV -#define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV -#define REGULAR_GROUP ADC_REGULAR_GROUP -#define INJECTED_GROUP ADC_INJECTED_GROUP -#define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP -#define AWD_EVENT ADC_AWD_EVENT -#define AWD1_EVENT ADC_AWD1_EVENT -#define AWD2_EVENT ADC_AWD2_EVENT -#define AWD3_EVENT ADC_AWD3_EVENT -#define OVR_EVENT ADC_OVR_EVENT -#define JQOVF_EVENT ADC_JQOVF_EVENT -#define ALL_CHANNELS ADC_ALL_CHANNELS -#define REGULAR_CHANNELS ADC_REGULAR_CHANNELS -#define INJECTED_CHANNELS ADC_INJECTED_CHANNELS -#define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR -#define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT -#define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1 -#define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2 -#define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4 -#define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6 -#define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8 -#define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO -#define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2 -#define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO -#define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4 -#define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO -#define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11 -#define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1 -#define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE -#define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING -#define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING -#define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING -#define ADC_SAMPLETIME_2CYCLE_5 ADC_SAMPLETIME_2CYCLES_5 - -#define HAL_ADC_STATE_BUSY_REG HAL_ADC_STATE_REG_BUSY -#define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY -#define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC -#define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC -#define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL -#define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL -#define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1 -/** - * @} - */ - -/** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose - * @{ - */ - -#define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG - -/** - * @} - */ - -/** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose - * @{ - */ -#define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE -#define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE -#define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1 -#define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2 -#define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3 -#define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4 -#define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5 -#define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6 -#define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7 -#if defined(STM32L0) -#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */ -#endif -#define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR -#if defined(STM32F373xC) || defined(STM32F378xx) -#define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1 -#define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR -#endif /* STM32F373xC || STM32F378xx */ - -#if defined(STM32L0) || defined(STM32L4) -#define COMP_WINDOWMODE_ENABLE COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON - -#define COMP_NONINVERTINGINPUT_IO1 COMP_INPUT_PLUS_IO1 -#define COMP_NONINVERTINGINPUT_IO2 COMP_INPUT_PLUS_IO2 -#define COMP_NONINVERTINGINPUT_IO3 COMP_INPUT_PLUS_IO3 -#define COMP_NONINVERTINGINPUT_IO4 COMP_INPUT_PLUS_IO4 -#define COMP_NONINVERTINGINPUT_IO5 COMP_INPUT_PLUS_IO5 -#define COMP_NONINVERTINGINPUT_IO6 COMP_INPUT_PLUS_IO6 - -#define COMP_INVERTINGINPUT_1_4VREFINT COMP_INPUT_MINUS_1_4VREFINT -#define COMP_INVERTINGINPUT_1_2VREFINT COMP_INPUT_MINUS_1_2VREFINT -#define COMP_INVERTINGINPUT_3_4VREFINT COMP_INPUT_MINUS_3_4VREFINT -#define COMP_INVERTINGINPUT_VREFINT COMP_INPUT_MINUS_VREFINT -#define COMP_INVERTINGINPUT_DAC1_CH1 COMP_INPUT_MINUS_DAC1_CH1 -#define COMP_INVERTINGINPUT_DAC1_CH2 COMP_INPUT_MINUS_DAC1_CH2 -#define COMP_INVERTINGINPUT_DAC1 COMP_INPUT_MINUS_DAC1_CH1 -#define COMP_INVERTINGINPUT_DAC2 COMP_INPUT_MINUS_DAC1_CH2 -#define COMP_INVERTINGINPUT_IO1 COMP_INPUT_MINUS_IO1 -#if defined(STM32L0) -/* Issue fixed on STM32L0 COMP driver: only 2 dedicated IO (IO1 and IO2), */ -/* IO2 was wrongly assigned to IO shared with DAC and IO3 was corresponding */ -/* to the second dedicated IO (only for COMP2). */ -#define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_DAC1_CH2 -#define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO2 -#else -#define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_IO2 -#define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO3 -#endif -#define COMP_INVERTINGINPUT_IO4 COMP_INPUT_MINUS_IO4 -#define COMP_INVERTINGINPUT_IO5 COMP_INPUT_MINUS_IO5 - -#define COMP_OUTPUTLEVEL_LOW COMP_OUTPUT_LEVEL_LOW -#define COMP_OUTPUTLEVEL_HIGH COMP_OUTPUT_LEVEL_HIGH - -/* Note: Literal "COMP_FLAG_LOCK" kept for legacy purpose. */ -/* To check COMP lock state, use macro "__HAL_COMP_IS_LOCKED()". */ -#if defined(COMP_CSR_LOCK) -#define COMP_FLAG_LOCK COMP_CSR_LOCK -#elif defined(COMP_CSR_COMP1LOCK) -#define COMP_FLAG_LOCK COMP_CSR_COMP1LOCK -#elif defined(COMP_CSR_COMPxLOCK) -#define COMP_FLAG_LOCK COMP_CSR_COMPxLOCK -#endif - -#if defined(STM32L4) -#define COMP_BLANKINGSRCE_TIM1OC5 COMP_BLANKINGSRC_TIM1_OC5_COMP1 -#define COMP_BLANKINGSRCE_TIM2OC3 COMP_BLANKINGSRC_TIM2_OC3_COMP1 -#define COMP_BLANKINGSRCE_TIM3OC3 COMP_BLANKINGSRC_TIM3_OC3_COMP1 -#define COMP_BLANKINGSRCE_TIM3OC4 COMP_BLANKINGSRC_TIM3_OC4_COMP2 -#define COMP_BLANKINGSRCE_TIM8OC5 COMP_BLANKINGSRC_TIM8_OC5_COMP2 -#define COMP_BLANKINGSRCE_TIM15OC1 COMP_BLANKINGSRC_TIM15_OC1_COMP2 -#define COMP_BLANKINGSRCE_NONE COMP_BLANKINGSRC_NONE -#endif - -#if defined(STM32L0) -#define COMP_MODE_HIGHSPEED COMP_POWERMODE_MEDIUMSPEED -#define COMP_MODE_LOWSPEED COMP_POWERMODE_ULTRALOWPOWER -#else -#define COMP_MODE_HIGHSPEED COMP_POWERMODE_HIGHSPEED -#define COMP_MODE_MEDIUMSPEED COMP_POWERMODE_MEDIUMSPEED -#define COMP_MODE_LOWPOWER COMP_POWERMODE_LOWPOWER -#define COMP_MODE_ULTRALOWPOWER COMP_POWERMODE_ULTRALOWPOWER -#endif - -#endif -/** - * @} - */ - -/** @defgroup HAL_CORTEX_Aliased_Defines HAL CORTEX Aliased Defines maintained for legacy purpose - * @{ - */ -#define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig -/** - * @} - */ - -/** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose - * @{ - */ - -#define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE -#define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE - -/** - * @} - */ - -/** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose - * @{ - */ - -#define DAC1_CHANNEL_1 DAC_CHANNEL_1 -#define DAC1_CHANNEL_2 DAC_CHANNEL_2 -#define DAC2_CHANNEL_1 DAC_CHANNEL_1 -#define DAC_WAVE_NONE 0x00000000U -#define DAC_WAVE_NOISE DAC_CR_WAVE1_0 -#define DAC_WAVE_TRIANGLE DAC_CR_WAVE1_1 -#define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE -#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE -#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE - -/** - * @} - */ - -/** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose - * @{ - */ -#define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2 -#define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4 -#define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5 -#define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4 -#define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2 -#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 -#define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6 -#define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7 -#define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67 -#define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67 -#define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76 -#define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6 -#define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7 -#define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6 - -#define IS_HAL_REMAPDMA IS_DMA_REMAP -#define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE -#define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE - - - -/** - * @} - */ - -/** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose - * @{ - */ - -#define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE -#define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD -#define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD -#define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD -#define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS -#define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES -#define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES -#define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE -#define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE -#define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE -#define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE -#define OBEX_PCROP OPTIONBYTE_PCROP -#define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG -#define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE -#define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE -#define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE -#define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD -#define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD -#define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE -#define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD -#define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD -#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE -#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD -#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD -#define PAGESIZE FLASH_PAGE_SIZE -#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE -#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD -#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD -#define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1 -#define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2 -#define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3 -#define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4 -#define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST -#define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST -#define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA -#define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB -#define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA -#define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB -#define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE -#define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN -#define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE -#define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN -#define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE -#define FLASH_ERROR_RD HAL_FLASH_ERROR_RD -#define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG -#define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS -#define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP -#define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV -#define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR -#define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG -#define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION -#define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA -#define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE -#define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE -#define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS -#define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS -#define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST -#define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR -#define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO -#define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION -#define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS -#define OB_WDG_SW OB_IWDG_SW -#define OB_WDG_HW OB_IWDG_HW -#define OB_SDADC12_VDD_MONITOR_SET OB_SDACD_VDD_MONITOR_SET -#define OB_SDADC12_VDD_MONITOR_RESET OB_SDACD_VDD_MONITOR_RESET -#define OB_RAM_PARITY_CHECK_SET OB_SRAM_PARITY_SET -#define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET -#define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR -#define OB_RDP_LEVEL0 OB_RDP_LEVEL_0 -#define OB_RDP_LEVEL1 OB_RDP_LEVEL_1 -#define OB_RDP_LEVEL2 OB_RDP_LEVEL_2 - -/** - * @} - */ - -/** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose - * @{ - */ - -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9 -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10 -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6 -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7 -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8 -#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9 -#define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1 -#define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2 -#define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3 -/** - * @} - */ - - -/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose - * @{ - */ -#if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4) -#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE -#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE -#define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8 -#define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16 -#else -#define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE -#define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE -#define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8 -#define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16 -#endif -/** - * @} - */ - -/** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose - * @{ - */ - -#define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef -#define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef -/** - * @} - */ - -/** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose - * @{ - */ -#define GET_GPIO_SOURCE GPIO_GET_INDEX -#define GET_GPIO_INDEX GPIO_GET_INDEX - -#if defined(STM32F4) -#define GPIO_AF12_SDMMC GPIO_AF12_SDIO -#define GPIO_AF12_SDMMC1 GPIO_AF12_SDIO -#endif - -#if defined(STM32F7) -#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 -#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 -#endif - -#if defined(STM32L4) -#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 -#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 -#endif - -#define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1 -#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 -#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1 - -#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) -#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW -#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM -#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH -#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH -#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 */ - -#if defined(STM32L1) - #define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW - #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM - #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH - #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH -#endif /* STM32L1 */ - -#if defined(STM32F0) || defined(STM32F3) || defined(STM32F1) - #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW - #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM - #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_HIGH -#endif /* STM32F0 || STM32F3 || STM32F1 */ - -#define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1 -/** - * @} - */ - -/** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose - * @{ - */ - -#if defined(STM32H7) - #define __HAL_RCC_JPEG_CLK_ENABLE __HAL_RCC_JPGDECEN_CLK_ENABLE - #define __HAL_RCC_JPEG_CLK_DISABLE __HAL_RCC_JPGDECEN_CLK_DISABLE - #define __HAL_RCC_JPEG_FORCE_RESET __HAL_RCC_JPGDECRST_FORCE_RESET - #define __HAL_RCC_JPEG_RELEASE_RESET __HAL_RCC_JPGDECRST_RELEASE_RESET - #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE - #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE - - #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1 - #define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2 - - #define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX - #define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX - - #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT - #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT - #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT - #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT - #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT - #define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT - #define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0 - #define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO HAL_DMAMUX1_REQ_GEN_TIM12_TRGO - - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT - #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT - #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP HAL_DMAMUX2_REQ_GEN_I2C4_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP HAL_DMAMUX2_REQ_GEN_SPI6_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT HAL_DMAMUX2_REQ_GEN_COMP1_OUT - #define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT HAL_DMAMUX2_REQ_GEN_COMP2_OUT - #define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP HAL_DMAMUX2_REQ_GEN_RTC_WKUP - #define HAL_DMAMUX2_REQUEST_GEN_EXTI0 HAL_DMAMUX2_REQ_GEN_EXTI0 - #define HAL_DMAMUX2_REQUEST_GEN_EXTI2 HAL_DMAMUX2_REQ_GEN_EXTI2 - #define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT - #define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT HAL_DMAMUX2_REQ_GEN_SPI6_IT - #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT - #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT - #define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT HAL_DMAMUX2_REQ_GEN_ADC3_IT - #define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT - #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT - #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT - - #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT - #define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING - #define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING - #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING - - -#endif /* STM32H7 */ - - -/** - * @} - */ - - -/** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose - * @{ - */ -#define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6 -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6 -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6 -#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6 -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7 -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7 -#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7 -#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7 - -#define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER -#define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER -#define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD -#define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD -#define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER -#define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER -#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE -#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE -/** - * @} - */ - -/** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose - * @{ - */ -#define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE -#define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE -#define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE -#define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE -#define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE -#define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE -#define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE -#define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE -#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7) -#define HAL_I2C_STATE_MEM_BUSY_TX HAL_I2C_STATE_BUSY_TX -#define HAL_I2C_STATE_MEM_BUSY_RX HAL_I2C_STATE_BUSY_RX -#define HAL_I2C_STATE_MASTER_BUSY_TX HAL_I2C_STATE_BUSY_TX -#define HAL_I2C_STATE_MASTER_BUSY_RX HAL_I2C_STATE_BUSY_RX -#define HAL_I2C_STATE_SLAVE_BUSY_TX HAL_I2C_STATE_BUSY_TX -#define HAL_I2C_STATE_SLAVE_BUSY_RX HAL_I2C_STATE_BUSY_RX -#endif -/** - * @} - */ - -/** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose - * @{ - */ -#define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE -#define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE - -/** - * @} - */ - -/** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose - * @{ - */ -#define KR_KEY_RELOAD IWDG_KEY_RELOAD -#define KR_KEY_ENABLE IWDG_KEY_ENABLE -#define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE -#define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE -/** - * @} - */ - -/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose - * @{ - */ - -#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION -#define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS -#define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS -#define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS - -#define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING -#define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING -#define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING - -#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION -#define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS -#define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS -#define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS - -/* The following 3 definition have also been present in a temporary version of lptim.h */ -/* They need to be renamed also to the right name, just in case */ -#define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS -#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS -#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS - -/** - * @} - */ - -/** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose - * @{ - */ -#define HAL_NAND_Read_Page HAL_NAND_Read_Page_8b -#define HAL_NAND_Write_Page HAL_NAND_Write_Page_8b -#define HAL_NAND_Read_SpareArea HAL_NAND_Read_SpareArea_8b -#define HAL_NAND_Write_SpareArea HAL_NAND_Write_SpareArea_8b - -#define NAND_AddressTypedef NAND_AddressTypeDef - -#define __ARRAY_ADDRESS ARRAY_ADDRESS -#define __ADDR_1st_CYCLE ADDR_1ST_CYCLE -#define __ADDR_2nd_CYCLE ADDR_2ND_CYCLE -#define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE -#define __ADDR_4th_CYCLE ADDR_4TH_CYCLE -/** - * @} - */ - -/** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose - * @{ - */ -#define NOR_StatusTypedef HAL_NOR_StatusTypeDef -#define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS -#define NOR_ONGOING HAL_NOR_STATUS_ONGOING -#define NOR_ERROR HAL_NOR_STATUS_ERROR -#define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT - -#define __NOR_WRITE NOR_WRITE -#define __NOR_ADDR_SHIFT NOR_ADDR_SHIFT -/** - * @} - */ - -/** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose - * @{ - */ - -#define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0 -#define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1 -#define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2 -#define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3 - -#define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0 -#define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1 -#define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2 -#define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3 - -#define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 -#define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 - -#define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 -#define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 - -#define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0 -#define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1 - -#define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1 - -#define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO -#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 -#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1 - -/** - * @} - */ - -/** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose - * @{ - */ -#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS -#if defined(STM32F7) - #define I2S_CLOCK_SYSCLK I2S_CLOCK_PLL -#endif -/** - * @} - */ - -/** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose - * @{ - */ - -/* Compact Flash-ATA registers description */ -#define CF_DATA ATA_DATA -#define CF_SECTOR_COUNT ATA_SECTOR_COUNT -#define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER -#define CF_CYLINDER_LOW ATA_CYLINDER_LOW -#define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH -#define CF_CARD_HEAD ATA_CARD_HEAD -#define CF_STATUS_CMD ATA_STATUS_CMD -#define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE -#define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA - -/* Compact Flash-ATA commands */ -#define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD -#define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD -#define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD -#define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD - -#define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef -#define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS -#define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING -#define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR -#define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT -/** - * @} - */ - -/** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose - * @{ - */ - -#define FORMAT_BIN RTC_FORMAT_BIN -#define FORMAT_BCD RTC_FORMAT_BCD - -#define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE -#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE -#define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE -#define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE - -#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE -#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE -#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE -#define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT -#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT - -#define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT -#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1 -#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1 -#define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2 - -#define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE -#define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1 -#define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1 - -#define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT -#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 -#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 - -/** - * @} - */ - - -/** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose - * @{ - */ -#define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE -#define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE - -#define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE -#define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE -#define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE -#define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE - -#define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE -#define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE - -#define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE -#define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE -/** - * @} - */ - - -/** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose - * @{ - */ -#define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE -#define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE -#define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE -#define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE -#define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE -#define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE -#define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE -#define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE -#define SMBUS_PEC_DISABLED SMBUS_PEC_DISABLE -#define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE -#define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN -/** - * @} - */ - -/** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose - * @{ - */ -#define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE -#define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE - -#define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE -#define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE - -#define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE -#define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE - -/** - * @} - */ - -/** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose - * @{ - */ -#define CCER_CCxE_MASK TIM_CCER_CCxE_MASK -#define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK - -#define TIM_DMABase_CR1 TIM_DMABASE_CR1 -#define TIM_DMABase_CR2 TIM_DMABASE_CR2 -#define TIM_DMABase_SMCR TIM_DMABASE_SMCR -#define TIM_DMABase_DIER TIM_DMABASE_DIER -#define TIM_DMABase_SR TIM_DMABASE_SR -#define TIM_DMABase_EGR TIM_DMABASE_EGR -#define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1 -#define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2 -#define TIM_DMABase_CCER TIM_DMABASE_CCER -#define TIM_DMABase_CNT TIM_DMABASE_CNT -#define TIM_DMABase_PSC TIM_DMABASE_PSC -#define TIM_DMABase_ARR TIM_DMABASE_ARR -#define TIM_DMABase_RCR TIM_DMABASE_RCR -#define TIM_DMABase_CCR1 TIM_DMABASE_CCR1 -#define TIM_DMABase_CCR2 TIM_DMABASE_CCR2 -#define TIM_DMABase_CCR3 TIM_DMABASE_CCR3 -#define TIM_DMABase_CCR4 TIM_DMABASE_CCR4 -#define TIM_DMABase_BDTR TIM_DMABASE_BDTR -#define TIM_DMABase_DCR TIM_DMABASE_DCR -#define TIM_DMABase_DMAR TIM_DMABASE_DMAR -#define TIM_DMABase_OR1 TIM_DMABASE_OR1 -#define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3 -#define TIM_DMABase_CCR5 TIM_DMABASE_CCR5 -#define TIM_DMABase_CCR6 TIM_DMABASE_CCR6 -#define TIM_DMABase_OR2 TIM_DMABASE_OR2 -#define TIM_DMABase_OR3 TIM_DMABASE_OR3 -#define TIM_DMABase_OR TIM_DMABASE_OR - -#define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE -#define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1 -#define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2 -#define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3 -#define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4 -#define TIM_EventSource_COM TIM_EVENTSOURCE_COM -#define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER -#define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK -#define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2 - -#define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER -#define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS -#define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS -#define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS -#define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS -#define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS -#define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS -#define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS -#define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS -#define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS -#define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS -#define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS -#define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS -#define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS -#define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS -#define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS -#define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS -#define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS - -/** - * @} - */ - -/** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose - * @{ - */ -#define TSC_SYNC_POL_FALL TSC_SYNC_POLARITY_FALLING -#define TSC_SYNC_POL_RISE_HIGH TSC_SYNC_POLARITY_RISING -/** - * @} - */ - -/** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose - * @{ - */ -#define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE -#define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE -#define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE -#define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE - -#define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE -#define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE - -#define __DIV_SAMPLING16 UART_DIV_SAMPLING16 -#define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16 -#define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16 -#define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16 - -#define __DIV_SAMPLING8 UART_DIV_SAMPLING8 -#define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8 -#define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8 -#define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8 - -#define __DIV_LPUART UART_DIV_LPUART - -#define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE -#define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK - -/** - * @} - */ - - -/** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose - * @{ - */ - -#define USART_CLOCK_DISABLED USART_CLOCK_DISABLE -#define USART_CLOCK_ENABLED USART_CLOCK_ENABLE - -#define USARTNACK_ENABLED USART_NACK_ENABLE -#define USARTNACK_DISABLED USART_NACK_DISABLE -/** - * @} - */ - -/** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose - * @{ - */ -#define CFR_BASE WWDG_CFR_BASE - -/** - * @} - */ - -/** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose - * @{ - */ -#define CAN_FilterFIFO0 CAN_FILTER_FIFO0 -#define CAN_FilterFIFO1 CAN_FILTER_FIFO1 -#define CAN_IT_RQCP0 CAN_IT_TME -#define CAN_IT_RQCP1 CAN_IT_TME -#define CAN_IT_RQCP2 CAN_IT_TME -#define INAK_TIMEOUT CAN_TIMEOUT_VALUE -#define SLAK_TIMEOUT CAN_TIMEOUT_VALUE -#define CAN_TXSTATUS_FAILED ((uint8_t)0x00U) -#define CAN_TXSTATUS_OK ((uint8_t)0x01U) -#define CAN_TXSTATUS_PENDING ((uint8_t)0x02U) - -/** - * @} - */ - -/** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose - * @{ - */ - -#define VLAN_TAG ETH_VLAN_TAG -#define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD -#define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD -#define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD -#define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK -#define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK -#define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK -#define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK - -#define ETH_MMCCR 0x00000100U -#define ETH_MMCRIR 0x00000104U -#define ETH_MMCTIR 0x00000108U -#define ETH_MMCRIMR 0x0000010CU -#define ETH_MMCTIMR 0x00000110U -#define ETH_MMCTGFSCCR 0x0000014CU -#define ETH_MMCTGFMSCCR 0x00000150U -#define ETH_MMCTGFCR 0x00000168U -#define ETH_MMCRFCECR 0x00000194U -#define ETH_MMCRFAECR 0x00000198U -#define ETH_MMCRGUFCR 0x000001C4U - -#define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */ -#define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */ -#define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */ -#define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */ -#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */ -#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */ -#define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */ -#define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */ -#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */ -#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */ -#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */ -#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */ -#define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */ -#define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */ -#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */ -#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */ -#define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */ -#if defined(STM32F1) -#else -#define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */ -#define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */ -#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */ -#endif -#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */ -#define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */ -#define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */ -#define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */ -#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE 0x00000004U /* MAC small FIFO write controller active */ -#define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */ -#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */ - -/** - * @} - */ - -/** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose - * @{ - */ -#define HAL_DCMI_ERROR_OVF HAL_DCMI_ERROR_OVR -#define DCMI_IT_OVF DCMI_IT_OVR -#define DCMI_FLAG_OVFRI DCMI_FLAG_OVRRI -#define DCMI_FLAG_OVFMI DCMI_FLAG_OVRMI - -#define HAL_DCMI_ConfigCROP HAL_DCMI_ConfigCrop -#define HAL_DCMI_EnableCROP HAL_DCMI_EnableCrop -#define HAL_DCMI_DisableCROP HAL_DCMI_DisableCrop - -/** - * @} - */ - -#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\ - defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) -/** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose - * @{ - */ -#define DMA2D_ARGB8888 DMA2D_OUTPUT_ARGB8888 -#define DMA2D_RGB888 DMA2D_OUTPUT_RGB888 -#define DMA2D_RGB565 DMA2D_OUTPUT_RGB565 -#define DMA2D_ARGB1555 DMA2D_OUTPUT_ARGB1555 -#define DMA2D_ARGB4444 DMA2D_OUTPUT_ARGB4444 - -#define CM_ARGB8888 DMA2D_INPUT_ARGB8888 -#define CM_RGB888 DMA2D_INPUT_RGB888 -#define CM_RGB565 DMA2D_INPUT_RGB565 -#define CM_ARGB1555 DMA2D_INPUT_ARGB1555 -#define CM_ARGB4444 DMA2D_INPUT_ARGB4444 -#define CM_L8 DMA2D_INPUT_L8 -#define CM_AL44 DMA2D_INPUT_AL44 -#define CM_AL88 DMA2D_INPUT_AL88 -#define CM_L4 DMA2D_INPUT_L4 -#define CM_A8 DMA2D_INPUT_A8 -#define CM_A4 DMA2D_INPUT_A4 -/** - * @} - */ -#endif /* STM32L4 || STM32F7*/ - -/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose - * @{ - */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback -/** - * @} - */ - -/** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef -#define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef -#define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish -#define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish -#define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish -#define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish - -/*HASH Algorithm Selection*/ - -#define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1 -#define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224 -#define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256 -#define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5 - -#define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH -#define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC - -#define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY -#define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY -/** - * @} - */ - -/** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode -#define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode -#define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode -#define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode -#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode -#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode -#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph)) -#define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect -#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT()) -#if defined(STM32L0) -#else -#define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT()) -#endif -#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT()) -#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor()) -/** - * @} - */ - -/** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose - * @{ - */ -#define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram -#define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown -#define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown -#define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock -#define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock -#define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase -#define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program - - /** - * @} - */ - -/** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter -#define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter -#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter -#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter - -#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) - /** - * @} - */ - -/** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose - * @{ - */ -#define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD -#define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg -#define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown -#define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor -#define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg -#define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown -#define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor -#define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler -#define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD -#define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler -#define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback -#define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive -#define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive -#define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC -#define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC -#define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM - -#define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL -#define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING -#define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING -#define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING -#define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING -#define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING -#define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING - -#define CR_OFFSET_BB PWR_CR_OFFSET_BB -#define CSR_OFFSET_BB PWR_CSR_OFFSET_BB -#define PMODE_BIT_NUMBER VOS_BIT_NUMBER -#define CR_PMODE_BB CR_VOS_BB - -#define DBP_BitNumber DBP_BIT_NUMBER -#define PVDE_BitNumber PVDE_BIT_NUMBER -#define PMODE_BitNumber PMODE_BIT_NUMBER -#define EWUP_BitNumber EWUP_BIT_NUMBER -#define FPDS_BitNumber FPDS_BIT_NUMBER -#define ODEN_BitNumber ODEN_BIT_NUMBER -#define ODSWEN_BitNumber ODSWEN_BIT_NUMBER -#define MRLVDS_BitNumber MRLVDS_BIT_NUMBER -#define LPLVDS_BitNumber LPLVDS_BIT_NUMBER -#define BRE_BitNumber BRE_BIT_NUMBER - -#define PWR_MODE_EVT PWR_PVD_MODE_NORMAL - - /** - * @} - */ - -/** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT -#define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback -#define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback -/** - * @} - */ - -/** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo -/** - * @} - */ - -/** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt -#define HAL_TIM_DMAError TIM_DMAError -#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt -#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt -/** - * @} - */ - -/** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback -/** - * @} - */ - -/** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback -#define HAL_LTDC_Relaod HAL_LTDC_Reload -#define HAL_LTDC_StructInitFromVideoConfig HAL_LTDCEx_StructInitFromVideoConfig -#define HAL_LTDC_StructInitFromAdaptedCommandConfig HAL_LTDCEx_StructInitFromAdaptedCommandConfig -/** - * @} - */ - - -/** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose - * @{ - */ - -/** - * @} - */ - -/* Exported macros ------------------------------------------------------------*/ - -/** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose - * @{ - */ -#define AES_IT_CC CRYP_IT_CC -#define AES_IT_ERR CRYP_IT_ERR -#define AES_FLAG_CCF CRYP_FLAG_CCF -/** - * @} - */ - -/** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE -#define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH -#define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH -#define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM -#define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC -#define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM -#define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC -#define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI -#define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK -#define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG -#define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG -#define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE -#define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE -#define __HAL_SYSCFG_SRAM2_WRP_ENABLE __HAL_SYSCFG_SRAM2_WRP_0_31_ENABLE - -#define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY -#define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48 -#define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS -#define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER -#define CMP_PD_BitNumber CMP_PD_BIT_NUMBER - -/** - * @} - */ - - -/** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose - * @{ - */ -#define __ADC_ENABLE __HAL_ADC_ENABLE -#define __ADC_DISABLE __HAL_ADC_DISABLE -#define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS -#define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS -#define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE -#define __ADC_IS_ENABLED ADC_IS_ENABLE -#define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR -#define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED -#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED -#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR -#define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED -#define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING -#define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE - -#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION -#define __HAL_ADC_JSQR_RK ADC_JSQR_RK -#define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT -#define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR -#define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION -#define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE -#define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS -#define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS -#define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM -#define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT -#define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS -#define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN -#define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ -#define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET -#define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET -#define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL -#define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL -#define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET -#define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET -#define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD - -#define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION -#define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION -#define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION -#define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER -#define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI -#define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE -#define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE -#define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER -#define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER -#define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE - -#define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT -#define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT -#define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL -#define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM -#define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET -#define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE -#define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE -#define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER - -#define __HAL_ADC_SQR1 ADC_SQR1 -#define __HAL_ADC_SMPR1 ADC_SMPR1 -#define __HAL_ADC_SMPR2 ADC_SMPR2 -#define __HAL_ADC_SQR3_RK ADC_SQR3_RK -#define __HAL_ADC_SQR2_RK ADC_SQR2_RK -#define __HAL_ADC_SQR1_RK ADC_SQR1_RK -#define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS -#define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS -#define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV -#define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection -#define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq -#define __HAL_ADC_JSQR ADC_JSQR - -#define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL -#define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS -#define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF -#define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT -#define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS -#define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN -#define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR -#define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ - -/** - * @} - */ - -/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT -#define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT -#define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT -#define IS_DAC_GENERATE_WAVE IS_DAC_WAVE - -/** - * @} - */ - -/** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1 -#define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1 -#define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2 -#define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2 -#define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3 -#define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3 -#define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4 -#define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4 -#define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5 -#define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5 -#define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6 -#define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6 -#define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7 -#define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7 -#define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8 -#define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8 - -#define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9 -#define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9 -#define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10 -#define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10 -#define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11 -#define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11 -#define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12 -#define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12 -#define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13 -#define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13 -#define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14 -#define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14 -#define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2 -#define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2 - - -#define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15 -#define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15 -#define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16 -#define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16 -#define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17 -#define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17 -#define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC -#define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC -#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG -#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG -#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG -#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG -#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT -#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT -#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT -#define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT -#define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT -#define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT -#define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1 -#define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1 -#define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1 -#define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1 -#define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2 -#define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2 - -/** - * @} - */ - -/** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose - * @{ - */ -#if defined(STM32F3) -#define COMP_START __HAL_COMP_ENABLE -#define COMP_STOP __HAL_COMP_DISABLE -#define COMP_LOCK __HAL_COMP_LOCK - -#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \ - __HAL_COMP_COMP6_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ - __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F302xE) || defined(STM32F302xC) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \ - __HAL_COMP_COMP6_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \ - __HAL_COMP_COMP6_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \ - __HAL_COMP_COMP6_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ - __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() : \ - __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() : \ - __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : \ - __HAL_COMP_COMP7_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() : \ - ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : \ - __HAL_COMP_COMP7_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : \ - __HAL_COMP_COMP7_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \ - ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \ - __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F373xC) ||defined(STM32F378xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ - __HAL_COMP_COMP2_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ - __HAL_COMP_COMP2_EXTI_CLEAR_FLAG()) -# endif -#else -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ - __HAL_COMP_COMP2_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ - __HAL_COMP_COMP2_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ - __HAL_COMP_COMP2_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ - __HAL_COMP_COMP2_EXTI_CLEAR_FLAG()) -#endif - -#define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE - -#if defined(STM32L0) || defined(STM32L4) -/* Note: On these STM32 families, the only argument of this macro */ -/* is COMP_FLAG_LOCK. */ -/* This macro is replaced by __HAL_COMP_IS_LOCKED with only HAL handle */ -/* argument. */ -#define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (__HAL_COMP_IS_LOCKED(__HANDLE__)) -#endif -/** - * @} - */ - -#if defined(STM32L0) || defined(STM32L4) -/** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose - * @{ - */ -#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */ -#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */ -/** - * @} - */ -#endif - -/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose - * @{ - */ - -#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \ - ((WAVE) == DAC_WAVE_NOISE)|| \ - ((WAVE) == DAC_WAVE_TRIANGLE)) - -/** - * @} - */ - -/** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose - * @{ - */ - -#define IS_WRPAREA IS_OB_WRPAREA -#define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM -#define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM -#define IS_TYPEERASE IS_FLASH_TYPEERASE -#define IS_NBSECTORS IS_FLASH_NBSECTORS -#define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE - -/** - * @} - */ - -/** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __HAL_I2C_RESET_CR2 I2C_RESET_CR2 -#define __HAL_I2C_GENERATE_START I2C_GENERATE_START -#if defined(STM32F1) -#define __HAL_I2C_FREQ_RANGE I2C_FREQRANGE -#else -#define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE -#endif /* STM32F1 */ -#define __HAL_I2C_RISE_TIME I2C_RISE_TIME -#define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD -#define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST -#define __HAL_I2C_SPEED I2C_SPEED -#define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE -#define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ -#define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS -#define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE -#define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ -#define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB -#define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB -#define __HAL_I2C_FREQRANGE I2C_FREQRANGE -/** - * @} - */ - -/** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose - * @{ - */ - -#define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE -#define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT - -/** - * @} - */ - -/** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __IRDA_DISABLE __HAL_IRDA_DISABLE -#define __IRDA_ENABLE __HAL_IRDA_ENABLE - -#define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE -#define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION -#define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE -#define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION - -#define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE - - -/** - * @} - */ - - -/** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS -#define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS -/** - * @} - */ - - -/** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT -#define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT -#define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE - -/** - * @} - */ - - -/** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose - * @{ - */ -#define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD -#define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX -#define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX -#define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX -#define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX -#define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L -#define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H -#define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM -#define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES -#define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX -#define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT -#define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION -#define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET - -/** - * @} - */ - - -/** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT -#define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT -#define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE -#define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE -#define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE -#define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE -#define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE -#define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE -#define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE -#define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE -#define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE -#define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE -#define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine -#define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine -#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig -#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig -#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0) -#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT -#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT -#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE -#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE -#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE -#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE -#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE -#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE -#define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0) -#define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0) -#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention -#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention -#define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2 -#define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2 -#define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE -#define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE -#define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB -#define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB - -#if defined (STM32F4) -#define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT() -#define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT() -#define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG() -#define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG() -#define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT() -#else -#define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG -#define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT -#define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT -#define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT -#define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG -#endif /* STM32F4 */ -/** - * @} - */ - - -/** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose - * @{ - */ - -#define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI -#define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI - -#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback -#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT()) - -#define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE -#define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE -#define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE -#define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE -#define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET -#define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET -#define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE -#define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE -#define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET -#define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET -#define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE -#define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE -#define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE -#define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE -#define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET -#define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET -#define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE -#define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE -#define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET -#define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET -#define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE -#define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE -#define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE -#define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE -#define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET -#define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET -#define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE -#define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE -#define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE -#define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE -#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET -#define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET -#define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE -#define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE -#define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET -#define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET -#define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET -#define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET -#define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET -#define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET -#define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET -#define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET -#define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET -#define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET -#define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET -#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET -#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET -#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET -#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE -#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE -#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET -#define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET -#define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE -#define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE -#define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE -#define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE -#define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET -#define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET -#define __CAN_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE -#define __CAN_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE -#define __CAN_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET -#define __CAN_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET -#define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE -#define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE -#define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET -#define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET -#define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE -#define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE -#define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE -#define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE -#define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET -#define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET -#define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE -#define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE -#define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET -#define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET -#define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE -#define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE -#define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE -#define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE -#define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET -#define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET -#define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE -#define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE -#define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET -#define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET -#define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE -#define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE -#define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE -#define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE -#define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET -#define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET -#define __DBGMCU_CLK_ENABLE __HAL_RCC_DBGMCU_CLK_ENABLE -#define __DBGMCU_CLK_DISABLE __HAL_RCC_DBGMCU_CLK_DISABLE -#define __DBGMCU_FORCE_RESET __HAL_RCC_DBGMCU_FORCE_RESET -#define __DBGMCU_RELEASE_RESET __HAL_RCC_DBGMCU_RELEASE_RESET -#define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE -#define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE -#define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE -#define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE -#define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET -#define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET -#define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE -#define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE -#define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE -#define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE -#define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET -#define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET -#define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE -#define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE -#define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE -#define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE -#define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET -#define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET -#define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE -#define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE -#define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET -#define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET -#define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE -#define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE -#define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE -#define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE -#define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE -#define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE -#define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE -#define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE -#define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE -#define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE -#define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET -#define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET -#define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE -#define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE -#define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET -#define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET -#define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE -#define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE -#define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE -#define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE -#define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE -#define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE -#define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET -#define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET -#define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE -#define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE -#define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE -#define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE -#define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE -#define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE -#define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET -#define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET -#define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE -#define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE -#define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE -#define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE -#define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET -#define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET -#define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE -#define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE -#define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE -#define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE -#define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET -#define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET -#define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE -#define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE -#define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE -#define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE -#define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET -#define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET -#define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE -#define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE -#define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE -#define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE -#define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET -#define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET -#define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE -#define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE -#define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE -#define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE -#define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET -#define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET -#define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE -#define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE -#define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE -#define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE -#define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET -#define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET -#define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE -#define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE -#define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE -#define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE -#define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET -#define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET -#define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE -#define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE -#define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE -#define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE -#define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET -#define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET -#define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE -#define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE -#define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE -#define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE -#define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET -#define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET -#define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE -#define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE -#define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE -#define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE -#define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET -#define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET -#define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE -#define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE -#define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE -#define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE -#define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET -#define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET -#define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE -#define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE -#define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE -#define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE -#define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET -#define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET -#define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE -#define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE -#define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE -#define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE -#define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET -#define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET -#define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE -#define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE -#define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE -#define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE -#define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET -#define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET -#define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE -#define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE -#define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE -#define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE -#define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET -#define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET -#define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE -#define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE -#define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE -#define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE -#define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET -#define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET -#define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE -#define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE -#define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE -#define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE -#define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET -#define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET -#define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE -#define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE -#define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE -#define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE -#define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET -#define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET - -#if defined(STM32WB) -#define __HAL_RCC_QSPI_CLK_DISABLE __HAL_RCC_QUADSPI_CLK_DISABLE -#define __HAL_RCC_QSPI_CLK_ENABLE __HAL_RCC_QUADSPI_CLK_ENABLE -#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE -#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE -#define __HAL_RCC_QSPI_FORCE_RESET __HAL_RCC_QUADSPI_FORCE_RESET -#define __HAL_RCC_QSPI_RELEASE_RESET __HAL_RCC_QUADSPI_RELEASE_RESET -#define __HAL_RCC_QSPI_IS_CLK_ENABLED __HAL_RCC_QUADSPI_IS_CLK_ENABLED -#define __HAL_RCC_QSPI_IS_CLK_DISABLED __HAL_RCC_QUADSPI_IS_CLK_DISABLED -#define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED -#define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED -#define QSPI_IRQHandler QUADSPI_IRQHandler -#endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */ - -#define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE -#define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE -#define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE -#define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE -#define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET -#define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET -#define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE -#define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE -#define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE -#define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE -#define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET -#define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET -#define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE -#define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE -#define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE -#define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE -#define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET -#define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET -#define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE -#define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE -#define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE -#define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE -#define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE -#define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE -#define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET -#define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET -#define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE -#define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE -#define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE -#define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE -#define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET -#define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET -#define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE -#define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE -#define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE -#define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE -#define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET -#define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET -#define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE -#define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE -#define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE -#define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE -#define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET -#define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET -#define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE -#define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE -#define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE -#define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE -#define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE -#define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE -#define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE -#define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE -#define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE -#define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE -#define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET -#define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET -#define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE -#define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE -#define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE -#define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE -#define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET -#define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET -#define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE -#define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE -#define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE -#define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE -#define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET -#define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET -#define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE -#define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE -#define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET -#define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET -#define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE -#define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE -#define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET -#define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET -#define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE -#define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE -#define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET -#define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET -#define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE -#define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE -#define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET -#define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET -#define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE -#define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE -#define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET -#define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET -#define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE -#define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE -#define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE -#define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE -#define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET -#define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET -#define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE -#define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE -#define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE -#define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE -#define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET -#define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET -#define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE -#define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE -#define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE -#define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE -#define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET -#define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET -#define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE -#define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE -#define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE -#define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE -#define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET -#define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET -#define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE -#define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE -#define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE -#define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE -#define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET -#define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET -#define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE -#define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE -#define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE -#define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE -#define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET -#define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET -#define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE -#define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE -#define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE -#define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE -#define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET -#define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET -#define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE -#define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE -#define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE -#define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE -#define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET -#define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET -#define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE -#define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE -#define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE -#define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE -#define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET -#define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET -#define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE -#define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE -#define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE -#define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE -#define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET -#define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET -#define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE -#define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE -#define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET -#define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET -#define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE -#define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE -#define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE -#define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE -#define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET -#define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET -#define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE -#define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE -#define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE -#define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE -#define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET -#define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET -#define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE -#define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE -#define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE -#define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE -#define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET -#define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET -#define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE -#define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE -#define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE -#define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE -#define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET -#define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET -#define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE -#define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE -#define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE -#define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE -#define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET -#define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET -#define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE -#define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE -#define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE -#define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE -#define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET -#define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET -#define __USART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE -#define __USART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE -#define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE -#define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE -#define __USART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET -#define __USART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET -#define __USART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE -#define __USART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE -#define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE -#define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE -#define __USART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET -#define __USART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET -#define __USART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE -#define __USART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE -#define __USART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET -#define __USART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET -#define __USART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE -#define __USART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE -#define __USART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET -#define __USART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET -#define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE -#define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE -#define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET -#define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE -#define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE -#define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE -#define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE -#define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET -#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE -#define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE -#define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE -#define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE -#define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET -#define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET -#define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE -#define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE -#define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET -#define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET -#define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE -#define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE -#define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE -#define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE -#define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET -#define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET -#define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE -#define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE -#define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE -#define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE -#define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE -#define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE -#define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET -#define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET -#define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE -#define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE - -#define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET -#define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET -#define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE -#define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE -#define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE -#define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE -#define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE -#define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE -#define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE -#define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE -#define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE -#define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE -#define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE -#define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE -#define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE -#define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE -#define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE -#define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE -#define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE -#define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET -#define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET -#define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE -#define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE -#define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE -#define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE -#define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE -#define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET -#define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET -#define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE -#define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE -#define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE -#define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE -#define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET -#define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET -#define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE -#define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE -#define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE -#define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE -#define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET -#define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET -#define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE -#define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE -#define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE -#define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE -#define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE -#define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE -#define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE -#define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE -#define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE -#define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE -#define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE -#define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE -#define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE -#define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE -#define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE -#define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE -#define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE -#define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE -#define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE -#define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE -#define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE -#define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET -#define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET -#define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE -#define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE -#define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE -#define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE -#define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET -#define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET -#define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE -#define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE -#define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE -#define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE -#define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET -#define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET -#define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE -#define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE -#define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE -#define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE -#define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET -#define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET -#define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE -#define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE -#define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE -#define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE -#define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET -#define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE -#define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE -#define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE -#define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE -#define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE -#define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE -#define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET -#define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET -#define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE -#define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE -#define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE -#define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE -#define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET -#define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET -#define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE -#define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE -#define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE -#define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE -#define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET -#define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET -#define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE -#define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE -#define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE -#define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE -#define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET -#define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET -#define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE -#define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE -#define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE -#define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE -#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED -#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED -#define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET -#define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET -#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE -#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE -#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED -#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED -#define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE -#define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE -#define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE -#define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE -#define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE -#define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE -#define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE -#define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE -#define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE -#define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET -#define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET -#define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE -#define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE -#define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET -#define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET -#define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE -#define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE -#define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE -#define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE -#define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET -#define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET -#define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE -#define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE - -/* alias define maintained for legacy */ -#define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET -#define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET - -#define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE -#define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE -#define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE -#define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE -#define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE -#define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE -#define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE -#define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE -#define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE -#define __TIM19_CLK_DISABLE __HAL_RCC_TIM19_CLK_DISABLE -#define __TIM20_CLK_ENABLE __HAL_RCC_TIM20_CLK_ENABLE -#define __TIM20_CLK_DISABLE __HAL_RCC_TIM20_CLK_DISABLE -#define __HRTIM1_CLK_ENABLE __HAL_RCC_HRTIM1_CLK_ENABLE -#define __HRTIM1_CLK_DISABLE __HAL_RCC_HRTIM1_CLK_DISABLE -#define __SDADC1_CLK_ENABLE __HAL_RCC_SDADC1_CLK_ENABLE -#define __SDADC2_CLK_ENABLE __HAL_RCC_SDADC2_CLK_ENABLE -#define __SDADC3_CLK_ENABLE __HAL_RCC_SDADC3_CLK_ENABLE -#define __SDADC1_CLK_DISABLE __HAL_RCC_SDADC1_CLK_DISABLE -#define __SDADC2_CLK_DISABLE __HAL_RCC_SDADC2_CLK_DISABLE -#define __SDADC3_CLK_DISABLE __HAL_RCC_SDADC3_CLK_DISABLE - -#define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET -#define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET -#define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET -#define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET -#define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET -#define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET -#define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET -#define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET -#define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET -#define __TIM19_RELEASE_RESET __HAL_RCC_TIM19_RELEASE_RESET -#define __TIM20_FORCE_RESET __HAL_RCC_TIM20_FORCE_RESET -#define __TIM20_RELEASE_RESET __HAL_RCC_TIM20_RELEASE_RESET -#define __HRTIM1_FORCE_RESET __HAL_RCC_HRTIM1_FORCE_RESET -#define __HRTIM1_RELEASE_RESET __HAL_RCC_HRTIM1_RELEASE_RESET -#define __SDADC1_FORCE_RESET __HAL_RCC_SDADC1_FORCE_RESET -#define __SDADC2_FORCE_RESET __HAL_RCC_SDADC2_FORCE_RESET -#define __SDADC3_FORCE_RESET __HAL_RCC_SDADC3_FORCE_RESET -#define __SDADC1_RELEASE_RESET __HAL_RCC_SDADC1_RELEASE_RESET -#define __SDADC2_RELEASE_RESET __HAL_RCC_SDADC2_RELEASE_RESET -#define __SDADC3_RELEASE_RESET __HAL_RCC_SDADC3_RELEASE_RESET - -#define __ADC1_IS_CLK_ENABLED __HAL_RCC_ADC1_IS_CLK_ENABLED -#define __ADC1_IS_CLK_DISABLED __HAL_RCC_ADC1_IS_CLK_DISABLED -#define __ADC12_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED -#define __ADC12_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED -#define __ADC34_IS_CLK_ENABLED __HAL_RCC_ADC34_IS_CLK_ENABLED -#define __ADC34_IS_CLK_DISABLED __HAL_RCC_ADC34_IS_CLK_DISABLED -#define __CEC_IS_CLK_ENABLED __HAL_RCC_CEC_IS_CLK_ENABLED -#define __CEC_IS_CLK_DISABLED __HAL_RCC_CEC_IS_CLK_DISABLED -#define __CRC_IS_CLK_ENABLED __HAL_RCC_CRC_IS_CLK_ENABLED -#define __CRC_IS_CLK_DISABLED __HAL_RCC_CRC_IS_CLK_DISABLED -#define __DAC1_IS_CLK_ENABLED __HAL_RCC_DAC1_IS_CLK_ENABLED -#define __DAC1_IS_CLK_DISABLED __HAL_RCC_DAC1_IS_CLK_DISABLED -#define __DAC2_IS_CLK_ENABLED __HAL_RCC_DAC2_IS_CLK_ENABLED -#define __DAC2_IS_CLK_DISABLED __HAL_RCC_DAC2_IS_CLK_DISABLED -#define __DMA1_IS_CLK_ENABLED __HAL_RCC_DMA1_IS_CLK_ENABLED -#define __DMA1_IS_CLK_DISABLED __HAL_RCC_DMA1_IS_CLK_DISABLED -#define __DMA2_IS_CLK_ENABLED __HAL_RCC_DMA2_IS_CLK_ENABLED -#define __DMA2_IS_CLK_DISABLED __HAL_RCC_DMA2_IS_CLK_DISABLED -#define __FLITF_IS_CLK_ENABLED __HAL_RCC_FLITF_IS_CLK_ENABLED -#define __FLITF_IS_CLK_DISABLED __HAL_RCC_FLITF_IS_CLK_DISABLED -#define __FMC_IS_CLK_ENABLED __HAL_RCC_FMC_IS_CLK_ENABLED -#define __FMC_IS_CLK_DISABLED __HAL_RCC_FMC_IS_CLK_DISABLED -#define __GPIOA_IS_CLK_ENABLED __HAL_RCC_GPIOA_IS_CLK_ENABLED -#define __GPIOA_IS_CLK_DISABLED __HAL_RCC_GPIOA_IS_CLK_DISABLED -#define __GPIOB_IS_CLK_ENABLED __HAL_RCC_GPIOB_IS_CLK_ENABLED -#define __GPIOB_IS_CLK_DISABLED __HAL_RCC_GPIOB_IS_CLK_DISABLED -#define __GPIOC_IS_CLK_ENABLED __HAL_RCC_GPIOC_IS_CLK_ENABLED -#define __GPIOC_IS_CLK_DISABLED __HAL_RCC_GPIOC_IS_CLK_DISABLED -#define __GPIOD_IS_CLK_ENABLED __HAL_RCC_GPIOD_IS_CLK_ENABLED -#define __GPIOD_IS_CLK_DISABLED __HAL_RCC_GPIOD_IS_CLK_DISABLED -#define __GPIOE_IS_CLK_ENABLED __HAL_RCC_GPIOE_IS_CLK_ENABLED -#define __GPIOE_IS_CLK_DISABLED __HAL_RCC_GPIOE_IS_CLK_DISABLED -#define __GPIOF_IS_CLK_ENABLED __HAL_RCC_GPIOF_IS_CLK_ENABLED -#define __GPIOF_IS_CLK_DISABLED __HAL_RCC_GPIOF_IS_CLK_DISABLED -#define __GPIOG_IS_CLK_ENABLED __HAL_RCC_GPIOG_IS_CLK_ENABLED -#define __GPIOG_IS_CLK_DISABLED __HAL_RCC_GPIOG_IS_CLK_DISABLED -#define __GPIOH_IS_CLK_ENABLED __HAL_RCC_GPIOH_IS_CLK_ENABLED -#define __GPIOH_IS_CLK_DISABLED __HAL_RCC_GPIOH_IS_CLK_DISABLED -#define __HRTIM1_IS_CLK_ENABLED __HAL_RCC_HRTIM1_IS_CLK_ENABLED -#define __HRTIM1_IS_CLK_DISABLED __HAL_RCC_HRTIM1_IS_CLK_DISABLED -#define __I2C1_IS_CLK_ENABLED __HAL_RCC_I2C1_IS_CLK_ENABLED -#define __I2C1_IS_CLK_DISABLED __HAL_RCC_I2C1_IS_CLK_DISABLED -#define __I2C2_IS_CLK_ENABLED __HAL_RCC_I2C2_IS_CLK_ENABLED -#define __I2C2_IS_CLK_DISABLED __HAL_RCC_I2C2_IS_CLK_DISABLED -#define __I2C3_IS_CLK_ENABLED __HAL_RCC_I2C3_IS_CLK_ENABLED -#define __I2C3_IS_CLK_DISABLED __HAL_RCC_I2C3_IS_CLK_DISABLED -#define __PWR_IS_CLK_ENABLED __HAL_RCC_PWR_IS_CLK_ENABLED -#define __PWR_IS_CLK_DISABLED __HAL_RCC_PWR_IS_CLK_DISABLED -#define __SYSCFG_IS_CLK_ENABLED __HAL_RCC_SYSCFG_IS_CLK_ENABLED -#define __SYSCFG_IS_CLK_DISABLED __HAL_RCC_SYSCFG_IS_CLK_DISABLED -#define __SPI1_IS_CLK_ENABLED __HAL_RCC_SPI1_IS_CLK_ENABLED -#define __SPI1_IS_CLK_DISABLED __HAL_RCC_SPI1_IS_CLK_DISABLED -#define __SPI2_IS_CLK_ENABLED __HAL_RCC_SPI2_IS_CLK_ENABLED -#define __SPI2_IS_CLK_DISABLED __HAL_RCC_SPI2_IS_CLK_DISABLED -#define __SPI3_IS_CLK_ENABLED __HAL_RCC_SPI3_IS_CLK_ENABLED -#define __SPI3_IS_CLK_DISABLED __HAL_RCC_SPI3_IS_CLK_DISABLED -#define __SPI4_IS_CLK_ENABLED __HAL_RCC_SPI4_IS_CLK_ENABLED -#define __SPI4_IS_CLK_DISABLED __HAL_RCC_SPI4_IS_CLK_DISABLED -#define __SDADC1_IS_CLK_ENABLED __HAL_RCC_SDADC1_IS_CLK_ENABLED -#define __SDADC1_IS_CLK_DISABLED __HAL_RCC_SDADC1_IS_CLK_DISABLED -#define __SDADC2_IS_CLK_ENABLED __HAL_RCC_SDADC2_IS_CLK_ENABLED -#define __SDADC2_IS_CLK_DISABLED __HAL_RCC_SDADC2_IS_CLK_DISABLED -#define __SDADC3_IS_CLK_ENABLED __HAL_RCC_SDADC3_IS_CLK_ENABLED -#define __SDADC3_IS_CLK_DISABLED __HAL_RCC_SDADC3_IS_CLK_DISABLED -#define __SRAM_IS_CLK_ENABLED __HAL_RCC_SRAM_IS_CLK_ENABLED -#define __SRAM_IS_CLK_DISABLED __HAL_RCC_SRAM_IS_CLK_DISABLED -#define __TIM1_IS_CLK_ENABLED __HAL_RCC_TIM1_IS_CLK_ENABLED -#define __TIM1_IS_CLK_DISABLED __HAL_RCC_TIM1_IS_CLK_DISABLED -#define __TIM2_IS_CLK_ENABLED __HAL_RCC_TIM2_IS_CLK_ENABLED -#define __TIM2_IS_CLK_DISABLED __HAL_RCC_TIM2_IS_CLK_DISABLED -#define __TIM3_IS_CLK_ENABLED __HAL_RCC_TIM3_IS_CLK_ENABLED -#define __TIM3_IS_CLK_DISABLED __HAL_RCC_TIM3_IS_CLK_DISABLED -#define __TIM4_IS_CLK_ENABLED __HAL_RCC_TIM4_IS_CLK_ENABLED -#define __TIM4_IS_CLK_DISABLED __HAL_RCC_TIM4_IS_CLK_DISABLED -#define __TIM5_IS_CLK_ENABLED __HAL_RCC_TIM5_IS_CLK_ENABLED -#define __TIM5_IS_CLK_DISABLED __HAL_RCC_TIM5_IS_CLK_DISABLED -#define __TIM6_IS_CLK_ENABLED __HAL_RCC_TIM6_IS_CLK_ENABLED -#define __TIM6_IS_CLK_DISABLED __HAL_RCC_TIM6_IS_CLK_DISABLED -#define __TIM7_IS_CLK_ENABLED __HAL_RCC_TIM7_IS_CLK_ENABLED -#define __TIM7_IS_CLK_DISABLED __HAL_RCC_TIM7_IS_CLK_DISABLED -#define __TIM8_IS_CLK_ENABLED __HAL_RCC_TIM8_IS_CLK_ENABLED -#define __TIM8_IS_CLK_DISABLED __HAL_RCC_TIM8_IS_CLK_DISABLED -#define __TIM12_IS_CLK_ENABLED __HAL_RCC_TIM12_IS_CLK_ENABLED -#define __TIM12_IS_CLK_DISABLED __HAL_RCC_TIM12_IS_CLK_DISABLED -#define __TIM13_IS_CLK_ENABLED __HAL_RCC_TIM13_IS_CLK_ENABLED -#define __TIM13_IS_CLK_DISABLED __HAL_RCC_TIM13_IS_CLK_DISABLED -#define __TIM14_IS_CLK_ENABLED __HAL_RCC_TIM14_IS_CLK_ENABLED -#define __TIM14_IS_CLK_DISABLED __HAL_RCC_TIM14_IS_CLK_DISABLED -#define __TIM15_IS_CLK_ENABLED __HAL_RCC_TIM15_IS_CLK_ENABLED -#define __TIM15_IS_CLK_DISABLED __HAL_RCC_TIM15_IS_CLK_DISABLED -#define __TIM16_IS_CLK_ENABLED __HAL_RCC_TIM16_IS_CLK_ENABLED -#define __TIM16_IS_CLK_DISABLED __HAL_RCC_TIM16_IS_CLK_DISABLED -#define __TIM17_IS_CLK_ENABLED __HAL_RCC_TIM17_IS_CLK_ENABLED -#define __TIM17_IS_CLK_DISABLED __HAL_RCC_TIM17_IS_CLK_DISABLED -#define __TIM18_IS_CLK_ENABLED __HAL_RCC_TIM18_IS_CLK_ENABLED -#define __TIM18_IS_CLK_DISABLED __HAL_RCC_TIM18_IS_CLK_DISABLED -#define __TIM19_IS_CLK_ENABLED __HAL_RCC_TIM19_IS_CLK_ENABLED -#define __TIM19_IS_CLK_DISABLED __HAL_RCC_TIM19_IS_CLK_DISABLED -#define __TIM20_IS_CLK_ENABLED __HAL_RCC_TIM20_IS_CLK_ENABLED -#define __TIM20_IS_CLK_DISABLED __HAL_RCC_TIM20_IS_CLK_DISABLED -#define __TSC_IS_CLK_ENABLED __HAL_RCC_TSC_IS_CLK_ENABLED -#define __TSC_IS_CLK_DISABLED __HAL_RCC_TSC_IS_CLK_DISABLED -#define __UART4_IS_CLK_ENABLED __HAL_RCC_UART4_IS_CLK_ENABLED -#define __UART4_IS_CLK_DISABLED __HAL_RCC_UART4_IS_CLK_DISABLED -#define __UART5_IS_CLK_ENABLED __HAL_RCC_UART5_IS_CLK_ENABLED -#define __UART5_IS_CLK_DISABLED __HAL_RCC_UART5_IS_CLK_DISABLED -#define __USART1_IS_CLK_ENABLED __HAL_RCC_USART1_IS_CLK_ENABLED -#define __USART1_IS_CLK_DISABLED __HAL_RCC_USART1_IS_CLK_DISABLED -#define __USART2_IS_CLK_ENABLED __HAL_RCC_USART2_IS_CLK_ENABLED -#define __USART2_IS_CLK_DISABLED __HAL_RCC_USART2_IS_CLK_DISABLED -#define __USART3_IS_CLK_ENABLED __HAL_RCC_USART3_IS_CLK_ENABLED -#define __USART3_IS_CLK_DISABLED __HAL_RCC_USART3_IS_CLK_DISABLED -#define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED -#define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED -#define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED -#define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED - -#if defined(STM32F4) -#define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET -#define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET -#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE -#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE -#define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE -#define __HAL_RCC_SDMMC1_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE -#define __HAL_RCC_SDMMC1_IS_CLK_ENABLED __HAL_RCC_SDIO_IS_CLK_ENABLED -#define __HAL_RCC_SDMMC1_IS_CLK_DISABLED __HAL_RCC_SDIO_IS_CLK_DISABLED -#define Sdmmc1ClockSelection SdioClockSelection -#define RCC_PERIPHCLK_SDMMC1 RCC_PERIPHCLK_SDIO -#define RCC_SDMMC1CLKSOURCE_CLK48 RCC_SDIOCLKSOURCE_CK48 -#define RCC_SDMMC1CLKSOURCE_SYSCLK RCC_SDIOCLKSOURCE_SYSCLK -#define __HAL_RCC_SDMMC1_CONFIG __HAL_RCC_SDIO_CONFIG -#define __HAL_RCC_GET_SDMMC1_SOURCE __HAL_RCC_GET_SDIO_SOURCE -#endif - -#if defined(STM32F7) || defined(STM32L4) -#define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET -#define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET -#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE -#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE -#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE -#define __HAL_RCC_SDIO_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE -#define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED -#define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED -#define SdioClockSelection Sdmmc1ClockSelection -#define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1 -#define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG -#define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE -#endif - -#if defined(STM32F7) -#define RCC_SDIOCLKSOURCE_CLK48 RCC_SDMMC1CLKSOURCE_CLK48 -#define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK -#endif - -#if defined(STM32H7) -#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_ENABLE() -#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE() -#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_DISABLE() -#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_DISABLE() -#define __HAL_RCC_USB_OTG_HS_FORCE_RESET() __HAL_RCC_USB1_OTG_HS_FORCE_RESET() -#define __HAL_RCC_USB_OTG_HS_RELEASE_RESET() __HAL_RCC_USB1_OTG_HS_RELEASE_RESET() -#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_ENABLE() -#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_ENABLE() -#define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_DISABLE() -#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE() - -#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_ENABLE() -#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_ENABLE() -#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_DISABLE() -#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_DISABLE() -#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() __HAL_RCC_USB2_OTG_FS_FORCE_RESET() -#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() __HAL_RCC_USB2_OTG_FS_RELEASE_RESET() -#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_ENABLE() -#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE() -#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE() -#define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE() -#endif - -#define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG -#define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG - -#define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE - -#define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE -#define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE -#define IS_RCC_SYSCLK_DIV IS_RCC_HCLK -#define IS_RCC_HCLK_DIV IS_RCC_PCLK -#define IS_RCC_PERIPHCLK IS_RCC_PERIPHCLOCK - -#define RCC_IT_HSI14 RCC_IT_HSI14RDY - -#define RCC_IT_CSSLSE RCC_IT_LSECSS -#define RCC_IT_CSSHSE RCC_IT_CSS - -#define RCC_PLLMUL_3 RCC_PLL_MUL3 -#define RCC_PLLMUL_4 RCC_PLL_MUL4 -#define RCC_PLLMUL_6 RCC_PLL_MUL6 -#define RCC_PLLMUL_8 RCC_PLL_MUL8 -#define RCC_PLLMUL_12 RCC_PLL_MUL12 -#define RCC_PLLMUL_16 RCC_PLL_MUL16 -#define RCC_PLLMUL_24 RCC_PLL_MUL24 -#define RCC_PLLMUL_32 RCC_PLL_MUL32 -#define RCC_PLLMUL_48 RCC_PLL_MUL48 - -#define RCC_PLLDIV_2 RCC_PLL_DIV2 -#define RCC_PLLDIV_3 RCC_PLL_DIV3 -#define RCC_PLLDIV_4 RCC_PLL_DIV4 - -#define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE -#define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG -#define RCC_MCO_NODIV RCC_MCODIV_1 -#define RCC_MCO_DIV1 RCC_MCODIV_1 -#define RCC_MCO_DIV2 RCC_MCODIV_2 -#define RCC_MCO_DIV4 RCC_MCODIV_4 -#define RCC_MCO_DIV8 RCC_MCODIV_8 -#define RCC_MCO_DIV16 RCC_MCODIV_16 -#define RCC_MCO_DIV32 RCC_MCODIV_32 -#define RCC_MCO_DIV64 RCC_MCODIV_64 -#define RCC_MCO_DIV128 RCC_MCODIV_128 -#define RCC_MCOSOURCE_NONE RCC_MCO1SOURCE_NOCLOCK -#define RCC_MCOSOURCE_LSI RCC_MCO1SOURCE_LSI -#define RCC_MCOSOURCE_LSE RCC_MCO1SOURCE_LSE -#define RCC_MCOSOURCE_SYSCLK RCC_MCO1SOURCE_SYSCLK -#define RCC_MCOSOURCE_HSI RCC_MCO1SOURCE_HSI -#define RCC_MCOSOURCE_HSI14 RCC_MCO1SOURCE_HSI14 -#define RCC_MCOSOURCE_HSI48 RCC_MCO1SOURCE_HSI48 -#define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE -#define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK -#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK -#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2 - -#if defined(STM32L4) -#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE -#elif defined(STM32WB) || defined(STM32G0) -#else -#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK -#endif - -#define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1 -#define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL -#define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI -#define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL -#define RCC_USBPLLCLK_DIV1 RCC_USBCLKSOURCE_PLL -#define RCC_USBPLLCLK_DIV1_5 RCC_USBCLKSOURCE_PLL_DIV1_5 -#define RCC_USBPLLCLK_DIV2 RCC_USBCLKSOURCE_PLL_DIV2 -#define RCC_USBPLLCLK_DIV3 RCC_USBCLKSOURCE_PLL_DIV3 - -#define HSION_BitNumber RCC_HSION_BIT_NUMBER -#define HSION_BITNUMBER RCC_HSION_BIT_NUMBER -#define HSEON_BitNumber RCC_HSEON_BIT_NUMBER -#define HSEON_BITNUMBER RCC_HSEON_BIT_NUMBER -#define MSION_BITNUMBER RCC_MSION_BIT_NUMBER -#define CSSON_BitNumber RCC_CSSON_BIT_NUMBER -#define CSSON_BITNUMBER RCC_CSSON_BIT_NUMBER -#define PLLON_BitNumber RCC_PLLON_BIT_NUMBER -#define PLLON_BITNUMBER RCC_PLLON_BIT_NUMBER -#define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER -#define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER -#define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER -#define RTCEN_BITNUMBER RCC_RTCEN_BIT_NUMBER -#define BDRST_BitNumber RCC_BDRST_BIT_NUMBER -#define BDRST_BITNUMBER RCC_BDRST_BIT_NUMBER -#define RTCRST_BITNUMBER RCC_RTCRST_BIT_NUMBER -#define LSION_BitNumber RCC_LSION_BIT_NUMBER -#define LSION_BITNUMBER RCC_LSION_BIT_NUMBER -#define LSEON_BitNumber RCC_LSEON_BIT_NUMBER -#define LSEON_BITNUMBER RCC_LSEON_BIT_NUMBER -#define LSEBYP_BITNUMBER RCC_LSEBYP_BIT_NUMBER -#define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER -#define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER -#define RMVF_BitNumber RCC_RMVF_BIT_NUMBER -#define RMVF_BITNUMBER RCC_RMVF_BIT_NUMBER -#define RCC_CR2_HSI14TRIM_BitNumber RCC_HSI14TRIM_BIT_NUMBER -#define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS -#define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS -#define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS -#define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS -#define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE -#define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE - -#define CR_HSION_BB RCC_CR_HSION_BB -#define CR_CSSON_BB RCC_CR_CSSON_BB -#define CR_PLLON_BB RCC_CR_PLLON_BB -#define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB -#define CR_MSION_BB RCC_CR_MSION_BB -#define CSR_LSION_BB RCC_CSR_LSION_BB -#define CSR_LSEON_BB RCC_CSR_LSEON_BB -#define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB -#define CSR_RTCEN_BB RCC_CSR_RTCEN_BB -#define CSR_RTCRST_BB RCC_CSR_RTCRST_BB -#define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB -#define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB -#define BDCR_BDRST_BB RCC_BDCR_BDRST_BB -#define CR_HSEON_BB RCC_CR_HSEON_BB -#define CSR_RMVF_BB RCC_CSR_RMVF_BB -#define CR_PLLSAION_BB RCC_CR_PLLSAION_BB -#define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB - -#define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE -#define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE -#define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE -#define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE -#define __HAL_RCC_CRS_CALCULATE_RELOADVALUE __HAL_RCC_CRS_RELOADVALUE_CALCULATE - -#define __HAL_RCC_GET_IT_SOURCE __HAL_RCC_GET_IT - -#define RCC_CRS_SYNCWARM RCC_CRS_SYNCWARN -#define RCC_CRS_TRIMOV RCC_CRS_TRIMOVF - -#define RCC_PERIPHCLK_CK48 RCC_PERIPHCLK_CLK48 -#define RCC_CK48CLKSOURCE_PLLQ RCC_CLK48CLKSOURCE_PLLQ -#define RCC_CK48CLKSOURCE_PLLSAIP RCC_CLK48CLKSOURCE_PLLSAIP -#define RCC_CK48CLKSOURCE_PLLI2SQ RCC_CLK48CLKSOURCE_PLLI2SQ -#define IS_RCC_CK48CLKSOURCE IS_RCC_CLK48CLKSOURCE -#define RCC_SDIOCLKSOURCE_CK48 RCC_SDIOCLKSOURCE_CLK48 - -#define __HAL_RCC_DFSDM_CLK_ENABLE __HAL_RCC_DFSDM1_CLK_ENABLE -#define __HAL_RCC_DFSDM_CLK_DISABLE __HAL_RCC_DFSDM1_CLK_DISABLE -#define __HAL_RCC_DFSDM_IS_CLK_ENABLED __HAL_RCC_DFSDM1_IS_CLK_ENABLED -#define __HAL_RCC_DFSDM_IS_CLK_DISABLED __HAL_RCC_DFSDM1_IS_CLK_DISABLED -#define __HAL_RCC_DFSDM_FORCE_RESET __HAL_RCC_DFSDM1_FORCE_RESET -#define __HAL_RCC_DFSDM_RELEASE_RESET __HAL_RCC_DFSDM1_RELEASE_RESET -#define __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE -#define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE -#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED -#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED -#define DfsdmClockSelection Dfsdm1ClockSelection -#define RCC_PERIPHCLK_DFSDM RCC_PERIPHCLK_DFSDM1 -#define RCC_DFSDMCLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 -#define RCC_DFSDMCLKSOURCE_SYSCLK RCC_DFSDM1CLKSOURCE_SYSCLK -#define __HAL_RCC_DFSDM_CONFIG __HAL_RCC_DFSDM1_CONFIG -#define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE -#define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 -#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1 -#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1 -#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1 - -#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1 -#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2 -#define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM2AUDIOCLKSOURCE_I2S1 -#define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM2AUDIOCLKSOURCE_I2S2 -#define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2 -#define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2 -#define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1 - -/** - * @} - */ - -/** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose - * @{ - */ -#define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit) - -/** - * @} - */ - -/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose - * @{ - */ -#if defined (STM32G0) -#else -#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG -#endif -#define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT -#define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT - -#if defined (STM32F1) -#define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() - -#define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT() - -#define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT() - -#define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG() - -#define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() -#else -#define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \ - (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG())) -#define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \ - (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT())) -#define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \ - (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT())) -#define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \ - (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG())) -#define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \ - (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT())) -#endif /* STM32F1 */ - -#define IS_ALARM IS_RTC_ALARM -#define IS_ALARM_MASK IS_RTC_ALARM_MASK -#define IS_TAMPER IS_RTC_TAMPER -#define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE -#define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER -#define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT -#define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE -#define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION -#define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE -#define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ -#define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION -#define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER -#define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK -#define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER - -#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE -#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE - -/** - * @} - */ - -/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose - * @{ - */ - -#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE -#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS - -#if defined(STM32F4) || defined(STM32F2) -#define SD_SDMMC_DISABLED SD_SDIO_DISABLED -#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY -#define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED -#define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION -#define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND -#define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT -#define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED -#define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE -#define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE -#define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE -#define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL -#define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT -#define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT -#define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG -#define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG -#define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT -#define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT -#define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS -#define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT -#define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND -/* alias CMSIS */ -#define SDMMC1_IRQn SDIO_IRQn -#define SDMMC1_IRQHandler SDIO_IRQHandler -#endif - -#if defined(STM32F7) || defined(STM32L4) -#define SD_SDIO_DISABLED SD_SDMMC_DISABLED -#define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY -#define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED -#define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION -#define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND -#define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT -#define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED -#define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE -#define __HAL_SD_SDIO_DISABLE __HAL_SD_SDMMC_DISABLE -#define __HAL_SD_SDIO_DMA_ENABLE __HAL_SD_SDMMC_DMA_ENABLE -#define __HAL_SD_SDIO_DMA_DISABL __HAL_SD_SDMMC_DMA_DISABLE -#define __HAL_SD_SDIO_ENABLE_IT __HAL_SD_SDMMC_ENABLE_IT -#define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT -#define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG -#define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG -#define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT -#define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT -#define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS -#define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT -#define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND -/* alias CMSIS for compatibilities */ -#define SDIO_IRQn SDMMC1_IRQn -#define SDIO_IRQHandler SDMMC1_IRQHandler -#endif - -#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) -#define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef -#define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef -#define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef -#define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef -#endif - -#if defined(STM32H7) -#define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback HAL_MMCEx_Read_DMADoubleBuf0CpltCallback -#define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback HAL_MMCEx_Read_DMADoubleBuf1CpltCallback -#define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback HAL_MMCEx_Write_DMADoubleBuf0CpltCallback -#define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback HAL_MMCEx_Write_DMADoubleBuf1CpltCallback -#define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback HAL_SDEx_Read_DMADoubleBuf0CpltCallback -#define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback HAL_SDEx_Read_DMADoubleBuf1CpltCallback -#define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback HAL_SDEx_Write_DMADoubleBuf0CpltCallback -#define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback HAL_SDEx_Write_DMADoubleBuf1CpltCallback -#endif -/** - * @} - */ - -/** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT -#define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT -#define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE -#define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE -#define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE -#define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE - -#define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE -#define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE - -#define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE - -/** - * @} - */ - -/** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1 -#define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2 -#define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START -#define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH -#define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR -#define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE -#define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE -#define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED -/** - * @} - */ - -/** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __HAL_SPI_1LINE_TX SPI_1LINE_TX -#define __HAL_SPI_1LINE_RX SPI_1LINE_RX -#define __HAL_SPI_RESET_CRC SPI_RESET_CRC - -/** - * @} - */ - -/** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE -#define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION -#define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE -#define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION - -#define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD - -#define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE -#define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE - -/** - * @} - */ - - -/** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __USART_ENABLE_IT __HAL_USART_ENABLE_IT -#define __USART_DISABLE_IT __HAL_USART_DISABLE_IT -#define __USART_ENABLE __HAL_USART_ENABLE -#define __USART_DISABLE __HAL_USART_DISABLE - -#define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE -#define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE - -/** - * @} - */ - -/** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose - * @{ - */ -#define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE - -#define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE -#define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE -#define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE -#define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE - -#define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE -#define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE -#define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE -#define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE - -#define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT -#define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT -#define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG -#define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG -#define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE -#define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE -#define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE - -#define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT -#define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT -#define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG -#define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG -#define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE -#define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE -#define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE -#define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT - -#define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT -#define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT -#define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG -#define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG -#define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE -#define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE -#define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE -#define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT - -#define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup -#define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup - -#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo -#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo -/** - * @} - */ - -/** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE -#define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE - -#define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE -#define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT - -#define __HAL_TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE - -#define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN -#define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER -#define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER -#define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER -#define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD -#define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD -#define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION -#define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION -#define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER -#define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER -#define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE -#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE - -#define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1 -/** - * @} - */ - -/** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose - * @{ - */ - -#define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT -#define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT -#define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG -#define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG -#define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER -#define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER -#define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER - -#define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE -#define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE -#define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE -/** - * @} - */ - -/** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose - * @{ - */ -#define __HAL_LTDC_LAYER LTDC_LAYER -#define __HAL_LTDC_RELOAD_CONFIG __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG -/** - * @} - */ - -/** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose - * @{ - */ -#define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE -#define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE -#define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE -#define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE -#define SAI_STREOMODE SAI_STEREOMODE -#define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY -#define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL -#define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL -#define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL -#define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL -#define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL -#define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE -#define SAI_SYNCHRONOUS_EXT SAI_SYNCHRONOUS_EXT_SAI1 -#define SAI_SYNCEXT_IN_ENABLE SAI_SYNCEXT_OUTBLOCKA_ENABLE -/** - * @} - */ - -/** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose - * @{ - */ -#if defined(STM32H7) -#define HAL_SPDIFRX_ReceiveControlFlow HAL_SPDIFRX_ReceiveCtrlFlow -#define HAL_SPDIFRX_ReceiveControlFlow_IT HAL_SPDIFRX_ReceiveCtrlFlow_IT -#define HAL_SPDIFRX_ReceiveControlFlow_DMA HAL_SPDIFRX_ReceiveCtrlFlow_DMA -#endif -/** - * @} - */ - -/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose - * @{ - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* ___STM32_HAL_LEGACY */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h deleted file mode 100644 index 3b3c147e..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h +++ /dev/null @@ -1,669 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal.h - * @author MCD Application Team - * @brief This file contains all the functions prototypes for the HAL - * module driver. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_H -#define __STM32L4xx_HAL_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_conf.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup HAL - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants - * @{ - */ - -/** @defgroup SYSCFG_BootMode Boot Mode - * @{ - */ -#define SYSCFG_BOOT_MAINFLASH ((uint32_t)0x00000000) -#define SYSCFG_BOOT_SYSTEMFLASH SYSCFG_MEMRMP_MEM_MODE_0 - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define SYSCFG_BOOT_FMC SYSCFG_MEMRMP_MEM_MODE_1 -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#define SYSCFG_BOOT_SRAM (SYSCFG_MEMRMP_MEM_MODE_1 | SYSCFG_MEMRMP_MEM_MODE_0) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define SYSCFG_BOOT_OCTOPSPI1 (SYSCFG_MEMRMP_MEM_MODE_2) -#define SYSCFG_BOOT_OCTOPSPI2 (SYSCFG_MEMRMP_MEM_MODE_2 | SYSCFG_MEMRMP_MEM_MODE_0) -#else -#define SYSCFG_BOOT_QUADSPI (SYSCFG_MEMRMP_MEM_MODE_2 | SYSCFG_MEMRMP_MEM_MODE_1) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** - * @} - */ - -/** @defgroup SYSCFG_FPU_Interrupts FPU Interrupts - * @{ - */ -#define SYSCFG_IT_FPU_IOC SYSCFG_CFGR1_FPU_IE_0 /*!< Floating Point Unit Invalid operation Interrupt */ -#define SYSCFG_IT_FPU_DZC SYSCFG_CFGR1_FPU_IE_1 /*!< Floating Point Unit Divide-by-zero Interrupt */ -#define SYSCFG_IT_FPU_UFC SYSCFG_CFGR1_FPU_IE_2 /*!< Floating Point Unit Underflow Interrupt */ -#define SYSCFG_IT_FPU_OFC SYSCFG_CFGR1_FPU_IE_3 /*!< Floating Point Unit Overflow Interrupt */ -#define SYSCFG_IT_FPU_IDC SYSCFG_CFGR1_FPU_IE_4 /*!< Floating Point Unit Input denormal Interrupt */ -#define SYSCFG_IT_FPU_IXC SYSCFG_CFGR1_FPU_IE_5 /*!< Floating Point Unit Inexact Interrupt */ - -/** - * @} - */ - -/** @defgroup SYSCFG_SRAM2WRP SRAM2 Page Write protection (0 to 31) - * @{ - */ -#define SYSCFG_SRAM2WRP_PAGE0 SYSCFG_SWPR_PAGE0 /*!< SRAM2 Write protection page 0 */ -#define SYSCFG_SRAM2WRP_PAGE1 SYSCFG_SWPR_PAGE1 /*!< SRAM2 Write protection page 1 */ -#define SYSCFG_SRAM2WRP_PAGE2 SYSCFG_SWPR_PAGE2 /*!< SRAM2 Write protection page 2 */ -#define SYSCFG_SRAM2WRP_PAGE3 SYSCFG_SWPR_PAGE3 /*!< SRAM2 Write protection page 3 */ -#define SYSCFG_SRAM2WRP_PAGE4 SYSCFG_SWPR_PAGE4 /*!< SRAM2 Write protection page 4 */ -#define SYSCFG_SRAM2WRP_PAGE5 SYSCFG_SWPR_PAGE5 /*!< SRAM2 Write protection page 5 */ -#define SYSCFG_SRAM2WRP_PAGE6 SYSCFG_SWPR_PAGE6 /*!< SRAM2 Write protection page 6 */ -#define SYSCFG_SRAM2WRP_PAGE7 SYSCFG_SWPR_PAGE7 /*!< SRAM2 Write protection page 7 */ -#define SYSCFG_SRAM2WRP_PAGE8 SYSCFG_SWPR_PAGE8 /*!< SRAM2 Write protection page 8 */ -#define SYSCFG_SRAM2WRP_PAGE9 SYSCFG_SWPR_PAGE9 /*!< SRAM2 Write protection page 9 */ -#define SYSCFG_SRAM2WRP_PAGE10 SYSCFG_SWPR_PAGE10 /*!< SRAM2 Write protection page 10 */ -#define SYSCFG_SRAM2WRP_PAGE11 SYSCFG_SWPR_PAGE11 /*!< SRAM2 Write protection page 11 */ -#define SYSCFG_SRAM2WRP_PAGE12 SYSCFG_SWPR_PAGE12 /*!< SRAM2 Write protection page 12 */ -#define SYSCFG_SRAM2WRP_PAGE13 SYSCFG_SWPR_PAGE13 /*!< SRAM2 Write protection page 13 */ -#define SYSCFG_SRAM2WRP_PAGE14 SYSCFG_SWPR_PAGE14 /*!< SRAM2 Write protection page 14 */ -#define SYSCFG_SRAM2WRP_PAGE15 SYSCFG_SWPR_PAGE15 /*!< SRAM2 Write protection page 15 */ -#if defined(SYSCFG_SWPR_PAGE31) -#define SYSCFG_SRAM2WRP_PAGE16 SYSCFG_SWPR_PAGE16 /*!< SRAM2 Write protection page 16 */ -#define SYSCFG_SRAM2WRP_PAGE17 SYSCFG_SWPR_PAGE17 /*!< SRAM2 Write protection page 17 */ -#define SYSCFG_SRAM2WRP_PAGE18 SYSCFG_SWPR_PAGE18 /*!< SRAM2 Write protection page 18 */ -#define SYSCFG_SRAM2WRP_PAGE19 SYSCFG_SWPR_PAGE19 /*!< SRAM2 Write protection page 19 */ -#define SYSCFG_SRAM2WRP_PAGE20 SYSCFG_SWPR_PAGE20 /*!< SRAM2 Write protection page 20 */ -#define SYSCFG_SRAM2WRP_PAGE21 SYSCFG_SWPR_PAGE21 /*!< SRAM2 Write protection page 21 */ -#define SYSCFG_SRAM2WRP_PAGE22 SYSCFG_SWPR_PAGE22 /*!< SRAM2 Write protection page 22 */ -#define SYSCFG_SRAM2WRP_PAGE23 SYSCFG_SWPR_PAGE23 /*!< SRAM2 Write protection page 23 */ -#define SYSCFG_SRAM2WRP_PAGE24 SYSCFG_SWPR_PAGE24 /*!< SRAM2 Write protection page 24 */ -#define SYSCFG_SRAM2WRP_PAGE25 SYSCFG_SWPR_PAGE25 /*!< SRAM2 Write protection page 25 */ -#define SYSCFG_SRAM2WRP_PAGE26 SYSCFG_SWPR_PAGE26 /*!< SRAM2 Write protection page 26 */ -#define SYSCFG_SRAM2WRP_PAGE27 SYSCFG_SWPR_PAGE27 /*!< SRAM2 Write protection page 27 */ -#define SYSCFG_SRAM2WRP_PAGE28 SYSCFG_SWPR_PAGE28 /*!< SRAM2 Write protection page 28 */ -#define SYSCFG_SRAM2WRP_PAGE29 SYSCFG_SWPR_PAGE29 /*!< SRAM2 Write protection page 29 */ -#define SYSCFG_SRAM2WRP_PAGE30 SYSCFG_SWPR_PAGE30 /*!< SRAM2 Write protection page 30 */ -#define SYSCFG_SRAM2WRP_PAGE31 SYSCFG_SWPR_PAGE31 /*!< SRAM2 Write protection page 31 */ -#endif /* SYSCFG_SWPR_PAGE31 */ - -/** - * @} - */ - -#if defined(SYSCFG_SWPR2_PAGE63) -/** @defgroup SYSCFG_SRAM2WRP_32_63 SRAM2 Page Write protection (32 to 63) - * @{ - */ -#define SYSCFG_SRAM2WRP_PAGE32 SYSCFG_SWPR2_PAGE32 /*!< SRAM2 Write protection page 32 */ -#define SYSCFG_SRAM2WRP_PAGE33 SYSCFG_SWPR2_PAGE33 /*!< SRAM2 Write protection page 33 */ -#define SYSCFG_SRAM2WRP_PAGE34 SYSCFG_SWPR2_PAGE34 /*!< SRAM2 Write protection page 34 */ -#define SYSCFG_SRAM2WRP_PAGE35 SYSCFG_SWPR2_PAGE35 /*!< SRAM2 Write protection page 35 */ -#define SYSCFG_SRAM2WRP_PAGE36 SYSCFG_SWPR2_PAGE36 /*!< SRAM2 Write protection page 36 */ -#define SYSCFG_SRAM2WRP_PAGE37 SYSCFG_SWPR2_PAGE37 /*!< SRAM2 Write protection page 37 */ -#define SYSCFG_SRAM2WRP_PAGE38 SYSCFG_SWPR2_PAGE38 /*!< SRAM2 Write protection page 38 */ -#define SYSCFG_SRAM2WRP_PAGE39 SYSCFG_SWPR2_PAGE39 /*!< SRAM2 Write protection page 39 */ -#define SYSCFG_SRAM2WRP_PAGE40 SYSCFG_SWPR2_PAGE40 /*!< SRAM2 Write protection page 40 */ -#define SYSCFG_SRAM2WRP_PAGE41 SYSCFG_SWPR2_PAGE41 /*!< SRAM2 Write protection page 41 */ -#define SYSCFG_SRAM2WRP_PAGE42 SYSCFG_SWPR2_PAGE42 /*!< SRAM2 Write protection page 42 */ -#define SYSCFG_SRAM2WRP_PAGE43 SYSCFG_SWPR2_PAGE43 /*!< SRAM2 Write protection page 43 */ -#define SYSCFG_SRAM2WRP_PAGE44 SYSCFG_SWPR2_PAGE44 /*!< SRAM2 Write protection page 44 */ -#define SYSCFG_SRAM2WRP_PAGE45 SYSCFG_SWPR2_PAGE45 /*!< SRAM2 Write protection page 45 */ -#define SYSCFG_SRAM2WRP_PAGE46 SYSCFG_SWPR2_PAGE46 /*!< SRAM2 Write protection page 46 */ -#define SYSCFG_SRAM2WRP_PAGE47 SYSCFG_SWPR2_PAGE47 /*!< SRAM2 Write protection page 47 */ -#define SYSCFG_SRAM2WRP_PAGE48 SYSCFG_SWPR2_PAGE48 /*!< SRAM2 Write protection page 48 */ -#define SYSCFG_SRAM2WRP_PAGE49 SYSCFG_SWPR2_PAGE49 /*!< SRAM2 Write protection page 49 */ -#define SYSCFG_SRAM2WRP_PAGE50 SYSCFG_SWPR2_PAGE50 /*!< SRAM2 Write protection page 50 */ -#define SYSCFG_SRAM2WRP_PAGE51 SYSCFG_SWPR2_PAGE51 /*!< SRAM2 Write protection page 51 */ -#define SYSCFG_SRAM2WRP_PAGE52 SYSCFG_SWPR2_PAGE52 /*!< SRAM2 Write protection page 52 */ -#define SYSCFG_SRAM2WRP_PAGE53 SYSCFG_SWPR2_PAGE53 /*!< SRAM2 Write protection page 53 */ -#define SYSCFG_SRAM2WRP_PAGE54 SYSCFG_SWPR2_PAGE54 /*!< SRAM2 Write protection page 54 */ -#define SYSCFG_SRAM2WRP_PAGE55 SYSCFG_SWPR2_PAGE55 /*!< SRAM2 Write protection page 55 */ -#define SYSCFG_SRAM2WRP_PAGE56 SYSCFG_SWPR2_PAGE56 /*!< SRAM2 Write protection page 56 */ -#define SYSCFG_SRAM2WRP_PAGE57 SYSCFG_SWPR2_PAGE57 /*!< SRAM2 Write protection page 57 */ -#define SYSCFG_SRAM2WRP_PAGE58 SYSCFG_SWPR2_PAGE58 /*!< SRAM2 Write protection page 58 */ -#define SYSCFG_SRAM2WRP_PAGE59 SYSCFG_SWPR2_PAGE59 /*!< SRAM2 Write protection page 59 */ -#define SYSCFG_SRAM2WRP_PAGE60 SYSCFG_SWPR2_PAGE60 /*!< SRAM2 Write protection page 60 */ -#define SYSCFG_SRAM2WRP_PAGE61 SYSCFG_SWPR2_PAGE61 /*!< SRAM2 Write protection page 61 */ -#define SYSCFG_SRAM2WRP_PAGE62 SYSCFG_SWPR2_PAGE62 /*!< SRAM2 Write protection page 62 */ -#define SYSCFG_SRAM2WRP_PAGE63 SYSCFG_SWPR2_PAGE63 /*!< SRAM2 Write protection page 63 */ - -/** - * @} - */ -#endif /* SYSCFG_SWPR2_PAGE63 */ - -#if defined(VREFBUF) -/** @defgroup SYSCFG_VREFBUF_VoltageScale VREFBUF Voltage Scale - * @{ - */ -#define SYSCFG_VREFBUF_VOLTAGE_SCALE0 ((uint32_t)0x00000000) /*!< Voltage reference scale 0 (VREF_OUT1) */ -#define SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS /*!< Voltage reference scale 1 (VREF_OUT2) */ - -/** - * @} - */ - -/** @defgroup SYSCFG_VREFBUF_HighImpedance VREFBUF High Impedance - * @{ - */ -#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE ((uint32_t)0x00000000) /*!< VREF_plus pin is internally connected to Voltage reference buffer output */ -#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_CSR_HIZ /*!< VREF_plus pin is high impedance */ - -/** - * @} - */ -#endif /* VREFBUF */ - -/** @defgroup SYSCFG_flags_definition Flags - * @{ - */ - -#define SYSCFG_FLAG_SRAM2_PE SYSCFG_CFGR2_SPF /*!< SRAM2 parity error */ -#define SYSCFG_FLAG_SRAM2_BUSY SYSCFG_SCSR_SRAM2BSY /*!< SRAM2 busy by erase operation */ - -/** - * @} - */ - -/** @defgroup SYSCFG_FastModePlus_GPIO Fast-mode Plus on GPIO - * @{ - */ - -/** @brief Fast-mode Plus driving capability on a specific GPIO - */ -#define SYSCFG_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast-mode Plus on PB6 */ -#define SYSCFG_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast-mode Plus on PB7 */ -#if defined(SYSCFG_CFGR1_I2C_PB8_FMP) -#define SYSCFG_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast-mode Plus on PB8 */ -#endif /* SYSCFG_CFGR1_I2C_PB8_FMP */ -#if defined(SYSCFG_CFGR1_I2C_PB9_FMP) -#define SYSCFG_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast-mode Plus on PB9 */ -#endif /* SYSCFG_CFGR1_I2C_PB9_FMP */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ - -/** @defgroup DBGMCU_Exported_Macros DBGMCU Exported Macros - * @{ - */ - -/** @brief Freeze/Unfreeze Peripherals in Debug mode - */ -#if defined(DBGMCU_APB1FZR1_DBG_TIM2_STOP) -#define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM2_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM2_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_TIM3_STOP) -#define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM3_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM3_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_TIM4_STOP) -#define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM4_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM4_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_TIM5_STOP) -#define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM5_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM5_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_TIM6_STOP) -#define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_TIM7_STOP) -#define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM7_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM7_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_RTC_STOP) -#define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_RTC_STOP) -#define __HAL_DBGMCU_UNFREEZE_RTC() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_RTC_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_WWDG_STOP) -#define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_WWDG_STOP) -#define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_WWDG_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_IWDG_STOP) -#define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_IWDG_STOP) -#define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_IWDG_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_I2C1_STOP) -#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C1_STOP) -#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C1_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_I2C2_STOP) -#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C2_STOP) -#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C2_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_I2C3_STOP) -#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C3_STOP) -#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C3_STOP) -#endif - -#if defined(DBGMCU_APB1FZR2_DBG_I2C4_STOP) -#define __HAL_DBGMCU_FREEZE_I2C4_TIMEOUT() SET_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_I2C4_STOP) -#define __HAL_DBGMCU_UNFREEZE_I2C4_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_I2C4_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_CAN_STOP) -#define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN_STOP) -#define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_CAN2_STOP) -#define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN2_STOP) -#define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN2_STOP) -#endif - -#if defined(DBGMCU_APB1FZR1_DBG_LPTIM1_STOP) -#define __HAL_DBGMCU_FREEZE_LPTIM1() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_LPTIM1_STOP) -#define __HAL_DBGMCU_UNFREEZE_LPTIM1() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_LPTIM1_STOP) -#endif - -#if defined(DBGMCU_APB1FZR2_DBG_LPTIM2_STOP) -#define __HAL_DBGMCU_FREEZE_LPTIM2() SET_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_LPTIM2_STOP) -#define __HAL_DBGMCU_UNFREEZE_LPTIM2() CLEAR_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_LPTIM2_STOP) -#endif - -#if defined(DBGMCU_APB2FZ_DBG_TIM1_STOP) -#define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM1_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM1_STOP) -#endif - -#if defined(DBGMCU_APB2FZ_DBG_TIM8_STOP) -#define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM8_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM8_STOP) -#endif - -#if defined(DBGMCU_APB2FZ_DBG_TIM15_STOP) -#define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM15_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM15_STOP) -#endif - -#if defined(DBGMCU_APB2FZ_DBG_TIM16_STOP) -#define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM16_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM16_STOP) -#endif - -#if defined(DBGMCU_APB2FZ_DBG_TIM17_STOP) -#define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM17_STOP) -#define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM17_STOP) -#endif - -/** - * @} - */ - -/** @defgroup SYSCFG_Exported_Macros SYSCFG Exported Macros - * @{ - */ - -/** @brief Main Flash memory mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE) - -/** @brief System Flash memory mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_0) - -/** @brief Embedded SRAM mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_1|SYSCFG_MEMRMP_MEM_MODE_0)) - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - -/** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_FMC() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_1) - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - -/** @brief OCTOSPI mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_OCTOSPI1() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_2)) -#define __HAL_SYSCFG_REMAPMEMORY_OCTOSPI2() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_2|SYSCFG_MEMRMP_MEM_MODE_0)) - -#else - -/** @brief QUADSPI mapped at 0x00000000. - */ -#define __HAL_SYSCFG_REMAPMEMORY_QUADSPI() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_2|SYSCFG_MEMRMP_MEM_MODE_1)) - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** - * @brief Return the boot mode as configured by user. - * @retval The boot mode as configured by user. The returned value can be one - * of the following values: - * @arg @ref SYSCFG_BOOT_MAINFLASH - * @arg @ref SYSCFG_BOOT_SYSTEMFLASH - @if STM32L486xx - * @arg @ref SYSCFG_BOOT_FMC - @endif - * @arg @ref SYSCFG_BOOT_SRAM - * @arg @ref SYSCFG_BOOT_QUADSPI - */ -#define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE) - -/** @brief SRAM2 page 0 to 31 write protection enable macro - * @param __SRAM2WRP__ This parameter can be a combination of values of @ref SYSCFG_SRAM2WRP - * @note Write protection can only be disabled by a system reset - */ -#define __HAL_SYSCFG_SRAM2_WRP_1_31_ENABLE(__SRAM2WRP__) do {assert_param(IS_SYSCFG_SRAM2WRP_PAGE((__SRAM2WRP__)));\ - SET_BIT(SYSCFG->SWPR, (__SRAM2WRP__));\ - }while(0) - -#if defined(SYSCFG_SWPR2_PAGE63) -/** @brief SRAM2 page 32 to 63 write protection enable macro - * @param __SRAM2WRP__ This parameter can be a combination of values of @ref SYSCFG_SRAM2WRP_32_63 - * @note Write protection can only be disabled by a system reset - */ -#define __HAL_SYSCFG_SRAM2_WRP_32_63_ENABLE(__SRAM2WRP__) do {assert_param(IS_SYSCFG_SRAM2WRP_PAGE((__SRAM2WRP__)));\ - SET_BIT(SYSCFG->SWPR2, (__SRAM2WRP__));\ - }while(0) -#endif /* SYSCFG_SWPR2_PAGE63 */ - -/** @brief SRAM2 page write protection unlock prior to erase - * @note Writing a wrong key reactivates the write protection - */ -#define __HAL_SYSCFG_SRAM2_WRP_UNLOCK() do {SYSCFG->SKR = 0xCA;\ - SYSCFG->SKR = 0x53;\ - }while(0) - -/** @brief SRAM2 erase - * @note __SYSCFG_GET_FLAG(SYSCFG_FLAG_SRAM2_BUSY) may be used to check end of erase - */ -#define __HAL_SYSCFG_SRAM2_ERASE() SET_BIT(SYSCFG->SCSR, SYSCFG_SCSR_SRAM2ER) - -/** @brief Floating Point Unit interrupt enable/disable macros - * @param __INTERRUPT__ This parameter can be a value of @ref SYSCFG_FPU_Interrupts - */ -#define __HAL_SYSCFG_FPU_INTERRUPT_ENABLE(__INTERRUPT__) do {assert_param(IS_SYSCFG_FPU_INTERRUPT((__INTERRUPT__)));\ - SET_BIT(SYSCFG->CFGR1, (__INTERRUPT__));\ - }while(0) - -#define __HAL_SYSCFG_FPU_INTERRUPT_DISABLE(__INTERRUPT__) do {assert_param(IS_SYSCFG_FPU_INTERRUPT((__INTERRUPT__)));\ - CLEAR_BIT(SYSCFG->CFGR1, (__INTERRUPT__));\ - }while(0) - -/** @brief SYSCFG Break ECC lock. - * Enable and lock the connection of Flash ECC error connection to TIM1/8/15/16/17 Break input. - * @note The selected configuration is locked and can be unlocked only by system reset. - */ -#define __HAL_SYSCFG_BREAK_ECC_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_ECCL) - -/** @brief SYSCFG Break Cortex-M4 Lockup lock. - * Enable and lock the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8/15/16/17 Break input. - * @note The selected configuration is locked and can be unlocked only by system reset. - */ -#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL) - -/** @brief SYSCFG Break PVD lock. - * Enable and lock the PVD connection to Timer1/8/15/16/17 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR2 register. - * @note The selected configuration is locked and can be unlocked only by system reset. - */ -#define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_PVDL) - -/** @brief SYSCFG Break SRAM2 parity lock. - * Enable and lock the SRAM2 parity error signal connection to TIM1/8/15/16/17 Break input. - * @note The selected configuration is locked and can be unlocked by system reset. - */ -#define __HAL_SYSCFG_BREAK_SRAM2PARITY_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPL) - -/** @brief Check SYSCFG flag is set or not. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref SYSCFG_FLAG_SRAM2_PE SRAM2 Parity Error Flag - * @arg @ref SYSCFG_FLAG_SRAM2_BUSY SRAM2 Erase Ongoing - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_SYSCFG_GET_FLAG(__FLAG__) ((((((__FLAG__) == SYSCFG_SCSR_SRAM2BSY)? SYSCFG->SCSR : SYSCFG->CFGR2) & (__FLAG__))!= 0) ? 1 : 0) - -/** @brief Set the SPF bit to clear the SRAM Parity Error Flag. - */ -#define __HAL_SYSCFG_CLEAR_FLAG() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF) - -/** @brief Fast-mode Plus driving capability enable/disable macros - * @param __FASTMODEPLUS__ This parameter can be a value of : - * @arg @ref SYSCFG_FASTMODEPLUS_PB6 Fast-mode Plus driving capability activation on PB6 - * @arg @ref SYSCFG_FASTMODEPLUS_PB7 Fast-mode Plus driving capability activation on PB7 - * @arg @ref SYSCFG_FASTMODEPLUS_PB8 Fast-mode Plus driving capability activation on PB8 - * @arg @ref SYSCFG_FASTMODEPLUS_PB9 Fast-mode Plus driving capability activation on PB9 - */ -#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\ - SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\ - }while(0) - -#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\ - CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\ - }while(0) - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup SYSCFG_Private_Macros SYSCFG Private Macros - * @{ - */ - -#define IS_SYSCFG_FPU_INTERRUPT(__INTERRUPT__) ((((__INTERRUPT__) & SYSCFG_IT_FPU_IOC) == SYSCFG_IT_FPU_IOC) || \ - (((__INTERRUPT__) & SYSCFG_IT_FPU_DZC) == SYSCFG_IT_FPU_DZC) || \ - (((__INTERRUPT__) & SYSCFG_IT_FPU_UFC) == SYSCFG_IT_FPU_UFC) || \ - (((__INTERRUPT__) & SYSCFG_IT_FPU_OFC) == SYSCFG_IT_FPU_OFC) || \ - (((__INTERRUPT__) & SYSCFG_IT_FPU_IDC) == SYSCFG_IT_FPU_IDC) || \ - (((__INTERRUPT__) & SYSCFG_IT_FPU_IXC) == SYSCFG_IT_FPU_IXC)) - -#define IS_SYSCFG_BREAK_CONFIG(__CONFIG__) (((__CONFIG__) == SYSCFG_BREAK_ECC) || \ - ((__CONFIG__) == SYSCFG_BREAK_PVD) || \ - ((__CONFIG__) == SYSCFG_BREAK_SRAM2_PARITY) || \ - ((__CONFIG__) == SYSCFG_BREAK_LOCKUP)) - -#define IS_SYSCFG_SRAM2WRP_PAGE(__PAGE__) (((__PAGE__) > 0) && ((__PAGE__) <= 0xFFFFFFFF)) - -#if defined(VREFBUF) -#define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__) (((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE0) || \ - ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE1)) - -#define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(__VALUE__) (((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE) || \ - ((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE)) - -#define IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__) (((__VALUE__) > 0) && ((__VALUE__) <= VREFBUF_CCR_TRIM)) -#endif /* VREFBUF */ - -#if defined(SYSCFG_FASTMODEPLUS_PB8) && defined(SYSCFG_FASTMODEPLUS_PB9) -#define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9)) -#elif defined(SYSCFG_FASTMODEPLUS_PB8) -#define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8)) -#elif defined(SYSCFG_FASTMODEPLUS_PB9) -#define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9)) -#else -#define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \ - (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7)) -#endif -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup HAL_Exported_Functions - * @{ - */ - -/** @addtogroup HAL_Exported_Functions_Group1 - * @{ - */ - -/* Initialization and de-initialization functions ******************************/ -HAL_StatusTypeDef HAL_Init(void); -HAL_StatusTypeDef HAL_DeInit(void); -void HAL_MspInit(void); -void HAL_MspDeInit(void); -HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); - -/** - * @} - */ - -/** @addtogroup HAL_Exported_Functions_Group2 - * @{ - */ - -/* Peripheral Control functions ************************************************/ -void HAL_IncTick(void); -void HAL_Delay(uint32_t Delay); -uint32_t HAL_GetTick(void); -void HAL_SuspendTick(void); -void HAL_ResumeTick(void); -uint32_t HAL_GetHalVersion(void); -uint32_t HAL_GetREVID(void); -uint32_t HAL_GetDEVID(void); -uint32_t HAL_GetUIDw0(void); -uint32_t HAL_GetUIDw1(void); -uint32_t HAL_GetUIDw2(void); - -/** - * @} - */ - -/** @addtogroup HAL_Exported_Functions_Group3 - * @{ - */ - -/* DBGMCU Peripheral Control functions *****************************************/ -void HAL_DBGMCU_EnableDBGSleepMode(void); -void HAL_DBGMCU_DisableDBGSleepMode(void); -void HAL_DBGMCU_EnableDBGStopMode(void); -void HAL_DBGMCU_DisableDBGStopMode(void); -void HAL_DBGMCU_EnableDBGStandbyMode(void); -void HAL_DBGMCU_DisableDBGStandbyMode(void); - -/** - * @} - */ - -/** @addtogroup HAL_Exported_Functions_Group4 - * @{ - */ - -/* SYSCFG Control functions ****************************************************/ -void HAL_SYSCFG_SRAM2Erase(void); -void HAL_SYSCFG_EnableMemorySwappingBank(void); -void HAL_SYSCFG_DisableMemorySwappingBank(void); - -#if defined(VREFBUF) -void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling); -void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode); -void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue); -HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void); -void HAL_SYSCFG_DisableVREFBUF(void); -#endif /* VREFBUF */ - -void HAL_SYSCFG_EnableIOAnalogSwitchBooster(void); -void HAL_SYSCFG_DisableIOAnalogSwitchBooster(void); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h deleted file mode 100644 index b6e2e9f3..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h +++ /dev/null @@ -1,433 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_cortex.h - * @author MCD Application Team - * @brief Header file of CORTEX HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CORTEX_H -#define __STM32L4xx_HAL_CORTEX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup CORTEX CORTEX - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup CORTEX_Exported_Types CORTEX Exported Types - * @{ - */ - -#if (__MPU_PRESENT == 1) -/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition - * @{ - */ -typedef struct -{ - uint8_t Enable; /*!< Specifies the status of the region. - This parameter can be a value of @ref CORTEX_MPU_Region_Enable */ - uint8_t Number; /*!< Specifies the number of the region to protect. - This parameter can be a value of @ref CORTEX_MPU_Region_Number */ - uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */ - uint8_t Size; /*!< Specifies the size of the region to protect. - This parameter can be a value of @ref CORTEX_MPU_Region_Size */ - uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ - uint8_t TypeExtField; /*!< Specifies the TEX field level. - This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */ - uint8_t AccessPermission; /*!< Specifies the region access permission type. - This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */ - uint8_t DisableExec; /*!< Specifies the instruction access status. - This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */ - uint8_t IsShareable; /*!< Specifies the shareability status of the protected region. - This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */ - uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected. - This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */ - uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region. - This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */ -}MPU_Region_InitTypeDef; -/** - * @} - */ -#endif /* __MPU_PRESENT */ - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants - * @{ - */ - -/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group - * @{ - */ -#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority, - 4 bits for subpriority */ -#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority, - 3 bits for subpriority */ -#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority, - 2 bits for subpriority */ -#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority, - 1 bit for subpriority */ -#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority, - 0 bit for subpriority */ -/** - * @} - */ - -/** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source - * @{ - */ -#define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000) -#define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004) -/** - * @} - */ - -#if (__MPU_PRESENT == 1) -/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control CORTEX MPU HFNMI and PRIVILEGED Access control - * @{ - */ -#define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000) -#define MPU_HARDFAULT_NMI ((uint32_t)0x00000002) -#define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004) -#define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable - * @{ - */ -#define MPU_REGION_ENABLE ((uint8_t)0x01) -#define MPU_REGION_DISABLE ((uint8_t)0x00) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access - * @{ - */ -#define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00) -#define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable - * @{ - */ -#define MPU_ACCESS_SHAREABLE ((uint8_t)0x01) -#define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable - * @{ - */ -#define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) -#define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable - * @{ - */ -#define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01) -#define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_TEX_Levels CORTEX MPU TEX Levels - * @{ - */ -#define MPU_TEX_LEVEL0 ((uint8_t)0x00) -#define MPU_TEX_LEVEL1 ((uint8_t)0x01) -#define MPU_TEX_LEVEL2 ((uint8_t)0x02) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size - * @{ - */ -#define MPU_REGION_SIZE_32B ((uint8_t)0x04) -#define MPU_REGION_SIZE_64B ((uint8_t)0x05) -#define MPU_REGION_SIZE_128B ((uint8_t)0x06) -#define MPU_REGION_SIZE_256B ((uint8_t)0x07) -#define MPU_REGION_SIZE_512B ((uint8_t)0x08) -#define MPU_REGION_SIZE_1KB ((uint8_t)0x09) -#define MPU_REGION_SIZE_2KB ((uint8_t)0x0A) -#define MPU_REGION_SIZE_4KB ((uint8_t)0x0B) -#define MPU_REGION_SIZE_8KB ((uint8_t)0x0C) -#define MPU_REGION_SIZE_16KB ((uint8_t)0x0D) -#define MPU_REGION_SIZE_32KB ((uint8_t)0x0E) -#define MPU_REGION_SIZE_64KB ((uint8_t)0x0F) -#define MPU_REGION_SIZE_128KB ((uint8_t)0x10) -#define MPU_REGION_SIZE_256KB ((uint8_t)0x11) -#define MPU_REGION_SIZE_512KB ((uint8_t)0x12) -#define MPU_REGION_SIZE_1MB ((uint8_t)0x13) -#define MPU_REGION_SIZE_2MB ((uint8_t)0x14) -#define MPU_REGION_SIZE_4MB ((uint8_t)0x15) -#define MPU_REGION_SIZE_8MB ((uint8_t)0x16) -#define MPU_REGION_SIZE_16MB ((uint8_t)0x17) -#define MPU_REGION_SIZE_32MB ((uint8_t)0x18) -#define MPU_REGION_SIZE_64MB ((uint8_t)0x19) -#define MPU_REGION_SIZE_128MB ((uint8_t)0x1A) -#define MPU_REGION_SIZE_256MB ((uint8_t)0x1B) -#define MPU_REGION_SIZE_512MB ((uint8_t)0x1C) -#define MPU_REGION_SIZE_1GB ((uint8_t)0x1D) -#define MPU_REGION_SIZE_2GB ((uint8_t)0x1E) -#define MPU_REGION_SIZE_4GB ((uint8_t)0x1F) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes - * @{ - */ -#define MPU_REGION_NO_ACCESS ((uint8_t)0x00) -#define MPU_REGION_PRIV_RW ((uint8_t)0x01) -#define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02) -#define MPU_REGION_FULL_ACCESS ((uint8_t)0x03) -#define MPU_REGION_PRIV_RO ((uint8_t)0x05) -#define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06) -/** - * @} - */ - -/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number - * @{ - */ -#define MPU_REGION_NUMBER0 ((uint8_t)0x00) -#define MPU_REGION_NUMBER1 ((uint8_t)0x01) -#define MPU_REGION_NUMBER2 ((uint8_t)0x02) -#define MPU_REGION_NUMBER3 ((uint8_t)0x03) -#define MPU_REGION_NUMBER4 ((uint8_t)0x04) -#define MPU_REGION_NUMBER5 ((uint8_t)0x05) -#define MPU_REGION_NUMBER6 ((uint8_t)0x06) -#define MPU_REGION_NUMBER7 ((uint8_t)0x07) -/** - * @} - */ -#endif /* __MPU_PRESENT */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros - * @{ - */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions - * @{ - */ - -/** @defgroup CORTEX_Exported_Functions_Group1 Initialization and Configuration functions - * @brief Initialization and Configuration functions - * @{ - */ -/* Initialization and Configuration functions *****************************/ -void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup); -void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority); -void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); -void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); -void HAL_NVIC_SystemReset(void); -uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); - -/** - * @} - */ - -/** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions - * @brief Cortex control functions - * @{ - */ -/* Peripheral Control functions ***********************************************/ -uint32_t HAL_NVIC_GetPriorityGrouping(void); -void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority); -uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn); -void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn); -void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn); -uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn); -void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource); -void HAL_SYSTICK_IRQHandler(void); -void HAL_SYSTICK_Callback(void); - -#if (__MPU_PRESENT == 1) -void HAL_MPU_Enable(uint32_t MPU_Control); -void HAL_MPU_Disable(void); -void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init); -#endif /* __MPU_PRESENT */ -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/** @defgroup CORTEX_Private_Macros CORTEX Private Macros - * @{ - */ -#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \ - ((GROUP) == NVIC_PRIORITYGROUP_1) || \ - ((GROUP) == NVIC_PRIORITYGROUP_2) || \ - ((GROUP) == NVIC_PRIORITYGROUP_3) || \ - ((GROUP) == NVIC_PRIORITYGROUP_4)) - -#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) - -#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) - -#define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00) - -#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ - ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8)) - -#if (__MPU_PRESENT == 1) -#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \ - ((STATE) == MPU_REGION_DISABLE)) - -#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \ - ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE)) - -#define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \ - ((STATE) == MPU_ACCESS_NOT_SHAREABLE)) - -#define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \ - ((STATE) == MPU_ACCESS_NOT_CACHEABLE)) - -#define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \ - ((STATE) == MPU_ACCESS_NOT_BUFFERABLE)) - -#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \ - ((TYPE) == MPU_TEX_LEVEL1) || \ - ((TYPE) == MPU_TEX_LEVEL2)) - -#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \ - ((TYPE) == MPU_REGION_PRIV_RW) || \ - ((TYPE) == MPU_REGION_PRIV_RW_URO) || \ - ((TYPE) == MPU_REGION_FULL_ACCESS) || \ - ((TYPE) == MPU_REGION_PRIV_RO) || \ - ((TYPE) == MPU_REGION_PRIV_RO_URO)) - -#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \ - ((NUMBER) == MPU_REGION_NUMBER1) || \ - ((NUMBER) == MPU_REGION_NUMBER2) || \ - ((NUMBER) == MPU_REGION_NUMBER3) || \ - ((NUMBER) == MPU_REGION_NUMBER4) || \ - ((NUMBER) == MPU_REGION_NUMBER5) || \ - ((NUMBER) == MPU_REGION_NUMBER6) || \ - ((NUMBER) == MPU_REGION_NUMBER7)) - -#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \ - ((SIZE) == MPU_REGION_SIZE_64B) || \ - ((SIZE) == MPU_REGION_SIZE_128B) || \ - ((SIZE) == MPU_REGION_SIZE_256B) || \ - ((SIZE) == MPU_REGION_SIZE_512B) || \ - ((SIZE) == MPU_REGION_SIZE_1KB) || \ - ((SIZE) == MPU_REGION_SIZE_2KB) || \ - ((SIZE) == MPU_REGION_SIZE_4KB) || \ - ((SIZE) == MPU_REGION_SIZE_8KB) || \ - ((SIZE) == MPU_REGION_SIZE_16KB) || \ - ((SIZE) == MPU_REGION_SIZE_32KB) || \ - ((SIZE) == MPU_REGION_SIZE_64KB) || \ - ((SIZE) == MPU_REGION_SIZE_128KB) || \ - ((SIZE) == MPU_REGION_SIZE_256KB) || \ - ((SIZE) == MPU_REGION_SIZE_512KB) || \ - ((SIZE) == MPU_REGION_SIZE_1MB) || \ - ((SIZE) == MPU_REGION_SIZE_2MB) || \ - ((SIZE) == MPU_REGION_SIZE_4MB) || \ - ((SIZE) == MPU_REGION_SIZE_8MB) || \ - ((SIZE) == MPU_REGION_SIZE_16MB) || \ - ((SIZE) == MPU_REGION_SIZE_32MB) || \ - ((SIZE) == MPU_REGION_SIZE_64MB) || \ - ((SIZE) == MPU_REGION_SIZE_128MB) || \ - ((SIZE) == MPU_REGION_SIZE_256MB) || \ - ((SIZE) == MPU_REGION_SIZE_512MB) || \ - ((SIZE) == MPU_REGION_SIZE_1GB) || \ - ((SIZE) == MPU_REGION_SIZE_2GB) || \ - ((SIZE) == MPU_REGION_SIZE_4GB)) - -#define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF) -#endif /* __MPU_PRESENT */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CORTEX_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h deleted file mode 100644 index bb9816b4..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h +++ /dev/null @@ -1,213 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_def.h - * @author MCD Application Team - * @brief This file contains HAL common defines, enumeration, macros and - * structures definitions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_DEF -#define __STM32L4xx_HAL_DEF - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx.h" -#include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */ -#include - -/* Exported types ------------------------------------------------------------*/ - -/** - * @brief HAL Status structures definition - */ -typedef enum -{ - HAL_OK = 0x00, - HAL_ERROR = 0x01, - HAL_BUSY = 0x02, - HAL_TIMEOUT = 0x03 -} HAL_StatusTypeDef; - -/** - * @brief HAL Lock structures definition - */ -typedef enum -{ - HAL_UNLOCKED = 0x00, - HAL_LOCKED = 0x01 -} HAL_LockTypeDef; - -/* Exported macros -----------------------------------------------------------*/ - -#define HAL_MAX_DELAY 0xFFFFFFFFU - -#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) -#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET) - -#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ - do{ \ - (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ - (__DMA_HANDLE__).Parent = (__HANDLE__); \ - } while(0) - -#define UNUSED(x) ((void)(x)) - -/** @brief Reset the Handle's State field. - * @param __HANDLE__: specifies the Peripheral Handle. - * @note This macro can be used for the following purpose: - * - When the Handle is declared as local variable; before passing it as parameter - * to HAL_PPP_Init() for the first time, it is mandatory to use this macro - * to set to 0 the Handle's "State" field. - * Otherwise, "State" field may have any random value and the first time the function - * HAL_PPP_Init() is called, the low level hardware initialization will be missed - * (i.e. HAL_PPP_MspInit() will not be executed). - * - When there is a need to reconfigure the low level hardware: instead of calling - * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). - * In this later function, when the Handle's "State" field is set to 0, it will execute the function - * HAL_PPP_MspInit() which will reconfigure the low level hardware. - * @retval None - */ -#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0) - -#if (USE_RTOS == 1) - /* Reserved for future use */ - #error " USE_RTOS should be 0 in the current HAL release " -#else - #define __HAL_LOCK(__HANDLE__) \ - do{ \ - if((__HANDLE__)->Lock == HAL_LOCKED) \ - { \ - return HAL_BUSY; \ - } \ - else \ - { \ - (__HANDLE__)->Lock = HAL_LOCKED; \ - } \ - }while (0) - - #define __HAL_UNLOCK(__HANDLE__) \ - do{ \ - (__HANDLE__)->Lock = HAL_UNLOCKED; \ - }while (0) -#endif /* USE_RTOS */ - -#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ - #ifndef __weak - #define __weak __attribute__((weak)) - #endif /* __weak */ - #ifndef __packed - #define __packed __attribute__((__packed__)) - #endif /* __packed */ -#endif /* __GNUC__ */ - - -/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ -#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ - #ifndef __ALIGN_END - #define __ALIGN_END __attribute__ ((aligned (4))) - #endif /* __ALIGN_END */ - #ifndef __ALIGN_BEGIN - #define __ALIGN_BEGIN - #endif /* __ALIGN_BEGIN */ -#else - #ifndef __ALIGN_END - #define __ALIGN_END - #endif /* __ALIGN_END */ - #ifndef __ALIGN_BEGIN - #if defined (__CC_ARM) /* ARM Compiler */ - #define __ALIGN_BEGIN __align(4) - #elif defined (__ICCARM__) /* IAR Compiler */ - #define __ALIGN_BEGIN - #endif /* __CC_ARM */ - #endif /* __ALIGN_BEGIN */ -#endif /* __GNUC__ */ - -/** - * @brief __RAM_FUNC definition - */ -#if defined ( __CC_ARM ) -/* ARM Compiler - ------------ - RAM functions are defined using the toolchain options. - Functions that are executed in RAM should reside in a separate source module. - Using the 'Options for File' dialog you can simply change the 'Code / Const' - area of a module to a memory space in physical RAM. - Available memory areas are declared in the 'Target' tab of the 'Options for Target' - dialog. -*/ -#define __RAM_FUNC HAL_StatusTypeDef - -#elif defined ( __ICCARM__ ) -/* ICCARM Compiler - --------------- - RAM functions are defined using a specific toolchain keyword "__ramfunc". -*/ -#define __RAM_FUNC __ramfunc HAL_StatusTypeDef - -#elif defined ( __GNUC__ ) -/* GNU Compiler - ------------ - RAM functions are defined using a specific toolchain attribute - "__attribute__((section(".RamFunc")))". -*/ -#define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc"))) - -#endif - -/** - * @brief __NOINLINE definition - */ -#if defined ( __CC_ARM ) || defined ( __GNUC__ ) -/* ARM & GNUCompiler - ---------------- -*/ -#define __NOINLINE __attribute__ ( (noinline) ) - -#elif defined ( __ICCARM__ ) -/* ICCARM Compiler - --------------- -*/ -#define __NOINLINE _Pragma("optimize = no_inline") - -#endif - - -#ifdef __cplusplus -} -#endif - -#endif /* ___STM32L4xx_HAL_DEF */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h deleted file mode 100644 index c11a47cc..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h +++ /dev/null @@ -1,766 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dma.h - * @author MCD Application Team - * @brief Header file of DMA HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_DMA_H -#define __STM32L4xx_HAL_DMA_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup DMA - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup DMA_Exported_Types DMA Exported Types - * @{ - */ - -/** - * @brief DMA Configuration Structure definition - */ -typedef struct -{ - uint32_t Request; /*!< Specifies the request selected for the specified channel. - This parameter can be a value of @ref DMA_request */ - - uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral, - from memory to memory or from peripheral to memory. - This parameter can be a value of @ref DMA_Data_transfer_direction */ - - uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not. - This parameter can be a value of @ref DMA_Peripheral_incremented_mode */ - - uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not. - This parameter can be a value of @ref DMA_Memory_incremented_mode */ - - uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width. - This parameter can be a value of @ref DMA_Peripheral_data_size */ - - uint32_t MemDataAlignment; /*!< Specifies the Memory data width. - This parameter can be a value of @ref DMA_Memory_data_size */ - - uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx. - This parameter can be a value of @ref DMA_mode - @note The circular buffer mode cannot be used if the memory-to-memory - data transfer is configured on the selected Channel */ - - uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx. - This parameter can be a value of @ref DMA_Priority_level */ -} DMA_InitTypeDef; - -/** - * @brief HAL DMA State structures definition - */ -typedef enum -{ - HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */ - HAL_DMA_STATE_READY = 0x01, /*!< DMA initialized and ready for use */ - HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */ - HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */ -}HAL_DMA_StateTypeDef; - -/** - * @brief HAL DMA Error Code structure definition - */ -typedef enum -{ - HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */ - HAL_DMA_HALF_TRANSFER = 0x01 /*!< Half Transfer */ -}HAL_DMA_LevelCompleteTypeDef; - - -/** - * @brief HAL DMA Callback ID structure definition - */ -typedef enum -{ - HAL_DMA_XFER_CPLT_CB_ID = 0x00, /*!< Full transfer */ - HAL_DMA_XFER_HALFCPLT_CB_ID = 0x01, /*!< Half transfer */ - HAL_DMA_XFER_ERROR_CB_ID = 0x02, /*!< Error */ - HAL_DMA_XFER_ABORT_CB_ID = 0x03, /*!< Abort */ - HAL_DMA_XFER_ALL_CB_ID = 0x04 /*!< All */ - -}HAL_DMA_CallbackIDTypeDef; - -/** - * @brief DMA handle Structure definition - */ -typedef struct __DMA_HandleTypeDef -{ - DMA_Channel_TypeDef *Instance; /*!< Register base address */ - - DMA_InitTypeDef Init; /*!< DMA communication parameters */ - - HAL_LockTypeDef Lock; /*!< DMA locking object */ - - __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */ - - void *Parent; /*!< Parent object state */ - - void (* XferCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */ - - void (* XferHalfCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */ - - void (* XferErrorCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */ - - void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */ - - __IO uint32_t ErrorCode; /*!< DMA Error code */ - - DMA_TypeDef *DmaBaseAddress; /*!< DMA Channel Base Address */ - - uint32_t ChannelIndex; /*!< DMA Channel Index */ - -#if defined(DMAMUX1) - DMAMUX_Channel_TypeDef *DMAmuxChannel; /*!< Register base address */ - - DMAMUX_ChannelStatus_TypeDef *DMAmuxChannelStatus; /*!< DMAMUX Channels Status Base Address */ - - uint32_t DMAmuxChannelStatusMask; /*!< DMAMUX Channel Status Mask */ - - DMAMUX_RequestGen_TypeDef *DMAmuxRequestGen; /*!< DMAMUX request generator Base Address */ - - DMAMUX_RequestGenStatus_TypeDef *DMAmuxRequestGenStatus; /*!< DMAMUX request generator Address */ - - uint32_t DMAmuxRequestGenStatusMask; /*!< DMAMUX request generator Status mask */ - -#endif /* DMAMUX1 */ - -}DMA_HandleTypeDef; -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup DMA_Exported_Constants DMA Exported Constants - * @{ - */ - -/** @defgroup DMA_Error_Code DMA Error Code - * @{ - */ -#define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ -#define HAL_DMA_ERROR_TE ((uint32_t)0x00000001U) /*!< Transfer error */ -#define HAL_DMA_ERROR_NO_XFER ((uint32_t)0x00000004U) /*!< Abort requested with no Xfer ongoing */ -#define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */ -#define HAL_DMA_ERROR_NOT_SUPPORTED ((uint32_t)0x00000100U) /*!< Not supported mode */ -#define HAL_DMA_ERROR_SYNC ((uint32_t)0x00000200U) /*!< DMAMUX sync overrun error */ -#define HAL_DMA_ERROR_REQGEN ((uint32_t)0x00000400U) /*!< DMAMUX request generator overrun error */ - -/** - * @} - */ - -/** @defgroup DMA_request DMA request - * @{ - */ -#if !defined (DMAMUX1) - -#define DMA_REQUEST_0 ((uint32_t)0x00000000) -#define DMA_REQUEST_1 ((uint32_t)0x00000001) -#define DMA_REQUEST_2 ((uint32_t)0x00000002) -#define DMA_REQUEST_3 ((uint32_t)0x00000003) -#define DMA_REQUEST_4 ((uint32_t)0x00000004) -#define DMA_REQUEST_5 ((uint32_t)0x00000005) -#define DMA_REQUEST_6 ((uint32_t)0x00000006) -#define DMA_REQUEST_7 ((uint32_t)0x00000007) - -#endif - -#if defined(DMAMUX1) - -#define DMA_REQUEST_MEM2MEM 0U /*!< memory to memory transfer */ - -#define DMA_REQUEST_GENERATOR0 1U /*!< DMAMUX1 request generator 0 */ -#define DMA_REQUEST_GENERATOR1 2U /*!< DMAMUX1 request generator 1 */ -#define DMA_REQUEST_GENERATOR2 3U /*!< DMAMUX1 request generator 2 */ -#define DMA_REQUEST_GENERATOR3 4U /*!< DMAMUX1 request generator 3 */ - -#define DMA_REQUEST_ADC1 5U /*!< DMAMUX1 ADC1 request */ - -#define DMA_REQUEST_DAC1_CH1 6U /*!< DMAMUX1 DAC1 CH1 request */ -#define DMA_REQUEST_DAC1_CH2 7U /*!< DMAMUX1 DAC1 CH2 request */ - -#define DMA_REQUEST_TIM6_UP 8U /*!< DMAMUX1 TIM6 UP request */ -#define DMA_REQUEST_TIM7_UP 9U /*!< DMAMUX1 TIM7 UP request */ - -#define DMA_REQUEST_SPI1_RX 10U /*!< DMAMUX1 SPI1 RX request */ -#define DMA_REQUEST_SPI1_TX 11U /*!< DMAMUX1 SPI1 TX request */ -#define DMA_REQUEST_SPI2_RX 12U /*!< DMAMUX1 SPI2 RX request */ -#define DMA_REQUEST_SPI2_TX 13U /*!< DMAMUX1 SPI2 TX request */ -#define DMA_REQUEST_SPI3_RX 14U /*!< DMAMUX1 SPI3 RX request */ -#define DMA_REQUEST_SPI3_TX 15U /*!< DMAMUX1 SPI3 TX request */ - -#define DMA_REQUEST_I2C1_RX 16U /*!< DMAMUX1 I2C1 RX request */ -#define DMA_REQUEST_I2C1_TX 17U /*!< DMAMUX1 I2C1 TX request */ -#define DMA_REQUEST_I2C2_RX 18U /*!< DMAMUX1 I2C2 RX request */ -#define DMA_REQUEST_I2C2_TX 19U /*!< DMAMUX1 I2C2 TX request */ -#define DMA_REQUEST_I2C3_RX 20U /*!< DMAMUX1 I2C3 RX request */ -#define DMA_REQUEST_I2C3_TX 21U /*!< DMAMUX1 I2C3 TX request */ -#define DMA_REQUEST_I2C4_RX 22U /*!< DMAMUX1 I2C4 RX request */ -#define DMA_REQUEST_I2C4_TX 23U /*!< DMAMUX1 I2C4 TX request */ - -#define DMA_REQUEST_USART1_RX 24U /*!< DMAMUX1 USART1 RX request */ -#define DMA_REQUEST_USART1_TX 25U /*!< DMAMUX1 USART1 TX request */ -#define DMA_REQUEST_USART2_RX 26U /*!< DMAMUX1 USART2 RX request */ -#define DMA_REQUEST_USART2_TX 27U /*!< DMAMUX1 USART2 TX request */ -#define DMA_REQUEST_USART3_RX 28U /*!< DMAMUX1 USART3 RX request */ -#define DMA_REQUEST_USART3_TX 29U /*!< DMAMUX1 USART3 TX request */ - -#define DMA_REQUEST_UART4_RX 30U /*!< DMAMUX1 UART4 RX request */ -#define DMA_REQUEST_UART4_TX 31U /*!< DMAMUX1 UART4 TX request */ -#define DMA_REQUEST_UART5_RX 32U /*!< DMAMUX1 UART5 RX request */ -#define DMA_REQUEST_UART5_TX 33U /*!< DMAMUX1 UART5 TX request */ - -#define DMA_REQUEST_LPUART1_RX 34U /*!< DMAMUX1 LP_UART1_RX request */ -#define DMA_REQUEST_LPUART1_TX 35U /*!< DMAMUX1 LP_UART1_RX request */ - -#define DMA_REQUEST_SAI1_A 36U /*!< DMAMUX1 SAI1 A request */ -#define DMA_REQUEST_SAI1_B 37U /*!< DMAMUX1 SAI1 B request */ -#define DMA_REQUEST_SAI2_A 38U /*!< DMAMUX1 SAI2 A request */ -#define DMA_REQUEST_SAI2_B 39U /*!< DMAMUX1 SAI2 B request */ - -#define DMA_REQUEST_OCTOSPI1 40U /*!< DMAMUX1 OCTOSPI1 request */ -#define DMA_REQUEST_OCTOSPI2 41U /*!< DMAMUX1 OCTOSPI2 request */ - -#define DMA_REQUEST_TIM1_CH1 42U /*!< DMAMUX1 TIM1 CH1 request */ -#define DMA_REQUEST_TIM1_CH2 43U /*!< DMAMUX1 TIM1 CH2 request */ -#define DMA_REQUEST_TIM1_CH3 44U /*!< DMAMUX1 TIM1 CH3 request */ -#define DMA_REQUEST_TIM1_CH4 45U /*!< DMAMUX1 TIM1 CH4 request */ -#define DMA_REQUEST_TIM1_UP 46U /*!< DMAMUX1 TIM1 UP request */ -#define DMA_REQUEST_TIM1_TRIG 47U /*!< DMAMUX1 TIM1 TRIG request */ -#define DMA_REQUEST_TIM1_COM 48U /*!< DMAMUX1 TIM1 COM request */ - -#define DMA_REQUEST_TIM8_CH1 49U /*!< DMAMUX1 TIM8 CH1 request */ -#define DMA_REQUEST_TIM8_CH2 50U /*!< DMAMUX1 TIM8 CH2 request */ -#define DMA_REQUEST_TIM8_CH3 51U /*!< DMAMUX1 TIM8 CH3 request */ -#define DMA_REQUEST_TIM8_CH4 52U /*!< DMAMUX1 TIM8 CH4 request */ -#define DMA_REQUEST_TIM8_UP 53U /*!< DMAMUX1 TIM8 UP request */ -#define DMA_REQUEST_TIM8_TRIG 54U /*!< DMAMUX1 TIM8 TRIG request */ -#define DMA_REQUEST_TIM8_COM 55U /*!< DMAMUX1 TIM8 COM request */ - -#define DMA_REQUEST_TIM2_CH1 56U /*!< DMAMUX1 TIM2 CH1 request */ -#define DMA_REQUEST_TIM2_CH2 57U /*!< DMAMUX1 TIM2 CH2 request */ -#define DMA_REQUEST_TIM2_CH3 58U /*!< DMAMUX1 TIM2 CH3 request */ -#define DMA_REQUEST_TIM2_CH4 59U /*!< DMAMUX1 TIM2 CH4 request */ -#define DMA_REQUEST_TIM2_UP 60U /*!< DMAMUX1 TIM2 UP request */ - -#define DMA_REQUEST_TIM3_CH1 61U /*!< DMAMUX1 TIM3 CH1 request */ -#define DMA_REQUEST_TIM3_CH2 62U /*!< DMAMUX1 TIM3 CH2 request */ -#define DMA_REQUEST_TIM3_CH3 63U /*!< DMAMUX1 TIM3 CH3 request */ -#define DMA_REQUEST_TIM3_CH4 64U /*!< DMAMUX1 TIM3 CH4 request */ -#define DMA_REQUEST_TIM3_UP 65U /*!< DMAMUX1 TIM3 UP request */ -#define DMA_REQUEST_TIM3_TRIG 66U /*!< DMAMUX1 TIM3 TRIG request */ - -#define DMA_REQUEST_TIM4_CH1 67U /*!< DMAMUX1 TIM4 CH1 request */ -#define DMA_REQUEST_TIM4_CH2 68U /*!< DMAMUX1 TIM4 CH2 request */ -#define DMA_REQUEST_TIM4_CH3 69U /*!< DMAMUX1 TIM4 CH3 request */ -#define DMA_REQUEST_TIM4_CH4 70U /*!< DMAMUX1 TIM4 CH4 request */ -#define DMA_REQUEST_TIM4_UP 71U /*!< DMAMUX1 TIM4 UP request */ - -#define DMA_REQUEST_TIM5_CH1 72U /*!< DMAMUX1 TIM5 CH1 request */ -#define DMA_REQUEST_TIM5_CH2 73U /*!< DMAMUX1 TIM5 CH2 request */ -#define DMA_REQUEST_TIM5_CH3 74U /*!< DMAMUX1 TIM5 CH3 request */ -#define DMA_REQUEST_TIM5_CH4 75U /*!< DMAMUX1 TIM5 CH4 request */ -#define DMA_REQUEST_TIM5_UP 76U /*!< DMAMUX1 TIM5 UP request */ -#define DMA_REQUEST_TIM5_TRIG 77U /*!< DMAMUX1 TIM5 TRIG request */ - -#define DMA_REQUEST_TIM15_CH1 78U /*!< DMAMUX1 TIM15 CH1 request */ -#define DMA_REQUEST_TIM15_UP 79U /*!< DMAMUX1 TIM15 UP request */ -#define DMA_REQUEST_TIM15_TRIG 80U /*!< DMAMUX1 TIM15 TRIG request */ -#define DMA_REQUEST_TIM15_COM 81U /*!< DMAMUX1 TIM15 COM request */ - -#define DMA_REQUEST_TIM16_CH1 82U /*!< DMAMUX1 TIM16 CH1 request */ -#define DMA_REQUEST_TIM16_UP 83U /*!< DMAMUX1 TIM16 UP request */ -#define DMA_REQUEST_TIM17_CH1 84U /*!< DMAMUX1 TIM17 CH1 request */ -#define DMA_REQUEST_TIM17_UP 85U /*!< DMAMUX1 TIM17 UP request */ - -#define DMA_REQUEST_DFSDM1_FLT0 86U /*!< DMAMUX1 DFSDM1 Filter0 request */ -#define DMA_REQUEST_DFSDM1_FLT1 87U /*!< DMAMUX1 DFSDM1 Filter1 request */ -#define DMA_REQUEST_DFSDM1_FLT2 88U /*!< DMAMUX1 DFSDM1 Filter2 request */ -#define DMA_REQUEST_DFSDM1_FLT3 89U /*!< DMAMUX1 DFSDM1 Filter3 request */ - -#define DMA_REQUEST_DCMI 90U /*!< DMAMUX1 DCMI request */ - -#define DMA_REQUEST_AES_IN 91U /*!< DMAMUX1 AES IN request */ -#define DMA_REQUEST_AES_OUT 92U /*!< DMAMUX1 AES OUT request */ - -#define DMA_REQUEST_HASH_IN 93U /*!< DMAMUX1 HASH IN request */ - -#endif /* DMAMUX1 */ - -/** - * @} - */ - -/** @defgroup DMA_Data_transfer_direction DMA Data transfer direction - * @{ - */ -#define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */ -#define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */ -#define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction */ -/** - * @} - */ - -/** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode - * @{ - */ -#define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */ -#define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */ -/** - * @} - */ - -/** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode - * @{ - */ -#define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */ -#define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */ -/** - * @} - */ - -/** @defgroup DMA_Peripheral_data_size DMA Peripheral data size - * @{ - */ -#define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */ -#define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */ -#define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */ -/** - * @} - */ - -/** @defgroup DMA_Memory_data_size DMA Memory data size - * @{ - */ -#define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */ -#define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */ -#define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */ -/** - * @} - */ - -/** @defgroup DMA_mode DMA mode - * @{ - */ -#define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */ -#define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular mode */ -/** - * @} - */ - -/** @defgroup DMA_Priority_level DMA Priority level - * @{ - */ -#define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */ -#define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */ -#define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */ -#define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */ -/** - * @} - */ - - -/** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions - * @{ - */ -#define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE) -#define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE) -#define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE) -/** - * @} - */ - -/** @defgroup DMA_flag_definitions DMA flag definitions - * @{ - */ -#define DMA_FLAG_GL1 ((uint32_t)0x00000001) -#define DMA_FLAG_TC1 ((uint32_t)0x00000002) -#define DMA_FLAG_HT1 ((uint32_t)0x00000004) -#define DMA_FLAG_TE1 ((uint32_t)0x00000008) -#define DMA_FLAG_GL2 ((uint32_t)0x00000010) -#define DMA_FLAG_TC2 ((uint32_t)0x00000020) -#define DMA_FLAG_HT2 ((uint32_t)0x00000040) -#define DMA_FLAG_TE2 ((uint32_t)0x00000080) -#define DMA_FLAG_GL3 ((uint32_t)0x00000100) -#define DMA_FLAG_TC3 ((uint32_t)0x00000200) -#define DMA_FLAG_HT3 ((uint32_t)0x00000400) -#define DMA_FLAG_TE3 ((uint32_t)0x00000800) -#define DMA_FLAG_GL4 ((uint32_t)0x00001000) -#define DMA_FLAG_TC4 ((uint32_t)0x00002000) -#define DMA_FLAG_HT4 ((uint32_t)0x00004000) -#define DMA_FLAG_TE4 ((uint32_t)0x00008000) -#define DMA_FLAG_GL5 ((uint32_t)0x00010000) -#define DMA_FLAG_TC5 ((uint32_t)0x00020000) -#define DMA_FLAG_HT5 ((uint32_t)0x00040000) -#define DMA_FLAG_TE5 ((uint32_t)0x00080000) -#define DMA_FLAG_GL6 ((uint32_t)0x00100000) -#define DMA_FLAG_TC6 ((uint32_t)0x00200000) -#define DMA_FLAG_HT6 ((uint32_t)0x00400000) -#define DMA_FLAG_TE6 ((uint32_t)0x00800000) -#define DMA_FLAG_GL7 ((uint32_t)0x01000000) -#define DMA_FLAG_TC7 ((uint32_t)0x02000000) -#define DMA_FLAG_HT7 ((uint32_t)0x04000000) -#define DMA_FLAG_TE7 ((uint32_t)0x08000000) -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup DMA_Exported_Macros DMA Exported Macros - * @{ - */ - -/** @brief Reset DMA handle state. - * @param __HANDLE__: DMA handle - * @retval None - */ -#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET) - -/** - * @brief Enable the specified DMA Channel. - * @param __HANDLE__: DMA handle - * @retval None - */ -#define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN) - -/** - * @brief Disable the specified DMA Channel. - * @param __HANDLE__: DMA handle - * @retval None - */ -#define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN) - - -/* Interrupt & Flag management */ - -/** - * @brief Return the current DMA Channel transfer complete flag. - * @param __HANDLE__: DMA handle - * @retval The specified transfer complete flag index. - */ - -#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ -(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TC5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TC6 :\ - DMA_FLAG_TC7) - -/** - * @brief Return the current DMA Channel half transfer complete flag. - * @param __HANDLE__: DMA handle - * @retval The specified half transfer complete flag index. - */ -#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ -(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_HT5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_HT6 :\ - DMA_FLAG_HT7) - -/** - * @brief Return the current DMA Channel transfer error flag. - * @param __HANDLE__: DMA handle - * @retval The specified transfer error flag index. - */ -#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ -(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TE5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TE6 :\ - DMA_FLAG_TE7) - -/** - * @brief Return the current DMA Channel Global interrupt flag. - * @param __HANDLE__: DMA handle - * @retval The specified transfer error flag index. - */ -#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ -(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_ISR_GIF1 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_ISR_GIF2 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_ISR_GIF3 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_ISR_GIF4 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_ISR_GIF5 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\ - ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_ISR_GIF6 :\ - DMA_ISR_GIF7) - -/** - * @brief Get the DMA Channel pending flags. - * @param __HANDLE__: DMA handle - * @param __FLAG__: Get the specified flag. - * This parameter can be any combination of the following values: - * @arg DMA_FLAG_TCx: Transfer complete flag - * @arg DMA_FLAG_HTx: Half transfer complete flag - * @arg DMA_FLAG_TEx: Transfer error flag - * @arg DMA_FLAG_GLx: Global interrupt flag - * Where x can be from 1 to 7 to select the DMA Channel x flag. - * @retval The state of FLAG (SET or RESET). - */ -#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \ - (DMA2->ISR & (__FLAG__)) : (DMA1->ISR & (__FLAG__))) - -/** - * @brief Clear the DMA Channel pending flags. - * @param __HANDLE__: DMA handle - * @param __FLAG__: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg DMA_FLAG_TCx: Transfer complete flag - * @arg DMA_FLAG_HTx: Half transfer complete flag - * @arg DMA_FLAG_TEx: Transfer error flag - * @arg DMA_FLAG_GLx: Global interrupt flag - * Where x can be from 1 to 7 to select the DMA Channel x flag. - * @retval None - */ -#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \ - (DMA2->IFCR = (__FLAG__)) : (DMA1->IFCR = (__FLAG__))) - -/** - * @brief Enable the specified DMA Channel interrupts. - * @param __HANDLE__: DMA handle - * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg DMA_IT_TC: Transfer complete interrupt mask - * @arg DMA_IT_HT: Half transfer complete interrupt mask - * @arg DMA_IT_TE: Transfer error interrupt mask - * @retval None - */ -#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__)) - -/** - * @brief Disable the specified DMA Channel interrupts. - * @param __HANDLE__: DMA handle - * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg DMA_IT_TC: Transfer complete interrupt mask - * @arg DMA_IT_HT: Half transfer complete interrupt mask - * @arg DMA_IT_TE: Transfer error interrupt mask - * @retval None - */ -#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified DMA Channel interrupt is enabled or not. - * @param __HANDLE__: DMA handle - * @param __INTERRUPT__: specifies the DMA interrupt source to check. - * This parameter can be one of the following values: - * @arg DMA_IT_TC: Transfer complete interrupt mask - * @arg DMA_IT_HT: Half transfer complete interrupt mask - * @arg DMA_IT_TE: Transfer error interrupt mask - * @retval The state of DMA_IT (SET or RESET). - */ -#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__))) - -/** - * @brief Return the number of remaining data units in the current DMA Channel transfer. - * @param __HANDLE__: DMA handle - * @retval The number of remaining data units in the current DMA Channel transfer. - */ -#define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR) - -/** - * @} - */ - -#if defined(DMAMUX1) -/* Include DMA HAL Extension module */ -#include "stm32l4xx_hal_dma_ex.h" -#endif /* DMAMUX1 */ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup DMA_Exported_Functions - * @{ - */ - -/** @addtogroup DMA_Exported_Functions_Group1 - * @{ - */ -/* Initialization and de-initialization functions *****************************/ -HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma); -HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma); -/** - * @} - */ - -/** @addtogroup DMA_Exported_Functions_Group2 - * @{ - */ -/* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); -HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); -HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma); -HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma); -HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout); -void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma); -HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma)); -HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID); - -/** - * @} - */ - -/** @addtogroup DMA_Exported_Functions_Group3 - * @{ - */ -/* Peripheral State and Error functions ***************************************/ -HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma); -uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma); -/** - * @} - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup DMA_Private_Macros DMA Private Macros - * @{ - */ - -#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \ - ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \ - ((DIRECTION) == DMA_MEMORY_TO_MEMORY)) - -#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) - -#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \ - ((STATE) == DMA_PINC_DISABLE)) - -#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \ - ((STATE) == DMA_MINC_DISABLE)) - -#if !defined (DMAMUX1) - -#define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \ - ((REQUEST) == DMA_REQUEST_1) || \ - ((REQUEST) == DMA_REQUEST_2) || \ - ((REQUEST) == DMA_REQUEST_3) || \ - ((REQUEST) == DMA_REQUEST_4) || \ - ((REQUEST) == DMA_REQUEST_5) || \ - ((REQUEST) == DMA_REQUEST_6) || \ - ((REQUEST) == DMA_REQUEST_7)) -#endif - -#if defined(DMAMUX1) - -#define IS_DMA_ALL_REQUEST(REQUEST)((REQUEST) <= DMA_REQUEST_HASH_IN) - -#endif /* DMAMUX1 */ - -#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \ - ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \ - ((SIZE) == DMA_PDATAALIGN_WORD)) - -#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \ - ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \ - ((SIZE) == DMA_MDATAALIGN_WORD )) - -#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \ - ((MODE) == DMA_CIRCULAR)) - -#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \ - ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \ - ((PRIORITY) == DMA_PRIORITY_HIGH) || \ - ((PRIORITY) == DMA_PRIORITY_VERY_HIGH)) - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_DMA_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h deleted file mode 100644 index 0ce4b2ae..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h +++ /dev/null @@ -1,298 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dma_ex.h - * @author MCD Application Team - * @brief Header file of DMA HAL extension module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_DMA_EX_H -#define __STM32L4xx_HAL_DMA_EX_H - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(DMAMUX1) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup DMAEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup DMAEx_Exported_Types DMAEx Exported Types - * @{ - */ - -/** - * @brief HAL DMA Synchro definition - */ - - -/** - * @brief HAL DMAMUX Synchronization configuration structure definition - */ -typedef struct -{ - uint32_t SyncSignalID; /*!< Specifies the synchronization signal gating the DMA request in periodic mode. - This parameter can be a value of @ref DMAEx_DMAMUX_SyncSignalID_selection */ - - uint32_t SyncPolarity; /*!< Specifies the polarity of the signal on which the DMA request is synchronized. - This parameter can be a value of @ref DMAEx_DMAMUX_SyncPolarity_selection */ - - FunctionalState SyncEnable; /*!< Specifies if the synchronization shall be enabled or disabled - This parameter can take the value ENABLE or DISABLE*/ - - - FunctionalState EventEnable; /*!< Specifies if an event shall be generated once the RequestNumber is reached. - This parameter can take the value ENABLE or DISABLE */ - - uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be authorized after a sync event - This parameter must be a number between Min_Data = 1 and Max_Data = 32 */ - - -}HAL_DMA_MuxSyncConfigTypeDef; - - -/** - * @brief HAL DMAMUX request generator parameters structure definition - */ -typedef struct -{ - uint32_t SignalID; /*!< Specifies the ID of the signal used for DMAMUX request generator - This parameter can be a value of @ref DMAEx_DMAMUX_SignalGeneratorID_selection */ - - uint32_t Polarity; /*!< Specifies the polarity of the signal on which the request is generated. - This parameter can be a value of @ref DMAEx_DMAMUX_RequestGeneneratorPolarity_selection */ - - uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be generated after a signal event - This parameter must be a number between Min_Data = 1 and Max_Data = 32 */ - -}HAL_DMA_MuxRequestGeneratorConfigTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup DMAEx_Exported_Constants DMAEx Exported Constants - * @{ - */ - -/** @defgroup DMAEx_DMAMUX_SyncSignalID_selection DMAMUX SyncSignalID selection - * @{ - */ -#define HAL_DMAMUX1_SYNC_EXTI0 0U /*!< Synchronization Signal is EXTI0 IT */ -#define HAL_DMAMUX1_SYNC_EXTI1 1U /*!< Synchronization Signal is EXTI1 IT */ -#define HAL_DMAMUX1_SYNC_EXTI2 2U /*!< Synchronization Signal is EXTI2 IT */ -#define HAL_DMAMUX1_SYNC_EXTI3 3U /*!< Synchronization Signal is EXTI3 IT */ -#define HAL_DMAMUX1_SYNC_EXTI4 4U /*!< Synchronization Signal is EXTI4 IT */ -#define HAL_DMAMUX1_SYNC_EXTI5 5U /*!< Synchronization Signal is EXTI5 IT */ -#define HAL_DMAMUX1_SYNC_EXTI6 6U /*!< Synchronization Signal is EXTI6 IT */ -#define HAL_DMAMUX1_SYNC_EXTI7 7U /*!< Synchronization Signal is EXTI7 IT */ -#define HAL_DMAMUX1_SYNC_EXTI8 8U /*!< Synchronization Signal is EXTI8 IT */ -#define HAL_DMAMUX1_SYNC_EXTI9 9U /*!< Synchronization Signal is EXTI9 IT */ -#define HAL_DMAMUX1_SYNC_EXTI10 10U /*!< Synchronization Signal is EXTI10 IT */ -#define HAL_DMAMUX1_SYNC_EXTI11 11U /*!< Synchronization Signal is EXTI11 IT */ -#define HAL_DMAMUX1_SYNC_EXTI12 12U /*!< Synchronization Signal is EXTI12 IT */ -#define HAL_DMAMUX1_SYNC_EXTI13 13U /*!< Synchronization Signal is EXTI13 IT */ -#define HAL_DMAMUX1_SYNC_EXTI14 14U /*!< Synchronization Signal is EXTI14 IT */ -#define HAL_DMAMUX1_SYNC_EXTI15 15U /*!< Synchronization Signal is EXTI15 IT */ -#define HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT 16U /*!< Synchronization Signal is DMAMUX1 Channel0 Event */ -#define HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT 17U /*!< Synchronization Signal is DMAMUX1 Channel1 Event */ -#define HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT 18U /*!< Synchronization Signal is DMAMUX1 Channel2 Event */ -#define HAL_DMAMUX1_SYNC_DMAMUX1_CH3_EVT 19U /*!< Synchronization Signal is DMAMUX1 Channel3 Event */ -#define HAL_DMAMUX1_SYNC_LPTIM1_OUT 20U /*!< Synchronization Signal is LPTIM1 OUT */ -#define HAL_DMAMUX1_SYNC_LPTIM2_OUT 21U /*!< Synchronization Signal is LPTIM2 OUT */ -#define HAL_DMAMUX1_SYNC_DSI_TE 22U /*!< Synchronization Signal is DSI Tearing Effect */ -#define HAL_DMAMUX1_SYNC_DSI_EOT 23U /*!< Synchronization Signal is DSI End of refresh */ -#define HAL_DMAMUX1_SYNC_DMA2D_EOT 24U /*!< Synchronization Signal is DMA2D End of Transfer */ -#define HAL_DMAMUX1_SYNC_LDTC_IT 25U /*!< Synchronization Signal is LDTC IT */ - -/** - * @} - */ - -/** @defgroup DMAEx_DMAMUX_SyncPolarity_selection DMAMUX SyncPolarity selection - * @{ - */ -#define HAL_DMAMUX_SYNC_NO_EVENT 0U /*!< block synchronization events */ -#define HAL_DMAMUX_SYNC_RISING ((uint32_t)DMAMUX_CxCR_SPOL_0) /*!< synchronize with rising edge events */ -#define HAL_DMAMUX_SYNC_FALLING ((uint32_t)DMAMUX_CxCR_SPOL_1) /*!< synchronize with falling edge events */ -#define HAL_DMAMUX_SYNC_RISING_FALLING ((uint32_t)DMAMUX_CxCR_SPOL) /*!< synchronize with rising and falling edge events */ - -/** - * @} - */ - -/** @defgroup DMAEx_DMAMUX_SignalGeneratorID_selection DMAMUX SignalGeneratorID selection - * @{ - */ - -#define HAL_DMAMUX1_REQUEST_GEN_EXTI0 0U /*!< Request generator Signal is EXTI0 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI1 1U /*!< Request generator Signal is EXTI1 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI2 2U /*!< Request generator Signal is EXTI2 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI3 3U /*!< Request generator Signal is EXTI3 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI4 4U /*!< Request generator Signal is EXTI4 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI5 5U /*!< Request generator Signal is EXTI5 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI6 6U /*!< Request generator Signal is EXTI6 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI7 7U /*!< Request generator Signal is EXTI7 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI8 8U /*!< Request generator Signal is EXTI8 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI9 9U /*!< Request generator Signal is EXTI9 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI10 10U /*!< Request generator Signal is EXTI10 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI11 11U /*!< Request generator Signal is EXTI11 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI12 12U /*!< Request generator Signal is EXTI12 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI13 13U /*!< Request generator Signal is EXTI13 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI14 14U /*!< Request generator Signal is EXTI14 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_EXTI15 15U /*!< Request generator Signal is EXTI15 IT */ -#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT 16U /*!< Request generator Signal is DMAMUX1 Channel0 Event */ -#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT 17U /*!< Request generator Signal is DMAMUX1 Channel1 Event */ -#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT 18U /*!< Request generator Signal is DMAMUX1 Channel2 Event */ -#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH3_EVT 19U /*!< Request generator Signal is DMAMUX1 Channel3 Event */ -#define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT 20U /*!< Request generator Signal is LPTIM1 OUT */ -#define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT 21U /*!< Request generator Signal is LPTIM2 OUT */ -#define HAL_DMAMUX1_REQUEST_GEN_DSI_TE 22U /*!< Request generator Signal is DSI Tearing Effect */ -#define HAL_DMAMUX1_REQUEST_GEN_DSI_EOT 23U /*!< Request generator Signal is DSI End of refresh */ -#define HAL_DMAMUX1_REQUEST_GEN_DMA2D_EOT 24U /*!< Request generator Signal is DMA2D End of Transfer */ -#define HAL_DMAMUX1_REQUEST_GEN_LTDC_IT 25U /*!< Request generator Signal is LTDC IT */ - -/** - * @} - */ - -/** @defgroup DMAEx_DMAMUX_RequestGeneneratorPolarity_selection DMAMUX RequestGeneneratorPolarity selection - * @{ - */ -#define HAL_DMAMUX_REQUEST_GEN_NO_EVENT 0U /*!< block request generator events */ -#define HAL_DMAMUX_REQUEST_GEN_RISING DMAMUX_RGxCR_GPOL_0 /*!< generate request on rising edge events */ -#define HAL_DMAMUX_REQUEST_GEN_FALLING DMAMUX_RGxCR_GPOL_1 /*!< generate request on falling edge events */ -#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING DMAMUX_RGxCR_GPOL /*!< generate request on rising and falling edge events */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup DMAEx_Exported_Functions - * @{ - */ - -/* IO operation functions *****************************************************/ -/** @addtogroup DMAEx_Exported_Functions_Group1 - * @{ - */ - -/* ------------------------- REQUEST -----------------------------------------*/ -HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, - HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig); -HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma); -HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma); -/* -------------------------------------------------------------------------- */ - -/* ------------------------- SYNCHRO -----------------------------------------*/ -HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig); -/* -------------------------------------------------------------------------- */ - -void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma); - -/** - * @} - */ - -/** - * @} - */ - - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup DMAEx_Private_Macros DMAEx Private Macros - * @brief DMAEx private macros - * @{ - */ - -#define IS_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_SYNC_LDTC_IT) - -#define IS_DMAMUX_SYNC_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0) && ((REQUEST_NUMBER) <= 32)) - -#define IS_DMAMUX_SYNC_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_SYNC_NO_EVENT) || \ - ((POLARITY) == HAL_DMAMUX_SYNC_RISING) || \ - ((POLARITY) == HAL_DMAMUX_SYNC_FALLING) || \ - ((POLARITY) == HAL_DMAMUX_SYNC_RISING_FALLING)) - -#define IS_DMAMUX_SYNC_STATE(SYNC) (((SYNC) == DISABLE) || ((SYNC) == ENABLE)) - -#define IS_DMAMUX_SYNC_EVENT(EVENT) (((EVENT) == DISABLE) || \ - ((EVENT) == ENABLE)) - -#define IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_REQUEST_GEN_LTDC_IT) - -#define IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0) && ((REQUEST_NUMBER) <= 32)) - -#define IS_DMAMUX_REQUEST_GEN_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_REQUEST_GEN_NO_EVENT) || \ - ((POLARITY) == HAL_DMAMUX_REQUEST_GEN_RISING) || \ - ((POLARITY) == HAL_DMAMUX_REQUEST_GEN_FALLING) || \ - ((POLARITY) == HAL_DMAMUX_REQUEST_GEN_RISING_FALLING)) - -/** - * @} - */ - - -/** - * @} - */ - -/** - * @} - */ - -#endif /* DMAMUX1 */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_DMA_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h deleted file mode 100644 index ef4ea304..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h +++ /dev/null @@ -1,1022 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash.h - * @author MCD Application Team - * @brief Header file of FLASH HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_FLASH_H -#define __STM32L4xx_HAL_FLASH_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup FLASH - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup FLASH_Exported_Types FLASH Exported Types - * @{ - */ - -/** - * @brief FLASH Erase structure definition - */ -typedef struct -{ - uint32_t TypeErase; /*!< Mass erase or page erase. - This parameter can be a value of @ref FLASH_Type_Erase */ - uint32_t Banks; /*!< Select bank to erase. - This parameter must be a value of @ref FLASH_Banks - (FLASH_BANK_BOTH should be used only for mass erase) */ - uint32_t Page; /*!< Initial Flash page to erase when page erase is disabled - This parameter must be a value between 0 and (max number of pages in the bank - 1) - (eg : 255 for 1MB dual bank) */ - uint32_t NbPages; /*!< Number of pages to be erased. - This parameter must be a value between 1 and (max number of pages in the bank - value of initial page)*/ -} FLASH_EraseInitTypeDef; - -/** - * @brief FLASH Option Bytes Program structure definition - */ -typedef struct -{ - uint32_t OptionType; /*!< Option byte to be configured. - This parameter can be a combination of the values of @ref FLASH_OB_Type */ - uint32_t WRPArea; /*!< Write protection area to be programmed (used for OPTIONBYTE_WRP). - Only one WRP area could be programmed at the same time. - This parameter can be value of @ref FLASH_OB_WRP_Area */ - uint32_t WRPStartOffset; /*!< Write protection start offset (used for OPTIONBYTE_WRP). - This parameter must be a value between 0 and (max number of pages in the bank - 1) - (eg : 25 for 1MB dual bank) */ - uint32_t WRPEndOffset; /*!< Write protection end offset (used for OPTIONBYTE_WRP). - This parameter must be a value between WRPStartOffset and (max number of pages in the bank - 1) */ - uint32_t RDPLevel; /*!< Set the read protection level.. (used for OPTIONBYTE_RDP). - This parameter can be a value of @ref FLASH_OB_Read_Protection */ - uint32_t USERType; /*!< User option byte(s) to be configured (used for OPTIONBYTE_USER). - This parameter can be a combination of @ref FLASH_OB_USER_Type */ - uint32_t USERConfig; /*!< Value of the user option byte (used for OPTIONBYTE_USER). - This parameter can be a combination of @ref FLASH_OB_USER_BOR_LEVEL, - @ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY, - @ref FLASH_OB_USER_nRST_SHUTDOWN, @ref FLASH_OB_USER_IWDG_SW, - @ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY, - @ref FLASH_OB_USER_WWDG_SW, @ref FLASH_OB_USER_BFB2, - @ref FLASH_OB_USER_DUALBANK, @ref FLASH_OB_USER_nBOOT1, - @ref FLASH_OB_USER_SRAM2_PE and @ref FLASH_OB_USER_SRAM2_RST */ - uint32_t PCROPConfig; /*!< Configuration of the PCROP (used for OPTIONBYTE_PCROP). - This parameter must be a combination of @ref FLASH_Banks (except FLASH_BANK_BOTH) - and @ref FLASH_OB_PCROP_RDP */ - uint32_t PCROPStartAddr; /*!< PCROP Start address (used for OPTIONBYTE_PCROP). - This parameter must be a value between begin and end of bank - => Be careful of the bank swapping for the address */ - uint32_t PCROPEndAddr; /*!< PCROP End address (used for OPTIONBYTE_PCROP). - This parameter must be a value between PCROP Start address and end of bank */ -} FLASH_OBProgramInitTypeDef; - -/** - * @brief FLASH Procedure structure definition - */ -typedef enum -{ - FLASH_PROC_NONE = 0, - FLASH_PROC_PAGE_ERASE, - FLASH_PROC_MASS_ERASE, - FLASH_PROC_PROGRAM, - FLASH_PROC_PROGRAM_LAST -} FLASH_ProcedureTypeDef; - -/** - * @brief FLASH Cache structure definition - */ -typedef enum -{ - FLASH_CACHE_DISABLED = 0, - FLASH_CACHE_ICACHE_ENABLED, - FLASH_CACHE_DCACHE_ENABLED, - FLASH_CACHE_ICACHE_DCACHE_ENABLED -} FLASH_CacheTypeDef; - -/** - * @brief FLASH handle Structure definition - */ -typedef struct -{ - HAL_LockTypeDef Lock; /* FLASH locking object */ - __IO uint32_t ErrorCode; /* FLASH error code */ - __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /* Internal variable to indicate which procedure is ongoing or not in IT context */ - __IO uint32_t Address; /* Internal variable to save address selected for program in IT context */ - __IO uint32_t Bank; /* Internal variable to save current bank selected during erase in IT context */ - __IO uint32_t Page; /* Internal variable to define the current page which is erasing in IT context */ - __IO uint32_t NbPagesToErase; /* Internal variable to save the remaining pages to erase in IT context */ - __IO FLASH_CacheTypeDef CacheToReactivate; /* Internal variable to indicate which caches should be reactivated */ -}FLASH_ProcessTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup FLASH_Exported_Constants FLASH Exported Constants - * @{ - */ - -/** @defgroup FLASH_Error FLASH Error - * @{ - */ -#define HAL_FLASH_ERROR_NONE ((uint32_t)0x00000000) -#define HAL_FLASH_ERROR_OP ((uint32_t)0x00000001) -#define HAL_FLASH_ERROR_PROG ((uint32_t)0x00000002) -#define HAL_FLASH_ERROR_WRP ((uint32_t)0x00000004) -#define HAL_FLASH_ERROR_PGA ((uint32_t)0x00000008) -#define HAL_FLASH_ERROR_SIZ ((uint32_t)0x00000010) -#define HAL_FLASH_ERROR_PGS ((uint32_t)0x00000020) -#define HAL_FLASH_ERROR_MIS ((uint32_t)0x00000040) -#define HAL_FLASH_ERROR_FAST ((uint32_t)0x00000080) -#define HAL_FLASH_ERROR_RD ((uint32_t)0x00000100) -#define HAL_FLASH_ERROR_OPTV ((uint32_t)0x00000200) -#define HAL_FLASH_ERROR_ECCD ((uint32_t)0x00000400) -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define HAL_FLASH_ERROR_PEMPTY ((uint32_t)0x00000800) -#endif -/** - * @} - */ - -/** @defgroup FLASH_Type_Erase FLASH Erase Type - * @{ - */ -#define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!> 24) /*!< ECC Correction Interrupt source */ -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup FLASH_Exported_Macros FLASH Exported Macros - * @brief macros to control FLASH features - * @{ - */ - -/** - * @brief Set the FLASH Latency. - * @param __LATENCY__: FLASH Latency - * This parameter can be one of the following values : - * @arg FLASH_LATENCY_0: FLASH Zero wait state - * @arg FLASH_LATENCY_1: FLASH One wait state - * @arg FLASH_LATENCY_2: FLASH Two wait states - * @arg FLASH_LATENCY_3: FLASH Three wait states - * @arg FLASH_LATENCY_4: FLASH Four wait states - * @retval None - */ -#define __HAL_FLASH_SET_LATENCY(__LATENCY__) (MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (__LATENCY__))) - -/** - * @brief Get the FLASH Latency. - * @retval FLASH Latency - * This parameter can be one of the following values : - * @arg FLASH_LATENCY_0: FLASH Zero wait state - * @arg FLASH_LATENCY_1: FLASH One wait state - * @arg FLASH_LATENCY_2: FLASH Two wait states - * @arg FLASH_LATENCY_3: FLASH Three wait states - * @arg FLASH_LATENCY_4: FLASH Four wait states - */ -#define __HAL_FLASH_GET_LATENCY() READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) - -/** - * @brief Enable the FLASH prefetch buffer. - * @retval None - */ -#define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) - -/** - * @brief Disable the FLASH prefetch buffer. - * @retval None - */ -#define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) - -/** - * @brief Enable the FLASH instruction cache. - * @retval none - */ -#define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_ICEN) - -/** - * @brief Disable the FLASH instruction cache. - * @retval none - */ -#define __HAL_FLASH_INSTRUCTION_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN) - -/** - * @brief Enable the FLASH data cache. - * @retval none - */ -#define __HAL_FLASH_DATA_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_DCEN) - -/** - * @brief Disable the FLASH data cache. - * @retval none - */ -#define __HAL_FLASH_DATA_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCEN) - -/** - * @brief Reset the FLASH instruction Cache. - * @note This function must be used only when the Instruction Cache is disabled. - * @retval None - */ -#define __HAL_FLASH_INSTRUCTION_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_ICRST); \ - CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICRST); \ - } while (0) - -/** - * @brief Reset the FLASH data Cache. - * @note This function must be used only when the data Cache is disabled. - * @retval None - */ -#define __HAL_FLASH_DATA_CACHE_RESET() do { SET_BIT(FLASH->ACR, FLASH_ACR_DCRST); \ - CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCRST); \ - } while (0) - -/** - * @brief Enable the FLASH power down during Low-power run mode. - * @note Writing this bit to 0 this bit, automatically the keys are - * loss and a new unlock sequence is necessary to re-write it to 1. - */ -#define __HAL_FLASH_POWER_DOWN_ENABLE() do { WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); \ - WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); \ - SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \ - } while (0) - -/** - * @brief Disable the FLASH power down during Low-power run mode. - * @note Writing this bit to 0 this bit, automatically the keys are - * loss and a new unlock sequence is necessary to re-write it to 1. - */ -#define __HAL_FLASH_POWER_DOWN_DISABLE() do { WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1); \ - WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2); \ - CLEAR_BIT(FLASH->ACR, FLASH_ACR_RUN_PD); \ - } while (0) - -/** - * @brief Enable the FLASH power down during Low-Power sleep mode - * @retval none - */ -#define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) - -/** - * @brief Disable the FLASH power down during Low-Power sleep mode - * @retval none - */ -#define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) - -/** - * @} - */ - -/** @defgroup FLASH_Interrupt FLASH Interrupts Macros - * @brief macros to handle FLASH interrupts - * @{ - */ - -/** - * @brief Enable the specified FLASH interrupt. - * @param __INTERRUPT__: FLASH interrupt - * This parameter can be any combination of the following values: - * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt - * @arg FLASH_IT_OPERR: Error Interrupt - * @arg FLASH_IT_RDERR: PCROP Read Error Interrupt - * @arg FLASH_IT_ECCC: ECC Correction Interrupt - * @retval none - */ -#define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { if((__INTERRUPT__) & FLASH_IT_ECCC) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ - if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { SET_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ - } while(0) - -/** - * @brief Disable the specified FLASH interrupt. - * @param __INTERRUPT__: FLASH interrupt - * This parameter can be any combination of the following values: - * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt - * @arg FLASH_IT_OPERR: Error Interrupt - * @arg FLASH_IT_RDERR: PCROP Read Error Interrupt - * @arg FLASH_IT_ECCC: ECC Correction Interrupt - * @retval none - */ -#define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { if((__INTERRUPT__) & FLASH_IT_ECCC) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ - if((__INTERRUPT__) & (~FLASH_IT_ECCC)) { CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ - } while(0) - -/** - * @brief Check whether the specified FLASH flag is set or not. - * @param __FLAG__: specifies the FLASH flag to check. - * This parameter can be one of the following values: - * @arg FLASH_FLAG_EOP: FLASH End of Operation flag - * @arg FLASH_FLAG_OPERR: FLASH Operation error flag - * @arg FLASH_FLAG_PROGERR: FLASH Programming error flag - * @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag - * @arg FLASH_FLAG_PGAERR: FLASH Programming alignment error flag - * @arg FLASH_FLAG_SIZERR: FLASH Size error flag - * @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag - * @arg FLASH_FLAG_MISERR: FLASH Fast programming data miss error flag - * @arg FLASH_FLAG_FASTERR: FLASH Fast programming error flag - * @arg FLASH_FLAG_RDERR: FLASH PCROP read error flag - * @arg FLASH_FLAG_OPTVERR: FLASH Option validity error flag - * @arg FLASH_FLAG_BSY: FLASH write/erase operations in progress flag - * @arg FLASH_FLAG_PEMPTY : FLASH Boot from not programmed flash (apply only for STM32L43x/STM32L44x devices) - * @arg FLASH_FLAG_ECCC: FLASH one ECC error has been detected and corrected - * @arg FLASH_FLAG_ECCD: FLASH two ECC errors have been detected - * @retval The new state of FLASH_FLAG (SET or RESET). - */ -#define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) ? \ - (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \ - (READ_BIT(FLASH->SR, (__FLAG__)) == (__FLAG__))) - -/** - * @brief Clear the FLASH's pending flags. - * @param __FLAG__: specifies the FLASH flags to clear. - * This parameter can be any combination of the following values: - * @arg FLASH_FLAG_EOP: FLASH End of Operation flag - * @arg FLASH_FLAG_OPERR: FLASH Operation error flag - * @arg FLASH_FLAG_PROGERR: FLASH Programming error flag - * @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag - * @arg FLASH_FLAG_PGAERR: FLASH Programming alignment error flag - * @arg FLASH_FLAG_SIZERR: FLASH Size error flag - * @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag - * @arg FLASH_FLAG_MISERR: FLASH Fast programming data miss error flag - * @arg FLASH_FLAG_FASTERR: FLASH Fast programming error flag - * @arg FLASH_FLAG_RDERR: FLASH PCROP read error flag - * @arg FLASH_FLAG_OPTVERR: FLASH Option validity error flag - * @arg FLASH_FLAG_ECCC: FLASH one ECC error has been detected and corrected - * @arg FLASH_FLAG_ECCD: FLASH two ECC errors have been detected - * @arg FLASH_FLAG_ALL_ERRORS: FLASH All errors flags - * @retval None - */ -#define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { if((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { SET_BIT(FLASH->ECCR, ((__FLAG__) & (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD))); }\ - if((__FLAG__) & ~(FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)) { WRITE_REG(FLASH->SR, ((__FLAG__) & ~(FLASH_FLAG_ECCC | FLASH_FLAG_ECCD))); }\ - } while(0) -/** - * @} - */ - -/* Include FLASH HAL Extended module */ -#include "stm32l4xx_hal_flash_ex.h" -#include "stm32l4xx_hal_flash_ramfunc.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup FLASH_Exported_Functions - * @{ - */ - -/* Program operation functions ***********************************************/ -/** @addtogroup FLASH_Exported_Functions_Group1 - * @{ - */ -HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data); -HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data); -/* FLASH IRQ handler method */ -void HAL_FLASH_IRQHandler(void); -/* Callbacks in non blocking modes */ -void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); -void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); -/** - * @} - */ - -/* Peripheral Control functions **********************************************/ -/** @addtogroup FLASH_Exported_Functions_Group2 - * @{ - */ -HAL_StatusTypeDef HAL_FLASH_Unlock(void); -HAL_StatusTypeDef HAL_FLASH_Lock(void); -/* Option bytes control */ -HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); -HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); -HAL_StatusTypeDef HAL_FLASH_OB_Launch(void); -/** - * @} - */ - -/* Peripheral State functions ************************************************/ -/** @addtogroup FLASH_Exported_Functions_Group3 - * @{ - */ -uint32_t HAL_FLASH_GetError(void); -/** - * @} - */ - -/** - * @} - */ - -/* Private constants --------------------------------------------------------*/ -/** @defgroup FLASH_Private_Constants FLASH Private Constants - * @{ - */ -#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFF)) ? (0x800 << 10) : \ - (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) << 10)) -#elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFF)) ? (0x200 << 10) : \ - (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) << 10)) -#else -#define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFF)) ? (0x400 << 10) : \ - (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) << 10)) -#endif - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define FLASH_BANK_SIZE (FLASH_SIZE >> 1) -#else -#define FLASH_BANK_SIZE (FLASH_SIZE) -#endif - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define FLASH_PAGE_SIZE ((uint32_t)0x1000) -#define FLASH_PAGE_SIZE_128_BITS ((uint32_t)0x2000) -#else -#define FLASH_PAGE_SIZE ((uint32_t)0x800) -#endif - -#define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */ -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup FLASH_Private_Macros FLASH Private Macros - * @{ - */ - -#define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \ - ((VALUE) == FLASH_TYPEERASE_MASSERASE)) - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ - ((BANK) == FLASH_BANK_2) || \ - ((BANK) == FLASH_BANK_BOTH)) - -#define IS_FLASH_BANK_EXCLUSIVE(BANK) (((BANK) == FLASH_BANK_1) || \ - ((BANK) == FLASH_BANK_2)) -#else -#define IS_FLASH_BANK(BANK) ((BANK) == FLASH_BANK_1) - -#define IS_FLASH_BANK_EXCLUSIVE(BANK) ((BANK) == FLASH_BANK_1) -#endif - -#define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD) || \ - ((VALUE) == FLASH_TYPEPROGRAM_FAST) || \ - ((VALUE) == FLASH_TYPEPROGRAM_FAST_AND_LAST)) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_BASE+0x1FFFFF)) -#else -#define IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x400) ? \ - ((ADDRESS) <= FLASH_BASE+0xFFFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? \ - ((ADDRESS) <= FLASH_BASE+0x7FFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? \ - ((ADDRESS) <= FLASH_BASE+0x3FFFF) : ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? \ - ((ADDRESS) <= FLASH_BASE+0x1FFFF) : ((ADDRESS) <= FLASH_BASE+0xFFFFF)))))) -#endif - -#define IS_FLASH_OTP_ADDRESS(ADDRESS) (((ADDRESS) >= 0x1FFF7000) && ((ADDRESS) <= 0x1FFF73FF)) - -#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) || IS_FLASH_OTP_ADDRESS(ADDRESS)) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_FLASH_PAGE(PAGE) ((PAGE) < 256) -#elif defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) -#define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x400) ? ((PAGE) < 256) : \ - ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? ((PAGE) < 128) : \ - ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 64) : \ - ((PAGE) < 256))))) -#elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x200) ? ((PAGE) < 256) : \ - ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 128) : \ - ((PAGE) < 256)))) -#else -#define IS_FLASH_PAGE(PAGE) (((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x100) ? ((PAGE) < 128) : \ - ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0FFF)) == 0x80) ? ((PAGE) < 64) : \ - ((PAGE) < 128)))) -#endif - -#define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_PCROP))) - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB) || \ - ((VALUE) == OB_WRPAREA_BANK2_AREAA) || ((VALUE) == OB_WRPAREA_BANK2_AREAB)) -#else -#define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB)) -#endif - -#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ - ((LEVEL) == OB_RDP_LEVEL_1)/* ||\ - ((LEVEL) == OB_RDP_LEVEL_2)*/) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0xFFFF) && ((TYPE) != 0)) -#elif defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) -#define IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0x1FFF) && ((TYPE) != 0)) -#else -#define IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0x7E7F) && ((TYPE) != 0) && (((TYPE)&0x0180) == 0)) -#endif - -#define IS_OB_USER_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL_0) || ((LEVEL) == OB_BOR_LEVEL_1) || \ - ((LEVEL) == OB_BOR_LEVEL_2) || ((LEVEL) == OB_BOR_LEVEL_3) || \ - ((LEVEL) == OB_BOR_LEVEL_4)) - -#define IS_OB_USER_STOP(VALUE) (((VALUE) == OB_STOP_RST) || ((VALUE) == OB_STOP_NORST)) - -#define IS_OB_USER_STANDBY(VALUE) (((VALUE) == OB_STANDBY_RST) || ((VALUE) == OB_STANDBY_NORST)) - -#define IS_OB_USER_SHUTDOWN(VALUE) (((VALUE) == OB_SHUTDOWN_RST) || ((VALUE) == OB_SHUTDOWN_NORST)) - -#define IS_OB_USER_IWDG(VALUE) (((VALUE) == OB_IWDG_HW) || ((VALUE) == OB_IWDG_SW)) - -#define IS_OB_USER_IWDG_STOP(VALUE) (((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG_STOP_RUN)) - -#define IS_OB_USER_IWDG_STDBY(VALUE) (((VALUE) == OB_IWDG_STDBY_FREEZE) || ((VALUE) == OB_IWDG_STDBY_RUN)) - -#define IS_OB_USER_WWDG(VALUE) (((VALUE) == OB_WWDG_HW) || ((VALUE) == OB_WWDG_SW)) - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_OB_USER_BFB2(VALUE) (((VALUE) == OB_BFB2_DISABLE) || ((VALUE) == OB_BFB2_ENABLE)) - -#define IS_OB_USER_DUALBANK(VALUE) (((VALUE) == OB_DUALBANK_SINGLE) || ((VALUE) == OB_DUALBANK_DUAL)) -#endif - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_OB_USER_DBANK(VALUE) (((VALUE) == OB_DBANK_128_BITS) || ((VALUE) == OB_DBANK_64_BITS)) -#endif - -#define IS_OB_USER_BOOT1(VALUE) (((VALUE) == OB_BOOT1_SRAM) || ((VALUE) == OB_BOOT1_SYSTEM)) - -#define IS_OB_USER_SRAM2_PARITY(VALUE) (((VALUE) == OB_SRAM2_PARITY_ENABLE) || ((VALUE) == OB_SRAM2_PARITY_DISABLE)) - -#define IS_OB_USER_SRAM2_RST(VALUE) (((VALUE) == OB_SRAM2_RST_ERASE) || ((VALUE) == OB_SRAM2_RST_NOT_ERASE)) - -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || \ - defined (STM32L443xx) || defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_OB_USER_SWBOOT0(VALUE) (((VALUE) == OB_BOOT0_FROM_OB) || ((VALUE) == OB_BOOT0_FROM_PIN)) - -#define IS_OB_USER_BOOT0(VALUE) (((VALUE) == OB_BOOT0_RESET) || ((VALUE) == OB_BOOT0_SET)) -#endif - -#define IS_OB_PCROP_RDP(VALUE) (((VALUE) == OB_PCROP_RDP_NOT_ERASE) || ((VALUE) == OB_PCROP_RDP_ERASE)) - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || ((LATENCY) == FLASH_LATENCY_1) || \ - ((LATENCY) == FLASH_LATENCY_2) || ((LATENCY) == FLASH_LATENCY_3) || \ - ((LATENCY) == FLASH_LATENCY_4) || ((LATENCY) == FLASH_LATENCY_5) || \ - ((LATENCY) == FLASH_LATENCY_6) || ((LATENCY) == FLASH_LATENCY_7) || \ - ((LATENCY) == FLASH_LATENCY_8) || ((LATENCY) == FLASH_LATENCY_9) || \ - ((LATENCY) == FLASH_LATENCY_10) || ((LATENCY) == FLASH_LATENCY_11) || \ - ((LATENCY) == FLASH_LATENCY_12) || ((LATENCY) == FLASH_LATENCY_13) || \ - ((LATENCY) == FLASH_LATENCY_14) || ((LATENCY) == FLASH_LATENCY_15)) -#else -#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ - ((LATENCY) == FLASH_LATENCY_1) || \ - ((LATENCY) == FLASH_LATENCY_2) || \ - ((LATENCY) == FLASH_LATENCY_3) || \ - ((LATENCY) == FLASH_LATENCY_4)) -#endif -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_FLASH_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h deleted file mode 100644 index 63d5c9fc..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h +++ /dev/null @@ -1,134 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash_ex.h - * @author MCD Application Team - * @brief Header file of FLASH HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_FLASH_EX_H -#define __STM32L4xx_HAL_FLASH_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup FLASHEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/* Exported constants --------------------------------------------------------*/ -#if defined (FLASH_CFGR_LVEN) -/** @addtogroup FLASHEx_Exported_Constants - * @{ - */ -/** @defgroup FLASHEx_LVE_PIN_CFG FLASHEx LVE pin configuration - * @{ - */ -#define FLASH_LVE_PIN_CTRL 0x00000000U /*!< LVE FLASH pin controlled by power controller */ -#define FLASH_LVE_PIN_FORCED FLASH_CFGR_LVEN /*!< LVE FLASH pin enforced to low (external SMPS used) */ -/** - * @} - */ - -/** - * @} - */ -#endif /* FLASH_CFGR_LVEN */ - -/* Exported macro ------------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup FLASHEx_Exported_Functions - * @{ - */ - -/* Extended Program operation functions *************************************/ -/** @addtogroup FLASHEx_Exported_Functions_Group1 - * @{ - */ -HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); -HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); -HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); -void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); -/** - * @} - */ - -#if defined (FLASH_CFGR_LVEN) -/** @addtogroup FLASHEx_Exported_Functions_Group2 - * @{ - */ -HAL_StatusTypeDef HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE); -/** - * @} - */ -#endif /* FLASH_CFGR_LVEN */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** - @cond 0 - */ -#if defined (FLASH_CFGR_LVEN) -#define IS_FLASH_LVE_PIN(CFG) (((CFG) == FLASH_LVE_PIN_CTRL) || ((CFG) == FLASH_LVE_PIN_FORCED)) -#endif /* FLASH_CFGR_LVEN */ -/** - @endcond - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_FLASH_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h deleted file mode 100644 index 723157f5..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h +++ /dev/null @@ -1,126 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash_ramfunc.h - * @author MCD Application Team - * @brief Header file of FLASH RAMFUNC driver. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_FLASH_RAMFUNC_H -#define __STM32L4xx_FLASH_RAMFUNC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup FLASH_RAMFUNC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/** - * @brief __RAM_FUNC definition - */ -#if defined ( __CC_ARM ) -/* ARM Compiler - ------------ - RAM functions are defined using the toolchain options. - Functions that are executed in RAM should reside in a separate source module. - Using the 'Options for File' dialog you can simply change the 'Code / Const' - area of a module to a memory space in physical RAM. - Available memory areas are declared in the 'Target' tab of the 'Options for Target' - dialog. -*/ -#define __RAM_FUNC HAL_StatusTypeDef - -#elif defined ( __ICCARM__ ) -/* ICCARM Compiler - --------------- - RAM functions are defined using a specific toolchain keyword "__ramfunc". -*/ -#define __RAM_FUNC __ramfunc HAL_StatusTypeDef - -#elif defined ( __GNUC__ ) -/* GNU Compiler - ------------ - RAM functions are defined using a specific toolchain attribute - "__attribute__((section(".RamFunc")))". -*/ -#define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc"))) - -#endif - - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup FLASH_RAMFUNC_Exported_Functions - * @{ - */ - -/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1 - * @{ - */ -/* Peripheral Control functions ************************************************/ -__RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void); -__RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void); -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -__RAM_FUNC HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig); -#endif -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_FLASH_RAMFUNC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h deleted file mode 100644 index bfae10d9..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h +++ /dev/null @@ -1,316 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_gpio.h - * @author MCD Application Team - * @brief Header file of GPIO HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_GPIO_H -#define __STM32L4xx_HAL_GPIO_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup GPIO - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup GPIO_Exported_Types GPIO Exported Types - * @{ - */ -/** - * @brief GPIO Init structure definition - */ -typedef struct -{ - uint32_t Pin; /*!< Specifies the GPIO pins to be configured. - This parameter can be any value of @ref GPIO_pins */ - - uint32_t Mode; /*!< Specifies the operating mode for the selected pins. - This parameter can be a value of @ref GPIO_mode */ - - uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins. - This parameter can be a value of @ref GPIO_pull */ - - uint32_t Speed; /*!< Specifies the speed for the selected pins. - This parameter can be a value of @ref GPIO_speed */ - - uint32_t Alternate; /*!< Peripheral to be connected to the selected pins - This parameter can be a value of @ref GPIOEx_Alternate_function_selection */ -}GPIO_InitTypeDef; - -/** - * @brief GPIO Bit SET and Bit RESET enumeration - */ -typedef enum -{ - GPIO_PIN_RESET = 0, - GPIO_PIN_SET -}GPIO_PinState; -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup GPIO_Exported_Constants GPIO Exported Constants - * @{ - */ -/** @defgroup GPIO_pins GPIO pins - * @{ - */ -#define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */ -#define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */ -#define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */ -#define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */ -#define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */ -#define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */ -#define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */ -#define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */ -#define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */ -#define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */ -#define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */ -#define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */ -#define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */ -#define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */ -#define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */ -#define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */ -#define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */ - -#define GPIO_PIN_MASK ((uint32_t)0x0000FFFF) /* PIN mask for assert test */ -/** - * @} - */ - -/** @defgroup GPIO_mode GPIO mode - * @brief GPIO Configuration Mode - * Elements values convention: 0xX0yz00YZ - * - X : GPIO mode or EXTI Mode - * - y : External IT or Event trigger detection - * - z : IO configuration on External IT or Event - * - Y : Output type (Push Pull or Open Drain) - * - Z : IO Direction mode (Input, Output, Alternate or Analog) - * @{ - */ -#define GPIO_MODE_INPUT ((uint32_t)0x00000000) /*!< Input Floating Mode */ -#define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001) /*!< Output Push Pull Mode */ -#define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011) /*!< Output Open Drain Mode */ -#define GPIO_MODE_AF_PP ((uint32_t)0x00000002) /*!< Alternate Function Push Pull Mode */ -#define GPIO_MODE_AF_OD ((uint32_t)0x00000012) /*!< Alternate Function Open Drain Mode */ -#define GPIO_MODE_ANALOG ((uint32_t)0x00000003) /*!< Analog Mode */ -#define GPIO_MODE_ANALOG_ADC_CONTROL ((uint32_t)0x0000000B) /*!< Analog Mode for ADC conversion */ -#define GPIO_MODE_IT_RISING ((uint32_t)0x10110000) /*!< External Interrupt Mode with Rising edge trigger detection */ -#define GPIO_MODE_IT_FALLING ((uint32_t)0x10210000) /*!< External Interrupt Mode with Falling edge trigger detection */ -#define GPIO_MODE_IT_RISING_FALLING ((uint32_t)0x10310000) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ -#define GPIO_MODE_EVT_RISING ((uint32_t)0x10120000) /*!< External Event Mode with Rising edge trigger detection */ -#define GPIO_MODE_EVT_FALLING ((uint32_t)0x10220000) /*!< External Event Mode with Falling edge trigger detection */ -#define GPIO_MODE_EVT_RISING_FALLING ((uint32_t)0x10320000) /*!< External Event Mode with Rising/Falling edge trigger detection */ -/** - * @} - */ - -/** @defgroup GPIO_speed GPIO speed - * @brief GPIO Output Maximum frequency - * @{ - */ -#define GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000) /*!< range up to 5 MHz, please refer to the product datasheet */ -#define GPIO_SPEED_FREQ_MEDIUM ((uint32_t)0x00000001) /*!< range 5 MHz to 25 MHz, please refer to the product datasheet */ -#define GPIO_SPEED_FREQ_HIGH ((uint32_t)0x00000002) /*!< range 25 MHz to 50 MHz, please refer to the product datasheet */ -#define GPIO_SPEED_FREQ_VERY_HIGH ((uint32_t)0x00000003) /*!< range 50 MHz to 80 MHz, please refer to the product datasheet */ -/** - * @} - */ - - /** @defgroup GPIO_pull GPIO pull - * @brief GPIO Pull-Up or Pull-Down Activation - * @{ - */ -#define GPIO_NOPULL ((uint32_t)0x00000000) /*!< No Pull-up or Pull-down activation */ -#define GPIO_PULLUP ((uint32_t)0x00000001) /*!< Pull-up activation */ -#define GPIO_PULLDOWN ((uint32_t)0x00000002) /*!< Pull-down activation */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup GPIO_Exported_Macros GPIO Exported Macros - * @{ - */ - -/** - * @brief Check whether the specified EXTI line flag is set or not. - * @param __EXTI_LINE__: specifies the EXTI line flag to check. - * This parameter can be GPIO_PIN_x where x can be(0..15) - * @retval The new state of __EXTI_LINE__ (SET or RESET). - */ -#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR1 & (__EXTI_LINE__)) - -/** - * @brief Clear the EXTI's line pending flags. - * @param __EXTI_LINE__: specifies the EXTI lines flags to clear. - * This parameter can be any combination of GPIO_PIN_x where x can be (0..15) - * @retval None - */ -#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR1 = (__EXTI_LINE__)) - -/** - * @brief Check whether the specified EXTI line is asserted or not. - * @param __EXTI_LINE__: specifies the EXTI line to check. - * This parameter can be GPIO_PIN_x where x can be(0..15) - * @retval The new state of __EXTI_LINE__ (SET or RESET). - */ -#define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR1 & (__EXTI_LINE__)) - -/** - * @brief Clear the EXTI's line pending bits. - * @param __EXTI_LINE__: specifies the EXTI lines to clear. - * This parameter can be any combination of GPIO_PIN_x where x can be (0..15) - * @retval None - */ -#define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR1 = (__EXTI_LINE__)) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @param __EXTI_LINE__: specifies the EXTI line to check. - * This parameter can be GPIO_PIN_x where x can be(0..15) - * @retval None - */ -#define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER1 |= (__EXTI_LINE__)) - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup GPIO_Private_Macros GPIO Private Macros - * @{ - */ -#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET)) - -#define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_PIN_MASK) != (uint32_t)0x00) &&\ - (((__PIN__) & ~GPIO_PIN_MASK) == (uint32_t)0x00)) - -#define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\ - ((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\ - ((__MODE__) == GPIO_MODE_OUTPUT_OD) ||\ - ((__MODE__) == GPIO_MODE_AF_PP) ||\ - ((__MODE__) == GPIO_MODE_AF_OD) ||\ - ((__MODE__) == GPIO_MODE_IT_RISING) ||\ - ((__MODE__) == GPIO_MODE_IT_FALLING) ||\ - ((__MODE__) == GPIO_MODE_IT_RISING_FALLING) ||\ - ((__MODE__) == GPIO_MODE_EVT_RISING) ||\ - ((__MODE__) == GPIO_MODE_EVT_FALLING) ||\ - ((__MODE__) == GPIO_MODE_EVT_RISING_FALLING) ||\ - ((__MODE__) == GPIO_MODE_ANALOG) ||\ - ((__MODE__) == GPIO_MODE_ANALOG_ADC_CONTROL)) - -#define IS_GPIO_SPEED(__SPEED__) (((__SPEED__) == GPIO_SPEED_FREQ_LOW) ||\ - ((__SPEED__) == GPIO_SPEED_FREQ_MEDIUM) ||\ - ((__SPEED__) == GPIO_SPEED_FREQ_HIGH) ||\ - ((__SPEED__) == GPIO_SPEED_FREQ_VERY_HIGH)) - -#define IS_GPIO_PULL(__PULL__) (((__PULL__) == GPIO_NOPULL) ||\ - ((__PULL__) == GPIO_PULLUP) || \ - ((__PULL__) == GPIO_PULLDOWN)) -/** - * @} - */ - -/* Include GPIO HAL Extended module */ -#include "stm32l4xx_hal_gpio_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup GPIO_Exported_Functions GPIO Exported Functions - * @{ - */ - -/** @addtogroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions - * @brief Initialization and Configuration functions - * @{ - */ - -/* Initialization and de-initialization functions *****************************/ -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init); -void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); - -/** - * @} - */ - -/** @addtogroup GPIO_Exported_Functions_Group2 IO operation functions - * @{ - */ - -/* IO operation functions *****************************************************/ -GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState); -void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin); -void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_GPIO_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h deleted file mode 100644 index db5d8d76..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h +++ /dev/null @@ -1,822 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_gpio_ex.h - * @author MCD Application Team - * @brief Header file of GPIO HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_GPIO_EX_H -#define __STM32L4xx_HAL_GPIO_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup GPIOEx GPIOEx - * @brief GPIO Extended HAL module driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/** @defgroup GPIOEx_Exported_Constants GPIOEx Exported Constants - * @{ - */ - -/** @defgroup GPIOEx_Alternate_function_selection GPIOEx Alternate function selection - * @{ - */ - -#if defined(STM32L431xx) || defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) -/*--------------STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/STM32L443xx---*/ -/** - * @brief AF 0 selection - */ -#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ -#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ -#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ -#if defined(STM32L433xx) || defined(STM32L443xx) -#define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */ -#endif /* STM32L433xx || STM32L443xx */ -#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ - -/** - * @brief AF 1 selection - */ -#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ -#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ -#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ -#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ - -/** - * @brief AF 2 selection - */ -#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ -#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ - -/** - * @brief AF 3 selection - */ -#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART1 Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 4 selection - */ -#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ -#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ -#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ - -/** - * @brief AF 5 selection - */ -#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ -#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ - -/** - * @brief AF 6 selection - */ -#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ -#define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */ - -/** - * @brief AF 7 selection - */ -#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ -#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ -#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ - -/** - * @brief AF 8 selection - */ -#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ - -/** - * @brief AF 9 selection - */ -#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ -#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ - -/** - * @brief AF 10 selection - */ -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) -#define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */ -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */ -#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ - -#if defined(STM32L433xx) || defined(STM32L443xx) -/** - * @brief AF 11 selection - */ -#define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */ -#endif /* STM32L433xx || STM32L443xx */ - -/** - * @brief AF 12 selection - */ -#define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */ -#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ -#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ -#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ - -/** - * @brief AF 13 selection - */ -#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ - -/** - * @brief AF 14 selection - */ -#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ -#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ -#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ - -/** - * @brief AF 15 selection - */ -#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ - -#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) - -#endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */ - -#if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) -/*--------------STM32L451xx/STM32L452xx/STM32L462xx---------------------------*/ -/** - * @brief AF 0 selection - */ -#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ -#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ -#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ -#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ - -/** - * @brief AF 1 selection - */ -#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ -#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ -#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ -#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ - -/** - * @brief AF 2 selection - */ -#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ -#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ -#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ -#define GPIO_AF2_I2C4 ((uint8_t)0x02) /* I2C4 Alternate Function mapping */ - -/** - * @brief AF 3 selection - */ -#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */ -#define GPIO_AF3_CAN1 ((uint8_t)0x03) /* CAN1 Alternate Function mapping */ -#define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */ - -/** - * @brief AF 4 selection - */ -#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ -#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ -#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ -#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */ - -/** - * @brief AF 5 selection - */ -#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ -#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ -#define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */ - -/** - * @brief AF 6 selection - */ -#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ -#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ -#define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */ - -/** - * @brief AF 7 selection - */ -#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ -#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ -#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ - -/** - * @brief AF 8 selection - */ -#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ -#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ -#define GPIO_AF8_CAN1 ((uint8_t)0x08) /* CAN1 Alternate Function mapping */ - - -/** - * @brief AF 9 selection - */ -#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ -#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ - -/** - * @brief AF 10 selection - */ -#if defined(STM32L452xx) || defined(STM32L462xx) -#define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */ -#endif /* STM32L452xx || STM32L462xx */ -#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ -#define GPIO_AF10_CAN1 ((uint8_t)0x0A) /* CAN1 Alternate Function mapping */ - -/** - * @brief AF 11 selection - */ - -/** - * @brief AF 12 selection - */ -#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ -#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ -#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ - -/** - * @brief AF 13 selection - */ -#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ - -/** - * @brief AF 14 selection - */ -#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ -#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ -#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */ -#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ - -/** - * @brief AF 15 selection - */ -#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ - -#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) - -#endif /* STM32L451xx || STM32L452xx || STM32L462xx */ - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) -/*--------------STM32L471xx/STM32L475xx/STM32L476xx/STM32L485xx/STM32L486xx---*/ -/** - * @brief AF 0 selection - */ -#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ -#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ -#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ -#if defined(STM32L476xx) || defined(STM32L486xx) -#define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */ -#endif /* STM32L476xx || STM32L486xx */ -#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ - -/** - * @brief AF 1 selection - */ -#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ -#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ -#define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */ -#define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */ -#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ -#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ - -/** - * @brief AF 2 selection - */ -#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ -#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ -#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ -#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ -#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ - -/** - * @brief AF 3 selection - */ -#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 4 selection - */ -#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ -#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ -#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ - -/** - * @brief AF 5 selection - */ -#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ -#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ - -/** - * @brief AF 6 selection - */ -#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ -#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ - -/** - * @brief AF 7 selection - */ -#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ -#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ -#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ - -/** - * @brief AF 8 selection - */ -#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ -#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */ -#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ - - -/** - * @brief AF 9 selection - */ -#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ -#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ - -/** - * @brief AF 10 selection - */ -#if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) -#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */ -#endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ -#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ - -#if defined(STM32L476xx) || defined(STM32L486xx) -/** - * @brief AF 11 selection - */ -#define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */ -#endif /* STM32L476xx || STM32L486xx */ - -/** - * @brief AF 12 selection - */ -#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */ -#define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */ -#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ -#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ -#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ - -/** - * @brief AF 13 selection - */ -#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ -#define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */ -#define GPIO_AF13_TIM8_COMP2 ((uint8_t)0x0D) /* TIM8/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 14 selection - */ -#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ -#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ -#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */ -#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM8_COMP1 ((uint8_t)0x0E) /* TIM8/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 15 selection - */ -#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ - -#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - -#if defined(STM32L496xx) || defined(STM32L4A6xx) -/*--------------------------------STM32L496xx/STM32L4A6xx---------------------*/ -/** - * @brief AF 0 selection - */ -#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ -#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ -#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ -#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ - -/** - * @brief AF 1 selection - */ -#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ -#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ -#define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */ -#define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */ -#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ -#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ - -/** - * @brief AF 2 selection - */ -#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ -#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ -#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ -#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ -#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ -#define GPIO_AF2_I2C4 ((uint8_t)0x02) /* I2C4 Alternate Function mapping */ - -/** - * @brief AF 3 selection - */ -#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF3_CAN2 ((uint8_t)0x03) /* CAN2 Alternate Function mapping */ -#define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */ -#define GPIO_AF3_QUADSPI ((uint8_t)0x03) /* QUADSPI Alternate Function mapping */ -#define GPIO_AF3_SPI2 ((uint8_t)0x03) /* SPI2 Alternate Function mapping */ -#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */ - -/** - * @brief AF 4 selection - */ -#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ -#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ -#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ -#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */ -#define GPIO_AF4_DCMI ((uint8_t)0x04) /* DCMI Alternate Function mapping */ - -/** - * @brief AF 5 selection - */ -#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ -#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ -#define GPIO_AF5_DCMI ((uint8_t)0x05) /* DCMI Alternate Function mapping */ -#define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */ -#define GPIO_AF5_QUADSPI ((uint8_t)0x05) /* QUADSPI Alternate Function mapping */ - -/** - * @brief AF 6 selection - */ -#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ -#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ -#define GPIO_AF6_I2C3 ((uint8_t)0x06) /* I2C3 Alternate Function mapping */ - -/** - * @brief AF 7 selection - */ -#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ -#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ -#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ - -/** - * @brief AF 8 selection - */ -#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ -#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */ -#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ -#define GPIO_AF8_CAN2 ((uint8_t)0x08) /* CAN2 Alternate Function mapping */ - -/** - * @brief AF 9 selection - */ -#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ -#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ - -/** - * @brief AF 10 selection - */ -#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */ -#define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */ -#define GPIO_AF10_CAN2 ((uint8_t)0x0A) /* CAN2 Alternate Function mapping */ -#define GPIO_AF10_DCMI ((uint8_t)0x0A) /* DCMI Alternate Function mapping */ - -/** - * @brief AF 11 selection - */ -#define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */ - -/** - * @brief AF 12 selection - */ -#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */ -#define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */ -#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ -#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ -#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ -#define GPIO_AF12_TIM1_COMP2 ((uint8_t)0x0C) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF12_TIM1_COMP1 ((uint8_t)0x0C) /* TIM1/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF12_TIM8_COMP2 ((uint8_t)0x0C) /* TIM8/COMP2 Break in Alternate Function mapping */ - -/** - * @brief AF 13 selection - */ -#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ -#define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */ -#define GPIO_AF13_TIM8_COMP2 ((uint8_t)0x0D) /* TIM8/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 14 selection - */ -#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ -#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ -#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */ -#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM8_COMP1 ((uint8_t)0x0E) /* TIM8/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 15 selection - */ -#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ - -#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) - -#endif /* STM32L496xx || STM32L4A6xx */ - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -/*---STM32L4R5xx/STM32L4R7xx/STM32L4R9xx/STM32L4S5xx/STM32L4S7xx/STM32L4S9xx--*/ -/** - * @brief AF 0 selection - */ -#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ -#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ -#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ -#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ - -/** - * @brief AF 1 selection - */ -#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ -#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ -#define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */ -#define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */ -#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */ -#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */ - -/** - * @brief AF 2 selection - */ -#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */ -#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */ -#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ -#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ -#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ - -/** - * @brief AF 3 selection - */ -#define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */ -#define GPIO_AF3_OCTOSPIM_P1 ((uint8_t)0x03) /* OctoSPI Manager Port 1 Alternate Function mapping */ -#define GPIO_AF3_SAI1 ((uint8_t)0x03) /* SAI1 Alternate Function mapping */ -#define GPIO_AF3_SPI2 ((uint8_t)0x03) /* SPI2 Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ -#define GPIO_AF3_TIM8_COMP1 ((uint8_t)0x03) /* TIM8/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF3_TIM8_COMP2 ((uint8_t)0x03) /* TIM8/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */ - -/** - * @brief AF 4 selection - */ -#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ -#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ -#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ -#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */ -#define GPIO_AF4_DCMI ((uint8_t)0x04) /* DCMI Alternate Function mapping */ - -/** - * @brief AF 5 selection - */ -#define GPIO_AF5_DCMI ((uint8_t)0x05) /* DCMI Alternate Function mapping */ -#define GPIO_AF5_DFSDM1 ((uint8_t)0x05) /* DFSDM1 Alternate Function mapping */ -#define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */ -#define GPIO_AF5_OCTOSPIM_P1 ((uint8_t)0x05) /* OctoSPI Manager Port 1 Alternate Function mapping */ -#define GPIO_AF5_OCTOSPIM_P2 ((uint8_t)0x05) /* OctoSPI Manager Port 2 Alternate Function mapping */ -#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */ -#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ -#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */ - -/** - * @brief AF 6 selection - */ -#define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ -#define GPIO_AF6_I2C3 ((uint8_t)0x06) /* I2C3 Alternate Function mapping */ -#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */ - -/** - * @brief AF 7 selection - */ -#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ -#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ -#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ - -/** - * @brief AF 8 selection - */ -#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */ -#define GPIO_AF8_SDMMC1 ((uint8_t)0x08) /* SDMMC1 Alternate Function mapping */ -#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ -#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */ - -/** - * @brief AF 9 selection - */ -#define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ -#define GPIO_AF9_LTDC ((uint8_t)0x09) /* LTDC Alternate Function mapping */ -#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */ - -/** - * @brief AF 10 selection - */ -#define GPIO_AF10_DCMI ((uint8_t)0x0A) /* DCMI Alternate Function mapping */ -#define GPIO_AF10_OCTOSPIM_P1 ((uint8_t)0x0A) /* OctoSPI Manager Port 1 Alternate Function mapping */ -#define GPIO_AF10_OCTOSPIM_P2 ((uint8_t)0x0A) /* OctoSPI Manager Port 2 Alternate Function mapping */ -#define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */ - -/** - * @brief AF 11 selection - */ -#define GPIO_AF11_DSI ((uint8_t)0x0B) /* DSI Alternate Function mapping */ -#define GPIO_AF11_LTDC ((uint8_t)0x0B) /* LTDC Alternate Function mapping */ - -/** - * @brief AF 12 selection - */ -#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */ -#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */ -#define GPIO_AF12_DSI ((uint8_t)0x0C) /* FMC Alternate Function mapping */ -#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */ -#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */ -#define GPIO_AF12_TIM1_COMP1 ((uint8_t)0x0C) /* TIM1/COMP1 Break in Alternate Function mapping */ -#define GPIO_AF12_TIM1_COMP2 ((uint8_t)0x0C) /* TIM1/COMP2 Break in Alternate Function mapping */ -#define GPIO_AF12_TIM8_COMP2 ((uint8_t)0x0C) /* TIM8/COMP2 Break in Alternate Function mapping */ - -/** - * @brief AF 13 selection - */ -#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */ -#define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */ -#define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */ - -/** - * @brief AF 14 selection - */ -#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */ -#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */ -#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */ -#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */ -#define GPIO_AF14_TIM8_COMP2 ((uint8_t)0x0E) /* TIM8/COMP2 Break in Alternate Function mapping */ - -/** - * @brief AF 15 selection - */ -#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ - -#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F) - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup GPIOEx_Exported_Macros GPIOEx Exported Macros - * @{ - */ - -/** @defgroup GPIOEx_Get_Port_Index GPIOEx_Get Port Index -* @{ - */ -#if defined(STM32L431xx) || defined(STM32L433xx) || defined(STM32L443xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U :\ - ((__GPIOx__) == (GPIOD))? 3U :\ - ((__GPIOx__) == (GPIOE))? 4U : 7U) - -#endif /* STM32L431xx || STM32L433xx || STM32L443xx */ - -#if defined(STM32L432xx) || defined(STM32L442xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U : 7U) - -#endif /* STM32L432xx || STM32L442xx */ - -#if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U :\ - ((__GPIOx__) == (GPIOD))? 3U :\ - ((__GPIOx__) == (GPIOE))? 4U : 7U) - -#endif /* STM32L451xx || STM32L452xx || STM32L462xx */ - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U :\ - ((__GPIOx__) == (GPIOD))? 3U :\ - ((__GPIOx__) == (GPIOE))? 4U :\ - ((__GPIOx__) == (GPIOF))? 5U :\ - ((__GPIOx__) == (GPIOG))? 6U : 7U) - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - -#if defined(STM32L496xx) || defined(STM32L4A6xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U :\ - ((__GPIOx__) == (GPIOD))? 3U :\ - ((__GPIOx__) == (GPIOE))? 4U :\ - ((__GPIOx__) == (GPIOF))? 5U :\ - ((__GPIOx__) == (GPIOG))? 6U :\ - ((__GPIOx__) == (GPIOH))? 7U : 8U) - -#endif /* STM32L496xx || STM32L4A6xx */ - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - -#define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ - ((__GPIOx__) == (GPIOB))? 1U :\ - ((__GPIOx__) == (GPIOC))? 2U :\ - ((__GPIOx__) == (GPIOD))? 3U :\ - ((__GPIOx__) == (GPIOE))? 4U :\ - ((__GPIOx__) == (GPIOF))? 5U :\ - ((__GPIOx__) == (GPIOG))? 6U :\ - ((__GPIOx__) == (GPIOH))? 7U : 8U) - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_GPIO_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h deleted file mode 100644 index 7a8f85f2..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h +++ /dev/null @@ -1,708 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_i2c.h - * @author MCD Application Team - * @brief Header file of I2C HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_I2C_H -#define __STM32L4xx_HAL_I2C_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup I2C - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup I2C_Exported_Types I2C Exported Types - * @{ - */ - -/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition - * @brief I2C Configuration Structure definition - * @{ - */ -typedef struct -{ - uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. - This parameter calculated by referring to I2C initialization - section in Reference manual */ - - uint32_t OwnAddress1; /*!< Specifies the first device own address. - This parameter can be a 7-bit or 10-bit address. */ - - uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. - This parameter can be a value of @ref I2C_ADDRESSING_MODE */ - - uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. - This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ - - uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected - This parameter can be a 7-bit address. */ - - uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected - This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ - - uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. - This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ - - uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. - This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ - -} I2C_InitTypeDef; - -/** - * @} - */ - -/** @defgroup HAL_state_structure_definition HAL state structure definition - * @brief HAL State structure definition - * @note HAL I2C State value coding follow below described bitmap :\n - * b7-b6 Error information\n - * 00 : No Error\n - * 01 : Abort (Abort user request on going)\n - * 10 : Timeout\n - * 11 : Error\n - * b5 IP initilisation status\n - * 0 : Reset (IP not initialized)\n - * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n - * b4 (not used)\n - * x : Should be set to 0\n - * b3\n - * 0 : Ready or Busy (No Listen mode ongoing)\n - * 1 : Listen (IP in Address Listen Mode)\n - * b2 Intrinsic process state\n - * 0 : Ready\n - * 1 : Busy (IP busy with some configuration or internal operations)\n - * b1 Rx state\n - * 0 : Ready (no Rx operation ongoing)\n - * 1 : Busy (Rx operation ongoing)\n - * b0 Tx state\n - * 0 : Ready (no Tx operation ongoing)\n - * 1 : Busy (Tx operation ongoing) - * @{ - */ -typedef enum -{ - HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ - HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ - HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ - HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ - HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ - HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ - HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission - process is ongoing */ - HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception - process is ongoing */ - HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ - HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ - HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ - -} HAL_I2C_StateTypeDef; - -/** - * @} - */ - -/** @defgroup HAL_mode_structure_definition HAL mode structure definition - * @brief HAL Mode structure definition - * @note HAL I2C Mode value coding follow below described bitmap :\n - * b7 (not used)\n - * x : Should be set to 0\n - * b6\n - * 0 : None\n - * 1 : Memory (HAL I2C communication is in Memory Mode)\n - * b5\n - * 0 : None\n - * 1 : Slave (HAL I2C communication is in Slave Mode)\n - * b4\n - * 0 : None\n - * 1 : Master (HAL I2C communication is in Master Mode)\n - * b3-b2-b1-b0 (not used)\n - * xxxx : Should be set to 0000 - * @{ - */ -typedef enum -{ - HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ - HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ - HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ - HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ - -} HAL_I2C_ModeTypeDef; - -/** - * @} - */ - -/** @defgroup I2C_Error_Code_definition I2C Error Code definition - * @brief I2C Error Code definition - * @{ - */ -#define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ -#define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ -#define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ -#define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ -#define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ -#define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ -#define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ -#define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ -/** - * @} - */ - -/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition - * @brief I2C handle Structure definition - * @{ - */ -typedef struct __I2C_HandleTypeDef -{ - I2C_TypeDef *Instance; /*!< I2C registers base address */ - - I2C_InitTypeDef Init; /*!< I2C communication parameters */ - - uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ - - uint16_t XferSize; /*!< I2C transfer size */ - - __IO uint16_t XferCount; /*!< I2C transfer counter */ - - __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can - be a value of @ref I2C_XFEROPTIONS */ - - __IO uint32_t PreviousState; /*!< I2C communication Previous state */ - - HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */ - - DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ - - DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ - - HAL_LockTypeDef Lock; /*!< I2C locking object */ - - __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ - - __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ - - __IO uint32_t ErrorCode; /*!< I2C Error code */ - - __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ -} I2C_HandleTypeDef; -/** - * @} - */ - -/** - * @} - */ -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup I2C_Exported_Constants I2C Exported Constants - * @{ - */ - -/** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options - * @{ - */ -#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) -#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) -#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) -#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) -#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) -/** - * @} - */ - -/** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode - * @{ - */ -#define I2C_ADDRESSINGMODE_7BIT (0x00000001U) -#define I2C_ADDRESSINGMODE_10BIT (0x00000002U) -/** - * @} - */ - -/** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode - * @{ - */ -#define I2C_DUALADDRESS_DISABLE (0x00000000U) -#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN -/** - * @} - */ - -/** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks - * @{ - */ -#define I2C_OA2_NOMASK ((uint8_t)0x00U) -#define I2C_OA2_MASK01 ((uint8_t)0x01U) -#define I2C_OA2_MASK02 ((uint8_t)0x02U) -#define I2C_OA2_MASK03 ((uint8_t)0x03U) -#define I2C_OA2_MASK04 ((uint8_t)0x04U) -#define I2C_OA2_MASK05 ((uint8_t)0x05U) -#define I2C_OA2_MASK06 ((uint8_t)0x06U) -#define I2C_OA2_MASK07 ((uint8_t)0x07U) -/** - * @} - */ - -/** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode - * @{ - */ -#define I2C_GENERALCALL_DISABLE (0x00000000U) -#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN -/** - * @} - */ - -/** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode - * @{ - */ -#define I2C_NOSTRETCH_DISABLE (0x00000000U) -#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH -/** - * @} - */ - -/** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size - * @{ - */ -#define I2C_MEMADD_SIZE_8BIT (0x00000001U) -#define I2C_MEMADD_SIZE_16BIT (0x00000002U) -/** - * @} - */ - -/** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View - * @{ - */ -#define I2C_DIRECTION_TRANSMIT (0x00000000U) -#define I2C_DIRECTION_RECEIVE (0x00000001U) -/** - * @} - */ - -/** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode - * @{ - */ -#define I2C_RELOAD_MODE I2C_CR2_RELOAD -#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND -#define I2C_SOFTEND_MODE (0x00000000U) -/** - * @} - */ - -/** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode - * @{ - */ -#define I2C_NO_STARTSTOP (0x00000000U) -#define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) -#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) -#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) -/** - * @} - */ - -/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition - * @brief I2C Interrupt definition - * Elements values convention: 0xXXXXXXXX - * - XXXXXXXX : Interrupt control mask - * @{ - */ -#define I2C_IT_ERRI I2C_CR1_ERRIE -#define I2C_IT_TCI I2C_CR1_TCIE -#define I2C_IT_STOPI I2C_CR1_STOPIE -#define I2C_IT_NACKI I2C_CR1_NACKIE -#define I2C_IT_ADDRI I2C_CR1_ADDRIE -#define I2C_IT_RXI I2C_CR1_RXIE -#define I2C_IT_TXI I2C_CR1_TXIE -/** - * @} - */ - -/** @defgroup I2C_Flag_definition I2C Flag definition - * @{ - */ -#define I2C_FLAG_TXE I2C_ISR_TXE -#define I2C_FLAG_TXIS I2C_ISR_TXIS -#define I2C_FLAG_RXNE I2C_ISR_RXNE -#define I2C_FLAG_ADDR I2C_ISR_ADDR -#define I2C_FLAG_AF I2C_ISR_NACKF -#define I2C_FLAG_STOPF I2C_ISR_STOPF -#define I2C_FLAG_TC I2C_ISR_TC -#define I2C_FLAG_TCR I2C_ISR_TCR -#define I2C_FLAG_BERR I2C_ISR_BERR -#define I2C_FLAG_ARLO I2C_ISR_ARLO -#define I2C_FLAG_OVR I2C_ISR_OVR -#define I2C_FLAG_PECERR I2C_ISR_PECERR -#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT -#define I2C_FLAG_ALERT I2C_ISR_ALERT -#define I2C_FLAG_BUSY I2C_ISR_BUSY -#define I2C_FLAG_DIR I2C_ISR_DIR -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ - -/** @defgroup I2C_Exported_Macros I2C Exported Macros - * @{ - */ - -/** @brief Reset I2C handle state. - * @param __HANDLE__ specifies the I2C Handle. - * @retval None - */ -#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) - -/** @brief Enable the specified I2C interrupt. - * @param __HANDLE__ specifies the I2C Handle. - * @param __INTERRUPT__ specifies the interrupt source to enable. - * This parameter can be one of the following values: - * @arg @ref I2C_IT_ERRI Errors interrupt enable - * @arg @ref I2C_IT_TCI Transfer complete interrupt enable - * @arg @ref I2C_IT_STOPI STOP detection interrupt enable - * @arg @ref I2C_IT_NACKI NACK received interrupt enable - * @arg @ref I2C_IT_ADDRI Address match interrupt enable - * @arg @ref I2C_IT_RXI RX interrupt enable - * @arg @ref I2C_IT_TXI TX interrupt enable - * - * @retval None - */ -#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) - -/** @brief Disable the specified I2C interrupt. - * @param __HANDLE__ specifies the I2C Handle. - * @param __INTERRUPT__ specifies the interrupt source to disable. - * This parameter can be one of the following values: - * @arg @ref I2C_IT_ERRI Errors interrupt enable - * @arg @ref I2C_IT_TCI Transfer complete interrupt enable - * @arg @ref I2C_IT_STOPI STOP detection interrupt enable - * @arg @ref I2C_IT_NACKI NACK received interrupt enable - * @arg @ref I2C_IT_ADDRI Address match interrupt enable - * @arg @ref I2C_IT_RXI RX interrupt enable - * @arg @ref I2C_IT_TXI TX interrupt enable - * - * @retval None - */ -#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) - -/** @brief Check whether the specified I2C interrupt source is enabled or not. - * @param __HANDLE__ specifies the I2C Handle. - * @param __INTERRUPT__ specifies the I2C interrupt source to check. - * This parameter can be one of the following values: - * @arg @ref I2C_IT_ERRI Errors interrupt enable - * @arg @ref I2C_IT_TCI Transfer complete interrupt enable - * @arg @ref I2C_IT_STOPI STOP detection interrupt enable - * @arg @ref I2C_IT_NACKI NACK received interrupt enable - * @arg @ref I2C_IT_ADDRI Address match interrupt enable - * @arg @ref I2C_IT_RXI RX interrupt enable - * @arg @ref I2C_IT_TXI TX interrupt enable - * - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) - -/** @brief Check whether the specified I2C flag is set or not. - * @param __HANDLE__ specifies the I2C Handle. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref I2C_FLAG_TXE Transmit data register empty - * @arg @ref I2C_FLAG_TXIS Transmit interrupt status - * @arg @ref I2C_FLAG_RXNE Receive data register not empty - * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) - * @arg @ref I2C_FLAG_AF Acknowledge failure received flag - * @arg @ref I2C_FLAG_STOPF STOP detection flag - * @arg @ref I2C_FLAG_TC Transfer complete (master mode) - * @arg @ref I2C_FLAG_TCR Transfer complete reload - * @arg @ref I2C_FLAG_BERR Bus error - * @arg @ref I2C_FLAG_ARLO Arbitration lost - * @arg @ref I2C_FLAG_OVR Overrun/Underrun - * @arg @ref I2C_FLAG_PECERR PEC error in reception - * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag - * @arg @ref I2C_FLAG_ALERT SMBus alert - * @arg @ref I2C_FLAG_BUSY Bus busy - * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) - * - * @retval The new state of __FLAG__ (SET or RESET). - */ -#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) - -/** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit. - * @param __HANDLE__ specifies the I2C Handle. - * @param __FLAG__ specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg @ref I2C_FLAG_TXE Transmit data register empty - * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) - * @arg @ref I2C_FLAG_AF Acknowledge failure received flag - * @arg @ref I2C_FLAG_STOPF STOP detection flag - * @arg @ref I2C_FLAG_BERR Bus error - * @arg @ref I2C_FLAG_ARLO Arbitration lost - * @arg @ref I2C_FLAG_OVR Overrun/Underrun - * @arg @ref I2C_FLAG_PECERR PEC error in reception - * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag - * @arg @ref I2C_FLAG_ALERT SMBus alert - * - * @retval None - */ -#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ - : ((__HANDLE__)->Instance->ICR = (__FLAG__))) - -/** @brief Enable the specified I2C peripheral. - * @param __HANDLE__ specifies the I2C Handle. - * @retval None - */ -#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) - -/** @brief Disable the specified I2C peripheral. - * @param __HANDLE__ specifies the I2C Handle. - * @retval None - */ -#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) - -/** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. - * @param __HANDLE__ specifies the I2C Handle. - * @retval None - */ -#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) -/** - * @} - */ - -/* Include I2C HAL Extended module */ -#include "stm32l4xx_hal_i2c_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup I2C_Exported_Functions - * @{ - */ - -/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -/* Initialization and de-initialization functions******************************/ -HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); -HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); -/** - * @} - */ - -/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ -/* IO operation functions ****************************************************/ -/******* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); - -/******* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); - -HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); -HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); -HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); - -/******* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); -/** - * @} - */ - -/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks - * @{ - */ -/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ -void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); -void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); -void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); -void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); -/** - * @} - */ - -/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions - * @{ - */ -/* Peripheral State, Mode and Error functions *********************************/ -HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); -HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); -uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); - -/** - * @} - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup I2C_Private_Constants I2C Private Constants - * @{ - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup I2C_Private_Macro I2C Private Macros - * @{ - */ - -#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ - ((MODE) == I2C_ADDRESSINGMODE_10BIT)) - -#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ - ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) - -#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ - ((MASK) == I2C_OA2_MASK01) || \ - ((MASK) == I2C_OA2_MASK02) || \ - ((MASK) == I2C_OA2_MASK03) || \ - ((MASK) == I2C_OA2_MASK04) || \ - ((MASK) == I2C_OA2_MASK05) || \ - ((MASK) == I2C_OA2_MASK06) || \ - ((MASK) == I2C_OA2_MASK07)) - -#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ - ((CALL) == I2C_GENERALCALL_ENABLE)) - -#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ - ((STRETCH) == I2C_NOSTRETCH_ENABLE)) - -#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ - ((SIZE) == I2C_MEMADD_SIZE_16BIT)) - -#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ - ((MODE) == I2C_AUTOEND_MODE) || \ - ((MODE) == I2C_SOFTEND_MODE)) - -#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ - ((REQUEST) == I2C_GENERATE_START_READ) || \ - ((REQUEST) == I2C_GENERATE_START_WRITE) || \ - ((REQUEST) == I2C_NO_STARTSTOP)) - -#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ - ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ - ((REQUEST) == I2C_NEXT_FRAME) || \ - ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ - ((REQUEST) == I2C_LAST_FRAME)) - -#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) - -#define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U) -#define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U) -#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) -#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1) -#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2) - -#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) -#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) - -#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) -#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) - -#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ - (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) -/** - * @} - */ - -/* Private Functions ---------------------------------------------------------*/ -/** @defgroup I2C_Private_Functions I2C Private Functions - * @{ - */ -/* Private functions are defined in stm32l4xx_hal_i2c.c file */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_I2C_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h deleted file mode 100644 index 726a83fb..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h +++ /dev/null @@ -1,186 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_i2c_ex.h - * @author MCD Application Team - * @brief Header file of I2C HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_I2C_EX_H -#define __STM32L4xx_HAL_I2C_EX_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup I2CEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants - * @{ - */ - -/** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter - * @{ - */ -#define I2C_ANALOGFILTER_ENABLE 0x00000000U -#define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF -/** - * @} - */ - -/** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus - * @{ - */ -#define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ -#define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ -#define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ -#if defined(SYSCFG_CFGR1_I2C_PB8_FMP) -#define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ -#define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ -#else -#define I2C_FASTMODEPLUS_PB8 (uint32_t)(0x00000010U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB8 not supported */ -#define I2C_FASTMODEPLUS_PB9 (uint32_t)(0x00000012U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB9 not supported */ -#endif -#define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ -#if defined(SYSCFG_CFGR1_I2C2_FMP) -#define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ -#else -#define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */ -#endif -#define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ -#if defined(SYSCFG_CFGR1_I2C4_FMP) -#define I2C_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */ -#else -#define I2C_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */ -#endif -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions - * @{ - */ - -/** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions - * @brief Extended features functions - * @{ - */ - -/* Peripheral Control functions ************************************************/ -HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter); -HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter); -HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); -HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); -void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); -void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup I2CEx_Private_Constants I2C Extended Private Constants - * @{ - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup I2CEx_Private_Macro I2C Extended Private Macros - * @{ - */ -#define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \ - ((FILTER) == I2C_ANALOGFILTER_DISABLE)) - -#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) - -#define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \ - ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3) || \ - (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C4)) == I2C_FASTMODEPLUS_I2C4))) -/** - * @} - */ - -/* Private Functions ---------------------------------------------------------*/ -/** @defgroup I2CEx_Private_Functions I2C Extended Private Functions - * @{ - */ -/* Private functions are defined in stm32l4xx_hal_i2c_ex.c file */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_I2C_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h deleted file mode 100644 index 0fa4476a..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h +++ /dev/null @@ -1,874 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd.h - * @author MCD Application Team - * @brief Header file of PCD HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_PCD_H -#define __STM32L4xx_HAL_PCD_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_ll_usb.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup PCD - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup PCD_Exported_Types PCD Exported Types - * @{ - */ - - /** - * @brief PCD State structure definition - */ -typedef enum -{ - HAL_PCD_STATE_RESET = 0x00, - HAL_PCD_STATE_READY = 0x01, - HAL_PCD_STATE_ERROR = 0x02, - HAL_PCD_STATE_BUSY = 0x03, - HAL_PCD_STATE_TIMEOUT = 0x04 -} PCD_StateTypeDef; - -/* Device LPM suspend state */ -typedef enum -{ - LPM_L0 = 0x00, /* on */ - LPM_L1 = 0x01, /* LPM L1 sleep */ - LPM_L2 = 0x02, /* suspend */ - LPM_L3 = 0x03, /* off */ -}PCD_LPM_StateTypeDef; - -#if defined (USB) -/** - * @brief PCD double buffered endpoint direction - */ -typedef enum -{ - PCD_EP_DBUF_OUT, - PCD_EP_DBUF_IN, - PCD_EP_DBUF_ERR, -}PCD_EP_DBUF_DIR; - -/** - * @brief PCD endpoint buffer number - */ -typedef enum -{ - PCD_EP_NOBUF, - PCD_EP_BUF0, - PCD_EP_BUF1 -}PCD_EP_BUF_NUM; -#endif /* USB */ - -#if defined (USB_OTG_FS) -typedef USB_OTG_GlobalTypeDef PCD_TypeDef; -typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; -typedef USB_OTG_EPTypeDef PCD_EPTypeDef; -#endif /* USB_OTG_FS */ - -#if defined (USB) -typedef USB_TypeDef PCD_TypeDef; -typedef USB_CfgTypeDef PCD_InitTypeDef; -typedef USB_EPTypeDef PCD_EPTypeDef; -#endif /* USB */ - -/** - * @brief PCD Handle Structure definition - */ -typedef struct -{ - PCD_TypeDef *Instance; /*!< Register base address */ - PCD_InitTypeDef Init; /*!< PCD required parameters */ - __IO uint8_t USB_Address; /*!< USB Address: not used by USB OTG FS */ - PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */ - PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */ - HAL_LockTypeDef Lock; /*!< PCD peripheral status */ - __IO PCD_StateTypeDef State; /*!< PCD communication state */ - uint32_t Setup[12]; /*!< Setup packet buffer */ - PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ - uint32_t BESL; - - - uint32_t lpm_active; /*!< Enable or disable the Link Power Management . - This parameter can be set to ENABLE or DISABLE */ - - uint32_t battery_charging_active; /*!< Enable or disable Battery charging. - This parameter can be set to ENABLE or DISABLE */ - void *pData; /*!< Pointer to upper stack Handler */ - -} PCD_HandleTypeDef; - -/** - * @} - */ - -/* Include PCD HAL Extended module */ -#include "stm32l4xx_hal_pcd_ex.h" - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup PCD_Exported_Constants PCD Exported Constants - * @{ - */ - -/** @defgroup PCD_Speed PCD Speed - * @{ - */ -#define PCD_SPEED_FULL 1 -/** - * @} - */ - -/** @defgroup PCD_PHY_Module PCD PHY Module - * @{ - */ -#define PCD_PHY_EMBEDDED 1 -/** - * @} - */ - -/** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value - * @{ - */ -#ifndef USBD_FS_TRDT_VALUE - #define USBD_FS_TRDT_VALUE 5 -#endif /* USBD_FS_TRDT_VALUE */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup PCD_Exported_Macros PCD Exported Macros - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ -#if defined (USB_OTG_FS) -#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) - -#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) -#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) -#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0) - - -#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ - ~(USB_OTG_PCGCCTL_STOPCLK) - -#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK - -#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_OTG_FS_WAKEUP_EXTI_LINE) -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_OTG_FS_WAKEUP_EXTI_LINE - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\ - EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ - } while(0) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\ - EXTI->FTSR1 |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - } while(0) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\ - EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ - EXTI->FTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ - } while(0) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_OTG_FS_WAKEUP_EXTI_LINE) - -#endif /* USB_OTG_FS */ - -#if defined (USB) -#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) -#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) - -#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE -#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) -#define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_WAKEUP_EXTI_LINE) -#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_WAKEUP_EXTI_LINE - -#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\ - EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\ - } while(0) - -#define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\ - EXTI->FTSR1 |= (USB_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ - } while(0) - -#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\ - EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ - EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\ - EXTI->FTSR1 |= USB_WAKEUP_EXTI_LINE;\ - } while(0) - -#define __HAL_USB_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_WAKEUP_EXTI_LINE) - -#endif /* USB */ - -/** - * @} - */ - -/** @addtogroup PCD_Exported_Functions PCD Exported Functions - * @{ - */ - -/* Initialization/de-initialization functions ********************************/ -/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd); -void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); -void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/* I/O operation functions ***************************************************/ -/* Non-Blocking mode: Interrupt */ -/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ - /* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); - -void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/* Peripheral Control functions **********************************************/ -/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ -HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); -HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); -HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/* Peripheral State functions ************************************************/ -/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions - * @{ - */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup PCD_Private_Constants PCD Private Constants - * @{ - */ -/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt - * @{ - */ -#if defined (USB_OTG_FS) -#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08) -#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0C) -#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10) - -#define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17 Connected to the USB EXTI Line */ -#endif /* USB_OTG_FS */ - -#if defined (USB) -#define USB_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17Connected to the USB EXTI Line */ -#endif /* USB */ - -/** - * @} - */ - -#if defined (USB) -/** @defgroup PCD_EP0_MPS PCD EP0 MPS - * @{ - */ -#define PCD_EP0MPS_64 DEP0CTL_MPS_64 -#define PCD_EP0MPS_32 DEP0CTL_MPS_32 -#define PCD_EP0MPS_16 DEP0CTL_MPS_16 -#define PCD_EP0MPS_08 DEP0CTL_MPS_8 -/** - * @} - */ - -/** @defgroup PCD_ENDP PCD ENDP - * @{ - */ -#define PCD_ENDP0 ((uint8_t)0) -#define PCD_ENDP1 ((uint8_t)1) -#define PCD_ENDP2 ((uint8_t)2) -#define PCD_ENDP3 ((uint8_t)3) -#define PCD_ENDP4 ((uint8_t)4) -#define PCD_ENDP5 ((uint8_t)5) -#define PCD_ENDP6 ((uint8_t)6) -#define PCD_ENDP7 ((uint8_t)7) -/** - * @} - */ - -/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind - * @{ - */ -#define PCD_SNG_BUF 0 -#define PCD_DBL_BUF 1 -/** - * @} - */ -#endif /* USB */ -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup PCD_Private_Macros PCD Private Macros - * @{ - */ -#if defined (USB) -/* SetENDPOINT */ -#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue)) - -/* GetENDPOINT */ -#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2)) - -/* ENDPOINT transfer */ -#define USB_EP0StartXfer USB_EPStartXfer - -/** - * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wType: Endpoint Type. - * @retval None - */ -#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ - ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) ))) - -/** - * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval Endpoint Type - */ -#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) - -/** - * @brief free buffer used from the application realizing it to the line - toggles bit SW_BUF in the double buffered endpoint register - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param bDir: Direction - * @retval None - */ -#define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\ -{\ - if ((bDir) == PCD_EP_DBUF_OUT)\ - { /* OUT double buffered endpoint */\ - PCD_TX_DTOG((USBx), (bEpNum));\ - }\ - else if ((bDir) == PCD_EP_DBUF_IN)\ - { /* IN double buffered endpoint */\ - PCD_RX_DTOG((USBx), (bEpNum));\ - }\ -} - -/** - * @brief gets direction of the double buffered endpoint - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval EP_DBUF_OUT, EP_DBUF_IN, - * EP_DBUF_ERR if the endpoint counter not yet programmed. - */ -#define PCD_GET_DB_DIR(USBx, bEpNum)\ -{\ - if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\ - return(PCD_EP_DBUF_OUT);\ - else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\ - return(PCD_EP_DBUF_IN);\ - else\ - return(PCD_EP_DBUF_ERR);\ -} - -/** - * @brief sets the status for tx transfer (bits STAT_TX[1:0]). - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wState: new state - * @retval None - */ -#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\ - /* toggle first bit ? */ \ - if((USB_EPTX_DTOG1 & (wState))!= 0)\ - { \ - _wRegVal ^= USB_EPTX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if((USB_EPTX_DTOG2 & (wState))!= 0) \ - { \ - _wRegVal ^= USB_EPTX_DTOG2; \ - } \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\ - } /* PCD_SET_EP_TX_STATUS */ - -/** - * @brief sets the status for rx transfer (bits STAT_TX[1:0]) - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wState: new state - * @retval None - */ -#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\ - register uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\ - /* toggle first bit ? */ \ - if((USB_EPRX_DTOG1 & (wState))!= 0) \ - { \ - _wRegVal ^= USB_EPRX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if((USB_EPRX_DTOG2 & (wState))!= 0) \ - { \ - _wRegVal ^= USB_EPRX_DTOG2; \ - } \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ - } /* PCD_SET_EP_RX_STATUS */ - -/** - * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wStaterx: new state. - * @param wStatetx: new state. - * @retval None - */ -#define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\ - register uint32_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\ - /* toggle first bit ? */ \ - if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \ - { \ - _wRegVal ^= USB_EPRX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \ - { \ - _wRegVal ^= USB_EPRX_DTOG2; \ - } \ - /* toggle first bit ? */ \ - if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \ - { \ - _wRegVal ^= USB_EPTX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \ - { \ - _wRegVal ^= USB_EPTX_DTOG2; \ - } \ - PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \ - } /* PCD_SET_EP_TXRX_STATUS */ - -/** - * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] - * /STAT_RX[1:0]) - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval status - */ -#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) -#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) - -/** - * @brief sets directly the VALID tx/rx-status into the endpoint register - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) -#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) - -/** - * @brief checks stall condition in an endpoint. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval TRUE = endpoint in stall condition. - */ -#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ - == USB_EP_TX_STALL) -#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ - == USB_EP_RX_STALL) - -/** - * @brief set & clear EP_KIND bit. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ - (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK)))) -#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ - (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK)))) - -/** - * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) -#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) - -/** - * @brief Sets/clears directly EP_KIND bit in the endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) -#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) - -/** - * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ - PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK)) -#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ - PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK)) - -/** - * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ - USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) -#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ - USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) - -/** - * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\ - { \ - PCD_RX_DTOG((USBx), (bEpNum)); \ - } -#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\ - { \ - PCD_TX_DTOG((USBx), (bEpNum)); \ - } - -/** - * @brief Sets address in an endpoint register. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param bAddr: Address. - * @retval None - */ -#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\ - USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr)) - -#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) - -#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400))) -#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400))) -#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400))) -#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400))) - -#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\ - uint16_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \ - PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ - } - -/** - * @brief sets address of the tx/rx buffer. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wAddr: address to be set (must be word aligned). - * @retval None - */ -#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1)) -#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1)) - -/** - * @brief Gets address of the tx/rx buffer. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval address of the buffer. - */ -#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) -#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) - -/** - * @brief Sets counter of rx buffer with no. of blocks. - * @param dwReg: Register - * @param wCount: Counter. - * @param wNBlocks: no. of Blocks. - * @retval None - */ -#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\ - (wNBlocks) = (wCount) >> 5;\ - if(((wCount) & 0x1f) == 0)\ - { \ - (wNBlocks)--;\ - } \ - *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \ - }/* PCD_CALC_BLK32 */ - -#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\ - (wNBlocks) = (wCount) >> 1;\ - if(((wCount) & 0x1) != 0)\ - { \ - (wNBlocks)++;\ - } \ - *pdwReg = (uint16_t)((wNBlocks) << 10);\ - }/* PCD_CALC_BLK2 */ - -#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\ - uint16_t wNBlocks;\ - if((wCount) > 62) \ - { \ - PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \ - } \ - else \ - { \ - PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \ - } \ - }/* PCD_SET_EP_CNT_RX_REG */ - -#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\ - uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \ - PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ - } - -/** - * @brief sets counter for the tx/rx buffer. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wCount: Counter value. - * @retval None - */ -#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount)) - - -/** - * @brief gets counter of the tx buffer. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval Counter value - */ -#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff) -#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff) - -/** - * @brief Sets buffer 0/1 address in a double buffer endpoint. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wBuf0Addr: buffer 0 address. - * @retval Counter value - */ -#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));} -#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));} - -/** - * @brief Sets addresses in a double buffer endpoint. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param wBuf0Addr: buffer 0 address. - * @param wBuf1Addr = buffer 1 address. - * @retval None - */ -#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \ - PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\ - PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\ - } /* PCD_SET_EP_DBUF_ADDR */ - -/** - * @brief Gets buffer 0/1 address of a double buffer endpoint. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) -#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) - -/** - * @brief Gets buffer 0/1 address of a double buffer endpoint. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @param bDir: endpoint dir EP_DBUF_OUT = OUT - * EP_DBUF_IN = IN - * @param wCount: Counter value - * @retval None - */ -#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \ - if((bDir) == PCD_EP_DBUF_OUT)\ - /* OUT endpoint */ \ - {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \ - else if((bDir) == PCD_EP_DBUF_IN)\ - /* IN endpoint */ \ - *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ - } /* SetEPDblBuf0Count*/ - -#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \ - if((bDir) == PCD_EP_DBUF_OUT)\ - {/* OUT endpoint */ \ - PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \ - } \ - else if((bDir) == PCD_EP_DBUF_IN)\ - {/* IN endpoint */ \ - *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ - } \ - } /* SetEPDblBuf1Count */ - -#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\ - PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ - PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ - } /* PCD_SET_EP_DBUF_CNT */ - -/** - * @brief Gets buffer 0/1 rx/tx counter for double buffering. - * @param USBx: USB peripheral instance register address. - * @param bEpNum: Endpoint Number. - * @retval None - */ -#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) -#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) - -#endif /* USB */ - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) - -/** @defgroup PCD_Instance_definition PCD Instance definition - * @{ - */ -#define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE -/** - * @} - */ -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_PCD_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h deleted file mode 100644 index 5fce957d..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h +++ /dev/null @@ -1,136 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd_ex.h - * @author MCD Application Team - * @brief Header file of PCD HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_PCD_EX_H -#define __STM32L4xx_HAL_PCD_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup PCDEx - * @{ - */ -/* Exported types ------------------------------------------------------------*/ -typedef enum -{ - PCD_LPM_L0_ACTIVE = 0x00, /* on */ - PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ -}PCD_LPM_MsgTypeDef; - -typedef enum -{ - PCD_BCD_ERROR = 0xFF, - PCD_BCD_CONTACT_DETECTION = 0xFE, - PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, - PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, - PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, - PCD_BCD_DISCOVERY_COMPLETED = 0x00, - -}PCD_BCD_MsgTypeDef; - -/* Exported constants --------------------------------------------------------*/ -/* Exported macros -----------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions - * @{ - */ -/** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions - * @{ - */ - -#if defined(USB_OTG_FS) -HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size); -HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size); -#endif /* USB_OTG_FS */ - -#if defined (USB) -HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, - uint16_t ep_addr, - uint16_t ep_kind, - uint32_t pmaadress); -#endif /* USB */ -HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); -void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); -void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); -void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_PCD_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h deleted file mode 100644 index 75d18b13..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h +++ /dev/null @@ -1,427 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pwr.h - * @author MCD Application Team - * @brief Header file of PWR HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_PWR_H -#define __STM32L4xx_HAL_PWR_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup PWR - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup PWR_Exported_Types PWR Exported Types - * @{ - */ - -/** - * @brief PWR PVD configuration structure definition - */ -typedef struct -{ - uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. - This parameter can be a value of @ref PWR_PVD_detection_level. */ - - uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. - This parameter can be a value of @ref PWR_PVD_Mode. */ -}PWR_PVDTypeDef; - - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup PWR_Exported_Constants PWR Exported Constants - * @{ - */ - - -/** @defgroup PWR_PVD_detection_level Programmable Voltage Detection levels - * @{ - */ -#define PWR_PVDLEVEL_0 PWR_CR2_PLS_LEV0 /*!< PVD threshold around 2.0 V */ -#define PWR_PVDLEVEL_1 PWR_CR2_PLS_LEV1 /*!< PVD threshold around 2.2 V */ -#define PWR_PVDLEVEL_2 PWR_CR2_PLS_LEV2 /*!< PVD threshold around 2.4 V */ -#define PWR_PVDLEVEL_3 PWR_CR2_PLS_LEV3 /*!< PVD threshold around 2.5 V */ -#define PWR_PVDLEVEL_4 PWR_CR2_PLS_LEV4 /*!< PVD threshold around 2.6 V */ -#define PWR_PVDLEVEL_5 PWR_CR2_PLS_LEV5 /*!< PVD threshold around 2.8 V */ -#define PWR_PVDLEVEL_6 PWR_CR2_PLS_LEV6 /*!< PVD threshold around 2.9 V */ -#define PWR_PVDLEVEL_7 PWR_CR2_PLS_LEV7 /*!< External input analog voltage (compared internally to VREFINT) */ -/** - * @} - */ - -/** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode - * @{ - */ -#define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< Basic mode is used */ -#define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ -#define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ -#define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ -#define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ -#define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ -#define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ -/** - * @} - */ - - - - -/** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode - * @{ - */ -#define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) /*!< Regulator in main mode */ -#define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPR /*!< Regulator in low-power mode */ -/** - * @} - */ - -/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry - * @{ - */ -#define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */ -#define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */ -/** - * @} - */ - -/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry - * @{ - */ -#define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */ -#define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */ -/** - * @} - */ - - -/** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line - * @{ - */ -#define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ -/** - * @} - */ - -/** @defgroup PWR_PVD_EVENT_LINE PWR PVD event line - * @{ - */ -#define PWR_EVENT_LINE_PVD ((uint32_t)0x00010000) /*!< Event line 16 Connected to the PVD Event Line */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup PWR_Exported_Macros PWR Exported Macros - * @{ - */ - -/** @brief Check whether or not a specific PWR flag is set. - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event - * was received from the WKUP pin 1. - * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event - * was received from the WKUP pin 2. - * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event - * was received from the WKUP pin 3. - * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event - * was received from the WKUP pin 4. - * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event - * was received from the WKUP pin 5. - * @arg @ref PWR_FLAG_SB StandBy Flag. Indicates that the system - * entered StandBy mode. - * @arg @ref PWR_FLAG_WUFI Wake-Up Flag Internal. Set when a wakeup is detected on - * the internal wakeup line. - * @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the - * low-power regulator is ready. - * @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the - * regulator is ready in main mode or is in low-power mode. - * @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready - * in the selected voltage range or is still changing to the required voltage level. - * @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is - * below or above the selected PVD threshold. - * @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is - * is below or above PVM1 threshold (applicable when USB feature is supported). - @if STM32L486xx - * @arg @ref PWR_FLAG_PVMO2 Peripheral Voltage Monitoring Output 2. Indicates whether VDDIO2 voltage is - * is below or above PVM2 threshold (applicable when VDDIO2 is present on device). - @endif - * @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is - * is below or above PVM3 threshold. - * @arg @ref PWR_FLAG_PVMO4 Peripheral Voltage Monitoring Output 4. Indicates whether VDDA voltage is - * is below or above PVM4 threshold. - * - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_PWR_GET_FLAG(__FLAG__) ( ((((uint8_t)(__FLAG__)) >> 5U) == 1) ?\ - (PWR->SR1 & (1U << ((__FLAG__) & 31U))) :\ - (PWR->SR2 & (1U << ((__FLAG__) & 31U))) ) - -/** @brief Clear a specific PWR flag. - * @param __FLAG__: specifies the flag to clear. - * This parameter can be one of the following values: - * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event - * was received from the WKUP pin 1. - * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event - * was received from the WKUP pin 2. - * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event - * was received from the WKUP pin 3. - * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event - * was received from the WKUP pin 4. - * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event - * was received from the WKUP pin 5. - * @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags. - * @arg @ref PWR_FLAG_SB Standby Flag. Indicates that the system - * entered Standby mode. - * @retval None - */ -#define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( (((uint8_t)(__FLAG__)) == PWR_FLAG_WU) ?\ - (PWR->SCR = (__FLAG__)) :\ - (PWR->SCR = (1U << ((__FLAG__) & 31U))) ) -/** - * @brief Enable the PVD Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) - -/** - * @brief Disable the PVD Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) - -/** - * @brief Enable the PVD Event Line. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) - -/** - * @brief Disable the PVD Event Line. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) - -/** - * @brief Enable the PVD Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) - -/** - * @brief Disable the PVD Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) - -/** - * @brief Enable the PVD Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) - - -/** - * @brief Disable the PVD Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) - - -/** - * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD) - -/** - * @brief Check whether or not the PVD EXTI interrupt flag is set. - * @retval EXTI PVD Line Status. - */ -#define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR1 & PWR_EXTI_LINE_PVD) - -/** - * @brief Clear the PVD EXTI interrupt flag. - * @retval None - */ -#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR1, PWR_EXTI_LINE_PVD) - -/** - * @} - */ - - -/* Private macros --------------------------------------------------------*/ -/** @addtogroup PWR_Private_Macros PWR Private Macros - * @{ - */ - -#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ - ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ - ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ - ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) - -#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ - ((MODE) == PWR_PVD_MODE_IT_RISING) ||\ - ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ - ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\ - ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\ - ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\ - ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING)) - -#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ - ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) - -#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) - -#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) ) - -/** - * @} - */ - -/* Include PWR HAL Extended module */ -#include "stm32l4xx_hal_pwr_ex.h" - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup PWR_Exported_Functions PWR Exported Functions - * @{ - */ - -/** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ - -/* Initialization and de-initialization functions *******************************/ -void HAL_PWR_DeInit(void); -void HAL_PWR_EnableBkUpAccess(void); -void HAL_PWR_DisableBkUpAccess(void); - -/** - * @} - */ - -/** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions - * @{ - */ - -/* Peripheral Control functions ************************************************/ -HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); -void HAL_PWR_EnablePVD(void); -void HAL_PWR_DisablePVD(void); - - -/* WakeUp pins configuration functions ****************************************/ -void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); -void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); - -/* Low Power modes configuration functions ************************************/ -void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); -void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); -void HAL_PWR_EnterSTANDBYMode(void); - -void HAL_PWR_EnableSleepOnExit(void); -void HAL_PWR_DisableSleepOnExit(void); -void HAL_PWR_EnableSEVOnPend(void); -void HAL_PWR_DisableSEVOnPend(void); - -void HAL_PWR_PVDCallback(void); - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_PWR_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h deleted file mode 100644 index b9b9fa5c..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h +++ /dev/null @@ -1,906 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pwr_ex.h - * @author MCD Application Team - * @brief Header file of PWR HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_PWR_EX_H -#define __STM32L4xx_HAL_PWR_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup PWREx - * @{ - */ - - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup PWREx_Exported_Types PWR Extended Exported Types - * @{ - */ - - -/** - * @brief PWR PVM configuration structure definition - */ -typedef struct -{ - uint32_t PVMType; /*!< PVMType: Specifies which voltage is monitored and against which threshold. - This parameter can be a value of @ref PWREx_PVM_Type. - @arg @ref PWR_PVM_1 Peripheral Voltage Monitoring 1 enable: VDDUSB versus 1.2 V (applicable when USB feature is supported). -@if STM32L486xx - @arg @ref PWR_PVM_2 Peripheral Voltage Monitoring 2 enable: VDDIO2 versus 0.9 V (applicable when VDDIO2 is present on device). -@endif - @arg @ref PWR_PVM_3 Peripheral Voltage Monitoring 3 enable: VDDA versus 1.62 V. - @arg @ref PWR_PVM_4 Peripheral Voltage Monitoring 4 enable: VDDA versus 2.2 V. */ - - uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. - This parameter can be a value of @ref PWREx_PVM_Mode. */ -}PWR_PVMTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants - * @{ - */ - -/** @defgroup PWREx_WUP_Polarity Shift to apply to retrieve polarity information from PWR_WAKEUP_PINy_xxx constants - * @{ - */ -#define PWR_WUP_POLARITY_SHIFT 0x05 /*!< Internal constant used to retrieve wakeup pin polariry */ -/** - * @} - */ - - -/** @defgroup PWREx_WakeUp_Pins PWR wake-up pins - * @{ - */ -#define PWR_WAKEUP_PIN1 PWR_CR3_EWUP1 /*!< Wakeup pin 1 (with high level polarity) */ -#define PWR_WAKEUP_PIN2 PWR_CR3_EWUP2 /*!< Wakeup pin 2 (with high level polarity) */ -#define PWR_WAKEUP_PIN3 PWR_CR3_EWUP3 /*!< Wakeup pin 3 (with high level polarity) */ -#define PWR_WAKEUP_PIN4 PWR_CR3_EWUP4 /*!< Wakeup pin 4 (with high level polarity) */ -#define PWR_WAKEUP_PIN5 PWR_CR3_EWUP5 /*!< Wakeup pin 5 (with high level polarity) */ -#define PWR_WAKEUP_PIN1_HIGH PWR_CR3_EWUP1 /*!< Wakeup pin 1 (with high level polarity) */ -#define PWR_WAKEUP_PIN2_HIGH PWR_CR3_EWUP2 /*!< Wakeup pin 2 (with high level polarity) */ -#define PWR_WAKEUP_PIN3_HIGH PWR_CR3_EWUP3 /*!< Wakeup pin 3 (with high level polarity) */ -#define PWR_WAKEUP_PIN4_HIGH PWR_CR3_EWUP4 /*!< Wakeup pin 4 (with high level polarity) */ -#define PWR_WAKEUP_PIN5_HIGH PWR_CR3_EWUP5 /*!< Wakeup pin 5 (with high level polarity) */ -#define PWR_WAKEUP_PIN1_LOW (uint32_t)((PWR_CR4_WP1<IMR2, PWR_EXTI_LINE_PVM1) - -/** - * @brief Disable the PVM1 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1) - -/** - * @brief Enable the PVM1 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1) - -/** - * @brief Disable the PVM1 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1) - -/** - * @brief Enable the PVM1 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1) - -/** - * @brief Disable the PVM1 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1) - -/** - * @brief Enable the PVM1 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1) - - -/** - * @brief Disable the PVM1 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1) - - -/** - * @brief PVM1 EXTI line configuration: set rising & falling edge trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the PVM1 Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM1) - -/** - * @brief Check whether the specified PVM1 EXTI interrupt flag is set or not. - * @retval EXTI PVM1 Line Status. - */ -#define __HAL_PWR_PVM1_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM1) - -/** - * @brief Clear the PVM1 EXTI flag. - * @retval None - */ -#define __HAL_PWR_PVM1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM1) - -#endif /* PWR_CR2_PVME1 */ - - -#if defined(PWR_CR2_PVME2) -/** - * @brief Enable the PVM2 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2) - -/** - * @brief Disable the PVM2 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2) - -/** - * @brief Enable the PVM2 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2) - -/** - * @brief Disable the PVM2 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2) - -/** - * @brief Enable the PVM2 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2) - -/** - * @brief Disable the PVM2 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2) - -/** - * @brief Enable the PVM2 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2) - - -/** - * @brief Disable the PVM2 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2) - - -/** - * @brief PVM2 EXTI line configuration: set rising & falling edge trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the PVM2 Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM2) - -/** - * @brief Check whether the specified PVM2 EXTI interrupt flag is set or not. - * @retval EXTI PVM2 Line Status. - */ -#define __HAL_PWR_PVM2_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM2) - -/** - * @brief Clear the PVM2 EXTI flag. - * @retval None - */ -#define __HAL_PWR_PVM2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM2) - -#endif /* PWR_CR2_PVME2 */ - - -/** - * @brief Enable the PVM3 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3) - -/** - * @brief Disable the PVM3 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3) - -/** - * @brief Enable the PVM3 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3) - -/** - * @brief Disable the PVM3 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3) - -/** - * @brief Enable the PVM3 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3) - -/** - * @brief Disable the PVM3 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3) - -/** - * @brief Enable the PVM3 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3) - - -/** - * @brief Disable the PVM3 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3) - - -/** - * @brief PVM3 EXTI line configuration: set rising & falling edge trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the PVM3 Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM3) - -/** - * @brief Check whether the specified PVM3 EXTI interrupt flag is set or not. - * @retval EXTI PVM3 Line Status. - */ -#define __HAL_PWR_PVM3_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM3) - -/** - * @brief Clear the PVM3 EXTI flag. - * @retval None - */ -#define __HAL_PWR_PVM3_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM3) - - - - -/** - * @brief Enable the PVM4 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4) - -/** - * @brief Disable the PVM4 Extended Interrupt Line. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4) - -/** - * @brief Enable the PVM4 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4) - -/** - * @brief Disable the PVM4 Event Line. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4) - -/** - * @brief Enable the PVM4 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4) - -/** - * @brief Disable the PVM4 Extended Interrupt Rising Trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4) - -/** - * @brief Enable the PVM4 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4) - - -/** - * @brief Disable the PVM4 Extended Interrupt Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4) - - -/** - * @brief PVM4 EXTI line configuration: set rising & falling edge trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the PVM4 Extended Interrupt Rising & Falling Trigger. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Generate a Software interrupt on selected EXTI line. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM4) - -/** - * @brief Check whether or not the specified PVM4 EXTI interrupt flag is set. - * @retval EXTI PVM4 Line Status. - */ -#define __HAL_PWR_PVM4_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM4) - -/** - * @brief Clear the PVM4 EXTI flag. - * @retval None - */ -#define __HAL_PWR_PVM4_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM4) - - -/** - * @brief Configure the main internal regulator output voltage. - * @param __REGULATOR__: specifies the regulator output voltage to achieve - * a tradeoff between performance and power consumption. - * This parameter can be one of the following values: - * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode, - * typical output voltage at 1.2 V, - * system frequency up to 80 MHz. - * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode, - * typical output voltage at 1.0 V, - * system frequency up to 26 MHz. - * @note This macro is similar to HAL_PWREx_ControlVoltageScaling() API but doesn't check - * whether or not VOSF flag is cleared when moving from range 2 to range 1. User - * may resort to __HAL_PWR_GET_FLAG() macro to check VOSF bit resetting. - * @retval None - */ -#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \ - __IO uint32_t tmpreg; \ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \ - UNUSED(tmpreg); \ - } while(0) - -/** - * @} - */ - -/* Private macros --------------------------------------------------------*/ -/** @addtogroup PWREx_Private_Macros PWR Extended Private Macros - * @{ - */ - -#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \ - ((PIN) == PWR_WAKEUP_PIN2) || \ - ((PIN) == PWR_WAKEUP_PIN3) || \ - ((PIN) == PWR_WAKEUP_PIN4) || \ - ((PIN) == PWR_WAKEUP_PIN5) || \ - ((PIN) == PWR_WAKEUP_PIN1_HIGH) || \ - ((PIN) == PWR_WAKEUP_PIN2_HIGH) || \ - ((PIN) == PWR_WAKEUP_PIN3_HIGH) || \ - ((PIN) == PWR_WAKEUP_PIN4_HIGH) || \ - ((PIN) == PWR_WAKEUP_PIN5_HIGH) || \ - ((PIN) == PWR_WAKEUP_PIN1_LOW) || \ - ((PIN) == PWR_WAKEUP_PIN2_LOW) || \ - ((PIN) == PWR_WAKEUP_PIN3_LOW) || \ - ((PIN) == PWR_WAKEUP_PIN4_LOW) || \ - ((PIN) == PWR_WAKEUP_PIN5_LOW)) - -#if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_1) ||\ - ((TYPE) == PWR_PVM_2) ||\ - ((TYPE) == PWR_PVM_3) ||\ - ((TYPE) == PWR_PVM_4)) -#elif defined (STM32L471xx) -#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_2) ||\ - ((TYPE) == PWR_PVM_3) ||\ - ((TYPE) == PWR_PVM_4)) -#endif - -#if defined (STM32L433xx) || defined (STM32L443xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_1) ||\ - ((TYPE) == PWR_PVM_3) ||\ - ((TYPE) == PWR_PVM_4)) -#elif defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L442xx) || defined (STM32L451xx) -#define IS_PWR_PVM_TYPE(TYPE) (((TYPE) == PWR_PVM_3) ||\ - ((TYPE) == PWR_PVM_4)) -#endif - -#define IS_PWR_PVM_MODE(MODE) (((MODE) == PWR_PVM_MODE_NORMAL) ||\ - ((MODE) == PWR_PVM_MODE_IT_RISING) ||\ - ((MODE) == PWR_PVM_MODE_IT_FALLING) ||\ - ((MODE) == PWR_PVM_MODE_IT_RISING_FALLING) ||\ - ((MODE) == PWR_PVM_MODE_EVENT_RISING) ||\ - ((MODE) == PWR_PVM_MODE_EVENT_FALLING) ||\ - ((MODE) == PWR_PVM_MODE_EVENT_RISING_FALLING)) - -#if defined(PWR_CR5_R1MODE) -#define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) || \ - ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ - ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2)) -#else -#define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ - ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2)) -#endif - - -#define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\ - ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5)) - -#define IS_PWR_BATTERY_CHARGING(CHARGING) (((CHARGING) == PWR_BATTERY_CHARGING_DISABLE) ||\ - ((CHARGING) == PWR_BATTERY_CHARGING_ENABLE)) - -#define IS_PWR_GPIO_BIT_NUMBER(BIT_NUMBER) (((BIT_NUMBER) & GPIO_PIN_MASK) != (uint32_t)0x00) - - -#if defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\ - ((GPIO) == PWR_GPIO_B) ||\ - ((GPIO) == PWR_GPIO_C) ||\ - ((GPIO) == PWR_GPIO_D) ||\ - ((GPIO) == PWR_GPIO_E) ||\ - ((GPIO) == PWR_GPIO_H)) -#elif defined (STM32L432xx) || defined (STM32L442xx) -#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\ - ((GPIO) == PWR_GPIO_B) ||\ - ((GPIO) == PWR_GPIO_C) ||\ - ((GPIO) == PWR_GPIO_H)) -#elif defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) -#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\ - ((GPIO) == PWR_GPIO_B) ||\ - ((GPIO) == PWR_GPIO_C) ||\ - ((GPIO) == PWR_GPIO_D) ||\ - ((GPIO) == PWR_GPIO_E) ||\ - ((GPIO) == PWR_GPIO_F) ||\ - ((GPIO) == PWR_GPIO_G) ||\ - ((GPIO) == PWR_GPIO_H)) -#elif defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\ - ((GPIO) == PWR_GPIO_B) ||\ - ((GPIO) == PWR_GPIO_C) ||\ - ((GPIO) == PWR_GPIO_D) ||\ - ((GPIO) == PWR_GPIO_E) ||\ - ((GPIO) == PWR_GPIO_F) ||\ - ((GPIO) == PWR_GPIO_G) ||\ - ((GPIO) == PWR_GPIO_H) ||\ - ((GPIO) == PWR_GPIO_I)) -#endif - - -/** - * @} - */ - - -/** @addtogroup PWREx_Exported_Functions PWR Extended Exported Functions - * @{ - */ - -/** @addtogroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions - * @{ - */ - - -/* Peripheral Control functions **********************************************/ -uint32_t HAL_PWREx_GetVoltageRange(void); -HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling); -void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection); -void HAL_PWREx_DisableBatteryCharging(void); -#if defined(PWR_CR2_USV) -void HAL_PWREx_EnableVddUSB(void); -void HAL_PWREx_DisableVddUSB(void); -#endif /* PWR_CR2_USV */ -#if defined(PWR_CR2_IOSV) -void HAL_PWREx_EnableVddIO2(void); -void HAL_PWREx_DisableVddIO2(void); -#endif /* PWR_CR2_IOSV */ -void HAL_PWREx_EnableInternalWakeUpLine(void); -void HAL_PWREx_DisableInternalWakeUpLine(void); -HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber); -HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber); -HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber); -HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber); -void HAL_PWREx_EnablePullUpPullDownConfig(void); -void HAL_PWREx_DisablePullUpPullDownConfig(void); -void HAL_PWREx_EnableSRAM2ContentRetention(void); -void HAL_PWREx_DisableSRAM2ContentRetention(void); -#if defined(PWR_CR1_RRSTP) -void HAL_PWREx_EnableSRAM3ContentRetention(void); -void HAL_PWREx_DisableSRAM3ContentRetention(void); -#endif /* PWR_CR1_RRSTP */ -#if defined(PWR_CR3_DSIPDEN) -void HAL_PWREx_EnableDSIPinsPDActivation(void); -void HAL_PWREx_DisableDSIPinsPDActivation(void); -#endif /* PWR_CR3_DSIPDEN */ -#if defined(PWR_CR2_PVME1) -void HAL_PWREx_EnablePVM1(void); -void HAL_PWREx_DisablePVM1(void); -#endif /* PWR_CR2_PVME1 */ -#if defined(PWR_CR2_PVME2) -void HAL_PWREx_EnablePVM2(void); -void HAL_PWREx_DisablePVM2(void); -#endif /* PWR_CR2_PVME2 */ -void HAL_PWREx_EnablePVM3(void); -void HAL_PWREx_DisablePVM3(void); -void HAL_PWREx_EnablePVM4(void); -void HAL_PWREx_DisablePVM4(void); -HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM); - - -/* Low Power modes configuration functions ************************************/ -void HAL_PWREx_EnableLowPowerRunMode(void); -HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void); -void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry); -void HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry); -void HAL_PWREx_EnterSTOP2Mode(uint8_t STOPEntry); -void HAL_PWREx_EnterSHUTDOWNMode(void); - -void HAL_PWREx_PVD_PVM_IRQHandler(void); -#if defined(PWR_CR2_PVME1) -void HAL_PWREx_PVM1Callback(void); -#endif /* PWR_CR2_PVME1 */ -#if defined(PWR_CR2_PVME2) -void HAL_PWREx_PVM2Callback(void); -#endif /* PWR_CR2_PVME2 */ -void HAL_PWREx_PVM3Callback(void); -void HAL_PWREx_PVM4Callback(void); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_PWR_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h deleted file mode 100644 index 9c8014cd..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h +++ /dev/null @@ -1,4594 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rcc.h - * @author MCD Application Team - * @brief Header file of RCC HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RCC_H -#define __STM32L4xx_HAL_RCC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RCC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup RCC_Exported_Types RCC Exported Types - * @{ - */ - -/** - * @brief RCC PLL configuration structure definition - */ -typedef struct -{ - uint32_t PLLState; /*!< The new state of the PLL. - This parameter can be a value of @ref RCC_PLL_Config */ - - uint32_t PLLSource; /*!< RCC_PLLSource: PLL entry clock source. - This parameter must be a value of @ref RCC_PLL_Clock_Source */ - - uint32_t PLLM; /*!< PLLM: Division factor for PLL VCO input clock. - This parameter must be a number between Min_Data = 1 and Max_Data = 16 on STM32L4Rx/STM32L4Sx devices. - This parameter must be a number between Min_Data = 1 and Max_Data = 8 on the other devices */ - - uint32_t PLLN; /*!< PLLN: Multiplication factor for PLL VCO output clock. - This parameter must be a number between Min_Data = 8 and Max_Data = 86 */ - - uint32_t PLLP; /*!< PLLP: Division factor for SAI clock. - This parameter must be a value of @ref RCC_PLLP_Clock_Divider */ - - uint32_t PLLQ; /*!< PLLQ: Division factor for SDMMC1, RNG and USB clocks. - This parameter must be a value of @ref RCC_PLLQ_Clock_Divider */ - - uint32_t PLLR; /*!< PLLR: Division for the main system clock. - User have to set the PLLR parameter correctly to not exceed max frequency 80MHZ. - This parameter must be a value of @ref RCC_PLLR_Clock_Divider */ - -}RCC_PLLInitTypeDef; - -/** - * @brief RCC Internal/External Oscillator (HSE, HSI, MSI, LSE and LSI) configuration structure definition - */ -typedef struct -{ - uint32_t OscillatorType; /*!< The oscillators to be configured. - This parameter can be a value of @ref RCC_Oscillator_Type */ - - uint32_t HSEState; /*!< The new state of the HSE. - This parameter can be a value of @ref RCC_HSE_Config */ - - uint32_t LSEState; /*!< The new state of the LSE. - This parameter can be a value of @ref RCC_LSE_Config */ - - uint32_t HSIState; /*!< The new state of the HSI. - This parameter can be a value of @ref RCC_HSI_Config */ - - uint32_t HSICalibrationValue; /*!< The calibration trimming value (default is RCC_HSICALIBRATION_DEFAULT). - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F on STM32L43x/STM32L44x/STM32L47x/STM32L48x devices. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F on the other devices */ - - uint32_t LSIState; /*!< The new state of the LSI. - This parameter can be a value of @ref RCC_LSI_Config */ - - uint32_t MSIState; /*!< The new state of the MSI. - This parameter can be a value of @ref RCC_MSI_Config */ - - uint32_t MSICalibrationValue; /*!< The calibration trimming value (default is RCC_MSICALIBRATION_DEFAULT). - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ - - uint32_t MSIClockRange; /*!< The MSI frequency range. - This parameter can be a value of @ref RCC_MSI_Clock_Range */ - - uint32_t HSI48State; /*!< The new state of the HSI48 (only applicable to STM32L43x/STM32L44x/STM32L49x/STM32L4Ax devices). - This parameter can be a value of @ref RCC_HSI48_Config */ - - RCC_PLLInitTypeDef PLL; /*!< Main PLL structure parameters */ - -}RCC_OscInitTypeDef; - -/** - * @brief RCC System, AHB and APB busses clock configuration structure definition - */ -typedef struct -{ - uint32_t ClockType; /*!< The clock to be configured. - This parameter can be a value of @ref RCC_System_Clock_Type */ - - uint32_t SYSCLKSource; /*!< The clock source used as system clock (SYSCLK). - This parameter can be a value of @ref RCC_System_Clock_Source */ - - uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK). - This parameter can be a value of @ref RCC_AHB_Clock_Source */ - - uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK). - This parameter can be a value of @ref RCC_APB1_APB2_Clock_Source */ - - uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK). - This parameter can be a value of @ref RCC_APB1_APB2_Clock_Source */ - -}RCC_ClkInitTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RCC_Exported_Constants RCC Exported Constants - * @{ - */ - -/** @defgroup RCC_Timeout_Value Timeout Values - * @{ - */ -#define RCC_DBP_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define RCC_LSE_TIMEOUT_VALUE LSE_STARTUP_TIMEOUT -/** - * @} - */ - -/** @defgroup RCC_Oscillator_Type Oscillator Type - * @{ - */ -#define RCC_OSCILLATORTYPE_NONE 0x00000000U /*!< Oscillator configuration unchanged */ -#define RCC_OSCILLATORTYPE_HSE 0x00000001U /*!< HSE to configure */ -#define RCC_OSCILLATORTYPE_HSI 0x00000002U /*!< HSI to configure */ -#define RCC_OSCILLATORTYPE_LSE 0x00000004U /*!< LSE to configure */ -#define RCC_OSCILLATORTYPE_LSI 0x00000008U /*!< LSI to configure */ -#define RCC_OSCILLATORTYPE_MSI 0x00000010U /*!< MSI to configure */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_OSCILLATORTYPE_HSI48 0x00000020U /*!< HSI48 to configure */ -#endif /* RCC_HSI48_SUPPORT */ -/** - * @} - */ - -/** @defgroup RCC_HSE_Config HSE Config - * @{ - */ -#define RCC_HSE_OFF 0x00000000U /*!< HSE clock deactivation */ -#define RCC_HSE_ON RCC_CR_HSEON /*!< HSE clock activation */ -#define RCC_HSE_BYPASS (RCC_CR_HSEBYP | RCC_CR_HSEON) /*!< External clock source for HSE clock */ -/** - * @} - */ - -/** @defgroup RCC_LSE_Config LSE Config - * @{ - */ -#define RCC_LSE_OFF 0x00000000U /*!< LSE clock deactivation */ -#define RCC_LSE_ON RCC_BDCR_LSEON /*!< LSE clock activation */ -#define RCC_LSE_BYPASS (RCC_BDCR_LSEBYP | RCC_BDCR_LSEON) /*!< External clock source for LSE clock */ -/** - * @} - */ - -/** @defgroup RCC_HSI_Config HSI Config - * @{ - */ -#define RCC_HSI_OFF 0x00000000U /*!< HSI clock deactivation */ -#define RCC_HSI_ON RCC_CR_HSION /*!< HSI clock activation */ - -#if defined(STM32L431xx) || defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) -#define RCC_HSICALIBRATION_DEFAULT 0x10U /* Default HSI calibration trimming value */ -#else -#define RCC_HSICALIBRATION_DEFAULT 0x40U /* Default HSI calibration trimming value */ -#endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ -/** - * @} - */ - -/** @defgroup RCC_LSI_Config LSI Config - * @{ - */ -#define RCC_LSI_OFF 0x00000000U /*!< LSI clock deactivation */ -#define RCC_LSI_ON RCC_CSR_LSION /*!< LSI clock activation */ -/** - * @} - */ - -/** @defgroup RCC_MSI_Config MSI Config - * @{ - */ -#define RCC_MSI_OFF 0x00000000U /*!< MSI clock deactivation */ -#define RCC_MSI_ON RCC_CR_MSION /*!< MSI clock activation */ - -#define RCC_MSICALIBRATION_DEFAULT 0U /*!< Default MSI calibration trimming value */ -/** - * @} - */ - -#if defined(RCC_HSI48_SUPPORT) -/** @defgroup RCC_HSI48_Config HSI48 Config - * @{ - */ -#define RCC_HSI48_OFF 0x00000000U /*!< HSI48 clock deactivation */ -#define RCC_HSI48_ON RCC_CRRCR_HSI48ON /*!< HSI48 clock activation */ -/** - * @} - */ -#else -/** @defgroup RCC_HSI48_Config HSI48 Config - * @{ - */ -#define RCC_HSI48_OFF 0x00000000U /*!< HSI48 clock deactivation */ -/** - * @} - */ -#endif /* RCC_HSI48_SUPPORT */ - -/** @defgroup RCC_PLL_Config PLL Config - * @{ - */ -#define RCC_PLL_NONE 0x00000000U /*!< PLL configuration unchanged */ -#define RCC_PLL_OFF 0x00000001U /*!< PLL deactivation */ -#define RCC_PLL_ON 0x00000002U /*!< PLL activation */ -/** - * @} - */ - -/** @defgroup RCC_PLLP_Clock_Divider PLLP Clock Divider - * @{ - */ -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) -#define RCC_PLLP_DIV2 0x00000002U /*!< PLLP division factor = 2 */ -#define RCC_PLLP_DIV3 0x00000003U /*!< PLLP division factor = 3 */ -#define RCC_PLLP_DIV4 0x00000004U /*!< PLLP division factor = 4 */ -#define RCC_PLLP_DIV5 0x00000005U /*!< PLLP division factor = 5 */ -#define RCC_PLLP_DIV6 0x00000006U /*!< PLLP division factor = 6 */ -#define RCC_PLLP_DIV7 0x00000007U /*!< PLLP division factor = 7 */ -#define RCC_PLLP_DIV8 0x00000008U /*!< PLLP division factor = 8 */ -#define RCC_PLLP_DIV9 0x00000009U /*!< PLLP division factor = 9 */ -#define RCC_PLLP_DIV10 0x0000000AU /*!< PLLP division factor = 10 */ -#define RCC_PLLP_DIV11 0x0000000BU /*!< PLLP division factor = 11 */ -#define RCC_PLLP_DIV12 0x0000000CU /*!< PLLP division factor = 12 */ -#define RCC_PLLP_DIV13 0x0000000DU /*!< PLLP division factor = 13 */ -#define RCC_PLLP_DIV14 0x0000000EU /*!< PLLP division factor = 14 */ -#define RCC_PLLP_DIV15 0x0000000FU /*!< PLLP division factor = 15 */ -#define RCC_PLLP_DIV16 0x00000010U /*!< PLLP division factor = 16 */ -#define RCC_PLLP_DIV17 0x00000011U /*!< PLLP division factor = 17 */ -#define RCC_PLLP_DIV18 0x00000012U /*!< PLLP division factor = 18 */ -#define RCC_PLLP_DIV19 0x00000013U /*!< PLLP division factor = 19 */ -#define RCC_PLLP_DIV20 0x00000014U /*!< PLLP division factor = 20 */ -#define RCC_PLLP_DIV21 0x00000015U /*!< PLLP division factor = 21 */ -#define RCC_PLLP_DIV22 0x00000016U /*!< PLLP division factor = 22 */ -#define RCC_PLLP_DIV23 0x00000017U /*!< PLLP division factor = 23 */ -#define RCC_PLLP_DIV24 0x00000018U /*!< PLLP division factor = 24 */ -#define RCC_PLLP_DIV25 0x00000019U /*!< PLLP division factor = 25 */ -#define RCC_PLLP_DIV26 0x0000001AU /*!< PLLP division factor = 26 */ -#define RCC_PLLP_DIV27 0x0000001BU /*!< PLLP division factor = 27 */ -#define RCC_PLLP_DIV28 0x0000001CU /*!< PLLP division factor = 28 */ -#define RCC_PLLP_DIV29 0x0000001DU /*!< PLLP division factor = 29 */ -#define RCC_PLLP_DIV30 0x0000001EU /*!< PLLP division factor = 30 */ -#define RCC_PLLP_DIV31 0x0000001FU /*!< PLLP division factor = 31 */ -#else -#define RCC_PLLP_DIV7 0x00000007U /*!< PLLP division factor = 7 */ -#define RCC_PLLP_DIV17 0x00000011U /*!< PLLP division factor = 17 */ -#endif /* RCC_PLLP_DIV_2_31_SUPPORT */ -/** - * @} - */ - -/** @defgroup RCC_PLLQ_Clock_Divider PLLQ Clock Divider - * @{ - */ -#define RCC_PLLQ_DIV2 0x00000002U /*!< PLLQ division factor = 2 */ -#define RCC_PLLQ_DIV4 0x00000004U /*!< PLLQ division factor = 4 */ -#define RCC_PLLQ_DIV6 0x00000006U /*!< PLLQ division factor = 6 */ -#define RCC_PLLQ_DIV8 0x00000008U /*!< PLLQ division factor = 8 */ -/** - * @} - */ - -/** @defgroup RCC_PLLR_Clock_Divider PLLR Clock Divider - * @{ - */ -#define RCC_PLLR_DIV2 0x00000002U /*!< PLLR division factor = 2 */ -#define RCC_PLLR_DIV4 0x00000004U /*!< PLLR division factor = 4 */ -#define RCC_PLLR_DIV6 0x00000006U /*!< PLLR division factor = 6 */ -#define RCC_PLLR_DIV8 0x00000008U /*!< PLLR division factor = 8 */ -/** - * @} - */ - -/** @defgroup RCC_PLL_Clock_Source PLL Clock Source - * @{ - */ -#define RCC_PLLSOURCE_NONE 0x00000000U /*!< No clock selected as PLL entry clock source */ -#define RCC_PLLSOURCE_MSI RCC_PLLCFGR_PLLSRC_MSI /*!< MSI clock selected as PLL entry clock source */ -#define RCC_PLLSOURCE_HSI RCC_PLLCFGR_PLLSRC_HSI /*!< HSI clock selected as PLL entry clock source */ -#define RCC_PLLSOURCE_HSE RCC_PLLCFGR_PLLSRC_HSE /*!< HSE clock selected as PLL entry clock source */ -/** - * @} - */ - -/** @defgroup RCC_PLL_Clock_Output PLL Clock Output - * @{ - */ -#if defined(RCC_PLLSAI2_SUPPORT) -#define RCC_PLL_SAI3CLK RCC_PLLCFGR_PLLPEN /*!< PLLSAI3CLK selection from main PLL (for devices with PLLSAI2) */ -#else -#define RCC_PLL_SAI2CLK RCC_PLLCFGR_PLLPEN /*!< PLLSAI2CLK selection from main PLL (for devices without PLLSAI2) */ -#endif /* RCC_PLLSAI2_SUPPORT */ -#define RCC_PLL_48M1CLK RCC_PLLCFGR_PLLQEN /*!< PLL48M1CLK selection from main PLL */ -#define RCC_PLL_SYSCLK RCC_PLLCFGR_PLLREN /*!< PLLCLK selection from main PLL */ -/** - * @} - */ - -/** @defgroup RCC_PLLSAI1_Clock_Output PLLSAI1 Clock Output - * @{ - */ -#define RCC_PLLSAI1_SAI1CLK RCC_PLLSAI1CFGR_PLLSAI1PEN /*!< PLLSAI1CLK selection from PLLSAI1 */ -#define RCC_PLLSAI1_48M2CLK RCC_PLLSAI1CFGR_PLLSAI1QEN /*!< PLL48M2CLK selection from PLLSAI1 */ -#define RCC_PLLSAI1_ADC1CLK RCC_PLLSAI1CFGR_PLLSAI1REN /*!< PLLADC1CLK selection from PLLSAI1 */ -/** - * @} - */ - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** @defgroup RCC_PLLSAI2_Clock_Output PLLSAI2 Clock Output - * @{ - */ -#define RCC_PLLSAI2_SAI2CLK RCC_PLLSAI2CFGR_PLLSAI2PEN /*!< PLLSAI2CLK selection from PLLSAI2 */ -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) -#define RCC_PLLSAI2_DSICLK RCC_PLLSAI2CFGR_PLLSAI2QEN /*!< PLLDSICLK selection from PLLSAI2 */ -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) -#define RCC_PLLSAI2_ADC2CLK RCC_PLLSAI2CFGR_PLLSAI2REN /*!< PLLADC2CLK selection from PLLSAI2 */ -#else -#define RCC_PLLSAI2_LTDCCLK RCC_PLLSAI2CFGR_PLLSAI2REN /*!< PLLLTDCCLK selection from PLLSAI2 */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ -/** - * @} - */ - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** @defgroup RCC_MSI_Clock_Range MSI Clock Range - * @{ - */ -#define RCC_MSIRANGE_0 RCC_CR_MSIRANGE_0 /*!< MSI = 100 KHz */ -#define RCC_MSIRANGE_1 RCC_CR_MSIRANGE_1 /*!< MSI = 200 KHz */ -#define RCC_MSIRANGE_2 RCC_CR_MSIRANGE_2 /*!< MSI = 400 KHz */ -#define RCC_MSIRANGE_3 RCC_CR_MSIRANGE_3 /*!< MSI = 800 KHz */ -#define RCC_MSIRANGE_4 RCC_CR_MSIRANGE_4 /*!< MSI = 1 MHz */ -#define RCC_MSIRANGE_5 RCC_CR_MSIRANGE_5 /*!< MSI = 2 MHz */ -#define RCC_MSIRANGE_6 RCC_CR_MSIRANGE_6 /*!< MSI = 4 MHz */ -#define RCC_MSIRANGE_7 RCC_CR_MSIRANGE_7 /*!< MSI = 8 MHz */ -#define RCC_MSIRANGE_8 RCC_CR_MSIRANGE_8 /*!< MSI = 16 MHz */ -#define RCC_MSIRANGE_9 RCC_CR_MSIRANGE_9 /*!< MSI = 24 MHz */ -#define RCC_MSIRANGE_10 RCC_CR_MSIRANGE_10 /*!< MSI = 32 MHz */ -#define RCC_MSIRANGE_11 RCC_CR_MSIRANGE_11 /*!< MSI = 48 MHz */ -/** - * @} - */ - -/** @defgroup RCC_System_Clock_Type System Clock Type - * @{ - */ -#define RCC_CLOCKTYPE_SYSCLK 0x00000001U /*!< SYSCLK to configure */ -#define RCC_CLOCKTYPE_HCLK 0x00000002U /*!< HCLK to configure */ -#define RCC_CLOCKTYPE_PCLK1 0x00000004U /*!< PCLK1 to configure */ -#define RCC_CLOCKTYPE_PCLK2 0x00000008U /*!< PCLK2 to configure */ -/** - * @} - */ - -/** @defgroup RCC_System_Clock_Source System Clock Source - * @{ - */ -#define RCC_SYSCLKSOURCE_MSI RCC_CFGR_SW_MSI /*!< MSI selection as system clock */ -#define RCC_SYSCLKSOURCE_HSI RCC_CFGR_SW_HSI /*!< HSI selection as system clock */ -#define RCC_SYSCLKSOURCE_HSE RCC_CFGR_SW_HSE /*!< HSE selection as system clock */ -#define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL /*!< PLL selection as system clock */ -/** - * @} - */ - -/** @defgroup RCC_System_Clock_Source_Status System Clock Source Status - * @{ - */ -#define RCC_SYSCLKSOURCE_STATUS_MSI RCC_CFGR_SWS_MSI /*!< MSI used as system clock */ -#define RCC_SYSCLKSOURCE_STATUS_HSI RCC_CFGR_SWS_HSI /*!< HSI used as system clock */ -#define RCC_SYSCLKSOURCE_STATUS_HSE RCC_CFGR_SWS_HSE /*!< HSE used as system clock */ -#define RCC_SYSCLKSOURCE_STATUS_PLLCLK RCC_CFGR_SWS_PLL /*!< PLL used as system clock */ -/** - * @} - */ - -/** @defgroup RCC_AHB_Clock_Source AHB Clock Source - * @{ - */ -#define RCC_SYSCLK_DIV1 RCC_CFGR_HPRE_DIV1 /*!< SYSCLK not divided */ -#define RCC_SYSCLK_DIV2 RCC_CFGR_HPRE_DIV2 /*!< SYSCLK divided by 2 */ -#define RCC_SYSCLK_DIV4 RCC_CFGR_HPRE_DIV4 /*!< SYSCLK divided by 4 */ -#define RCC_SYSCLK_DIV8 RCC_CFGR_HPRE_DIV8 /*!< SYSCLK divided by 8 */ -#define RCC_SYSCLK_DIV16 RCC_CFGR_HPRE_DIV16 /*!< SYSCLK divided by 16 */ -#define RCC_SYSCLK_DIV64 RCC_CFGR_HPRE_DIV64 /*!< SYSCLK divided by 64 */ -#define RCC_SYSCLK_DIV128 RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */ -#define RCC_SYSCLK_DIV256 RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */ -#define RCC_SYSCLK_DIV512 RCC_CFGR_HPRE_DIV512 /*!< SYSCLK divided by 512 */ -/** - * @} - */ - -/** @defgroup RCC_APB1_APB2_Clock_Source APB1 APB2 Clock Source - * @{ - */ -#define RCC_HCLK_DIV1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */ -#define RCC_HCLK_DIV2 RCC_CFGR_PPRE1_DIV2 /*!< HCLK divided by 2 */ -#define RCC_HCLK_DIV4 RCC_CFGR_PPRE1_DIV4 /*!< HCLK divided by 4 */ -#define RCC_HCLK_DIV8 RCC_CFGR_PPRE1_DIV8 /*!< HCLK divided by 8 */ -#define RCC_HCLK_DIV16 RCC_CFGR_PPRE1_DIV16 /*!< HCLK divided by 16 */ -/** - * @} - */ - -/** @defgroup RCC_RTC_Clock_Source RTC Clock Source - * @{ - */ -#define RCC_RTCCLKSOURCE_NONE 0x00000000U /*!< No clock used as RTC clock */ -#define RCC_RTCCLKSOURCE_LSE RCC_BDCR_RTCSEL_0 /*!< LSE oscillator clock used as RTC clock */ -#define RCC_RTCCLKSOURCE_LSI RCC_BDCR_RTCSEL_1 /*!< LSI oscillator clock used as RTC clock */ -#define RCC_RTCCLKSOURCE_HSE_DIV32 RCC_BDCR_RTCSEL /*!< HSE oscillator clock divided by 32 used as RTC clock */ -/** - * @} - */ - -/** @defgroup RCC_MCO_Index MCO Index - * @{ - */ -#define RCC_MCO1 0x00000000U -#define RCC_MCO RCC_MCO1 /*!< MCO1 to be compliant with other families with 2 MCOs*/ -/** - * @} - */ - -/** @defgroup RCC_MCO1_Clock_Source MCO1 Clock Source - * @{ - */ -#define RCC_MCO1SOURCE_NOCLOCK 0x00000000U /*!< MCO1 output disabled, no clock on MCO1 */ -#define RCC_MCO1SOURCE_SYSCLK RCC_CFGR_MCOSEL_0 /*!< SYSCLK selection as MCO1 source */ -#define RCC_MCO1SOURCE_MSI RCC_CFGR_MCOSEL_1 /*!< MSI selection as MCO1 source */ -#define RCC_MCO1SOURCE_HSI (RCC_CFGR_MCOSEL_0| RCC_CFGR_MCOSEL_1) /*!< HSI selection as MCO1 source */ -#define RCC_MCO1SOURCE_HSE RCC_CFGR_MCOSEL_2 /*!< HSE selection as MCO1 source */ -#define RCC_MCO1SOURCE_PLLCLK (RCC_CFGR_MCOSEL_0|RCC_CFGR_MCOSEL_2) /*!< PLLCLK selection as MCO1 source */ -#define RCC_MCO1SOURCE_LSI (RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_2) /*!< LSI selection as MCO1 source */ -#define RCC_MCO1SOURCE_LSE (RCC_CFGR_MCOSEL_0|RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_2) /*!< LSE selection as MCO1 source */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_MCO1SOURCE_HSI48 RCC_CFGR_MCOSEL_3 /*!< HSI48 selection as MCO1 source (STM32L43x/STM32L44x devices) */ -#endif /* RCC_HSI48_SUPPORT */ -/** - * @} - */ - -/** @defgroup RCC_MCOx_Clock_Prescaler MCO1 Clock Prescaler - * @{ - */ -#define RCC_MCODIV_1 RCC_CFGR_MCOPRE_DIV1 /*!< MCO not divided */ -#define RCC_MCODIV_2 RCC_CFGR_MCOPRE_DIV2 /*!< MCO divided by 2 */ -#define RCC_MCODIV_4 RCC_CFGR_MCOPRE_DIV4 /*!< MCO divided by 4 */ -#define RCC_MCODIV_8 RCC_CFGR_MCOPRE_DIV8 /*!< MCO divided by 8 */ -#define RCC_MCODIV_16 RCC_CFGR_MCOPRE_DIV16 /*!< MCO divided by 16 */ -/** - * @} - */ - -/** @defgroup RCC_Interrupt Interrupts - * @{ - */ -#define RCC_IT_LSIRDY RCC_CIFR_LSIRDYF /*!< LSI Ready Interrupt flag */ -#define RCC_IT_LSERDY RCC_CIFR_LSERDYF /*!< LSE Ready Interrupt flag */ -#define RCC_IT_MSIRDY RCC_CIFR_MSIRDYF /*!< MSI Ready Interrupt flag */ -#define RCC_IT_HSIRDY RCC_CIFR_HSIRDYF /*!< HSI16 Ready Interrupt flag */ -#define RCC_IT_HSERDY RCC_CIFR_HSERDYF /*!< HSE Ready Interrupt flag */ -#define RCC_IT_PLLRDY RCC_CIFR_PLLRDYF /*!< PLL Ready Interrupt flag */ -#define RCC_IT_PLLSAI1RDY RCC_CIFR_PLLSAI1RDYF /*!< PLLSAI1 Ready Interrupt flag */ -#if defined(RCC_PLLSAI2_SUPPORT) -#define RCC_IT_PLLSAI2RDY RCC_CIFR_PLLSAI2RDYF /*!< PLLSAI2 Ready Interrupt flag */ -#endif /* RCC_PLLSAI2_SUPPORT */ -#define RCC_IT_CSS RCC_CIFR_CSSF /*!< Clock Security System Interrupt flag */ -#define RCC_IT_LSECSS RCC_CIFR_LSECSSF /*!< LSE Clock Security System Interrupt flag */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_IT_HSI48RDY RCC_CIFR_HSI48RDYF /*!< HSI48 Ready Interrupt flag */ -#endif /* RCC_HSI48_SUPPORT */ -/** - * @} - */ - -/** @defgroup RCC_Flag Flags - * Elements values convention: XXXYYYYYb - * - YYYYY : Flag position in the register - * - XXX : Register index - * - 001: CR register - * - 010: BDCR register - * - 011: CSR register - * - 100: CRRCR register - * @{ - */ -/* Flags in the CR register */ -#define RCC_FLAG_MSIRDY ((CR_REG_INDEX << 5U) | RCC_CR_MSIRDY_Pos) /*!< MSI Ready flag */ -#define RCC_FLAG_HSIRDY ((CR_REG_INDEX << 5U) | RCC_CR_HSIRDY_Pos) /*!< HSI Ready flag */ -#define RCC_FLAG_HSERDY ((CR_REG_INDEX << 5U) | RCC_CR_HSERDY_Pos) /*!< HSE Ready flag */ -#define RCC_FLAG_PLLRDY ((CR_REG_INDEX << 5U) | RCC_CR_PLLRDY_Pos) /*!< PLL Ready flag */ -#define RCC_FLAG_PLLSAI1RDY ((CR_REG_INDEX << 5U) | RCC_CR_PLLSAI1RDY_Pos) /*!< PLLSAI1 Ready flag */ -#if defined(RCC_PLLSAI2_SUPPORT) -#define RCC_FLAG_PLLSAI2RDY ((CR_REG_INDEX << 5U) | RCC_CR_PLLSAI2RDY_Pos) /*!< PLLSAI2 Ready flag */ -#endif /* RCC_PLLSAI2_SUPPORT */ - -/* Flags in the BDCR register */ -#define RCC_FLAG_LSERDY ((BDCR_REG_INDEX << 5U) | RCC_BDCR_LSERDY_Pos) /*!< LSE Ready flag */ -#define RCC_FLAG_LSECSSD ((BDCR_REG_INDEX << 5U) | RCC_BDCR_LSECSSD_Pos) /*!< LSE Clock Security System Interrupt flag */ - -/* Flags in the CSR register */ -#define RCC_FLAG_LSIRDY ((CSR_REG_INDEX << 5U) | RCC_CSR_LSIRDY_Pos) /*!< LSI Ready flag */ -#define RCC_FLAG_RMVF ((CSR_REG_INDEX << 5U) | RCC_CSR_RMVF_Pos) /*!< Remove reset flag */ -#define RCC_FLAG_FWRST ((CSR_REG_INDEX << 5U) | RCC_CSR_FWRSTF_Pos) /*!< Firewall reset flag */ -#define RCC_FLAG_OBLRST ((CSR_REG_INDEX << 5U) | RCC_CSR_OBLRSTF_Pos) /*!< Option Byte Loader reset flag */ -#define RCC_FLAG_PINRST ((CSR_REG_INDEX << 5U) | RCC_CSR_PINRSTF_Pos) /*!< PIN reset flag */ -#define RCC_FLAG_BORRST ((CSR_REG_INDEX << 5U) | RCC_CSR_BORRSTF_Pos) /*!< BOR reset flag */ -#define RCC_FLAG_SFTRST ((CSR_REG_INDEX << 5U) | RCC_CSR_SFTRSTF_Pos) /*!< Software Reset flag */ -#define RCC_FLAG_IWDGRST ((CSR_REG_INDEX << 5U) | RCC_CSR_IWDGRSTF_Pos) /*!< Independent Watchdog reset flag */ -#define RCC_FLAG_WWDGRST ((CSR_REG_INDEX << 5U) | RCC_CSR_WWDGRSTF_Pos) /*!< Window watchdog reset flag */ -#define RCC_FLAG_LPWRRST ((CSR_REG_INDEX << 5U) | RCC_CSR_LPWRRSTF_Pos) /*!< Low-Power reset flag */ - -#if defined(RCC_HSI48_SUPPORT) -/* Flags in the CRRCR register */ -#define RCC_FLAG_HSI48RDY ((CRRCR_REG_INDEX << 5U) | RCC_CRRCR_HSI48RDY_Pos) /*!< HSI48 Ready flag */ -#endif /* RCC_HSI48_SUPPORT */ -/** - * @} - */ - -/** @defgroup RCC_LSEDrive_Config LSE Drive Config - * @{ - */ -#define RCC_LSEDRIVE_LOW 0x00000000U /*!< LSE low drive capability */ -#define RCC_LSEDRIVE_MEDIUMLOW RCC_BDCR_LSEDRV_0 /*!< LSE medium low drive capability */ -#define RCC_LSEDRIVE_MEDIUMHIGH RCC_BDCR_LSEDRV_1 /*!< LSE medium high drive capability */ -#define RCC_LSEDRIVE_HIGH RCC_BDCR_LSEDRV /*!< LSE high drive capability */ -/** - * @} - */ - -/** @defgroup RCC_Stop_WakeUpClock Wake-Up from STOP Clock - * @{ - */ -#define RCC_STOP_WAKEUPCLOCK_MSI 0x00000000U /*!< MSI selection after wake-up from STOP */ -#define RCC_STOP_WAKEUPCLOCK_HSI RCC_CFGR_STOPWUCK /*!< HSI selection after wake-up from STOP */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ - -/** @defgroup RCC_Exported_Macros RCC Exported Macros - * @{ - */ - -/** @defgroup RCC_AHB1_Peripheral_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable - * @brief Enable or disable the AHB1 peripheral clock. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_DMA1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_DMA2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_CRC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_TSC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GFXMMU */ - - -#define __HAL_RCC_DMA1_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN) - -#define __HAL_RCC_DMA2_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN) - -#define __HAL_RCC_CRC_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) - -#define __HAL_RCC_TSC_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN) -#endif /* GFXMMU */ - -/** - * @} - */ - -/** @defgroup RCC_AHB2_Peripheral_Clock_Enable_Disable AHB2 Peripheral Clock Enable Disable - * @brief Enable or disable the AHB2 peripheral clock. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_GPIOA_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_GPIOB_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_GPIOC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOIEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOIEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* HASH */ - -#define __HAL_RCC_RNG_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OSPIMEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OSPIMEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* SDMMC1 && RCC_AHB2ENR_SDMMC1EN */ - - -#define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) - -#define __HAL_RCC_GPIOB_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN) - -#define __HAL_RCC_GPIOC_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOIEN) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN); -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) -#endif /* HASH */ - -#define __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OSPIMEN) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN) -#endif /* SDMMC1 && RCC_AHB2ENR_SDMMC1EN */ - -/** - * @} - */ - -/** @defgroup RCC_AHB3_Clock_Enable_Disable AHB3 Peripheral Clock Enable Disable - * @brief Enable or disable the AHB3 peripheral clock. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI2EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* OCTOSPI2 */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI1EN) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI2EN) -#endif /* OCTOSPI2 */ - -/** - * @} - */ - -/** @defgroup RCC_APB1_Clock_Enable_Disable APB1 Peripheral Clock Enable Disable - * @brief Enable or disable the APB1 peripheral clock. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_TIM2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_TIM7_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(LCD) -#define __HAL_RCC_LCD_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* LCD */ - -#if defined(RCC_APB1ENR1_RTCAPBEN) -#define __HAL_RCC_RTCAPB_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* RCC_APB1ENR1_RTCAPBEN */ - -#define __HAL_RCC_WWDG_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_USART2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(USART3) -#define __HAL_RCC_USART3_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN2EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* USB */ - -#define __HAL_RCC_PWR_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_DAC1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_OPAMP_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_LPTIM1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_LPUART1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \ - UNUSED(tmpreg); \ - } while(0) - - -#define __HAL_RCC_TIM2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN) - -#define __HAL_RCC_TIM7_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) - -#if defined(LCD) -#define __HAL_RCC_LCD_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN); -#endif /* LCD */ - -#if defined(RCC_APB1ENR1_RTCAPBEN) -#define __HAL_RCC_RTCAPB_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN); -#endif /* RCC_APB1ENR1_RTCAPBEN */ - -#if defined(SPI2) -#define __HAL_RCC_SPI2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN) - -#define __HAL_RCC_USART2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN) - -#if defined(USART3) -#define __HAL_RCC_USART3_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); -#endif /* CRS */ - -#define __HAL_RCC_CAN1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN2EN) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN); -#endif /* USB */ - -#define __HAL_RCC_PWR_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN) - -#define __HAL_RCC_DAC1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN) - -#define __HAL_RCC_OPAMP_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN) - -#define __HAL_RCC_LPTIM1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN) - -#define __HAL_RCC_LPUART1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN) - -/** - * @} - */ - -/** @defgroup RCC_APB2_Clock_Enable_Disable APB2 Peripheral Clock Enable Disable - * @brief Enable or disable the APB2 peripheral clock. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_SYSCFG_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_FIREWALL_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(SDMMC1) && defined(RCC_APB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* SDMMC1 && RCC_APB2ENR_SDMMC1EN */ - -#define __HAL_RCC_TIM1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_SPI1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \ - UNUSED(tmpreg); \ - } while(0) - - -#define __HAL_RCC_TIM15_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \ - UNUSED(tmpreg); \ - } while(0) - -#define __HAL_RCC_TIM16_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \ - UNUSED(tmpreg); \ - } while(0) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_CLK_ENABLE() do { \ - __IO uint32_t tmpreg; \ - SET_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN); \ - /* Delay after an RCC peripheral clock enabling */ \ - tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN); \ - UNUSED(tmpreg); \ - } while(0) -#endif /* DSI */ - - -#define __HAL_RCC_SYSCFG_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) - -#if defined(SDMMC1) && defined(RCC_APB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN) -#endif /* SDMMC1 && RCC_APB2ENR_SDMMC1EN */ - -#define __HAL_RCC_TIM1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN) - -#define __HAL_RCC_SPI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) - -#define __HAL_RCC_TIM15_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN) - -#define __HAL_RCC_TIM16_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN) -#endif /* DSI */ - -/** - * @} - */ - -/** @defgroup RCC_AHB1_Peripheral_Clock_Enable_Disable_Status AHB1 Peripheral Clock Enabled or Disabled Status - * @brief Check whether the AHB1 peripheral clock is enabled or not. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_DMA1_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN) != RESET) - -#define __HAL_RCC_DMA2_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN) != RESET) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN) != RESET) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN) != RESET) - -#define __HAL_RCC_CRC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) != RESET) - -#define __HAL_RCC_TSC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN) != RESET) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN) != RESET) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN) != RESET) -#endif /* GFXMMU */ - - -#define __HAL_RCC_DMA1_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN) == RESET) - -#define __HAL_RCC_DMA2_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN) == RESET) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN) == RESET) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN) == RESET) - -#define __HAL_RCC_CRC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) == RESET) - -#define __HAL_RCC_TSC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN) == RESET) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN) == RESET) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN) == RESET) -#endif /* GFXMMU */ - -/** - * @} - */ - -/** @defgroup RCC_AHB2_Clock_Enable_Disable_Status AHB2 Peripheral Clock Enabled or Disabled Status - * @brief Check whether the AHB2 peripheral clock is enabled or not. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_GPIOA_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) != RESET) - -#define __HAL_RCC_GPIOB_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN) != RESET) - -#define __HAL_RCC_GPIOC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN) != RESET) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) != RESET) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN) != RESET) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN) != RESET) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) != RESET) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN) != RESET) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOIEN) != RESET) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN) != RESET) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) != RESET) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN) != RESET) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN) != RESET) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) != RESET) -#endif /* HASH */ - -#define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) != RESET) - - -#define __HAL_RCC_GPIOA_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) == RESET) - -#define __HAL_RCC_GPIOB_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN) == RESET) - -#define __HAL_RCC_GPIOC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN) == RESET) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) == RESET) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN) == RESET) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN) == RESET) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) == RESET) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN) == RESET) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOIEN) == RESET) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN) == RESET) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) == RESET) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN) == RESET) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN) == RESET) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) == RESET) -#endif /* HASH */ - -#define __HAL_RCC_RNG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) == RESET) - -/** - * @} - */ - -/** @defgroup RCC_AHB3_Clock_Enable_Disable_Status AHB3 Peripheral Clock Enabled or Disabled Status - * @brief Check whether the AHB3 peripheral clock is enabled or not. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) != RESET) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_IS_CLK_ENABLED() (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN) != RESET) -#endif /* QUADSPI */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) == RESET) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_IS_CLK_DISABLED() (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN) == RESET) -#endif /* QUADSPI */ - -/** - * @} - */ - -/** @defgroup RCC_APB1_Clock_Enable_Disable_Status APB1 Peripheral Clock Enabled or Disabled Status - * @brief Check whether the APB1 peripheral clock is enabled or not. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_TIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) != RESET) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN) != RESET) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) != RESET) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN) != RESET) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN) != RESET) - -#define __HAL_RCC_TIM7_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) != RESET) - -#if defined(LCD) -#define __HAL_RCC_LCD_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN) != RESET) -#endif /* LCD */ - -#if defined(RCC_APB1ENR1_RTCAPBEN) -#define __HAL_RCC_RTCAPB_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN) != RESET) -#endif /* RCC_APB1ENR1_RTCAPBEN */ - -#define __HAL_RCC_WWDG_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) != RESET) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN) != RESET) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN) != RESET) - -#define __HAL_RCC_USART2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN) != RESET) - -#if defined(USART3) -#define __HAL_RCC_USART3_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN) != RESET) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN) != RESET) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN) != RESET) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN) != RESET) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN) != RESET) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN) != RESET) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN) != RESET) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) != RESET) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN) != RESET) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN2EN) != RESET) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN) != RESET) -#endif /* USB */ - -#define __HAL_RCC_PWR_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN) != RESET) - -#define __HAL_RCC_DAC1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN) != RESET) - -#define __HAL_RCC_OPAMP_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN) != RESET) - -#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN) != RESET) - -#define __HAL_RCC_LPUART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) != RESET) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN) != RESET) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN) != RESET) - - -#define __HAL_RCC_TIM2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) == RESET) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN) == RESET) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) == RESET) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN) == RESET) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN) == RESET) - -#define __HAL_RCC_TIM7_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) == RESET) - -#if defined(LCD) -#define __HAL_RCC_LCD_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN) == RESET) -#endif /* LCD */ - -#if defined(RCC_APB1ENR1_RTCAPBEN) -#define __HAL_RCC_RTCAPB_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN) == RESET) -#endif /* RCC_APB1ENR1_RTCAPBEN */ - -#define __HAL_RCC_WWDG_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) == RESET) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN) == RESET) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN) == RESET) - -#define __HAL_RCC_USART2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN) == RESET) - -#if defined(USART3) -#define __HAL_RCC_USART3_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN) == RESET) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN) == RESET) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN) == RESET) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN) == RESET) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN) == RESET) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN) == RESET) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN) == RESET) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN) == RESET) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN) == RESET) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN2EN) == RESET) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN) == RESET) -#endif /* USB */ - -#define __HAL_RCC_PWR_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN) == RESET) - -#define __HAL_RCC_DAC1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN) == RESET) - -#define __HAL_RCC_OPAMP_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN) == RESET) - -#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN) == RESET) - -#define __HAL_RCC_LPUART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) == RESET) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN) == RESET) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN) == RESET) - -/** - * @} - */ - -/** @defgroup RCC_APB2_Clock_Enable_Disable_Status APB2 Peripheral Clock Enabled or Disabled Status - * @brief Check whether the APB2 peripheral clock is enabled or not. - * @note After reset, the peripheral clock (used for registers read/write access) - * is disabled and the application software has to enable this clock before - * using it. - * @{ - */ - -#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) != RESET) - -#define __HAL_RCC_FIREWALL_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN) != RESET) - -#if defined(SDMMC1) && defined(RCC_APB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN) != RESET) -#endif /* SDMMC1 && RCC_APB2ENR_SDMMC1EN */ - -#define __HAL_RCC_TIM1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN) != RESET) - -#define __HAL_RCC_SPI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN) != RESET) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) != RESET) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) != RESET) - -#define __HAL_RCC_TIM15_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN) != RESET) - -#define __HAL_RCC_TIM16_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN) != RESET) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN) != RESET) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) != RESET) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) != RESET) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN) != RESET) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN) != RESET) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN) != RESET) -#endif /* DSI */ - - -#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) == RESET) - -#if defined(SDMMC1) && defined(RCC_APB2ENR_SDMMC1EN) -#define __HAL_RCC_SDMMC1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN) == RESET) -#endif /* SDMMC1 && RCC_APB2ENR_SDMMC1EN */ - -#define __HAL_RCC_TIM1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN) == RESET) - -#define __HAL_RCC_SPI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN) == RESET) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) == RESET) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) == RESET) - -#define __HAL_RCC_TIM15_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN) == RESET) - -#define __HAL_RCC_TIM16_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN) == RESET) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN) == RESET) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) == RESET) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) == RESET) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN) == RESET) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_LTDCEN) == RESET) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DSIEN) == RESET) -#endif /* DSI */ - -/** - * @} - */ - -/** @defgroup RCC_AHB1_Force_Release_Reset AHB1 Peripheral Force Release Reset - * @brief Force or release AHB1 peripheral reset. - * @{ - */ -#define __HAL_RCC_AHB1_FORCE_RESET() WRITE_REG(RCC->AHB1RSTR, 0xFFFFFFFFU) - -#define __HAL_RCC_DMA1_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA1RST) - -#define __HAL_RCC_DMA2_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA2RST) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMAMUX1RST) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_FLASHRST) - -#define __HAL_RCC_CRC_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_CRCRST) - -#define __HAL_RCC_TSC_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_TSCRST) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA2DRST) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_FORCE_RESET() SET_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_GFXMMURST) -#endif /* GFXMMU */ - - -#define __HAL_RCC_AHB1_RELEASE_RESET() WRITE_REG(RCC->AHB1RSTR, 0x00000000U) - -#define __HAL_RCC_DMA1_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA1RST) - -#define __HAL_RCC_DMA2_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA2RST) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMAMUX1RST) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_FLASHRST) - -#define __HAL_RCC_CRC_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_CRCRST) - -#define __HAL_RCC_TSC_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_TSCRST) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_DMA2DRST) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_RELEASE_RESET() CLEAR_BIT(RCC->AHB1RSTR, RCC_AHB1RSTR_GFXMMURST) -#endif /* GFXMMU */ - -/** - * @} - */ - -/** @defgroup RCC_AHB2_Force_Release_Reset AHB2 Peripheral Force Release Reset - * @brief Force or release AHB2 peripheral reset. - * @{ - */ -#define __HAL_RCC_AHB2_FORCE_RESET() WRITE_REG(RCC->AHB2RSTR, 0xFFFFFFFFU) - -#define __HAL_RCC_GPIOA_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOARST) - -#define __HAL_RCC_GPIOB_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOBRST) - -#define __HAL_RCC_GPIOC_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOCRST) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIODRST) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOERST) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOFRST) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOGRST) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOHRST) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOIRST) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_OTGFSRST) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_ADCRST) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_DCMIRST) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_AESRST) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_HASHRST) -#endif /* HASH */ - -#define __HAL_RCC_RNG_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_RNGRST) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_OSPIMRST) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2RSTR_SDMMC1RST) -#define __HAL_RCC_SDMMC1_FORCE_RESET() SET_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_SDMMC1RST) -#endif /* SDMMC1 && RCC_AHB2RSTR_SDMMC1RST */ - - -#define __HAL_RCC_AHB2_RELEASE_RESET() WRITE_REG(RCC->AHB2RSTR, 0x00000000U) - -#define __HAL_RCC_GPIOA_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOARST) - -#define __HAL_RCC_GPIOB_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOBRST) - -#define __HAL_RCC_GPIOC_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOCRST) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIODRST) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOERST) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOFRST) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOGRST) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOHRST) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_GPIOIRST) -#endif /* GPIOI */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_OTGFSRST) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_ADCRST) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_DCMIRST) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_AESRST) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_HASHRST) -#endif /* HASH */ - -#define __HAL_RCC_RNG_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_RNGRST) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_OSPIMRST) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2RSTR_SDMMC1RST) -#define __HAL_RCC_SDMMC1_RELEASE_RESET() CLEAR_BIT(RCC->AHB2RSTR, RCC_AHB2RSTR_SDMMC1RST) -#endif /* SDMMC1 && RCC_AHB2RSTR_SDMMC1RST */ - -/** - * @} - */ - -/** @defgroup RCC_AHB3_Force_Release_Reset AHB3 Peripheral Force Release Reset - * @brief Force or release AHB3 peripheral reset. - * @{ - */ -#define __HAL_RCC_AHB3_FORCE_RESET() WRITE_REG(RCC->AHB3RSTR, 0xFFFFFFFFU) - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_FORCE_RESET() SET_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_FMCRST) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_FORCE_RESET() SET_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_QSPIRST) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_FORCE_RESET() SET_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_OSPI1RST) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_FORCE_RESET() SET_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_OSPI2RST) -#endif /* OCTOSPI2 */ - -#define __HAL_RCC_AHB3_RELEASE_RESET() WRITE_REG(RCC->AHB3RSTR, 0x00000000U) - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_RELEASE_RESET() CLEAR_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_FMCRST) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_RELEASE_RESET() CLEAR_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_QSPIRST) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_RELEASE_RESET() CLEAR_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_OSPI1RST) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_RELEASE_RESET() CLEAR_BIT(RCC->AHB3RSTR, RCC_AHB3RSTR_OSPI2RST) -#endif /* OCTOSPI2 */ - -/** - * @} - */ - -/** @defgroup RCC_APB1_Force_Release_Reset APB1 Peripheral Force Release Reset - * @brief Force or release APB1 peripheral reset. - * @{ - */ -#define __HAL_RCC_APB1_FORCE_RESET() WRITE_REG(RCC->APB1RSTR1, 0xFFFFFFFFU) - -#define __HAL_RCC_TIM2_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM2RST) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM3RST) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM4RST) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM5RST) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM6RST) - -#define __HAL_RCC_TIM7_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM7RST) - -#if defined(LCD) -#define __HAL_RCC_LCD_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_LCDRST) -#endif /* LCD */ - -#if defined(SPI2) -#define __HAL_RCC_SPI2_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_SPI2RST) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_SPI3RST) - -#define __HAL_RCC_USART2_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USART2RST) - -#if defined(USART3) -#define __HAL_RCC_USART3_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USART3RST) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_UART4RST) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_UART5RST) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C1RST) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C2RST) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C3RST) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_FORCE_RESET() SET_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_I2C4RST) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CRSRST) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CAN1RST) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CAN2RST) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USBFSRST) -#endif /* USB */ - -#define __HAL_RCC_PWR_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_PWRRST) - -#define __HAL_RCC_DAC1_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_DAC1RST) - -#define __HAL_RCC_OPAMP_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_OPAMPRST) - -#define __HAL_RCC_LPTIM1_FORCE_RESET() SET_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_LPTIM1RST) - -#define __HAL_RCC_LPUART1_FORCE_RESET() SET_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_LPUART1RST) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_FORCE_RESET() SET_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_SWPMI1RST) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_FORCE_RESET() SET_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_LPTIM2RST) - - -#define __HAL_RCC_APB1_RELEASE_RESET() WRITE_REG(RCC->APB1RSTR1, 0x00000000U) - -#define __HAL_RCC_TIM2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM2RST) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM3RST) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM4RST) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM5RST) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM6RST) - -#define __HAL_RCC_TIM7_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_TIM7RST) - -#if defined(LCD) -#define __HAL_RCC_LCD_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_LCDRST) -#endif /* LCD */ - -#if defined(SPI2) -#define __HAL_RCC_SPI2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_SPI2RST) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_SPI3RST) - -#define __HAL_RCC_USART2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USART2RST) - -#if defined(USART3) -#define __HAL_RCC_USART3_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USART3RST) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_UART4RST) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_UART5RST) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C1RST) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C2RST) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_I2C3RST) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_I2C4RST) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CRSRST) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CAN1RST) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_CAN2RST) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_USBFSRST) -#endif /* USB */ - -#define __HAL_RCC_PWR_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_PWRRST) - -#define __HAL_RCC_DAC1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_DAC1RST) - -#define __HAL_RCC_OPAMP_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_OPAMPRST) - -#define __HAL_RCC_LPTIM1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR1, RCC_APB1RSTR1_LPTIM1RST) - -#define __HAL_RCC_LPUART1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_LPUART1RST) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_SWPMI1RST) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_RELEASE_RESET() CLEAR_BIT(RCC->APB1RSTR2, RCC_APB1RSTR2_LPTIM2RST) - -/** - * @} - */ - -/** @defgroup RCC_APB2_Force_Release_Reset APB2 Peripheral Force Release Reset - * @brief Force or release APB2 peripheral reset. - * @{ - */ -#define __HAL_RCC_APB2_FORCE_RESET() WRITE_REG(RCC->APB2RSTR, 0xFFFFFFFFU) - -#define __HAL_RCC_SYSCFG_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SYSCFGRST) - -#if defined(SDMMC1) && defined(RCC_APB2RSTR_SDMMC1RST) -#define __HAL_RCC_SDMMC1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SDMMC1RST) -#endif /* SDMMC1 && RCC_APB2RSTR_SDMMC1RST */ - -#define __HAL_RCC_TIM1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM1RST) - -#define __HAL_RCC_SPI1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SPI1RST) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM8RST) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_USART1RST) - -#define __HAL_RCC_TIM15_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM15RST) - -#define __HAL_RCC_TIM16_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM16RST) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM17RST) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SAI1RST) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SAI2RST) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_DFSDM1RST) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_LTDCRST) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_FORCE_RESET() SET_BIT(RCC->APB2RSTR, RCC_APB2RSTR_DSIRST) -#endif /* DSI */ - - -#define __HAL_RCC_APB2_RELEASE_RESET() WRITE_REG(RCC->APB2RSTR, 0x00000000U) - -#define __HAL_RCC_SYSCFG_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SYSCFGRST) - -#if defined(SDMMC1) && defined(RCC_APB2RSTR_SDMMC1RST) -#define __HAL_RCC_SDMMC1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SDMMC1RST) -#endif /* SDMMC1 && RCC_APB2RSTR_SDMMC1RST */ - -#define __HAL_RCC_TIM1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM1RST) - -#define __HAL_RCC_SPI1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SPI1RST) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM8RST) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_USART1RST) - -#define __HAL_RCC_TIM15_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM15RST) - -#define __HAL_RCC_TIM16_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM16RST) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_TIM17RST) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SAI1RST) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_SAI2RST) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_DFSDM1RST) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_LTDCRST) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_RELEASE_RESET() CLEAR_BIT(RCC->APB2RSTR, RCC_APB2RSTR_DSIRST) -#endif /* DSI */ - -/** - * @} - */ - -/** @defgroup RCC_AHB1_Clock_Sleep_Enable_Disable AHB1 Peripheral Clock Sleep Enable Disable - * @brief Enable or disable the AHB1 peripheral clock during Low Power (Sleep) mode. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_DMA1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA1SMEN) - -#define __HAL_RCC_DMA2_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2SMEN) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMAMUX1SMEN) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_FLASHSMEN) - -#define __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_SRAM1SMEN) - -#define __HAL_RCC_CRC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) - -#define __HAL_RCC_TSC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_TSCSMEN) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2DSMEN) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_GFXMMUSMEN) -#endif /* GFXMMU */ - - -#define __HAL_RCC_DMA1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA1SMEN) - -#define __HAL_RCC_DMA2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2SMEN) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMAMUX1SMEN) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_FLASHSMEN) - -#define __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_SRAM1SMEN) - -#define __HAL_RCC_CRC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) - -#define __HAL_RCC_TSC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_TSCSMEN) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2DSMEN) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_GFXMMUSMEN) -#endif /* GFXMMU */ - -/** - * @} - */ - -/** @defgroup RCC_AHB2_Clock_Sleep_Enable_Disable AHB2 Peripheral Clock Sleep Enable Disable - * @brief Enable or disable the AHB2 peripheral clock during Low Power (Sleep) mode. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) - -#define __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) - -#define __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOISMEN) -#endif /* GPIOI */ - -#define __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) - -#if defined(SRAM3) -#define __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM3SMEN) -#endif /* SRAM3 */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_DCMISMEN) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_HASHSMEN) -#endif /* HASH */ - -#define __HAL_RCC_RNG_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OSPIMSMEN) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN) -#endif /* SDMMC1 && RCC_AHB2SMENR_SDMMC1SMEN */ - - -#define __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) - -#define __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) - -#define __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOISMEN) -#endif /* GPIOI */ - -#define __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) - -#if defined(SRAM3) -#define __HAL_RCC_SRAM3_IS_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM3SMEN) -#endif /* SRAM3 */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_DCMISMEN) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_HASHSMEN) -#endif /* HASH */ - -#define __HAL_RCC_RNG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OSPIMSMEN) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN) -#endif /* SDMMC1 && RCC_AHB2SMENR_SDMMC1SMEN */ - -/** - * @} - */ - -/** @defgroup RCC_AHB3_Clock_Sleep_Enable_Disable AHB3 Peripheral Clock Sleep Enable Disable - * @brief Enable or disable the AHB3 peripheral clock during Low Power (Sleep) mode. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI2SMEN) -#endif /* OCTOSPI2 */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) -#endif /* FMC_BANK1 */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI2SMEN) -#endif /* OCTOSPI2 */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) -#endif /* FMC_BANK1 */ - -/** - * @} - */ - -/** @defgroup RCC_APB1_Clock_Sleep_Enable_Disable APB1 Peripheral Clock Sleep Enable Disable - * @brief Enable or disable the APB1 peripheral clock during Low Power (Sleep) mode. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_TIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) - -#define __HAL_RCC_TIM7_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) - -#if defined(LCD) -#define __HAL_RCC_LCD_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) -#endif /* LCD */ - -#if defined(RCC_APB1SMENR1_RTCAPBSMEN) -#define __HAL_RCC_RTCAPB_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_RTCAPBSMEN) -#endif /* RCC_APB1SMENR1_RTCAPBSMEN */ - -#define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) - -#define __HAL_RCC_USART2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) - -#if defined(USART3) -#define __HAL_RCC_USART3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_I2C4SMEN) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CRSSMEN) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN2SMEN) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USBFSSMEN) -#endif /* USB */ - -#define __HAL_RCC_PWR_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) - -#define __HAL_RCC_DAC1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) - -#define __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) - -#define __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) - -#define __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) - - -#define __HAL_RCC_TIM2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) - -#define __HAL_RCC_TIM7_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) - -#if defined(LCD) -#define __HAL_RCC_LCD_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) -#endif /* LCD */ - -#if defined(RCC_APB1SMENR1_RTCAPBSMEN) -#define __HAL_RCC_RTCAPB_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_RTCAPBSMEN) -#endif /* RCC_APB1SMENR1_RTCAPBSMEN */ - -#define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) - -#define __HAL_RCC_USART2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) - -#if defined(USART3) -#define __HAL_RCC_USART3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_I2C4SMEN) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CRSSMEN) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN2SMEN) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USBFSSMEN) -#endif /* USB */ - -#define __HAL_RCC_PWR_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) - -#define __HAL_RCC_DAC1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) - -#define __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) - -#define __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) - -#define __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) - -/** - * @} - */ - -/** @defgroup RCC_APB2_Clock_Sleep_Enable_Disable APB2 Peripheral Clock Sleep Enable Disable - * @brief Enable or disable the APB2 peripheral clock during Low Power (Sleep) mode. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) - -#if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) -#endif /* SDMMC1 && RCC_APB2SMENR_SDMMC1SMEN */ - -#define __HAL_RCC_TIM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) - -#define __HAL_RCC_SPI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) - -#define __HAL_RCC_TIM15_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) - -#define __HAL_RCC_TIM16_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_LTDCSMEN) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DSISMEN) -#endif /* DSI */ - - -#define __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) - -#if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) -#endif /* SDMMC1 && RCC_APB2SMENR_SDMMC1SMEN */ - -#define __HAL_RCC_TIM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) - -#define __HAL_RCC_SPI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) - -#define __HAL_RCC_TIM15_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) - -#define __HAL_RCC_TIM16_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_LTDCSMEN) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DSISMEN) -#endif /* DSI */ - -/** - * @} - */ - -/** @defgroup RCC_AHB1_Clock_Sleep_Enable_Disable_Status AHB1 Peripheral Clock Sleep Enabled or Disabled Status - * @brief Check whether the AHB1 peripheral clock during Low Power (Sleep) mode is enabled or not. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_DMA1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA1SMEN) != RESET) - -#define __HAL_RCC_DMA2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2SMEN) != RESET) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMAMUX1SMEN) != RESET) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_FLASHSMEN) != RESET) - -#define __HAL_RCC_SRAM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_SRAM1SMEN) != RESET) - -#define __HAL_RCC_CRC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) != RESET) - -#define __HAL_RCC_TSC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_TSCSMEN) != RESET) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2DSMEN) != RESET) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_GFXMMUSMEN) != RESET) -#endif /* GFXMMU */ - - -#define __HAL_RCC_DMA1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA1SMEN) == RESET) - -#define __HAL_RCC_DMA2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2SMEN) == RESET) - -#if defined(DMAMUX1) -#define __HAL_RCC_DMAMUX1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMAMUX1SMEN) == RESET) -#endif /* DMAMUX1 */ - -#define __HAL_RCC_FLASH_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_FLASHSMEN) == RESET) - -#define __HAL_RCC_SRAM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_SRAM1SMEN) == RESET) - -#define __HAL_RCC_CRC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN) == RESET) - -#define __HAL_RCC_TSC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_TSCSMEN) == RESET) - -#if defined(DMA2D) -#define __HAL_RCC_DMA2D_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2DSMEN) == RESET) -#endif /* DMA2D */ - -#if defined(GFXMMU) -#define __HAL_RCC_GFXMMU_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_GFXMMUSMEN) == RESET) -#endif /* GFXMMU */ - -/** - * @} - */ - -/** @defgroup RCC_AHB2_Clock_Sleep_Enable_Disable_Status AHB2 Peripheral Clock Sleep Enabled or Disabled Status - * @brief Check whether the AHB2 peripheral clock during Low Power (Sleep) mode is enabled or not. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) != RESET) - -#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) != RESET) - -#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) != RESET) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) != RESET) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) != RESET) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) != RESET) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) != RESET) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) != RESET) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOISMEN) != RESET) -#endif /* GPIOI */ - -#define __HAL_RCC_SRAM2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) != RESET) - -#if defined(SRAM3) -#define __HAL_RCC_SRAM3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM3SMEN) != RESET) -#endif /* SRAM3 */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) != RESET) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) != RESET) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_DCMISMEN) != RESET) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) != RESET) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_HASHSMEN) != RESET) -#endif /* HASH */ - -#define __HAL_RCC_RNG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) != RESET) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OSPIMSMEN) != RESET) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN) != RESET) -#endif /* SDMMC1 && RCC_AHB2SMENR_SDMMC1SMEN */ - - -#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) == RESET) - -#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) == RESET) - -#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) == RESET) - -#if defined(GPIOD) -#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) == RESET) -#endif /* GPIOD */ - -#if defined(GPIOE) -#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) == RESET) -#endif /* GPIOE */ - -#if defined(GPIOF) -#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) == RESET) -#endif /* GPIOF */ - -#if defined(GPIOG) -#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) == RESET) -#endif /* GPIOG */ - -#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) == RESET) - -#if defined(GPIOI) -#define __HAL_RCC_GPIOI_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOISMEN) == RESET) -#endif /* GPIOI */ - -#define __HAL_RCC_SRAM2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) == RESET) - -#if defined(SRAM3) -#define __HAL_RCC_SRAM3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM3SMEN) == RESET) -#endif /* SRAM3 */ - -#if defined(USB_OTG_FS) -#define __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) == RESET) -#endif /* USB_OTG_FS */ - -#define __HAL_RCC_ADC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) == RESET) - -#if defined(DCMI) -#define __HAL_RCC_DCMI_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_DCMISMEN) == RESET) -#endif /* DCMI */ - -#if defined(AES) -#define __HAL_RCC_AES_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) == RESET) -#endif /* AES */ - -#if defined(HASH) -#define __HAL_RCC_HASH_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_HASHSMEN) == RESET) -#endif /* HASH */ - -#define __HAL_RCC_RNG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) == RESET) - -#if defined(OCTOSPIM) -#define __HAL_RCC_OSPIM_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OSPIMSMEN) == RESET) -#endif /* OCTOSPIM */ - -#if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN) == RESET) -#endif /* SDMMC1 && RCC_AHB2SMENR_SDMMC1SMEN */ - -/** - * @} - */ - -/** @defgroup RCC_AHB3_Clock_Sleep_Enable_Disable_Status AHB3 Peripheral Clock Sleep Enabled or Disabled Status - * @brief Check whether the AHB3 peripheral clock during Low Power (Sleep) mode is enabled or not. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) != RESET) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN) != RESET) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI2SMEN) != RESET) -#endif /* OCTOSPI2 */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) != RESET) -#endif /* FMC_BANK1 */ - - -#if defined(QUADSPI) -#define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_QSPISMEN) == RESET) -#endif /* QUADSPI */ - -#if defined(OCTOSPI1) -#define __HAL_RCC_OSPI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI1SMEN) == RESET) -#endif /* OCTOSPI1 */ - -#if defined(OCTOSPI2) -#define __HAL_RCC_OSPI2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_OSPI2SMEN) == RESET) -#endif /* OCTOSPI2 */ - -#if defined(FMC_BANK1) -#define __HAL_RCC_FMC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB3SMENR, RCC_AHB3SMENR_FMCSMEN) == RESET) -#endif /* FMC_BANK1 */ - -/** - * @} - */ - -/** @defgroup RCC_APB1_Clock_Sleep_Enable_Disable_Status APB1 Peripheral Clock Sleep Enabled or Disabled Status - * @brief Check whether the APB1 peripheral clock during Low Power (Sleep) mode is enabled or not. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) != RESET) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) != RESET) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) != RESET) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) != RESET) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) != RESET) - -#define __HAL_RCC_TIM7_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) != RESET) - -#if defined(LCD) -#define __HAL_RCC_LCD_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) != RESET) -#endif /* LCD */ - -#if defined(RCC_APB1SMENR1_RTCAPBSMEN) -#define __HAL_RCC_RTCAPB_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_RTCAPBSMEN) != RESET) -#endif /* RCC_APB1SMENR1_RTCAPBSMEN */ - -#define __HAL_RCC_WWDG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) != RESET) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) != RESET) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) != RESET) - -#define __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) != RESET) - -#if defined(USART3) -#define __HAL_RCC_USART3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) != RESET) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) != RESET) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) != RESET) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) != RESET) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) != RESET) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) != RESET) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_I2C4SMEN) != RESET) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CRSSMEN) != RESET) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) != RESET) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN2SMEN) != RESET) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USBFSSMEN) != RESET) -#endif /* USB */ - -#define __HAL_RCC_PWR_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) != RESET) - -#define __HAL_RCC_DAC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) != RESET) - -#define __HAL_RCC_OPAMP_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) != RESET) - -#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) != RESET) - -#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) != RESET) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) != RESET) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) != RESET) - - -#define __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) == RESET) - -#if defined(TIM3) -#define __HAL_RCC_TIM3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) == RESET) -#endif /* TIM3 */ - -#if defined(TIM4) -#define __HAL_RCC_TIM4_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) == RESET) -#endif /* TIM4 */ - -#if defined(TIM5) -#define __HAL_RCC_TIM5_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) == RESET) -#endif /* TIM5 */ - -#define __HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) == RESET) - -#define __HAL_RCC_TIM7_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) == RESET) - -#if defined(LCD) -#define __HAL_RCC_LCD_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) == RESET) -#endif /* LCD */ - -#if defined(RCC_APB1SMENR1_RTCAPBSMEN) -#define __HAL_RCC_RTCAPB_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_RTCAPBSMEN) == RESET) -#endif /* RCC_APB1SMENR1_RTCAPBSMEN */ - -#define __HAL_RCC_WWDG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) == RESET) - -#if defined(SPI2) -#define __HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) == RESET) -#endif /* SPI2 */ - -#define __HAL_RCC_SPI3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) == RESET) - -#define __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) == RESET) - -#if defined(USART3) -#define __HAL_RCC_USART3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) == RESET) -#endif /* USART3 */ - -#if defined(UART4) -#define __HAL_RCC_UART4_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) == RESET) -#endif /* UART4 */ - -#if defined(UART5) -#define __HAL_RCC_UART5_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) == RESET) -#endif /* UART5 */ - -#define __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) == RESET) - -#if defined(I2C2) -#define __HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) == RESET) -#endif /* I2C2 */ - -#define __HAL_RCC_I2C3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) == RESET) - -#if defined(I2C4) -#define __HAL_RCC_I2C4_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_I2C4SMEN) == RESET) -#endif /* I2C4 */ - -#if defined(CRS) -#define __HAL_RCC_CRS_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CRSSMEN) == RESET) -#endif /* CRS */ - -#define __HAL_RCC_CAN1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) == RESET) - -#if defined(CAN2) -#define __HAL_RCC_CAN2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN2SMEN) == RESET) -#endif /* CAN2 */ - -#if defined(USB) -#define __HAL_RCC_USB_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USBFSSMEN) == RESET) -#endif /* USB */ - -#define __HAL_RCC_PWR_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) == RESET) - -#define __HAL_RCC_DAC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) == RESET) - -#define __HAL_RCC_OPAMP_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) == RESET) - -#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) == RESET) - -#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) == RESET) - -#if defined(SWPMI1) -#define __HAL_RCC_SWPMI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) == RESET) -#endif /* SWPMI1 */ - -#define __HAL_RCC_LPTIM2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) == RESET) - -/** - * @} - */ - -/** @defgroup RCC_APB2_Clock_Sleep_Enable_Disable_Status APB2 Peripheral Clock Sleep Enabled or Disabled Status - * @brief Check whether the APB2 peripheral clock during Low Power (Sleep) mode is enabled or not. - * @note Peripheral clock gating in SLEEP mode can be used to further reduce - * power consumption. - * @note After wakeup from SLEEP mode, the peripheral clock is enabled again. - * @note By default, all peripheral clocks are enabled during SLEEP mode. - * @{ - */ - -#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) != RESET) - -#if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) != RESET) -#endif /* SDMMC1 && RCC_APB2SMENR_SDMMC1SMEN */ - -#define __HAL_RCC_TIM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) != RESET) - -#define __HAL_RCC_SPI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) != RESET) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) != RESET) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) != RESET) - -#define __HAL_RCC_TIM15_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) != RESET) - -#define __HAL_RCC_TIM16_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) != RESET) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) != RESET) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) != RESET) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) != RESET) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) != RESET) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_LTDCSMEN) != RESET) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DSISMEN) != RESET) -#endif /* DSI */ - - -#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) == RESET) - -#if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN) -#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) == RESET) -#endif /* SDMMC1 && RCC_APB2SMENR_SDMMC1SMEN */ - -#define __HAL_RCC_TIM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) == RESET) - -#define __HAL_RCC_SPI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) == RESET) - -#if defined(TIM8) -#define __HAL_RCC_TIM8_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) == RESET) -#endif /* TIM8 */ - -#define __HAL_RCC_USART1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) == RESET) - -#define __HAL_RCC_TIM15_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) == RESET) - -#define __HAL_RCC_TIM16_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) == RESET) - -#if defined(TIM17) -#define __HAL_RCC_TIM17_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) == RESET) -#endif /* TIM17 */ - -#define __HAL_RCC_SAI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) == RESET) - -#if defined(SAI2) -#define __HAL_RCC_SAI2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) == RESET) -#endif /* SAI2 */ - -#if defined(DFSDM1_Filter0) -#define __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) == RESET) -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -#define __HAL_RCC_LTDC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_LTDCSMEN) == RESET) -#endif /* LTDC */ - -#if defined(DSI) -#define __HAL_RCC_DSI_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DSISMEN) == RESET) -#endif /* DSI */ - -/** - * @} - */ - -/** @defgroup RCC_Backup_Domain_Reset RCC Backup Domain Reset - * @{ - */ - -/** @brief Macros to force or release the Backup domain reset. - * @note This function resets the RTC peripheral (including the backup registers) - * and the RTC clock source selection in RCC_CSR register. - * @note The BKPSRAM is not affected by this reset. - * @retval None - */ -#define __HAL_RCC_BACKUPRESET_FORCE() SET_BIT(RCC->BDCR, RCC_BDCR_BDRST) - -#define __HAL_RCC_BACKUPRESET_RELEASE() CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST) - -/** - * @} - */ - -/** @defgroup RCC_RTC_Clock_Configuration RCC RTC Clock Configuration - * @{ - */ - -/** @brief Macros to enable or disable the RTC clock. - * @note As the RTC is in the Backup domain and write access is denied to - * this domain after reset, you have to enable write access using - * HAL_PWR_EnableBkUpAccess() function before to configure the RTC - * (to be done once after reset). - * @note These macros must be used after the RTC clock source was selected. - * @retval None - */ -#define __HAL_RCC_RTC_ENABLE() SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN) - -#define __HAL_RCC_RTC_DISABLE() CLEAR_BIT(RCC->BDCR, RCC_BDCR_RTCEN) - -/** - * @} - */ - -/** @brief Macros to enable or disable the Internal High Speed 16MHz oscillator (HSI). - * @note The HSI is stopped by hardware when entering STOP and STANDBY modes. - * It is used (enabled by hardware) as system clock source after startup - * from Reset, wakeup from STOP and STANDBY mode, or in case of failure - * of the HSE used directly or indirectly as system clock (if the Clock - * Security System CSS is enabled). - * @note HSI can not be stopped if it is used as system clock source. In this case, - * you have to select another source of the system clock then stop the HSI. - * @note After enabling the HSI, the application software should wait on HSIRDY - * flag to be set indicating that HSI clock is stable and can be used as - * system clock source. - * This parameter can be: ENABLE or DISABLE. - * @note When the HSI is stopped, HSIRDY flag goes low after 6 HSI oscillator - * clock cycles. - * @retval None - */ -#define __HAL_RCC_HSI_ENABLE() SET_BIT(RCC->CR, RCC_CR_HSION) - -#define __HAL_RCC_HSI_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_HSION) - -/** @brief Macro to adjust the Internal High Speed 16MHz oscillator (HSI) calibration value. - * @note The calibration is used to compensate for the variations in voltage - * and temperature that influence the frequency of the internal HSI RC. - * @param __HSICALIBRATIONVALUE__ specifies the calibration trimming value - * (default is RCC_HSICALIBRATION_DEFAULT). - * This parameter must be a number between 0 and 0x1F (STM32L43x/STM32L44x/STM32L47x/STM32L48x) or 0x7F (for other devices). - * @retval None - */ -#define __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(__HSICALIBRATIONVALUE__) \ - MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, (__HSICALIBRATIONVALUE__) << RCC_ICSCR_HSITRIM_Pos) - -/** - * @brief Macros to enable or disable the wakeup the Internal High Speed oscillator (HSI) - * in parallel to the Internal Multi Speed oscillator (MSI) used at system wakeup. - * @note The enable of this function has not effect on the HSION bit. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -#define __HAL_RCC_HSIAUTOMATIC_START_ENABLE() SET_BIT(RCC->CR, RCC_CR_HSIASFS) - -#define __HAL_RCC_HSIAUTOMATIC_START_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_HSIASFS) - -/** - * @brief Macros to enable or disable the force of the Internal High Speed oscillator (HSI) - * in STOP mode to be quickly available as kernel clock for USARTs and I2Cs. - * @note Keeping the HSI ON in STOP mode allows to avoid slowing down the communication - * speed because of the HSI startup time. - * @note The enable of this function has not effect on the HSION bit. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -#define __HAL_RCC_HSISTOP_ENABLE() SET_BIT(RCC->CR, RCC_CR_HSIKERON) - -#define __HAL_RCC_HSISTOP_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_HSIKERON) - -/** - * @brief Macros to enable or disable the Internal Multi Speed oscillator (MSI). - * @note The MSI is stopped by hardware when entering STOP and STANDBY modes. - * It is used (enabled by hardware) as system clock source after - * startup from Reset, wakeup from STOP and STANDBY mode, or in case - * of failure of the HSE used directly or indirectly as system clock - * (if the Clock Security System CSS is enabled). - * @note MSI can not be stopped if it is used as system clock source. - * In this case, you have to select another source of the system - * clock then stop the MSI. - * @note After enabling the MSI, the application software should wait on - * MSIRDY flag to be set indicating that MSI clock is stable and can - * be used as system clock source. - * @note When the MSI is stopped, MSIRDY flag goes low after 6 MSI oscillator - * clock cycles. - * @retval None - */ -#define __HAL_RCC_MSI_ENABLE() SET_BIT(RCC->CR, RCC_CR_MSION) - -#define __HAL_RCC_MSI_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_MSION) - -/** @brief Macro Adjusts the Internal Multi Speed oscillator (MSI) calibration value. - * @note The calibration is used to compensate for the variations in voltage - * and temperature that influence the frequency of the internal MSI RC. - * Refer to the Application Note AN3300 for more details on how to - * calibrate the MSI. - * @param __MSICALIBRATIONVALUE__ specifies the calibration trimming value - * (default is RCC_MSICALIBRATION_DEFAULT). - * This parameter must be a number between 0 and 255. - * @retval None - */ -#define __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(__MSICALIBRATIONVALUE__) \ - MODIFY_REG(RCC->ICSCR, RCC_ICSCR_MSITRIM, (__MSICALIBRATIONVALUE__) << RCC_ICSCR_MSITRIM_Pos) - -/** - * @brief Macro configures the Internal Multi Speed oscillator (MSI) clock range in run mode - * @note After restart from Reset , the MSI clock is around 4 MHz. - * After stop the startup clock can be MSI (at any of its possible - * frequencies, the one that was used before entering stop mode) or HSI. - * After Standby its frequency can be selected between 4 possible values - * (1, 2, 4 or 8 MHz). - * @note MSIRANGE can be modified when MSI is OFF (MSION=0) or when MSI is ready - * (MSIRDY=1). - * @note The MSI clock range after reset can be modified on the fly. - * @param __MSIRANGEVALUE__ specifies the MSI clock range. - * This parameter must be one of the following values: - * @arg @ref RCC_MSIRANGE_0 MSI clock is around 100 KHz - * @arg @ref RCC_MSIRANGE_1 MSI clock is around 200 KHz - * @arg @ref RCC_MSIRANGE_2 MSI clock is around 400 KHz - * @arg @ref RCC_MSIRANGE_3 MSI clock is around 800 KHz - * @arg @ref RCC_MSIRANGE_4 MSI clock is around 1 MHz - * @arg @ref RCC_MSIRANGE_5 MSI clock is around 2 MHz - * @arg @ref RCC_MSIRANGE_6 MSI clock is around 4 MHz (default after Reset) - * @arg @ref RCC_MSIRANGE_7 MSI clock is around 8 MHz - * @arg @ref RCC_MSIRANGE_8 MSI clock is around 16 MHz - * @arg @ref RCC_MSIRANGE_9 MSI clock is around 24 MHz - * @arg @ref RCC_MSIRANGE_10 MSI clock is around 32 MHz - * @arg @ref RCC_MSIRANGE_11 MSI clock is around 48 MHz - * @retval None - */ -#define __HAL_RCC_MSI_RANGE_CONFIG(__MSIRANGEVALUE__) \ - do { \ - SET_BIT(RCC->CR, RCC_CR_MSIRGSEL); \ - MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, (__MSIRANGEVALUE__)); \ - } while(0) - -/** - * @brief Macro configures the Internal Multi Speed oscillator (MSI) clock range after Standby mode - * After Standby its frequency can be selected between 4 possible values (1, 2, 4 or 8 MHz). - * @param __MSIRANGEVALUE__ specifies the MSI clock range. - * This parameter must be one of the following values: - * @arg @ref RCC_MSIRANGE_4 MSI clock is around 1 MHz - * @arg @ref RCC_MSIRANGE_5 MSI clock is around 2 MHz - * @arg @ref RCC_MSIRANGE_6 MSI clock is around 4 MHz (default after Reset) - * @arg @ref RCC_MSIRANGE_7 MSI clock is around 8 MHz - * @retval None - */ -#define __HAL_RCC_MSI_STANDBY_RANGE_CONFIG(__MSIRANGEVALUE__) \ - MODIFY_REG(RCC->CSR, RCC_CSR_MSISRANGE, (__MSIRANGEVALUE__) << 4U) - -/** @brief Macro to get the Internal Multi Speed oscillator (MSI) clock range in run mode - * @retval MSI clock range. - * This parameter must be one of the following values: - * @arg @ref RCC_MSIRANGE_0 MSI clock is around 100 KHz - * @arg @ref RCC_MSIRANGE_1 MSI clock is around 200 KHz - * @arg @ref RCC_MSIRANGE_2 MSI clock is around 400 KHz - * @arg @ref RCC_MSIRANGE_3 MSI clock is around 800 KHz - * @arg @ref RCC_MSIRANGE_4 MSI clock is around 1 MHz - * @arg @ref RCC_MSIRANGE_5 MSI clock is around 2 MHz - * @arg @ref RCC_MSIRANGE_6 MSI clock is around 4 MHz (default after Reset) - * @arg @ref RCC_MSIRANGE_7 MSI clock is around 8 MHz - * @arg @ref RCC_MSIRANGE_8 MSI clock is around 16 MHz - * @arg @ref RCC_MSIRANGE_9 MSI clock is around 24 MHz - * @arg @ref RCC_MSIRANGE_10 MSI clock is around 32 MHz - * @arg @ref RCC_MSIRANGE_11 MSI clock is around 48 MHz - */ -#define __HAL_RCC_GET_MSI_RANGE() \ - ((READ_BIT(RCC->CR, RCC_CR_MSIRGSEL) != RESET) ? \ - READ_BIT(RCC->CR, RCC_CR_MSIRANGE) : \ - READ_BIT(RCC->CSR, RCC_CSR_MSISRANGE) >> 4U) - -/** @brief Macros to enable or disable the Internal Low Speed oscillator (LSI). - * @note After enabling the LSI, the application software should wait on - * LSIRDY flag to be set indicating that LSI clock is stable and can - * be used to clock the IWDG and/or the RTC. - * @note LSI can not be disabled if the IWDG is running. - * @note When the LSI is stopped, LSIRDY flag goes low after 6 LSI oscillator - * clock cycles. - * @retval None - */ -#define __HAL_RCC_LSI_ENABLE() SET_BIT(RCC->CSR, RCC_CSR_LSION) - -#define __HAL_RCC_LSI_DISABLE() CLEAR_BIT(RCC->CSR, RCC_CSR_LSION) - -/** - * @brief Macro to configure the External High Speed oscillator (HSE). - * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not - * supported by this macro. User should request a transition to HSE Off - * first and then HSE On or HSE Bypass. - * @note After enabling the HSE (RCC_HSE_ON or RCC_HSE_Bypass), the application - * software should wait on HSERDY flag to be set indicating that HSE clock - * is stable and can be used to clock the PLL and/or system clock. - * @note HSE state can not be changed if it is used directly or through the - * PLL as system clock. In this case, you have to select another source - * of the system clock then change the HSE state (ex. disable it). - * @note The HSE is stopped by hardware when entering STOP and STANDBY modes. - * @note This function reset the CSSON bit, so if the clock security system(CSS) - * was previously enabled you have to enable it again after calling this - * function. - * @param __STATE__ specifies the new state of the HSE. - * This parameter can be one of the following values: - * @arg @ref RCC_HSE_OFF Turn OFF the HSE oscillator, HSERDY flag goes low after - * 6 HSE oscillator clock cycles. - * @arg @ref RCC_HSE_ON Turn ON the HSE oscillator. - * @arg @ref RCC_HSE_BYPASS HSE oscillator bypassed with external clock. - * @retval None - */ -#define __HAL_RCC_HSE_CONFIG(__STATE__) \ - do { \ - if((__STATE__) == RCC_HSE_ON) \ - { \ - SET_BIT(RCC->CR, RCC_CR_HSEON); \ - } \ - else if((__STATE__) == RCC_HSE_BYPASS) \ - { \ - SET_BIT(RCC->CR, RCC_CR_HSEBYP); \ - SET_BIT(RCC->CR, RCC_CR_HSEON); \ - } \ - else \ - { \ - CLEAR_BIT(RCC->CR, RCC_CR_HSEON); \ - CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); \ - } \ - } while(0) - -/** - * @brief Macro to configure the External Low Speed oscillator (LSE). - * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not - * supported by this macro. User should request a transition to LSE Off - * first and then LSE On or LSE Bypass. - * @note As the LSE is in the Backup domain and write access is denied to - * this domain after reset, you have to enable write access using - * HAL_PWR_EnableBkUpAccess() function before to configure the LSE - * (to be done once after reset). - * @note After enabling the LSE (RCC_LSE_ON or RCC_LSE_BYPASS), the application - * software should wait on LSERDY flag to be set indicating that LSE clock - * is stable and can be used to clock the RTC. - * @param __STATE__ specifies the new state of the LSE. - * This parameter can be one of the following values: - * @arg @ref RCC_LSE_OFF Turn OFF the LSE oscillator, LSERDY flag goes low after - * 6 LSE oscillator clock cycles. - * @arg @ref RCC_LSE_ON Turn ON the LSE oscillator. - * @arg @ref RCC_LSE_BYPASS LSE oscillator bypassed with external clock. - * @retval None - */ -#define __HAL_RCC_LSE_CONFIG(__STATE__) \ - do { \ - if((__STATE__) == RCC_LSE_ON) \ - { \ - SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \ - } \ - else if((__STATE__) == RCC_LSE_BYPASS) \ - { \ - SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \ - SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \ - } \ - else \ - { \ - CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); \ - CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \ - } \ - } while(0) - -#if defined(RCC_HSI48_SUPPORT) - -/** @brief Macros to enable or disable the Internal High Speed 48MHz oscillator (HSI48). - * @note The HSI48 is stopped by hardware when entering STOP and STANDBY modes. - * @note After enabling the HSI48, the application software should wait on HSI48RDY - * flag to be set indicating that HSI48 clock is stable. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -#define __HAL_RCC_HSI48_ENABLE() SET_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) - -#define __HAL_RCC_HSI48_DISABLE() CLEAR_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) - -#endif /* RCC_HSI48_SUPPORT */ - -/** @brief Macros to configure the RTC clock (RTCCLK). - * @note As the RTC clock configuration bits are in the Backup domain and write - * access is denied to this domain after reset, you have to enable write - * access using the Power Backup Access macro before to configure - * the RTC clock source (to be done once after reset). - * @note Once the RTC clock is configured it cannot be changed unless the - * Backup domain is reset using __HAL_RCC_BACKUPRESET_FORCE() macro, or by - * a Power On Reset (POR). - * - * @param __RTC_CLKSOURCE__ specifies the RTC clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_RTCCLKSOURCE_NONE No clock selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_LSE LSE selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_LSI LSI selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_HSE_DIV32 HSE clock divided by 32 selected - * - * @note If the LSE or LSI is used as RTC clock source, the RTC continues to - * work in STOP and STANDBY modes, and can be used as wakeup source. - * However, when the HSE clock is used as RTC clock source, the RTC - * cannot be used in STOP and STANDBY modes. - * @note The maximum input clock frequency for RTC is 1MHz (when using HSE as - * RTC clock source). - * @retval None - */ -#define __HAL_RCC_RTC_CONFIG(__RTC_CLKSOURCE__) \ - MODIFY_REG( RCC->BDCR, RCC_BDCR_RTCSEL, (__RTC_CLKSOURCE__)) - - -/** @brief Macro to get the RTC clock source. - * @retval The returned value can be one of the following: - * @arg @ref RCC_RTCCLKSOURCE_NONE No clock selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_LSE LSE selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_LSI LSI selected as RTC clock. - * @arg @ref RCC_RTCCLKSOURCE_HSE_DIV32 HSE clock divided by 32 selected - */ -#define __HAL_RCC_GET_RTC_SOURCE() (READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL)) - -/** @brief Macros to enable or disable the main PLL. - * @note After enabling the main PLL, the application software should wait on - * PLLRDY flag to be set indicating that PLL clock is stable and can - * be used as system clock source. - * @note The main PLL can not be disabled if it is used as system clock source - * @note The main PLL is disabled by hardware when entering STOP and STANDBY modes. - * @retval None - */ -#define __HAL_RCC_PLL_ENABLE() SET_BIT(RCC->CR, RCC_CR_PLLON) - -#define __HAL_RCC_PLL_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_PLLON) - -/** @brief Macro to configure the PLL clock source. - * @note This function must be used only when the main PLL is disabled. - * @param __PLLSOURCE__ specifies the PLL entry clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_PLLSOURCE_NONE No clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_MSI MSI oscillator clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_HSI HSI oscillator clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_HSE HSE oscillator clock selected as PLL clock entry - * @note This clock source is common for the main PLL and audio PLL (PLLSAI1 and PLLSAI2). - * @retval None - * - */ -#define __HAL_RCC_PLL_PLLSOURCE_CONFIG(__PLLSOURCE__) \ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__PLLSOURCE__)) - -/** @brief Macro to configure the PLL source division factor M. - * @note This function must be used only when the main PLL is disabled. - * @param __PLLM__ specifies the division factor for PLL VCO input clock - * This parameter must be a number between Min_Data = 1 and Max_Data = 16 on STM32L4Rx/STM32L4Sx devices. - * This parameter must be a number between Min_Data = 1 and Max_Data = 8 on other devices. - * @note You have to set the PLLM parameter correctly to ensure that the VCO input - * frequency ranges from 4 to 16 MHz. It is recommended to select a frequency - * of 16 MHz to limit PLL jitter. - * @retval None - * - */ -#define __HAL_RCC_PLL_PLLM_CONFIG(__PLLM__) \ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, ((__PLLM__) - 1) << 4U) - -/** - * @brief Macro to configure the main PLL clock source, multiplication and division factors. - * @note This function must be used only when the main PLL is disabled. - * - * @param __PLLSOURCE__ specifies the PLL entry clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_PLLSOURCE_NONE No clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_MSI MSI oscillator clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_HSI HSI oscillator clock selected as PLL clock entry - * @arg @ref RCC_PLLSOURCE_HSE HSE oscillator clock selected as PLL clock entry - * @note This clock source is common for the main PLL and audio PLL (PLLSAI1 and PLLSAI2). - * - * @param __PLLM__ specifies the division factor for PLL VCO input clock. - * This parameter must be a number between Min_Data = 1 and Max_Data = 16 on STM32L4Rx/STM32L4Sx devices. - * This parameter must be a number between Min_Data = 1 and Max_Data = 8 on other devices. - * @note You have to set the PLLM parameter correctly to ensure that the VCO input - * frequency ranges from 4 to 16 MHz. It is recommended to select a frequency - * of 16 MHz to limit PLL jitter. - * - * @param __PLLN__ specifies the multiplication factor for PLL VCO output clock. - * This parameter must be a number between 8 and 86. - * @note You have to set the PLLN parameter correctly to ensure that the VCO - * output frequency is between 64 and 344 MHz. - * - * @param __PLLP__ specifies the division factor for SAI clock. - * This parameter must be a number in the range (7 or 17) for STM32L47x/STM32L48x - * else (2 to 31). - * - * @param __PLLQ__ specifies the division factor for OTG FS, SDMMC1 and RNG clocks. - * This parameter must be in the range (2, 4, 6 or 8). - * @note If the USB OTG FS is used in your application, you have to set the - * PLLQ parameter correctly to have 48 MHz clock for the USB. However, - * the SDMMC1 and RNG need a frequency lower than or equal to 48 MHz to work - * correctly. - * @param __PLLR__ specifies the division factor for the main system clock. - * @note You have to set the PLLR parameter correctly to not exceed 80MHZ. - * This parameter must be in the range (2, 4, 6 or 8). - * @retval None - */ -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ - (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \ - (__PLLSOURCE__) | (uint32_t)((((__PLLQ__) >> 1U) - 1U) << 21U) | (uint32_t)((((__PLLR__) >> 1U) - 1U) << 25U) | \ - ((uint32_t)(__PLLP__) << 27U)) -#else - -#define __HAL_RCC_PLL_CONFIG(__PLLSOURCE__, __PLLM__, __PLLN__, __PLLP__, __PLLQ__,__PLLR__ ) \ - (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \ - (uint32_t)(((__PLLP__) >> 4U ) << 17U) | \ - (__PLLSOURCE__) | (uint32_t)((((__PLLQ__) >> 1U) - 1U) << 21U) | (uint32_t)((((__PLLR__) >> 1U) - 1U) << 25U)) - -#endif /* RCC_PLLP_DIV_2_31_SUPPORT */ - -/** @brief Macro to get the oscillator used as PLL clock source. - * @retval The oscillator used as PLL clock source. The returned value can be one - * of the following: - * - RCC_PLLSOURCE_NONE: No oscillator is used as PLL clock source. - * - RCC_PLLSOURCE_MSI: MSI oscillator is used as PLL clock source. - * - RCC_PLLSOURCE_HSI: HSI oscillator is used as PLL clock source. - * - RCC_PLLSOURCE_HSE: HSE oscillator is used as PLL clock source. - */ -#define __HAL_RCC_GET_PLL_OSCSOURCE() (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC)) - -/** - * @brief Enable or disable each clock output (RCC_PLL_SYSCLK, RCC_PLL_48M1CLK, RCC_PLL_SAI3CLK) - * @note Enabling/disabling clock outputs RCC_PLL_SAI3CLK and RCC_PLL_48M1CLK can be done at anytime - * without the need to stop the PLL in order to save power. But RCC_PLL_SYSCLK cannot - * be stopped if used as System Clock. - * @param __PLLCLOCKOUT__ specifies the PLL clock to be output. - * This parameter can be one or a combination of the following values: - * @arg @ref RCC_PLL_SAI3CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLL_48M1CLK This Clock is used to generate the clock for the USB OTG FS (48 MHz), - * the random analog generator (<=48 MHz) and the SDMMC1 (<= 48 MHz). - * @arg @ref RCC_PLL_SYSCLK This Clock is used to generate the high speed system clock (up to 80MHz) - * @retval None - */ -#define __HAL_RCC_PLLCLKOUT_ENABLE(__PLLCLOCKOUT__) SET_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__)) - -#define __HAL_RCC_PLLCLKOUT_DISABLE(__PLLCLOCKOUT__) CLEAR_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__)) - -/** - * @brief Get clock output enable status (RCC_PLL_SYSCLK, RCC_PLL_48M1CLK, RCC_PLL_SAI3CLK) - * @param __PLLCLOCKOUT__ specifies the output PLL clock to be checked. - * This parameter can be one of the following values: - * @arg @ref RCC_PLL_SAI3CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLL_48M1CLK This Clock is used to generate the clock for the USB OTG FS (48 MHz), - * the random analog generator (<=48 MHz) and the SDMMC1 (<= 48 MHz). - * @arg @ref RCC_PLL_SYSCLK This Clock is used to generate the high speed system clock (up to 80MHz) - * @retval SET / RESET - */ -#define __HAL_RCC_GET_PLLCLKOUT_CONFIG(__PLLCLOCKOUT__) READ_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__)) - -/** - * @brief Macro to configure the system clock source. - * @param __SYSCLKSOURCE__ specifies the system clock source. - * This parameter can be one of the following values: - * - RCC_SYSCLKSOURCE_MSI: MSI oscillator is used as system clock source. - * - RCC_SYSCLKSOURCE_HSI: HSI oscillator is used as system clock source. - * - RCC_SYSCLKSOURCE_HSE: HSE oscillator is used as system clock source. - * - RCC_SYSCLKSOURCE_PLLCLK: PLL output is used as system clock source. - * @retval None - */ -#define __HAL_RCC_SYSCLK_CONFIG(__SYSCLKSOURCE__) \ - MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, (__SYSCLKSOURCE__)) - -/** @brief Macro to get the clock source used as system clock. - * @retval The clock source used as system clock. The returned value can be one - * of the following: - * - RCC_SYSCLKSOURCE_STATUS_MSI: MSI used as system clock. - * - RCC_SYSCLKSOURCE_STATUS_HSI: HSI used as system clock. - * - RCC_SYSCLKSOURCE_STATUS_HSE: HSE used as system clock. - * - RCC_SYSCLKSOURCE_STATUS_PLLCLK: PLL used as system clock. - */ -#define __HAL_RCC_GET_SYSCLK_SOURCE() (READ_BIT(RCC->CFGR, RCC_CFGR_SWS)) - -/** - * @brief Macro to configure the External Low Speed oscillator (LSE) drive capability. - * @note As the LSE is in the Backup domain and write access is denied to - * this domain after reset, you have to enable write access using - * HAL_PWR_EnableBkUpAccess() function before to configure the LSE - * (to be done once after reset). - * @param __LSEDRIVE__ specifies the new state of the LSE drive capability. - * This parameter can be one of the following values: - * @arg @ref RCC_LSEDRIVE_LOW LSE oscillator low drive capability. - * @arg @ref RCC_LSEDRIVE_MEDIUMLOW LSE oscillator medium low drive capability. - * @arg @ref RCC_LSEDRIVE_MEDIUMHIGH LSE oscillator medium high drive capability. - * @arg @ref RCC_LSEDRIVE_HIGH LSE oscillator high drive capability. - * @retval None - */ -#define __HAL_RCC_LSEDRIVE_CONFIG(__LSEDRIVE__) \ - MODIFY_REG(RCC->BDCR, RCC_BDCR_LSEDRV, (__LSEDRIVE__)) - -/** - * @brief Macro to configure the wake up from stop clock. - * @param __STOPWUCLK__ specifies the clock source used after wake up from stop. - * This parameter can be one of the following values: - * @arg @ref RCC_STOP_WAKEUPCLOCK_MSI MSI selected as system clock source - * @arg @ref RCC_STOP_WAKEUPCLOCK_HSI HSI selected as system clock source - * @retval None - */ -#define __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(__STOPWUCLK__) \ - MODIFY_REG(RCC->CFGR, RCC_CFGR_STOPWUCK, (__STOPWUCLK__)) - - -/** @brief Macro to configure the MCO clock. - * @param __MCOCLKSOURCE__ specifies the MCO clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_MCO1SOURCE_NOCLOCK MCO output disabled - * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_MSI MSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_HSI HSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO sourcee - * @arg @ref RCC_MCO1SOURCE_PLLCLK Main PLL clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_LSI LSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_LSE LSE clock selected as MCO source - @if STM32L443xx - * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 clock selected as MCO source for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 clock selected as MCO source for devices with HSI48 - @endif - * @param __MCODIV__ specifies the MCO clock prescaler. - * This parameter can be one of the following values: - * @arg @ref RCC_MCODIV_1 MCO clock source is divided by 1 - * @arg @ref RCC_MCODIV_2 MCO clock source is divided by 2 - * @arg @ref RCC_MCODIV_4 MCO clock source is divided by 4 - * @arg @ref RCC_MCODIV_8 MCO clock source is divided by 8 - * @arg @ref RCC_MCODIV_16 MCO clock source is divided by 16 - */ -#define __HAL_RCC_MCO1_CONFIG(__MCOCLKSOURCE__, __MCODIV__) \ - MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), ((__MCOCLKSOURCE__) | (__MCODIV__))) - -/** @defgroup RCC_Flags_Interrupts_Management Flags Interrupts Management - * @brief macros to manage the specified RCC Flags and interrupts. - * @{ - */ - -/** @brief Enable RCC interrupt(s). - * @param __INTERRUPT__ specifies the RCC interrupt source(s) to be enabled. - * This parameter can be any combination of the following values: - * @arg @ref RCC_IT_LSIRDY LSI ready interrupt - * @arg @ref RCC_IT_LSERDY LSE ready interrupt - * @arg @ref RCC_IT_MSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSERDY HSE ready interrupt - * @arg @ref RCC_IT_PLLRDY Main PLL ready interrupt - * @arg @ref RCC_IT_PLLSAI1RDY PLLSAI1 ready interrupt - * @arg @ref RCC_IT_PLLSAI2RDY PLLSAI2 ready interrupt for devices with PLLSAI2 - * @arg @ref RCC_IT_LSECSS LSE Clock security system interrupt - @if STM32L443xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - * @retval None - */ -#define __HAL_RCC_ENABLE_IT(__INTERRUPT__) SET_BIT(RCC->CIER, (__INTERRUPT__)) - -/** @brief Disable RCC interrupt(s). - * @param __INTERRUPT__ specifies the RCC interrupt source(s) to be disabled. - * This parameter can be any combination of the following values: - * @arg @ref RCC_IT_LSIRDY LSI ready interrupt - * @arg @ref RCC_IT_LSERDY LSE ready interrupt - * @arg @ref RCC_IT_MSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSERDY HSE ready interrupt - * @arg @ref RCC_IT_PLLRDY Main PLL ready interrupt - * @arg @ref RCC_IT_PLLSAI1RDY PLLSAI1 ready interrupt - * @arg @ref RCC_IT_PLLSAI2RDY PLLSAI2 ready interrupt for devices with PLLSAI2 - * @arg @ref RCC_IT_LSECSS LSE Clock security system interrupt - @if STM32L443xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - * @retval None - */ -#define __HAL_RCC_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(RCC->CIER, (__INTERRUPT__)) - -/** @brief Clear the RCC's interrupt pending bits. - * @param __INTERRUPT__ specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg @ref RCC_IT_LSIRDY LSI ready interrupt - * @arg @ref RCC_IT_LSERDY LSE ready interrupt - * @arg @ref RCC_IT_MSIRDY MSI ready interrupt - * @arg @ref RCC_IT_HSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSERDY HSE ready interrupt - * @arg @ref RCC_IT_PLLRDY Main PLL ready interrupt - * @arg @ref RCC_IT_PLLSAI1RDY PLLSAI1 ready interrupt - * @arg @ref RCC_IT_PLLSAI2RDY PLLSAI2 ready interrupt for devices with PLLSAI2 - * @arg @ref RCC_IT_CSS HSE Clock security system interrupt - * @arg @ref RCC_IT_LSECSS LSE Clock security system interrupt - @if STM32L443xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - * @retval None - */ -#define __HAL_RCC_CLEAR_IT(__INTERRUPT__) WRITE_REG(RCC->CICR, (__INTERRUPT__)) - -/** @brief Check whether the RCC interrupt has occurred or not. - * @param __INTERRUPT__ specifies the RCC interrupt source to check. - * This parameter can be one of the following values: - * @arg @ref RCC_IT_LSIRDY LSI ready interrupt - * @arg @ref RCC_IT_LSERDY LSE ready interrupt - * @arg @ref RCC_IT_MSIRDY MSI ready interrupt - * @arg @ref RCC_IT_HSIRDY HSI ready interrupt - * @arg @ref RCC_IT_HSERDY HSE ready interrupt - * @arg @ref RCC_IT_PLLRDY Main PLL ready interrupt - * @arg @ref RCC_IT_PLLSAI1RDY PLLSAI1 ready interrupt - * @arg @ref RCC_IT_PLLSAI2RDY PLLSAI2 ready interrupt for devices with PLLSAI2 - * @arg @ref RCC_IT_CSS HSE Clock security system interrupt - * @arg @ref RCC_IT_LSECSS LSE Clock security system interrupt - @if STM32L443xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_IT_HSI48RDY HSI48 ready interrupt for devices with HSI48 - @endif - * @retval The new state of __INTERRUPT__ (TRUE or FALSE). - */ -#define __HAL_RCC_GET_IT(__INTERRUPT__) (READ_BIT(RCC->CIFR, (__INTERRUPT__)) == (__INTERRUPT__)) - -/** @brief Set RMVF bit to clear the reset flags. - * The reset flags are: RCC_FLAG_FWRRST, RCC_FLAG_OBLRST, RCC_FLAG_PINRST, RCC_FLAG_BORRST, - * RCC_FLAG_SFTRST, RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST and RCC_FLAG_LPWRRST. - * @retval None - */ -#define __HAL_RCC_CLEAR_RESET_FLAGS() SET_BIT(RCC->CSR, RCC_CSR_RMVF) - -/** @brief Check whether the selected RCC flag is set or not. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref RCC_FLAG_MSIRDY MSI oscillator clock ready - * @arg @ref RCC_FLAG_HSIRDY HSI oscillator clock ready - * @arg @ref RCC_FLAG_HSERDY HSE oscillator clock ready - * @arg @ref RCC_FLAG_PLLRDY Main PLL clock ready - * @arg @ref RCC_FLAG_PLLSAI1RDY PLLSAI1 clock ready - * @arg @ref RCC_FLAG_PLLSAI2RDY PLLSAI2 clock ready for devices with PLLSAI2 - @if STM32L443xx - * @arg @ref RCC_FLAG_HSI48RDY HSI48 clock ready for devices with HSI48 - @endif - @if STM32L4A6xx - * @arg @ref RCC_FLAG_HSI48RDY HSI48 clock ready for devices with HSI48 - @endif - * @arg @ref RCC_FLAG_LSERDY LSE oscillator clock ready - * @arg @ref RCC_FLAG_LSECSSD Clock security system failure on LSE oscillator detection - * @arg @ref RCC_FLAG_LSIRDY LSI oscillator clock ready - * @arg @ref RCC_FLAG_BORRST BOR reset - * @arg @ref RCC_FLAG_OBLRST OBLRST reset - * @arg @ref RCC_FLAG_PINRST Pin reset - * @arg @ref RCC_FLAG_FWRST FIREWALL reset - * @arg @ref RCC_FLAG_RMVF Remove reset Flag - * @arg @ref RCC_FLAG_SFTRST Software reset - * @arg @ref RCC_FLAG_IWDGRST Independent Watchdog reset - * @arg @ref RCC_FLAG_WWDGRST Window Watchdog reset - * @arg @ref RCC_FLAG_LPWRRST Low Power reset - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#if defined(RCC_HSI48_SUPPORT) -#define __HAL_RCC_GET_FLAG(__FLAG__) (((((((__FLAG__) >> 5U) == 1U) ? RCC->CR : \ - ((((__FLAG__) >> 5U) == 4U) ? RCC->CRRCR : \ - ((((__FLAG__) >> 5U) == 2U) ? RCC->BDCR : \ - ((((__FLAG__) >> 5U) == 3U) ? RCC->CSR : RCC->CIFR)))) & \ - (1U << ((__FLAG__) & RCC_FLAG_MASK))) != RESET) ? 1U : 0U) -#else -#define __HAL_RCC_GET_FLAG(__FLAG__) (((((((__FLAG__) >> 5U) == 1U) ? RCC->CR : \ - ((((__FLAG__) >> 5U) == 2U) ? RCC->BDCR : \ - ((((__FLAG__) >> 5U) == 3U) ? RCC->CSR : RCC->CIFR))) & \ - (1U << ((__FLAG__) & RCC_FLAG_MASK))) != RESET) ? 1U : 0U) -#endif /* RCC_HSI48_SUPPORT */ - -/** - * @} - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup RCC_Private_Constants RCC Private Constants - * @{ - */ -/* Defines used for Flags */ -#define CR_REG_INDEX 1U -#define BDCR_REG_INDEX 2U -#define CSR_REG_INDEX 3U -#if defined(RCC_HSI48_SUPPORT) -#define CRRCR_REG_INDEX 4U -#endif /* RCC_HSI48_SUPPORT */ - -#define RCC_FLAG_MASK 0x1FU -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup RCC_Private_Macros - * @{ - */ - -#if defined(RCC_HSI48_SUPPORT) -#define IS_RCC_OSCILLATORTYPE(__OSCILLATOR__) (((__OSCILLATOR__) == RCC_OSCILLATORTYPE_NONE) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)) -#else -#define IS_RCC_OSCILLATORTYPE(__OSCILLATOR__) (((__OSCILLATOR__) == RCC_OSCILLATORTYPE_NONE) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) || \ - (((__OSCILLATOR__) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)) -#endif /* RCC_HSI48_SUPPORT */ - -#define IS_RCC_HSE(__HSE__) (((__HSE__) == RCC_HSE_OFF) || ((__HSE__) == RCC_HSE_ON) || \ - ((__HSE__) == RCC_HSE_BYPASS)) - -#define IS_RCC_LSE(__LSE__) (((__LSE__) == RCC_LSE_OFF) || ((__LSE__) == RCC_LSE_ON) || \ - ((__LSE__) == RCC_LSE_BYPASS)) - -#define IS_RCC_HSI(__HSI__) (((__HSI__) == RCC_HSI_OFF) || ((__HSI__) == RCC_HSI_ON)) - -#define IS_RCC_HSI_CALIBRATION_VALUE(__VALUE__) ((__VALUE__) <= (RCC_ICSCR_HSITRIM >> RCC_ICSCR_HSITRIM_Pos)) - -#define IS_RCC_LSI(__LSI__) (((__LSI__) == RCC_LSI_OFF) || ((__LSI__) == RCC_LSI_ON)) - -#define IS_RCC_MSI(__MSI__) (((__MSI__) == RCC_MSI_OFF) || ((__MSI__) == RCC_MSI_ON)) - -#define IS_RCC_MSICALIBRATION_VALUE(__VALUE__) ((__VALUE__) <= 255U) - -#if defined(RCC_HSI48_SUPPORT) -#define IS_RCC_HSI48(__HSI48__) (((__HSI48__) == RCC_HSI48_OFF) || ((__HSI48__) == RCC_HSI48_ON)) -#endif /* RCC_HSI48_SUPPORT */ - -#define IS_RCC_PLL(__PLL__) (((__PLL__) == RCC_PLL_NONE) ||((__PLL__) == RCC_PLL_OFF) || \ - ((__PLL__) == RCC_PLL_ON)) - -#define IS_RCC_PLLSOURCE(__SOURCE__) (((__SOURCE__) == RCC_PLLSOURCE_NONE) || \ - ((__SOURCE__) == RCC_PLLSOURCE_MSI) || \ - ((__SOURCE__) == RCC_PLLSOURCE_HSI) || \ - ((__SOURCE__) == RCC_PLLSOURCE_HSE)) - -#if defined(RCC_PLLM_DIV_1_16_SUPPORT) -#define IS_RCC_PLLM_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 16U)) -#else -#define IS_RCC_PLLM_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 8U)) -#endif /*RCC_PLLM_DIV_1_16_SUPPORT */ - -#define IS_RCC_PLLN_VALUE(__VALUE__) ((8U <= (__VALUE__)) && ((__VALUE__) <= 86U)) - -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) -#define IS_RCC_PLLP_VALUE(__VALUE__) (((__VALUE__) >= 2U) && ((__VALUE__) <= 31U)) -#else -#define IS_RCC_PLLP_VALUE(__VALUE__) (((__VALUE__) == 7U) || ((__VALUE__) == 17U)) -#endif /*RCC_PLLP_DIV_2_31_SUPPORT */ - -#define IS_RCC_PLLQ_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) - -#define IS_RCC_PLLR_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) - -#define IS_RCC_PLLSAI1CLOCKOUT_VALUE(__VALUE__) (((((__VALUE__) & RCC_PLLSAI1_SAI1CLK) == RCC_PLLSAI1_SAI1CLK) || \ - (((__VALUE__) & RCC_PLLSAI1_48M2CLK) == RCC_PLLSAI1_48M2CLK) || \ - (((__VALUE__) & RCC_PLLSAI1_ADC1CLK) == RCC_PLLSAI1_ADC1CLK)) && \ - (((__VALUE__) & ~(RCC_PLLSAI1_SAI1CLK|RCC_PLLSAI1_48M2CLK|RCC_PLLSAI1_ADC1CLK)) == 0U)) - -#if defined(RCC_PLLSAI2_SUPPORT) -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) -#define IS_RCC_PLLSAI2CLOCKOUT_VALUE(__VALUE__) (((((__VALUE__) & RCC_PLLSAI2_SAI2CLK) == RCC_PLLSAI2_SAI2CLK) || \ - (((__VALUE__) & RCC_PLLSAI2_ADC2CLK) == RCC_PLLSAI2_ADC2CLK)) && \ - (((__VALUE__) & ~(RCC_PLLSAI2_SAI2CLK|RCC_PLLSAI2_ADC2CLK)) == 0U)) -#elif defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define IS_RCC_PLLSAI2CLOCKOUT_VALUE(__VALUE__) (((((__VALUE__) & RCC_PLLSAI2_SAI2CLK) == RCC_PLLSAI2_SAI2CLK) || \ - (((__VALUE__) & RCC_PLLSAI2_DSICLK) == RCC_PLLSAI2_DSICLK) || \ - (((__VALUE__) & RCC_PLLSAI2_LTDCCLK) == RCC_PLLSAI2_LTDCCLK)) && \ - (((__VALUE__) & ~(RCC_PLLSAI2_SAI2CLK|RCC_PLLSAI2_DSICLK|RCC_PLLSAI2_LTDCCLK)) == 0U)) -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ -#endif /* RCC_PLLSAI2_SUPPORT */ - -#define IS_RCC_MSI_CLOCK_RANGE(__RANGE__) (((__RANGE__) == RCC_MSIRANGE_0) || \ - ((__RANGE__) == RCC_MSIRANGE_1) || \ - ((__RANGE__) == RCC_MSIRANGE_2) || \ - ((__RANGE__) == RCC_MSIRANGE_3) || \ - ((__RANGE__) == RCC_MSIRANGE_4) || \ - ((__RANGE__) == RCC_MSIRANGE_5) || \ - ((__RANGE__) == RCC_MSIRANGE_6) || \ - ((__RANGE__) == RCC_MSIRANGE_7) || \ - ((__RANGE__) == RCC_MSIRANGE_8) || \ - ((__RANGE__) == RCC_MSIRANGE_9) || \ - ((__RANGE__) == RCC_MSIRANGE_10) || \ - ((__RANGE__) == RCC_MSIRANGE_11)) - -#define IS_RCC_MSI_STANDBY_CLOCK_RANGE(__RANGE__) (((__RANGE__) == RCC_MSIRANGE_4) || \ - ((__RANGE__) == RCC_MSIRANGE_5) || \ - ((__RANGE__) == RCC_MSIRANGE_6) || \ - ((__RANGE__) == RCC_MSIRANGE_7)) - -#define IS_RCC_CLOCKTYPE(__CLK__) ((1U <= (__CLK__)) && ((__CLK__) <= 15U)) - -#define IS_RCC_SYSCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_SYSCLKSOURCE_MSI) || \ - ((__SOURCE__) == RCC_SYSCLKSOURCE_HSI) || \ - ((__SOURCE__) == RCC_SYSCLKSOURCE_HSE) || \ - ((__SOURCE__) == RCC_SYSCLKSOURCE_PLLCLK)) - -#define IS_RCC_HCLK(__HCLK__) (((__HCLK__) == RCC_SYSCLK_DIV1) || ((__HCLK__) == RCC_SYSCLK_DIV2) || \ - ((__HCLK__) == RCC_SYSCLK_DIV4) || ((__HCLK__) == RCC_SYSCLK_DIV8) || \ - ((__HCLK__) == RCC_SYSCLK_DIV16) || ((__HCLK__) == RCC_SYSCLK_DIV64) || \ - ((__HCLK__) == RCC_SYSCLK_DIV128) || ((__HCLK__) == RCC_SYSCLK_DIV256) || \ - ((__HCLK__) == RCC_SYSCLK_DIV512)) - -#define IS_RCC_PCLK(__PCLK__) (((__PCLK__) == RCC_HCLK_DIV1) || ((__PCLK__) == RCC_HCLK_DIV2) || \ - ((__PCLK__) == RCC_HCLK_DIV4) || ((__PCLK__) == RCC_HCLK_DIV8) || \ - ((__PCLK__) == RCC_HCLK_DIV16)) - -#define IS_RCC_RTCCLKSOURCE(__SOURCE__) (((__SOURCE__) == RCC_RTCCLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_RTCCLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_RTCCLKSOURCE_LSI) || \ - ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV32)) - -#define IS_RCC_MCO(__MCOX__) ((__MCOX__) == RCC_MCO1) - -#if defined(RCC_HSI48_SUPPORT) -#define IS_RCC_MCO1SOURCE(__SOURCE__) (((__SOURCE__) == RCC_MCO1SOURCE_NOCLOCK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_MSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_HSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_HSE) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_PLLCLK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_LSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_LSE) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_HSI48)) -#else -#define IS_RCC_MCO1SOURCE(__SOURCE__) (((__SOURCE__) == RCC_MCO1SOURCE_NOCLOCK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_MSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_HSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_HSE) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_PLLCLK) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_LSI) || \ - ((__SOURCE__) == RCC_MCO1SOURCE_LSE)) -#endif /* RCC_HSI48_SUPPORT */ - -#define IS_RCC_MCODIV(__DIV__) (((__DIV__) == RCC_MCODIV_1) || ((__DIV__) == RCC_MCODIV_2) || \ - ((__DIV__) == RCC_MCODIV_4) || ((__DIV__) == RCC_MCODIV_8) || \ - ((__DIV__) == RCC_MCODIV_16)) - -#define IS_RCC_LSE_DRIVE(__DRIVE__) (((__DRIVE__) == RCC_LSEDRIVE_LOW) || \ - ((__DRIVE__) == RCC_LSEDRIVE_MEDIUMLOW) || \ - ((__DRIVE__) == RCC_LSEDRIVE_MEDIUMHIGH) || \ - ((__DRIVE__) == RCC_LSEDRIVE_HIGH)) - -#define IS_RCC_STOP_WAKEUPCLOCK(__SOURCE__) (((__SOURCE__) == RCC_STOP_WAKEUPCLOCK_MSI) || \ - ((__SOURCE__) == RCC_STOP_WAKEUPCLOCK_HSI)) -/** - * @} - */ - -/* Include RCC HAL Extended module */ -#include "stm32l4xx_hal_rcc_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup RCC_Exported_Functions - * @{ - */ - - -/** @addtogroup RCC_Exported_Functions_Group1 - * @{ - */ - -/* Initialization and de-initialization functions ******************************/ -HAL_StatusTypeDef HAL_RCC_DeInit(void); -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct); -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency); - -/** - * @} - */ - -/** @addtogroup RCC_Exported_Functions_Group2 - * @{ - */ - -/* Peripheral Control functions ************************************************/ -void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv); -void HAL_RCC_EnableCSS(void); -uint32_t HAL_RCC_GetSysClockFreq(void); -uint32_t HAL_RCC_GetHCLKFreq(void); -uint32_t HAL_RCC_GetPCLK1Freq(void); -uint32_t HAL_RCC_GetPCLK2Freq(void); -void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct); -void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency); -/* CSS NMI IRQ handler */ -void HAL_RCC_NMI_IRQHandler(void); -/* User Callbacks in non blocking mode (IT mode) */ -void HAL_RCC_CSSCallback(void); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RCC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h deleted file mode 100644 index b0000a7a..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h +++ /dev/null @@ -1,3018 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rcc_ex.h - * @author MCD Application Team - * @brief Header file of RCC HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RCC_EX_H -#define __STM32L4xx_HAL_RCC_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RCCEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup RCCEx_Exported_Types RCCEx Exported Types - * @{ - */ - -/** - * @brief PLLSAI1 Clock structure definition - */ -typedef struct -{ - - uint32_t PLLSAI1Source; /*!< PLLSAI1Source: PLLSAI1 entry clock source. - This parameter must be a value of @ref RCC_PLL_Clock_Source */ - -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - uint32_t PLLSAI1M; /*!< PLLSAI1M: specifies the division factor for PLLSAI1 input clock. - This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ -#else - uint32_t PLLSAI1M; /*!< PLLSAI1M: specifies the division factor for PLLSAI1 input clock. - This parameter must be a number between Min_Data = 1 and Max_Data = 8 */ -#endif - - uint32_t PLLSAI1N; /*!< PLLSAI1N: specifies the multiplication factor for PLLSAI1 VCO output clock. - This parameter must be a number between 8 and 86 or 127 depending on devices. */ - - uint32_t PLLSAI1P; /*!< PLLSAI1P: specifies the division factor for SAI clock. - This parameter must be a value of @ref RCC_PLLP_Clock_Divider */ - - uint32_t PLLSAI1Q; /*!< PLLSAI1Q: specifies the division factor for USB/RNG/SDMMC1 clock. - This parameter must be a value of @ref RCC_PLLQ_Clock_Divider */ - - uint32_t PLLSAI1R; /*!< PLLSAI1R: specifies the division factor for ADC clock. - This parameter must be a value of @ref RCC_PLLR_Clock_Divider */ - - uint32_t PLLSAI1ClockOut; /*!< PLLSAIClockOut: specifies PLLSAI1 output clock to be enabled. - This parameter must be a value of @ref RCC_PLLSAI1_Clock_Output */ -}RCC_PLLSAI1InitTypeDef; - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** - * @brief PLLSAI2 Clock structure definition - */ -typedef struct -{ - - uint32_t PLLSAI2Source; /*!< PLLSAI2Source: PLLSAI2 entry clock source. - This parameter must be a value of @ref RCC_PLL_Clock_Source */ - -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - uint32_t PLLSAI2M; /*!< PLLSAI2M: specifies the division factor for PLLSAI2 input clock. - This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ -#else - uint32_t PLLSAI2M; /*!< PLLSAI2M: specifies the division factor for PLLSAI2 input clock. - This parameter must be a number between Min_Data = 1 and Max_Data = 8 */ -#endif - - uint32_t PLLSAI2N; /*!< PLLSAI2N: specifies the multiplication factor for PLLSAI2 VCO output clock. - This parameter must be a number between 8 and 86 or 127 depending on devices. */ - - uint32_t PLLSAI2P; /*!< PLLSAI2P: specifies the division factor for SAI clock. - This parameter must be a value of @ref RCC_PLLP_Clock_Divider */ - -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - uint32_t PLLSAI2Q; /*!< PLLSAI2Q: specifies the division factor for DSI clock. - This parameter must be a value of @ref RCC_PLLQ_Clock_Divider */ -#endif - - uint32_t PLLSAI2R; /*!< PLLSAI2R: specifies the division factor for ADC clock. - This parameter must be a value of @ref RCC_PLLR_Clock_Divider */ - - uint32_t PLLSAI2ClockOut; /*!< PLLSAIClockOut: specifies PLLSAI2 output clock to be enabled. - This parameter must be a value of @ref RCC_PLLSAI2_Clock_Output */ -}RCC_PLLSAI2InitTypeDef; - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** - * @brief RCC extended clocks structure definition - */ -typedef struct -{ - uint32_t PeriphClockSelection; /*!< The Extended Clock to be configured. - This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */ - - RCC_PLLSAI1InitTypeDef PLLSAI1; /*!< PLLSAI1 structure parameters. - This parameter will be used only when PLLSAI1 is selected as Clock Source for SAI1, USB/RNG/SDMMC1 or ADC */ - -#if defined(RCC_PLLSAI2_SUPPORT) - - RCC_PLLSAI2InitTypeDef PLLSAI2; /*!< PLLSAI2 structure parameters. - This parameter will be used only when PLLSAI2 is selected as Clock Source for SAI2 or ADC */ - -#endif /* RCC_PLLSAI2_SUPPORT */ - - uint32_t Usart1ClockSelection; /*!< Specifies USART1 clock source. - This parameter can be a value of @ref RCCEx_USART1_Clock_Source */ - - uint32_t Usart2ClockSelection; /*!< Specifies USART2 clock source. - This parameter can be a value of @ref RCCEx_USART2_Clock_Source */ - -#if defined(USART3) - - uint32_t Usart3ClockSelection; /*!< Specifies USART3 clock source. - This parameter can be a value of @ref RCCEx_USART3_Clock_Source */ - -#endif /* USART3 */ - -#if defined(UART4) - - uint32_t Uart4ClockSelection; /*!< Specifies UART4 clock source. - This parameter can be a value of @ref RCCEx_UART4_Clock_Source */ - -#endif /* UART4 */ - -#if defined(UART5) - - uint32_t Uart5ClockSelection; /*!< Specifies UART5 clock source. - This parameter can be a value of @ref RCCEx_UART5_Clock_Source */ - -#endif /* UART5 */ - - uint32_t Lpuart1ClockSelection; /*!< Specifies LPUART1 clock source. - This parameter can be a value of @ref RCCEx_LPUART1_Clock_Source */ - - uint32_t I2c1ClockSelection; /*!< Specifies I2C1 clock source. - This parameter can be a value of @ref RCCEx_I2C1_Clock_Source */ - -#if defined(I2C2) - - uint32_t I2c2ClockSelection; /*!< Specifies I2C2 clock source. - This parameter can be a value of @ref RCCEx_I2C2_Clock_Source */ - -#endif /* I2C2 */ - - uint32_t I2c3ClockSelection; /*!< Specifies I2C3 clock source. - This parameter can be a value of @ref RCCEx_I2C3_Clock_Source */ - -#if defined(I2C4) - - uint32_t I2c4ClockSelection; /*!< Specifies I2C4 clock source. - This parameter can be a value of @ref RCCEx_I2C4_Clock_Source */ - -#endif /* I2C4 */ - - uint32_t Lptim1ClockSelection; /*!< Specifies LPTIM1 clock source. - This parameter can be a value of @ref RCCEx_LPTIM1_Clock_Source */ - - uint32_t Lptim2ClockSelection; /*!< Specifies LPTIM2 clock source. - This parameter can be a value of @ref RCCEx_LPTIM2_Clock_Source */ - - uint32_t Sai1ClockSelection; /*!< Specifies SAI1 clock source. - This parameter can be a value of @ref RCCEx_SAI1_Clock_Source */ - -#if defined(SAI2) - - uint32_t Sai2ClockSelection; /*!< Specifies SAI2 clock source. - This parameter can be a value of @ref RCCEx_SAI2_Clock_Source */ - -#endif /* SAI2 */ - -#if defined(USB_OTG_FS) || defined(USB) - - uint32_t UsbClockSelection; /*!< Specifies USB clock source (warning: same source for SDMMC1 and RNG). - This parameter can be a value of @ref RCCEx_USB_Clock_Source */ - -#endif /* USB_OTG_FS || USB */ - -#if defined(SDMMC1) - - uint32_t Sdmmc1ClockSelection; /*!< Specifies SDMMC1 clock source (warning: same source for USB and RNG). - This parameter can be a value of @ref RCCEx_SDMMC1_Clock_Source */ - -#endif /* SDMMC1 */ - - uint32_t RngClockSelection; /*!< Specifies RNG clock source (warning: same source for USB and SDMMC1). - This parameter can be a value of @ref RCCEx_RNG_Clock_Source */ - - uint32_t AdcClockSelection; /*!< Specifies ADC interface clock source. - This parameter can be a value of @ref RCCEx_ADC_Clock_Source */ - -#if defined(SWPMI1) - - uint32_t Swpmi1ClockSelection; /*!< Specifies SWPMI1 clock source. - This parameter can be a value of @ref RCCEx_SWPMI1_Clock_Source */ - -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) - - uint32_t Dfsdm1ClockSelection; /*!< Specifies DFSDM1 clock source. - This parameter can be a value of @ref RCCEx_DFSDM1_Clock_Source */ - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - uint32_t Dfsdm1AudioClockSelection; /*!< Specifies DFSDM1 audio clock source. - This parameter can be a value of @ref RCCEx_DFSDM1_Audio_Clock_Source */ - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) - - uint32_t LtdcClockSelection; /*!< Specifies LTDC clock source. - This parameter can be a value of @ref RCCEx_LTDC_Clock_Source */ - -#endif /* LTDC */ - -#if defined(DSI) - - uint32_t DsiClockSelection; /*!< Specifies DSI clock source. - This parameter can be a value of @ref RCCEx_DSI_Clock_Source */ - -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - - uint32_t OspiClockSelection; /*!< Specifies OctoSPI clock source. - This parameter can be a value of @ref RCCEx_OSPI_Clock_Source */ - -#endif - - uint32_t RTCClockSelection; /*!< Specifies RTC clock source. - This parameter can be a value of @ref RCC_RTC_Clock_Source */ -}RCC_PeriphCLKInitTypeDef; - -#if defined(CRS) - -/** - * @brief RCC_CRS Init structure definition - */ -typedef struct -{ - uint32_t Prescaler; /*!< Specifies the division factor of the SYNC signal. - This parameter can be a value of @ref RCCEx_CRS_SynchroDivider */ - - uint32_t Source; /*!< Specifies the SYNC signal source. - This parameter can be a value of @ref RCCEx_CRS_SynchroSource */ - - uint32_t Polarity; /*!< Specifies the input polarity for the SYNC signal source. - This parameter can be a value of @ref RCCEx_CRS_SynchroPolarity */ - - uint32_t ReloadValue; /*!< Specifies the value to be loaded in the frequency error counter with each SYNC event. - It can be calculated in using macro __HAL_RCC_CRS_RELOADVALUE_CALCULATE(__FTARGET__, __FSYNC__) - This parameter must be a number between 0 and 0xFFFF or a value of @ref RCCEx_CRS_ReloadValueDefault .*/ - - uint32_t ErrorLimitValue; /*!< Specifies the value to be used to evaluate the captured frequency error value. - This parameter must be a number between 0 and 0xFF or a value of @ref RCCEx_CRS_ErrorLimitDefault */ - - uint32_t HSI48CalibrationValue; /*!< Specifies a user-programmable trimming value to the HSI48 oscillator. - This parameter must be a number between 0 and 0x3F or a value of @ref RCCEx_CRS_HSI48CalibrationDefault */ - -}RCC_CRSInitTypeDef; - -/** - * @brief RCC_CRS Synchronization structure definition - */ -typedef struct -{ - uint32_t ReloadValue; /*!< Specifies the value loaded in the Counter reload value. - This parameter must be a number between 0 and 0xFFFF */ - - uint32_t HSI48CalibrationValue; /*!< Specifies value loaded in HSI48 oscillator smooth trimming. - This parameter must be a number between 0 and 0x3F */ - - uint32_t FreqErrorCapture; /*!< Specifies the value loaded in the .FECAP, the frequency error counter - value latched in the time of the last SYNC event. - This parameter must be a number between 0 and 0xFFFF */ - - uint32_t FreqErrorDirection; /*!< Specifies the value loaded in the .FEDIR, the counting direction of the - frequency error counter latched in the time of the last SYNC event. - It shows whether the actual frequency is below or above the target. - This parameter must be a value of @ref RCCEx_CRS_FreqErrorDirection*/ - -}RCC_CRSSynchroInfoTypeDef; - -#endif /* CRS */ -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RCCEx_Exported_Constants RCCEx Exported Constants - * @{ - */ - -/** @defgroup RCCEx_LSCO_Clock_Source Low Speed Clock Source - * @{ - */ -#define RCC_LSCOSOURCE_LSI 0x00000000U /*!< LSI selection for low speed clock output */ -#define RCC_LSCOSOURCE_LSE RCC_BDCR_LSCOSEL /*!< LSE selection for low speed clock output */ -/** - * @} - */ - -/** @defgroup RCCEx_Periph_Clock_Selection Periph Clock Selection - * @{ - */ -#define RCC_PERIPHCLK_USART1 0x00000001U -#define RCC_PERIPHCLK_USART2 0x00000002U -#if defined(USART3) -#define RCC_PERIPHCLK_USART3 0x00000004U -#endif -#if defined(UART4) -#define RCC_PERIPHCLK_UART4 0x00000008U -#endif -#if defined(UART5) -#define RCC_PERIPHCLK_UART5 0x00000010U -#endif -#define RCC_PERIPHCLK_LPUART1 0x00000020U -#define RCC_PERIPHCLK_I2C1 0x00000040U -#if defined(I2C2) -#define RCC_PERIPHCLK_I2C2 0x00000080U -#endif -#define RCC_PERIPHCLK_I2C3 0x00000100U -#define RCC_PERIPHCLK_LPTIM1 0x00000200U -#define RCC_PERIPHCLK_LPTIM2 0x00000400U -#define RCC_PERIPHCLK_SAI1 0x00000800U -#if defined(SAI2) -#define RCC_PERIPHCLK_SAI2 0x00001000U -#endif -#if defined(USB_OTG_FS) || defined(USB) -#define RCC_PERIPHCLK_USB 0x00002000U -#endif -#define RCC_PERIPHCLK_ADC 0x00004000U -#if defined(SWPMI1) -#define RCC_PERIPHCLK_SWPMI1 0x00008000U -#endif -#if defined(DFSDM1_Filter0) -#define RCC_PERIPHCLK_DFSDM1 0x00010000U -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define RCC_PERIPHCLK_DFSDM1AUDIO 0x00200000U -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#endif -#define RCC_PERIPHCLK_RTC 0x00020000U -#define RCC_PERIPHCLK_RNG 0x00040000U -#if defined(SDMMC1) -#define RCC_PERIPHCLK_SDMMC1 0x00080000U -#endif -#if defined(I2C4) -#define RCC_PERIPHCLK_I2C4 0x00100000U -#endif -#if defined(LTDC) -#define RCC_PERIPHCLK_LTDC 0x00400000U -#endif -#if defined(DSI) -#define RCC_PERIPHCLK_DSI 0x00800000U -#endif -#if defined(OCTOSPI1) || defined(OCTOSPI2) -#define RCC_PERIPHCLK_OSPI 0x01000000U -#endif -/** - * @} - */ - - -/** @defgroup RCCEx_USART1_Clock_Source USART1 Clock Source - * @{ - */ -#define RCC_USART1CLKSOURCE_PCLK2 0x00000000U -#define RCC_USART1CLKSOURCE_SYSCLK RCC_CCIPR_USART1SEL_0 -#define RCC_USART1CLKSOURCE_HSI RCC_CCIPR_USART1SEL_1 -#define RCC_USART1CLKSOURCE_LSE (RCC_CCIPR_USART1SEL_0 | RCC_CCIPR_USART1SEL_1) -/** - * @} - */ - -/** @defgroup RCCEx_USART2_Clock_Source USART2 Clock Source - * @{ - */ -#define RCC_USART2CLKSOURCE_PCLK1 0x00000000U -#define RCC_USART2CLKSOURCE_SYSCLK RCC_CCIPR_USART2SEL_0 -#define RCC_USART2CLKSOURCE_HSI RCC_CCIPR_USART2SEL_1 -#define RCC_USART2CLKSOURCE_LSE (RCC_CCIPR_USART2SEL_0 | RCC_CCIPR_USART2SEL_1) -/** - * @} - */ - -#if defined(USART3) -/** @defgroup RCCEx_USART3_Clock_Source USART3 Clock Source - * @{ - */ -#define RCC_USART3CLKSOURCE_PCLK1 0x00000000U -#define RCC_USART3CLKSOURCE_SYSCLK RCC_CCIPR_USART3SEL_0 -#define RCC_USART3CLKSOURCE_HSI RCC_CCIPR_USART3SEL_1 -#define RCC_USART3CLKSOURCE_LSE (RCC_CCIPR_USART3SEL_0 | RCC_CCIPR_USART3SEL_1) -/** - * @} - */ -#endif /* USART3 */ - -#if defined(UART4) -/** @defgroup RCCEx_UART4_Clock_Source UART4 Clock Source - * @{ - */ -#define RCC_UART4CLKSOURCE_PCLK1 0x00000000U -#define RCC_UART4CLKSOURCE_SYSCLK RCC_CCIPR_UART4SEL_0 -#define RCC_UART4CLKSOURCE_HSI RCC_CCIPR_UART4SEL_1 -#define RCC_UART4CLKSOURCE_LSE (RCC_CCIPR_UART4SEL_0 | RCC_CCIPR_UART4SEL_1) -/** - * @} - */ -#endif /* UART4 */ - -#if defined(UART5) -/** @defgroup RCCEx_UART5_Clock_Source UART5 Clock Source - * @{ - */ -#define RCC_UART5CLKSOURCE_PCLK1 0x00000000U -#define RCC_UART5CLKSOURCE_SYSCLK RCC_CCIPR_UART5SEL_0 -#define RCC_UART5CLKSOURCE_HSI RCC_CCIPR_UART5SEL_1 -#define RCC_UART5CLKSOURCE_LSE (RCC_CCIPR_UART5SEL_0 | RCC_CCIPR_UART5SEL_1) -/** - * @} - */ -#endif /* UART5 */ - -/** @defgroup RCCEx_LPUART1_Clock_Source LPUART1 Clock Source - * @{ - */ -#define RCC_LPUART1CLKSOURCE_PCLK1 0x00000000U -#define RCC_LPUART1CLKSOURCE_SYSCLK RCC_CCIPR_LPUART1SEL_0 -#define RCC_LPUART1CLKSOURCE_HSI RCC_CCIPR_LPUART1SEL_1 -#define RCC_LPUART1CLKSOURCE_LSE (RCC_CCIPR_LPUART1SEL_0 | RCC_CCIPR_LPUART1SEL_1) -/** - * @} - */ - -/** @defgroup RCCEx_I2C1_Clock_Source I2C1 Clock Source - * @{ - */ -#define RCC_I2C1CLKSOURCE_PCLK1 0x00000000U -#define RCC_I2C1CLKSOURCE_SYSCLK RCC_CCIPR_I2C1SEL_0 -#define RCC_I2C1CLKSOURCE_HSI RCC_CCIPR_I2C1SEL_1 -/** - * @} - */ - -#if defined(I2C2) -/** @defgroup RCCEx_I2C2_Clock_Source I2C2 Clock Source - * @{ - */ -#define RCC_I2C2CLKSOURCE_PCLK1 0x00000000U -#define RCC_I2C2CLKSOURCE_SYSCLK RCC_CCIPR_I2C2SEL_0 -#define RCC_I2C2CLKSOURCE_HSI RCC_CCIPR_I2C2SEL_1 -/** - * @} - */ -#endif /* I2C2 */ - -/** @defgroup RCCEx_I2C3_Clock_Source I2C3 Clock Source - * @{ - */ -#define RCC_I2C3CLKSOURCE_PCLK1 0x00000000U -#define RCC_I2C3CLKSOURCE_SYSCLK RCC_CCIPR_I2C3SEL_0 -#define RCC_I2C3CLKSOURCE_HSI RCC_CCIPR_I2C3SEL_1 -/** - * @} - */ - -#if defined(I2C4) -/** @defgroup RCCEx_I2C4_Clock_Source I2C4 Clock Source - * @{ - */ -#define RCC_I2C4CLKSOURCE_PCLK1 0x00000000U -#define RCC_I2C4CLKSOURCE_SYSCLK RCC_CCIPR2_I2C4SEL_0 -#define RCC_I2C4CLKSOURCE_HSI RCC_CCIPR2_I2C4SEL_1 -/** - * @} - */ -#endif /* I2C4 */ - -/** @defgroup RCCEx_SAI1_Clock_Source SAI1 Clock Source - * @{ - */ -#define RCC_SAI1CLKSOURCE_PLLSAI1 0x00000000U -#if defined(RCC_PLLSAI2_SUPPORT) -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define RCC_SAI1CLKSOURCE_PLLSAI2 RCC_CCIPR2_SAI1SEL_0 -#else -#define RCC_SAI1CLKSOURCE_PLLSAI2 RCC_CCIPR_SAI1SEL_0 -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#endif /* RCC_PLLSAI2_SUPPORT */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define RCC_SAI1CLKSOURCE_PLL RCC_CCIPR2_SAI1SEL_1 -#define RCC_SAI1CLKSOURCE_PIN (RCC_CCIPR2_SAI1SEL_1 | RCC_CCIPR2_SAI1SEL_0) -#define RCC_SAI1CLKSOURCE_HSI RCC_CCIPR2_SAI1SEL_2 -#else -#define RCC_SAI1CLKSOURCE_PLL RCC_CCIPR_SAI1SEL_1 -#define RCC_SAI1CLKSOURCE_PIN RCC_CCIPR_SAI1SEL -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -/** - * @} - */ - -#if defined(SAI2) -/** @defgroup RCCEx_SAI2_Clock_Source SAI2 Clock Source - * @{ - */ -#define RCC_SAI2CLKSOURCE_PLLSAI1 0x00000000U -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define RCC_SAI2CLKSOURCE_PLLSAI2 RCC_CCIPR2_SAI2SEL_0 -#define RCC_SAI2CLKSOURCE_PLL RCC_CCIPR2_SAI2SEL_1 -#define RCC_SAI2CLKSOURCE_PIN (RCC_CCIPR2_SAI2SEL_1 | RCC_CCIPR2_SAI2SEL_0) -#define RCC_SAI2CLKSOURCE_HSI RCC_CCIPR2_SAI2SEL_2 -#else -#define RCC_SAI2CLKSOURCE_PLLSAI2 RCC_CCIPR_SAI2SEL_0 -#define RCC_SAI2CLKSOURCE_PLL RCC_CCIPR_SAI2SEL_1 -#define RCC_SAI2CLKSOURCE_PIN RCC_CCIPR_SAI2SEL -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -/** - * @} - */ -#endif /* SAI2 */ - -/** @defgroup RCCEx_LPTIM1_Clock_Source LPTIM1 Clock Source - * @{ - */ -#define RCC_LPTIM1CLKSOURCE_PCLK1 0x00000000U -#define RCC_LPTIM1CLKSOURCE_LSI RCC_CCIPR_LPTIM1SEL_0 -#define RCC_LPTIM1CLKSOURCE_HSI RCC_CCIPR_LPTIM1SEL_1 -#define RCC_LPTIM1CLKSOURCE_LSE RCC_CCIPR_LPTIM1SEL -/** - * @} - */ - -/** @defgroup RCCEx_LPTIM2_Clock_Source LPTIM2 Clock Source - * @{ - */ -#define RCC_LPTIM2CLKSOURCE_PCLK1 0x00000000U -#define RCC_LPTIM2CLKSOURCE_LSI RCC_CCIPR_LPTIM2SEL_0 -#define RCC_LPTIM2CLKSOURCE_HSI RCC_CCIPR_LPTIM2SEL_1 -#define RCC_LPTIM2CLKSOURCE_LSE RCC_CCIPR_LPTIM2SEL -/** - * @} - */ - -#if defined(SDMMC1) -/** @defgroup RCCEx_SDMMC1_Clock_Source SDMMC1 Clock Source - * @{ - */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_SDMMC1CLKSOURCE_HSI48 0x00000000U /*!< HSI48 clock selected as SDMMC1 clock */ -#else -#define RCC_SDMMC1CLKSOURCE_NONE 0x00000000U /*!< No clock selected as SDMMC1 clock */ -#endif /* RCC_HSI48_SUPPORT */ -#define RCC_SDMMC1CLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 /*!< PLLSAI1 "Q" clock selected as SDMMC1 clock */ -#define RCC_SDMMC1CLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 /*!< PLL "Q" clock selected as SDMMC1 clock */ -#define RCC_SDMMC1CLKSOURCE_MSI RCC_CCIPR_CLK48SEL /*!< MSI clock selected as SDMMC1 clock */ -#if defined(RCC_CCIPR2_SDMMCSEL) -#define RCC_SDMMC1CLKSOURCE_PLLP RCC_CCIPR2_SDMMCSEL /*!< PLL "P" clock selected as SDMMC1 kernel clock */ -#endif /* RCC_CCIPR2_SDMMCSEL */ -/** - * @} - */ -#endif /* SDMMC1 */ - -/** @defgroup RCCEx_RNG_Clock_Source RNG Clock Source - * @{ - */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_RNGCLKSOURCE_HSI48 0x00000000U -#else -#define RCC_RNGCLKSOURCE_NONE 0x00000000U -#endif /* RCC_HSI48_SUPPORT */ -#define RCC_RNGCLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 -#define RCC_RNGCLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 -#define RCC_RNGCLKSOURCE_MSI RCC_CCIPR_CLK48SEL -/** - * @} - */ - -#if defined(USB_OTG_FS) || defined(USB) -/** @defgroup RCCEx_USB_Clock_Source USB Clock Source - * @{ - */ -#if defined(RCC_HSI48_SUPPORT) -#define RCC_USBCLKSOURCE_HSI48 0x00000000U -#else -#define RCC_USBCLKSOURCE_NONE 0x00000000U -#endif /* RCC_HSI48_SUPPORT */ -#define RCC_USBCLKSOURCE_PLLSAI1 RCC_CCIPR_CLK48SEL_0 -#define RCC_USBCLKSOURCE_PLL RCC_CCIPR_CLK48SEL_1 -#define RCC_USBCLKSOURCE_MSI RCC_CCIPR_CLK48SEL -/** - * @} - */ -#endif /* USB_OTG_FS || USB */ - -/** @defgroup RCCEx_ADC_Clock_Source ADC Clock Source - * @{ - */ -#define RCC_ADCCLKSOURCE_NONE 0x00000000U -#define RCC_ADCCLKSOURCE_PLLSAI1 RCC_CCIPR_ADCSEL_0 -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) -#define RCC_ADCCLKSOURCE_PLLSAI2 RCC_CCIPR_ADCSEL_1 -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ -#define RCC_ADCCLKSOURCE_SYSCLK RCC_CCIPR_ADCSEL -/** - * @} - */ - -#if defined(SWPMI1) -/** @defgroup RCCEx_SWPMI1_Clock_Source SWPMI1 Clock Source - * @{ - */ -#define RCC_SWPMI1CLKSOURCE_PCLK1 0x00000000U -#define RCC_SWPMI1CLKSOURCE_HSI RCC_CCIPR_SWPMI1SEL -/** - * @} - */ -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) -/** @defgroup RCCEx_DFSDM1_Clock_Source DFSDM1 Clock Source - * @{ - */ -#define RCC_DFSDM1CLKSOURCE_PCLK2 0x00000000U -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define RCC_DFSDM1CLKSOURCE_SYSCLK RCC_CCIPR2_DFSDM1SEL -#else -#define RCC_DFSDM1CLKSOURCE_SYSCLK RCC_CCIPR_DFSDM1SEL -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -/** - * @} - */ - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -/** @defgroup RCCEx_DFSDM1_Audio_Clock_Source DFSDM1 Audio Clock Source - * @{ - */ -#define RCC_DFSDM1AUDIOCLKSOURCE_SAI1 0x00000000U -#define RCC_DFSDM1AUDIOCLKSOURCE_HSI RCC_CCIPR2_ADFSDM1SEL_0 -#define RCC_DFSDM1AUDIOCLKSOURCE_MSI RCC_CCIPR2_ADFSDM1SEL_1 -/** - * @} - */ -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) -/** @defgroup RCCEx_LTDC_Clock_Source LTDC Clock Source - * @{ - */ -#define RCC_LTDCCLKSOURCE_PLLSAI2_DIV2 0x00000000U -#define RCC_LTDCCLKSOURCE_PLLSAI2_DIV4 RCC_CCIPR2_PLLSAI2DIVR_0 -#define RCC_LTDCCLKSOURCE_PLLSAI2_DIV8 RCC_CCIPR2_PLLSAI2DIVR_1 -#define RCC_LTDCCLKSOURCE_PLLSAI2_DIV16 RCC_CCIPR2_PLLSAI2DIVR -/** - * @} - */ -#endif /* LTDC */ - -#if defined(DSI) -/** @defgroup RCCEx_DSI_Clock_Source DSI Clock Source - * @{ - */ -#define RCC_DSICLKSOURCE_DSIPHY 0x00000000U -#define RCC_DSICLKSOURCE_PLLSAI2 RCC_CCIPR2_DSISEL -/** - * @} - */ -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) -/** @defgroup RCCEx_OSPI_Clock_Source OctoSPI Clock Source - * @{ - */ -#define RCC_OSPICLKSOURCE_SYSCLK 0x00000000U -#define RCC_OSPICLKSOURCE_MSI RCC_CCIPR2_OSPISEL_0 -#define RCC_OSPICLKSOURCE_PLL RCC_CCIPR2_OSPISEL_1 -/** - * @} - */ -#endif /* OCTOSPI1 || OCTOSPI2 */ - -/** @defgroup RCCEx_EXTI_LINE_LSECSS RCC LSE CSS external interrupt line - * @{ - */ -#define RCC_EXTI_LINE_LSECSS EXTI_IMR1_IM19 /*!< External interrupt line 19 connected to the LSE CSS EXTI Line */ -/** - * @} - */ - -#if defined(CRS) - -/** @defgroup RCCEx_CRS_Status RCCEx CRS Status - * @{ - */ -#define RCC_CRS_NONE 0x00000000U -#define RCC_CRS_TIMEOUT 0x00000001U -#define RCC_CRS_SYNCOK 0x00000002U -#define RCC_CRS_SYNCWARN 0x00000004U -#define RCC_CRS_SYNCERR 0x00000008U -#define RCC_CRS_SYNCMISS 0x00000010U -#define RCC_CRS_TRIMOVF 0x00000020U -/** - * @} - */ - -/** @defgroup RCCEx_CRS_SynchroSource RCCEx CRS SynchroSource - * @{ - */ -#define RCC_CRS_SYNC_SOURCE_GPIO 0x00000000U /*!< Synchro Signal source GPIO */ -#define RCC_CRS_SYNC_SOURCE_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */ -#define RCC_CRS_SYNC_SOURCE_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF (default)*/ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_SynchroDivider RCCEx CRS SynchroDivider - * @{ - */ -#define RCC_CRS_SYNC_DIV1 0x00000000U /*!< Synchro Signal not divided (default) */ -#define RCC_CRS_SYNC_DIV2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */ -#define RCC_CRS_SYNC_DIV4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */ -#define RCC_CRS_SYNC_DIV8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */ -#define RCC_CRS_SYNC_DIV16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */ -#define RCC_CRS_SYNC_DIV32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */ -#define RCC_CRS_SYNC_DIV64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */ -#define RCC_CRS_SYNC_DIV128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_SynchroPolarity RCCEx CRS SynchroPolarity - * @{ - */ -#define RCC_CRS_SYNC_POLARITY_RISING 0x00000000U /*!< Synchro Active on rising edge (default) */ -#define RCC_CRS_SYNC_POLARITY_FALLING CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_ReloadValueDefault RCCEx CRS ReloadValueDefault - * @{ - */ -#define RCC_CRS_RELOADVALUE_DEFAULT 0x0000BB7FU /*!< The reset value of the RELOAD field corresponds - to a target frequency of 48 MHz and a synchronization signal frequency of 1 kHz (SOF signal from USB). */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_ErrorLimitDefault RCCEx CRS ErrorLimitDefault - * @{ - */ -#define RCC_CRS_ERRORLIMIT_DEFAULT 0x00000022U /*!< Default Frequency error limit */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_HSI48CalibrationDefault RCCEx CRS HSI48CalibrationDefault - * @{ - */ -#define RCC_CRS_HSI48CALIBRATION_DEFAULT 0x00000020U /*!< The default value is 32, which corresponds to the middle of the trimming interval. - The trimming step is around 67 kHz between two consecutive TRIM steps. A higher TRIM value - corresponds to a higher output frequency */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_FreqErrorDirection RCCEx CRS FreqErrorDirection - * @{ - */ -#define RCC_CRS_FREQERRORDIR_UP 0x00000000U /*!< Upcounting direction, the actual frequency is above the target */ -#define RCC_CRS_FREQERRORDIR_DOWN CRS_ISR_FEDIR /*!< Downcounting direction, the actual frequency is below the target */ -/** - * @} - */ - -/** @defgroup RCCEx_CRS_Interrupt_Sources RCCEx CRS Interrupt Sources - * @{ - */ -#define RCC_CRS_IT_SYNCOK CRS_CR_SYNCOKIE /*!< SYNC event OK */ -#define RCC_CRS_IT_SYNCWARN CRS_CR_SYNCWARNIE /*!< SYNC warning */ -#define RCC_CRS_IT_ERR CRS_CR_ERRIE /*!< Error */ -#define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */ -#define RCC_CRS_IT_SYNCERR CRS_CR_ERRIE /*!< SYNC error */ -#define RCC_CRS_IT_SYNCMISS CRS_CR_ERRIE /*!< SYNC missed */ -#define RCC_CRS_IT_TRIMOVF CRS_CR_ERRIE /*!< Trimming overflow or underflow */ - -/** - * @} - */ - -/** @defgroup RCCEx_CRS_Flags RCCEx CRS Flags - * @{ - */ -#define RCC_CRS_FLAG_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK flag */ -#define RCC_CRS_FLAG_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning flag */ -#define RCC_CRS_FLAG_ERR CRS_ISR_ERRF /*!< Error flag */ -#define RCC_CRS_FLAG_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC flag */ -#define RCC_CRS_FLAG_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */ -#define RCC_CRS_FLAG_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/ -#define RCC_CRS_FLAG_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */ - -/** - * @} - */ - -#endif /* CRS */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup RCCEx_Exported_Macros RCCEx Exported Macros - * @{ - */ - - -/** - * @brief Macro to configure the PLLSAI1 clock multiplication and division factors. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - @if STM32L4S9xx - * @param __PLLSAI1M__ specifies the division factor of PLLSAI1 input clock. - * This parameter must be a number between Min_Data = 1 and Max_Data = 16. - * - @endif - * @param __PLLSAI1N__ specifies the multiplication factor for PLLSAI1 VCO output clock. - * This parameter must be a number between 8 and 86. - * @note You have to set the PLLSAI1N parameter correctly to ensure that the VCO - * output frequency is between 64 and 344 MHz. - * PLLSAI1 clock frequency = f(PLLSAI1) multiplied by PLLSAI1N - * - * @param __PLLSAI1P__ specifies the division factor for SAI clock. - * This parameter must be a number in the range (7 or 17) for STM32L47xxx/L48xxx - * else (2 to 31). - * SAI1 clock frequency = f(PLLSAI1) / PLLSAI1P - * - * @param __PLLSAI1Q__ specifies the division factor for USB/RNG/SDMMC1 clock. - * This parameter must be in the range (2, 4, 6 or 8). - * USB/RNG/SDMMC1 clock frequency = f(PLLSAI1) / PLLSAI1Q - * - * @param __PLLSAI1R__ specifies the division factor for SAR ADC clock. - * This parameter must be in the range (2, 4, 6 or 8). - * ADC clock frequency = f(PLLSAI1) / PLLSAI1R - * - * @retval None - */ -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLLSAI1_CONFIG(__PLLSAI1M__, __PLLSAI1N__, __PLLSAI1P__, __PLLSAI1Q__, __PLLSAI1R__) \ - WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \ - ((((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | \ - ((((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) | \ - ((__PLLSAI1P__) << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos) | \ - (((__PLLSAI1M__) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)) - -#else - -#define __HAL_RCC_PLLSAI1_CONFIG(__PLLSAI1M__, __PLLSAI1N__, __PLLSAI1P__, __PLLSAI1Q__, __PLLSAI1R__) \ - WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \ - (((__PLLSAI1P__) >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos) | \ - ((((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | \ - ((((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) | \ - (((__PLLSAI1M__) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)) - -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -#else - -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLLSAI1_CONFIG(__PLLSAI1N__, __PLLSAI1P__, __PLLSAI1Q__, __PLLSAI1R__) \ - WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \ - ((((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | \ - ((((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) | \ - ((__PLLSAI1P__) << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos)) - -#else - -#define __HAL_RCC_PLLSAI1_CONFIG(__PLLSAI1N__, __PLLSAI1P__, __PLLSAI1Q__, __PLLSAI1R__) \ - WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \ - (((__PLLSAI1P__) >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos) | \ - ((((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | \ - ((((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos)) - -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - -/** - * @brief Macro to configure the PLLSAI1 clock multiplication factor N. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI1N__ specifies the multiplication factor for PLLSAI1 VCO output clock. - * This parameter must be a number between 8 and 86. - * @note You have to set the PLLSAI1N parameter correctly to ensure that the VCO - * output frequency is between 64 and 344 MHz. - * Use to set PLLSAI1 clock frequency = f(PLLSAI1) multiplied by PLLSAI1N - * - * @retval None - */ -#define __HAL_RCC_PLLSAI1_MULN_CONFIG(__PLLSAI1N__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N, (__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) - -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - -/** @brief Macro to configure the PLLSAI1 input clock division factor M. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI1M__ specifies the division factor for PLLSAI1 clock. - * This parameter must be a number between Min_Data = 1 and Max_Data = 16. - * - * @retval None - */ - -#define __HAL_RCC_PLLSAI1_DIVM_CONFIG(__PLLSAI1M__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M, ((__PLLSAI1M__) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos) - -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - -/** @brief Macro to configure the PLLSAI1 clock division factor P. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI1P__ specifies the division factor for SAI clock. - * This parameter must be a number in the range (7 or 17) for STM32L47xxx/L48xxx - * else (2 to 31). - * Use to set SAI1 clock frequency = f(PLLSAI1) / PLLSAI1P - * - * @retval None - */ -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLLSAI1_DIVP_CONFIG(__PLLSAI1P__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1PDIV, (__PLLSAI1P__) << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos) - -#else - -#define __HAL_RCC_PLLSAI1_DIVP_CONFIG(__PLLSAI1P__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P, ((__PLLSAI1P__) >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos) - -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -/** @brief Macro to configure the PLLSAI1 clock division factor Q. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI1Q__ specifies the division factor for USB/RNG/SDMMC1 clock. - * This parameter must be in the range (2, 4, 6 or 8). - * Use to set USB/RNG/SDMMC1 clock frequency = f(PLLSAI1) / PLLSAI1Q - * - * @retval None - */ -#define __HAL_RCC_PLLSAI1_DIVQ_CONFIG(__PLLSAI1Q__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q, (((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) - -/** @brief Macro to configure the PLLSAI1 clock division factor R. - * - * @note This function must be used only when the PLLSAI1 is disabled. - * @note PLLSAI1 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI1R__ specifies the division factor for ADC clock. - * This parameter must be in the range (2, 4, 6 or 8) - * Use to set ADC clock frequency = f(PLLSAI1) / PLLSAI1R - * - * @retval None - */ -#define __HAL_RCC_PLLSAI1_DIVR_CONFIG(__PLLSAI1R__) \ - MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1R, (((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) - -/** - * @brief Macros to enable or disable the PLLSAI1. - * @note The PLLSAI1 is disabled by hardware when entering STOP and STANDBY modes. - * @retval None - */ - -#define __HAL_RCC_PLLSAI1_ENABLE() SET_BIT(RCC->CR, RCC_CR_PLLSAI1ON) - -#define __HAL_RCC_PLLSAI1_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_PLLSAI1ON) - -/** - * @brief Macros to enable or disable each clock output (PLLSAI1_SAI1, PLLSAI1_USB2 and PLLSAI1_ADC1). - * @note Enabling and disabling those clocks can be done without the need to stop the PLL. - * This is mainly used to save Power. - * @param __PLLSAI1_CLOCKOUT__ specifies the PLLSAI1 clock to be output. - * This parameter can be one or a combination of the following values: - * @arg @ref RCC_PLLSAI1_SAI1CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI1_48M2CLK This clock is used to generate the clock for the USB OTG FS (48 MHz), - * the random number generator (<=48 MHz) and the SDIO (<= 48 MHz). - * @arg @ref RCC_PLLSAI1_ADC1CLK Clock used to clock ADC peripheral. - * @retval None - */ - -#define __HAL_RCC_PLLSAI1CLKOUT_ENABLE(__PLLSAI1_CLOCKOUT__) SET_BIT(RCC->PLLSAI1CFGR, (__PLLSAI1_CLOCKOUT__)) - -#define __HAL_RCC_PLLSAI1CLKOUT_DISABLE(__PLLSAI1_CLOCKOUT__) CLEAR_BIT(RCC->PLLSAI1CFGR, (__PLLSAI1_CLOCKOUT__)) - -/** - * @brief Macro to get clock output enable status (PLLSAI1_SAI1, PLLSAI1_USB2 and PLLSAI1_ADC1). - * @param __PLLSAI1_CLOCKOUT__ specifies the PLLSAI1 clock to be output. - * This parameter can be one of the following values: - * @arg @ref RCC_PLLSAI1_SAI1CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI1_48M2CLK This clock is used to generate the clock for the USB OTG FS (48 MHz), - * the random number generator (<=48 MHz) and the SDIO (<= 48 MHz). - * @arg @ref RCC_PLLSAI1_ADC1CLK Clock used to clock ADC peripheral. - * @retval SET / RESET - */ -#define __HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(__PLLSAI1_CLOCKOUT__) READ_BIT(RCC->PLLSAI1CFGR, (__PLLSAI1_CLOCKOUT__)) - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** - * @brief Macro to configure the PLLSAI2 clock multiplication and division factors. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - @if STM32L4S9xx - * @param __PLLSAI2M__ specifies the division factor of PLLSAI2 input clock. - * This parameter must be a number between Min_Data = 1 and Max_Data = 16. - * - @endif - * @param __PLLSAI2N__ specifies the multiplication factor for PLLSAI2 VCO output clock. - * This parameter must be a number between 8 and 86. - * @note You have to set the PLLSAI2N parameter correctly to ensure that the VCO - * output frequency is between 64 and 344 MHz. - * - * @param __PLLSAI2P__ specifies the division factor for SAI clock. - * This parameter must be a number in the range (7 or 17) for STM32L47xxx/L48xxx - * else (2 to 31). - * SAI2 clock frequency = f(PLLSAI2) / PLLSAI2P - * - @if STM32L4S9xx - * @param __PLLSAI2Q__ specifies the division factor for DSI clock. - * This parameter must be in the range (2, 4, 6 or 8). - * DSI clock frequency = f(PLLSAI2) / PLLSAI2Q - * - @endif - * @param __PLLSAI2R__ specifies the division factor for SAR ADC clock. - * This parameter must be in the range (2, 4, 6 or 8). - * - * @retval None - */ - -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - -# if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) && defined(RCC_PLLSAI2Q_DIV_SUPPORT) - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2M__, __PLLSAI2N__, __PLLSAI2P__, __PLLSAI2Q__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - ((((__PLLSAI2Q__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2Q_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | \ - ((__PLLSAI2P__) << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos) | \ - (((__PLLSAI2M__) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)) - -# elif defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2M__, __PLLSAI2N__, __PLLSAI2P__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | \ - ((__PLLSAI2P__) << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos) | \ - (((__PLLSAI2M__) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)) - -# else - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2M__, __PLLSAI2N__, __PLLSAI2P__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - (((__PLLSAI2P__) >> 4U) << RCC_PLLSAI2CFGR_PLLSAI2P_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | \ - (((__PLLSAI2M__) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)) - -# endif /* RCC_PLLSAI2P_DIV_2_31_SUPPORT && RCC_PLLSAI2Q_DIV_SUPPORT */ - -#else - -# if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) && defined(RCC_PLLSAI2Q_DIV_SUPPORT) - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2N__, __PLLSAI2P__, __PLLSAI2Q__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - ((((__PLLSAI2Q__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2Q_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | \ - ((__PLLSAI2P__) << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos)) - -# elif defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2N__, __PLLSAI2P__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | \ - ((__PLLSAI2P__) << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos)) - -# else - -#define __HAL_RCC_PLLSAI2_CONFIG(__PLLSAI2N__, __PLLSAI2P__, __PLLSAI2R__) \ - WRITE_REG(RCC->PLLSAI2CFGR, ((__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | \ - (((__PLLSAI2P__) >> 4U) << RCC_PLLSAI2CFGR_PLLSAI2P_Pos) | \ - ((((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos)) - -# endif /* RCC_PLLSAI2P_DIV_2_31_SUPPORT && RCC_PLLSAI2Q_DIV_SUPPORT */ - -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - - -/** - * @brief Macro to configure the PLLSAI2 clock multiplication factor N. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI2N__ specifies the multiplication factor for PLLSAI2 VCO output clock. - * This parameter must be a number between 8 and 86. - * @note You have to set the PLLSAI2N parameter correctly to ensure that the VCO - * output frequency is between 64 and 344 MHz. - * PLLSAI1 clock frequency = f(PLLSAI1) multiplied by PLLSAI2N - * - * @retval None - */ -#define __HAL_RCC_PLLSAI2_MULN_CONFIG(__PLLSAI2N__) \ - MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N, (__PLLSAI2N__) << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) - -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - -/** @brief Macro to configure the PLLSAI2 input clock division factor M. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI2M__ specifies the division factor for PLLSAI2 clock. - * This parameter must be a number between Min_Data = 1 and Max_Data = 16. - * - * @retval None - */ - -#define __HAL_RCC_PLLSAI2_DIVM_CONFIG(__PLLSAI2M__) \ - MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2M, ((__PLLSAI2M__) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos) - -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - -/** @brief Macro to configure the PLLSAI2 clock division factor P. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI2P__ specifies the division factor. - * This parameter must be a number in the range (7 or 17). - * Use to set SAI2 clock frequency = f(PLLSAI2) / __PLLSAI2P__ - * - * @retval None - */ -#define __HAL_RCC_PLLSAI2_DIVP_CONFIG(__PLLSAI2P__) \ - MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2P, ((__PLLSAI2P__) >> 4U) << RCC_PLLSAI2CFGR_PLLSAI2P_Pos) - -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - -/** @brief Macro to configure the PLLSAI2 clock division factor Q. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI2Q__ specifies the division factor for USB/RNG/SDMMC1 clock. - * This parameter must be in the range (2, 4, 6 or 8). - * Use to set USB/RNG/SDMMC1 clock frequency = f(PLLSAI2) / PLLSAI2Q - * - * @retval None - */ -#define __HAL_RCC_PLLSAI2_DIVQ_CONFIG(__PLLSAI2Q__) \ - MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2Q, (((__PLLSAI2Q__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2Q_Pos) - -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ - -/** @brief Macro to configure the PLLSAI2 clock division factor R. - * - * @note This function must be used only when the PLLSAI2 is disabled. - * @note PLLSAI2 clock source is common with the main PLL (configured through - * __HAL_RCC_PLL_CONFIG() macro) - * - * @param __PLLSAI2R__ specifies the division factor. - * This parameter must be in the range (2, 4, 6 or 8). - * Use to set ADC clock frequency = f(PLLSAI2) / __PLLSAI2R__ - * - * @retval None - */ -#define __HAL_RCC_PLLSAI2_DIVR_CONFIG(__PLLSAI2R__) \ - MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2R, (((__PLLSAI2R__) >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) - -/** - * @brief Macros to enable or disable the PLLSAI2. - * @note The PLLSAI2 is disabled by hardware when entering STOP and STANDBY modes. - * @retval None - */ - -#define __HAL_RCC_PLLSAI2_ENABLE() SET_BIT(RCC->CR, RCC_CR_PLLSAI2ON) - -#define __HAL_RCC_PLLSAI2_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_PLLSAI2ON) - -/** - * @brief Macros to enable or disable each clock output (PLLSAI2_SAI2, PLLSAI2_ADC2 and RCC_PLLSAI2_DSICLK). - * @note Enabling and disabling those clocks can be done without the need to stop the PLL. - * This is mainly used to save Power. - * @param __PLLSAI2_CLOCKOUT__ specifies the PLLSAI2 clock to be output. - * This parameter can be one or a combination of the following values: - @if STM32L486xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_ADC2CLK Clock used to clock ADC peripheral. - @endif - @if STM32L4A6xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_ADC2CLK Clock used to clock ADC peripheral. - @endif - @if STM32L4S9xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_DSICLK Clock used to clock DSI peripheral. - @endif - * @retval None - */ - -#define __HAL_RCC_PLLSAI2CLKOUT_ENABLE(__PLLSAI2_CLOCKOUT__) SET_BIT(RCC->PLLSAI2CFGR, (__PLLSAI2_CLOCKOUT__)) - -#define __HAL_RCC_PLLSAI2CLKOUT_DISABLE(__PLLSAI2_CLOCKOUT__) CLEAR_BIT(RCC->PLLSAI2CFGR, (__PLLSAI2_CLOCKOUT__)) - -/** - * @brief Macro to get clock output enable status (PLLSAI2_SAI2, PLLSAI2_ADC2 and RCC_PLLSAI2_DSICLK). - * @param __PLLSAI2_CLOCKOUT__ specifies the PLLSAI2 clock to be output. - * This parameter can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_ADC2CLK Clock used to clock ADC peripheral. - @endif - @if STM32L4A6xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_ADC2CLK Clock used to clock ADC peripheral. - @endif - @if STM32L4S9xx - * @arg @ref RCC_PLLSAI2_SAI2CLK This clock is used to generate an accurate clock to achieve - * high-quality audio performance on SAI interface in case. - * @arg @ref RCC_PLLSAI2_DSICLK Clock used to clock DSI peripheral. - @endif - * @retval SET / RESET - */ -#define __HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(__PLLSAI2_CLOCKOUT__) READ_BIT(RCC->PLLSAI2CFGR, (__PLLSAI2_CLOCKOUT__)) - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** - * @brief Macro to configure the SAI1 clock source. - * @param __SAI1_CLKSOURCE__ defines the SAI1 clock source. This clock is derived - * from the PLLSAI1, system PLL or external clock (through a dedicated pin). - * This parameter can be one of the following values: - * @arg @ref RCC_SAI1CLKSOURCE_PLLSAI1 SAI1 clock = PLLSAI1 "P" clock (PLLSAI1CLK) - @if STM32L486xx - * @arg @ref RCC_SAI1CLKSOURCE_PLLSAI2 SAI1 clock = PLLSAI2 "P" clock (PLLSAI2CLK) for devices with PLLSAI2 - @endif - * @arg @ref RCC_SAI1CLKSOURCE_PLL SAI1 clock = PLL "P" clock (PLLSAI3CLK if PLLSAI2 exists, else PLLSAI2CLK) - * @arg @ref RCC_SAI1CLKSOURCE_PIN SAI1 clock = External Clock (SAI1_EXTCLK) - @if STM32L4S9xx - * @arg @ref RCC_SAI1CLKSOURCE_HSI SAI1 clock = HSI16 - @endif - * - @if STM32L443xx - * @note HSI16 is automatically set as SAI1 clock source when PLL are disabled for devices without PLLSAI2. - @endif - * - * @retval None - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_SAI1_CONFIG(__SAI1_CLKSOURCE__)\ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_SAI1SEL, (__SAI1_CLKSOURCE__)) -#else -#define __HAL_RCC_SAI1_CONFIG(__SAI1_CLKSOURCE__)\ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SAI1SEL, (__SAI1_CLKSOURCE__)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** @brief Macro to get the SAI1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_SAI1CLKSOURCE_PLLSAI1 SAI1 clock = PLLSAI1 "P" clock (PLLSAI1CLK) - @if STM32L486xx - * @arg @ref RCC_SAI1CLKSOURCE_PLLSAI2 SAI1 clock = PLLSAI2 "P" clock (PLLSAI2CLK) for devices with PLLSAI2 - @endif - * @arg @ref RCC_SAI1CLKSOURCE_PLL SAI1 clock = PLL "P" clock (PLLSAI3CLK if PLLSAI2 exists, else PLLSAI2CLK) - * @arg @ref RCC_SAI1CLKSOURCE_PIN SAI1 clock = External Clock (SAI1_EXTCLK) - * - * @note Despite returned values RCC_SAI1CLKSOURCE_PLLSAI1 or RCC_SAI1CLKSOURCE_PLL, HSI16 is automatically set as SAI1 - * clock source when PLLs are disabled for devices without PLLSAI2. - * - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_GET_SAI1_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_SAI1SEL)) -#else -#define __HAL_RCC_GET_SAI1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_SAI1SEL)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#if defined(SAI2) - -/** - * @brief Macro to configure the SAI2 clock source. - * @param __SAI2_CLKSOURCE__ defines the SAI2 clock source. This clock is derived - * from the PLLSAI2, system PLL or external clock (through a dedicated pin). - * This parameter can be one of the following values: - * @arg @ref RCC_SAI2CLKSOURCE_PLLSAI1 SAI2 clock = PLLSAI1 "P" clock (PLLSAI1CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PLLSAI2 SAI2 clock = PLLSAI2 "P" clock (PLLSAI2CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PLL SAI2 clock = PLL "P" clock (PLLSAI3CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PIN SAI2 clock = External Clock (SAI2_EXTCLK) - @if STM32L4S9xx - * @arg @ref RCC_SAI2CLKSOURCE_HSI SAI2 clock = HSI16 - @endif - * - * @retval None - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_SAI2_CONFIG(__SAI2_CLKSOURCE__ )\ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_SAI2SEL, (__SAI2_CLKSOURCE__)) -#else -#define __HAL_RCC_SAI2_CONFIG(__SAI2_CLKSOURCE__ )\ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SAI2SEL, (__SAI2_CLKSOURCE__)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** @brief Macro to get the SAI2 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_SAI2CLKSOURCE_PLLSAI1 SAI2 clock = PLLSAI1 "P" clock (PLLSAI1CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PLLSAI2 SAI2 clock = PLLSAI2 "P" clock (PLLSAI2CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PLL SAI2 clock = PLL "P" clock (PLLSAI3CLK) - * @arg @ref RCC_SAI2CLKSOURCE_PIN SAI2 clock = External Clock (SAI2_EXTCLK) - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_GET_SAI2_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_SAI2SEL)) -#else -#define __HAL_RCC_GET_SAI2_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_SAI2SEL)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* SAI2 */ - -/** @brief Macro to configure the I2C1 clock (I2C1CLK). - * - * @param __I2C1_CLKSOURCE__ specifies the I2C1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_I2C1CLKSOURCE_PCLK1 PCLK1 selected as I2C1 clock - * @arg @ref RCC_I2C1CLKSOURCE_HSI HSI selected as I2C1 clock - * @arg @ref RCC_I2C1CLKSOURCE_SYSCLK System Clock selected as I2C1 clock - * @retval None - */ -#define __HAL_RCC_I2C1_CONFIG(__I2C1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_I2C1SEL, (__I2C1_CLKSOURCE__)) - -/** @brief Macro to get the I2C1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_I2C1CLKSOURCE_PCLK1 PCLK1 selected as I2C1 clock - * @arg @ref RCC_I2C1CLKSOURCE_HSI HSI selected as I2C1 clock - * @arg @ref RCC_I2C1CLKSOURCE_SYSCLK System Clock selected as I2C1 clock - */ -#define __HAL_RCC_GET_I2C1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_I2C1SEL)) - -#if defined(I2C2) - -/** @brief Macro to configure the I2C2 clock (I2C2CLK). - * - * @param __I2C2_CLKSOURCE__ specifies the I2C2 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_I2C2CLKSOURCE_PCLK1 PCLK1 selected as I2C2 clock - * @arg @ref RCC_I2C2CLKSOURCE_HSI HSI selected as I2C2 clock - * @arg @ref RCC_I2C2CLKSOURCE_SYSCLK System Clock selected as I2C2 clock - * @retval None - */ -#define __HAL_RCC_I2C2_CONFIG(__I2C2_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_I2C2SEL, (__I2C2_CLKSOURCE__)) - -/** @brief Macro to get the I2C2 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_I2C2CLKSOURCE_PCLK1 PCLK1 selected as I2C2 clock - * @arg @ref RCC_I2C2CLKSOURCE_HSI HSI selected as I2C2 clock - * @arg @ref RCC_I2C2CLKSOURCE_SYSCLK System Clock selected as I2C2 clock - */ -#define __HAL_RCC_GET_I2C2_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_I2C2SEL)) - -#endif /* I2C2 */ - -/** @brief Macro to configure the I2C3 clock (I2C3CLK). - * - * @param __I2C3_CLKSOURCE__ specifies the I2C3 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_I2C3CLKSOURCE_PCLK1 PCLK1 selected as I2C3 clock - * @arg @ref RCC_I2C3CLKSOURCE_HSI HSI selected as I2C3 clock - * @arg @ref RCC_I2C3CLKSOURCE_SYSCLK System Clock selected as I2C3 clock - * @retval None - */ -#define __HAL_RCC_I2C3_CONFIG(__I2C3_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_I2C3SEL, (__I2C3_CLKSOURCE__)) - -/** @brief Macro to get the I2C3 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_I2C3CLKSOURCE_PCLK1 PCLK1 selected as I2C3 clock - * @arg @ref RCC_I2C3CLKSOURCE_HSI HSI selected as I2C3 clock - * @arg @ref RCC_I2C3CLKSOURCE_SYSCLK System Clock selected as I2C3 clock - */ -#define __HAL_RCC_GET_I2C3_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_I2C3SEL)) - -#if defined(I2C4) - -/** @brief Macro to configure the I2C4 clock (I2C4CLK). - * - * @param __I2C4_CLKSOURCE__ specifies the I2C4 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_I2C4CLKSOURCE_PCLK1 PCLK1 selected as I2C4 clock - * @arg @ref RCC_I2C4CLKSOURCE_HSI HSI selected as I2C4 clock - * @arg @ref RCC_I2C4CLKSOURCE_SYSCLK System Clock selected as I2C4 clock - * @retval None - */ -#define __HAL_RCC_I2C4_CONFIG(__I2C4_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_I2C4SEL, (__I2C4_CLKSOURCE__)) - -/** @brief Macro to get the I2C4 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_I2C4CLKSOURCE_PCLK1 PCLK1 selected as I2C4 clock - * @arg @ref RCC_I2C4CLKSOURCE_HSI HSI selected as I2C4 clock - * @arg @ref RCC_I2C4CLKSOURCE_SYSCLK System Clock selected as I2C4 clock - */ -#define __HAL_RCC_GET_I2C4_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_I2C4SEL)) - -#endif /* I2C4 */ - - -/** @brief Macro to configure the USART1 clock (USART1CLK). - * - * @param __USART1_CLKSOURCE__ specifies the USART1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_USART1CLKSOURCE_PCLK2 PCLK2 selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_HSI HSI selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_SYSCLK System Clock selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_LSE SE selected as USART1 clock - * @retval None - */ -#define __HAL_RCC_USART1_CONFIG(__USART1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_USART1SEL, (__USART1_CLKSOURCE__)) - -/** @brief Macro to get the USART1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_USART1CLKSOURCE_PCLK2 PCLK2 selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_HSI HSI selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_SYSCLK System Clock selected as USART1 clock - * @arg @ref RCC_USART1CLKSOURCE_LSE LSE selected as USART1 clock - */ -#define __HAL_RCC_GET_USART1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_USART1SEL)) - -/** @brief Macro to configure the USART2 clock (USART2CLK). - * - * @param __USART2_CLKSOURCE__ specifies the USART2 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_USART2CLKSOURCE_PCLK1 PCLK1 selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_HSI HSI selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_SYSCLK System Clock selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_LSE LSE selected as USART2 clock - * @retval None - */ -#define __HAL_RCC_USART2_CONFIG(__USART2_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_USART2SEL, (__USART2_CLKSOURCE__)) - -/** @brief Macro to get the USART2 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_USART2CLKSOURCE_PCLK1 PCLK1 selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_HSI HSI selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_SYSCLK System Clock selected as USART2 clock - * @arg @ref RCC_USART2CLKSOURCE_LSE LSE selected as USART2 clock - */ -#define __HAL_RCC_GET_USART2_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_USART2SEL)) - -#if defined(USART3) - -/** @brief Macro to configure the USART3 clock (USART3CLK). - * - * @param __USART3_CLKSOURCE__ specifies the USART3 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_USART3CLKSOURCE_PCLK1 PCLK1 selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_HSI HSI selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_SYSCLK System Clock selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_LSE LSE selected as USART3 clock - * @retval None - */ -#define __HAL_RCC_USART3_CONFIG(__USART3_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_USART3SEL, (__USART3_CLKSOURCE__)) - -/** @brief Macro to get the USART3 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_USART3CLKSOURCE_PCLK1 PCLK1 selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_HSI HSI selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_SYSCLK System Clock selected as USART3 clock - * @arg @ref RCC_USART3CLKSOURCE_LSE LSE selected as USART3 clock - */ -#define __HAL_RCC_GET_USART3_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_USART3SEL)) - -#endif /* USART3 */ - -#if defined(UART4) - -/** @brief Macro to configure the UART4 clock (UART4CLK). - * - * @param __UART4_CLKSOURCE__ specifies the UART4 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_UART4CLKSOURCE_PCLK1 PCLK1 selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_HSI HSI selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_SYSCLK System Clock selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_LSE LSE selected as UART4 clock - * @retval None - */ -#define __HAL_RCC_UART4_CONFIG(__UART4_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_UART4SEL, (__UART4_CLKSOURCE__)) - -/** @brief Macro to get the UART4 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_UART4CLKSOURCE_PCLK1 PCLK1 selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_HSI HSI selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_SYSCLK System Clock selected as UART4 clock - * @arg @ref RCC_UART4CLKSOURCE_LSE LSE selected as UART4 clock - */ -#define __HAL_RCC_GET_UART4_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_UART4SEL)) - -#endif /* UART4 */ - -#if defined(UART5) - -/** @brief Macro to configure the UART5 clock (UART5CLK). - * - * @param __UART5_CLKSOURCE__ specifies the UART5 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_UART5CLKSOURCE_PCLK1 PCLK1 selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_HSI HSI selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_SYSCLK System Clock selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_LSE LSE selected as UART5 clock - * @retval None - */ -#define __HAL_RCC_UART5_CONFIG(__UART5_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_UART5SEL, (__UART5_CLKSOURCE__)) - -/** @brief Macro to get the UART5 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_UART5CLKSOURCE_PCLK1 PCLK1 selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_HSI HSI selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_SYSCLK System Clock selected as UART5 clock - * @arg @ref RCC_UART5CLKSOURCE_LSE LSE selected as UART5 clock - */ -#define __HAL_RCC_GET_UART5_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_UART5SEL)) - -#endif /* UART5 */ - -/** @brief Macro to configure the LPUART1 clock (LPUART1CLK). - * - * @param __LPUART1_CLKSOURCE__ specifies the LPUART1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_LPUART1CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_HSI HSI selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_SYSCLK System Clock selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_LSE LSE selected as LPUART1 clock - * @retval None - */ -#define __HAL_RCC_LPUART1_CONFIG(__LPUART1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPUART1SEL, (__LPUART1_CLKSOURCE__)) - -/** @brief Macro to get the LPUART1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_LPUART1CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_HSI HSI selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_SYSCLK System Clock selected as LPUART1 clock - * @arg @ref RCC_LPUART1CLKSOURCE_LSE LSE selected as LPUART1 clock - */ -#define __HAL_RCC_GET_LPUART1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_LPUART1SEL)) - -/** @brief Macro to configure the LPTIM1 clock (LPTIM1CLK). - * - * @param __LPTIM1_CLKSOURCE__ specifies the LPTIM1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_LPTIM1CLKSOURCE_PCLK1 PCLK1 selected as LPTIM1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_LSI HSI selected as LPTIM1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_HSI LSI selected as LPTIM1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_LSE LSE selected as LPTIM1 clock - * @retval None - */ -#define __HAL_RCC_LPTIM1_CONFIG(__LPTIM1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPTIM1SEL, (__LPTIM1_CLKSOURCE__)) - -/** @brief Macro to get the LPTIM1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_LPTIM1CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_LSI HSI selected as LPUART1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_HSI System Clock selected as LPUART1 clock - * @arg @ref RCC_LPTIM1CLKSOURCE_LSE LSE selected as LPUART1 clock - */ -#define __HAL_RCC_GET_LPTIM1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_LPTIM1SEL)) - -/** @brief Macro to configure the LPTIM2 clock (LPTIM2CLK). - * - * @param __LPTIM2_CLKSOURCE__ specifies the LPTIM2 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_LPTIM2CLKSOURCE_PCLK1 PCLK1 selected as LPTIM2 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_LSI HSI selected as LPTIM2 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_HSI LSI selected as LPTIM2 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_LSE LSE selected as LPTIM2 clock - * @retval None - */ -#define __HAL_RCC_LPTIM2_CONFIG(__LPTIM2_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPTIM2SEL, (__LPTIM2_CLKSOURCE__)) - -/** @brief Macro to get the LPTIM2 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_LPTIM2CLKSOURCE_PCLK1 PCLK1 selected as LPUART1 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_LSI HSI selected as LPUART1 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_HSI System Clock selected as LPUART1 clock - * @arg @ref RCC_LPTIM2CLKSOURCE_LSE LSE selected as LPUART1 clock - */ -#define __HAL_RCC_GET_LPTIM2_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_LPTIM2SEL)) - -#if defined(SDMMC1) - -/** @brief Macro to configure the SDMMC1 clock. - * - @if STM32L486xx - * @note USB, RNG and SDMMC1 peripherals share the same 48MHz clock source. - @endif - * - @if STM32L443xx - * @note USB, RNG and SDMMC1 peripherals share the same 48MHz clock source. - @endif - * - * @param __SDMMC1_CLKSOURCE__ specifies the SDMMC1 clock source. - * This parameter can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_SDMMC1CLKSOURCE_NONE No clock selected as SDMMC1 clock for devices without HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" Clock selected as SDMMC1 clock - @endif - @if STM32L443xx - * @arg @ref RCC_SDMMC1CLKSOURCE_HSI48 HSI48 selected as SDMMC1 clock for devices with HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" Clock selected as SDMMC1 clock - @endif - @if STM32L4S9xx - * @arg @ref RCC_SDMMC1CLKSOURCE_HSI48 HSI48 selected as SDMMC1 clock for devices with HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" Clock selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLP PLL "P" Clock selected as SDMMC1 clock - @endif - * @arg @ref RCC_SDMMC1CLKSOURCE_PLL PLL "Q" Clock selected as SDMMC1 clock - * @retval None - */ -#if defined(RCC_CCIPR2_SDMMCSEL) -#define __HAL_RCC_SDMMC1_CONFIG(__SDMMC1_CLKSOURCE__) \ - do \ - { \ - if((__SDMMC1_CLKSOURCE__) == RCC_SDMMC1CLKSOURCE_PLLP) \ - { \ - SET_BIT(RCC->CCIPR2, RCC_CCIPR2_SDMMCSEL); \ - } \ - else \ - { \ - CLEAR_BIT(RCC->CCIPR2, RCC_CCIPR2_SDMMCSEL); \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_CLK48SEL, (__SDMMC1_CLKSOURCE__)); \ - } \ - } while(0) -#else -#define __HAL_RCC_SDMMC1_CONFIG(__SDMMC1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_CLK48SEL, (__SDMMC1_CLKSOURCE__)) -#endif /* RCC_CCIPR2_SDMMCSEL */ - -/** @brief Macro to get the SDMMC1 clock. - * @retval The clock source can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_SDMMC1CLKSOURCE_NONE No clock selected as SDMMC1 clock for devices without HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as SDMMC1 clock - @endif - @if STM32L443xx - * @arg @ref RCC_SDMMC1CLKSOURCE_HSI48 HSI48 selected as SDMMC1 clock for devices with HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as SDMMC1 clock - @endif - @if STM32L4S9xx - * @arg @ref RCC_SDMMC1CLKSOURCE_HSI48 HSI48 selected as SDMMC1 clock for devices with HSI48 - * @arg @ref RCC_SDMMC1CLKSOURCE_MSI MSI selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as SDMMC1 clock - * @arg @ref RCC_SDMMC1CLKSOURCE_PLLP PLL "P" clock (PLLSAI3CLK) selected as SDMMC1 kernel clock - @endif - * @arg @ref RCC_SDMMC1CLKSOURCE_PLL PLL "Q" clock (PLL48M1CLK) selected as SDMMC1 clock - */ -#if defined(RCC_CCIPR2_SDMMCSEL) -#define __HAL_RCC_GET_SDMMC1_SOURCE() \ - ((READ_BIT(RCC->CCIPR2, RCC_CCIPR2_SDMMCSEL) != RESET) ? RCC_SDMMC1CLKSOURCE_PLLP : (READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL))) -#else -#define __HAL_RCC_GET_SDMMC1_SOURCE() \ - (READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL)) -#endif /* RCC_CCIPR2_SDMMCSEL */ - -#endif /* SDMMC1 */ - -/** @brief Macro to configure the RNG clock. - * - * @note USB, RNG and SDMMC1 peripherals share the same 48MHz clock source. - * - * @param __RNG_CLKSOURCE__ specifies the RNG clock source. - * This parameter can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_RNGCLKSOURCE_NONE No clock selected as RNG clock for devices without HSI48 - @endif - @if STM32L443xx - * @arg @ref RCC_RNGCLKSOURCE_HSI48 HSI48 selected as RNG clock clock for devices with HSI48 - @endif - * @arg @ref RCC_RNGCLKSOURCE_MSI MSI selected as RNG clock - * @arg @ref RCC_RNGCLKSOURCE_PLLSAI1 PLLSAI1 Clock selected as RNG clock - * @arg @ref RCC_RNGCLKSOURCE_PLL PLL Clock selected as RNG clock - * @retval None - */ -#define __HAL_RCC_RNG_CONFIG(__RNG_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_CLK48SEL, (__RNG_CLKSOURCE__)) - -/** @brief Macro to get the RNG clock. - * @retval The clock source can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_RNGCLKSOURCE_NONE No clock selected as RNG clock for devices without HSI48 - @endif - @if STM32L443xx - * @arg @ref RCC_RNGCLKSOURCE_HSI48 HSI48 selected as RNG clock clock for devices with HSI48 - @endif - * @arg @ref RCC_RNGCLKSOURCE_MSI MSI selected as RNG clock - * @arg @ref RCC_RNGCLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as RNG clock - * @arg @ref RCC_RNGCLKSOURCE_PLL PLL "Q" clock (PLL48M1CLK) selected as RNG clock - */ -#define __HAL_RCC_GET_RNG_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL)) - -#if defined(USB_OTG_FS) || defined(USB) - -/** @brief Macro to configure the USB clock (USBCLK). - * - * @note USB, RNG and SDMMC1 peripherals share the same 48MHz clock source. - * - * @param __USB_CLKSOURCE__ specifies the USB clock source. - * This parameter can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_USBCLKSOURCE_NONE No clock selected as 48MHz clock for devices without HSI48 - @endif - @if STM32L443xx - * @arg @ref RCC_USBCLKSOURCE_HSI48 HSI48 selected as 48MHz clock for devices with HSI48 - @endif - * @arg @ref RCC_USBCLKSOURCE_MSI MSI selected as USB clock - * @arg @ref RCC_USBCLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as USB clock - * @arg @ref RCC_USBCLKSOURCE_PLL PLL "Q" clock (PLL48M1CLK) selected as USB clock - * @retval None - */ -#define __HAL_RCC_USB_CONFIG(__USB_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_CLK48SEL, (__USB_CLKSOURCE__)) - -/** @brief Macro to get the USB clock source. - * @retval The clock source can be one of the following values: - @if STM32L486xx - * @arg @ref RCC_USBCLKSOURCE_NONE No clock selected as 48MHz clock for devices without HSI48 - @endif - @if STM32L443xx - * @arg @ref RCC_USBCLKSOURCE_HSI48 HSI48 selected as 48MHz clock for devices with HSI48 - @endif - * @arg @ref RCC_USBCLKSOURCE_MSI MSI selected as USB clock - * @arg @ref RCC_USBCLKSOURCE_PLLSAI1 PLLSAI1 "Q" clock (PLL48M2CLK) selected as USB clock - * @arg @ref RCC_USBCLKSOURCE_PLL PLL "Q" clock (PLL48M1CLK) selected as USB clock - */ -#define __HAL_RCC_GET_USB_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL)) - -#endif /* USB_OTG_FS || USB */ - -/** @brief Macro to configure the ADC interface clock. - * @param __ADC_CLKSOURCE__ specifies the ADC digital interface clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_ADCCLKSOURCE_NONE No clock selected as ADC clock - * @arg @ref RCC_ADCCLKSOURCE_PLLSAI1 PLLSAI1 Clock selected as ADC clock - @if STM32L486xx - * @arg @ref RCC_ADCCLKSOURCE_PLLSAI2 PLLSAI2 Clock selected as ADC clock for STM32L47x/STM32L48x/STM32L49x/STM32L4Ax devices - @endif - * @arg @ref RCC_ADCCLKSOURCE_SYSCLK System Clock selected as ADC clock - * @retval None - */ -#define __HAL_RCC_ADC_CONFIG(__ADC_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_ADCSEL, (__ADC_CLKSOURCE__)) - -/** @brief Macro to get the ADC clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_ADCCLKSOURCE_NONE No clock selected as ADC clock - * @arg @ref RCC_ADCCLKSOURCE_PLLSAI1 PLLSAI1 Clock selected as ADC clock - @if STM32L486xx - * @arg @ref RCC_ADCCLKSOURCE_PLLSAI2 PLLSAI2 Clock selected as ADC clock for STM32L47x/STM32L48x/STM32L49x/STM32L4Ax devices - @endif - * @arg @ref RCC_ADCCLKSOURCE_SYSCLK System Clock selected as ADC clock - */ -#define __HAL_RCC_GET_ADC_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_ADCSEL)) - -#if defined(SWPMI1) - -/** @brief Macro to configure the SWPMI1 clock. - * @param __SWPMI1_CLKSOURCE__ specifies the SWPMI1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_SWPMI1CLKSOURCE_PCLK1 PCLK1 Clock selected as SWPMI1 clock - * @arg @ref RCC_SWPMI1CLKSOURCE_HSI HSI Clock selected as SWPMI1 clock - * @retval None - */ -#define __HAL_RCC_SWPMI1_CONFIG(__SWPMI1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SWPMI1SEL, (__SWPMI1_CLKSOURCE__)) - -/** @brief Macro to get the SWPMI1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_SWPMI1CLKSOURCE_PCLK1 PCLK1 Clock selected as SWPMI1 clock - * @arg @ref RCC_SWPMI1CLKSOURCE_HSI HSI Clock selected as SWPMI1 clock - */ -#define __HAL_RCC_GET_SWPMI1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_SWPMI1SEL)) - -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) -/** @brief Macro to configure the DFSDM1 clock. - * @param __DFSDM1_CLKSOURCE__ specifies the DFSDM1 clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_DFSDM1CLKSOURCE_PCLK2 PCLK2 Clock selected as DFSDM1 clock - * @arg @ref RCC_DFSDM1CLKSOURCE_SYSCLK System Clock selected as DFSDM1 clock - * @retval None - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_DFSDM1_CONFIG(__DFSDM1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_DFSDM1SEL, (__DFSDM1_CLKSOURCE__)) -#else -#define __HAL_RCC_DFSDM1_CONFIG(__DFSDM1_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR, RCC_CCIPR_DFSDM1SEL, (__DFSDM1_CLKSOURCE__)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** @brief Macro to get the DFSDM1 clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_DFSDM1CLKSOURCE_PCLK2 PCLK2 Clock selected as DFSDM1 clock - * @arg @ref RCC_DFSDM1CLKSOURCE_SYSCLK System Clock selected as DFSDM1 clock - */ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define __HAL_RCC_GET_DFSDM1_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_DFSDM1SEL)) -#else -#define __HAL_RCC_GET_DFSDM1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_DFSDM1SEL)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/** @brief Macro to configure the DFSDM1 audio clock. - * @param __DFSDM1AUDIO_CLKSOURCE__ specifies the DFSDM1 audio clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_SAI1 SAI1 clock selected as DFSDM1 audio clock - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_HSI HSI clock selected as DFSDM1 audio clock - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_MSI MSI clock selected as DFSDM1 audio clock - * @retval None - */ -#define __HAL_RCC_DFSDM1AUDIO_CONFIG(__DFSDM1AUDIO_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_ADFSDM1SEL, (__DFSDM1AUDIO_CLKSOURCE__)) - -/** @brief Macro to get the DFSDM1 audio clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_SAI1 SAI1 clock selected as DFSDM1 audio clock - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_HSI HSI clock selected as DFSDM1 audio clock - * @arg @ref RCC_DFSDM1AUDIOCLKSOURCE_MSI MSI clock selected as DFSDM1 audio clock - */ -#define __HAL_RCC_GET_DFSDM1AUDIO_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_ADFSDM1SEL)) - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) - -/** @brief Macro to configure the LTDC clock. - * @param __LTDC_CLKSOURCE__ specifies the DSI clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV2 PLLSAI2 divider R divided by 2 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV4 PLLSAI2 divider R divided by 4 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV8 PLLSAI2 divider R divided by 8 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV16 PLLSAI2 divider R divided by 16 clock selected as LTDC clock - * @retval None - */ -#define __HAL_RCC_LTDC_CONFIG(__LTDC_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_PLLSAI2DIVR, (__LTDC_CLKSOURCE__)) - -/** @brief Macro to get the LTDC clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV2 PLLSAI2 divider R divided by 2 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV4 PLLSAI2 divider R divided by 4 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV8 PLLSAI2 divider R divided by 8 clock selected as LTDC clock - * @arg @ref RCC_LTDCCLKSOURCE_PLLSAI2_DIV16 PLLSAI2 divider R divided by 16 clock selected as LTDC clock - */ -#define __HAL_RCC_GET_LTDC_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_PLLSAI2DIVR)) - -#endif /* LTDC */ - -#if defined(DSI) - -/** @brief Macro to configure the DSI clock. - * @param __DSI_CLKSOURCE__ specifies the DSI clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_DSICLKSOURCE_DSIPHY DSI-PHY clock selected as DSI clock - * @arg @ref RCC_DSICLKSOURCE_PLLSAI2 PLLSAI2 R divider clock selected as DSI clock - * @retval None - */ -#define __HAL_RCC_DSI_CONFIG(__DSI_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_DSISEL, (__DSI_CLKSOURCE__)) - -/** @brief Macro to get the DSI clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_DSICLKSOURCE_DSIPHY DSI-PHY clock selected as DSI clock - * @arg @ref RCC_DSICLKSOURCE_PLLSAI2 PLLSAI2 R divider clock selected as DSI clock - */ -#define __HAL_RCC_GET_DSI_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_DSISEL)) - -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - -/** @brief Macro to configure the OctoSPI clock. - * @param __OSPI_CLKSOURCE__ specifies the OctoSPI clock source. - * This parameter can be one of the following values: - * @arg @ref RCC_OSPICLKSOURCE_SYSCLK System Clock selected as OctoSPI clock - * @arg @ref RCC_OSPICLKSOURCE_MSI MSI clock selected as OctoSPI clock - * @arg @ref RCC_OSPICLKSOURCE_PLL PLL Q divider clock selected as OctoSPI clock - * @retval None - */ -#define __HAL_RCC_OSPI_CONFIG(__OSPI_CLKSOURCE__) \ - MODIFY_REG(RCC->CCIPR2, RCC_CCIPR2_OSPISEL, (__OSPI_CLKSOURCE__)) - -/** @brief Macro to get the OctoSPI clock source. - * @retval The clock source can be one of the following values: - * @arg @ref RCC_OSPICLKSOURCE_SYSCLK System Clock selected as OctoSPI clock - * @arg @ref RCC_OSPICLKSOURCE_MSI MSI clock selected as OctoSPI clock - * @arg @ref RCC_OSPICLKSOURCE_PLL PLL Q divider clock selected as OctoSPI clock - */ -#define __HAL_RCC_GET_OSPI_SOURCE() (READ_BIT(RCC->CCIPR2, RCC_CCIPR2_OSPISEL)) - -#endif /* OCTOSPI1 || OCTOSPI2 */ - -/** @defgroup RCCEx_Flags_Interrupts_Management Flags Interrupts Management - * @brief macros to manage the specified RCC Flags and interrupts. - * @{ - */ - -/** @brief Enable PLLSAI1RDY interrupt. - * @retval None - */ -#define __HAL_RCC_PLLSAI1_ENABLE_IT() SET_BIT(RCC->CIER, RCC_CIER_PLLSAI1RDYIE) - -/** @brief Disable PLLSAI1RDY interrupt. - * @retval None - */ -#define __HAL_RCC_PLLSAI1_DISABLE_IT() CLEAR_BIT(RCC->CIER, RCC_CIER_PLLSAI1RDYIE) - -/** @brief Clear the PLLSAI1RDY interrupt pending bit. - * @retval None - */ -#define __HAL_RCC_PLLSAI1_CLEAR_IT() WRITE_REG(RCC->CICR, RCC_CICR_PLLSAI1RDYC) - -/** @brief Check whether PLLSAI1RDY interrupt has occurred or not. - * @retval TRUE or FALSE. - */ -#define __HAL_RCC_PLLSAI1_GET_IT_SOURCE() (READ_BIT(RCC->CIFR, RCC_CIFR_PLLSAI1RDYF) == RCC_CIFR_PLLSAI1RDYF) - -/** @brief Check whether the PLLSAI1RDY flag is set or not. - * @retval TRUE or FALSE. - */ -#define __HAL_RCC_PLLSAI1_GET_FLAG() (READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == (RCC_CR_PLLSAI1RDY)) - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** @brief Enable PLLSAI2RDY interrupt. - * @retval None - */ -#define __HAL_RCC_PLLSAI2_ENABLE_IT() SET_BIT(RCC->CIER, RCC_CIER_PLLSAI2RDYIE) - -/** @brief Disable PLLSAI2RDY interrupt. - * @retval None - */ -#define __HAL_RCC_PLLSAI2_DISABLE_IT() CLEAR_BIT(RCC->CIER, RCC_CIER_PLLSAI2RDYIE) - -/** @brief Clear the PLLSAI2RDY interrupt pending bit. - * @retval None - */ -#define __HAL_RCC_PLLSAI2_CLEAR_IT() WRITE_REG(RCC->CICR, RCC_CICR_PLLSAI2RDYC) - -/** @brief Check whether the PLLSAI2RDY interrupt has occurred or not. - * @retval TRUE or FALSE. - */ -#define __HAL_RCC_PLLSAI2_GET_IT_SOURCE() (READ_BIT(RCC->CIFR, RCC_CIFR_PLLSAI2RDYF) == RCC_CIFR_PLLSAI2RDYF) - -/** @brief Check whether the PLLSAI2RDY flag is set or not. - * @retval TRUE or FALSE. - */ -#define __HAL_RCC_PLLSAI2_GET_FLAG() (READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == (RCC_CR_PLLSAI2RDY)) - -#endif /* RCC_PLLSAI2_SUPPORT */ - - -/** - * @brief Enable the RCC LSE CSS Extended Interrupt Line. - * @retval None - */ -#define __HAL_RCC_LSECSS_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Disable the RCC LSE CSS Extended Interrupt Line. - * @retval None - */ -#define __HAL_RCC_LSECSS_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Enable the RCC LSE CSS Event Line. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Disable the RCC LSE CSS Event Line. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, RCC_EXTI_LINE_LSECSS) - - -/** - * @brief Enable the RCC LSE CSS Extended Interrupt Falling Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, RCC_EXTI_LINE_LSECSS) - - -/** - * @brief Disable the RCC LSE CSS Extended Interrupt Falling Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, RCC_EXTI_LINE_LSECSS) - - -/** - * @brief Enable the RCC LSE CSS Extended Interrupt Rising Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Disable the RCC LSE CSS Extended Interrupt Rising Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Enable the RCC LSE CSS Extended Interrupt Rising & Falling Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_RCC_LSECSS_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the RCC LSE CSS Extended Interrupt Rising & Falling Trigger. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_DISABLE_RISING_FALLING_EDGE() \ - do { \ - __HAL_RCC_LSECSS_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_RCC_LSECSS_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Check whether the specified RCC LSE CSS EXTI interrupt flag is set or not. - * @retval EXTI RCC LSE CSS Line Status. - */ -#define __HAL_RCC_LSECSS_EXTI_GET_FLAG() (READ_BIT(EXTI->PR1, RCC_EXTI_LINE_LSECSS) == RCC_EXTI_LINE_LSECSS) - -/** - * @brief Clear the RCC LSE CSS EXTI flag. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR1, RCC_EXTI_LINE_LSECSS) - -/** - * @brief Generate a Software interrupt on the RCC LSE CSS EXTI line. - * @retval None. - */ -#define __HAL_RCC_LSECSS_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, RCC_EXTI_LINE_LSECSS) - - -#if defined(CRS) - -/** - * @brief Enable the specified CRS interrupts. - * @param __INTERRUPT__ specifies the CRS interrupt sources to be enabled. - * This parameter can be any combination of the following values: - * @arg @ref RCC_CRS_IT_SYNCOK SYNC event OK interrupt - * @arg @ref RCC_CRS_IT_SYNCWARN SYNC warning interrupt - * @arg @ref RCC_CRS_IT_ERR Synchronization or trimming error interrupt - * @arg @ref RCC_CRS_IT_ESYNC Expected SYNC interrupt - * @retval None - */ -#define __HAL_RCC_CRS_ENABLE_IT(__INTERRUPT__) SET_BIT(CRS->CR, (__INTERRUPT__)) - -/** - * @brief Disable the specified CRS interrupts. - * @param __INTERRUPT__ specifies the CRS interrupt sources to be disabled. - * This parameter can be any combination of the following values: - * @arg @ref RCC_CRS_IT_SYNCOK SYNC event OK interrupt - * @arg @ref RCC_CRS_IT_SYNCWARN SYNC warning interrupt - * @arg @ref RCC_CRS_IT_ERR Synchronization or trimming error interrupt - * @arg @ref RCC_CRS_IT_ESYNC Expected SYNC interrupt - * @retval None - */ -#define __HAL_RCC_CRS_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(CRS->CR, (__INTERRUPT__)) - -/** @brief Check whether the CRS interrupt has occurred or not. - * @param __INTERRUPT__ specifies the CRS interrupt source to check. - * This parameter can be one of the following values: - * @arg @ref RCC_CRS_IT_SYNCOK SYNC event OK interrupt - * @arg @ref RCC_CRS_IT_SYNCWARN SYNC warning interrupt - * @arg @ref RCC_CRS_IT_ERR Synchronization or trimming error interrupt - * @arg @ref RCC_CRS_IT_ESYNC Expected SYNC interrupt - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_RCC_CRS_GET_IT_SOURCE(__INTERRUPT__) ((READ_BIT(CRS->CR, (__INTERRUPT__)) != RESET) ? SET : RESET) - -/** @brief Clear the CRS interrupt pending bits - * @param __INTERRUPT__ specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg @ref RCC_CRS_IT_SYNCOK SYNC event OK interrupt - * @arg @ref RCC_CRS_IT_SYNCWARN SYNC warning interrupt - * @arg @ref RCC_CRS_IT_ERR Synchronization or trimming error interrupt - * @arg @ref RCC_CRS_IT_ESYNC Expected SYNC interrupt - * @arg @ref RCC_CRS_IT_TRIMOVF Trimming overflow or underflow interrupt - * @arg @ref RCC_CRS_IT_SYNCERR SYNC error interrupt - * @arg @ref RCC_CRS_IT_SYNCMISS SYNC missed interrupt - */ -/* CRS IT Error Mask */ -#define RCC_CRS_IT_ERROR_MASK (RCC_CRS_IT_TRIMOVF | RCC_CRS_IT_SYNCERR | RCC_CRS_IT_SYNCMISS) - -#define __HAL_RCC_CRS_CLEAR_IT(__INTERRUPT__) do { \ - if(((__INTERRUPT__) & RCC_CRS_IT_ERROR_MASK) != RESET) \ - { \ - WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__INTERRUPT__) & ~RCC_CRS_IT_ERROR_MASK)); \ - } \ - else \ - { \ - WRITE_REG(CRS->ICR, (__INTERRUPT__)); \ - } \ - } while(0) - -/** - * @brief Check whether the specified CRS flag is set or not. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref RCC_CRS_FLAG_SYNCOK SYNC event OK - * @arg @ref RCC_CRS_FLAG_SYNCWARN SYNC warning - * @arg @ref RCC_CRS_FLAG_ERR Error - * @arg @ref RCC_CRS_FLAG_ESYNC Expected SYNC - * @arg @ref RCC_CRS_FLAG_TRIMOVF Trimming overflow or underflow - * @arg @ref RCC_CRS_FLAG_SYNCERR SYNC error - * @arg @ref RCC_CRS_FLAG_SYNCMISS SYNC missed - * @retval The new state of _FLAG_ (TRUE or FALSE). - */ -#define __HAL_RCC_CRS_GET_FLAG(__FLAG__) (READ_BIT(CRS->ISR, (__FLAG__)) == (__FLAG__)) - -/** - * @brief Clear the CRS specified FLAG. - * @param __FLAG__ specifies the flag to clear. - * This parameter can be one of the following values: - * @arg @ref RCC_CRS_FLAG_SYNCOK SYNC event OK - * @arg @ref RCC_CRS_FLAG_SYNCWARN SYNC warning - * @arg @ref RCC_CRS_FLAG_ERR Error - * @arg @ref RCC_CRS_FLAG_ESYNC Expected SYNC - * @arg @ref RCC_CRS_FLAG_TRIMOVF Trimming overflow or underflow - * @arg @ref RCC_CRS_FLAG_SYNCERR SYNC error - * @arg @ref RCC_CRS_FLAG_SYNCMISS SYNC missed - * @note RCC_CRS_FLAG_ERR clears RCC_CRS_FLAG_TRIMOVF, RCC_CRS_FLAG_SYNCERR, RCC_CRS_FLAG_SYNCMISS and consequently RCC_CRS_FLAG_ERR - * @retval None - */ - -/* CRS Flag Error Mask */ -#define RCC_CRS_FLAG_ERROR_MASK (RCC_CRS_FLAG_TRIMOVF | RCC_CRS_FLAG_SYNCERR | RCC_CRS_FLAG_SYNCMISS) - -#define __HAL_RCC_CRS_CLEAR_FLAG(__FLAG__) do { \ - if(((__FLAG__) & RCC_CRS_FLAG_ERROR_MASK) != RESET) \ - { \ - WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__FLAG__) & ~RCC_CRS_FLAG_ERROR_MASK)); \ - } \ - else \ - { \ - WRITE_REG(CRS->ICR, (__FLAG__)); \ - } \ - } while(0) - -#endif /* CRS */ - -/** - * @} - */ - -#if defined(CRS) - -/** @defgroup RCCEx_CRS_Extended_Features RCCEx CRS Extended Features - * @{ - */ -/** - * @brief Enable the oscillator clock for frequency error counter. - * @note when the CEN bit is set the CRS_CFGR register becomes write-protected. - * @retval None - */ -#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE() SET_BIT(CRS->CR, CRS_CR_CEN) - -/** - * @brief Disable the oscillator clock for frequency error counter. - * @retval None - */ -#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE() CLEAR_BIT(CRS->CR, CRS_CR_CEN) - -/** - * @brief Enable the automatic hardware adjustement of TRIM bits. - * @note When the AUTOTRIMEN bit is set the CRS_CFGR register becomes write-protected. - * @retval None - */ -#define __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE() SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) - -/** - * @brief Enable or disable the automatic hardware adjustement of TRIM bits. - * @retval None - */ -#define __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE() CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) - -/** - * @brief Macro to calculate reload value to be set in CRS register according to target and sync frequencies - * @note The RELOAD value should be selected according to the ratio between the target frequency and the frequency - * of the synchronization source after prescaling. It is then decreased by one in order to - * reach the expected synchronization on the zero value. The formula is the following: - * RELOAD = (fTARGET / fSYNC) -1 - * @param __FTARGET__ Target frequency (value in Hz) - * @param __FSYNC__ Synchronization signal frequency (value in Hz) - * @retval None - */ -#define __HAL_RCC_CRS_RELOADVALUE_CALCULATE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U) - -/** - * @} - */ - -#endif /* CRS */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup RCCEx_Exported_Functions - * @{ - */ - -/** @addtogroup RCCEx_Exported_Functions_Group1 - * @{ - */ - -HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit); -void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit); -uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk); - -/** - * @} - */ - -/** @addtogroup RCCEx_Exported_Functions_Group2 - * @{ - */ - -HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI1(RCC_PLLSAI1InitTypeDef *PLLSAI1Init); -HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI1(void); - -#if defined(RCC_PLLSAI2_SUPPORT) - -HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI2(RCC_PLLSAI2InitTypeDef *PLLSAI2Init); -HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI2(void); - -#endif /* RCC_PLLSAI2_SUPPORT */ - -void HAL_RCCEx_WakeUpStopCLKConfig(uint32_t WakeUpClk); -void HAL_RCCEx_StandbyMSIRangeConfig(uint32_t MSIRange); -void HAL_RCCEx_EnableLSECSS(void); -void HAL_RCCEx_DisableLSECSS(void); -void HAL_RCCEx_EnableLSECSS_IT(void); -void HAL_RCCEx_LSECSS_IRQHandler(void); -void HAL_RCCEx_LSECSS_Callback(void); -void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource); -void HAL_RCCEx_DisableLSCO(void); -void HAL_RCCEx_EnableMSIPLLMode(void); -void HAL_RCCEx_DisableMSIPLLMode(void); - -/** - * @} - */ - -#if defined(CRS) - -/** @addtogroup RCCEx_Exported_Functions_Group3 - * @{ - */ - -void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit); -void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void); -void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo); -uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout); -void HAL_RCCEx_CRS_IRQHandler(void); -void HAL_RCCEx_CRS_SyncOkCallback(void); -void HAL_RCCEx_CRS_SyncWarnCallback(void); -void HAL_RCCEx_CRS_ExpectedSyncCallback(void); -void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error); - -/** - * @} - */ - -#endif /* CRS */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup RCCEx_Private_Macros - * @{ - */ - -#define IS_RCC_LSCOSOURCE(__SOURCE__) (((__SOURCE__) == RCC_LSCOSOURCE_LSI) || \ - ((__SOURCE__) == RCC_LSCOSOURCE_LSE)) - -#if defined(STM32L431xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L432xx) || defined(STM32L442xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG)) - -#elif defined(STM32L433xx) || defined(STM32L443xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L451xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L452xx) || defined(STM32L462xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L471xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L496xx) || defined(STM32L4A6xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#elif defined(STM32L4R5xx) || defined(STM32L4S5xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1AUDIO) == RCC_PERIPHCLK_DFSDM1AUDIO) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_OSPI) == RCC_PERIPHCLK_OSPI)) - -#elif defined(STM32L4R7xx) || defined(STM32L4S7xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1AUDIO) == RCC_PERIPHCLK_DFSDM1AUDIO) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_OSPI) == RCC_PERIPHCLK_OSPI) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC)) - -#elif defined(STM32L4R9xx) || defined(STM32L4S9xx) - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1AUDIO) == RCC_PERIPHCLK_DFSDM1AUDIO) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_OSPI) == RCC_PERIPHCLK_OSPI) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DSI) == RCC_PERIPHCLK_DSI)) - -#else - -#define IS_RCC_PERIPHCLOCK(__SELECTION__) \ - ((((__SELECTION__) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) || \ - (((__SELECTION__) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) || \ - (((__SELECTION__) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) || \ - (((__SELECTION__) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) || \ - (((__SELECTION__) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) || \ - (((__SELECTION__) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1)) - -#endif /* STM32L431xx */ - -#define IS_RCC_USART1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_USART1CLKSOURCE_PCLK2) || \ - ((__SOURCE__) == RCC_USART1CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_USART1CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_USART1CLKSOURCE_HSI)) - -#define IS_RCC_USART2CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_USART2CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_USART2CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_USART2CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_USART2CLKSOURCE_HSI)) - -#if defined(USART3) - -#define IS_RCC_USART3CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_USART3CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_USART3CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_USART3CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_USART3CLKSOURCE_HSI)) - -#endif /* USART3 */ - -#if defined(UART4) - -#define IS_RCC_UART4CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_UART4CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_UART4CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_UART4CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_UART4CLKSOURCE_HSI)) - -#endif /* UART4 */ - -#if defined(UART5) - -#define IS_RCC_UART5CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_UART5CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_UART5CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_UART5CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_UART5CLKSOURCE_HSI)) - -#endif /* UART5 */ - -#define IS_RCC_LPUART1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_LPUART1CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_LPUART1CLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_LPUART1CLKSOURCE_LSE) || \ - ((__SOURCE__) == RCC_LPUART1CLKSOURCE_HSI)) - -#define IS_RCC_I2C1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_I2C1CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_I2C1CLKSOURCE_SYSCLK)|| \ - ((__SOURCE__) == RCC_I2C1CLKSOURCE_HSI)) - -#if defined(I2C2) - -#define IS_RCC_I2C2CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_I2C2CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_I2C2CLKSOURCE_SYSCLK)|| \ - ((__SOURCE__) == RCC_I2C2CLKSOURCE_HSI)) - -#endif /* I2C2 */ - -#define IS_RCC_I2C3CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_I2C3CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_I2C3CLKSOURCE_SYSCLK)|| \ - ((__SOURCE__) == RCC_I2C3CLKSOURCE_HSI)) - -#if defined(I2C4) - -#define IS_RCC_I2C4CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_I2C4CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_I2C4CLKSOURCE_SYSCLK)|| \ - ((__SOURCE__) == RCC_I2C4CLKSOURCE_HSI)) - -#endif /* I2C4 */ - -#if defined(RCC_PLLSAI2_SUPPORT) - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define IS_RCC_SAI1CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_SAI1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PLLSAI2) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PIN) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_HSI)) -#else -#define IS_RCC_SAI1CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_SAI1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PLLSAI2) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PIN)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#else - -#define IS_RCC_SAI1CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_SAI1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SAI1CLKSOURCE_PIN)) - -#endif /* RCC_PLLSAI2_SUPPORT */ - -#if defined(RCC_PLLSAI2_SUPPORT) - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -#define IS_RCC_SAI2CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_SAI2CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PLLSAI2) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PIN) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_HSI)) -#else -#define IS_RCC_SAI2CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_SAI2CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PLLSAI2) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SAI2CLKSOURCE_PIN)) -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* RCC_PLLSAI2_SUPPORT */ - -#define IS_RCC_LPTIM1CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_LPTIM1CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_LPTIM1CLKSOURCE_LSI) || \ - ((__SOURCE__) == RCC_LPTIM1CLKSOURCE_HSI) || \ - ((__SOURCE__) == RCC_LPTIM1CLKSOURCE_LSE)) - -#define IS_RCC_LPTIM2CLK(__SOURCE__) \ - (((__SOURCE__) == RCC_LPTIM2CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_LPTIM2CLKSOURCE_LSI) || \ - ((__SOURCE__) == RCC_LPTIM2CLKSOURCE_HSI) || \ - ((__SOURCE__) == RCC_LPTIM2CLKSOURCE_LSE)) - -#if defined(SDMMC1) -#if defined(RCC_HSI48_SUPPORT) && defined(RCC_CCIPR2_SDMMCSEL) - -#define IS_RCC_SDMMC1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLLP) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_HSI48) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_MSI)) - -#elif defined(RCC_HSI48_SUPPORT) - -#define IS_RCC_SDMMC1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_SDMMC1CLKSOURCE_HSI48) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_MSI)) -#else - -#define IS_RCC_SDMMC1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_SDMMC1CLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_SDMMC1CLKSOURCE_MSI)) - -#endif /* RCC_HSI48_SUPPORT */ -#endif /* SDMMC1 */ - -#if defined(RCC_HSI48_SUPPORT) - -#define IS_RCC_RNGCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_RNGCLKSOURCE_HSI48) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_MSI)) - -#else - -#define IS_RCC_RNGCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_RNGCLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_RNGCLKSOURCE_MSI)) - -#endif /* RCC_HSI48_SUPPORT */ - -#if defined(USB_OTG_FS) || defined(USB) -#if defined(RCC_HSI48_SUPPORT) - -#define IS_RCC_USBCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_USBCLKSOURCE_HSI48) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_MSI)) - -#else - -#define IS_RCC_USBCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_USBCLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_PLL) || \ - ((__SOURCE__) == RCC_USBCLKSOURCE_MSI)) - -#endif /* RCC_HSI48_SUPPORT */ -#endif /* USB_OTG_FS || USB */ - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) - -#define IS_RCC_ADCCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_ADCCLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_ADCCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_ADCCLKSOURCE_PLLSAI2) || \ - ((__SOURCE__) == RCC_ADCCLKSOURCE_SYSCLK)) - -#else - -#define IS_RCC_ADCCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_ADCCLKSOURCE_NONE) || \ - ((__SOURCE__) == RCC_ADCCLKSOURCE_PLLSAI1) || \ - ((__SOURCE__) == RCC_ADCCLKSOURCE_SYSCLK)) - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ - -#if defined(SWPMI1) - -#define IS_RCC_SWPMI1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_SWPMI1CLKSOURCE_PCLK1) || \ - ((__SOURCE__) == RCC_SWPMI1CLKSOURCE_HSI)) - -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) - -#define IS_RCC_DFSDM1CLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_DFSDM1CLKSOURCE_PCLK2) || \ - ((__SOURCE__) == RCC_DFSDM1CLKSOURCE_SYSCLK)) - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -#define IS_RCC_DFSDM1AUDIOCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_DFSDM1AUDIOCLKSOURCE_SAI1) || \ - ((__SOURCE__) == RCC_DFSDM1AUDIOCLKSOURCE_HSI) || \ - ((__SOURCE__) == RCC_DFSDM1AUDIOCLKSOURCE_MSI)) - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) - -#define IS_RCC_LTDCCLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_LTDCCLKSOURCE_PLLSAI2_DIV2) || \ - ((__SOURCE__) == RCC_LTDCCLKSOURCE_PLLSAI2_DIV4) || \ - ((__SOURCE__) == RCC_LTDCCLKSOURCE_PLLSAI2_DIV8) || \ - ((__SOURCE__) == RCC_LTDCCLKSOURCE_PLLSAI2_DIV16)) - -#endif /* LTDC */ - -#if defined(DSI) - -#define IS_RCC_DSICLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_DSICLKSOURCE_DSIPHY) || \ - ((__SOURCE__) == RCC_DSICLKSOURCE_PLLSAI2)) - -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - -#define IS_RCC_OSPICLKSOURCE(__SOURCE__) \ - (((__SOURCE__) == RCC_OSPICLKSOURCE_SYSCLK) || \ - ((__SOURCE__) == RCC_OSPICLKSOURCE_MSI) || \ - ((__SOURCE__) == RCC_OSPICLKSOURCE_PLL)) - -#endif /* OCTOSPI1 || OCTOSPI2 */ - -#define IS_RCC_PLLSAI1SOURCE(__VALUE__) IS_RCC_PLLSOURCE(__VALUE__) - -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) -#define IS_RCC_PLLSAI1M_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 16U)) -#else -#define IS_RCC_PLLSAI1M_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 8U)) -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - -#define IS_RCC_PLLSAI1N_VALUE(__VALUE__) ((8U <= (__VALUE__)) && ((__VALUE__) <= 86U)) - -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) -#define IS_RCC_PLLSAI1P_VALUE(__VALUE__) (((__VALUE__) >= 2U) && ((__VALUE__) <= 31U)) -#else -#define IS_RCC_PLLSAI1P_VALUE(__VALUE__) (((__VALUE__) == 7U) || ((__VALUE__) == 17U)) -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -#define IS_RCC_PLLSAI1Q_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) - -#define IS_RCC_PLLSAI1R_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) - -#if defined(RCC_PLLSAI2_SUPPORT) - -#define IS_RCC_PLLSAI2SOURCE(__VALUE__) IS_RCC_PLLSOURCE(__VALUE__) - -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) -#define IS_RCC_PLLSAI2M_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 16U)) -#else -#define IS_RCC_PLLSAI2M_VALUE(__VALUE__) ((1U <= (__VALUE__)) && ((__VALUE__) <= 8U)) -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - -#define IS_RCC_PLLSAI2N_VALUE(__VALUE__) ((8U <= (__VALUE__)) && ((__VALUE__) <= 86U)) - -#if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) -#define IS_RCC_PLLSAI2P_VALUE(__VALUE__) (((__VALUE__) >= 2U) && ((__VALUE__) <= 31U)) -#else -#define IS_RCC_PLLSAI2P_VALUE(__VALUE__) (((__VALUE__) == 7U) || ((__VALUE__) == 17U)) -#endif /* RCC_PLLSAI2P_DIV_2_31_SUPPORT */ - -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) -#define IS_RCC_PLLSAI2Q_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ - -#define IS_RCC_PLLSAI2R_VALUE(__VALUE__) (((__VALUE__) == 2U) || ((__VALUE__) == 4U) || \ - ((__VALUE__) == 6U) || ((__VALUE__) == 8U)) - -#endif /* RCC_PLLSAI2_SUPPORT */ - -#if defined(CRS) - -#define IS_RCC_CRS_SYNC_SOURCE(__SOURCE__) (((__SOURCE__) == RCC_CRS_SYNC_SOURCE_GPIO) || \ - ((__SOURCE__) == RCC_CRS_SYNC_SOURCE_LSE) || \ - ((__SOURCE__) == RCC_CRS_SYNC_SOURCE_USB)) - -#define IS_RCC_CRS_SYNC_DIV(__DIV__) (((__DIV__) == RCC_CRS_SYNC_DIV1) || ((__DIV__) == RCC_CRS_SYNC_DIV2) || \ - ((__DIV__) == RCC_CRS_SYNC_DIV4) || ((__DIV__) == RCC_CRS_SYNC_DIV8) || \ - ((__DIV__) == RCC_CRS_SYNC_DIV16) || ((__DIV__) == RCC_CRS_SYNC_DIV32) || \ - ((__DIV__) == RCC_CRS_SYNC_DIV64) || ((__DIV__) == RCC_CRS_SYNC_DIV128)) - -#define IS_RCC_CRS_SYNC_POLARITY(__POLARITY__) (((__POLARITY__) == RCC_CRS_SYNC_POLARITY_RISING) || \ - ((__POLARITY__) == RCC_CRS_SYNC_POLARITY_FALLING)) - -#define IS_RCC_CRS_RELOADVALUE(__VALUE__) (((__VALUE__) <= 0xFFFFU)) - -#define IS_RCC_CRS_ERRORLIMIT(__VALUE__) (((__VALUE__) <= 0xFFU)) - -#define IS_RCC_CRS_HSI48CALIBRATION(__VALUE__) (((__VALUE__) <= 0x3FU)) - -#define IS_RCC_CRS_FREQERRORDIR(__DIR__) (((__DIR__) == RCC_CRS_FREQERRORDIR_UP) || \ - ((__DIR__) == RCC_CRS_FREQERRORDIR_DOWN)) - -#endif /* CRS */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RCC_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rng.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rng.h deleted file mode 100644 index 6939084d..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rng.h +++ /dev/null @@ -1,325 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rng.h - * @author MCD Application Team - * @brief Header file of RNG HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RNG_H -#define __STM32L4xx_HAL_RNG_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RNG - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup RNG_Exported_Types RNG Exported Types - * @{ - */ - -#if defined(RNG_CR_CED) -/** - * @brief RNG Configuration Structure definition - */ -typedef struct -{ - uint32_t ClockErrorDetection; /*!< Clock error detection */ -}RNG_InitTypeDef; -#endif /* defined(RNG_CR_CED) */ - -/** - * @brief RNG HAL State Structure definition - */ -typedef enum -{ - HAL_RNG_STATE_RESET = 0x00, /*!< RNG not yet initialized or disabled */ - HAL_RNG_STATE_READY = 0x01, /*!< RNG initialized and ready for use */ - HAL_RNG_STATE_BUSY = 0x02, /*!< RNG internal process is ongoing */ - HAL_RNG_STATE_TIMEOUT = 0x03, /*!< RNG timeout state */ - HAL_RNG_STATE_ERROR = 0x04 /*!< RNG error state */ - -}HAL_RNG_StateTypeDef; - -/** - * @brief RNG Handle Structure definition - */ -typedef struct -{ - RNG_TypeDef *Instance; /*!< Register base address */ - -#if defined(RNG_CR_CED) - RNG_InitTypeDef Init; /*!< RNG configuration parameters */ -#endif /* defined(RNG_CR_CED) */ - - HAL_LockTypeDef Lock; /*!< RNG locking object */ - - __IO HAL_RNG_StateTypeDef State; /*!< RNG communication state */ - - uint32_t RandomNumber; /*!< Last Generated RNG Data */ - -}RNG_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RNG_Exported_Constants RNG Exported Constants - * @{ - */ - -/** @defgroup RNG_Interrupt_definition RNG Interrupts Definition - * @{ - */ -#define RNG_IT_DRDY RNG_SR_DRDY /*!< Data Ready interrupt */ -#define RNG_IT_CEI RNG_SR_CEIS /*!< Clock error interrupt */ -#define RNG_IT_SEI RNG_SR_SEIS /*!< Seed error interrupt */ -/** - * @} - */ - -/** @defgroup RNG_Flag_definition RNG Flags Definition - * @{ - */ -#define RNG_FLAG_DRDY RNG_SR_DRDY /*!< Data ready */ -#define RNG_FLAG_CECS RNG_SR_CECS /*!< Clock error current status */ -#define RNG_FLAG_SECS RNG_SR_SECS /*!< Seed error current status */ -/** - * @} - */ - -#if defined(RNG_CR_CED) -/** @defgroup RNG_Clock_Error_Detection RNG Clock Error Detection - * @{ - */ -#define RNG_CED_ENABLE ((uint32_t)0x00000000) /*!< Clock error detection enabled */ -#define RNG_CED_DISABLE RNG_CR_CED /*!< Clock error detection disabled */ -/** - * @} - */ -#endif /* defined(RNG_CR_CED) */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup RNG_Exported_Macros RNG Exported Macros - * @{ - */ - -/** @brief Reset RNG handle state. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET) - -/** - * @brief Enable the RNG peripheral. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_RNGEN) - -/** - * @brief Disable the RNG peripheral. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_RNGEN) - -/** - * @brief Check whether the specified RNG flag is set or not. - * @param __HANDLE__: RNG Handle - * @param __FLAG__: RNG flag - * This parameter can be one of the following values: - * @arg RNG_FLAG_DRDY: Data ready - * @arg RNG_FLAG_CECS: Clock error current status - * @arg RNG_FLAG_SECS: Seed error current status - * @retval The new state of __FLAG__ (SET or RESET). - */ -#define __HAL_RNG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) - - -/** - * @brief Clear the selected RNG flag status. - * @param __HANDLE__: RNG handle - * @param __FLAG__: RNG flag to clear - * @note WARNING: This is a dummy macro for HAL code alignment, - * flags RNG_FLAG_DRDY, RNG_FLAG_CECS and RNG_FLAG_SECS are read-only. - * @retval None - */ -#define __HAL_RNG_CLEAR_FLAG(__HANDLE__, __FLAG__) /* dummy macro */ - - - -/** - * @brief Enable the RNG interrupt. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_ENABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_IE) - -/** - * @brief Disable the RNG interrupt. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_DISABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_IE) - -/** - * @brief Check whether the specified RNG interrupt has occurred or not. - * @param __HANDLE__: RNG Handle - * @param __INTERRUPT__: specifies the RNG interrupt status flag to check. - * This parameter can be one of the following values: - * @arg RNG_IT_DRDY: Data ready interrupt - * @arg RNG_IT_CEI: Clock error interrupt - * @arg RNG_IT_SEI: Seed error interrupt - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_RNG_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__)) - -/** - * @brief Clear the RNG interrupt status flags. - * @param __HANDLE__: RNG Handle - * @param __INTERRUPT__: specifies the RNG interrupt status flag to clear. - * This parameter can be one of the following values: - * @arg RNG_IT_CEI: Clock error interrupt - * @arg RNG_IT_SEI: Seed error interrupt - * @note RNG_IT_DRDY flag is read-only, reading RNG_DR register automatically clears RNG_IT_DRDY. - * @retval None - */ -#define __HAL_RNG_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR) = ~(__INTERRUPT__)) - -/** - * @} - */ - - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup RNG_Exported_Functions RNG Exported Functions - * @{ - */ - -/* Initialization and de-initialization functions ******************************/ -/** @defgroup RNG_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng); -HAL_StatusTypeDef HAL_RNG_DeInit (RNG_HandleTypeDef *hrng); -void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng); -void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng); -/** - * @} - */ - -/* Peripheral Control functions ************************************************/ -/** @defgroup RNG_Exported_Functions_Group2 Peripheral Control functions - * @{ - */ -uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber() instead */ -uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */ - -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit); -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng); -uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng); - -void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng); -void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng); -void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef* hrng, uint32_t random32bit); -/** - * @} - */ - -/* Peripheral State functions **************************************************/ -/** @defgroup RNG_Exported_Functions_Group3 Peripheral State functions - * @{ - */ -HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng); -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup RNG_Private_Macros RNG Private Macros - * @{ - */ - -#if defined(RNG_CR_CED) -/** - * @brief Verify the RNG Clock Error Detection mode. - * @param __MODE__: RNG Clock Error Detection mode - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_RNG_CED(__MODE__) (((__MODE__) == RNG_CED_ENABLE) || \ - ((__MODE__) == RNG_CED_DISABLE)) -#endif /* defined(RNG_CR_CED) */ - -/** - * @} - */ -/* Private functions prototypes ----------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RNG_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h deleted file mode 100644 index 5d6ce906..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc.h +++ /dev/null @@ -1,861 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rtc.h - * @author MCD Application Team - * @brief Header file of RTC HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RTC_H -#define __STM32L4xx_HAL_RTC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RTC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup RTC_Exported_Types RTC Exported Types - * @{ - */ -/** - * @brief HAL State structures definition - */ -typedef enum -{ - HAL_RTC_STATE_RESET = 0x00, /*!< RTC not yet initialized or disabled */ - HAL_RTC_STATE_READY = 0x01, /*!< RTC initialized and ready for use */ - HAL_RTC_STATE_BUSY = 0x02, /*!< RTC process is ongoing */ - HAL_RTC_STATE_TIMEOUT = 0x03, /*!< RTC timeout state */ - HAL_RTC_STATE_ERROR = 0x04 /*!< RTC error state */ - -}HAL_RTCStateTypeDef; - -/** - * @brief RTC Configuration Structure definition - */ -typedef struct -{ - uint32_t HourFormat; /*!< Specifies the RTC Hour Format. - This parameter can be a value of @ref RTC_Hour_Formats */ - - uint32_t AsynchPrediv; /*!< Specifies the RTC Asynchronous Predivider value. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7F */ - - uint32_t SynchPrediv; /*!< Specifies the RTC Synchronous Predivider value. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x7FFF */ - - uint32_t OutPut; /*!< Specifies which signal will be routed to the RTC output. - This parameter can be a value of @ref RTCEx_Output_selection_Definitions */ - - uint32_t OutPutRemap; /*!< Specifies the remap for RTC output. - This parameter can be a value of @ref RTC_Output_ALARM_OUT_Remap */ - - uint32_t OutPutPolarity; /*!< Specifies the polarity of the output signal. - This parameter can be a value of @ref RTC_Output_Polarity_Definitions */ - - uint32_t OutPutType; /*!< Specifies the RTC Output Pin mode. - This parameter can be a value of @ref RTC_Output_Type_ALARM_OUT */ -}RTC_InitTypeDef; - -/** - * @brief RTC Time structure definition - */ -typedef struct -{ - uint8_t Hours; /*!< Specifies the RTC Time Hour. - This parameter must be a number between Min_Data = 0 and Max_Data = 12 if the RTC_HourFormat_12 is selected. - This parameter must be a number between Min_Data = 0 and Max_Data = 23 if the RTC_HourFormat_24 is selected */ - - uint8_t Minutes; /*!< Specifies the RTC Time Minutes. - This parameter must be a number between Min_Data = 0 and Max_Data = 59 */ - - uint8_t Seconds; /*!< Specifies the RTC Time Seconds. - This parameter must be a number between Min_Data = 0 and Max_Data = 59 */ - - uint8_t TimeFormat; /*!< Specifies the RTC AM/PM Time. - This parameter can be a value of @ref RTC_AM_PM_Definitions */ - - uint32_t SubSeconds; /*!< Specifies the RTC_SSR RTC Sub Second register content. - This parameter corresponds to a time unit range between [0-1] Second - with [1 Sec / SecondFraction +1] granularity */ - - uint32_t SecondFraction; /*!< Specifies the range or granularity of Sub Second register content - corresponding to Synchronous pre-scaler factor value (PREDIV_S) - This parameter corresponds to a time unit range between [0-1] Second - with [1 Sec / SecondFraction +1] granularity. - This field will be used only by HAL_RTC_GetTime function */ - - uint32_t DayLightSaving; /*!< Specifies RTC_DayLightSaveOperation: the value of hour adjustment. - This parameter can be a value of @ref RTC_DayLightSaving_Definitions */ - - uint32_t StoreOperation; /*!< Specifies RTC_StoreOperation value to be written in the BCK bit - in CR register to store the operation. - This parameter can be a value of @ref RTC_StoreOperation_Definitions */ -}RTC_TimeTypeDef; - -/** - * @brief RTC Date structure definition - */ -typedef struct -{ - uint8_t WeekDay; /*!< Specifies the RTC Date WeekDay. - This parameter can be a value of @ref RTC_WeekDay_Definitions */ - - uint8_t Month; /*!< Specifies the RTC Date Month (in BCD format). - This parameter can be a value of @ref RTC_Month_Date_Definitions */ - - uint8_t Date; /*!< Specifies the RTC Date. - This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ - - uint8_t Year; /*!< Specifies the RTC Date Year. - This parameter must be a number between Min_Data = 0 and Max_Data = 99 */ - -}RTC_DateTypeDef; - -/** - * @brief RTC Alarm structure definition - */ -typedef struct -{ - RTC_TimeTypeDef AlarmTime; /*!< Specifies the RTC Alarm Time members */ - - uint32_t AlarmMask; /*!< Specifies the RTC Alarm Masks. - This parameter can be a value of @ref RTC_AlarmMask_Definitions */ - - uint32_t AlarmSubSecondMask; /*!< Specifies the RTC Alarm SubSeconds Masks. - This parameter can be a value of @ref RTC_Alarm_Sub_Seconds_Masks_Definitions */ - - uint32_t AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay. - This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */ - - uint8_t AlarmDateWeekDay; /*!< Specifies the RTC Alarm Date/WeekDay. - If the Alarm Date is selected, this parameter must be set to a value in the 1-31 range. - If the Alarm WeekDay is selected, this parameter can be a value of @ref RTC_WeekDay_Definitions */ - - uint32_t Alarm; /*!< Specifies the alarm . - This parameter can be a value of @ref RTC_Alarms_Definitions */ -}RTC_AlarmTypeDef; - -/** - * @brief Time Handle Structure definition - */ -typedef struct -{ - RTC_TypeDef *Instance; /*!< Register base address */ - - RTC_InitTypeDef Init; /*!< RTC required parameters */ - - HAL_LockTypeDef Lock; /*!< RTC locking object */ - - __IO HAL_RTCStateTypeDef State; /*!< Time communication state */ - -}RTC_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RTC_Exported_Constants RTC Exported Constants - * @{ - */ - -/** @defgroup RTC_Hour_Formats RTC Hour Formats - * @{ - */ -#define RTC_HOURFORMAT_24 ((uint32_t)0x00000000) -#define RTC_HOURFORMAT_12 ((uint32_t)0x00000040) -/** - * @} - */ - -/** @defgroup RTC_Output_Polarity_Definitions RTC Output Polarity Definitions - * @{ - */ -#define RTC_OUTPUT_POLARITY_HIGH ((uint32_t)0x00000000) -#define RTC_OUTPUT_POLARITY_LOW ((uint32_t)0x00100000) -/** - * @} - */ - -/** @defgroup RTC_Output_Type_ALARM_OUT RTC Output Type ALARM OUT - * @{ - */ -#define RTC_OUTPUT_TYPE_OPENDRAIN ((uint32_t)0x00000000) -#define RTC_OUTPUT_TYPE_PUSHPULL ((uint32_t)RTC_OR_ALARMOUTTYPE) -/** - * @} - */ - -/** @defgroup RTC_Output_ALARM_OUT_Remap RTC Output ALARM OUT Remap - * @{ - */ -#define RTC_OUTPUT_REMAP_NONE ((uint32_t)0x00000000) -#define RTC_OUTPUT_REMAP_POS1 ((uint32_t)RTC_OR_OUT_RMP) -/** - * @} - */ - -/** @defgroup RTC_AM_PM_Definitions RTC AM PM Definitions - * @{ - */ -#define RTC_HOURFORMAT12_AM ((uint8_t)0x00) -#define RTC_HOURFORMAT12_PM ((uint8_t)0x40) -/** - * @} - */ - -/** @defgroup RTC_DayLightSaving_Definitions RTC DayLight Saving Definitions - * @{ - */ -#define RTC_DAYLIGHTSAVING_SUB1H ((uint32_t)0x00020000) -#define RTC_DAYLIGHTSAVING_ADD1H ((uint32_t)0x00010000) -#define RTC_DAYLIGHTSAVING_NONE ((uint32_t)0x00000000) -/** - * @} - */ - -/** @defgroup RTC_StoreOperation_Definitions RTC Store Operation Definitions - * @{ - */ -#define RTC_STOREOPERATION_RESET ((uint32_t)0x00000000) -#define RTC_STOREOPERATION_SET ((uint32_t)0x00040000) -/** - * @} - */ - -/** @defgroup RTC_Input_parameter_format_definitions RTC Input Parameter Format Definitions - * @{ - */ -#define RTC_FORMAT_BIN ((uint32_t)0x00000000) -#define RTC_FORMAT_BCD ((uint32_t)0x00000001) -/** - * @} - */ - -/** @defgroup RTC_Month_Date_Definitions RTC Month Date Definitions - * @{ - */ - -/* Coded in BCD format */ -#define RTC_MONTH_JANUARY ((uint8_t)0x01) -#define RTC_MONTH_FEBRUARY ((uint8_t)0x02) -#define RTC_MONTH_MARCH ((uint8_t)0x03) -#define RTC_MONTH_APRIL ((uint8_t)0x04) -#define RTC_MONTH_MAY ((uint8_t)0x05) -#define RTC_MONTH_JUNE ((uint8_t)0x06) -#define RTC_MONTH_JULY ((uint8_t)0x07) -#define RTC_MONTH_AUGUST ((uint8_t)0x08) -#define RTC_MONTH_SEPTEMBER ((uint8_t)0x09) -#define RTC_MONTH_OCTOBER ((uint8_t)0x10) -#define RTC_MONTH_NOVEMBER ((uint8_t)0x11) -#define RTC_MONTH_DECEMBER ((uint8_t)0x12) -/** - * @} - */ - -/** @defgroup RTC_WeekDay_Definitions RTC WeekDay Definitions - * @{ - */ -#define RTC_WEEKDAY_MONDAY ((uint8_t)0x01) -#define RTC_WEEKDAY_TUESDAY ((uint8_t)0x02) -#define RTC_WEEKDAY_WEDNESDAY ((uint8_t)0x03) -#define RTC_WEEKDAY_THURSDAY ((uint8_t)0x04) -#define RTC_WEEKDAY_FRIDAY ((uint8_t)0x05) -#define RTC_WEEKDAY_SATURDAY ((uint8_t)0x06) -#define RTC_WEEKDAY_SUNDAY ((uint8_t)0x07) -/** - * @} - */ - -/** @defgroup RTC_AlarmDateWeekDay_Definitions RTC Alarm Date WeekDay Definitions - * @{ - */ -#define RTC_ALARMDATEWEEKDAYSEL_DATE ((uint32_t)0x00000000) -#define RTC_ALARMDATEWEEKDAYSEL_WEEKDAY ((uint32_t)0x40000000) -/** - * @} - */ - - -/** @defgroup RTC_AlarmMask_Definitions RTC Alarm Mask Definitions - * @{ - */ -#define RTC_ALARMMASK_NONE ((uint32_t)0x00000000) -#define RTC_ALARMMASK_DATEWEEKDAY RTC_ALRMAR_MSK4 -#define RTC_ALARMMASK_HOURS RTC_ALRMAR_MSK3 -#define RTC_ALARMMASK_MINUTES RTC_ALRMAR_MSK2 -#define RTC_ALARMMASK_SECONDS RTC_ALRMAR_MSK1 -#define RTC_ALARMMASK_ALL ((uint32_t)0x80808080) -/** - * @} - */ - -/** @defgroup RTC_Alarms_Definitions RTC Alarms Definitions - * @{ - */ -#define RTC_ALARM_A RTC_CR_ALRAE -#define RTC_ALARM_B RTC_CR_ALRBE -/** - * @} - */ - -/** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions RTC Alarm Sub Seconds Masks Definitions - * @{ - */ -#define RTC_ALARMSUBSECONDMASK_ALL ((uint32_t)0x00000000) /*!< All Alarm SS fields are masked. - There is no comparison on sub seconds - for Alarm */ -#define RTC_ALARMSUBSECONDMASK_SS14_1 ((uint32_t)0x01000000) /*!< SS[14:1] are don't care in Alarm - comparison. Only SS[0] is compared. */ -#define RTC_ALARMSUBSECONDMASK_SS14_2 ((uint32_t)0x02000000) /*!< SS[14:2] are don't care in Alarm - comparison. Only SS[1:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_3 ((uint32_t)0x03000000) /*!< SS[14:3] are don't care in Alarm - comparison. Only SS[2:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_4 ((uint32_t)0x04000000) /*!< SS[14:4] are don't care in Alarm - comparison. Only SS[3:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_5 ((uint32_t)0x05000000) /*!< SS[14:5] are don't care in Alarm - comparison. Only SS[4:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_6 ((uint32_t)0x06000000) /*!< SS[14:6] are don't care in Alarm - comparison. Only SS[5:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_7 ((uint32_t)0x07000000) /*!< SS[14:7] are don't care in Alarm - comparison. Only SS[6:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_8 ((uint32_t)0x08000000) /*!< SS[14:8] are don't care in Alarm - comparison. Only SS[7:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_9 ((uint32_t)0x09000000) /*!< SS[14:9] are don't care in Alarm - comparison. Only SS[8:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_10 ((uint32_t)0x0A000000) /*!< SS[14:10] are don't care in Alarm - comparison. Only SS[9:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_11 ((uint32_t)0x0B000000) /*!< SS[14:11] are don't care in Alarm - comparison. Only SS[10:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_12 ((uint32_t)0x0C000000) /*!< SS[14:12] are don't care in Alarm - comparison. Only SS[11:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14_13 ((uint32_t)0x0D000000) /*!< SS[14:13] are don't care in Alarm - comparison. Only SS[12:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_SS14 ((uint32_t)0x0E000000) /*!< SS[14] is don't care in Alarm - comparison. Only SS[13:0] are compared */ -#define RTC_ALARMSUBSECONDMASK_NONE ((uint32_t)0x0F000000) /*!< SS[14:0] are compared and must match - to activate alarm. */ -/** - * @} - */ - -/** @defgroup RTC_Interrupts_Definitions RTC Interrupts Definitions - * @{ - */ -#define RTC_IT_TS ((uint32_t)RTC_CR_TSIE) /*!< Enable Timestamp Interrupt */ -#define RTC_IT_WUT ((uint32_t)RTC_CR_WUTIE) /*!< Enable Wakeup timer Interrupt */ -#define RTC_IT_ALRA ((uint32_t)RTC_CR_ALRAIE) /*!< Enable Alarm A Interrupt */ -#define RTC_IT_ALRB ((uint32_t)RTC_CR_ALRBIE) /*!< Enable Alarm B Interrupt */ -#define RTC_IT_TAMP ((uint32_t)RTC_TAMPCR_TAMPIE) /*!< Enable all Tamper Interrupt */ -#define RTC_IT_TAMP1 ((uint32_t)RTC_TAMPCR_TAMP1IE) /*!< Enable Tamper 1 Interrupt */ -#define RTC_IT_TAMP2 ((uint32_t)RTC_TAMPCR_TAMP2IE) /*!< Enable Tamper 2 Interrupt */ -#define RTC_IT_TAMP3 ((uint32_t)RTC_TAMPCR_TAMP3IE) /*!< Enable Tamper 3 Interrupt */ -/** - * @} - */ - -/** @defgroup RTC_Flags_Definitions RTC Flags Definitions - * @{ - */ -#define RTC_FLAG_RECALPF ((uint32_t)RTC_ISR_RECALPF) -#define RTC_FLAG_TAMP3F ((uint32_t)RTC_ISR_TAMP3F) -#define RTC_FLAG_TAMP2F ((uint32_t)RTC_ISR_TAMP2F) -#define RTC_FLAG_TAMP1F ((uint32_t)RTC_ISR_TAMP1F) -#define RTC_FLAG_TSOVF ((uint32_t)RTC_ISR_TSOVF) -#define RTC_FLAG_TSF ((uint32_t)RTC_ISR_TSF) -#define RTC_FLAG_ITSF ((uint32_t)RTC_ISR_ITSF) -#define RTC_FLAG_WUTF ((uint32_t)RTC_ISR_WUTF) -#define RTC_FLAG_ALRBF ((uint32_t)RTC_ISR_ALRBF) -#define RTC_FLAG_ALRAF ((uint32_t)RTC_ISR_ALRAF) -#define RTC_FLAG_INITF ((uint32_t)RTC_ISR_INITF) -#define RTC_FLAG_RSF ((uint32_t)RTC_ISR_RSF) -#define RTC_FLAG_INITS ((uint32_t)RTC_ISR_INITS) -#define RTC_FLAG_SHPF ((uint32_t)RTC_ISR_SHPF) -#define RTC_FLAG_WUTWF ((uint32_t)RTC_ISR_WUTWF) -#define RTC_FLAG_ALRBWF ((uint32_t)RTC_ISR_ALRBWF) -#define RTC_FLAG_ALRAWF ((uint32_t)RTC_ISR_ALRAWF) -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup RTC_Exported_Macros RTC Exported Macros - * @{ - */ - -/** @brief Reset RTC handle state. - * @param __HANDLE__: RTC handle. - * @retval None - */ -#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RTC_STATE_RESET) - -/** - * @brief Disable the write protection for RTC registers. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__) \ - do{ \ - (__HANDLE__)->Instance->WPR = 0xCA; \ - (__HANDLE__)->Instance->WPR = 0x53; \ - } while(0) - -/** - * @brief Enable the write protection for RTC registers. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__) \ - do{ \ - (__HANDLE__)->Instance->WPR = 0xFF; \ - } while(0) - - -/** - * @brief Enable the RTC ALARMA peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_ALARMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRAE)) - -/** - * @brief Disable the RTC ALARMA peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_ALARMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRAE)) - -/** - * @brief Enable the RTC ALARMB peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_ALARMB_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRBE)) - -/** - * @brief Disable the RTC ALARMB peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_ALARMB_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRBE)) - -/** - * @brief Enable the RTC Alarm interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_ALRA: Alarm A interrupt - * @arg RTC_IT_ALRB: Alarm B interrupt - * @retval None - */ -#define __HAL_RTC_ALARM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) - -/** - * @brief Disable the RTC Alarm interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_ALRA: Alarm A interrupt - * @arg RTC_IT_ALRB: Alarm B interrupt - * @retval None - */ -#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified RTC Alarm interrupt has occurred or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to check. - * This parameter can be: - * @arg RTC_IT_ALRA: Alarm A interrupt - * @arg RTC_IT_ALRB: Alarm B interrupt - * @retval None - */ -#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR)& ((__INTERRUPT__)>> 4)) != RESET) ? SET : RESET) - -/** - * @brief Get the selected RTC Alarm's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Alarm Flag sources to check. - * This parameter can be: - * @arg RTC_FLAG_ALRAF - * @arg RTC_FLAG_ALRBF - * @arg RTC_FLAG_ALRAWF - * @arg RTC_FLAG_ALRBWF - * @retval None - */ -#define __HAL_RTC_ALARM_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Clear the RTC Alarm's pending flags. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Alarm Flag sources to clear. - * This parameter can be: - * @arg RTC_FLAG_ALRAF - * @arg RTC_FLAG_ALRBF - * @retval None - */ -#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) - -/** - * @brief Check whether the specified RTC Alarm interrupt is enabled or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Alarm interrupt sources to check. - * This parameter can be: - * @arg RTC_IT_ALRA: Alarm A interrupt - * @arg RTC_IT_ALRB: Alarm B interrupt - * @retval None - */ -#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET) - -/** - * @brief Enable interrupt on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_ENABLE_IT() (EXTI->IMR1 |= RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Disable interrupt on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_DISABLE_IT() (EXTI->IMR1 &= ~(RTC_EXTI_LINE_ALARM_EVENT)) - -/** - * @brief Enable event on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_ENABLE_EVENT() (EXTI->EMR1 |= RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Disable event on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_DISABLE_EVENT() (EXTI->EMR1 &= ~(RTC_EXTI_LINE_ALARM_EVENT)) - -/** - * @brief Enable falling edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR1 |= RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Disable falling edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR1 &= ~(RTC_EXTI_LINE_ALARM_EVENT)) - -/** - * @brief Enable rising edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR1 |= RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Disable rising edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR1 &= ~(RTC_EXTI_LINE_ALARM_EVENT)) - -/** - * @brief Enable rising & falling edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_RTC_ALARM_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable rising & falling edge trigger on the RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_ALARM_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_RTC_ALARM_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Check whether the RTC Alarm associated Exti line interrupt flag is set or not. - * @retval Line Status. - */ -#define __HAL_RTC_ALARM_EXTI_GET_FLAG() (EXTI->PR1 & RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Clear the RTC Alarm associated Exti line flag. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() (EXTI->PR1 = RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @brief Generate a Software interrupt on RTC Alarm associated Exti line. - * @retval None - */ -#define __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= RTC_EXTI_LINE_ALARM_EVENT) - -/** - * @} - */ - -/* Include RTC HAL Extended module */ -#include "stm32l4xx_hal_rtc_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup RTC_Exported_Functions - * @{ - */ - -/** @addtogroup RTC_Exported_Functions_Group1 - * @{ - */ -/* Initialization and de-initialization functions ****************************/ -HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc); -void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc); -void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc); -/** - * @} - */ - -/** @addtogroup RTC_Exported_Functions_Group2 - * @{ - */ -/* RTC Time and Date functions ************************************************/ -HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format); -HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format); -HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format); -HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format); -/** - * @} - */ - -/** @addtogroup RTC_Exported_Functions_Group3 - * @{ - */ -/* RTC Alarm functions ********************************************************/ -HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format); -HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format); -HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm); -HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format); -void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc); -/** - * @} - */ - -/** @addtogroup RTC_Exported_Functions_Group4 - * @{ - */ -/* Peripheral Control functions ***********************************************/ -HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc); -/** - * @} - */ - -/** @addtogroup RTC_Exported_Functions_Group5 - * @{ - */ -/* Peripheral State functions *************************************************/ -HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc); - -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** @defgroup RTC_Private_Constants RTC Private Constants - * @{ - */ -/* Masks Definition */ -#define RTC_TR_RESERVED_MASK 0x007F7F7FU -#define RTC_DR_RESERVED_MASK 0x00FFFF3FU -#define RTC_INIT_MASK 0xFFFFFFFFU -#define RTC_RSF_MASK 0xFFFFFF5FU - -#define RTC_TIMEOUT_VALUE 1000 - -#define RTC_EXTI_LINE_ALARM_EVENT ((uint32_t)0x00040000) /*!< External interrupt line 18 Connected to the RTC Alarm event */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup RTC_Private_Macros RTC Private Macros - * @{ - */ - -/** @defgroup RTC_IS_RTC_Definitions RTC Private macros to check input parameters - * @{ - */ - -#define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HOURFORMAT_12) || \ - ((FORMAT) == RTC_HOURFORMAT_24)) - -#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPUT_POLARITY_HIGH) || \ - ((POL) == RTC_OUTPUT_POLARITY_LOW)) - -#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OUTPUT_TYPE_OPENDRAIN) || \ - ((TYPE) == RTC_OUTPUT_TYPE_PUSHPULL)) - -#define IS_RTC_OUTPUT_REMAP(REMAP) (((REMAP) == RTC_OUTPUT_REMAP_NONE) || \ - ((REMAP) == RTC_OUTPUT_REMAP_POS1)) - -#define IS_RTC_HOURFORMAT12(PM) (((PM) == RTC_HOURFORMAT12_AM) || ((PM) == RTC_HOURFORMAT12_PM)) - -#define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DAYLIGHTSAVING_SUB1H) || \ - ((SAVE) == RTC_DAYLIGHTSAVING_ADD1H) || \ - ((SAVE) == RTC_DAYLIGHTSAVING_NONE)) - -#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_STOREOPERATION_RESET) || \ - ((OPERATION) == RTC_STOREOPERATION_SET)) - -#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_FORMAT_BIN) || ((FORMAT) == RTC_FORMAT_BCD)) - -#define IS_RTC_YEAR(YEAR) ((YEAR) <= (uint32_t)99) - -#define IS_RTC_MONTH(MONTH) (((MONTH) >= (uint32_t)1) && ((MONTH) <= (uint32_t)12)) - -#define IS_RTC_DATE(DATE) (((DATE) >= (uint32_t)1) && ((DATE) <= (uint32_t)31)) - -#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_THURSDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_SUNDAY)) - -#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) >(uint32_t) 0) && ((DATE) <= (uint32_t)31)) - -#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_WEEKDAY_MONDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_TUESDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_WEDNESDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_THURSDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_FRIDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_SATURDAY) || \ - ((WEEKDAY) == RTC_WEEKDAY_SUNDAY)) - -#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_ALARMDATEWEEKDAYSEL_DATE) || \ - ((SEL) == RTC_ALARMDATEWEEKDAYSEL_WEEKDAY)) - -#define IS_RTC_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET) - -#define IS_RTC_ALARM(ALARM) (((ALARM) == RTC_ALARM_A) || ((ALARM) == RTC_ALARM_B)) - -#define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= (uint32_t)0x00007FFF) - -#define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_ALARMSUBSECONDMASK_ALL) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_1) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_2) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_3) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_4) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_5) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_6) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_7) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_8) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_9) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_10) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_11) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_12) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14_13) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_SS14) || \ - ((MASK) == RTC_ALARMSUBSECONDMASK_NONE)) - -#define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= (uint32_t)0x7F) - -#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= (uint32_t)0x7FFF) - -#define IS_RTC_HOUR12(HOUR) (((HOUR) > (uint32_t)0) && ((HOUR) <= (uint32_t)12)) - -#define IS_RTC_HOUR24(HOUR) ((HOUR) <= (uint32_t)23) - -#define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= (uint32_t)59) - -#define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= (uint32_t)59) - -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @addtogroup RTC_Private_Functions - * @{ - */ - -HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc); -uint8_t RTC_ByteToBcd2(uint8_t Value); -uint8_t RTC_Bcd2ToByte(uint8_t Value); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RTC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h deleted file mode 100644 index 8ba89b0d..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rtc_ex.h +++ /dev/null @@ -1,1100 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rtc_ex.h - * @author MCD Application Team - * @brief Header file of RTC HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RTC_EX_H -#define __STM32L4xx_HAL_RTC_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RTCEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup RTCEx_Exported_Types RTCEx Exported Types - * @{ - */ -/** - * @brief RTC Tamper structure definition - */ -typedef struct -{ - uint32_t Tamper; /*!< Specifies the Tamper Pin. - This parameter can be a value of @ref RTCEx_Tamper_Pins_Definitions */ - - uint32_t Interrupt; /*!< Specifies the Tamper Interrupt. - This parameter can be a value of @ref RTCEx_Tamper_Interrupt_Definitions */ - - uint32_t Trigger; /*!< Specifies the Tamper Trigger. - This parameter can be a value of @ref RTCEx_Tamper_Trigger_Definitions */ - - uint32_t NoErase; /*!< Specifies the Tamper no erase mode. - This parameter can be a value of @ref RTCEx_Tamper_EraseBackUp_Definitions */ - - uint32_t MaskFlag; /*!< Specifies the Tamper Flag masking. - This parameter can be a value of @ref RTCEx_Tamper_MaskFlag_Definitions */ - - uint32_t Filter; /*!< Specifies the RTC Filter Tamper. - This parameter can be a value of @ref RTCEx_Tamper_Filter_Definitions */ - - uint32_t SamplingFrequency; /*!< Specifies the sampling frequency. - This parameter can be a value of @ref RTCEx_Tamper_Sampling_Frequencies_Definitions */ - - uint32_t PrechargeDuration; /*!< Specifies the Precharge Duration . - This parameter can be a value of @ref RTCEx_Tamper_Pin_Precharge_Duration_Definitions */ - - uint32_t TamperPullUp; /*!< Specifies the Tamper PullUp . - This parameter can be a value of @ref RTCEx_Tamper_Pull_UP_Definitions */ - - uint32_t TimeStampOnTamperDetection; /*!< Specifies the TimeStampOnTamperDetection. - This parameter can be a value of @ref RTCEx_Tamper_TimeStampOnTamperDetection_Definitions */ -}RTC_TamperTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RTCEx_Exported_Constants RTCEx Exported Constants - * @{ - */ - -/** @defgroup RTCEx_Output_selection_Definitions RTC Output Selection Definitions - * @{ - */ -#define RTC_OUTPUT_DISABLE ((uint32_t)0x00000000) -#define RTC_OUTPUT_ALARMA ((uint32_t)0x00200000) -#define RTC_OUTPUT_ALARMB ((uint32_t)0x00400000) -#define RTC_OUTPUT_WAKEUP ((uint32_t)0x00600000) -/** - * @} - */ - -/** @defgroup RTCEx_Backup_Registers_Definitions RTC Backup Registers Definitions - * @{ - */ -#define RTC_BKP_DR0 ((uint32_t)0x00000000) -#define RTC_BKP_DR1 ((uint32_t)0x00000001) -#define RTC_BKP_DR2 ((uint32_t)0x00000002) -#define RTC_BKP_DR3 ((uint32_t)0x00000003) -#define RTC_BKP_DR4 ((uint32_t)0x00000004) -#define RTC_BKP_DR5 ((uint32_t)0x00000005) -#define RTC_BKP_DR6 ((uint32_t)0x00000006) -#define RTC_BKP_DR7 ((uint32_t)0x00000007) -#define RTC_BKP_DR8 ((uint32_t)0x00000008) -#define RTC_BKP_DR9 ((uint32_t)0x00000009) -#define RTC_BKP_DR10 ((uint32_t)0x0000000A) -#define RTC_BKP_DR11 ((uint32_t)0x0000000B) -#define RTC_BKP_DR12 ((uint32_t)0x0000000C) -#define RTC_BKP_DR13 ((uint32_t)0x0000000D) -#define RTC_BKP_DR14 ((uint32_t)0x0000000E) -#define RTC_BKP_DR15 ((uint32_t)0x0000000F) -#define RTC_BKP_DR16 ((uint32_t)0x00000010) -#define RTC_BKP_DR17 ((uint32_t)0x00000011) -#define RTC_BKP_DR18 ((uint32_t)0x00000012) -#define RTC_BKP_DR19 ((uint32_t)0x00000013) -#define RTC_BKP_DR20 ((uint32_t)0x00000014) -#define RTC_BKP_DR21 ((uint32_t)0x00000015) -#define RTC_BKP_DR22 ((uint32_t)0x00000016) -#define RTC_BKP_DR23 ((uint32_t)0x00000017) -#define RTC_BKP_DR24 ((uint32_t)0x00000018) -#define RTC_BKP_DR25 ((uint32_t)0x00000019) -#define RTC_BKP_DR26 ((uint32_t)0x0000001A) -#define RTC_BKP_DR27 ((uint32_t)0x0000001B) -#define RTC_BKP_DR28 ((uint32_t)0x0000001C) -#define RTC_BKP_DR29 ((uint32_t)0x0000001D) -#define RTC_BKP_DR30 ((uint32_t)0x0000001E) -#define RTC_BKP_DR31 ((uint32_t)0x0000001F) -/** - * @} - */ - -/** @defgroup RTCEx_TimeStamp_Edges_definitions RTC TimeStamp Edges Definitions - * @{ - */ -#define RTC_TIMESTAMPEDGE_RISING ((uint32_t)0x00000000) -#define RTC_TIMESTAMPEDGE_FALLING ((uint32_t)0x00000008) -/** - * @} - */ - -/** @defgroup RTCEx_TimeStamp_Pin_Selection RTC TimeStamp Pins Selection - * @{ - */ -#define RTC_TIMESTAMPPIN_DEFAULT ((uint32_t)0x00000000) -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Pins_Definitions RTC Tamper Pins Definitions - * @{ - */ -#if defined(RTC_TAMPER1_SUPPORT) -#define RTC_TAMPER_1 RTC_TAMPCR_TAMP1E -#endif /* RTC_TAMPER1_SUPPORT */ -#define RTC_TAMPER_2 RTC_TAMPCR_TAMP2E -#if defined(RTC_TAMPER3_SUPPORT) -#define RTC_TAMPER_3 RTC_TAMPCR_TAMP3E -#endif /* RTC_TAMPER3_SUPPORT */ -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Interrupt_Definitions RTC Tamper Interrupts Definitions - * @{ - */ -#if defined(RTC_TAMPER1_SUPPORT) -#define RTC_TAMPER1_INTERRUPT RTC_TAMPCR_TAMP1IE -#endif /* RTC_TAMPER1_SUPPORT */ -#define RTC_TAMPER2_INTERRUPT RTC_TAMPCR_TAMP2IE -#if defined(RTC_TAMPER3_SUPPORT) -#define RTC_TAMPER3_INTERRUPT RTC_TAMPCR_TAMP3IE -#endif /* RTC_TAMPER3_SUPPORT */ -#define RTC_ALL_TAMPER_INTERRUPT RTC_TAMPCR_TAMPIE -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Trigger_Definitions RTC Tamper Triggers Definitions - * @{ - */ -#define RTC_TAMPERTRIGGER_RISINGEDGE ((uint32_t)0x00000000) -#define RTC_TAMPERTRIGGER_FALLINGEDGE ((uint32_t)0x00000002) -#define RTC_TAMPERTRIGGER_LOWLEVEL RTC_TAMPERTRIGGER_RISINGEDGE -#define RTC_TAMPERTRIGGER_HIGHLEVEL RTC_TAMPERTRIGGER_FALLINGEDGE -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_EraseBackUp_Definitions RTC Tamper EraseBackUp Definitions -* @{ -*/ -#define RTC_TAMPER_ERASE_BACKUP_ENABLE ((uint32_t)0x00000000) -#define RTC_TAMPER_ERASE_BACKUP_DISABLE ((uint32_t)0x00020000) -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_MaskFlag_Definitions RTC Tamper Mask Flag Definitions -* @{ -*/ -#define RTC_TAMPERMASK_FLAG_DISABLE ((uint32_t)0x00000000) -#define RTC_TAMPERMASK_FLAG_ENABLE ((uint32_t)0x00040000) -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Filter_Definitions RTC Tamper Filter Definitions - * @{ - */ -#define RTC_TAMPERFILTER_DISABLE ((uint32_t)0x00000000) /*!< Tamper filter is disabled */ - -#define RTC_TAMPERFILTER_2SAMPLE ((uint32_t)0x00000800) /*!< Tamper is activated after 2 - consecutive samples at the active level */ -#define RTC_TAMPERFILTER_4SAMPLE ((uint32_t)0x00001000) /*!< Tamper is activated after 4 - consecutive samples at the active level */ -#define RTC_TAMPERFILTER_8SAMPLE ((uint32_t)0x00001800) /*!< Tamper is activated after 8 - consecutive samples at the active level. */ -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Sampling_Frequencies_Definitions RTC Tamper Sampling Frequencies Definitions - * @{ - */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768 ((uint32_t)0x00000000) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 32768 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384 ((uint32_t)0x00000100) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 16384 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192 ((uint32_t)0x00000200) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 8192 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096 ((uint32_t)0x00000300) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 4096 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048 ((uint32_t)0x00000400) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 2048 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024 ((uint32_t)0x00000500) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 1024 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512 ((uint32_t)0x00000600) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 512 */ -#define RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256 ((uint32_t)0x00000700) /*!< Each of the tamper inputs are sampled - with a frequency = RTCCLK / 256 */ -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Pin_Precharge_Duration_Definitions RTC Tamper Pin Precharge Duration Definitions - * @{ - */ -#define RTC_TAMPERPRECHARGEDURATION_1RTCCLK ((uint32_t)0x00000000) /*!< Tamper pins are pre-charged before - sampling during 1 RTCCLK cycle */ -#define RTC_TAMPERPRECHARGEDURATION_2RTCCLK ((uint32_t)0x00002000) /*!< Tamper pins are pre-charged before - sampling during 2 RTCCLK cycles */ -#define RTC_TAMPERPRECHARGEDURATION_4RTCCLK ((uint32_t)0x00004000) /*!< Tamper pins are pre-charged before - sampling during 4 RTCCLK cycles */ -#define RTC_TAMPERPRECHARGEDURATION_8RTCCLK ((uint32_t)0x00006000) /*!< Tamper pins are pre-charged before - sampling during 8 RTCCLK cycles */ -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_TimeStampOnTamperDetection_Definitions RTC Tamper TimeStamp On Tamper Detection Definitions - * @{ - */ -#define RTC_TIMESTAMPONTAMPERDETECTION_ENABLE ((uint32_t)RTC_TAMPCR_TAMPTS) /*!< TimeStamp on Tamper Detection event saved */ -#define RTC_TIMESTAMPONTAMPERDETECTION_DISABLE ((uint32_t)0x00000000) /*!< TimeStamp on Tamper Detection event is not saved */ -/** - * @} - */ - -/** @defgroup RTCEx_Tamper_Pull_UP_Definitions RTC Tamper Pull Up Definitions - * @{ - */ -#define RTC_TAMPER_PULLUP_ENABLE ((uint32_t)0x00000000) /*!< TimeStamp on Tamper Detection event saved */ -#define RTC_TAMPER_PULLUP_DISABLE ((uint32_t)RTC_TAMPCR_TAMPPUDIS) /*!< TimeStamp on Tamper Detection event is not saved */ -/** - * @} - */ - -/** @defgroup RTCEx_Wakeup_Timer_Definitions RTC Wakeup Timer Definitions - * @{ - */ -#define RTC_WAKEUPCLOCK_RTCCLK_DIV16 ((uint32_t)0x00000000) -#define RTC_WAKEUPCLOCK_RTCCLK_DIV8 ((uint32_t)0x00000001) -#define RTC_WAKEUPCLOCK_RTCCLK_DIV4 ((uint32_t)0x00000002) -#define RTC_WAKEUPCLOCK_RTCCLK_DIV2 ((uint32_t)0x00000003) -#define RTC_WAKEUPCLOCK_CK_SPRE_16BITS ((uint32_t)0x00000004) -#define RTC_WAKEUPCLOCK_CK_SPRE_17BITS ((uint32_t)0x00000006) -/** - * @} - */ - -/** @defgroup RTCEx_Smooth_calib_period_Definitions RTC Smooth Calib Period Definitions - * @{ - */ -#define RTC_SMOOTHCALIB_PERIOD_32SEC ((uint32_t)0x00000000) /*!< If RTCCLK = 32768 Hz, Smooth calibration - period is 32s, else 2exp20 RTCCLK seconds */ -#define RTC_SMOOTHCALIB_PERIOD_16SEC ((uint32_t)0x00002000) /*!< If RTCCLK = 32768 Hz, Smooth calibration - period is 16s, else 2exp19 RTCCLK seconds */ -#define RTC_SMOOTHCALIB_PERIOD_8SEC ((uint32_t)0x00004000) /*!< If RTCCLK = 32768 Hz, Smooth calibration - period is 8s, else 2exp18 RTCCLK seconds */ -/** - * @} - */ - -/** @defgroup RTCEx_Smooth_calib_Plus_pulses_Definitions RTC Smooth Calib Plus Pulses Definitions - * @{ - */ -#define RTC_SMOOTHCALIB_PLUSPULSES_SET ((uint32_t)0x00008000) /*!< The number of RTCCLK pulses added - during a X -second window = Y - CALM[8:0] - with Y = 512, 256, 128 when X = 32, 16, 8 */ -#define RTC_SMOOTHCALIB_PLUSPULSES_RESET ((uint32_t)0x00000000) /*!< The number of RTCCLK pulses subbstited - during a 32-second window = CALM[8:0] */ -/** - * @} - */ - -/** @defgroup RTCEx_Calib_Output_selection_Definitions RTC Calib Output Selection Definitions - * @{ - */ -#define RTC_CALIBOUTPUT_512HZ ((uint32_t)0x00000000) -#define RTC_CALIBOUTPUT_1HZ ((uint32_t)0x00080000) -/** - * @} - */ - -/** @defgroup RTCEx_Add_1_Second_Parameter_Definitions RTC Add 1 Second Parameter Definitions - * @{ - */ -#define RTC_SHIFTADD1S_RESET ((uint32_t)0x00000000) -#define RTC_SHIFTADD1S_SET ((uint32_t)0x80000000) -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup RTCEx_Exported_Macros RTCEx Exported Macros - * @{ - */ - -/** - * @brief Enable the RTC WakeUp Timer peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_WUTE)) - -/** - * @brief Disable the RTC WakeUp Timer peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE)) - -/** - * @brief Enable the RTC WakeUpTimer interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to be enabled. - * This parameter can be: - * @arg RTC_IT_WUT: WakeUpTimer interrupt - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) - -/** - * @brief Disable the RTC WakeUpTimer interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to be disabled. - * This parameter can be: - * @arg RTC_IT_WUT: WakeUpTimer interrupt - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified RTC WakeUpTimer interrupt has occurred or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC WakeUpTimer interrupt sources to check. - * This parameter can be: - * @arg RTC_IT_WUT: WakeUpTimer interrupt - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4)) != RESET) ? SET : RESET) - -/** - * @brief Check whether the specified RTC Wake Up timer interrupt is enabled or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Wake Up timer interrupt sources to check. - * This parameter can be: - * @arg RTC_IT_WUT: WakeUpTimer interrupt - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET) - -/** - * @brief Get the selected RTC WakeUpTimer's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC WakeUpTimer Flag is pending or not. - * This parameter can be: - * @arg RTC_FLAG_WUTF - * @arg RTC_FLAG_WUTWF - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Clear the RTC Wake Up timer's pending flags. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC WakeUpTimer Flag to clear. - * This parameter can be: - * @arg RTC_FLAG_WUTF - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) - -#if defined(RTC_TAMPER1_SUPPORT) -/** - * @brief Enable the RTC Tamper1 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER1_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP1E)) - -/** - * @brief Disable the RTC Tamper1 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER1_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP1E)) -#endif /* RTC_TAMPER1_SUPPORT */ - -/** - * @brief Enable the RTC Tamper2 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER2_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP2E)) - -/** - * @brief Disable the RTC Tamper2 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER2_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP2E)) - -#if defined(RTC_TAMPER3_SUPPORT) -/** - * @brief Enable the RTC Tamper3 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER3_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR |= (RTC_TAMPCR_TAMP3E)) - -/** - * @brief Disable the RTC Tamper3 input detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TAMPER3_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->TAMPCR &= ~(RTC_TAMPCR_TAMP3E)) -#endif /* RTC_TAMPER3_SUPPORT */ - -/** - * @brief Enable the RTC Tamper interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Tamper interrupt sources to be enabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_TAMP: All tampers interrupts - * @arg RTC_IT_TAMP1: Tamper1 interrupt - * @arg RTC_IT_TAMP2: Tamper2 interrupt - * @arg RTC_IT_TAMP3: Tamper3 interrupt - * @retval None - */ -#define __HAL_RTC_TAMPER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAMPCR |= (__INTERRUPT__)) - -/** - * @brief Disable the RTC Tamper interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Tamper interrupt sources to be disabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_TAMP: All tampers interrupts - * @arg RTC_IT_TAMP1: Tamper1 interrupt - * @arg RTC_IT_TAMP2: Tamper2 interrupt - * @arg RTC_IT_TAMP3: Tamper3 interrupt - * @retval None - */ -#define __HAL_RTC_TAMPER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->TAMPCR &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified RTC Tamper interrupt has occurred or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Tamper interrupt to check. - * This parameter can be: - * @arg RTC_IT_TAMP1: Tamper1 interrupt - * @arg RTC_IT_TAMP2: Tamper2 interrupt - * @arg RTC_IT_TAMP3: Tamper3 interrupt - * @retval None - */ -#if defined(RTC_TAMPER1_SUPPORT) && defined(RTC_TAMPER3_SUPPORT) -#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) == RTC_IT_TAMP1) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 3)) != RESET) ? SET : RESET) : \ - ((__INTERRUPT__) == RTC_IT_TAMP2) ? (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 5)) != RESET) ? SET : RESET) : \ - (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 7)) != RESET) ? SET : RESET)) -#else -#define __HAL_RTC_TAMPER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 5)) != RESET) ? SET : RESET) -#endif /* RTC_TAMPER1_SUPPORT && RTC_TAMPER3_SUPPORT */ - -/** - * @brief Check whether the specified RTC Tamper interrupt is enabled or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Tamper interrupt source to check. - * This parameter can be: - * @arg RTC_IT_TAMP: All tampers interrupts - * @arg RTC_IT_TAMP1: Tamper1 interrupt - * @arg RTC_IT_TAMP2: Tamper2 interrupt - * @arg RTC_IT_TAMP3: Tamper3 interrupt - * @retval None - */ -#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAMPCR) & (__INTERRUPT__)) != RESET) ? SET : RESET) - -/** - * @brief Get the selected RTC Tamper's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Tamper Flag is pending or not. - * This parameter can be: - * @arg RTC_FLAG_TAMP1F: Tamper1 flag - * @arg RTC_FLAG_TAMP2F: Tamper2 flag - * @arg RTC_FLAG_TAMP3F: Tamper3 flag - * @retval None - */ -#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Clear the RTC Tamper's pending flags. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Tamper Flag sources to clear. - * This parameter can be: - * @arg RTC_FLAG_TAMP1F: Tamper1 flag - * @arg RTC_FLAG_TAMP2F: Tamper2 flag - * @arg RTC_FLAG_TAMP3F: Tamper3 flag - * @retval None - */ -#define __HAL_RTC_TAMPER_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) - -/** - * @brief Enable the RTC TimeStamp peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TSE)) - -/** - * @brief Disable the RTC TimeStamp peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE)) - -/** - * @brief Enable the RTC TimeStamp interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC TimeStamp interrupt source to be enabled. - * This parameter can be: - * @arg RTC_IT_TS: TimeStamp interrupt - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) - -/** - * @brief Disable the RTC TimeStamp interrupt. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC TimeStamp interrupt source to be disabled. - * This parameter can be: - * @arg RTC_IT_TS: TimeStamp interrupt - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified RTC TimeStamp interrupt has occurred or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC TimeStamp interrupt source to check. - * This parameter can be: - * @arg RTC_IT_TS: TimeStamp interrupt - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->ISR) & ((__INTERRUPT__)>> 4)) != RESET) ? SET : RESET) - -/** - * @brief Check whether the specified RTC Time Stamp interrupt is enabled or not. - * @param __HANDLE__: specifies the RTC handle. - * @param __INTERRUPT__: specifies the RTC Time Stamp interrupt source to check. - * This parameter can be: - * @arg RTC_IT_TS: TimeStamp interrupt - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != RESET) ? SET : RESET) - -/** - * @brief Get the selected RTC TimeStamp's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC TimeStamp Flag is pending or not. - * This parameter can be: - * @arg RTC_FLAG_TSF - * @arg RTC_FLAG_TSOVF - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Clear the RTC Time Stamp's pending flags. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Alarm Flag sources to clear. - * This parameter can be: - * @arg RTC_FLAG_TSF - * @arg RTC_FLAG_TSOVF - * @retval None - */ -#define __HAL_RTC_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) - -/** - * @brief Enable the RTC internal TimeStamp peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_INTERNAL_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ITSE)) - -/** - * @brief Disable the RTC internal TimeStamp peripheral. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_INTERNAL_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ITSE)) - -/** - * @brief Get the selected RTC Internal Time Stamp's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Internal Time Stamp Flag is pending or not. - * This parameter can be: - * @arg RTC_FLAG_ITSF - * @retval None - */ -#define __HAL_RTC_INTERNAL_TIMESTAMP_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Clear the RTC Internal Time Stamp's pending flags. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC Internal Time Stamp Flag source to clear. - * This parameter can be: - * @arg RTC_FLAG_ITSF - * @retval None - */ -#define __HAL_RTC_INTERNAL_TIMESTAMP_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR) = (~((__FLAG__) | RTC_ISR_INIT)|((__HANDLE__)->Instance->ISR & RTC_ISR_INIT)) - -/** - * @brief Enable the RTC calibration output. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_COE)) - -/** - * @brief Disable the calibration output. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_COE)) - -/** - * @brief Enable the clock reference detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_REFCKON)) - -/** - * @brief Disable the clock reference detection. - * @param __HANDLE__: specifies the RTC handle. - * @retval None - */ -#define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_REFCKON)) - -/** - * @brief Get the selected RTC shift operation's flag status. - * @param __HANDLE__: specifies the RTC handle. - * @param __FLAG__: specifies the RTC shift operation Flag is pending or not. - * This parameter can be: - * @arg RTC_FLAG_SHPF - * @retval None - */ -#define __HAL_RTC_SHIFT_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET) ? SET : RESET) - -/** - * @brief Enable interrupt on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Disable interrupt on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT)) - -/** - * @brief Enable event on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Disable event on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT)) - -/** - * @brief Enable falling edge trigger on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Disable falling edge trigger on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT)) - -/** - * @brief Enable rising edge trigger on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Disable rising edge trigger on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR1 &= ~(RTC_EXTI_LINE_WAKEUPTIMER_EVENT)) - -/** - * @brief Enable rising & falling edge trigger on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable rising & falling edge trigger on the RTC WakeUp Timer associated Exti line. - * This parameter can be: - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Check whether the RTC WakeUp Timer associated Exti line interrupt flag is set or not. - * @retval Line Status. - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR1 & RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Clear the RTC WakeUp Timer associated Exti line flag. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR1 = RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Generate a Software interrupt on the RTC WakeUp Timer associated Exti line. - * @retval None - */ -#define __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT) - -/** - * @brief Enable interrupt on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT() (EXTI->IMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Disable interrupt on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT() (EXTI->IMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)) - -/** - * @brief Enable event on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_EVENT() (EXTI->EMR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Disable event on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_EVENT() (EXTI->EMR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)) - -/** - * @brief Enable falling edge trigger on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Disable falling edge trigger on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)) - -/** - * @brief Enable rising edge trigger on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Disable rising edge trigger on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR1 &= ~(RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT)) - -/** - * @brief Enable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable rising & falling edge trigger on the RTC Tamper and Timestamp associated Exti line. - * This parameter can be: - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Check whether the RTC Tamper and Timestamp associated Exti line interrupt flag is set or not. - * @retval Line Status. - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() (EXTI->PR1 & RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Clear the RTC Tamper and Timestamp associated Exti line flag. - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG() (EXTI->PR1 = RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @brief Generate a Software interrupt on the RTC Tamper and Timestamp associated Exti line - * @retval None - */ -#define __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup RTCEx_Exported_Functions - * @{ - */ - -/* RTC TimeStamp and Tamper functions *****************************************/ -/** @addtogroup RTCEx_Exported_Functions_Group1 - * @{ - */ -HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin); -HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin); -HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_SetInternalTimeStamp(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTimeStamp(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format); - -HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper); -HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper); -HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper); -void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc); - -#if defined(RTC_TAMPER1_SUPPORT) -void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc); -#endif /* RTC_TAMPER1_SUPPORT */ -void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc); -#if defined(RTC_TAMPER3_SUPPORT) -void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc); -#endif /* RTC_TAMPER3_SUPPORT */ -void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -#if defined(RTC_TAMPER1_SUPPORT) -HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -#endif /* RTC_TAMPER1_SUPPORT */ -HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -#if defined(RTC_TAMPER3_SUPPORT) -HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -#endif /* RTC_TAMPER3_SUPPORT */ -/** - * @} - */ - -/* RTC Wake-up functions ******************************************************/ -/** @addtogroup RTCEx_Exported_Functions_Group2 - * @{ - */ -HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock); -HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock); -uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc); -uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc); -void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc); -void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -/** - * @} - */ - -/* Extended Control functions ************************************************/ -/** @addtogroup RTCEx_Exported_Functions_Group3 - * @{ - */ -void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data); -uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister); - -HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue); -HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS); -HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc, uint32_t CalibOutput); -HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc); -/** - * @} - */ - -/* Extended RTC features functions *******************************************/ -/** @addtogroup RTCEx_Exported_Functions_Group4 - * @{ - */ -void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc); -HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout); -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** @defgroup RTCEx_Private_Constants RTCEx Private Constants - * @{ - */ -#define RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT ((uint32_t)0x00080000) /*!< External interrupt line 19 Connected to the RTC Tamper and Time Stamp events */ -#define RTC_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)0x00100000) /*!< External interrupt line 20 Connected to the RTC Wakeup event */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup RTCEx_Private_Macros RTCEx Private Macros - * @{ - */ - -/** @defgroup RTCEx_IS_RTC_Definitions Private macros to check input parameters - * @{ - */ - -#define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_OUTPUT_DISABLE) || \ - ((OUTPUT) == RTC_OUTPUT_ALARMA) || \ - ((OUTPUT) == RTC_OUTPUT_ALARMB) || \ - ((OUTPUT) == RTC_OUTPUT_WAKEUP)) - -#define IS_RTC_BKP(BKP) ((BKP) < (uint32_t) RTC_BKP_NUMBER) - -#define IS_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TIMESTAMPEDGE_RISING) || \ - ((EDGE) == RTC_TIMESTAMPEDGE_FALLING)) - -#define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & (uint32_t)0xFFFFFFD6) == 0x00) && ((TAMPER) != (uint32_t)RESET)) - -#define IS_RTC_TAMPER_INTERRUPT(INTERRUPT) ((((INTERRUPT) & (uint32_t)0xFFB6FFFB) == 0x00) && ((INTERRUPT) != (uint32_t)RESET)) - -#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TIMESTAMPPIN_DEFAULT)) - -#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TAMPERTRIGGER_RISINGEDGE) || \ - ((TRIGGER) == RTC_TAMPERTRIGGER_FALLINGEDGE) || \ - ((TRIGGER) == RTC_TAMPERTRIGGER_LOWLEVEL) || \ - ((TRIGGER) == RTC_TAMPERTRIGGER_HIGHLEVEL)) - -#define IS_RTC_TAMPER_ERASE_MODE(MODE) (((MODE) == RTC_TAMPER_ERASE_BACKUP_ENABLE) || \ - ((MODE) == RTC_TAMPER_ERASE_BACKUP_DISABLE)) - -#define IS_RTC_TAMPER_MASKFLAG_STATE(STATE) (((STATE) == RTC_TAMPERMASK_FLAG_ENABLE) || \ - ((STATE) == RTC_TAMPERMASK_FLAG_DISABLE)) - -#define IS_RTC_TAMPER_FILTER(FILTER) (((FILTER) == RTC_TAMPERFILTER_DISABLE) || \ - ((FILTER) == RTC_TAMPERFILTER_2SAMPLE) || \ - ((FILTER) == RTC_TAMPERFILTER_4SAMPLE) || \ - ((FILTER) == RTC_TAMPERFILTER_8SAMPLE)) - -#define IS_RTC_TAMPER_SAMPLING_FREQ(FREQ) (((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV32768)|| \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV16384)|| \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV8192) || \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV4096) || \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV2048) || \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV1024) || \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV512) || \ - ((FREQ) == RTC_TAMPERSAMPLINGFREQ_RTCCLK_DIV256)) - -#define IS_RTC_TAMPER_PRECHARGE_DURATION(DURATION) (((DURATION) == RTC_TAMPERPRECHARGEDURATION_1RTCCLK) || \ - ((DURATION) == RTC_TAMPERPRECHARGEDURATION_2RTCCLK) || \ - ((DURATION) == RTC_TAMPERPRECHARGEDURATION_4RTCCLK) || \ - ((DURATION) == RTC_TAMPERPRECHARGEDURATION_8RTCCLK)) - -#define IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(DETECTION) (((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_ENABLE) || \ - ((DETECTION) == RTC_TIMESTAMPONTAMPERDETECTION_DISABLE)) - -#define IS_RTC_TAMPER_PULLUP_STATE(STATE) (((STATE) == RTC_TAMPER_PULLUP_ENABLE) || \ - ((STATE) == RTC_TAMPER_PULLUP_DISABLE)) - -#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV16) || \ - ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV8) || \ - ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV4) || \ - ((CLOCK) == RTC_WAKEUPCLOCK_RTCCLK_DIV2) || \ - ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_16BITS) || \ - ((CLOCK) == RTC_WAKEUPCLOCK_CK_SPRE_17BITS)) - -#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= 0xFFFF) - -#define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SMOOTHCALIB_PERIOD_32SEC) || \ - ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_16SEC) || \ - ((PERIOD) == RTC_SMOOTHCALIB_PERIOD_8SEC)) - -#define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_SET) || \ - ((PLUS) == RTC_SMOOTHCALIB_PLUSPULSES_RESET)) - -#define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= 0x000001FF) - -#define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_SHIFTADD1S_RESET) || \ - ((SEL) == RTC_SHIFTADD1S_SET)) - -#define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= 0x00007FFF) - -#define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CALIBOUTPUT_512HZ) || \ - ((OUTPUT) == RTC_CALIBOUTPUT_1HZ)) - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RTC_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h deleted file mode 100644 index bfc0194b..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim.h +++ /dev/null @@ -1,2043 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim.h - * @author MCD Application Team - * @brief Header file of TIM HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_TIM_H -#define __STM32L4xx_HAL_TIM_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup TIM - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup TIM_Exported_Types TIM Exported Types - * @{ - */ - -/** - * @brief TIM Time base Configuration Structure definition - */ -typedef struct -{ - uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t CounterMode; /*!< Specifies the counter mode. - This parameter can be a value of @ref TIM_Counter_Mode */ - - uint32_t Period; /*!< Specifies the period value to be loaded into the active - Auto-Reload Register at the next update event. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ - - uint32_t ClockDivision; /*!< Specifies the clock division. - This parameter can be a value of @ref TIM_ClockDivision */ - - uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter - reaches zero, an update event is generated and counting restarts - from the RCR value (N). - This means in PWM mode that (N+1) corresponds to: - - the number of PWM periods in edge-aligned mode - - the number of half PWM period in center-aligned mode - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t AutoReloadPreload; /*!< Specifies the auto-reload preload. - This parameter can be a value of @ref TIM_AutoReloadPreload */ -} TIM_Base_InitTypeDef; - -/** - * @brief TIM Output Compare Configuration Structure definition - */ -typedef struct -{ - uint32_t OCMode; /*!< Specifies the TIM mode. - This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ - - uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t OCPolarity; /*!< Specifies the output polarity. - This parameter can be a value of @ref TIM_Output_Compare_Polarity */ - - uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. - This parameter can be a value of @ref TIM_Output_Compare_N_Polarity - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCFastMode; /*!< Specifies the Fast mode state. - This parameter can be a value of @ref TIM_Output_Fast_State - @note This parameter is valid only in PWM1 and PWM2 mode. */ - - - uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ -} TIM_OC_InitTypeDef; - -/** - * @brief TIM One Pulse Mode Configuration Structure definition - */ -typedef struct -{ - uint32_t OCMode; /*!< Specifies the TIM mode. - This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ - - uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t OCPolarity; /*!< Specifies the output polarity. - This parameter can be a value of @ref TIM_Output_Compare_Polarity */ - - uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. - This parameter can be a value of @ref TIM_Output_Compare_N_Polarity - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t ICSelection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t ICFilter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -} TIM_OnePulse_InitTypeDef; - - -/** - * @brief TIM Input Capture Configuration Structure definition - */ -typedef struct -{ - uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t ICSelection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t ICFilter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -} TIM_IC_InitTypeDef; - -/** - * @brief TIM Encoder Configuration Structure definition - */ -typedef struct -{ - uint32_t EncoderMode; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Encoder_Mode */ - - uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t IC1Selection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t IC1Filter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - - uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t IC2Selection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t IC2Filter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -} TIM_Encoder_InitTypeDef; - - -/** - * @brief Clock Configuration Handle Structure definition - */ -typedef struct -{ - uint32_t ClockSource; /*!< TIM clock sources - This parameter can be a value of @ref TIM_Clock_Source */ - uint32_t ClockPolarity; /*!< TIM clock polarity - This parameter can be a value of @ref TIM_Clock_Polarity */ - uint32_t ClockPrescaler; /*!< TIM clock prescaler - This parameter can be a value of @ref TIM_Clock_Prescaler */ - uint32_t ClockFilter; /*!< TIM clock filter - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -}TIM_ClockConfigTypeDef; - -/** - * @brief Clear Input Configuration Handle Structure definition - */ -typedef struct -{ - uint32_t ClearInputState; /*!< TIM clear Input state - This parameter can be ENABLE or DISABLE */ - uint32_t ClearInputSource; /*!< TIM clear Input sources - This parameter can be a value of @ref TIM_ClearInput_Source */ - uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity - This parameter can be a value of @ref TIM_ClearInput_Polarity */ - uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler - This parameter can be a value of @ref TIM_ClearInput_Prescaler */ - uint32_t ClearInputFilter; /*!< TIM Clear Input filter - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -}TIM_ClearInputConfigTypeDef; - -/** - * @brief TIM Master configuration Structure definition - * @note Advanced timers provide TRGO2 internal line which is redirected - * to the ADC - */ -typedef struct { - uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection - This parameter can be a value of @ref TIM_Master_Mode_Selection */ - uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection - This parameter can be a value of @ref TIM_Master_Mode_Selection_2 */ - uint32_t MasterSlaveMode; /*!< Master/slave mode selection - This parameter can be a value of @ref TIM_Master_Slave_Mode */ -}TIM_MasterConfigTypeDef; - -/** - * @brief TIM Slave configuration Structure definition - */ -typedef struct { - uint32_t SlaveMode; /*!< Slave mode selection - This parameter can be a value of @ref TIM_Slave_Mode */ - uint32_t InputTrigger; /*!< Input Trigger source - This parameter can be a value of @ref TIM_Trigger_Selection */ - uint32_t TriggerPolarity; /*!< Input Trigger polarity - This parameter can be a value of @ref TIM_Trigger_Polarity */ - uint32_t TriggerPrescaler; /*!< Input trigger prescaler - This parameter can be a value of @ref TIM_Trigger_Prescaler */ - uint32_t TriggerFilter; /*!< Input trigger filter - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - -}TIM_SlaveConfigTypeDef; - -/** - * @brief TIM Break input(s) and Dead time configuration Structure definition - * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable - * filter and polarity. - */ -typedef struct -{ - uint32_t OffStateRunMode; /*!< TIM off state in run mode - This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ - uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode - This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ - uint32_t LockLevel; /*!< TIM Lock level - This parameter can be a value of @ref TIM_Lock_level */ - uint32_t DeadTime; /*!< TIM dead Time - This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ - uint32_t BreakState; /*!< TIM Break State - This parameter can be a value of @ref TIM_Break_Input_enable_disable */ - uint32_t BreakPolarity; /*!< TIM Break input polarity - This parameter can be a value of @ref TIM_Break_Polarity */ - uint32_t BreakFilter; /*!< Specifies the break input filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - uint32_t Break2State; /*!< TIM Break2 State - This parameter can be a value of @ref TIM_Break2_Input_enable_disable */ - uint32_t Break2Polarity; /*!< TIM Break2 input polarity - This parameter can be a value of @ref TIM_Break2_Polarity */ - uint32_t Break2Filter; /*!< TIM break2 input filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state - This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ -} TIM_BreakDeadTimeConfigTypeDef; - -/** - * @brief HAL State structures definition - */ -typedef enum -{ - HAL_TIM_STATE_RESET = 0x00, /*!< Peripheral not yet initialized or disabled */ - HAL_TIM_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ - HAL_TIM_STATE_BUSY = 0x02, /*!< An internal process is ongoing */ - HAL_TIM_STATE_TIMEOUT = 0x03, /*!< Timeout state */ - HAL_TIM_STATE_ERROR = 0x04 /*!< Reception process is ongoing */ -}HAL_TIM_StateTypeDef; - -/** - * @brief HAL Active channel structures definition - */ -typedef enum -{ - HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /*!< The active channel is 1 */ - HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /*!< The active channel is 2 */ - HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /*!< The active channel is 3 */ - HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /*!< The active channel is 4 */ - HAL_TIM_ACTIVE_CHANNEL_5 = 0x10, /*!< The active channel is 5 */ - HAL_TIM_ACTIVE_CHANNEL_6 = 0x20, /*!< The active channel is 6 */ - HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /*!< All active channels cleared */ -}HAL_TIM_ActiveChannel; - -/** - * @brief TIM Time Base Handle Structure definition - */ -typedef struct -{ - TIM_TypeDef *Instance; /*!< Register base address */ - TIM_Base_InitTypeDef Init; /*!< TIM Time Base required parameters */ - HAL_TIM_ActiveChannel Channel; /*!< Active channel */ - DMA_HandleTypeDef *hdma[7]; /*!< DMA Handlers array - This array is accessed by a @ref DMA_Handle_index */ - HAL_LockTypeDef Lock; /*!< Locking object */ - __IO HAL_TIM_StateTypeDef State; /*!< TIM operation state */ -}TIM_HandleTypeDef; - -/** - * @} - */ -/* End of exported types -----------------------------------------------------*/ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup TIM_Exported_Constants TIM Exported Constants - * @{ - */ - -/** @defgroup TIM_ClearInput_Source TIM Clear Input Source - * @{ - */ -#define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001) -#define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002) -#define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_DMA_Base_address TIM DMA Base Address - * @{ - */ -#define TIM_DMABASE_CR1 (0x00000000) -#define TIM_DMABASE_CR2 (0x00000001) -#define TIM_DMABASE_SMCR (0x00000002) -#define TIM_DMABASE_DIER (0x00000003) -#define TIM_DMABASE_SR (0x00000004) -#define TIM_DMABASE_EGR (0x00000005) -#define TIM_DMABASE_CCMR1 (0x00000006) -#define TIM_DMABASE_CCMR2 (0x00000007) -#define TIM_DMABASE_CCER (0x00000008) -#define TIM_DMABASE_CNT (0x00000009) -#define TIM_DMABASE_PSC (0x0000000A) -#define TIM_DMABASE_ARR (0x0000000B) -#define TIM_DMABASE_RCR (0x0000000C) -#define TIM_DMABASE_CCR1 (0x0000000D) -#define TIM_DMABASE_CCR2 (0x0000000E) -#define TIM_DMABASE_CCR3 (0x0000000F) -#define TIM_DMABASE_CCR4 (0x00000010) -#define TIM_DMABASE_BDTR (0x00000011) -#define TIM_DMABASE_DCR (0x00000012) -#define TIM_DMABASE_DMAR (0x00000013) -#define TIM_DMABASE_OR1 (0x00000014) -#define TIM_DMABASE_CCMR3 (0x00000015) -#define TIM_DMABASE_CCR5 (0x00000016) -#define TIM_DMABASE_CCR6 (0x00000017) -#define TIM_DMABASE_OR2 (0x00000018) -#define TIM_DMABASE_OR3 (0x00000019) -/** - * @} - */ - -/** @defgroup TIM_Event_Source TIM Extended Event Source - * @{ - */ -#define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */ -#define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */ -#define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */ -#define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */ -#define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */ -#define TIM_EVENTSOURCE_COM TIM_EGR_COMG /*!< A commutation event is generated */ -#define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /*!< A trigger event is generated */ -#define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /*!< A break event is generated */ -#define TIM_EVENTSOURCE_BREAK2 TIM_EGR_B2G /*!< A break 2 event is generated */ -/** - * @} - */ - -/** @defgroup TIM_Input_Channel_Polarity TIM Input Channel polarity - * @{ - */ -#define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /*!< Polarity for TIx source */ -#define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /*!< Polarity for TIx source */ -#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for TIx source */ -/** - * @} - */ - -/** @defgroup TIM_ETR_Polarity TIM ETR Polarity - * @{ - */ -#define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /*!< Polarity for ETR source */ -#define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /*!< Polarity for ETR source */ -/** - * @} - */ - -/** @defgroup TIM_ETR_Prescaler TIM ETR Prescaler - * @{ - */ -#define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /*!< No prescaler is used */ -#define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /*!< ETR input source is divided by 2 */ -#define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /*!< ETR input source is divided by 4 */ -#define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /*!< ETR input source is divided by 8 */ -/** - * @} - */ - -/** @defgroup TIM_Counter_Mode TIM Counter Mode - * @{ - */ -#define TIM_COUNTERMODE_UP ((uint32_t)0x0000) -#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR -#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0 -#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1 -#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS -/** - * @} - */ - -/** @defgroup TIM_ClockDivision TIM Clock Division - * @{ - */ -#define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000) -#define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0) -#define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1) -/** - * @} - */ - -/** @defgroup TIM_AutoReloadPreload TIM Auto-Reload Preload - * @{ - */ -#define TIM_AUTORELOAD_PRELOAD_DISABLE ((uint32_t)0x0000) /*!< TIMx_ARR register is not buffered */ -#define TIM_AUTORELOAD_PRELOAD_ENABLE (TIM_CR1_ARPE) /*!< TIMx_ARR register is buffered */ -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_State TIM Output Compare State - * @{ - */ -#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000) -#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_State TIM Complementary Output Compare State - * @{ - */ -#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000) -#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE) -/** - * @} - */ - -/** @defgroup TIM_Output_Fast_State TIM Output Fast State - * @{ - */ -#define TIM_OCFAST_DISABLE ((uint32_t)0x0000) -#define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Polarity TIM Output Compare Polarity - * @{ - */ -#define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000) -#define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_Polarity TIM Complementary Output Compare Polarity - * @{ - */ -#define TIM_OCNPOLARITY_HIGH ((uint32_t)0x0000) -#define TIM_OCNPOLARITY_LOW (TIM_CCER_CC1NP) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Idle_State TIM Output Compare Idle State - * @{ - */ -#define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1) -#define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_Idle_State TIM Complementary Output Compare Idle State - * @{ - */ -#define TIM_OCNIDLESTATE_SET (TIM_CR2_OIS1N) -#define TIM_OCNIDLESTATE_RESET ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity - * @{ - */ -#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING -#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING -#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection - * @{ - */ -#define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC1, IC2, IC3 or IC4, respectively */ -#define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC2, IC1, IC4 or IC3, respectively */ -#define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC */ -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Prescaler TIM Input Capture Prescaler - * @{ - */ -#define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input */ -#define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /*!< Capture performed once every 2 events */ -#define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /*!< Capture performed once every 4 events */ -#define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /*!< Capture performed once every 8 events */ -/** - * @} - */ - -/** @defgroup TIM_One_Pulse_Mode TIM One Pulse Mode - * @{ - */ -#define TIM_OPMODE_SINGLE (TIM_CR1_OPM) -#define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Encoder_Mode TIM Encoder Mode - * @{ - */ -#define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0) -#define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1) -#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0) -/** - * @} - */ - -/** @defgroup TIM_Interrupt_definition TIM interrupt Definition - * @{ - */ -#define TIM_IT_UPDATE (TIM_DIER_UIE) -#define TIM_IT_CC1 (TIM_DIER_CC1IE) -#define TIM_IT_CC2 (TIM_DIER_CC2IE) -#define TIM_IT_CC3 (TIM_DIER_CC3IE) -#define TIM_IT_CC4 (TIM_DIER_CC4IE) -#define TIM_IT_COM (TIM_DIER_COMIE) -#define TIM_IT_TRIGGER (TIM_DIER_TIE) -#define TIM_IT_BREAK (TIM_DIER_BIE) -/** - * @} - */ - -/** @defgroup TIM_Commutation_Source TIM Commutation Source - * @{ - */ -#define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS) -#define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_DMA_sources TIM DMA Sources - * @{ - */ -#define TIM_DMA_UPDATE (TIM_DIER_UDE) -#define TIM_DMA_CC1 (TIM_DIER_CC1DE) -#define TIM_DMA_CC2 (TIM_DIER_CC2DE) -#define TIM_DMA_CC3 (TIM_DIER_CC3DE) -#define TIM_DMA_CC4 (TIM_DIER_CC4DE) -#define TIM_DMA_COM (TIM_DIER_COMDE) -#define TIM_DMA_TRIGGER (TIM_DIER_TDE) -/** - * @} - */ - -/** @defgroup TIM_Flag_definition TIM Flag Definition - * @{ - */ -#define TIM_FLAG_UPDATE (TIM_SR_UIF) -#define TIM_FLAG_CC1 (TIM_SR_CC1IF) -#define TIM_FLAG_CC2 (TIM_SR_CC2IF) -#define TIM_FLAG_CC3 (TIM_SR_CC3IF) -#define TIM_FLAG_CC4 (TIM_SR_CC4IF) -#define TIM_FLAG_CC5 (TIM_SR_CC5IF) -#define TIM_FLAG_CC6 (TIM_SR_CC6IF) -#define TIM_FLAG_COM (TIM_SR_COMIF) -#define TIM_FLAG_TRIGGER (TIM_SR_TIF) -#define TIM_FLAG_BREAK (TIM_SR_BIF) -#define TIM_FLAG_BREAK2 (TIM_SR_B2IF) -#define TIM_FLAG_SYSTEM_BREAK (TIM_SR_SBIF) -#define TIM_FLAG_CC1OF (TIM_SR_CC1OF) -#define TIM_FLAG_CC2OF (TIM_SR_CC2OF) -#define TIM_FLAG_CC3OF (TIM_SR_CC3OF) -#define TIM_FLAG_CC4OF (TIM_SR_CC4OF) -/** - * @} - */ - -/** @defgroup TIM_Channel TIM Channel - * @{ - */ -#define TIM_CHANNEL_1 ((uint32_t)0x0000) -#define TIM_CHANNEL_2 ((uint32_t)0x0004) -#define TIM_CHANNEL_3 ((uint32_t)0x0008) -#define TIM_CHANNEL_4 ((uint32_t)0x000C) -#define TIM_CHANNEL_5 ((uint32_t)0x0010) -#define TIM_CHANNEL_6 ((uint32_t)0x0014) -#define TIM_CHANNEL_ALL ((uint32_t)0x003C) -/** - * @} - */ - -/** @defgroup TIM_Clock_Source TIM Clock Source - * @{ - */ -#define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1) -#define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0) -#define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000) -#define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0) -#define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1) -#define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1) -#define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2) -#define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 | TIM_SMCR_TS_2) -#define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 | TIM_SMCR_TS_2) -#define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS) -/** - * @} - */ - -/** @defgroup TIM_Clock_Polarity TIM Clock Polarity - * @{ - */ -#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx clock sources */ -#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx clock sources */ -#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIx clock sources */ -#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIx clock sources */ -#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIx clock sources */ -/** - * @} - */ - -/** @defgroup TIM_Clock_Prescaler TIM Clock Prescaler - * @{ - */ -#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ -#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Clock: Capture performed once every 2 events. */ -#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Clock: Capture performed once every 4 events. */ -#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Clock: Capture performed once every 8 events. */ -/** - * @} - */ - -/** @defgroup TIM_ClearInput_Polarity TIM Clear Input Polarity - * @{ - */ -#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */ -#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx pin */ -/** - * @} - */ - -/** @defgroup TIM_ClearInput_Prescaler TIM Clear Input Prescaler - * @{ - */ -#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ -#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */ -#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */ -#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */ -/** - * @} - */ - -/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM OSSR OffState Selection for Run mode state - * @{ - */ -#define TIM_OSSR_ENABLE (TIM_BDTR_OSSR) -#define TIM_OSSR_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM OSSI OffState Selection for Idle mode state - * @{ - */ -#define TIM_OSSI_ENABLE (TIM_BDTR_OSSI) -#define TIM_OSSI_DISABLE ((uint32_t)0x0000) -/** - * @} - */ -/** @defgroup TIM_Lock_level TIM Lock level - * @{ - */ -#define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000) -#define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0) -#define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1) -#define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK) -/** - * @} - */ - -/** @defgroup TIM_Break_Input_enable_disable TIM Break Input Enable - * @{ - */ -#define TIM_BREAK_ENABLE (TIM_BDTR_BKE) -#define TIM_BREAK_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Break_Polarity TIM Break Input Polarity - * @{ - */ -#define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000) -#define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP) -/** - * @} - */ - -/** @defgroup TIM_Break2_Input_enable_disable TIM Break input 2 Enable - * @{ - */ -#define TIM_BREAK2_DISABLE ((uint32_t)0x00000000) -#define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E) -/** - * @} - */ - -/** @defgroup TIM_Break2_Polarity TIM Break Input 2 Polarity - * @{ - */ -#define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000) -#define TIM_BREAK2POLARITY_HIGH ((uint32_t)TIM_BDTR_BK2P) -/** - * @} - */ - -/** @defgroup TIM_AOE_Bit_Set_Reset TIM Automatic Output Enable - * @{ - */ -#define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE) -#define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3 - * @{ - */ -#define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */ -#define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */ -#define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */ -#define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */ -/** - * @} - */ - -/** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection - * @{ - */ -#define TIM_TRGO_RESET ((uint32_t)0x0000) -#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0) -#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1) -#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0)) -#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2) -#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0)) -#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1)) -#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0)) -/** - * @} - */ - -/** @defgroup TIM_Master_Mode_Selection_2 TIM Master Mode Selection 2 (TRGO2) - * @{ - */ -#define TIM_TRGO2_RESET ((uint32_t)0x00000000) -#define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0)) -#define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2)) -#define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3)) -#define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2)) -#define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -/** - * @} - */ - -/** @defgroup TIM_Master_Slave_Mode TIM Master/Slave Mode - * @{ - */ -#define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080) -#define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Slave_Mode TIM Slave mode - * @{ - */ -#define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000) -#define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2)) -#define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)) -#define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)) -#define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)) -#define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_and_PWM_modes TIM Output Compare and PWM Modes - * @{ - */ -#define TIM_OCMODE_TIMING ((uint32_t)0x0000) -#define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1) -#define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) -#define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2) - -#define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3) -#define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) -#define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2) -#define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) -#define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M) -/** - * @} - */ - -/** @defgroup TIM_Trigger_Selection TIM Trigger Selection - * @{ - */ -#define TIM_TS_ITR0 ((uint32_t)0x0000) -#define TIM_TS_ITR1 ((uint32_t)0x0010) -#define TIM_TS_ITR2 ((uint32_t)0x0020) -#define TIM_TS_ITR3 ((uint32_t)0x0030) -#define TIM_TS_TI1F_ED ((uint32_t)0x0040) -#define TIM_TS_TI1FP1 ((uint32_t)0x0050) -#define TIM_TS_TI2FP2 ((uint32_t)0x0060) -#define TIM_TS_ETRF ((uint32_t)0x0070) -#define TIM_TS_NONE ((uint32_t)0xFFFF) -/** - * @} - */ - -/** @defgroup TIM_Trigger_Polarity TIM Trigger Polarity - * @{ - */ -#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx trigger sources */ -#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx trigger sources */ -#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIxFPx or TI1_ED trigger sources */ -#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIxFPx or TI1_ED trigger sources */ -#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIxFPx or TI1_ED trigger sources */ -/** - * @} - */ - -/** @defgroup TIM_Trigger_Prescaler TIM Trigger Prescaler - * @{ - */ -#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ -#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Trigger: Capture performed once every 2 events. */ -#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Trigger: Capture performed once every 4 events. */ -#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Trigger: Capture performed once every 8 events. */ -/** - * @} - */ - -/** @defgroup TIM_TI1_Selection TIM TI1 Input Selection - * @{ - */ -#define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000) -#define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S) -/** - * @} - */ - -/** @defgroup TIM_DMA_Burst_Length TIM DMA Burst Length - * @{ - */ -#define TIM_DMABURSTLENGTH_1TRANSFER (0x00000000) -#define TIM_DMABURSTLENGTH_2TRANSFERS (0x00000100) -#define TIM_DMABURSTLENGTH_3TRANSFERS (0x00000200) -#define TIM_DMABURSTLENGTH_4TRANSFERS (0x00000300) -#define TIM_DMABURSTLENGTH_5TRANSFERS (0x00000400) -#define TIM_DMABURSTLENGTH_6TRANSFERS (0x00000500) -#define TIM_DMABURSTLENGTH_7TRANSFERS (0x00000600) -#define TIM_DMABURSTLENGTH_8TRANSFERS (0x00000700) -#define TIM_DMABURSTLENGTH_9TRANSFERS (0x00000800) -#define TIM_DMABURSTLENGTH_10TRANSFERS (0x00000900) -#define TIM_DMABURSTLENGTH_11TRANSFERS (0x00000A00) -#define TIM_DMABURSTLENGTH_12TRANSFERS (0x00000B00) -#define TIM_DMABURSTLENGTH_13TRANSFERS (0x00000C00) -#define TIM_DMABURSTLENGTH_14TRANSFERS (0x00000D00) -#define TIM_DMABURSTLENGTH_15TRANSFERS (0x00000E00) -#define TIM_DMABURSTLENGTH_16TRANSFERS (0x00000F00) -#define TIM_DMABURSTLENGTH_17TRANSFERS (0x00001000) -#define TIM_DMABURSTLENGTH_18TRANSFERS (0x00001100) -/** - * @} - */ - -/** @defgroup DMA_Handle_index TIM DMA Handle Index - * @{ - */ -#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /*!< Index of the DMA handle used for Update DMA requests */ -#define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /*!< Index of the DMA handle used for Capture/Compare 1 DMA requests */ -#define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /*!< Index of the DMA handle used for Capture/Compare 2 DMA requests */ -#define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /*!< Index of the DMA handle used for Capture/Compare 3 DMA requests */ -#define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /*!< Index of the DMA handle used for Capture/Compare 4 DMA requests */ -#define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x5) /*!< Index of the DMA handle used for Commutation DMA requests */ -#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /*!< Index of the DMA handle used for Trigger DMA requests */ -/** - * @} - */ - -/** @defgroup Channel_CC_State TIM Capture/Compare Channel State - * @{ - */ -#define TIM_CCx_ENABLE ((uint32_t)0x0001) -#define TIM_CCx_DISABLE ((uint32_t)0x0000) -#define TIM_CCxN_ENABLE ((uint32_t)0x0004) -#define TIM_CCxN_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Break_System TIM Break System - * @{ - */ -#define TIM_BREAK_SYSTEM_ECC SYSCFG_CFGR2_ECCL /*!< Enables and locks the ECC error signal with Break Input of TIM1/8/15/16/17 */ -#define TIM_BREAK_SYSTEM_PVD SYSCFG_CFGR2_PVDL /*!< Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVDE and PLS bits of the Power Control Interface */ -#define TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR SYSCFG_CFGR2_SPL /*!< Enables and locks the SRAM2_PARITY error signal with Break Input of TIM1/8/15/16/17 */ -#define TIM_BREAK_SYSTEM_LOCKUP SYSCFG_CFGR2_CLL /*!< Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/15/16/17 */ -/** - * @} - */ - -/** - * @} - */ -/* End of exported constants -------------------------------------------------*/ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup TIM_Exported_Macros TIM Exported Macros - * @{ - */ - -/** @brief Reset TIM handle state. - * @param __HANDLE__ TIM handle. - * @retval None - */ -#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET) - -/** - * @brief Enable the TIM peripheral. - * @param __HANDLE__ TIM handle - * @retval None - */ -#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN)) - -/** - * @brief Enable the TIM main Output. - * @param __HANDLE__ TIM handle - * @retval None - */ -#define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR|=(TIM_BDTR_MOE)) - -/** - * @brief Disable the TIM peripheral. - * @param __HANDLE__ TIM handle - * @retval None - */ -#define __HAL_TIM_DISABLE(__HANDLE__) \ - do { \ - if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \ - { \ - if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \ - { \ - (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \ - } \ - } \ - } while(0) - -/** - * @brief Disable the TIM main Output. - * @param __HANDLE__ TIM handle - * @retval None - * @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been disabled - */ -#define __HAL_TIM_MOE_DISABLE(__HANDLE__) \ - do { \ - if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \ - { \ - if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \ - { \ - (__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \ - } \ - } \ - } while(0) - -/** - * @brief Disable the TIM main Output. - * @param __HANDLE__ TIM handle - * @retval None - * @note The Main Output Enable of a timer instance is disabled unconditionally - */ -#define __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY(__HANDLE__) (__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE) - -/** @brief Enable the specified TIM interrupt. - * @param __HANDLE__ specifies the TIM Handle. - * @param __INTERRUPT__ specifies the TIM interrupt source to enable. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval None - */ -#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__)) - - -/** @brief Disable the specified TIM interrupt. - * @param __HANDLE__ specifies the TIM Handle. - * @param __INTERRUPT__ specifies the TIM interrupt source to disable. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval None - */ -#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__)) - -/** @brief Enable the specified DMA request. - * @param __HANDLE__ specifies the TIM Handle. - * @param __DMA__ specifies the TIM DMA request to enable. - * This parameter can be one of the following values: - * @arg TIM_DMA_UPDATE: Update DMA request - * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request - * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request - * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request - * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request - * @arg TIM_DMA_COM: Commutation DMA request - * @arg TIM_DMA_TRIGGER: Trigger DMA request - * @retval None - */ -#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__)) - -/** @brief Disable the specified DMA request. - * @param __HANDLE__ specifies the TIM Handle. - * @param __DMA__ specifies the TIM DMA request to disable. - * This parameter can be one of the following values: - * @arg TIM_DMA_UPDATE: Update DMA request - * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request - * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request - * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request - * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request - * @arg TIM_DMA_COM: Commutation DMA request - * @arg TIM_DMA_TRIGGER: Trigger DMA request - * @retval None - */ -#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__)) - -/** @brief Check whether the specified TIM interrupt flag is set or not. - * @param __HANDLE__ specifies the TIM Handle. - * @param __FLAG__ specifies the TIM interrupt flag to check. - * This parameter can be one of the following values: - * @arg TIM_FLAG_UPDATE: Update interrupt flag - * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag - * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag - * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag - * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag - * @arg TIM_FLAG_CC5: Compare 5 interrupt flag - * @arg TIM_FLAG_CC6: Compare 6 interrupt flag - * @arg TIM_FLAG_COM: Commutation interrupt flag - * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag - * @arg TIM_FLAG_BREAK: Break interrupt flag - * @arg TIM_FLAG_BREAK2: Break 2 interrupt flag - * @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag - * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag - * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag - * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag - * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__)) - -/** @brief Clear the specified TIM interrupt flag. - * @param __HANDLE__ specifies the TIM Handle. - * @param __FLAG__ specifies the TIM interrupt flag to clear. - * This parameter can be one of the following values: - * @arg TIM_FLAG_UPDATE: Update interrupt flag - * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag - * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag - * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag - * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag - * @arg TIM_FLAG_CC5: Compare 5 interrupt flag - * @arg TIM_FLAG_CC6: Compare 6 interrupt flag - * @arg TIM_FLAG_COM: Commutation interrupt flag - * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag - * @arg TIM_FLAG_BREAK: Break interrupt flag - * @arg TIM_FLAG_BREAK2: Break 2 interrupt flag - * @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag - * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag - * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag - * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag - * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) - -/** - * @brief Check whether the specified TIM interrupt source is enabled or not. - * @param __HANDLE__ TIM handle - * @param __INTERRUPT__ specifies the TIM interrupt source to check. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval The state of TIM_IT (SET or RESET). - */ -#define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) - -/** @brief Clear the TIM interrupt pending bits. - * @param __HANDLE__ TIM handle - * @param __INTERRUPT__ specifies the interrupt pending bit to clear. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval None - */ -#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__)) - -/** - * @brief Indicates whether or not the TIM Counter is used as downcounter. - * @param __HANDLE__ TIM handle. - * @retval False (Counter used as upcounter) or True (Counter used as downcounter) - * @note This macro is particularly useful to get the counting mode when the timer operates in Center-aligned mode or Encoder -mode. - */ -#define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR)) - - -/** - * @brief Set the TIM Prescaler on runtime. - * @param __HANDLE__ TIM handle. - * @param __PRESC__ specifies the Prescaler new value. - * @retval None - */ -#define __HAL_TIM_SET_PRESCALER(__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__)) - -/** - * @brief Set the TIM Counter Register value on runtime. - * @param __HANDLE__ TIM handle. - * @param __COUNTER__ specifies the Counter register new value. - * @retval None - */ -#define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__)) - -/** - * @brief Get the TIM Counter Register value on runtime. - * @param __HANDLE__ TIM handle. - * @retval 16-bit or 32-bit value of the timer counter register (TIMx_CNT) - */ -#define __HAL_TIM_GET_COUNTER(__HANDLE__) \ - ((__HANDLE__)->Instance->CNT) - -/** - * @brief Set the TIM Autoreload Register value on runtime without calling another time any Init function. - * @param __HANDLE__ TIM handle. - * @param __AUTORELOAD__ specifies the Counter register new value. - * @retval None - */ -#define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__) \ - do{ \ - (__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \ - (__HANDLE__)->Init.Period = (__AUTORELOAD__); \ - } while(0) - -/** - * @brief Get the TIM Autoreload Register value on runtime. - * @param __HANDLE__ TIM handle. - * @retval 16-bit or 32-bit value of the timer auto-reload register(TIMx_ARR) - */ -#define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) \ - ((__HANDLE__)->Instance->ARR) - -/** - * @brief Set the TIM Clock Division value on runtime without calling another time any Init function. - * @param __HANDLE__ TIM handle. - * @param __CKD__ specifies the clock division value. - * This parameter can be one of the following value: - * @arg TIM_CLOCKDIVISION_DIV1: tDTS=tCK_INT - * @arg TIM_CLOCKDIVISION_DIV2: tDTS=2*tCK_INT - * @arg TIM_CLOCKDIVISION_DIV4: tDTS=4*tCK_INT - * @retval None - */ -#define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__) \ - do{ \ - (__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \ - (__HANDLE__)->Instance->CR1 |= (__CKD__); \ - (__HANDLE__)->Init.ClockDivision = (__CKD__); \ - } while(0) - -/** - * @brief Get the TIM Clock Division value on runtime. - * @param __HANDLE__ TIM handle. - * @retval The clock division can be one of the following values: - * @arg TIM_CLOCKDIVISION_DIV1: tDTS=tCK_INT - * @arg TIM_CLOCKDIVISION_DIV2: tDTS=2*tCK_INT - * @arg TIM_CLOCKDIVISION_DIV4: tDTS=4*tCK_INT - */ -#define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) \ - ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD) - -/** - * @brief Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel() function. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param __ICPSC__ specifies the Input Capture4 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -#define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__) \ - do{ \ - TIM_RESET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__)); \ - TIM_SET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \ - } while(0) - -/** - * @brief Get the TIM Input Capture prescaler on runtime. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: get input capture 1 prescaler value - * @arg TIM_CHANNEL_2: get input capture 2 prescaler value - * @arg TIM_CHANNEL_3: get input capture 3 prescaler value - * @arg TIM_CHANNEL_4: get input capture 4 prescaler value - * @retval The input capture prescaler can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - */ -#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\ - (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8) - -/** - * @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @param __COMPARE__ specifies the Capture Compare register new value. - * @retval None - */ -#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\ - ((__HANDLE__)->Instance->CCR6 = (__COMPARE__))) - -/** - * @brief Get the TIM Capture Compare Register value on runtime. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channel associated with the capture compare register - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: get capture/compare 1 register value - * @arg TIM_CHANNEL_2: get capture/compare 2 register value - * @arg TIM_CHANNEL_3: get capture/compare 3 register value - * @arg TIM_CHANNEL_4: get capture/compare 4 register value - * @arg TIM_CHANNEL_5: get capture/compare 5 register value - * @arg TIM_CHANNEL_6: get capture/compare 6 register value - * @retval 16-bit or 32-bit value of the capture/compare register (TIMx_CCRy) - */ -#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\ - ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\ - ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\ - ((__HANDLE__)->Instance->CCR6)) - -/** - * @brief Set the TIM Output compare preload. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval None - */ -#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCMR3 |= TIM_CCMR3_OC5PE) :\ - ((__HANDLE__)->Instance->CCMR3 |= TIM_CCMR3_OC6PE)) - -/** - * @brief Reset the TIM Output compare preload. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval None - */ -#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC1PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC2PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC3PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC4PE) :\ - ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCMR3 &= (uint16_t)~TIM_CCMR3_OC5PE) :\ - ((__HANDLE__)->Instance->CCMR3 &= (uint16_t)~TIM_CCMR3_OC6PE)) - -/** - * @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register. - * @param __HANDLE__ TIM handle. - * @note When the USR bit of the TIMx_CR1 register is set, only counter - * overflow/underflow generates an update interrupt or DMA request (if - * enabled) - * @retval None - */ -#define __HAL_TIM_URS_ENABLE(__HANDLE__) \ - ((__HANDLE__)->Instance->CR1|= (TIM_CR1_URS)) - -/** - * @brief Reset the Update Request Source (URS) bit of the TIMx_CR1 register. - * @param __HANDLE__ TIM handle. - * @note When the USR bit of the TIMx_CR1 register is reset, any of the - * following events generate an update interrupt or DMA request (if - * enabled): - * _ Counter overflow underflow - * _ Setting the UG bit - * _ Update generation through the slave mode controller - * @retval None - */ -#define __HAL_TIM_URS_DISABLE(__HANDLE__) \ - ((__HANDLE__)->Instance->CR1&=~(TIM_CR1_URS)) - -/** - * @brief Set the TIM Capture x input polarity on runtime. - * @param __HANDLE__ TIM handle. - * @param __CHANNEL__ TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param __POLARITY__ Polarity for TIx source - * @arg TIM_INPUTCHANNELPOLARITY_RISING: Rising Edge - * @arg TIM_INPUTCHANNELPOLARITY_FALLING: Falling Edge - * @arg TIM_INPUTCHANNELPOLARITY_BOTHEDGE: Rising and Falling Edge - * @retval None - */ -#define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ - do{ \ - TIM_RESET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__)); \ - TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \ - }while(0) - -/** - * @} - */ -/* End of exported macros ----------------------------------------------------*/ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup TIM_Private_Constants TIM Private Constants - * @{ - */ -/* The counter of a timer instance is disabled only if all the CCx and CCxN - channels have been disabled */ -#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E)) -#define TIM_CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) -/** - * @} - */ -/* End of private constants --------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup TIM_Private_Macros TIM Private Macros - * @{ - */ - -#define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ - ((__MODE__) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \ - ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE)) - -#define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ - ((__BASE__) == TIM_DMABASE_CR2) || \ - ((__BASE__) == TIM_DMABASE_SMCR) || \ - ((__BASE__) == TIM_DMABASE_DIER) || \ - ((__BASE__) == TIM_DMABASE_SR) || \ - ((__BASE__) == TIM_DMABASE_EGR) || \ - ((__BASE__) == TIM_DMABASE_CCMR1) || \ - ((__BASE__) == TIM_DMABASE_CCMR2) || \ - ((__BASE__) == TIM_DMABASE_CCER) || \ - ((__BASE__) == TIM_DMABASE_CNT) || \ - ((__BASE__) == TIM_DMABASE_PSC) || \ - ((__BASE__) == TIM_DMABASE_ARR) || \ - ((__BASE__) == TIM_DMABASE_RCR) || \ - ((__BASE__) == TIM_DMABASE_CCR1) || \ - ((__BASE__) == TIM_DMABASE_CCR2) || \ - ((__BASE__) == TIM_DMABASE_CCR3) || \ - ((__BASE__) == TIM_DMABASE_CCR4) || \ - ((__BASE__) == TIM_DMABASE_BDTR) || \ - ((__BASE__) == TIM_DMABASE_CCMR3) || \ - ((__BASE__) == TIM_DMABASE_CCR5) || \ - ((__BASE__) == TIM_DMABASE_CCR6) || \ - ((__BASE__) == TIM_DMABASE_OR1) || \ - ((__BASE__) == TIM_DMABASE_OR2) || \ - ((__BASE__) == TIM_DMABASE_OR3)) - - -#define IS_TIM_EVENT_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFFFE00U) == 0x00000000U) && ((__SOURCE__) != 0x00000000U)) - - -#define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ - ((__MODE__) == TIM_COUNTERMODE_DOWN) || \ - ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \ - ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \ - ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3)) - -#define IS_TIM_CLOCKDIVISION_DIV(__DIV__) (((__DIV__) == TIM_CLOCKDIVISION_DIV1) || \ - ((__DIV__) == TIM_CLOCKDIVISION_DIV2) || \ - ((__DIV__) == TIM_CLOCKDIVISION_DIV4)) - -#define IS_TIM_AUTORELOAD_PRELOAD(PRELOAD) (((PRELOAD) == TIM_AUTORELOAD_PRELOAD_DISABLE) || \ - ((PRELOAD) == TIM_AUTORELOAD_PRELOAD_ENABLE)) - -#define IS_TIM_FAST_STATE(__STATE__) (((__STATE__) == TIM_OCFAST_DISABLE) || \ - ((__STATE__) == TIM_OCFAST_ENABLE)) - -#define IS_TIM_OC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCPOLARITY_HIGH) || \ - ((__POLARITY__) == TIM_OCPOLARITY_LOW)) - -#define IS_TIM_OCN_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCNPOLARITY_HIGH) || \ - ((__POLARITY__) == TIM_OCNPOLARITY_LOW)) - -#define IS_TIM_OCIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCIDLESTATE_SET) || \ - ((__STATE__) == TIM_OCIDLESTATE_RESET)) - -#define IS_TIM_OCNIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCNIDLESTATE_SET) || \ - ((__STATE__) == TIM_OCNIDLESTATE_RESET)) - -#define IS_TIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ICPOLARITY_RISING) || \ - ((__POLARITY__) == TIM_ICPOLARITY_FALLING) || \ - ((__POLARITY__) == TIM_ICPOLARITY_BOTHEDGE)) - -#define IS_TIM_IC_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_ICSELECTION_DIRECTTI) || \ - ((__SELECTION__) == TIM_ICSELECTION_INDIRECTTI) || \ - ((__SELECTION__) == TIM_ICSELECTION_TRC)) - -#define IS_TIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ICPSC_DIV1) || \ - ((__PRESCALER__) == TIM_ICPSC_DIV2) || \ - ((__PRESCALER__) == TIM_ICPSC_DIV4) || \ - ((__PRESCALER__) == TIM_ICPSC_DIV8)) - -#define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \ - ((__MODE__) == TIM_OPMODE_REPETITIVE)) - -#define IS_TIM_ENCODER_MODE(__MODE__) (((__MODE__) == TIM_ENCODERMODE_TI1) || \ - ((__MODE__) == TIM_ENCODERMODE_TI2) || \ - ((__MODE__) == TIM_ENCODERMODE_TI12)) - -#define IS_TIM_DMA_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFF80FFU) == 0x00000000U) && ((__SOURCE__) != 0x00000000U)) - -#define IS_TIM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ - ((__CHANNEL__) == TIM_CHANNEL_2) || \ - ((__CHANNEL__) == TIM_CHANNEL_3) || \ - ((__CHANNEL__) == TIM_CHANNEL_4) || \ - ((__CHANNEL__) == TIM_CHANNEL_5) || \ - ((__CHANNEL__) == TIM_CHANNEL_6) || \ - ((__CHANNEL__) == TIM_CHANNEL_ALL)) - -#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ - ((__CHANNEL__) == TIM_CHANNEL_2)) - -#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ - ((__CHANNEL__) == TIM_CHANNEL_2) || \ - ((__CHANNEL__) == TIM_CHANNEL_3)) - -#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1)) - -#define IS_TIM_CLOCKPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_RISING) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_FALLING) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_BOTHEDGE)) - -#define IS_TIM_CLOCKPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV1) || \ - ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV2) || \ - ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV4) || \ - ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV8)) - -#define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF) - -#define IS_TIM_CLEARINPUT_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLEARINPUTPOLARITY_INVERTED) || \ - ((__POLARITY__) == TIM_CLEARINPUTPOLARITY_NONINVERTED)) - -#define IS_TIM_CLEARINPUT_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV1) || \ - ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV2) || \ - ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV4) || \ - ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV8)) - -#define IS_TIM_CLEARINPUT_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF) - - -#define IS_TIM_OSSR_STATE(__STATE__) (((__STATE__) == TIM_OSSR_ENABLE) || \ - ((__STATE__) == TIM_OSSR_DISABLE)) - -#define IS_TIM_OSSI_STATE(__STATE__) (((__STATE__) == TIM_OSSI_ENABLE) || \ - ((__STATE__) == TIM_OSSI_DISABLE)) - -#define IS_TIM_LOCK_LEVEL(__LEVEL__) (((__LEVEL__) == TIM_LOCKLEVEL_OFF) || \ - ((__LEVEL__) == TIM_LOCKLEVEL_1) || \ - ((__LEVEL__) == TIM_LOCKLEVEL_2) || \ - ((__LEVEL__) == TIM_LOCKLEVEL_3)) - -#define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xF) - - -#define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \ - ((__STATE__) == TIM_BREAK_DISABLE)) - -#define IS_TIM_BREAK_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKPOLARITY_LOW) || \ - ((__POLARITY__) == TIM_BREAKPOLARITY_HIGH)) - -#define IS_TIM_BREAK2_STATE(__STATE__) (((__STATE__) == TIM_BREAK2_ENABLE) || \ - ((__STATE__) == TIM_BREAK2_DISABLE)) - -#define IS_TIM_BREAK2_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAK2POLARITY_LOW) || \ - ((__POLARITY__) == TIM_BREAK2POLARITY_HIGH)) - -#define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__) (((__STATE__) == TIM_AUTOMATICOUTPUT_ENABLE) || \ - ((__STATE__) == TIM_AUTOMATICOUTPUT_DISABLE)) - -#define IS_TIM_GROUPCH5(__OCREF__) ((((__OCREF__) & 0x1FFFFFFF) == 0x00000000)) - -#define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) || \ - ((__SOURCE__) == TIM_TRGO_ENABLE) || \ - ((__SOURCE__) == TIM_TRGO_UPDATE) || \ - ((__SOURCE__) == TIM_TRGO_OC1) || \ - ((__SOURCE__) == TIM_TRGO_OC1REF) || \ - ((__SOURCE__) == TIM_TRGO_OC2REF) || \ - ((__SOURCE__) == TIM_TRGO_OC3REF) || \ - ((__SOURCE__) == TIM_TRGO_OC4REF)) - -#define IS_TIM_TRGO2_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO2_RESET) || \ - ((__SOURCE__) == TIM_TRGO2_ENABLE) || \ - ((__SOURCE__) == TIM_TRGO2_UPDATE) || \ - ((__SOURCE__) == TIM_TRGO2_OC1) || \ - ((__SOURCE__) == TIM_TRGO2_OC1REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC2REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC3REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC3REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC5REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC6REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF_RISINGFALLING) || \ - ((__SOURCE__) == TIM_TRGO2_OC6REF_RISINGFALLING) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \ - ((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \ - ((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING)) - -#define IS_TIM_MSM_STATE(__STATE__) (((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) || \ - ((__STATE__) == TIM_MASTERSLAVEMODE_DISABLE)) - -#define IS_TIM_SLAVE_MODE(__MODE__) (((__MODE__) == TIM_SLAVEMODE_DISABLE) || \ - ((__MODE__) == TIM_SLAVEMODE_RESET) || \ - ((__MODE__) == TIM_SLAVEMODE_GATED) || \ - ((__MODE__) == TIM_SLAVEMODE_TRIGGER) || \ - ((__MODE__) == TIM_SLAVEMODE_EXTERNAL1) || \ - ((__MODE__) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER)) - -#define IS_TIM_PWM_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_PWM1) || \ - ((__MODE__) == TIM_OCMODE_PWM2) || \ - ((__MODE__) == TIM_OCMODE_COMBINED_PWM1) || \ - ((__MODE__) == TIM_OCMODE_COMBINED_PWM2) || \ - ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM1) || \ - ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM2)) - -#define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING) || \ - ((__MODE__) == TIM_OCMODE_ACTIVE) || \ - ((__MODE__) == TIM_OCMODE_INACTIVE) || \ - ((__MODE__) == TIM_OCMODE_TOGGLE) || \ - ((__MODE__) == TIM_OCMODE_FORCED_ACTIVE) || \ - ((__MODE__) == TIM_OCMODE_FORCED_INACTIVE) || \ - ((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \ - ((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM2)) - -#define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \ - ((__SELECTION__) == TIM_TS_ITR1) || \ - ((__SELECTION__) == TIM_TS_ITR2) || \ - ((__SELECTION__) == TIM_TS_ITR3) || \ - ((__SELECTION__) == TIM_TS_TI1F_ED) || \ - ((__SELECTION__) == TIM_TS_TI1FP1) || \ - ((__SELECTION__) == TIM_TS_TI2FP2) || \ - ((__SELECTION__) == TIM_TS_ETRF)) - -#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \ - ((__SELECTION__) == TIM_TS_ITR1) || \ - ((__SELECTION__) == TIM_TS_ITR2) || \ - ((__SELECTION__) == TIM_TS_ITR3) || \ - ((__SELECTION__) == TIM_TS_NONE)) - - -#define IS_TIM_TRIGGERPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_TRIGGERPOLARITY_INVERTED ) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_NONINVERTED) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_RISING ) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_FALLING ) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_BOTHEDGE )) - -#define IS_TIM_TRIGGERPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV1) || \ - ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV2) || \ - ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV4) || \ - ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV8)) - -#define IS_TIM_TRIGGERFILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF) - -#define IS_TIM_TI1SELECTION(__TI1SELECTION__) (((__TI1SELECTION__) == TIM_TI1SELECTION_CH1) || \ - ((__TI1SELECTION__) == TIM_TI1SELECTION_XORCOMBINATION)) - -#define IS_TIM_DMA_LENGTH(__LENGTH__) (((__LENGTH__) == TIM_DMABURSTLENGTH_1TRANSFER) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_2TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_3TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_4TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_5TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_6TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_7TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_8TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_9TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_10TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_11TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_12TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_13TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_14TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_15TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_16TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_17TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_18TRANSFERS)) - -#define IS_TIM_IC_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF) - -#define IS_TIM_DEADTIME(__DEADTIME__) ((__DEADTIME__) <= 0xFF) - -#define IS_TIM_BREAK_SYSTEM(__CONFIG__) (((__CONFIG__) == TIM_BREAK_SYSTEM_ECC) || \ - ((__CONFIG__) == TIM_BREAK_SYSTEM_PVD) || \ - ((__CONFIG__) == TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR) || \ - ((__CONFIG__) == TIM_BREAK_SYSTEM_LOCKUP)) - -#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\ - ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8))) - -#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\ - ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC)) - -#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8)) :\ - ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12)))) - -#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC3P | TIM_CCER_CC3NP)) :\ - ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC4P | TIM_CCER_CC4NP))) - -/** - * @} - */ -/* End of private macros -----------------------------------------------------*/ - -/* Include TIM HAL Extended module */ -#include "stm32l4xx_hal_tim_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup TIM_Exported_Functions TIM Exported Functions - * @{ - */ - -/** @addtogroup TIM_Exported_Functions_Group1 Time Base functions - * @brief Time Base functions - * @{ - */ -/* Time Base functions ********************************************************/ -HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group2 Time Output Compare functions - * @brief Time Output Compare functions - * @{ - */ -/* Timer Output Compare functions *********************************************/ -HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group3 Time PWM functions - * @brief Time PWM functions - * @{ - */ -/* Timer PWM functions ********************************************************/ -HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group4 Time Input Capture functions - * @brief Time Input Capture functions - * @{ - */ -/* Timer Input Capture functions **********************************************/ -HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group5 Time One Pulse functions - * @brief Time One Pulse functions - * @{ - */ -/* Timer One Pulse functions **************************************************/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode); -HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group6 Time Encoder functions - * @brief Time Encoder functions - * @{ - */ -/* Timer Encoder functions ****************************************************/ -HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig); -HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim); - /* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group7 TIM IRQ handler management - * @brief IRQ handler management - * @{ - */ -/* Interrupt Handler functions ***********************************************/ -void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions - * @brief Peripheral Control functions - * @{ - */ -/* Control functions *********************************************************/ -HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel); -HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig); -HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection); -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig); -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig); -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \ - uint32_t *BurstBuffer, uint32_t BurstLength); -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc); -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \ - uint32_t *BurstBuffer, uint32_t BurstLength); -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc); -HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource); -uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions - * @brief TIM Callbacks functions - * @{ - */ -/* Callback in non blocking modes (Interrupt and DMA) *************************/ -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions - * @brief Peripheral State functions - * @{ - */ -/* Peripheral State functions ************************************************/ -HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** - * @} - */ -/* End of exported functions -------------------------------------------------*/ - -/* Private functions----------------------------------------------------------*/ -/** @defgroup TIM_Private_Functions TIM Private Functions -* @{ -*/ -void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure); -void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter); -void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter); - -void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma); -void TIM_DMAError(DMA_HandleTypeDef *hdma); -void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma); -void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState); -/** -* @} -*/ -/* End of private functions --------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_TIM_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h deleted file mode 100644 index eae1c9a3..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_tim_ex.h +++ /dev/null @@ -1,484 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim_ex.h - * @author MCD Application Team - * @brief Header file of TIM HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_TIM_EX_H -#define __STM32L4xx_HAL_TIM_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup TIMEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types - * @{ - */ - -/** - * @brief TIM Hall sensor Configuration Structure definition - */ - -typedef struct -{ - - uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t IC1Filter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - - uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ -} TIM_HallSensor_InitTypeDef; - -/** - * @brief TIM Break/Break2 input configuration - */ -typedef struct { - uint32_t Source; /*!< Specifies the source of the timer break input. - This parameter can be a value of @ref TIMEx_Break_Input_Source */ - uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. - This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ - uint32_t Polarity; /*!< Specifies the break input source polarity. - This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity - Not relevant when analog watchdog output of the DFSDM1 used as break input source */ -} TIMEx_BreakInputConfigTypeDef; - -/** - * @} - */ -/* End of exported types -----------------------------------------------------*/ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants - * @{ - */ - -/** @defgroup TIMEx_Remap TIM Extended Remapping - * @{ - */ -#define TIM_TIM1_ETR_ADC1_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */ -#define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_OR1_ETR_ADC1_RMP_1) /* !< TIM1_ETR is connected to ADC1 AWD2 */ -#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */ -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) -#define TIM_TIM1_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD1 */ -#define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_OR1_ETR_ADC3_RMP_1) /* !< TIM1_ETR is connected to ADC3 AWD2 */ -#define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx */ -#define TIM_TIM1_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM1 TI1 is connected to GPIO */ -#define TIM_TIM1_TI1_COMP1 (TIM1_OR1_TI1_RMP) /* !< TIM1 TI1 is connected to COMP1 */ -#define TIM_TIM1_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM1_ETR is connected to GPIO */ -#define TIM_TIM1_ETR_COMP1 (TIM1_OR2_ETRSEL_0) /* !< TIM1_ETR is connected to COMP1 output */ -#define TIM_TIM1_ETR_COMP2 (TIM1_OR2_ETRSEL_1) /* !< TIM1_ETR is connected to COMP2 output */ - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM2_ITR1_TIM8_TRGO ((uint32_t)(0x00000000)) /* !< TIM2_ITR1 is connected to TIM8_TRGO */ -#define TIM_TIM2_ITR1_OTG_FS_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to OTG_FS SOF */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define TIM_TIM2_ITR1_NONE ((uint32_t)(0x00000000)) /* !< No internal trigger on TIM2_ITR1 */ -#define TIM_TIM2_ITR1_USB_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to USB SOF */ -#endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */ - /* STM32L451xx || STM32L452xx || STM32L462xx */ -#define TIM_TIM2_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM2_ETR is connected to GPIO */ -#define TIM_TIM2_ETR_LSE (TIM2_OR1_ETR1_RMP) /* !< TIM2_ETR is connected to LSE */ -#define TIM_TIM2_ETR_COMP1 (TIM2_OR2_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 output */ -#define TIM_TIM2_ETR_COMP2 (TIM2_OR2_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 output */ -#define TIM_TIM2_TI4_GPIO ((uint32_t)(0x00000000)) /* !< TIM2 TI4 is connected to GPIO */ -#define TIM_TIM2_TI4_COMP1 (TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to COMP1 output */ -#define TIM_TIM2_TI4_COMP2 (TIM2_OR1_TI4_RMP_1) /* !< TIM2 TI4 is connected to COMP2 output */ -#define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */ - -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM3_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM3 TI1 is connected to GPIO */ -#define TIM_TIM3_TI1_COMP1 (TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to COMP1 output */ -#define TIM_TIM3_TI1_COMP2 (TIM3_OR1_TI1_RMP_1) /* !< TIM3 TI1 is connected to COMP2 output */ -#define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */ -#define TIM_TIM3_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM3_ETR is connected to GPIO */ -#define TIM_TIM3_ETR_COMP1 (TIM3_OR2_ETRSEL_0) /* !< TIM3_ETR is connected to COMP1 output */ -#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) -#define TIM_TIM8_ETR_ADC2_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */ -#define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_OR1_ETR_ADC2_RMP_1) /* !< TIM8_ETR is connected to ADC2 AWD2 */ -#define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */ -#define TIM_TIM8_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD1 */ -#define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_OR1_ETR_ADC3_RMP_1) /* !< TIM8_ETR is connected to ADC3 AWD2 */ -#define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx */ -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM8_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM8 TI1 is connected to GPIO */ -#define TIM_TIM8_TI1_COMP2 (TIM8_OR1_TI1_RMP) /* !< TIM8 TI1 is connected to COMP1 */ -#define TIM_TIM8_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM8_ETR is connected to GPIO */ -#define TIM_TIM8_ETR_COMP1 (TIM8_OR2_ETRSEL_0) /* !< TIM8_ETR is connected to COMP1 output */ -#define TIM_TIM8_ETR_COMP2 (TIM8_OR2_ETRSEL_1) /* !< TIM8_ETR is connected to COMP2 output */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#define TIM_TIM15_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM15 TI1 is connected to GPIO */ -#define TIM_TIM15_TI1_LSE (TIM15_OR1_TI1_RMP) /* !< TIM15 TI1 is connected to LSE */ -#define TIM_TIM15_ENCODERMODE_NONE ((uint32_t)(0x00000000)) /* !< No redirection */ -#define TIM_TIM15_ENCODERMODE_TIM2 (TIM15_OR1_ENCODER_MODE_0) /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM15_ENCODERMODE_TIM3 (TIM15_OR1_ENCODER_MODE_1) /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ -#endif /* STM32L451xx || STM32L452xx || STM32L462xx */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#define TIM_TIM16_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM16 TI1 is connected to GPIO */ -#define TIM_TIM16_TI1_LSI (TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to LSI */ -#define TIM_TIM16_TI1_LSE (TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to LSE */ -#define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */ -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) -#define TIM_TIM16_TI1_MSI (TIM16_OR1_TI1_RMP_2) /* !< TIM16 TI1 is connected to MSI */ -#define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */ -#define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */ -#endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */ - /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L496xx || STM32L4A6xx */ - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_TIM17_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM17 TI1 is connected to GPIO */ -#define TIM_TIM17_TI1_MSI (TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MSI */ -#define TIM_TIM17_TI1_HSE_32 (TIM17_OR1_TI1_RMP_1) /* !< TIM17 TI1 is connected to HSE div 32 */ -#define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */ -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input TIM Extended Break input - * @{ - */ -#define TIM_BREAKINPUT_BRK ((uint32_t)(0x00000001)) /* !< Timer break input */ -#define TIM_BREAKINPUT_BRK2 ((uint32_t)(0x00000002)) /* !< Timer break2 input */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source - * @{ - */ -#define TIM_BREAKINPUTSOURCE_BKIN ((uint32_t)(0x00000001)) /* !< An external source (GPIO) is connected to the BKIN pin */ -#define TIM_BREAKINPUTSOURCE_COMP1 ((uint32_t)(0x00000002)) /* !< The COMP1 output is connected to the break input */ -#define TIM_BREAKINPUTSOURCE_COMP2 ((uint32_t)(0x00000004)) /* !< The COMP2 output is connected to the break input */ -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define TIM_BREAKINPUTSOURCE_DFSDM1 ((uint32_t)(0x00000008)) /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */ -#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling - * @{ - */ -#define TIM_BREAKINPUTSOURCE_DISABLE ((uint32_t)(0x00000000)) /* !< Break input source is disabled */ -#define TIM_BREAKINPUTSOURCE_ENABLE ((uint32_t)(0x00000001)) /* !< Break input source is enabled */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity - * @{ - */ -#define TIM_BREAKINPUTSOURCE_POLARITY_LOW ((uint32_t)(0x00000001)) /* !< Break input source is active low */ -#define TIM_BREAKINPUTSOURCE_POLARITY_HIGH ((uint32_t)(0x00000000)) /* !< Break input source is active_high */ -/** - * @} - */ - -/** - * @} - */ -/* End of exported constants -------------------------------------------------*/ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros - * @{ - */ - -/** - * @} - */ -/* End of exported macro -----------------------------------------------------*/ - -/* Private macro -------------------------------------------------------------*/ -/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros - * @{ - */ -#define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F)) - -#define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ - ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) - -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1)) -#else -#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2)) -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ - ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) - -#define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ - ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) -/** - * @} - */ -/* End of private macro ------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions - * @{ - */ - -/** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions - * @brief Timer Hall Sensor functions - * @{ - */ -/* Timer Hall Sensor functions **********************************************/ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); - -void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); - - /* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions - * @brief Timer Complementary Output Compare functions - * @{ - */ -/* Timer Complementary Output Compare functions *****************************/ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); - -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); - -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions - * @brief Timer Complementary PWM functions - * @{ - */ -/* Timer Complementary PWM functions ****************************************/ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); - -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions - * @brief Timer Complementary One Pulse functions - * @{ - */ -/* Timer Complementary One Pulse functions **********************************/ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); - -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions - * @brief Peripheral Control functions - * @{ - */ -/* Extended Control functions ************************************************/ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); -HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig); -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); -HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); -HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); - -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions - * @brief Extended Callbacks functions - * @{ - */ -/* Extended Callback **********************************************************/ -void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim); -void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions - * @brief Extended Peripheral State functions - * @{ - */ -/* Extended Peripheral State functions ***************************************/ -HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** - * @} - */ -/* End of exported functions -------------------------------------------------*/ - -/* Private functions----------------------------------------------------------*/ -/** @defgroup TIMEx_Private_Functions TIMEx Private Functions -* @{ -*/ -void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); -/** -* @} -*/ -/* End of private functions --------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_TIM_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h deleted file mode 100644 index c1b04893..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h +++ /dev/null @@ -1,1638 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_uart.h - * @author MCD Application Team - * @brief Header file of UART HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_UART_H -#define __STM32L4xx_HAL_UART_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup UART - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup UART_Exported_Types UART Exported Types - * @{ - */ - -/** - * @brief UART Init Structure definition - */ -typedef struct -{ - uint32_t BaudRate; /*!< This member configures the UART communication baud rate. - The baud rate register is computed using the following formula: - UART: - ===== - - If oversampling is 16 or in LIN mode, - Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) - - If oversampling is 8, - Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4] - Baud Rate Register[3] = 0 - Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1 - LPUART: - ======= - Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) - - where (uart/lpuart)_ker_ck_pres is the UART input clock divided by a prescaler */ - - uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. - This parameter can be a value of @ref UARTEx_Word_Length. */ - - uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. - This parameter can be a value of @ref UART_Stop_Bits. */ - - uint32_t Parity; /*!< Specifies the parity mode. - This parameter can be a value of @ref UART_Parity - @note When parity is enabled, the computed parity is inserted - at the MSB position of the transmitted data (9th bit when - the word length is set to 9 data bits; 8th bit when the - word length is set to 8 data bits). */ - - uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. - This parameter can be a value of @ref UART_Mode. */ - - uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled - or disabled. - This parameter can be a value of @ref UART_Hardware_Flow_Control. */ - - uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). - This parameter can be a value of @ref UART_Over_Sampling. */ - - uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. - Selecting the single sample method increases the receiver tolerance to clock - deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ - -#if defined(USART_PRESC_PRESCALER) - uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. - This parameter can be a value of @ref UART_ClockPrescaler. */ -#endif - -}UART_InitTypeDef; - -/** - * @brief UART Advanced Features initalization structure definition - */ -typedef struct -{ - uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several - Advanced Features may be initialized at the same time . - This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ - - uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. - This parameter can be a value of @ref UART_Tx_Inv. */ - - uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. - This parameter can be a value of @ref UART_Rx_Inv. */ - - uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic - vs negative/inverted logic). - This parameter can be a value of @ref UART_Data_Inv. */ - - uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. - This parameter can be a value of @ref UART_Rx_Tx_Swap. */ - - uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. - This parameter can be a value of @ref UART_Overrun_Disable. */ - - uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. - This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ - - uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. - This parameter can be a value of @ref UART_AutoBaudRate_Enable */ - - uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate - detection is carried out. - This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ - - uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. - This parameter can be a value of @ref UART_MSB_First. */ -} UART_AdvFeatureInitTypeDef; - - - -/** - * @brief HAL UART State structures definition - * @note HAL UART State value is a combination of 2 different substates: gState and RxState. - * - gState contains UART state information related to global Handle management - * and also information related to Tx operations. - * gState value coding follow below described bitmap : - * b7-b6 Error information - * 00 : No Error - * 01 : (Not Used) - * 10 : Timeout - * 11 : Error - * b5 IP initilisation status - * 0 : Reset (IP not initialized) - * 1 : Init done (IP not initialized. HAL UART Init function already called) - * b4-b3 (not used) - * xx : Should be set to 00 - * b2 Intrinsic process state - * 0 : Ready - * 1 : Busy (IP busy with some configuration or internal operations) - * b1 (not used) - * x : Should be set to 0 - * b0 Tx state - * 0 : Ready (no Tx operation ongoing) - * 1 : Busy (Tx operation ongoing) - * - RxState contains information related to Rx operations. - * RxState value coding follow below described bitmap : - * b7-b6 (not used) - * xx : Should be set to 00 - * b5 IP initilisation status - * 0 : Reset (IP not initialized) - * 1 : Init done (IP not initialized) - * b4-b2 (not used) - * xxx : Should be set to 000 - * b1 Rx state - * 0 : Ready (no Rx operation ongoing) - * 1 : Busy (Rx operation ongoing) - * b0 (not used) - * x : Should be set to 0. - */ -typedef enum -{ - HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized - Value is allowed for gState and RxState */ - HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use - Value is allowed for gState and RxState */ - HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing - Value is allowed for gState only */ - HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing - Value is allowed for gState only */ - HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing - Value is allowed for RxState only */ - HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing - Not to be used for neither gState nor RxState. - Value is result of combination (Or) between gState and RxState values */ - HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state - Value is allowed for gState only */ - HAL_UART_STATE_ERROR = 0xE0U /*!< Error - Value is allowed for gState only */ -}HAL_UART_StateTypeDef; - -/** - * @brief HAL UART Error Code structure definition - */ -typedef enum -{ - HAL_UART_ERROR_NONE = 0x00U, /*!< No error */ - HAL_UART_ERROR_PE = 0x01U, /*!< Parity error */ - HAL_UART_ERROR_NE = 0x02U, /*!< Noise error */ - HAL_UART_ERROR_FE = 0x04U, /*!< frame error */ - HAL_UART_ERROR_ORE = 0x08U, /*!< Overrun error */ - HAL_UART_ERROR_DMA = 0x10U /*!< DMA transfer error */ -}HAL_UART_ErrorTypeDef; - -/** - * @brief UART clock sources definition - */ -typedef enum -{ - UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ - UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ - UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ - UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ - UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ - UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ -}UART_ClockSourceTypeDef; - -/** - * @brief UART handle Structure definition - */ -typedef struct __UART_HandleTypeDef -{ - USART_TypeDef *Instance; /*!< UART registers base address */ - - UART_InitTypeDef Init; /*!< UART communication parameters */ - - UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ - - uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ - - uint16_t TxXferSize; /*!< UART Tx Transfer size */ - - __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ - - uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ - - uint16_t RxXferSize; /*!< UART Rx Transfer size */ - - __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ - - uint16_t Mask; /*!< UART Rx RDR register mask */ - -#if defined(USART_CR1_FIFOEN) - uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ - - uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ - - uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. - This parameter can be a value of @ref UARTEx_FIFO_mode. */ -#endif - -#if defined(USART_CR2_SLVEN) - uint32_t SlaveMode; /*!< Specifies if the UART SPI Slave mode is being used. - This parameter can be a value of @ref UARTEx_Slave_Mode. */ -#endif - - void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ - - void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ - - DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ - - DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ - - HAL_LockTypeDef Lock; /*!< Locking object */ - - __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management - and also related to Tx operations. - This parameter can be a value of @ref HAL_UART_StateTypeDef */ - - __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. - This parameter can be a value of @ref HAL_UART_StateTypeDef */ - - __IO uint32_t ErrorCode; /*!< UART Error code */ - -}UART_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup UART_Exported_Constants UART Exported Constants - * @{ - */ - -/** @defgroup UART_Stop_Bits UART Number of Stop Bits - * @{ - */ -#define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ -#define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ -#define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ -#define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ -/** - * @} - */ - -/** @defgroup UART_Parity UART Parity - * @{ - */ -#define UART_PARITY_NONE 0x00000000U /*!< No parity */ -#define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ -#define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ -/** - * @} - */ - -/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control - * @{ - */ -#define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ -#define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ -#define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ -#define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ -/** - * @} - */ - -/** @defgroup UART_Mode UART Transfer Mode - * @{ - */ -#define UART_MODE_RX USART_CR1_RE /*!< RX mode */ -#define UART_MODE_TX USART_CR1_TE /*!< TX mode */ -#define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ -/** - * @} - */ - -/** @defgroup UART_State UART State - * @{ - */ -#define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ -#define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ -/** - * @} - */ - -/** @defgroup UART_Over_Sampling UART Over Sampling - * @{ - */ -#define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ -#define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ -/** - * @} - */ - -/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method - * @{ - */ -#define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ -#define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ -/** - * @} - */ - -#if defined(USART_PRESC_PRESCALER) -/** @defgroup UART_ClockPrescaler UART Clock Prescaler - * @{ - */ -#define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ -#define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ -#define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ -#define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ -#define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ -#define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ -#define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ -#define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ -#define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ -#define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ -#define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ -#define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ -/** - * @} - */ -#endif - -/** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode - * @{ - */ -#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ -#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ -#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ -#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ -/** - * @} - */ - -/** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut - * @{ - */ -#define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART receiver timeout disable */ -#define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART receiver timeout enable */ -/** - * @} - */ - -/** @defgroup UART_LIN UART Local Interconnection Network mode - * @{ - */ -#define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ -#define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ -/** - * @} - */ - -/** @defgroup UART_LIN_Break_Detection UART LIN Break Detection - * @{ - */ -#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ -#define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ -/** - * @} - */ - -/** @defgroup UART_DMA_Tx UART DMA Tx - * @{ - */ -#define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ -#define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ -/** - * @} - */ - -/** @defgroup UART_DMA_Rx UART DMA Rx - * @{ - */ -#define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ -#define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ -/** - * @} - */ - -/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection - * @{ - */ -#define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ -#define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ -/** - * @} - */ - -/** @defgroup UART_WakeUp_Methods UART WakeUp Methods - * @{ - */ -#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ -#define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ -/** - * @} - */ - -/** @defgroup UART_Request_Parameters UART Request Parameters - * @{ - */ -#define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ -#define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ -#define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ -#define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ -#define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ -/** - * @} - */ - -/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type - * @{ - */ -#define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ -#define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ -#define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ -#define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ -#define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ -#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ -#define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ -#define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ -#define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ -/** - * @} - */ - -/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion - * @{ - */ -#define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ -#define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ -/** - * @} - */ - -/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion - * @{ - */ -#define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ -#define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ -/** - * @} - */ - -/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion - * @{ - */ -#define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ -#define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ -/** - * @} - */ - -/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap - * @{ - */ -#define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ -#define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ -/** - * @} - */ - -/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable - * @{ - */ -#define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ -#define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ -/** - * @} - */ - -/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable - * @{ - */ -#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ -#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ -/** - * @} - */ - -/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error - * @{ - */ -#define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ -#define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ -/** - * @} - */ - -/** @defgroup UART_MSB_First UART Advanced Feature MSB First - * @{ - */ -#define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ -#define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ -/** - * @} - */ - -/** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable - * @{ - */ -#define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ -#define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ -/** - * @} - */ - -/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable - * @{ - */ -#define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ -#define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ -/** - * @} - */ - -/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register - * @{ - */ -#define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ -/** - * @} - */ - -/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection - * @{ - */ -#define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ -#define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ -#define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ -/** - * @} - */ - -/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity - * @{ - */ -#define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ -#define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ -/** - * @} - */ - -/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register - * @{ - */ -#define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ -/** - * @} - */ - -/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register - * @{ - */ -#define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ -/** - * @} - */ - -/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask - * @{ - */ -#define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ -/** - * @} - */ - -/** @defgroup UART_TimeOut_Value UART polling-based communications time-out value - * @{ - */ -#define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ -/** - * @} - */ - -/** @defgroup UART_Flags UART Status Flags - * Elements values convention: 0xXXXX - * - 0xXXXX : Flag mask in the ISR register - * @{ - */ -#define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ -#define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ -#define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ -#define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ -#define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ -#define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ -#define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ -#define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ -#define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ -#define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ -#define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ -#define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ -#define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ -#define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ -#define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ -#define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ -#if defined(USART_CR1_FIFOEN) -#define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ -#define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ -#else -#define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ -#endif -#define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ -#if defined(USART_CR1_FIFOEN) -#define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ -#define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ -#else -#define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ -#endif -#define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ -#define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ -#define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ -#define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ -#define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ -/** - * @} - */ - -/** @defgroup UART_Interrupt_definition UART Interrupts Definition - * Elements values convention: 000ZZZZZ0XXYYYYYb - * - YYYYY : Interrupt source position in the XX register (5bits) - * - XX : Interrupt source register (2bits) - * - 01: CR1 register - * - 10: CR2 register - * - 11: CR3 register - * - ZZZZZ : Flag position in the ISR register(5bits) - * @{ - */ -#define UART_IT_PE 0x0028U /*!< UART parity error interruption */ -#define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ -#if defined(USART_CR1_FIFOEN) -#define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ -#endif -#define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ -#define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ -#if defined(USART_CR1_FIFOEN) -#define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ -#endif -#define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ -#define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ -#define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ -#define UART_IT_CM 0x112EU /*!< UART character match interruption */ -#define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ -#if defined(USART_CR1_FIFOEN) -#define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ -#define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ -#define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ -#define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ -#endif - -/* Elements values convention: 000000000XXYYYYYb - - YYYYY : Interrupt source position in the XX register (5bits) - - XX : Interrupt source register (2bits) - - 01: CR1 register - - 10: CR2 register - - 11: CR3 register */ -#define UART_IT_ERR 0x0060U /*!< UART error interruption */ - -/* Elements values convention: 0000ZZZZ00000000b - - ZZZZ : Flag position in the ISR register(4bits) */ -#define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ -#define UART_IT_NE 0x0200U /*!< UART noise error interruption */ -#define UART_IT_FE 0x0100U /*!< UART frame error interruption */ -/** - * @} - */ - -/** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags - * @{ - */ -#define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ -#define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ -#define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ -#define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ -#define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ -#if defined(USART_CR1_FIFOEN) -#define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ -#endif -#define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ -#define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ -#define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ -#define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ -#define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ -/** - * @} - */ - - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup UART_Exported_Macros UART Exported Macros - * @{ - */ - -/** @brief Reset UART handle states. - * @param __HANDLE__ UART handle. - * @retval None - */ -#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ - (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ - (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ - } while(0) -/** @brief Flush the UART Data registers. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ - do{ \ - SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ - SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ - } while(0) - -/** @brief Clear the specified UART pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @param __FLAG__ specifies the flag to check. - * This parameter can be any combination of the following values: - * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag - * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag - * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag - * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag - * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag - * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag - * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag - * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag - * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag - * @arg @ref UART_CLEAR_CMF Character Match Clear Flag - * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag - * @retval None - */ -#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) - -/** @brief Clear the UART PE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) - -/** @brief Clear the UART FE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) - -/** @brief Clear the UART NE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) - -/** @brief Clear the UART ORE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) - -/** @brief Clear the UART IDLE pending flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) - -#if defined(USART_CR1_FIFOEN) -/** @brief Clear the UART TX FIFO empty clear flag. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) -#endif - -/** @brief Check whether the specified UART flag is set or not. - * @param __HANDLE__ specifies the UART Handle. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag - * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag - * @arg @ref UART_FLAG_RXFF RXFIFO Full flag - * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag - * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag - * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag - * @arg @ref UART_FLAG_WUF Wake up from stop mode flag - * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) - * @arg @ref UART_FLAG_SBKF Send Break flag - * @arg @ref UART_FLAG_CMF Character match flag - * @arg @ref UART_FLAG_BUSY Busy flag - * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag - * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag - * @arg @ref UART_FLAG_CTS CTS Change flag - * @arg @ref UART_FLAG_LBDF LIN Break detection flag - * @arg @ref UART_FLAG_TXE Transmit data register empty flag - * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag - * @arg @ref UART_FLAG_TC Transmission Complete flag - * @arg @ref UART_FLAG_RXNE Receive data register not empty flag - * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag - * @arg @ref UART_FLAG_IDLE Idle Line detection flag - * @arg @ref UART_FLAG_ORE Overrun Error flag - * @arg @ref UART_FLAG_NE Noise Error flag - * @arg @ref UART_FLAG_FE Framing Error flag - * @arg @ref UART_FLAG_PE Parity Error flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) - -/** @brief Enable the specified UART interrupt. - * @param __HANDLE__ specifies the UART Handle. - * @param __INTERRUPT__ specifies the UART interrupt source to enable. - * This parameter can be one of the following values: - * @arg @ref UART_IT_RXFF RXFIFO Full interrupt - * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt - * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt - * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt - * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt - * @arg @ref UART_IT_CM Character match interrupt - * @arg @ref UART_IT_CTS CTS change interrupt - * @arg @ref UART_IT_LBD LIN Break detection interrupt - * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt - * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt - * @arg @ref UART_IT_TC Transmission complete interrupt - * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt - * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt - * @arg @ref UART_IT_IDLE Idle line detection interrupt - * @arg @ref UART_IT_PE Parity Error interrupt - * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ - ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) - - -/** @brief Disable the specified UART interrupt. - * @param __HANDLE__ specifies the UART Handle. - * @param __INTERRUPT__ specifies the UART interrupt source to disable. - * This parameter can be one of the following values: - * @arg @ref UART_IT_RXFF RXFIFO Full interrupt - * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt - * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt - * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt - * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt - * @arg @ref UART_IT_CM Character match interrupt - * @arg @ref UART_IT_CTS CTS change interrupt - * @arg @ref UART_IT_LBD LIN Break detection interrupt - * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt - * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt - * @arg @ref UART_IT_TC Transmission complete interrupt - * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt - * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt - * @arg @ref UART_IT_IDLE Idle line detection interrupt - * @arg @ref UART_IT_PE Parity Error interrupt - * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ - ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) - -/** @brief Check whether the specified UART interrupt has occurred or not. - * @param __HANDLE__ specifies the UART Handle. - * @param __INTERRUPT__ specifies the UART interrupt to check. - * This parameter can be one of the following values: - * @arg @ref UART_IT_RXFF RXFIFO Full interrupt - * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt - * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt - * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt - * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt - * @arg @ref UART_IT_CM Character match interrupt - * @arg @ref UART_IT_CTS CTS change interrupt - * @arg @ref UART_IT_LBD LIN Break detection interrupt - * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt - * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt - * @arg @ref UART_IT_TC Transmission complete interrupt - * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt - * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt - * @arg @ref UART_IT_IDLE Idle line detection interrupt - * @arg @ref UART_IT_PE Parity Error interrupt - * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) - -/** @brief Check whether the specified UART interrupt source is enabled or not. - * @param __HANDLE__ specifies the UART Handle. - * @param __INTERRUPT__ specifies the UART interrupt source to check. - * This parameter can be one of the following values: - * @arg @ref UART_IT_RXFF RXFIFO Full interrupt - * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt - * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt - * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt - * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt - * @arg @ref UART_IT_CM Character match interrupt - * @arg @ref UART_IT_CTS CTS change interrupt - * @arg @ref UART_IT_LBD LIN Break detection interrupt - * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt - * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt - * @arg @ref UART_IT_TC Transmission complete interrupt - * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt - * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt - * @arg @ref UART_IT_IDLE Idle line detection interrupt - * @arg @ref UART_IT_PE Parity Error interrupt - * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ - (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ - (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) - -/** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. - * @param __HANDLE__ specifies the UART Handle. - * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set - * to clear the corresponding interrupt - * This parameter can be one of the following values: - * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag - * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag - * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag - * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag - * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag - * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag - * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag - * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag - * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag - * @arg @ref UART_CLEAR_CMF Character Match Clear Flag - * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag - * @retval None - */ -#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) - -/** @brief Set a specific UART request flag. - * @param __HANDLE__ specifies the UART Handle. - * @param __REQ__ specifies the request flag to set - * This parameter can be one of the following values: - * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request - * @arg @ref UART_SENDBREAK_REQUEST Send Break Request - * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request - * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request - * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request - * @retval None - */ -#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__)) - -/** @brief Enable the UART one bit sample method. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) - -/** @brief Disable the UART one bit sample method. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) - -/** @brief Enable UART. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) - -/** @brief Disable UART. - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) - -/** @brief Enable CTS flow control. - * @note This macro allows to enable CTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ - do{ \ - SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ - (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ - } while(0) - -/** @brief Disable CTS flow control. - * @note This macro allows to disable CTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ - do{ \ - CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ - (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ - } while(0) - -/** @brief Enable RTS flow control. - * @note This macro allows to enable RTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ - do{ \ - SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ - (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ - } while(0) - -/** @brief Disable RTS flow control. - * @note This macro allows to disable RTS hardware flow control for a given UART instance, - * without need to call HAL_UART_Init() function. - * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. - * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need - * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : - * - UART instance should have already been initialised (through call of HAL_UART_Init() ) - * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) - * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). - * @param __HANDLE__ specifies the UART Handle. - * @retval None - */ -#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ - do{ \ - CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ - (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ - } while(0) -/** - * @} - */ - -/* Private variables -----------------------------------------------------*/ -#if defined(USART_PRESC_PRESCALER) -/** @defgroup UART_Private_Variables UART Private Variables - * @{ - */ -static const uint16_t UARTPrescTable[12] = {1, 2, 4, 6, 8, 10, 12, 16, 32, 64, 128, 256}; -/** - * @} - */ -#endif - -/* Private macros --------------------------------------------------------*/ -/** @defgroup UART_Private_Macros UART Private Macros - * @{ - */ -#if defined(USART_PRESC_PRESCALER) - -/** @brief BRR division operation to set BRR register with LPUART. - * @param __PCLK__ LPUART clock. - * @param __BAUD__ Baud rate set by the user. - * @param __CLOCKPRESCALER__ UART prescaler value. - * @retval Division result - */ -#define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((((uint64_t)(__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*256)) + ((__BAUD__)/2)) / (__BAUD__)) - -/** @brief BRR division operation to set BRR register in 8-bit oversampling mode. - * @param __PCLK__ UART clock. - * @param __BAUD__ Baud rate set by the user. - * @param __CLOCKPRESCALER__ UART prescaler value. - * @retval Division result - */ -#define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2) + ((__BAUD__)/2)) / (__BAUD__)) - -/** @brief BRR division operation to set BRR register in 16-bit oversampling mode. - * @param __PCLK__ UART clock. - * @param __BAUD__ Baud rate set by the user. - * @param __CLOCKPRESCALER__ UART prescaler value. - * @retval Division result - */ -#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2)) / (__BAUD__)) - -#else - -/** @brief BRR division operation to set BRR register with LPUART. - * @param __PCLK__ LPUART clock. - * @param __BAUD__ Baud rate set by the user. - * @retval Division result - */ -#define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256)) + ((__BAUD__)/2)) / (__BAUD__)) - -/** @brief BRR division operation to set BRR register in 8-bit oversampling mode. - * @param __PCLK__ UART clock. - * @param __BAUD__ Baud rate set by the user. - * @retval Division result - */ -#define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2) + ((__BAUD__)/2)) / (__BAUD__)) - -/** @brief BRR division operation to set BRR register in 16-bit oversampling mode. - * @param __PCLK__ UART clock. - * @param __BAUD__ Baud rate set by the user. - * @retval Division result - */ -#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2)) / (__BAUD__)) - -#endif /* USART_PRESC_PRESCALER */ - -/** @brief Check whether or not UART instance is Low Power UART. - * @param __HANDLE__ specifies the UART Handle. - * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) - */ -#define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE(__HANDLE__->Instance)) - -/** @brief Check UART Baud rate. - * @param __BAUDRATE__ Baudrate specified by the user. - * The maximum Baud Rate is derived from the maximum clock on G0 (i.e. 52 MHz) - * divided by the smallest oversampling used on the USART (i.e. 8) - * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) - */ -#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6500001U) - -/** @brief Check UART assertion time. - * @param __TIME__ 5-bit value assertion time. - * @retval Test result (TRUE or FALSE). - */ -#define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) - -/** @brief Check UART deassertion time. - * @param __TIME__ 5-bit value deassertion time. - * @retval Test result (TRUE or FALSE). - */ -#define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) - -/** - * @brief Ensure that UART frame number of stop bits is valid. - * @param __STOPBITS__ UART frame number of stop bits. - * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) - */ -#define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ - ((__STOPBITS__) == UART_STOPBITS_1) || \ - ((__STOPBITS__) == UART_STOPBITS_1_5) || \ - ((__STOPBITS__) == UART_STOPBITS_2)) - -/** - * @brief Ensure that LPUART frame number of stop bits is valid. - * @param __STOPBITS__ LPUART frame number of stop bits. - * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) - */ -#define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ - ((__STOPBITS__) == UART_STOPBITS_2)) - -/** - * @brief Ensure that UART frame parity is valid. - * @param __PARITY__ UART frame parity. - * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) - */ -#define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ - ((__PARITY__) == UART_PARITY_EVEN) || \ - ((__PARITY__) == UART_PARITY_ODD)) - -/** - * @brief Ensure that UART hardware flow control is valid. - * @param __CONTROL__ UART hardware flow control. - * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) - */ -#define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ - (((__CONTROL__) == UART_HWCONTROL_NONE) || \ - ((__CONTROL__) == UART_HWCONTROL_RTS) || \ - ((__CONTROL__) == UART_HWCONTROL_CTS) || \ - ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) - -/** - * @brief Ensure that UART communication mode is valid. - * @param __MODE__ UART communication mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) - -/** - * @brief Ensure that UART state is valid. - * @param __STATE__ UART state. - * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) - */ -#define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ - ((__STATE__) == UART_STATE_ENABLE)) - -/** - * @brief Ensure that UART oversampling is valid. - * @param __SAMPLING__ UART oversampling. - * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) - */ -#define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ - ((__SAMPLING__) == UART_OVERSAMPLING_8)) - -/** - * @brief Ensure that UART frame sampling is valid. - * @param __ONEBIT__ UART frame sampling. - * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) - */ -#define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ - ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) - -/** - * @brief Ensure that UART auto Baud rate detection mode is valid. - * @param __MODE__ UART auto Baud rate detection mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ - ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ - ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ - ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) - -/** - * @brief Ensure that UART receiver timeout setting is valid. - * @param __TIMEOUT__ UART receiver timeout setting. - * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) - */ -#define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ - ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) - -/** - * @brief Ensure that UART LIN state is valid. - * @param __LIN__ UART LIN state. - * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) - */ -#define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ - ((__LIN__) == UART_LIN_ENABLE)) - -/** - * @brief Ensure that UART LIN break detection length is valid. - * @param __LENGTH__ UART LIN break detection length. - * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) - */ -#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ - ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) - -/** - * @brief Ensure that UART DMA TX state is valid. - * @param __DMATX__ UART DMA TX state. - * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) - */ -#define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ - ((__DMATX__) == UART_DMA_TX_ENABLE)) - -/** - * @brief Ensure that UART DMA RX state is valid. - * @param __DMARX__ UART DMA RX state. - * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) - */ -#define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ - ((__DMARX__) == UART_DMA_RX_ENABLE)) - -/** - * @brief Ensure that UART half-duplex state is valid. - * @param __HDSEL__ UART half-duplex state. - * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) - */ -#define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ - ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) - -/** - * @brief Ensure that UART wake-up method is valid. - * @param __WAKEUP__ UART wake-up method . - * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) - */ -#define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ - ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) - -/** - * @brief Ensure that UART request parameter is valid. - * @param __PARAM__ UART request parameter. - * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) - */ -#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ - ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ - ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ - ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ - ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) - -/** - * @brief Ensure that UART advanced features initialization is valid. - * @param __INIT__ UART advanced features initialization. - * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) - */ -#define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ - UART_ADVFEATURE_TXINVERT_INIT | \ - UART_ADVFEATURE_RXINVERT_INIT | \ - UART_ADVFEATURE_DATAINVERT_INIT | \ - UART_ADVFEATURE_SWAP_INIT | \ - UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ - UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ - UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ - UART_ADVFEATURE_MSBFIRST_INIT)) - -/** - * @brief Ensure that UART frame TX inversion setting is valid. - * @param __TXINV__ UART frame TX inversion setting. - * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) - */ -#define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ - ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) - -/** - * @brief Ensure that UART frame RX inversion setting is valid. - * @param __RXINV__ UART frame RX inversion setting. - * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) - */ -#define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ - ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) - -/** - * @brief Ensure that UART frame data inversion setting is valid. - * @param __DATAINV__ UART frame data inversion setting. - * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) - */ -#define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ - ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) - -/** - * @brief Ensure that UART frame RX/TX pins swap setting is valid. - * @param __SWAP__ UART frame RX/TX pins swap setting. - * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) - */ -#define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ - ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) - -/** - * @brief Ensure that UART frame overrun setting is valid. - * @param __OVERRUN__ UART frame overrun setting. - * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) - */ -#define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ - ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) - -/** - * @brief Ensure that UART auto Baud rate state is valid. - * @param __AUTOBAUDRATE__ UART auto Baud rate state. - * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) - */ -#define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ - ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) - -/** - * @brief Ensure that UART DMA enabling or disabling on error setting is valid. - * @param __DMA__ UART DMA enabling or disabling on error setting. - * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) - */ -#define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ - ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) - -/** - * @brief Ensure that UART frame MSB first setting is valid. - * @param __MSBFIRST__ UART frame MSB first setting. - * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) - */ -#define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ - ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) - -/** - * @brief Ensure that UART stop mode state is valid. - * @param __STOPMODE__ UART stop mode state. - * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) - */ -#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ - ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) - -/** - * @brief Ensure that UART mute mode state is valid. - * @param __MUTE__ UART mute mode state. - * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) - */ -#define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ - ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) - -/** - * @brief Ensure that UART wake-up selection is valid. - * @param __WAKE__ UART wake-up selection. - * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) - */ -#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ - ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ - ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) - -/** - * @brief Ensure that UART driver enable polarity is valid. - * @param __POLARITY__ UART driver enable polarity. - * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) - */ -#define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ - ((__POLARITY__) == UART_DE_POLARITY_LOW)) - -#if defined(USART_PRESC_PRESCALER) -/** - * @brief Ensure that UART Prescaler is valid. - * @param __CLOCKPRESCALER__ UART Prescaler value. - * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) - */ -#define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ - ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) -#endif - -#if defined(USART_CR1_FIFOEN) -/** - * @brief Ensure that UART TXFIFO threshold level is valid. - * @param __THRESHOLD__ UART TXFIFO threshold level. - * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) - */ -#define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) - -/** - * @brief Ensure that UART RXFIFO threshold level is valid. - * @param __THRESHOLD__ UART RXFIFO threshold level. - * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) - */ -#define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) -#endif - -/** - * @} - */ - -/* Include UART HAL Extended module */ -#include "stm32l4xx_hal_uart_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup UART_Exported_Functions UART Exported Functions - * @{ - */ - -/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ - -/* Initialization and de-initialization functions ****************************/ -HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); -HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); -HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart); -void HAL_UART_MspInit(UART_HandleTypeDef *huart); -void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); - -/** - * @} - */ - -/** @addtogroup UART_Exported_Functions_Group2 IO operation functions - * @{ - */ - -/* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); -/* Transfer Abort functions */ -HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); - -void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); -void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); -void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); -void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart); -void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart); -void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart); - -/** - * @} - */ - -/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ - -/* Peripheral Control functions ************************************************/ -HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); -void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); - -/** - * @} - */ - -/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions - * @{ - */ - -/* Peripheral State and Errors functions **************************************************/ -HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); -uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); - -/** - * @} - */ - -/** - * @} - */ - -/* Private functions -----------------------------------------------------------*/ -/** @addtogroup UART_Private_Functions UART Private Functions - * @{ - */ - -HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); -HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); -HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout); -void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_UART_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h deleted file mode 100644 index 06d6c927..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h +++ /dev/null @@ -1,771 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_uart_ex.h - * @author MCD Application Team - * @brief Header file of UART HAL Extended module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_UART_EX_H -#define __STM32L4xx_HAL_UART_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup UARTEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup UARTEx_Exported_Types UARTEx Exported Types - * @{ - */ - -/** - * @brief UART wake up from stop mode parameters - */ -typedef struct -{ - uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF). - This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. - If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must - be filled up. */ - - uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. - This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ - - uint8_t Address; /*!< UART/USART node address (7-bit long max). */ -} UART_WakeUpTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants - * @{ - */ - -/** @defgroup UARTEx_Word_Length UARTEx Word Length - * @{ - */ -#define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ -#define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ -#define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ -/** - * @} - */ - -/** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length - * @{ - */ -#define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ -#define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ -/** - * @} - */ - -#if defined(USART_CR2_SLVEN) -/** @defgroup UARTEx_Slave_Select_management UARTEx Slave Select Management - * @{ - */ -#define UART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */ -#define UART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */ -/** - * @} - */ -#endif - -#if defined(USART_CR1_FIFOEN) -/** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level - * @brief UART TXFIFO level - * @{ - */ -#define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ -#define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ -#define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ -#define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ -#define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ -#define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ -/** - * @} - */ - -/** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level - * @brief UART RXFIFO level - * @{ - */ -#define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ -#define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ -#define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ -#define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ -#define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ -#define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ -/** - * @} - */ -#endif - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup UARTEx_Exported_Functions - * @{ - */ - -/** @addtogroup UARTEx_Exported_Functions_Group1 - * @{ - */ - -/* Initialization and de-initialization functions ****************************/ -HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime); - -/** - * @} - */ - -/** @addtogroup UARTEx_Exported_Functions_Group2 - * @{ - */ - -/* IO operation functions *****************************************************/ -void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); - -#if defined(USART_CR1_FIFOEN) -void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); -void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); -#endif - -/** - * @} - */ - -/** @addtogroup UARTEx_Exported_Functions_Group3 - * @{ - */ - -/* Peripheral Control functions **********************************************/ -HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); -HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); - -#if defined(USART_CR2_SLVEN) -HAL_StatusTypeDef HAL_UARTEx_EnableSlaveMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UARTEx_DisableSlaveMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UARTEx_ConfigNSS(UART_HandleTypeDef *huart, uint32_t NSSConfig); -#endif - -#if defined(USART_CR1_FIFOEN) -HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); -HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); -HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); -#endif - - -/** - * @} - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup UARTEx_Private_Constants UARTEx Private Constants - * @{ - */ -#if defined(USART_CR2_SLVEN) -/** @defgroup UARTEx_Slave_Mode UARTEx Synchronous Slave mode - * @{ - */ -#define UART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */ -#define UART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */ -/** - * @} - */ -#endif - -#if defined(USART_CR1_FIFOEN) -/** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode - * @{ - */ -#define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ -#define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ -/** - * @} - */ -#endif -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup UARTEx_Private_Macros UARTEx Private Macros - * @{ - */ - -/** @brief Report the UART clock source. - * @param __HANDLE__ specifies the UART Handle. - * @param __CLOCKSOURCE__ output variable. - * @retval UART clocking source, written in __CLOCKSOURCE__. - */ -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART3) \ - { \ - switch(__HAL_RCC_GET_USART3_SOURCE()) \ - { \ - case RCC_USART3CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART3CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART3CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART3CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == UART4) \ - { \ - switch(__HAL_RCC_GET_UART4_SOURCE()) \ - { \ - case RCC_UART4CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_UART4CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_UART4CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_UART4CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == UART5) \ - { \ - switch(__HAL_RCC_GET_UART5_SOURCE()) \ - { \ - case RCC_UART5CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_UART5CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_UART5CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_UART5CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == LPUART1) \ - { \ - switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ - { \ - case RCC_LPUART1CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_LPUART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_LPUART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_LPUART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) -#elif defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) -#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART3) \ - { \ - switch(__HAL_RCC_GET_USART3_SOURCE()) \ - { \ - case RCC_USART3CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART3CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART3CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART3CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == LPUART1) \ - { \ - switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ - { \ - case RCC_LPUART1CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_LPUART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_LPUART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_LPUART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) -#elif defined (STM32L432xx) || defined (STM32L442xx) -#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == LPUART1) \ - { \ - switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ - { \ - case RCC_LPUART1CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_LPUART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_LPUART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_LPUART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) -#elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART3) \ - { \ - switch(__HAL_RCC_GET_USART3_SOURCE()) \ - { \ - case RCC_USART3CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART3CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART3CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART3CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == UART4) \ - { \ - switch(__HAL_RCC_GET_UART4_SOURCE()) \ - { \ - case RCC_UART4CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_UART4CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_UART4CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_UART4CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == LPUART1) \ - { \ - switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ - { \ - case RCC_LPUART1CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_LPUART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_LPUART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_LPUART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) -#endif - -/** @brief Report the UART mask to apply to retrieve the received data - * according to the word length and to the parity bits activation. - * @note If PCE = 1, the parity bit is not included in the data extracted - * by the reception API(). - * This masking operation is not carried out in the case of - * DMA transfers. - * @param __HANDLE__: specifies the UART Handle. - * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. - */ -#define UART_MASK_COMPUTATION(__HANDLE__) \ - do { \ - if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ - { \ - if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x01FF ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x00FF ; \ - } \ - } \ - else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ - { \ - if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x00FF ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x007F ; \ - } \ - } \ - else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ - { \ - if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x007F ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x003F ; \ - } \ - } \ -} while(0) - - -/** - * @brief Ensure that UART frame length is valid. - * @param __LENGTH__ UART frame length. - * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) - */ -#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ - ((__LENGTH__) == UART_WORDLENGTH_8B) || \ - ((__LENGTH__) == UART_WORDLENGTH_9B)) - -/** - * @brief Ensure that UART wake-up address length is valid. - * @param __ADDRESS__ UART wake-up address length. - * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) - */ -#define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ - ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) - -#if defined(USART_CR2_SLVEN) -/** - * @brief Ensure that UART Negative Slave Select (NSS) pin management is valid. - * @param __NSS__ UART Negative Slave Select pin management. - * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid) - */ -#define IS_UART_NSS(__NSS__) (((__NSS__) == UART_NSS_HARD) || \ - ((__NSS__) == UART_NSS_SOFT)) -#endif - -#if defined(USART_CR1_FIFOEN) -/** - * @brief Ensure that UART TXFIFO threshold level is valid. - * @param __THRESHOLD__ UART TXFIFO threshold level. - * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) - */ -#define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ - ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) - -/** - * @brief Ensure that USART RXFIFO threshold level is valid. - * @param __THRESHOLD__ USART RXFIFO threshold level. - * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) - */ -#define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ - ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) -#endif - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_UART_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h deleted file mode 100644 index d4a19ed6..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h +++ /dev/null @@ -1,617 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_ll_usb.h - * @author MCD Application Team - * @brief Header file of USB Core HAL module. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_LL_USB_H -#define __STM32L4xx_LL_USB_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL - * @{ - */ - -/** @addtogroup USB_Core - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** - * @brief USB Mode definition - */ -typedef enum -{ - USB_DEVICE_MODE = 0, - USB_HOST_MODE = 1, - USB_DRD_MODE = 2 - -}USB_ModeTypeDef; - -#if defined (USB_OTG_FS) -/** - * @brief URB States definition - */ -typedef enum { - URB_IDLE = 0, - URB_DONE, - URB_NOTREADY, - URB_NYET, - URB_ERROR, - URB_STALL - -}USB_OTG_URBStateTypeDef; - -/** - * @brief Host channel States definition - */ -typedef enum { - HC_IDLE = 0, - HC_XFRC, - HC_HALTED, - HC_NAK, - HC_NYET, - HC_STALL, - HC_XACTERR, - HC_BBLERR, - HC_DATATGLERR - -}USB_OTG_HCStateTypeDef; - -/** - * @brief PCD Initialization Structure definition - */ -typedef struct -{ - uint32_t dev_endpoints; /*!< Device Endpoints number. - This parameter depends on the used USB core. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint32_t Host_channels; /*!< Host Channels number. - This parameter Depends on the used USB core. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint32_t speed; /*!< USB Core speed. - This parameter can be any value of @ref USB_Core_Speed_ */ - - uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */ - - uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. - This parameter can be any value of @ref USB_EP0_MPS_ */ - - uint32_t phy_itface; /*!< Select the used PHY interface. - This parameter can be any value of @ref USB_Core_PHY_ */ - - uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ - - uint32_t low_power_enable; /*!< Enable or disable the low power mode. */ - - uint32_t lpm_enable; /*!< Enable or disable Battery charging. */ - - uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ - - uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */ - - uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */ - - uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */ - -}USB_OTG_CfgTypeDef; - -typedef struct -{ - uint8_t num; /*!< Endpoint number - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint8_t is_in; /*!< Endpoint direction - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t is_stall; /*!< Endpoint stall condition - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t type; /*!< Endpoint type - This parameter can be any value of @ref USB_EP_Type_ */ - - uint8_t data_pid_start; /*!< Initial data PID - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t even_odd_frame; /*!< IFrame parity - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint16_t tx_fifo_num; /*!< Transmission FIFO number - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint32_t maxpacket; /*!< Endpoint Max packet size - This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ - - uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ - - uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */ - - uint32_t xfer_len; /*!< Current transfer length */ - - uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ - -}USB_OTG_EPTypeDef; - -typedef struct -{ - uint8_t dev_addr ; /*!< USB device address. - This parameter must be a number between Min_Data = 1 and Max_Data = 255 */ - - uint8_t ch_num; /*!< Host channel number. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint8_t ep_num; /*!< Endpoint number. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint8_t ep_is_in; /*!< Endpoint direction - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t speed; /*!< USB Host speed. - This parameter can be any value of @ref USB_Core_Speed_ */ - - uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */ - - uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */ - - uint8_t ep_type; /*!< Endpoint Type. - This parameter can be any value of @ref USB_EP_Type_ */ - - uint16_t max_packet; /*!< Endpoint Max packet size. - This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ - - uint8_t data_pid; /*!< Initial data PID. - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */ - - uint32_t xfer_len; /*!< Current transfer length. */ - - uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */ - - uint8_t toggle_in; /*!< IN transfer current toggle flag. - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t toggle_out; /*!< OUT transfer current toggle flag - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */ - - uint32_t ErrCnt; /*!< Host channel error count.*/ - - USB_OTG_URBStateTypeDef urb_state; /*!< URB state. - This parameter can be any value of @ref USB_OTG_URBStateTypeDef */ - - USB_OTG_HCStateTypeDef state; /*!< Host Channel state. - This parameter can be any value of @ref USB_OTG_HCStateTypeDef */ - -}USB_OTG_HCTypeDef; -#endif /* USB_OTG_FS */ - -#if defined (USB) -/** - * @brief USB Initialization Structure definition - */ -typedef struct -{ - uint32_t dev_endpoints; /*!< Device Endpoints number. - This parameter depends on the used USB core. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint32_t speed; /*!< USB Core speed. - This parameter can be any value of @ref USB_Core_Speed */ - - uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */ - - uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. - This parameter can be any value of @ref USB_EP0_MPS */ - - uint32_t phy_itface; /*!< Select the used PHY interface. - This parameter can be any value of @ref USB_Core_PHY */ - - uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ - - uint32_t low_power_enable; /*!< Enable or disable Low Power mode */ - - uint32_t lpm_enable; /*!< Enable or disable Battery charging. */ - - uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ -} USB_CfgTypeDef; - -typedef struct -{ - uint8_t num; /*!< Endpoint number - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint8_t is_in; /*!< Endpoint direction - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t is_stall; /*!< Endpoint stall condition - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t type; /*!< Endpoint type - This parameter can be any value of @ref USB_EP_Type */ - - uint16_t pmaadress; /*!< PMA Address - This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ - - uint16_t pmaaddr0; /*!< PMA Address0 - This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ - - uint16_t pmaaddr1; /*!< PMA Address1 - This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ - - uint8_t doublebuffer; /*!< Double buffer enable - This parameter can be 0 or 1 */ - - uint16_t tx_fifo_num; /*!< This parameter is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral - This parameter is added to ensure compatibility across USB peripherals */ - - uint32_t maxpacket; /*!< Endpoint Max packet size - This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ - - uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ - - uint32_t xfer_len; /*!< Current transfer length */ - - uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ - -} USB_EPTypeDef; -#endif /* USB */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup PCD_Exported_Constants PCD Exported Constants - * @{ - */ -#if defined (USB_OTG_FS) -/** @defgroup USB_Core_Mode_ USB Core Mode - * @{ - */ -#define USB_OTG_MODE_DEVICE 0 -#define USB_OTG_MODE_HOST 1 -#define USB_OTG_MODE_DRD 2 -/** - * @} - */ - -/** @defgroup USB_Core_Speed_ USB Core Speed - * @{ - */ -#define USB_OTG_SPEED_HIGH 0 -#define USB_OTG_SPEED_HIGH_IN_FULL 1 -#define USB_OTG_SPEED_LOW 2 -#define USB_OTG_SPEED_FULL 3 -/** - * @} - */ - -/** @defgroup USB_Core_PHY_ USB Core PHY - * @{ - */ -#define USB_OTG_EMBEDDED_PHY 1 -/** - * @} - */ - -/** @defgroup USB_Core_MPS_ USB Core MPS - * @{ - */ -#define USB_OTG_FS_MAX_PACKET_SIZE 64 -#define USB_OTG_MAX_EP0_SIZE 64 -/** - * @} - */ - -/** @defgroup USB_Core_Phy_Frequency_ USB Core Phy Frequency - * @{ - */ -#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0 << 1) -#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1 << 1) -#define DSTS_ENUMSPD_LS_PHY_6MHZ (2 << 1) -#define DSTS_ENUMSPD_FS_PHY_48MHZ (3 << 1) -/** - * @} - */ - -/** @defgroup USB_CORE_Frame_Interval_ USB CORE Frame Interval - * @{ - */ -#define DCFG_FRAME_INTERVAL_80 0 -#define DCFG_FRAME_INTERVAL_85 1 -#define DCFG_FRAME_INTERVAL_90 2 -#define DCFG_FRAME_INTERVAL_95 3 -/** - * @} - */ - -/** @defgroup USB_EP0_MPS_ USB EP0 MPS - * @{ - */ -#define DEP0CTL_MPS_64 0 -#define DEP0CTL_MPS_32 1 -#define DEP0CTL_MPS_16 2 -#define DEP0CTL_MPS_8 3 -/** - * @} - */ - -/** @defgroup USB_EP_Speed_ USB EP Speed - * @{ - */ -#define EP_SPEED_LOW 0 -#define EP_SPEED_FULL 1 -#define EP_SPEED_HIGH 2 -/** - * @} - */ - -/** @defgroup USB_EP_Type_ USB EP Type - * @{ - */ -#define EP_TYPE_CTRL 0 -#define EP_TYPE_ISOC 1 -#define EP_TYPE_BULK 2 -#define EP_TYPE_INTR 3 -#define EP_TYPE_MSK 3 -/** - * @} - */ - -/** @defgroup USB_STS_Defines_ USB STS Defines - * @{ - */ -#define STS_GOUT_NAK 1 -#define STS_DATA_UPDT 2 -#define STS_XFER_COMP 3 -#define STS_SETUP_COMP 4 -#define STS_SETUP_UPDT 6 -/** - * @} - */ - -/** @defgroup HCFG_SPEED_Defines_ HCFG SPEED Defines - * @{ - */ -#define HCFG_30_60_MHZ 0 -#define HCFG_48_MHZ 1 -#define HCFG_6_MHZ 2 -/** - * @} - */ - -/** @defgroup HPRT0_PRTSPD_SPEED_Defines_ HPRT0 PRTSPD SPEED Defines - * @{ - */ -#define HPRT0_PRTSPD_HIGH_SPEED 0 -#define HPRT0_PRTSPD_FULL_SPEED 1 -#define HPRT0_PRTSPD_LOW_SPEED 2 -/** - * @} - */ - -#define HCCHAR_CTRL 0 -#define HCCHAR_ISOC 1 -#define HCCHAR_BULK 2 -#define HCCHAR_INTR 3 - -#define HC_PID_DATA0 0 -#define HC_PID_DATA2 1 -#define HC_PID_DATA1 2 -#define HC_PID_SETUP 3 - -#define GRXSTS_PKTSTS_IN 2 -#define GRXSTS_PKTSTS_IN_XFER_COMP 3 -#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5 -#define GRXSTS_PKTSTS_CH_HALTED 7 - -#define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE) -#define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE) - -#define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE)) -#define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) -#define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) -#define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE) - -#define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE)) -#define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE)) - -#endif /* USB_OTG_FS */ - -#if defined (USB) -/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS - * @{ - */ -#define DEP0CTL_MPS_64 0 -#define DEP0CTL_MPS_32 1 -#define DEP0CTL_MPS_16 2 -#define DEP0CTL_MPS_8 3 -/** - * @} - */ - -/** @defgroup USB_LL_EP_Type USB Low Layer EP Type - * @{ - */ -#define EP_TYPE_CTRL 0 -#define EP_TYPE_ISOC 1 -#define EP_TYPE_BULK 2 -#define EP_TYPE_INTR 3 -#define EP_TYPE_MSK 3 -/** - * @} - */ - -#define BTABLE_ADDRESS (0x000) -#endif /* USB */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -#if defined (USB_OTG_FS) -#define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__)) -#define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__)) - -#define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__)) -#define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__)) -#endif /* USB_OTG_FS */ - -/* Exported functions --------------------------------------------------------*/ -#if defined (USB_OTG_FS) -HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init); -HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init); -HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_ModeTypeDef mode); -HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed); -HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num ); -HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); -HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); -HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); -void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); -HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); -HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address); -HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup); -uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum); -uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum); -void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt); - -HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg); -HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq); -HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state); -uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx); -uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, - uint8_t ch_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps); -HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma); -uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num); -HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num); -HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx); -HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx); -#endif /* USB_OTG_FS */ - -#if defined (USB) -HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef Init); -HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef Init); -HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx , USB_ModeTypeDef mode); -HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx , uint8_t speed); -HAL_StatusTypeDef USB_FlushRxFifo (USB_TypeDef *USBx); -HAL_StatusTypeDef USB_FlushTxFifo (USB_TypeDef *USBx, uint32_t num ); -HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx , USB_EPTypeDef *ep ,uint8_t dma); -HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len); -void * USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len); -HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx , USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx , USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_SetDevAddress (USB_TypeDef *USBx, uint8_t address); -HAL_StatusTypeDef USB_DevConnect (USB_TypeDef *USBx); -HAL_StatusTypeDef USB_DevDisconnect (USB_TypeDef *USBx); -HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t dma, uint8_t *psetup); -uint32_t USB_ReadInterrupts (USB_TypeDef *USBx); -uint32_t USB_ReadDevAllOutEpInterrupt (USB_TypeDef *USBx); -uint32_t USB_ReadDevOutEPInterrupt (USB_TypeDef *USBx , uint8_t epnum); -uint32_t USB_ReadDevAllInEpInterrupt (USB_TypeDef *USBx); -uint32_t USB_ReadDevInEPInterrupt (USB_TypeDef *USBx , uint8_t epnum); -void USB_ClearInterrupts (USB_TypeDef *USBx, uint32_t interrupt); - -HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx); -void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); -void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); -#endif /* USB */ -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_LL_USB_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c deleted file mode 100644 index 18706063..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c +++ /dev/null @@ -1,693 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal.c - * @author MCD Application Team - * @brief HAL module driver. - * This is the common part of the HAL initialization - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The common HAL driver contains a set of generic and common APIs that can be - used by the PPP peripheral drivers and the user to start using the HAL. - [..] - The HAL contains two APIs' categories: - (+) Common HAL APIs - (+) Services HAL APIs - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup HAL HAL - * @brief HAL module driver - * @{ - */ - -#ifdef HAL_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** - * @brief STM32L4xx HAL Driver version number - */ -#define __STM32L4xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */ -#define __STM32L4xx_HAL_VERSION_SUB1 (0x08) /*!< [23:16] sub1 version */ -#define __STM32L4xx_HAL_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */ -#define __STM32L4xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */ -#define __STM32L4xx_HAL_VERSION ((__STM32L4xx_HAL_VERSION_MAIN << 24)\ - |(__STM32L4xx_HAL_VERSION_SUB1 << 16)\ - |(__STM32L4xx_HAL_VERSION_SUB2 << 8 )\ - |(__STM32L4xx_HAL_VERSION_RC)) - -#if defined(VREFBUF) -#define VREFBUF_TIMEOUT_VALUE (uint32_t)10 /* 10 ms (to be confirmed) */ -#endif /* VREFBUF */ - -/* ------------ SYSCFG registers bit address in the alias region ------------ */ -#define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE) -/* --- MEMRMP Register ---*/ -/* Alias word address of FB_MODE bit */ -#define MEMRMP_OFFSET SYSCFG_OFFSET -#define FB_MODE_BitNumber ((uint8_t)0x8) -#define FB_MODE_BB (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (FB_MODE_BitNumber * 4)) - -/* --- SCSR Register ---*/ -/* Alias word address of SRAM2ER bit */ -#define SCSR_OFFSET (SYSCFG_OFFSET + 0x18) -#define BRER_BitNumber ((uint8_t)0x0) -#define SCSR_SRAM2ER_BB (PERIPH_BB_BASE + (SCSR_OFFSET * 32) + (BRER_BitNumber * 4)) - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -__IO uint32_t uwTick; - -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup HAL_Exported_Functions HAL Exported Functions - * @{ - */ - -/** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions - * @brief Initialization and de-initialization functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Initialize the Flash interface the NVIC allocation and initial time base - clock configuration. - (+) De-initialize common part of the HAL. - (+) Configure the time base source to have 1ms time base with a dedicated - Tick interrupt priority. - (++) SysTick timer is used by default as source of time base, but user - can eventually implement his proper time base source (a general purpose - timer for example or other time source), keeping in mind that Time base - duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and - handled in milliseconds basis. - (++) Time base configuration function (HAL_InitTick ()) is called automatically - at the beginning of the program after reset by HAL_Init() or at any time - when clock is configured, by HAL_RCC_ClockConfig(). - (++) Source of time base is configured to generate interrupts at regular - time intervals. Care must be taken if HAL_Delay() is called from a - peripheral ISR process, the Tick interrupt line must have higher priority - (numerically lower) than the peripheral interrupt. Otherwise the caller - ISR process will be blocked. - (++) functions affecting time base configurations are declared as __weak - to make override possible in case of other implementations in user file. -@endverbatim - * @{ - */ - -/** - * @brief Configure the Flash prefetch, the Instruction and Data caches, - * the time base source, NVIC and any required global low level hardware - * by calling the HAL_MspInit() callback function to be optionally defined in user file - * stm32l4xx_hal_msp.c. - * - * @note HAL_Init() function is called at the beginning of program after reset and before - * the clock configuration. - * - * @note In the default implementation the System Timer (Systick) is used as source of time base. - * The Systick configuration is based on MSI clock, as MSI is the clock - * used after a system Reset and the NVIC configuration is set to Priority group 4. - * Once done, time base tick starts incrementing: the tick variable counter is incremented - * each 1ms in the SysTick_Handler() interrupt handler. - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_Init(void) -{ - /* Configure Flash prefetch, Instruction cache, Data cache */ - /* Default configuration at reset is: */ - /* - Prefetch disabled */ - /* - Instruction cache enabled */ - /* - Data cache enabled */ -#if (INSTRUCTION_CACHE_ENABLE == 0) - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); -#endif /* INSTRUCTION_CACHE_ENABLE */ - -#if (DATA_CACHE_ENABLE == 0) - __HAL_FLASH_DATA_CACHE_DISABLE(); -#endif /* DATA_CACHE_ENABLE */ - -#if (PREFETCH_ENABLE != 0) - __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); -#endif /* PREFETCH_ENABLE */ - - /* Set Interrupt Group Priority */ - HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - - /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */ - HAL_InitTick(TICK_INT_PRIORITY); - - /* Init the low level hardware */ - HAL_MspInit(); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief De-initialize common part of the HAL and stop the source of time base. - * @note This function is optional. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DeInit(void) -{ - /* Reset of all peripherals */ - __HAL_RCC_APB1_FORCE_RESET(); - __HAL_RCC_APB1_RELEASE_RESET(); - - __HAL_RCC_APB2_FORCE_RESET(); - __HAL_RCC_APB2_RELEASE_RESET(); - - __HAL_RCC_AHB1_FORCE_RESET(); - __HAL_RCC_AHB1_RELEASE_RESET(); - - __HAL_RCC_AHB2_FORCE_RESET(); - __HAL_RCC_AHB2_RELEASE_RESET(); - - __HAL_RCC_AHB3_FORCE_RESET(); - __HAL_RCC_AHB3_RELEASE_RESET(); - - /* De-Init the low level hardware */ - HAL_MspDeInit(); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Initialize the MSP. - * @retval None - */ -__weak void HAL_MspInit(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the MSP. - * @retval None - */ -__weak void HAL_MspDeInit(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief This function configures the source of the time base: - * The time source is configured to have 1ms time base with a dedicated - * Tick interrupt priority. - * @note This function is called automatically at the beginning of program after - * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig(). - * @note In the default implementation, SysTick timer is the source of time base. - * It is used to generate interrupts at regular time intervals. - * Care must be taken if HAL_Delay() is called from a peripheral ISR process, - * The SysTick interrupt must have higher priority (numerically lower) - * than the peripheral interrupt. Otherwise the caller ISR process will be blocked. - * The function is declared as __weak to be overwritten in case of other - * implementation in user file. - * @param TickPriority Tick interrupt priority. - * @retval HAL status - */ -__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) -{ - /*Configure the SysTick to have interrupt in 1ms time basis*/ - HAL_SYSTICK_Config(SystemCoreClock/1000); - - /*Configure the SysTick IRQ priority */ - HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup HAL_Exported_Functions_Group2 HAL Control functions - * @brief HAL Control functions - * -@verbatim - =============================================================================== - ##### HAL Control functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Provide a tick value in millisecond - (+) Provide a blocking delay in millisecond - (+) Suspend the time base source interrupt - (+) Resume the time base source interrupt - (+) Get the HAL API driver version - (+) Get the device identifier - (+) Get the device revision identifier - -@endverbatim - * @{ - */ - -/** - * @brief This function is called to increment a global variable "uwTick" - * used as application time base. - * @note In the default implementation, this variable is incremented each 1ms - * in SysTick ISR. - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval None - */ -__weak void HAL_IncTick(void) -{ - uwTick++; -} - -/** - * @brief Provide a tick value in millisecond. - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval tick value - */ -__weak uint32_t HAL_GetTick(void) -{ - return uwTick; -} - -/** - * @brief This function provides minimum delay (in milliseconds) based - * on variable incremented. - * @note In the default implementation , SysTick timer is the source of time base. - * It is used to generate interrupts at regular time intervals where uwTick - * is incremented. - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @param Delay specifies the delay time length, in milliseconds. - * @retval None - */ -__weak void HAL_Delay(uint32_t Delay) -{ - uint32_t tickstart = HAL_GetTick(); - uint32_t wait = Delay; - - /* Add a period to guaranty minimum wait */ - if (wait < HAL_MAX_DELAY) - { - wait++; - } - - while((HAL_GetTick() - tickstart) < wait) - { - } -} - -/** - * @brief Suspend Tick increment. - * @note In the default implementation , SysTick timer is the source of time base. It is - * used to generate interrupts at regular time intervals. Once HAL_SuspendTick() - * is called, the SysTick interrupt will be disabled and so Tick increment - * is suspended. - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval None - */ -__weak void HAL_SuspendTick(void) -{ - /* Disable SysTick Interrupt */ - SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk; -} - -/** - * @brief Resume Tick increment. - * @note In the default implementation , SysTick timer is the source of time base. It is - * used to generate interrupts at regular time intervals. Once HAL_ResumeTick() - * is called, the SysTick interrupt will be enabled and so Tick increment - * is resumed. - * @note This function is declared as __weak to be overwritten in case of other - * implementations in user file. - * @retval None - */ -__weak void HAL_ResumeTick(void) -{ - /* Enable SysTick Interrupt */ - SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk; -} - -/** - * @brief Return the HAL revision. - * @retval version : 0xXYZR (8bits for each decimal, R for RC) - */ -uint32_t HAL_GetHalVersion(void) -{ - return __STM32L4xx_HAL_VERSION; -} - -/** - * @brief Return the device revision identifier. - * @retval Device revision identifier - */ -uint32_t HAL_GetREVID(void) -{ - return((DBGMCU->IDCODE & DBGMCU_IDCODE_REV_ID) >> 16); -} - -/** - * @brief Return the device identifier. - * @retval Device identifier - */ -uint32_t HAL_GetDEVID(void) -{ - return(DBGMCU->IDCODE & DBGMCU_IDCODE_DEV_ID); -} - -/** - * @brief Return the first word of the unique device identifier (UID based on 96 bits) - * @retval Device identifier - */ -uint32_t HAL_GetUIDw0(void) -{ - return(READ_REG(*((uint32_t *)UID_BASE))); -} - -/** - * @brief Return the second word of the unique device identifier (UID based on 96 bits) - * @retval Device identifier - */ -uint32_t HAL_GetUIDw1(void) -{ - return(READ_REG(*((uint32_t *)(UID_BASE + 4U)))); -} - -/** - * @brief Return the third word of the unique device identifier (UID based on 96 bits) - * @retval Device identifier - */ -uint32_t HAL_GetUIDw2(void) -{ - return(READ_REG(*((uint32_t *)(UID_BASE + 8U)))); -} - -/** - * @} - */ - -/** @defgroup HAL_Exported_Functions_Group3 HAL Debug functions - * @brief HAL Debug functions - * -@verbatim - =============================================================================== - ##### HAL Debug functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Enable/Disable Debug module during SLEEP mode - (+) Enable/Disable Debug module during STOP0/STOP1/STOP2 modes - (+) Enable/Disable Debug module during STANDBY mode - -@endverbatim - * @{ - */ - -/** - * @brief Enable the Debug Module during SLEEP mode. - * @retval None - */ -void HAL_DBGMCU_EnableDBGSleepMode(void) -{ - SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); -} - -/** - * @brief Disable the Debug Module during SLEEP mode. - * @retval None - */ -void HAL_DBGMCU_DisableDBGSleepMode(void) -{ - CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); -} - -/** - * @brief Enable the Debug Module during STOP0/STOP1/STOP2 modes. - * @retval None - */ -void HAL_DBGMCU_EnableDBGStopMode(void) -{ - SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); -} - -/** - * @brief Disable the Debug Module during STOP0/STOP1/STOP2 modes. - * @retval None - */ -void HAL_DBGMCU_DisableDBGStopMode(void) -{ - CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); -} - -/** - * @brief Enable the Debug Module during STANDBY mode. - * @retval None - */ -void HAL_DBGMCU_EnableDBGStandbyMode(void) -{ - SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); -} - -/** - * @brief Disable the Debug Module during STANDBY mode. - * @retval None - */ -void HAL_DBGMCU_DisableDBGStandbyMode(void) -{ - CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); -} - -/** - * @} - */ - -/** @defgroup HAL_Exported_Functions_Group4 HAL SYSCFG configuration functions - * @brief HAL SYSCFG configuration functions - * -@verbatim - =============================================================================== - ##### HAL SYSCFG configuration functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Start a hardware SRAM2 erase operation - (+) Enable/Disable the Internal FLASH Bank Swapping - (+) Configure the Voltage reference buffer - (+) Enable/Disable the Voltage reference buffer - (+) Enable/Disable the I/O analog switch voltage booster - -@endverbatim - * @{ - */ - -/** - * @brief Start a hardware SRAM2 erase operation. - * @note As long as SRAM2 is not erased the SRAM2ER bit will be set. - * This bit is automatically reset at the end of the SRAM2 erase operation. - * @retval None - */ -void HAL_SYSCFG_SRAM2Erase(void) -{ - /* unlock the write protection of the SRAM2ER bit */ - SYSCFG->SKR = 0xCA; - SYSCFG->SKR = 0x53; - /* Starts a hardware SRAM2 erase operation*/ - *(__IO uint32_t *) SCSR_SRAM2ER_BB = (uint8_t)0x00000001; -} - -/** - * @brief Enable the Internal FLASH Bank Swapping. - * - * @note This function can be used only for STM32L4xx devices. - * - * @note Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000) - * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000) - * - * @retval None - */ -void HAL_SYSCFG_EnableMemorySwappingBank(void) -{ - *(__IO uint32_t *)FB_MODE_BB = (uint32_t)ENABLE; -} - -/** - * @brief Disable the Internal FLASH Bank Swapping. - * - * @note This function can be used only for STM32L4xx devices. - * - * @note The default state : Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000) - * and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000) - * - * @retval None - */ -void HAL_SYSCFG_DisableMemorySwappingBank(void) -{ - - *(__IO uint32_t *)FB_MODE_BB = (uint32_t)DISABLE; -} - -#if defined(VREFBUF) -/** - * @brief Configure the internal voltage reference buffer voltage scale. - * @param VoltageScaling specifies the output voltage to achieve - * This parameter can be one of the following values: - * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE0: VREF_OUT1 around 2.048 V. - * This requires VDDA equal to or higher than 2.4 V. - * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE1: VREF_OUT2 around 2.5 V. - * This requires VDDA equal to or higher than 2.8 V. - * @retval None - */ -void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling) -{ - /* Check the parameters */ - assert_param(IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(VoltageScaling)); - - MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, VoltageScaling); -} - -/** - * @brief Configure the internal voltage reference buffer high impedance mode. - * @param Mode specifies the high impedance mode - * This parameter can be one of the following values: - * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE: VREF+ pin is internally connect to VREFINT output. - * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE: VREF+ pin is high impedance. - * @retval None - */ -void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode) -{ - /* Check the parameters */ - assert_param(IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(Mode)); - - MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode); -} - -/** - * @brief Tune the Internal Voltage Reference buffer (VREFBUF). - * @retval None - */ -void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue) -{ - /* Check the parameters */ - assert_param(IS_SYSCFG_VREFBUF_TRIMMING(TrimmingValue)); - - MODIFY_REG(VREFBUF->CCR, VREFBUF_CCR_TRIM, TrimmingValue); -} - -/** - * @brief Enable the Internal Voltage Reference buffer (VREFBUF). - * @retval HAL_OK/HAL_TIMEOUT - */ -HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void) -{ - uint32_t tickstart = 0; - - SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait for VRR bit */ - while(READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == RESET) - { - if((HAL_GetTick() - tickstart) > VREFBUF_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - return HAL_OK; -} - -/** - * @brief Disable the Internal Voltage Reference buffer (VREFBUF). - * - * @retval None - */ -void HAL_SYSCFG_DisableVREFBUF(void) -{ - CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR); -} -#endif /* VREFBUF */ - -/** - * @brief Enable the I/O analog switch voltage booster - * - * @retval None - */ -void HAL_SYSCFG_EnableIOAnalogSwitchBooster(void) -{ - SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); -} - -/** - * @brief Disable the I/O analog switch voltage booster - * - * @retval None - */ -void HAL_SYSCFG_DisableIOAnalogSwitchBooster(void) -{ - CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c deleted file mode 100644 index 4c99c721..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c +++ /dev/null @@ -1,539 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_cortex.c - * @author MCD Application Team - * @brief CORTEX HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the CORTEX: - * + Initialization and Configuration functions - * + Peripheral Control functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - - [..] - *** How to configure Interrupts using CORTEX HAL driver *** - =========================================================== - [..] - This section provides functions allowing to configure the NVIC interrupts (IRQ). - The Cortex-M4 exceptions are managed by CMSIS functions. - - (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping() function. - (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority(). - (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ(). - - -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible. - The pending IRQ priority will be managed only by the sub priority. - - -@- IRQ priority order (sorted by highest to lowest priority): - (+@) Lowest pre-emption priority - (+@) Lowest sub priority - (+@) Lowest hardware priority (IRQ number) - - [..] - *** How to configure SysTick using CORTEX HAL driver *** - ======================================================== - [..] - Setup SysTick Timer for time base. - - (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which - is a CMSIS function that: - (++) Configures the SysTick Reload register with value passed as function parameter. - (++) Configures the SysTick IRQ priority to the lowest value (0x0F). - (++) Resets the SysTick Counter register. - (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). - (++) Enables the SysTick Interrupt. - (++) Starts the SysTick Counter. - - (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro - __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the - HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined - inside the stm32l4xx_hal_cortex.h file. - - (+) You can change the SysTick IRQ priority by calling the - HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function - call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function. - - (+) To adjust the SysTick time base, use the following formula: - - Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) - (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function - (++) Reload Value should not exceed 0xFFFFFF - - @endverbatim - ****************************************************************************** - - The table below gives the allowed values of the pre-emption priority and subpriority according - to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function. - - ========================================================================================================================== - NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description - ========================================================================================================================== - NVIC_PRIORITYGROUP_0 | 0 | 0-15 | 0 bit for pre-emption priority - | | | 4 bits for subpriority - -------------------------------------------------------------------------------------------------------------------------- - NVIC_PRIORITYGROUP_1 | 0-1 | 0-7 | 1 bit for pre-emption priority - | | | 3 bits for subpriority - -------------------------------------------------------------------------------------------------------------------------- - NVIC_PRIORITYGROUP_2 | 0-3 | 0-3 | 2 bits for pre-emption priority - | | | 2 bits for subpriority - -------------------------------------------------------------------------------------------------------------------------- - NVIC_PRIORITYGROUP_3 | 0-7 | 0-1 | 3 bits for pre-emption priority - | | | 1 bit for subpriority - -------------------------------------------------------------------------------------------------------------------------- - NVIC_PRIORITYGROUP_4 | 0-15 | 0 | 4 bits for pre-emption priority - | | | 0 bit for subpriority - ========================================================================================================================== - - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup CORTEX - * @{ - */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup CORTEX_Exported_Functions - * @{ - */ - - -/** @addtogroup CORTEX_Exported_Functions_Group1 - * @brief Initialization and Configuration functions - * -@verbatim - ============================================================================== - ##### Initialization and Configuration functions ##### - ============================================================================== - [..] - This section provides the CORTEX HAL driver functions allowing to configure Interrupts - SysTick functionalities - -@endverbatim - * @{ - */ - - -/** - * @brief Set the priority grouping field (pre-emption priority and subpriority) - * using the required unlock sequence. - * @param PriorityGroup: The priority grouping bits length. - * This parameter can be one of the following values: - * @arg NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority, - * 4 bits for subpriority - * @arg NVIC_PRIORITYGROUP_1: 1 bit for pre-emption priority, - * 3 bits for subpriority - * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority, - * 2 bits for subpriority - * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority, - * 1 bit for subpriority - * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority, - * 0 bit for subpriority - * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. - * The pending IRQ priority will be managed only by the subpriority. - * @retval None - */ -void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - /* Check the parameters */ - assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); - - /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ - NVIC_SetPriorityGrouping(PriorityGroup); -} - -/** - * @brief Set the priority of an interrupt. - * @param IRQn: External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @param PreemptPriority: The pre-emption priority for the IRQn channel. - * This parameter can be a value between 0 and 15 - * A lower priority value indicates a higher priority - * @param SubPriority: the subpriority level for the IRQ channel. - * This parameter can be a value between 0 and 15 - * A lower priority value indicates a higher priority. - * @retval None - */ -void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t prioritygroup = 0x00; - - /* Check the parameters */ - assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); - assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); - - prioritygroup = NVIC_GetPriorityGrouping(); - - NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); -} - -/** - * @brief Enable a device specific interrupt in the NVIC interrupt controller. - * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() - * function should be called before. - * @param IRQn External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval None - */ -void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) -{ - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Enable interrupt */ - NVIC_EnableIRQ(IRQn); -} - -/** - * @brief Disable a device specific interrupt in the NVIC interrupt controller. - * @param IRQn External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval None - */ -void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) -{ - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Disable interrupt */ - NVIC_DisableIRQ(IRQn); -} - -/** - * @brief Initiate a system reset request to reset the MCU. - * @retval None - */ -void HAL_NVIC_SystemReset(void) -{ - /* System Reset */ - NVIC_SystemReset(); -} - -/** - * @brief Initialize the System Timer with interrupt enabled and start the System Tick Timer (SysTick): - * Counter is in free running mode to generate periodic interrupts. - * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. - * @retval status: - 0 Function succeeded. - * - 1 Function failed. - */ -uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) -{ - return SysTick_Config(TicksNumb); -} -/** - * @} - */ - -/** @addtogroup CORTEX_Exported_Functions_Group2 - * @brief Cortex control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to control the CORTEX - (NVIC, SYSTICK, MPU) functionalities. - - -@endverbatim - * @{ - */ - -/** - * @brief Get the priority grouping field from the NVIC Interrupt Controller. - * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field) - */ -uint32_t HAL_NVIC_GetPriorityGrouping(void) -{ - /* Get the PRIGROUP[10:8] field value */ - return NVIC_GetPriorityGrouping(); -} - -/** - * @brief Get the priority of an interrupt. - * @param IRQn: External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @param PriorityGroup: the priority grouping bits length. - * This parameter can be one of the following values: - * @arg NVIC_PRIORITYGROUP_0: 0 bit for pre-emption priority, - * 4 bits for subpriority - * @arg NVIC_PRIORITYGROUP_1: 1 bit for pre-emption priority, - * 3 bits for subpriority - * @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority, - * 2 bits for subpriority - * @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority, - * 1 bit for subpriority - * @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority, - * 0 bit for subpriority - * @param pPreemptPriority: Pointer on the Preemptive priority value (starting from 0). - * @param pSubPriority: Pointer on the Subpriority value (starting from 0). - * @retval None - */ -void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority) -{ - /* Check the parameters */ - assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); - /* Get priority for Cortex-M system or device specific interrupts */ - NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority); -} - -/** - * @brief Set Pending bit of an external interrupt. - * @param IRQn External interrupt number - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval None - */ -void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Set interrupt pending */ - NVIC_SetPendingIRQ(IRQn); -} - -/** - * @brief Get Pending Interrupt (read the pending register in the NVIC - * and return the pending bit for the specified interrupt). - * @param IRQn External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval status: - 0 Interrupt status is not pending. - * - 1 Interrupt status is pending. - */ -uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Return 1 if pending else 0 */ - return NVIC_GetPendingIRQ(IRQn); -} - -/** - * @brief Clear the pending bit of an external interrupt. - * @param IRQn External interrupt number. - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval None - */ -void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - /* Check the parameters */ - assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - - /* Clear pending interrupt */ - NVIC_ClearPendingIRQ(IRQn); -} - -/** - * @brief Get active interrupt (read the active register in NVIC and return the active bit). - * @param IRQn External interrupt number - * This parameter can be an enumerator of IRQn_Type enumeration - * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) - * @retval status: - 0 Interrupt status is not pending. - * - 1 Interrupt status is pending. - */ -uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn) -{ - /* Return 1 if active else 0 */ - return NVIC_GetActive(IRQn); -} - -/** - * @brief Configure the SysTick clock source. - * @param CLKSource: specifies the SysTick clock source. - * This parameter can be one of the following values: - * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source. - * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. - * @retval None - */ -void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) -{ - /* Check the parameters */ - assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); - if (CLKSource == SYSTICK_CLKSOURCE_HCLK) - { - SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; - } - else - { - SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; - } -} - -/** - * @brief Handle SYSTICK interrupt request. - * @retval None - */ -void HAL_SYSTICK_IRQHandler(void) -{ - HAL_SYSTICK_Callback(); -} - -/** - * @brief SYSTICK callback. - * @retval None - */ -__weak void HAL_SYSTICK_Callback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SYSTICK_Callback could be implemented in the user file - */ -} - -#if (__MPU_PRESENT == 1) -/** - * @brief Disable the MPU. - * @retval None - */ -void HAL_MPU_Disable(void) -{ - /* Make sure outstanding transfers are done */ - __DMB(); - - /* Disable fault exceptions */ - SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; - - /* Disable the MPU and clear the control register*/ - MPU->CTRL = 0U; -} - -/** - * @brief Enable the MPU. - * @param MPU_Control: Specifies the control mode of the MPU during hard fault, - * NMI, FAULTMASK and privileged accessto the default memory - * This parameter can be one of the following values: - * @arg MPU_HFNMI_PRIVDEF_NONE - * @arg MPU_HARDFAULT_NMI - * @arg MPU_PRIVILEGED_DEFAULT - * @arg MPU_HFNMI_PRIVDEF - * @retval None - */ -void HAL_MPU_Enable(uint32_t MPU_Control) -{ - /* Enable the MPU */ - MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; - - /* Enable fault exceptions */ - SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; - - /* Ensure MPU settings take effects */ - __DSB(); - __ISB(); -} - -/** - * @brief Initialize and configure the Region and the memory to be protected. - * @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains - * the initialization and configuration information. - * @retval None - */ -void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) -{ - /* Check the parameters */ - assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number)); - assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable)); - - /* Set the Region number */ - MPU->RNR = MPU_Init->Number; - - if ((MPU_Init->Enable) != RESET) - { - /* Check the parameters */ - assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec)); - assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission)); - assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField)); - assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable)); - assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); - assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); - assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); - assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); - - MPU->RBAR = MPU_Init->BaseAddress; - MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) | - ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | - ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | - ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | - ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | - ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | - ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); - } - else - { - MPU->RBAR = 0x00; - MPU->RASR = 0x00; - } -} -#endif /* __MPU_PRESENT */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_CORTEX_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c deleted file mode 100644 index 8d30b49a..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c +++ /dev/null @@ -1,1179 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dma.c - * @author MCD Application Team - * @brief DMA HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Direct Memory Access (DMA) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral State and errors functions - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Enable and configure the peripheral to be connected to the DMA Channel - (except for internal SRAM / FLASH memories: no initialization is - necessary). Please refer to the Reference manual for connection between peripherals - and DMA requests. - - (#) For a given Channel, program the required configuration through the following parameters: - Channel request, Transfer Direction, Source and Destination data formats, - Circular or Normal mode, Channel Priority level, Source and Destination Increment mode - using HAL_DMA_Init() function. - - Prior to HAL_DMA_Init the peripheral clock shall be enabled for both DMA & DMAMUX - thanks to: - (##) DMA1 or DMA2: __HAL_RCC_DMA1_CLK_ENABLE() or __HAL_RCC_DMA2_CLK_ENABLE() ; - (##) DMAMUX1: __HAL_RCC_DMAMUX1_CLK_ENABLE(); - - (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error - detection. - - (#) Use HAL_DMA_Abort() function to abort the current transfer - - -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. - - *** Polling mode IO operation *** - ================================= - [..] - (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source - address and destination address and the Length of data to be transferred - (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this - case a fixed Timeout can be configured by User depending from his application. - - *** Interrupt mode IO operation *** - =================================== - [..] - (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() - (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() - (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of - Source address and destination address and the Length of data to be transferred. - In this case the DMA interrupt is configured - (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine - (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can - add his own function to register callbacks with HAL_DMA_RegisterCallback(). - - *** DMA HAL driver macros list *** - ============================================= - [..] - Below the list of macros in DMA HAL driver. - - (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel. - (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel. - (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags. - (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags. - (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts. - (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts. - (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt is enabled or not. - - [..] - (@) You can refer to the DMA HAL driver header file for more useful macros - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup DMA DMA - * @brief DMA HAL module driver - * @{ - */ - -#ifdef HAL_DMA_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup DMA_Private_Functions DMA Private Functions - * @{ - */ -static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); -#if defined(DMAMUX1) -static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma); -static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma); -#endif /* DMAMUX1 */ - -/** - * @} - */ - -/* Exported functions ---------------------------------------------------------*/ - -/** @defgroup DMA_Exported_Functions DMA Exported Functions - * @{ - */ - -/** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and de-initialization functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] - This section provides functions allowing to initialize the DMA Channel source - and destination addresses, incrementation and data sizes, transfer direction, - circular/normal mode selection, memory-to-memory mode selection and Channel priority value. - [..] - The HAL_DMA_Init() function follows the DMA configuration procedures as described in - reference manual. - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the DMA according to the specified - * parameters in the DMA_InitTypeDef and initialize the associated handle. - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) -{ - uint32_t tmp = 0; - - /* Check the DMA handle allocation */ - if(hdma == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); - assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); - assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); - assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); - assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); - assert_param(IS_DMA_MODE(hdma->Init.Mode)); - assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); - - assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request)); - - /* Compute the channel index */ - if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) - { - /* DMA1 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; - hdma->DmaBaseAddress = DMA1; - } - else - { - /* DMA2 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; - hdma->DmaBaseAddress = DMA2; - } - - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - - /* Get the CR register value */ - tmp = hdma->Instance->CCR; - - /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and MEM2MEM bits */ - tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | - DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | - DMA_CCR_DIR | DMA_CCR_MEM2MEM)); - - /* Prepare the DMA Channel configuration */ - tmp |= hdma->Init.Direction | - hdma->Init.PeriphInc | hdma->Init.MemInc | - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - hdma->Init.Mode | hdma->Init.Priority; - - /* Write to DMA Channel CR register */ - hdma->Instance->CCR = tmp; - - -#if defined(DMAMUX1) - /* Initialize parameters for DMAMUX channel : - DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask - */ - DMA_CalcDMAMUXChannelBaseAndMask(hdma); - - if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY) - { - /* if memory to memory force the request to 0*/ - hdma->Init.Request = DMA_REQUEST_MEM2MEM; - } - - /* Set peripheral request to DMAMUX channel */ - hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID); - - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - if(((hdma->Init.Request > 0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) - { - /* Initialize parameters for DMAMUX request generator : - DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask - */ - DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); - - /* Reset the DMAMUX request generator register*/ - hdma->DMAmuxRequestGen->RGCR = 0U; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } - else - { - hdma->DMAmuxRequestGen = 0U; - hdma->DMAmuxRequestGenStatus = 0U; - hdma->DMAmuxRequestGenStatusMask = 0U; - } -#endif /* DMAMUX1 */ - -#if !defined (DMAMUX1) - - /* Set request selection */ - if(hdma->Init.Direction != DMA_MEMORY_TO_MEMORY) - { - /* Write to DMA channel selection register */ - if (DMA1 == hdma->DmaBaseAddress) - { - /* Reset request selection for DMA1 Channelx */ - DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << hdma->ChannelIndex); - - /* Configure request selection for DMA1 Channelx */ - DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex)); - } - else /* DMA2 */ - { - /* Reset request selection for DMA2 Channelx */ - DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << hdma->ChannelIndex); - - /* Configure request selection for DMA2 Channelx */ - DMA2_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex)); - } - } - -#endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L442xx || STM32L486xx */ - /* STM32L496xx || STM32L4A6xx */ - - /* Clean callbacks */ - hdma->XferCpltCallback = NULL; - hdma->XferHalfCpltCallback = NULL; - hdma->XferErrorCallback = NULL; - hdma->XferAbortCallback = NULL; - - /* Initialise the error code */ - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - - /* Initialize the DMA state*/ - hdma->State = HAL_DMA_STATE_READY; - - /* Allocate lock resource and initialize it */ - hdma->Lock = HAL_UNLOCKED; - - return HAL_OK; -} - -/** - * @brief DeInitialize the DMA peripheral. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) -{ - - /* Check the DMA handle allocation */ - if (NULL == hdma ) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - - /* Disable the selected DMA Channelx */ - __HAL_DMA_DISABLE(hdma); - - /* Compute the channel index */ - if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) - { - /* DMA1 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; - hdma->DmaBaseAddress = DMA1; - } - else - { - /* DMA2 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; - hdma->DmaBaseAddress = DMA2; - } - - /* Reset DMA Channel control register */ - hdma->Instance->CCR = 0; - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex)); - -#if !defined (DMAMUX1) - - /* Reset DMA channel selection register */ - if (DMA1 == hdma->DmaBaseAddress) - { - /* DMA1 */ - DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex)); - } - else - { - /* DMA2 */ - DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex)); - } -#endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L442xx || STM32L486xx */ - /* STM32L496xx || STM32L4A6xx */ - -#if defined(DMAMUX1) - - /* Initialize parameters for DMAMUX channel : - DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask */ - - DMA_CalcDMAMUXChannelBaseAndMask(hdma); - - /* Reset the DMAMUX channel that corresponds to the DMA channel */ - hdma->DMAmuxChannel->CCR = 0; - - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - /* Reset Request generator parameters if any */ - if(((hdma->Init.Request > 0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3))) - { - /* Initialize parameters for DMAMUX request generator : - DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask - */ - DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); - - /* Reset the DMAMUX request generator register*/ - hdma->DMAmuxRequestGen->RGCR = 0U; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } - - hdma->DMAmuxRequestGen = 0U; - hdma->DMAmuxRequestGenStatus = 0U; - hdma->DMAmuxRequestGenStatusMask = 0U; - -#endif /* DMAMUX1 */ - - /* Initialise the error code */ - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - - /* Initialize the DMA state */ - hdma->State = HAL_DMA_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hdma); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions - * @brief Input and Output operation functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Configure the source, destination address and data length and Start DMA transfer - (+) Configure the source, destination address and data length and - Start DMA transfer with interrupt - (+) Abort DMA transfer - (+) Poll for transfer complete - (+) Handle DMA interrupt request - -@endverbatim - * @{ - */ - -/** - * @brief Start the DMA Transfer. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param SrcAddress: The source memory Buffer address - * @param DstAddress: The destination memory Buffer address - * @param DataLength: The length of data to be transferred from source to destination - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_DMA_BUFFER_SIZE(DataLength)); - - /* Process locked */ - __HAL_LOCK(hdma); - - if(HAL_DMA_STATE_READY == hdma->State) - { - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - - /* Disable the peripheral */ - __HAL_DMA_DISABLE(hdma); - - /* Configure the source, destination address and the data length & clear flags*/ - DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - - /* Enable the Peripheral */ - __HAL_DMA_ENABLE(hdma); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - status = HAL_BUSY; - } - return status; -} - -/** - * @brief Start the DMA Transfer with interrupt enabled. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param SrcAddress: The source memory Buffer address - * @param DstAddress: The destination memory Buffer address - * @param DataLength: The length of data to be transferred from source to destination - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_DMA_BUFFER_SIZE(DataLength)); - - /* Process locked */ - __HAL_LOCK(hdma); - - if(HAL_DMA_STATE_READY == hdma->State) - { - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - - /* Disable the peripheral */ - __HAL_DMA_DISABLE(hdma); - - /* Configure the source, destination address and the data length & clear flags*/ - DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - - /* Enable the transfer complete interrupt */ - /* Enable the transfer Error interrupt */ - if(NULL != hdma->XferHalfCpltCallback ) - { - /* Enable the Half transfer complete interrupt as well */ - __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - } - else - { - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); - } - -#ifdef DMAMUX1 - - /* Check if DMAMUX Synchronization is enabled*/ - if((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U) - { - /* Enable DMAMUX sync overrun IT*/ - hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE; - } - - if(hdma->DMAmuxRequestGen != 0U) - { - /* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/ - /* enable the request gen overrun IT*/ - hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; - } - -#endif /* DMAMUX1 */ - - /* Enable the Peripheral */ - __HAL_DMA_ENABLE(hdma); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - /* Remain BUSY */ - status = HAL_BUSY; - } - return status; -} - -/** - * @brief Abort the DMA Transfer. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the DMA peripheral handle */ - if(NULL == hdma) - { - return HAL_ERROR; - } - - /* Disable DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - -#if defined(DMAMUX1) - /* disable the DMAMUX sync overrun IT*/ - hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; -#endif /* DMAMUX1 */ - - /* Disable the channel */ - __HAL_DMA_DISABLE(hdma); - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - -#if defined(DMAMUX1) - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - if(hdma->DMAmuxRequestGen != 0U) - { - /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/ - /* disable the request gen overrun IT*/ - hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } - -#endif /* DMAMUX1 */ - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - return status; -} - -/** - * @brief Aborts the DMA Transfer in Interrupt mode. - * @param hdma : pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) -{ - HAL_StatusTypeDef status = HAL_OK; - - if(HAL_DMA_STATE_BUSY != hdma->State) - { - /* no transfer ongoing */ - hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - - status = HAL_ERROR; - } - else - { - /* Disable DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - - /* Disable the channel */ - __HAL_DMA_DISABLE(hdma); - -#if defined(DMAMUX1) - /* disable the DMAMUX sync overrun IT*/ - hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - if(hdma->DMAmuxRequestGen != 0U) - { - /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/ - /* disable the request gen overrun IT*/ - hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } - -#else - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); -#endif /* DMAMUX1 */ - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - /* Call User Abort callback */ - if(hdma->XferAbortCallback != NULL) - { - hdma->XferAbortCallback(hdma); - } - } - return status; -} - -/** - * @brief Polling for transfer complete. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param CompleteLevel: Specifies the DMA level complete. - * @param Timeout: Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout) -{ - uint32_t temp; - uint32_t tickstart = 0; - - if(HAL_DMA_STATE_BUSY != hdma->State) - { - /* no transfer ongoing */ - hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - __HAL_UNLOCK(hdma); - return HAL_ERROR; - } - - /* Polling mode not supported in circular mode */ - if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC)) - { - hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; - return HAL_ERROR; - } - - /* Get the level transfer complete flag */ - if (HAL_DMA_FULL_TRANSFER == CompleteLevel) - { - /* Transfer Complete flag */ - temp = DMA_FLAG_TC1 << hdma->ChannelIndex; - } - else - { - /* Half Transfer Complete flag */ - temp = DMA_FLAG_HT1 << hdma->ChannelIndex; - } - - /* Get tick */ - tickstart = HAL_GetTick(); - - while(RESET == (hdma->DmaBaseAddress->ISR & temp)) - { - if((RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex)))) - { - /* When a DMA transfer error occurs */ - /* A hardware clear of its EN bits is performed */ - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TE; - - /* Change the DMA state */ - hdma->State= HAL_DMA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - return HAL_ERROR; - } - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) - { - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - return HAL_ERROR; - } - } - } - -#if defined(DMAMUX1) - /*Check for DMAMUX Request generator (if used) overrun status */ - if(hdma->DMAmuxRequestGen != 0U) - { - /* if using DMAMUX request generator Check for DMAMUX request generator overrun */ - if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U) - { - /* Disable the request gen overrun interrupt */ - hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN; - } - } - - /* Check for DMAMUX Synchronization overrun */ - if((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U) - { - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_SYNC; - } -#endif /* DMAMUX1 */ - - if(HAL_DMA_FULL_TRANSFER == CompleteLevel) - { - /* Clear the transfer complete flag */ - hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << hdma->ChannelIndex); - - /* The selected Channelx EN bit is cleared (DMA is disabled and - all transfers are complete) */ - hdma->State = HAL_DMA_STATE_READY; - } - else - { - /* Clear the half transfer complete flag */ - hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << hdma->ChannelIndex); - } - - /* Process unlocked */ - __HAL_UNLOCK(hdma); - - return HAL_OK; -} - -/** - * @brief Handle DMA interrupt request. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval None - */ -void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) -{ - uint32_t flag_it = hdma->DmaBaseAddress->ISR; - uint32_t source_it = hdma->Instance->CCR; - - /* Half Transfer Complete Interrupt management ******************************/ - if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT))) - { - /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ - if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) - { - /* Disable the half transfer interrupt */ - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - } - /* Clear the half transfer complete flag */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_HTIF1 << hdma->ChannelIndex); - - /* DMA peripheral state is not updated in Half Transfer */ - /* but in Transfer Complete case */ - - if(hdma->XferHalfCpltCallback != NULL) - { - /* Half transfer callback */ - hdma->XferHalfCpltCallback(hdma); - } - } - - /* Transfer Complete Interrupt management ***********************************/ - else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TC))) - { - if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0) - { - /* Disable the transfer complete and error interrupt */ - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - } - /* Clear the transfer complete flag */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << hdma->ChannelIndex); - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - if(hdma->XferCpltCallback != NULL) - { - /* Transfer complete callback */ - hdma->XferCpltCallback(hdma); - } - } - - /* Transfer Error Interrupt management **************************************/ - else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) - { - /* When a DMA transfer error occurs */ - /* A hardware clear of its EN bits is performed */ - /* Disable ALL DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TE; - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - - if (hdma->XferErrorCallback != NULL) - { - /* Transfer error callback */ - hdma->XferErrorCallback(hdma); - } - } - return; -} - -/** - * @brief Register callbacks - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param CallbackID: User Callback identifer - * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. - * @param pCallback: pointer to private callbacsk function which has pointer to - * a DMA_HandleTypeDef structure as parameter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma)) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hdma); - - if(HAL_DMA_STATE_READY == hdma->State) - { - switch (CallbackID) - { - case HAL_DMA_XFER_CPLT_CB_ID: - hdma->XferCpltCallback = pCallback; - break; - - case HAL_DMA_XFER_HALFCPLT_CB_ID: - hdma->XferHalfCpltCallback = pCallback; - break; - - case HAL_DMA_XFER_ERROR_CB_ID: - hdma->XferErrorCallback = pCallback; - break; - - case HAL_DMA_XFER_ABORT_CB_ID: - hdma->XferAbortCallback = pCallback; - break; - - default: - status = HAL_ERROR; - break; - } - } - else - { - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hdma); - - return status; -} - -/** - * @brief UnRegister callbacks - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param CallbackID: User Callback identifer - * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hdma); - - if(HAL_DMA_STATE_READY == hdma->State) - { - switch (CallbackID) - { - case HAL_DMA_XFER_CPLT_CB_ID: - hdma->XferCpltCallback = NULL; - break; - - case HAL_DMA_XFER_HALFCPLT_CB_ID: - hdma->XferHalfCpltCallback = NULL; - break; - - case HAL_DMA_XFER_ERROR_CB_ID: - hdma->XferErrorCallback = NULL; - break; - - case HAL_DMA_XFER_ABORT_CB_ID: - hdma->XferAbortCallback = NULL; - break; - - case HAL_DMA_XFER_ALL_CB_ID: - hdma->XferCpltCallback = NULL; - hdma->XferHalfCpltCallback = NULL; - hdma->XferErrorCallback = NULL; - hdma->XferAbortCallback = NULL; - break; - - default: - status = HAL_ERROR; - break; - } - } - else - { - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hdma); - - return status; -} - -/** - * @} - */ - - - -/** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions - * @brief Peripheral State and Errors functions - * -@verbatim - =============================================================================== - ##### Peripheral State and Errors functions ##### - =============================================================================== - [..] - This subsection provides functions allowing to - (+) Check the DMA state - (+) Get error code - -@endverbatim - * @{ - */ - -/** - * @brief Return the DMA hande state. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL state - */ -HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) -{ - /* Return DMA handle state */ - return hdma->State; -} - -/** - * @brief Return the DMA error code. - * @param hdma : pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval DMA Error Code - */ -uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) -{ - return hdma->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup DMA_Private_Functions - * @{ - */ - -/** - * @brief Sets the DMA Transfer parameter. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @param SrcAddress: The source memory Buffer address - * @param DstAddress: The destination memory Buffer address - * @param DataLength: The length of data to be transferred from source to destination - * @retval HAL status - */ -static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ -#if defined(DMAMUX1) - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - if(hdma->DMAmuxRequestGen != 0U) - { - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - } -#endif - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - - /* Configure DMA Channel data length */ - hdma->Instance->CNDTR = DataLength; - - /* Peripheral to Memory */ - if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - { - /* Configure DMA Channel destination address */ - hdma->Instance->CPAR = DstAddress; - - /* Configure DMA Channel source address */ - hdma->Instance->CMAR = SrcAddress; - } - /* Memory to Peripheral */ - else - { - /* Configure DMA Channel source address */ - hdma->Instance->CPAR = SrcAddress; - - /* Configure DMA Channel destination address */ - hdma->Instance->CMAR = DstAddress; - } -} - -#if defined(DMAMUX1) - -/** - * @brief Updates the DMA handle with the DMAMUX channel and status mask depending on stream number - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval None - */ -static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma) -{ - uint32_t channel_number = 0; - DMAMUX_Channel_TypeDef *DMAMUX1_ChannelBase; - - /* check if instance is not outside the DMA channel range */ - if ((uint32_t)hdma->Instance < (uint32_t)DMA2_Channel1) - { - /* DMA1 */ - DMAMUX1_ChannelBase = DMAMUX1_Channel0; - } - else - { - /* DMA2 */ - DMAMUX1_ChannelBase = DMAMUX1_Channel7; - } - channel_number = (((uint32_t)hdma->Instance & 0xFF) - 8) / 20; - hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)((uint32_t)DMAMUX1_ChannelBase + (hdma->ChannelIndex >> 2) * ((uint32_t)DMAMUX1_Channel1 - (uint32_t)DMAMUX1_Channel0)); - hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; - hdma->DMAmuxChannelStatusMask = 1U << channel_number; -} - -/** - * @brief Updates the DMA handle with the DMAMUX request generator params - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Stream. - * @retval None - */ - -static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma) -{ - uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID; - - /* DMA Channels are connected to DMAMUX1 request generator blocks*/ - hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U))); - - hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus; - - hdma->DMAmuxRequestGenStatusMask = 1U << (request - 1U); -} - -#endif /* DMAMUX1 */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_DMA_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c deleted file mode 100644 index 50b09d59..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c +++ /dev/null @@ -1,319 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dma_ex.c - * @author MCD Application Team - * @brief DMA Extension HAL module driver - * This file provides firmware functions to manage the following - * functionalities of the DMA Extension peripheral: - * + Extended features functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The DMA Extension HAL driver can be used as follows: - - (+) Configure the DMA_MUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function. - (+) Configure the DMA_MUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function. - Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used - to respectively enable/disable the request generator. - - (+) To handle the DMAMUX Interrupts, the function HAL_DMAEx_MUX_IRQHandler should be called from - the DMAMUX IRQ handler i.e DMAMUX1_OVR_IRQHandler. - As only one interrupt line is available for all DMAMUX channels and request generators , HAL_DMAEx_MUX_IRQHandler should be - called with, as parameter, the appropriate DMA handle as many as used DMAs in the user project - (exception done if a given DMA is not using the DMAMUX SYNC block neither a request generator) - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -#if defined(DMAMUX1) - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup DMAEx DMAEx - * @brief DMA Extended HAL module driver - * @{ - */ - -#ifdef HAL_DMA_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private Constants ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - - -/** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions - * @{ - */ - -/** @defgroup DMAEx_Exported_Functions_Group1 DMAEx Extended features functions - * @brief Extended features functions - * -@verbatim - =============================================================================== - ##### Extended features functions ##### - =============================================================================== - [..] This section provides functions allowing to: - - (+) Configure the DMAMUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function. - (+) Configure the DMAMUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function. - Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used - to respectively enable/disable the request generator. - -@endverbatim - * @{ - */ - - -/** - * @brief Configure the DMAMUX synchronization parameters for a given DMA channel (instance). - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA channel. - * @param pSyncConfig : pointer to HAL_DMA_MuxSyncConfigTypeDef : contains the DMAMUX synchronization parameters - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - - assert_param(IS_DMAMUX_SYNC_SIGNAL_ID(pSyncConfig->SyncSignalID)); - - assert_param(IS_DMAMUX_SYNC_POLARITY(pSyncConfig-> SyncPolarity)); - assert_param(IS_DMAMUX_SYNC_STATE(pSyncConfig->SyncEnable)); - assert_param(IS_DMAMUX_SYNC_EVENT(pSyncConfig->EventEnable)); - assert_param(IS_DMAMUX_SYNC_REQUEST_NUMBER(pSyncConfig->RequestNumber)); - - /*Check if the DMA state is ready */ - if(hdma->State == HAL_DMA_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hdma); - - /* Set the new synchronization parameters (and keep the request ID filled during the Init)*/ - MODIFY_REG( hdma->DMAmuxChannel->CCR, \ - (~DMAMUX_CxCR_DMAREQ_ID) , \ - ((pSyncConfig->SyncSignalID) << DMAMUX_CxCR_SYNC_ID_Pos) | ((pSyncConfig->RequestNumber - 1U) << DMAMUX_CxCR_NBREQ_Pos) | \ - pSyncConfig->SyncPolarity | (pSyncConfig->SyncEnable << DMAMUX_CxCR_SE_Pos) | \ - (pSyncConfig->EventEnable << DMAMUX_CxCR_EGE_Pos)); - - /* Process UnLocked */ - __HAL_UNLOCK(hdma); - - return HAL_OK; - } - else - { - /*DMA State not Ready*/ - return HAL_ERROR; - } -} - -/** - * @brief Configure the DMAMUX request generator block used by the given DMA channel (instance). - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA channel. - * @param pRequestGeneratorConfig : pointer to HAL_DMA_MuxRequestGeneratorConfigTypeDef : - * contains the request generator parameters. - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - - assert_param(IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(pRequestGeneratorConfig->SignalID)); - - assert_param(IS_DMAMUX_REQUEST_GEN_POLARITY(pRequestGeneratorConfig->Polarity)); - assert_param(IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(pRequestGeneratorConfig->RequestNumber)); - - /* check if the DMA state is ready - and DMA is using a DMAMUX request generator block - */ - if((hdma->State == HAL_DMA_STATE_READY) && (hdma->DMAmuxRequestGen != 0U)) - { - /* Process Locked */ - __HAL_LOCK(hdma); - - /* Set the request generator new parameters*/ - hdma->DMAmuxRequestGen->RGCR = pRequestGeneratorConfig->SignalID | \ - ((pRequestGeneratorConfig->RequestNumber - 1U) << POSITION_VAL(DMAMUX_RGxCR_GNBREQ))| \ - pRequestGeneratorConfig->Polarity; - /* Process UnLocked */ - __HAL_UNLOCK(hdma); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Enable the DMAMUX request generator block used by the given DMA channel (instance). - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - - /* check if the DMA state is ready - and DMA is using a DMAMUX request generator block - */ - if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0)) - { - - /* Enable the request generator*/ - hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_GE; - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Disable the DMAMUX request generator block used by the given DMA channel (instance). - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - - /* check if the DMA state is ready - and DMA is using a DMAMUX request generator block - */ - if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0)) - { - - /* Disable the request generator*/ - hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_GE; - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Handles DMAMUX interrupt request. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA channel. - * @retval None - */ -void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma) -{ - /* Check for DMAMUX Synchronization overrun */ - if((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U) - { - /* Disable the synchro overrun interrupt */ - hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - - /* Clear the DMAMUX synchro overrun flag */ - hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_SYNC; - - if(hdma->XferErrorCallback != NULL) - { - /* Transfer error callback */ - hdma->XferErrorCallback(hdma); - } - } - - if(hdma->DMAmuxRequestGen != 0) - { - /* if using a DMAMUX request generator block Check for DMAMUX request generator overrun */ - if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U) - { - /* Disable the request gen overrun interrupt */ - hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - - /* Clear the DMAMUX request generator overrun flag */ - hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - - /* Update error code */ - hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN; - - if(hdma->XferErrorCallback != NULL) - { - /* Transfer error callback */ - hdma->XferErrorCallback(hdma); - } - } - } -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_DMA_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* DMAMUX1 */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c deleted file mode 100644 index 0c035a60..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c +++ /dev/null @@ -1,835 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash.c - * @author MCD Application Team - * @brief FLASH HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the internal FLASH memory: - * + Program operations functions - * + Memory Control functions - * + Peripheral Errors functions - * - @verbatim - ============================================================================== - ##### FLASH peripheral features ##### - ============================================================================== - - [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses - to the Flash memory. It implements the erase and program Flash memory operations - and the read and write protection mechanisms. - - [..] The Flash memory interface accelerates code execution with a system of instruction - prefetch and cache lines. - - [..] The FLASH main features are: - (+) Flash memory read operations - (+) Flash memory program/erase operations - (+) Read / write protections - (+) Option bytes programming - (+) Prefetch on I-Code - (+) 32 cache lines of 4*64 bits on I-Code - (+) 8 cache lines of 4*64 bits on D-Code - (+) Error code correction (ECC) : Data in flash are 72-bits word - (8 bits added per double word) - - - ##### How to use this driver ##### - ============================================================================== - [..] - This driver provides functions and macros to configure and program the FLASH - memory of all STM32L4xx devices. - - (#) Flash Memory IO Programming functions: - (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and - HAL_FLASH_Lock() functions - (++) Program functions: double word and fast program (full row programming) - (++) There Two modes of programming : - (+++) Polling mode using HAL_FLASH_Program() function - (+++) Interrupt mode using HAL_FLASH_Program_IT() function - - (#) Interrupts and flags management functions : - (++) Handle FLASH interrupts by calling HAL_FLASH_IRQHandler() - (++) Callback functions are called when the flash operations are finished : - HAL_FLASH_EndOfOperationCallback() when everything is ok, otherwise - HAL_FLASH_OperationErrorCallback() - (++) Get error flag status by calling HAL_GetError() - - (#) Option bytes management functions : - (++) Lock and Unlock the option bytes using HAL_FLASH_OB_Unlock() and - HAL_FLASH_OB_Lock() functions - (++) Launch the reload of the option bytes using HAL_FLASH_Launch() function. - In this case, a reset is generated - - [..] - In addition to these functions, this driver includes a set of macros allowing - to handle the following operations: - (+) Set the latency - (+) Enable/Disable the prefetch buffer - (+) Enable/Disable the Instruction cache and the Data cache - (+) Reset the Instruction cache and the Data cache - (+) Enable/Disable the Flash power-down during low-power run and sleep modes - (+) Enable/Disable the Flash interrupts - (+) Monitor the Flash flags status - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup FLASH FLASH - * @brief FLASH HAL module driver - * @{ - */ - -#ifdef HAL_FLASH_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define FLASH_NB_DOUBLE_WORDS_IN_ROW 64 -#else -#define FLASH_NB_DOUBLE_WORDS_IN_ROW 32 -#endif -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/** @defgroup FLASH_Private_Variables FLASH Private Variables - * @{ - */ -/** - * @brief Variable used for Program/Erase sectors under interruption - */ -FLASH_ProcessTypeDef pFlash; -/** - * @} - */ - -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup FLASH_Private_Functions FLASH Private Functions - * @{ - */ -HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); -extern void FLASH_PageErase(uint32_t Page, uint32_t Banks); -extern void FLASH_FlushCaches(void); -static void FLASH_SetErrorCode(void); -static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data); -static void FLASH_Program_Fast(uint32_t Address, uint32_t DataAddress); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup FLASH_Exported_Functions FLASH Exported Functions - * @{ - */ - -/** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions - * @brief Programming operation functions - * -@verbatim - =============================================================================== - ##### Programming operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the FLASH - program operations. - -@endverbatim - * @{ - */ - -/** - * @brief Program double word or fast program of a row at a specified address. - * @param TypeProgram: Indicate the way to program at a specified address. - * This parameter can be a value of @ref FLASH_Type_Program - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed - * This parameter is the data for the double word program and the address where - * are stored the data for the row fast program - * - * @retval HAL_StatusTypeDef HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) -{ - HAL_StatusTypeDef status = HAL_ERROR; - uint32_t prog_bit = 0; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check the parameters */ - assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if(status == HAL_OK) - { - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - - /* Deactivate the data cache if they are activated to avoid data misbehavior */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_DISABLED; - } - - if(TypeProgram == FLASH_TYPEPROGRAM_DOUBLEWORD) - { - /* Program double-word (64-bit) at a specified address */ - FLASH_Program_DoubleWord(Address, Data); - prog_bit = FLASH_CR_PG; - } - else if((TypeProgram == FLASH_TYPEPROGRAM_FAST) || (TypeProgram == FLASH_TYPEPROGRAM_FAST_AND_LAST)) - { - /* Fast program a 32 row double-word (64-bit) at a specified address */ - FLASH_Program_Fast(Address, (uint32_t)Data); - - /* If it is the last row, the bit will be cleared at the end of the operation */ - if(TypeProgram == FLASH_TYPEPROGRAM_FAST_AND_LAST) - { - prog_bit = FLASH_CR_FSTPG; - } - } - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the program operation is completed, disable the PG or FSTPG Bit */ - if (prog_bit != 0) - { - CLEAR_BIT(FLASH->CR, prog_bit); - } - - /* Flush the caches to be sure of the data consistency */ - FLASH_FlushCaches(); - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - - return status; -} - -/** - * @brief Program double word or fast program of a row at a specified address with interrupt enabled. - * @param TypeProgram: Indicate the way to program at a specified address. - * This parameter can be a value of @ref FLASH_Type_Program - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed - * This parameter is the data for the double word program and the address where - * are stored the data for the row fast program - * - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - - /* Deactivate the data cache if they are activated to avoid data misbehavior */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_DISABLED; - } - - /* Set internal variables used by the IRQ handler */ - if(TypeProgram == FLASH_TYPEPROGRAM_FAST_AND_LAST) - { - pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAM_LAST; - } - else - { - pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAM; - } - pFlash.Address = Address; - - /* Enable End of Operation and Error interrupts */ - __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_OPERR); - - if(TypeProgram == FLASH_TYPEPROGRAM_DOUBLEWORD) - { - /* Program double-word (64-bit) at a specified address */ - FLASH_Program_DoubleWord(Address, Data); - } - else if((TypeProgram == FLASH_TYPEPROGRAM_FAST) || (TypeProgram == FLASH_TYPEPROGRAM_FAST_AND_LAST)) - { - /* Fast program a 32 row double-word (64-bit) at a specified address */ - FLASH_Program_Fast(Address, (uint32_t)Data); - } - - return status; -} - -/** - * @brief Handle FLASH interrupt request. - * @retval None - */ -void HAL_FLASH_IRQHandler(void) -{ - uint32_t tmp_page; - - /* If the operation is completed, disable the PG, PNB, MER1, MER2 and PER Bit */ - CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_MER1 | FLASH_CR_PER | FLASH_CR_PNB)); -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - CLEAR_BIT(FLASH->CR, FLASH_CR_MER2); -#endif - - /* Disable the FSTPG Bit only if it is the last row programmed */ - if(pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAM_LAST) - { - CLEAR_BIT(FLASH->CR, FLASH_CR_FSTPG); - } - - /* Check FLASH operation error flags */ - if((__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PROGERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGSERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_MISERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_FASTERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) || -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PEMPTY))) -#else - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD))) -#endif - { - /*Save the error code*/ - FLASH_SetErrorCode(); - - /* Flush the caches to be sure of the data consistency */ - FLASH_FlushCaches() ; - - /* FLASH error interrupt user callback */ - if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGE_ERASE) - { - HAL_FLASH_OperationErrorCallback(pFlash.Page); - } - else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASS_ERASE) - { - HAL_FLASH_OperationErrorCallback(pFlash.Bank); - } - else if((pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAM) || - (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAM_LAST)) - { - HAL_FLASH_OperationErrorCallback(pFlash.Address); - } - - /*Stop the procedure ongoing*/ - pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - } - - /* Check FLASH End of Operation flag */ - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) - { - /* Clear FLASH End of Operation pending bit */ - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); - - if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGE_ERASE) - { - /* Nb of pages to erased can be decreased */ - pFlash.NbPagesToErase--; - - /* Check if there are still pages to erase*/ - if(pFlash.NbPagesToErase != 0) - { - /* Indicate user which page has been erased*/ - HAL_FLASH_EndOfOperationCallback(pFlash.Page); - - /* Increment page number */ - pFlash.Page++; - tmp_page = pFlash.Page; - FLASH_PageErase(tmp_page, pFlash.Bank); - } - else - { - /* No more pages to Erase */ - /* Reset Address and stop Erase pages procedure */ - pFlash.Page = 0xFFFFFFFF; - pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - - /* Flush the caches to be sure of the data consistency */ - FLASH_FlushCaches() ; - - /* FLASH EOP interrupt user callback */ - HAL_FLASH_EndOfOperationCallback(pFlash.Page); - } - } - else - { - /* Flush the caches to be sure of the data consistency */ - FLASH_FlushCaches() ; - - if(pFlash.ProcedureOnGoing == FLASH_PROC_MASS_ERASE) - { - /* MassErase ended. Return the selected bank */ - /* FLASH EOP interrupt user callback */ - HAL_FLASH_EndOfOperationCallback(pFlash.Bank); - } - else if((pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAM) || - (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAM_LAST)) - { - /* Program ended. Return the selected address */ - /* FLASH EOP interrupt user callback */ - HAL_FLASH_EndOfOperationCallback(pFlash.Address); - } - - /*Clear the procedure ongoing*/ - pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - } - } - - if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE) - { - /* Disable End of Operation and Error interrupts */ - __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_OPERR); - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - } -} - -/** - * @brief FLASH end of operation interrupt callback. - * @param ReturnValue: The value saved in this parameter depends on the ongoing procedure - * Mass Erase: Bank number which has been requested to erase - * Page Erase: Page which has been erased - * (if 0xFFFFFFFF, it means that all the selected pages have been erased) - * Program: Address which was selected for data program - * @retval None - */ -__weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(ReturnValue); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_FLASH_EndOfOperationCallback could be implemented in the user file - */ -} - -/** - * @brief FLASH operation error interrupt callback. - * @param ReturnValue: The value saved in this parameter depends on the ongoing procedure - * Mass Erase: Bank number which has been requested to erase - * Page Erase: Page number which returned an error - * Program: Address which was selected for data program - * @retval None - */ -__weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(ReturnValue); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_FLASH_OperationErrorCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions - * @brief Management functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the FLASH - memory operations. - -@endverbatim - * @{ - */ - -/** - * @brief Unlock the FLASH control register access. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Unlock(void) -{ - HAL_StatusTypeDef status = HAL_OK; - - if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) - { - /* Authorize the FLASH Registers access */ - WRITE_REG(FLASH->KEYR, FLASH_KEY1); - WRITE_REG(FLASH->KEYR, FLASH_KEY2); - - /* Verify Flash is unlocked */ - if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) - { - status = HAL_ERROR; - } - } - - return status; -} - -/** - * @brief Lock the FLASH control register access. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Lock(void) -{ - /* Set the LOCK Bit to lock the FLASH Registers access */ - SET_BIT(FLASH->CR, FLASH_CR_LOCK); - - return HAL_OK; -} - -/** - * @brief Unlock the FLASH Option Bytes Registers access. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void) -{ - if(READ_BIT(FLASH->CR, FLASH_CR_OPTLOCK) != RESET) - { - /* Authorizes the Option Byte register programming */ - WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1); - WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); - } - else - { - return HAL_ERROR; - } - - return HAL_OK; -} - -/** - * @brief Lock the FLASH Option Bytes Registers access. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_OB_Lock(void) -{ - /* Set the OPTLOCK Bit to lock the FLASH Option Byte Registers access */ - SET_BIT(FLASH->CR, FLASH_CR_OPTLOCK); - - return HAL_OK; -} - -/** - * @brief Launch the option byte loading. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_OB_Launch(void) -{ - /* Set the bit to force the option byte reloading */ - SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); - - /* Wait for last operation to be completed */ - return(FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE)); -} - -/** - * @} - */ - -/** @defgroup FLASH_Exported_Functions_Group3 Peripheral State and Errors functions - * @brief Peripheral Errors functions - * -@verbatim - =============================================================================== - ##### Peripheral Errors functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time Errors of the FLASH peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Get the specific FLASH error flag. - * @retval FLASH_ErrorCode: The returned value can be: - * @arg HAL_FLASH_ERROR_RD: FLASH Read Protection error flag (PCROP) - * @arg HAL_FLASH_ERROR_PGS: FLASH Programming Sequence error flag - * @arg HAL_FLASH_ERROR_PGP: FLASH Programming Parallelism error flag - * @arg HAL_FLASH_ERROR_PGA: FLASH Programming Alignment error flag - * @arg HAL_FLASH_ERROR_WRP: FLASH Write protected error flag - * @arg HAL_FLASH_ERROR_OPERATION: FLASH operation Error flag - * @arg HAL_FLASH_ERROR_NONE: No error set - * @arg HAL_FLASH_ERROR_OP: FLASH Operation error - * @arg HAL_FLASH_ERROR_PROG: FLASH Programming error - * @arg HAL_FLASH_ERROR_WRP: FLASH Write protection error - * @arg HAL_FLASH_ERROR_PGA: FLASH Programming alignment error - * @arg HAL_FLASH_ERROR_SIZ: FLASH Size error - * @arg HAL_FLASH_ERROR_PGS: FLASH Programming sequence error - * @arg HAL_FLASH_ERROR_MIS: FLASH Fast programming data miss error - * @arg HAL_FLASH_ERROR_FAST: FLASH Fast programming error - * @arg HAL_FLASH_ERROR_RD: FLASH PCROP read error - * @arg HAL_FLASH_ERROR_OPTV: FLASH Option validity error - * @arg FLASH_FLAG_PEMPTY : FLASH Boot from not programmed flash (apply only for STM32L43x/STM32L44x devices) - * @arg HAL_FLASH_ERROR_ECCD: FLASH two ECC errors have been detected - */ -uint32_t HAL_FLASH_GetError(void) -{ - return pFlash.ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** @addtogroup FLASH_Private_Functions - * @{ - */ - -/** - * @brief Wait for a FLASH operation to complete. - * @param Timeout: maximum flash operation timeout - * @retval HAL_StatusTypeDef HAL Status - */ -HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) -{ - /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. - Even if the FLASH operation fails, the BUSY flag will be reset and an error - flag will be set */ - - uint32_t tickstart = HAL_GetTick(); - - while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) - { - if(Timeout != HAL_MAX_DELAY) - { - if((HAL_GetTick() - tickstart) >= Timeout) - { - return HAL_TIMEOUT; - } - } - } - - if((__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PROGERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGSERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_MISERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_FASTERR)) || - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) || -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD)) || (__HAL_FLASH_GET_FLAG(FLASH_FLAG_PEMPTY))) -#else - (__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD))) -#endif - { - /*Save the error code*/ - FLASH_SetErrorCode(); - - return HAL_ERROR; - } - - /* Check FLASH End of Operation flag */ - if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) - { - /* Clear FLASH End of Operation pending bit */ - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); - } - - /* If there is an error flag set */ - return HAL_OK; -} - -/** - * @brief Set the specific FLASH error flag. - * @retval None - */ -static void FLASH_SetErrorCode(void) -{ - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_OP; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PROGERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_SIZ; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGSERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_PGS; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_MISERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_MIS; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_FASTERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_FAST; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_RD; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_ECCD)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_ECCD; - } - -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ - defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PEMPTY)) - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_PEMPTY; - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PEMPTY); - } -#endif - - /* Clear error programming flags */ - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS); -} - -/** - * @brief Program double-word (64-bit) at a specified address. - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed. - * @retval None - */ -static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data) -{ - /* Check the parameters */ - assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); - - /* Set PG bit */ - SET_BIT(FLASH->CR, FLASH_CR_PG); - - /* Program the double word */ - *(__IO uint32_t*)Address = (uint32_t)Data; - *(__IO uint32_t*)(Address+4) = (uint32_t)(Data >> 32); -} - -/** - * @brief Fast program a row double-word (64-bit) at a specified address. - * @param Address: specifies the address to be programmed. - * @param DataAddress: specifies the address where the data are stored. - * @retval None - */ -static void FLASH_Program_Fast(uint32_t Address, uint32_t DataAddress) -{ - uint8_t row_index = (2*FLASH_NB_DOUBLE_WORDS_IN_ROW); - __IO uint32_t *dest_addr = (__IO uint32_t*)Address; - __IO uint32_t *src_addr = (__IO uint32_t*)DataAddress; - - /* Check the parameters */ - assert_param(IS_FLASH_MAIN_MEM_ADDRESS(Address)); - - /* Set FSTPG bit */ - SET_BIT(FLASH->CR, FLASH_CR_FSTPG); - - /* Disable interrupts to avoid any interruption during the loop */ - __disable_irq(); - - /* Program the double word of the row */ - do - { - *dest_addr++ = *src_addr++; - } while (--row_index != 0); - - /* Re-enable the interrupts */ - __enable_irq(); -} - -/** - * @} - */ - -#endif /* HAL_FLASH_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c deleted file mode 100644 index 8f093595..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c +++ /dev/null @@ -1,1305 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash_ex.c - * @author MCD Application Team - * @brief Extended FLASH HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the FLASH extended peripheral: - * + Extended programming operations functions - * - @verbatim - ============================================================================== - ##### Flash Extended features ##### - ============================================================================== - - [..] Comparing to other previous devices, the FLASH interface for STM32L4xx - devices contains the following additional features - - (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write - capability (RWW) - (+) Dual bank memory organization - (+) PCROP protection for all banks - - ##### How to use this driver ##### - ============================================================================== - [..] This driver provides functions to configure and program the FLASH memory - of all STM32L4xx devices. It includes - (#) Flash Memory Erase functions: - (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and - HAL_FLASH_Lock() functions - (++) Erase function: Erase page, erase all sectors - (++) There are two modes of erase : - (+++) Polling Mode using HAL_FLASHEx_Erase() - (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT() - - (#) Option Bytes Programming function: Use HAL_FLASHEx_OBProgram() to : - (++) Set/Reset the write protection - (++) Set the Read protection Level - (++) Program the user Option Bytes - (++) Configure the PCROP protection - - (#) Get Option Bytes Configuration function: Use HAL_FLASHEx_OBGetConfig() to : - (++) Get the value of a write protection area - (++) Know if the read protection is activated - (++) Get the value of the user Option Bytes - (++) Get the value of a PCROP area - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup FLASHEx FLASHEx - * @brief FLASH Extended HAL module driver - * @{ - */ - -#ifdef HAL_FLASH_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/** @defgroup FLASHEx_Private_Variables FLASHEx Private Variables - * @{ - */ -extern FLASH_ProcessTypeDef pFlash; -/** - * @} - */ - -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions - * @{ - */ -extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); -void FLASH_PageErase(uint32_t Page, uint32_t Banks); -static void FLASH_MassErase(uint32_t Banks); -void FLASH_FlushCaches(void); -static HAL_StatusTypeDef FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRDPEndOffset); -static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint32_t RDPLevel); -static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig); -static HAL_StatusTypeDef FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr); -static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRDPEndOffset); -static uint32_t FLASH_OB_GetRDP(void); -static uint32_t FLASH_OB_GetUser(void); -static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr, uint32_t * PCROPEndAddr); -/** - * @} - */ - -/* Exported functions -------------------------------------------------------*/ -/** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions - * @{ - */ - -/** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions - * @brief Extended IO operation functions - * -@verbatim - =============================================================================== - ##### Extended programming operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the Extended FLASH - programming operations Operations. - -@endverbatim - * @{ - */ -/** - * @brief Perform a mass erase or erase the specified FLASH memory pages. - * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that - * contains the configuration information for the erasing. - * - * @param[out] PageError : pointer to variable that contains the configuration - * information on faulty page in case of error (0xFFFFFFFF means that all - * the pages have been correctly erased) - * - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) -{ - HAL_StatusTypeDef status = HAL_ERROR; - uint32_t page_index = 0; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check the parameters */ - assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if (status == HAL_OK) - { - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - - /* Deactivate the cache if they are activated to avoid data misbehavior */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET) - { - /* Disable instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); - - if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_ICACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_ICACHE_ENABLED; - } - } - else if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_DISABLED; - } - - if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) - { - /* Mass erase to be done */ - FLASH_MassErase(pEraseInit->Banks); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - /* If the erase operation is completed, disable the MER1 and MER2 Bits */ - CLEAR_BIT(FLASH->CR, (FLASH_CR_MER1 | FLASH_CR_MER2)); -#else - /* If the erase operation is completed, disable the MER1 Bit */ - CLEAR_BIT(FLASH->CR, (FLASH_CR_MER1)); -#endif - } - else - { - /*Initialization of PageError variable*/ - *PageError = 0xFFFFFFFF; - - for(page_index = pEraseInit->Page; page_index < (pEraseInit->Page + pEraseInit->NbPages); page_index++) - { - FLASH_PageErase(page_index, pEraseInit->Banks); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the erase operation is completed, disable the PER Bit */ - CLEAR_BIT(FLASH->CR, (FLASH_CR_PER | FLASH_CR_PNB)); - - if (status != HAL_OK) - { - /* In case of error, stop erase procedure and return the faulty address */ - *PageError = page_index; - break; - } - } - } - - /* Flush the caches to be sure of the data consistency */ - FLASH_FlushCaches(); - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - - return status; -} - -/** - * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled. - * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that - * contains the configuration information for the erasing. - * - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check the parameters */ - assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); - - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - - /* Deactivate the cache if they are activated to avoid data misbehavior */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET) - { - /* Disable instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); - - if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_ICACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_ICACHE_ENABLED; - } - } - else if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - pFlash.CacheToReactivate = FLASH_CACHE_DCACHE_ENABLED; - } - else - { - pFlash.CacheToReactivate = FLASH_CACHE_DISABLED; - } - - /* Enable End of Operation and Error interrupts */ - __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_OPERR); - - pFlash.Bank = pEraseInit->Banks; - - if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) - { - /* Mass erase to be done */ - pFlash.ProcedureOnGoing = FLASH_PROC_MASS_ERASE; - FLASH_MassErase(pEraseInit->Banks); - } - else - { - /* Erase by page to be done */ - pFlash.ProcedureOnGoing = FLASH_PROC_PAGE_ERASE; - pFlash.NbPagesToErase = pEraseInit->NbPages; - pFlash.Page = pEraseInit->Page; - - /*Erase 1st page and wait for IT */ - FLASH_PageErase(pEraseInit->Page, pEraseInit->Banks); - } - - return status; -} - -/** - * @brief Program Option bytes. - * @param pOBInit: pointer to an FLASH_OBInitStruct structure that - * contains the configuration information for the programming. - * - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check the parameters */ - assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); - - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - - /* Write protection configuration */ - if((pOBInit->OptionType & OPTIONBYTE_WRP) != RESET) - { - /* Configure of Write protection on the selected area */ - if(FLASH_OB_WRPConfig(pOBInit->WRPArea, pOBInit->WRPStartOffset, pOBInit->WRPEndOffset) != HAL_OK) - { - status = HAL_ERROR; - } - - } - - /* Read protection configuration */ - if((pOBInit->OptionType & OPTIONBYTE_RDP) != RESET) - { - /* Configure the Read protection level */ - if(FLASH_OB_RDPConfig(pOBInit->RDPLevel) != HAL_OK) - { - status = HAL_ERROR; - } - } - - /* User Configuration */ - if((pOBInit->OptionType & OPTIONBYTE_USER) != RESET) - { - /* Configure the user option bytes */ - if(FLASH_OB_UserConfig(pOBInit->USERType, pOBInit->USERConfig) != HAL_OK) - { - status = HAL_ERROR; - } - } - - /* PCROP Configuration */ - if((pOBInit->OptionType & OPTIONBYTE_PCROP) != RESET) - { - if (pOBInit->PCROPStartAddr != pOBInit->PCROPEndAddr) - { - /* Configure the Proprietary code readout protection */ - if(FLASH_OB_PCROPConfig(pOBInit->PCROPConfig, pOBInit->PCROPStartAddr, pOBInit->PCROPEndAddr) != HAL_OK) - { - status = HAL_ERROR; - } - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - - return status; -} - -/** - * @brief Get the Option bytes configuration. - * @param pOBInit: pointer to an FLASH_OBInitStruct structure that contains the - * configuration information. - * @note The fields pOBInit->WRPArea and pOBInit->PCROPConfig should indicate - * which area is requested for the WRP and PCROP, else no information will be returned - * - * @retval None - */ -void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) -{ - pOBInit->OptionType = (OPTIONBYTE_RDP | OPTIONBYTE_USER); - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if((pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAA) || (pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAB) || - (pOBInit->WRPArea == OB_WRPAREA_BANK2_AREAA) || (pOBInit->WRPArea == OB_WRPAREA_BANK2_AREAB)) -#else - if((pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAA) || (pOBInit->WRPArea == OB_WRPAREA_BANK1_AREAB)) -#endif - { - pOBInit->OptionType |= OPTIONBYTE_WRP; - /* Get write protection on the selected area */ - FLASH_OB_GetWRP(pOBInit->WRPArea, &(pOBInit->WRPStartOffset), &(pOBInit->WRPEndOffset)); - } - - /* Get Read protection level */ - pOBInit->RDPLevel = FLASH_OB_GetRDP(); - - /* Get the user option bytes */ - pOBInit->USERConfig = FLASH_OB_GetUser(); - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if((pOBInit->PCROPConfig == FLASH_BANK_1) || (pOBInit->PCROPConfig == FLASH_BANK_2)) -#else - if(pOBInit->PCROPConfig == FLASH_BANK_1) -#endif - { - pOBInit->OptionType |= OPTIONBYTE_PCROP; - /* Get the Proprietary code readout protection */ - FLASH_OB_GetPCROP(&(pOBInit->PCROPConfig), &(pOBInit->PCROPStartAddr), &(pOBInit->PCROPEndAddr)); - } -} - -/** - * @} - */ - -#if defined (FLASH_CFGR_LVEN) -/** @defgroup FLASHEx_Exported_Functions_Group2 Extended specific configuration functions - * @brief Extended specific configuration functions - * -@verbatim - =============================================================================== - ##### Extended specific configuration functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the Extended FLASH - specific configurations. - -@endverbatim - * @{ - */ - -/** - * @brief Configuration of the LVE pin of the Flash (managed by power controller - * or forced to low in order to use an external SMPS) - * @param ConfigLVE: Configuration of the LVE pin, - * This parameter can be one of the following values: - * @arg FLASH_LVE_PIN_CTRL: LVE FLASH pin controlled by power controller - * @arg FLASH_LVE_PIN_FORCED: LVE FLASH pin enforced to low (external SMPS used) - * - * @note Before enforcing the LVE pin to low, the SOC should be in low voltage - * range 2 and the voltage VDD12 should be higher than 1.08V and SMPS is ON. - * - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check the parameters */ - assert_param(IS_FLASH_LVE_PIN(ConfigLVE)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if (status == HAL_OK) - { - /* Check that the voltage scaling is range 2 */ - if (HAL_PWREx_GetVoltageRange() == PWR_REGULATOR_VOLTAGE_SCALE2) - { - /* Configure the LVEN bit */ - MODIFY_REG(FLASH->CFGR, FLASH_CFGR_LVEN, ConfigLVE); - - /* Check that the bit has been correctly configured */ - if (READ_BIT(FLASH->CFGR, FLASH_CFGR_LVEN) != ConfigLVE) - { - status = HAL_ERROR; - } - } - else - { - /* Not allow to force Flash LVE pin if not in voltage range 2 */ - status = HAL_ERROR; - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - - return status; -} - -/** - * @} - */ -#endif /* FLASH_CFGR_LVEN */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** @addtogroup FLASHEx_Private_Functions - * @{ - */ -/** - * @brief Mass erase of FLASH memory. - * @param Banks: Banks to be erased - * This parameter can be one of the following values: - * @arg FLASH_BANK_1: Bank1 to be erased - * @arg FLASH_BANK_2: Bank2 to be erased - * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased - * @retval None - */ -static void FLASH_MassErase(uint32_t Banks) -{ -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (READ_BIT(FLASH->OPTR, FLASH_OPTR_DBANK) != RESET) -#endif - { - /* Check the parameters */ - assert_param(IS_FLASH_BANK(Banks)); - - /* Set the Mass Erase Bit for the bank 1 if requested */ - if((Banks & FLASH_BANK_1) != RESET) - { - SET_BIT(FLASH->CR, FLASH_CR_MER1); - } - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - /* Set the Mass Erase Bit for the bank 2 if requested */ - if((Banks & FLASH_BANK_2) != RESET) - { - SET_BIT(FLASH->CR, FLASH_CR_MER2); - } -#endif - } -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - else - { - SET_BIT(FLASH->CR, (FLASH_CR_MER1 | FLASH_CR_MER2)); - } -#endif - - /* Proceed to erase all sectors */ - SET_BIT(FLASH->CR, FLASH_CR_STRT); -} - -/** - * @brief Erase the specified FLASH memory page. - * @param Page: FLASH page to erase - * This parameter must be a value between 0 and (max number of pages in the bank - 1) - * @param Banks: Bank(s) where the page will be erased - * This parameter can be one of the following values: - * @arg FLASH_BANK_1: Page in bank 1 to be erased - * @arg FLASH_BANK_2: Page in bank 2 to be erased - * @retval None - */ -void FLASH_PageErase(uint32_t Page, uint32_t Banks) -{ - /* Check the parameters */ - assert_param(IS_FLASH_PAGE(Page)); - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if(READ_BIT(FLASH->OPTR, FLASH_OPTR_DBANK) == RESET) - { - CLEAR_BIT(FLASH->CR, FLASH_CR_BKER); - } - else -#endif - { - assert_param(IS_FLASH_BANK_EXCLUSIVE(Banks)); - - if((Banks & FLASH_BANK_1) != RESET) - { - CLEAR_BIT(FLASH->CR, FLASH_CR_BKER); - } - else - { - SET_BIT(FLASH->CR, FLASH_CR_BKER); - } - } -#endif - - /* Proceed to erase the page */ - MODIFY_REG(FLASH->CR, FLASH_CR_PNB, (Page << POSITION_VAL(FLASH_CR_PNB))); - SET_BIT(FLASH->CR, FLASH_CR_PER); - SET_BIT(FLASH->CR, FLASH_CR_STRT); -} - -/** - * @brief Flush the instruction and data caches. - * @retval None - */ -void FLASH_FlushCaches(void) -{ - /* Flush instruction cache */ - if((pFlash.CacheToReactivate == FLASH_CACHE_ICACHE_ENABLED) || - (pFlash.CacheToReactivate == FLASH_CACHE_ICACHE_DCACHE_ENABLED)) - { - /* Reset instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_RESET(); - /* Enable instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); - } - - /* Flush data cache */ - if((pFlash.CacheToReactivate == FLASH_CACHE_DCACHE_ENABLED) || - (pFlash.CacheToReactivate == FLASH_CACHE_ICACHE_DCACHE_ENABLED)) - { - /* Reset data cache */ - __HAL_FLASH_DATA_CACHE_RESET(); - /* Enable data cache */ - __HAL_FLASH_DATA_CACHE_ENABLE(); - } - - /* Reset internal variable */ - pFlash.CacheToReactivate = FLASH_CACHE_DISABLED; -} - -/** - * @brief Configure the write protection of the desired pages. - * - * @note When the memory read protection level is selected (RDP level = 1), - * it is not possible to program or erase Flash memory if the CPU debug - * features are connected (JTAG or single wire) or boot code is being - * executed from RAM or System flash, even if WRP is not activated. - * @note To configure the WRP options, the option lock bit OPTLOCK must be - * cleared with the call of the HAL_FLASH_OB_Unlock() function. - * @note To validate the WRP options, the option bytes must be reloaded - * through the call of the HAL_FLASH_OB_Launch() function. - * - * @param WRPArea: specifies the area to be configured. - * This parameter can be one of the following values: - * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A - * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B - * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A (don't apply for STM32L43x/STM32L44x devices) - * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B (don't apply for STM32L43x/STM32L44x devices) - * - * @param WRPStartOffset: specifies the start page of the write protected area - * This parameter can be page number between 0 and (max number of pages in the bank - 1) - * - * @param WRDPEndOffset: specifies the end page of the write protected area - * This parameter can be page number between WRPStartOffset and (max number of pages in the bank - 1) - * - * @retval HAL Status - */ -static HAL_StatusTypeDef FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRDPEndOffset) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_OB_WRPAREA(WRPArea)); - assert_param(IS_FLASH_PAGE(WRPStartOffset)); - assert_param(IS_FLASH_PAGE(WRDPEndOffset)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if(status == HAL_OK) - { - /* Configure the write protected area */ - if(WRPArea == OB_WRPAREA_BANK1_AREAA) - { - MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), - (WRPStartOffset | (WRDPEndOffset << 16))); - } - else if(WRPArea == OB_WRPAREA_BANK1_AREAB) - { - MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), - (WRPStartOffset | (WRDPEndOffset << 16))); - } -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - else if(WRPArea == OB_WRPAREA_BANK2_AREAA) - { - MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), - (WRPStartOffset | (WRDPEndOffset << 16))); - } - else if(WRPArea == OB_WRPAREA_BANK2_AREAB) - { - MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), - (WRPStartOffset | (WRDPEndOffset << 16))); - } -#endif - - /* Set OPTSTRT Bit */ - SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the option byte program operation is completed, disable the OPTSTRT Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - } - - return status; -} - -/** - * @brief Set the read protection level. - * - * @note To configure the RDP level, the option lock bit OPTLOCK must be - * cleared with the call of the HAL_FLASH_OB_Unlock() function. - * @note To validate the RDP level, the option bytes must be reloaded - * through the call of the HAL_FLASH_OB_Launch() function. - * @note !!! Warning : When enabling OB_RDP level 2 it's no more possible - * to go back to level 1 or 0 !!! - * - * @param RDPLevel: specifies the read protection level. - * This parameter can be one of the following values: - * @arg OB_RDP_LEVEL_0: No protection - * @arg OB_RDP_LEVEL_1: Read protection of the memory - * @arg OB_RDP_LEVEL_2: Full chip protection - * - * @retval HAL status - */ -static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint32_t RDPLevel) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_OB_RDP_LEVEL(RDPLevel)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if(status == HAL_OK) - { - /* Configure the RDP level in the option bytes register */ - MODIFY_REG(FLASH->OPTR, FLASH_OPTR_RDP, RDPLevel); - - /* Set OPTSTRT Bit */ - SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the option byte program operation is completed, disable the OPTSTRT Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - } - - return status; -} - -/** - * @brief Program the FLASH User Option Byte. - * - * @note To configure the user option bytes, the option lock bit OPTLOCK must - * be cleared with the call of the HAL_FLASH_OB_Unlock() function. - * @note To validate the user option bytes, the option bytes must be reloaded - * through the call of the HAL_FLASH_OB_Launch() function. - * - * @param UserType: The FLASH User Option Bytes to be modified - * @param UserConfig: The FLASH User Option Bytes values: - * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), IWDG_SW(Bit16), - * IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), BFB2(Bit20), - * DUALBANK(Bit21), nBOOT1(Bit23), SRAM2_PE(Bit24) and SRAM2_RST(Bit25). - * - * @retval HAL status - */ -static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig) -{ - uint32_t optr_reg_val = 0; - uint32_t optr_reg_mask = 0; - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_OB_USER_TYPE(UserType)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if(status == HAL_OK) - { - if((UserType & OB_USER_BOR_LEV) != RESET) - { - /* BOR level option byte should be modified */ - assert_param(IS_OB_USER_BOR_LEVEL(UserConfig & FLASH_OPTR_BOR_LEV)); - - /* Set value and mask for BOR level option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_BOR_LEV); - optr_reg_mask |= FLASH_OPTR_BOR_LEV; - } - - if((UserType & OB_USER_nRST_STOP) != RESET) - { - /* nRST_STOP option byte should be modified */ - assert_param(IS_OB_USER_STOP(UserConfig & FLASH_OPTR_nRST_STOP)); - - /* Set value and mask for nRST_STOP option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STOP); - optr_reg_mask |= FLASH_OPTR_nRST_STOP; - } - - if((UserType & OB_USER_nRST_STDBY) != RESET) - { - /* nRST_STDBY option byte should be modified */ - assert_param(IS_OB_USER_STANDBY(UserConfig & FLASH_OPTR_nRST_STDBY)); - - /* Set value and mask for nRST_STDBY option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STDBY); - optr_reg_mask |= FLASH_OPTR_nRST_STDBY; - } - - if((UserType & OB_USER_nRST_SHDW) != RESET) - { - /* nRST_SHDW option byte should be modified */ - assert_param(IS_OB_USER_SHUTDOWN(UserConfig & FLASH_OPTR_nRST_SHDW)); - - /* Set value and mask for nRST_SHDW option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_SHDW); - optr_reg_mask |= FLASH_OPTR_nRST_SHDW; - } - - if((UserType & OB_USER_IWDG_SW) != RESET) - { - /* IWDG_SW option byte should be modified */ - assert_param(IS_OB_USER_IWDG(UserConfig & FLASH_OPTR_IWDG_SW)); - - /* Set value and mask for IWDG_SW option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_SW); - optr_reg_mask |= FLASH_OPTR_IWDG_SW; - } - - if((UserType & OB_USER_IWDG_STOP) != RESET) - { - /* IWDG_STOP option byte should be modified */ - assert_param(IS_OB_USER_IWDG_STOP(UserConfig & FLASH_OPTR_IWDG_STOP)); - - /* Set value and mask for IWDG_STOP option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STOP); - optr_reg_mask |= FLASH_OPTR_IWDG_STOP; - } - - if((UserType & OB_USER_IWDG_STDBY) != RESET) - { - /* IWDG_STDBY option byte should be modified */ - assert_param(IS_OB_USER_IWDG_STDBY(UserConfig & FLASH_OPTR_IWDG_STDBY)); - - /* Set value and mask for IWDG_STDBY option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STDBY); - optr_reg_mask |= FLASH_OPTR_IWDG_STDBY; - } - - if((UserType & OB_USER_WWDG_SW) != RESET) - { - /* WWDG_SW option byte should be modified */ - assert_param(IS_OB_USER_WWDG(UserConfig & FLASH_OPTR_WWDG_SW)); - - /* Set value and mask for WWDG_SW option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_WWDG_SW); - optr_reg_mask |= FLASH_OPTR_WWDG_SW; - } - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if((UserType & OB_USER_BFB2) != RESET) - { - /* BFB2 option byte should be modified */ - assert_param(IS_OB_USER_BFB2(UserConfig & FLASH_OPTR_BFB2)); - - /* Set value and mask for BFB2 option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_BFB2); - optr_reg_mask |= FLASH_OPTR_BFB2; - } - - if((UserType & OB_USER_DUALBANK) != RESET) - { -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - /* DUALBANK option byte should be modified */ - assert_param(IS_OB_USER_DUALBANK(UserConfig & FLASH_OPTR_DB1M)); - - /* Set value and mask for DUALBANK option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_DB1M); - optr_reg_mask |= FLASH_OPTR_DB1M; -#else - /* DUALBANK option byte should be modified */ - assert_param(IS_OB_USER_DUALBANK(UserConfig & FLASH_OPTR_DUALBANK)); - - /* Set value and mask for DUALBANK option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_DUALBANK); - optr_reg_mask |= FLASH_OPTR_DUALBANK; -#endif - } -#endif - - if((UserType & OB_USER_nBOOT1) != RESET) - { - /* nBOOT1 option byte should be modified */ - assert_param(IS_OB_USER_BOOT1(UserConfig & FLASH_OPTR_nBOOT1)); - - /* Set value and mask for nBOOT1 option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT1); - optr_reg_mask |= FLASH_OPTR_nBOOT1; - } - - if((UserType & OB_USER_SRAM2_PE) != RESET) - { - /* SRAM2_PE option byte should be modified */ - assert_param(IS_OB_USER_SRAM2_PARITY(UserConfig & FLASH_OPTR_SRAM2_PE)); - - /* Set value and mask for SRAM2_PE option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_PE); - optr_reg_mask |= FLASH_OPTR_SRAM2_PE; - } - - if((UserType & OB_USER_SRAM2_RST) != RESET) - { - /* SRAM2_RST option byte should be modified */ - assert_param(IS_OB_USER_SRAM2_RST(UserConfig & FLASH_OPTR_SRAM2_RST)); - - /* Set value and mask for SRAM2_RST option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_RST); - optr_reg_mask |= FLASH_OPTR_SRAM2_RST; - } - -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || \ - defined (STM32L443xx) || defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if((UserType & OB_USER_nSWBOOT0) != RESET) - { - /* nSWBOOT0 option byte should be modified */ - assert_param(IS_OB_USER_SWBOOT0(UserConfig & FLASH_OPTR_nSWBOOT0)); - - /* Set value and mask for nSWBOOT0 option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nSWBOOT0); - optr_reg_mask |= FLASH_OPTR_nSWBOOT0; - } - - if((UserType & OB_USER_nBOOT0) != RESET) - { - /* nBOOT0 option byte should be modified */ - assert_param(IS_OB_USER_BOOT0(UserConfig & FLASH_OPTR_nBOOT0)); - - /* Set value and mask for nBOOT0 option byte */ - optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT0); - optr_reg_mask |= FLASH_OPTR_nBOOT0; - } -#endif - - /* Configure the option bytes register */ - MODIFY_REG(FLASH->OPTR, optr_reg_mask, optr_reg_val); - - /* Set OPTSTRT Bit */ - SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the option byte program operation is completed, disable the OPTSTRT Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - } - - return status; -} - -/** - * @brief Configure the Proprietary code readout protection of the desired addresses. - * - * @note To configure the PCROP options, the option lock bit OPTLOCK must be - * cleared with the call of the HAL_FLASH_OB_Unlock() function. - * @note To validate the PCROP options, the option bytes must be reloaded - * through the call of the HAL_FLASH_OB_Launch() function. - * - * @param PCROPConfig: specifies the configuration (Bank to be configured and PCROP_RDP option). - * This parameter must be a combination of FLASH_BANK_1 or FLASH_BANK_2 - * with OB_PCROP_RDP_NOT_ERASE or OB_PCROP_RDP_ERASE - * - * @param PCROPStartAddr: specifies the start address of the Proprietary code readout protection - * This parameter can be an address between begin and end of the bank - * - * @param PCROPEndAddr: specifies the end address of the Proprietary code readout protection - * This parameter can be an address between PCROPStartAddr and end of the bank - * - * @retval HAL Status - */ -static HAL_StatusTypeDef FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr) -{ - HAL_StatusTypeDef status = HAL_OK; - uint32_t reg_value = 0; - uint32_t bank1_addr; -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - uint32_t bank2_addr; -#endif - - /* Check the parameters */ - assert_param(IS_FLASH_BANK_EXCLUSIVE(PCROPConfig & FLASH_BANK_BOTH)); - assert_param(IS_OB_PCROP_RDP(PCROPConfig & FLASH_PCROP1ER_PCROP_RDP)); - assert_param(IS_FLASH_MAIN_MEM_ADDRESS(PCROPStartAddr)); - assert_param(IS_FLASH_MAIN_MEM_ADDRESS(PCROPEndAddr)); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - if(status == HAL_OK) - { -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - /* Get the information about the bank swapping */ - if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) - { - bank1_addr = FLASH_BASE; - bank2_addr = FLASH_BASE + FLASH_BANK_SIZE; - } - else - { - bank1_addr = FLASH_BASE + FLASH_BANK_SIZE; - bank2_addr = FLASH_BASE; - } -#else - bank1_addr = FLASH_BASE; -#endif - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (READ_BIT(FLASH->OPTR, FLASH_OPTR_DBANK) == RESET) - { - /* Configure the Proprietary code readout protection */ - if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_1) - { - reg_value = ((PCROPStartAddr - FLASH_BASE) >> 4); - MODIFY_REG(FLASH->PCROP1SR, FLASH_PCROP1SR_PCROP1_STRT, reg_value); - - reg_value = ((PCROPEndAddr - FLASH_BASE) >> 4); - MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP1_END, reg_value); - } - else if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_2) - { - reg_value = ((PCROPStartAddr - FLASH_BASE) >> 4); - MODIFY_REG(FLASH->PCROP2SR, FLASH_PCROP2SR_PCROP2_STRT, reg_value); - - reg_value = ((PCROPEndAddr - FLASH_BASE) >> 4); - MODIFY_REG(FLASH->PCROP2ER, FLASH_PCROP2ER_PCROP2_END, reg_value); - } - } - else -#endif - { - /* Configure the Proprietary code readout protection */ - if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_1) - { - reg_value = ((PCROPStartAddr - bank1_addr) >> 3); - MODIFY_REG(FLASH->PCROP1SR, FLASH_PCROP1SR_PCROP1_STRT, reg_value); - - reg_value = ((PCROPEndAddr - bank1_addr) >> 3); - MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP1_END, reg_value); - } -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - else if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_2) - { - reg_value = ((PCROPStartAddr - bank2_addr) >> 3); - MODIFY_REG(FLASH->PCROP2SR, FLASH_PCROP2SR_PCROP2_STRT, reg_value); - - reg_value = ((PCROPEndAddr - bank2_addr) >> 3); - MODIFY_REG(FLASH->PCROP2ER, FLASH_PCROP2ER_PCROP2_END, reg_value); - } -#endif - } - - MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP_RDP, (PCROPConfig & FLASH_PCROP1ER_PCROP_RDP)); - - /* Set OPTSTRT Bit */ - SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - - /* If the option byte program operation is completed, disable the OPTSTRT Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - } - - return status; -} - -/** - * @brief Return the FLASH Write Protection Option Bytes value. - * - * @param[in] WRPArea: specifies the area to be returned. - * This parameter can be one of the following values: - * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A - * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B - * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A (don't apply to STM32L43x/STM32L44x devices) - * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B (don't apply to STM32L43x/STM32L44x devices) - * - * @param[out] WRPStartOffset: specifies the address where to copied the start page - * of the write protected area - * - * @param[out] WRDPEndOffset: specifies the address where to copied the end page of - * the write protected area - * - * @retval None - */ -static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRDPEndOffset) -{ - /* Get the configuration of the write protected area */ - if(WRPArea == OB_WRPAREA_BANK1_AREAA) - { - *WRPStartOffset = READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_STRT); - *WRDPEndOffset = (READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_END) >> 16); - } - else if(WRPArea == OB_WRPAREA_BANK1_AREAB) - { - *WRPStartOffset = READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_STRT); - *WRDPEndOffset = (READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_END) >> 16); - } -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - else if(WRPArea == OB_WRPAREA_BANK2_AREAA) - { - *WRPStartOffset = READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_STRT); - *WRDPEndOffset = (READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_END) >> 16); - } - else if(WRPArea == OB_WRPAREA_BANK2_AREAB) - { - *WRPStartOffset = READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_STRT); - *WRDPEndOffset = (READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_END) >> 16); - } -#endif -} - -/** - * @brief Return the FLASH Read Protection level. - * @retval FLASH ReadOut Protection Status: - * This return value can be one of the following values: - * @arg OB_RDP_LEVEL_0: No protection - * @arg OB_RDP_LEVEL_1: Read protection of the memory - * @arg OB_RDP_LEVEL_2: Full chip protection - */ -static uint32_t FLASH_OB_GetRDP(void) -{ - if ((READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP) != OB_RDP_LEVEL_0) && - (READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP) != OB_RDP_LEVEL_2)) - { - return (OB_RDP_LEVEL_1); - } - else - { - return (READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP)); - } -} - -/** - * @brief Return the FLASH User Option Byte value. - * @retval The FLASH User Option Bytes values: - * For STM32L47x/STM32L48x devices : - * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), nRST_SHDW(Bit14), - * IWDG_SW(Bit16), IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), - * BFB2(Bit20), DUALBANK(Bit21), nBOOT1(Bit23), SRAM2_PE(Bit24) and SRAM2_RST(Bit25). - * For STM32L43x/STM32L44x devices : - * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), nRST_SHDW(Bit14), - * IWDG_SW(Bit16), IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), - * nBOOT1(Bit23), SRAM2_PE(Bit24), SRAM2_RST(Bit25), nSWBOOT0(Bit26) and nBOOT0(Bit27). - */ -static uint32_t FLASH_OB_GetUser(void) -{ - uint32_t user_config = READ_REG(FLASH->OPTR); - CLEAR_BIT(user_config, FLASH_OPTR_RDP); - - return user_config; -} - -/** - * @brief Return the FLASH Write Protection Option Bytes value. - * - * @param PCROPConfig [inout]: specifies the configuration (Bank to be configured and PCROP_RDP option). - * This parameter must be a combination of FLASH_BANK_1 or FLASH_BANK_2 - * with OB_PCROP_RDP_NOT_ERASE or OB_PCROP_RDP_ERASE - * - * @param PCROPStartAddr [out]: specifies the address where to copied the start address - * of the Proprietary code readout protection - * - * @param PCROPEndAddr [out]: specifies the address where to copied the end address of - * the Proprietary code readout protection - * - * @retval None - */ -static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr, uint32_t * PCROPEndAddr) -{ - uint32_t reg_value = 0; - uint32_t bank1_addr; -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - uint32_t bank2_addr; -#endif - -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - /* Get the information about the bank swapping */ - if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) - { - bank1_addr = FLASH_BASE; - bank2_addr = FLASH_BASE + FLASH_BANK_SIZE; - } - else - { - bank1_addr = FLASH_BASE + FLASH_BANK_SIZE; - bank2_addr = FLASH_BASE; - } -#else - bank1_addr = FLASH_BASE; -#endif - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (READ_BIT(FLASH->OPTR, FLASH_OPTR_DBANK) == RESET) - { - if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_1) - { - reg_value = (READ_REG(FLASH->PCROP1SR) & FLASH_PCROP1SR_PCROP1_STRT); - *PCROPStartAddr = (reg_value << 4) + FLASH_BASE; - - reg_value = (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP1_END); - *PCROPEndAddr = (reg_value << 4) + FLASH_BASE; - } - else if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_2) - { - reg_value = (READ_REG(FLASH->PCROP2SR) & FLASH_PCROP2SR_PCROP2_STRT); - *PCROPStartAddr = (reg_value << 4) + FLASH_BASE; - - reg_value = (READ_REG(FLASH->PCROP2ER) & FLASH_PCROP2ER_PCROP2_END); - *PCROPEndAddr = (reg_value << 4) + FLASH_BASE; - } - } - else -#endif - { - if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_1) - { - reg_value = (READ_REG(FLASH->PCROP1SR) & FLASH_PCROP1SR_PCROP1_STRT); - *PCROPStartAddr = (reg_value << 3) + bank1_addr; - - reg_value = (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP1_END); - *PCROPEndAddr = (reg_value << 3) + bank1_addr; - } -#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - else if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_2) - { - reg_value = (READ_REG(FLASH->PCROP2SR) & FLASH_PCROP2SR_PCROP2_STRT); - *PCROPStartAddr = (reg_value << 3) + bank2_addr; - - reg_value = (READ_REG(FLASH->PCROP2ER) & FLASH_PCROP2ER_PCROP2_END); - *PCROPEndAddr = (reg_value << 3) + bank2_addr; - } -#endif - } - - *PCROPConfig |= (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP_RDP); -} -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_FLASH_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c deleted file mode 100644 index 537560f7..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c +++ /dev/null @@ -1,271 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_flash_ramfunc.c - * @author MCD Application Team - * @brief FLASH RAMFUNC driver. - * This file provides a Flash firmware functions which should be - * executed from internal SRAM - * + FLASH HalfPage Programming - * + FLASH Power Down in Run mode - * - * @verbatim - ============================================================================== - ##### Flash RAM functions ##### - ============================================================================== - - *** ARM Compiler *** - -------------------- - [..] RAM functions are defined using the toolchain options. - Functions that are executed in RAM should reside in a separate - source module. Using the 'Options for File' dialog you can simply change - the 'Code / Const' area of a module to a memory space in physical RAM. - Available memory areas are declared in the 'Target' tab of the - Options for Target' dialog. - - *** ICCARM Compiler *** - ----------------------- - [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". - - *** GNU Compiler *** - -------------------- - [..] RAM functions are defined using a specific toolchain attribute - "__attribute__((section(".RamFunc")))". - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC - * @brief FLASH functions executed from RAM - * @{ - */ - -#ifdef HAL_FLASH_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -extern FLASH_ProcessTypeDef pFlash; - -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions -------------------------------------------------------*/ - -/** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH in RAM function Exported Functions - * @{ - */ - -/** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### ramfunc functions ##### - =============================================================================== - [..] - This subsection provides a set of functions that should be executed from RAM. - -@endverbatim - * @{ - */ - -/** - * @brief Enable the Power down in Run Mode - * @note This function should be called and executed from SRAM memory - * @retval None - */ -__RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void) -{ - /* Enable the Power Down in Run mode*/ - __HAL_FLASH_POWER_DOWN_ENABLE(); - - return HAL_OK; - -} - -/** - * @brief Disable the Power down in Run Mode - * @note This function should be called and executed from SRAM memory - * @retval None - */ -__RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void) -{ - /* Disable the Power Down in Run mode*/ - __HAL_FLASH_POWER_DOWN_DISABLE(); - - return HAL_OK; -} - -#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -/** - * @brief Program the FLASH DBANK User Option Byte. - * - * @note To configure the user option bytes, the option lock bit OPTLOCK must - * be cleared with the call of the HAL_FLASH_OB_Unlock() function. - * @note To modify the DBANK option byte, no PCROP region should be defined. - * To deactivate PCROP, user should perform RDP changing - * - * @param DBankConfig: The FLASH DBANK User Option Byte value. - * This parameter can be one of the following values: - * @arg OB_DBANK_128_BITS: Single-bank with 128-bits data - * @arg OB_DBANK_64_BITS: Dual-bank with 64-bits data - * - * @retval HAL status - */ -__RAM_FUNC HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig) -{ - register uint32_t count, reg; - HAL_StatusTypeDef status = HAL_ERROR; - - /* Process Locked */ - __HAL_LOCK(&pFlash); - - /* Check if the PCROP is disabled */ - reg = FLASH->PCROP1SR; - if (reg > FLASH->PCROP1ER) - { - reg = FLASH->PCROP2SR; - if (reg > FLASH->PCROP2ER) - { - /* Disable Flash prefetch */ - __HAL_FLASH_PREFETCH_BUFFER_DISABLE(); - - if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET) - { - /* Disable Flash instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); - - /* Flush Flash instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_RESET(); - } - - if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) - { - /* Disable Flash data cache */ - __HAL_FLASH_DATA_CACHE_DISABLE(); - - /* Flush Flash data cache */ - __HAL_FLASH_DATA_CACHE_RESET(); - } - - /* Disable WRP zone 1 of 1st bank if needed */ - reg = FLASH->WRP1AR; - if (((reg & FLASH_WRP1AR_WRP1A_STRT) >> POSITION_VAL(FLASH_WRP1AR_WRP1A_STRT)) <= - ((reg & FLASH_WRP1AR_WRP1A_END) >> POSITION_VAL(FLASH_WRP1AR_WRP1A_END))) - { - MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), FLASH_WRP1AR_WRP1A_STRT); - } - - /* Disable WRP zone 2 of 1st bank if needed */ - reg = FLASH->WRP1BR; - if (((reg & FLASH_WRP1BR_WRP1B_STRT) >> POSITION_VAL(FLASH_WRP1BR_WRP1B_STRT)) <= - ((reg & FLASH_WRP1BR_WRP1B_END) >> POSITION_VAL(FLASH_WRP1BR_WRP1B_END))) - { - MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), FLASH_WRP1BR_WRP1B_STRT); - } - - /* Disable WRP zone 1 of 2nd bank if needed */ - reg = FLASH->WRP2AR; - if (((reg & FLASH_WRP2AR_WRP2A_STRT) >> POSITION_VAL(FLASH_WRP2AR_WRP2A_STRT)) <= - ((reg & FLASH_WRP2AR_WRP2A_END) >> POSITION_VAL(FLASH_WRP2AR_WRP2A_END))) - { - MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), FLASH_WRP2AR_WRP2A_STRT); - } - - /* Disable WRP zone 2 of 2nd bank if needed */ - reg = FLASH->WRP2BR; - if (((reg & FLASH_WRP2BR_WRP2B_STRT) >> POSITION_VAL(FLASH_WRP2BR_WRP2B_STRT)) <= - ((reg & FLASH_WRP2BR_WRP2B_END) >> POSITION_VAL(FLASH_WRP2BR_WRP2B_END))) - { - MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), FLASH_WRP2BR_WRP2B_STRT); - } - - /* Modify the DBANK user option byte */ - MODIFY_REG(FLASH->OPTR, FLASH_OPTR_DBANK, DBankConfig); - - /* Set OPTSTRT Bit */ - SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Wait for last operation to be completed */ - /* 8 is the number of required instruction cycles for the below loop statement (timeout expressed in ms) */ - count = FLASH_TIMEOUT_VALUE * (SystemCoreClock / 8 / 1000); - do - { - if (count-- == 0) - { - break; - } - } while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET); - - /* If the option byte program operation is completed, disable the OPTSTRT Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); - - /* Set the bit to force the option byte reloading */ - SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - - return status; -} -#endif - -/** - * @} - */ - -/** - * @} - */ -#endif /* HAL_FLASH_MODULE_ENABLED */ - - - -/** - * @} - */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c deleted file mode 100644 index a2cf3292..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c +++ /dev/null @@ -1,568 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_gpio.c - * @author MCD Application Team - * @brief GPIO HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the General Purpose Input/Output (GPIO) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * - @verbatim - ============================================================================== - ##### GPIO Peripheral features ##### - ============================================================================== - [..] - (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually - configured by software in several modes: - (++) Input mode - (++) Analog mode - (++) Output mode - (++) Alternate function mode - (++) External interrupt/event lines - - (+) During and just after reset, the alternate functions and external interrupt - lines are not active and the I/O ports are configured in input floating mode. - - (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be - activated or not. - - (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull - type and the IO speed can be selected depending on the VDD value. - - (+) The microcontroller IO pins are connected to onboard peripherals/modules through a - multiplexer that allows only one peripheral alternate function (AF) connected - to an IO pin at a time. In this way, there can be no conflict between peripherals - sharing the same IO pin. - - (+) All ports have external interrupt/event capability. To use external interrupt - lines, the port must be configured in input mode. All available GPIO pins are - connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. - - (+) The external interrupt/event controller consists of up to 39 edge detectors - (16 lines are connected to GPIO) for generating event/interrupt requests (each - input line can be independently configured to select the type (interrupt or event) - and the corresponding trigger event (rising or falling or both). Each line can - also be masked independently. - - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE(). - - (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). - (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure - (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef - structure. - (++) In case of Output or alternate function mode selection: the speed is - configured through "Speed" member from GPIO_InitTypeDef structure. - (++) In alternate mode is selection, the alternate function connected to the IO - is configured through "Alternate" member from GPIO_InitTypeDef structure. - (++) Analog mode is required when a pin is to be used as ADC channel - or DAC output. - (++) In case of external interrupt/event selection the "Mode" member from - GPIO_InitTypeDef structure select the type (interrupt or event) and - the corresponding trigger event (rising or falling or both). - - (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority - mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using - HAL_NVIC_EnableIRQ(). - - (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). - - (#) To set/reset the level of a pin configured in output mode use - HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). - - (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). - - (#) During and just after reset, the alternate functions are not - active and the GPIO pins are configured in input floating mode (except JTAG - pins). - - (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose - (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has - priority over the GPIO function. - - (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as - general purpose PH0 and PH1, respectively, when the HSE oscillator is off. - The HSE has priority over the GPIO function. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup GPIO GPIO - * @brief GPIO HAL module driver - * @{ - */ - -#ifdef HAL_GPIO_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/** @defgroup GPIO_Private_Defines GPIO Private Defines - * @{ - */ -#define GPIO_MODE ((uint32_t)0x00000003) -#define ANALOG_MODE ((uint32_t)0x00000008) -#define EXTI_MODE ((uint32_t)0x10000000) -#define GPIO_MODE_IT ((uint32_t)0x00010000) -#define GPIO_MODE_EVT ((uint32_t)0x00020000) -#define RISING_EDGE ((uint32_t)0x00100000) -#define FALLING_EDGE ((uint32_t)0x00200000) -#define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010) - -#define GPIO_NUMBER ((uint32_t)16) -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/** @defgroup GPIO_Private_Macros GPIO Private Macros - * @{ - */ -/** - * @} - */ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup GPIO_Exported_Functions GPIO Exported Functions - * @{ - */ - -/** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init. - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains - * the configuration information for the specified GPIO peripheral. - * @retval None - */ -void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) -{ - uint32_t position = 0x00; - uint32_t iocurrent = 0x00; - uint32_t temp = 0x00; - - /* Check the parameters */ - assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); - assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); - assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); - - /* Configure the port pins */ - while (((GPIO_Init->Pin) >> position) != RESET) - { - /* Get current io position */ - iocurrent = (GPIO_Init->Pin) & (1U << position); - - if(iocurrent) - { - /*--------------------- GPIO Mode Configuration ------------------------*/ - /* In case of Alternate function mode selection */ - if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - { - /* Check the Alternate function parameters */ - assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); - assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); - - /* Configure Alternate function mapped with the current IO */ - temp = GPIOx->AFR[position >> 3]; - temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; - temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4)); - GPIOx->AFR[position >> 3] = temp; - } - - /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - temp = GPIOx->MODER; - temp &= ~(GPIO_MODER_MODE0 << (position * 2)); - temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2)); - GPIOx->MODER = temp; - - /* In case of Output or Alternate function mode selection */ - if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - { - /* Check the Speed parameter */ - assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); - /* Configure the IO Speed */ - temp = GPIOx->OSPEEDR; - temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2)); - temp |= (GPIO_Init->Speed << (position * 2)); - GPIOx->OSPEEDR = temp; - - /* Configure the IO Output Type */ - temp = GPIOx->OTYPER; - temp &= ~(GPIO_OTYPER_OT0 << position) ; - temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position); - GPIOx->OTYPER = temp; - } - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - - /* In case of Analog mode, check if ADC control mode is selected */ - if((GPIO_Init->Mode & GPIO_MODE_ANALOG) == GPIO_MODE_ANALOG) - { - /* Configure the IO Output Type */ - temp = GPIOx->ASCR; - temp &= ~(GPIO_ASCR_ASC0 << position) ; - temp |= (((GPIO_Init->Mode & ANALOG_MODE) >> 3) << position); - GPIOx->ASCR = temp; - } - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - - /* Activate the Pull-up or Pull down resistor for the current IO */ - temp = GPIOx->PUPDR; - temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2)); - temp |= ((GPIO_Init->Pull) << (position * 2)); - GPIOx->PUPDR = temp; - - /*--------------------- EXTI Mode Configuration ------------------------*/ - /* Configure the External Interrupt or event for the current IO */ - if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - { - /* Enable SYSCFG Clock */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - - temp = SYSCFG->EXTICR[position >> 2]; - temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03))); - temp |= (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03))); - SYSCFG->EXTICR[position >> 2] = temp; - - /* Clear EXTI line configuration */ - temp = EXTI->IMR1; - temp &= ~((uint32_t)iocurrent); - if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - { - temp |= iocurrent; - } - EXTI->IMR1 = temp; - - temp = EXTI->EMR1; - temp &= ~((uint32_t)iocurrent); - if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - { - temp |= iocurrent; - } - EXTI->EMR1 = temp; - - /* Clear Rising Falling edge configuration */ - temp = EXTI->RTSR1; - temp &= ~((uint32_t)iocurrent); - if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - { - temp |= iocurrent; - } - EXTI->RTSR1 = temp; - - temp = EXTI->FTSR1; - temp &= ~((uint32_t)iocurrent); - if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - { - temp |= iocurrent; - } - EXTI->FTSR1 = temp; - } - } - - position++; - } -} - -/** - * @brief De-initialize the GPIOx peripheral registers to their default reset values. - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Pin: specifies the port bit to be written. - * This parameter can be one of GPIO_PIN_x where x can be (0..15). - * @retval None - */ -void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) -{ - uint32_t position = 0x00; - uint32_t iocurrent = 0x00; - uint32_t tmp = 0x00; - - /* Check the parameters */ - assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - /* Configure the port pins */ - while ((GPIO_Pin >> position) != RESET) - { - /* Get current io position */ - iocurrent = (GPIO_Pin) & (1U << position); - - if (iocurrent) - { - /*------------------------- GPIO Mode Configuration --------------------*/ - /* Configure IO in Analog Mode */ - GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * 2)); - - /* Configure the default Alternate Function in current IO */ - GPIOx->AFR[position >> 3] &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; - - /* Configure the default value for IO Speed */ - GPIOx->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2)); - - /* Configure the default value IO Output Type */ - GPIOx->OTYPER &= ~(GPIO_OTYPER_OT0 << position) ; - - /* Deactivate the Pull-up and Pull-down resistor for the current IO */ - GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2)); - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - - /* Deactivate the Control bit of Analog mode for the current IO */ - GPIOx->ASCR &= ~(GPIO_ASCR_ASC0<< position); - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - - /*------------------------- EXTI Mode Configuration --------------------*/ - /* Clear the External Interrupt or Event for the current IO */ - - tmp = SYSCFG->EXTICR[position >> 2]; - tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03))); - if(tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03)))) - { - tmp = ((uint32_t)0x0F) << (4 * (position & 0x03)); - SYSCFG->EXTICR[position >> 2] &= ~tmp; - - /* Clear EXTI line configuration */ - EXTI->IMR1 &= ~((uint32_t)iocurrent); - EXTI->EMR1 &= ~((uint32_t)iocurrent); - - /* Clear Rising Falling edge configuration */ - EXTI->RTSR1 &= ~((uint32_t)iocurrent); - EXTI->FTSR1 &= ~((uint32_t)iocurrent); - } - } - - position++; - } -} - -/** - * @} - */ - -/** @defgroup GPIO_Exported_Functions_Group2 IO operation functions - * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - -@endverbatim - * @{ - */ - -/** - * @brief Read the specified input port pin. - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Pin: specifies the port bit to read. - * This parameter can be GPIO_PIN_x where x can be (0..15). - * @retval The input port pin value. - */ -GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - GPIO_PinState bitstatus; - - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - { - bitstatus = GPIO_PIN_SET; - } - else - { - bitstatus = GPIO_PIN_RESET; - } - return bitstatus; -} - -/** - * @brief Set or clear the selected data port bit. - * - * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify - * accesses. In this way, there is no risk of an IRQ occurring between - * the read and the modify access. - * - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Pin: specifies the port bit to be written. - * This parameter can be one of GPIO_PIN_x where x can be (0..15). - * @param PinState: specifies the value to be written to the selected bit. - * This parameter can be one of the GPIO_PinState enum values: - * @arg GPIO_PIN_RESET: to clear the port pin - * @arg GPIO_PIN_SET: to set the port pin - * @retval None - */ -void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) -{ - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - assert_param(IS_GPIO_PIN_ACTION(PinState)); - - if(PinState != GPIO_PIN_RESET) - { - GPIOx->BSRR = (uint32_t)GPIO_Pin; - } - else - { - GPIOx->BRR = (uint32_t)GPIO_Pin; - } -} - -/** - * @brief Toggle the specified GPIO pin. - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Pin: specifies the pin to be toggled. - * @retval None - */ -void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - /* Check the parameters */ - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - GPIOx->ODR ^= GPIO_Pin; -} - -/** -* @brief Lock GPIO Pins configuration registers. - * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, - * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. - * @note The configuration of the locked GPIO pins can no longer be modified - * until the next reset. - * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32L4 family - * @param GPIO_Pin: specifies the port bits to be locked. - * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). - * @retval None - */ -HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - __IO uint32_t tmp = GPIO_LCKR_LCKK; - - /* Check the parameters */ - assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - /* Apply lock key write sequence */ - tmp |= GPIO_Pin; - /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ - GPIOx->LCKR = tmp; - /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ - GPIOx->LCKR = GPIO_Pin; - /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ - GPIOx->LCKR = tmp; - /* Read LCKK bit*/ - tmp = GPIOx->LCKR; - - if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) - { - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Handle EXTI interrupt request. - * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. - * @retval None - */ -void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) -{ - /* EXTI line interrupt detected */ - if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) - { - __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); - HAL_GPIO_EXTI_Callback(GPIO_Pin); - } -} - -/** - * @brief EXTI line detection callback. - * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. - * @retval None - */ -__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(GPIO_Pin); - - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_GPIO_EXTI_Callback could be implemented in the user file - */ -} - -/** - * @} - */ - - -/** - * @} - */ - -#endif /* HAL_GPIO_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c deleted file mode 100644 index 63d38c33..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c +++ /dev/null @@ -1,4868 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_i2c.c - * @author MCD Application Team - * @brief I2C HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Inter Integrated Circuit (I2C) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral State and Errors functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The I2C HAL driver can be used as follows: - - (#) Declare a I2C_HandleTypeDef handle structure, for example: - I2C_HandleTypeDef hi2c; - - (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: - (##) Enable the I2Cx interface clock - (##) I2C pins configuration - (+++) Enable the clock for the I2C GPIOs - (+++) Configure I2C pins as alternate function open-drain - (##) NVIC configuration if you need to use interrupt process - (+++) Configure the I2Cx interrupt priority - (+++) Enable the NVIC I2C IRQ Channel - (##) DMA Configuration if you need to use DMA process - (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel - (+++) Enable the DMAx interface clock using - (+++) Configure the DMA handle parameters - (+++) Configure the DMA Tx or Rx channel - (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on - the DMA Tx or Rx channel - - (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode, - Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure. - - (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware - (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. - - (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady() - - (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : - - *** Polling mode IO operation *** - ================================= - [..] - (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit() - (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() - (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() - (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() - - *** Polling mode IO MEM operation *** - ===================================== - [..] - (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write() - (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read() - - - *** Interrupt mode IO operation *** - =================================== - [..] - (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT() - (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() - (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT() - (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT() - (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() - (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT() - (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() - (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. - This action will inform Master to generate a Stop condition to discard the communication. - - - *** Interrupt mode IO sequential operation *** - ============================================== - [..] - (@) These interfaces allow to manage a sequential transfer with a repeated start condition - when a direction change during transfer - [..] - (+) A specific option field manage the different steps of a sequential transfer - (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below: - (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode - (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address - and data to transfer without a final stop condition - (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address - and data to transfer without a final stop condition, an then permit a call the same master sequential interface - several times (like HAL_I2C_Master_Sequential_Transmit_IT() then HAL_I2C_Master_Sequential_Transmit_IT()) - (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address - and with new data to transfer if the direction change or manage only the new data to transfer - if no direction change and without a final stop condition in both cases - (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address - and with new data to transfer if the direction change or manage only the new data to transfer - if no direction change and with a final stop condition in both cases - - (+) Differents sequential I2C interfaces are listed below: - (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT() - (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() - (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT() - (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT() - (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can - add his own code to check the Address Match Code and the transmission direction request by master (Write/Read). - (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_ListenCpltCallback() - (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT() - (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() - (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT() - (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() - (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_I2C_ErrorCallback() - (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. - This action will inform Master to generate a Stop condition to discard the communication. - - *** Interrupt mode IO MEM operation *** - ======================================= - [..] - (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using - HAL_I2C_Mem_Write_IT() - (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback() - (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using - HAL_I2C_Mem_Read_IT() - (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback() - (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_I2C_ErrorCallback() - - *** DMA mode IO operation *** - ============================== - [..] - (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using - HAL_I2C_Master_Transmit_DMA() - (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() - (+) Receive in master mode an amount of data in non-blocking mode (DMA) using - HAL_I2C_Master_Receive_DMA() - (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using - HAL_I2C_Slave_Transmit_DMA() - (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() - (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using - HAL_I2C_Slave_Receive_DMA() - (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() - (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. - This action will inform Master to generate a Stop condition to discard the communication. - - *** DMA mode IO MEM operation *** - ================================= - [..] - (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using - HAL_I2C_Mem_Write_DMA() - (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback() - (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using - HAL_I2C_Mem_Read_DMA() - (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback() - (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_I2C_ErrorCallback() - - - *** I2C HAL driver macros list *** - ================================== - [..] - Below the list of most used macros in I2C HAL driver. - - (+) __HAL_I2C_ENABLE: Enable the I2C peripheral - (+) __HAL_I2C_DISABLE: Disable the I2C peripheral - (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode - (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not - (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag - (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt - (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt - - [..] - (@) You can refer to the I2C HAL driver header file for more useful macros - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup I2C I2C - * @brief I2C HAL module driver - * @{ - */ - -#ifdef HAL_I2C_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -/** @defgroup I2C_Private_Define I2C Private Define - * @{ - */ -#define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */ -#define I2C_TIMEOUT_ADDR (10000U) /*!< 10 s */ -#define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_DIR (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_RXNE (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_STOPF (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_TC (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_TCR (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_TXIS (25U) /*!< 25 ms */ -#define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */ - -#define MAX_NBYTE_SIZE 255U -#define SlaveAddr_SHIFT 7U -#define SlaveAddr_MSK 0x06U - -/* Private define for @ref PreviousState usage */ -#define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits */ -#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */ -#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_MEM_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM)) /*!< Memory Busy TX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_MEM_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM)) /*!< Memory Busy RX, combinaison of State LSB and Mode enum */ - - -/* Private define to centralize the enable/disable of Interrupts */ -#define I2C_XFER_TX_IT (0x00000001U) -#define I2C_XFER_RX_IT (0x00000002U) -#define I2C_XFER_LISTEN_IT (0x00000004U) - -#define I2C_XFER_ERROR_IT (0x00000011U) -#define I2C_XFER_CPLT_IT (0x00000012U) -#define I2C_XFER_RELOAD_IT (0x00000012U) - -/* Private define Sequential Transfer Options default/reset value */ -#define I2C_NO_OPTION_FRAME (0xFFFF0000U) -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -#define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) ((((__HANDLE__)->State) == HAL_I2C_STATE_BUSY_TX) ? \ - ((uint32_t)(((DMA_Channel_TypeDef *)(__HANDLE__)->hdmatx->Instance)->CNDTR)) : \ - ((uint32_t)(((DMA_Channel_TypeDef *)(__HANDLE__)->hdmarx->Instance)->CNDTR))) - -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ - -/** @defgroup I2C_Private_Functions I2C Private Functions - * @{ - */ -/* Private functions to handle DMA transfer */ -static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); -static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); -static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); -static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); -static void I2C_DMAError(DMA_HandleTypeDef *hdma); -static void I2C_DMAAbort(DMA_HandleTypeDef *hdma); - -/* Private functions to handle IT transfer */ -static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); -static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c); -static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c); -static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); -static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); -static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); -static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode); - -/* Private functions to handle IT transfer */ -static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart); - -/* Private functions for I2C transfer IRQ handler */ -static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); -static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); -static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); -static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); - -/* Private functions to handle flags during polling transfer */ -static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); - -/* Private functions to centralize the enable/disable of Interrupts */ -static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); -static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); - -/* Private functions to flush TXDR register */ -static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c); - -/* Private functions to handle start, restart or stop a transfer */ -static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup I2C_Exported_Functions I2C Exported Functions - * @{ - */ - -/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This subsection provides a set of functions allowing to initialize and - deinitialize the I2Cx peripheral: - - (+) User must Implement HAL_I2C_MspInit() function in which he configures - all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). - - (+) Call the function HAL_I2C_Init() to configure the selected device with - the selected configuration: - (++) Clock Timing - (++) Own Address 1 - (++) Addressing mode (Master, Slave) - (++) Dual Addressing mode - (++) Own Address 2 - (++) Own Address 2 Mask - (++) General call mode - (++) Nostretch mode - - (+) Call the function HAL_I2C_DeInit() to restore the default configuration - of the selected I2Cx peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the I2C according to the specified parameters - * in the I2C_InitTypeDef and initialize the associated handle. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) -{ - /* Check the I2C handle allocation */ - if (hi2c == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); - assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); - assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); - assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); - assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); - assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); - assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); - - if (hi2c->State == HAL_I2C_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hi2c->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ - HAL_I2C_MspInit(hi2c); - } - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - - /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ - /* Configure I2Cx: Frequency range */ - hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; - - /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ - /* Disable Own Address1 before set the Own Address1 configuration */ - hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; - - /* Configure I2Cx: Own Address1 and ack own address1 mode */ - if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - { - hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); - } - else /* I2C_ADDRESSINGMODE_10BIT */ - { - hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); - } - - /*---------------------------- I2Cx CR2 Configuration ----------------------*/ - /* Configure I2Cx: Addressing Master mode */ - if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - { - hi2c->Instance->CR2 = (I2C_CR2_ADD10); - } - /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ - hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); - - /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ - /* Disable Own Address2 before set the Own Address2 configuration */ - hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; - - /* Configure I2Cx: Dual mode and Own Address2 */ - hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8)); - - /*---------------------------- I2Cx CR1 Configuration ----------------------*/ - /* Configure I2Cx: Generalcall and NoStretch mode */ - hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); - - /* Enable the selected I2C peripheral */ - __HAL_I2C_ENABLE(hi2c); - - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->Mode = HAL_I2C_MODE_NONE; - - return HAL_OK; -} - -/** - * @brief DeInitialize the I2C peripheral. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) -{ - /* Check the I2C handle allocation */ - if (hi2c == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the I2C Peripheral Clock */ - __HAL_I2C_DISABLE(hi2c); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_I2C_MspDeInit(hi2c); - - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - hi2c->State = HAL_I2C_STATE_RESET; - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Release Lock */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; -} - -/** - * @brief Initialize the I2C MSP. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the I2C MSP. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the I2C data - transfers. - - (#) There are two modes of transfer: - (++) Blocking mode : The communication is performed in the polling mode. - The status of all data processing is returned by the same function - after finishing transfer. - (++) No-Blocking mode : The communication is performed using Interrupts - or DMA. These functions return the status of the transfer startup. - The end of the data processing will be indicated through the - dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - - (#) Blocking mode functions are : - (++) HAL_I2C_Master_Transmit() - (++) HAL_I2C_Master_Receive() - (++) HAL_I2C_Slave_Transmit() - (++) HAL_I2C_Slave_Receive() - (++) HAL_I2C_Mem_Write() - (++) HAL_I2C_Mem_Read() - (++) HAL_I2C_IsDeviceReady() - - (#) No-Blocking mode functions with Interrupt are : - (++) HAL_I2C_Master_Transmit_IT() - (++) HAL_I2C_Master_Receive_IT() - (++) HAL_I2C_Slave_Transmit_IT() - (++) HAL_I2C_Slave_Receive_IT() - (++) HAL_I2C_Mem_Write_IT() - (++) HAL_I2C_Mem_Read_IT() - - (#) No-Blocking mode functions with DMA are : - (++) HAL_I2C_Master_Transmit_DMA() - (++) HAL_I2C_Master_Receive_DMA() - (++) HAL_I2C_Slave_Transmit_DMA() - (++) HAL_I2C_Slave_Receive_DMA() - (++) HAL_I2C_Mem_Write_DMA() - (++) HAL_I2C_Mem_Read_DMA() - - (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: - (++) HAL_I2C_MemTxCpltCallback() - (++) HAL_I2C_MemRxCpltCallback() - (++) HAL_I2C_MasterTxCpltCallback() - (++) HAL_I2C_MasterRxCpltCallback() - (++) HAL_I2C_SlaveTxCpltCallback() - (++) HAL_I2C_SlaveRxCpltCallback() - (++) HAL_I2C_ErrorCallback() - -@endverbatim - * @{ - */ - -/** - * @brief Transmits in master mode an amount of data in blocking mode. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); - } - - while (hi2c->XferCount > 0U) - { - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - /* Write data to TXDR */ - hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - hi2c->XferCount--; - hi2c->XferSize--; - - if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - { - /* Wait until TCR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - } - } - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receives in master mode an amount of data in blocking mode. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); - } - - while (hi2c->XferCount > 0U) - { - /* Wait until RXNE flag is set */ - if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferSize--; - hi2c->XferCount--; - - if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - { - /* Wait until TCR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - } - } - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmits in slave mode an amount of data in blocking mode. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Wait until ADDR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - - /* If 10bit addressing mode is selected */ - if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - { - /* Wait until ADDR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - } - - /* Wait until DIR flag is set Transmitter mode */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - while (hi2c->XferCount > 0U) - { - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Write data to TXDR */ - hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - hi2c->XferCount--; - } - - /* Wait until STOP flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Normal use case for Transmitter mode */ - /* A NACK is generated to confirm the end of transfer */ - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Wait until BUSY flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in slave mode an amount of data in blocking mode - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Wait until ADDR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - - /* Wait until DIR flag is reset Receiver mode */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - while (hi2c->XferCount > 0U) - { - /* Wait until RXNE flag is set */ - if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - /* Store Last receive data if any */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) - { - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferCount--; - } - - if (hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) - { - return HAL_TIMEOUT; - } - else - { - return HAL_ERROR; - } - } - - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferCount--; - } - - /* Wait until STOP flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Wait until BUSY flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_TIMEOUT; - } - - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) -{ - uint32_t xfermode = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_IT; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) -{ - uint32_t xfermode = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_IT; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -{ - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Slave_ISR_IT; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -{ - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Slave_ISR_IT; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmit in master mode an amount of data in non-blocking mode with DMA - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) -{ - uint32_t xfermode = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_DMA; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - if (hi2c->XferSize > 0U) - { - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; - - /* Set the DMA error callback */ - hi2c->hdmatx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmatx->XferHalfCpltCallback = NULL; - hi2c->hdmatx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR and NACK interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - } - else - { - /* Update Transfer ISR function pointer */ - hi2c->XferISR = I2C_Master_ISR_IT; - - /* Send Slave Address */ - /* Set NBYTES to write and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in master mode an amount of data in non-blocking mode with DMA - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) -{ - uint32_t xfermode = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_DMA; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - if (hi2c->XferSize > 0U) - { - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; - - /* Set the DMA error callback */ - hi2c->hdmarx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmarx->XferHalfCpltCallback = NULL; - hi2c->hdmarx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); - - /* Send Slave Address */ - /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR and NACK interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - } - else - { - /* Update Transfer ISR function pointer */ - hi2c->XferISR = I2C_Master_ISR_IT; - - /* Send Slave Address */ - /* Set NBYTES to read and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); - } - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -{ - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Slave_ISR_DMA; - - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; - - /* Set the DMA error callback */ - hi2c->hdmatx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmatx->XferHalfCpltCallback = NULL; - hi2c->hdmatx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR, STOP, NACK, ADDR interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in slave mode an amount of data in non-blocking mode with DMA - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -{ - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Slave_ISR_DMA; - - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; - - /* Set the DMA error callback */ - hi2c->hdmarx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmarx->XferHalfCpltCallback = NULL; - hi2c->hdmarx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR, STOP, NACK, ADDR interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} -/** - * @brief Write an amount of data in blocking mode to a specific memory address - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - - do - { - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Write data to TXDR */ - hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - hi2c->XferCount--; - hi2c->XferSize--; - - if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - { - /* Wait until TCR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - } - - } - while (hi2c->XferCount > 0U); - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Read an amount of data in blocking mode from a specific memory address - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferISR = NULL; - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); - } - - do - { - /* Wait until RXNE flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferSize--; - hi2c->XferCount--; - - if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - { - /* Wait until TCR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - } - } - while (hi2c->XferCount > 0U); - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} -/** - * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) -{ - uint32_t tickstart = 0U; - uint32_t xfermode = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_IT; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) -{ - uint32_t tickstart = 0U; - uint32_t xfermode = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_IT; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ - /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} -/** - * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) -{ - uint32_t tickstart = 0U; - uint32_t xfermode = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_DMA; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; - - /* Set the DMA error callback */ - hi2c->hdmatx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmatx->XferHalfCpltCallback = NULL; - hi2c->hdmatx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); - - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR and NACK interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param pData Pointer to data buffer - * @param Size Amount of data to be read - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) -{ - uint32_t tickstart = 0U; - uint32_t xfermode = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Init tickstart for timeout management*/ - tickstart = HAL_GetTick(); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MEM; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferISR = I2C_Master_ISR_DMA; - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_ERROR; - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - - /* Set the I2C DMA transfer complete callback */ - hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; - - /* Set the DMA error callback */ - hi2c->hdmarx->XferErrorCallback = I2C_DMAError; - - /* Set the unused DMA callbacks to NULL */ - hi2c->hdmarx->XferHalfCpltCallback = NULL; - hi2c->hdmarx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); - - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* Enable ERR and NACK interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Checks if target device is ready for communication. - * @note This function is used with Memory devices - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param Trials Number of trials - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) -{ - uint32_t tickstart = 0U; - - __IO uint32_t I2C_Trials = 0U; - - if (hi2c->State == HAL_I2C_STATE_READY) - { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - do - { - /* Generate Start */ - hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress); - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is set or a NACK flag is set*/ - tickstart = HAL_GetTick(); - while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && (hi2c->State != HAL_I2C_STATE_TIMEOUT)) - { - if (Timeout != HAL_MAX_DELAY) - { - if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) - { - /* Device is ready */ - hi2c->State = HAL_I2C_STATE_READY; - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - } - - /* Check if the NACKF flag has not been set */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) - { - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Device is ready */ - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Clear STOP Flag, auto generated with autoend*/ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - } - - /* Check if the maximum allowed number of trials has been reached */ - if (I2C_Trials++ == Trials) - { - /* Generate Stop */ - hi2c->Instance->CR2 |= I2C_CR2_STOP; - - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - } - } - while (I2C_Trials < Trials); - - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_TIMEOUT; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt. - * @note This interface allow to manage repeated start condition when a direction change during transfer - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - uint32_t xfermode = 0U; - uint32_t xferrequest = I2C_GENERATE_START_WRITE; - - /* Check the parameters */ - assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_TX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = XferOptions; - hi2c->XferISR = I2C_Master_ISR_IT; - - /* If size > MAX_NBYTE_SIZE, use reload mode */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = hi2c->XferOptions; - } - - /* If transfer direction not change, do not generate Restart Condition */ - /* Mean Previous state is same as current state */ - if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) - { - xferrequest = I2C_NO_STARTSTOP; - } - - /* Send Slave Address and set NBYTES to write */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt - * @note This interface allow to manage repeated start condition when a direction change during transfer - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - uint32_t xfermode = 0U; - uint32_t xferrequest = I2C_GENERATE_START_READ; - - /* Check the parameters */ - assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - hi2c->Mode = HAL_I2C_MODE_MASTER; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferOptions = XferOptions; - hi2c->XferISR = I2C_Master_ISR_IT; - - /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = hi2c->XferOptions; - } - - /* If transfer direction not change, do not generate Restart Condition */ - /* Mean Previous state is same as current state */ - if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) - { - xferrequest = I2C_NO_STARTSTOP; - } - - /* Send Slave Address and set NBYTES to read */ - I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode with Interrupt - * @note This interface allow to manage repeated start condition when a direction change during transfer - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - /* Check the parameters */ - assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ - /* and then toggle the HAL slave RX state to TX state */ - if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) - { - /* Disable associated Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - } - - hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = XferOptions; - hi2c->XferISR = I2C_Slave_ISR_IT; - - if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) - { - /* Clear ADDR flag after prepare the transfer parameters */ - /* This action will generate an acknowledge to the Master */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* REnable ADDR interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with Interrupt - * @note This interface allow to manage repeated start condition when a direction change during transfer - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param pData Pointer to data buffer - * @param Size Amount of data to be sent - * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - /* Check the parameters */ - assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN) - { - if ((pData == NULL) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); - - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ - /* and then toggle the HAL slave TX state to RX state */ - if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) - { - /* Disable associated Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - } - - hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; - hi2c->Mode = HAL_I2C_MODE_SLAVE; - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - - /* Enable Address Acknowledge */ - hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - hi2c->XferCount = Size; - hi2c->XferSize = hi2c->XferCount; - hi2c->XferOptions = XferOptions; - hi2c->XferISR = I2C_Slave_ISR_IT; - - if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) - { - /* Clear ADDR flag after prepare the transfer parameters */ - /* This action will generate an acknowledge to the Master */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - /* REnable ADDR interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Enable the Address listen mode with Interrupt. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c) -{ - if (hi2c->State == HAL_I2C_STATE_READY) - { - hi2c->State = HAL_I2C_STATE_LISTEN; - hi2c->XferISR = I2C_Slave_ISR_IT; - - /* Enable the Address Match interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Disable the Address listen mode with Interrupt. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) -{ - /* Declaration of tmp to prevent undefined behavior of volatile usage */ - uint32_t tmp; - - /* Disable Address listen mode only if a transfer is not ongoing */ - if (hi2c->State == HAL_I2C_STATE_LISTEN) - { - tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK; - hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - hi2c->XferISR = NULL; - - /* Disable the Address Match interrupt */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Abort a master I2C IT or DMA process communication with Interrupt. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) -{ - if (hi2c->Mode == HAL_I2C_MODE_MASTER) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - - /* Set State at HAL_I2C_STATE_ABORT */ - hi2c->State = HAL_I2C_STATE_ABORT; - - /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */ - /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */ - I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Note : The I2C interrupts must be enabled after unlocking current process - to avoid the risk of I2C interrupt handle execution before current - process unlock */ - I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); - - return HAL_OK; - } - else - { - /* Wrong usage of abort function */ - /* This function should be used only in case of abort monitored by master device */ - return HAL_ERROR; - } -} - -/** - * @} - */ - -/** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks - * @{ - */ - -/** - * @brief This function handles I2C event interrupt request. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) -{ - /* Get current IT Flags and IT sources value */ - uint32_t itflags = READ_REG(hi2c->Instance->ISR); - uint32_t itsources = READ_REG(hi2c->Instance->CR1); - - /* I2C events treatment -------------------------------------*/ - if (hi2c->XferISR != NULL) - { - hi2c->XferISR(hi2c, itflags, itsources); - } -} - -/** - * @brief This function handles I2C error interrupt request. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) -{ - uint32_t itflags = READ_REG(hi2c->Instance->ISR); - uint32_t itsources = READ_REG(hi2c->Instance->CR1); - - /* I2C Bus error interrupt occurred ------------------------------------*/ - if (((itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; - - /* Clear BERR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); - } - - /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ - if (((itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; - - /* Clear OVR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); - } - - /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ - if (((itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERRI) != RESET)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; - - /* Clear ARLO flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); - } - - /* Call the Error Callback in case of Error detected */ - if ((hi2c->ErrorCode & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_NONE) - { - I2C_ITError(hi2c, hi2c->ErrorCode); - } -} - -/** - * @brief Master Tx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MasterTxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Master Rx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MasterRxCpltCallback could be implemented in the user file - */ -} - -/** @brief Slave Tx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Slave Rx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Slave Address Match callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFERDIRECTION - * @param AddrMatchCode Address Match Code - * @retval None - */ -__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - UNUSED(TransferDirection); - UNUSED(AddrMatchCode); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_AddrCallback() could be implemented in the user file - */ -} - -/** - * @brief Listen Complete callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_ListenCpltCallback() could be implemented in the user file - */ -} - -/** - * @brief Memory Tx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MemTxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Memory Rx Transfer completed callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_MemRxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief I2C error callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_ErrorCallback could be implemented in the user file - */ -} - -/** - * @brief I2C abort callback. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval None - */ -__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hi2c); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_I2C_AbortCpltCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions - * @brief Peripheral State, Mode and Error functions - * -@verbatim - =============================================================================== - ##### Peripheral State, Mode and Error functions ##### - =============================================================================== - [..] - This subsection permit to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the I2C handle state. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @retval HAL state - */ -HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) -{ - /* Return I2C handle state */ - return hi2c->State; -} - -/** - * @brief Returns the I2C Master, Slave, Memory or no mode. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for I2C module - * @retval HAL mode - */ -HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c) -{ - return hi2c->Mode; -} - -/** -* @brief Return the I2C error code. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. -* @retval I2C Error Code -*/ -uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) -{ - return hi2c->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup I2C_Private_Functions - * @{ - */ - -/** - * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param ITFlags Interrupt flags to handle. - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) -{ - uint16_t devaddress = 0U; - - /* Process Locked */ - __HAL_LOCK(hi2c); - - if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Set corresponding Error Code */ - /* No need to generate STOP, it is automatically done */ - /* Error callback will be send during stop flag treatment */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - } - else if (((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET)) - { - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferSize--; - hi2c->XferCount--; - } - else if (((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET)) - { - /* Write data to TXDR */ - hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - hi2c->XferSize--; - hi2c->XferCount--; - } - else if (((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET)) - { - if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - { - devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); - - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - } - else - { - hi2c->XferSize = hi2c->XferCount; - if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) - { - I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, hi2c->XferOptions, I2C_NO_STARTSTOP); - } - else - { - I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - } - } - } - else - { - /* Call TxCpltCallback() if no stop mode is set */ - if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) - { - /* Call I2C Master Sequential complete process */ - I2C_ITMasterSequentialCplt(hi2c); - } - else - { - /* Wrong size Status regarding TCR flag event */ - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); - } - } - } - else if (((ITFlags & I2C_FLAG_TC) != RESET) && ((ITSources & I2C_IT_TCI) != RESET)) - { - if (hi2c->XferCount == 0U) - { - if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) - { - /* Generate a stop condition in case of no transfer option */ - if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) - { - /* Generate Stop */ - hi2c->Instance->CR2 |= I2C_CR2_STOP; - } - else - { - /* Call I2C Master Sequential complete process */ - I2C_ITMasterSequentialCplt(hi2c); - } - } - } - else - { - /* Wrong size Status regarding TC flag event */ - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); - } - } - - if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) - { - /* Call I2C Master complete process */ - I2C_ITMasterCplt(hi2c, ITFlags); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; -} - -/** - * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param ITFlags Interrupt flags to handle. - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) -{ - /* Process locked */ - __HAL_LOCK(hi2c); - - if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) - { - /* Check that I2C transfer finished */ - /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ - /* Mean XferCount == 0*/ - /* So clear Flag NACKF only */ - if (hi2c->XferCount == 0U) - { - if (((hi2c->XferOptions == I2C_FIRST_AND_LAST_FRAME) || (hi2c->XferOptions == I2C_LAST_FRAME)) && \ - (hi2c->State == HAL_I2C_STATE_LISTEN)) - { - /* Call I2C Listen complete process */ - I2C_ITListenCplt(hi2c, ITFlags); - } - else if ((hi2c->XferOptions != I2C_NO_OPTION_FRAME) && (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)) - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - - /* Last Byte is Transmitted */ - /* Call I2C Slave Sequential complete process */ - I2C_ITSlaveSequentialCplt(hi2c); - } - else - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - } - } - else - { - /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - } - else if (((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET)) - { - if (hi2c->XferCount > 0U) - { - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - hi2c->XferSize--; - hi2c->XferCount--; - } - - if ((hi2c->XferCount == 0U) && \ - (hi2c->XferOptions != I2C_NO_OPTION_FRAME)) - { - /* Call I2C Slave Sequential complete process */ - I2C_ITSlaveSequentialCplt(hi2c); - } - } - else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET)) - { - I2C_ITAddrCplt(hi2c, ITFlags); - } - else if (((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET)) - { - /* Write data to TXDR only if XferCount not reach "0" */ - /* A TXIS flag can be set, during STOP treatment */ - /* Check if all Datas have already been sent */ - /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ - if (hi2c->XferCount > 0U) - { - /* Write data to TXDR */ - hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - hi2c->XferCount--; - hi2c->XferSize--; - } - else - { - if ((hi2c->XferOptions == I2C_NEXT_FRAME) || (hi2c->XferOptions == I2C_FIRST_FRAME)) - { - /* Last Byte is Transmitted */ - /* Call I2C Slave Sequential complete process */ - I2C_ITSlaveSequentialCplt(hi2c); - } - } - } - - /* Check if STOPF is set */ - if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) - { - /* Call I2C Slave complete process */ - I2C_ITSlaveCplt(hi2c, ITFlags); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; -} - -/** - * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param ITFlags Interrupt flags to handle. - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) -{ - uint16_t devaddress = 0U; - uint32_t xfermode = 0U; - - /* Process Locked */ - __HAL_LOCK(hi2c); - - if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Set corresponding Error Code */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - - /* No need to generate STOP, it is automatically done */ - /* But enable STOP interrupt, to treat it */ - /* Error callback will be send during stop flag treatment */ - I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - } - else if (((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET)) - { - /* Disable TC interrupt */ - __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI); - - if (hi2c->XferCount != 0U) - { - /* Recover Slave address */ - devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); - - /* Prepare the new XferSize to transfer */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - xfermode = I2C_RELOAD_MODE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - xfermode = I2C_AUTOEND_MODE; - } - - /* Set the new XferSize in Nbytes register */ - I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); - - /* Update XferCount value */ - hi2c->XferCount -= hi2c->XferSize; - - /* Enable DMA Request */ - if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - { - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - } - else - { - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - } - } - else - { - /* Wrong size Status regarding TCR flag event */ - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); - } - } - else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) - { - /* Call I2C Master complete process */ - I2C_ITMasterCplt(hi2c, ITFlags); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; -} - -/** - * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param ITFlags Interrupt flags to handle. - * @param ITSources Interrupt sources enabled. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) -{ - /* Process locked */ - __HAL_LOCK(hi2c); - - if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) - { - /* Check that I2C transfer finished */ - /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ - /* Mean XferCount == 0 */ - /* So clear Flag NACKF only */ - if (I2C_GET_DMA_REMAIN_DATA(hi2c) == 0U) - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - } - else - { - /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - } - else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET)) - { - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - } - else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) - { - /* Call I2C Slave complete process */ - I2C_ITSlaveCplt(hi2c, ITFlags); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; -} - -/** - * @brief Master sends target device address followed by internal memory address for write request. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) -{ - I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); - - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* If Memory address size is 8Bit */ - if (MemAddSize == I2C_MEMADD_SIZE_8BIT) - { - /* Send Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); - } - /* If Memory address size is 16Bit */ - else - { - /* Send MSB of Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); - - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Send LSB of Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); - } - - /* Wait until TCR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - return HAL_OK; -} - -/** - * @brief Master sends target device address followed by internal memory address for read request. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param DevAddress Target device address: The device 7 bits address value - * in datasheet must be shift at right before call interface - * @param MemAddress Internal memory address - * @param MemAddSize Size of internal memory address - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) -{ - I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); - - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* If Memory address size is 8Bit */ - if (MemAddSize == I2C_MEMADD_SIZE_8BIT) - { - /* Send Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); - } - /* If Memory address size is 16Bit */ - else - { - /* Send MSB of Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); - - /* Wait until TXIS flag is set */ - if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) - { - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - return HAL_ERROR; - } - else - { - return HAL_TIMEOUT; - } - } - - /* Send LSB of Memory Address */ - hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); - } - - /* Wait until TC flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) - { - return HAL_TIMEOUT; - } - - return HAL_OK; -} - -/** - * @brief I2C Address complete process callback. - * @param hi2c I2C handle. - * @param ITFlags Interrupt flags to handle. - * @retval None - */ -static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -{ - uint8_t transferdirection = 0U; - uint16_t slaveaddrcode = 0U; - uint16_t ownadd1code = 0U; - uint16_t ownadd2code = 0U; - - /* Prevent unused argument(s) compilation warning */ - UNUSED(ITFlags); - - /* In case of Listen state, need to inform upper layer of address match code event */ - if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN) - { - transferdirection = I2C_GET_DIR(hi2c); - slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); - ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); - ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); - - /* If 10bits addressing mode is selected */ - if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - { - if ((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK)) - { - slaveaddrcode = ownadd1code; - hi2c->AddrEventCount++; - if (hi2c->AddrEventCount == 2U) - { - /* Reset Address Event counter */ - hi2c->AddrEventCount = 0U; - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call Slave Addr callback */ - HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - } - } - else - { - slaveaddrcode = ownadd2code; - - /* Disable ADDR Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call Slave Addr callback */ - HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - } - } - /* else 7 bits addressing mode is selected */ - else - { - /* Disable ADDR Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call Slave Addr callback */ - HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - } - } - /* Else clear address flag only */ - else - { - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - } -} - -/** - * @brief I2C Master sequential complete process. - * @param hi2c I2C handle. - * @retval None - */ -static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c) -{ - /* Reset I2C handle mode */ - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* No Generate Stop, to permit restart mode */ - /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */ - if (hi2c->State == HAL_I2C_STATE_BUSY_TX) - { - hi2c->State = HAL_I2C_STATE_READY; - hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; - hi2c->XferISR = NULL; - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_MasterTxCpltCallback(hi2c); - } - /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ - else - { - hi2c->State = HAL_I2C_STATE_READY; - hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; - hi2c->XferISR = NULL; - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_MasterRxCpltCallback(hi2c); - } -} - -/** - * @brief I2C Slave sequential complete process. - * @param hi2c I2C handle. - * @retval None - */ -static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c) -{ - /* Reset I2C handle mode */ - hi2c->Mode = HAL_I2C_MODE_NONE; - - if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) - { - /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ - hi2c->State = HAL_I2C_STATE_LISTEN; - hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Tx complete callback to inform upper layer of the end of transmit process */ - HAL_I2C_SlaveTxCpltCallback(hi2c); - } - - else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) - { - /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */ - hi2c->State = HAL_I2C_STATE_LISTEN; - hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Rx complete callback to inform upper layer of the end of receive process */ - HAL_I2C_SlaveRxCpltCallback(hi2c); - } -} - -/** - * @brief I2C Master complete process. - * @param hi2c I2C handle. - * @param ITFlags Interrupt flags to handle. - * @retval None - */ -static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -{ - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - /* Reset handle parameters */ - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->XferISR = NULL; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - - if ((ITFlags & I2C_FLAG_AF) != RESET) - { - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Set acknowledge error code */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - - /* Disable Interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_RX_IT); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - if ((hi2c->ErrorCode != HAL_I2C_ERROR_NONE) || (hi2c->State == HAL_I2C_STATE_ABORT)) - { - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, hi2c->ErrorCode); - } - /* hi2c->State == HAL_I2C_STATE_BUSY_TX */ - else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) - { - hi2c->State = HAL_I2C_STATE_READY; - - if (hi2c->Mode == HAL_I2C_MODE_MEM) - { - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_MemTxCpltCallback(hi2c); - } - else - { - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_MasterTxCpltCallback(hi2c); - } - } - /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ - else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - { - hi2c->State = HAL_I2C_STATE_READY; - - if (hi2c->Mode == HAL_I2C_MODE_MEM) - { - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - HAL_I2C_MemRxCpltCallback(hi2c); - } - else - { - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - HAL_I2C_MasterRxCpltCallback(hi2c); - } - } -} - -/** - * @brief I2C Slave complete process. - * @param hi2c I2C handle. - * @param ITFlags Interrupt flags to handle. - * @retval None - */ -static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -{ - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - - /* Disable all interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT); - - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - - /* If a DMA is ongoing, Update handle size context */ - if (((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) || - ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)) - { - hi2c->XferCount = I2C_GET_DMA_REMAIN_DATA(hi2c); - } - - /* All data are not transferred, so set error code accordingly */ - if (hi2c->XferCount != 0U) - { - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - - /* Store Last receive data if any */ - if (((ITFlags & I2C_FLAG_RXNE) != RESET)) - { - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - - if ((hi2c->XferSize > 0U)) - { - hi2c->XferSize--; - hi2c->XferCount--; - - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - } - - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->Mode = HAL_I2C_MODE_NONE; - hi2c->XferISR = NULL; - - if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) - { - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, hi2c->ErrorCode); - - /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ - if (hi2c->State == HAL_I2C_STATE_LISTEN) - { - /* Call I2C Listen complete process */ - I2C_ITListenCplt(hi2c, ITFlags); - } - } - else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) - { - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ - HAL_I2C_ListenCpltCallback(hi2c); - } - /* Call the corresponding callback to inform upper layer of End of Transfer */ - else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - { - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Slave Rx Complete callback */ - HAL_I2C_SlaveRxCpltCallback(hi2c); - } - else - { - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Slave Tx Complete callback */ - HAL_I2C_SlaveTxCpltCallback(hi2c); - } -} - -/** - * @brief I2C Listen complete process. - * @param hi2c I2C handle. - * @param ITFlags Interrupt flags to handle. - * @retval None - */ -static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -{ - /* Reset handle parameters */ - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - hi2c->XferISR = NULL; - - /* Store Last receive data if any */ - if (((ITFlags & I2C_FLAG_RXNE) != RESET)) - { - /* Read data from RXDR */ - (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - - if ((hi2c->XferSize > 0U)) - { - hi2c->XferSize--; - hi2c->XferCount--; - - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - } - } - - /* Disable all Interrupts*/ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); - - /* Clear NACK Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ - HAL_I2C_ListenCpltCallback(hi2c); -} - -/** - * @brief I2C interrupts error process. - * @param hi2c I2C handle. - * @param ErrorCode Error code to handle. - * @retval None - */ -static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) -{ - /* Reset handle parameters */ - hi2c->Mode = HAL_I2C_MODE_NONE; - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - hi2c->XferCount = 0U; - - /* Set new error code */ - hi2c->ErrorCode |= ErrorCode; - - /* Disable Interrupts */ - if ((hi2c->State == HAL_I2C_STATE_LISTEN) || - (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) || - (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)) - { - /* Disable all interrupts, except interrupts related to LISTEN state */ - I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); - - /* keep HAL_I2C_STATE_LISTEN if set */ - hi2c->State = HAL_I2C_STATE_LISTEN; - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->XferISR = I2C_Slave_ISR_IT; - } - else - { - /* Disable all interrupts */ - I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); - - /* If state is an abort treatment on goind, don't change state */ - /* This change will be do later */ - if (hi2c->State != HAL_I2C_STATE_ABORT) - { - /* Set HAL_I2C_STATE_READY */ - hi2c->State = HAL_I2C_STATE_READY; - } - hi2c->PreviousState = I2C_STATE_NONE; - hi2c->XferISR = NULL; - } - - /* Abort DMA TX transfer if any */ - if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) - { - hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - - /* Set the I2C DMA Abort callback : - will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ - hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Abort DMA TX */ - if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) - { - /* Call Directly XferAbortCallback function in case of error */ - hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); - } - } - /* Abort DMA RX transfer if any */ - else if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) - { - hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - - /* Set the I2C DMA Abort callback : - will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ - hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Abort DMA RX */ - if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) - { - /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ - hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); - } - } - else if (hi2c->State == HAL_I2C_STATE_ABORT) - { - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_AbortCpltCallback(hi2c); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_ErrorCallback(hi2c); - } -} - -/** - * @brief I2C Tx data register flush process. - * @param hi2c I2C handle. - * @retval None - */ -static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) -{ - /* If a pending TXIS flag is set */ - /* Write a dummy data in TXDR to clear it */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) - { - hi2c->Instance->TXDR = 0x00U; - } - - /* Flush TX register if not empty */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - { - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); - } -} - -/** - * @brief DMA I2C master transmit process complete callback. - * @param hdma DMA handle - * @retval None - */ -static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) -{ - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - /* Disable DMA Request */ - hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - - /* If last transfer, enable STOP interrupt */ - if (hi2c->XferCount == 0U) - { - /* Enable STOP interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); - } - /* else prepare a new DMA transfer and enable TCReload interrupt */ - else - { - /* Update Buffer pointer */ - hi2c->pBuffPtr += hi2c->XferSize; - - /* Set the XferSize to transfer */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - } - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); - - /* Enable TC interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); - } -} - -/** - * @brief DMA I2C slave transmit process complete callback. - * @param hdma DMA handle - * @retval None - */ -static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hdma); - - /* No specific action, Master fully manage the generation of STOP condition */ - /* Mean that this generation can arrive at any time, at the end or during DMA process */ - /* So STOP condition should be manage through Interrupt treatment */ -} - -/** - * @brief DMA I2C master receive process complete callback. - * @param hdma DMA handle - * @retval None - */ -static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) -{ - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - /* Disable DMA Request */ - hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - - /* If last transfer, enable STOP interrupt */ - if (hi2c->XferCount == 0U) - { - /* Enable STOP interrupt */ - I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); - } - /* else prepare a new DMA transfer and enable TCReload interrupt */ - else - { - /* Update Buffer pointer */ - hi2c->pBuffPtr += hi2c->XferSize; - - /* Set the XferSize to transfer */ - if (hi2c->XferCount > MAX_NBYTE_SIZE) - { - hi2c->XferSize = MAX_NBYTE_SIZE; - } - else - { - hi2c->XferSize = hi2c->XferCount; - } - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize); - - /* Enable TC interrupts */ - I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); - } -} - -/** - * @brief DMA I2C slave receive process complete callback. - * @param hdma DMA handle - * @retval None - */ -static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hdma); - - /* No specific action, Master fully manage the generation of STOP condition */ - /* Mean that this generation can arrive at any time, at the end or during DMA process */ - /* So STOP condition should be manage through Interrupt treatment */ -} - -/** - * @brief DMA I2C communication error callback. - * @param hdma DMA handle - * @retval None - */ -static void I2C_DMAError(DMA_HandleTypeDef *hdma) -{ - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - /* Disable Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); -} - -/** - * @brief DMA I2C communication abort callback - * (To be called at end of DMA Abort procedure). - * @param hdma DMA handle. - * @retval None - */ -static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) -{ - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - - /* Disable Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - - /* Reset AbortCpltCallback */ - hi2c->hdmatx->XferAbortCallback = NULL; - hi2c->hdmarx->XferAbortCallback = NULL; - - /* Check if come from abort from user */ - if (hi2c->State == HAL_I2C_STATE_ABORT) - { - hi2c->State = HAL_I2C_STATE_READY; - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_AbortCpltCallback(hi2c); - } - else - { - /* Call the corresponding callback to inform upper layer of End of Transfer */ - HAL_I2C_ErrorCallback(hi2c); - } -} - -/** - * @brief This function handles I2C Communication Timeout. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param Flag Specifies the I2C flag to check. - * @param Status The new Flag status (SET or RESET). - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) -{ - while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - { - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - { - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - } - return HAL_OK; -} - -/** - * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) -{ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) - { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) - { - return HAL_ERROR; - } - - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - { - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_TIMEOUT; - } - } - } - return HAL_OK; -} - -/** - * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) -{ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) - { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) - { - return HAL_ERROR; - } - - /* Check for the Timeout */ - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_TIMEOUT; - } - } - return HAL_OK; -} - -/** - * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) -{ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) - { - return HAL_ERROR; - } - - /* Check if a STOPF is detected */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) - { - /* Check if an RXNE is pending */ - /* Store Last receive data if any */ - if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && (hi2c->XferSize > 0U)) - { - /* Return HAL_OK */ - /* The Reading of data from RXDR will be done in caller function */ - return HAL_OK; - } - else - { - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_ERROR; - } - } - - /* Check for the Timeout */ - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_TIMEOUT; - } - } - return HAL_OK; -} - -/** - * @brief This function handles Acknowledge failed detection during an I2C Communication. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param Timeout Timeout duration - * @param Tickstart Tick start value - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) -{ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - { - /* Wait until STOP Flag is reset */ - /* AutoEnd should be initiate after AF */ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) - { - /* Check for the Timeout */ - if (Timeout != HAL_MAX_DELAY) - { - if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) - { - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - return HAL_TIMEOUT; - } - } - } - - /* Clear NACKF Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - - /* Clear Configuration Register 2 */ - I2C_RESET_CR2(hi2c); - - hi2c->ErrorCode = HAL_I2C_ERROR_AF; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_ERROR; - } - return HAL_OK; -} - -/** - * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set). - * @param hi2c I2C handle. - * @param DevAddress Specifies the slave address to be programmed. - * @param Size Specifies the number of bytes to be programmed. - * This parameter must be a value between 0 and 255. - * @param Mode New state of the I2C START condition generation. - * This parameter can be one of the following values: - * @arg @ref I2C_RELOAD_MODE Enable Reload mode . - * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode. - * @arg @ref I2C_SOFTEND_MODE Enable Software end mode. - * @param Request New state of the I2C START condition generation. - * This parameter can be one of the following values: - * @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition. - * @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0). - * @arg @ref I2C_GENERATE_START_READ Generate Restart for read request. - * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. - * @retval None - */ -static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_TRANSFER_MODE(Mode)); - assert_param(IS_TRANSFER_REQUEST(Request)); - - /* update CR2 register */ - MODIFY_REG(hi2c->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP)), \ - (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request)); -} - -/** - * @brief Manage the enabling of Interrupts. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) -{ - uint32_t tmpisr = 0U; - - if ((hi2c->XferISR == I2C_Master_ISR_DMA) || \ - (hi2c->XferISR == I2C_Slave_ISR_DMA)) - { - if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - { - /* Enable ERR, STOP, NACK and ADDR interrupts */ - tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - } - - if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT) - { - /* Enable ERR and NACK interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; - } - - if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) - { - /* Enable STOP interrupts */ - tmpisr |= I2C_IT_STOPI; - } - - if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT) - { - /* Enable TC interrupts */ - tmpisr |= I2C_IT_TCI; - } - } - else - { - if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - { - /* Enable ERR, STOP, NACK, and ADDR interrupts */ - tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - } - - if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) - { - /* Enable ERR, TC, STOP, NACK and RXI interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; - } - - if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) - { - /* Enable ERR, TC, STOP, NACK and TXI interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; - } - - if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) - { - /* Enable STOP interrupts */ - tmpisr |= I2C_IT_STOPI; - } - } - - /* Enable interrupts only at the end */ - /* to avoid the risk of I2C interrupt handle execution before */ - /* all interrupts requested done */ - __HAL_I2C_ENABLE_IT(hi2c, tmpisr); - - return HAL_OK; -} - -/** - * @brief Manage the disabling of Interrupts. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2C. - * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. - * @retval HAL status - */ -static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) -{ - uint32_t tmpisr = 0U; - - if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) - { - /* Disable TC and TXI interrupts */ - tmpisr |= I2C_IT_TCI | I2C_IT_TXI; - - if ((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN) - { - /* Disable NACK and STOP interrupts */ - tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - } - } - - if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) - { - /* Disable TC and RXI interrupts */ - tmpisr |= I2C_IT_TCI | I2C_IT_RXI; - - if ((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN) - { - /* Disable NACK and STOP interrupts */ - tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - } - } - - if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - { - /* Disable ADDR, NACK and STOP interrupts */ - tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - } - - if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT) - { - /* Enable ERR and NACK interrupts */ - tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; - } - - if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) - { - /* Enable STOP interrupts */ - tmpisr |= I2C_IT_STOPI; - } - - if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT) - { - /* Enable TC interrupts */ - tmpisr |= I2C_IT_TCI; - } - - /* Disable interrupts only at the end */ - /* to avoid a breaking situation like at "t" time */ - /* all disable interrupts request are not done */ - __HAL_I2C_DISABLE_IT(hi2c, tmpisr); - - return HAL_OK; -} - -/** - * @} - */ - -#endif /* HAL_I2C_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c deleted file mode 100644 index bd4e329d..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c +++ /dev/null @@ -1,355 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_i2c_ex.c - * @author MCD Application Team - * @brief I2C Extended HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of I2C Extended peripheral: - * + Extended features functions - * - @verbatim - ============================================================================== - ##### I2C peripheral Extended features ##### - ============================================================================== - - [..] Comparing to other previous devices, the I2C interface for STM32L4xx - devices contains the following additional features - - (+) Possibility to disable or enable Analog Noise Filter - (+) Use of a configured Digital Noise Filter - (+) Disable or enable wakeup from Stop mode(s) - (+) Disable or enable Fast Mode Plus - - ##### How to use this driver ##### - ============================================================================== - [..] This driver provides functions to configure Noise Filter and Wake Up Feature - (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter() - (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter() - (#) Configure the enable or disable of I2C Wake Up Mode using the functions : - (++) HAL_I2CEx_EnableWakeUp() - (++) HAL_I2CEx_DisableWakeUp() - (#) Configure the enable or disable of fast mode plus driving capability using the functions : - (++) HAL_I2CEx_EnableFastModePlus() - (++) HAL_I2CEx_DisableFastModePlus() - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup I2CEx I2CEx - * @brief I2C Extended HAL module driver - * @{ - */ - -#ifdef HAL_I2C_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions - * @{ - */ - -/** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions - * @brief Extended features functions - * -@verbatim - =============================================================================== - ##### Extended features functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Configure Noise Filters - (+) Configure Wake Up Feature - (+) Configure Fast Mode Plus - -@endverbatim - * @{ - */ - -/** - * @brief Configure I2C Analog noise filter. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2Cx peripheral. - * @param AnalogFilter New state of the Analog filter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - - /* Reset I2Cx ANOFF bit */ - hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); - - /* Set analog filter bit*/ - hi2c->Instance->CR1 |= AnalogFilter; - - __HAL_I2C_ENABLE(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Configure I2C Digital noise filter. - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2Cx peripheral. - * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) -{ - uint32_t tmpreg = 0U; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - - /* Get the old register value */ - tmpreg = hi2c->Instance->CR1; - - /* Reset I2Cx DNF bits [11:8] */ - tmpreg &= ~(I2C_CR1_DNF); - - /* Set I2Cx DNF coefficient */ - tmpreg |= DigitalFilter << 8U; - - /* Store the new register value */ - hi2c->Instance->CR1 = tmpreg; - - __HAL_I2C_ENABLE(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Enable I2C wakeup from Stop mode(s). - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2Cx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c) -{ - /* Check the parameters */ - assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - - /* Enable wakeup from stop mode */ - hi2c->Instance->CR1 |= I2C_CR1_WUPEN; - - __HAL_I2C_ENABLE(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Disable I2C wakeup from Stop mode(s). - * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - * the configuration information for the specified I2Cx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c) -{ - /* Check the parameters */ - assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); - - if (hi2c->State == HAL_I2C_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hi2c); - - hi2c->State = HAL_I2C_STATE_BUSY; - - /* Disable the selected I2C peripheral */ - __HAL_I2C_DISABLE(hi2c); - - /* Enable wakeup from stop mode */ - hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN); - - __HAL_I2C_ENABLE(hi2c); - - hi2c->State = HAL_I2C_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Enable the I2C fast mode plus driving capability. - * @param ConfigFastModePlus Selects the pin. - * This parameter can be one of the @ref I2CEx_FastModePlus values - * @note For I2C1, fast mode plus driving capability can be enabled on all selected - * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently - * on each one of the following pins PB6, PB7, PB8 and PB9. - * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability - * can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter. - * @note For all I2C2 pins fast mode plus driving capability can be enabled - * only by using I2C_FASTMODEPLUS_I2C2 parameter. - * @note For all I2C3 pins fast mode plus driving capability can be enabled - * only by using I2C_FASTMODEPLUS_I2C3 parameter. - * @note For all I2C4 pins fast mode plus driving capability can be enabled - * only by using I2C_FASTMODEPLUS_I2C4 parameter. - * @retval None - */ -void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus) -{ - /* Check the parameter */ - assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); - - /* Enable SYSCFG clock */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - - /* Enable fast mode plus driving capability for selected pin */ - SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); -} - -/** - * @brief Disable the I2C fast mode plus driving capability. - * @param ConfigFastModePlus Selects the pin. - * This parameter can be one of the @ref I2CEx_FastModePlus values - * @note For I2C1, fast mode plus driving capability can be disabled on all selected - * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently - * on each one of the following pins PB6, PB7, PB8 and PB9. - * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability - * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter. - * @note For all I2C2 pins fast mode plus driving capability can be disabled - * only by using I2C_FASTMODEPLUS_I2C2 parameter. - * @note For all I2C3 pins fast mode plus driving capability can be disabled - * only by using I2C_FASTMODEPLUS_I2C3 parameter. - * @note For all I2C4 pins fast mode plus driving capability can be disabled - * only by using I2C_FASTMODEPLUS_I2C4 parameter. - * @retval None - */ -void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus) -{ - /* Check the parameter */ - assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); - - /* Enable SYSCFG clock */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - - /* Disable fast mode plus driving capability for selected pin */ - CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_I2C_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c deleted file mode 100644 index de415ad3..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c +++ /dev/null @@ -1,1675 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd.c - * @author MCD Application Team - * @brief PCD HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The PCD HAL driver can be used as follows: - - (#) Declare a PCD_HandleTypeDef handle structure, for example: - PCD_HandleTypeDef hpcd; - - (#) Fill parameters of Init structure in HCD handle - - (#) Call HAL_PCD_Init() API to initialize the PCD peripheral (Core, Device core, ...) - - (#) Initialize the PCD low level resources through the HAL_PCD_MspInit() API: - (##) Enable the PCD/USB Low Level interface clock using - (+++) __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - (##) Initialize the related GPIO clocks - (##) Configure PCD pin-out - (##) Configure PCD NVIC interrupt - - (#)Associate the Upper USB device stack to the HAL PCD Driver: - (##) hpcd.pData = pdev; - - (#)Enable PCD transmission and reception: - (##) HAL_PCD_Start(); - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup PCD PCD - * @brief PCD HAL module driver - * @{ - */ - -#ifdef HAL_PCD_MODULE_ENABLED - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** - * USB_OTG_CORE VERSION ID - */ -#define USB_OTG_CORE_ID_310A 0x4F54310A -#define USB_OTG_CORE_ID_320A 0x4F54320A - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup PCD_Private_Macros PCD Private Macros - * @{ - */ -#define PCD_MIN(a, b) (((a) < (b)) ? (a) : (b)) -#define PCD_MAX(a, b) (((a) > (b)) ? (a) : (b)) -/** - * @} - */ - -/* Private functions prototypes ----------------------------------------------*/ -/** @defgroup PCD_Private_Functions PCD Private Functions - * @{ - */ -#if defined (USB_OTG_FS) -static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum); -#endif /* USB_OTG_FS */ -#if defined (USB) -static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd); -#endif /* USB */ -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup PCD_Exported_Functions PCD Exported Functions - * @{ - */ - -/** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the PCD according to the specified - * parameters in the PCD_InitTypeDef and initialize the associated handle. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) -{ - uint32_t index = 0U; - - /* Check the PCD handle allocation */ - if(hpcd == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); - - if(hpcd->State == HAL_PCD_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hpcd->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC... */ - HAL_PCD_MspInit(hpcd); - } - - hpcd->State = HAL_PCD_STATE_BUSY; - - /* Disable the Interrupts */ - __HAL_PCD_DISABLE(hpcd); - - /*Init the Core (common init.) */ - USB_CoreInit(hpcd->Instance, hpcd->Init); - - /* Force Device Mode*/ - USB_SetCurrentMode(hpcd->Instance , USB_DEVICE_MODE); - - /* Init endpoints structures */ - for (index = 0; index < hpcd->Init.dev_endpoints ; index++) - { - /* Init ep structure */ - hpcd->IN_ep[index].is_in = 1; - hpcd->IN_ep[index].num = index; - hpcd->IN_ep[index].tx_fifo_num = index; - /* Control until ep is activated */ - hpcd->IN_ep[index].type = EP_TYPE_CTRL; - hpcd->IN_ep[index].maxpacket = 0; - hpcd->IN_ep[index].xfer_buff = 0; - hpcd->IN_ep[index].xfer_len = 0; - } - - for (index = 0; index < 15 ; index++) - { - hpcd->OUT_ep[index].is_in = 0; - hpcd->OUT_ep[index].num = index; - hpcd->IN_ep[index].tx_fifo_num = index; - /* Control until ep is activated */ - hpcd->OUT_ep[index].type = EP_TYPE_CTRL; - hpcd->OUT_ep[index].maxpacket = 0; - hpcd->OUT_ep[index].xfer_buff = 0; - hpcd->OUT_ep[index].xfer_len = 0; - } - - /* Init Device */ - USB_DevInit(hpcd->Instance, hpcd->Init); - - hpcd->USB_Address = 0; - - hpcd->State= HAL_PCD_STATE_READY; - - /* Activate LPM */ - if (hpcd->Init.lpm_enable ==1) - { - HAL_PCDEx_ActivateLPM(hpcd); - } - /* Activate Battery charging */ - if (hpcd->Init.battery_charging_enable ==1) - { - HAL_PCDEx_ActivateBCD(hpcd); - } - USB_DevDisconnect (hpcd->Instance); - return HAL_OK; -} - -/** - * @brief DeInitializes the PCD peripheral. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd) -{ - /* Check the PCD handle allocation */ - if(hpcd == NULL) - { - return HAL_ERROR; - } - - hpcd->State = HAL_PCD_STATE_BUSY; - - /* Stop Device */ - HAL_PCD_Stop(hpcd); - - /* DeInit the low level hardware */ - HAL_PCD_MspDeInit(hpcd); - - hpcd->State = HAL_PCD_STATE_RESET; - - return HAL_OK; -} - -/** - * @brief Initializes the PCD MSP. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitializes PCD MSP. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group2 Input and Output operation functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the PCD data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Start The USB OTG Device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - USB_DevConnect (hpcd->Instance); - __HAL_PCD_ENABLE(hpcd); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - -/** - * @brief Stop The USB OTG Device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - __HAL_PCD_DISABLE(hpcd); - USB_StopDevice(hpcd->Instance); - USB_DevDisconnect (hpcd->Instance); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} -#if defined (USB_OTG_FS) -/** - * @brief Handles PCD interrupt request. - * @param hpcd: PCD handle - * @retval HAL status - */ -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - uint32_t index = 0U, ep_intr = 0U, epint = 0U, epnum = 0U; - uint32_t fifoemptymsk = 0U, temp = 0U; - USB_OTG_EPTypeDef *ep = NULL; - uint32_t hclk = 80000000; - - /* ensure that we are in device mode */ - if (USB_GetMode(hpcd->Instance) == USB_OTG_MODE_DEVICE) - { - /* avoid spurious interrupt */ - if(__HAL_PCD_IS_INVALID_INTERRUPT(hpcd)) - { - return; - } - - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_MMIS)) - { - /* incorrect mode, acknowledge the interrupt */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS); - } - - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OEPINT)) - { - epnum = 0; - - /* Read in the device interrupt bits */ - ep_intr = USB_ReadDevAllOutEpInterrupt(hpcd->Instance); - - while (ep_intr) - { - if (ep_intr & 0x1) - { - epint = USB_ReadDevOutEPInterrupt(hpcd->Instance, epnum); - - if (( epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) - { - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_XFRC); - - /* setup/out transaction management for Core ID 310A */ - if (USBx->GSNPSID == USB_OTG_CORE_ID_310A) - { - if (!(USBx_OUTEP(0)->DOEPINT & (0x1 << 15))) - { - if (hpcd->Init.dma_enable == 1) - { - hpcd->OUT_ep[epnum].xfer_count = - hpcd->OUT_ep[epnum].maxpacket - - (USBx_OUTEP(epnum)->DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ); - - hpcd->OUT_ep[epnum].xfer_buff += - hpcd->OUT_ep[epnum].maxpacket; - } - - HAL_PCD_DataOutStageCallback(hpcd, epnum); - - if (hpcd->Init.dma_enable == 1) - { - if (!epnum && !hpcd->OUT_ep[epnum].xfer_len) - { - /* this is ZLP, so prepare EP0 for next setup */ - USB_EP0_OutStart(hpcd->Instance, 1, (uint8_t *)hpcd->Setup); - } - } - } - - /* Clear the SetPktRcvd flag*/ - USBx_OUTEP(0)->DOEPINT |= (0x1 << 15) | (0x1 << 5); - } - else - { - if (hpcd->Init.dma_enable == 1) - { - hpcd->OUT_ep[epnum].xfer_count = - hpcd->OUT_ep[epnum].maxpacket - - (USBx_OUTEP(epnum)->DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ); - hpcd->OUT_ep[epnum].xfer_buff += hpcd->OUT_ep[epnum].maxpacket; - } - - HAL_PCD_DataOutStageCallback(hpcd, epnum); - - if (hpcd->Init.dma_enable == 1) - { - if (!epnum && !hpcd->OUT_ep[epnum].xfer_len) - { - /* this is ZLP, so prepare EP0 for next setup */ - USB_EP0_OutStart(hpcd->Instance, 1, (uint8_t *)hpcd->Setup); - } - } - } - } - - if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) - { - /* Inform the upper layer that a setup packet is available */ - HAL_PCD_SetupStageCallback(hpcd); - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP); - } - - if(( epint & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS) - { - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPDIS); - } - -#ifdef USB_OTG_DOEPINT_OTEPSPR - /* Clear Status Phase Received interrupt */ - if(( epint & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR) - { - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR); - } -#endif /* USB_OTG_DOEPINT_OTEPSPR */ - } - epnum++; - ep_intr >>= 1; - } - } - - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IEPINT)) - { - /* Read in the device interrupt bits */ - ep_intr = USB_ReadDevAllInEpInterrupt(hpcd->Instance); - - epnum = 0; - - while ( ep_intr ) - { - if (ep_intr & 0x1) /* In ITR */ - { - epint = USB_ReadDevInEPInterrupt(hpcd->Instance, epnum); - - if(( epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) - { - fifoemptymsk = 0x1 << epnum; - USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk; - - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC); - - if (hpcd->Init.dma_enable == 1) - { - hpcd->IN_ep[epnum].xfer_buff += hpcd->IN_ep[epnum].maxpacket; - } - - HAL_PCD_DataInStageCallback(hpcd, epnum); - - if (hpcd->Init.dma_enable == 1) - { - /* this is ZLP, so prepare EP0 for next setup */ - if((epnum == 0) && (hpcd->IN_ep[epnum].xfer_len == 0)) - { - /* prepare to rx more setup packets */ - USB_EP0_OutStart(hpcd->Instance, 1, (uint8_t *)hpcd->Setup); - } - } - } - if(( epint & USB_OTG_DIEPINT_TOC) == USB_OTG_DIEPINT_TOC) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_TOC); - } - if(( epint & USB_OTG_DIEPINT_ITTXFE) == USB_OTG_DIEPINT_ITTXFE) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_ITTXFE); - } - if(( epint & USB_OTG_DIEPINT_INEPNE) == USB_OTG_DIEPINT_INEPNE) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_INEPNE); - } - if(( epint & USB_OTG_DIEPINT_EPDISD) == USB_OTG_DIEPINT_EPDISD) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_EPDISD); - } - if(( epint & USB_OTG_DIEPINT_TXFE) == USB_OTG_DIEPINT_TXFE) - { - PCD_WriteEmptyTxFifo(hpcd , epnum); - } - } - epnum++; - ep_intr >>= 1; - } - } - - /* Handle Resume Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT)) - { - /* Clear the Remote Wake-up Signaling */ - USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG; - - if(hpcd->LPM_State == LPM_L1) - { - hpcd->LPM_State = LPM_L0; - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE); - } - else - { - HAL_PCD_ResumeCallback(hpcd); - } - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT); - } - - /* Handle Suspend Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP)) - { - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS) - { - - HAL_PCD_SuspendCallback(hpcd); - } - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP); - } - - /* Handle LPM Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT); - if( hpcd->LPM_State == LPM_L0) - { - hpcd->LPM_State = LPM_L1; - hpcd->BESL = (hpcd->Instance->GLPMCFG & USB_OTG_GLPMCFG_BESL) >>2 ; - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE); - } - else - { - HAL_PCD_SuspendCallback(hpcd); - } - } - - /* Handle Reset Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBRST)) - { - USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG; - USB_FlushTxFifo(hpcd->Instance , 0x10); - - for (index = 0; index < hpcd->Init.dev_endpoints ; index++) - { - USBx_INEP(index)->DIEPINT = 0xFF; - USBx_OUTEP(index)->DOEPINT = 0xFF; - } - USBx_DEVICE->DAINT = 0xFFFFFFFF; - USBx_DEVICE->DAINTMSK |= 0x10001; - - if(hpcd->Init.use_dedicated_ep1) - { - USBx_DEVICE->DOUTEP1MSK |= (USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM); - USBx_DEVICE->DINEP1MSK |= (USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM); - } - else - { -#ifdef USB_OTG_DOEPINT_OTEPSPR - USBx_DEVICE->DOEPMSK |= (USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM | USB_OTG_DOEPMSK_OTEPSPRM); -#else - USBx_DEVICE->DOEPMSK |= (USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM); -#endif /* USB_OTG_DOEPINT_OTEPSPR */ - USBx_DEVICE->DIEPMSK |= (USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM); - } - - /* Set Default Address to 0 */ - USBx_DEVICE->DCFG &= ~USB_OTG_DCFG_DAD; - - /* setup EP0 to receive SETUP packets */ - USB_EP0_OutStart(hpcd->Instance, hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup); - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBRST); - } - - /* Handle Enumeration done Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE)) - { - USB_ActivateSetup(hpcd->Instance); - hpcd->Instance->GUSBCFG &= ~USB_OTG_GUSBCFG_TRDT; - - hpcd->Init.speed = USB_OTG_SPEED_FULL; - hpcd->Init.ep0_mps = USB_OTG_FS_MAX_PACKET_SIZE ; - - /* The USBTRD is configured according to the tables below, depending on AHB frequency - used by application. In the low AHB frequency range it is used to stretch enough the USB response - time to IN tokens, the USB turnaround time, so to compensate for the longer AHB read access - latency to the Data FIFO */ - - /* Get hclk frequency value */ - hclk = HAL_RCC_GetHCLKFreq(); - - if((hclk >= 14200000)&&(hclk < 15000000)) - { - /* hclk Clock Range between 14.2-15 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xF << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 15000000)&&(hclk < 16000000)) - { - /* hclk Clock Range between 15-16 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xE << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 16000000)&&(hclk < 17200000)) - { - /* hclk Clock Range between 16-17.2 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xD << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 17200000)&&(hclk < 18500000)) - { - /* hclk Clock Range between 17.2-18.5 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xC << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 18500000)&&(hclk < 20000000)) - { - /* hclk Clock Range between 18.5-20 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xB << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 20000000)&&(hclk < 21800000)) - { - /* hclk Clock Range between 20-21.8 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0xA << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 21800000)&&(hclk < 24000000)) - { - /* hclk Clock Range between 21.8-24 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0x9 << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 24000000)&&(hclk < 27700000)) - { - /* hclk Clock Range between 24-27.7 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0x8 << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else if((hclk >= 27700000)&&(hclk < 32000000)) - { - /* hclk Clock Range between 27.7-32 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0x7 << 10) & USB_OTG_GUSBCFG_TRDT); - } - - else /* if(hclk >= 32000000) */ - { - /* hclk Clock Range between 32-80 MHz */ - hpcd->Instance->GUSBCFG |= (uint32_t)((0x6 << 10) & USB_OTG_GUSBCFG_TRDT); - } - - HAL_PCD_ResetCallback(hpcd); - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE); - } - - /* Handle RxQLevel Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) - { - USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - - temp = USBx->GRXSTSP; - - ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; - - if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT) - { - if((temp & USB_OTG_GRXSTSP_BCNT) != 0) - { - USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4); - ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - } - } - else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT) - { - USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8); - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - } - USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - } - - /* Handle SOF Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SOF)) - { - HAL_PCD_SOFCallback(hpcd); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SOF); - } - - /* Handle Incomplete ISO IN Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR)) - { - HAL_PCD_ISOINIncompleteCallback(hpcd, epnum); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR); - } - - /* Handle Incomplete ISO OUT Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT)) - { - HAL_PCD_ISOOUTIncompleteCallback(hpcd, epnum); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT); - } - - /* Handle Connection event Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT)) - { - HAL_PCD_ConnectCallback(hpcd); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT); - } - - /* Handle Disconnection event Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OTGINT)) - { - temp = hpcd->Instance->GOTGINT; - - if((temp & USB_OTG_GOTGINT_SEDET) == USB_OTG_GOTGINT_SEDET) - { - HAL_PCD_DisconnectCallback(hpcd); - } - hpcd->Instance->GOTGINT |= temp; - } - } -} - -#endif /* USB_OTG_FS */ - -#if defined (USB) -/** - * @brief This function handles PCD interrupt request. - * @param hpcd: PCD handle - * @retval HAL status - */ -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) -{ - uint32_t wInterrupt_Mask = 0; - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_CTR)) - { - /* servicing of the endpoint correct transfer interrupt */ - /* clear of the CTR flag into the sub */ - PCD_EP_ISR_Handler(hpcd); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_RESET)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); - HAL_PCD_ResetCallback(hpcd); - HAL_PCD_SetAddress(hpcd, 0); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_PMAOVR)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_ERR)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_WKUP)) - { - - hpcd->Instance->CNTR &= ~(USB_CNTR_LPMODE); - - /*set wInterrupt_Mask global variable*/ - wInterrupt_Mask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \ - | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; - - /*Set interrupt mask*/ - hpcd->Instance->CNTR = wInterrupt_Mask; - - /* enable L1REQ interrupt */ - if (hpcd->Init.lpm_enable ==1) - { - wInterrupt_Mask |= USB_CNTR_L1REQM; - - /* Enable LPM support and enable ACK answer to LPM request*/ - USB_TypeDef *USBx = hpcd->Instance; - hpcd->lpm_active = ENABLE; - hpcd->LPM_State = LPM_L0; - - USBx->LPMCSR |= (USB_LPMCSR_LMPEN); - USBx->LPMCSR |= (USB_LPMCSR_LPMACK); - } - - if(hpcd->LPM_State == LPM_L1) - { - hpcd->LPM_State = LPM_L0; - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE); - } - - HAL_PCD_ResumeCallback(hpcd); - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_SUSP)) - { - /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP); - - /* Force low-power mode in the macrocell */ - hpcd->Instance->CNTR |= USB_CNTR_FSUSP; - hpcd->Instance->CNTR |= USB_CNTR_LPMODE; - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_WKUP) == 0) - { - HAL_PCD_SuspendCallback(hpcd); - } - } - - /* Handle LPM Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_L1REQ)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_L1REQ); - if( hpcd->LPM_State == LPM_L0) - { - /* Force suspend and low-power mode before going to L1 state*/ - hpcd->Instance->CNTR |= USB_CNTR_LPMODE; - hpcd->Instance->CNTR |= USB_CNTR_FSUSP; - - hpcd->LPM_State = LPM_L1; - hpcd->BESL = (hpcd->Instance->LPMCSR & USB_LPMCSR_BESL) >>2 ; - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE); - } - else - { - HAL_PCD_SuspendCallback(hpcd); - } - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_SOF)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); - HAL_PCD_SOFCallback(hpcd); - } - - if (__HAL_PCD_GET_FLAG (hpcd, USB_ISTR_ESOF)) - { - /* clear ESOF flag in ISTR */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); - } -} -#endif /* USB */ - -/** - * @brief Data OUT stage callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ -__weak void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DataOutStageCallback could be implemented in the user file - */ -} - -/** - * @brief Data IN stage callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ -__weak void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DataInStageCallback could be implemented in the user file - */ -} -/** - * @brief Setup stage callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SetupStageCallback could be implemented in the user file - */ -} - -/** - * @brief USB Start Of Frame callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SOFCallback could be implemented in the user file - */ -} - -/** - * @brief USB Reset callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ResetCallback could be implemented in the user file - */ -} - -/** - * @brief Suspend event callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SuspendCallback could be implemented in the user file - */ -} - -/** - * @brief Resume event callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ResumeCallback could be implemented in the user file - */ -} - -/** - * @brief Incomplete ISO OUT callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ -__weak void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ISOOUTIncompleteCallback could be implemented in the user file - */ -} - -/** - * @brief Incomplete ISO IN callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ -__weak void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ISOINIncompleteCallback could be implemented in the user file - */ -} - -/** - * @brief Connection event callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ConnectCallback could be implemented in the user file - */ -} - -/** - * @brief Disconnection event callback. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DisconnectCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions - * @brief management functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the PCD data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Connect the USB device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - USB_DevConnect(hpcd->Instance); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - -/** - * @brief Disconnect the USB device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - USB_DevDisconnect(hpcd->Instance); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - -/** - * @brief Set the USB Device address. - * @param hpcd: PCD handle - * @param address: new device address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) -{ - __HAL_LOCK(hpcd); - hpcd->USB_Address = address; - USB_SetDevAddress(hpcd->Instance, address); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} -/** - * @brief Open and configure an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param ep_mps: endpoint max packet size - * @param ep_type: endpoint type - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) -{ - HAL_StatusTypeDef ret = HAL_OK; - PCD_EPTypeDef *ep = NULL; - - if ((ep_addr & 0x80) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr & 0x7F]; - } - ep->num = ep_addr & 0x7F; - - ep->is_in = (0x80 & ep_addr) != 0; - ep->maxpacket = ep_mps; - ep->type = ep_type; - - __HAL_LOCK(hpcd); - USB_ActivateEndpoint(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); - return ret; - -} - - -/** - * @brief Deactivate an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - PCD_EPTypeDef *ep = NULL; - - if ((ep_addr & 0x80) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr & 0x7F]; - } - ep->num = ep_addr & 0x7F; - - ep->is_in = (0x80 & ep_addr) != 0; - - __HAL_LOCK(hpcd); - USB_DeactivateEndpoint(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - - -/** - * @brief Receive an amount of data. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param pBuf: pointer to the reception buffer - * @param len: amount of data to be received - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) -{ - PCD_EPTypeDef *ep = NULL; - - ep = &hpcd->OUT_ep[ep_addr & 0x7F]; - - /*setup and start the Xfer */ - ep->xfer_buff = pBuf; - ep->xfer_len = len; - ep->xfer_count = 0; - ep->is_in = 0; - ep->num = ep_addr & 0x7F; - - if ((ep_addr & 0x7F) == 0 ) - { - USB_EP0StartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable); - } - else - { - USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable); - } - - return HAL_OK; -} - -/** - * @brief Get Received Data Size. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval Data Size - */ -uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - return hpcd->OUT_ep[ep_addr & 0x7F].xfer_count; -} -/** - * @brief Send an amount of data. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param pBuf: pointer to the transmission buffer - * @param len: amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) -{ - PCD_EPTypeDef *ep = NULL; - - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - - /*setup and start the Xfer */ - ep->xfer_buff = pBuf; - ep->xfer_len = len; - ep->xfer_count = 0; - ep->is_in = 1; - ep->num = ep_addr & 0x7F; - - if ((ep_addr & 0x7F) == 0 ) - { - USB_EP0StartXfer(hpcd->Instance,ep, hpcd->Init.dma_enable); - } - else - { - USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable); - } - - return HAL_OK; -} - -/** - * @brief Set a STALL condition over an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - PCD_EPTypeDef *ep = NULL; - - if ((0x80 & ep_addr) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - } - - ep->is_stall = 1; - ep->num = ep_addr & 0x7F; - ep->is_in = ((ep_addr & 0x80) == 0x80); - - __HAL_LOCK(hpcd); - USB_EPSetStall(hpcd->Instance , ep); - if((ep_addr & 0x7F) == 0) - { - USB_EP0_OutStart(hpcd->Instance, hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup); - } - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Clear a STALL condition over in an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - PCD_EPTypeDef *ep = NULL; - - if ((0x80 & ep_addr) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - } - - ep->is_stall = 0; - ep->num = ep_addr & 0x7F; - ep->is_in = ((ep_addr & 0x80) == 0x80); - - __HAL_LOCK(hpcd); - USB_EPClearStall(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Flush an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - __HAL_LOCK(hpcd); - - if ((ep_addr & 0x80) == 0x80) - { - USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F); - } - else - { - USB_FlushRxFifo(hpcd->Instance); - } - - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Activate remote wakeup signalling. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) -{ - return(USB_ActivateRemoteWakeup(hpcd->Instance)); -} - -/** - * @brief De-activate remote wakeup signalling. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) -{ - return(USB_DeActivateRemoteWakeup(hpcd->Instance)); -} -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the PCD handle state. - * @param hpcd: PCD handle - * @retval HAL state - */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd) -{ - return hpcd->State; -} -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @addtogroup PCD_Private_Functions - * @{ - */ -#if defined (USB_OTG_FS) -/** - * @brief Check FIFO for the next packet to be loaded. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval HAL status - */ -static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - USB_OTG_EPTypeDef *ep = NULL; - int32_t len = 0U; - uint32_t len32b = 0; - uint32_t fifoemptymsk = 0; - - ep = &hpcd->IN_ep[epnum]; - len = ep->xfer_len - ep->xfer_count; - - if (len > ep->maxpacket) - { - len = ep->maxpacket; - } - - - len32b = (len + 3) / 4; - - while ( (USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) > len32b && - ep->xfer_count < ep->xfer_len && - ep->xfer_len != 0) - { - /* Write the FIFO */ - len = ep->xfer_len - ep->xfer_count; - - if (len > ep->maxpacket) - { - len = ep->maxpacket; - } - len32b = (len + 3) / 4; - - USB_WritePacket(USBx, ep->xfer_buff, epnum, len, hpcd->Init.dma_enable); - - ep->xfer_buff += len; - ep->xfer_count += len; - } - - if(len <= 0) - { - fifoemptymsk = 0x1 << epnum; - USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk; - - } - - return HAL_OK; -} -#endif /* USB_OTG_FS */ - -#if defined (USB) -/** - * @brief This function handles PCD Endpoint interrupt request. - * @param hpcd: PCD handle - * @retval HAL status - */ -static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) -{ - PCD_EPTypeDef *ep = NULL; - uint16_t count = 0; - uint8_t epindex = 0; - __IO uint16_t wIstr = 0; - __IO uint16_t wEPVal = 0; - - /* stay in loop while pending interrupts */ - while (((wIstr = hpcd->Instance->ISTR) & USB_ISTR_CTR) != 0) - { - /* extract highest priority endpoint number */ - epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); - - if (epindex == 0) - { - /* Decode and service control endpoint interrupt */ - - /* DIR bit = origin of the interrupt */ - if ((wIstr & USB_ISTR_DIR) == 0) - { - /* DIR = 0 */ - - /* DIR = 0 => IN int */ - /* DIR = 0 implies that (EP_CTR_TX = 1) always */ - PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0); - ep = &hpcd->IN_ep[0]; - - ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); - ep->xfer_buff += ep->xfer_count; - - /* TX COMPLETE */ - HAL_PCD_DataInStageCallback(hpcd, 0); - - - if((hpcd->USB_Address > 0)&& ( ep->xfer_len == 0)) - { - hpcd->Instance->DADDR = (hpcd->USB_Address | USB_DADDR_EF); - hpcd->USB_Address = 0; - } - - } - else - { - /* DIR = 1 */ - - /* DIR = 1 & CTR_RX => SETUP or OUT int */ - /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ - ep = &hpcd->OUT_ep[0]; - wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); - - if ((wEPVal & USB_EP_SETUP) != 0) - { - /* Get SETUP Packet*/ - ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - USB_ReadPMA(hpcd->Instance, (uint8_t*)hpcd->Setup ,ep->pmaadress , ep->xfer_count); - /* SETUP bit kept frozen while CTR_RX = 1*/ - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); - - /* Process SETUP Packet*/ - HAL_PCD_SetupStageCallback(hpcd); - } - - else if ((wEPVal & USB_EP_CTR_RX) != 0) - { - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); - /* Get Control Data OUT Packet*/ - ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - - if (ep->xfer_count != 0) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count); - ep->xfer_buff+=ep->xfer_count; - } - - /* Process Control Data OUT Packet*/ - HAL_PCD_DataOutStageCallback(hpcd, 0); - - PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); - PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); - } - } - } - else - { - /* Decode and service non control endpoints interrupt */ - - /* process related endpoint register */ - wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex); - if ((wEPVal & USB_EP_CTR_RX) != 0) - { - /* clear int flag */ - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex); - ep = &hpcd->OUT_ep[epindex]; - - /* OUT double Buffering*/ - if (ep->doublebuffer == 0) - { - count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - if (count != 0) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); - } - } - else - { - if (PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) - { - /*read from endpoint BUF0Addr buffer*/ - count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); - if (count != 0) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); - } - } - else - { - /*read from endpoint BUF1Addr buffer*/ - count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); - if (count != 0) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); - } - } - PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_OUT); - } - /*multi-packet on the NON control OUT endpoint*/ - ep->xfer_count+=count; - ep->xfer_buff+=count; - - if ((ep->xfer_len == 0) || (count < ep->maxpacket)) - { - /* RX COMPLETE */ - HAL_PCD_DataOutStageCallback(hpcd, ep->num); - } - else - { - HAL_PCD_EP_Receive(hpcd, ep->num, ep->xfer_buff, ep->xfer_len); - } - - } /* if((wEPVal & EP_CTR_RX) */ - - if ((wEPVal & USB_EP_CTR_TX) != 0) - { - ep = &hpcd->IN_ep[epindex]; - - /* clear int flag */ - PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); - - /* IN double Buffering*/ - if (ep->doublebuffer == 0) - { - ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); - if (ep->xfer_count != 0) - { - USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, ep->xfer_count); - } - } - else - { - if (PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_TX) - { - /*read from endpoint BUF0Addr buffer*/ - ep->xfer_count = PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); - if (ep->xfer_count != 0) - { - USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, ep->xfer_count); - } - } - else - { - /*read from endpoint BUF1Addr buffer*/ - ep->xfer_count = PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); - if (ep->xfer_count != 0) - { - USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, ep->xfer_count); - } - } - PCD_FreeUserBuffer(hpcd->Instance, ep->num, PCD_EP_DBUF_IN); - } - /*multi-packet on the NON control IN endpoint*/ - ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); - ep->xfer_buff+=ep->xfer_count; - - /* Zero Length Packet? */ - if (ep->xfer_len == 0) - { - /* TX COMPLETE */ - HAL_PCD_DataInStageCallback(hpcd, ep->num); - } - else - { - HAL_PCD_EP_Transmit(hpcd, ep->num, ep->xfer_buff, ep->xfer_len); - } - } - } - } - return HAL_OK; -} -#endif /* USB */ - -/** - * @} - */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* HAL_PCD_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c deleted file mode 100644 index 80fc7f9d..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c +++ /dev/null @@ -1,523 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd_ex.c - * @author MCD Application Team - * @brief PCD Extended HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Extended features functions - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup PCDEx PCDEx - * @brief PCD Extended HAL module driver - * @{ - */ - -#ifdef HAL_PCD_MODULE_ENABLED - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions - * @{ - */ - -/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions - * @brief PCDEx control functions - * -@verbatim - =============================================================================== - ##### Extended features functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Update FIFO configuration - -@endverbatim - * @{ - */ -#if defined (USB_OTG_FS) -/** - * @brief Set Tx FIFO - * @param hpcd: PCD handle - * @param fifo: The number of Tx fifo - * @param size: Fifo size - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size) -{ - uint8_t index = 0; - uint32_t Tx_Offset = 0; - - /* TXn min size = 16 words. (n : Transmit FIFO index) - When a TxFIFO is not used, the Configuration should be as follows: - case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes) - --> Txm can use the space allocated for Txn. - case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes) - --> Txn should be configured with the minimum space of 16 words - The FIFO is used optimally when used TxFIFOs are allocated in the top - of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones. - When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */ - - Tx_Offset = hpcd->Instance->GRXFSIZ; - - if(fifo == 0) - { - hpcd->Instance->DIEPTXF0_HNPTXFSIZ = (size << 16) | Tx_Offset; - } - else - { - Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16; - for (index = 0; index < (fifo - 1); index++) - { - Tx_Offset += (hpcd->Instance->DIEPTXF[index] >> 16); - } - - /* Multiply Tx_Size by 2 to get higher performance */ - hpcd->Instance->DIEPTXF[fifo - 1] = (size << 16) | Tx_Offset; - } - - return HAL_OK; -} - -/** - * @brief Set Rx FIFO - * @param hpcd: PCD handle - * @param size: Size of Rx fifo - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size) -{ - hpcd->Instance->GRXFSIZ = size; - - return HAL_OK; -} - -/** - * @brief Activate LPM feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - hpcd->lpm_active = ENABLE; - hpcd->LPM_State = LPM_L0; - USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM; - USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); - - return HAL_OK; -} - -/** - * @brief Deactivate LPM feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - hpcd->lpm_active = DISABLE; - USBx->GINTMSK &= ~USB_OTG_GINTMSK_LPMINTM; - USBx->GLPMCFG &= ~(USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); - - return HAL_OK; -} - -/** - * @brief Handle BatteryCharging Process. - * @param hpcd: PCD handle - * @retval HAL status - */ -void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - uint32_t tickstart = HAL_GetTick(); - - /* Start BCD When device is connected */ - if (USBx_DEVICE->DCTL & USB_OTG_DCTL_SDIS) - { - /* Enable DCD : Data Contact Detect */ - USBx->GCCFG |= USB_OTG_GCCFG_DCDEN; - - /* Wait Detect flag or a timeout is happen*/ - while ((USBx->GCCFG & USB_OTG_GCCFG_DCDET) == 0) - { - /* Check for the Timeout */ - if((HAL_GetTick() - tickstart ) > 1000) - { - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); - return; - } - } - - /* Right response got */ - HAL_Delay(100); - - /* Check Detect flag*/ - if (USBx->GCCFG & USB_OTG_GCCFG_DCDET) - { - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); - } - - /*Primary detection: checks if connected to Standard Downstream Port - (without charging capability) */ - USBx->GCCFG &=~ USB_OTG_GCCFG_DCDEN; - USBx->GCCFG |= USB_OTG_GCCFG_PDEN; - HAL_Delay(100); - - if (!(USBx->GCCFG & USB_OTG_GCCFG_PDET)) - { - /* Case of Standard Downstream Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); - } - else - { - /* start secondary detection to check connection to Charging Downstream - Port or Dedicated Charging Port */ - USBx->GCCFG &=~ USB_OTG_GCCFG_PDEN; - USBx->GCCFG |= USB_OTG_GCCFG_SDEN; - HAL_Delay(100); - - if ((USBx->GCCFG) & USB_OTG_GCCFG_SDET) - { - /* case Dedicated Charging Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); - } - else - { - /* case Charging Downstream Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); - } - } - /* Battery Charging capability discovery finished */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); - } -} - -/** - * @brief Activate BatteryCharging feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - hpcd->battery_charging_active = ENABLE; - USBx->GCCFG |= (USB_OTG_GCCFG_BCDEN); - - return HAL_OK; -} - -/** - * @brief Deactivate BatteryCharging feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - hpcd->battery_charging_active = DISABLE; - USBx->GCCFG &= ~(USB_OTG_GCCFG_BCDEN); - return HAL_OK; -} -#endif /* USB_OTG_FS */ - -#if defined (USB) -/** - * @brief Configure PMA for EP - * @param hpcd : Device instance - * @param ep_addr: endpoint address - * @param ep_kind: endpoint Kind - * USB_SNG_BUF: Single Buffer used - * USB_DBL_BUF: Double Buffer used - * @param pmaadress: EP address in The PMA: In case of single buffer endpoint - * this parameter is 16-bit value providing the address - * in PMA allocated to endpoint. - * In case of double buffer endpoint this parameter - * is a 32-bit value providing the endpoint buffer 0 address - * in the LSB part of 32-bit value and endpoint buffer 1 address - * in the MSB part of 32-bit value. - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, - uint16_t ep_addr, - uint16_t ep_kind, - uint32_t pmaadress) - -{ - PCD_EPTypeDef *ep = NULL; - - /* initialize ep structure*/ - if ((0x80 & ep_addr) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - } - - /* Here we check if the endpoint is single or double Buffer*/ - if (ep_kind == PCD_SNG_BUF) - { - /*Single Buffer*/ - ep->doublebuffer = 0; - /*Configure te PMA*/ - ep->pmaadress = (uint16_t)pmaadress; - } - else /*USB_DBL_BUF*/ - { - /*Double Buffer Endpoint*/ - ep->doublebuffer = 1; - /*Configure the PMA*/ - ep->pmaaddr0 = pmaadress & 0xFFFF; - ep->pmaaddr1 = (pmaadress & 0xFFFF0000) >> 16; - } - - return HAL_OK; -} - -/** - * @brief Activate BatteryCharging feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - hpcd->battery_charging_active = ENABLE; - - USBx->BCDR |= (USB_BCDR_BCDEN); - /* Enable DCD : Data Contact Detect */ - USBx->BCDR |= (USB_BCDR_DCDEN); - - return HAL_OK; -} - -/** - * @brief Deactivate BatteryCharging feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - hpcd->battery_charging_active = DISABLE; - - USBx->BCDR &= ~(USB_BCDR_BCDEN); - return HAL_OK; -} - -/** - * @brief Handle BatteryCharging Process. - * @param hpcd: PCD handle - * @retval HAL status - */ -void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - uint32_t tickstart = HAL_GetTick(); - - /* Wait Detect flag or a timeout is happen*/ - while ((USBx->BCDR & USB_BCDR_DCDET) == 0) - { - /* Check for the Timeout */ - if((HAL_GetTick() - tickstart ) > 1000) - { - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); - return; - } - } - - HAL_Delay(300); - - /* Data Pin Contact ? Check Detect flag */ - if (USBx->BCDR & USB_BCDR_DCDET) - { - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); - } - /* Primary detection: checks if connected to Standard Downstream Port - (without charging capability) */ - USBx->BCDR &= ~(USB_BCDR_DCDEN); - USBx->BCDR |= (USB_BCDR_PDEN); - HAL_Delay(300); - - /* If Charger detect ? */ - if (USBx->BCDR & USB_BCDR_PDET) - { - /* Start secondary detection to check connection to Charging Downstream - Port or Dedicated Charging Port */ - USBx->BCDR &= ~(USB_BCDR_PDEN); - USBx->BCDR |= (USB_BCDR_SDEN); - HAL_Delay(300); - - /* If CDP ? */ - if (USBx->BCDR & USB_BCDR_SDET) - { - /* Dedicated Downstream Port DCP */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); - } - else - { - /* Charging Downstream Port CDP */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); - - /* Battery Charging capability discovery finished - Start Enumeration*/ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); - } - } - else /* NO */ - { - /* Standard Downstream Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); - } -} - -/** - * @brief Activate LPM feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) -{ - - USB_TypeDef *USBx = hpcd->Instance; - hpcd->lpm_active = ENABLE; - hpcd->LPM_State = LPM_L0; - - USBx->LPMCSR |= (USB_LPMCSR_LMPEN); - USBx->LPMCSR |= (USB_LPMCSR_LPMACK); - - - return HAL_OK; -} - -/** - * @brief Deactivate LPM feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - - hpcd->lpm_active = DISABLE; - - USBx->LPMCSR &= ~ (USB_LPMCSR_LMPEN); - USBx->LPMCSR &= ~ (USB_LPMCSR_LPMACK); - - return HAL_OK; -} - -#endif /* USB */ - -/** - * @brief Send LPM message to user layer callback. - * @param hpcd: PCD handle - * @param msg: LPM message - * @retval HAL status - */ -__weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(msg); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCDEx_LPM_Callback could be implemented in the user file - */ -} - -/** - * @brief Send BatteryCharging message to user layer callback. - * @param hpcd: PCD handle - * @param msg: LPM message - * @retval HAL status - */ -__weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(msg); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCDEx_BCD_Callback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* HAL_PCD_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c deleted file mode 100644 index 919b9926..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c +++ /dev/null @@ -1,674 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pwr.c - * @author MCD Application Team - * @brief PWR HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Power Controller (PWR) peripheral: - * + Initialization/de-initialization functions - * + Peripheral Control functions - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup PWR PWR - * @brief PWR HAL module driver - * @{ - */ - -#ifdef HAL_PWR_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -/** @defgroup PWR_Private_Defines PWR Private Defines - * @{ - */ - -/** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask - * @{ - */ -#define PVD_MODE_IT ((uint32_t)0x00010000) /*!< Mask for interruption yielded by PVD threshold crossing */ -#define PVD_MODE_EVT ((uint32_t)0x00020000) /*!< Mask for event yielded by PVD threshold crossing */ -#define PVD_RISING_EDGE ((uint32_t)0x00000001) /*!< Mask for rising edge set as PVD trigger */ -#define PVD_FALLING_EDGE ((uint32_t)0x00000002) /*!< Mask for falling edge set as PVD trigger */ -/** - * @} - */ - -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup PWR_Exported_Functions PWR Exported Functions - * @{ - */ - -/** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and de-initialization functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] - -@endverbatim - * @{ - */ - -/** - * @brief Deinitialize the HAL PWR peripheral registers to their default reset values. - * @retval None - */ -void HAL_PWR_DeInit(void) -{ - __HAL_RCC_PWR_FORCE_RESET(); - __HAL_RCC_PWR_RELEASE_RESET(); -} - -/** - * @brief Enable access to the backup domain - * (RTC registers, RTC backup data registers). - * @note After reset, the backup domain is protected against - * possible unwanted write accesses. - * @note RTCSEL that sets the RTC clock source selection is in the RTC back-up domain. - * In order to set or modify the RTC clock, the backup domain access must be - * disabled. - * @note LSEON bit that switches on and off the LSE crystal belongs as well to the - * back-up domain. - * @retval None - */ -void HAL_PWR_EnableBkUpAccess(void) -{ - SET_BIT(PWR->CR1, PWR_CR1_DBP); -} - -/** - * @brief Disable access to the backup domain - * (RTC registers, RTC backup data registers). - * @retval None - */ -void HAL_PWR_DisableBkUpAccess(void) -{ - CLEAR_BIT(PWR->CR1, PWR_CR1_DBP); -} - - - - -/** - * @} - */ - - - -/** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions - * @brief Low Power modes configuration functions - * -@verbatim - - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - - [..] - *** PVD configuration *** - ========================= - [..] - (+) The PVD is used to monitor the VDD power supply by comparing it to a - threshold selected by the PVD Level (PLS[2:0] bits in PWR_CR2 register). - - (+) PVDO flag is available to indicate if VDD/VDDA is higher or lower - than the PVD threshold. This event is internally connected to the EXTI - line16 and can generate an interrupt if enabled. This is done through - __HAL_PVD_EXTI_ENABLE_IT() macro. - (+) The PVD is stopped in Standby mode. - - - *** WakeUp pin configuration *** - ================================ - [..] - (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode. - The polarity of these pins can be set to configure event detection on high - level (rising edge) or low level (falling edge). - - - - *** Low Power modes configuration *** - ===================================== - [..] - The devices feature 8 low-power modes: - (+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator on. - (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on. - (+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, low power regulator on. - (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on. - (+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on. - (+) Stop 2 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on, reduced set of waking up IPs compared to Stop 1 mode. - (+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, main regulator off, low power regulator on. - (+) Standby mode without SRAM2: all clocks are stopped except LSI and LSE, main and low power regulators off. - (+) Shutdown mode: all clocks are stopped except LSE, main and low power regulators off. - - - *** Low-power run mode *** - ========================== - [..] - (+) Entry: (from main run mode) - (++) set LPR bit with HAL_PWREx_EnableLowPowerRunMode() API after having decreased the system clock below 2 MHz. - - (+) Exit: - (++) clear LPR bit then wait for REGLP bit to be reset with HAL_PWREx_DisableLowPowerRunMode() API. Only - then can the system clock frequency be increased above 2 MHz. - - - *** Sleep mode / Low-power sleep mode *** - ========================================= - [..] - (+) Entry: - The Sleep mode / Low-power Sleep mode is entered thru HAL_PWR_EnterSLEEPMode() API - in specifying whether or not the regulator is forced to low-power mode and if exit is interrupt or event-triggered. - (++) PWR_MAINREGULATOR_ON: Sleep mode (regulator in main mode). - (++) PWR_LOWPOWERREGULATOR_ON: Low-power sleep (regulator in low power mode). - In the latter case, the system clock frequency must have been decreased below 2 MHz beforehand. - (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction - (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction - - (+) WFI Exit: - (++) Any peripheral interrupt acknowledged by the nested vectored interrupt - controller (NVIC) or any wake-up event. - - (+) WFE Exit: - (++) Any wake-up event such as an EXTI line configured in event mode. - - [..] When exiting the Low-power sleep mode by issuing an interrupt or a wakeup event, - the MCU is in Low-power Run mode. - - *** Stop 0, Stop 1 and Stop 2 modes *** - =============================== - [..] - (+) Entry: - The Stop 0, Stop 1 or Stop 2 modes are entered thru the following API's: - (++) HAL_PWREx_EnterSTOP0Mode() for mode 0 or HAL_PWREx_EnterSTOP1Mode() for mode 1 or for porting reasons HAL_PWR_EnterSTOPMode(). - (++) HAL_PWREx_EnterSTOP2Mode() for mode 2. - (+) Regulator setting (applicable to HAL_PWR_EnterSTOPMode() only): - (++) PWR_MAINREGULATOR_ON - (++) PWR_LOWPOWERREGULATOR_ON - (+) Exit (interrupt or event-triggered, specified when entering STOP mode): - (++) PWR_STOPENTRY_WFI: enter Stop mode with WFI instruction - (++) PWR_STOPENTRY_WFE: enter Stop mode with WFE instruction - - (+) WFI Exit: - (++) Any EXTI Line (Internal or External) configured in Interrupt mode. - (++) Some specific communication peripherals (USART, LPUART, I2C) interrupts - when programmed in wakeup mode. - (+) WFE Exit: - (++) Any EXTI Line (Internal or External) configured in Event mode. - - [..] - When exiting Stop 0 and Stop 1 modes, the MCU is either in Run mode or in Low-power Run mode - depending on the LPR bit setting. - When exiting Stop 2 mode, the MCU is in Run mode. - - *** Standby mode *** - ==================== - [..] - The Standby mode offers two options: - (+) option a) all clocks off except LSI and LSE, RRS bit set (keeps voltage regulator in low power mode). - SRAM and registers contents are lost except for the SRAM2 content, the RTC registers, RTC backup registers - and Standby circuitry. - (+) option b) all clocks off except LSI and LSE, RRS bit cleared (voltage regulator then disabled). - SRAM and register contents are lost except for the RTC registers, RTC backup registers - and Standby circuitry. - - (++) Entry: - (+++) The Standby mode is entered thru HAL_PWR_EnterSTANDBYMode() API. - SRAM1 and register contents are lost except for registers in the Backup domain and - Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register. - To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API - to set RRS bit. - - (++) Exit: - (+++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event, - external reset in NRST pin, IWDG reset. - - [..] After waking up from Standby mode, program execution restarts in the same way as after a Reset. - - - *** Shutdown mode *** - ====================== - [..] - In Shutdown mode, - voltage regulator is disabled, all clocks are off except LSE, RRS bit is cleared. - SRAM and registers contents are lost except for backup domain registers. - - (+) Entry: - The Shutdown mode is entered thru HAL_PWREx_EnterSHUTDOWNMode() API. - - (+) Exit: - (++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event, - external reset in NRST pin. - - [..] After waking up from Shutdown mode, program execution restarts in the same way as after a Reset. - - - *** Auto-wakeup (AWU) from low-power mode *** - ============================================= - [..] - The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC - Wakeup event, a tamper event or a time-stamp event, without depending on - an external interrupt (Auto-wakeup mode). - - (+) RTC auto-wakeup (AWU) from the Stop, Standby and Shutdown modes - - - (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to - configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. - - (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it - is necessary to configure the RTC to detect the tamper or time stamp event using the - HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions. - - (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to - configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer_IT() function. - -@endverbatim - * @{ - */ - - - -/** - * @brief Configure the voltage threshold detected by the Power Voltage Detector (PVD). - * @param sConfigPVD: pointer to a PWR_PVDTypeDef structure that contains the PVD - * configuration information. - * @note Refer to the electrical characteristics of your device datasheet for - * more details about the voltage thresholds corresponding to each - * detection level. - * @retval None - */ -HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) -{ - /* Check the parameters */ - assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); - assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); - - /* Set PLS bits according to PVDLevel value */ - MODIFY_REG(PWR->CR2, PWR_CR2_PLS, sConfigPVD->PVDLevel); - - /* Clear any previous config. Keep it clear if no event or IT mode is selected */ - __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); - __HAL_PWR_PVD_EXTI_DISABLE_IT(); - __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); - __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); - - /* Configure interrupt mode */ - if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) - { - __HAL_PWR_PVD_EXTI_ENABLE_IT(); - } - - /* Configure event mode */ - if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) - { - __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); - } - - /* Configure the edge */ - if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) - { - __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); - } - - if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) - { - __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); - } - - return HAL_OK; -} - - -/** - * @brief Enable the Power Voltage Detector (PVD). - * @retval None - */ -void HAL_PWR_EnablePVD(void) -{ - SET_BIT(PWR->CR2, PWR_CR2_PVDE); -} - -/** - * @brief Disable the Power Voltage Detector (PVD). - * @retval None - */ -void HAL_PWR_DisablePVD(void) -{ - CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE); -} - - - - -/** - * @brief Enable the WakeUp PINx functionality. - * @param WakeUpPinPolarity: Specifies which Wake-Up pin to enable. - * This parameter can be one of the following legacy values which set the default polarity - * i.e. detection on high level (rising edge): - * @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5 - * - * or one of the following value where the user can explicitly specify the enabled pin and - * the chosen polarity: - * @arg @ref PWR_WAKEUP_PIN1_HIGH or PWR_WAKEUP_PIN1_LOW - * @arg @ref PWR_WAKEUP_PIN2_HIGH or PWR_WAKEUP_PIN2_LOW - * @arg @ref PWR_WAKEUP_PIN3_HIGH or PWR_WAKEUP_PIN3_LOW - * @arg @ref PWR_WAKEUP_PIN4_HIGH or PWR_WAKEUP_PIN4_LOW - * @arg @ref PWR_WAKEUP_PIN5_HIGH or PWR_WAKEUP_PIN5_LOW - * @note PWR_WAKEUP_PINx and PWR_WAKEUP_PINx_HIGH are equivalent. - * @retval None - */ -void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity) -{ - assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinPolarity)); - - /* Specifies the Wake-Up pin polarity for the event detection - (rising or falling edge) */ - MODIFY_REG(PWR->CR4, (PWR_CR3_EWUP & WakeUpPinPolarity), (WakeUpPinPolarity >> PWR_WUP_POLARITY_SHIFT)); - - /* Enable wake-up pin */ - SET_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinPolarity)); - - -} - -/** - * @brief Disable the WakeUp PINx functionality. - * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable. - * This parameter can be one of the following values: - * @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5 - * @retval None - */ -void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) -{ - assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); - - CLEAR_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinx)); -} - - -/** - * @brief Enter Sleep or Low-power Sleep mode. - * @note In Sleep/Low-power Sleep mode, all I/O pins keep the same state as in Run mode. - * @param Regulator: Specifies the regulator state in Sleep/Low-power Sleep mode. - * This parameter can be one of the following values: - * @arg @ref PWR_MAINREGULATOR_ON Sleep mode (regulator in main mode) - * @arg @ref PWR_LOWPOWERREGULATOR_ON Low-power Sleep mode (regulator in low-power mode) - * @note Low-power Sleep mode is entered from Low-power Run mode. Therefore, if not yet - * in Low-power Run mode before calling HAL_PWR_EnterSLEEPMode() with Regulator set - * to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the - * Flash in power-down monde in setting the SLEEP_PD bit in FLASH_ACR register. - * Additionally, the clock frequency must be reduced below 2 MHz. - * Setting SLEEP_PD in FLASH_ACR then appropriately reducing the clock frequency must - * be done before calling HAL_PWR_EnterSLEEPMode() API. - * @note When exiting Low-power Sleep mode, the MCU is in Low-power Run mode. To move in - * Run mode, the user must resort to HAL_PWREx_DisableLowPowerRunMode() API. - * @param SLEEPEntry: Specifies if Sleep mode is entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg @ref PWR_SLEEPENTRY_WFI enter Sleep or Low-power Sleep mode with WFI instruction - * @arg @ref PWR_SLEEPENTRY_WFE enter Sleep or Low-power Sleep mode with WFE instruction - * @note When WFI entry is used, tick interrupt have to be disabled if not desired as - * the interrupt wake up source. - * @retval None - */ -void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) -{ - /* Check the parameters */ - assert_param(IS_PWR_REGULATOR(Regulator)); - assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); - - /* Set Regulator parameter */ - if (Regulator == PWR_MAINREGULATOR_ON) - { - /* If in low-power run mode at this point, exit it */ - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) - { - HAL_PWREx_DisableLowPowerRunMode(); - } - /* Regulator now in main mode. */ - } - else - { - /* If in run mode, first move to low-power run mode. - The system clock frequency must be below 2 MHz at this point. */ - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF) == RESET) - { - HAL_PWREx_EnableLowPowerRunMode(); - } - } - - /* Clear SLEEPDEEP bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - - /* Select SLEEP mode entry -------------------------------------------------*/ - if(SLEEPEntry == PWR_SLEEPENTRY_WFI) - { - /* Request Wait For Interrupt */ - __WFI(); - } - else - { - /* Request Wait For Event */ - __SEV(); - __WFE(); - __WFE(); - } - -} - - -/** - * @brief Enter Stop mode - * @note This API is named HAL_PWR_EnterSTOPMode to ensure compatibility with legacy code running - * on devices where only "Stop mode" is mentioned with main or low power regulator ON. - * @note In Stop mode, all I/O pins keep the same state as in Run mode. - * @note All clocks in the VCORE domain are stopped; the PLL, the MSI, - * the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability - * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI - * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated - * only to the peripheral requesting it. - * SRAM1, SRAM2 and register contents are preserved. - * The BOR is available. - * The voltage regulator can be configured either in normal (Stop 0) or low-power mode (Stop 1). - * @note When exiting Stop 0 or Stop 1 mode by issuing an interrupt or a wakeup event, - * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register - * is set; the MSI oscillator is selected if STOPWUCK is cleared. - * @note When the voltage regulator operates in low power mode (Stop 1), an additional - * startup delay is incurred when waking up. - * By keeping the internal regulator ON during Stop mode (Stop 0), the consumption - * is higher although the startup time is reduced. - * @param Regulator: Specifies the regulator state in Stop mode. - * This parameter can be one of the following values: - * @arg @ref PWR_MAINREGULATOR_ON Stop 0 mode (main regulator ON) - * @arg @ref PWR_LOWPOWERREGULATOR_ON Stop 1 mode (low power regulator ON) - * @param STOPEntry: Specifies Stop 0 or Stop 1 mode is entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg @ref PWR_STOPENTRY_WFI Enter Stop 0 or Stop 1 mode with WFI instruction. - * @arg @ref PWR_STOPENTRY_WFE Enter Stop 0 or Stop 1 mode with WFE instruction. - * @retval None - */ -void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) -{ - /* Check the parameters */ - assert_param(IS_PWR_REGULATOR(Regulator)); - - if(Regulator == PWR_LOWPOWERREGULATOR_ON) - { - HAL_PWREx_EnterSTOP1Mode(STOPEntry); - } - else - { - HAL_PWREx_EnterSTOP0Mode(STOPEntry); - } -} - -/** - * @brief Enter Standby mode. - * @note In Standby mode, the PLL, the HSI, the MSI and the HSE oscillators are switched - * off. The voltage regulator is disabled, except when SRAM2 content is preserved - * in which case the regulator is in low-power mode. - * SRAM1 and register contents are lost except for registers in the Backup domain and - * Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register. - * To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API - * to set RRS bit. - * The BOR is available. - * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog state. - * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() respectively enable Pull Up and - * Pull Down state, HAL_PWREx_DisableGPIOPullUp() and HAL_PWREx_DisableGPIOPullDown() disable the - * same. - * These states are effective in Standby mode only if APC bit is set through - * HAL_PWREx_EnablePullUpPullDownConfig() API. - * @retval None - */ -void HAL_PWR_EnterSTANDBYMode(void) -{ - /* Set Stand-by mode */ - MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STANDBY); - - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - -/* This option is used to ensure that store operations are completed */ -#if defined ( __CC_ARM) - __force_stores(); -#endif - /* Request Wait For Interrupt */ - __WFI(); -} - - - -/** - * @brief Indicate Sleep-On-Exit when returning from Handler mode to Thread mode. - * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor - * re-enters SLEEP mode when an interruption handling is over. - * Setting this bit is useful when the processor is expected to run only on - * interruptions handling. - * @retval None - */ -void HAL_PWR_EnableSleepOnExit(void) -{ - /* Set SLEEPONEXIT bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); -} - - -/** - * @brief Disable Sleep-On-Exit feature when returning from Handler mode to Thread mode. - * @note Clear SLEEPONEXIT bit of SCR register. When this bit is set, the processor - * re-enters SLEEP mode when an interruption handling is over. - * @retval None - */ -void HAL_PWR_DisableSleepOnExit(void) -{ - /* Clear SLEEPONEXIT bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); -} - - - -/** - * @brief Enable CORTEX M4 SEVONPEND bit. - * @note Set SEVONPEND bit of SCR register. When this bit is set, this causes - * WFE to wake up when an interrupt moves from inactive to pended. - * @retval None - */ -void HAL_PWR_EnableSEVOnPend(void) -{ - /* Set SEVONPEND bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); -} - - -/** - * @brief Disable CORTEX M4 SEVONPEND bit. - * @note Clear SEVONPEND bit of SCR register. When this bit is set, this causes - * WFE to wake up when an interrupt moves from inactive to pended. - * @retval None - */ -void HAL_PWR_DisableSEVOnPend(void) -{ - /* Clear SEVONPEND bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); -} - - - - - -/** - * @brief PWR PVD interrupt callback - * @retval None - */ -__weak void HAL_PWR_PVDCallback(void) -{ - /* NOTE : This function should not be modified; when the callback is needed, - the HAL_PWR_PVDCallback can be implemented in the user file - */ -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_PWR_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c deleted file mode 100644 index bdd89602..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c +++ /dev/null @@ -1,1399 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pwr_ex.c - * @author MCD Application Team - * @brief Extended PWR HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Power Controller (PWR) peripheral: - * + Extended Initialization and de-initialization functions - * + Extended Peripheral Control functions - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup PWREx PWREx - * @brief PWR Extended HAL module driver - * @{ - */ - -#ifdef HAL_PWR_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) -#define PWR_PORTH_AVAILABLE_PINS ((uint32_t)0x0000000B) /* PH0/PH1/PH3 */ -#elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) -#define PWR_PORTH_AVAILABLE_PINS ((uint32_t)0x0000000B) /* PH0/PH1/PH3 */ -#elif defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) -#define PWR_PORTH_AVAILABLE_PINS ((uint32_t)0x00000003) /* PH0/PH1 */ -#elif defined (STM32L496xx) || defined (STM32L4A6xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define PWR_PORTH_AVAILABLE_PINS ((uint32_t)0x0000FFFF) /* PH0..PH15 */ -#endif - -#if defined (STM32L496xx) || defined (STM32L4A6xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) -#define PWR_PORTI_AVAILABLE_PINS ((uint32_t)0x00000FFF) /* PI0..PI11 */ -#endif - -/** @defgroup PWR_Extended_Private_Defines PWR Extended Private Defines - * @{ - */ - -/** @defgroup PWREx_PVM_Mode_Mask PWR PVM Mode Mask - * @{ - */ -#define PVM_MODE_IT ((uint32_t)0x00010000) /*!< Mask for interruption yielded by PVM threshold crossing */ -#define PVM_MODE_EVT ((uint32_t)0x00020000) /*!< Mask for event yielded by PVM threshold crossing */ -#define PVM_RISING_EDGE ((uint32_t)0x00000001) /*!< Mask for rising edge set as PVM trigger */ -#define PVM_FALLING_EDGE ((uint32_t)0x00000002) /*!< Mask for falling edge set as PVM trigger */ -/** - * @} - */ - -/** @defgroup PWREx_TimeOut_Value PWR Extended Flag Setting Time Out Value - * @{ - */ -#define PWR_FLAG_SETTING_DELAY_US 50 /*!< Time out value for REGLPF and VOSF flags setting */ -/** - * @} - */ - - - -/** - * @} - */ - - - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions - * @{ - */ - -/** @defgroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions - * @brief Extended Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Extended Peripheral Initialization and de-initialization functions ##### - =============================================================================== - [..] - -@endverbatim - * @{ - */ - - -/** - * @brief Return Voltage Scaling Range. - * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_RANGE1 or PWR_REGULATOR_VOLTAGE_RANGE2 - * or PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when applicable) - */ -uint32_t HAL_PWREx_GetVoltageRange(void) -{ -#if defined(PWR_CR5_R1MODE) - if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2) - { - return PWR_REGULATOR_VOLTAGE_SCALE2; - } - else if (READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == PWR_CR5_R1MODE) - { - /* PWR_CR5_R1MODE bit set means that Range 1 Boost is disabled */ - return PWR_REGULATOR_VOLTAGE_SCALE1; - } - else - { - return PWR_REGULATOR_VOLTAGE_SCALE1_BOOST; - } -#else - return (PWR->CR1 & PWR_CR1_VOS); -#endif -} - - - -/** - * @brief Configure the main internal regulator output voltage. - * @param VoltageScaling: specifies the regulator output voltage to achieve - * a tradeoff between performance and power consumption. - * This parameter can be one of the following values: - @if STM32L4S9xx - * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when available, Regulator voltage output range 1 boost mode, - * typical output voltage at 1.2 V, - * system frequency up to 120 MHz. - @endif - * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode, - * typical output voltage at 1.2 V, - * system frequency up to 80 MHz. - * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode, - * typical output voltage at 1.0 V, - * system frequency up to 26 MHz. - * @note When moving from Range 1 to Range 2, the system frequency must be decreased to - * a value below 26 MHz before calling HAL_PWREx_ControlVoltageScaling() API. - * When moving from Range 2 to Range 1, the system frequency can be increased to - * a value up to 80 MHz after calling HAL_PWREx_ControlVoltageScaling() API. For - * some devices, the system frequency can be increased up to 120 MHz. - * @note When moving from Range 2 to Range 1, the API waits for VOSF flag to be - * cleared before returning the status. If the flag is not cleared within - * 50 microseconds, HAL_TIMEOUT status is reported. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) -{ - uint32_t wait_loop_index = 0; - - assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); - -#if defined(PWR_CR5_R1MODE) - if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) - { - /* If current range is range 2 */ - if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2) - { - /* Make sure Range 1 Boost is enabled */ - CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); - - /* Set Range 1 */ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); - - /* Wait until VOSF is cleared */ - wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000)); - while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))) - { - wait_loop_index--; - } - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) - { - return HAL_TIMEOUT; - } - } - /* If current range is range 1 normal or boost mode */ - else - { - /* Enable Range 1 Boost (no issue if bit already reset) */ - CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); - } - } - else if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1) - { - /* If current range is range 2 */ - if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2) - { - /* Make sure Range 1 Boost is disabled */ - SET_BIT(PWR->CR5, PWR_CR5_R1MODE); - - /* Set Range 1 */ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); - - /* Wait until VOSF is cleared */ - wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000)); - while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))) - { - wait_loop_index--; - } - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) - { - return HAL_TIMEOUT; - } - } - /* If current range is range 1 normal or boost mode */ - else - { - /* Disable Range 1 Boost (no issue if bit already set) */ - SET_BIT(PWR->CR5, PWR_CR5_R1MODE); - } - } - else - { - /* Set Range 2 */ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2); - /* No need to wait for VOSF to be cleared for this transition */ - /* PWR_CR5_R1MODE bit setting has no effect in Range 2 */ - } - -#else - - /* If Set Range 1 */ - if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1) - { - if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE1) - { - /* Set Range 1 */ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); - - /* Wait until VOSF is cleared */ - wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000)); - while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))) - { - wait_loop_index--; - } - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) - { - return HAL_TIMEOUT; - } - } - } - else - { - if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE2) - { - /* Set Range 2 */ - MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2); - /* No need to wait for VOSF to be cleared for this transition */ - } - } -#endif - - return HAL_OK; -} - - -/** - * @brief Enable battery charging. - * When VDD is present, charge the external battery on VBAT thru an internal resistor. - * @param ResistorSelection: specifies the resistor impedance. - * This parameter can be one of the following values: - * @arg @ref PWR_BATTERY_CHARGING_RESISTOR_5 5 kOhms resistor - * @arg @ref PWR_BATTERY_CHARGING_RESISTOR_1_5 1.5 kOhms resistor - * @retval None - */ -void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection) -{ - assert_param(IS_PWR_BATTERY_RESISTOR_SELECT(ResistorSelection)); - - /* Specify resistor selection */ - MODIFY_REG(PWR->CR4, PWR_CR4_VBRS, ResistorSelection); - - /* Enable battery charging */ - SET_BIT(PWR->CR4, PWR_CR4_VBE); -} - - -/** - * @brief Disable battery charging. - * @retval None - */ -void HAL_PWREx_DisableBatteryCharging(void) -{ - CLEAR_BIT(PWR->CR4, PWR_CR4_VBE); -} - - -#if defined(PWR_CR2_USV) -/** - * @brief Enable VDDUSB supply. - * @note Remove VDDUSB electrical and logical isolation, once VDDUSB supply is present. - * @retval None - */ -void HAL_PWREx_EnableVddUSB(void) -{ - SET_BIT(PWR->CR2, PWR_CR2_USV); -} - - -/** - * @brief Disable VDDUSB supply. - * @retval None - */ -void HAL_PWREx_DisableVddUSB(void) -{ - CLEAR_BIT(PWR->CR2, PWR_CR2_USV); -} -#endif /* PWR_CR2_USV */ - -#if defined(PWR_CR2_IOSV) -/** - * @brief Enable VDDIO2 supply. - * @note Remove VDDIO2 electrical and logical isolation, once VDDIO2 supply is present. - * @retval None - */ -void HAL_PWREx_EnableVddIO2(void) -{ - SET_BIT(PWR->CR2, PWR_CR2_IOSV); -} - - -/** - * @brief Disable VDDIO2 supply. - * @retval None - */ -void HAL_PWREx_DisableVddIO2(void) -{ - CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); -} -#endif /* PWR_CR2_IOSV */ - - -/** - * @brief Enable Internal Wake-up Line. - * @retval None - */ -void HAL_PWREx_EnableInternalWakeUpLine(void) -{ - SET_BIT(PWR->CR3, PWR_CR3_EIWF); -} - - -/** - * @brief Disable Internal Wake-up Line. - * @retval None - */ -void HAL_PWREx_DisableInternalWakeUpLine(void) -{ - CLEAR_BIT(PWR->CR3, PWR_CR3_EIWF); -} - - - -/** - * @brief Enable GPIO pull-up state in Standby and Shutdown modes. - * @note Set the relevant PUy bits of PWR_PUCRx register to configure the I/O in - * pull-up state in Standby and Shutdown modes. - * @note This state is effective in Standby and Shutdown modes only if APC bit - * is set through HAL_PWREx_EnablePullUpPullDownConfig() API. - * @note The configuration is lost when exiting the Shutdown mode due to the - * power-on reset, maintained when exiting the Standby mode. - * @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding - * PDy bit of PWR_PDCRx register is cleared unless it is reserved. - * @note Even if a PUy bit to set is reserved, the other PUy bits entered as input - * parameter at the same time are set. - * @param GPIO: Specify the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_H - * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. - * @param GPIONumber: Specify the I/O pins numbers. - * This parameter can be one of the following values: - * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less - * I/O pins are available) or the logical OR of several of them to set - * several bits for a given port in a single API call. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) -{ - assert_param(IS_PWR_GPIO(GPIO)); - assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); - - switch (GPIO) - { - case PWR_GPIO_A: - SET_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); - CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15)))); - break; - case PWR_GPIO_B: - SET_BIT(PWR->PUCRB, GPIONumber); - CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4)))); - break; - case PWR_GPIO_C: - SET_BIT(PWR->PUCRC, GPIONumber); - CLEAR_BIT(PWR->PDCRC, GPIONumber); - break; -#if defined(GPIOD) - case PWR_GPIO_D: - SET_BIT(PWR->PUCRD, GPIONumber); - CLEAR_BIT(PWR->PDCRD, GPIONumber); - break; -#endif -#if defined(GPIOE) - case PWR_GPIO_E: - SET_BIT(PWR->PUCRE, GPIONumber); - CLEAR_BIT(PWR->PDCRE, GPIONumber); - break; -#endif -#if defined(GPIOF) - case PWR_GPIO_F: - SET_BIT(PWR->PUCRF, GPIONumber); - CLEAR_BIT(PWR->PDCRF, GPIONumber); - break; -#endif -#if defined(GPIOG) - case PWR_GPIO_G: - SET_BIT(PWR->PUCRG, GPIONumber); - CLEAR_BIT(PWR->PDCRG, GPIONumber); - break; -#endif - case PWR_GPIO_H: - SET_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); -#if defined (STM32L496xx) || defined (STM32L4A6xx) - CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); -#else - CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); -#endif - break; -#if defined(GPIOI) - case PWR_GPIO_I: - SET_BIT(PWR->PUCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - CLEAR_BIT(PWR->PDCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - break; -#endif - default: - return HAL_ERROR; - } - - return HAL_OK; -} - - -/** - * @brief Disable GPIO pull-up state in Standby mode and Shutdown modes. - * @note Reset the relevant PUy bits of PWR_PUCRx register used to configure the I/O - * in pull-up state in Standby and Shutdown modes. - * @note Even if a PUy bit to reset is reserved, the other PUy bits entered as input - * parameter at the same time are reset. - * @param GPIO: Specifies the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_H - * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. - * @param GPIONumber: Specify the I/O pins numbers. - * This parameter can be one of the following values: - * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less - * I/O pins are available) or the logical OR of several of them to reset - * several bits for a given port in a single API call. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) -{ - assert_param(IS_PWR_GPIO(GPIO)); - assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); - - switch (GPIO) - { - case PWR_GPIO_A: - CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); - break; - case PWR_GPIO_B: - CLEAR_BIT(PWR->PUCRB, GPIONumber); - break; - case PWR_GPIO_C: - CLEAR_BIT(PWR->PUCRC, GPIONumber); - break; -#if defined(GPIOD) - case PWR_GPIO_D: - CLEAR_BIT(PWR->PUCRD, GPIONumber); - break; -#endif -#if defined(GPIOE) - case PWR_GPIO_E: - CLEAR_BIT(PWR->PUCRE, GPIONumber); - break; -#endif -#if defined(GPIOF) - case PWR_GPIO_F: - CLEAR_BIT(PWR->PUCRF, GPIONumber); - break; -#endif -#if defined(GPIOG) - case PWR_GPIO_G: - CLEAR_BIT(PWR->PUCRG, GPIONumber); - break; -#endif - case PWR_GPIO_H: - CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); - break; -#if defined(GPIOI) - case PWR_GPIO_I: - CLEAR_BIT(PWR->PUCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - break; -#endif - default: - return HAL_ERROR; - } - - return HAL_OK; -} - - - -/** - * @brief Enable GPIO pull-down state in Standby and Shutdown modes. - * @note Set the relevant PDy bits of PWR_PDCRx register to configure the I/O in - * pull-down state in Standby and Shutdown modes. - * @note This state is effective in Standby and Shutdown modes only if APC bit - * is set through HAL_PWREx_EnablePullUpPullDownConfig() API. - * @note The configuration is lost when exiting the Shutdown mode due to the - * power-on reset, maintained when exiting the Standby mode. - * @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding - * PUy bit of PWR_PUCRx register is cleared unless it is reserved. - * @note Even if a PDy bit to set is reserved, the other PDy bits entered as input - * parameter at the same time are set. - * @param GPIO: Specify the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_H - * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. - * @param GPIONumber: Specify the I/O pins numbers. - * This parameter can be one of the following values: - * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less - * I/O pins are available) or the logical OR of several of them to set - * several bits for a given port in a single API call. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) -{ - assert_param(IS_PWR_GPIO(GPIO)); - assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); - - switch (GPIO) - { - case PWR_GPIO_A: - SET_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15)))); - CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14)))); - break; - case PWR_GPIO_B: - SET_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4)))); - CLEAR_BIT(PWR->PUCRB, GPIONumber); - break; - case PWR_GPIO_C: - SET_BIT(PWR->PDCRC, GPIONumber); - CLEAR_BIT(PWR->PUCRC, GPIONumber); - break; -#if defined(GPIOD) - case PWR_GPIO_D: - SET_BIT(PWR->PDCRD, GPIONumber); - CLEAR_BIT(PWR->PUCRD, GPIONumber); - break; -#endif -#if defined(GPIOE) - case PWR_GPIO_E: - SET_BIT(PWR->PDCRE, GPIONumber); - CLEAR_BIT(PWR->PUCRE, GPIONumber); - break; -#endif -#if defined(GPIOF) - case PWR_GPIO_F: - SET_BIT(PWR->PDCRF, GPIONumber); - CLEAR_BIT(PWR->PUCRF, GPIONumber); - break; -#endif -#if defined(GPIOG) - case PWR_GPIO_G: - SET_BIT(PWR->PDCRG, GPIONumber); - CLEAR_BIT(PWR->PUCRG, GPIONumber); - break; -#endif - case PWR_GPIO_H: -#if defined (STM32L496xx) || defined (STM32L4A6xx) - SET_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); -#else - SET_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); -#endif - CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); - break; -#if defined(GPIOI) - case PWR_GPIO_I: - SET_BIT(PWR->PDCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - CLEAR_BIT(PWR->PUCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - break; -#endif - default: - return HAL_ERROR; - } - - return HAL_OK; -} - - -/** - * @brief Disable GPIO pull-down state in Standby and Shutdown modes. - * @note Reset the relevant PDy bits of PWR_PDCRx register used to configure the I/O - * in pull-down state in Standby and Shutdown modes. - * @note Even if a PDy bit to reset is reserved, the other PDy bits entered as input - * parameter at the same time are reset. - * @param GPIO: Specifies the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_H - * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral. - * @param GPIONumber: Specify the I/O pins numbers. - * This parameter can be one of the following values: - * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less - * I/O pins are available) or the logical OR of several of them to reset - * several bits for a given port in a single API call. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) -{ - assert_param(IS_PWR_GPIO(GPIO)); - assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber)); - - switch (GPIO) - { - case PWR_GPIO_A: - CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15)))); - break; - case PWR_GPIO_B: - CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4)))); - break; - case PWR_GPIO_C: - CLEAR_BIT(PWR->PDCRC, GPIONumber); - break; -#if defined(GPIOD) - case PWR_GPIO_D: - CLEAR_BIT(PWR->PDCRD, GPIONumber); - break; -#endif -#if defined(GPIOE) - case PWR_GPIO_E: - CLEAR_BIT(PWR->PDCRE, GPIONumber); - break; -#endif -#if defined(GPIOF) - case PWR_GPIO_F: - CLEAR_BIT(PWR->PDCRF, GPIONumber); - break; -#endif -#if defined(GPIOG) - case PWR_GPIO_G: - CLEAR_BIT(PWR->PDCRG, GPIONumber); - break; -#endif - case PWR_GPIO_H: -#if defined (STM32L496xx) || defined (STM32L4A6xx) - CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); -#else - CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); -#endif - break; -#if defined(GPIOI) - case PWR_GPIO_I: - CLEAR_BIT(PWR->PDCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS)); - break; -#endif - default: - return HAL_ERROR; - } - - return HAL_OK; -} - - - -/** - * @brief Enable pull-up and pull-down configuration. - * @note When APC bit is set, the I/O pull-up and pull-down configurations defined in - * PWR_PUCRx and PWR_PDCRx registers are applied in Standby and Shutdown modes. - * @note Pull-up set by PUy bit of PWR_PUCRx register is not activated if the corresponding - * PDy bit of PWR_PDCRx register is also set (pull-down configuration priority is higher). - * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() API's ensure there - * is no conflict when setting PUy or PDy bit. - * @retval None - */ -void HAL_PWREx_EnablePullUpPullDownConfig(void) -{ - SET_BIT(PWR->CR3, PWR_CR3_APC); -} - - -/** - * @brief Disable pull-up and pull-down configuration. - * @note When APC bit is cleared, the I/O pull-up and pull-down configurations defined in - * PWR_PUCRx and PWR_PDCRx registers are not applied in Standby and Shutdown modes. - * @retval None - */ -void HAL_PWREx_DisablePullUpPullDownConfig(void) -{ - CLEAR_BIT(PWR->CR3, PWR_CR3_APC); -} - - - -/** - * @brief Enable SRAM2 content retention in Standby mode. - * @note When RRS bit is set, SRAM2 is powered by the low-power regulator in - * Standby mode and its content is kept. - * @retval None - */ -void HAL_PWREx_EnableSRAM2ContentRetention(void) -{ - SET_BIT(PWR->CR3, PWR_CR3_RRS); -} - - -/** - * @brief Disable SRAM2 content retention in Standby mode. - * @note When RRS bit is reset, SRAM2 is powered off in Standby mode - * and its content is lost. - * @retval None - */ -void HAL_PWREx_DisableSRAM2ContentRetention(void) -{ - CLEAR_BIT(PWR->CR3, PWR_CR3_RRS); -} - - -#if defined(PWR_CR1_RRSTP) -/** - * @brief Enable SRAM3 content retention in Stop 2 mode. - * @note When RRSTP bit is set, SRAM3 is powered by the low-power regulator in - * Stop 2 mode and its content is kept. - * @retval None - */ -void HAL_PWREx_EnableSRAM3ContentRetention(void) -{ - SET_BIT(PWR->CR1, PWR_CR1_RRSTP); -} - - -/** - * @brief Disable SRAM3 content retention in Stop 2 mode. - * @note When RRSTP bit is reset, SRAM3 is powered off in Stop 2 mode - * and its content is lost. - * @retval None - */ -void HAL_PWREx_DisableSRAM3ContentRetention(void) -{ - CLEAR_BIT(PWR->CR1, PWR_CR1_RRSTP); -} -#endif /* PWR_CR1_RRSTP */ - -#if defined(PWR_CR3_DSIPDEN) -/** - * @brief Enable pull-down activation on DSI pins. - * @retval None - */ -void HAL_PWREx_EnableDSIPinsPDActivation(void) -{ - SET_BIT(PWR->CR3, PWR_CR3_DSIPDEN); -} - - -/** - * @brief Disable pull-down activation on DSI pins. - * @retval None - */ -void HAL_PWREx_DisableDSIPinsPDActivation(void) -{ - CLEAR_BIT(PWR->CR3, PWR_CR3_DSIPDEN); -} -#endif /* PWR_CR3_DSIPDEN */ - -#if defined(PWR_CR2_PVME1) -/** - * @brief Enable the Power Voltage Monitoring 1: VDDUSB versus 1.2V. - * @retval None - */ -void HAL_PWREx_EnablePVM1(void) -{ - SET_BIT(PWR->CR2, PWR_PVM_1); -} - -/** - * @brief Disable the Power Voltage Monitoring 1: VDDUSB versus 1.2V. - * @retval None - */ -void HAL_PWREx_DisablePVM1(void) -{ - CLEAR_BIT(PWR->CR2, PWR_PVM_1); -} -#endif /* PWR_CR2_PVME1 */ - - -#if defined(PWR_CR2_PVME2) -/** - * @brief Enable the Power Voltage Monitoring 2: VDDIO2 versus 0.9V. - * @retval None - */ -void HAL_PWREx_EnablePVM2(void) -{ - SET_BIT(PWR->CR2, PWR_PVM_2); -} - -/** - * @brief Disable the Power Voltage Monitoring 2: VDDIO2 versus 0.9V. - * @retval None - */ -void HAL_PWREx_DisablePVM2(void) -{ - CLEAR_BIT(PWR->CR2, PWR_PVM_2); -} -#endif /* PWR_CR2_PVME2 */ - - -/** - * @brief Enable the Power Voltage Monitoring 3: VDDA versus 1.62V. - * @retval None - */ -void HAL_PWREx_EnablePVM3(void) -{ - SET_BIT(PWR->CR2, PWR_PVM_3); -} - -/** - * @brief Disable the Power Voltage Monitoring 3: VDDA versus 1.62V. - * @retval None - */ -void HAL_PWREx_DisablePVM3(void) -{ - CLEAR_BIT(PWR->CR2, PWR_PVM_3); -} - - -/** - * @brief Enable the Power Voltage Monitoring 4: VDDA versus 2.2V. - * @retval None - */ -void HAL_PWREx_EnablePVM4(void) -{ - SET_BIT(PWR->CR2, PWR_PVM_4); -} - -/** - * @brief Disable the Power Voltage Monitoring 4: VDDA versus 2.2V. - * @retval None - */ -void HAL_PWREx_DisablePVM4(void) -{ - CLEAR_BIT(PWR->CR2, PWR_PVM_4); -} - - - - -/** - * @brief Configure the Peripheral Voltage Monitoring (PVM). - * @param sConfigPVM: pointer to a PWR_PVMTypeDef structure that contains the - * PVM configuration information. - * @note The API configures a single PVM according to the information contained - * in the input structure. To configure several PVMs, the API must be singly - * called for each PVM used. - * @note Refer to the electrical characteristics of your device datasheet for - * more details about the voltage thresholds corresponding to each - * detection level and to each monitored supply. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM) -{ - /* Check the parameters */ - assert_param(IS_PWR_PVM_TYPE(sConfigPVM->PVMType)); - assert_param(IS_PWR_PVM_MODE(sConfigPVM->Mode)); - - - /* Configure EXTI 35 to 38 interrupts if so required: - scan thru PVMType to detect which PVMx is set and - configure the corresponding EXTI line accordingly. */ - switch (sConfigPVM->PVMType) - { -#if defined(PWR_CR2_PVME1) - case PWR_PVM_1: - /* Clear any previous config. Keep it clear if no event or IT mode is selected */ - __HAL_PWR_PVM1_EXTI_DISABLE_EVENT(); - __HAL_PWR_PVM1_EXTI_DISABLE_IT(); - __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE(); - __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE(); - - /* Configure interrupt mode */ - if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) - { - __HAL_PWR_PVM1_EXTI_ENABLE_IT(); - } - - /* Configure event mode */ - if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) - { - __HAL_PWR_PVM1_EXTI_ENABLE_EVENT(); - } - - /* Configure the edge */ - if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) - { - __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE(); - } - - if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) - { - __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE(); - } - break; -#endif /* PWR_CR2_PVME1 */ - -#if defined(PWR_CR2_PVME2) - case PWR_PVM_2: - /* Clear any previous config. Keep it clear if no event or IT mode is selected */ - __HAL_PWR_PVM2_EXTI_DISABLE_EVENT(); - __HAL_PWR_PVM2_EXTI_DISABLE_IT(); - __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE(); - __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE(); - - /* Configure interrupt mode */ - if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) - { - __HAL_PWR_PVM2_EXTI_ENABLE_IT(); - } - - /* Configure event mode */ - if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) - { - __HAL_PWR_PVM2_EXTI_ENABLE_EVENT(); - } - - /* Configure the edge */ - if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) - { - __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE(); - } - - if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) - { - __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE(); - } - break; -#endif /* PWR_CR2_PVME2 */ - - case PWR_PVM_3: - /* Clear any previous config. Keep it clear if no event or IT mode is selected */ - __HAL_PWR_PVM3_EXTI_DISABLE_EVENT(); - __HAL_PWR_PVM3_EXTI_DISABLE_IT(); - __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE(); - __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE(); - - /* Configure interrupt mode */ - if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) - { - __HAL_PWR_PVM3_EXTI_ENABLE_IT(); - } - - /* Configure event mode */ - if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) - { - __HAL_PWR_PVM3_EXTI_ENABLE_EVENT(); - } - - /* Configure the edge */ - if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) - { - __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE(); - } - - if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) - { - __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE(); - } - break; - - case PWR_PVM_4: - /* Clear any previous config. Keep it clear if no event or IT mode is selected */ - __HAL_PWR_PVM4_EXTI_DISABLE_EVENT(); - __HAL_PWR_PVM4_EXTI_DISABLE_IT(); - __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE(); - __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE(); - - /* Configure interrupt mode */ - if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT) - { - __HAL_PWR_PVM4_EXTI_ENABLE_IT(); - } - - /* Configure event mode */ - if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT) - { - __HAL_PWR_PVM4_EXTI_ENABLE_EVENT(); - } - - /* Configure the edge */ - if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE) - { - __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE(); - } - - if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE) - { - __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE(); - } - break; - - default: - return HAL_ERROR; - - } - - - return HAL_OK; -} - - - -/** - * @brief Enter Low-power Run mode - * @note In Low-power Run mode, all I/O pins keep the same state as in Run mode. - * @note When Regulator is set to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the - * Flash in power-down monde in setting the RUN_PD bit in FLASH_ACR register. - * Additionally, the clock frequency must be reduced below 2 MHz. - * Setting RUN_PD in FLASH_ACR then appropriately reducing the clock frequency must - * be done before calling HAL_PWREx_EnableLowPowerRunMode() API. - * @retval None - */ -void HAL_PWREx_EnableLowPowerRunMode(void) -{ - /* Set Regulator parameter */ - SET_BIT(PWR->CR1, PWR_CR1_LPR); -} - - -/** - * @brief Exit Low-power Run mode. - * @note Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that - * REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode - * returns HAL_TIMEOUT status). The system clock frequency can then be - * increased above 2 MHz. - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void) -{ - uint32_t wait_loop_index = 0; - - /* Clear LPR bit */ - CLEAR_BIT(PWR->CR1, PWR_CR1_LPR); - - /* Wait until REGLPF is reset */ - wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000)); - while ((wait_loop_index != 0) && (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))) - { - wait_loop_index--; - } - if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) - { - return HAL_TIMEOUT; - } - - return HAL_OK; -} - - -/** - * @brief Enter Stop 0 mode. - * @note In Stop 0 mode, main and low voltage regulators are ON. - * @note In Stop 0 mode, all I/O pins keep the same state as in Run mode. - * @note All clocks in the VCORE domain are stopped; the PLL, the MSI, - * the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability - * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI - * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated - * only to the peripheral requesting it. - * SRAM1, SRAM2 and register contents are preserved. - * The BOR is available. - * @note When exiting Stop 0 mode by issuing an interrupt or a wakeup event, - * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register - * is set; the MSI oscillator is selected if STOPWUCK is cleared. - * @note By keeping the internal regulator ON during Stop 0 mode, the consumption - * is higher although the startup time is reduced. - * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg @ref PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction - * @arg @ref PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction - * @retval None - */ -void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry) -{ - /* Check the parameters */ - assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); - - /* Stop 0 mode with Main Regulator */ - MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP0); - - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - - /* Select Stop mode entry --------------------------------------------------*/ - if(STOPEntry == PWR_STOPENTRY_WFI) - { - /* Request Wait For Interrupt */ - __WFI(); - } - else - { - /* Request Wait For Event */ - __SEV(); - __WFE(); - __WFE(); - } - - /* Reset SLEEPDEEP bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); -} - - -/** - * @brief Enter Stop 1 mode. - * @note In Stop 1 mode, only low power voltage regulator is ON. - * @note In Stop 1 mode, all I/O pins keep the same state as in Run mode. - * @note All clocks in the VCORE domain are stopped; the PLL, the MSI, - * the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability - * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI - * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated - * only to the peripheral requesting it. - * SRAM1, SRAM2 and register contents are preserved. - * The BOR is available. - * @note When exiting Stop 1 mode by issuing an interrupt or a wakeup event, - * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register - * is set; the MSI oscillator is selected if STOPWUCK is cleared. - * @note Due to low power mode, an additional startup delay is incurred when waking up from Stop 1 mode. - * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg @ref PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction - * @arg @ref PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction - * @retval None - */ -void HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry) -{ - /* Check the parameters */ - assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); - - /* Stop 1 mode with Low-Power Regulator */ - MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP1); - - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - - /* Select Stop mode entry --------------------------------------------------*/ - if(STOPEntry == PWR_STOPENTRY_WFI) - { - /* Request Wait For Interrupt */ - __WFI(); - } - else - { - /* Request Wait For Event */ - __SEV(); - __WFE(); - __WFE(); - } - - /* Reset SLEEPDEEP bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); -} - - -/** - * @brief Enter Stop 2 mode. - * @note In Stop 2 mode, only low power voltage regulator is ON. - * @note In Stop 2 mode, all I/O pins keep the same state as in Run mode. - * @note All clocks in the VCORE domain are stopped, the PLL, the MSI, - * the HSI and the HSE oscillators are disabled. Some peripherals with wakeup capability - * (LCD, LPTIM1, I2C3 and LPUART) can switch on the HSI to receive a frame, and switch off the HSI after - * receiving the frame if it is not a wakeup frame. In this case the HSI clock is propagated only - * to the peripheral requesting it. - * SRAM1, SRAM2 and register contents are preserved. - * The BOR is available. - * The voltage regulator is set in low-power mode but LPR bit must be cleared to enter stop 2 mode. - * Otherwise, Stop 1 mode is entered. - * @note When exiting Stop 2 mode by issuing an interrupt or a wakeup event, - * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register - * is set; the MSI oscillator is selected if STOPWUCK is cleared. - * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg @ref PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction - * @arg @ref PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction - * @retval None - */ -void HAL_PWREx_EnterSTOP2Mode(uint8_t STOPEntry) -{ - /* Check the parameter */ - assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); - - /* Set Stop mode 2 */ - MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP2); - - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - - /* Select Stop mode entry --------------------------------------------------*/ - if(STOPEntry == PWR_STOPENTRY_WFI) - { - /* Request Wait For Interrupt */ - __WFI(); - } - else - { - /* Request Wait For Event */ - __SEV(); - __WFE(); - __WFE(); - } - - /* Reset SLEEPDEEP bit of Cortex System Control Register */ - CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); -} - - - - - -/** - * @brief Enter Shutdown mode. - * @note In Shutdown mode, the PLL, the HSI, the MSI, the LSI and the HSE oscillators are switched - * off. The voltage regulator is disabled and Vcore domain is powered off. - * SRAM1, SRAM2 and registers contents are lost except for registers in the Backup domain. - * The BOR is not available. - * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog state. - * @retval None - */ -void HAL_PWREx_EnterSHUTDOWNMode(void) -{ - - /* Set Shutdown mode */ - MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_SHUTDOWN); - - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); - -/* This option is used to ensure that store operations are completed */ -#if defined ( __CC_ARM) - __force_stores(); -#endif - /* Request Wait For Interrupt */ - __WFI(); -} - - - - -/** - * @brief This function handles the PWR PVD/PVMx interrupt request. - * @note This API should be called under the PVD_PVM_IRQHandler(). - * @retval None - */ -void HAL_PWREx_PVD_PVM_IRQHandler(void) -{ - /* Check PWR exti flag */ - if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) - { - /* PWR PVD interrupt user callback */ - HAL_PWR_PVDCallback(); - - /* Clear PVD exti pending bit */ - __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); - } - /* Next, successively check PVMx exti flags */ -#if defined(PWR_CR2_PVME1) - if(__HAL_PWR_PVM1_EXTI_GET_FLAG() != RESET) - { - /* PWR PVM1 interrupt user callback */ - HAL_PWREx_PVM1Callback(); - - /* Clear PVM1 exti pending bit */ - __HAL_PWR_PVM1_EXTI_CLEAR_FLAG(); - } -#endif /* PWR_CR2_PVME1 */ -#if defined(PWR_CR2_PVME2) - if(__HAL_PWR_PVM2_EXTI_GET_FLAG() != RESET) - { - /* PWR PVM2 interrupt user callback */ - HAL_PWREx_PVM2Callback(); - - /* Clear PVM2 exti pending bit */ - __HAL_PWR_PVM2_EXTI_CLEAR_FLAG(); - } -#endif /* PWR_CR2_PVME2 */ - if(__HAL_PWR_PVM3_EXTI_GET_FLAG() != RESET) - { - /* PWR PVM3 interrupt user callback */ - HAL_PWREx_PVM3Callback(); - - /* Clear PVM3 exti pending bit */ - __HAL_PWR_PVM3_EXTI_CLEAR_FLAG(); - } - if(__HAL_PWR_PVM4_EXTI_GET_FLAG() != RESET) - { - /* PWR PVM4 interrupt user callback */ - HAL_PWREx_PVM4Callback(); - - /* Clear PVM4 exti pending bit */ - __HAL_PWR_PVM4_EXTI_CLEAR_FLAG(); - } -} - - -#if defined(PWR_CR2_PVME1) -/** - * @brief PWR PVM1 interrupt callback - * @retval None - */ -__weak void HAL_PWREx_PVM1Callback(void) -{ - /* NOTE : This function should not be modified; when the callback is needed, - HAL_PWREx_PVM1Callback() API can be implemented in the user file - */ -} -#endif /* PWR_CR2_PVME1 */ - -#if defined(PWR_CR2_PVME2) -/** - * @brief PWR PVM2 interrupt callback - * @retval None - */ -__weak void HAL_PWREx_PVM2Callback(void) -{ - /* NOTE : This function should not be modified; when the callback is needed, - HAL_PWREx_PVM2Callback() API can be implemented in the user file - */ -} -#endif /* PWR_CR2_PVME2 */ - -/** - * @brief PWR PVM3 interrupt callback - * @retval None - */ -__weak void HAL_PWREx_PVM3Callback(void) -{ - /* NOTE : This function should not be modified; when the callback is needed, - HAL_PWREx_PVM3Callback() API can be implemented in the user file - */ -} - -/** - * @brief PWR PVM4 interrupt callback - * @retval None - */ -__weak void HAL_PWREx_PVM4Callback(void) -{ - /* NOTE : This function should not be modified; when the callback is needed, - HAL_PWREx_PVM4Callback() API can be implemented in the user file - */ -} - - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_PWR_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c deleted file mode 100644 index 06a9b266..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c +++ /dev/null @@ -1,1730 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rcc.c - * @author MCD Application Team - * @brief RCC HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Reset and Clock Control (RCC) peripheral: - * + Initialization and de-initialization functions - * + Peripheral Control functions - * - @verbatim - ============================================================================== - ##### RCC specific features ##### - ============================================================================== - [..] - After reset the device is running from Multiple Speed Internal oscillator - (4 MHz) with Flash 0 wait state. Flash prefetch buffer, D-Cache - and I-Cache are disabled, and all peripherals are off except internal - SRAM, Flash and JTAG. - - (+) There is no prescaler on High speed (AHBs) and Low speed (APBs) busses: - all peripherals mapped on these busses are running at MSI speed. - (+) The clock for all peripherals is switched off, except the SRAM and FLASH. - (+) All GPIOs are in analog mode, except the JTAG pins which - are assigned to be used for debug purpose. - - [..] - Once the device started from reset, the user application has to: - (+) Configure the clock source to be used to drive the System clock - (if the application needs higher frequency/performance) - (+) Configure the System clock frequency and Flash settings - (+) Configure the AHB and APB busses prescalers - (+) Enable the clock for the peripheral(s) to be used - (+) Configure the clock source(s) for peripherals which clocks are not - derived from the System clock (SAIx, RTC, ADC, USB OTG FS/SDMMC1/RNG) - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RCC RCC - * @brief RCC HAL module driver - * @{ - */ - -#ifdef HAL_RCC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup RCC_Private_Constants RCC Private Constants - * @{ - */ -#define HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT -#define HSI_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define MSI_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define LSI_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define HSI48_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define PLL_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define CLOCKSWITCH_TIMEOUT_VALUE 5000U /* 5 s */ -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/** @defgroup RCC_Private_Macros RCC Private Macros - * @{ - */ -#define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() -#define MCO1_GPIO_PORT GPIOA -#define MCO1_PIN GPIO_PIN_8 - -#define RCC_PLL_OSCSOURCE_CONFIG(__HAL_RCC_PLLSOURCE__) \ - (MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__HAL_RCC_PLLSOURCE__))) -/** - * @} - */ - -/* Private variables ---------------------------------------------------------*/ - -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup RCC_Private_Functions RCC Private Functions - * @{ - */ -static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t msirange); -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -static uint32_t RCC_GetSysClockFreqFromPLLSource(void); -#endif -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup RCC_Exported_Functions RCC Exported Functions - * @{ - */ - -/** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * - @verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] - This section provides functions allowing to configure the internal and external oscillators - (HSE, HSI, LSE, MSI, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1 - and APB2). - - [..] Internal/external clock and PLL configuration - (+) HSI (high-speed internal): 16 MHz factory-trimmed RC used directly or through - the PLL as System clock source. - - (+) MSI (Mutiple Speed Internal): Its frequency is software trimmable from 100KHZ to 48MHZ. - It can be used to generate the clock for the USB OTG FS (48 MHz). - The number of flash wait states is automatically adjusted when MSI range is updated with - HAL_RCC_OscConfig() and the MSI is used as System clock source. - - (+) LSI (low-speed internal): 32 KHz low consumption RC used as IWDG and/or RTC - clock source. - - (+) HSE (high-speed external): 4 to 48 MHz crystal oscillator used directly or - through the PLL as System clock source. Can be used also optionally as RTC clock source. - - (+) LSE (low-speed external): 32.768 KHz oscillator used optionally as RTC clock source. - - (+) PLL (clocked by HSI, HSE or MSI) providing up to three independent output clocks: - (++) The first output is used to generate the high speed system clock (up to 80MHz). - (++) The second output is used to generate the clock for the USB OTG FS (48 MHz), - the random analog generator (<=48 MHz) and the SDMMC1 (<= 48 MHz). - (++) The third output is used to generate an accurate clock to achieve - high-quality audio performance on SAI interface. - - (+) PLLSAI1 (clocked by HSI, HSE or MSI) providing up to three independent output clocks: - (++) The first output is used to generate SAR ADC1 clock. - (++) The second output is used to generate the clock for the USB OTG FS (48 MHz), - the random analog generator (<=48 MHz) and the SDMMC1 (<= 48 MHz). - (++) The Third output is used to generate an accurate clock to achieve - high-quality audio performance on SAI interface. - - (+) PLLSAI2 (clocked by HSI , HSE or MSI) providing up to two independent output clocks: - (++) The first output is used to generate SAR ADC2 clock. - (++) The second output is used to generate an accurate clock to achieve - high-quality audio performance on SAI interface. - - (+) CSS (Clock security system): once enabled, if a HSE clock failure occurs - (HSE used directly or through PLL as System clock source), the System clock - is automatically switched to HSI and an interrupt is generated if enabled. - The interrupt is linked to the Cortex-M4 NMI (Non-Maskable Interrupt) - exception vector. - - (+) MCO (microcontroller clock output): used to output MSI, LSI, HSI, LSE, HSE or - main PLL clock (through a configurable prescaler) on PA8 pin. - - [..] System, AHB and APB busses clocks configuration - (+) Several clock sources can be used to drive the System clock (SYSCLK): MSI, HSI, - HSE and main PLL. - The AHB clock (HCLK) is derived from System clock through configurable - prescaler and used to clock the CPU, memory and peripherals mapped - on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived - from AHB clock through configurable prescalers and used to clock - the peripherals mapped on these busses. You can use - "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. - - -@- All the peripheral clocks are derived from the System clock (SYSCLK) except: - - (+@) SAI: the SAI clock can be derived either from a specific PLL (PLLSAI1) or (PLLSAI2) or - from an external clock mapped on the SAI_CKIN pin. - You have to use HAL_RCCEx_PeriphCLKConfig() function to configure this clock. - (+@) RTC: the RTC clock can be derived either from the LSI, LSE or HSE clock - divided by 2 to 31. - You have to use __HAL_RCC_RTC_ENABLE() and HAL_RCCEx_PeriphCLKConfig() function - to configure this clock. - (+@) USB OTG FS, SDMMC1 and RNG: USB OTG FS requires a frequency equal to 48 MHz - to work correctly, while the SDMMC1 and RNG peripherals require a frequency - equal or lower than to 48 MHz. This clock is derived of the main PLL or PLLSAI1 - through PLLQ divider. You have to enable the peripheral clock and use - HAL_RCCEx_PeriphCLKConfig() function to configure this clock. - (+@) IWDG clock which is always the LSI clock. - - - (+) The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 80 MHz. - The clock source frequency should be adapted depending on the device voltage range - as listed in the Reference Manual "Clock source frequency versus voltage scaling" chapter. - - @endverbatim - - Table 1. HCLK clock frequency for STM32L4Rx/STM32L4Sx devices - +--------------------------------------------------------+ - | Latency | HCLK clock frequency (MHz) | - | |--------------------------------------| - | | voltage range 1 | voltage range 2 | - | | 1.2 V | 1.0 V | - |-----------------|-------------------|------------------| - |0WS(1 CPU cycles)| 0 < HCLK <= 20 | 0 < HCLK <= 8 | - |-----------------|-------------------|------------------| - |1WS(2 CPU cycles)| 20 < HCLK <= 40 | 8 < HCLK <= 16 | - |-----------------|-------------------|------------------| - |2WS(3 CPU cycles)| 40 < HCLK <= 60 | 16 < HCLK <= 26 | - |-----------------|-------------------|------------------| - |3WS(4 CPU cycles)| 60 < HCLK <= 80 | 16 < HCLK <= 26 | - |-----------------|-------------------|------------------| - |4WS(5 CPU cycles)| 80 < HCLK <= 100 | 16 < HCLK <= 26 | - |-----------------|-------------------|------------------| - |5WS(6 CPU cycles)| 100 < HCLK <= 120 | 16 < HCLK <= 26 | - +--------------------------------------------------------+ - - Table 2. HCLK clock frequency for other STM32L4 devices - +-------------------------------------------------------+ - | Latency | HCLK clock frequency (MHz) | - | |-------------------------------------| - | | voltage range 1 | voltage range 2 | - | | 1.2 V | 1.0 V | - |-----------------|------------------|------------------| - |0WS(1 CPU cycles)| 0 < HCLK <= 16 | 0 < HCLK <= 6 | - |-----------------|------------------|------------------| - |1WS(2 CPU cycles)| 16 < HCLK <= 32 | 6 < HCLK <= 12 | - |-----------------|------------------|------------------| - |2WS(3 CPU cycles)| 32 < HCLK <= 48 | 12 < HCLK <= 18 | - |-----------------|------------------|------------------| - |3WS(4 CPU cycles)| 48 < HCLK <= 64 | 18 < HCLK <= 26 | - |-----------------|------------------|------------------| - |4WS(5 CPU cycles)| 64 < HCLK <= 80 | 18 < HCLK <= 26 | - +-------------------------------------------------------+ - * @{ - */ - -/** - * @brief Reset the RCC clock configuration to the default reset state. - * @note The default reset state of the clock configuration is given below: - * - MSI ON and used as system clock source - * - HSE, HSI, PLL, PLLSAI1 and PLLISAI2 OFF - * - AHB, APB1 and APB2 prescaler set to 1. - * - CSS, MCO1 OFF - * - All interrupts disabled - * - All interrupt and reset flags cleared - * @note This function doesn't modify the configuration of the - * - Peripheral clocks - * - LSI, LSE and RTC clocks - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCC_DeInit(void) -{ - uint32_t tickstart = 0; - - /* Set MSION bit */ - SET_BIT(RCC->CR, RCC_CR_MSION); - - /* Insure MSIRDY bit is set before writing default MSIRANGE value */ - /* Get start tick */ - tickstart = HAL_GetTick(); - - /* Wait till MSI is ready */ - while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RESET) - { - if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - /* Set MSIRANGE default value */ - MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, RCC_MSIRANGE_6); - - /* Reset CFGR register (MSI is selected as system clock source) */ - CLEAR_REG(RCC->CFGR); - - /* Update the SystemCoreClock global variable for MSI as system clock source */ - SystemCoreClock = MSI_VALUE; - - /* Configure the source of time base considering new system clock settings */ - if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - { - return HAL_ERROR; - } - - /* Insure MSI selected as system clock source */ - /* Get start tick */ - tickstart = HAL_GetTick(); - - /* Wait till system clock source is ready */ - while(READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_MSI) - { - if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - /* Reset HSION, HSIKERON, HSIASFS, HSEON, HSECSSON, PLLON, PLLSAIxON bits */ -#if defined(RCC_PLLSAI2_SUPPORT) - - CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | RCC_CR_PLLSAI1ON | RCC_CR_PLLSAI2ON); - -#else - - CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | RCC_CR_PLLSAI1ON); - -#endif /* RCC_PLLSAI2_SUPPORT */ - - /* Insure PLLRDY, PLLSAI1RDY and PLLSAI2RDY (if present) are reset */ - /* Get start tick */ - tickstart = HAL_GetTick(); - -#if defined(RCC_PLLSAI2_SUPPORT) - - while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY | RCC_CR_PLLSAI2RDY) != 0U) - -#else - - while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY) != 0U) - -#endif - { - if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - /* Reset PLLCFGR register */ - CLEAR_REG(RCC->PLLCFGR); - SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN_4 ); - - /* Reset PLLSAI1CFGR register */ - CLEAR_REG(RCC->PLLSAI1CFGR); - SET_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N_4 ); - -#if defined(RCC_PLLSAI2_SUPPORT) - - /* Reset PLLSAI2CFGR register */ - CLEAR_REG(RCC->PLLSAI2CFGR); - SET_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N_4 ); - -#endif /* RCC_PLLSAI2_SUPPORT */ - - /* Reset HSEBYP bit */ - CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); - - /* Disable all interrupts */ - CLEAR_REG(RCC->CIER); - - /* Clear all interrupt flags */ - WRITE_REG(RCC->CICR, 0xFFFFFFFFU); - - /* Clear all reset flags */ - SET_BIT(RCC->CSR, RCC_CSR_RMVF); - - return HAL_OK; -} - -/** - * @brief Initialize the RCC Oscillators according to the specified parameters in the - * RCC_OscInitTypeDef. - * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that - * contains the configuration information for the RCC Oscillators. - * @note The PLL is not disabled when used as system clock. - * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not - * supported by this macro. User should request a transition to LSE Off - * first and then LSE On or LSE Bypass. - * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not - * supported by this macro. User should request a transition to HSE Off - * first and then HSE On or HSE Bypass. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(RCC_OscInitStruct != NULL); - assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); - - /*----------------------------- MSI Configuration --------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) - { - /* Check the parameters */ - assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState)); - assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue)); - assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); - - /* When the MSI is used as system clock it will not be disabled */ - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) ) - { - if((READ_BIT(RCC->CR, RCC_CR_MSIRDY) != RESET) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF)) - { - return HAL_ERROR; - } - - /* Otherwise, just the calibration and MSI range change are allowed */ - else - { - /* To correctly read data from FLASH memory, the number of wait states (LATENCY) - must be correctly programmed according to the frequency of the CPU clock - (HCLK) and the supply voltage of the device. */ - if(RCC_OscInitStruct->MSIClockRange > __HAL_RCC_GET_MSI_RANGE()) - { - /* First increase number of wait states update if necessary */ - if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) - { - return HAL_ERROR; - } - - /* Selects the Multiple Speed oscillator (MSI) clock range .*/ - __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ - __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - } - else - { - /* Else, keep current flash latency while decreasing applies */ - /* Selects the Multiple Speed oscillator (MSI) clock range .*/ - __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ - __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - - /* Decrease number of wait states update if necessary */ - if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) - { - return HAL_ERROR; - } - } - - /* Update the SystemCoreClock global variable */ - SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - - /* Configure the source of time base considering new system clocks settings*/ - HAL_InitTick (TICK_INT_PRIORITY); - } - } - else - { - /* Check the MSI State */ - if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF) - { - /* Enable the Internal High Speed oscillator (MSI). */ - __HAL_RCC_MSI_ENABLE(); - - /* Get timeout */ - tickstart = HAL_GetTick(); - - /* Wait till MSI is ready */ - while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RESET) - { - if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - /* Selects the Multiple Speed oscillator (MSI) clock range .*/ - __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ - __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - - } - else - { - /* Disable the Internal High Speed oscillator (MSI). */ - __HAL_RCC_MSI_DISABLE(); - - /* Get timeout */ - tickstart = HAL_GetTick(); - - /* Wait till MSI is ready */ - while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) != RESET) - { - if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - } - /*------------------------------- HSE Configuration ------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - { - /* Check the parameters */ - assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); - - /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || - ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - { - if((READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - { - return HAL_ERROR; - } - } - else - { - /* Set the new HSE configuration ---------------------------------------*/ - __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - - /* Check the HSE State */ - if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSE is ready */ - while(READ_BIT(RCC->CR, RCC_CR_HSERDY) == RESET) - { - if((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSE is disabled */ - while(READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET) - { - if((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - } - /*----------------------------- HSI Configuration --------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - { - /* Check the parameters */ - assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); - assert_param(IS_RCC_HSI_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); - - /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || - ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI))) - { - /* When HSI is used as system clock it will not be disabled */ - if((READ_BIT(RCC->CR, RCC_CR_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - { - return HAL_ERROR; - } - /* Otherwise, just the calibration is allowed */ - else - { - /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - } - } - else - { - /* Check the HSI State */ - if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - { - /* Enable the Internal High Speed oscillator (HSI). */ - __HAL_RCC_HSI_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSI is ready */ - while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) - { - if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ - __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - } - else - { - /* Disable the Internal High Speed oscillator (HSI). */ - __HAL_RCC_HSI_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSI is disabled */ - while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) != RESET) - { - if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - } - /*------------------------------ LSI Configuration -------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - { - /* Check the parameters */ - assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); - - /* Check the LSI State */ - if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - { - /* Enable the Internal Low Speed oscillator (LSI). */ - __HAL_RCC_LSI_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till LSI is ready */ - while(READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == RESET) - { - if((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - /* Disable the Internal Low Speed oscillator (LSI). */ - __HAL_RCC_LSI_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till LSI is disabled */ - while(READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) != RESET) - { - if((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - /*------------------------------ LSE Configuration -------------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - { - FlagStatus pwrclkchanged = RESET; - - /* Check the parameters */ - assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); - - /* Update LSE configuration in Backup Domain control register */ - /* Requires to enable write access to Backup Domain of necessary */ - if(HAL_IS_BIT_CLR(RCC->APB1ENR1, RCC_APB1ENR1_PWREN)) - { - __HAL_RCC_PWR_CLK_ENABLE(); - pwrclkchanged = SET; - } - - if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - { - /* Enable write access to Backup domain */ - SET_BIT(PWR->CR1, PWR_CR1_DBP); - - /* Wait for Backup domain Write protection disable */ - tickstart = HAL_GetTick(); - - while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - { - if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - - /* Set the new LSE configuration -----------------------------------------*/ - __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - - /* Check the LSE State */ - if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till LSE is ready */ - while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RESET) - { - if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till LSE is disabled */ - while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != RESET) - { - if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - - /* Restore clock configuration if changed */ - if(pwrclkchanged == SET) - { - __HAL_RCC_PWR_CLK_DISABLE(); - } - } -#if defined(RCC_HSI48_SUPPORT) - /*------------------------------ HSI48 Configuration -----------------------*/ - if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) - { - /* Check the parameters */ - assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); - - /* Check the LSI State */ - if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF) - { - /* Enable the Internal Low Speed oscillator (HSI48). */ - __HAL_RCC_HSI48_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSI48 is ready */ - while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == RESET) - { - if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - /* Disable the Internal Low Speed oscillator (HSI48). */ - __HAL_RCC_HSI48_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till HSI48 is disabled */ - while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } -#endif /* RCC_HSI48_SUPPORT */ - /*-------------------------------- PLL Configuration -----------------------*/ - /* Check the parameters */ - assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); - - if(RCC_OscInitStruct->PLL.PLLState != RCC_PLL_NONE) - { - /* Check if the PLL is used as system clock or not */ - if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) - { - if(RCC_OscInitStruct->PLL.PLLState == RCC_PLL_ON) - { - /* Check the parameters */ - assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); - assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM)); - assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); - assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); - assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); - assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); - - /* Disable the main PLL. */ - __HAL_RCC_PLL_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLL is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - /* Configure the main PLL clock source, multiplication and division factors. */ - __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - RCC_OscInitStruct->PLL.PLLM, - RCC_OscInitStruct->PLL.PLLN, - RCC_OscInitStruct->PLL.PLLP, - RCC_OscInitStruct->PLL.PLLQ, - RCC_OscInitStruct->PLL.PLLR); - - /* Enable the main PLL. */ - __HAL_RCC_PLL_ENABLE(); - - /* Enable PLL System Clock output. */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SYSCLK); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLL is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RESET) - { - if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - /* Disable the main PLL. */ - __HAL_RCC_PLL_DISABLE(); - - /* Disable all PLL outputs to save power if no PLLs on */ - if((READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == RESET) -#if defined(RCC_PLLSAI2_SUPPORT) - && - (READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == RESET) -#endif /* RCC_PLLSAI2_SUPPORT */ - ) - { - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); - } - -#if defined(RCC_PLLSAI2_SUPPORT) - __HAL_RCC_PLLCLKOUT_DISABLE(RCC_PLL_SYSCLK | RCC_PLL_48M1CLK | RCC_PLL_SAI3CLK); -#else - __HAL_RCC_PLLCLKOUT_DISABLE(RCC_PLL_SYSCLK | RCC_PLL_48M1CLK | RCC_PLL_SAI2CLK); -#endif /* RCC_PLLSAI2_SUPPORT */ - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLL is disabled */ - while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - else - { - return HAL_ERROR; - } - } - return HAL_OK; -} - -/** - * @brief Initialize the CPU, AHB and APB busses clocks according to the specified - * parameters in the RCC_ClkInitStruct. - * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that - * contains the configuration information for the RCC peripheral. - * @param FLatency FLASH Latency - * This parameter can be one of the following values: - * @arg FLASH_LATENCY_0 FLASH 0 Latency cycle - * @arg FLASH_LATENCY_1 FLASH 1 Latency cycle - * @arg FLASH_LATENCY_2 FLASH 2 Latency cycles - * @arg FLASH_LATENCY_3 FLASH 3 Latency cycles - * @arg FLASH_LATENCY_4 FLASH 4 Latency cycles - @if STM32L4S9xx - * @arg FLASH_LATENCY_5 FLASH 5 Latency cycles - * @arg FLASH_LATENCY_6 FLASH 6 Latency cycles - * @arg FLASH_LATENCY_7 FLASH 7 Latency cycles - * @arg FLASH_LATENCY_8 FLASH 8 Latency cycles - * @arg FLASH_LATENCY_9 FLASH 9 Latency cycles - * @arg FLASH_LATENCY_10 FLASH 10 Latency cycles - * @arg FLASH_LATENCY_11 FLASH 11 Latency cycles - * @arg FLASH_LATENCY_12 FLASH 12 Latency cycles - * @arg FLASH_LATENCY_13 FLASH 13 Latency cycles - * @arg FLASH_LATENCY_14 FLASH 14 Latency cycles - * @arg FLASH_LATENCY_15 FLASH 15 Latency cycles - @endif - * - * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency - * and updated by HAL_RCC_GetHCLKFreq() function called within this function - * - * @note The MSI is used by default as system clock source after - * startup from Reset, wake-up from STANDBY mode. After restart from Reset, - * the MSI frequency is set to its default value 4 MHz. - * - * @note The HSI can be selected as system clock source after - * from STOP modes or in case of failure of the HSE used directly or indirectly - * as system clock (if the Clock Security System CSS is enabled). - * - * @note A switch from one clock source to another occurs only if the target - * clock source is ready (clock stable after startup delay or PLL locked). - * If a clock source which is not yet ready is selected, the switch will - * occur when the clock source is ready. - * - * @note You can use HAL_RCC_GetClockConfig() function to know which clock is - * currently used as system clock source. - * - * @note Depending on the device voltage range, the software has to set correctly - * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency - * (for more details refer to section above "Initialization/de-initialization functions") - * @retval None - */ -HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) -{ - uint32_t tickstart = 0; -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - uint32_t pllfreq = 0; - uint32_t hpre = RCC_SYSCLK_DIV1; -#endif - - /* Check the parameters */ - assert_param(RCC_ClkInitStruct != NULL); - assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); - assert_param(IS_FLASH_LATENCY(FLatency)); - - /* To correctly read data from FLASH memory, the number of wait states (LATENCY) - must be correctly programmed according to the frequency of the CPU clock - (HCLK) and the supply voltage of the device. */ - - /* Increasing the number of wait states because of higher CPU frequency */ - if(FLatency > READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)) - { - /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ - __HAL_FLASH_SET_LATENCY(FLatency); - - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) != FLatency) - { - return HAL_ERROR; - } - } - - /*------------------------- SYSCLK Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - { - assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); - - /* PLL is selected as System Clock Source */ - if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - { - /* Check the PLL ready flag */ - if(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RESET) - { - return HAL_ERROR; - } -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - /* Undershoot management when selection PLL as SYSCLK source and frequency above 80Mhz */ - /* Compute target PLL output frequency */ - pllfreq = RCC_GetSysClockFreqFromPLLSource(); - - /* Intermediate step with HCLK prescaler 2 necessary before to go over 80Mhz */ - if((pllfreq > 80000000U) && - (((((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) && (RCC_ClkInitStruct->AHBCLKDivider == RCC_SYSCLK_DIV1)) - || - ((READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1)))) - { - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); - hpre = RCC_SYSCLK_DIV2; - } -#endif - } - else - { - /* HSE is selected as System Clock Source */ - if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - { - /* Check the HSE ready flag */ - if(READ_BIT(RCC->CR, RCC_CR_HSERDY) == RESET) - { - return HAL_ERROR; - } - } - /* MSI is selected as System Clock Source */ - else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI) - { - /* Check the MSI ready flag */ - if(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RESET) - { - return HAL_ERROR; - } - } - /* HSI is selected as System Clock Source */ - else - { - /* Check the HSI ready flag */ - if(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) - { - return HAL_ERROR; - } - } -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - /* Overshoot management when going down from PLL as SYSCLK source and frequency above 80Mhz */ - pllfreq = HAL_RCC_GetSysClockFreq(); - - /* Intermediate step with HCLK prescaler 2 necessary before to go under 80Mhz */ - if(pllfreq > 80000000U) - { - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); - hpre = RCC_SYSCLK_DIV2; - } -#endif - - } - - MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - { - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) - { - if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - { - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSE) - { - if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI) - { - while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_MSI) - { - if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - else - { - while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI) - { - if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - } - } - - /*-------------------------- HCLK Configuration --------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - { - assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - } -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - else - { - /* Is intermediate HCLK prescaler 2 applied internally, complete with HCLK prescaler 1 */ - if(hpre == RCC_SYSCLK_DIV2) - { - MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV1); - } - } -#endif - - /* Decreasing the number of wait states because of lower CPU frequency */ - if(FLatency < READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)) - { - /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ - __HAL_FLASH_SET_LATENCY(FLatency); - - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) != FLatency) - { - return HAL_ERROR; - } - } - - /*-------------------------- PCLK1 Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - { - assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - } - - /*-------------------------- PCLK2 Configuration ---------------------------*/ - if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - { - assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); - MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); - } - - /* Update the SystemCoreClock global variable */ - SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - - /* Configure the source of time base considering new system clocks settings*/ - HAL_InitTick (TICK_INT_PRIORITY); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions - * @brief RCC clocks control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to: - - (+) Ouput clock to MCO pin. - (+) Retrieve current clock frequencies. - (+) Enable the Clock Security System. - -@endverbatim - * @{ - */ - -/** - * @brief Select the clock source to output on MCO pin(PA8). - * @note PA8 should be configured in alternate function mode. - * @param RCC_MCOx specifies the output direction for the clock source. - * For STM32L4xx family this parameter can have only one value: - * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). - * @param RCC_MCOSource specifies the clock source to output. - * This parameter can be one of the following values: - * @arg @ref RCC_MCO1SOURCE_NOCLOCK MCO output disabled, no clock on MCO - * @arg @ref RCC_MCO1SOURCE_SYSCLK system clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_MSI MSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_HSI HSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO sourcee - * @arg @ref RCC_MCO1SOURCE_PLLCLK main PLL clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_LSI LSI clock selected as MCO source - * @arg @ref RCC_MCO1SOURCE_LSE LSE clock selected as MCO source - @if STM32L443xx - * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 clock selected as MCO source for devices with HSI48 - @endif - * @param RCC_MCODiv specifies the MCO prescaler. - * This parameter can be one of the following values: - * @arg @ref RCC_MCODIV_1 no division applied to MCO clock - * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock - * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock - * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock - * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock - * @retval None - */ -void HAL_RCC_MCOConfig( uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) -{ - GPIO_InitTypeDef GPIO_InitStruct; - /* Check the parameters */ - assert_param(IS_RCC_MCO(RCC_MCOx)); - assert_param(IS_RCC_MCODIV(RCC_MCODiv)); - assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); - - /* MCO Clock Enable */ - __MCO1_CLK_ENABLE(); - - /* Configue the MCO1 pin in alternate function mode */ - GPIO_InitStruct.Pin = MCO1_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF0_MCO; - HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct); - - /* Mask MCOSEL[] and MCOPRE[] bits then set MCO1 clock source and prescaler */ - MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), (RCC_MCOSource | RCC_MCODiv )); -} - -/** - * @brief Return the SYSCLK frequency. - * - * @note The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * @note If SYSCLK source is MSI, function returns values based on MSI - * Value as defined by the MSI range. - * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) - * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**) - * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**), - * HSI_VALUE(*) or MSI Value multiplied/divided by the PLL factors. - * @note (*) HSI_VALUE is a constant defined in stm32l4xx_hal_conf.h file (default value - * 16 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * @note (**) HSE_VALUE is a constant defined in stm32l4xx_hal_conf.h file (default value - * 8 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * @note The result of this function could be not correct when using fractional - * value for HSE crystal. - * - * @note This function can be used by the user application to compute the - * baudrate for the communication peripherals or configure other parameters. - * - * @note Each time SYSCLK changes, this function must be called to update the - * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. - * - * - * @retval SYSCLK frequency - */ -uint32_t HAL_RCC_GetSysClockFreq(void) -{ - uint32_t msirange = 0U, pllvco = 0U, pllsource = 0U, pllr = 2U, pllm = 2U; - uint32_t sysclockfreq = 0U; - - if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) || - ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_MSI))) - { - /* MSI or PLL with MSI source used as system clock source */ - - /* Get SYSCLK source */ - if(READ_BIT(RCC->CR, RCC_CR_MSIRGSEL) == RESET) - { /* MSISRANGE from RCC_CSR applies */ - msirange = READ_BIT(RCC->CSR, RCC_CSR_MSISRANGE) >> RCC_CSR_MSISRANGE_Pos; - } - else - { /* MSIRANGE from RCC_CR applies */ - msirange = READ_BIT(RCC->CR, RCC_CR_MSIRANGE) >> RCC_CR_MSIRANGE_Pos; - } - /*MSI frequency range in HZ*/ - msirange = MSIRangeTable[msirange]; - - if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) - { - /* MSI used as system clock source */ - sysclockfreq = msirange; - } - } - else if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) - { - /* HSI used as system clock source */ - sysclockfreq = HSI_VALUE; - } - else if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) - { - /* HSE used as system clock source */ - sysclockfreq = HSE_VALUE; - } - - if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) - { - /* PLL used as system clock source */ - - /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); - pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; - - switch (pllsource) - { - case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ - pllvco = (HSI_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - - case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ - pllvco = (HSE_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - - case RCC_PLLSOURCE_MSI: /* MSI used as PLL clock source */ - default: - pllvco = (msirange / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - } - pllr = ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U ) * 2U; - sysclockfreq = pllvco/pllr; - } - - return sysclockfreq; -} - -/** - * @brief Return the HCLK frequency. - * @note Each time HCLK changes, this function must be called to update the - * right HCLK value. Otherwise, any configuration based on this function will be incorrect. - * - * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency. - * @retval HCLK frequency in Hz - */ -uint32_t HAL_RCC_GetHCLKFreq(void) -{ - return SystemCoreClock; -} - -/** - * @brief Return the PCLK1 frequency. - * @note Each time PCLK1 changes, this function must be called to update the - * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK1 frequency in Hz - */ -uint32_t HAL_RCC_GetPCLK1Freq(void) -{ - /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ - return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); -} - -/** - * @brief Return the PCLK2 frequency. - * @note Each time PCLK2 changes, this function must be called to update the - * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. - * @retval PCLK2 frequency in Hz - */ -uint32_t HAL_RCC_GetPCLK2Freq(void) -{ - /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ - return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); -} - -/** - * @brief Configure the RCC_OscInitStruct according to the internal - * RCC configuration registers. - * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that - * will be configured. - * @retval None - */ -void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) -{ - /* Check the parameters */ - assert_param(RCC_OscInitStruct != NULL); - - /* Set all possible values for the Oscillator type parameter ---------------*/ -#if defined(RCC_HSI48_SUPPORT) - RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_MSI | \ - RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSI48; -#else - RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_MSI | \ - RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI; -#endif /* RCC_HSI48_SUPPORT */ - - /* Get the HSE configuration -----------------------------------------------*/ - if(READ_BIT(RCC->CR, RCC_CR_HSEBYP) == RCC_CR_HSEBYP) - { - RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; - } - else if(READ_BIT(RCC->CR, RCC_CR_HSEON) == RCC_CR_HSEON) - { - RCC_OscInitStruct->HSEState = RCC_HSE_ON; - } - else - { - RCC_OscInitStruct->HSEState = RCC_HSE_OFF; - } - - /* Get the MSI configuration -----------------------------------------------*/ - if(READ_BIT(RCC->CR, RCC_CR_MSION) == RCC_CR_MSION) - { - RCC_OscInitStruct->MSIState = RCC_MSI_ON; - } - else - { - RCC_OscInitStruct->MSIState = RCC_MSI_OFF; - } - - RCC_OscInitStruct->MSICalibrationValue = READ_BIT(RCC->ICSCR, RCC_ICSCR_MSITRIM) >> RCC_ICSCR_MSITRIM_Pos; - RCC_OscInitStruct->MSIClockRange = READ_BIT(RCC->CR, RCC_CR_MSIRANGE); - - /* Get the HSI configuration -----------------------------------------------*/ - if(READ_BIT(RCC->CR, RCC_CR_HSION) == RCC_CR_HSION) - { - RCC_OscInitStruct->HSIState = RCC_HSI_ON; - } - else - { - RCC_OscInitStruct->HSIState = RCC_HSI_OFF; - } - - RCC_OscInitStruct->HSICalibrationValue = READ_BIT(RCC->ICSCR, RCC_ICSCR_HSITRIM) >> RCC_ICSCR_HSITRIM_Pos; - - /* Get the LSE configuration -----------------------------------------------*/ - if(READ_BIT(RCC->BDCR, RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) - { - RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; - } - else if(READ_BIT(RCC->BDCR, RCC_BDCR_LSEON) == RCC_BDCR_LSEON) - { - RCC_OscInitStruct->LSEState = RCC_LSE_ON; - } - else - { - RCC_OscInitStruct->LSEState = RCC_LSE_OFF; - } - - /* Get the LSI configuration -----------------------------------------------*/ - if(READ_BIT(RCC->CSR, RCC_CSR_LSION) == RCC_CSR_LSION) - { - RCC_OscInitStruct->LSIState = RCC_LSI_ON; - } - else - { - RCC_OscInitStruct->LSIState = RCC_LSI_OFF; - } - -#if defined(RCC_HSI48_SUPPORT) - /* Get the HSI48 configuration ---------------------------------------------*/ - if(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) == RCC_CRRCR_HSI48ON) - { - RCC_OscInitStruct->HSI48State = RCC_HSI48_ON; - } - else - { - RCC_OscInitStruct->HSI48State = RCC_HSI48_OFF; - } -#else - RCC_OscInitStruct->HSI48State = RCC_HSI48_OFF; -#endif /* RCC_HSI48_SUPPORT */ - - /* Get the PLL configuration -----------------------------------------------*/ - if(READ_BIT(RCC->CR, RCC_CR_PLLON) == RCC_CR_PLLON) - { - RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; - } - else - { - RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; - } - RCC_OscInitStruct->PLL.PLLSource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); - RCC_OscInitStruct->PLL.PLLM = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U; - RCC_OscInitStruct->PLL.PLLN = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; - RCC_OscInitStruct->PLL.PLLQ = (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos) + 1U) << 1U); - RCC_OscInitStruct->PLL.PLLR = (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U) << 1U); -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) - RCC_OscInitStruct->PLL.PLLP = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; -#else - if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) - { - RCC_OscInitStruct->PLL.PLLP = RCC_PLLP_DIV17; - } - else - { - RCC_OscInitStruct->PLL.PLLP = RCC_PLLP_DIV7; - } -#endif /* RCC_PLLP_DIV_2_31_SUPPORT */ -} - -/** - * @brief Configure the RCC_ClkInitStruct according to the internal - * RCC configuration registers. - * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that - * will be configured. - * @param pFLatency Pointer on the Flash Latency. - * @retval None - */ -void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) -{ - /* Check the parameters */ - assert_param(RCC_ClkInitStruct != NULL); - assert_param(pFLatency != NULL); - - /* Set all possible values for the Clock type parameter --------------------*/ - RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - - /* Get the SYSCLK configuration --------------------------------------------*/ - RCC_ClkInitStruct->SYSCLKSource = READ_BIT(RCC->CFGR, RCC_CFGR_SW); - - /* Get the HCLK configuration ----------------------------------------------*/ - RCC_ClkInitStruct->AHBCLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_HPRE); - - /* Get the APB1 configuration ----------------------------------------------*/ - RCC_ClkInitStruct->APB1CLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1); - - /* Get the APB2 configuration ----------------------------------------------*/ - RCC_ClkInitStruct->APB2CLKDivider = (READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2) >> 3U); - - /* Get the Flash Wait State (Latency) configuration ------------------------*/ - *pFLatency = READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY); -} - -/** - * @brief Enable the Clock Security System. - * @note If a failure is detected on the HSE oscillator clock, this oscillator - * is automatically disabled and an interrupt is generated to inform the - * software about the failure (Clock Security System Interrupt, CSSI), - * allowing the MCU to perform rescue operations. The CSSI is linked to - * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. - * @note The Clock Security System can only be cleared by reset. - * @retval None - */ -void HAL_RCC_EnableCSS(void) -{ - SET_BIT(RCC->CR, RCC_CR_CSSON) ; -} - -/** - * @brief Handle the RCC Clock Security System interrupt request. - * @note This API should be called under the NMI_Handler(). - * @retval None - */ -void HAL_RCC_NMI_IRQHandler(void) -{ - /* Check RCC CSSF interrupt flag */ - if(__HAL_RCC_GET_IT(RCC_IT_CSS)) - { - /* RCC Clock Security System interrupt user callback */ - HAL_RCC_CSSCallback(); - - /* Clear RCC CSS pending bit */ - __HAL_RCC_CLEAR_IT(RCC_IT_CSS); - } -} - -/** - * @brief RCC Clock Security System interrupt callback. - * @retval none - */ -__weak void HAL_RCC_CSSCallback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RCC_CSSCallback should be implemented in the user file - */ -} - -/** - * @} - */ - -/** - * @} - */ - -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup RCC_Private_Functions - * @{ - */ -/** - * @brief Update number of Flash wait states in line with MSI range and current - voltage range. - * @param msirange MSI range value from RCC_MSIRANGE_0 to RCC_MSIRANGE_11 - * @retval HAL status - */ -static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t msirange) -{ - uint32_t vos = 0; - uint32_t latency = FLASH_LATENCY_0; /* default value 0WS */ - - if(__HAL_RCC_PWR_IS_CLK_ENABLED()) - { - vos = HAL_PWREx_GetVoltageRange(); - } - else - { - __HAL_RCC_PWR_CLK_ENABLE(); - vos = HAL_PWREx_GetVoltageRange(); - __HAL_RCC_PWR_CLK_DISABLE(); - } - - if(vos == PWR_REGULATOR_VOLTAGE_SCALE1) - { - if(msirange > RCC_MSIRANGE_8) - { - /* MSI > 16Mhz */ - if(msirange > RCC_MSIRANGE_10) - { - /* MSI 48Mhz */ - latency = FLASH_LATENCY_2; /* 2WS */ - } - else - { - /* MSI 24Mhz or 32Mhz */ - latency = FLASH_LATENCY_1; /* 1WS */ - } - } - /* else MSI <= 16Mhz default FLASH_LATENCY_0 0WS */ - } - else - { -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - if(msirange >= RCC_MSIRANGE_8) - { - /* MSI >= 16Mhz */ - latency = FLASH_LATENCY_2; /* 2WS */ - } - else - { - if(msirange == RCC_MSIRANGE_7) - { - /* MSI 8Mhz */ - latency = FLASH_LATENCY_1; /* 1WS */ - } - /* else MSI < 8Mhz default FLASH_LATENCY_0 0WS */ - } -#else - if(msirange > RCC_MSIRANGE_8) - { - /* MSI > 16Mhz */ - latency = FLASH_LATENCY_3; /* 3WS */ - } - else - { - if(msirange == RCC_MSIRANGE_8) - { - /* MSI 16Mhz */ - latency = FLASH_LATENCY_2; /* 2WS */ - } - else if(msirange == RCC_MSIRANGE_7) - { - /* MSI 8Mhz */ - latency = FLASH_LATENCY_1; /* 1WS */ - } - /* else MSI < 8Mhz default FLASH_LATENCY_0 0WS */ - } -#endif - } - - __HAL_FLASH_SET_LATENCY(latency); - - /* Check that the new number of wait states is taken into account to access the Flash - memory by reading the FLASH_ACR register */ - if(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) != latency) - { - return HAL_ERROR; - } - - return HAL_OK; -} - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) -/** - * @brief Compute SYSCLK frequency based on PLL SYSCLK source. - * @retval SYSCLK frequency - */ -static uint32_t RCC_GetSysClockFreqFromPLLSource(void) -{ - uint32_t msirange = 0U, pllvco = 0U, pllsource = 0U, pllr = 2U, pllm = 2U; - uint32_t sysclockfreq = 0U; - - if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_MSI) - { - /* Get MSI range source */ - if(READ_BIT(RCC->CR, RCC_CR_MSIRGSEL) == RESET) - { /* MSISRANGE from RCC_CSR applies */ - msirange = READ_BIT(RCC->CSR, RCC_CSR_MSISRANGE) >> RCC_CSR_MSISRANGE_Pos; - } - else - { /* MSIRANGE from RCC_CR applies */ - msirange = READ_BIT(RCC->CR, RCC_CR_MSIRANGE) >> RCC_CR_MSIRANGE_Pos; - } - /*MSI frequency range in HZ*/ - msirange = MSIRangeTable[msirange]; - } - - /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); - pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; - - switch (pllsource) - { - case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ - pllvco = (HSI_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - - case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ - pllvco = (HSE_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - - case RCC_PLLSOURCE_MSI: /* MSI used as PLL clock source */ - default: - pllvco = (msirange / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); - break; - } - - pllr = ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U ) * 2U; - sysclockfreq = pllvco/pllr; - - return sysclockfreq; -} -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -/** - * @} - */ - -#endif /* HAL_RCC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c deleted file mode 100644 index 7c31e73f..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c +++ /dev/null @@ -1,3358 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rcc_ex.c - * @author MCD Application Team - * @brief Extended RCC HAL module driver. - * This file provides firmware functions to manage the following - * functionalities RCC extended peripheral: - * + Extended Peripheral Control functions - * + Extended Clock management functions - * + Extended Clock Recovery System Control functions - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RCCEx RCCEx - * @brief RCC Extended HAL module driver - * @{ - */ - -#ifdef HAL_RCC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/** @defgroup RCCEx_Private_Constants RCCEx Private Constants - * @{ - */ -#define PLLSAI1_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define PLLSAI2_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ -#define PLL_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ - -#define DIVIDER_P_UPDATE 0U -#define DIVIDER_Q_UPDATE 1U -#define DIVIDER_R_UPDATE 2U - -#define __LSCO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() -#define LSCO_GPIO_PORT GPIOA -#define LSCO_PIN GPIO_PIN_2 -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup RCCEx_Private_Functions RCCEx Private Functions - * @{ - */ -static HAL_StatusTypeDef RCCEx_PLLSAI1_Config(RCC_PLLSAI1InitTypeDef *PllSai1, uint32_t Divider); - -#if defined(RCC_PLLSAI2_SUPPORT) - -static HAL_StatusTypeDef RCCEx_PLLSAI2_Config(RCC_PLLSAI2InitTypeDef *PllSai2, uint32_t Divider); - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions - * @{ - */ - -/** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions - * @brief Extended Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Extended Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the RCC Clocks - frequencies. - [..] - (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to - select the RTC clock source; in this case the Backup domain will be reset in - order to modify the RTC Clock source, as consequence RTC registers (including - the backup registers) are set to their reset values. - -@endverbatim - * @{ - */ -/** - * @brief Initialize the RCC extended peripherals clocks according to the specified - * parameters in the RCC_PeriphCLKInitTypeDef. - * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that - * contains a field PeriphClockSelection which can be a combination of the following values: - * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock - * @arg @ref RCC_PERIPHCLK_ADC ADC peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM1) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM1) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM1) - @endif - * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock - * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock - * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - * @arg @ref RCC_PERIPHCLK_LPTIM1 LPTIM1 peripheral clock - * @arg @ref RCC_PERIPHCLK_LPTIM2 LPTIM2 peripheral clock - * @arg @ref RCC_PERIPHCLK_LPUART1 LPUART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_RNG RNG peripheral clock - * @arg @ref RCC_PERIPHCLK_SAI1 SAI1 peripheral clock - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - * @arg @ref RCC_PERIPHCLK_SDMMC1 SDMMC1 peripheral clock - @if STM32L443xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_USART2 USART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_USART3 USART1 peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock (only for devices with UART4) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 USART1 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 USART1 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 USART1 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral kernel clock (only for devices with DFSDM1) - * @arg @ref RCC_PERIPHCLK_DFSDM1AUDIO DFSDM1 peripheral audio clock (only for devices with DFSDM1) - * @arg @ref RCC_PERIPHCLK_LTDC LTDC peripheral clock (only for devices with LTDC) - * @arg @ref RCC_PERIPHCLK_DSI DSI peripheral clock (only for devices with DSI) - * @arg @ref RCC_PERIPHCLK_OSPI OctoSPI peripheral clock (only for devices with OctoSPI) - @endif - * - * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select - * the RTC clock source: in this case the access to Backup domain is enabled. - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) -{ - uint32_t tmpregister = 0; - uint32_t tickstart = 0U; - HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */ - HAL_StatusTypeDef status = HAL_OK; /* Final status */ - - /* Check the parameters */ - assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); - - /*-------------------------- SAI1 clock source configuration ---------------------*/ - if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)) - { - /* Check the parameters */ - assert_param(IS_RCC_SAI1CLK(PeriphClkInit->Sai1ClockSelection)); - - switch(PeriphClkInit->Sai1ClockSelection) - { - case RCC_SAI1CLKSOURCE_PLL: /* PLL is used as clock source for SAI1*/ - /* Enable SAI Clock output generated form System PLL . */ -#if defined(RCC_PLLSAI2_SUPPORT) - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); -#else - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI2CLK); -#endif /* RCC_PLLSAI2_SUPPORT */ - /* SAI1 clock source config set later after clock selection check */ - break; - - case RCC_SAI1CLKSOURCE_PLLSAI1: /* PLLSAI1 is used as clock source for SAI1*/ - /* PLLSAI1 input clock, parameters M, N & P configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); - /* SAI1 clock source config set later after clock selection check */ - break; - -#if defined(RCC_PLLSAI2_SUPPORT) - - case RCC_SAI1CLKSOURCE_PLLSAI2: /* PLLSAI2 is used as clock source for SAI1*/ - /* PLLSAI2 input clock, parameters M, N & P configuration clock output (PLLSAI2ClockOut) */ - ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_P_UPDATE); - /* SAI1 clock source config set later after clock selection check */ - break; - -#endif /* RCC_PLLSAI2_SUPPORT */ - - case RCC_SAI1CLKSOURCE_PIN: /* External clock is used as source of SAI1 clock*/ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - case RCC_SAI1CLKSOURCE_HSI: /* HSI is used as source of SAI1 clock*/ -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - /* SAI1 clock source config set later after clock selection check */ - break; - - default: - ret = HAL_ERROR; - break; - } - - if(ret == HAL_OK) - { - /* Set the source of SAI1 clock*/ - __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); - } - else - { - /* set overall return value */ - status = ret; - } - } - -#if defined(SAI2) - - /*-------------------------- SAI2 clock source configuration ---------------------*/ - if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2)) - { - /* Check the parameters */ - assert_param(IS_RCC_SAI2CLK(PeriphClkInit->Sai2ClockSelection)); - - switch(PeriphClkInit->Sai2ClockSelection) - { - case RCC_SAI2CLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/ - /* Enable SAI Clock output generated form System PLL . */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); - /* SAI2 clock source config set later after clock selection check */ - break; - - case RCC_SAI2CLKSOURCE_PLLSAI1: /* PLLSAI1 is used as clock source for SAI2*/ - /* PLLSAI1 input clock, parameters M, N & P configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); - /* SAI2 clock source config set later after clock selection check */ - break; - - case RCC_SAI2CLKSOURCE_PLLSAI2: /* PLLSAI2 is used as clock source for SAI2*/ - /* PLLSAI2 input clock, parameters M, N & P configuration and clock output (PLLSAI2ClockOut) */ - ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_P_UPDATE); - /* SAI2 clock source config set later after clock selection check */ - break; - - case RCC_SAI2CLKSOURCE_PIN: /* External clock is used as source of SAI2 clock*/ -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - case RCC_SAI2CLKSOURCE_HSI: /* HSI is used as source of SAI2 clock*/ -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - /* SAI2 clock source config set later after clock selection check */ - break; - - default: - ret = HAL_ERROR; - break; - } - - if(ret == HAL_OK) - { - /* Set the source of SAI2 clock*/ - __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection); - } - else - { - /* set overall return value */ - status = ret; - } - } -#endif /* SAI2 */ - - /*-------------------------- RTC clock source configuration ----------------------*/ - if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - { - FlagStatus pwrclkchanged = RESET; - - /* Check for RTC Parameters used to output RTCCLK */ - assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); - - /* Enable Power Clock */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - pwrclkchanged = SET; - } - - /* Enable write access to Backup domain */ - SET_BIT(PWR->CR1, PWR_CR1_DBP); - - /* Wait for Backup domain Write protection disable */ - tickstart = HAL_GetTick(); - - while(READ_BIT(PWR->CR1, PWR_CR1_DBP) == RESET) - { - if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - { - ret = HAL_TIMEOUT; - break; - } - } - - if(ret == HAL_OK) - { - /* Reset the Backup domain only if the RTC Clock source selection is modified from default */ - tmpregister = READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL); - - if((tmpregister != RCC_RTCCLKSOURCE_NONE) && (tmpregister != PeriphClkInit->RTCClockSelection)) - { - /* Store the content of BDCR register before the reset of Backup Domain */ - tmpregister = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL)); - /* RTC Clock selection can be changed only if the Backup Domain is reset */ - __HAL_RCC_BACKUPRESET_FORCE(); - __HAL_RCC_BACKUPRESET_RELEASE(); - /* Restore the Content of BDCR register */ - RCC->BDCR = tmpregister; - } - - /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ - if (HAL_IS_BIT_SET(tmpregister, RCC_BDCR_LSEON)) - { - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till LSE is ready */ - while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RESET) - { - if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - { - ret = HAL_TIMEOUT; - break; - } - } - } - - if(ret == HAL_OK) - { - /* Apply new RTC clock source selection */ - __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - } - else - { - /* set overall return value */ - status = ret; - } - } - else - { - /* set overall return value */ - status = ret; - } - - /* Restore clock configuration if changed */ - if(pwrclkchanged == SET) - { - __HAL_RCC_PWR_CLK_DISABLE(); - } - } - - /*-------------------------- USART1 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) - { - /* Check the parameters */ - assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); - - /* Configure the USART1 clock source */ - __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); - } - - /*-------------------------- USART2 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) - { - /* Check the parameters */ - assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); - - /* Configure the USART2 clock source */ - __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); - } - -#if defined(USART3) - - /*-------------------------- USART3 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) - { - /* Check the parameters */ - assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); - - /* Configure the USART3 clock source */ - __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); - } - -#endif /* USART3 */ - -#if defined(UART4) - - /*-------------------------- UART4 clock source configuration --------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) - { - /* Check the parameters */ - assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection)); - - /* Configure the UART4 clock source */ - __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); - } - -#endif /* UART4 */ - -#if defined(UART5) - - /*-------------------------- UART5 clock source configuration --------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) - { - /* Check the parameters */ - assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection)); - - /* Configure the UART5 clock source */ - __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection); - } - -#endif /* UART5 */ - - /*-------------------------- LPUART1 clock source configuration ------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) - { - /* Check the parameters */ - assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection)); - - /* Configure the LPUAR1 clock source */ - __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection); - } - - /*-------------------------- LPTIM1 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1)) - { - assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection)); - __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection); - } - - /*-------------------------- LPTIM2 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == (RCC_PERIPHCLK_LPTIM2)) - { - assert_param(IS_RCC_LPTIM2CLK(PeriphClkInit->Lptim2ClockSelection)); - __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection); - } - - /*-------------------------- I2C1 clock source configuration ---------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) - { - /* Check the parameters */ - assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); - - /* Configure the I2C1 clock source */ - __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); - } - -#if defined(I2C2) - - /*-------------------------- I2C2 clock source configuration ---------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) - { - /* Check the parameters */ - assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection)); - - /* Configure the I2C2 clock source */ - __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection); - } - -#endif /* I2C2 */ - - /*-------------------------- I2C3 clock source configuration ---------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) - { - /* Check the parameters */ - assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection)); - - /* Configure the I2C3 clock source */ - __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection); - } - -#if defined(I2C4) - - /*-------------------------- I2C4 clock source configuration ---------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) - { - /* Check the parameters */ - assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection)); - - /* Configure the I2C4 clock source */ - __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection); - } - -#endif /* I2C4 */ - -#if defined(USB_OTG_FS) || defined(USB) - - /*-------------------------- USB clock source configuration ----------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == (RCC_PERIPHCLK_USB)) - { - assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection)); - __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - - if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLL) - { - /* Enable PLL48M1CLK output */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); - } - else - { - if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLLSAI1) - { - /* PLLSAI1 input clock, parameters M, N & Q configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_Q_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - } - } - -#endif /* USB_OTG_FS || USB */ - -#if defined(SDMMC1) - - /*-------------------------- SDMMC1 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == (RCC_PERIPHCLK_SDMMC1)) - { - assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection)); - __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection); - - if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLL) /* PLL "Q" ? */ - { - /* Enable PLL48M1CLK output */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); - } -#if defined(RCC_CCIPR2_SDMMCSEL) - else if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLLP) /* PLL "P" ? */ - { - /* Enable PLLSAI3CLK output */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); - } -#endif - else if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLLSAI1) - { - /* PLLSAI1 input clock, parameters M, N & Q configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_Q_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - } - -#endif /* SDMMC1 */ - - /*-------------------------- RNG clock source configuration ----------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == (RCC_PERIPHCLK_RNG)) - { - assert_param(IS_RCC_RNGCLKSOURCE(PeriphClkInit->RngClockSelection)); - __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection); - - if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLL) - { - /* Enable PLL48M1CLK output */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); - } - else if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLLSAI1) - { - /* PLLSAI1 input clock, parameters M, N & Q configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_Q_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - } - - /*-------------------------- ADC clock source configuration ----------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - { - /* Check the parameters */ - assert_param(IS_RCC_ADCCLKSOURCE(PeriphClkInit->AdcClockSelection)); - - /* Configure the ADC interface clock source */ - __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - - if(PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLSAI1) - { - /* PLLSAI1 input clock, parameters M, N & R configuration and clock output (PLLSAI1ClockOut) */ - ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_R_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) - - else if(PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLSAI2) - { - /* PLLSAI2 input clock, parameters M, N & R configuration and clock output (PLLSAI2ClockOut) */ - ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_R_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ - - } - -#if defined(SWPMI1) - - /*-------------------------- SWPMI1 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) - { - /* Check the parameters */ - assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection)); - - /* Configure the SWPMI1 clock source */ - __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection); - } - -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) - - /*-------------------------- DFSDM1 clock source configuration -------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) - { - /* Check the parameters */ - assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection)); - - /* Configure the DFSDM1 interface clock source */ - __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection); - } - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - /*-------------------------- DFSDM1 audio clock source configuration -------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1AUDIO) == RCC_PERIPHCLK_DFSDM1AUDIO) - { - /* Check the parameters */ - assert_param(IS_RCC_DFSDM1AUDIOCLKSOURCE(PeriphClkInit->Dfsdm1AudioClockSelection)); - - /* Configure the DFSDM1 interface audio clock source */ - __HAL_RCC_DFSDM1AUDIO_CONFIG(PeriphClkInit->Dfsdm1AudioClockSelection); - } - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) - - /*-------------------------- LTDC clock source configuration --------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC) - { - /* Check the parameters */ - assert_param(IS_RCC_LTDCCLKSOURCE(PeriphClkInit->LtdcClockSelection)); - - /* Disable the PLLSAI2 */ - __HAL_RCC_PLLSAI2_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - ret = HAL_TIMEOUT; - break; - } - } - - if(ret == HAL_OK) - { - /* Configure the LTDC clock source */ - __HAL_RCC_LTDC_CONFIG(PeriphClkInit->LtdcClockSelection); - - /* PLLSAI2 input clock, parameters M, N & R configuration and clock output (PLLSAI2ClockOut) */ - ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_R_UPDATE); - } - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - -#endif /* LTDC */ - -#if defined(DSI) - - /*-------------------------- DSI clock source configuration ---------------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DSI) == RCC_PERIPHCLK_DSI) - { - /* Check the parameters */ - assert_param(IS_RCC_DSICLKSOURCE(PeriphClkInit->DsiClockSelection)); - - /* Configure the DSI clock source */ - __HAL_RCC_DSI_CONFIG(PeriphClkInit->DsiClockSelection); - - if(PeriphClkInit->DsiClockSelection == RCC_DSICLKSOURCE_PLLSAI2) - { - /* PLLSAI2 input clock, parameters M, N & Q configuration and clock output (PLLSAI2ClockOut) */ - ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_Q_UPDATE); - - if(ret != HAL_OK) - { - /* set overall return value */ - status = ret; - } - } - } - -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - - /*-------------------------- OctoSPIx clock source configuration ----------------*/ - if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_OSPI) == RCC_PERIPHCLK_OSPI) - { - /* Check the parameters */ - assert_param(IS_RCC_OSPICLKSOURCE(PeriphClkInit->OspiClockSelection)); - - /* Configure the OctoSPI clock source */ - __HAL_RCC_OSPI_CONFIG(PeriphClkInit->OspiClockSelection); - - if(PeriphClkInit->OspiClockSelection == RCC_OSPICLKSOURCE_PLL) - { - /* Enable PLL48M1CLK output */ - __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); - } - } - -#endif /* OCTOSPI1 || OCTOSPI2 */ - - return status; -} - -/** - * @brief Get the RCC_ClkInitStruct according to the internal RCC configuration registers. - * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that - * returns the configuration information for the Extended Peripherals - * clocks(SAI1, SAI2, LPTIM1, LPTIM2, I2C1, I2C2, I2C3, I2C4, LPUART, - * USART1, USART2, USART3, UART4, UART5, RTC, ADCx, DFSDMx, SWPMI1, USB, SDMMC1 and RNG). - * @retval None - */ -void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) -{ - /* Set all possible values for the extended clock type parameter------------*/ - -#if defined(STM32L431xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L432xx) || defined(STM32L442xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C3 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L433xx) || defined(STM32L443xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L451xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L452xx) || defined(STM32L462xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L471xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L496xx) || defined(STM32L4A6xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_RTC ; - -#elif defined(STM32L4R5xx) || defined(STM32L4S5xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_DFSDM1AUDIO | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_OSPI; - -#elif defined(STM32L4R7xx) || defined(STM32L4S7xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_DFSDM1AUDIO | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_OSPI | RCC_PERIPHCLK_LTDC; - -#elif defined(STM32L4R9xx) || defined(STM32L4S9xx) - - PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ - RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_I2C4 | \ - RCC_PERIPHCLK_LPTIM1 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | \ - RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_DFSDM1 | \ - RCC_PERIPHCLK_DFSDM1AUDIO | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_OSPI | RCC_PERIPHCLK_LTDC | RCC_PERIPHCLK_DSI; - -#endif /* STM32L431xx */ - - /* Get the PLLSAI1 Clock configuration -----------------------------------------------*/ - - PeriphClkInit->PLLSAI1.PLLSAI1Source = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC) >> RCC_PLLCFGR_PLLSRC_Pos; -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U; -#else - PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U; -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - PeriphClkInit->PLLSAI1.PLLSAI1N = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; - PeriphClkInit->PLLSAI1.PLLSAI1P = ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P) >> RCC_PLLSAI1CFGR_PLLSAI1P_Pos) << 4U) + 7U; - PeriphClkInit->PLLSAI1.PLLSAI1Q = ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q) >> RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) + 1U) * 2U; - PeriphClkInit->PLLSAI1.PLLSAI1R = ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1R) >> RCC_PLLSAI1CFGR_PLLSAI1R_Pos) + 1U) * 2U; - -#if defined(RCC_PLLSAI2_SUPPORT) - - /* Get the PLLSAI2 Clock configuration -----------------------------------------------*/ - - PeriphClkInit->PLLSAI2.PLLSAI2Source = PeriphClkInit->PLLSAI1.PLLSAI1Source; -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - PeriphClkInit->PLLSAI2.PLLSAI2M = (READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2M) >> RCC_PLLSAI2CFGR_PLLSAI2M_Pos) + 1U; -#else - PeriphClkInit->PLLSAI2.PLLSAI2M = PeriphClkInit->PLLSAI1.PLLSAI1M; -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - PeriphClkInit->PLLSAI2.PLLSAI2N = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N) >> RCC_PLLSAI2CFGR_PLLSAI2N_Pos; - PeriphClkInit->PLLSAI2.PLLSAI2P = ((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2P) >> RCC_PLLSAI2CFGR_PLLSAI2P_Pos) << 4U) + 7U; -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - PeriphClkInit->PLLSAI2.PLLSAI2Q = ((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2Q) >> RCC_PLLSAI2CFGR_PLLSAI2Q_Pos) + 1U) * 2U; -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ - PeriphClkInit->PLLSAI2.PLLSAI2R = ((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2R)>> RCC_PLLSAI2CFGR_PLLSAI2R_Pos) + 1U) * 2U; - -#endif /* RCC_PLLSAI2_SUPPORT */ - - /* Get the USART1 clock source ---------------------------------------------*/ - PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE(); - /* Get the USART2 clock source ---------------------------------------------*/ - PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE(); - -#if defined(USART3) - /* Get the USART3 clock source ---------------------------------------------*/ - PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE(); -#endif /* USART3 */ - -#if defined(UART4) - /* Get the UART4 clock source ----------------------------------------------*/ - PeriphClkInit->Uart4ClockSelection = __HAL_RCC_GET_UART4_SOURCE(); -#endif /* UART4 */ - -#if defined(UART5) - /* Get the UART5 clock source ----------------------------------------------*/ - PeriphClkInit->Uart5ClockSelection = __HAL_RCC_GET_UART5_SOURCE(); -#endif /* UART5 */ - - /* Get the LPUART1 clock source --------------------------------------------*/ - PeriphClkInit->Lpuart1ClockSelection = __HAL_RCC_GET_LPUART1_SOURCE(); - - /* Get the I2C1 clock source -----------------------------------------------*/ - PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE(); - -#if defined(I2C2) - /* Get the I2C2 clock source ----------------------------------------------*/ - PeriphClkInit->I2c2ClockSelection = __HAL_RCC_GET_I2C2_SOURCE(); -#endif /* I2C2 */ - - /* Get the I2C3 clock source -----------------------------------------------*/ - PeriphClkInit->I2c3ClockSelection = __HAL_RCC_GET_I2C3_SOURCE(); - -#if defined(I2C4) - /* Get the I2C4 clock source -----------------------------------------------*/ - PeriphClkInit->I2c4ClockSelection = __HAL_RCC_GET_I2C4_SOURCE(); -#endif /* I2C4 */ - - /* Get the LPTIM1 clock source ---------------------------------------------*/ - PeriphClkInit->Lptim1ClockSelection = __HAL_RCC_GET_LPTIM1_SOURCE(); - - /* Get the LPTIM2 clock source ---------------------------------------------*/ - PeriphClkInit->Lptim2ClockSelection = __HAL_RCC_GET_LPTIM2_SOURCE(); - - /* Get the SAI1 clock source -----------------------------------------------*/ - PeriphClkInit->Sai1ClockSelection = __HAL_RCC_GET_SAI1_SOURCE(); - -#if defined(SAI2) - /* Get the SAI2 clock source -----------------------------------------------*/ - PeriphClkInit->Sai2ClockSelection = __HAL_RCC_GET_SAI2_SOURCE(); -#endif /* SAI2 */ - - /* Get the RTC clock source ------------------------------------------------*/ - PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE(); - -#if defined(USB_OTG_FS) || defined(USB) - /* Get the USB clock source ------------------------------------------------*/ - PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE(); -#endif /* USB_OTG_FS || USB */ - -#if defined(SDMMC1) - /* Get the SDMMC1 clock source ---------------------------------------------*/ - PeriphClkInit->Sdmmc1ClockSelection = __HAL_RCC_GET_SDMMC1_SOURCE(); -#endif /* SDMMC1 */ - - /* Get the RNG clock source ------------------------------------------------*/ - PeriphClkInit->RngClockSelection = __HAL_RCC_GET_RNG_SOURCE(); - - /* Get the ADC clock source ------------------------------------------------*/ - PeriphClkInit->AdcClockSelection = __HAL_RCC_GET_ADC_SOURCE(); - -#if defined(SWPMI1) - /* Get the SWPMI1 clock source ---------------------------------------------*/ - PeriphClkInit->Swpmi1ClockSelection = __HAL_RCC_GET_SWPMI1_SOURCE(); -#endif /* SWPMI1 */ - -#if defined(DFSDM1_Filter0) - /* Get the DFSDM1 clock source ---------------------------------------------*/ - PeriphClkInit->Dfsdm1ClockSelection = __HAL_RCC_GET_DFSDM1_SOURCE(); - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - /* Get the DFSDM1 audio clock source ---------------------------------------*/ - PeriphClkInit->Dfsdm1AudioClockSelection = __HAL_RCC_GET_DFSDM1AUDIO_SOURCE(); -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ -#endif /* DFSDM1_Filter0 */ - -#if defined(LTDC) - /* Get the LTDC clock source -----------------------------------------------*/ - PeriphClkInit->LtdcClockSelection = __HAL_RCC_GET_LTDC_SOURCE(); -#endif /* LTDC */ - -#if defined(DSI) - /* Get the DSI clock source ------------------------------------------------*/ - PeriphClkInit->DsiClockSelection = __HAL_RCC_GET_DSI_SOURCE(); -#endif /* DSI */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - /* Get the OctoSPIclock source --------------------------------------------*/ - PeriphClkInit->OspiClockSelection = __HAL_RCC_GET_OSPI_SOURCE(); -#endif /* OCTOSPI1 || OCTOSPI2 */ -} - -/** - * @brief Return the peripheral clock frequency for peripherals with clock source from PLLSAIs - * @note Return 0 if peripheral clock identifier not managed by this API - * @param PeriphClk Peripheral clock identifier - * This parameter can be one of the following values: - * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock - * @arg @ref RCC_PERIPHCLK_ADC ADC peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral clock (only for devices with DFSDM) - @endif - * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock - * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock - * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_I2C4 I2C4 peripheral clock (only for devices with I2C4) - @endif - * @arg @ref RCC_PERIPHCLK_LPTIM1 LPTIM1 peripheral clock - * @arg @ref RCC_PERIPHCLK_LPTIM2 LPTIM2 peripheral clock - * @arg @ref RCC_PERIPHCLK_LPUART1 LPUART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_RNG RNG peripheral clock - * @arg @ref RCC_PERIPHCLK_SAI1 SAI1 peripheral clock - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock (only for devices with SAI2) - @endif - * @arg @ref RCC_PERIPHCLK_SDMMC1 SDMMC1 peripheral clock - @if STM32L443xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock (only for devices with SWPMI1) - @endif - * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_USART2 USART1 peripheral clock - * @arg @ref RCC_PERIPHCLK_USART3 USART1 peripheral clock - @if STM32L462xx - * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - @endif - @if STM32L486xx - * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - @endif - @if STM32L4A6xx - * @arg @ref RCC_PERIPHCLK_UART4 UART4 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 UART5 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - @endif - @if STM32L4S9xx - * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock (only for devices with UART4) - * @arg @ref RCC_PERIPHCLK_UART5 USART1 peripheral clock (only for devices with UART5) - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) - * @arg @ref RCC_PERIPHCLK_DFSDM1 DFSDM1 peripheral kernel clock (only for devices with DFSDM1) - * @arg @ref RCC_PERIPHCLK_DFSDM1AUDIO DFSDM1 peripheral audio clock (only for devices with DFSDM1) - * @arg @ref RCC_PERIPHCLK_LTDC LTDC peripheral clock (only for devices with LTDC) - * @arg @ref RCC_PERIPHCLK_DSI DSI peripheral clock (only for devices with DSI) - * @arg @ref RCC_PERIPHCLK_OSPI OctoSPI peripheral clock (only for devices with OctoSPI) - @endif - * @retval Frequency in Hz - */ -uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) -{ - uint32_t frequency = 0U; - uint32_t srcclk = 0U; - uint32_t pllvco = 0U, plln = 0U, pllp = 0U; - - /* Check the parameters */ - assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); - - if(PeriphClk == RCC_PERIPHCLK_RTC) - { - /* Get the current RTC source */ - srcclk = __HAL_RCC_GET_RTC_SOURCE(); - - /* Check if LSE is ready and if RTC clock selection is LSE */ - if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Check if LSI is ready and if RTC clock selection is LSI */ - else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) - { - frequency = LSI_VALUE; - } - /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/ - else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) - { - frequency = HSE_VALUE / 32U; - } - /* Clock not enabled for RTC*/ - else - { - frequency = 0U; - } - } - else - { - /* Other external peripheral clock source than RTC */ - - /* Compute PLL clock input */ - if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_MSI) /* MSI ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) - { - /*MSI frequency range in HZ*/ - pllvco = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> 4U)]; - } - else - { - pllvco = 0U; - } - } - else if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI) /* HSI ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) - { - pllvco = HSI_VALUE; - } - else - { - pllvco = 0U; - } - } - else if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) /* HSE ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) - { - pllvco = HSE_VALUE; - } - else - { - pllvco = 0U; - } - } - else /* No source */ - { - pllvco = 0U; - } - -#if !defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) && !defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLL Source) / PLLM */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); -#endif - - switch(PeriphClk) - { -#if defined(SAI2) - - case RCC_PERIPHCLK_SAI1: - case RCC_PERIPHCLK_SAI2: - - if(PeriphClk == RCC_PERIPHCLK_SAI1) - { - srcclk = __HAL_RCC_GET_SAI1_SOURCE(); - - if(srcclk == RCC_SAI1CLKSOURCE_PIN) - { - frequency = EXTERNAL_SAI1_CLOCK_VALUE; - } - /* Else, PLL clock output to check below */ - } - else /* RCC_PERIPHCLK_SAI2 */ - { - srcclk = __HAL_RCC_GET_SAI2_SOURCE(); - - if(srcclk == RCC_SAI2CLKSOURCE_PIN) - { - frequency = EXTERNAL_SAI2_CLOCK_VALUE; - } - /* Else, PLL clock output to check below */ - } - -#else - - case RCC_PERIPHCLK_SAI1: - - if(PeriphClk == RCC_PERIPHCLK_SAI1) - { - srcclk = READ_BIT(RCC->CCIPR, RCC_CCIPR_SAI1SEL); - - if(srcclk == RCC_SAI1CLKSOURCE_PIN) - { - frequency = EXTERNAL_SAI1_CLOCK_VALUE; - } - /* Else, PLL clock output to check below */ - } - -#endif /* SAI2 */ - - if(frequency == 0U) - { -#if defined(SAI2) - if((srcclk == RCC_SAI1CLKSOURCE_PLL) || (srcclk == RCC_SAI2CLKSOURCE_PLL)) - { - if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_SAI3CLK) != RESET) - { - /* f(PLLSAI3CLK) = f(VCO input) * PLLN / PLLP */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - frequency = (pllvco * plln) / pllp; - } - } - else if(srcclk == 0U) /* RCC_SAI1CLKSOURCE_PLLSAI1 || RCC_SAI2CLKSOURCE_PLLSAI1 */ - { - if(__HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(RCC_PLLSAI1_SAI1CLK) != RESET) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* f(PLLSAI1 Source) / PLLSAI1M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U)); -#endif - /* f(PLLSAI1CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1P */ - plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1PDIV) >> RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - frequency = (pllvco * plln) / pllp; - } - } -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - else if((srcclk == RCC_SAI1CLKSOURCE_HSI) || (srcclk == RCC_SAI2CLKSOURCE_HSI)) - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) - { - frequency = HSI_VALUE; - } - } -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#else - if(srcclk == RCC_SAI1CLKSOURCE_PLL) - { - if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_SAI2CLK) != RESET) - { - /* f(PLLSAI2CLK) = f(VCO input) * PLLN / PLLP */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - - frequency = (pllvco * plln) / pllp; - } - else if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) - { - /* HSI automatically selected as clock source if PLLs not enabled */ - frequency = HSI_VALUE; - } - else - { - /* No clock source */ - frequency = 0U; - } - } - else if(srcclk == RCC_SAI1CLKSOURCE_PLLSAI1) - { - if(__HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(RCC_PLLSAI1_SAI1CLK) != RESET) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* f(PLLSAI1 Source) / PLLSAI1M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U)); -#endif - /* f(PLLSAI1CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1P */ - plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1PDIV) >> RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - - frequency = (pllvco * plln) / pllp; - } - else if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) - { - /* HSI automatically selected as clock source if PLLs not enabled */ - frequency = HSI_VALUE; - } - else - { - /* No clock source */ - frequency = 0U; - } - } -#endif /* SAI2 */ - -#if defined(RCC_PLLSAI2_SUPPORT) - - else if((srcclk == RCC_SAI1CLKSOURCE_PLLSAI2) || (srcclk == RCC_SAI2CLKSOURCE_PLLSAI2)) - { - if(__HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(RCC_PLLSAI2_SAI2CLK) != RESET) - { -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLLSAI2 Source) / PLLSAI2M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2M) >> RCC_PLLSAI2CFGR_PLLSAI2M_Pos) + 1U)); -#endif - /* f(PLLSAI2CLK) = f(VCOSAI2 input) * PLLSAI2N / PLLSAI2P */ - plln = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N) >> RCC_PLLSAI2CFGR_PLLSAI2N_Pos; -#if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2PDIV) >> RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2P) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - frequency = (pllvco * plln) / pllp; - } - } - -#endif /* RCC_PLLSAI2_SUPPORT */ - - else - { - /* No clock source */ - frequency = 0U; - } - } - break; - -#if defined(USB_OTG_FS) || defined(USB) - - case RCC_PERIPHCLK_USB: - -#endif /* USB_OTG_FS || USB */ - - case RCC_PERIPHCLK_RNG: - -#if defined(SDMMC1) && !defined(RCC_CCIPR2_SDMMCSEL) - - case RCC_PERIPHCLK_SDMMC1: - -#endif /* SDMMC1 && !RCC_CCIPR2_SDMMCSEL */ - - srcclk = READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL); - - if(srcclk == RCC_CCIPR_CLK48SEL) /* MSI ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) - { - /*MSI frequency range in HZ*/ - frequency = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> 4U)]; - } - else - { - frequency = 0U; - } - } - else if(srcclk == RCC_CCIPR_CLK48SEL_1) /* PLL ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY) && HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) || defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLL Source) / PLLM */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); -#endif - /* f(PLL48M1CLK) = f(VCO input) * PLLN / PLLQ */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos) + 1U) << 1U); - } - else - { - frequency = 0U; - } - } - else if(srcclk == RCC_CCIPR_CLK48SEL_0) /* PLLSAI1 ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLSAI1RDY) && HAL_IS_BIT_SET(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1QEN)) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* f(PLLSAI1 Source) / PLLSAI1M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U)); -#endif - /* f(PLL48M2CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1Q */ - plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q) >> RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) + 1U) << 1U); - } - else - { - frequency = 0U; - } - } -#if defined(RCC_HSI48_SUPPORT) - else if((srcclk == 0U) && (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY))) /* HSI48 ? */ - { - frequency = HSI48_VALUE; - } - else /* No clock source */ - { - frequency = 0U; - } -#else - else /* No clock source */ - { - frequency = 0U; - } -#endif /* RCC_HSI48_SUPPORT */ - break; - -#if defined(SDMMC1) && defined(RCC_CCIPR2_SDMMCSEL) - - case RCC_PERIPHCLK_SDMMC1: - - if(HAL_IS_BIT_SET(RCC->CCIPR2, RCC_CCIPR2_SDMMCSEL)) /* PLL "P" ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY) && HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN)) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) || defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLL Source) / PLLM */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); -#endif - /* f(PLLSAI3CLK) = f(VCO input) * PLLN / PLLP */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; -#if defined(RCC_PLLP_DIV_2_31_SUPPORT) - pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; -#endif - if(pllp == 0U) - { - if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) - { - pllp = 17U; - } - else - { - pllp = 7U; - } - } - frequency = (pllvco * plln) / pllp; - } - else - { - frequency = 0U; - } - } - else /* 48MHz from PLL "Q" or MSI or PLLSAI1Q or HSI48 */ - { - srcclk = READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL); - - if(srcclk == RCC_CCIPR_CLK48SEL) /* MSI ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY)) - { - /*MSI frequency range in HZ*/ - frequency = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> 4U)]; - } - else - { - frequency = 0U; - } - } - else if(srcclk == RCC_CCIPR_CLK48SEL_1) /* PLL "Q" ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY) && HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) || defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLL Source) / PLLM */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); -#endif - /* f(PLL48M1CLK) = f(VCO input) * PLLN / PLLQ */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos) + 1U) << 1U); - } - else - { - frequency = 0U; - } - } - else if(srcclk == RCC_CCIPR_CLK48SEL_0) /* PLLSAI1 ? */ - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLSAI1RDY) && HAL_IS_BIT_SET(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1QEN)) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* f(PLLSAI1 Source) / PLLSAI1M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U)); -#endif - /* f(PLL48M2CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1Q */ - plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q) >> RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) + 1U) << 1U); - } - else - { - frequency = 0U; - } - } - else if((srcclk == 0U) && (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RDY))) /* HSI48 ? */ - { - frequency = HSI48_VALUE; - } - else /* No clock source */ - { - frequency = 0U; - } - } - break; - -#endif /* SDMMC1 && RCC_CCIPR2_SDMMCSEL */ - - case RCC_PERIPHCLK_USART1: - /* Get the current USART1 source */ - srcclk = __HAL_RCC_GET_USART1_SOURCE(); - - if(srcclk == RCC_USART1CLKSOURCE_PCLK2) - { - frequency = HAL_RCC_GetPCLK2Freq(); - } - else if(srcclk == RCC_USART1CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for USART1 */ - else - { - frequency = 0U; - } - break; - - case RCC_PERIPHCLK_USART2: - /* Get the current USART2 source */ - srcclk = __HAL_RCC_GET_USART2_SOURCE(); - - if(srcclk == RCC_USART2CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_USART2CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for USART2 */ - else - { - frequency = 0U; - } - break; - -#if defined(USART3) - - case RCC_PERIPHCLK_USART3: - /* Get the current USART3 source */ - srcclk = __HAL_RCC_GET_USART3_SOURCE(); - - if(srcclk == RCC_USART3CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_USART3CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for USART3 */ - else - { - frequency = 0U; - } - break; - -#endif /* USART3 */ - -#if defined(UART4) - - case RCC_PERIPHCLK_UART4: - /* Get the current UART4 source */ - srcclk = __HAL_RCC_GET_UART4_SOURCE(); - - if(srcclk == RCC_UART4CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_UART4CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_UART4CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_UART4CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for UART4 */ - else - { - frequency = 0U; - } - break; - -#endif /* UART4 */ - -#if defined(UART5) - - case RCC_PERIPHCLK_UART5: - /* Get the current UART5 source */ - srcclk = __HAL_RCC_GET_UART5_SOURCE(); - - if(srcclk == RCC_UART5CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_UART5CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_UART5CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_UART5CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for UART5 */ - else - { - frequency = 0U; - } - break; - -#endif /* UART5 */ - - case RCC_PERIPHCLK_LPUART1: - /* Get the current LPUART1 source */ - srcclk = __HAL_RCC_GET_LPUART1_SOURCE(); - - if(srcclk == RCC_LPUART1CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_LPUART1CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_LPUART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if((srcclk == RCC_LPUART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for LPUART1 */ - else - { - frequency = 0U; - } - break; - - case RCC_PERIPHCLK_ADC: - - srcclk = __HAL_RCC_GET_ADC_SOURCE(); - - if(srcclk == RCC_ADCCLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if(srcclk == RCC_ADCCLKSOURCE_PLLSAI1) - { - if(__HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(RCC_PLLSAI1_ADC1CLK) != RESET) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* f(PLLSAI1 Source) / PLLSAI1M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLLSAI1CFGR_PLLSAI1M_Pos) + 1U)); -#endif - /* f(PLLADC1CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1R */ - plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLSAI1CFGR_PLLSAI1N_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1R) >> RCC_PLLSAI1CFGR_PLLSAI1R_Pos) + 1U) << 1U); - } - } -#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) - else if(srcclk == RCC_ADCCLKSOURCE_PLLSAI2) - { - if(__HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(RCC_PLLSAI2_ADC2CLK) != RESET) - { -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* f(PLLSAI2 Source) / PLLSAI2M */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2M) >> RCC_PLLSAI2CFGR_PLLSAI2M_Pos) + 1U)); -#endif - /* f(PLLADC2CLK) = f(VCOSAI2 input) * PLLSAI2N / PLLSAI2R */ - plln = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N) >> RCC_PLLSAI2CFGR_PLLSAI2N_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2R) >> RCC_PLLSAI2CFGR_PLLSAI2R_Pos) + 1U) << 1U); - } - } -#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */ - /* Clock not enabled for ADC */ - else - { - frequency = 0U; - } - break; - -#if defined(DFSDM1_Filter0) - - case RCC_PERIPHCLK_DFSDM1: - /* Get the current DFSDM1 source */ - srcclk = __HAL_RCC_GET_DFSDM1_SOURCE(); - - if(srcclk == RCC_DFSDM1CLKSOURCE_PCLK2) - { - frequency = HAL_RCC_GetPCLK2Freq(); - } - else - { - frequency = HAL_RCC_GetSysClockFreq(); - } - break; - -#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - - case RCC_PERIPHCLK_DFSDM1AUDIO: - /* Get the current DFSDM1 audio source */ - srcclk = __HAL_RCC_GET_DFSDM1AUDIO_SOURCE(); - - if(srcclk == RCC_DFSDM1AUDIOCLKSOURCE_SAI1) - { - frequency = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI1); - } - else if((srcclk == RCC_DFSDM1AUDIOCLKSOURCE_MSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY))) - { - /*MSI frequency range in HZ*/ - frequency = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> 4U)]; - } - else if((srcclk == RCC_DFSDM1AUDIOCLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for DFSDM1 audio source */ - else - { - frequency = 0U; - } - break; - -#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* DFSDM1_Filter0 */ - - case RCC_PERIPHCLK_I2C1: - /* Get the current I2C1 source */ - srcclk = __HAL_RCC_GET_I2C1_SOURCE(); - - if(srcclk == RCC_I2C1CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_I2C1CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for I2C1 */ - else - { - frequency = 0U; - } - break; - -#if defined(I2C2) - - case RCC_PERIPHCLK_I2C2: - /* Get the current I2C2 source */ - srcclk = __HAL_RCC_GET_I2C2_SOURCE(); - - if(srcclk == RCC_I2C2CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_I2C2CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_I2C2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for I2C2 */ - else - { - frequency = 0U; - } - break; - -#endif /* I2C2 */ - - case RCC_PERIPHCLK_I2C3: - /* Get the current I2C3 source */ - srcclk = __HAL_RCC_GET_I2C3_SOURCE(); - - if(srcclk == RCC_I2C3CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_I2C3CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_I2C3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for I2C3 */ - else - { - frequency = 0U; - } - break; - -#if defined(I2C4) - - case RCC_PERIPHCLK_I2C4: - /* Get the current I2C4 source */ - srcclk = __HAL_RCC_GET_I2C4_SOURCE(); - - if(srcclk == RCC_I2C4CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if(srcclk == RCC_I2C4CLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_I2C4CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for I2C4 */ - else - { - frequency = 0U; - } - break; - -#endif /* I2C4 */ - - case RCC_PERIPHCLK_LPTIM1: - /* Get the current LPTIM1 source */ - srcclk = __HAL_RCC_GET_LPTIM1_SOURCE(); - - if(srcclk == RCC_LPTIM1CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if((srcclk == RCC_LPTIM1CLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) - { - frequency = LSI_VALUE; - } - else if((srcclk == RCC_LPTIM1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if ((srcclk == RCC_LPTIM1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for LPTIM1 */ - else - { - frequency = 0U; - } - break; - - case RCC_PERIPHCLK_LPTIM2: - /* Get the current LPTIM2 source */ - srcclk = __HAL_RCC_GET_LPTIM2_SOURCE(); - - if(srcclk == RCC_LPTIM2CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if((srcclk == RCC_LPTIM2CLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) - { - frequency = LSI_VALUE; - } - else if((srcclk == RCC_LPTIM2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - else if ((srcclk == RCC_LPTIM2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) - { - frequency = LSE_VALUE; - } - /* Clock not enabled for LPTIM2 */ - else - { - frequency = 0U; - } - break; - -#if defined(SWPMI1) - - case RCC_PERIPHCLK_SWPMI1: - /* Get the current SWPMI1 source */ - srcclk = __HAL_RCC_GET_SWPMI1_SOURCE(); - - if(srcclk == RCC_SWPMI1CLKSOURCE_PCLK1) - { - frequency = HAL_RCC_GetPCLK1Freq(); - } - else if((srcclk == RCC_SWPMI1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) - { - frequency = HSI_VALUE; - } - /* Clock not enabled for SWPMI1 */ - else - { - frequency = 0U; - } - break; - -#endif /* SWPMI1 */ - -#if defined(OCTOSPI1) || defined(OCTOSPI2) - - case RCC_PERIPHCLK_OSPI: - /* Get the current OctoSPI clock source */ - srcclk = __HAL_RCC_GET_OSPI_SOURCE(); - - if(srcclk == RCC_OSPICLKSOURCE_SYSCLK) - { - frequency = HAL_RCC_GetSysClockFreq(); - } - else if((srcclk == RCC_OSPICLKSOURCE_MSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_MSIRDY))) - { - /*MSI frequency range in HZ*/ - frequency = MSIRangeTable[(__HAL_RCC_GET_MSI_RANGE() >> 4U)]; - } - else if(srcclk == RCC_OSPICLKSOURCE_PLL) - { - if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY) && HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) - { - /* f(PLL Source) / PLLM */ - pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); - /* f(PLL48M1CLK) = f(VCO input) * PLLN / PLLQ */ - plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; - frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos) + 1U) << 1U); - } - else - { - frequency = 0U; - } - } - /* Clock not enabled for OctoSPI */ - else - { - frequency = 0U; - } - break; - -#endif /* OCTOSPI1 || OCTOSPI2 */ - - default: - break; - } - } - - return(frequency); -} - -/** - * @} - */ - -/** @defgroup RCCEx_Exported_Functions_Group2 Extended Clock management functions - * @brief Extended Clock management functions - * -@verbatim - =============================================================================== - ##### Extended clock management functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the - activation or deactivation of MSI PLL-mode, PLLSAI1, PLLSAI2, LSE CSS, - Low speed clock output and clock after wake-up from STOP mode. -@endverbatim - * @{ - */ - -/** - * @brief Enable PLLSAI1. - * @param PLLSAI1Init pointer to an RCC_PLLSAI1InitTypeDef structure that - * contains the configuration information for the PLLSAI1 - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI1(RCC_PLLSAI1InitTypeDef *PLLSAI1Init) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */ - assert_param(IS_RCC_PLLSAI1SOURCE(PLLSAI1Init->PLLSAI1Source)); - assert_param(IS_RCC_PLLSAI1M_VALUE(PLLSAI1Init->PLLSAI1M)); - assert_param(IS_RCC_PLLSAI1N_VALUE(PLLSAI1Init->PLLSAI1N)); - assert_param(IS_RCC_PLLSAI1P_VALUE(PLLSAI1Init->PLLSAI1P)); - assert_param(IS_RCC_PLLSAI1Q_VALUE(PLLSAI1Init->PLLSAI1Q)); - assert_param(IS_RCC_PLLSAI1R_VALUE(PLLSAI1Init->PLLSAI1R)); - assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PLLSAI1Init->PLLSAI1ClockOut)); - - /* Disable the PLLSAI1 */ - __HAL_RCC_PLLSAI1_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI1 is ready to be updated */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI1 Multiplication factor N */ - /* Configure the PLLSAI1 Division factors M, P, Q and R */ - __HAL_RCC_PLLSAI1_CONFIG(PLLSAI1Init->PLLSAI1M, PLLSAI1Init->PLLSAI1N, PLLSAI1Init->PLLSAI1P, PLLSAI1Init->PLLSAI1Q, PLLSAI1Init->PLLSAI1R); -#else - /* Configure the PLLSAI1 Multiplication factor N */ - /* Configure the PLLSAI1 Division factors P, Q and R */ - __HAL_RCC_PLLSAI1_CONFIG(PLLSAI1Init->PLLSAI1N, PLLSAI1Init->PLLSAI1P, PLLSAI1Init->PLLSAI1Q, PLLSAI1Init->PLLSAI1R); -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - /* Configure the PLLSAI1 Clock output(s) */ - __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PLLSAI1Init->PLLSAI1ClockOut); - - /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/ - __HAL_RCC_PLLSAI1_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI1 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - } - - return status; -} - -/** - * @brief Disable PLLSAI1. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI1(void) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* Disable the PLLSAI1 */ - __HAL_RCC_PLLSAI1_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI1 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - /* Disable the PLLSAI1 Clock outputs */ - __HAL_RCC_PLLSAI1CLKOUT_DISABLE(RCC_PLLSAI1CFGR_PLLSAI1PEN|RCC_PLLSAI1CFGR_PLLSAI1QEN|RCC_PLLSAI1CFGR_PLLSAI1REN); - - /* Reset PLL source to save power if no PLLs on */ - if((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RESET) -#if defined(RCC_PLLSAI2_SUPPORT) - && - (READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == RESET) -#endif /* RCC_PLLSAI2_SUPPORT */ - ) - { - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); - } - - return status; -} - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** - * @brief Enable PLLSAI2. - * @param PLLSAI2Init pointer to an RCC_PLLSAI2InitTypeDef structure that - * contains the configuration information for the PLLSAI2 - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI2(RCC_PLLSAI2InitTypeDef *PLLSAI2Init) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* check for PLLSAI2 Parameters used to output PLLSAI2CLK */ - assert_param(IS_RCC_PLLSAI2SOURCE(PLLSAI2Init->PLLSAI2Source)); - assert_param(IS_RCC_PLLSAI2M_VALUE(PLLSAI2Init->PLLSAI2M)); - assert_param(IS_RCC_PLLSAI2N_VALUE(PLLSAI2Init->PLLSAI2N)); - assert_param(IS_RCC_PLLSAI2P_VALUE(PLLSAI2Init->PLLSAI2P)); -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - assert_param(IS_RCC_PLLSAI2Q_VALUE(PLLSAI2Init->PLLSAI2Q)); -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ - assert_param(IS_RCC_PLLSAI2R_VALUE(PLLSAI2Init->PLLSAI2R)); - assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PLLSAI2Init->PLLSAI2ClockOut)); - - /* Disable the PLLSAI2 */ - __HAL_RCC_PLLSAI2_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready to be updated */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) && defined(RCC_PLLSAI2Q_DIV_SUPPORT) - /* Configure the PLLSAI2 Multiplication factor N */ - /* Configure the PLLSAI2 Division factors M, P, Q and R */ - __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2M, PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2Q, PLLSAI2Init->PLLSAI2R); -#elif defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI2 Multiplication factor N */ - /* Configure the PLLSAI2 Division factors M, P and R */ - __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2M, PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2R); -#elif defined(RCC_PLLSAI2Q_DIV_SUPPORT) - /* Configure the PLLSAI2 Multiplication factor N */ - /* Configure the PLLSAI2 Division factors P, Q and R */ - __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2Q, PLLSAI2Init->PLLSAI2R); -#else - /* Configure the PLLSAI2 Multiplication factor N */ - /* Configure the PLLSAI2 Division factors P and R */ - __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2R); -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT && RCC_PLLSAI2Q_DIV_SUPPORT */ - /* Configure the PLLSAI2 Clock output(s) */ - __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PLLSAI2Init->PLLSAI2ClockOut); - - /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/ - __HAL_RCC_PLLSAI2_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - } - - return status; -} - -/** - * @brief Disable PLLISAI2. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI2(void) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* Disable the PLLSAI2 */ - __HAL_RCC_PLLSAI2_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - /* Disable the PLLSAI2 Clock outputs */ -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - __HAL_RCC_PLLSAI2CLKOUT_DISABLE(RCC_PLLSAI2CFGR_PLLSAI2PEN|RCC_PLLSAI2CFGR_PLLSAI2QEN|RCC_PLLSAI2CFGR_PLLSAI2REN); -#else - __HAL_RCC_PLLSAI2CLKOUT_DISABLE(RCC_PLLSAI2CFGR_PLLSAI2PEN|RCC_PLLSAI2CFGR_PLLSAI2REN); -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT && RCC_PLLSAI2Q_DIV_SUPPORT */ - - /* Reset PLL source to save power if no PLLs on */ - if((READ_BIT(RCC->CR, RCC_CR_PLLRDY) == RESET) - && - (READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == RESET) - ) - { - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); - } - - return status; -} - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** - * @brief Configure the oscillator clock source for wakeup from Stop and CSS backup clock. - * @param WakeUpClk Wakeup clock - * This parameter can be one of the following values: - * @arg @ref RCC_STOP_WAKEUPCLOCK_MSI MSI oscillator selection - * @arg @ref RCC_STOP_WAKEUPCLOCK_HSI HSI oscillator selection - * @note This function shall not be called after the Clock Security System on HSE has been - * enabled. - * @retval None - */ -void HAL_RCCEx_WakeUpStopCLKConfig(uint32_t WakeUpClk) -{ - assert_param(IS_RCC_STOP_WAKEUPCLOCK(WakeUpClk)); - - __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(WakeUpClk); -} - -/** - * @brief Configure the MSI range after standby mode. - * @note After Standby its frequency can be selected between 4 possible values (1, 2, 4 or 8 MHz). - * @param MSIRange MSI range - * This parameter can be one of the following values: - * @arg @ref RCC_MSIRANGE_4 Range 4 around 1 MHz - * @arg @ref RCC_MSIRANGE_5 Range 5 around 2 MHz - * @arg @ref RCC_MSIRANGE_6 Range 6 around 4 MHz (reset value) - * @arg @ref RCC_MSIRANGE_7 Range 7 around 8 MHz - * @retval None - */ -void HAL_RCCEx_StandbyMSIRangeConfig(uint32_t MSIRange) -{ - assert_param(IS_RCC_MSI_STANDBY_CLOCK_RANGE(MSIRange)); - - __HAL_RCC_MSI_STANDBY_RANGE_CONFIG(MSIRange); -} - -/** - * @brief Enable the LSE Clock Security System. - * @note Prior to enable the LSE Clock Security System, LSE oscillator is to be enabled - * with HAL_RCC_OscConfig() and the LSE oscillator clock is to be selected as RTC - * clock with HAL_RCCEx_PeriphCLKConfig(). - * @retval None - */ -void HAL_RCCEx_EnableLSECSS(void) -{ - SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; -} - -/** - * @brief Disable the LSE Clock Security System. - * @note LSE Clock Security System can only be disabled after a LSE failure detection. - * @retval None - */ -void HAL_RCCEx_DisableLSECSS(void) -{ - CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; - - /* Disable LSE CSS IT if any */ - __HAL_RCC_DISABLE_IT(RCC_IT_LSECSS); -} - -/** - * @brief Enable the LSE Clock Security System Interrupt & corresponding EXTI line. - * @note LSE Clock Security System Interrupt is mapped on RTC EXTI line 19 - * @retval None - */ -void HAL_RCCEx_EnableLSECSS_IT(void) -{ - /* Enable LSE CSS */ - SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; - - /* Enable LSE CSS IT */ - __HAL_RCC_ENABLE_IT(RCC_IT_LSECSS); - - /* Enable IT on EXTI Line 19 */ - __HAL_RCC_LSECSS_EXTI_ENABLE_IT(); - __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE(); -} - -/** - * @brief Handle the RCC LSE Clock Security System interrupt request. - * @retval None - */ -void HAL_RCCEx_LSECSS_IRQHandler(void) -{ - /* Check RCC LSE CSSF flag */ - if(__HAL_RCC_GET_IT(RCC_IT_LSECSS)) - { - /* RCC LSE Clock Security System interrupt user callback */ - HAL_RCCEx_LSECSS_Callback(); - - /* Clear RCC LSE CSS pending bit */ - __HAL_RCC_CLEAR_IT(RCC_IT_LSECSS); - } -} - -/** - * @brief RCCEx LSE Clock Security System interrupt callback. - * @retval none - */ -__weak void HAL_RCCEx_LSECSS_Callback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the @ref HAL_RCCEx_LSECSS_Callback should be implemented in the user file - */ -} - -/** - * @brief Select the Low Speed clock source to output on LSCO pin (PA2). - * @param LSCOSource specifies the Low Speed clock source to output. - * This parameter can be one of the following values: - * @arg @ref RCC_LSCOSOURCE_LSI LSI clock selected as LSCO source - * @arg @ref RCC_LSCOSOURCE_LSE LSE clock selected as LSCO source - * @retval None - */ -void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource) -{ - GPIO_InitTypeDef GPIO_InitStruct; - FlagStatus pwrclkchanged = RESET; - FlagStatus backupchanged = RESET; - - /* Check the parameters */ - assert_param(IS_RCC_LSCOSOURCE(LSCOSource)); - - /* LSCO Pin Clock Enable */ - __LSCO_CLK_ENABLE(); - - /* Configue the LSCO pin in analog mode */ - GPIO_InitStruct.Pin = LSCO_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(LSCO_GPIO_PORT, &GPIO_InitStruct); - - /* Update LSCOSEL clock source in Backup Domain control register */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - pwrclkchanged = SET; - } - if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - { - HAL_PWR_EnableBkUpAccess(); - backupchanged = SET; - } - - MODIFY_REG(RCC->BDCR, RCC_BDCR_LSCOSEL | RCC_BDCR_LSCOEN, LSCOSource | RCC_BDCR_LSCOEN); - - if(backupchanged == SET) - { - HAL_PWR_DisableBkUpAccess(); - } - if(pwrclkchanged == SET) - { - __HAL_RCC_PWR_CLK_DISABLE(); - } -} - -/** - * @brief Disable the Low Speed clock output. - * @retval None - */ -void HAL_RCCEx_DisableLSCO(void) -{ - FlagStatus pwrclkchanged = RESET; - FlagStatus backupchanged = RESET; - - /* Update LSCOEN bit in Backup Domain control register */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - pwrclkchanged = SET; - } - if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) - { - /* Enable access to the backup domain */ - HAL_PWR_EnableBkUpAccess(); - backupchanged = SET; - } - - CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSCOEN); - - /* Restore previous configuration */ - if(backupchanged == SET) - { - /* Disable access to the backup domain */ - HAL_PWR_DisableBkUpAccess(); - } - if(pwrclkchanged == SET) - { - __HAL_RCC_PWR_CLK_DISABLE(); - } -} - -/** - * @brief Enable the PLL-mode of the MSI. - * @note Prior to enable the PLL-mode of the MSI for automatic hardware - * calibration LSE oscillator is to be enabled with HAL_RCC_OscConfig(). - * @retval None - */ -void HAL_RCCEx_EnableMSIPLLMode(void) -{ - SET_BIT(RCC->CR, RCC_CR_MSIPLLEN) ; -} - -/** - * @brief Disable the PLL-mode of the MSI. - * @note PLL-mode of the MSI is automatically reset when LSE oscillator is disabled. - * @retval None - */ -void HAL_RCCEx_DisableMSIPLLMode(void) -{ - CLEAR_BIT(RCC->CR, RCC_CR_MSIPLLEN) ; -} - -/** - * @} - */ - -#if defined(CRS) - -/** @defgroup RCCEx_Exported_Functions_Group3 Extended Clock Recovery System Control functions - * @brief Extended Clock Recovery System Control functions - * -@verbatim - =============================================================================== - ##### Extended Clock Recovery System Control functions ##### - =============================================================================== - [..] - For devices with Clock Recovery System feature (CRS), RCC Extention HAL driver can be used as follows: - - (#) In System clock config, HSI48 needs to be enabled - - (#) Enable CRS clock in IP MSP init which will use CRS functions - - (#) Call CRS functions as follows: - (##) Prepare synchronization configuration necessary for HSI48 calibration - (+++) Default values can be set for frequency Error Measurement (reload and error limit) - and also HSI48 oscillator smooth trimming. - (+++) Macro __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate - directly reload value with target and sychronization frequencies values - (##) Call function HAL_RCCEx_CRSConfig which - (+++) Resets CRS registers to their default values. - (+++) Configures CRS registers with synchronization configuration - (+++) Enables automatic calibration and frequency error counter feature - Note: When using USB LPM (Link Power Management) and the device is in Sleep mode, the - periodic USB SOF will not be generated by the host. No SYNC signal will therefore be - provided to the CRS to calibrate the HSI48 on the run. To guarantee the required clock - precision after waking up from Sleep mode, the LSE or reference clock on the GPIOs - should be used as SYNC signal. - - (##) A polling function is provided to wait for complete synchronization - (+++) Call function HAL_RCCEx_CRSWaitSynchronization() - (+++) According to CRS status, user can decide to adjust again the calibration or continue - application if synchronization is OK - - (#) User can retrieve information related to synchronization in calling function - HAL_RCCEx_CRSGetSynchronizationInfo() - - (#) Regarding synchronization status and synchronization information, user can try a new calibration - in changing synchronization configuration and call again HAL_RCCEx_CRSConfig. - Note: When the SYNC event is detected during the downcounting phase (before reaching the zero value), - it means that the actual frequency is lower than the target (and so, that the TRIM value should be - incremented), while when it is detected during the upcounting phase it means that the actual frequency - is higher (and that the TRIM value should be decremented). - - (#) In interrupt mode, user can resort to the available macros (__HAL_RCC_CRS_XXX_IT). Interrupts will go - through CRS Handler (CRS_IRQn/CRS_IRQHandler) - (++) Call function HAL_RCCEx_CRSConfig() - (++) Enable CRS_IRQn (thanks to NVIC functions) - (++) Enable CRS interrupt (__HAL_RCC_CRS_ENABLE_IT) - (++) Implement CRS status management in the following user callbacks called from - HAL_RCCEx_CRS_IRQHandler(): - (+++) HAL_RCCEx_CRS_SyncOkCallback() - (+++) HAL_RCCEx_CRS_SyncWarnCallback() - (+++) HAL_RCCEx_CRS_ExpectedSyncCallback() - (+++) HAL_RCCEx_CRS_ErrorCallback() - - (#) To force a SYNC EVENT, user can use the function HAL_RCCEx_CRSSoftwareSynchronizationGenerate(). - This function can be called before calling HAL_RCCEx_CRSConfig (for instance in Systick handler) - -@endverbatim - * @{ - */ - -/** - * @brief Start automatic synchronization for polling mode - * @param pInit Pointer on RCC_CRSInitTypeDef structure - * @retval None - */ -void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit) -{ - uint32_t value = 0; - - /* Check the parameters */ - assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler)); - assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source)); - assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity)); - assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue)); - assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue)); - assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue)); - - /* CONFIGURATION */ - - /* Before configuration, reset CRS registers to their default values*/ - __HAL_RCC_CRS_FORCE_RESET(); - __HAL_RCC_CRS_RELEASE_RESET(); - - /* Set the SYNCDIV[2:0] bits according to Prescaler value */ - /* Set the SYNCSRC[1:0] bits according to Source value */ - /* Set the SYNCSPOL bit according to Polarity value */ - value = (pInit->Prescaler | pInit->Source | pInit->Polarity); - /* Set the RELOAD[15:0] bits according to ReloadValue value */ - value |= pInit->ReloadValue; - /* Set the FELIM[7:0] bits according to ErrorLimitValue value */ - value |= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_Pos); - WRITE_REG(CRS->CFGR, value); - - /* Adjust HSI48 oscillator smooth trimming */ - /* Set the TRIM[5:0] bits according to RCC_CRS_HSI48CalibrationValue value */ - MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_Pos)); - - /* START AUTOMATIC SYNCHRONIZATION*/ - - /* Enable Automatic trimming & Frequency error counter */ - SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); -} - -/** - * @brief Generate the software synchronization event - * @retval None - */ -void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void) -{ - SET_BIT(CRS->CR, CRS_CR_SWSYNC); -} - -/** - * @brief Return synchronization info - * @param pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure - * @retval None - */ -void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo) -{ - /* Check the parameter */ - assert_param(pSynchroInfo != NULL); - - /* Get the reload value */ - pSynchroInfo->ReloadValue = (READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); - - /* Get HSI48 oscillator smooth trimming */ - pSynchroInfo->HSI48CalibrationValue = (READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); - - /* Get Frequency error capture */ - pSynchroInfo->FreqErrorCapture = (READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos); - - /* Get Frequency error direction */ - pSynchroInfo->FreqErrorDirection = (READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); -} - -/** -* @brief Wait for CRS Synchronization status. -* @param Timeout Duration of the timeout -* @note Timeout is based on the maximum time to receive a SYNC event based on synchronization -* frequency. -* @note If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned. -* @retval Combination of Synchronization status -* This parameter can be a combination of the following values: -* @arg @ref RCC_CRS_TIMEOUT -* @arg @ref RCC_CRS_SYNCOK -* @arg @ref RCC_CRS_SYNCWARN -* @arg @ref RCC_CRS_SYNCERR -* @arg @ref RCC_CRS_SYNCMISS -* @arg @ref RCC_CRS_TRIMOVF -*/ -uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout) -{ - uint32_t crsstatus = RCC_CRS_NONE; - uint32_t tickstart = 0U; - - /* Get timeout */ - tickstart = HAL_GetTick(); - - /* Wait for CRS flag or timeout detection */ - do - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) - { - crsstatus = RCC_CRS_TIMEOUT; - } - } - /* Check CRS SYNCOK flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK)) - { - /* CRS SYNC event OK */ - crsstatus |= RCC_CRS_SYNCOK; - - /* Clear CRS SYNC event OK bit */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK); - } - - /* Check CRS SYNCWARN flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN)) - { - /* CRS SYNC warning */ - crsstatus |= RCC_CRS_SYNCWARN; - - /* Clear CRS SYNCWARN bit */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN); - } - - /* Check CRS TRIM overflow flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF)) - { - /* CRS SYNC Error */ - crsstatus |= RCC_CRS_TRIMOVF; - - /* Clear CRS Error bit */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF); - } - - /* Check CRS Error flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR)) - { - /* CRS SYNC Error */ - crsstatus |= RCC_CRS_SYNCERR; - - /* Clear CRS Error bit */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR); - } - - /* Check CRS SYNC Missed flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS)) - { - /* CRS SYNC Missed */ - crsstatus |= RCC_CRS_SYNCMISS; - - /* Clear CRS SYNC Missed bit */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS); - } - - /* Check CRS Expected SYNC flag */ - if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC)) - { - /* frequency error counter reached a zero value */ - __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC); - } - } while(RCC_CRS_NONE == crsstatus); - - return crsstatus; -} - -/** - * @brief Handle the Clock Recovery System interrupt request. - * @retval None - */ -void HAL_RCCEx_CRS_IRQHandler(void) -{ - uint32_t crserror = RCC_CRS_NONE; - /* Get current IT flags and IT sources values */ - uint32_t itflags = READ_REG(CRS->ISR); - uint32_t itsources = READ_REG(CRS->CR); - - /* Check CRS SYNCOK flag */ - if(((itflags & RCC_CRS_FLAG_SYNCOK) != RESET) && ((itsources & RCC_CRS_IT_SYNCOK) != RESET)) - { - /* Clear CRS SYNC event OK flag */ - WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC); - - /* user callback */ - HAL_RCCEx_CRS_SyncOkCallback(); - } - /* Check CRS SYNCWARN flag */ - else if(((itflags & RCC_CRS_FLAG_SYNCWARN) != RESET) && ((itsources & RCC_CRS_IT_SYNCWARN) != RESET)) - { - /* Clear CRS SYNCWARN flag */ - WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC); - - /* user callback */ - HAL_RCCEx_CRS_SyncWarnCallback(); - } - /* Check CRS Expected SYNC flag */ - else if(((itflags & RCC_CRS_FLAG_ESYNC) != RESET) && ((itsources & RCC_CRS_IT_ESYNC) != RESET)) - { - /* frequency error counter reached a zero value */ - WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC); - - /* user callback */ - HAL_RCCEx_CRS_ExpectedSyncCallback(); - } - /* Check CRS Error flags */ - else - { - if(((itflags & RCC_CRS_FLAG_ERR) != RESET) && ((itsources & RCC_CRS_IT_ERR) != RESET)) - { - if((itflags & RCC_CRS_FLAG_SYNCERR) != RESET) - { - crserror |= RCC_CRS_SYNCERR; - } - if((itflags & RCC_CRS_FLAG_SYNCMISS) != RESET) - { - crserror |= RCC_CRS_SYNCMISS; - } - if((itflags & RCC_CRS_FLAG_TRIMOVF) != RESET) - { - crserror |= RCC_CRS_TRIMOVF; - } - - /* Clear CRS Error flags */ - WRITE_REG(CRS->ICR, CRS_ICR_ERRC); - - /* user error callback */ - HAL_RCCEx_CRS_ErrorCallback(crserror); - } - } -} - -/** - * @brief RCCEx Clock Recovery System SYNCOK interrupt callback. - * @retval none - */ -__weak void HAL_RCCEx_CRS_SyncOkCallback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the @ref HAL_RCCEx_CRS_SyncOkCallback should be implemented in the user file - */ -} - -/** - * @brief RCCEx Clock Recovery System SYNCWARN interrupt callback. - * @retval none - */ -__weak void HAL_RCCEx_CRS_SyncWarnCallback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the @ref HAL_RCCEx_CRS_SyncWarnCallback should be implemented in the user file - */ -} - -/** - * @brief RCCEx Clock Recovery System Expected SYNC interrupt callback. - * @retval none - */ -__weak void HAL_RCCEx_CRS_ExpectedSyncCallback(void) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the @ref HAL_RCCEx_CRS_ExpectedSyncCallback should be implemented in the user file - */ -} - -/** - * @brief RCCEx Clock Recovery System Error interrupt callback. - * @param Error Combination of Error status. - * This parameter can be a combination of the following values: - * @arg @ref RCC_CRS_SYNCERR - * @arg @ref RCC_CRS_SYNCMISS - * @arg @ref RCC_CRS_TRIMOVF - * @retval none - */ -__weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(Error); - - /* NOTE : This function should not be modified, when the callback is needed, - the @ref HAL_RCCEx_CRS_ErrorCallback should be implemented in the user file - */ -} - -/** - * @} - */ - -#endif /* CRS */ - -/** - * @} - */ - -/** @addtogroup RCCEx_Private_Functions - * @{ - */ - -/** - * @brief Configure the parameters N & P & optionally M of PLLSAI1 and enable PLLSAI1 output clock(s). - * @param PllSai1 pointer to an RCC_PLLSAI1InitTypeDef structure that - * contains the configuration parameters N & P & optionally M as well as PLLSAI1 output clock(s) - * @param Divider divider parameter to be updated - * - * @note PLLSAI1 is temporary disable to apply new parameters - * - * @retval HAL status - */ -static HAL_StatusTypeDef RCCEx_PLLSAI1_Config(RCC_PLLSAI1InitTypeDef *PllSai1, uint32_t Divider) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */ - /* P, Q and R dividers are verified in each specific divider case below */ - assert_param(IS_RCC_PLLSAI1SOURCE(PllSai1->PLLSAI1Source)); - assert_param(IS_RCC_PLLSAI1M_VALUE(PllSai1->PLLSAI1M)); - assert_param(IS_RCC_PLLSAI1N_VALUE(PllSai1->PLLSAI1N)); - assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PllSai1->PLLSAI1ClockOut)); - - /* Check that PLLSAI1 clock source and divider M can be applied */ - if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_NONE) - { - /* PLL clock source and divider M already set, check that no request for change */ - if((__HAL_RCC_GET_PLL_OSCSOURCE() != PllSai1->PLLSAI1Source) - || - (PllSai1->PLLSAI1Source == RCC_PLLSOURCE_NONE) -#if !defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - || - (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U) != PllSai1->PLLSAI1M) -#endif - ) - { - status = HAL_ERROR; - } - } - else - { - /* Check PLLSAI1 clock source availability */ - switch(PllSai1->PLLSAI1Source) - { - case RCC_PLLSOURCE_MSI: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_MSIRDY)) - { - status = HAL_ERROR; - } - break; - case RCC_PLLSOURCE_HSI: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSIRDY)) - { - status = HAL_ERROR; - } - break; - case RCC_PLLSOURCE_HSE: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSERDY) && HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSEBYP)) - { - status = HAL_ERROR; - } - break; - default: - status = HAL_ERROR; - break; - } - - if(status == HAL_OK) - { -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* Set PLLSAI1 clock source */ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PllSai1->PLLSAI1Source); -#else - /* Set PLLSAI1 clock source and divider M */ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, PllSai1->PLLSAI1Source | (PllSai1->PLLSAI1M - 1U) << RCC_PLLCFGR_PLLM_Pos); -#endif - } - } - - if(status == HAL_OK) - { - /* Disable the PLLSAI1 */ - __HAL_RCC_PLLSAI1_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI1 is ready to be updated */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { - if(Divider == DIVIDER_P_UPDATE) - { - assert_param(IS_RCC_PLLSAI1P_VALUE(PllSai1->PLLSAI1P)); -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - - /* Configure the PLLSAI1 Division factor M, P and Multiplication factor N*/ -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1PDIV | RCC_PLLSAI1CFGR_PLLSAI1M, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (PllSai1->PLLSAI1P << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos) | - ((PllSai1->PLLSAI1M - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)); -#else - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1P | RCC_PLLSAI1CFGR_PLLSAI1M, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - ((PllSai1->PLLSAI1P >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos) | - ((PllSai1->PLLSAI1M - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)); -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -#else - /* Configure the PLLSAI1 Division factor P and Multiplication factor N*/ -#if defined(RCC_PLLSAI1P_DIV_2_31_SUPPORT) - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1PDIV, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (PllSai1->PLLSAI1P << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos)); -#else - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1P, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - ((PllSai1->PLLSAI1P >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos)); -#endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ - -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - } - else if(Divider == DIVIDER_Q_UPDATE) - { - assert_param(IS_RCC_PLLSAI1Q_VALUE(PllSai1->PLLSAI1Q)); -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI1 Division factor M, Q and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1Q | RCC_PLLSAI1CFGR_PLLSAI1M, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (((PllSai1->PLLSAI1Q >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | - ((PllSai1->PLLSAI1M - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)); -#else - /* Configure the PLLSAI1 Division factor Q and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1Q, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (((PllSai1->PLLSAI1Q >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos)); -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - } - else - { - assert_param(IS_RCC_PLLSAI1R_VALUE(PllSai1->PLLSAI1R)); -#if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI1 Division factor M, R and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1R | RCC_PLLSAI1CFGR_PLLSAI1M, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (((PllSai1->PLLSAI1R >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) | - ((PllSai1->PLLSAI1M - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)); -#else - /* Configure the PLLSAI1 Division factor R and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI1CFGR, - RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1R, - (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | - (((PllSai1->PLLSAI1R >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos)); -#endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ - } - - /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/ - __HAL_RCC_PLLSAI1_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI1 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { - /* Configure the PLLSAI1 Clock output(s) */ - __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PllSai1->PLLSAI1ClockOut); - } - } - } - - return status; -} - -#if defined(RCC_PLLSAI2_SUPPORT) - -/** - * @brief Configure the parameters N & P & optionally M of PLLSAI2 and enable PLLSAI2 output clock(s). - * @param PllSai2 pointer to an RCC_PLLSAI2InitTypeDef structure that - * contains the configuration parameters N & P & optionally M as well as PLLSAI2 output clock(s) - * @param Divider divider parameter to be updated - * - * @note PLLSAI2 is temporary disable to apply new parameters - * - * @retval HAL status - */ -static HAL_StatusTypeDef RCCEx_PLLSAI2_Config(RCC_PLLSAI2InitTypeDef *PllSai2, uint32_t Divider) -{ - uint32_t tickstart = 0U; - HAL_StatusTypeDef status = HAL_OK; - - /* check for PLLSAI2 Parameters used to output PLLSAI2CLK */ - /* P, Q and R dividers are verified in each specific divider case below */ - assert_param(IS_RCC_PLLSAI2SOURCE(PllSai2->PLLSAI2Source)); - assert_param(IS_RCC_PLLSAI2M_VALUE(PllSai2->PLLSAI2M)); - assert_param(IS_RCC_PLLSAI2N_VALUE(PllSai2->PLLSAI2N)); - assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PllSai2->PLLSAI2ClockOut)); - - /* Check that PLLSAI2 clock source and divider M can be applied */ - if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_NONE) - { - /* PLL clock source and divider M already set, check that no request for change */ - if((__HAL_RCC_GET_PLL_OSCSOURCE() != PllSai2->PLLSAI2Source) - || - (PllSai2->PLLSAI2Source == RCC_PLLSOURCE_NONE) -#if !defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - || - (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U) != PllSai2->PLLSAI2M) -#endif - ) - { - status = HAL_ERROR; - } - } - else - { - /* Check PLLSAI2 clock source availability */ - switch(PllSai2->PLLSAI2Source) - { - case RCC_PLLSOURCE_MSI: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_MSIRDY)) - { - status = HAL_ERROR; - } - break; - case RCC_PLLSOURCE_HSI: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSIRDY)) - { - status = HAL_ERROR; - } - break; - case RCC_PLLSOURCE_HSE: - if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSERDY) && HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSEBYP)) - { - status = HAL_ERROR; - } - break; - default: - status = HAL_ERROR; - break; - } - - if(status == HAL_OK) - { -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* Set PLLSAI2 clock source */ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PllSai2->PLLSAI2Source); -#else - /* Set PLLSAI2 clock source and divider M */ - MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, PllSai2->PLLSAI2Source | (PllSai2->PLLSAI2M - 1U) << RCC_PLLCFGR_PLLM_Pos); -#endif - } - } - - if(status == HAL_OK) - { - /* Disable the PLLSAI2 */ - __HAL_RCC_PLLSAI2_DISABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready to be updated */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { - if(Divider == DIVIDER_P_UPDATE) - { - assert_param(IS_RCC_PLLSAI2P_VALUE(PllSai2->PLLSAI2P)); -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - - /* Configure the PLLSAI2 Division factor M, P and Multiplication factor N*/ -#if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2PDIV | RCC_PLLSAI2CFGR_PLLSAI2M, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (PllSai2->PLLSAI2P << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos) | - ((PllSai2->PLLSAI2M - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)); -#else - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2P | RCC_PLLSAI2CFGR_PLLSAI2M, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - ((PllSai2->PLLSAI2P >> 4U) << RCC_PLLSAI2CFGR_PLLSAI2P_Pos) | - ((PllSai2->PLLSAI2M - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)); -#endif /* RCC_PLLSAI2P_DIV_2_31_SUPPORT */ - -#else - /* Configure the PLLSAI2 Division factor P and Multiplication factor N*/ -#if defined(RCC_PLLSAI2P_DIV_2_31_SUPPORT) - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2PDIV, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (PllSai2->PLLSAI2P << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos)); -#else - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2P, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - ((PllSai2->PLLSAI2P >> 4U) << RCC_PLLSAI2CFGR_PLLSAI2P_Pos)); -#endif /* RCC_PLLSAI2P_DIV_2_31_SUPPORT */ - -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - } -#if defined(RCC_PLLSAI2Q_DIV_SUPPORT) - else if(Divider == DIVIDER_Q_UPDATE) - { - assert_param(IS_RCC_PLLSAI2Q_VALUE(PllSai2->PLLSAI2Q)); -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI2 Division factor M, Q and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2Q | RCC_PLLSAI2CFGR_PLLSAI2M, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (((PllSai2->PLLSAI2Q >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2Q_Pos) | - ((PllSai2->PLLSAI2M - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)); -#else - /* Configure the PLLSAI2 Division factor Q and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2Q, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (((PllSai2->PLLSAI2Q >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2Q_Pos)); -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - } -#endif /* RCC_PLLSAI2Q_DIV_SUPPORT */ - else - { - assert_param(IS_RCC_PLLSAI2R_VALUE(PllSai2->PLLSAI2R)); -#if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) - /* Configure the PLLSAI2 Division factor M, R and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2R | RCC_PLLSAI2CFGR_PLLSAI2M, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (((PllSai2->PLLSAI2R >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | - ((PllSai2->PLLSAI2M - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)); -#else - /* Configure the PLLSAI2 Division factor R and Multiplication factor N*/ - MODIFY_REG(RCC->PLLSAI2CFGR, - RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2R, - (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | - (((PllSai2->PLLSAI2R >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos)); -#endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ - } - - /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/ - __HAL_RCC_PLLSAI2_ENABLE(); - - /* Get Start Tick*/ - tickstart = HAL_GetTick(); - - /* Wait till PLLSAI2 is ready */ - while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == RESET) - { - if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) - { - status = HAL_TIMEOUT; - break; - } - } - - if(status == HAL_OK) - { - /* Configure the PLLSAI2 Clock output(s) */ - __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PllSai2->PLLSAI2ClockOut); - } - } - } - - return status; -} - -#endif /* RCC_PLLSAI2_SUPPORT */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_RCC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c deleted file mode 100644 index b5df2809..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c +++ /dev/null @@ -1,527 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rng.c - * @author MCD Application Team - * @brief RNG HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Random Number Generator (RNG) peripheral: - * + Initialization/de-initialization functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The RNG HAL driver can be used as follows: - - (#) Enable the RNG controller clock using __HAL_RCC_RNG_CLK_ENABLE() macro - in HAL_RNG_MspInit(). - (#) Activate the RNG peripheral using HAL_RNG_Init() function. - (#) Wait until the 32-bit Random Number Generator contains a valid - random data using (polling/interrupt) mode. - (#) Get the 32 bit random number using HAL_RNG_GenerateRandomNumber() function. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RNG RNG - * @brief RNG HAL module driver. - * @{ - */ - -#ifdef HAL_RNG_MODULE_ENABLED - - - -/* Private types -------------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/** @defgroup RNG_Private_Constants RNG_Private_Constants - * @{ - */ -#define RNG_TIMEOUT_VALUE 2 -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup RNG_Exported_Functions - * @{ - */ - -/** @addtogroup RNG_Exported_Functions_Group1 - * @brief Initialization and de-initialization functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Initialize the RNG according to the specified parameters - in the RNG_InitTypeDef and create the associated handle - (+) DeInitialize the RNG peripheral - (+) Initialize the RNG MSP (MCU Specific Package) - (+) DeInitialize the RNG MSP - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the RNG peripheral and initialize the associated handle. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng) -{ - /* Check the RNG handle allocation */ - if(hrng == NULL) - { - return HAL_ERROR; - } - - assert_param(IS_RNG_ALL_INSTANCE(hrng->Instance)); -#if defined(RNG_CR_CED) - assert_param(IS_RNG_CED(hrng->Init.ClockErrorDetection)); -#endif /* defined(RNG_CR_CED) */ - - if(hrng->State == HAL_RNG_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hrng->Lock = HAL_UNLOCKED; - - /* Init the low level hardware */ - HAL_RNG_MspInit(hrng); - } - - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - -#if defined(RNG_CR_CED) - /* Clock Error Detection configuration */ - MODIFY_REG(hrng->Instance->CR, RNG_CR_CED, hrng->Init.ClockErrorDetection); -#endif /* defined(RNG_CR_CED) */ - - /* Enable the RNG Peripheral */ - __HAL_RNG_ENABLE(hrng); - - /* Initialize the RNG state */ - hrng->State = HAL_RNG_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief DeInitialize the RNG peripheral. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RNG_DeInit(RNG_HandleTypeDef *hrng) -{ - /* Check the RNG handle allocation */ - if(hrng == NULL) - { - return HAL_ERROR; - } - -#if defined(RNG_CR_CED) - /* Clear Clock Error Detection bit */ - CLEAR_BIT(hrng->Instance->CR, RNG_CR_CED); -#endif /* defined(RNG_CR_CED) */ - - /* Disable the RNG Peripheral */ - CLEAR_BIT(hrng->Instance->CR, RNG_CR_IE | RNG_CR_RNGEN); - - /* Clear RNG interrupt status flags */ - CLEAR_BIT(hrng->Instance->SR, RNG_SR_CEIS | RNG_SR_SEIS); - - /* DeInit the low level hardware */ - HAL_RNG_MspDeInit(hrng); - - /* Update the RNG state */ - hrng->State = HAL_RNG_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hrng); - - /* Return the function status */ - return HAL_OK; -} - -/** - * @brief Initialize the RNG MSP. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - */ -__weak void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrng); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_MspInit must be implemented in the user file. - */ -} - -/** - * @brief DeInitialize the RNG MSP. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - */ -__weak void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrng); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_MspDeInit must be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @addtogroup RNG_Exported_Functions_Group2 - * @brief Management functions. - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Get the 32 bit Random number - (+) Get the 32 bit Random number with interrupt enabled - (+) Handle RNG interrupt request - -@endverbatim - * @{ - */ - -/** - * @brief Generate a 32-bit random number. - * @note Each time the random number data is read the RNG_FLAG_DRDY flag - * is automatically cleared. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @param random32bit: pointer to generated random number variable if successful. - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit) -{ - uint32_t tickstart = 0; - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(hrng); - - /* Check RNS peripheral state */ - if(hrng->State == HAL_RNG_STATE_READY) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Check if data register contains valid random data */ - while(__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET) - { - if((HAL_GetTick() - tickstart ) > RNG_TIMEOUT_VALUE) - { - hrng->State = HAL_RNG_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - return HAL_TIMEOUT; - } - } - - /* Get a 32bit Random number */ - hrng->RandomNumber = hrng->Instance->DR; - *random32bit = hrng->RandomNumber; - - hrng->State = HAL_RNG_STATE_READY; - } - else - { - status = HAL_ERROR; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - return status; -} - -/** - * @brief Generate a 32-bit random number in interrupt mode. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(hrng); - - /* Check RNG peripheral state */ - if(hrng->State == HAL_RNG_STATE_READY) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - /* Enable the RNG Interrupts: Data Ready, Clock error, Seed error */ - __HAL_RNG_ENABLE_IT(hrng); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - status = HAL_ERROR; - } - - return status; -} - -/** - * @brief Handle RNG interrupt request. - * @note In the case of a clock error, the RNG is no more able to generate - * random numbers because the PLL48CLK clock is not correct. User has - * to check that the clock controller is correctly configured to provide - * the RNG clock and clear the CEIS bit using __HAL_RNG_CLEAR_IT(). - * The clock error has no impact on the previously generated - * random numbers, and the RNG_DR register contents can be used. - * @note In the case of a seed error, the generation of random numbers is - * interrupted as long as the SECS bit is '1'. If a number is - * available in the RNG_DR register, it must not be used because it may - * not have enough entropy. In this case, it is recommended to clear the - * SEIS bit using __HAL_RNG_CLEAR_IT(), then disable and enable - * the RNG peripheral to reinitialize and restart the RNG. - * @note User-written HAL_RNG_ErrorCallback() API is called once whether SEIS - * or CEIS are set. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - - */ -void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng) -{ - /* RNG clock error interrupt occurred */ - if((__HAL_RNG_GET_IT(hrng, RNG_IT_CEI) != RESET) || (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_ERROR; - - HAL_RNG_ErrorCallback(hrng); - - /* Clear the clock error flag */ - __HAL_RNG_CLEAR_IT(hrng, RNG_IT_CEI|RNG_IT_SEI); - - } - - /* Check RNG data ready interrupt occurred */ - if(__HAL_RNG_GET_IT(hrng, RNG_IT_DRDY) != RESET) - { - /* Generate random number once, so disable the IT */ - __HAL_RNG_DISABLE_IT(hrng); - - /* Get the 32bit Random number (DRDY flag automatically cleared) */ - hrng->RandomNumber = hrng->Instance->DR; - - if(hrng->State != HAL_RNG_STATE_ERROR) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_READY; - - /* Data Ready callback */ - HAL_RNG_ReadyDataCallback(hrng, hrng->RandomNumber); - } - } -} - -/** - * @brief Return generated random number in polling mode (Obsolete). - * @note Use HAL_RNG_GenerateRandomNumber() API instead. - * @param hrng: pointer to a RNG_HandleTypeDef structure that contains - * the configuration information for RNG. - * @retval random value - */ -uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng) -{ - if(HAL_RNG_GenerateRandomNumber(hrng, &(hrng->RandomNumber)) == HAL_OK) - { - return hrng->RandomNumber; - } - else - { - return 0; - } -} - - -/** - * @brief Return a 32-bit random number with interrupt enabled (Obsolete). - * @note Use HAL_RNG_GenerateRandomNumber_IT() API instead. - * @param hrng: RNG handle - * @retval 32-bit random number - */ -uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng) -{ - uint32_t random32bit = 0; - - /* Process locked */ - __HAL_LOCK(hrng); - - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - - /* Get a 32bit Random number */ - random32bit = hrng->Instance->DR; - - /* Enable the RNG Interrupts: Data Ready, Clock error, Seed error */ - __HAL_RNG_ENABLE_IT(hrng); - - /* Return the 32 bit random number */ - return random32bit; -} - - - -/** - * @brief Read latest generated random number. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval random value - */ -uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng) -{ - return(hrng->RandomNumber); -} - -/** - * @brief Data Ready callback in non-blocking mode. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @param random32bit: generated random value - * @retval None - */ -__weak void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef *hrng, uint32_t random32bit) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrng); - UNUSED(random32bit); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_ReadyDataCallback must be implemented in the user file. - */ -} - -/** - * @brief RNG error callback. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - */ -__weak void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrng); - - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_ErrorCallback must be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @addtogroup RNG_Exported_Functions_Group3 - * @brief Peripheral State functions. - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Return the RNG handle state. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL state - */ -HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng) -{ - /* Return RNG handle state */ - return hrng->State; -} - -/** - * @} - */ - -/** - * @} - */ - - -#endif /* HAL_RNG_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c deleted file mode 100644 index eb08d776..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc.c +++ /dev/null @@ -1,1539 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rtc.c - * @author MCD Application Team - * @brief RTC HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Real-Time Clock (RTC) peripheral: - * + Initialization - * + Calendar (Time and Date) configuration - * + Alarms (Alarm A and Alarm B) configuration - * + WakeUp Timer configuration - * + TimeStamp configuration - * + Tampers configuration - * + Backup Data Registers configuration - * + RTC Tamper and TimeStamp Pins Selection - * + Interrupts and flags management - * - @verbatim - =============================================================================== - ##### RTC Operating Condition ##### - =============================================================================== - [..] The real-time clock (RTC) and the RTC backup registers can be powered - from the VBAT voltage when the main VDD supply is powered off. - To retain the content of the RTC backup registers and supply the RTC - when VDD is turned off, VBAT pin can be connected to an optional - standby voltage supplied by a battery or by another source. - - ##### Backup Domain Reset ##### - =============================================================================== - [..] The backup domain reset sets all RTC registers and the RCC_BDCR register - to their reset values. - A backup domain reset is generated when one of the following events occurs: - (#) Software reset, triggered by setting the BDRST bit in the - RCC Backup domain control register (RCC_BDCR). - (#) VDD or VBAT power on, if both supplies have previously been powered off. - (#) Tamper detection event resets all data backup registers. - - ##### Backup Domain Access ##### - =================================================================== - [..] After reset, the backup domain (RTC registers, RTC backup data - registers and backup SRAM) is protected against possible unwanted write - accesses. - - [..] To enable access to the RTC Domain and RTC registers, proceed as follows: - (#) Call the function HAL_RCCEx_PeriphCLKConfig with RCC_PERIPHCLK_RTC for - PeriphClockSelection and select RTCClockSelection (LSE, LSI or HSEdiv32) - (#) Enable RTC Clock using the __HAL_RCC_RTC_ENABLE() macro. - - ##### How to use RTC Driver ##### - =================================================================== - [..] - (#) Enable the RTC domain access (see description in the section above). - (#) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour - format using the HAL_RTC_Init() function. - - *** Time and Date configuration *** - =================================== - [..] - (#) To configure the RTC Calendar (Time and Date) use the HAL_RTC_SetTime() - and HAL_RTC_SetDate() functions. - (#) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate() functions. - - *** Alarm configuration *** - =========================== - [..] - (#) To configure the RTC Alarm use the HAL_RTC_SetAlarm() function. - You can also configure the RTC Alarm with interrupt mode using the - HAL_RTC_SetAlarm_IT() function. - (#) To read the RTC Alarm, use the HAL_RTC_GetAlarm() function. - - ##### RTC and low power modes ##### - =================================================================== - [..] The MCU can be woken up from a low power mode by an RTC alternate - function. - [..] The RTC alternate functions are the RTC alarms (Alarm A and Alarm B), - RTC wakeup, RTC tamper event detection and RTC time stamp event detection. - These RTC alternate functions can wake up the system from the Stop and - Standby low power modes. - [..] The system can also wake up from low power modes without depending - on an external interrupt (Auto-wakeup mode), by using the RTC alarm - or the RTC wakeup events. - [..] The RTC provides a programmable time base for waking up from the - Stop or Standby mode at regular intervals. - Wakeup from STOP and Standby modes is possible only when the RTC clock source - is LSE or LSI. - - @endverbatim - - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RTC RTC - * @brief RTC HAL module driver - * @{ - */ - -#ifdef HAL_RTC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup RTC_Exported_Functions RTC Exported Functions - * @{ - */ - -/** @defgroup RTC_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provide functions allowing to initialize and configure the - RTC Prescaler (Synchronous and Asynchronous), RTC Hour format, disable - RTC registers Write protection, enter and exit the RTC initialization mode, - RTC registers synchronization check and reference clock detection enable. - (#) The RTC Prescaler is programmed to generate the RTC 1Hz time base. - It is split into 2 programmable prescalers to minimize power consumption. - (++) A 7-bit asynchronous prescaler and a 15-bit synchronous prescaler. - (++) When both prescalers are used, it is recommended to configure the - asynchronous prescaler to a high value to minimize power consumption. - (#) All RTC registers are Write protected. Writing to the RTC registers - is enabled by writing a key into the Write Protection register, RTC_WPR. - (#) To configure the RTC Calendar, user application should enter - initialization mode. In this mode, the calendar counter is stopped - and its value can be updated. When the initialization sequence is - complete, the calendar restarts counting after 4 RTCCLK cycles. - (#) To read the calendar through the shadow registers after Calendar - initialization, calendar update or after wakeup from low power modes - the software must first clear the RSF flag. The software must then - wait until it is set again before reading the calendar, which means - that the calendar registers have been correctly copied into the - RTC_TR and RTC_DR shadow registers. The HAL_RTC_WaitForSynchro() function - implements the above software sequence (RSF clear and RSF check). - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the RTC according to the specified parameters - * in the RTC_InitTypeDef structure and initialize the associated handle. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) -{ - /* Check the RTC peripheral state */ - if(hrtc == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); - assert_param(IS_RTC_HOUR_FORMAT(hrtc->Init.HourFormat)); - assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv)); - assert_param(IS_RTC_SYNCH_PREDIV(hrtc->Init.SynchPrediv)); - assert_param(IS_RTC_OUTPUT(hrtc->Init.OutPut)); - assert_param(IS_RTC_OUTPUT_REMAP(hrtc->Init.OutPutRemap)); - assert_param(IS_RTC_OUTPUT_POL(hrtc->Init.OutPutPolarity)); - assert_param(IS_RTC_OUTPUT_TYPE(hrtc->Init.OutPutType)); - - if(hrtc->State == HAL_RTC_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hrtc->Lock = HAL_UNLOCKED; - - /* Initialize RTC MSP */ - HAL_RTC_MspInit(hrtc); - } - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } - else - { - /* Clear RTC_CR FMT, OSEL and POL Bits */ - hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT | RTC_CR_OSEL | RTC_CR_POL)); - /* Set RTC_CR register */ - hrtc->Instance->CR |= (uint32_t)(hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity); - - /* Configure the RTC PRER */ - hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv); - hrtc->Instance->PRER |= (uint32_t)(hrtc->Init.AsynchPrediv << 16); - - /* Exit Initialization mode */ - hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); - - /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) - { - if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } - } - - hrtc->Instance->OR &= (uint32_t)~(RTC_OR_ALARMOUTTYPE | RTC_OR_OUT_RMP); - hrtc->Instance->OR |= (uint32_t)(hrtc->Init.OutPutType | hrtc->Init.OutPutRemap); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; - } -} - -/** - * @brief DeInitialize the RTC peripheral. - * @param hrtc: RTC handle - * @note This function doesn't reset the RTC Backup Data registers. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_ALL_INSTANCE(hrtc->Instance)); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } - else - { - /* Reset TR, DR and CR registers */ - hrtc->Instance->TR = (uint32_t)0x00000000; - hrtc->Instance->DR = ((uint32_t)(RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0)); - /* Reset All CR bits except CR[2:0] */ - hrtc->Instance->CR &= RTC_CR_WUCKSEL; - - tickstart = HAL_GetTick(); - - /* Wait till WUTWF flag is set and if Time out is reached exit */ - while(((hrtc->Instance->ISR) & RTC_ISR_WUTWF) == (uint32_t)RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - return HAL_TIMEOUT; - } - } - - /* Reset all RTC CR register bits */ - hrtc->Instance->CR &= (uint32_t)0x00000000; - hrtc->Instance->WUTR = RTC_WUTR_WUT; - hrtc->Instance->PRER = ((uint32_t)(RTC_PRER_PREDIV_A | 0x000000FF)); - hrtc->Instance->ALRMAR = (uint32_t)0x00000000; - hrtc->Instance->ALRMBR = (uint32_t)0x00000000; - hrtc->Instance->SHIFTR = (uint32_t)0x00000000; - hrtc->Instance->CALR = (uint32_t)0x00000000; - hrtc->Instance->ALRMASSR = (uint32_t)0x00000000; - hrtc->Instance->ALRMBSSR = (uint32_t)0x00000000; - - /* Reset ISR register and exit initialization mode */ - hrtc->Instance->ISR = (uint32_t)0x00000000; - - /* Reset Tamper configuration register */ - hrtc->Instance->TAMPCR = 0x00000000; - - /* Reset Option register */ - hrtc->Instance->OR = 0x00000000; - - /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) - { - if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } - } - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* De-Initialize RTC MSP */ - HAL_RTC_MspDeInit(hrtc); - - hrtc->State = HAL_RTC_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Initialize the RTC MSP. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTC_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the RTC MSP. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTC_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup RTC_Exported_Functions_Group2 RTC Time and Date functions - * @brief RTC Time and Date functions - * -@verbatim - =============================================================================== - ##### RTC Time and Date functions ##### - =============================================================================== - - [..] This section provides functions allowing to configure Time and Date features - -@endverbatim - * @{ - */ - -/** - * @brief Set RTC current time. - * @param hrtc: RTC handle - * @param sTime: Pointer to Time structure - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving)); - assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - if(Format == RTC_FORMAT_BIN) - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - assert_param(IS_RTC_HOUR12(sTime->Hours)); - assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); - } - else - { - sTime->TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(sTime->Hours)); - } - assert_param(IS_RTC_MINUTES(sTime->Minutes)); - assert_param(IS_RTC_SECONDS(sTime->Seconds)); - - tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8) | \ - ((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) | \ - (((uint32_t)sTime->TimeFormat) << 16)); - } - else - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - tmpreg = RTC_Bcd2ToByte(sTime->Hours); - assert_param(IS_RTC_HOUR12(tmpreg)); - assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); - } - else - { - sTime->TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours))); - } - assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes))); - assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds))); - tmpreg = (((uint32_t)(sTime->Hours) << 16) | \ - ((uint32_t)(sTime->Minutes) << 8) | \ - ((uint32_t)sTime->Seconds) | \ - ((uint32_t)(sTime->TimeFormat) << 16)); - } - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state */ - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - else - { - /* Set the RTC_TR register */ - hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK); - - /* Clear the bits to be configured */ - hrtc->Instance->CR &= ((uint32_t)~RTC_CR_BCK); - - /* Configure the RTC_CR register */ - hrtc->Instance->CR |= (uint32_t)(sTime->DayLightSaving | sTime->StoreOperation); - - /* Exit Initialization mode */ - hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); - - /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) - { - if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - __HAL_UNLOCK(hrtc); - - return HAL_OK; - } -} - -/** - * @brief Get RTC current time. - * @param hrtc: RTC handle - * @param sTime: Pointer to Time structure with Hours, Minutes and Seconds fields returned - * with input format (BIN or BCD), also SubSeconds field returning the - * RTC_SSR register content and SecondFraction field the Synchronous pre-scaler - * factor to be used for second fraction ratio computation. - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @note You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds - * value in second fraction ratio with time unit following generic formula: - * Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit - * This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS - * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values - * in the higher-order calendar shadow registers to ensure consistency between the time and date values. - * Reading RTC current time locks the values in calendar shadow registers until Current date is read - * to ensure consistency between the time and date values. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTime, uint32_t Format) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - - /* Get subseconds structure field from the corresponding register*/ - sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR); - - /* Get SecondFraction structure field from the corresponding register field*/ - sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S); - - /* Get the TR register */ - tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK); - - /* Fill the structure fields with the read parameters */ - sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16); - sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >>8); - sTime->Seconds = (uint8_t)(tmpreg & (RTC_TR_ST | RTC_TR_SU)); - sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16); - - /* Check the input parameters format */ - if(Format == RTC_FORMAT_BIN) - { - /* Convert the time structure parameters to Binary format */ - sTime->Hours = (uint8_t)RTC_Bcd2ToByte(sTime->Hours); - sTime->Minutes = (uint8_t)RTC_Bcd2ToByte(sTime->Minutes); - sTime->Seconds = (uint8_t)RTC_Bcd2ToByte(sTime->Seconds); - } - - return HAL_OK; -} - -/** - * @brief Set RTC current date. - * @param hrtc: RTC handle - * @param sDate: Pointer to date structure - * @param Format: specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format) -{ - uint32_t datetmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U)) - { - sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU); - } - - assert_param(IS_RTC_WEEKDAY(sDate->WeekDay)); - - if(Format == RTC_FORMAT_BIN) - { - assert_param(IS_RTC_YEAR(sDate->Year)); - assert_param(IS_RTC_MONTH(sDate->Month)); - assert_param(IS_RTC_DATE(sDate->Date)); - - datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8) | \ - ((uint32_t)RTC_ByteToBcd2(sDate->Date)) | \ - ((uint32_t)sDate->WeekDay << 13)); - } - else - { - assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year))); - datetmpreg = RTC_Bcd2ToByte(sDate->Month); - assert_param(IS_RTC_MONTH(datetmpreg)); - datetmpreg = RTC_Bcd2ToByte(sDate->Date); - assert_param(IS_RTC_DATE(datetmpreg)); - - datetmpreg = ((((uint32_t)sDate->Year) << 16) | \ - (((uint32_t)sDate->Month) << 8) | \ - ((uint32_t)sDate->Date) | \ - (((uint32_t)sDate->WeekDay) << 13)); - } - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state*/ - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - else - { - /* Set the RTC_DR register */ - hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK); - - /* Exit Initialization mode */ - hrtc->Instance->ISR &= ((uint32_t)~RTC_ISR_INIT); - - /* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) - { - if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY ; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; - } -} - -/** - * @brief Get RTC current date. - * @param hrtc: RTC handle - * @param sDate: Pointer to Date structure - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values - * in the higher-order calendar shadow registers to ensure consistency between the time and date values. - * Reading RTC current time locks the values in calendar shadow registers until Current date is read. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDate, uint32_t Format) -{ - uint32_t datetmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - - /* Get the DR register */ - datetmpreg = (uint32_t)(hrtc->Instance->DR & RTC_DR_RESERVED_MASK); - - /* Fill the structure fields with the read parameters */ - sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> 16); - sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT | RTC_DR_MU)) >> 8); - sDate->Date = (uint8_t)(datetmpreg & (RTC_DR_DT | RTC_DR_DU)); - sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> 13); - - /* Check the input parameters format */ - if(Format == RTC_FORMAT_BIN) - { - /* Convert the date structure parameters to Binary format */ - sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year); - sDate->Month = (uint8_t)RTC_Bcd2ToByte(sDate->Month); - sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date); - } - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup RTC_Exported_Functions_Group3 RTC Alarm functions - * @brief RTC Alarm functions - * -@verbatim - =============================================================================== - ##### RTC Alarm functions ##### - =============================================================================== - - [..] This section provides functions allowing to configure Alarm feature - -@endverbatim - * @{ - */ -/** - * @brief Set the specified RTC Alarm. - * @param hrtc: RTC handle - * @param sAlarm: Pointer to Alarm structure - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format) -{ - uint32_t tickstart = 0; - uint32_t tmpreg = 0, subsecondtmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - assert_param(IS_RTC_ALARM(sAlarm->Alarm)); - assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask)); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel)); - assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds)); - assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - if(Format == RTC_FORMAT_BIN) - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours)); - assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); - } - else - { - sAlarm->AlarmTime.TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours)); - } - assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes)); - assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds)); - - if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) - { - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay)); - } - else - { - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay)); - } - - tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24) | \ - ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ - ((uint32_t)sAlarm->AlarmMask)); - } - else - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); - assert_param(IS_RTC_HOUR12(tmpreg)); - assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); - } - else - { - sAlarm->AlarmTime.TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours))); - } - - assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes))); - assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds))); - - if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg)); - } - else - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg)); - } - - tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \ - ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8) | \ - ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \ - ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24) | \ - ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ - ((uint32_t)sAlarm->AlarmMask)); - } - - /* Configure the Alarm A or Alarm B Sub Second registers */ - subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask)); - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the Alarm register */ - if(sAlarm->Alarm == RTC_ALARM_A) - { - /* Disable the Alarm A interrupt */ - __HAL_RTC_ALARMA_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); - - tickstart = HAL_GetTick(); - /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Sub Second register */ - hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ - __HAL_RTC_ALARMA_ENABLE(hrtc); - } - else - { - /* Disable the Alarm B interrupt */ - __HAL_RTC_ALARMB_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB); - - tickstart = HAL_GetTick(); - /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - hrtc->Instance->ALRMBR = (uint32_t)tmpreg; - /* Configure the Alarm B Sub Second register */ - hrtc->Instance->ALRMBSSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ - __HAL_RTC_ALARMB_ENABLE(hrtc); - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Set the specified RTC Alarm with Interrupt. - * @param hrtc: RTC handle - * @param sAlarm: Pointer to Alarm structure - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @note The Alarm register can only be written when the corresponding Alarm - * is disabled (Use the HAL_RTC_DeactivateAlarm()). - * @note The HAL_RTC_SetTime() must be called before enabling the Alarm feature. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Format) -{ - uint32_t tickstart = 0; - uint32_t tmpreg = 0, subsecondtmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - assert_param(IS_RTC_ALARM(sAlarm->Alarm)); - assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask)); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel)); - assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds)); - assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - if(Format == RTC_FORMAT_BIN) - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours)); - assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); - } - else - { - sAlarm->AlarmTime.TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours)); - } - assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes)); - assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds)); - - if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) - { - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay)); - } - else - { - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay)); - } - tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \ - ((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24) | \ - ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ - ((uint32_t)sAlarm->AlarmMask)); - } - else - { - if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET) - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); - assert_param(IS_RTC_HOUR12(tmpreg)); - assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); - } - else - { - sAlarm->AlarmTime.TimeFormat = 0x00; - assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours))); - } - - assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes))); - assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds))); - - if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE) - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg)); - } - else - { - tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); - assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg)); - } - tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16) | \ - ((uint32_t)(sAlarm->AlarmTime.Minutes) << 8) | \ - ((uint32_t) sAlarm->AlarmTime.Seconds) | \ - ((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16) | \ - ((uint32_t)(sAlarm->AlarmDateWeekDay) << 24) | \ - ((uint32_t)sAlarm->AlarmDateWeekDaySel) | \ - ((uint32_t)sAlarm->AlarmMask)); - } - /* Configure the Alarm A or Alarm B Sub Second registers */ - subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) | (uint32_t)(sAlarm->AlarmSubSecondMask)); - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the Alarm register */ - if(sAlarm->Alarm == RTC_ALARM_A) - { - /* Disable the Alarm A interrupt */ - __HAL_RTC_ALARMA_DISABLE(hrtc); - - /* Clear flag alarm A */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); - - tickstart = HAL_GetTick(); - /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - hrtc->Instance->ALRMAR = (uint32_t)tmpreg; - /* Configure the Alarm A Sub Second register */ - hrtc->Instance->ALRMASSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ - __HAL_RTC_ALARMA_ENABLE(hrtc); - /* Configure the Alarm interrupt */ - __HAL_RTC_ALARM_ENABLE_IT(hrtc,RTC_IT_ALRA); - } - else - { - /* Disable the Alarm B interrupt */ - __HAL_RTC_ALARMB_DISABLE(hrtc); - - /* Clear flag alarm B */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); - - tickstart = HAL_GetTick(); - /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - hrtc->Instance->ALRMBR = (uint32_t)tmpreg; - /* Configure the Alarm B Sub Second register */ - hrtc->Instance->ALRMBSSR = subsecondtmpreg; - /* Configure the Alarm state: Enable Alarm */ - __HAL_RTC_ALARMB_ENABLE(hrtc); - /* Configure the Alarm interrupt */ - __HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB); - } - - /* RTC Alarm Interrupt Configuration: EXTI configuration */ - __HAL_RTC_ALARM_EXTI_ENABLE_IT(); - - __HAL_RTC_ALARM_EXTI_ENABLE_RISING_EDGE(); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate the specified RTC Alarm. - * @param hrtc: RTC handle - * @param Alarm: Specifies the Alarm. - * This parameter can be one of the following values: - * @arg RTC_ALARM_A: AlarmA - * @arg RTC_ALARM_B: AlarmB - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_ALARM(Alarm)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - if(Alarm == RTC_ALARM_A) - { - /* AlarmA */ - __HAL_RTC_ALARMA_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA); - - tickstart = HAL_GetTick(); - - /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET) - { - if( (HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - } - else - { - /* AlarmB */ - __HAL_RTC_ALARMB_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_ALARM_DISABLE_IT(hrtc,RTC_IT_ALRB); - - tickstart = HAL_GetTick(); - - /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - } - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Get the RTC Alarm value and masks. - * @param hrtc: RTC handle - * @param sAlarm: Pointer to Date structure - * @param Alarm: Specifies the Alarm. - * This parameter can be one of the following values: - * @arg RTC_ALARM_A: AlarmA - * @arg RTC_ALARM_B: AlarmB - * @param Format: Specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sAlarm, uint32_t Alarm, uint32_t Format) -{ - uint32_t tmpreg = 0, subsecondtmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - assert_param(IS_RTC_ALARM(Alarm)); - - if(Alarm == RTC_ALARM_A) - { - /* AlarmA */ - sAlarm->Alarm = RTC_ALARM_A; - - tmpreg = (uint32_t)(hrtc->Instance->ALRMAR); - subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMASSR ) & RTC_ALRMASSR_SS); - } - else - { - sAlarm->Alarm = RTC_ALARM_B; - - tmpreg = (uint32_t)(hrtc->Instance->ALRMBR); - subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMBSSR) & RTC_ALRMBSSR_SS); - } - - /* Fill the structure with the read parameters */ - /* ALRMAR/ALRMBR registers have same mapping) */ - sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> 16); - sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT | RTC_ALRMAR_MNU)) >> 8); - sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST | RTC_ALRMAR_SU)); - sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16); - sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg; - sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> 24); - sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL); - sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL); - - if(Format == RTC_FORMAT_BIN) - { - sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours); - sAlarm->AlarmTime.Minutes = RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes); - sAlarm->AlarmTime.Seconds = RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds); - sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay); - } - - return HAL_OK; -} - -/** - * @brief Handle Alarm interrupt request. - * @param hrtc: RTC handle - * @retval None - */ -void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef* hrtc) -{ - /* Clear the EXTI's line Flag for RTC Alarm */ - __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); - - /* As alarms are sharing the same EXTI line, exit when no more pending Alarm event */ - while(((__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRA) != RESET) && (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) != RESET)) || - ((__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRB) != RESET) && (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) != RESET))) - { - /* Get the AlarmA interrupt source enable status and pending flag status*/ - if((__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRA) != RESET) && (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) != RESET)) - { - /* Clear the AlarmA interrupt pending bit */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); - - /* AlarmA callback */ - HAL_RTC_AlarmAEventCallback(hrtc); - } - - /* Get the AlarmB interrupt source enable status and pending flag status*/ - if((__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRB) != RESET) && (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) != RESET)) - { - /* Clear the AlarmB interrupt pending bit */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); - - /* AlarmB callback */ - HAL_RTCEx_AlarmBEventCallback(hrtc); - } - } - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; -} - -/** - * @brief Alarm A callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTC_AlarmAEventCallback could be implemented in the user file - */ -} - -/** - * @brief Handle AlarmA Polling request. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - - uint32_t tickstart = HAL_GetTick(); - - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Clear the Alarm interrupt pending bit */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup RTC_Exported_Functions_Group4 Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides functions allowing to - (+) Wait for RTC Time and Date Synchronization - -@endverbatim - * @{ - */ - -/** - * @brief Wait until the RTC Time and Date registers (RTC_TR and RTC_DR) are - * synchronized with RTC APB clock. - * @note The RTC Resynchronization mode is write protected, use the - * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function. - * @note To read the calendar through the shadow registers after Calendar - * initialization, calendar update or after wakeup from low power modes - * the software must first clear the RSF flag. - * The software must then wait until it is set again before reading - * the calendar, which means that the calendar registers have been - * correctly copied into the RTC_TR and RTC_DR shadow registers. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc) -{ - uint32_t tickstart = 0; - - /* Clear RSF flag */ - hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK; - - tickstart = HAL_GetTick(); - - /* Wait the registers to be synchronised */ - while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup RTC_Exported_Functions_Group5 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection provides functions allowing to - (+) Get RTC state - -@endverbatim - * @{ - */ -/** - * @brief Return the RTC handle state. - * @param hrtc: RTC handle - * @retval HAL state - */ -HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef* hrtc) -{ - /* Return RTC handle state */ - return hrtc->State; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup RTC_Private_Functions RTC Private functions - * @{ - */ -/** - * @brief Enter the RTC Initialization mode. - * @note The RTC Initialization mode is write protected, use the - * __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc) -{ - uint32_t tickstart = 0; - - /* Check if the Initialization mode is set */ - if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET) - { - /* Set the Initialization mode */ - hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK; - - tickstart = HAL_GetTick(); - /* Wait till RTC is in INIT state and if Time out is reached exit */ - while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - return HAL_TIMEOUT; - } - } - } - - return HAL_OK; -} - - -/** - * @brief Convert a 2 digit decimal to BCD format. - * @param Value: Byte to be converted - * @retval Converted byte - */ -uint8_t RTC_ByteToBcd2(uint8_t Value) -{ - uint32_t bcdhigh = 0; - - while(Value >= 10) - { - bcdhigh++; - Value -= 10; - } - - return ((uint8_t)(bcdhigh << 4) | Value); -} - -/** - * @brief Convert from 2 digit BCD to Binary. - * @param Value: BCD value to be converted - * @retval Converted word - */ -uint8_t RTC_Bcd2ToByte(uint8_t Value) -{ - uint32_t tmp = 0; - tmp = ((uint8_t)(Value & (uint8_t)0xF0) >> (uint8_t)0x4) * 10; - return (tmp + (Value & (uint8_t)0x0F)); -} - -/** - * @} - */ - -#endif /* HAL_RTC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c deleted file mode 100644 index 35be397e..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rtc_ex.c +++ /dev/null @@ -1,1875 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rtc_ex.c - * @author MCD Application Team - * @brief Extended RTC HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Real Time Clock (RTC) Extended peripheral: - * + RTC Time Stamp functions - * + RTC Tamper functions - * + RTC Wake-up functions - * + Extended Control functions - * + Extended RTC features functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - (+) Enable the RTC domain access. - (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour - format using the HAL_RTC_Init() function. - - *** RTC Wakeup configuration *** - ================================ - [..] - (+) To configure the RTC Wakeup Clock source and Counter use the HAL_RTCEx_SetWakeUpTimer() - function. You can also configure the RTC Wakeup timer with interrupt mode - using the HAL_RTCEx_SetWakeUpTimer_IT() function. - (+) To read the RTC WakeUp Counter register, use the HAL_RTCEx_GetWakeUpTimer() - function. - - *** Outputs configuration *** - ============================= - [..] The RTC has 2 different outputs: - (+) RTC_ALARM: this output is used to manage the RTC Alarm A, Alarm B - and WaKeUp signals. - To output the selected RTC signal, use the HAL_RTC_Init() function. - (+) RTC_CALIB: this output is 512Hz signal or 1Hz. - To enable the RTC_CALIB, use the HAL_RTCEx_SetCalibrationOutPut() function. - (+) Two pins can be used as RTC_ALARM or RTC_CALIB (PC13, PB2) managed on - the RTC_OR register. - (+) When the RTC_CALIB or RTC_ALARM output is selected, the RTC_OUT pin is - automatically configured in output alternate function. - - *** Smooth digital Calibration configuration *** - ================================================ - [..] - (+) Configure the RTC Original Digital Calibration Value and the corresponding - calibration cycle period (32s,16s and 8s) using the HAL_RTCEx_SetSmoothCalib() - function. - - *** TimeStamp configuration *** - =============================== - [..] - (+) Enable the RTC TimeStamp using the HAL_RTCEx_SetTimeStamp() function. - You can also configure the RTC TimeStamp with interrupt mode using the - HAL_RTCEx_SetTimeStamp_IT() function. - (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTCEx_GetTimeStamp() - function. - - *** Internal TimeStamp configuration *** - =============================== - [..] - (+) Enable the RTC internal TimeStamp using the HAL_RTCEx_SetInternalTimeStamp() function. - User has to check internal timestamp occurrence using __HAL_RTC_INTERNAL_TIMESTAMP_GET_FLAG. - (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTCEx_GetTimeStamp() - function. - - *** Tamper configuration *** - ============================ - [..] - (+) Enable the RTC Tamper and configure the Tamper filter count, trigger Edge - or Level according to the Tamper filter (if equal to 0 Edge else Level) - value, sampling frequency, NoErase, MaskFlag, precharge or discharge and - Pull-UP using the HAL_RTCEx_SetTamper() function. You can configure RTC Tamper - with interrupt mode using HAL_RTCEx_SetTamper_IT() function. - (+) The default configuration of the Tamper erases the backup registers. To avoid - erase, enable the NoErase field on the RTC_TAMPCR register. - - *** Backup Data Registers configuration *** - =========================================== - [..] - (+) To write to the RTC Backup Data registers, use the HAL_RTCEx_BKUPWrite() - function. - (+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead() - function. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RTCEx RTCEx - * @brief RTC Extended HAL module driver - * @{ - */ - -#ifdef HAL_RTC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -#if defined(RTC_TAMPER1_SUPPORT) && defined(RTC_TAMPER3_SUPPORT) -#define RTC_TAMPCR_MASK ((uint32_t)RTC_TAMPCR_TAMPTS |\ - (uint32_t)RTC_TAMPCR_TAMPFREQ | (uint32_t)RTC_TAMPCR_TAMPFLT | (uint32_t)RTC_TAMPCR_TAMPPRCH |\ - (uint32_t)RTC_TAMPCR_TAMPPUDIS | (uint32_t)RTC_TAMPCR_TAMPIE |\ - (uint32_t)RTC_TAMPCR_TAMP1IE | (uint32_t)RTC_TAMPCR_TAMP1NOERASE | (uint32_t)RTC_TAMPCR_TAMP1MF |\ - (uint32_t)RTC_TAMPCR_TAMP2IE | (uint32_t)RTC_TAMPCR_TAMP2NOERASE | (uint32_t)RTC_TAMPCR_TAMP2MF |\ - (uint32_t)RTC_TAMPCR_TAMP3IE | (uint32_t)RTC_TAMPCR_TAMP3NOERASE | (uint32_t)RTC_TAMPCR_TAMP3MF) -#elif defined(RTC_TAMPER1_SUPPORT) -#define RTC_TAMPCR_MASK ((uint32_t)RTC_TAMPCR_TAMPTS |\ - (uint32_t)RTC_TAMPCR_TAMPFREQ | (uint32_t)RTC_TAMPCR_TAMPFLT | (uint32_t)RTC_TAMPCR_TAMPPRCH |\ - (uint32_t)RTC_TAMPCR_TAMPPUDIS | (uint32_t)RTC_TAMPCR_TAMPIE |\ - (uint32_t)RTC_TAMPCR_TAMP1IE | (uint32_t)RTC_TAMPCR_TAMP1NOERASE | (uint32_t)RTC_TAMPCR_TAMP1MF |\ - (uint32_t)RTC_TAMPCR_TAMP2IE | (uint32_t)RTC_TAMPCR_TAMP2NOERASE | (uint32_t)RTC_TAMPCR_TAMP2MF) -#elif defined(RTC_TAMPER3_SUPPORT) -#define RTC_TAMPCR_MASK ((uint32_t)RTC_TAMPCR_TAMPTS |\ - (uint32_t)RTC_TAMPCR_TAMPFREQ | (uint32_t)RTC_TAMPCR_TAMPFLT | (uint32_t)RTC_TAMPCR_TAMPPRCH |\ - (uint32_t)RTC_TAMPCR_TAMPPUDIS | (uint32_t)RTC_TAMPCR_TAMPIE |\ - (uint32_t)RTC_TAMPCR_TAMP2IE | (uint32_t)RTC_TAMPCR_TAMP2NOERASE | (uint32_t)RTC_TAMPCR_TAMP2MF |\ - (uint32_t)RTC_TAMPCR_TAMP3IE | (uint32_t)RTC_TAMPCR_TAMP3NOERASE | (uint32_t)RTC_TAMPCR_TAMP3MF) -#else -#define RTC_TAMPCR_MASK ((uint32_t)RTC_TAMPCR_TAMPTS |\ - (uint32_t)RTC_TAMPCR_TAMPFREQ | (uint32_t)RTC_TAMPCR_TAMPFLT | (uint32_t)RTC_TAMPCR_TAMPPRCH |\ - (uint32_t)RTC_TAMPCR_TAMPPUDIS | (uint32_t)RTC_TAMPCR_TAMPIE |\ - (uint32_t)RTC_TAMPCR_TAMP2IE | (uint32_t)RTC_TAMPCR_TAMP2NOERASE | (uint32_t)RTC_TAMPCR_TAMP2MF) -#endif /* RTC_TAMPER1_SUPPORT && RTC_TAMPER3_SUPPORT */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup RTCEx_Exported_Functions RTCEx Exported Functions - * @{ - */ - - -/** @defgroup RTCEx_Exported_Functions_Group1 RTC TimeStamp and Tamper functions - * @brief RTC TimeStamp and Tamper functions - * -@verbatim - =============================================================================== - ##### RTC TimeStamp and Tamper functions ##### - =============================================================================== - - [..] This section provide functions allowing to configure TimeStamp feature - -@endverbatim - * @{ - */ - -/** - * @brief Set TimeStamp. - * @note This API must be called before enabling the TimeStamp feature. - * @param hrtc: RTC handle - * @param TimeStampEdge: Specifies the pin edge on which the TimeStamp is - * activated. - * This parameter can be one of the following values: - * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the - * rising edge of the related pin. - * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the - * falling edge of the related pin. - * @param RTC_TimeStampPin: specifies the RTC TimeStamp Pin. - * This parameter can be one of the following values: - * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin. - * The RTC TimeStamp Pin is per default PC13, but for reasons of - * compatibility, this parameter is required. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge)); - assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Get the RTC_CR register and clear the bits to be configured */ - tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE)); - - tmpreg|= TimeStampEdge; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the Time Stamp TSEDGE and Enable bits */ - hrtc->Instance->CR = (uint32_t)tmpreg; - - __HAL_RTC_TIMESTAMP_ENABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Set TimeStamp with Interrupt. - * @param hrtc: RTC handle - * @note This API must be called before enabling the TimeStamp feature. - * @param TimeStampEdge: Specifies the pin edge on which the TimeStamp is - * activated. - * This parameter can be one of the following values: - * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the - * rising edge of the related pin. - * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the - * falling edge of the related pin. - * @param RTC_TimeStampPin: Specifies the RTC TimeStamp Pin. - * This parameter can be one of the following values: - * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin. - * The RTC TimeStamp Pin is per default PC13, but for reasons of - * compatibility, this parameter is required. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge)); - assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Get the RTC_CR register and clear the bits to be configured */ - tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE)); - - tmpreg |= TimeStampEdge; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the Time Stamp TSEDGE and Enable bits */ - hrtc->Instance->CR = (uint32_t)tmpreg; - - __HAL_RTC_TIMESTAMP_ENABLE(hrtc); - - /* Enable IT timestamp */ - __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc,RTC_IT_TS); - - /* RTC timestamp Interrupt Configuration: EXTI configuration */ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); - - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate TimeStamp. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc) -{ - uint32_t tmpreg = 0; - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS); - - /* Get the RTC_CR register and clear the bits to be configured */ - tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE)); - - /* Configure the Time Stamp TSEDGE and Enable bits */ - hrtc->Instance->CR = (uint32_t)tmpreg; - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Set Internal TimeStamp. - * @note This API must be called before enabling the internal TimeStamp feature. - * @param hrtc: pointer to a RTC_HandleTypeDef structure that contains - * the configuration information for RTC. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetInternalTimeStamp(RTC_HandleTypeDef *hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the internal Time Stamp Enable bits */ - __HAL_RTC_INTERNAL_TIMESTAMP_ENABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate Internal TimeStamp. - * @param hrtc: pointer to a RTC_HandleTypeDef structure that contains - * the configuration information for RTC. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTimeStamp(RTC_HandleTypeDef *hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Configure the internal Time Stamp Enable bits */ - __HAL_RTC_INTERNAL_TIMESTAMP_DISABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Get the RTC TimeStamp value. - * @param hrtc: RTC handle - * @param sTimeStamp: Pointer to Time structure - * @param sTimeStampDate: Pointer to Date structure - * @param Format: specifies the format of the entered parameters. - * This parameter can be one of the following values: - * @arg RTC_FORMAT_BIN: Binary data format - * @arg RTC_FORMAT_BCD: BCD data format - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef* sTimeStamp, RTC_DateTypeDef* sTimeStampDate, uint32_t Format) -{ - uint32_t tmptime = 0, tmpdate = 0; - - /* Check the parameters */ - assert_param(IS_RTC_FORMAT(Format)); - - /* Get the TimeStamp time and date registers values */ - tmptime = (uint32_t)(hrtc->Instance->TSTR & RTC_TR_RESERVED_MASK); - tmpdate = (uint32_t)(hrtc->Instance->TSDR & RTC_DR_RESERVED_MASK); - - /* Fill the Time structure fields with the read parameters */ - sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TR_HT | RTC_TR_HU)) >> 16); - sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TR_MNT | RTC_TR_MNU)) >> 8); - sTimeStamp->Seconds = (uint8_t)(tmptime & (RTC_TR_ST | RTC_TR_SU)); - sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TR_PM)) >> 16); - sTimeStamp->SubSeconds = (uint32_t) hrtc->Instance->TSSSR; - - /* Fill the Date structure fields with the read parameters */ - sTimeStampDate->Year = 0; - sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_DR_MT | RTC_DR_MU)) >> 8); - sTimeStampDate->Date = (uint8_t)(tmpdate & (RTC_DR_DT | RTC_DR_DU)); - sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_DR_WDU)) >> 13); - - /* Check the input parameters format */ - if(Format == RTC_FORMAT_BIN) - { - /* Convert the TimeStamp structure parameters to Binary format */ - sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours); - sTimeStamp->Minutes = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Minutes); - sTimeStamp->Seconds = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Seconds); - - /* Convert the DateTimeStamp structure parameters to Binary format */ - sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month); - sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date); - sTimeStampDate->WeekDay = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->WeekDay); - } - - /* Clear the TIMESTAMP Flags */ - __HAL_RTC_INTERNAL_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_ITSF); - __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF); - - return HAL_OK; -} - -/** - * @brief Set Tamper. - * @note By calling this API we disable the tamper interrupt for all tampers. - * @param hrtc: RTC handle - * @param sTamper: Pointer to Tamper Structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_TAMPER(sTamper->Tamper)); - assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger)); - assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase)); - assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag)); - assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter)); - assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency)); - assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration)); - assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp)); - assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Configure the tamper trigger */ - if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE) - { - sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1); - } - - if(sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE) - { - sTamper->NoErase = 0; -#if defined(RTC_TAMPER1_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_1) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP1NOERASE; - } -#endif /* RTC_TAMPER1_SUPPORT */ - if((sTamper->Tamper & RTC_TAMPER_2) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP2NOERASE; - } -#if defined(RTC_TAMPER3_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_3) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP3NOERASE; - } -#endif /* RTC_TAMPER3_SUPPORT */ - } - - if(sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE) - { - sTamper->MaskFlag = 0; -#if defined(RTC_TAMPER1_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_1) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP1MF; - } -#endif /* RTC_TAMPER1_SUPPORT */ - if((sTamper->Tamper & RTC_TAMPER_2) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP2MF; - } -#if defined(RTC_TAMPER3_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_3) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP3MF; - } -#endif /* RTC_TAMPER3_SUPPORT */ - } - - tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->NoErase |\ - (uint32_t)sTamper->MaskFlag | (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency |\ - (uint32_t)sTamper->PrechargeDuration | (uint32_t)sTamper->TamperPullUp | sTamper->TimeStampOnTamperDetection); - - hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1) | RTC_TAMPCR_MASK); - - hrtc->Instance->TAMPCR |= tmpreg; - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Set Tamper with interrupt. - * @note By calling this API we force the tamper interrupt for all tampers. - * @param hrtc: RTC handle - * @param sTamper: Pointer to RTC Tamper. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RTC_TAMPER(sTamper->Tamper)); - assert_param(IS_RTC_TAMPER_INTERRUPT(sTamper->Interrupt)); - assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger)); - assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase)); - assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag)); - assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter)); - assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency)); - assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration)); - assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp)); - assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Configure the tamper trigger */ - if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE) - { - sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1); - } - - if(sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE) - { - sTamper->NoErase = 0; -#if defined(RTC_TAMPER1_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_1) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP1NOERASE; - } -#endif /* RTC_TAMPER1_SUPPORT */ - if((sTamper->Tamper & RTC_TAMPER_2) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP2NOERASE; - } -#if defined(RTC_TAMPER3_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_3) != 0) - { - sTamper->NoErase |= RTC_TAMPCR_TAMP3NOERASE; - } -#endif /* RTC_TAMPER3_SUPPORT */ - } - - if(sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE) - { - sTamper->MaskFlag = 0; -#if defined(RTC_TAMPER1_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_1) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP1MF; - } -#endif /* RTC_TAMPER1_SUPPORT */ - if((sTamper->Tamper & RTC_TAMPER_2) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP2MF; - } -#if defined(RTC_TAMPER3_SUPPORT) - if((sTamper->Tamper & RTC_TAMPER_3) != 0) - { - sTamper->MaskFlag |= RTC_TAMPCR_TAMP3MF; - } -#endif /* RTC_TAMPER3_SUPPORT */ - } - - tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Interrupt | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->NoErase |\ - (uint32_t)sTamper->MaskFlag | (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency |\ - (uint32_t)sTamper->PrechargeDuration | (uint32_t)sTamper->TamperPullUp | sTamper->TimeStampOnTamperDetection); - - hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1) | RTC_TAMPCR_MASK); - - hrtc->Instance->TAMPCR |= tmpreg; - - /* RTC Tamper Interrupt Configuration: EXTI configuration */ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT(); - - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE(); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate Tamper. - * @param hrtc: RTC handle - * @param Tamper: Selected tamper pin. - * This parameter can be any combination of RTC_TAMPER_1, RTC_TAMPER_2 and RTC_TAMPER_3. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper) -{ - assert_param(IS_RTC_TAMPER(Tamper)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the selected Tamper pin */ - hrtc->Instance->TAMPCR &= ((uint32_t)~Tamper); - -#if defined(RTC_TAMPER1_SUPPORT) - if ((Tamper & RTC_TAMPER_1) != 0) - { - /* Disable the Tamper1 interrupt */ - hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP1)); - } -#endif /* RTC_TAMPER1_SUPPORT */ - if ((Tamper & RTC_TAMPER_2) != 0) - { - /* Disable the Tamper2 interrupt */ - hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP2)); - } -#if defined(RTC_TAMPER3_SUPPORT) - if ((Tamper & RTC_TAMPER_3) != 0) - { - /* Disable the Tamper3 interrupt */ - hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP3)); - } -#endif /* RTC_TAMPER3_SUPPORT */ - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Handle TimeStamp interrupt request. - * @param hrtc: RTC handle - * @retval None - */ -void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc) -{ - /* Clear the EXTI's Flag for RTC TimeStamp and Tamper */ - __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG(); - - /* As Tampers and TimeStamp are sharing the same EXTI line, exit when no more pending event */ - while( - ((__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != RESET) && (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != RESET)) -#if defined(RTC_TAMPER1_SUPPORT) - || ((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP1) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != RESET)) -#endif /* RTC_TAMPER1_SUPPORT */ - || ((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP2) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) != RESET)) -#if defined(RTC_TAMPER3_SUPPORT) - || ((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP3) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) != RESET)) -#endif /* RTC_TAMPER3_SUPPORT */ - ) - { - - /* Get the TimeStamp interrupt source enable status and pending flag status */ - if((__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != RESET) && (__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != RESET)) - { - /* TIMESTAMP callback */ - HAL_RTCEx_TimeStampEventCallback(hrtc); - - /* Clear the TIMESTAMP interrupt pending bit (this will clear timestamp time and date registers) */ - __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF); - } - -#if defined(RTC_TAMPER1_SUPPORT) - /* Get the Tamper1 interrupt source enable status and pending flag status */ - if((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP1) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != RESET)) - { - /* Clear the Tamper1 interrupt pending bit */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F); - - /* Tamper1 callback */ - HAL_RTCEx_Tamper1EventCallback(hrtc); - } -#endif /* RTC_TAMPER1_SUPPORT */ - - /* Get the Tamper2 interrupt source enable status and pending flag status */ - if((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP2) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) != RESET)) - { - /* Clear the Tamper2 interrupt pending bit */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F); - - /* Tamper2 callback */ - HAL_RTCEx_Tamper2EventCallback(hrtc); - } - -#if defined(RTC_TAMPER3_SUPPORT) - /* Get the Tamper3 interrupts source enable status and pending flag status */ - if((__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP3) != RESET) && (__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) != RESET)) - { - /* Clear the Tamper3 interrupt pending bit */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F); - - /* Tamper3 callback */ - HAL_RTCEx_Tamper3EventCallback(hrtc); - } -#endif /* RTC_TAMPER3_SUPPORT */ - - } - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; -} - -/** - * @brief TimeStamp callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_TimeStampEventCallback could be implemented in the user file - */ -} - -#if defined(RTC_TAMPER1_SUPPORT) -/** - * @brief Tamper 1 callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_Tamper1EventCallback could be implemented in the user file - */ -} -#endif /* RTC_TAMPER1_SUPPORT */ - -/** - * @brief Tamper 2 callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_Tamper2EventCallback could be implemented in the user file - */ -} - -#if defined(RTC_TAMPER3_SUPPORT) -/** - * @brief Tamper 3 callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_Tamper3EventCallback could be implemented in the user file - */ -} -#endif /* RTC_TAMPER3_SUPPORT */ - -/** - * @brief Handle TimeStamp polling request. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - while(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == RESET) - { - if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != RESET) - { - /* Clear the TIMESTAMP OverRun Flag */ - __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF); - - /* Change TIMESTAMP state */ - hrtc->State = HAL_RTC_STATE_ERROR; - - return HAL_ERROR; - } - - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} - -#if defined(RTC_TAMPER1_SUPPORT) -/** - * @brief Handle Tamper 1 Polling. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - /* Get the status of the Interrupt */ - while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F)== RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Clear the Tamper Flag */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} -#endif /* RTC_TAMPER1_SUPPORT */ - -/** - * @brief Handle Tamper 2 Polling. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - /* Get the status of the Interrupt */ - while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) == RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Clear the Tamper Flag */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} - -#if defined(RTC_TAMPER3_SUPPORT) -/** - * @brief Handle Tamper 3 Polling. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - /* Get the status of the Interrupt */ - while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) == RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Clear the Tamper Flag */ - __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} -#endif /* RTC_TAMPER3_SUPPORT */ - -/** - * @} - */ - -/** @defgroup RTCEx_Exported_Functions_Group2 RTC Wake-up functions - * @brief RTC Wake-up functions - * -@verbatim - =============================================================================== - ##### RTC Wake-up functions ##### - =============================================================================== - - [..] This section provide functions allowing to configure Wake-up feature - -@endverbatim - * @{ - */ - -/** - * @brief Set wake up timer. - * @param hrtc: RTC handle - * @param WakeUpCounter: Wake up counter - * @param WakeUpClock: Wake up clock - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock)); - assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /*Check RTC WUTWF flag is reset only when wake up timer enabled*/ - if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET) - { - tickstart = HAL_GetTick(); - - /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */ - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - } - - __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); - - tickstart = HAL_GetTick(); - - /* Wait till RTC WUTWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - /* Clear the Wakeup Timer clock source bits in CR register */ - hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL; - - /* Configure the clock source */ - hrtc->Instance->CR |= (uint32_t)WakeUpClock; - - /* Configure the Wakeup Timer counter */ - hrtc->Instance->WUTR = (uint32_t)WakeUpCounter; - - /* Enable the Wakeup Timer */ - __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Set wake up timer with interrupt. - * @param hrtc: RTC handle - * @param WakeUpCounter: Wake up counter - * @param WakeUpClock: Wake up clock - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock)); - assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /*Check RTC WUTWF flag is reset only when wake up timer enabled*/ - if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET) - { - tickstart = HAL_GetTick(); - - /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */ - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - } - /* Disable the Wake-Up timer */ - __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); - - /* Clear flag Wake-Up */ - __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF); - - tickstart = HAL_GetTick(); - - /* Wait till RTC WUTWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - /* Configure the Wakeup Timer counter */ - hrtc->Instance->WUTR = (uint32_t)WakeUpCounter; - - /* Clear the Wakeup Timer clock source bits in CR register */ - hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL; - - /* Configure the clock source */ - hrtc->Instance->CR |= (uint32_t)WakeUpClock; - - /* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */ - __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT(); - - __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); - - /* Configure the Interrupt in the RTC_CR register */ - __HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc,RTC_IT_WUT); - - /* Enable the Wakeup Timer */ - __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate wake up timer counter. - * @param hrtc: RTC handle - * @retval HAL status - */ -uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc) -{ - uint32_t tickstart = 0; - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Disable the Wakeup Timer */ - __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc); - - /* In case of interrupt mode is used, the interrupt source must disabled */ - __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc,RTC_IT_WUT); - - tickstart = HAL_GetTick(); - /* Wait till RTC WUTWF flag is set and if Time out is reached exit */ - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Get wake up timer counter. - * @param hrtc: RTC handle - * @retval Counter value - */ -uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc) -{ - /* Get the counter value */ - return ((uint32_t)(hrtc->Instance->WUTR & RTC_WUTR_WUT)); -} - -/** - * @brief Handle Wake Up Timer interrupt request. - * @param hrtc: RTC handle - * @retval None - */ -void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc) -{ - /* Clear the EXTI's line Flag for RTC WakeUpTimer */ - __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); - - /* Get the pending status of the WAKEUPTIMER Interrupt */ - if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) != RESET) - { - /* Clear the WAKEUPTIMER interrupt pending bit */ - __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF); - - /* WAKEUPTIMER callback */ - HAL_RTCEx_WakeUpTimerEventCallback(hrtc); - } - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; -} - -/** - * @brief Wake Up Timer callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_WakeUpTimerEventCallback could be implemented in the user file - */ -} - -/** - * @brief Handle Wake Up Timer Polling. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - return HAL_TIMEOUT; - } - } - } - - /* Clear the WAKEUPTIMER Flag */ - __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} - -/** - * @} - */ - - -/** @defgroup RTCEx_Exported_Functions_Group3 Extended Peripheral Control functions - * @brief Extended Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Extended Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides functions allowing to - (+) Write a data in a specified RTC Backup data register - (+) Read a data in a specified RTC Backup data register - (+) Set the Coarse calibration parameters. - (+) Deactivate the Coarse calibration parameters - (+) Set the Smooth calibration parameters. - (+) Configure the Synchronization Shift Control Settings. - (+) Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). - (+) Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). - (+) Enable the RTC reference clock detection. - (+) Disable the RTC reference clock detection. - (+) Enable the Bypass Shadow feature. - (+) Disable the Bypass Shadow feature. - -@endverbatim - * @{ - */ - -/** - * @brief Write a data in a specified RTC Backup data register. - * @param hrtc: RTC handle - * @param BackupRegister: RTC Backup data Register number. - * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to - * specify the register. - * @param Data: Data to be written in the specified RTC Backup data register. - * @retval None - */ -void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data) -{ - uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_RTC_BKP(BackupRegister)); - - tmp = (uint32_t)&(hrtc->Instance->BKP0R); - tmp += (BackupRegister * 4); - - /* Write the specified register */ - *(__IO uint32_t *)tmp = (uint32_t)Data; -} - -/** - * @brief Read data from the specified RTC Backup data Register. - * @param hrtc: RTC handle - * @param BackupRegister: RTC Backup data Register number. - * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to - * specify the register. - * @retval Read value - */ -uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister) -{ - uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_RTC_BKP(BackupRegister)); - - tmp = (uint32_t)&(hrtc->Instance->BKP0R); - tmp += (BackupRegister * 4); - - /* Read the specified register */ - return (*(__IO uint32_t *)tmp); -} - -/** - * @brief Set the Smooth calibration parameters. - * @param hrtc: RTC handle - * @param SmoothCalibPeriod: Select the Smooth Calibration Period. - * This parameter can be can be one of the following values : - * @arg RTC_SMOOTHCALIB_PERIOD_32SEC: The smooth calibration period is 32s. - * @arg RTC_SMOOTHCALIB_PERIOD_16SEC: The smooth calibration period is 16s. - * @arg RTC_SMOOTHCALIB_PERIOD_8SEC: The smooth calibration period is 8s. - * @param SmoothCalibPlusPulses: Select to Set or reset the CALP bit. - * This parameter can be one of the following values: - * @arg RTC_SMOOTHCALIB_PLUSPULSES_SET: Add one RTCCLK pulse every 2*11 pulses. - * @arg RTC_SMOOTHCALIB_PLUSPULSES_RESET: No RTCCLK pulses are added. - * @param SmoothCalibMinusPulsesValue: Select the value of CALM[8:0] bits. - * This parameter can be one any value from 0 to 0x000001FF. - * @note To deactivate the smooth calibration, the field SmoothCalibPlusPulses - * must be equal to SMOOTHCALIB_PLUSPULSES_RESET and the field - * SmoothCalibMinusPulsesValue must be equal to 0. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef* hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_SMOOTH_CALIB_PERIOD(SmoothCalibPeriod)); - assert_param(IS_RTC_SMOOTH_CALIB_PLUS(SmoothCalibPlusPulses)); - assert_param(IS_RTC_SMOOTH_CALIB_MINUS(SmoothCalibMinusPulsesValue)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* check if a calibration is pending*/ - if((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET) - { - tickstart = HAL_GetTick(); - - /* check if a calibration is pending*/ - while((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - } - - /* Configure the Smooth calibration settings */ - hrtc->Instance->CALR = (uint32_t)((uint32_t)SmoothCalibPeriod | (uint32_t)SmoothCalibPlusPulses | (uint32_t)SmoothCalibMinusPulsesValue); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Configure the Synchronization Shift Control Settings. - * @note When REFCKON is set, firmware must not write to Shift control register. - * @param hrtc: RTC handle - * @param ShiftAdd1S: Select to add or not 1 second to the time calendar. - * This parameter can be one of the following values : - * @arg RTC_SHIFTADD1S_SET: Add one second to the clock calendar. - * @arg RTC_SHIFTADD1S_RESET: No effect. - * @param ShiftSubFS: Select the number of Second Fractions to substitute. - * This parameter can be one any value from 0 to 0x7FFF. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef* hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_RTC_SHIFT_ADD1S(ShiftAdd1S)); - assert_param(IS_RTC_SHIFT_SUBFS(ShiftSubFS)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - tickstart = HAL_GetTick(); - - /* Wait until the shift is completed*/ - while((hrtc->Instance->ISR & RTC_ISR_SHPF) != RESET) - { - if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_TIMEOUT; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_TIMEOUT; - } - } - - /* Check if the reference clock detection is disabled */ - if((hrtc->Instance->CR & RTC_CR_REFCKON) == RESET) - { - /* Configure the Shift settings */ - hrtc->Instance->SHIFTR = (uint32_t)(uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S); - - /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET) - { - if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - } - } - else - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). - * @param hrtc: RTC handle - * @param CalibOutput : Select the Calibration output Selection . - * This parameter can be one of the following values: - * @arg RTC_CALIBOUTPUT_512HZ: A signal has a regular waveform at 512Hz. - * @arg RTC_CALIBOUTPUT_1HZ: A signal has a regular waveform at 1Hz. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef* hrtc, uint32_t CalibOutput) -{ - /* Check the parameters */ - assert_param(IS_RTC_CALIB_OUTPUT(CalibOutput)); - - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Clear flags before config */ - hrtc->Instance->CR &= (uint32_t)~RTC_CR_COSEL; - - /* Configure the RTC_CR register */ - hrtc->Instance->CR |= (uint32_t)CalibOutput; - - __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz). - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef* hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(hrtc); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Enable the RTC reference clock detection. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef* hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state*/ - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - else - { - __HAL_RTC_CLOCKREF_DETECTION_ENABLE(hrtc); - - /* Exit Initialization mode */ - hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT; - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Disable the RTC reference clock detection. - * @param hrtc: RTC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef* hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set Initialization mode */ - if(RTC_EnterInitMode(hrtc) != HAL_OK) - { - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Set RTC state*/ - hrtc->State = HAL_RTC_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_ERROR; - } - else - { - __HAL_RTC_CLOCKREF_DETECTION_DISABLE(hrtc); - - /* Exit Initialization mode */ - hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT; - } - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Enable the Bypass Shadow feature. - * @param hrtc: RTC handle - * @note When the Bypass Shadow is enabled the calendar value are taken - * directly from the Calendar counter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef* hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Set the BYPSHAD bit */ - hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD; - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @brief Disable the Bypass Shadow feature. - * @param hrtc: RTC handle - * @note When the Bypass Shadow is enabled the calendar value are taken - * directly from the Calendar counter. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef* hrtc) -{ - /* Process Locked */ - __HAL_LOCK(hrtc); - - hrtc->State = HAL_RTC_STATE_BUSY; - - /* Disable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - - /* Reset the BYPSHAD bit */ - hrtc->Instance->CR &= ((uint8_t)~RTC_CR_BYPSHAD); - - /* Enable the write protection for RTC registers */ - __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrtc); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup RTCEx_Exported_Functions_Group4 Extended features functions - * @brief Extended features functions - * -@verbatim - =============================================================================== - ##### Extended features functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) RTC Alarm B callback - (+) RTC Poll for Alarm B request - -@endverbatim - * @{ - */ - -/** - * @brief Alarm B callback. - * @param hrtc: RTC handle - * @retval None - */ -__weak void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hrtc); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_RTCEx_AlarmBEventCallback could be implemented in the user file - */ -} - -/** - * @brief Handle Alarm B Polling request. - * @param hrtc: RTC handle - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) == RESET) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - hrtc->State = HAL_RTC_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - } - - /* Clear the Alarm Flag */ - __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF); - - /* Change RTC state */ - hrtc->State = HAL_RTC_STATE_READY; - - return HAL_OK; -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_RTC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c deleted file mode 100644 index 41d343d6..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c +++ /dev/null @@ -1,5675 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim.c - * @author MCD Application Team - * @brief TIM HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Timer (TIM) peripheral: - * + Time Base Initialization - * + Time Base Start - * + Time Base Start Interruption - * + Time Base Start DMA - * + Time Output Compare/PWM Initialization - * + Time Output Compare/PWM Channel Configuration - * + Time Output Compare/PWM Start - * + Time Output Compare/PWM Start Interruption - * + Time Output Compare/PWM Start DMA - * + Time Input Capture Initialization - * + Time Input Capture Channel Configuration - * + Time Input Capture Start - * + Time Input Capture Start Interruption - * + Time Input Capture Start DMA - * + Time One Pulse Initialization - * + Time One Pulse Channel Configuration - * + Time One Pulse Start - * + Time Encoder Interface Initialization - * + Time Encoder Interface Start - * + Time Encoder Interface Start Interruption - * + Time Encoder Interface Start DMA - * + Commutation Event configuration with Interruption and DMA - * + Time OCRef clear configuration - * + Time External Clock configuration - @verbatim - ============================================================================== - ##### TIMER Generic features ##### - ============================================================================== - [..] The Timer features include: - (#) 16-bit up, down, up/down auto-reload counter. - (#) 16-bit programmable prescaler allowing dividing (also on the fly) the - counter clock frequency either by any factor between 1 and 65536. - (#) Up to 4 independent channels for: - (++) Input Capture - (++) Output Compare - (++) PWM generation (Edge and Center-aligned Mode) - (++) One-pulse mode output - - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Initialize the TIM low level resources by implementing the following functions - depending on the selected feature: - (++) Time Base : HAL_TIM_Base_MspInit() - (++) Input Capture : HAL_TIM_IC_MspInit() - (++) Output Compare : HAL_TIM_OC_MspInit() - (++) PWM generation : HAL_TIM_PWM_MspInit() - (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit() - (++) Encoder mode output : HAL_TIM_Encoder_MspInit() - - (#) Initialize the TIM low level resources : - (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); - (##) TIM pins configuration - (+++) Enable the clock for the TIM GPIOs using the following function: - __HAL_RCC_GPIOx_CLK_ENABLE(); - (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); - - (#) The external Clock can be configured, if needed (the default clock is the - internal clock from the APBx), using the following function: - HAL_TIM_ConfigClockSource, the clock configuration should be done before - any start function. - - (#) Configure the TIM in the desired functioning mode using one of the - Initialization function of this driver: - (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base - (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an - Output Compare signal. - (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a - PWM signal. - (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an - external signal. - (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer - in One Pulse Mode. - (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface. - - (#) Activate the TIM peripheral using one of the start functions depending from the feature used: - (++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT() - (++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT() - (++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT() - (++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT() - (++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT() - (++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM_Encoder_Start_IT(). - - (#) The DMA Burst is managed with the two following functions: - HAL_TIM_DMABurst_WriteStart() - HAL_TIM_DMABurst_ReadStart() - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup TIM TIM - * @brief TIM HAL module driver - * @{ - */ - -#ifdef HAL_TIM_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter); -static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter); -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter); -static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter); -static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter); -static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t InputTriggerSource); -static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma); -static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma); -static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, - TIM_SlaveConfigTypeDef * sSlaveConfig); -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup TIM_Exported_Functions TIM Exported Functions - * @{ - */ - -/** @defgroup TIM_Exported_Functions_Group1 Time Base functions - * @brief Time Base functions - * -@verbatim - ============================================================================== - ##### Time Base functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM base. - (+) De-initialize the TIM base. - (+) Start the Time Base. - (+) Stop the Time Base. - (+) Start the Time Base and enable interrupt. - (+) Stop the Time Base and disable interrupt. - (+) Start the Time Base and enable DMA transfer. - (+) Stop the Time Base and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Time base Unit according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - HAL_TIM_Base_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Set the Time Base configuration */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM Base peripheral - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIM_Base_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Base MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Base_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Base MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Base_MspDeInit could be implemented in the user file - */ -} - - -/** - * @brief Starts the TIM Base generation. - * @param htim TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Change the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Base generation. - * @param htim TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Base generation in interrupt mode. - * @param htim TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Enable the TIM Update interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Base generation in interrupt mode. - * @param htim TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - /* Disable the TIM Update interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Base generation in DMA mode. - * @param htim TIM handle - * @param pData The source Buffer address. - * @param Length The length of data to be transferred from memory to peripheral. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length); - - /* Enable the TIM Update DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Base generation in DMA mode. - * @param htim TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); - - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group2 Time Output Compare functions - * @brief Time Output Compare functions - * -@verbatim - ============================================================================== - ##### Time Output Compare functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM Output Compare. - (+) De-initialize the TIM Output Compare. - (+) Start the Time Output Compare. - (+) Stop the Time Output Compare. - (+) Start the Time Output Compare and enable interrupt. - (+) Stop the Time Output Compare and disable interrupt. - (+) Start the Time Output Compare and enable DMA transfer. - (+) Stop the Time Output Compare and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Output Compare according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init() - * @param htim TIM Output Compare handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_OC_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Init the base time for the Output Compare */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM peripheral - * @param htim TIM Output Compare handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_OC_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Output Compare MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OC_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Output Compare MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OC_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Output Compare signal generation. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation. - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in interrupt mode. - * @param htim TIM OC handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in interrupt mode. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in DMA mode. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @param pData The source Buffer address. - * @param Length The length of data to be transferred from memory to TIM peripheral - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in DMA mode. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group3 Time PWM functions - * @brief Time PWM functions - * -@verbatim - ============================================================================== - ##### Time PWM functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM OPWM. - (+) De-initialize the TIM PWM. - (+) Start the Time PWM. - (+) Stop the Time PWM. - (+) Start the Time PWM and enable interrupt. - (+) Stop the Time PWM and disable interrupt. - (+) Start the Time PWM and enable DMA transfer. - (+) Stop the Time PWM and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM PWM Time Base according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() - * @param htim TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_PWM_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Init the base time for the PWM */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM peripheral - * @param htim TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_PWM_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM PWM MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM PWM MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the PWM signal generation. - * @param htim TIM handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation. - * @param htim TIM handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the PWM signal generation in interrupt mode. - * @param htim TIM handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation in interrupt mode. - * @param htim TIM handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM PWM signal generation in DMA mode. - * @param htim TIM handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param pData The source Buffer address. - * @param Length The length of data to be transferred from memory to TIM peripheral - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Output Capture/Compare 3 request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM PWM signal generation in DMA mode. - * @param htim TIM handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group4 Time Input Capture functions - * @brief Time Input Capture functions - * -@verbatim - ============================================================================== - ##### Time Input Capture functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM Input Capture. - (+) De-initialize the TIM Input Capture. - (+) Start the Time Input Capture. - (+) Stop the Time Input Capture. - (+) Start the Time Input Capture and enable interrupt. - (+) Stop the Time Input Capture and disable interrupt. - (+) Start the Time Input Capture and enable DMA transfer. - (+) Stop the Time Input Capture and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Input Capture Time base according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_IC_DeInit() before HAL_TIM_IC_Init() - * @param htim TIM Input Capture handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_IC_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Init the base time for the input capture */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM peripheral - * @param htim TIM Input Capture handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_IC_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM INput Capture MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_IC_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Input Capture MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_IC_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Input Capture measurement. - * @param htim TIM Input Capture handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Input Capture measurement. - * @param htim TIM handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Disable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Input Capture measurement in interrupt mode. - * @param htim TIM Input Capture handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Input Capture measurement in interrupt mode. - * @param htim TIM handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Input Capture measurement on in DMA mode. - * @param htim TIM Input Capture handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param pData The destination Buffer address. - * @param Length The length of data to be transferred from TIM peripheral to memory. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Input Capture measurement in DMA mode. - * @param htim TIM Input Capture handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group5 Time One Pulse functions - * @brief Time One Pulse functions - * -@verbatim - ============================================================================== - ##### Time One Pulse functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM One Pulse. - (+) De-initialize the TIM One Pulse. - (+) Start the Time One Pulse. - (+) Stop the Time One Pulse. - (+) Start the Time One Pulse and enable interrupt. - (+) Stop the Time One Pulse and disable interrupt. - (+) Start the Time One Pulse and enable DMA transfer. - (+) Stop the Time One Pulse and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM One Pulse Time Base according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_OnePulse_DeInit() before HAL_TIM_OnePulse_Init() - * @param htim TIM OnePulse handle - * @param OnePulseMode Select the One pulse mode. - * This parameter can be one of the following values: - * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated. - * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_OPM_MODE(OnePulseMode)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_OnePulse_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Configure the Time base in the One Pulse Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Reset the OPM Bit */ - htim->Instance->CR1 &= ~TIM_CR1_OPM; - - /* Configure the OPM Mode */ - htim->Instance->CR1 |= OnePulseMode; - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM One Pulse - * @param htim TIM One Pulse handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIM_OnePulse_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM One Pulse MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OnePulse_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM One Pulse MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM One Pulse signal generation. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(OutputChannel); - - /* Enable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together - - No need to enable the counter, it's enabled automatically by hardware - (the counter starts in response to a stimulus and generate a pulse */ - - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channels to be disable - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(OutputChannel); - - /* Disable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ - - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM One Pulse signal generation in interrupt mode. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(OutputChannel); - - /* Enable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together - - No need to enable the counter, it's enabled automatically by hardware - (the counter starts in response to a stimulus and generate a pulse */ - - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation in interrupt mode. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(OutputChannel); - - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - - /* Disable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group6 Time Encoder functions - * @brief Time Encoder functions - * -@verbatim - ============================================================================== - ##### Time Encoder functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM Encoder. - (+) De-initialize the TIM Encoder. - (+) Start the Time Encoder. - (+) Stop the Time Encoder. - (+) Start the Time Encoder and enable interrupt. - (+) Stop the Time Encoder and disable interrupt. - (+) Start the Time Encoder and enable DMA transfer. - (+) Stop the Time Encoder and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Encoder Interface and initialize the associated handle. - * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) - * requires a timer reset to avoid unexpected direction - * due to DIR bit readonly in center aligned mode. - * Ex: call @ref HAL_TIM_Encoder_DeInit() before HAL_TIM_Encoder_Init() - * @param htim TIM Encoder Interface handle - * @param sConfig TIM Encoder Interface configuration structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig) -{ - uint32_t tmpsmcr = 0; - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode)); - assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection)); - assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection)); - assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); - assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_Encoder_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Reset the SMS bits */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - - /* Configure the Time base in the Encoder Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = htim->Instance->CCMR1; - - /* Get the TIMx CCER register value */ - tmpccer = htim->Instance->CCER; - - /* Set the encoder Mode */ - tmpsmcr |= sConfig->EncoderMode; - - /* Select the Capture Compare 1 and the Capture Compare 2 as input */ - tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); - tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8)); - - /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ - tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); - tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); - tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8); - tmpccmr1 |= (sConfig->IC1Filter << 4) | (sConfig->IC2Filter << 12); - - /* Set the TI1 and the TI2 Polarities */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); - tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); - tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4); - - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - - /* Write to TIMx CCMR1 */ - htim->Instance->CCMR1 = tmpccmr1; - - /* Write to TIMx CCER */ - htim->Instance->CCER = tmpccer; - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - - -/** - * @brief DeInitialize the TIM Encoder interface - * @param htim TIM Encoder handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIM_Encoder_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Encoder Interface MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Encoder_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Encoder Interface MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Encoder_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Encoder Interface. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Enable the encoder interface channels */ - switch (Channel) - { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - } - break; - - case TIM_CHANNEL_2: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - } - break; - - default : - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - } - break; - } - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Encoder Interface. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 and 2 - (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ - switch (Channel) - { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - } - break; - - case TIM_CHANNEL_2: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - } - break; - - default : - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - } - break; - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Encoder Interface in interrupt mode. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Enable the encoder interface channels */ - /* Enable the capture compare Interrupts 1 and/or 2 */ - switch (Channel) - { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - default : - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Encoder Interface in interrupt mode. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 and 2 - (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ - if(Channel == TIM_CHANNEL_1) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts 1 */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - else if(Channel == TIM_CHANNEL_2) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts 2 */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - else - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts 1 and 2 */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Encoder Interface in DMA mode. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @param pData1 The destination Buffer address for IC1. - * @param pData2 The destination Buffer address for IC2. - * @param Length The length of data to be transferred from TIM peripheral to memory. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length); - - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError; - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length); - - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - } - break; - - case TIM_CHANNEL_ALL: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length); - - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - default: - break; - } - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Encoder Interface in DMA mode. - * @param htim TIM Encoder Interface handle - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 and 2 - (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ - if(Channel == TIM_CHANNEL_1) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the capture compare DMA Request 1 */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - else if(Channel == TIM_CHANNEL_2) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare DMA Request 2 */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - else - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare DMA Request 1 and 2 */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ -/** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management - * @brief IRQ handler management - * -@verbatim - ============================================================================== - ##### IRQ handler management ##### - ============================================================================== - [..] - This section provides Timer IRQ handler function. - -@endverbatim - * @{ - */ -/** - * @brief This function handles TIM interrupts requests. - * @param htim TIM handle - * @retval None - */ -void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) -{ - /* Capture compare 1 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) - { - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - - /* Input capture event */ - if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - } - /* Capture compare 2 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - /* Input capture event */ - if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - /* Capture compare 3 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - /* Input capture event */ - if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - /* Capture compare 4 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - /* Input capture event */ - if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - /* TIM Update event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - HAL_TIM_PeriodElapsedCallback(htim); - } - } - /* TIM Break input event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); - HAL_TIMEx_BreakCallback(htim); - } - } - /* TIM Trigger detection event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - HAL_TIM_TriggerCallback(htim); - } - } - /* TIM commutation event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); - HAL_TIMEx_CommutationCallback(htim); - } - } -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. - (+) Configure External Clock source. - (+) Configure Complementary channels, break features and dead time. - (+) Configure Master and the Slave synchronization. - (+) Configure the DMA Burst Mode. - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the TIM Output Compare Channels according to the specified - * parameters in the TIM_OC_InitTypeDef. - * @param htim TIM Output Compare handle - * @param sConfig TIM Output Compare configuration structure - * @param Channel TIM Channels to configure - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, - TIM_OC_InitTypeDef* sConfig, - uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CHANNELS(Channel)); - assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 1 in Output Compare */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 2 in Output Compare */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_3: - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 3 in Output Compare */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_4: - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 4 in Output Compare */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_5: - { - /* Check the parameters */ - assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 5 in Output Compare */ - TIM_OC5_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_6: - { - /* Check the parameters */ - assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 6 in Output Compare */ - TIM_OC6_SetConfig(htim->Instance, sConfig); - } - break; - - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Input Capture Channels according to the specified - * parameters in the TIM_IC_InitTypeDef. - * @param htim TIM IC handle - * @param sConfig TIM Input Capture configuration structure - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity)); - assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - if (Channel == TIM_CHANNEL_1) - { - /* TI1 Configuration */ - TIM_TI1_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - - /* Set the IC1PSC value */ - htim->Instance->CCMR1 |= sConfig->ICPrescaler; - } - else if (Channel == TIM_CHANNEL_2) - { - /* TI2 Configuration */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_TI2_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC2PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; - - /* Set the IC2PSC value */ - htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8); - } - else if (Channel == TIM_CHANNEL_3) - { - /* TI3 Configuration */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - TIM_TI3_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC3PSC Bits */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; - - /* Set the IC3PSC value */ - htim->Instance->CCMR2 |= sConfig->ICPrescaler; - } - else - { - /* TI4 Configuration */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - TIM_TI4_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC4PSC Bits */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; - - /* Set the IC4PSC value */ - htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8); - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM PWM channels according to the specified - * parameters in the TIM_OC_InitTypeDef. - * @param htim TIM PWM handle - * @param sConfig TIM PWM configuration structure - * @param Channel TIM Channels to be configured - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, - TIM_OC_InitTypeDef* sConfig, - uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CHANNELS(Channel)); - assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Configure the Channel 1 in PWM mode */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; - htim->Instance->CCMR1 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Configure the Channel 2 in PWM mode */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; - htim->Instance->CCMR1 |= sConfig->OCFastMode << 8; - } - break; - - case TIM_CHANNEL_3: - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Configure the Channel 3 in PWM mode */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; - htim->Instance->CCMR2 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_4: - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Configure the Channel 4 in PWM mode */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; - htim->Instance->CCMR2 |= sConfig->OCFastMode << 8; - } - break; - - case TIM_CHANNEL_5: - { - /* Check the parameters */ - assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); - - /* Configure the Channel 5 in PWM mode */ - TIM_OC5_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel5*/ - htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; - htim->Instance->CCMR3 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_6: - { - /* Check the parameters */ - assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); - - /* Configure the Channel 5 in PWM mode */ - TIM_OC6_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel6 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; - htim->Instance->CCMR3 |= sConfig->OCFastMode << 8; - } - break; - - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM One Pulse Channels according to the specified - * parameters in the TIM_OnePulse_InitTypeDef. - * @param htim TIM One Pulse handle - * @param sConfig TIM One Pulse configuration structure - * @param OutputChannel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @param InputChannel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel) -{ - TIM_OC_InitTypeDef temp1; - - /* Check the parameters */ - assert_param(IS_TIM_OPM_CHANNELS(OutputChannel)); - assert_param(IS_TIM_OPM_CHANNELS(InputChannel)); - - if(OutputChannel != InputChannel) - { - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Extract the Ouput compare configuration from sConfig structure */ - temp1.OCMode = sConfig->OCMode; - temp1.Pulse = sConfig->Pulse; - temp1.OCPolarity = sConfig->OCPolarity; - temp1.OCNPolarity = sConfig->OCNPolarity; - temp1.OCIdleState = sConfig->OCIdleState; - temp1.OCNIdleState = sConfig->OCNIdleState; - - switch (OutputChannel) - { - case TIM_CHANNEL_1: - { - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - TIM_OC1_SetConfig(htim->Instance, &temp1); - } - break; - case TIM_CHANNEL_2: - { - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_OC2_SetConfig(htim->Instance, &temp1); - } - break; - default: - break; - } - - switch (InputChannel) - { - case TIM_CHANNEL_1: - { - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity, - sConfig->ICSelection, sConfig->ICFilter); - - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - - /* Select the Trigger source */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI1FP1; - - /* Select the Slave Mode */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; - } - break; - case TIM_CHANNEL_2: - { - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity, - sConfig->ICSelection, sConfig->ICFilter); - - /* Reset the IC2PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; - - /* Select the Trigger source */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI2FP2; - - /* Select the Slave Mode */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; - } - break; - - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral - * @param htim TIM handle - * @param BurstBaseAddress TIM Base address from when the DMA will starts the Data write - * This parameters can be on of the following values: - * @arg TIM_DMABASE_CR1 - * @arg TIM_DMABASE_CR2 - * @arg TIM_DMABASE_SMCR - * @arg TIM_DMABASE_DIER - * @arg TIM_DMABASE_SR - * @arg TIM_DMABASE_EGR - * @arg TIM_DMABASE_CCMR1 - * @arg TIM_DMABASE_CCMR2 - * @arg TIM_DMABASE_CCER - * @arg TIM_DMABASE_CNT - * @arg TIM_DMABASE_PSC - * @arg TIM_DMABASE_ARR - * @arg TIM_DMABASE_RCR - * @arg TIM_DMABASE_CCR1 - * @arg TIM_DMABASE_CCR2 - * @arg TIM_DMABASE_CCR3 - * @arg TIM_DMABASE_CCR4 - * @arg TIM_DMABASE_BDTR - * @arg TIM_DMABASE_DCR - * @param BurstRequestSrc TIM DMA Request sources - * This parameters can be on of the following values: - * @arg TIM_DMA_UPDATE: TIM update Interrupt source - * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source - * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source - * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source - * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source - * @arg TIM_DMA_COM: TIM Commutation DMA source - * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source - * @param BurstBuffer The Buffer address. - * @param BurstLength DMA Burst length. This parameter can be one value - * between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, - uint32_t* BurstBuffer, uint32_t BurstLength) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); - assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - assert_param(IS_TIM_DMA_LENGTH(BurstLength)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((BurstBuffer == 0 ) && (BurstLength > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_COM: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_TRIGGER: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - default: - break; - } - /* configure the DMA Burst Mode */ - htim->Instance->DCR = BurstBaseAddress | BurstLength; - - /* Enable the TIM DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); - - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM DMA Burst mode - * @param htim TIM handle - * @param BurstRequestSrc TIM DMA Request sources to disable - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - - /* Abort the DMA transfer (at least disable the DMA channel) */ - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]); - } - break; - case TIM_DMA_CC1: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]); - } - break; - case TIM_DMA_CC2: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]); - } - break; - case TIM_DMA_CC3: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]); - } - break; - case TIM_DMA_CC4: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]); - } - break; - case TIM_DMA_COM: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]); - } - break; - case TIM_DMA_TRIGGER: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]); - } - break; - default: - break; - } - - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory - * @param htim TIM handle - * @param BurstBaseAddress TIM Base address from when the DMA will starts the Data read - * This parameters can be on of the following values: - * @arg TIM_DMABASE_CR1 - * @arg TIM_DMABASE_CR2 - * @arg TIM_DMABASE_SMCR - * @arg TIM_DMABASE_DIER - * @arg TIM_DMABASE_SR - * @arg TIM_DMABASE_EGR - * @arg TIM_DMABASE_CCMR1 - * @arg TIM_DMABASE_CCMR2 - * @arg TIM_DMABASE_CCER - * @arg TIM_DMABASE_CNT - * @arg TIM_DMABASE_PSC - * @arg TIM_DMABASE_ARR - * @arg TIM_DMABASE_RCR - * @arg TIM_DMABASE_CCR1 - * @arg TIM_DMABASE_CCR2 - * @arg TIM_DMABASE_CCR3 - * @arg TIM_DMABASE_CCR4 - * @arg TIM_DMABASE_BDTR - * @arg TIM_DMABASE_DCR - * @param BurstRequestSrc TIM DMA Request sources - * This parameters can be on of the following values: - * @arg TIM_DMA_UPDATE: TIM update Interrupt source - * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source - * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source - * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source - * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source - * @arg TIM_DMA_COM: TIM Commutation DMA source - * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source - * @param BurstBuffer The Buffer address. - * @param BurstLength DMA Burst length. This parameter can be one value - * between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, - uint32_t *BurstBuffer, uint32_t BurstLength) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); - assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - assert_param(IS_TIM_DMA_LENGTH(BurstLength)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((BurstBuffer == 0 ) && (BurstLength > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_COM: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_TRIGGER: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - default: - break; - } - - /* configure the DMA Burst Mode */ - htim->Instance->DCR = BurstBaseAddress | BurstLength; - - /* Enable the TIM DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); - - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stop the DMA burst reading - * @param htim TIM handle - * @param BurstRequestSrc TIM DMA Request sources to disable. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - - /* Abort the DMA transfer (at least disable the DMA channel) */ - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]); - } - break; - case TIM_DMA_CC1: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]); - } - break; - case TIM_DMA_CC2: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]); - } - break; - case TIM_DMA_CC3: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]); - } - break; - case TIM_DMA_CC4: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]); - } - break; - case TIM_DMA_COM: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]); - } - break; - case TIM_DMA_TRIGGER: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]); - } - break; - default: - break; - } - - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Generate a software event - * @param htim TIM handle - * @param EventSource specifies the event source. - * This parameter can be one of the following values: - * @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source - * @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source - * @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source - * @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source - * @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source - * @arg TIM_EVENTSOURCE_COM: Timer COM event source - * @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source - * @arg TIM_EVENTSOURCE_BREAK: Timer Break event source - * @arg TIM_EVENTSOURCE_BREAK2: Timer Break2 event source - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_EVENT_SOURCE(EventSource)); - - /* Process Locked */ - __HAL_LOCK(htim); - - /* Change the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - - /* Set the event sources */ - htim->Instance->EGR = EventSource; - - /* Change the TIM state */ - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Configures the OCRef clear feature - * @param htim TIM handle - * @param sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that - * contains the OCREF clear feature and parameters for the TIM peripheral. - * @param Channel specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @arg TIM_Channel_4: TIM Channel 4 - * @arg TIM_Channel_5: TIM Channel 5 - * @arg TIM_Channel_6: TIM Channel 6 - * @retval None - */ -HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, - TIM_ClearInputConfigTypeDef *sClearInputConfig, - uint32_t Channel) -{ - uint32_t tmpsmcr = 0; - - /* Check the parameters */ - assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); - assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); - - /* Process Locked */ - __HAL_LOCK(htim); - - switch (sClearInputConfig->ClearInputSource) - { - case TIM_CLEARINPUTSOURCE_NONE: - { - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* Clear the OCREF clear selection bit */ - tmpsmcr &= ~TIM_SMCR_OCCS; - - /* Clear the ETR Bits */ - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - - /* Set TIMx_SMCR */ - htim->Instance->SMCR = tmpsmcr; - } - break; - - case TIM_CLEARINPUTSOURCE_OCREFCLR: - { - /* Clear the OCREF clear selection bit */ - htim->Instance->SMCR &= ~TIM_SMCR_OCCS; - } - break; - - case TIM_CLEARINPUTSOURCE_ETR: - { - /* Check the parameters */ - assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity)); - assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); - assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); - - TIM_ETR_SetConfig(htim->Instance, - sClearInputConfig->ClearInputPrescaler, - sClearInputConfig->ClearInputPolarity, - sClearInputConfig->ClearInputFilter); - - /* Set the OCREF clear selection bit */ - htim->Instance->SMCR |= TIM_SMCR_OCCS; - } - break; - - default: - break; - } - - switch (Channel) - { - case TIM_CHANNEL_1: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE; - } - else - { - /* Disable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE; - } - } - break; - case TIM_CHANNEL_2: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE; - } - else - { - /* Disable the OCREF clear feature for Channel 2 */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE; - } - } - break; - case TIM_CHANNEL_3: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE; - } - else - { - /* Disable the OCREF clear feature for Channel 3 */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE; - } - } - break; - case TIM_CHANNEL_4: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE; - } - else - { - /* Disable the OCREF clear feature for Channel 4 */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE; - } - } - break; - case TIM_CHANNEL_5: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC5CE; - } - else - { - /* Disable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5CE; - } - } - break; - case TIM_CHANNEL_6: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC6CE; - } - else - { - /* Disable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6CE; - } - } - break; - default: - break; - } - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the clock source to be used - * @param htim TIM handle - * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that - * contains the clock source information for the TIM peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig) -{ - uint32_t tmpsmcr = 0; - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Check the parameters */ - assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); - - /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ - tmpsmcr = htim->Instance->SMCR; - tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - htim->Instance->SMCR = tmpsmcr; - - switch (sClockSourceConfig->ClockSource) - { - case TIM_CLOCKSOURCE_INTERNAL: - { - assert_param(IS_TIM_INSTANCE(htim->Instance)); - /* Disable slave mode to clock the prescaler directly with the internal clock */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - } - break; - - case TIM_CLOCKSOURCE_ETRMODE1: - { - /* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/ - assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); - - /* Check ETR input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - /* Configure the ETR Clock source */ - TIM_ETR_SetConfig(htim->Instance, - sClockSourceConfig->ClockPrescaler, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - /* Reset the SMS and TS Bits */ - tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - /* Select the External clock mode1 and the ETRF trigger */ - tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - } - break; - - case TIM_CLOCKSOURCE_ETRMODE2: - { - /* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/ - assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance)); - - /* Check ETR input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - /* Configure the ETR Clock source */ - TIM_ETR_SetConfig(htim->Instance, - sClockSourceConfig->ClockPrescaler, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - /* Enable the External clock mode2 */ - htim->Instance->SMCR |= TIM_SMCR_ECE; - } - break; - - case TIM_CLOCKSOURCE_TI1: - { - /* Check whether or not the timer instance supports external clock mode 1 */ - assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); - - /* Check TI1 input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - TIM_TI1_ConfigInputStage(htim->Instance, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - } - break; - - case TIM_CLOCKSOURCE_TI2: - { - /* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/ - assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); - - /* Check TI2 input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - TIM_TI2_ConfigInputStage(htim->Instance, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - } - break; - - case TIM_CLOCKSOURCE_TI1ED: - { - /* Check whether or not the timer instance supports external clock mode 1 */ - assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); - - /* Check TI1 input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - TIM_TI1_ConfigInputStage(htim->Instance, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - } - break; - - case TIM_CLOCKSOURCE_ITR0: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0); - } - break; - - case TIM_CLOCKSOURCE_ITR1: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1); - } - break; - - case TIM_CLOCKSOURCE_ITR2: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2); - } - break; - - case TIM_CLOCKSOURCE_ITR3: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3); - } - break; - - default: - break; - } - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Selects the signal connected to the TI1 input: direct from CH1_input - * or a XOR combination between CH1_input, CH2_input & CH3_input - * @param htim TIM handle. - * @param TI1_Selection Indicate whether or not channel 1 is connected to the - * output of a XOR gate. - * This parameter can be one of the following values: - * @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input - * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3 - * pins are connected to the TI1 input (XOR combination) - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection) -{ - uint32_t tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TI1SELECTION(TI1_Selection)); - - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - - /* Reset the TI1 selection */ - tmpcr2 &= ~TIM_CR2_TI1S; - - /* Set the TI1 selection */ - tmpcr2 |= TI1_Selection; - - /* Write to TIMxCR2 */ - htim->Instance->CR2 = tmpcr2; - - return HAL_OK; -} - -/** - * @brief Configures the TIM in Slave mode - * @param htim TIM handle. - * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that - * contains the selected trigger (internal trigger input, filtered - * timer input or external trigger input) and the ) and the Slave - * mode (Disable, Reset, Gated, Trigger, External clock mode 1). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig) -{ - /* Check the parameters */ - assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); - assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); - assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); - - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - TIM_SlaveTimer_SetConfig(htim, sSlaveConfig); - - /* Disable Trigger Interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER); - - /* Disable Trigger DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; - } - -/** - * @brief Configures the TIM in Slave mode in interrupt mode - * @param htim TIM handle. - * @param sSlaveConfig pointer to a TIM_SlaveConfigTypeDef structure that - * contains the selected trigger (internal trigger input, filtered - * timer input or external trigger input) and the ) and the Slave - * mode (Disable, Reset, Gated, Trigger, External clock mode 1). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim, - TIM_SlaveConfigTypeDef * sSlaveConfig) - { - /* Check the parameters */ - assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); - assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); - assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); - - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - TIM_SlaveTimer_SetConfig(htim, sSlaveConfig); - - /* Enable Trigger Interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER); - - /* Disable Trigger DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; - } - -/** - * @brief Read the captured value from Capture Compare unit - * @param htim TIM handle. - * @param Channel TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval Captured value - */ -uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - uint32_t tmpreg = 0; - - __HAL_LOCK(htim); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Return the capture 1 value */ - tmpreg = htim->Instance->CCR1; - - break; - } - case TIM_CHANNEL_2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Return the capture 2 value */ - tmpreg = htim->Instance->CCR2; - - break; - } - - case TIM_CHANNEL_3: - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Return the capture 3 value */ - tmpreg = htim->Instance->CCR3; - - break; - } - - case TIM_CHANNEL_4: - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Return the capture 4 value */ - tmpreg = htim->Instance->CCR4; - - break; - } - - default: - break; - } - - __HAL_UNLOCK(htim); - return tmpreg; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions - * @brief TIM Callbacks functions - * -@verbatim - ============================================================================== - ##### TIM Callbacks functions ##### - ============================================================================== - [..] - This section provides TIM callback functions: - (+) Timer Period elapsed callback - (+) Timer Output Compare callback - (+) Timer Input capture callback - (+) Timer Trigger callback - (+) Timer Error callback - -@endverbatim - * @{ - */ - -/** - * @brief Period elapsed callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file - */ - -} -/** - * @brief Output Compare callback in non-blocking mode - * @param htim TIM OC handle - * @retval None - */ -__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file - */ -} -/** - * @brief Input Capture callback in non-blocking mode - * @param htim TIM IC handle - * @retval None - */ -__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_IC_CaptureCallback could be implemented in the user file - */ -} - -/** - * @brief PWM Pulse finished callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file - */ -} - -/** - * @brief Hall Trigger detection callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_TriggerCallback could be implemented in the user file - */ -} - -/** - * @brief Timer error callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_ErrorCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - ============================================================================== - ##### Peripheral State functions ##### - ============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the TIM Base handle state. - * @param htim TIM Base handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM OC handle state. - * @param htim TIM Ouput Compare handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM PWM handle state. - * @param htim TIM handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM Input Capture handle state. - * @param htim TIM IC handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM One Pulse Mode handle state. - * @param htim TIM OPM handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM Encoder Mode handle state. - * @param htim TIM Encoder handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @} - */ - -/** - * @brief TIM DMA error callback - * @param hdma pointer to DMA handle. - * @retval None - */ -void TIM_DMAError(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIM_ErrorCallback(htim); -} - -/** - * @brief TIM DMA Delay Pulse complete callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - if (hdma == htim->hdma[TIM_DMA_ID_CC1]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - } - - HAL_TIM_PWM_PulseFinishedCallback(htim); - - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; -} -/** - * @brief TIM DMA Capture complete callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - if (hdma == htim->hdma[TIM_DMA_ID_CC1]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - } - - HAL_TIM_IC_CaptureCallback(htim); - - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; -} - -/** - * @brief TIM DMA Period Elapse complete callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIM_PeriodElapsedCallback(htim); -} - -/** - * @brief TIM DMA Trigger callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIM_TriggerCallback(htim); -} - -/** - * @brief Time Base configuration - * @param TIMx TIM peripheral - * @param Structure TIM Base configuration structure - * @retval None - */ -void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) -{ - uint32_t tmpcr1 = 0; - tmpcr1 = TIMx->CR1; - - /* Set TIM Time Base Unit parameters ---------------------------------------*/ - if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - { - /* Select the Counter Mode */ - tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - tmpcr1 |= Structure->CounterMode; - } - - if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - { - /* Set the clock division */ - tmpcr1 &= ~TIM_CR1_CKD; - tmpcr1 |= (uint32_t)Structure->ClockDivision; - } - - /* Set the auto-reload preload */ - tmpcr1 &= ~TIM_CR1_ARPE; - tmpcr1 |= (uint32_t)Structure->AutoReloadPreload; - - TIMx->CR1 = tmpcr1; - - /* Set the Autoreload value */ - TIMx->ARR = (uint32_t)Structure->Period ; - - /* Set the Prescaler value */ - TIMx->PSC = (uint32_t)Structure->Prescaler; - - if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - { - /* Set the Repetition Counter value */ - TIMx->RCR = Structure->RepetitionCounter; - } - - /* Generate an update event to reload the Prescaler - and the repetition counter(only for TIM1 and TIM8) value immediately */ - TIMx->EGR = TIM_EGR_UG; -} - -/** - * @brief Time Ouput Compare 1 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= ~TIM_CCER_CC1E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~TIM_CCMR1_OC1M; - tmpccmrx &= ~TIM_CCMR1_CC1S; - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC1P; - /* Set the Output Compare Polarity */ - tmpccer |= OC_Config->OCPolarity; - - if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) - { - /* Check parameters */ - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC1NP; - /* Set the Output N Polarity */ - tmpccer |= OC_Config->OCNPolarity; - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC1NE; - } - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS1; - tmpcr2 &= ~TIM_CR2_OIS1N; - /* Set the Output Idle state */ - tmpcr2 |= OC_Config->OCIdleState; - /* Set the Output N Idle state */ - tmpcr2 |= OC_Config->OCNIdleState; - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR1 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Time Ouput Compare 2 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR1_OC2M; - tmpccmrx &= ~TIM_CCMR1_CC2S; - - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC2P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 4); - - if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) - { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC2NP; - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 4); - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC2NE; - - } - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS2; - tmpcr2 &= ~TIM_CR2_OIS2N; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 2); - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 2); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR2 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Time Ouput Compare 3 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 3: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC3M; - tmpccmrx &= ~TIM_CCMR2_CC3S; - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC3P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 8); - - if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) - { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC3NP; - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 8); - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC3NE; - } - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS3; - tmpcr2 &= ~TIM_CR2_OIS3N; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 4); - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 4); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR3 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Time Ouput Compare 4 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC4M; - tmpccmrx &= ~TIM_CCMR2_CC4S; - - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC4P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 12); - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS4; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 6); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR4 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Timer Ouput Compare 5 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the output: Reset the CCxE Bit */ - TIMx->CCER &= ~TIM_CCER_CC5E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR3; - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~(TIM_CCMR3_OC5M); - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC5P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 16); - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS5; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 8); - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR3 */ - TIMx->CCMR3 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR5 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Timer Ouput Compare 6 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config The ouput configuration structure - * @retval None - */ -static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the output: Reset the CCxE Bit */ - TIMx->CCER &= ~TIM_CCER_CC6E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR3; - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~(TIM_CCMR3_OC6M); - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= (uint32_t)~TIM_CCER_CC6P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 20); - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS6; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 10); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR3 */ - TIMx->CCMR3 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR6 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, - TIM_SlaveConfigTypeDef * sSlaveConfig) -{ - uint32_t tmpsmcr = 0; - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* Reset the Trigger Selection Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - /* Set the Input Trigger source */ - tmpsmcr |= sSlaveConfig->InputTrigger; - - /* Reset the slave mode Bits */ - tmpsmcr &= ~TIM_SMCR_SMS; - /* Set the slave mode */ - tmpsmcr |= sSlaveConfig->SlaveMode; - - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - - /* Configure the trigger prescaler, filter, and polarity */ - switch (sSlaveConfig->InputTrigger) - { - case TIM_TS_ETRF: - { - /* Check the parameters */ - assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler)); - assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - /* Configure the ETR Trigger source */ - TIM_ETR_SetConfig(htim->Instance, - sSlaveConfig->TriggerPrescaler, - sSlaveConfig->TriggerPolarity, - sSlaveConfig->TriggerFilter); - } - break; - - case TIM_TS_TI1F_ED: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = htim->Instance->CCER; - htim->Instance->CCER &= ~TIM_CCER_CC1E; - tmpccmr1 = htim->Instance->CCMR1; - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4); - - /* Write to TIMx CCMR1 and CCER registers */ - htim->Instance->CCMR1 = tmpccmr1; - htim->Instance->CCER = tmpccer; - - } - break; - - case TIM_TS_TI1FP1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - - /* Configure TI1 Filter and Polarity */ - TIM_TI1_ConfigInputStage(htim->Instance, - sSlaveConfig->TriggerPolarity, - sSlaveConfig->TriggerFilter); - } - break; - - case TIM_TS_TI2FP2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - - /* Configure TI2 Filter and Polarity */ - TIM_TI2_ConfigInputStage(htim->Instance, - sSlaveConfig->TriggerPolarity, - sSlaveConfig->TriggerFilter); - } - break; - - case TIM_TS_ITR0: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - case TIM_TS_ITR1: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - case TIM_TS_ITR2: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - case TIM_TS_ITR3: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - default: - break; - } -} - -/** - * @brief Configure the TI1 as Input. - * @param TIMx to select the TIM peripheral. - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1. - * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2. - * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC. - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1 - * (on channel2 path) is used as the input signal. Therefore CCMR1 must be - * protected against un-initialized filter and polarity values. - */ -void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= ~TIM_CCER_CC1E; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - - /* Select the Input */ - if(IS_TIM_CC2_INSTANCE(TIMx) != RESET) - { - tmpccmr1 &= ~TIM_CCMR1_CC1S; - tmpccmr1 |= TIM_ICSelection; - } - else - { - tmpccmr1 |= TIM_CCMR1_CC1S_0; - } - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - tmpccmr1 |= ((TIM_ICFilter << 4) & TIM_CCMR1_IC1F); - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the Polarity and Filter for TI1. - * @param TIMx to select the TIM peripheral. - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = TIMx->CCER; - TIMx->CCER &= ~TIM_CCER_CC1E; - tmpccmr1 = TIMx->CCMR1; - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - tmpccmr1 |= (TIM_ICFilter << 4); - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - tmpccer |= TIM_ICPolarity; - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI2 as Input. - * @param TIMx to select the TIM peripheral - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2. - * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1. - * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC. - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2 - * (on channel1 path) is used as the input signal. Therefore CCMR1 must be - * protected against un-initialized filter and polarity values. - */ -static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - - /* Select the Input */ - tmpccmr1 &= ~TIM_CCMR1_CC2S; - tmpccmr1 |= (TIM_ICSelection << 8); - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - tmpccmr1 |= ((TIM_ICFilter << 12) & TIM_CCMR1_IC2F); - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - tmpccer |= ((TIM_ICPolarity << 4) & (TIM_CCER_CC2P | TIM_CCER_CC2NP)); - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the Polarity and Filter for TI2. - * @param TIMx to select the TIM peripheral. - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - tmpccmr1 |= (TIM_ICFilter << 12); - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - tmpccer |= (TIM_ICPolarity << 4); - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI3 as Input. - * @param TIMx to select the TIM peripheral - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3. - * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4. - * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC. - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4 - * (on channel1 path) is used as the input signal. Therefore CCMR2 must be - * protected against un-initialized filter and polarity values. - */ -static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr2 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 3: Reset the CC3E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; - - /* Select the Input */ - tmpccmr2 &= ~TIM_CCMR2_CC3S; - tmpccmr2 |= TIM_ICSelection; - - /* Set the filter */ - tmpccmr2 &= ~TIM_CCMR2_IC3F; - tmpccmr2 |= ((TIM_ICFilter << 4) & TIM_CCMR2_IC3F); - - /* Select the Polarity and set the CC3E Bit */ - tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP); - tmpccer |= ((TIM_ICPolarity << 8) & (TIM_CCER_CC3P | TIM_CCER_CC3NP)); - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI4 as Input. - * @param TIMx to select the TIM peripheral - * @param TIM_ICPolarity The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4. - * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3. - * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC. - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3 - * (on channel1 path) is used as the input signal. Therefore CCMR2 must be - * protected against un-initialized filter and polarity values. - * @retval None - */ -static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr2 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; - - /* Select the Input */ - tmpccmr2 &= ~TIM_CCMR2_CC4S; - tmpccmr2 |= (TIM_ICSelection << 8); - - /* Set the filter */ - tmpccmr2 &= ~TIM_CCMR2_IC4F; - tmpccmr2 |= ((TIM_ICFilter << 12) & TIM_CCMR2_IC4F); - - /* Select the Polarity and set the CC4E Bit */ - tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP); - tmpccer |= ((TIM_ICPolarity << 12) & (TIM_CCER_CC4P | TIM_CCER_CC4NP)); - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - TIMx->CCER = tmpccer ; -} - -/** - * @brief Selects the Input Trigger source - * @param TIMx to select the TIM peripheral - * @param InputTriggerSource The Input Trigger source. - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal Trigger 0 - * @arg TIM_TS_ITR1: Internal Trigger 1 - * @arg TIM_TS_ITR2: Internal Trigger 2 - * @arg TIM_TS_ITR3: Internal Trigger 3 - * @arg TIM_TS_TI1F_ED: TI1 Edge Detector - * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 - * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 - * @arg TIM_TS_ETRF: External Trigger input - * @retval None - */ -static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t InputTriggerSource) -{ - uint32_t tmpsmcr = 0; - - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - /* Reset the TS Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - /* Set the Input Trigger source and the slave mode*/ - tmpsmcr |= InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1; - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} -/** - * @brief Configures the TIMx External Trigger (ETR). - * @param TIMx to select the TIM peripheral - * @param TIM_ExtTRGPrescaler The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ETRPRESCALER_DIV1 : ETRP Prescaler OFF. - * @arg TIM_ETRPRESCALER_DIV2 : ETRP frequency divided by 2. - * @arg TIM_ETRPRESCALER_DIV4 : ETRP frequency divided by 4. - * @arg TIM_ETRPRESCALER_DIV8 : ETRP frequency divided by 8. - * @param TIM_ExtTRGPolarity The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ETRPOLARITY_INVERTED : active low or falling edge active. - * @arg TIM_ETRPOLARITY_NONINVERTED : active high or rising edge active. - * @param ExtTRGFilter External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) -{ - uint32_t tmpsmcr = 0; - - tmpsmcr = TIMx->SMCR; - - /* Reset the ETR Bits */ - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - - /* Set the Prescaler, the Filter value and the Polarity */ - tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8))); - - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} - -/** - * @brief Enables or disables the TIM Capture Compare Channel x. - * @param TIMx to select the TIM peripheral - * @param Channel specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 - * @arg TIM_CHANNEL_2: TIM Channel 2 - * @arg TIM_CHANNEL_3: TIM Channel 3 - * @arg TIM_CHANNEL_4: TIM Channel 4 - * @param ChannelState: specifies the TIM Channel CCxE bit new state. - * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable. - * @retval None - */ -void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState) -{ - uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(TIMx)); - assert_param(IS_TIM_CHANNELS(Channel)); - - tmp = TIM_CCER_CC1E << Channel; - - /* Reset the CCxE Bit */ - TIMx->CCER &= ~tmp; - - /* Set or reset the CCxE Bit */ - TIMx->CCER |= (uint32_t)(ChannelState << Channel); -} - - -/** - * @} - */ - -#endif /* HAL_TIM_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c deleted file mode 100644 index 754c1a71..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c +++ /dev/null @@ -1,2243 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim_ex.c - * @author MCD Application Team - * @brief TIM HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Timer Extended peripheral: - * + Time Hall Sensor Interface Initialization - * + Time Hall Sensor Interface Start - * + Time Complementary signal break and dead time configuration - * + Time Master and Slave synchronization configuration - * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6) - * + Time OCRef clear configuration - * + Timer remapping capabilities configuration - @verbatim - ============================================================================== - ##### TIMER Extended features ##### - ============================================================================== - [..] - The Timer Extended features include: - (#) Complementary outputs with programmable dead-time for : - (++) Output Compare - (++) PWM generation (Edge and Center-aligned Mode) - (++) One-pulse mode output - (#) Synchronization circuit to control the timer with external signals and to - interconnect several timers together. - (#) Break input to put the timer output signals in reset state or in a known state. - (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for - positioning purposes - - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Initialize the TIM low level resources by implementing the following functions - depending on the selected feature: - (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit() - - (#) Initialize the TIM low level resources : - (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); - (##) TIM pins configuration - (+++) Enable the clock for the TIM GPIOs using the following function: - __HAL_RCC_GPIOx_CLK_ENABLE(); - (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); - - (#) The external Clock can be configured, if needed (the default clock is the - internal clock from the APBx), using the following function: - HAL_TIM_ConfigClockSource, the clock configuration should be done before - any start function. - - (#) Configure the TIM in the desired functioning mode using one of the - initialization function of this driver: - (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutationEvent(): to use the - Timer Hall Sensor Interface and the commutation event with the corresponding - Interrupt and DMA request if needed (Note that One Timer is used to interface - with the Hall sensor Interface and another Timer should be used to use - the commutation event). - - (#) Activate the TIM peripheral using one of the start functions: - (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() - (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() - (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() - (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). - - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** -*/ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup TIMEx TIMEx - * @brief TIM Extended HAL module driver - * @{ - */ - -#ifdef HAL_TIM_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -#define BDTR_BKF_SHIFT (16) -#define BDTR_BK2F_SHIFT (20) -#define TIMx_ETRSEL_MASK ((uint32_t)0x0003C000) - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); - -/* Private functions ---------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions - * @{ - */ - -/** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions - * @brief Timer Hall Sensor functions - * -@verbatim - ============================================================================== - ##### Timer Hall Sensor functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure TIM HAL Sensor. - (+) De-initialize TIM HAL Sensor. - (+) Start the Hall Sensor Interface. - (+) Stop the Hall Sensor Interface. - (+) Start the Hall Sensor Interface and enable interrupts. - (+) Stop the Hall Sensor Interface and disable interrupts. - (+) Start the Hall Sensor Interface and enable DMA transfers. - (+) Stop the Hall Sensor Interface and disable DMA transfers. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle. - * @param htim TIM Encoder Interface handle - * @param sConfig TIM Hall Sensor configuration structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) -{ - TIM_OC_InitTypeDef OC_Config; - - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIMEx_HallSensor_MspInit(htim); - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - - /* Configure the Time base in the Encoder Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ - TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); - - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - /* Set the IC1PSC value */ - htim->Instance->CCMR1 |= sConfig->IC1Prescaler; - - /* Enable the Hall sensor interface (XOR function of the three inputs) */ - htim->Instance->CR2 |= TIM_CR2_TI1S; - - /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI1F_ED; - - /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; - - /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ - OC_Config.OCFastMode = TIM_OCFAST_DISABLE; - OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; - OC_Config.OCMode = TIM_OCMODE_PWM2; - OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; - OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; - OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; - OC_Config.Pulse = sConfig->Commutation_Delay; - - TIM_OC2_SetConfig(htim->Instance, &OC_Config); - - /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 - register to 101 */ - htim->Instance->CR2 &= ~TIM_CR2_MMS; - htim->Instance->CR2 |= TIM_TRGO_OC2REF; - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM Hall Sensor interface - * @param htim TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIMEx_HallSensor_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Hall Sensor MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Hall Sensor MSP. - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Hall Sensor Interface. - * @param htim TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - /* Enable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Hall sensor Interface. - * @param htim TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1, 2 and 3 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Hall Sensor Interface in interrupt mode. - * @param htim TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - /* Enable the capture compare Interrupts 1 event */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - - /* Enable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Hall Sensor Interface in interrupt mode. - * @param htim TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts event */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Hall Sensor Interface in DMA mode. - * @param htim TIM Hall Sensor handle - * @param pData The destination Buffer address. - * @param Length The length of data to be transferred from TIM peripheral to memory. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - /* Enable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - - /* Set the DMA Input Capture 1 Callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel for Capture 1*/ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); - - /* Enable the capture compare 1 Interrupt */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Hall Sensor Interface in DMA mode. - * @param htim TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - - /* Disable the capture compare Interrupts 1 event */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions - * @brief Timer Complementary Output Compare functions - * -@verbatim - ============================================================================== - ##### Timer Complementary Output Compare functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Start the Complementary Output Compare/PWM. - (+) Stop the Complementary Output Compare/PWM. - (+) Start the Complementary Output Compare/PWM and enable interrupts. - (+) Stop the Complementary Output Compare/PWM and disable interrupts. - (+) Start the Complementary Output Compare/PWM and enable DMA transfers. - (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Starts the TIM Output Compare signal generation on the complementary - * output. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation on the complementary - * output. - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in interrupt mode - * on the complementary output. - * @param htim TIM OC handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the TIM Break interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); - - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in interrupt mode - * on the complementary output. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - uint32_t tmpccer = 0; - - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the TIM Break interrupt (only if no more channel is active) */ - tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) - { - __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); - } - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in DMA mode - * on the complementary output. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @param pData The source Buffer address. - * @param Length The length of data to be transferred from memory to TIM peripheral - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: -{ - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in DMA mode - * on the complementary output. - * @param htim TIM Output Compare handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Output Compare DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Output Compare DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Output Compare DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions - * @brief Timer Complementary PWM functions - * -@verbatim - ============================================================================== - ##### Timer Complementary PWM functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Start the Complementary PWM. - (+) Stop the Complementary PWM. - (+) Start the Complementary PWM and enable interrupts. - (+) Stop the Complementary PWM and disable interrupts. - (+) Start the Complementary PWM and enable DMA transfers. - (+) Stop the Complementary PWM and disable DMA transfers. - (+) Start the Complementary Input Capture measurement. - (+) Stop the Complementary Input Capture. - (+) Start the Complementary Input Capture and enable interrupts. - (+) Stop the Complementary Input Capture and disable interrupts. - (+) Start the Complementary Input Capture and enable DMA transfers. - (+) Stop the Complementary Input Capture and disable DMA transfers. - (+) Start the Complementary One Pulse generation. - (+) Stop the Complementary One Pulse. - (+) Start the Complementary One Pulse and enable interrupts. - (+) Stop the Complementary One Pulse and disable interrupts. - -@endverbatim - * @{ - */ - -/** - * @brief Starts the PWM signal generation on the complementary output. - * @param htim TIM handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation on the complementary output. - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the PWM signal generation in interrupt mode on the - * complementary output. - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the TIM Break interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation in interrupt mode on the - * complementary output. - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - uint32_t tmpccer = 0; - - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - - /* Disable the TIM Break interrupt (only if no more channel is active) */ - tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) - { - __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); - } - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM PWM signal generation in DMA mode on the - * complementary output - * @param htim TIM handle - * @param Channel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @param pData The source Buffer address. - * @param Length The length of data to be transferred from memory to TIM peripheral - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM PWM signal generation in DMA mode on the complementary - * output - * @param htim TIM handle - * @param Channel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions - * @brief Timer Complementary One Pulse functions - * -@verbatim - ============================================================================== - ##### Timer Complementary One Pulse functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Start the Complementary One Pulse generation. - (+) Stop the Complementary One Pulse. - (+) Start the Complementary One Pulse and enable interrupts. - (+) Stop the Complementary One Pulse and disable interrupts. - -@endverbatim - * @{ - */ - -/** - * @brief Starts the TIM One Pulse signal generation on the complementary - * output. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) - { - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Enable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation on the complementary - * output. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Disable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM One Pulse signal generation in interrupt mode on the - * complementary channel. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - - /* Enable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation in interrupt mode on the - * complementary channel. - * @param htim TIM One Pulse handle - * @param OutputChannel TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - - /* Disable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Configure the commutation event in case of use of the Hall sensor interface. - (+) Configure Output channels for OC and PWM mode. - - (+) Configure Complementary channels, break features and dead time. - (+) Configure Master synchronization. - (+) Configure timer remapping capabilities. - (+) Enable or disable channel grouping - -@endverbatim - * @{ - */ - -/** - * @brief Configure the TIM commutation event sequence. - * @note This function is mandatory to use the commutation event in order to - * update the configuration at each commutation detection on the TRGI input of the Timer, - * the typical use of this feature is with the use of another Timer(interface Timer) - * configured in Hall sensor interface, this interface Timer will generate the - * commutation at its TRGO output (connected to Timer used in this function) each time - * the TI1 of the Interface Timer detect a commutation at its input TI1. - * @param htim TIM handle - * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal trigger 0 selected - * @arg TIM_TS_ITR1: Internal trigger 1 selected - * @arg TIM_TS_ITR2: Internal trigger 2 selected - * @arg TIM_TS_ITR3: Internal trigger 3 selected - * @arg TIM_TS_NONE: No trigger is needed - * @param CommutationSource the Commutation Event source - * This parameter can be one of the following values: - * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer - * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); - assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - - __HAL_LOCK(htim); - - if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || - (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) - { - /* Select the Input trigger */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= InputTrigger; - } - - /* Select the Capture Compare preload feature */ - htim->Instance->CR2 |= TIM_CR2_CCPC; - /* Select the Commutation event source */ - htim->Instance->CR2 &= ~TIM_CR2_CCUS; - htim->Instance->CR2 |= CommutationSource; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configure the TIM commutation event sequence with interrupt. - * @note This function is mandatory to use the commutation event in order to - * update the configuration at each commutation detection on the TRGI input of the Timer, - * the typical use of this feature is with the use of another Timer(interface Timer) - * configured in Hall sensor interface, this interface Timer will generate the - * commutation at its TRGO output (connected to Timer used in this function) each time - * the TI1 of the Interface Timer detect a commutation at its input TI1. - * @param htim TIM handle - * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal trigger 0 selected - * @arg TIM_TS_ITR1: Internal trigger 1 selected - * @arg TIM_TS_ITR2: Internal trigger 2 selected - * @arg TIM_TS_ITR3: Internal trigger 3 selected - * @arg TIM_TS_NONE: No trigger is needed - * @param CommutationSource the Commutation Event source - * This parameter can be one of the following values: - * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer - * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); - assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - - __HAL_LOCK(htim); - - if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || - (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) - { - /* Select the Input trigger */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= InputTrigger; - } - - /* Select the Capture Compare preload feature */ - htim->Instance->CR2 |= TIM_CR2_CCPC; - /* Select the Commutation event source */ - htim->Instance->CR2 &= ~TIM_CR2_CCUS; - htim->Instance->CR2 |= CommutationSource; - - /* Enable the Commutation Interrupt Request */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configure the TIM commutation event sequence with DMA. - * @note This function is mandatory to use the commutation event in order to - * update the configuration at each commutation detection on the TRGI input of the Timer, - * the typical use of this feature is with the use of another Timer(interface Timer) - * configured in Hall sensor interface, this interface Timer will generate the - * commutation at its TRGO output (connected to Timer used in this function) each time - * the TI1 of the Interface Timer detect a commutation at its input TI1. - * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set - * @param htim TIM handle - * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal trigger 0 selected - * @arg TIM_TS_ITR1: Internal trigger 1 selected - * @arg TIM_TS_ITR2: Internal trigger 2 selected - * @arg TIM_TS_ITR3: Internal trigger 3 selected - * @arg TIM_TS_NONE: No trigger is needed - * @param CommutationSource the Commutation Event source - * This parameter can be one of the following values: - * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer - * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); - assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - - __HAL_LOCK(htim); - - if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || - (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) - { - /* Select the Input trigger */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= InputTrigger; - } - - /* Select the Capture Compare preload feature */ - htim->Instance->CR2 |= TIM_CR2_CCPC; - /* Select the Commutation event source */ - htim->Instance->CR2 &= ~TIM_CR2_CCUS; - htim->Instance->CR2 |= CommutationSource; - - /* Enable the Commutation DMA Request */ - /* Set the DMA Commutation Callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; - - /* Enable the Commutation DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the TIM in master mode. - * @param htim TIM handle. - * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that - * contains the selected trigger output (TRGO) and the Master/Slave - * mode. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, - TIM_MasterConfigTypeDef * sMasterConfig) -{ - uint32_t tmpcr2; - uint32_t tmpsmcr; - - /* Check the parameters */ - assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); - assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); - - /* Check input state */ - __HAL_LOCK(htim); - - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ - if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - { - /* Check the parameters */ - assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); - - /* Clear the MMS2 bits */ - tmpcr2 &= ~TIM_CR2_MMS2; - /* Select the TRGO2 source*/ - tmpcr2 |= sMasterConfig->MasterOutputTrigger2; - } - - /* Reset the MMS Bits */ - tmpcr2 &= ~TIM_CR2_MMS; - /* Select the TRGO source */ - tmpcr2 |= sMasterConfig->MasterOutputTrigger; - - /* Reset the MSM Bit */ - tmpsmcr &= ~TIM_SMCR_MSM; - /* Set master mode */ - tmpsmcr |= sMasterConfig->MasterSlaveMode; - - /* Update TIMx CR2 */ - htim->Instance->CR2 = tmpcr2; - - /* Update TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State - * and the AOE(automatic output enable). - * @param htim TIM handle - * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that - * contains the BDTR Register configuration information for the TIM peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, - TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig) -{ - uint32_t tmpbdtr = 0; - - /* Check the parameters */ - assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); - assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); - assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); - assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); - assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); - assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); - assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); - assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter)); - assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); - - /* Check input state */ - __HAL_LOCK(htim); - - /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, - the OSSI State, the dead time value and the Automatic Output Enable Bit */ - - /* Set the BDTR bits */ - MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); - MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); - MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); - MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); - MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); - MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); - MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); - MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, sBreakDeadTimeConfig->AutomaticOutput); - MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT)); - - if (IS_TIM_BKIN2_INSTANCE(htim->Instance)) - { - /* Check the parameters */ - assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State)); - assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); - assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); - - /* Set the BREAK2 input related BDTR bits */ - MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT)); - MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State); - MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity); - } - - /* Set TIMx_BDTR */ - htim->Instance->BDTR = tmpbdtr; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the break input source. - * @param htim TIM handle. - * @param BreakInput Break input to configure - * This parameter can be one of the following values: - * @arg TIM_BREAKINPUT_BRK: Timer break input - * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input - * @param sBreakInputConfig Break input source configuration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, - uint32_t BreakInput, - TIMEx_BreakInputConfigTypeDef *sBreakInputConfig) - -{ - uint32_t tmporx = 0; - uint32_t bkin_enable_mask = 0; - uint32_t bkin_polarity_mask = 0; - uint32_t bkin_enable_bitpos = 0; - uint32_t bkin_polarity_bitpos = 0; - - /* Check the parameters */ - assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); - assert_param(IS_TIM_BREAKINPUT(BreakInput)); - assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source)); - assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable)); - -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1) - { - assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity)); - } -#else - assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity)); -#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - - /* Check input state */ - __HAL_LOCK(htim); - - switch(sBreakInputConfig->Source) - { - case TIM_BREAKINPUTSOURCE_BKIN: - { - bkin_enable_mask = TIM1_OR2_BKINE; - bkin_enable_bitpos = 0; - bkin_polarity_mask = TIM1_OR2_BKINP; - bkin_polarity_bitpos = 9; - } - break; - case TIM_BREAKINPUTSOURCE_COMP1: - { - bkin_enable_mask = TIM1_OR2_BKCMP1E; - bkin_enable_bitpos = 1; - bkin_polarity_mask = TIM1_OR2_BKCMP1P; - bkin_polarity_bitpos = 10; - } - break; - case TIM_BREAKINPUTSOURCE_COMP2: - { - bkin_enable_mask = TIM1_OR2_BKCMP2E; - bkin_enable_bitpos = 2; - bkin_polarity_mask = TIM1_OR2_BKCMP2P; - bkin_polarity_bitpos = 11; - } - break; - -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - case TIM_BREAKINPUTSOURCE_DFSDM1: - { - bkin_enable_mask = TIM1_OR2_BKDF1BK0E; - bkin_enable_bitpos = 8; - } - break; -#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - - default: - break; - } - - switch(BreakInput) - { - case TIM_BREAKINPUT_BRK: - { - /* Get the TIMx_OR2 register value */ - tmporx = htim->Instance->OR2; - - /* Enable the break input */ - tmporx &= ~bkin_enable_mask; - tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask; - - /* Set the break input polarity */ -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1) -#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - { - tmporx &= ~bkin_polarity_mask; - tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask; - } - - /* Set TIMx_OR2 */ - htim->Instance->OR2 = tmporx; - } - break; - case TIM_BREAKINPUT_BRK2: - { - /* Get the TIMx_OR3 register value */ - tmporx = htim->Instance->OR3; - - /* Enable the break input */ - tmporx &= ~bkin_enable_mask; - tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask; - - /* Set the break input polarity */ -#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ - defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ - defined (STM32L496xx) || defined (STM32L4A6xx) || \ - defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1) -#endif /* STM32L451xx || STM32L452xx || STM32L462xx */ - /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - { - tmporx &= ~bkin_polarity_mask; - tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask; - } - - /* Set TIMx_OR3 */ - htim->Instance->OR3 = tmporx; - } - break; - default: - break; - } - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the TIMx Remapping input capabilities. - * @param htim TIM handle. - * @param Remap: specifies the TIM remapping source. - * - @if STM32L486xx - * For TIM1, the parameter is a combination of 4 fields (field1 | field2 | field3 | field4): - * - * field1 can have the following values: - * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog) - * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1 - * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2 - * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3 - * - * field2 can have the following values: - * @arg TIM_TIM1_ETR_ADC3_NONE: TIM1_ETR is not connected to any ADC3 AWD (analog watchdog) - * @arg TIM_TIM1_ETR_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1 - * @arg TIM_TIM1_ETR_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2 - * @arg TIM_TIM1_ETR_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3 - * - * field3 can have the following values: - * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO - * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output - * - * field4 can have the following values: - * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output - * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output - * @note When field4 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 and field2 values are not significant - @endif - @if STM32L443xx - * For TIM1, the parameter is a combination of 3 fields (field1 | field2 | field3): - * - * field1 can have the following values: - * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog) - * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1 - * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2 - * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3 - * - * field2 can have the following values: - * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO - * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output - * - * field3 can have the following values: - * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output - * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output - * - * @note When field3 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 values is not significant - * - @endif - @if STM32L486xx - * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3): - * - * field1 can have the following values: - * @arg TIM_TIM2_ITR1_TIM8_TRGO: TIM2_ITR1 is connected to TIM8_TRGO - * @arg TIM_TIM2_ITR1_OTG_FS_SOF: TIM2_ITR1 is connected to OTG_FS SOF - * - * field2 can have the following values: - * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO - * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE - * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output - * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output - * - * field3 can have the following values: - * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO - * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output - * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output - * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output - @endif - @if STM32L443xx - * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3): - * - * field1 can have the following values: - * @arg TIM_TIM2_ITR1_NONE: No internal trigger on TIM2_ITR1 - * @arg TIM_TIM2_ITR1_USB_SOF: TIM2_ITR1 is connected to USB SOF - * - * field2 can have the following values: - * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO - * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE - * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output - * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output - * - * field3 can have the following values: - * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO - * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output - * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output - * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output - * - @endif - @if STM32L486xx - * For TIM3, the parameter is a combination 2 fields(field1 | field2): - * - * field1 can have the following values: - * @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO - * @arg TIM_TIM3_TI1_COMP1: TIM3 TI1 is connected to COMP1 output - * @arg TIM_TIM3_TI1_COMP2: TIM3 TI1 is connected to COMP2 output - * @arg TIM_TIM3_TI1_COMP1_COMP2: TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output - * - * field2 can have the following values: - * @arg TIM_TIM3_ETR_GPIO: TIM3_ETR is connected to GPIO - * @arg TIM_TIM3_ETR_COMP1: TIM3_ETR is connected to COMP1 output - * - @endif - @if STM32L486xx - * For TIM8, the parameter is a combination of 3 fields (field1 | field2 | field3): - * - * field1 can have the following values: - * @arg TIM_TIM8_ETR_ADC2_NONE: TIM8_ETR is not connected to any ADC2 AWD (analog watchdog) - * @arg TIM_TIM8_ETR_ADC2_AWD1: TIM8_ETR is connected to ADC2 AWD1 - * @arg TIM_TIM8_ETR_ADC2_AWD2: TIM8_ETR is connected to ADC2 AWD2 - * @arg TIM_TIM8_ETR_ADC2_AWD3: TIM8_ETR is connected to ADC2 AWD3 - * - * field2 can have the following values: - * @arg TIM_TIM8_ETR_ADC3_NONE: TIM8_ETR is not connected to any ADC3 AWD (analog watchdog) - * @arg TIM_TIM8_ETR_ADC3_AWD1: TIM8_ETR is connected to ADC3 AWD1 - * @arg TIM_TIM8_ETR_ADC3_AWD2: TIM8_ETR is connected to ADC3 AWD2 - * @arg TIM_TIM8_ETR_ADC3_AWD3: TIM8_ETR is connected to ADC3 AWD3 - * - * field3 can have the following values: - * @arg TIM_TIM8_TI1_GPIO: TIM8 TI1 is connected to GPIO - * @arg TIM_TIM8_TI1_COMP2: TIM8 TI1 is connected to COMP2 output - * - * field4 can have the following values: - * @arg TIM_TIM8_ETR_COMP1: TIM8_ETR is connected to COMP1 output - * @arg TIM_TIM8_ETR_COMP2: TIM8_ETR is connected to COMP2 output - * @note When field4 is set to TIM_TIM8_ETR_COMP1 or TIM_TIM8_ETR_COMP2 field1 and field2 values are not significant - * - @endif - * For TIM15, the parameter is a combination of 3 fields (field1 | field2): - * - * field1 can have the following values: - * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO - * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE - * - * field2 can have the following values: - * @arg TIM_TIM15_ENCODERMODE_NONE: No redirection - * @arg TIM_TIM15_ENCODERMODE_TIM2: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively - * @arg TIM_TIM15_ENCODERMODE_TIM3: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively - * @arg TIM_TIM15_ENCODERMODE_TIM4: TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively - * - @if STM32L486xx - * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO - * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI - * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE - * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt - * - @endif - @if STM32L443xx - * For TIM16, the parameter can have the following values: - * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO - * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI - * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE - * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt - * @arg TIM_TIM16_TI1_MSI: TIM16 TI1 is connected to MSI (contraints: MSI clock < 1/4 TIM APB clock) - * @arg TIM_TIM16_TI1_HSE_32: TIM16 TI1 is connected to HSE div 32 (note that HSE div 32 must be selected as RTC clock source) - * @arg TIM_TIM16_TI1_MCO: TIM16 TI1 is connected to MCO - * - @endif - @if STM32L486xx - * For TIM17, the parameter can have the following values: - * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO - * @arg TIM_TIM17_TI1_MSI: TIM17 TI1 is connected to MSI (contraints: MSI clock < 1/4 TIM APB clock) - * @arg TIM_TIM17_TI1_HSE_32: TIM17 TI1 is connected to HSE div 32 - * @arg TIM_TIM17_TI1_MCO: TIM17 TI1 is connected to MCO - @endif - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) -{ - uint32_t tmpor1 = 0; - uint32_t tmpor2 = 0; - - __HAL_LOCK(htim); - - /* Check parameters */ - assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); - assert_param(IS_TIM_REMAP(Remap)); - - /* Set ETR_SEL bit field (if required) */ - if (IS_TIM_ETRSEL_INSTANCE(htim->Instance)) - { - tmpor2 = htim->Instance->OR2; - tmpor2 &= ~TIMx_ETRSEL_MASK; - tmpor2 |= (Remap & TIMx_ETRSEL_MASK); - - /* Set TIMx_OR2 */ - htim->Instance->OR2 = tmpor2; - } - - /* Set other remapping capabilities */ - tmpor1 = Remap; - tmpor1 &= ~TIMx_ETRSEL_MASK; - - /* Set TIMx_OR1 */ - htim->Instance->OR1 = tmpor1; - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Group channel 5 and channel 1, 2 or 3 - * @param htim TIM handle. - * @param Channels specifies the reference signal(s) the OC5REF is combined with. - * This parameter can be any combination of the following values: - * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC - * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF - * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF - * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels) -{ - /* Check parameters */ - assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_GROUPCH5(Channels)); - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Clear GC5Cx bit fields */ - htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3|TIM_CCR5_GC5C2|TIM_CCR5_GC5C1); - - /* Set GC5Cx bit fields */ - htim->Instance->CCR5 |= Channels; - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions - * @brief Extended Callbacks functions - * -@verbatim - ============================================================================== - ##### Extended Callbacks functions ##### - ============================================================================== - [..] - This section provides Extended TIM callback functions: - (+) Timer Commutation callback - (+) Timer Break callback - -@endverbatim - * @{ - */ - -/** - * @brief Hall commutation changed callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_CommutationCallback could be implemented in the user file - */ -} - -/** - * @brief Hall Break detection callback in non-blocking mode - * @param htim TIM handle - * @retval None - */ -__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(htim); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_BreakCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions - * @brief Extended Peripheral State functions - * -@verbatim - ============================================================================== - ##### Extended Peripheral State functions ##### - ============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the TIM Hall Sensor interface handle state. - * @param htim TIM Hall Sensor handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @} - */ - -/** - * @brief TIM DMA Commutation callback. - * @param hdma pointer to DMA handle. - * @retval None - */ -void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIMEx_CommutationCallback(htim); -} - -/** - * @brief Enables or disables the TIM Capture Compare Channel xN. - * @param TIMx to select the TIM peripheral - * @param Channel specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @param ChannelNState specifies the TIM Channel CCxNE bit new state. - * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. - * @retval None - */ -static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) -{ - uint32_t tmp = 0; - - tmp = TIM_CCER_CC1NE << Channel; - - /* Reset the CCxNE Bit */ - TIMx->CCER &= ~tmp; - - /* Set or reset the CCxNE Bit */ - TIMx->CCER |= (uint32_t)(ChannelNState << Channel); -} - -/** - * @} - */ - -#endif /* HAL_TIM_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c deleted file mode 100644 index 7cbb8588..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c +++ /dev/null @@ -1,3448 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_uart.c - * @author MCD Application Team - * @brief UART HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * - * - @verbatim - =============================================================================== - ##### How to use this driver ##### - =============================================================================== - [..] - The UART HAL driver can be used as follows: - - (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart). - (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API: - (++) Enable the USARTx interface clock. - (++) UART pins configuration: - (+++) Enable the clock for the UART GPIOs. - (+++) Configure these UART pins as alternate function pull-up. - (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT() - and HAL_UART_Receive_IT() APIs): - (+++) Configure the USARTx interrupt priority. - (+++) Enable the NVIC USART IRQ handle. - (++) UART interrupts handling: - -@@- The specific UART interrupts (Transmission complete interrupt, - RXNE interrupt, RX/TX FIFOs related interrupts and Error Interrupts) - are managed using the macros __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() - inside the transmit and receive processes. - (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA() - and HAL_UART_Receive_DMA() APIs): - (+++) Declare a DMA handle structure for the Tx/Rx channel. - (+++) Enable the DMAx interface clock. - (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. - (+++) Configure the DMA Tx/Rx channel. - (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle. - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel. - - (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Prescaler value , Hardware - flow control and Mode (Receiver/Transmitter) in the huart handle Init structure. - - (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...) - in the huart handle AdvancedInit structure. - - (#) For the UART asynchronous mode, initialize the UART registers by calling - the HAL_UART_Init() API. - - (#) For the UART Half duplex mode, initialize the UART registers by calling - the HAL_HalfDuplex_Init() API. - - (#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers - by calling the HAL_LIN_Init() API. - - (#) For the UART Multiprocessor mode, initialize the UART registers - by calling the HAL_MultiProcessor_Init() API. - - (#) For the UART RS485 Driver Enabled mode, initialize the UART registers - by calling the HAL_RS485Ex_Init() API. - - [..] - (@) These API's (HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Init(), - also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by - calling the customized HAL_UART_MspInit() API. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup UART UART - * @brief HAL UART module driver - * @{ - */ - -#ifdef HAL_UART_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup UART_Private_Constants UART Private Constants - * @{ - */ -#if defined(USART_CR1_FIFOEN) -#define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \ - USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8| \ - USART_CR1_FIFOEN )) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */ -#else -#define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \ - USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8 )) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */ -#endif - -#if defined(USART_CR1_FIFOEN) -#define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT| \ - USART_CR3_TXFTCFG | USART_CR3_RXFTCFG )) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */ -#else -#define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */ -#endif - -#define LPUART_BRR_MIN 0x00000300U /* LPUART BRR minimum authorized value */ -#define LPUART_BRR_MAX 0x000FFFFFU /* LPUART BRR maximum authorized value */ - -#define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */ -#define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup UART_Private_Functions - * @{ - */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart); -static void UART_EndRxTransfer(UART_HandleTypeDef *huart); -static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma); -static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); -static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); -static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma); -static void UART_DMAError(DMA_HandleTypeDef *hdma); -static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma); -static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma); -static void UART_TxISR_8BIT(UART_HandleTypeDef *huart); -static void UART_TxISR_16BIT(UART_HandleTypeDef *huart); -#if defined(USART_CR1_FIFOEN) -static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart); -static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart); -#endif -static void UART_EndTransmit_IT(UART_HandleTypeDef *huart); -static void UART_RxISR_8BIT(UART_HandleTypeDef *huart); -static void UART_RxISR_16BIT(UART_HandleTypeDef *huart); -#if defined(USART_CR1_FIFOEN) -static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart); -static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart); -#endif - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup UART_Exported_Functions UART Exported Functions - * @{ - */ - -/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim -=============================================================================== - ##### Initialization and Configuration functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to initialize the USARTx or the UARTy - in asynchronous mode. - (+) For the asynchronous mode the parameters below can be configured: - (++) Baud Rate - (++) Word Length - (++) Stop Bit - (++) Parity: If the parity is enabled, then the MSB bit of the data written - in the data register is transmitted but is changed by the parity bit. - (++) Hardware flow control - (++) Receiver/transmitter modes - (++) Over Sampling Method - (++) One-Bit Sampling Method - (+) For the asynchronous mode, the following advanced features can be configured as well: - (++) TX and/or RX pin level inversion - (++) data logical level inversion - (++) RX and TX pins swap - (++) RX overrun detection disabling - (++) DMA disabling on RX error - (++) MSB first on communication line - (++) auto Baud rate detection - [..] - The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessor_Init()API - follow respectively the UART asynchronous, UART Half duplex, UART LIN mode - and UART multiprocessor mode configuration procedures (details for the procedures - are available in reference manual). - -@endverbatim - - Depending on the frame length defined by the M1 and M0 bits (7-bit, - 8-bit or 9-bit), the possible UART formats are listed in the - following table. - - Table 1. UART frame format. - +-----------------------------------------------------------------------+ - | M1 bit | M0 bit | PCE bit | UART frame | - |---------|---------|-----------|---------------------------------------| - | 0 | 0 | 0 | | SB | 8 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 1 | 0 | | SB | 9 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | - |---------|---------|-----------|---------------------------------------| - | 1 | 0 | 0 | | SB | 7 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | - +-----------------------------------------------------------------------+ - - * @{ - */ - -/** - * @brief Initialize the UART mode according to the specified - * parameters in the UART_InitTypeDef and initialize the associated handle. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE) - { - /* Check the parameters */ - assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance)); - } - else - { - /* Check the parameters */ - assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); - } - - if(huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - { - return HAL_ERROR; - } - - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - - /* In asynchronous mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); -} - -/** - * @brief Initialize the half-duplex mode according to the specified - * parameters in the UART_InitTypeDef and creates the associated handle. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - /* Check UART instance */ - assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance)); - - if(huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - { - return HAL_ERROR; - } - - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - - /* In half-duplex mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); - - /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); -} - - -/** - * @brief Initialize the LIN mode according to the specified - * parameters in the UART_InitTypeDef and creates the associated handle . - * @param huart UART handle. - * @param BreakDetectLength Specifies the LIN break detection length. - * This parameter can be one of the following values: - * @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection - * @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection - * @retval HAL status - */ -HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - /* Check the LIN UART instance */ - assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); - /* Check the Break detection length parameter */ - assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength)); - - /* LIN mode limited to 16-bit oversampling only */ - if(huart->Init.OverSampling == UART_OVERSAMPLING_8) - { - return HAL_ERROR; - } - /* LIN mode limited to 8-bit data length */ - if(huart->Init.WordLength != UART_WORDLENGTH_8B) - { - return HAL_ERROR; - } - - if(huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - { - return HAL_ERROR; - } - - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - - /* In LIN mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN)); - - /* Enable the LIN mode by setting the LINEN bit in the CR2 register */ - SET_BIT(huart->Instance->CR2, USART_CR2_LINEN); - - /* Set the USART LIN Break detection length. */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); -} - - -/** - * @brief Initialize the multiprocessor mode according to the specified - * parameters in the UART_InitTypeDef and initialize the associated handle. - * @param huart UART handle. - * @param Address UART node address (4-, 6-, 7- or 8-bit long). - * @param WakeUpMethod Specifies the UART wakeup method. - * This parameter can be one of the following values: - * @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection - * @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark - * @note If the user resorts to idle line detection wake up, the Address parameter - * is useless and ignored by the initialization function. - * @note If the user resorts to address mark wake up, the address length detection - * is configured by default to 4 bits only. For the UART to be able to - * manage 6-, 7- or 8-bit long addresses detection, the API - * HAL_MultiProcessorEx_AddressLength_Set() must be called after - * HAL_MultiProcessor_Init(). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - /* Check the wake up method parameter */ - assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod)); - - if(huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_UART_MspInit(huart); - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - { - return HAL_ERROR; - } - - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - - /* In multiprocessor mode, the following bits must be kept cleared: - - LINEN and CLKEN bits in the USART_CR2 register, - - SCEN, HDSEL and IREN bits in the USART_CR3 register. */ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - - if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK) - { - /* If address mark wake up method is chosen, set the USART address node */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS)); - } - - /* Set the wake up method by setting the WAKE bit in the CR1 register */ - MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); -} - - -/** - * @brief DeInitialize the UART peripheral. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - huart->Instance->CR1 = 0x0U; - huart->Instance->CR2 = 0x0U; - huart->Instance->CR3 = 0x0U; - - /* DeInit the low level hardware */ - HAL_UART_MspDeInit(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_RESET; - huart->RxState = HAL_UART_STATE_RESET; - - /* Process Unlock */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Initialize the UART MSP. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_MspInit can be implemented in the user file - */ -} - -/** - * @brief DeInitialize the UART MSP. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_MspDeInit can be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup UART_Exported_Functions_Group2 IO operation functions - * @brief UART Transmit/Receive functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - This subsection provides a set of functions allowing to manage the UART asynchronous - and Half duplex data transfers. - - (#) There are two mode of transfer: - (+) Blocking mode: The communication is performed in polling mode. - The HAL status of all data processing is returned by the same function - after finishing transfer. - (+) Non-Blocking mode: The communication is performed using Interrupts - or DMA, These API's return the HAL status. - The end of the data processing will be indicated through the - dedicated UART IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks - will be executed respectively at the end of the transmit or Receive process - The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected - - (#) Blocking mode API's are : - (+) HAL_UART_Transmit() - (+) HAL_UART_Receive() - - (#) Non-Blocking mode API's with Interrupt are : - (+) HAL_UART_Transmit_IT() - (+) HAL_UART_Receive_IT() - (+) HAL_UART_IRQHandler() - - (#) Non-Blocking mode API's with DMA are : - (+) HAL_UART_Transmit_DMA() - (+) HAL_UART_Receive_DMA() - (+) HAL_UART_DMAPause() - (+) HAL_UART_DMAResume() - (+) HAL_UART_DMAStop() - - (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode: - (+) HAL_UART_TxHalfCpltCallback() - (+) HAL_UART_TxCpltCallback() - (+) HAL_UART_RxHalfCpltCallback() - (+) HAL_UART_RxCpltCallback() - (+) HAL_UART_ErrorCallback() - - (#) Non-Blocking mode transfers could be aborted using Abort API's : - (+) HAL_UART_Abort() - (+) HAL_UART_AbortTransmit() - (+) HAL_UART_AbortReceive() - (+) HAL_UART_Abort_IT() - (+) HAL_UART_AbortTransmit_IT() - (+) HAL_UART_AbortReceive_IT() - - (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided: - (+) HAL_UART_AbortCpltCallback() - (+) HAL_UART_AbortTransmitCpltCallback() - (+) HAL_UART_AbortReceiveCpltCallback() - - (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. - Errors are handled as follows : - (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is - to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception . - Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type, - and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side. - If user wants to abort it, Abort services should be called by user. - (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted. - This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. - Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed. - - -@- In the Half duplex communication, it is forbidden to run the transmit - and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful. - -@endverbatim - * @{ - */ - -/** - * @brief Send an amount of data in blocking mode. - * @note When FIFO mode is enabled, writing a data in the TDR register adds one - * data to the TXFIFO. Write operations to the TDR register are performed - * when TXFNF flag is set. From hardware perspective, TXFNF flag and - * TXE are mapped on the same bit-field. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be sent. - * @param Timeout Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint16_t* tmp; - uint32_t tickstart = 0U; - - /* Check that a Tx process is not already ongoing */ - if(huart->gState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_BUSY_TX; - - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - - huart->TxXferSize = Size; - huart->TxXferCount = Size; - - while(huart->TxXferCount > 0U) - { - if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - tmp = (uint16_t*) pData; - huart->Instance->TDR = (*tmp & (uint16_t)0x01FFU); - pData += 2U; - } - else - { - huart->Instance->TDR = (*pData++ & (uint8_t)0xFFU); - } - huart->TxXferCount--; - } - - if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* At end of Tx process, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in blocking mode. - * @note When FIFO mode is enabled, the RXFNE flag is set as long as the RXFIFO - * is not empty. Read operations from the RDR register are performed when - * RXFNE flag is set. From hardware perspective, RXFNE flag and - * RXNE are mapped on the same bit-field. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be received. - * @param Timeout Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint16_t* tmp; - uint16_t uhMask; - uint32_t tickstart = 0; - - /* Check that a Rx process is not already ongoing */ - if(huart->RxState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->RxState = HAL_UART_STATE_BUSY_RX; - - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - - huart->RxXferSize = Size; - huart->RxXferCount = Size; - - /* Computation of UART mask to apply to RDR register */ - UART_MASK_COMPUTATION(huart); - uhMask = huart->Mask; - - /* as long as data have to be received */ - while(huart->RxXferCount > 0U) - { - if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - tmp = (uint16_t*) pData ; - *tmp = (uint16_t)(huart->Instance->RDR & uhMask); - pData +=2U; - } - else - { - *pData++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); - } - huart->RxXferCount--; - } - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Send an amount of data in interrupt mode. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - /* Check that a Tx process is not already ongoing */ - if(huart->gState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->pTxBuffPtr = pData; - huart->TxXferSize = Size; - huart->TxXferCount = Size; - huart->TxISR = NULL; - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_BUSY_TX; - -#if defined(USART_CR1_FIFOEN) - /* Configure Tx interrupt processing */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - /* Set the Tx ISR function pointer according to the data word length */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - huart->TxISR = UART_TxISR_16BIT_FIFOEN; - } - else - { - huart->TxISR = UART_TxISR_8BIT_FIFOEN; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the TX FIFO threshold interrupt */ - SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); - } - else -#endif - { - /* Set the Tx ISR function pointer according to the data word length */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - huart->TxISR = UART_TxISR_16BIT; - } - else - { - huart->TxISR = UART_TxISR_8BIT; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the Transmit Data Register Empty interrupt */ -#if defined(USART_CR1_FIFOEN) - SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); -#else - SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); -#endif - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in interrupt mode. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be received. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - /* Check that a Rx process is not already ongoing */ - if(huart->RxState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->pRxBuffPtr = pData; - huart->RxXferSize = Size; - huart->RxXferCount = Size; - huart->RxISR = NULL; - - /* Computation of UART mask to apply to RDR register */ - UART_MASK_COMPUTATION(huart); - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->RxState = HAL_UART_STATE_BUSY_RX; - - /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - -#if defined(USART_CR1_FIFOEN) - /* Configure Rx interrupt processing*/ - if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess)) - { - /* Set the Rx ISR function pointer according to the data word length */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - huart->RxISR = UART_RxISR_16BIT_FIFOEN; - } - else - { - huart->RxISR = UART_RxISR_8BIT_FIFOEN; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - } - else -#endif - { - /* Set the Rx ISR function pointer according to the data word length */ - if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - { - huart->RxISR = UART_RxISR_16BIT; - } - else - { - huart->RxISR = UART_RxISR_8BIT; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ -#if defined(USART_CR1_FIFOEN) - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); -#else - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE); -#endif - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Send an amount of data in DMA mode. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - /* Check that a Tx process is not already ongoing */ - if(huart->gState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->pTxBuffPtr = pData; - huart->TxXferSize = Size; - huart->TxXferCount = Size; - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->gState = HAL_UART_STATE_BUSY_TX; - - /* Set the UART DMA transfer complete callback */ - huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; - - /* Set the UART DMA Half transfer complete callback */ - huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; - - /* Set the DMA error callback */ - huart->hdmatx->XferErrorCallback = UART_DMAError; - - /* Set the DMA abort callback */ - huart->hdmatx->XferAbortCallback = NULL; - - /* Enable the UART transmit DMA channel */ - HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size); - - /* Clear the TC flag in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the UART CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in DMA mode. - * @param huart UART handle. - * @param pData Pointer to data buffer. - * @param Size Amount of data to be received. - * @note When the UART parity is enabled (PCE = 1), the received data contain - * the parity bit (MSB position). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) -{ - /* Check that a Rx process is not already ongoing */ - if(huart->RxState == HAL_UART_STATE_READY) - { - if((pData == NULL ) || (Size == 0U)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->pRxBuffPtr = pData; - huart->RxXferSize = Size; - - huart->ErrorCode = HAL_UART_ERROR_NONE; - huart->RxState = HAL_UART_STATE_BUSY_RX; - - /* Set the UART DMA transfer complete callback */ - huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; - - /* Set the UART DMA Half transfer complete callback */ - huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; - - /* Set the DMA error callback */ - huart->hdmarx->XferErrorCallback = UART_DMAError; - - /* Set the DMA abort callback */ - huart->hdmarx->XferAbortCallback = NULL; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size); - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - /* Enable the UART Parity Error Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - - /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the UART CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Pause the DMA Transfer. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - if ((huart->gState == HAL_UART_STATE_BUSY_TX) && - (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))) - { - /* Disable the UART DMA Tx request */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - } - if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && - (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))) - { - /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the UART DMA Rx request */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Resume the DMA Transfer. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - if(huart->gState == HAL_UART_STATE_BUSY_TX) - { - /* Enable the UART DMA Tx request */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); - } - if(huart->RxState == HAL_UART_STATE_BUSY_RX) - { - /* Clear the Overrun flag before resuming the Rx transfer */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - - /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Enable the UART DMA Rx request */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Stop the DMA Transfer. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) -{ - /* The Lock is not implemented on this API to allow the user application - to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() / - HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback: - indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete - interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of - the stream and the corresponding call back is executed. */ - - /* Stop UART DMA Tx request if ongoing */ - if ((huart->gState == HAL_UART_STATE_BUSY_TX) && - (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx channel */ - if(huart->hdmatx != NULL) - { - HAL_DMA_Abort(huart->hdmatx); - } - - UART_EndTxTransfer(huart); - } - - /* Stop UART DMA Rx request if ongoing */ - if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && - (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel */ - if(huart->hdmarx != NULL) - { - HAL_DMA_Abort(huart->hdmarx); - } - - UART_EndRxTransfer(huart); - } - - return HAL_OK; -} - -/** - * @brief Abort ongoing transfers (blocking mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx and Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) - * - Set handle State to READY - * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the UART DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ - if(huart->hdmatx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmatx->XferAbortCallback = NULL; - - HAL_DMA_Abort(huart->hdmatx); - } - } - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ - if(huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = NULL; - - HAL_DMA_Abort(huart->hdmarx); - } - } - - /* Reset Tx and Rx transfer counters */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* Reset Handle ErrorCode to No Error */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - return HAL_OK; -} - -/** - * @brief Abort ongoing Transmit transfer (blocking mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) - * - Set handle State to READY - * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE and TCIE interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); -#endif - - /* Disable the UART DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ - if(huart->hdmatx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmatx->XferAbortCallback = NULL; - - HAL_DMA_Abort(huart->hdmatx); - } - } - - /* Reset Tx transfer counter */ - huart->TxXferCount = 0U; - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Abort ongoing Receive transfer (blocking mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) - * - Set handle State to READY - * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) -{ - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ - if(huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback to Null. - No call back execution at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = NULL; - - HAL_DMA_Abort(huart->hdmarx); - } - } - - /* Reset Rx transfer counter */ - huart->RxXferCount = 0U; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Abort ongoing transfers (Interrupt mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx and Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) - * - Set handle State to READY - * - At abort completion, call user abort complete callback - * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - * considered as completed only when user abort complete callback is executed (not when exiting function). - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) -{ - uint32_t abortcplt = 1U; - - /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised - before any call to DMA Abort functions */ - /* DMA Tx Handle is valid */ - if(huart->hdmatx != NULL) - { - /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. - Otherwise, set it to NULL */ - if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback; - } - else - { - huart->hdmatx->XferAbortCallback = NULL; - } - } - /* DMA Rx Handle is valid */ - if(huart->hdmarx != NULL) - { - /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. - Otherwise, set it to NULL */ - if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback; - } - else - { - huart->hdmarx->XferAbortCallback = NULL; - } - } - - /* Disable the UART DMA Tx request if enabled */ - if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - /* Disable DMA Tx at UART level */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ - if(huart->hdmatx != NULL) - { - /* UART Tx DMA Abort callback has already been initialised : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - - /* Abort DMA TX */ - if(HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) - { - huart->hdmatx->XferAbortCallback = NULL; - } - else - { - abortcplt = 0U; - } - } - } - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ - if(huart->hdmarx != NULL) - { - /* UART Rx DMA Abort callback has already been initialised : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - - /* Abort DMA RX */ - if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - { - huart->hdmarx->XferAbortCallback = NULL; - abortcplt = 1U; - } - else - { - abortcplt = 0U; - } - } - } - - /* if no DMA abort complete callback execution is required => call user Abort Complete callback */ - if (abortcplt == 1U) - { - /* Reset Tx and Rx transfer counters */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - - /* Clear ISR function pointers */ - huart->RxISR = NULL; - huart->TxISR = NULL; - - /* Reset errorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ - HAL_UART_AbortCpltCallback(huart); - } - - return HAL_OK; -} - -/** - * @brief Abort ongoing Transmit transfer (Interrupt mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Tx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) - * - Set handle State to READY - * - At abort completion, call user abort complete callback - * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - * considered as completed only when user abort complete callback is executed (not when exiting function). - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE and TCIE interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); -#endif - - /* Disable the UART DMA Tx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ - if(huart->hdmatx != NULL) - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback; - - /* Abort DMA TX */ - if(HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) - { - /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */ - huart->hdmatx->XferAbortCallback(huart->hdmatx); - } - } - else - { - /* Reset Tx transfer counter */ - huart->TxXferCount = 0U; - - /* Clear TxISR function pointers */ - huart->TxISR = NULL; - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ - HAL_UART_AbortTransmitCpltCallback(huart); - } - } - else - { - /* Reset Tx transfer counter */ - huart->TxXferCount = 0U; - - /* Clear TxISR function pointers */ - huart->TxISR = NULL; - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ - HAL_UART_AbortTransmitCpltCallback(huart); - } - - return HAL_OK; -} - -/** - * @brief Abort ongoing Receive transfer (Interrupt mode). - * @param huart UART handle. - * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. - * This procedure performs following operations : - * - Disable UART Interrupts (Rx) - * - Disable the DMA transfer in the peripheral register (if enabled) - * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) - * - Set handle State to READY - * - At abort completion, call user abort complete callback - * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - * considered as completed only when user abort complete callback is executed (not when exiting function). - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) -{ - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ - if(huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback; - - /* Abort DMA RX */ - if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - { - /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ - huart->hdmarx->XferAbortCallback(huart->hdmarx); - } - } - else - { - /* Reset Rx transfer counter */ - huart->RxXferCount = 0U; - - /* Clear RxISR function pointer */ - huart->pRxBuffPtr = NULL; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ - HAL_UART_AbortReceiveCpltCallback(huart); - } - } - else - { - /* Reset Rx transfer counter */ - huart->RxXferCount = 0U; - - /* Clear RxISR function pointer */ - huart->pRxBuffPtr = NULL; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* As no DMA to be aborted, call directly user Abort complete callback */ - HAL_UART_AbortReceiveCpltCallback(huart); - } - - return HAL_OK; -} - -/** - * @brief Handle UART interrupt request. - * @param huart UART handle. - * @retval None - */ -void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) -{ - uint32_t isrflags = READ_REG(huart->Instance->ISR); - uint32_t cr1its = READ_REG(huart->Instance->CR1); - uint32_t cr3its = READ_REG(huart->Instance->CR3); - uint32_t errorflags; - - /* If no error occurs */ - errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE)); - if (errorflags == RESET) - { - /* UART in mode Receiver ---------------------------------------------------*/ -#if defined(USART_CR1_FIFOEN) - if(((isrflags & USART_ISR_RXNE_RXFNE) != RESET) - && ( ((cr1its & USART_CR1_RXNEIE_RXFNEIE) != RESET) - || ((cr3its & USART_CR3_RXFTIE) != RESET)) ) -#else - if(((isrflags & USART_ISR_RXNE) != RESET) - && ((cr1its & USART_CR1_RXNEIE) != RESET)) -#endif - { - if (huart->RxISR != NULL) {huart->RxISR(huart);} - return; - } - } - - /* If some errors occur */ -#if defined(USART_CR1_FIFOEN) - if( (errorflags != RESET) - && ( (((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != RESET) - || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)) != RESET))) ) -#else - if( (errorflags != RESET) - && ( ((cr3its & USART_CR3_EIE) != RESET) - || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)) ) -#endif - { - /* UART parity error interrupt occurred -------------------------------------*/ - if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - - huart->ErrorCode |= HAL_UART_ERROR_PE; - } - - /* UART frame error interrupt occurred --------------------------------------*/ - if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); - - huart->ErrorCode |= HAL_UART_ERROR_FE; - } - - /* UART noise error interrupt occurred --------------------------------------*/ - if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); - - huart->ErrorCode |= HAL_UART_ERROR_NE; - } - - /* UART Over-Run interrupt occurred -----------------------------------------*/ -#if defined(USART_CR1_FIFOEN) - if( ((isrflags & USART_ISR_ORE) != RESET) - &&( ((cr1its & USART_CR1_RXNEIE_RXFNEIE) != RESET) || - ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != RESET))) -#else - if( ((isrflags & USART_ISR_ORE) != RESET) - &&( ((cr1its & USART_CR1_RXNEIE) != RESET) || - ((cr3its & USART_CR3_EIE) != RESET))) -#endif - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - - huart->ErrorCode |= HAL_UART_ERROR_ORE; - } - - /* Call UART Error Call back function if need be --------------------------*/ - if(huart->ErrorCode != HAL_UART_ERROR_NONE) - { - /* UART in mode Receiver ---------------------------------------------------*/ -#if defined(USART_CR1_FIFOEN) - if(((isrflags & USART_ISR_RXNE_RXFNE) != RESET) - && ( ((cr1its & USART_CR1_RXNEIE_RXFNEIE) != RESET) - || ((cr3its & USART_CR3_RXFTIE) != RESET)) ) -#else - if(((isrflags & USART_ISR_RXNE) != RESET) - && ((cr1its & USART_CR1_RXNEIE) != RESET)) -#endif - { - if (huart->RxISR != NULL) {huart->RxISR(huart);} - } - - /* If Overrun error occurs, or if any error occurs in DMA mode reception, - consider error as blocking */ - if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || - (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))) - { - /* Blocking error : transfer is aborted - Set the UART state ready to be able to start again the process, - Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ - UART_EndRxTransfer(huart); - - /* Disable the UART DMA Rx request if enabled */ - if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* Abort the UART DMA Rx channel */ - if(huart->hdmarx != NULL) - { - /* Set the UART DMA Abort callback : - will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ - huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - - /* Abort DMA RX */ - if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - { - /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ - huart->hdmarx->XferAbortCallback(huart->hdmarx); - } - } - else - { - /* Call user error callback */ - HAL_UART_ErrorCallback(huart); - } - } - else - { - /* Call user error callback */ - HAL_UART_ErrorCallback(huart); - } - } - else - { - /* Non Blocking error : transfer could go on. - Error is notified to user through user error callback */ - HAL_UART_ErrorCallback(huart); - huart->ErrorCode = HAL_UART_ERROR_NONE; - } - } - return; - - } /* End if some error occurs */ - - /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ - if(((isrflags & USART_ISR_WUF) != RESET) && ((cr3its & USART_CR3_WUFIE) != RESET)) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); - /* Set the UART state ready to be able to start again the process */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - HAL_UARTEx_WakeupCallback(huart); - return; - } - - /* UART in mode Transmitter ------------------------------------------------*/ -#if defined(USART_CR1_FIFOEN) - if(((isrflags & USART_ISR_TXE_TXFNF) != RESET) - && ( ((cr1its & USART_CR1_TXEIE_TXFNFIE) != RESET) - || ((cr3its & USART_CR3_TXFTIE) != RESET)) ) -#else - if(((isrflags & USART_ISR_TXE) != RESET) - && ((cr1its & USART_CR1_TXEIE) != RESET)) -#endif - { - if (huart->TxISR != NULL) {huart->TxISR(huart);} - return; - } - - /* UART in mode Transmitter (transmission end) -----------------------------*/ - if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) - { - UART_EndTransmit_IT(huart); - return; - } - -#if defined(USART_CR1_FIFOEN) - /* UART TX Fifo Empty occurred ----------------------------------------------*/ - if(((isrflags & USART_ISR_TXFE) != RESET) && ((cr1its & USART_CR1_TXFEIE) != RESET)) - { - HAL_UARTEx_TxFifoEmptyCallback(huart); - return; - } - - /* UART RX Fifo Full occurred ----------------------------------------------*/ - if(((isrflags & USART_ISR_RXFF) != RESET) && ((cr1its & USART_CR1_RXFFIE) != RESET)) - { - HAL_UARTEx_RxFifoFullCallback(huart); - return; - } -#endif -} - -/** - * @brief Tx Transfer completed callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_TxCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Tx Half Transfer completed callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_TxHalfCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Rx Transfer completed callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_RxCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Rx Half Transfer completed callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_UART_RxHalfCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief UART error callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_ErrorCallback can be implemented in the user file. - */ -} - -/** - * @brief UART Abort Complete callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_AbortCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief UART Abort Complete callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief UART Abort Receive Complete callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions - * @brief UART control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the UART. - (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode - (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode - (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode - (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode - (+) UART_SetConfig() API configures the UART peripheral - (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features - (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization - (+) UART_Wakeup_AddressConfig() API configures the wake-up from stop mode parameters - (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter - (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver - (+) HAL_LIN_SendBreak() API transmits the break characters -@endverbatim - * @{ - */ - -/** - * @brief Enable UART in mute mode (does not mean UART enters mute mode; - * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called). - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Enable USART mute mode by setting the MME bit in the CR1 register */ - SET_BIT(huart->Instance->CR1, USART_CR1_MME); - - huart->gState = HAL_UART_STATE_READY; - - return (UART_CheckIdleState(huart)); -} - -/** - * @brief Disable UART mute mode (does not mean the UART actually exits mute mode - * as it may not have been in mute mode at this very moment). - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable USART mute mode by clearing the MME bit in the CR1 register */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME); - - huart->gState = HAL_UART_STATE_READY; - - return (UART_CheckIdleState(huart)); -} - -/** - * @brief Enter UART mute mode (means UART actually enters mute mode). - * @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called. - * @param huart UART handle. - * @retval None - */ -void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart) -{ - __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST); -} - -/** - * @brief Enable the UART transmitter and disable the UART receiver. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - huart->gState = HAL_UART_STATE_BUSY; - - /* Clear TE and RE bits */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); - - /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */ - SET_BIT(huart->Instance->CR1, USART_CR1_TE); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Enable the UART receiver and disable the UART transmitter. - * @param huart UART handle. - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - huart->gState = HAL_UART_STATE_BUSY; - - /* Clear TE and RE bits */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); - - /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */ - SET_BIT(huart->Instance->CR1, USART_CR1_RE); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - - -/** - * @brief Transmit break characters. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart) -{ - /* Check the parameters */ - assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Send break characters */ - SET_BIT(huart->Instance->RQR, UART_SENDBREAK_REQUEST); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions - * @brief UART Peripheral State functions - * -@verbatim - ============================================================================== - ##### Peripheral State and Error functions ##### - ============================================================================== - [..] - This subsection provides functions allowing to : - (+) Return the UART handle state. - (+) Return the UART handle error code - -@endverbatim - * @{ - */ - -/** - * @brief Return the UART handle state. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART. - * @retval HAL state - */ -HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart) -{ - uint32_t temp1= 0x00U, temp2 = 0x00U; - temp1 = huart->gState; - temp2 = huart->RxState; - - return (HAL_UART_StateTypeDef)(temp1 | temp2); -} - -/** -* @brief Return the UART handle error code. - * @param huart Pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART. -* @retval UART Error Code -*/ -uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart) -{ - return huart->ErrorCode; -} -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup UART_Private_Functions UART Private Functions - * @{ - */ - -/** - * @brief Configure the UART peripheral. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) -{ - uint32_t tmpreg = 0x00000000U; - UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED; - uint16_t brrtemp = 0x0000U; - uint32_t usartdiv = 0x00000000U; - HAL_StatusTypeDef ret = HAL_OK; - uint32_t lpuart_ker_ck_pres = 0x00000000U; - - /* Check the parameters */ - assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate)); - assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); - if(UART_INSTANCE_LOWPOWER(huart)) - { - assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits)); - } - else - { - assert_param(IS_UART_STOPBITS(huart->Init.StopBits)); - assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling)); - } - - assert_param(IS_UART_PARITY(huart->Init.Parity)); - assert_param(IS_UART_MODE(huart->Init.Mode)); - assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl)); - assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); -#if defined(USART_PRESC_PRESCALER) - assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler)); -#endif - - /*-------------------------- USART CR1 Configuration -----------------------*/ - /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure - * the UART Word Length, Parity, Mode and oversampling: - * set the M bits according to huart->Init.WordLength value - * set PCE and PS bits according to huart->Init.Parity value - * set TE and RE bits according to huart->Init.Mode value - * set OVER8 bit according to huart->Init.OverSampling value */ - tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - - /*-------------------------- USART CR2 Configuration -----------------------*/ - /* Configure the UART Stop Bits: Set STOP[13:12] bits according - * to huart->Init.StopBits value */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - - /*-------------------------- USART CR3 Configuration -----------------------*/ - /* Configure - * - UART HardWare Flow Control: set CTSE and RTSE bits according - * to huart->Init.HwFlowCtl value - * - one-bit sampling method versus three samples' majority rule according - * to huart->Init.OneBitSampling (not applicable to LPUART) - * - set TXFTCFG bit according to huart->Init.TxFifoThreshold value - * - set RXFTCFG bit according to huart->Init.RxFifoThreshold value */ - tmpreg = (uint32_t)huart->Init.HwFlowCtl; - - if (!(UART_INSTANCE_LOWPOWER(huart))) - { - tmpreg |= huart->Init.OneBitSampling; - } - MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - -#if defined(USART_PRESC_PRESCALER) - /*-------------------------- USART PRESC Configuration -----------------------*/ - /* Configure - * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */ - MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); -#endif - - /*-------------------------- USART BRR Configuration -----------------------*/ - UART_GETCLOCKSOURCE(huart, clocksource); - - /* Check LPUART instance */ - if(UART_INSTANCE_LOWPOWER(huart)) - { - /* Retrieve frequency clock */ - switch (clocksource) - { - case UART_CLOCKSOURCE_PCLK1: -#if defined(USART_PRESC_PRESCALER) - lpuart_ker_ck_pres = (HAL_RCC_GetPCLK1Freq()/UARTPrescTable[huart->Init.ClockPrescaler]); -#else - lpuart_ker_ck_pres = HAL_RCC_GetPCLK1Freq(); -#endif - break; - case UART_CLOCKSOURCE_HSI: -#if defined(USART_PRESC_PRESCALER) - lpuart_ker_ck_pres = ((uint32_t)HSI_VALUE/UARTPrescTable[huart->Init.ClockPrescaler]); -#else - lpuart_ker_ck_pres = (uint32_t)HSI_VALUE; -#endif - break; - case UART_CLOCKSOURCE_SYSCLK: -#if defined(USART_PRESC_PRESCALER) - lpuart_ker_ck_pres = (HAL_RCC_GetSysClockFreq()/UARTPrescTable[huart->Init.ClockPrescaler]); -#else - lpuart_ker_ck_pres = HAL_RCC_GetSysClockFreq(); -#endif - break; - case UART_CLOCKSOURCE_LSE: -#if defined(USART_PRESC_PRESCALER) - lpuart_ker_ck_pres = ((uint32_t)LSE_VALUE/UARTPrescTable[huart->Init.ClockPrescaler]); -#else - lpuart_ker_ck_pres = (uint32_t)LSE_VALUE; -#endif - break; - case UART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - /* if proper clock source reported */ - if (lpuart_ker_ck_pres != 0U) - { - /* ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */ - if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || - (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) - { - ret = HAL_ERROR; - } - else - { - switch (clocksource) - { - case UART_CLOCKSOURCE_PCLK1: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_HSI: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint32_t)(UART_DIV_LPUART(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint32_t)(UART_DIV_LPUART(HSI_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_SYSCLK: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_LSE: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint32_t)(UART_DIV_LPUART(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint32_t)(UART_DIV_LPUART(LSE_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - /* It is forbidden to write values lower than 0x300 in the LPUART_BRR register */ - if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX)) - { - huart->Instance->BRR = usartdiv; - } - else - { - ret = HAL_ERROR; - } - } /* if ( (tmpreg < (3 * huart->Init.BaudRate) ) || (tmpreg > (4096 * huart->Init.BaudRate) )) */ - } /* if (tmpreg != 0) */ - } - /* Check UART Over Sampling to set Baud Rate Register */ - else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - { - switch (clocksource) - { - case UART_CLOCKSOURCE_PCLK1: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_PCLK2: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_HSI: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_SYSCLK: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_LSE: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - /* USARTDIV must be greater than or equal to 0d16 */ - if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - { - brrtemp = usartdiv & 0xFFF0U; - brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - huart->Instance->BRR = brrtemp; - } - else - { - ret = HAL_ERROR; - } - } - else - { - switch (clocksource) - { - case UART_CLOCKSOURCE_PCLK1: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_PCLK2: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_HSI: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_SYSCLK: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_LSE: -#if defined(USART_PRESC_PRESCALER) - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); -#else - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate)); -#endif - break; - case UART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - /* USARTDIV must be greater than or equal to 0d16 */ - if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - { - huart->Instance->BRR = usartdiv; - } - else - { - ret = HAL_ERROR; - } - } - -#if defined(USART_CR1_FIFOEN) - /* Initialize the number of data to process during RX/TX ISR execution */ - huart->NbTxDataToProcess = 1; - huart->NbRxDataToProcess = 1; -#endif - - /* Clear ISR function pointers */ - huart->RxISR = NULL; - huart->TxISR = NULL; - - return ret; -} - -/** - * @brief Configure the UART peripheral advanced features. - * @param huart UART handle. - * @retval None - */ -void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) -{ - /* Check whether the set of advanced features to configure is properly set */ - assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); - - /* if required, configure TX pin active level inversion */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - { - assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - } - - /* if required, configure RX pin active level inversion */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - { - assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - } - - /* if required, configure data inversion */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - { - assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - } - - /* if required, configure RX/TX pins swap */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - { - assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - } - - /* if required, configure RX overrun detection disabling */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - { - assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); - MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - } - - /* if required, configure DMA disabling on reception error */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - { - assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); - MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - } - - /* if required, configure auto Baud rate detection scheme */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - { - assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); - assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - /* set auto Baudrate detection parameters if detection is enabled */ - if(huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - { - assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - } - } - - /* if required, configure MSB first on communication line */ - if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - { - assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - } -} - -/** - * @brief Check the UART Idle State. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) -{ - uint32_t tickstart = 0U; - - /* Initialize the UART ErrorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - - /* Check if the Transmitter is enabled */ - if((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - { - /* Wait until TEACK flag is set */ - if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - { - /* Timeout occurred */ - return HAL_TIMEOUT; - } - } - /* Check if the Receiver is enabled */ - if((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - { - /* Wait until REACK flag is set */ - if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - { - /* Timeout occurred */ - return HAL_TIMEOUT; - } - } - - /* Initialize the UART State */ - huart->gState= HAL_UART_STATE_READY; - huart->RxState= HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Handle UART Communication Timeout. - * @param huart UART handle. - * @param Flag Specifies the UART flag to check - * @param Status Flag status (SET or RESET) - * @param Tickstart Tick start value - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) -{ - /* Wait until flag is set */ - while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout)) - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_TIMEOUT; - } - } - } - return HAL_OK; -} - - -/** - * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). - * @param huart UART handle. - * @retval None - */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart) -{ - /* Disable TXEIE and TCIE interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); -#endif - - /* At end of Tx process, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; -} - - -/** - * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). - * @param huart UART handle. - * @retval None - */ -static void UART_EndRxTransfer(UART_HandleTypeDef *huart) -{ - /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); -#endif - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Reset RxIsr function pointer */ - huart->RxISR = NULL; -} - - -/** - * @brief DMA UART transmit process complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - /* DMA Normal mode */ - if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) ) - { - huart->TxXferCount = 0U; - - /* Disable the DMA transfer for transmit request by resetting the DMAT bit - in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - } - /* DMA Circular mode */ - else - { - HAL_UART_TxCpltCallback(huart); - } -} - -/** - * @brief DMA UART transmit process half complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - HAL_UART_TxHalfCpltCallback(huart); -} - -/** - * @brief DMA UART receive process complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - /* DMA Normal mode */ - if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) ) - { - huart->RxXferCount = 0U; - - /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Disable the DMA transfer for the receiver request by resetting the DMAR bit - in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - - /* At end of Rx process, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - } - - HAL_UART_RxCpltCallback(huart); -} - -/** - * @brief DMA UART receive process half complete callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - HAL_UART_RxHalfCpltCallback(huart); -} - -/** - * @brief DMA UART communication error callback. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMAError(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - /* Stop UART DMA Tx request if ongoing */ - if ( (huart->gState == HAL_UART_STATE_BUSY_TX) - &&(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) ) - { - huart->TxXferCount = 0U; - UART_EndTxTransfer(huart); - } - - /* Stop UART DMA Rx request if ongoing */ - if ( (huart->RxState == HAL_UART_STATE_BUSY_RX) - &&(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ) - { - huart->RxXferCount = 0U; - UART_EndRxTransfer(huart); - } - - huart->ErrorCode |= HAL_UART_ERROR_DMA; - HAL_UART_ErrorCallback(huart); -} - -/** - * @brief DMA UART communication abort callback, when initiated by HAL services on Error - * (To be called at end of DMA Abort procedure following error occurrence). - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - huart->RxXferCount = 0U; - huart->TxXferCount = 0U; - - HAL_UART_ErrorCallback(huart); -} - -/** - * @brief DMA UART Tx communication abort callback, when initiated by user - * (To be called at end of DMA Tx Abort procedure following user abort request). - * @note When this callback is executed, User Abort complete call back is called only if no - * Abort still ongoing for Rx DMA Handle. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef* )(hdma->Parent); - - huart->hdmatx->XferAbortCallback = NULL; - - /* Check if an Abort process is still ongoing */ - if(huart->hdmarx != NULL) - { - if(huart->hdmarx->XferAbortCallback != NULL) - { - return; - } - } - - /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - - /* Reset errorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* Call user Abort complete callback */ - HAL_UART_AbortCpltCallback(huart); -} - - -/** - * @brief DMA UART Rx communication abort callback, when initiated by user - * (To be called at end of DMA Rx Abort procedure following user abort request). - * @note When this callback is executed, User Abort complete call back is called only if no - * Abort still ongoing for Tx DMA Handle. - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef* )(hdma->Parent); - - huart->hdmarx->XferAbortCallback = NULL; - - /* Check if an Abort process is still ongoing */ - if(huart->hdmatx != NULL) - { - if(huart->hdmatx->XferAbortCallback != NULL) - { - return; - } - } - - /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ - huart->TxXferCount = 0U; - huart->RxXferCount = 0U; - - /* Reset errorCode */ - huart->ErrorCode = HAL_UART_ERROR_NONE; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->gState and huart->RxState to Ready */ - huart->gState = HAL_UART_STATE_READY; - huart->RxState = HAL_UART_STATE_READY; - - /* Call user Abort complete callback */ - HAL_UART_AbortCpltCallback(huart); -} - - -/** - * @brief DMA UART Tx communication abort callback, when initiated by user by a call to - * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer) - * (This callback is executed at end of DMA Tx Abort procedure following user abort request, - * and leads to user Tx Abort Complete callback execution). - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = (UART_HandleTypeDef*)(hdma->Parent); - - huart->TxXferCount = 0U; - -#if defined(USART_CR1_FIFOEN) - /* Flush the whole TX FIFO (if needed) */ - if (huart->FifoMode == UART_FIFOMODE_ENABLE) - { - __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); - } -#endif - - /* Restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* Call user Abort complete callback */ - HAL_UART_AbortTransmitCpltCallback(huart); -} - -/** - * @brief DMA UART Rx communication abort callback, when initiated by user by a call to - * HAL_UART_AbortReceive_IT API (Abort only Rx transfer) - * (This callback is executed at end of DMA Rx Abort procedure following user abort request, - * and leads to user Rx Abort Complete callback execution). - * @param hdma DMA handle. - * @retval None - */ -static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma) -{ - UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - huart->RxXferCount = 0U; - - /* Clear the Error flags in the ICR register */ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); - - /* Discard the received data */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - - /* Restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Call user Abort complete callback */ - HAL_UART_AbortReceiveCpltCallback(huart); -} - -/** - * @brief TX interrrupt handler for 7 or 8 bits data word length . - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Transmit_IT(). - * @param huart UART handle. - * @retval None - */ -static void UART_TxISR_8BIT(UART_HandleTypeDef *huart) -{ - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - { - if(huart->TxXferCount == 0) - { - /* Disable the UART Transmit Data Register Empty Interrupt */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); -#else - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); -#endif - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - } - else - { - huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF); - huart->TxXferCount--; - } - } -} - -/** - * @brief TX interrrupt handler for 9 bits data word length. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Transmit_IT(). - * @param huart UART handle. - * @retval None - */ -static void UART_TxISR_16BIT(UART_HandleTypeDef *huart) -{ - uint16_t* tmp; - - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - { - if(huart->TxXferCount == 0) - { - /* Disable the UART Transmit Data Register Empty Interrupt */ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); -#else - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); -#endif - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - } - else - { - tmp = (uint16_t*) huart->pTxBuffPtr; - huart->Instance->TDR = (*tmp & (uint16_t)0x01FF); - huart->pTxBuffPtr += 2; - huart->TxXferCount--; - } - } -} - -#if defined(USART_CR1_FIFOEN) -/** - * @brief TX interrrupt handler for 7 or 8 bits data word length and FIFO mode is enabled. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Transmit_IT(). - * @param huart UART handle. - * @retval None - */ -static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) -{ - uint8_t nb_tx_data; - - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - { - for(nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0 ; nb_tx_data--) - { - if(huart->TxXferCount == 0U) - { - /* Disable the TX FIFO threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - - break; /* force exit loop */ - } - else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != RESET) - { - huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF); - huart->TxXferCount--; - } - } - } -} - -/** - * @brief TX interrrupt handler for 9 bits data word length and FIFO mode is enabled. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Transmit_IT(). - * @param huart UART handle. - * @retval None - */ -static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) -{ - uint16_t* tmp; - uint8_t nb_tx_data; - - /* Check that a Tx process is ongoing */ - if (huart->gState == HAL_UART_STATE_BUSY_TX) - { - for(nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0 ; nb_tx_data--) - { - if(huart->TxXferCount == 0U) - { - /* Disable the TX FIFO threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); - - /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - - break; /* force exit loop */ - } - else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != RESET) - { - tmp = (uint16_t*) huart->pTxBuffPtr; - huart->Instance->TDR = (*tmp & (uint16_t)0x01FFU); - huart->pTxBuffPtr += 2U; - huart->TxXferCount--; - } - } - } -} -#endif - -/** - * @brief Wrap up transmission in non-blocking mode. - * @param huart pointer to a UART_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval None - */ -static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) -{ - /* Disable the UART Transmit Complete Interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); - - /* Tx process is ended, restore huart->gState to Ready */ - huart->gState = HAL_UART_STATE_READY; - - /* Cleat TxISR function pointer */ - huart->TxISR = NULL; - - HAL_UART_TxCpltCallback(huart); -} - -/** - * @brief RX interrrupt handler for 7 or 8 bits data word length . - * @param huart UART handle. - * @retval None - */ -static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) -{ - uint16_t uhMask = huart->Mask; - uint16_t uhdata; - - /* Check that a Rx process is ongoing */ - if(huart->RxState == HAL_UART_STATE_BUSY_RX) - { - uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - *huart->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask); - - if(--huart->RxXferCount == 0) - { - /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); -#endif - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Clear RxISR function pointer */ - huart->RxISR = NULL; - - HAL_UART_RxCpltCallback(huart); - } - } - else - { - /* Clear RXNE interrupt flag */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - } -} - -/** - * @brief RX interrrupt handler for 9 bits data word length . - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Receive_IT() - * @param huart UART handle. - * @retval None - */ -static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) -{ - uint16_t* tmp; - uint16_t uhMask = huart->Mask; - uint16_t uhdata; - - /* Check that a Rx process is ongoing */ - if(huart->RxState == HAL_UART_STATE_BUSY_RX) - { - uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - tmp = (uint16_t*) huart->pRxBuffPtr ; - *tmp = (uint16_t)(uhdata & uhMask); - huart->pRxBuffPtr +=2; - - if(--huart->RxXferCount == 0) - { - /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ -#if defined(USART_CR1_FIFOEN) - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); -#else - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); -#endif - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Clear RxISR function pointer */ - huart->RxISR = NULL; - - HAL_UART_RxCpltCallback(huart); - } - } - else - { - /* Clear RXNE interrupt flag */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - } -} - -#if defined(USART_CR1_FIFOEN) -/** - * @brief RX interrrupt handler for 7 or 8 bits data word length and FIFO mode is enabled. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Receive_IT() - * @param huart UART handle. - * @retval None - */ -static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) -{ - uint16_t uhMask = huart->Mask; - uint16_t uhdata; - uint8_t nb_rx_data; - - /* Check that a Rx process is ongoing */ - if(huart->RxState == HAL_UART_STATE_BUSY_RX) - { - for(nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0 ; nb_rx_data--) - { - uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - *huart->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask); - huart->RxXferCount--; - - if(huart->RxXferCount == 0U) - { - /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Clear RxISR function pointer */ - huart->RxISR = NULL; - - HAL_UART_RxCpltCallback(huart); - } - } - - /* When remaining number of bytes to receive is less than the RX FIFO - threshold, next incoming frames are processed as if FIFO mode was - disabled (i.e. one interrupt per received frame). - */ - if (((huart->RxXferCount != 0U)) && (huart->RxXferCount < huart->NbRxDataToProcess)) - { - /* Disable the UART RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - - /* Update the RxISR function pointer */ - huart->RxISR = UART_RxISR_8BIT; - - /* Enable the UART Data Register Not Empty interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); - } - } - else - { - /* Clear RXNE interrupt flag */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - } -} - -/** - * @brief RX interrrupt handler for 9 bits data word length and FIFO mode is enabled. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_UART_Receive_IT() - * @param huart UART handle. - * @retval None - */ -static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) -{ - uint16_t* tmp; - uint16_t uhMask = huart->Mask; - uint16_t uhdata; - uint8_t nb_rx_data; - - /* Check that a Rx process is ongoing */ - if(huart->RxState == HAL_UART_STATE_BUSY_RX) - { - for(nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0 ; nb_rx_data--) - { - uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - tmp = (uint16_t*) huart->pRxBuffPtr ; - *tmp = (uint16_t)(uhdata & uhMask); - huart->pRxBuffPtr +=2; - huart->RxXferCount--; - - if(huart->RxXferCount == 0U) - { - /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - - /* Clear RxISR function pointer */ - huart->RxISR = NULL; - - HAL_UART_RxCpltCallback(huart); - } - } - - /* When remaining number of bytes to receive is less than the RX FIFO - threshold, next incoming frames are processed as if FIFO mode was - disabled (i.e. one interrupt per received frame). - */ - if (((huart->RxXferCount != 0U)) && (huart->RxXferCount < huart->NbRxDataToProcess)) - { - /* Disable the UART RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - - /* Update the RxISR function pointer */ - huart->RxISR = UART_RxISR_16BIT; - - /* Enable the UART Data Register Not Empty interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); - } - } - else - { - /* Clear RXNE interrupt flag */ - __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - } -} -#endif - -/** - * @} - */ - -#endif /* HAL_UART_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c deleted file mode 100644 index c8c80f5d..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c +++ /dev/null @@ -1,900 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_uart_ex.c - * @author MCD Application Team - * @brief Extended UART HAL module driver. - * This file provides firmware functions to manage the following extended - * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). - * + Initialization and de-initialization functions - * + Peripheral Control functions - * - * - @verbatim - ============================================================================== - ##### UART peripheral extended features ##### - ============================================================================== - - (#) Declare a UART_HandleTypeDef handle structure. - - (#) For the UART RS485 Driver Enable mode, initialize the UART registers - by calling the HAL_RS485Ex_Init() API. - - (#) FIFO mode enabling/disabling and RX/TX FIFO threshold programming. - - -@- When USART operates in FIFO mode, FIFO mode must be enabled prior - starting RX/TX transfers. Also RX/TX FIFO thresholds must be - configured prior starting RX/TX transfers. - - (#) Slave mode enabling/disabling and NSS pin configuration. - - -@- When USART operates in Slave mode, Slave mode must be enabled prior - starting RX/TX transfers. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup UARTEx UARTEx - * @brief UART Extended HAL module driver - * @{ - */ - -#ifdef HAL_UART_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup UARTEx_Private_Functions UARTEx Private Functions - * @{ - */ -static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); -#if defined(USART_CR1_FIFOEN) -static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart); -#endif -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup UARTEx_Exported_Functions UARTEx Exported Functions - * @{ - */ - -/** @defgroup UARTEx_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Extended Initialization and Configuration Functions - * -@verbatim -=============================================================================== - ##### Initialization and Configuration functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to initialize the USARTx or the UARTy - in asynchronous mode. - (+) For the asynchronous mode the parameters below can be configured: - (++) Baud Rate - (++) Word Length - (++) Stop Bit - (++) Parity: If the parity is enabled, then the MSB bit of the data written - in the data register is transmitted but is changed by the parity bit. - (++) Hardware flow control - (++) Receiver/transmitter modes - (++) Over Sampling Method - (++) One-Bit Sampling Method - (+) For the asynchronous mode, the following advanced features can be configured as well: - (++) TX and/or RX pin level inversion - (++) data logical level inversion - (++) RX and TX pins swap - (++) RX overrun detection disabling - (++) DMA disabling on RX error - (++) MSB first on communication line - (++) auto Baud rate detection - [..] - The HAL_RS485Ex_Init() API follows the UART RS485 mode configuration - procedures (details for the procedures are available in reference manual). - -@endverbatim - - Depending on the frame length defined by the M1 and M0 bits (7-bit, - 8-bit or 9-bit), the possible UART formats are listed in the - following table. - - Table 1. UART frame format. - +-----------------------------------------------------------------------+ - | M1 bit | M0 bit | PCE bit | UART frame | - |---------|---------|-----------|---------------------------------------| - | 0 | 0 | 0 | | SB | 8 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 1 | 0 | | SB | 9 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | - |---------|---------|-----------|---------------------------------------| - | 1 | 0 | 0 | | SB | 7 bit data | STB | | - |---------|---------|-----------|---------------------------------------| - | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | - +-----------------------------------------------------------------------+ - - * @{ - */ - -/** - * @brief Initialize the RS485 Driver enable feature according to the specified - * parameters in the UART_InitTypeDef and creates the associated handle. - * @param huart UART handle. - * @param Polarity Select the driver enable polarity. - * This parameter can be one of the following values: - * @arg @ref UART_DE_POLARITY_HIGH DE signal is active high - * @arg @ref UART_DE_POLARITY_LOW DE signal is active low - * @param AssertionTime Driver Enable assertion time: - * 5-bit value defining the time between the activation of the DE (Driver Enable) - * signal and the beginning of the start bit. It is expressed in sample time - * units (1/8 or 1/16 bit time, depending on the oversampling rate) - * @param DeassertionTime Driver Enable deassertion time: - * 5-bit value defining the time between the end of the last stop bit, in a - * transmitted message, and the de-activation of the DE (Driver Enable) signal. - * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the - * oversampling rate). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime) -{ - uint32_t temp = 0x0; - - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - /* Check the Driver Enable UART instance */ - assert_param(IS_UART_DRIVER_ENABLE_INSTANCE(huart->Instance)); - - /* Check the Driver Enable polarity */ - assert_param(IS_UART_DE_POLARITY(Polarity)); - - /* Check the Driver Enable assertion time */ - assert_param(IS_UART_ASSERTIONTIME(AssertionTime)); - - /* Check the Driver Enable deassertion time */ - assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime)); - - if(huart->gState == HAL_UART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - huart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, CORTEX */ - HAL_UART_MspInit(huart); - } - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the UART Communication parameters */ - if (UART_SetConfig(huart) == HAL_ERROR) - { - return HAL_ERROR; - } - - if(huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - - /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DEM); - - /* Set the Driver Enable polarity */ - MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); - - /* Set the Driver Enable assertion and deassertion times */ - temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS); - temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS); - MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT|USART_CR1_DEAT), temp); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ - return (UART_CheckIdleState(huart)); -} - - -/** - * @} - */ - -/** @defgroup UARTEx_Exported_Functions_Group2 IO operation functions - * @brief Extended functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - This subsection provides a set of Wakeup and FIFO mode related callback functions. - - (#) Wakeup from Stop mode Callback: - (+) HAL_UARTEx_WakeupCallback() - - (#) TX/RX Fifos Callbacks: - (+) HAL_UARTEx_RxFifoFullCallback() - (+) HAL_UARTEx_TxFifoEmptyCallback() - -@endverbatim - * @{ - */ - -/** - * @brief UART wakeup from Stop mode callback. - * @param huart UART handle. - * @retval None - */ - __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UARTEx_WakeupCallback can be implemented in the user file. - */ -} - -#if defined(USART_CR1_FIFOEN) -/** - * @brief UART RX Fifo full callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UARTEx_RxFifoFullCallback (UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file. - */ -} - -/** - * @brief UART TX Fifo empty callback. - * @param huart UART handle. - * @retval None - */ -__weak void HAL_UARTEx_TxFifoEmptyCallback (UART_HandleTypeDef *huart) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(huart); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file. - */ -} -#endif - -/** - * @} - */ - -/** @defgroup UARTEx_Exported_Functions_Group3 Peripheral Control functions - * @brief Extended Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] This section provides the following functions: - (+) HAL_UARTEx_EnableClockStopMode() API enables the UART clock (HSI or LSE only) during stop mode - (+) HAL_UARTEx_DisableClockStopMode() API disables the above functionality - (+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address - detection length to more than 4 bits for multiprocessor address mark wake up. - (+) HAL_UARTEx_StopModeWakeUpSourceConfig() API defines the wake-up from stop mode - trigger: address match, Start Bit detection or RXNE bit status. - (+) HAL_UARTEx_EnableStopMode() API enables the UART to wake up the MCU from stop mode - (+) HAL_UARTEx_DisableStopMode() API disables the above functionality - (+) HAL_UARTEx_WakeupCallback() called upon UART wakeup interrupt - (+) HAL_UARTEx_EnableSPISlaveMode() API enables the SPI slave mode - (+) HAL_UARTEx_DisableSPISlaveMode() API disables the SPI slave mode - (+) HAL_UARTEx_ConfigNSS API configures the Slave Select input pin (NSS) - (+) HAL_UARTEx_EnableFifoMode() API enables the FIFO mode - (+) HAL_UARTEx_DisableFifoMode() API disables the FIFO mode - (+) HAL_UARTEx_SetTxFifoThreshold() API sets the TX FIFO threshold - (+) HAL_UARTEx_SetRxFifoThreshold() API sets the RX FIFO threshold - -@endverbatim - * @{ - */ - - - - -/** - * @brief By default in multiprocessor mode, when the wake up method is set - * to address mark, the UART handles only 4-bit long addresses detection; - * this API allows to enable longer addresses detection (6-, 7- or 8-bit - * long). - * @note Addresses detection lengths are: 6-bit address detection in 7-bit data mode, - * 7-bit address detection in 8-bit data mode, 8-bit address detection in 9-bit data mode. - * @param huart UART handle. - * @param AddressLength This parameter can be one of the following values: - * @arg @ref UART_ADDRESS_DETECT_4B 4-bit long address - * @arg @ref UART_ADDRESS_DETECT_7B 6-, 7- or 8-bit long address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength) -{ - /* Check the UART handle allocation */ - if(huart == NULL) - { - return HAL_ERROR; - } - - /* Check the address length parameter */ - assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength)); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the address length */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength); - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* TEACK and/or REACK to check before moving huart->gState to Ready */ - return (UART_CheckIdleState(huart)); -} - - -/** - * @brief Set Wakeup from Stop mode interrupt flag selection. - * @note It is the application responsibility to enable the interrupt used as - * usart_wkup interrupt source before entering low-power mode. - * @param huart UART handle. - * @param WakeUpSelection Address match, Start Bit detection or RXNE/RXFNE bit status. - * This parameter can be one of the following values: - * @arg @ref UART_WAKEUP_ON_ADDRESS - * @arg @ref UART_WAKEUP_ON_STARTBIT - * @arg @ref UART_WAKEUP_ON_READDATA_NONEMPTY - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection) -{ - HAL_StatusTypeDef status = HAL_OK; - uint32_t tickstart = 0; - - /* check the wake-up from stop mode UART instance */ - assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance)); - /* check the wake-up selection parameter */ - assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_UART_DISABLE(huart); - - /* Set the wake-up selection scheme */ - MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent); - - if (WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS) - { - UARTEx_Wakeup_AddressConfig(huart, WakeUpSelection); - } - - /* Enable the Peripheral */ - __HAL_UART_ENABLE(huart); - - /* Init tickstart for timeout managment*/ - tickstart = HAL_GetTick(); - - /* Wait until REACK flag is set */ - if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - { - status = HAL_TIMEOUT; - } - else - { - /* Initialize the UART State */ - huart->gState = HAL_UART_STATE_READY; - } - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return status; -} - - -/** - * @brief Enable UART Stop Mode. - * @note The UART is able to wake up the MCU from Stop 1 mode as long as UART clock is HSI or LSE. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Set UESM bit */ - SET_BIT(huart->Instance->CR1, USART_CR1_UESM); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Disable UART Stop Mode. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart) -{ - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Clear UESM bit */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -#if defined(USART_CR2_SLVEN) -/** - * @brief Enable the SPI slave mode. - * @note When the UART operates in SPI slave mode, it handles data flow using - * the serial interface clock derived from the external SCLK signal - * provided by the external master SPI device. - * @note In SPI slave mode, the UART must be enabled before starting the master - * communications (or between frames while the clock is stable). Otherwise, - * if the UART slave is enabled while the master is in the middle of a - * frame, it will become desynchronized with the master. - * @note The data register of the slave needs to be ready before the first edge - * of the communication clock or before the end of the ongoing communication, - * otherwise the SPI slave will transmit zeros. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_EnableSlaveMode(UART_HandleTypeDef *huart) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_SPI_SLAVE_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* In SPI slave mode mode, the following bits must be kept cleared: - - LINEN and CLKEN bit in the USART_CR2 register - - HDSEL, SCEN and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - - /* Enable SPI slave mode */ - SET_BIT(huart->Instance->CR2, USART_CR2_SLVEN); - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->SlaveMode = UART_SLAVEMODE_ENABLE; - - huart->gState = HAL_UART_STATE_READY; - - /* Enable UART */ - __HAL_UART_ENABLE(huart); - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Disable the SPI slave mode. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_DisableSlaveMode(UART_HandleTypeDef *huart) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_SPI_SLAVE_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Disable SPI slave mode */ - CLEAR_BIT(huart->Instance->CR2, USART_CR2_SLVEN); - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->SlaveMode = UART_SLAVEMODE_ENABLE; - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Configure the Slave Select input pin (NSS). - * @note Software NSS management: SPI slave will always be selected and NSS - * input pin will be ignored. - * @note Hardware NSS management: the SPI slave selection depends on NSS - * input pin. The slave is selected when NSS is low and deselected when - * NSS is high. - * @param huart UART handle. - * @param NSSConfig NSS configuration. - * This parameter can be one of the following values: - * @arg @ref UART_NSS_HARD - * @arg @ref UART_NSS_SOFT - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_ConfigNSS(UART_HandleTypeDef *huart, uint32_t NSSConfig) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_SPI_SLAVE_INSTANCE(huart->Instance)); - assert_param(IS_UART_NSS(NSSConfig)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Program DIS_NSS bit in the USART_CR2 register */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_DIS_NSS, NSSConfig); - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} -#endif - -#if defined(USART_CR1_FIFOEN) -/** - * @brief Enable the FIFO mode. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Enable FIFO mode */ - SET_BIT(tmpcr1, USART_CR1_FIFOEN); - huart->FifoMode = UART_FIFOMODE_ENABLE; - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - /* Determine the number of data to process during RX/TX ISR execution */ - UARTEx_SetNbDataToProcess(huart); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Disable the FIFO mode. - * @param huart UART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Enable FIFO mode */ - CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN); - huart->FifoMode = UART_FIFOMODE_DISABLE; - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Set the TXFIFO threshold. - * @param huart UART handle. - * @param Threshold TX FIFO threshold value - * This parameter can be one of the following values: - * @arg @ref UART_TXFIFO_THRESHOLD_1_8 - * @arg @ref UART_TXFIFO_THRESHOLD_1_4 - * @arg @ref UART_TXFIFO_THRESHOLD_1_2 - * @arg @ref UART_TXFIFO_THRESHOLD_3_4 - * @arg @ref UART_TXFIFO_THRESHOLD_7_8 - * @arg @ref UART_TXFIFO_THRESHOLD_8_8 - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) -{ - uint32_t tmpcr1 = 0; - - /* Check parameters */ - assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); - assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Update TX threshold configuration */ - MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); - - /* Determine the number of data to process during RX/TX ISR execution */ - UARTEx_SetNbDataToProcess(huart); - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} - -/** - * @brief Set the RXFIFO threshold. - * @param huart UART handle. - * @param Threshold RX FIFO threshold value - * This parameter can be one of the following values: - * @arg @ref UART_RXFIFO_THRESHOLD_1_8 - * @arg @ref UART_RXFIFO_THRESHOLD_1_4 - * @arg @ref UART_RXFIFO_THRESHOLD_1_2 - * @arg @ref UART_RXFIFO_THRESHOLD_3_4 - * @arg @ref UART_RXFIFO_THRESHOLD_7_8 - * @arg @ref UART_RXFIFO_THRESHOLD_8_8 - * @retval HAL status - */ -HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) -{ - uint32_t tmpcr1 = 0; - - /* Check the parameters */ - assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); - assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold)); - - /* Process Locked */ - __HAL_LOCK(huart); - - huart->gState = HAL_UART_STATE_BUSY; - - /* Save actual UART configuration */ - tmpcr1 = READ_REG(huart->Instance->CR1); - - /* Disable UART */ - __HAL_UART_DISABLE(huart); - - /* Update RX threshold configuration */ - MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); - - /* Determine the number of data to process during RX/TX ISR execution */ - UARTEx_SetNbDataToProcess(huart); - - /* Restore UART configuration */ - WRITE_REG(huart->Instance->CR1, tmpcr1); - - huart->gState = HAL_UART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(huart); - - return HAL_OK; -} -#endif - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup UARTEx_Private_Functions - * @{ - */ - -/** - * @brief Initialize the UART wake-up from stop mode parameters when triggered by address detection. - * @param huart UART handle. - * @param WakeUpSelection UART wake up from stop mode parameters. - * @retval None - */ -static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection) -{ - assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength)); - - /* Set the USART address length */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength); - - /* Set the USART address node */ - MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_ADDRESS_LSB_POS)); -} - -#if defined(USART_CR1_FIFOEN) -/** - * @brief Calculate the number of data to process in RX/TX ISR. - * @note The RX FIFO depth and the TX FIFO depth is extracted from - * the UART configuration registers. - * @param huart UART handle. - * @retval None - */ -void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart) -{ - uint8_t rx_fifo_depth; - uint8_t tx_fifo_depth; - uint8_t rx_fifo_threshold; - uint8_t tx_fifo_threshold; - uint8_t numerator[] = {1, 1, 1, 3, 7, 1}; - uint8_t denominator[] = {8, 4, 2, 4, 8, 1}; - - if (huart->FifoMode == UART_FIFOMODE_DISABLE) - { - huart->NbTxDataToProcess = 1; - huart->NbRxDataToProcess = 1; - } - else - { - rx_fifo_depth = 8; /* RX Fifo size */ - tx_fifo_depth = 8; /* TX Fifo size */ - rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); - tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); - huart->NbTxDataToProcess = (uint8_t)(tx_fifo_depth * numerator[tx_fifo_threshold])/denominator[tx_fifo_threshold]; - huart->NbRxDataToProcess = (uint8_t)(rx_fifo_depth * numerator[rx_fifo_threshold])/denominator[rx_fifo_threshold]; - } -} -#endif - -/** - * @} - */ - -#endif /* HAL_UART_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c b/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c deleted file mode 100644 index 875c0c5a..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c +++ /dev/null @@ -1,2397 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_ll_usb.c - * @author MCD Application Team - * @brief USB Low Layer HAL module driver. - * - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Initialization/de-initialization functions - * + I/O operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure. - - (#) Call USB_CoreInit() API to initialize the USB Core peripheral. - - (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes. - - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @defgroup USB_LL USB Low Layer - * @brief Low layer module for USB_FS and USB_OTG_FS drivers - * @{ - */ -#if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) - -#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ - defined(STM32L452xx) || defined(STM32L462xx) || \ - defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ - defined(STM32L496xx) || defined(STM32L4A6xx) || \ - defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) - -/** @addtogroup STM32L4xx_LL_USB_DRIVER - * @{ - */ - - - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -#if defined (USB_OTG_FS) -/** @defgroup USB_LL_Private_Functions USB Low Layer Private Functions - * @{ - */ -static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx); -/** - * @} - */ -#endif /* USB_OTG_FS */ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup LL_USB_Exported_Functions USB Low Layer Exported Functions - * @{ - */ - -/** @defgroup LL_USB_Group1 Initialization/de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization/de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - -@endverbatim - * @{ - */ -/*============================================================================== - USB OTG FS peripheral available on STM32L475xx, STM32L476xx, STM32L485xx and - STM32L486xx devices -==============================================================================*/ -#if defined (USB_OTG_FS) -/** - * @brief Initializes the USB Core - * @param USBx: USB Instance - * @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(cfg); - - /* Select FS Embedded PHY */ - USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL; - - /* Reset after a PHY select and set Host mode */ - USB_CoreReset(USBx); - - /* Deactivate the power down*/ - USBx->GCCFG = USB_OTG_GCCFG_PWRDWN; - - return HAL_OK; -} - -/** - * @brief USB_EnableGlobalInt - * Enables the controller's Global Int in the AHB Config reg - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx) -{ - USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT; - return HAL_OK; -} - - -/** - * @brief USB_DisableGlobalInt - * Disable the controller's Global Int in the AHB Config reg - * @param USBx: Selected device - * @retval HAL status -*/ -HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx) -{ - USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT; - return HAL_OK; -} - -/** - * @brief USB_SetCurrentMode : Set functional mode - * @param USBx: Selected device - * @param mode: current core mode - * This parameter can be one of these values: - * @arg USB_OTG_DEVICE_MODE: Peripheral mode - * @arg USB_OTG_HOST_MODE: Host mode - * @arg USB_OTG_DRD_MODE: Dual Role Device mode - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_ModeTypeDef mode) -{ - USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD); - - if ( mode == USB_HOST_MODE) - { - USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD; - } - else if ( mode == USB_DEVICE_MODE) - { - USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; - } - HAL_Delay(50); - - return HAL_OK; -} - -/** - * @brief USB_DevInit : Initializes the USB_OTG controller registers - * for device mode - * @param USBx: Selected device - * @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) -{ - uint32_t index = 0; - - /*Activate VBUS Sensing B */ - USBx->GCCFG |= USB_OTG_GCCFG_VBDEN; - - if (cfg.vbus_sensing_enable == 0) - { - /* Deactivate VBUS Sensing B */ - USBx->GCCFG &= ~ USB_OTG_GCCFG_VBDEN; - - /* B-peripheral session valid override enable*/ - USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; - USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; - } - - /* Restart the Phy Clock */ - USBx_PCGCCTL = 0; - - /* Device mode configuration */ - USBx_DEVICE->DCFG |= DCFG_FRAME_INTERVAL_80; - - /* Set Full speed phy */ - USB_SetDevSpeed (USBx , USB_OTG_SPEED_FULL); - - /* Flush the FIFOs */ - USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */ - USB_FlushRxFifo(USBx); - - /* Clear all pending Device Interrupts */ - USBx_DEVICE->DIEPMSK = 0; - USBx_DEVICE->DOEPMSK = 0; - USBx_DEVICE->DAINT = 0xFFFFFFFF; - USBx_DEVICE->DAINTMSK = 0; - - for (index = 0; index < cfg.dev_endpoints; index++) - { - if ((USBx_INEP(index)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) - { - USBx_INEP(index)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK); - } - else - { - USBx_INEP(index)->DIEPCTL = 0; - } - - USBx_INEP(index)->DIEPTSIZ = 0; - USBx_INEP(index)->DIEPINT = 0xFF; - } - - for (index = 0; index < cfg.dev_endpoints; index++) - { - if ((USBx_OUTEP(index)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) - { - USBx_OUTEP(index)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK); - } - else - { - USBx_OUTEP(index)->DOEPCTL = 0; - } - - USBx_OUTEP(index)->DOEPTSIZ = 0; - USBx_OUTEP(index)->DOEPINT = 0xFF; - } - - USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM); - - if (cfg.dma_enable == 1) - { - /*Set threshold parameters */ - USBx_DEVICE->DTHRCTL = (USB_OTG_DTHRCTL_TXTHRLEN_6 | USB_OTG_DTHRCTL_RXTHRLEN_6); - USBx_DEVICE->DTHRCTL |= (USB_OTG_DTHRCTL_RXTHREN | USB_OTG_DTHRCTL_ISOTHREN | USB_OTG_DTHRCTL_NONISOTHREN); - - index= USBx_DEVICE->DTHRCTL; - } - - /* Disable all interrupts. */ - USBx->GINTMSK = 0; - - /* Clear any pending interrupts */ - USBx->GINTSTS = 0xBFFFFFFF; - - /* Enable the common interrupts */ - if (cfg.dma_enable == DISABLE) - { - USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; - } - - /* Enable interrupts matching to the Device mode ONLY */ - USBx->GINTMSK |= (USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST |\ - USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT |\ - USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM|\ - USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM); - - if(cfg.Sof_enable) - { - USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM; - } - - if (cfg.vbus_sensing_enable == ENABLE) - { - USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT); - } - - return HAL_OK; -} - - -/** - * @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO - * @param USBx: Selected device - * @param num: FIFO number - * This parameter can be a value from 1 to 15 - 15 means Flush all Tx FIFOs - * @retval HAL status - */ -HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num) -{ - uint32_t count = 0; - - USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 6)); - - do - { - if (++count > 200000) - { - return HAL_TIMEOUT; - } - } - while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH); - - return HAL_OK; -} - - -/** - * @brief USB_FlushRxFifo : Flush Rx FIFO - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t count = 0; - - USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH; - - do - { - if (++count > 200000) - { - return HAL_TIMEOUT; - } - } - while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH); - - return HAL_OK; -} - -/** - * @brief USB_SetDevSpeed :Initializes the DevSpd field of DCFG register - * depending the PHY type and the enumeration speed of the device. - * @param USBx: Selected device - * @param speed: device speed - * This parameter can be one of these values: - * @arg USB_OTG_SPEED_HIGH: High speed mode - * @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode - * @arg USB_OTG_SPEED_FULL: Full speed mode - * @arg USB_OTG_SPEED_LOW: Low speed mode - * @retval Hal status - */ -HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed) -{ - USBx_DEVICE->DCFG |= speed; - return HAL_OK; -} - -/** - * @brief USB_GetDevSpeed :Return the Dev Speed - * @param USBx: Selected device - * @retval speed : device speed - * This parameter can be one of these values: - * @arg USB_OTG_SPEED_HIGH: High speed mode - * @arg USB_OTG_SPEED_FULL: Full speed mode - * @arg USB_OTG_SPEED_LOW: Low speed mode - */ -uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx) -{ - uint8_t speed = 0; - - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ) - { - speed = USB_OTG_SPEED_HIGH; - } - else if (((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ)|| - ((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_48MHZ)) - { - speed = USB_OTG_SPEED_FULL; - } - else if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ) - { - speed = USB_OTG_SPEED_LOW; - } - - return speed; -} - -/** - * @brief Activate and configure an endpoint - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) -{ - if (ep->is_in == 1) - { - USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))); - - if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0) - { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); - } - - } - else - { - USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16); - - if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0) - { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP)); - } - } - return HAL_OK; -} -/** - * @brief Activate and configure a dedicated endpoint - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) -{ - static __IO uint32_t debug = 0; - - /* Read DEPCTLn register */ - if (ep->is_in == 1) - { - if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0) - { - USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); - } - - - debug |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP)); - - USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))); - } - else - { - if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0) - { - USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP)); - - debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0)*USB_OTG_EP_REG_SIZE); - debug = (uint32_t )&USBx_OUTEP(ep->num)->DOEPCTL; - debug |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\ - ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP)); - } - - USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16); - } - - return HAL_OK; -} -/** - * @brief De-activate and de-initialize an endpoint - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) -{ - /* Read DEPCTLn register */ - if (ep->is_in == 1) - { - USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)))); - USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)))); - USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP; - } - else - { - USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16)); - USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16)); - USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP; - } - return HAL_OK; -} - -/** - * @brief De-activate and de-initialize a dedicated endpoint - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) -{ - /* Read DEPCTLn register */ - if (ep->is_in == 1) - { - USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP; - USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)))); - } - else - { - USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP; - USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16)); - } - return HAL_OK; -} - -/** - * @brief USB_EPStartXfer : setup and starts a transfer over an EP - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) -{ - uint16_t pktcnt = 0; - - /* IN endpoint */ - if (ep->is_in == 1) - { - /* Zero Length Packet? */ - if (ep->xfer_len == 0) - { - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ; - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); - } - else - { - /* Program the transfer size and packet count - * as follows: xfersize = N * maxpacket + - * short_packet pktcnt = N + (short_packet - * exist ? 1 : 0) - */ - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (((ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket) << 19)) ; - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len); - - if (ep->type == EP_TYPE_ISOC) - { - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT); - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (1 << 29)); - } - } - if (ep->type != EP_TYPE_ISOC) - { - /* Enable the Tx FIFO Empty Interrupt for this EP */ - if (ep->xfer_len > 0) - { - USBx_DEVICE->DIEPEMPMSK |= 1 << ep->num; - } - } - - if (ep->type == EP_TYPE_ISOC) - { - if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0) - { - USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM; - } - else - { - USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; - } - } - - /* EP enable, IN data in FIFO */ - USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA); - - if (ep->type == EP_TYPE_ISOC) - { - USB_WritePacket(USBx, ep->xfer_buff, ep->num, ep->xfer_len, dma); - } - } - else /* OUT endpoint */ - { - /* Program the transfer size and packet count as follows: - * pktcnt = N - * xfersize = N * maxpacket - */ - USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ); - USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT); - - if (ep->xfer_len == 0) - { - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket); - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ; - } - else - { - pktcnt = (ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket; - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (pktcnt << 19)); ; - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket * pktcnt)); - } - - if (ep->type == EP_TYPE_ISOC) - { - if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0) - { - USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM; - } - else - { - USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; - } - } - /* EP enable */ - USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA); - } - return HAL_OK; -} - -/** - * @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0 - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL status - */ -HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(dma); - - /* IN endpoint */ - if (ep->is_in == 1) - { - /* Zero Length Packet? */ - if (ep->xfer_len == 0) - { - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ; - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); - } - else - { - /* Program the transfer size and packet count - * as follows: xfersize = N * maxpacket + - * short_packet pktcnt = N + (short_packet - * exist ? 1 : 0) - */ - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); - USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); - - if(ep->xfer_len > ep->maxpacket) - { - ep->xfer_len = ep->maxpacket; - } - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ; - USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len); - - } - - /* Enable the Tx FIFO Empty Interrupt for this EP */ - if (ep->xfer_len > 0) - { - USBx_DEVICE->DIEPEMPMSK |= 1 << (ep->num); - } - - /* EP enable, IN data in FIFO */ - USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA); - } - else /* OUT endpoint */ - { - /* Program the transfer size and packet count as follows: - * pktcnt = N - * xfersize = N * maxpacket - */ - USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ); - USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT); - - if (ep->xfer_len > 0) - { - ep->xfer_len = ep->maxpacket; - } - - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)); - USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket)); - - /* EP enable */ - USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA); - } - return HAL_OK; -} - -/** - * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated - * with the EP/channel - * @param USBx: Selected device - * @param src: pointer to source buffer - * @param ch_ep_num: endpoint or host channel number - * @param len: Number of bytes to write - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL status - */ -HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(dma); - - uint32_t count32b= 0 , index= 0; - count32b = (len + 3) / 4; - for (index = 0; index < count32b; index++, src += 4) - { - USBx_DFIFO(ch_ep_num) = *((__packed uint32_t *)src); - } - return HAL_OK; -} - -/** - * @brief USB_ReadPacket : read a packet from the Tx FIFO associated - * with the EP/channel - * @param USBx: Selected device - * @param src: source pointer - * @param ch_ep_num: endpoint or host channel number - * @param len: Number of bytes to read - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval pointer to destination buffer - */ -void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len) -{ - uint32_t index=0; - uint32_t count32b = (len + 3) / 4; - - for ( index = 0; index < count32b; index++, dest += 4 ) - { - *(__packed uint32_t *)dest = USBx_DFIFO(0); - - } - return ((void *)dest); -} - -/** - * @brief USB_EPSetStall : set a stall condition over an EP - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep) -{ - if (ep->is_in == 1) - { - if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == 0) - { - USBx_INEP(ep->num)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS); - } - USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_STALL; - } - else - { - if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == 0) - { - USBx_OUTEP(ep->num)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS); - } - USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_STALL; - } - return HAL_OK; -} - - -/** - * @brief USB_EPClearStall : Clear a stall condition over an EP - * @param USBx: Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) -{ - if (ep->is_in == 1) - { - USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL; - if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK) - { - USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */ - } - } - else - { - USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL; - if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK) - { - USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */ - } - } - return HAL_OK; -} - -/** - * @brief USB_StopDevice : Stop the USB device mode - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t index; - - /* Clear Pending interrupt */ - for (index = 0; index < 15 ; index++) - { - USBx_INEP(index)->DIEPINT = 0xFF; - USBx_OUTEP(index)->DOEPINT = 0xFF; - } - USBx_DEVICE->DAINT = 0xFFFFFFFF; - - /* Clear interrupt masks */ - USBx_DEVICE->DIEPMSK = 0; - USBx_DEVICE->DOEPMSK = 0; - USBx_DEVICE->DAINTMSK = 0; - - /* Flush the FIFO */ - USB_FlushRxFifo(USBx); - USB_FlushTxFifo(USBx , 0x10 ); - - return HAL_OK; -} - -/** - * @brief USB_SetDevAddress : Stop the USB device mode - * @param USBx: Selected device - * @param address: new device address to be assigned - * This parameter can be a value from 0 to 255 - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address) -{ - USBx_DEVICE->DCFG &= ~ (USB_OTG_DCFG_DAD); - USBx_DEVICE->DCFG |= (address << 4) & USB_OTG_DCFG_DAD ; - - return HAL_OK; -} - -/** - * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx) -{ - USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS ; - HAL_Delay(3); - - return HAL_OK; -} - -/** - * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx) -{ - USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS ; - HAL_Delay(3); - - return HAL_OK; -} - -/** - * @brief USB_ReadInterrupts: return the global USB interrupt status - * @param USBx: Selected device - * @retval HAL status - */ -uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t tmpreg = 0; - - tmpreg = USBx->GINTSTS; - tmpreg &= USBx->GINTMSK; - return tmpreg; -} - -/** - * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status - * @param USBx: Selected device - * @retval HAL status - */ -uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t tmpreg; - tmpreg = USBx_DEVICE->DAINT; - tmpreg &= USBx_DEVICE->DAINTMSK; - return ((tmpreg & 0xffff0000) >> 16); -} - -/** - * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status - * @param USBx: Selected device - * @retval HAL status - */ -uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t tmpreg; - tmpreg = USBx_DEVICE->DAINT; - tmpreg &= USBx_DEVICE->DAINTMSK; - return ((tmpreg & 0xFFFF)); -} - -/** - * @brief Returns Device OUT EP Interrupt register - * @param USBx: Selected device - * @param epnum: endpoint number - * This parameter can be a value from 0 to 15 - * @retval Device OUT EP Interrupt register - */ -uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum) -{ - uint32_t tmpreg; - tmpreg = USBx_OUTEP(epnum)->DOEPINT; - tmpreg &= USBx_DEVICE->DOEPMSK; - return tmpreg; -} - -/** - * @brief Returns Device IN EP Interrupt register - * @param USBx: Selected device - * @param epnum: endpoint number - * This parameter can be a value from 0 to 15 - * @retval Device IN EP Interrupt register - */ -uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum) -{ - uint32_t tmpreg = 0, msk = 0, emp = 0; - - msk = USBx_DEVICE->DIEPMSK; - emp = USBx_DEVICE->DIEPEMPMSK; - msk |= ((emp >> epnum) & 0x1) << 7; - tmpreg = USBx_INEP(epnum)->DIEPINT & msk; - return tmpreg; -} - -/** - * @brief USB_ClearInterrupts: clear a USB interrupt - * @param USBx: Selected device - * @param interrupt: interrupt flag - * @retval None - */ -void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt) -{ - USBx->GINTSTS |= interrupt; -} - -/** - * @brief Returns USB core mode - * @param USBx: Selected device - * @retval return core mode : Host or Device - * This parameter can be one of these values: - * 0 : Host - * 1 : Device - */ -uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx) -{ - return ((USBx->GINTSTS ) & 0x1); -} - - -/** - * @brief Activate EP0 for Setup transactions - * @param USBx: Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx) -{ - /* Set the MPS of the IN EP based on the enumeration speed */ - USBx_INEP(0)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ; - - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ) - { - USBx_INEP(0)->DIEPCTL |= 3; - } - USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK; - - return HAL_OK; -} - - -/** - * @brief Prepare the EP0 to start the first control setup - * @param USBx: Selected device - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @param psetup: pointer to setup packet - * @retval HAL status - */ -HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(psetup); - - USBx_OUTEP(0)->DOEPTSIZ = 0; - USBx_OUTEP(0)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ; - USBx_OUTEP(0)->DOEPTSIZ |= (3 * 8); - USBx_OUTEP(0)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT; - - return HAL_OK; -} - -/** - * @brief USB_HostInit : Initializes the USB OTG controller registers - * for Host mode - * @param USBx: Selected device - * @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) -{ - uint32_t index = 0; - - /* Restart the Phy Clock */ - USBx_PCGCCTL = 0; - - /* Disable the FS/LS support mode only */ - if((cfg.speed == USB_OTG_SPEED_FULL)&& - (USBx != USB_OTG_FS)) - { - USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSS; - } - else - { - USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS); - } - - /* Make sure the FIFOs are flushed. */ - USB_FlushTxFifo(USBx, 0x10 ); /* all Tx FIFOs */ - USB_FlushRxFifo(USBx); - - /* Clear all pending HC Interrupts */ - for (index = 0; index < cfg.Host_channels; index++) - { - USBx_HC(index)->HCINT = 0xFFFFFFFF; - USBx_HC(index)->HCINTMSK = 0; - } - - /* Enable VBUS driving */ - USB_DriveVbus(USBx, 1); - - HAL_Delay(200); - - /* Disable all interrupts. */ - USBx->GINTMSK = 0; - - /* Clear any pending interrupts */ - USBx->GINTSTS = 0xFFFFFFFF; - - /* set Rx FIFO size */ - USBx->GRXFSIZ = (uint32_t )0x80; - USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) | 0x80); - USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0); - - /* Enable the common interrupts */ - if (cfg.dma_enable == DISABLE) - { - USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; - } - - /* Enable interrupts matching to the Host mode ONLY */ - USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM |\ - USB_OTG_GINTMSK_SOFM |USB_OTG_GINTSTS_DISCINT|\ - USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM); - - return HAL_OK; -} - -/** - * @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the - * HCFG register on the PHY type and set the right frame interval - * @param USBx: Selected device - * @param freq: clock frequency - * This parameter can be one of these values: - * HCFG_48_MHZ : Full Speed 48 MHz Clock - * HCFG_6_MHZ : Low Speed 6 MHz Clock - * @retval HAL status - */ -HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq) -{ - USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS); - USBx_HOST->HCFG |= (freq & USB_OTG_HCFG_FSLSPCS); - - if (freq == HCFG_48_MHZ) - { - USBx_HOST->HFIR = (uint32_t)48000; - } - else if (freq == HCFG_6_MHZ) - { - USBx_HOST->HFIR = (uint32_t)6000; - } - return HAL_OK; -} - -/** -* @brief USB_OTG_ResetPort : Reset Host Port - * @param USBx: Selected device - * @retval HAL status - * @note (1)The application must wait at least 10 ms - * before clearing the reset bit. - */ -HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx) -{ - __IO uint32_t hprt0 = 0; - - hprt0 = USBx_HPRT0; - - hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\ - USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG ); - - USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0); - HAL_Delay (10); /* See Note #1 */ - USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0); - return HAL_OK; -} - -/** - * @brief USB_DriveVbus : activate or de-activate vbus - * @param state: VBUS state - * This parameter can be one of these values: - * 0 : VBUS Active - * 1 : VBUS Inactive - * @retval HAL status -*/ -HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state) -{ - __IO uint32_t hprt0 = 0; - - hprt0 = USBx_HPRT0; - hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\ - USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG ); - - if (((hprt0 & USB_OTG_HPRT_PPWR) == 0 ) && (state == 1 )) - { - USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0); - } - if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0 )) - { - USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0); - } - return HAL_OK; -} - -/** - * @brief Return Host Core speed - * @param USBx: Selected device - * @retval speed : Host speed - * This parameter can be one of these values: - * @arg USB_OTG_SPEED_HIGH: High speed mode - * @arg USB_OTG_SPEED_FULL: Full speed mode - * @arg USB_OTG_SPEED_LOW: Low speed mode - */ -uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx) -{ - __IO uint32_t hprt0 = 0; - - hprt0 = USBx_HPRT0; - return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17); -} - -/** - * @brief Return Host Current Frame number - * @param USBx: Selected device - * @retval current frame number -*/ -uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx) -{ - return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM); -} - -/** - * @brief Initialize a host channel - * @param USBx: Selected device - * @param ch_num : Channel number - * This parameter can be a value from 1 to 15 - * @param epnum: Endpoint number - * This parameter can be a value from 1 to 15 - * @param dev_address: Current device address - * This parameter can be a value from 0 to 255 - * @param speed: Current device speed - * This parameter can be one of these values: - * @arg USB_OTG_SPEED_HIGH: High speed mode - * @arg USB_OTG_SPEED_FULL: Full speed mode - * @arg USB_OTG_SPEED_LOW: Low speed mode - * @param ep_type: Endpoint Type - * This parameter can be one of these values: - * @arg EP_TYPE_CTRL: Control type - * @arg EP_TYPE_ISOC: Isochronous type - * @arg EP_TYPE_BULK: Bulk type - * @arg EP_TYPE_INTR: Interrupt type - * @param mps: Max Packet Size - * This parameter can be a value from 0 to32K - * @retval HAL state - */ -HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, - uint8_t ch_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps) -{ - - /* Clear old interrupt conditions for this host channel. */ - USBx_HC(ch_num)->HCINT = 0xFFFFFFFF; - - /* Enable channel interrupts required for this transfer. */ - switch (ep_type) - { - case EP_TYPE_CTRL: - case EP_TYPE_BULK: - - USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\ - USB_OTG_HCINTMSK_STALLM |\ - USB_OTG_HCINTMSK_TXERRM |\ - USB_OTG_HCINTMSK_DTERRM |\ - USB_OTG_HCINTMSK_AHBERR |\ - USB_OTG_HCINTMSK_NAKM ; - - if (epnum & 0x80) - { - USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM; - } - break; - - case EP_TYPE_INTR: - - USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\ - USB_OTG_HCINTMSK_STALLM |\ - USB_OTG_HCINTMSK_TXERRM |\ - USB_OTG_HCINTMSK_DTERRM |\ - USB_OTG_HCINTMSK_NAKM |\ - USB_OTG_HCINTMSK_AHBERR |\ - USB_OTG_HCINTMSK_FRMORM ; - - if (epnum & 0x80) - { - USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM; - } - - break; - case EP_TYPE_ISOC: - - USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\ - USB_OTG_HCINTMSK_ACKM |\ - USB_OTG_HCINTMSK_AHBERR |\ - USB_OTG_HCINTMSK_FRMORM ; - - if (epnum & 0x80) - { - USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_TXERRM | USB_OTG_HCINTMSK_BBERRM); - } - break; - } - - /* Enable the top level host channel interrupt. */ - USBx_HOST->HAINTMSK |= (1 << ch_num); - - /* Make sure host channel interrupts are enabled. */ - USBx->GINTMSK |= USB_OTG_GINTMSK_HCIM; - - /* Program the HCCHAR register */ - USBx_HC(ch_num)->HCCHAR = (((dev_address << 22) & USB_OTG_HCCHAR_DAD) |\ - (((epnum & 0x7F)<< 11) & USB_OTG_HCCHAR_EPNUM)|\ - ((((epnum & 0x80) == 0x80)<< 15) & USB_OTG_HCCHAR_EPDIR)|\ - (((speed == HPRT0_PRTSPD_LOW_SPEED)<< 17) & USB_OTG_HCCHAR_LSDEV)|\ - ((ep_type << 18) & USB_OTG_HCCHAR_EPTYP)|\ - (mps & USB_OTG_HCCHAR_MPSIZ)); - - if (ep_type == EP_TYPE_INTR) - { - USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM ; - } - - return HAL_OK; -} - -/** - * @brief Start a transfer over a host channel - * @param USBx: Selected device - * @param hc: pointer to host channel structure - * @param dma: USB dma enabled or disabled - * This parameter can be one of these values: - * 0 : DMA feature not used - * 1 : DMA feature used - * @retval HAL state - */ -#if defined (__CC_ARM) /*!< ARM Compiler */ -#pragma O0 -#elif defined (__GNUC__) /*!< GNU Compiler */ -#pragma GCC optimize ("O0") -#endif /* __CC_ARM */ -HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma) -{ - uint8_t is_oddframe = 0; - uint16_t len_words = 0; - uint16_t num_packets = 0; - uint16_t max_hc_pkt_count = 256; - uint32_t tmpreg = 0; - - /* Compute the expected number of packets associated to the transfer */ - if (hc->xfer_len > 0) - { - num_packets = (hc->xfer_len + hc->max_packet - 1) / hc->max_packet; - - if (num_packets > max_hc_pkt_count) - { - num_packets = max_hc_pkt_count; - hc->xfer_len = num_packets * hc->max_packet; - } - } - else - { - num_packets = 1; - } - if (hc->ep_is_in) - { - hc->xfer_len = num_packets * hc->max_packet; - } - - /* Initialize the HCTSIZn register */ - USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) |\ - ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\ - (((hc->data_pid) << 29) & USB_OTG_HCTSIZ_DPID); - - if (dma) - { - /* xfer_buff MUST be 32-bits aligned */ - USBx_HC(hc->ch_num)->HCDMA = (uint32_t)hc->xfer_buff; - } - - is_oddframe = (USBx_HOST->HFNUM & 0x01) ? 0 : 1; - USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM; - USBx_HC(hc->ch_num)->HCCHAR |= (is_oddframe << 29); - - /* Set host channel enable */ - tmpreg = USBx_HC(hc->ch_num)->HCCHAR; - tmpreg &= ~USB_OTG_HCCHAR_CHDIS; - tmpreg |= USB_OTG_HCCHAR_CHENA; - USBx_HC(hc->ch_num)->HCCHAR = tmpreg; - - if (dma == 0) /* Slave mode */ - { - if((hc->ep_is_in == 0) && (hc->xfer_len > 0)) - { - switch(hc->ep_type) - { - /* Non periodic transfer */ - case EP_TYPE_CTRL: - case EP_TYPE_BULK: - - len_words = (hc->xfer_len + 3) / 4; - - /* check if there is enough space in FIFO space */ - if(len_words > (USBx->HNPTXSTS & 0xFFFF)) - { - /* need to process data in nptxfempty interrupt */ - USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM; - } - break; - /* Periodic transfer */ - case EP_TYPE_INTR: - case EP_TYPE_ISOC: - len_words = (hc->xfer_len + 3) / 4; - /* check if there is enough space in FIFO space */ - if(len_words > (USBx_HOST->HPTXSTS & 0xFFFF)) /* split the transfer */ - { - /* need to process data in ptxfempty interrupt */ - USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM; - } - break; - - default: - break; - } - - /* Write packet into the Tx FIFO. */ - USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len, 0); - } - } - - return HAL_OK; -} - -/** - * @brief Read all host channel interrupts status - * @param USBx: Selected device - * @retval HAL state - */ -uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx) -{ - return ((USBx_HOST->HAINT) & 0xFFFF); -} - -/** - * @brief Halt a host channel - * @param USBx: Selected device - * @param hc_num: Host Channel number - * This parameter can be a value from 1 to 15 - * @retval HAL state - */ -HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num) -{ - uint32_t count = 0; - - /* Check for space in the request queue to issue the halt. */ - if (((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_CTRL << 18)) || ((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_BULK << 18))) - { - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS; - - if ((USBx->HNPTXSTS & 0xFFFF) == 0) - { - USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA; - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA; - USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR; - do - { - if (++count > 1000) - { - break; - } - } - while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA); - } - else - { - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA; - } - } - else - { - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS; - - if ((USBx_HOST->HPTXSTS & 0xFFFF) == 0) - { - USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA; - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA; - USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR; - do - { - if (++count > 1000) - { - break; - } - } - while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA); - } - else - { - USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA; - } - } - - return HAL_OK; -} - -/** - * @brief Initiate Do Ping protocol - * @param USBx: Selected device - * @param hc_num: Host Channel number - * This parameter can be a value from 1 to 15 - * @retval HAL state - */ -HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num) -{ - uint8_t num_packets = 1; - uint32_t tmpreg = 0; - - USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\ - USB_OTG_HCTSIZ_DOPING; - - /* Set host channel enable */ - tmpreg = USBx_HC(ch_num)->HCCHAR; - tmpreg &= ~USB_OTG_HCCHAR_CHDIS; - tmpreg |= USB_OTG_HCCHAR_CHENA; - USBx_HC(ch_num)->HCCHAR = tmpreg; - - return HAL_OK; -} - -/** - * @brief Stop Host Core - * @param USBx: Selected device - * @retval HAL state - */ -HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx) -{ - uint8_t index; - uint32_t count = 0; - uint32_t value = 0; - - USB_DisableGlobalInt(USBx); - - /* Flush FIFO */ - USB_FlushTxFifo(USBx, 0x10); - USB_FlushRxFifo(USBx); - - /* Flush out any leftover queued requests. */ - for (index = 0; index <= 15; index++) - { - value = USBx_HC(index)->HCCHAR; - value |= USB_OTG_HCCHAR_CHDIS; - value &= ~USB_OTG_HCCHAR_CHENA; - value &= ~USB_OTG_HCCHAR_EPDIR; - USBx_HC(index)->HCCHAR = value; - } - - /* Halt all channels to put them into a known state. */ - for (index = 0; index <= 15; index++) - { - value = USBx_HC(index)->HCCHAR ; - value |= USB_OTG_HCCHAR_CHDIS; - value |= USB_OTG_HCCHAR_CHENA; - value &= ~USB_OTG_HCCHAR_EPDIR; - USBx_HC(index)->HCCHAR = value; - - USBx_HC(index)->HCCHAR = value; - do - { - if (++count > 1000) - { - break; - } - } - while ((USBx_HC(index)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA); - } - - /* Clear any pending Host interrupts */ - USBx_HOST->HAINT = 0xFFFFFFFF; - USBx->GINTSTS = 0xFFFFFFFF; - USB_EnableGlobalInt(USBx); - return HAL_OK; -} - -/** - * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx) -{ - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS) - { - /* active Remote wakeup signalling */ - USBx_DEVICE->DCTL |= USB_OTG_DCTL_RWUSIG; - } - return HAL_OK; -} - -/** - * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx) -{ - /* active Remote wakeup signalling */ - USBx_DEVICE->DCTL &= ~(USB_OTG_DCTL_RWUSIG); - return HAL_OK; -} - -#endif /* USB_OTG_FS */ - -/*============================================================================== - USB Device FS peripheral available on STM32L432xx, STM32L433xx, STM32L442xx) - and STM32L443xx devices -==============================================================================*/ -#if defined (USB) -/** - * @brief Initializes the USB Core - * @param USBx: USB Instance - * @param cfg : pointer to a USB_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(cfg); - - return HAL_OK; -} - -/** - * @brief USB_EnableGlobalInt - * Enables the controller's Global Int in the AHB Config reg - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx) -{ - uint32_t winterruptmask = 0; - - /* Set winterruptmask variable */ - winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \ - | USB_CNTR_ESOFM | USB_CNTR_RESETM; - - /* Set interrupt mask */ - USBx->CNTR |= winterruptmask; - - return HAL_OK; -} - -/** - * @brief USB_DisableGlobalInt - * Disable the controller's Global Int in the AHB Config reg - * @param USBx : Selected device - * @retval HAL status -*/ -HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) -{ - uint32_t winterruptmask = 0; - - /* Set winterruptmask variable */ - winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | USB_CNTR_SUSPM | USB_CNTR_ERRM \ - | USB_CNTR_ESOFM | USB_CNTR_RESETM; - - /* Clear interrupt mask */ - USBx->CNTR &= ~winterruptmask; - - return HAL_OK; -} - -/** - * @brief USB_SetCurrentMode : Set functional mode - * @param USBx : Selected device - * @param mode : current core mode - * This parameter can be one of the these values: - * @arg USB_DEVICE_MODE: Peripheral mode mode - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx , USB_ModeTypeDef mode) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(mode); - - return HAL_OK; -} - -/** - * @brief USB_DevInit : Initializes the USB controller registers - * for device mode - * @param USBx : Selected device - * @param cfg : pointer to a USB_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevInit (USB_TypeDef *USBx, USB_CfgTypeDef cfg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(cfg); - - /* Init Device */ - /*CNTR_FRES = 1*/ - USBx->CNTR = USB_CNTR_FRES; - - /*CNTR_FRES = 0*/ - USBx->CNTR = 0; - - /*Clear pending interrupts*/ - USBx->ISTR = 0; - - /*Set Btable Address*/ - USBx->BTABLE = BTABLE_ADDRESS; - - return HAL_OK; -} - -/** - * @brief USB_FlushTxFifo : Flush a Tx FIFO - * @param USBx : Selected device - * @param num : FIFO number - * This parameter can be a value from 1 to 15 - 15 means Flush all Tx FIFOs - * @retval HAL status - */ -HAL_StatusTypeDef USB_FlushTxFifo (USB_TypeDef *USBx, uint32_t num ) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(num); - - return HAL_OK; -} - -/** - * @brief USB_FlushRxFifo : Flush Rx FIFO - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - - return HAL_OK; -} - -/** - * @brief Activate and configure an endpoint - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - /* initialize Endpoint */ - switch (ep->type) - { - case EP_TYPE_CTRL: - PCD_SET_EPTYPE(USBx, ep->num, USB_EP_CONTROL); - break; - case EP_TYPE_BULK: - PCD_SET_EPTYPE(USBx, ep->num, USB_EP_BULK); - break; - case EP_TYPE_INTR: - PCD_SET_EPTYPE(USBx, ep->num, USB_EP_INTERRUPT); - break; - case EP_TYPE_ISOC: - PCD_SET_EPTYPE(USBx, ep->num, USB_EP_ISOCHRONOUS); - break; - default: - break; - } - - PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); - - if (ep->doublebuffer == 0) - { - if (ep->is_in) - { - /*Set the endpoint Transmit buffer address */ - PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - /* Configure NAK status for the Endpoint*/ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); - } - else - { - /*Set the endpoint Receive buffer address */ - PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); - /*Set the endpoint Receive buffer counter*/ - PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); - PCD_CLEAR_RX_DTOG(USBx, ep->num); - /* Configure VALID status for the Endpoint*/ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - } - } - /*Double Buffer*/ - else - { - /*Set the endpoint as double buffered*/ - PCD_SET_EP_DBUF(USBx, ep->num); - /*Set buffer address for double buffered mode*/ - PCD_SET_EP_DBUF_ADDR(USBx, ep->num,ep->pmaaddr0, ep->pmaaddr1); - - if (ep->is_in==0) - { - /* Clear the data toggle bits for the endpoint IN/OUT*/ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - - /* Reset value of the data toggle bits for the endpoint out*/ - PCD_TX_DTOG(USBx, ep->num); - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - else - { - /* Clear the data toggle bits for the endpoint IN/OUT*/ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - PCD_RX_DTOG(USBx, ep->num); - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - } - } - - return HAL_OK; -} - -/** - * @brief De-activate and de-initialize an endpoint - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - if (ep->doublebuffer == 0) - { - if (ep->is_in) - { - PCD_CLEAR_TX_DTOG(USBx, ep->num); - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - else - { - PCD_CLEAR_RX_DTOG(USBx, ep->num); - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - } - } - /*Double Buffer*/ - else - { - if (ep->is_in==0) - { - /* Clear the data toggle bits for the endpoint IN/OUT*/ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - - /* Reset value of the data toggle bits for the endpoint out*/ - PCD_TX_DTOG(USBx, ep->num); - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - else - { - /* Clear the data toggle bits for the endpoint IN/OUT*/ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - PCD_RX_DTOG(USBx, ep->num); - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - } - } - - return HAL_OK; -} - -/** - * @brief USB_EPStartXfer : setup and starts a transfer over an EP - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx , USB_EPTypeDef *ep, uint8_t dma) -{ - uint16_t pmabuffer = 0; - uint32_t len = ep->xfer_len; - - /* IN endpoint */ - if (ep->is_in == 1) - { - /*Multi packet transfer*/ - if (ep->xfer_len > ep->maxpacket) - { - len=ep->maxpacket; - ep->xfer_len-=len; - } - else - { - len=ep->xfer_len; - ep->xfer_len =0; - } - - /* configure and validate Tx endpoint */ - if (ep->doublebuffer == 0) - { - USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, len); - PCD_SET_EP_TX_CNT(USBx, ep->num, len); - } - else - { - /* Write the data to the USB endpoint */ - if (PCD_GET_ENDPOINT(USBx, ep->num)& USB_EP_DTOG_TX) - { - /* Set the Double buffer counter for pmabuffer1 */ - PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr1; - } - else - { - /* Set the Double buffer counter for pmabuffer0 */ - PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr0; - } - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, len); - PCD_FreeUserBuffer(USBx, ep->num, ep->is_in); - } - - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); - } - else /* OUT endpoint */ - { - /* Multi packet transfer*/ - if (ep->xfer_len > ep->maxpacket) - { - len=ep->maxpacket; - ep->xfer_len-=len; - } - else - { - len=ep->xfer_len; - ep->xfer_len =0; - } - - /* configure and validate Rx endpoint */ - if (ep->doublebuffer == 0) - { - /*Set RX buffer count*/ - PCD_SET_EP_RX_CNT(USBx, ep->num, len); - } - else - { - /*Set the Double buffer counter*/ - PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); - } - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - } - - return HAL_OK; -} - -/** - * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated - * with the EP/channel - * @param USBx : Selected device - * @param src : pointer to source buffer - * @param ch_ep_num : endpoint or host channel number - * @param len : Number of bytes to write - * @retval HAL status - */ -HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(src); - UNUSED(ch_ep_num); - UNUSED(len); - - return HAL_OK; -} - -/** - * @brief USB_ReadPacket : read a packet from the Tx FIFO associated - * with the EP/channel - * @param USBx : Selected device - * @param dest : destination pointer - * @param len : Number of bytes to read - * @retval pointer to destination buffer - */ -void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(dest); - UNUSED(len); - - return ((void *)NULL); -} - -/** - * @brief USB_EPSetStall : set a stall condition over an EP - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx , USB_EPTypeDef *ep) -{ - if (ep->num == 0) - { - /* This macro sets STALL status for RX & TX*/ - PCD_SET_EP_TXRX_STATUS(USBx, ep->num, USB_EP_RX_STALL, USB_EP_TX_STALL); - } - else - { - if (ep->is_in) - { - PCD_SET_EP_TX_STATUS(USBx, ep->num , USB_EP_TX_STALL); - } - else - { - PCD_SET_EP_RX_STATUS(USBx, ep->num , USB_EP_RX_STALL); - } - } - return HAL_OK; -} - -/** - * @brief USB_EPClearStall : Clear a stall condition over an EP - * @param USBx : Selected device - * @param ep: pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - if (ep->is_in) - { - PCD_CLEAR_TX_DTOG(USBx, ep->num); - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); - } - else - { - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - } - return HAL_OK; -} - -/** - * @brief USB_StopDevice : Stop the usb device mode - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx) -{ - /* disable all interrupts and force USB reset */ - USBx->CNTR = USB_CNTR_FRES; - - /* clear interrupt status register */ - USBx->ISTR = 0; - - /* switch-off device */ - USBx->CNTR = (USB_CNTR_FRES | USB_CNTR_PDWN); - - return HAL_OK; -} - -/** - * @brief USB_SetDevAddress : Stop the usb device mode - * @param USBx : Selected device - * @param address : new device address to be assigned - * This parameter can be a value from 0 to 255 - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetDevAddress (USB_TypeDef *USBx, uint8_t address) -{ - if(address == 0) - { - /* set device address and enable function */ - USBx->DADDR = USB_DADDR_EF; - } - - return HAL_OK; -} - -/** - * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevConnect (USB_TypeDef *USBx) -{ - /* Enabling DP Pull-Down bit to Connect internal pull-up on USB DP line */ - USB->BCDR |= USB_BCDR_DPPU; - - return HAL_OK; -} - -/** - * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevDisconnect (USB_TypeDef *USBx) -{ - /* Disable DP Pull-Down bit*/ - USB->BCDR &= ~(USB_BCDR_DPPU); - - return HAL_OK; -} - -/** - * @brief USB_ReadInterrupts: return the global USB interrupt status - * @param USBx : Selected device - * @retval HAL status - */ -uint32_t USB_ReadInterrupts (USB_TypeDef *USBx) -{ - uint32_t tmpreg = 0; - - tmpreg = USBx->ISTR; - return tmpreg; -} - -/** - * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status - * @param USBx : Selected device - * @retval HAL status - */ -uint32_t USB_ReadDevAllOutEpInterrupt (USB_TypeDef *USBx) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - - return (0); -} - -/** - * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status - * @param USBx : Selected device - * @retval HAL status - */ -uint32_t USB_ReadDevAllInEpInterrupt (USB_TypeDef *USBx) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - - return (0); -} - -/** - * @brief Returns Device OUT EP Interrupt register - * @param USBx : Selected device - * @param epnum : endpoint number - * This parameter can be a value from 0 to 15 - * @retval Device OUT EP Interrupt register - */ -uint32_t USB_ReadDevOutEPInterrupt (USB_TypeDef *USBx , uint8_t epnum) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(epnum); - - return (0); -} - -/** - * @brief Returns Device IN EP Interrupt register - * @param USBx : Selected device - * @param epnum : endpoint number - * This parameter can be a value from 0 to 15 - * @retval Device IN EP Interrupt register - */ -uint32_t USB_ReadDevInEPInterrupt (USB_TypeDef *USBx , uint8_t epnum) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(epnum); - - return (0); -} - -/** - * @brief USB_ClearInterrupts: clear a USB interrupt - * @param USBx : Selected device - * @param interrupt : interrupt flag - * @retval None - */ -void USB_ClearInterrupts (USB_TypeDef *USBx, uint32_t interrupt) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(interrupt); -} - -/** - * @brief Prepare the EP0 to start the first control setup - * @param USBx : Selected device - * @param psetup : pointer to setup packet - * @retval HAL status - */ -HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t dma ,uint8_t *psetup) -{ - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(psetup); - UNUSED(dma); - - return HAL_OK; -} - -/** - * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx) -{ - USBx->CNTR |= USB_CNTR_RESUME; - - return HAL_OK; -} - -/** - * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling - * @param USBx : Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx) -{ - USBx->CNTR &= ~(USB_CNTR_RESUME); - return HAL_OK; -} - -/** - * @brief Copy a buffer from user memory area to packet memory area (PMA) - * @param USBx : pointer to USB register. - * @param pbUsrBuf : pointer to user memory area. - * @param wPMABufAddr : address into PMA. - * @param wNBytes : number of bytes to be copied. - * @retval None - */ -void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - uint32_t n = (wNBytes + 1) >> 1; - uint32_t i; - uint16_t temp1, temp2; - uint16_t *pdwVal; - pdwVal = (uint16_t *)(wPMABufAddr + (uint32_t)USBx + 0x400); - - for (i = n; i != 0; i--) - { - temp1 = (uint16_t) * pbUsrBuf; - pbUsrBuf++; - temp2 = temp1 | (uint16_t) * pbUsrBuf << 8; - *pdwVal++ = temp2; - pbUsrBuf++; - } -} - -/** - * @brief Copy a buffer from user memory area to packet memory area (PMA) - * @param USBx : pointer to USB register. -* @param pbUsrBuf : pointer to user memory area. - * @param wPMABufAddr : address into PMA. - * @param wNBytes : number of bytes to be copied. - * @retval None - */ -void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - uint32_t n = (wNBytes + 1) >> 1; - uint32_t i; - uint16_t *pdwVal; - pdwVal = (uint16_t *)(wPMABufAddr + (uint32_t)USBx + 0x400); - for (i = n; i != 0; i--) - { - *(uint16_t*)pbUsrBuf++ = *pdwVal++; - pbUsrBuf++; - } -} -#endif /* USB */ -/** - * @} - */ -/** - * @} - */ - -#if defined (USB_OTG_FS) -/** @addtogroup USB_LL_Private_Functions - * @{ - */ -/** - * @brief Reset the USB Core (needed after USB clock settings change) - * @param USBx : Selected device - * @retval HAL status - */ -static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx) -{ - uint32_t count = 0; - - /* Wait for AHB master IDLE state. */ - do - { - if (++count > 200000) - { - return HAL_TIMEOUT; - } - } - while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0); - - /* Core Soft Reset */ - count = 0; - USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; - - do - { - if (++count > 200000) - { - return HAL_TIMEOUT; - } - } - while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); - - return HAL_OK; -} -/** - * @} - */ -#endif /* USB_OTG_FS */ - -#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ - /* STM32L452xx || STM32L462xx || */ - /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ - /* STM32L496xx || STM32L4A6xx || */ - /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ - -#endif /* defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) */ -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Inc/main.h b/Samples/Nucleo-TPM/L4A6RG/Inc/main.h deleted file mode 100644 index 61fc455d..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Inc/main.h +++ /dev/null @@ -1,90 +0,0 @@ -/** - ****************************************************************************** - * @file : main.h - * @brief : Header for main.c file. - * This file contains the common defines of the application. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __MAIN_H__ -#define __MAIN_H__ - -/* Includes ------------------------------------------------------------------*/ - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* Private define ------------------------------------------------------------*/ - -#define B1_Pin GPIO_PIN_13 -#define B1_GPIO_Port GPIOC -#define LD2_Pin GPIO_PIN_5 -#define LD2_GPIO_Port GPIOA - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1U */ - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -#ifdef __cplusplus - extern "C" { -#endif -void _Error_Handler(char *, int); - -#define Error_Handler() _Error_Handler(__FILE__, __LINE__) -#ifdef __cplusplus -} -#endif - -#endif /* __MAIN_H__ */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Inc/stm32l4xx_hal_conf.h b/Samples/Nucleo-TPM/L4A6RG/Inc/stm32l4xx_hal_conf.h deleted file mode 100644 index 48716247..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Inc/stm32l4xx_hal_conf.h +++ /dev/null @@ -1,430 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2018 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -#include "main.h" -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ - -#define HAL_MODULE_ENABLED -/*#define HAL_ADC_MODULE_ENABLED */ -/*#define HAL_CRYP_MODULE_ENABLED */ -/*#define HAL_CAN_MODULE_ENABLED */ -/*#define HAL_COMP_MODULE_ENABLED */ -/*#define HAL_CRC_MODULE_ENABLED */ -/*#define HAL_CRYP_MODULE_ENABLED */ -/*#define HAL_DAC_MODULE_ENABLED */ -/*#define HAL_DCMI_MODULE_ENABLED */ -/*#define HAL_DMA2D_MODULE_ENABLED */ -/*#define HAL_DFSDM_MODULE_ENABLED */ -/*#define HAL_DSI_MODULE_ENABLED */ -/*#define HAL_FIREWALL_MODULE_ENABLED */ -/*#define HAL_GFXMMU_MODULE_ENABLED */ -/*#define HAL_HCD_MODULE_ENABLED */ -/*#define HAL_HASH_MODULE_ENABLED */ -/*#define HAL_I2S_MODULE_ENABLED */ -/*#define HAL_IRDA_MODULE_ENABLED */ -/*#define HAL_IWDG_MODULE_ENABLED */ -/*#define HAL_LTDC_MODULE_ENABLED */ -/*#define HAL_LCD_MODULE_ENABLED */ -/*#define HAL_LPTIM_MODULE_ENABLED */ -/*#define HAL_NAND_MODULE_ENABLED */ -/*#define HAL_NOR_MODULE_ENABLED */ -/*#define HAL_OPAMP_MODULE_ENABLED */ -/*#define HAL_OSPI_MODULE_ENABLED */ -/*#define HAL_OSPI_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -/*#define HAL_QSPI_MODULE_ENABLED */ -/*#define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -/*#define HAL_SAI_MODULE_ENABLED */ -/*#define HAL_SD_MODULE_ENABLED */ -/*#define HAL_SMBUS_MODULE_ENABLED */ -/*#define HAL_SMARTCARD_MODULE_ENABLED */ -/*#define HAL_SPI_MODULE_ENABLED */ -/*#define HAL_SRAM_MODULE_ENABLED */ -/*#define HAL_SWPMI_MODULE_ENABLED */ -/*#define HAL_TIM_MODULE_ENABLED */ -/*#define HAL_TSC_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/*#define HAL_USART_MODULE_ENABLED */ -/*#define HAL_WWDG_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. - * This internal oscillator is mainly dedicated to provide a high precision clock to - * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. - * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency - * which is subject to manufacturing process variations. - */ -#if !defined (HSI48_VALUE) - #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. - The real value my vary depending on manufacturing process variations.*/ -#endif /* HSI48_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature.*/ - -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)2097000U) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ - -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 0U -#define INSTRUCTION_CACHE_ENABLE 1U -#define DATA_CACHE_ENABLE 1U - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1U */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver - * Activated: CRC code is present inside driver - * Deactivated: CRC code cleaned from driver - */ - -#define USE_SPI_CRC 0U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" - #include "stm32l4xx_hal_rcc_ex.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" - #include "stm32l4xx_hal_dma_ex.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32l4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32l4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32l4xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32l4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32l4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED - #include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_OSPI_MODULE_ENABLED - #include "stm32l4xx_hal_ospi.h" -#endif /* HAL_OSPI_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_GFXMMU_MODULE_ENABLED - #include "stm32l4xx_hal_gfxmmu.h" -#endif /* HAL_GFXMMU_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Inc/stm32l4xx_it.h b/Samples/Nucleo-TPM/L4A6RG/Inc/stm32l4xx_it.h deleted file mode 100644 index 2c63e68b..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Inc/stm32l4xx_it.h +++ /dev/null @@ -1,67 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_it.h - * @brief This file contains the headers of the interrupt handlers. - ****************************************************************************** - * - * COPYRIGHT(c) 2018 STMicroelectronics - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_IT_H -#define __STM32L4xx_IT_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" -#include "main.h" -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -void NMI_Handler(void); -void HardFault_Handler(void); -void MemManage_Handler(void); -void BusFault_Handler(void); -void UsageFault_Handler(void); -void SVC_Handler(void); -void DebugMon_Handler(void); -void PendSV_Handler(void); -void SysTick_Handler(void); -void OTG_FS_IRQHandler(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_IT_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Inc/usb_device.h b/Samples/Nucleo-TPM/L4A6RG/Inc/usb_device.h deleted file mode 100644 index 9b2d33e0..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Inc/usb_device.h +++ /dev/null @@ -1,114 +0,0 @@ -/** - ****************************************************************************** - * @file : usb_device.h - * @version : v2.0_Cube - * @brief : Header for usb_device.c file. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_DEVICE__H__ -#define __USB_DEVICE__H__ - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx.h" -#include "stm32l4xx_hal.h" -#include "usbd_def.h" - -/* USER CODE BEGIN INCLUDE */ -void MX_USB_DEVICE_DeInit(void); -/* USER CODE END INCLUDE */ - -/** @addtogroup USBD_OTG_DRIVER - * @{ - */ - -/** @defgroup USBD_DEVICE USBD_DEVICE - * @brief Device file for Usb otg low level driver. - * @{ - */ - -/** @defgroup USBD_DEVICE_Exported_Variables USBD_DEVICE_Exported_Variables - * @brief Public variables. - * @{ - */ - -/** USB device core handle. */ -extern USBD_HandleTypeDef hUsbDeviceFS; - -/** - * @} - */ - -/** @defgroup USBD_DEVICE_Exported_FunctionsPrototype USBD_DEVICE_Exported_FunctionsPrototype - * @brief Declaration of public functions for Usb device. - * @{ - */ - -/** USB Device initialization function. */ -void MX_USB_DEVICE_Init(void); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USB_DEVICE__H__ */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Inc/usbd_cdc_if.h b/Samples/Nucleo-TPM/L4A6RG/Inc/usbd_cdc_if.h deleted file mode 100644 index 605b7785..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Inc/usbd_cdc_if.h +++ /dev/null @@ -1,158 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_cdc_if.h - * @version : v2.0_Cube - * @brief : Header for usbd_cdc_if.c file. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_CDC_IF_H__ -#define __USBD_CDC_IF_H__ - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_cdc.h" - -/* USER CODE BEGIN INCLUDE */ - -/* USER CODE END INCLUDE */ - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @brief For Usb device. - * @{ - */ - -/** @defgroup USBD_CDC_IF USBD_CDC_IF - * @brief Usb VCP device module - * @{ - */ - -/** @defgroup USBD_CDC_IF_Exported_Defines USBD_CDC_IF_Exported_Defines - * @brief Defines. - * @{ - */ -/* USER CODE BEGIN EXPORTED_DEFINES */ - -/* USER CODE END EXPORTED_DEFINES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Exported_Types USBD_CDC_IF_Exported_Types - * @brief Types. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_TYPES */ - -/* USER CODE END EXPORTED_TYPES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Exported_Macros USBD_CDC_IF_Exported_Macros - * @brief Aliases. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_MACRO */ - -/* USER CODE END EXPORTED_MACRO */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Exported_Variables USBD_CDC_IF_Exported_Variables - * @brief Public variables. - * @{ - */ - -/** CDC Interface callback. */ -extern USBD_CDC_ItfTypeDef USBD_Interface_fops_FS; - -/* USER CODE BEGIN EXPORTED_VARIABLES */ - -/* USER CODE END EXPORTED_VARIABLES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Exported_FunctionsPrototype USBD_CDC_IF_Exported_FunctionsPrototype - * @brief Public functions declaration. - * @{ - */ - -uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len); - -/* USER CODE BEGIN EXPORTED_FUNCTIONS */ - -/* USER CODE END EXPORTED_FUNCTIONS */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_CDC_IF_H__ */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Inc/usbd_conf.h b/Samples/Nucleo-TPM/L4A6RG/Inc/usbd_conf.h deleted file mode 100644 index df2e31c1..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Inc/usbd_conf.h +++ /dev/null @@ -1,204 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_conf.h - * @version : v2.0_Cube - * @brief : Header for usbd_conf.c file. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_CONF__H__ -#define __USBD_CONF__H__ - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include -#include -#include -#include "stm32l4xx.h" -#include "stm32l4xx_hal.h" - -/* USER CODE BEGIN INCLUDE */ - -/* USER CODE END INCLUDE */ - -/** @addtogroup USBD_OTG_DRIVER - * @brief Driver for Usb device. - * @{ - */ - -/** @defgroup USBD_CONF USBD_CONF - * @brief Configuration file for Usb otg low level driver. - * @{ - */ - -/** @defgroup USBD_CONF_Exported_Variables USBD_CONF_Exported_Variables - * @brief Public variables. - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_CONF_Exported_Defines USBD_CONF_Exported_Defines - * @brief Defines for configuration of the Usb device. - * @{ - */ - -/*---------- -----------*/ -#define USBD_MAX_NUM_INTERFACES 1 -/*---------- -----------*/ -#define USBD_MAX_NUM_CONFIGURATION 1 -/*---------- -----------*/ -#define USBD_MAX_STR_DESC_SIZ 512 -/*---------- -----------*/ -#define USBD_SUPPORT_USER_STRING 0 -/*---------- -----------*/ -#define USBD_DEBUG_LEVEL 0 -/*---------- -----------*/ -#define USBD_LPM_ENABLED 1 -/*---------- -----------*/ -#define USBD_SELF_POWERED 1 - -/****************************************/ -/* #define for FS and HS identification */ -#define DEVICE_FS 0 - -/** - * @} - */ - -/** @defgroup USBD_CONF_Exported_Macros USBD_CONF_Exported_Macros - * @brief Aliases. - * @{ - */ - -/* Memory management macros */ - -/** Alias for memory allocation. */ -#define USBD_malloc (uint32_t *)USBD_static_malloc - -/** Alias for memory release. */ -#define USBD_free USBD_static_free - -/** Alias for memory set. */ -#define USBD_memset /* Not used */ - -/** Alias for memory copy. */ -#define USBD_memcpy /* Not used */ - -/** Alias for delay. */ -#define USBD_Delay HAL_Delay - -/* DEBUG macros */ - -#if (USBD_DEBUG_LEVEL > 0) -#define USBD_UsrLog(...) printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBD_UsrLog(...) -#endif - -#if (USBD_DEBUG_LEVEL > 1) - -#define USBD_ErrLog(...) printf("ERROR: ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBD_ErrLog(...) -#endif - -#if (USBD_DEBUG_LEVEL > 2) -#define USBD_DbgLog(...) printf("DEBUG : ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBD_DbgLog(...) -#endif - -/** - * @} - */ - -/** @defgroup USBD_CONF_Exported_Types USBD_CONF_Exported_Types - * @brief Types. - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_CONF_Exported_FunctionsPrototype USBD_CONF_Exported_FunctionsPrototype - * @brief Declaration of public functions for Usb device. - * @{ - */ - -/* Exported functions -------------------------------------------------------*/ -void *USBD_static_malloc(uint32_t size); -void USBD_static_free(void *p); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_CONF__H__ */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Inc/usbd_desc.h b/Samples/Nucleo-TPM/L4A6RG/Inc/usbd_desc.h deleted file mode 100644 index 98fd79dc..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Inc/usbd_desc.h +++ /dev/null @@ -1,156 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_desc.h - * @version : v2.0_Cube - * @brief : Header for usbd_desc.c file. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_DESC__H__ -#define __USBD_DESC__H__ - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" - -/* USER CODE BEGIN INCLUDE */ - -/* USER CODE END INCLUDE */ - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_DESC USBD_DESC - * @brief Usb device descriptors module. - * @{ - */ - -/** @defgroup USBD_DESC_Exported_Defines USBD_DESC_Exported_Defines - * @brief Defines. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_DEFINES */ - -/* USER CODE END EXPORTED_DEFINES */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Exported_TypesDefinitions USBD_DESC_Exported_TypesDefinitions - * @brief Types. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_TYPES */ - -/* USER CODE END EXPORTED_TYPES */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Exported_Macros USBD_DESC_Exported_Macros - * @brief Aliases. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_MACRO */ - -/* USER CODE END EXPORTED_MACRO */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Exported_Variables USBD_DESC_Exported_Variables - * @brief Public variables. - * @{ - */ - -/** Descriptor for the Usb device. */ -extern USBD_DescriptorsTypeDef FS_Desc; - -/* USER CODE BEGIN EXPORTED_VARIABLES */ - -/* USER CODE END EXPORTED_VARIABLES */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Exported_FunctionsPrototype USBD_DESC_Exported_FunctionsPrototype - * @brief Public functions declaration. - * @{ - */ - -/* USER CODE BEGIN EXPORTED_FUNCTIONS */ - -/* USER CODE END EXPORTED_FUNCTIONS */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_DESC__H__ */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h b/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h deleted file mode 100644 index 36badcdb..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h +++ /dev/null @@ -1,179 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_cdc.h - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief header file for the usbd_cdc.c file. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_CDC_H -#define __USB_CDC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_ioreq.h" - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup usbd_cdc - * @brief This file is the Header file for usbd_cdc.c - * @{ - */ - - -/** @defgroup usbd_cdc_Exported_Defines - * @{ - */ -#define CDC_IN_EP 0x81 /* EP1 for data IN */ -#define CDC_OUT_EP 0x01 /* EP1 for data OUT */ -#define CDC_CMD_EP 0x82 /* EP2 for CDC commands */ - -/* CDC Endpoints parameters: you can fine tune these values depending on the needed baudrates and performance. */ -#define CDC_DATA_HS_MAX_PACKET_SIZE 512 /* Endpoint IN & OUT Packet size */ -#define CDC_DATA_FS_MAX_PACKET_SIZE 64 /* Endpoint IN & OUT Packet size */ -#define CDC_CMD_PACKET_SIZE 8 /* Control Endpoint Packet size */ - -#define USB_CDC_CONFIG_DESC_SIZ 67 -#define CDC_DATA_HS_IN_PACKET_SIZE CDC_DATA_HS_MAX_PACKET_SIZE -#define CDC_DATA_HS_OUT_PACKET_SIZE CDC_DATA_HS_MAX_PACKET_SIZE - -#define CDC_DATA_FS_IN_PACKET_SIZE CDC_DATA_FS_MAX_PACKET_SIZE -#define CDC_DATA_FS_OUT_PACKET_SIZE CDC_DATA_FS_MAX_PACKET_SIZE - -/*---------------------------------------------------------------------*/ -/* CDC definitions */ -/*---------------------------------------------------------------------*/ -#define CDC_SEND_ENCAPSULATED_COMMAND 0x00 -#define CDC_GET_ENCAPSULATED_RESPONSE 0x01 -#define CDC_SET_COMM_FEATURE 0x02 -#define CDC_GET_COMM_FEATURE 0x03 -#define CDC_CLEAR_COMM_FEATURE 0x04 -#define CDC_SET_LINE_CODING 0x20 -#define CDC_GET_LINE_CODING 0x21 -#define CDC_SET_CONTROL_LINE_STATE 0x22 -#define CDC_SEND_BREAK 0x23 - -/** - * @} - */ - - -/** @defgroup USBD_CORE_Exported_TypesDefinitions - * @{ - */ - -/** - * @} - */ -typedef struct -{ - uint32_t bitrate; - uint8_t format; - uint8_t paritytype; - uint8_t datatype; -}USBD_CDC_LineCodingTypeDef; - -typedef struct _USBD_CDC_Itf -{ - int8_t (* Init) (void); - int8_t (* DeInit) (void); - int8_t (* Control) (uint8_t, uint8_t * , uint16_t); - int8_t (* Receive) (uint8_t *, uint32_t *); - -}USBD_CDC_ItfTypeDef; - - -typedef struct -{ - uint32_t data[CDC_DATA_HS_MAX_PACKET_SIZE/4]; /* Force 32bits alignment */ - uint8_t CmdOpCode; - uint8_t CmdLength; - uint8_t *RxBuffer; - uint8_t *TxBuffer; - uint32_t RxLength; - uint32_t TxLength; - - __IO uint32_t TxState; - __IO uint32_t RxState; -} -USBD_CDC_HandleTypeDef; - - - -/** @defgroup USBD_CORE_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_CORE_Exported_Variables - * @{ - */ - -extern USBD_ClassTypeDef USBD_CDC; -#define USBD_CDC_CLASS &USBD_CDC -/** - * @} - */ - -/** @defgroup USB_CORE_Exported_Functions - * @{ - */ -uint8_t USBD_CDC_RegisterInterface (USBD_HandleTypeDef *pdev, - USBD_CDC_ItfTypeDef *fops); - -uint8_t USBD_CDC_SetTxBuffer (USBD_HandleTypeDef *pdev, - uint8_t *pbuff, - uint16_t length); - -uint8_t USBD_CDC_SetRxBuffer (USBD_HandleTypeDef *pdev, - uint8_t *pbuff); - -uint8_t USBD_CDC_ReceivePacket (USBD_HandleTypeDef *pdev); - -uint8_t USBD_CDC_TransmitPacket (USBD_HandleTypeDef *pdev); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USB_CDC_H */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c b/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c deleted file mode 100644 index cb77a71a..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c +++ /dev/null @@ -1,925 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_cdc.c - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief This file provides the high layer firmware functions to manage the - * following functionalities of the USB CDC Class: - * - Initialization and Configuration of high and low layer - * - Enumeration as CDC Device (and enumeration for each implemented memory interface) - * - OUT/IN data transfer - * - Command IN transfer (class requests management) - * - Error management - * - * @verbatim - * - * =================================================================== - * CDC Class Driver Description - * =================================================================== - * This driver manages the "Universal Serial Bus Class Definitions for Communications Devices - * Revision 1.2 November 16, 2007" and the sub-protocol specification of "Universal Serial Bus - * Communications Class Subclass Specification for PSTN Devices Revision 1.2 February 9, 2007" - * This driver implements the following aspects of the specification: - * - Device descriptor management - * - Configuration descriptor management - * - Enumeration as CDC device with 2 data endpoints (IN and OUT) and 1 command endpoint (IN) - * - Requests management (as described in section 6.2 in specification) - * - Abstract Control Model compliant - * - Union Functional collection (using 1 IN endpoint for control) - * - Data interface class - * - * These aspects may be enriched or modified for a specific user application. - * - * This driver doesn't implement the following aspects of the specification - * (but it is possible to manage these features with some modifications on this driver): - * - Any class-specific aspect relative to communication classes should be managed by user application. - * - All communication classes other than PSTN are not managed - * - * @endverbatim - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_cdc.h" -#include "usbd_desc.h" -#include "usbd_ctlreq.h" - - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup USBD_CDC - * @brief usbd core module - * @{ - */ - -/** @defgroup USBD_CDC_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_CDC_Private_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_CDC_Private_Macros - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_CDC_Private_FunctionPrototypes - * @{ - */ - - -static uint8_t USBD_CDC_Init (USBD_HandleTypeDef *pdev, - uint8_t cfgidx); - -static uint8_t USBD_CDC_DeInit (USBD_HandleTypeDef *pdev, - uint8_t cfgidx); - -static uint8_t USBD_CDC_Setup (USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req); - -static uint8_t USBD_CDC_DataIn (USBD_HandleTypeDef *pdev, - uint8_t epnum); - -static uint8_t USBD_CDC_DataOut (USBD_HandleTypeDef *pdev, - uint8_t epnum); - -static uint8_t USBD_CDC_EP0_RxReady (USBD_HandleTypeDef *pdev); - -static uint8_t *USBD_CDC_GetFSCfgDesc (uint16_t *length); - -static uint8_t *USBD_CDC_GetHSCfgDesc (uint16_t *length); - -static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length); - -static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length); - -uint8_t *USBD_CDC_GetDeviceQualifierDescriptor (uint16_t *length); - -/* USB Standard Device Descriptor */ -__ALIGN_BEGIN static uint8_t USBD_CDC_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] __ALIGN_END = -{ - USB_LEN_DEV_QUALIFIER_DESC, - USB_DESC_TYPE_DEVICE_QUALIFIER, - 0x00, - 0x02, - 0x00, - 0x00, - 0x00, - 0x40, - 0x01, - 0x00, -}; - -/** - * @} - */ - -/** @defgroup USBD_CDC_Private_Variables - * @{ - */ - - -/* CDC interface class callbacks structure */ -USBD_ClassTypeDef USBD_CDC = -{ - USBD_CDC_Init, - USBD_CDC_DeInit, - USBD_CDC_Setup, - NULL, /* EP0_TxSent, */ - USBD_CDC_EP0_RxReady, - USBD_CDC_DataIn, - USBD_CDC_DataOut, - NULL, - NULL, - NULL, - USBD_CDC_GetHSCfgDesc, - USBD_CDC_GetFSCfgDesc, - USBD_CDC_GetOtherSpeedCfgDesc, - USBD_CDC_GetDeviceQualifierDescriptor, -}; - -/* USB CDC device Configuration Descriptor */ -__ALIGN_BEGIN uint8_t USBD_CDC_CfgHSDesc[USB_CDC_CONFIG_DESC_SIZ] __ALIGN_END = -{ - /*Configuration Descriptor*/ - 0x09, /* bLength: Configuration Descriptor size */ - USB_DESC_TYPE_CONFIGURATION, /* bDescriptorType: Configuration */ - USB_CDC_CONFIG_DESC_SIZ, /* wTotalLength:no of returned bytes */ - 0x00, - 0x02, /* bNumInterfaces: 2 interface */ - 0x01, /* bConfigurationValue: Configuration value */ - 0x00, /* iConfiguration: Index of string descriptor describing the configuration */ - 0xC0, /* bmAttributes: self powered */ - 0x32, /* MaxPower 0 mA */ - - /*---------------------------------------------------------------------------*/ - - /*Interface Descriptor */ - 0x09, /* bLength: Interface Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: Interface */ - /* Interface descriptor type */ - 0x00, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x01, /* bNumEndpoints: One endpoints used */ - 0x02, /* bInterfaceClass: Communication Interface Class */ - 0x02, /* bInterfaceSubClass: Abstract Control Model */ - 0x01, /* bInterfaceProtocol: Common AT commands */ - 0x00, /* iInterface: */ - - /*Header Functional Descriptor*/ - 0x05, /* bLength: Endpoint Descriptor size */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x00, /* bDescriptorSubtype: Header Func Desc */ - 0x10, /* bcdCDC: spec release number */ - 0x01, - - /*Call Management Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x01, /* bDescriptorSubtype: Call Management Func Desc */ - 0x00, /* bmCapabilities: D0+D1 */ - 0x01, /* bDataInterface: 1 */ - - /*ACM Functional Descriptor*/ - 0x04, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x02, /* bDescriptorSubtype: Abstract Control Management desc */ - 0x02, /* bmCapabilities */ - - /*Union Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x06, /* bDescriptorSubtype: Union func desc */ - 0x00, /* bMasterInterface: Communication class interface */ - 0x01, /* bSlaveInterface0: Data Class Interface */ - - /*Endpoint 2 Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_CMD_EP, /* bEndpointAddress */ - 0x03, /* bmAttributes: Interrupt */ - LOBYTE(CDC_CMD_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_CMD_PACKET_SIZE), - 0x10, /* bInterval: */ - /*---------------------------------------------------------------------------*/ - - /*Data class interface descriptor*/ - 0x09, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: */ - 0x01, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x02, /* bNumEndpoints: Two endpoints used */ - 0x0A, /* bInterfaceClass: CDC */ - 0x00, /* bInterfaceSubClass: */ - 0x00, /* bInterfaceProtocol: */ - 0x00, /* iInterface: */ - - /*Endpoint OUT Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_OUT_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - LOBYTE(CDC_DATA_HS_MAX_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_DATA_HS_MAX_PACKET_SIZE), - 0x00, /* bInterval: ignore for Bulk transfer */ - - /*Endpoint IN Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_IN_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - LOBYTE(CDC_DATA_HS_MAX_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_DATA_HS_MAX_PACKET_SIZE), - 0x00 /* bInterval: ignore for Bulk transfer */ -} ; - - -/* USB CDC device Configuration Descriptor */ -__ALIGN_BEGIN uint8_t USBD_CDC_CfgFSDesc[USB_CDC_CONFIG_DESC_SIZ] __ALIGN_END = -{ - /*Configuration Descriptor*/ - 0x09, /* bLength: Configuration Descriptor size */ - USB_DESC_TYPE_CONFIGURATION, /* bDescriptorType: Configuration */ - USB_CDC_CONFIG_DESC_SIZ, /* wTotalLength:no of returned bytes */ - 0x00, - 0x02, /* bNumInterfaces: 2 interface */ - 0x01, /* bConfigurationValue: Configuration value */ - 0x00, /* iConfiguration: Index of string descriptor describing the configuration */ - 0xC0, /* bmAttributes: self powered */ - 0x32, /* MaxPower 0 mA */ - - /*---------------------------------------------------------------------------*/ - - /*Interface Descriptor */ - 0x09, /* bLength: Interface Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: Interface */ - /* Interface descriptor type */ - 0x00, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x01, /* bNumEndpoints: One endpoints used */ - 0x02, /* bInterfaceClass: Communication Interface Class */ - 0x02, /* bInterfaceSubClass: Abstract Control Model */ - 0x01, /* bInterfaceProtocol: Common AT commands */ - 0x00, /* iInterface: */ - - /*Header Functional Descriptor*/ - 0x05, /* bLength: Endpoint Descriptor size */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x00, /* bDescriptorSubtype: Header Func Desc */ - 0x10, /* bcdCDC: spec release number */ - 0x01, - - /*Call Management Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x01, /* bDescriptorSubtype: Call Management Func Desc */ - 0x00, /* bmCapabilities: D0+D1 */ - 0x01, /* bDataInterface: 1 */ - - /*ACM Functional Descriptor*/ - 0x04, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x02, /* bDescriptorSubtype: Abstract Control Management desc */ - 0x02, /* bmCapabilities */ - - /*Union Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x06, /* bDescriptorSubtype: Union func desc */ - 0x00, /* bMasterInterface: Communication class interface */ - 0x01, /* bSlaveInterface0: Data Class Interface */ - - /*Endpoint 2 Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_CMD_EP, /* bEndpointAddress */ - 0x03, /* bmAttributes: Interrupt */ - LOBYTE(CDC_CMD_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_CMD_PACKET_SIZE), - 0x10, /* bInterval: */ - /*---------------------------------------------------------------------------*/ - - /*Data class interface descriptor*/ - 0x09, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: */ - 0x01, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x02, /* bNumEndpoints: Two endpoints used */ - 0x0A, /* bInterfaceClass: CDC */ - 0x00, /* bInterfaceSubClass: */ - 0x00, /* bInterfaceProtocol: */ - 0x00, /* iInterface: */ - - /*Endpoint OUT Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_OUT_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00, /* bInterval: ignore for Bulk transfer */ - - /*Endpoint IN Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_IN_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - LOBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_DATA_FS_MAX_PACKET_SIZE), - 0x00 /* bInterval: ignore for Bulk transfer */ -} ; - -__ALIGN_BEGIN uint8_t USBD_CDC_OtherSpeedCfgDesc[USB_CDC_CONFIG_DESC_SIZ] __ALIGN_END = -{ - 0x09, /* bLength: Configuation Descriptor size */ - USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION, - USB_CDC_CONFIG_DESC_SIZ, - 0x00, - 0x02, /* bNumInterfaces: 2 interfaces */ - 0x01, /* bConfigurationValue: */ - 0x04, /* iConfiguration: */ - 0xC0, /* bmAttributes: */ - 0x32, /* MaxPower 100 mA */ - - /*Interface Descriptor */ - 0x09, /* bLength: Interface Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: Interface */ - /* Interface descriptor type */ - 0x00, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x01, /* bNumEndpoints: One endpoints used */ - 0x02, /* bInterfaceClass: Communication Interface Class */ - 0x02, /* bInterfaceSubClass: Abstract Control Model */ - 0x01, /* bInterfaceProtocol: Common AT commands */ - 0x00, /* iInterface: */ - - /*Header Functional Descriptor*/ - 0x05, /* bLength: Endpoint Descriptor size */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x00, /* bDescriptorSubtype: Header Func Desc */ - 0x10, /* bcdCDC: spec release number */ - 0x01, - - /*Call Management Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x01, /* bDescriptorSubtype: Call Management Func Desc */ - 0x00, /* bmCapabilities: D0+D1 */ - 0x01, /* bDataInterface: 1 */ - - /*ACM Functional Descriptor*/ - 0x04, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x02, /* bDescriptorSubtype: Abstract Control Management desc */ - 0x02, /* bmCapabilities */ - - /*Union Functional Descriptor*/ - 0x05, /* bFunctionLength */ - 0x24, /* bDescriptorType: CS_INTERFACE */ - 0x06, /* bDescriptorSubtype: Union func desc */ - 0x00, /* bMasterInterface: Communication class interface */ - 0x01, /* bSlaveInterface0: Data Class Interface */ - - /*Endpoint 2 Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT , /* bDescriptorType: Endpoint */ - CDC_CMD_EP, /* bEndpointAddress */ - 0x03, /* bmAttributes: Interrupt */ - LOBYTE(CDC_CMD_PACKET_SIZE), /* wMaxPacketSize: */ - HIBYTE(CDC_CMD_PACKET_SIZE), - 0xFF, /* bInterval: */ - - /*---------------------------------------------------------------------------*/ - - /*Data class interface descriptor*/ - 0x09, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_INTERFACE, /* bDescriptorType: */ - 0x01, /* bInterfaceNumber: Number of Interface */ - 0x00, /* bAlternateSetting: Alternate setting */ - 0x02, /* bNumEndpoints: Two endpoints used */ - 0x0A, /* bInterfaceClass: CDC */ - 0x00, /* bInterfaceSubClass: */ - 0x00, /* bInterfaceProtocol: */ - 0x00, /* iInterface: */ - - /*Endpoint OUT Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_OUT_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - 0x40, /* wMaxPacketSize: */ - 0x00, - 0x00, /* bInterval: ignore for Bulk transfer */ - - /*Endpoint IN Descriptor*/ - 0x07, /* bLength: Endpoint Descriptor size */ - USB_DESC_TYPE_ENDPOINT, /* bDescriptorType: Endpoint */ - CDC_IN_EP, /* bEndpointAddress */ - 0x02, /* bmAttributes: Bulk */ - 0x40, /* wMaxPacketSize: */ - 0x00, - 0x00 /* bInterval */ -}; - -/** - * @} - */ - -/** @defgroup USBD_CDC_Private_Functions - * @{ - */ - -/** - * @brief USBD_CDC_Init - * Initialize the CDC interface - * @param pdev: device instance - * @param cfgidx: Configuration index - * @retval status - */ -static uint8_t USBD_CDC_Init (USBD_HandleTypeDef *pdev, - uint8_t cfgidx) -{ - uint8_t ret = 0; - USBD_CDC_HandleTypeDef *hcdc; - - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - /* Open EP IN */ - USBD_LL_OpenEP(pdev, - CDC_IN_EP, - USBD_EP_TYPE_BULK, - CDC_DATA_HS_IN_PACKET_SIZE); - - /* Open EP OUT */ - USBD_LL_OpenEP(pdev, - CDC_OUT_EP, - USBD_EP_TYPE_BULK, - CDC_DATA_HS_OUT_PACKET_SIZE); - - } - else - { - /* Open EP IN */ - USBD_LL_OpenEP(pdev, - CDC_IN_EP, - USBD_EP_TYPE_BULK, - CDC_DATA_FS_IN_PACKET_SIZE); - - /* Open EP OUT */ - USBD_LL_OpenEP(pdev, - CDC_OUT_EP, - USBD_EP_TYPE_BULK, - CDC_DATA_FS_OUT_PACKET_SIZE); - } - /* Open Command IN EP */ - USBD_LL_OpenEP(pdev, - CDC_CMD_EP, - USBD_EP_TYPE_INTR, - CDC_CMD_PACKET_SIZE); - - - pdev->pClassData = USBD_malloc(sizeof (USBD_CDC_HandleTypeDef)); - - if(pdev->pClassData == NULL) - { - ret = 1; - } - else - { - hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - /* Init physical Interface components */ - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init(); - - /* Init Xfer states */ - hcdc->TxState =0; - hcdc->RxState =0; - - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - /* Prepare Out endpoint to receive next packet */ - USBD_LL_PrepareReceive(pdev, - CDC_OUT_EP, - hcdc->RxBuffer, - CDC_DATA_HS_OUT_PACKET_SIZE); - } - else - { - /* Prepare Out endpoint to receive next packet */ - USBD_LL_PrepareReceive(pdev, - CDC_OUT_EP, - hcdc->RxBuffer, - CDC_DATA_FS_OUT_PACKET_SIZE); - } - - - } - return ret; -} - -/** - * @brief USBD_CDC_Init - * DeInitialize the CDC layer - * @param pdev: device instance - * @param cfgidx: Configuration index - * @retval status - */ -static uint8_t USBD_CDC_DeInit (USBD_HandleTypeDef *pdev, - uint8_t cfgidx) -{ - uint8_t ret = 0; - - /* Open EP IN */ - USBD_LL_CloseEP(pdev, - CDC_IN_EP); - - /* Open EP OUT */ - USBD_LL_CloseEP(pdev, - CDC_OUT_EP); - - /* Open Command IN EP */ - USBD_LL_CloseEP(pdev, - CDC_CMD_EP); - - - /* DeInit physical Interface components */ - if(pdev->pClassData != NULL) - { - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit(); - USBD_free(pdev->pClassData); - pdev->pClassData = NULL; - } - - return ret; -} - -/** - * @brief USBD_CDC_Setup - * Handle the CDC specific requests - * @param pdev: instance - * @param req: usb requests - * @retval status - */ -static uint8_t USBD_CDC_Setup (USBD_HandleTypeDef *pdev, - USBD_SetupReqTypedef *req) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - static uint8_t ifalt = 0; - - switch (req->bmRequest & USB_REQ_TYPE_MASK) - { - case USB_REQ_TYPE_CLASS : - if (req->wLength) - { - if (req->bmRequest & 0x80) - { - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, - (uint8_t *)hcdc->data, - req->wLength); - USBD_CtlSendData (pdev, - (uint8_t *)hcdc->data, - req->wLength); - } - else - { - hcdc->CmdOpCode = req->bRequest; - hcdc->CmdLength = req->wLength; - - USBD_CtlPrepareRx (pdev, - (uint8_t *)hcdc->data, - req->wLength); - } - - } - else - { - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, - (uint8_t*)req, - 0); - } - break; - - case USB_REQ_TYPE_STANDARD: - switch (req->bRequest) - { - case USB_REQ_GET_INTERFACE : - USBD_CtlSendData (pdev, - &ifalt, - 1); - break; - - case USB_REQ_SET_INTERFACE : - break; - } - - default: - break; - } - return USBD_OK; -} - -/** - * @brief USBD_CDC_DataIn - * Data sent on non-control IN endpoint - * @param pdev: device instance - * @param epnum: endpoint number - * @retval status - */ -static uint8_t USBD_CDC_DataIn (USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - if(pdev->pClassData != NULL) - { - - hcdc->TxState = 0; - - return USBD_OK; - } - else - { - return USBD_FAIL; - } -} - -/** - * @brief USBD_CDC_DataOut - * Data received on non-control Out endpoint - * @param pdev: device instance - * @param epnum: endpoint number - * @retval status - */ -static uint8_t USBD_CDC_DataOut (USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - /* Get the received data length */ - hcdc->RxLength = USBD_LL_GetRxDataSize (pdev, epnum); - - /* USB data will be immediately processed, this allow next USB traffic being - NAKed till the end of the application Xfer */ - if(pdev->pClassData != NULL) - { - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength); - - return USBD_OK; - } - else - { - return USBD_FAIL; - } -} - - - -/** - * @brief USBD_CDC_DataOut - * Data received on non-control Out endpoint - * @param pdev: device instance - * @param epnum: endpoint number - * @retval status - */ -static uint8_t USBD_CDC_EP0_RxReady (USBD_HandleTypeDef *pdev) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - if((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFF)) - { - ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, - (uint8_t *)hcdc->data, - hcdc->CmdLength); - hcdc->CmdOpCode = 0xFF; - - } - return USBD_OK; -} - -/** - * @brief USBD_CDC_GetFSCfgDesc - * Return configuration descriptor - * @param speed : current device speed - * @param length : pointer data length - * @retval pointer to descriptor buffer - */ -static uint8_t *USBD_CDC_GetFSCfgDesc (uint16_t *length) -{ - *length = sizeof (USBD_CDC_CfgFSDesc); - return USBD_CDC_CfgFSDesc; -} - -/** - * @brief USBD_CDC_GetHSCfgDesc - * Return configuration descriptor - * @param speed : current device speed - * @param length : pointer data length - * @retval pointer to descriptor buffer - */ -static uint8_t *USBD_CDC_GetHSCfgDesc (uint16_t *length) -{ - *length = sizeof (USBD_CDC_CfgHSDesc); - return USBD_CDC_CfgHSDesc; -} - -/** - * @brief USBD_CDC_GetCfgDesc - * Return configuration descriptor - * @param speed : current device speed - * @param length : pointer data length - * @retval pointer to descriptor buffer - */ -static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc (uint16_t *length) -{ - *length = sizeof (USBD_CDC_OtherSpeedCfgDesc); - return USBD_CDC_OtherSpeedCfgDesc; -} - -/** -* @brief DeviceQualifierDescriptor -* return Device Qualifier descriptor -* @param length : pointer data length -* @retval pointer to descriptor buffer -*/ -uint8_t *USBD_CDC_GetDeviceQualifierDescriptor (uint16_t *length) -{ - *length = sizeof (USBD_CDC_DeviceQualifierDesc); - return USBD_CDC_DeviceQualifierDesc; -} - -/** -* @brief USBD_CDC_RegisterInterface - * @param pdev: device instance - * @param fops: CD Interface callback - * @retval status - */ -uint8_t USBD_CDC_RegisterInterface (USBD_HandleTypeDef *pdev, - USBD_CDC_ItfTypeDef *fops) -{ - uint8_t ret = USBD_FAIL; - - if(fops != NULL) - { - pdev->pUserData= fops; - ret = USBD_OK; - } - - return ret; -} - -/** - * @brief USBD_CDC_SetTxBuffer - * @param pdev: device instance - * @param pbuff: Tx Buffer - * @retval status - */ -uint8_t USBD_CDC_SetTxBuffer (USBD_HandleTypeDef *pdev, - uint8_t *pbuff, - uint16_t length) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - hcdc->TxBuffer = pbuff; - hcdc->TxLength = length; - - return USBD_OK; -} - - -/** - * @brief USBD_CDC_SetRxBuffer - * @param pdev: device instance - * @param pbuff: Rx Buffer - * @retval status - */ -uint8_t USBD_CDC_SetRxBuffer (USBD_HandleTypeDef *pdev, - uint8_t *pbuff) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - hcdc->RxBuffer = pbuff; - - return USBD_OK; -} - -/** - * @brief USBD_CDC_DataOut - * Data received on non-control Out endpoint - * @param pdev: device instance - * @param epnum: endpoint number - * @retval status - */ -uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - if(pdev->pClassData != NULL) - { - if(hcdc->TxState == 0) - { - /* Tx Transfer in progress */ - hcdc->TxState = 1; - - /* Transmit next packet */ - USBD_LL_Transmit(pdev, - CDC_IN_EP, - hcdc->TxBuffer, - hcdc->TxLength); - - return USBD_OK; - } - else - { - return USBD_BUSY; - } - } - else - { - return USBD_FAIL; - } -} - - -/** - * @brief USBD_CDC_ReceivePacket - * prepare OUT Endpoint for reception - * @param pdev: device instance - * @retval status - */ -uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev) -{ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData; - - /* Suspend or Resume USB Out process */ - if(pdev->pClassData != NULL) - { - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - /* Prepare Out endpoint to receive next packet */ - USBD_LL_PrepareReceive(pdev, - CDC_OUT_EP, - hcdc->RxBuffer, - CDC_DATA_HS_OUT_PACKET_SIZE); - } - else - { - /* Prepare Out endpoint to receive next packet */ - USBD_LL_PrepareReceive(pdev, - CDC_OUT_EP, - hcdc->RxBuffer, - CDC_DATA_FS_OUT_PACKET_SIZE); - } - return USBD_OK; - } - else - { - return USBD_FAIL; - } -} -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h b/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h deleted file mode 100644 index fcfffa1e..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h +++ /dev/null @@ -1,167 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_core.h - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief Header file for usbd_core.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_CORE_H -#define __USBD_CORE_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_conf.h" -#include "usbd_def.h" -#include "usbd_ioreq.h" -#include "usbd_ctlreq.h" - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_CORE - * @brief This file is the Header file for usbd_core.c file - * @{ - */ - - -/** @defgroup USBD_CORE_Exported_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_CORE_Exported_TypesDefinitions - * @{ - */ - - -/** - * @} - */ - - - -/** @defgroup USBD_CORE_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_CORE_Exported_Variables - * @{ - */ -#define USBD_SOF USBD_LL_SOF -/** - * @} - */ - -/** @defgroup USBD_CORE_Exported_FunctionsPrototype - * @{ - */ -USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id); -USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass); - -USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); -USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx); - -USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup); -USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata); -USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata); - -USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed); -USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev); - -USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); -USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum); - -USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev); - -/* USBD Low Level Driver */ -USBD_StatusTypeDef USBD_LL_Init (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_DeInit (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_Stop (USBD_HandleTypeDef *pdev); -USBD_StatusTypeDef USBD_LL_OpenEP (USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_mps); - -USBD_StatusTypeDef USBD_LL_CloseEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_FlushEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_StallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_ClearStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -uint8_t USBD_LL_IsStallEP (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -USBD_StatusTypeDef USBD_LL_SetUSBAddress (USBD_HandleTypeDef *pdev, uint8_t dev_addr); -USBD_StatusTypeDef USBD_LL_Transmit (USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t *pbuf, - uint16_t size); - -USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, - uint8_t ep_addr, - uint8_t *pbuf, - uint16_t size); - -uint32_t USBD_LL_GetRxDataSize (USBD_HandleTypeDef *pdev, uint8_t ep_addr); -void USBD_LL_Delay (uint32_t Delay); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_CORE_H */ - -/** - * @} - */ - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - - - diff --git a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h b/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h deleted file mode 100644 index f4ddfb2d..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h +++ /dev/null @@ -1,113 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_req.h - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief Header file for the usbd_req.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USB_REQUEST_H -#define __USB_REQUEST_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" - - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_REQ - * @brief header file for the usbd_req.c file - * @{ - */ - -/** @defgroup USBD_REQ_Exported_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Exported_Types - * @{ - */ -/** - * @} - */ - - - -/** @defgroup USBD_REQ_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBD_REQ_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBD_REQ_Exported_FunctionsPrototype - * @{ - */ - -USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); -USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); -USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); - - -void USBD_CtlError (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); - -void USBD_ParseSetupRequest (USBD_SetupReqTypedef *req, uint8_t *pdata); - -void USBD_GetString (uint8_t *desc, uint8_t *unicode, uint16_t *len); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USB_REQUEST_H */ - -/** - * @} - */ - -/** -* @} -*/ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h b/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h deleted file mode 100644 index 34a42200..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h +++ /dev/null @@ -1,330 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_def.h - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief General defines for the usb device library - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_DEF_H -#define __USBD_DEF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_conf.h" - -/** @addtogroup STM32_USBD_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USB_DEF - * @brief general defines for the usb device library file - * @{ - */ - -/** @defgroup USB_DEF_Exported_Defines - * @{ - */ - -#ifndef NULL -#define NULL 0 -#endif - - -#define USB_LEN_DEV_QUALIFIER_DESC 0x0A -#define USB_LEN_DEV_DESC 0x12 -#define USB_LEN_CFG_DESC 0x09 -#define USB_LEN_IF_DESC 0x09 -#define USB_LEN_EP_DESC 0x07 -#define USB_LEN_OTG_DESC 0x03 -#define USB_LEN_LANGID_STR_DESC 0x04 -#define USB_LEN_OTHER_SPEED_DESC_SIZ 0x09 - -#define USBD_IDX_LANGID_STR 0x00 -#define USBD_IDX_MFC_STR 0x01 -#define USBD_IDX_PRODUCT_STR 0x02 -#define USBD_IDX_SERIAL_STR 0x03 -#define USBD_IDX_CONFIG_STR 0x04 -#define USBD_IDX_INTERFACE_STR 0x05 - -#define USB_REQ_TYPE_STANDARD 0x00 -#define USB_REQ_TYPE_CLASS 0x20 -#define USB_REQ_TYPE_VENDOR 0x40 -#define USB_REQ_TYPE_MASK 0x60 - -#define USB_REQ_RECIPIENT_DEVICE 0x00 -#define USB_REQ_RECIPIENT_INTERFACE 0x01 -#define USB_REQ_RECIPIENT_ENDPOINT 0x02 -#define USB_REQ_RECIPIENT_MASK 0x03 - -#define USB_REQ_GET_STATUS 0x00 -#define USB_REQ_CLEAR_FEATURE 0x01 -#define USB_REQ_SET_FEATURE 0x03 -#define USB_REQ_SET_ADDRESS 0x05 -#define USB_REQ_GET_DESCRIPTOR 0x06 -#define USB_REQ_SET_DESCRIPTOR 0x07 -#define USB_REQ_GET_CONFIGURATION 0x08 -#define USB_REQ_SET_CONFIGURATION 0x09 -#define USB_REQ_GET_INTERFACE 0x0A -#define USB_REQ_SET_INTERFACE 0x0B -#define USB_REQ_SYNCH_FRAME 0x0C - -#define USB_DESC_TYPE_DEVICE 1 -#define USB_DESC_TYPE_CONFIGURATION 2 -#define USB_DESC_TYPE_STRING 3 -#define USB_DESC_TYPE_INTERFACE 4 -#define USB_DESC_TYPE_ENDPOINT 5 -#define USB_DESC_TYPE_DEVICE_QUALIFIER 6 -#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7 -#define USB_DESC_TYPE_BOS 0x0F - -#define USB_CONFIG_REMOTE_WAKEUP 2 -#define USB_CONFIG_SELF_POWERED 1 - -#define USB_FEATURE_EP_HALT 0 -#define USB_FEATURE_REMOTE_WAKEUP 1 -#define USB_FEATURE_TEST_MODE 2 - -#define USB_DEVICE_CAPABITY_TYPE 0x10 - -#define USB_HS_MAX_PACKET_SIZE 512 -#define USB_FS_MAX_PACKET_SIZE 64 -#define USB_MAX_EP0_SIZE 64 - -/* Device Status */ -#define USBD_STATE_DEFAULT 1 -#define USBD_STATE_ADDRESSED 2 -#define USBD_STATE_CONFIGURED 3 -#define USBD_STATE_SUSPENDED 4 - - -/* EP0 State */ -#define USBD_EP0_IDLE 0 -#define USBD_EP0_SETUP 1 -#define USBD_EP0_DATA_IN 2 -#define USBD_EP0_DATA_OUT 3 -#define USBD_EP0_STATUS_IN 4 -#define USBD_EP0_STATUS_OUT 5 -#define USBD_EP0_STALL 6 - -#define USBD_EP_TYPE_CTRL 0 -#define USBD_EP_TYPE_ISOC 1 -#define USBD_EP_TYPE_BULK 2 -#define USBD_EP_TYPE_INTR 3 - - -/** - * @} - */ - - -/** @defgroup USBD_DEF_Exported_TypesDefinitions - * @{ - */ - -typedef struct usb_setup_req -{ - - uint8_t bmRequest; - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; -}USBD_SetupReqTypedef; - -struct _USBD_HandleTypeDef; - -typedef struct _Device_cb -{ - uint8_t (*Init) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx); - uint8_t (*DeInit) (struct _USBD_HandleTypeDef *pdev , uint8_t cfgidx); - /* Control Endpoints*/ - uint8_t (*Setup) (struct _USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req); - uint8_t (*EP0_TxSent) (struct _USBD_HandleTypeDef *pdev ); - uint8_t (*EP0_RxReady) (struct _USBD_HandleTypeDef *pdev ); - /* Class Specific Endpoints*/ - uint8_t (*DataIn) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*DataOut) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*SOF) (struct _USBD_HandleTypeDef *pdev); - uint8_t (*IsoINIncomplete) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - uint8_t (*IsoOUTIncomplete) (struct _USBD_HandleTypeDef *pdev , uint8_t epnum); - - uint8_t *(*GetHSConfigDescriptor)(uint16_t *length); - uint8_t *(*GetFSConfigDescriptor)(uint16_t *length); - uint8_t *(*GetOtherSpeedConfigDescriptor)(uint16_t *length); - uint8_t *(*GetDeviceQualifierDescriptor)(uint16_t *length); -#if (USBD_SUPPORT_USER_STRING == 1) - uint8_t *(*GetUsrStrDescriptor)(struct _USBD_HandleTypeDef *pdev ,uint8_t index, uint16_t *length); -#endif - -} USBD_ClassTypeDef; - -/* Following USB Device Speed */ -typedef enum -{ - USBD_SPEED_HIGH = 0, - USBD_SPEED_FULL = 1, - USBD_SPEED_LOW = 2, -}USBD_SpeedTypeDef; - -/* Following USB Device status */ -typedef enum { - USBD_OK = 0, - USBD_BUSY, - USBD_FAIL, -}USBD_StatusTypeDef; - -/* USB Device descriptors structure */ -typedef struct -{ - uint8_t *(*GetDeviceDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetLangIDStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetManufacturerStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetProductStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetSerialStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetConfigurationStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); - uint8_t *(*GetInterfaceStrDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); -#if (USBD_LPM_ENABLED == 1) - uint8_t *(*GetBOSDescriptor)( USBD_SpeedTypeDef speed , uint16_t *length); -#endif -} USBD_DescriptorsTypeDef; - -/* USB Device handle structure */ -typedef struct -{ - uint32_t status; - uint32_t total_length; - uint32_t rem_length; - uint32_t maxpacket; -} USBD_EndpointTypeDef; - -/* USB Device handle structure */ -typedef struct _USBD_HandleTypeDef -{ - uint8_t id; - uint32_t dev_config; - uint32_t dev_default_config; - uint32_t dev_config_status; - USBD_SpeedTypeDef dev_speed; - USBD_EndpointTypeDef ep_in[15]; - USBD_EndpointTypeDef ep_out[15]; - uint32_t ep0_state; - uint32_t ep0_data_len; - uint8_t dev_state; - uint8_t dev_old_state; - uint8_t dev_address; - uint8_t dev_connection_status; - uint8_t dev_test_mode; - uint32_t dev_remote_wakeup; - - USBD_SetupReqTypedef request; - USBD_DescriptorsTypeDef *pDesc; - USBD_ClassTypeDef *pClass; - void *pClassData; - void *pUserData; - void *pData; -} USBD_HandleTypeDef; - -/** - * @} - */ - - - -/** @defgroup USBD_DEF_Exported_Macros - * @{ - */ -#define SWAPBYTE(addr) (((uint16_t)(*((uint8_t *)(addr)))) + \ - (((uint16_t)(*(((uint8_t *)(addr)) + 1))) << 8)) - -#define LOBYTE(x) ((uint8_t)(x & 0x00FF)) -#define HIBYTE(x) ((uint8_t)((x & 0xFF00) >>8)) -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) - - -#if defined ( __GNUC__ ) - #ifndef __weak - #define __weak __attribute__((weak)) - #endif /* __weak */ - #ifndef __packed - #define __packed __attribute__((__packed__)) - #endif /* __packed */ -#endif /* __GNUC__ */ - - -/* In HS mode and when the DMA is used, all variables and data structures dealing - with the DMA during the transaction process should be 4-bytes aligned */ - -#if defined (__GNUC__) /* GNU Compiler */ - #define __ALIGN_END __attribute__ ((aligned (4))) - #define __ALIGN_BEGIN -#else - #define __ALIGN_END - #if defined (__CC_ARM) /* ARM Compiler */ - #define __ALIGN_BEGIN __align(4) - #elif defined (__ICCARM__) /* IAR Compiler */ - #define __ALIGN_BEGIN - #elif defined (__TASKING__) /* TASKING Compiler */ - #define __ALIGN_BEGIN __align(4) - #endif /* __CC_ARM */ -#endif /* __GNUC__ */ - - -/** - * @} - */ - -/** @defgroup USBD_DEF_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_DEF_Exported_FunctionsPrototype - * @{ - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_DEF_H */ - -/** - * @} - */ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h b/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h deleted file mode 100644 index bb5d85ca..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h +++ /dev/null @@ -1,128 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_ioreq.h - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief Header file for the usbd_ioreq.c file - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBD_IOREQ_H -#define __USBD_IOREQ_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_def.h" -#include "usbd_core.h" - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - -/** @defgroup USBD_IOREQ - * @brief header file for the usbd_ioreq.c file - * @{ - */ - -/** @defgroup USBD_IOREQ_Exported_Defines - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Exported_Types - * @{ - */ - - -/** - * @} - */ - - - -/** @defgroup USBD_IOREQ_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_IOREQ_Exported_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USBD_IOREQ_Exported_FunctionsPrototype - * @{ - */ - -USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, - uint8_t *buf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len); - -USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev); - -USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev); - -uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , - uint8_t epnum); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBD_IOREQ_H */ - -/** - * @} - */ - -/** -* @} -*/ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c b/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c deleted file mode 100644 index ff3ed446..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c +++ /dev/null @@ -1,565 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_core.c - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief This file provides all the USBD core functions. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_core.h" - -/** @addtogroup STM32_USBD_DEVICE_LIBRARY -* @{ -*/ - - -/** @defgroup USBD_CORE -* @brief usbd core module -* @{ -*/ - -/** @defgroup USBD_CORE_Private_TypesDefinitions -* @{ -*/ -/** -* @} -*/ - - -/** @defgroup USBD_CORE_Private_Defines -* @{ -*/ - -/** -* @} -*/ - - -/** @defgroup USBD_CORE_Private_Macros -* @{ -*/ -/** -* @} -*/ - - - - -/** @defgroup USBD_CORE_Private_FunctionPrototypes -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBD_CORE_Private_Variables -* @{ -*/ - -/** -* @} -*/ - -/** @defgroup USBD_CORE_Private_Functions -* @{ -*/ - -/** -* @brief USBD_Init -* Initializes the device stack and load the class driver -* @param pdev: device instance -* @param pdesc: Descriptor structure address -* @param id: Low level core index -* @retval None -*/ -USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) -{ - /* Check whether the USB Host handle is valid */ - if(pdev == NULL) - { - USBD_ErrLog("Invalid Device handle"); - return USBD_FAIL; - } - - /* Unlink previous class*/ - if(pdev->pClass != NULL) - { - pdev->pClass = NULL; - } - - /* Assign USBD Descriptors */ - if(pdesc != NULL) - { - pdev->pDesc = pdesc; - } - - /* Set Device initial State */ - pdev->dev_state = USBD_STATE_DEFAULT; - pdev->id = id; - /* Initialize low level driver */ - USBD_LL_Init(pdev); - - return USBD_OK; -} - -/** -* @brief USBD_DeInit -* Re-Initialize th device library -* @param pdev: device instance -* @retval status: status -*/ -USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev) -{ - /* Set Default State */ - pdev->dev_state = USBD_STATE_DEFAULT; - - /* Free Class Resources */ - pdev->pClass->DeInit(pdev, pdev->dev_config); - - /* Stop the low level driver */ - USBD_LL_Stop(pdev); - - /* Initialize low level driver */ - USBD_LL_DeInit(pdev); - - return USBD_OK; -} - - -/** - * @brief USBD_RegisterClass - * Link class driver to Device Core. - * @param pDevice : Device Handle - * @param pclass: Class handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass) -{ - USBD_StatusTypeDef status = USBD_OK; - if(pclass != 0) - { - /* link the class to the USB Device handle */ - pdev->pClass = pclass; - status = USBD_OK; - } - else - { - USBD_ErrLog("Invalid Class handle"); - status = USBD_FAIL; - } - - return status; -} - -/** - * @brief USBD_Start - * Start the USB Device Core. - * @param pdev: Device Handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev) -{ - - /* Start the low level driver */ - USBD_LL_Start(pdev); - - return USBD_OK; -} - -/** - * @brief USBD_Stop - * Stop the USB Device Core. - * @param pdev: Device Handle - * @retval USBD Status - */ -USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev) -{ - /* Free Class Resources */ - pdev->pClass->DeInit(pdev, pdev->dev_config); - - /* Stop the low level driver */ - USBD_LL_Stop(pdev); - - return USBD_OK; -} - -/** -* @brief USBD_RunTestMode -* Launch test mode process -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev) -{ - return USBD_OK; -} - - -/** -* @brief USBD_SetClassConfig -* Configure device and start the interface -* @param pdev: device instance -* @param cfgidx: configuration index -* @retval status -*/ - -USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) -{ - USBD_StatusTypeDef ret = USBD_FAIL; - - if(pdev->pClass != NULL) - { - /* Set configuration and Start the Class*/ - if(pdev->pClass->Init(pdev, cfgidx) == 0) - { - ret = USBD_OK; - } - } - return ret; -} - -/** -* @brief USBD_ClrClassConfig -* Clear current configuration -* @param pdev: device instance -* @param cfgidx: configuration index -* @retval status: USBD_StatusTypeDef -*/ -USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) -{ - /* Clear configuration and De-initialize the Class process*/ - pdev->pClass->DeInit(pdev, cfgidx); - return USBD_OK; -} - - -/** -* @brief USBD_SetupStage -* Handle the setup stage -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) -{ - - USBD_ParseSetupRequest(&pdev->request, psetup); - - pdev->ep0_state = USBD_EP0_SETUP; - pdev->ep0_data_len = pdev->request.wLength; - - switch (pdev->request.bmRequest & 0x1F) - { - case USB_REQ_RECIPIENT_DEVICE: - USBD_StdDevReq (pdev, &pdev->request); - break; - - case USB_REQ_RECIPIENT_INTERFACE: - USBD_StdItfReq(pdev, &pdev->request); - break; - - case USB_REQ_RECIPIENT_ENDPOINT: - USBD_StdEPReq(pdev, &pdev->request); - break; - - default: - USBD_LL_StallEP(pdev , pdev->request.bmRequest & 0x80); - break; - } - return USBD_OK; -} - -/** -* @brief USBD_DataOutStage -* Handle data OUT stage -* @param pdev: device instance -* @param epnum: endpoint index -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata) -{ - USBD_EndpointTypeDef *pep; - - if(epnum == 0) - { - pep = &pdev->ep_out[0]; - - if ( pdev->ep0_state == USBD_EP0_DATA_OUT) - { - if(pep->rem_length > pep->maxpacket) - { - pep->rem_length -= pep->maxpacket; - - USBD_CtlContinueRx (pdev, - pdata, - MIN(pep->rem_length ,pep->maxpacket)); - } - else - { - if((pdev->pClass->EP0_RxReady != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->EP0_RxReady(pdev); - } - USBD_CtlSendStatus(pdev); - } - } - } - else if((pdev->pClass->DataOut != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->DataOut(pdev, epnum); - } - return USBD_OK; -} - -/** -* @brief USBD_DataInStage -* Handle data in stage -* @param pdev: device instance -* @param epnum: endpoint index -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev ,uint8_t epnum, uint8_t *pdata) -{ - USBD_EndpointTypeDef *pep; - - if(epnum == 0) - { - pep = &pdev->ep_in[0]; - - if ( pdev->ep0_state == USBD_EP0_DATA_IN) - { - if(pep->rem_length > pep->maxpacket) - { - pep->rem_length -= pep->maxpacket; - - USBD_CtlContinueSendData (pdev, - pdata, - pep->rem_length); - - /* Prepare endpoint for premature end of transfer */ - USBD_LL_PrepareReceive (pdev, - 0, - NULL, - 0); - } - else - { /* last packet is MPS multiple, so send ZLP packet */ - if((pep->total_length % pep->maxpacket == 0) && - (pep->total_length >= pep->maxpacket) && - (pep->total_length < pdev->ep0_data_len )) - { - - USBD_CtlContinueSendData(pdev , NULL, 0); - pdev->ep0_data_len = 0; - - /* Prepare endpoint for premature end of transfer */ - USBD_LL_PrepareReceive (pdev, - 0, - NULL, - 0); - } - else - { - if((pdev->pClass->EP0_TxSent != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->EP0_TxSent(pdev); - } - USBD_CtlReceiveStatus(pdev); - } - } - } - if (pdev->dev_test_mode == 1) - { - USBD_RunTestMode(pdev); - pdev->dev_test_mode = 0; - } - } - else if((pdev->pClass->DataIn != NULL)&& - (pdev->dev_state == USBD_STATE_CONFIGURED)) - { - pdev->pClass->DataIn(pdev, epnum); - } - return USBD_OK; -} - -/** -* @brief USBD_LL_Reset -* Handle Reset event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) -{ - /* Open EP0 OUT */ - USBD_LL_OpenEP(pdev, - 0x00, - USBD_EP_TYPE_CTRL, - USB_MAX_EP0_SIZE); - - pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; - - /* Open EP0 IN */ - USBD_LL_OpenEP(pdev, - 0x80, - USBD_EP_TYPE_CTRL, - USB_MAX_EP0_SIZE); - - pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; - /* Upon Reset call user call back */ - pdev->dev_state = USBD_STATE_DEFAULT; - - if (pdev->pClassData) - pdev->pClass->DeInit(pdev, pdev->dev_config); - - - return USBD_OK; -} - - - - -/** -* @brief USBD_LL_Reset -* Handle Reset event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) -{ - pdev->dev_speed = speed; - return USBD_OK; -} - -/** -* @brief USBD_Suspend -* Handle Suspend event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) -{ - pdev->dev_old_state = pdev->dev_state; - pdev->dev_state = USBD_STATE_SUSPENDED; - return USBD_OK; -} - -/** -* @brief USBD_Resume -* Handle Resume event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) -{ - pdev->dev_state = pdev->dev_old_state; - return USBD_OK; -} - -/** -* @brief USBD_SOF -* Handle SOF event -* @param pdev: device instance -* @retval status -*/ - -USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) -{ - if(pdev->dev_state == USBD_STATE_CONFIGURED) - { - if(pdev->pClass->SOF != NULL) - { - pdev->pClass->SOF(pdev); - } - } - return USBD_OK; -} - -/** -* @brief USBD_IsoINIncomplete -* Handle iso in incomplete event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - return USBD_OK; -} - -/** -* @brief USBD_IsoOUTIncomplete -* Handle iso out incomplete event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) -{ - return USBD_OK; -} - -/** -* @brief USBD_DevConnected -* Handle device connection event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev) -{ - return USBD_OK; -} - -/** -* @brief USBD_DevDisconnected -* Handle device disconnection event -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev) -{ - /* Free Class Resources */ - pdev->dev_state = USBD_STATE_DEFAULT; - pdev->pClass->DeInit(pdev, pdev->dev_config); - - return USBD_OK; -} -/** -* @} -*/ - - -/** -* @} -*/ - - -/** -* @} -*/ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c b/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c deleted file mode 100644 index 22f815d0..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c +++ /dev/null @@ -1,782 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_req.c - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief This file provides the standard USB requests following chapter 9. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_ctlreq.h" -#include "usbd_ioreq.h" - - -/** @addtogroup STM32_USBD_STATE_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup USBD_REQ - * @brief USB standard requests module - * @{ - */ - -/** @defgroup USBD_REQ_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Variables - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_FunctionPrototypes - * @{ - */ -static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetAddress(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_GetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_GetStatus(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_SetFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static void USBD_ClrFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req); - -static uint8_t USBD_GetLen(uint8_t *buf); - -/** - * @} - */ - - -/** @defgroup USBD_REQ_Private_Functions - * @{ - */ - - -/** -* @brief USBD_StdDevReq -* Handle standard usb device requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - USBD_StatusTypeDef ret = USBD_OK; - - switch (req->bRequest) - { - case USB_REQ_GET_DESCRIPTOR: - - USBD_GetDescriptor (pdev, req) ; - break; - - case USB_REQ_SET_ADDRESS: - USBD_SetAddress(pdev, req); - break; - - case USB_REQ_SET_CONFIGURATION: - USBD_SetConfig (pdev , req); - break; - - case USB_REQ_GET_CONFIGURATION: - USBD_GetConfig (pdev , req); - break; - - case USB_REQ_GET_STATUS: - USBD_GetStatus (pdev , req); - break; - - - case USB_REQ_SET_FEATURE: - USBD_SetFeature (pdev , req); - break; - - case USB_REQ_CLEAR_FEATURE: - USBD_ClrFeature (pdev , req); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - - return ret; -} - -/** -* @brief USBD_StdItfReq -* Handle standard usb interface requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - USBD_StatusTypeDef ret = USBD_OK; - - switch (pdev->dev_state) - { - case USBD_STATE_CONFIGURED: - - if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) - { - pdev->pClass->Setup (pdev, req); - - if((req->wLength == 0)&& (ret == USBD_OK)) - { - USBD_CtlSendStatus(pdev); - } - } - else - { - USBD_CtlError(pdev , req); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - return USBD_OK; -} - -/** -* @brief USBD_StdEPReq -* Handle standard usb endpoint requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) -{ - - uint8_t ep_addr; - USBD_StatusTypeDef ret = USBD_OK; - USBD_EndpointTypeDef *pep; - ep_addr = LOBYTE(req->wIndex); - - /* Check if it is a class request */ - if ((req->bmRequest & 0x60) == 0x20) - { - pdev->pClass->Setup (pdev, req); - - return USBD_OK; - } - - switch (req->bRequest) - { - - case USB_REQ_SET_FEATURE : - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_EP_HALT) - { - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - - } - } - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - case USB_REQ_CLEAR_FEATURE : - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr != 0x00) && (ep_addr != 0x80)) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_EP_HALT) - { - if ((ep_addr & 0x7F) != 0x00) - { - USBD_LL_ClearStallEP(pdev , ep_addr); - pdev->pClass->Setup (pdev, req); - } - USBD_CtlSendStatus(pdev); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - case USB_REQ_GET_STATUS: - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if ((ep_addr & 0x7F) != 0x00) - { - USBD_LL_StallEP(pdev , ep_addr); - } - break; - - case USBD_STATE_CONFIGURED: - pep = ((ep_addr & 0x80) == 0x80) ? &pdev->ep_in[ep_addr & 0x7F]:\ - &pdev->ep_out[ep_addr & 0x7F]; - if(USBD_LL_IsStallEP(pdev, ep_addr)) - { - pep->status = 0x0001; - } - else - { - pep->status = 0x0000; - } - - USBD_CtlSendData (pdev, - (uint8_t *)&pep->status, - 2); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - break; - - default: - break; - } - return ret; -} -/** -* @brief USBD_GetDescriptor -* Handle Get Descriptor requests -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - uint16_t len; - uint8_t *pbuf; - - - switch (req->wValue >> 8) - { -#if (USBD_LPM_ENABLED == 1) - case USB_DESC_TYPE_BOS: - pbuf = pdev->pDesc->GetBOSDescriptor(pdev->dev_speed, &len); - break; -#endif - case USB_DESC_TYPE_DEVICE: - pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); - break; - - case USB_DESC_TYPE_CONFIGURATION: - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetHSConfigDescriptor(&len); - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - } - else - { - pbuf = (uint8_t *)pdev->pClass->GetFSConfigDescriptor(&len); - pbuf[1] = USB_DESC_TYPE_CONFIGURATION; - } - break; - - case USB_DESC_TYPE_STRING: - switch ((uint8_t)(req->wValue)) - { - case USBD_IDX_LANGID_STR: - pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); - break; - - case USBD_IDX_MFC_STR: - pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); - break; - - case USBD_IDX_PRODUCT_STR: - pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); - break; - - case USBD_IDX_SERIAL_STR: - pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); - break; - - case USBD_IDX_CONFIG_STR: - pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); - break; - - case USBD_IDX_INTERFACE_STR: - pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); - break; - - default: -#if (USBD_SUPPORT_USER_STRING == 1) - pbuf = pdev->pClass->GetUsrStrDescriptor(pdev, (req->wValue) , &len); - break; -#else - USBD_CtlError(pdev , req); - return; -#endif - } - break; - case USB_DESC_TYPE_DEVICE_QUALIFIER: - - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetDeviceQualifierDescriptor(&len); - break; - } - else - { - USBD_CtlError(pdev , req); - return; - } - - case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: - if(pdev->dev_speed == USBD_SPEED_HIGH ) - { - pbuf = (uint8_t *)pdev->pClass->GetOtherSpeedConfigDescriptor(&len); - pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; - break; - } - else - { - USBD_CtlError(pdev , req); - return; - } - - default: - USBD_CtlError(pdev , req); - return; - } - - if((len != 0)&& (req->wLength != 0)) - { - - len = MIN(len , req->wLength); - - USBD_CtlSendData (pdev, - pbuf, - len); - } - -} - -/** -* @brief USBD_SetAddress -* Set device address -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetAddress(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - uint8_t dev_addr; - - if ((req->wIndex == 0) && (req->wLength == 0)) - { - dev_addr = (uint8_t)(req->wValue) & 0x7F; - - if (pdev->dev_state == USBD_STATE_CONFIGURED) - { - USBD_CtlError(pdev , req); - } - else - { - pdev->dev_address = dev_addr; - USBD_LL_SetUSBAddress(pdev, dev_addr); - USBD_CtlSendStatus(pdev); - - if (dev_addr != 0) - { - pdev->dev_state = USBD_STATE_ADDRESSED; - } - else - { - pdev->dev_state = USBD_STATE_DEFAULT; - } - } - } - else - { - USBD_CtlError(pdev , req); - } -} - -/** -* @brief USBD_SetConfig -* Handle Set device configuration request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - static uint8_t cfgidx; - - cfgidx = (uint8_t)(req->wValue); - - if (cfgidx > USBD_MAX_NUM_CONFIGURATION ) - { - USBD_CtlError(pdev , req); - } - else - { - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - if (cfgidx) - { - pdev->dev_config = cfgidx; - pdev->dev_state = USBD_STATE_CONFIGURED; - if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) - { - USBD_CtlError(pdev , req); - return; - } - USBD_CtlSendStatus(pdev); - } - else - { - USBD_CtlSendStatus(pdev); - } - break; - - case USBD_STATE_CONFIGURED: - if (cfgidx == 0) - { - pdev->dev_state = USBD_STATE_ADDRESSED; - pdev->dev_config = cfgidx; - USBD_ClrClassConfig(pdev , cfgidx); - USBD_CtlSendStatus(pdev); - - } - else if (cfgidx != pdev->dev_config) - { - /* Clear old configuration */ - USBD_ClrClassConfig(pdev , pdev->dev_config); - - /* set new configuration */ - pdev->dev_config = cfgidx; - if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) - { - USBD_CtlError(pdev , req); - return; - } - USBD_CtlSendStatus(pdev); - } - else - { - USBD_CtlSendStatus(pdev); - } - break; - - default: - USBD_CtlError(pdev , req); - break; - } - } -} - -/** -* @brief USBD_GetConfig -* Handle Get device configuration request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetConfig(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - if (req->wLength != 1) - { - USBD_CtlError(pdev , req); - } - else - { - switch (pdev->dev_state ) - { - case USBD_STATE_ADDRESSED: - pdev->dev_default_config = 0; - USBD_CtlSendData (pdev, - (uint8_t *)&pdev->dev_default_config, - 1); - break; - - case USBD_STATE_CONFIGURED: - - USBD_CtlSendData (pdev, - (uint8_t *)&pdev->dev_config, - 1); - break; - - default: - USBD_CtlError(pdev , req); - break; - } - } -} - -/** -* @brief USBD_GetStatus -* Handle Get Status request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_GetStatus(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - -#if ( USBD_SELF_POWERED == 1) - pdev->dev_config_status = USB_CONFIG_SELF_POWERED; -#else - pdev->dev_config_status = 0; -#endif - - if (pdev->dev_remote_wakeup) - { - pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; - } - - USBD_CtlSendData (pdev, - (uint8_t *)& pdev->dev_config_status, - 2); - break; - - default : - USBD_CtlError(pdev , req); - break; - } -} - - -/** -* @brief USBD_SetFeature -* Handle Set device feature request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_SetFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - - if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) - { - pdev->dev_remote_wakeup = 1; - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - } - -} - - -/** -* @brief USBD_ClrFeature -* Handle clear device feature request -* @param pdev: device instance -* @param req: usb request -* @retval status -*/ -static void USBD_ClrFeature(USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - switch (pdev->dev_state) - { - case USBD_STATE_ADDRESSED: - case USBD_STATE_CONFIGURED: - if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) - { - pdev->dev_remote_wakeup = 0; - pdev->pClass->Setup (pdev, req); - USBD_CtlSendStatus(pdev); - } - break; - - default : - USBD_CtlError(pdev , req); - break; - } -} - -/** -* @brief USBD_ParseSetupRequest -* Copy buffer into setup structure -* @param pdev: device instance -* @param req: usb request -* @retval None -*/ - -void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) -{ - req->bmRequest = *(uint8_t *) (pdata); - req->bRequest = *(uint8_t *) (pdata + 1); - req->wValue = SWAPBYTE (pdata + 2); - req->wIndex = SWAPBYTE (pdata + 4); - req->wLength = SWAPBYTE (pdata + 6); - -} - -/** -* @brief USBD_CtlError -* Handle USB low level Error -* @param pdev: device instance -* @param req: usb request -* @retval None -*/ - -void USBD_CtlError( USBD_HandleTypeDef *pdev , - USBD_SetupReqTypedef *req) -{ - USBD_LL_StallEP(pdev , 0x80); - USBD_LL_StallEP(pdev , 0); -} - - -/** - * @brief USBD_GetString - * Convert Ascii string into unicode one - * @param desc : descriptor buffer - * @param unicode : Formatted string buffer (unicode) - * @param len : descriptor length - * @retval None - */ -void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) -{ - uint8_t idx = 0; - - if (desc != NULL) - { - *len = USBD_GetLen(desc) * 2 + 2; - unicode[idx++] = *len; - unicode[idx++] = USB_DESC_TYPE_STRING; - - while (*desc != '\0') - { - unicode[idx++] = *desc++; - unicode[idx++] = 0x00; - } - } -} - -/** - * @brief USBD_GetLen - * return the string length - * @param buf : pointer to the ascii string buffer - * @retval string length - */ -static uint8_t USBD_GetLen(uint8_t *buf) -{ - uint8_t len = 0; - - while (*buf != '\0') - { - len++; - buf++; - } - - return len; -} -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c b/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c deleted file mode 100644 index e1b9c75c..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c +++ /dev/null @@ -1,236 +0,0 @@ -/** - ****************************************************************************** - * @file usbd_ioreq.c - * @author MCD Application Team - * @version V2.4.2 - * @date 11-December-2015 - * @brief This file provides the IO requests APIs for control endpoints. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_ioreq.h" - -/** @addtogroup STM32_USB_DEVICE_LIBRARY - * @{ - */ - - -/** @defgroup USBD_IOREQ - * @brief control I/O requests module - * @{ - */ - -/** @defgroup USBD_IOREQ_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Defines - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Macros - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_FunctionPrototypes - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBD_IOREQ_Private_Functions - * @{ - */ - -/** -* @brief USBD_CtlSendData -* send data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be sent -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_DATA_IN; - pdev->ep_in[0].total_length = len; - pdev->ep_in[0].rem_length = len; - /* Start the transfer */ - USBD_LL_Transmit (pdev, 0x00, pbuf, len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlContinueSendData -* continue sending data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be sent -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Start the next transfer */ - USBD_LL_Transmit (pdev, 0x00, pbuf, len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlPrepareRx -* receive data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be received -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_DATA_OUT; - pdev->ep_out[0].total_length = len; - pdev->ep_out[0].rem_length = len; - /* Start the transfer */ - USBD_LL_PrepareReceive (pdev, - 0, - pbuf, - len); - - return USBD_OK; -} - -/** -* @brief USBD_CtlContinueRx -* continue receive data on the ctl pipe -* @param pdev: device instance -* @param buff: pointer to data buffer -* @param len: length of data to be received -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, - uint8_t *pbuf, - uint16_t len) -{ - - USBD_LL_PrepareReceive (pdev, - 0, - pbuf, - len); - return USBD_OK; -} -/** -* @brief USBD_CtlSendStatus -* send zero lzngth packet on the ctl pipe -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev) -{ - - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_STATUS_IN; - - /* Start the transfer */ - USBD_LL_Transmit (pdev, 0x00, NULL, 0); - - return USBD_OK; -} - -/** -* @brief USBD_CtlReceiveStatus -* receive zero lzngth packet on the ctl pipe -* @param pdev: device instance -* @retval status -*/ -USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev) -{ - /* Set EP0 State */ - pdev->ep0_state = USBD_EP0_STATUS_OUT; - - /* Start the transfer */ - USBD_LL_PrepareReceive ( pdev, - 0, - NULL, - 0); - - return USBD_OK; -} - - -/** -* @brief USBD_GetRxCount -* returns the received data length -* @param pdev: device instance -* @param ep_addr: endpoint address -* @retval Rx Data blength -*/ -uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , uint8_t ep_addr) -{ - return USBD_LL_GetRxDataSize(pdev, ep_addr); -} - -/** - * @} - */ - - -/** - * @} - */ - - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.elf.launch b/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.elf.launch deleted file mode 100644 index 8f4f1aef..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.elf.launch +++ /dev/null @@ -1,67 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.ioc b/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.ioc deleted file mode 100644 index 482a7ac9..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.ioc +++ /dev/null @@ -1,192 +0,0 @@ -#MicroXplorer Configuration settings - do not modify -File.Version=6 -KeepUserPlacement=false -Mcu.Family=STM32L4 -Mcu.IP0=NVIC -Mcu.IP1=RCC -Mcu.IP2=RNG -Mcu.IP3=RTC -Mcu.IP4=SYS -Mcu.IP5=USART2 -Mcu.IP6=USB_DEVICE -Mcu.IP7=USB_OTG_FS -Mcu.IPNb=8 -Mcu.Name=STM32L4A6RGTx -Mcu.Package=LQFP64 -Mcu.Pin0=PC13 -Mcu.Pin1=PC14-OSC32_IN (PC14) -Mcu.Pin10=PB3 (JTDO/TRACESWO) -Mcu.Pin11=VP_RNG_VS_RNG -Mcu.Pin12=VP_RTC_VS_RTC_Activate -Mcu.Pin13=VP_RTC_VS_RTC_Calendar -Mcu.Pin14=VP_SYS_VS_Systick -Mcu.Pin15=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS -Mcu.Pin2=PC15-OSC32_OUT (PC15) -Mcu.Pin3=PA2 -Mcu.Pin4=PA3 -Mcu.Pin5=PA5 -Mcu.Pin6=PA11 -Mcu.Pin7=PA12 -Mcu.Pin8=PA13 (JTMS/SWDIO) -Mcu.Pin9=PA14 (JTCK/SWCLK) -Mcu.PinsNb=16 -Mcu.ThirdPartyNb=0 -Mcu.UserConstants= -Mcu.UserName=STM32L4A6RGTx -MxCube.Version=4.25.0 -MxDb.Version=DB.4.0.250 -NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 -NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false -NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false -PA11.Mode=Device_Only -PA11.Signal=USB_OTG_FS_DM -PA12.Mode=Device_Only -PA12.Signal=USB_OTG_FS_DP -PA13\ (JTMS/SWDIO).Mode=Trace_Asynchronous_SW -PA13\ (JTMS/SWDIO).Signal=SYS_JTMS-SWDIO -PA14\ (JTCK/SWCLK).Mode=Trace_Asynchronous_SW -PA14\ (JTCK/SWCLK).Signal=SYS_JTCK-SWCLK -PA2.Mode=Asynchronous -PA2.Signal=USART2_TX -PA3.Mode=Asynchronous -PA3.Signal=USART2_RX -PA5.GPIOParameters=GPIO_Label -PA5.GPIO_Label=LD2 [green Led] -PA5.Locked=true -PA5.Signal=GPIO_Output -PB3\ (JTDO/TRACESWO).Mode=Trace_Asynchronous_SW -PB3\ (JTDO/TRACESWO).Signal=SYS_JTDO-SWO -PC13.GPIOParameters=GPIO_Label -PC13.GPIO_Label=B1 [Blue PushButton] -PC13.Locked=true -PC13.Signal=GPXTI13 -PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator -PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN -PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator -PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT -PCC.Checker=true -PCC.Line=STM32L4x6 -PCC.MCU=STM32L4A6RGTx -PCC.PartNumber=STM32L4A6RGTx -PCC.Seq0=0 -PCC.Series=STM32L4 -PCC.Temperature=25 -PCC.Vdd=null -PinOutPanel.RotationAngle=0 -ProjectManager.AskForMigrate=true -ProjectManager.BackupPrevious=false -ProjectManager.CompilerOptimize=3 -ProjectManager.ComputerToolchain=false -ProjectManager.CoupleFile=false -ProjectManager.CustomerFirmwarePackage=C\:/Users/Stefanth/STM32Cube/Repository/STM32Cube_FW_L4_V1.11.0 -ProjectManager.DefaultFWLocation=true -ProjectManager.DeletePrevious=true -ProjectManager.DeviceId=STM32L4A6RGTx -ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.11.0 -ProjectManager.FreePins=false -ProjectManager.HalAssertFull=false -ProjectManager.HeapSize=0x200 -ProjectManager.KeepUserCode=true -ProjectManager.LastFirmware=true -ProjectManager.LibraryCopy=1 -ProjectManager.MainLocation=Src -ProjectManager.PreviousToolchain=TrueSTUDIO -ProjectManager.ProjectBuild=false -ProjectManager.ProjectFileName=Nucleo-L4A6RG.ioc -ProjectManager.ProjectName=Nucleo-L4A6RG -ProjectManager.StackSize=0x10000 -ProjectManager.TargetToolchain=TrueSTUDIO -ProjectManager.ToolChainLocation= -ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL-true,6-MX_RNG_Init-RNG-false-HAL-true -RCC.ADCFreq_Value=64000000 -RCC.AHBFreq_Value=80000000 -RCC.APB1Freq_Value=80000000 -RCC.APB1TimFreq_Value=80000000 -RCC.APB2Freq_Value=80000000 -RCC.APB2TimFreq_Value=80000000 -RCC.CK48CLockSelection=RCC_USBCLKSOURCE_HSI48 -RCC.CortexFreq_Value=80000000 -RCC.DFSDMFreq_Value=80000000 -RCC.FCLKCortexFreq_Value=80000000 -RCC.FamilyName=M -RCC.HCLKFreq_Value=80000000 -RCC.HSE_VALUE=8000000 -RCC.HSI48_VALUE=48000000 -RCC.HSI_VALUE=16000000 -RCC.I2C1Freq_Value=80000000 -RCC.I2C2Freq_Value=80000000 -RCC.I2C3Freq_Value=80000000 -RCC.I2C4Freq_Value=80000000 -RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CK48CLockSelection,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value -RCC.LCDFreq_Value=32768 -RCC.LPTIM1Freq_Value=80000000 -RCC.LPTIM2Freq_Value=80000000 -RCC.LPUART1Freq_Value=80000000 -RCC.LSCOPinFreq_Value=32000 -RCC.LSI_VALUE=32000 -RCC.MCO1PinFreq_Value=80000000 -RCC.MSI_VALUE=4000000 -RCC.PLLN=10 -RCC.PLLPoutputFreq_Value=80000000 -RCC.PLLQoutputFreq_Value=80000000 -RCC.PLLRCLKFreq_Value=80000000 -RCC.PLLSAI1PoutputFreq_Value=64000000 -RCC.PLLSAI1QoutputFreq_Value=64000000 -RCC.PLLSAI1RoutputFreq_Value=64000000 -RCC.PLLSAI2PoutputFreq_Value=64000000 -RCC.PLLSAI2RoutputFreq_Value=64000000 -RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSI -RCC.PWRFreq_Value=80000000 -RCC.RNGFreq_Value=48000000 -RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE -RCC.RTCFreq_Value=32768 -RCC.SAI1Freq_Value=64000000 -RCC.SAI2Freq_Value=64000000 -RCC.SDMMCFreq_Value=48000000 -RCC.SWPMI1Freq_Value=80000000 -RCC.SYSCLKFreq_VALUE=80000000 -RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK -RCC.UART4Freq_Value=80000000 -RCC.UART5Freq_Value=80000000 -RCC.USART1Freq_Value=80000000 -RCC.USART2Freq_Value=80000000 -RCC.USART3Freq_Value=80000000 -RCC.USBFreq_Value=48000000 -RCC.VCOInputFreq_Value=16000000 -RCC.VCOOutputFreq_Value=160000000 -RCC.VCOSAI1OutputFreq_Value=128000000 -RCC.VCOSAI2OutputFreq_Value=128000000 -RTC.Format=RTC_FORMAT_BIN -RTC.IPParameters=Format -SH.GPXTI13.0=GPIO_EXTI13 -SH.GPXTI13.ConfNb=1 -USART2.IPParameters=VirtualMode-Asynchronous,Mode,WordLength -USART2.Mode=MODE_TX -USART2.VirtualMode-Asynchronous=VM_ASYNC -USART2.WordLength=WORDLENGTH_8B -USB_DEVICE.CLASS_NAME_FS=CDC -USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS -USB_DEVICE.VirtualMode=Cdc -USB_DEVICE.VirtualModeFS=Cdc_FS -USB_OTG_FS.IPParameters=VirtualMode -USB_OTG_FS.VirtualMode=Device_Only -VP_RNG_VS_RNG.Mode=RNG_Activate -VP_RNG_VS_RNG.Signal=RNG_VS_RNG -VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled -VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate -VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar -VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar -VP_SYS_VS_Systick.Mode=SysTick -VP_SYS_VS_Systick.Signal=SYS_VS_Systick -VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS -VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_FS -board=Nucleo-L4A6RG diff --git a/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.pdf b/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.pdf deleted file mode 100644 index b4e6fcae..00000000 Binary files a/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.pdf and /dev/null differ diff --git a/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.txt b/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.txt deleted file mode 100644 index d9aa0b64..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Nucleo-L4A6RG.txt +++ /dev/null @@ -1,63 +0,0 @@ -Configuration Nucleo-L4A6RG -STM32CubeMX 4.25.0 -Date 03/19/2018 -MCU STM32L4A6RGTx - - - -PERIPHERALS MODES FUNCTIONS PINS -RCC Crystal/Ceramic Resonator RCC_OSC32_IN PC14-OSC32_IN (PC14) -RCC Crystal/Ceramic Resonator RCC_OSC32_OUT PC15-OSC32_OUT (PC15) -RTC Activate RTC Clock Source RTC_VS_RTC_Activate VP_RTC_VS_RTC_Activate -RTC RTC Enabled RTC_VS_RTC_Calendar VP_RTC_VS_RTC_Calendar -SYS Trace Asynchronous Sw SYS_JTMS-SWDIO PA13 (JTMS/SWDIO) -SYS Trace Asynchronous Sw SYS_JTCK-SWCLK PA14 (JTCK/SWCLK) -SYS Trace Asynchronous Sw SYS_JTDO-SWO PB3 (JTDO/TRACESWO) -SYS SysTick SYS_VS_Systick VP_SYS_VS_Systick -USART2 Asynchronous USART2_RX PA3 -USART2 Asynchronous USART2_TX PA2 -USB_OTG_FS Device_Only USB_OTG_FS_DM PA11 -USB_OTG_FS Device_Only USB_OTG_FS_DP PA12 - - - -Pin Nb PINs FUNCTIONs LABELs -2 PC13 GPIO_EXTI13 B1 [Blue PushButton] -3 PC14-OSC32_IN (PC14) RCC_OSC32_IN -4 PC15-OSC32_OUT (PC15) RCC_OSC32_OUT -16 PA2 USART2_TX -17 PA3 USART2_RX -21 PA5 GPIO_Output LD2 [green Led] -44 PA11 USB_OTG_FS_DM -45 PA12 USB_OTG_FS_DP -46 PA13 (JTMS/SWDIO) SYS_JTMS-SWDIO -49 PA14 (JTCK/SWCLK) SYS_JTCK-SWCLK -55 PB3 (JTDO/TRACESWO) SYS_JTDO-SWO - - - -SOFTWARE PROJECT - -Project Settings : -Project Name : Nucleo-L4A6RG -Project Folder : D:\VS\brianTPM\Samples\Nucleo-TPM\L4A6RG -Toolchain / IDE : TrueSTUDIO -Firmware Package Name and Version : STM32Cube FW_L4 V1.11.0 - - -Code Generation Settings : -STM32Cube Firmware Library Package : Copy only the necessary library files -Generate peripheral initialization as a pair of '.c/.h' files per peripheral : No -Backup previously generated files when re-generating : No -Delete previously generated files when not re-generated : Yes -Set all free pins as analog (to optimize the power consumption) : No - - -Toolchains Settings : -Compiler Optimizations : Balanced Size/Speed - - - - - - diff --git a/Samples/Nucleo-TPM/L4A6RG/STM32L4A6RG_FLASH.ld b/Samples/Nucleo-TPM/L4A6RG/STM32L4A6RG_FLASH.ld deleted file mode 100644 index da4d34ac..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/STM32L4A6RG_FLASH.ld +++ /dev/null @@ -1,186 +0,0 @@ -/* -***************************************************************************** -** - -** File : stm32_flash.ld -** -** Abstract : Linker script for STM32L4A6RG Device with -** 1024KByte FLASH, 320KByte RAM -** -** Set heap size, stack size and stack location according -** to application requirements. -** -** Set memory bank area and size if external memory is used. -** -** Target : STMicroelectronics STM32 -** -** Environment : Atollic TrueSTUDIO(R) -** -** Distribution: The file is distributed as is, without any warranty -** of any kind. -** -** (c)Copyright Atollic AB. -** You may use this file as-is or modify it according to the needs of your -** project. This file may only be built (assembled or compiled and linked) -** using the Atollic TrueSTUDIO(R) product. The use of this file together -** with other tools than Atollic TrueSTUDIO(R) is not permitted. -** -***************************************************************************** -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = 0x20050000; /* end of RAM */ -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0x200; /* required amount of heap */ -_Min_Stack_Size = 0x10000; /* required amount of stack */ - -/* Specify the memory areas */ -MEMORY -{ -RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 320K -FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1006K -INTEGRITY (rx) : ORIGIN = 0x80FB800, LENGTH = 2K -NVFILE (rx) : ORIGIN = 0x80FC000, LENGTH = 16K -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - /* Constant data goes into FLASH */ - .rodata : - { - . = ALIGN(4); - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - . = ALIGN(4); - } >FLASH - - .integrity (NOLOAD): - { - . = ALIGN(4); - *(.integrity) /* .integrity internal integrity protection of NVFile */ - *(.integrity*) /* .integrity* internal integrity protection of NVFile */ - . = ALIGN(4); - } >INTEGRITY - - .nvfile (NOLOAD): - { - . = ALIGN(4); - *(.nvfile) /* .nvfile persisted NV storage for the TPM */ - *(.nvfile*) /* .nvfile* persisted NV storage for the TPM */ - . = ALIGN(4); - } >NVFILE - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT(.fini_array.*))) - KEEP (*(.fini_array*)) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM AT> FLASH - - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(4); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(4); - } >RAM - - - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - - diff --git a/Samples/Nucleo-TPM/L4A6RG/Src/main.c b/Samples/Nucleo-TPM/L4A6RG/Src/main.c deleted file mode 100644 index 980807a4..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Src/main.c +++ /dev/null @@ -1,401 +0,0 @@ - -/** - ****************************************************************************** - * @file : main.c - * @brief : Main program body - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ -#include "main.h" -#include "stm32l4xx_hal.h" -#include "usb_device.h" - -/* USER CODE BEGIN Includes */ -#include -#include -#include -#include "TpmDevice.h" -#include "StmUtil.h" - -/* USER CODE END Includes */ - -/* Private variables ---------------------------------------------------------*/ -RNG_HandleTypeDef hrng; - -RTC_HandleTypeDef hrtc; - -UART_HandleTypeDef huart2; - -/* USER CODE BEGIN PV */ -/* Private variables ---------------------------------------------------------*/ - -/* USER CODE END PV */ - -/* Private function prototypes -----------------------------------------------*/ -void SystemClock_Config(void); -static void MX_GPIO_Init(void); -static void MX_USART2_UART_Init(void); -static void MX_RTC_Init(void); -static void MX_RNG_Init(void); - -/* USER CODE BEGIN PFP */ -/* Private function prototypes -----------------------------------------------*/ - -/* USER CODE END PFP */ - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/** - * @brief The application entry point. - * - * @retval None - */ -int main(void) -{ - /* USER CODE BEGIN 1 */ - - /* USER CODE END 1 */ - - /* MCU Configuration----------------------------------------------------------*/ - - /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - HAL_Init(); - - /* USER CODE BEGIN Init */ - - /* USER CODE END Init */ - - /* Configure the system clock */ - SystemClock_Config(); - - /* USER CODE BEGIN SysInit */ - - /* USER CODE END SysInit */ - - /* Initialize all configured peripherals */ - MX_GPIO_Init(); - MX_USART2_UART_Init(); - MX_RTC_Init(); - MX_USB_DEVICE_Init(); - MX_RNG_Init(); - /* USER CODE BEGIN 2 */ - InitializeITM(); - fprintf(stderr, "\r\n\r\n=========================\r\n" - "= Nucleo-L476RG TPM 2.0 =\r\n" - "=========================\r\n"); - printf("Nucleo-L476RG TPM 2.0\r\n"); - - if(!TpmInitializeDevice()) - { - _Error_Handler(__FILE__, __LINE__); - } - - /* USER CODE END 2 */ - - /* Infinite loop */ - /* USER CODE BEGIN WHILE */ - while (1) - { - - /* USER CODE END WHILE */ - - /* USER CODE BEGIN 3 */ - if(!TpmOperationsLoop()) - { - _Error_Handler(__FILE__, __LINE__); - } - - } - /* USER CODE END 3 */ - -} - -/** - * @brief System Clock Configuration - * @retval None - */ -void SystemClock_Config(void) -{ - - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_ClkInitTypeDef RCC_ClkInitStruct; - RCC_PeriphCLKInitTypeDef PeriphClkInit; - - /**Configure LSE Drive Capability - */ - HAL_PWR_EnableBkUpAccess(); - - __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - - /**Initializes the CPU, AHB and APB busses clocks - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI - |RCC_OSCILLATORTYPE_LSE; - RCC_OscInitStruct.LSEState = RCC_LSE_ON; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; - RCC_OscInitStruct.HSICalibrationValue = 64; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLM = 1; // <-- This one gets dropped by V1.11.0 add me manually back in when CubeMX ran - RCC_OscInitStruct.PLL.PLLN = 10; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; - RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - /**Initializes the CPU, AHB and APB busses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART2 - |RCC_PERIPHCLK_USB|RCC_PERIPHCLK_RNG; - PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; - PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; - PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; - PeriphClkInit.RngClockSelection = RCC_RNGCLKSOURCE_HSI48; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - /**Configure the main internal regulator output voltage - */ - if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - /**Configure the Systick interrupt time - */ - HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); - - /**Configure the Systick - */ - HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); - - /* SysTick_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); -} - -/* RNG init function */ -static void MX_RNG_Init(void) -{ - - hrng.Instance = RNG; - if (HAL_RNG_Init(&hrng) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - -} - -/* RTC init function */ -static void MX_RTC_Init(void) -{ - - RTC_TimeTypeDef sTime; - RTC_DateTypeDef sDate; - - /**Initialize RTC Only - */ - hrtc.Instance = RTC; -if(HAL_RTCEx_BKUPRead(&hrtc, RTC_BKP_DR0) != 0x32F2){ - hrtc.Init.HourFormat = RTC_HOURFORMAT_24; - hrtc.Init.AsynchPrediv = 127; - hrtc.Init.SynchPrediv = 255; - hrtc.Init.OutPut = RTC_OUTPUT_DISABLE; - hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE; - hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; - hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; - if (HAL_RTC_Init(&hrtc) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - /**Initialize RTC and set the Time and Date - */ - sTime.Hours = 0; - sTime.Minutes = 0; - sTime.Seconds = 0; - sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; - sTime.StoreOperation = RTC_STOREOPERATION_RESET; - if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BIN) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - sDate.WeekDay = RTC_WEEKDAY_MONDAY; - sDate.Month = RTC_MONTH_JANUARY; - sDate.Date = 1; - sDate.Year = 0; - - if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BIN) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - HAL_RTCEx_BKUPWrite(&hrtc,RTC_BKP_DR0,0x32F2); - } - -} - -/* USART2 init function */ -static void MX_USART2_UART_Init(void) -{ - - huart2.Instance = USART2; - huart2.Init.BaudRate = 115200; - huart2.Init.WordLength = UART_WORDLENGTH_8B; - huart2.Init.StopBits = UART_STOPBITS_1; - huart2.Init.Parity = UART_PARITY_NONE; - huart2.Init.Mode = UART_MODE_TX; - huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart2.Init.OverSampling = UART_OVERSAMPLING_16; - huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - if (HAL_UART_Init(&huart2) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - -} - -/** Configure pins as - * Analog - * Input - * Output - * EVENT_OUT - * EXTI -*/ -static void MX_GPIO_Init(void) -{ - - GPIO_InitTypeDef GPIO_InitStruct; - - /* GPIO Ports Clock Enable */ - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - - /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET); - - /*Configure GPIO pin : B1_Pin */ - GPIO_InitStruct.Pin = B1_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); - - /*Configure GPIO pin : LD2_Pin */ - GPIO_InitStruct.Pin = LD2_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct); - -} - -/* USER CODE BEGIN 4 */ - -/* USER CODE END 4 */ - -/** - * @brief This function is executed in case of error occurrence. - * @param file: The file name as string. - * @param line: The line in file as a number. - * @retval None - */ -void _Error_Handler(char *file, int line) -{ - /* USER CODE BEGIN Error_Handler_Debug */ - dbgPrint("PANIC: EXECUTION HALTED %s@%d\r\n", file, line); - /* User can add his own implementation to report the HAL error return state */ - while(1) - { - } - /* USER CODE END Error_Handler_Debug */ -} - -#ifdef USE_FULL_ASSERT -/** - * @brief Reports the name of the source file and the source line number - * where the assert_param error has occurred. - * @param file: pointer to the source file name - * @param line: assert_param error line source number - * @retval None - */ -void assert_failed(uint8_t* file, uint32_t line) -{ - /* USER CODE BEGIN 6 */ - /* User can add his own implementation to report the file name and line number, - tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ - /* USER CODE END 6 */ -} -#endif /* USE_FULL_ASSERT */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Src/stm32l4xx_hal_msp.c b/Samples/Nucleo-TPM/L4A6RG/Src/stm32l4xx_hal_msp.c deleted file mode 100644 index 5d5eb499..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Src/stm32l4xx_hal_msp.c +++ /dev/null @@ -1,225 +0,0 @@ -/** - ****************************************************************************** - * File Name : stm32l4xx_hal_msp.c - * Description : This file provides code for the MSP Initialization - * and de-Initialization codes. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -extern void _Error_Handler(char *, int); -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ -/** - * Initializes the Global MSP. - */ -void HAL_MspInit(void) -{ - /* USER CODE BEGIN MspInit 0 */ - - /* USER CODE END MspInit 0 */ - - __HAL_RCC_SYSCFG_CLK_ENABLE(); - __HAL_RCC_PWR_CLK_ENABLE(); - - HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - - /* System interrupt init*/ - /* MemoryManagement_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); - /* BusFault_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); - /* UsageFault_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); - /* SVCall_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); - /* DebugMonitor_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); - /* PendSV_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); - /* SysTick_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); - - /* USER CODE BEGIN MspInit 1 */ - - /* USER CODE END MspInit 1 */ -} - -void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng) -{ - - if(hrng->Instance==RNG) - { - /* USER CODE BEGIN RNG_MspInit 0 */ - - /* USER CODE END RNG_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_RNG_CLK_ENABLE(); - /* USER CODE BEGIN RNG_MspInit 1 */ - - /* USER CODE END RNG_MspInit 1 */ - } - -} - -void HAL_RNG_MspDeInit(RNG_HandleTypeDef* hrng) -{ - - if(hrng->Instance==RNG) - { - /* USER CODE BEGIN RNG_MspDeInit 0 */ - - /* USER CODE END RNG_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_RNG_CLK_DISABLE(); - /* USER CODE BEGIN RNG_MspDeInit 1 */ - - /* USER CODE END RNG_MspDeInit 1 */ - } - -} - -void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) -{ - - if(hrtc->Instance==RTC) - { - /* USER CODE BEGIN RTC_MspInit 0 */ - - /* USER CODE END RTC_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_RTC_ENABLE(); - /* USER CODE BEGIN RTC_MspInit 1 */ - - /* USER CODE END RTC_MspInit 1 */ - } - -} - -void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) -{ - - if(hrtc->Instance==RTC) - { - /* USER CODE BEGIN RTC_MspDeInit 0 */ - - /* USER CODE END RTC_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_RTC_DISABLE(); - /* USER CODE BEGIN RTC_MspDeInit 1 */ - - /* USER CODE END RTC_MspDeInit 1 */ - } - -} - -void HAL_UART_MspInit(UART_HandleTypeDef* huart) -{ - - GPIO_InitTypeDef GPIO_InitStruct; - if(huart->Instance==USART2) - { - /* USER CODE BEGIN USART2_MspInit 0 */ - - /* USER CODE END USART2_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_USART2_CLK_ENABLE(); - - /**USART2 GPIO Configuration - PA2 ------> USART2_TX - PA3 ------> USART2_RX - */ - GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF7_USART2; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* USER CODE BEGIN USART2_MspInit 1 */ - - /* USER CODE END USART2_MspInit 1 */ - } - -} - -void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) -{ - - if(huart->Instance==USART2) - { - /* USER CODE BEGIN USART2_MspDeInit 0 */ - - /* USER CODE END USART2_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USART2_CLK_DISABLE(); - - /**USART2 GPIO Configuration - PA2 ------> USART2_TX - PA3 ------> USART2_RX - */ - HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3); - - /* USER CODE BEGIN USART2_MspDeInit 1 */ - - /* USER CODE END USART2_MspDeInit 1 */ - } - -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Src/stm32l4xx_it.c b/Samples/Nucleo-TPM/L4A6RG/Src/stm32l4xx_it.c deleted file mode 100644 index 75e12e7e..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Src/stm32l4xx_it.c +++ /dev/null @@ -1,212 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_it.c - * @brief Interrupt Service Routines. - ****************************************************************************** - * - * COPYRIGHT(c) 2018 STMicroelectronics - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" -#include "stm32l4xx.h" -#include "stm32l4xx_it.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* External variables --------------------------------------------------------*/ -extern PCD_HandleTypeDef hpcd_USB_OTG_FS; - -/******************************************************************************/ -/* Cortex-M4 Processor Interruption and Exception Handlers */ -/******************************************************************************/ - -/** -* @brief This function handles Non maskable interrupt. -*/ -void NMI_Handler(void) -{ - /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ - - /* USER CODE END NonMaskableInt_IRQn 0 */ - /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ - - /* USER CODE END NonMaskableInt_IRQn 1 */ -} - -/** -* @brief This function handles Hard fault interrupt. -*/ -void HardFault_Handler(void) -{ - /* USER CODE BEGIN HardFault_IRQn 0 */ - - /* USER CODE END HardFault_IRQn 0 */ - while (1) - { - /* USER CODE BEGIN W1_HardFault_IRQn 0 */ - /* USER CODE END W1_HardFault_IRQn 0 */ - } - /* USER CODE BEGIN HardFault_IRQn 1 */ - - /* USER CODE END HardFault_IRQn 1 */ -} - -/** -* @brief This function handles Memory management fault. -*/ -void MemManage_Handler(void) -{ - /* USER CODE BEGIN MemoryManagement_IRQn 0 */ - - /* USER CODE END MemoryManagement_IRQn 0 */ - while (1) - { - /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ - /* USER CODE END W1_MemoryManagement_IRQn 0 */ - } - /* USER CODE BEGIN MemoryManagement_IRQn 1 */ - - /* USER CODE END MemoryManagement_IRQn 1 */ -} - -/** -* @brief This function handles Prefetch fault, memory access fault. -*/ -void BusFault_Handler(void) -{ - /* USER CODE BEGIN BusFault_IRQn 0 */ - - /* USER CODE END BusFault_IRQn 0 */ - while (1) - { - /* USER CODE BEGIN W1_BusFault_IRQn 0 */ - /* USER CODE END W1_BusFault_IRQn 0 */ - } - /* USER CODE BEGIN BusFault_IRQn 1 */ - - /* USER CODE END BusFault_IRQn 1 */ -} - -/** -* @brief This function handles Undefined instruction or illegal state. -*/ -void UsageFault_Handler(void) -{ - /* USER CODE BEGIN UsageFault_IRQn 0 */ - - /* USER CODE END UsageFault_IRQn 0 */ - while (1) - { - /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ - /* USER CODE END W1_UsageFault_IRQn 0 */ - } - /* USER CODE BEGIN UsageFault_IRQn 1 */ - - /* USER CODE END UsageFault_IRQn 1 */ -} - -/** -* @brief This function handles System service call via SWI instruction. -*/ -void SVC_Handler(void) -{ - /* USER CODE BEGIN SVCall_IRQn 0 */ - - /* USER CODE END SVCall_IRQn 0 */ - /* USER CODE BEGIN SVCall_IRQn 1 */ - - /* USER CODE END SVCall_IRQn 1 */ -} - -/** -* @brief This function handles Debug monitor. -*/ -void DebugMon_Handler(void) -{ - /* USER CODE BEGIN DebugMonitor_IRQn 0 */ - - /* USER CODE END DebugMonitor_IRQn 0 */ - /* USER CODE BEGIN DebugMonitor_IRQn 1 */ - - /* USER CODE END DebugMonitor_IRQn 1 */ -} - -/** -* @brief This function handles Pendable request for system service. -*/ -void PendSV_Handler(void) -{ - /* USER CODE BEGIN PendSV_IRQn 0 */ - - /* USER CODE END PendSV_IRQn 0 */ - /* USER CODE BEGIN PendSV_IRQn 1 */ - - /* USER CODE END PendSV_IRQn 1 */ -} - -/** -* @brief This function handles System tick timer. -*/ -void SysTick_Handler(void) -{ - /* USER CODE BEGIN SysTick_IRQn 0 */ - - /* USER CODE END SysTick_IRQn 0 */ - HAL_IncTick(); - HAL_SYSTICK_IRQHandler(); - /* USER CODE BEGIN SysTick_IRQn 1 */ - - /* USER CODE END SysTick_IRQn 1 */ -} - -/******************************************************************************/ -/* STM32L4xx Peripheral Interrupt Handlers */ -/* Add here the Interrupt Handlers for the used peripherals. */ -/* For the available peripheral interrupt handler names, */ -/* please refer to the startup file (startup_stm32l4xx.s). */ -/******************************************************************************/ - -/** -* @brief This function handles USB OTG FS global interrupt. -*/ -void OTG_FS_IRQHandler(void) -{ - /* USER CODE BEGIN OTG_FS_IRQn 0 */ - - /* USER CODE END OTG_FS_IRQn 0 */ - HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS); - /* USER CODE BEGIN OTG_FS_IRQn 1 */ - - /* USER CODE END OTG_FS_IRQn 1 */ -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Src/system_stm32l4xx.c b/Samples/Nucleo-TPM/L4A6RG/Src/system_stm32l4xx.c deleted file mode 100644 index c76fe45e..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Src/system_stm32l4xx.c +++ /dev/null @@ -1,353 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32l4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32l4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick - * timer or configure other parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the MSI (4 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | MSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 4000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 4000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 8 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * PLLSAI1_P | NA - *----------------------------------------------------------------------------- - * PLLSAI1_Q | NA - *----------------------------------------------------------------------------- - * PLLSAI1_R | NA - *----------------------------------------------------------------------------- - * PLLSAI2_P | NA - *----------------------------------------------------------------------------- - * PLLSAI2_Q | NA - *----------------------------------------------------------------------------- - * PLLSAI2_R | NA - *----------------------------------------------------------------------------- - * Require 48MHz for USB OTG FS, | Disabled - * SDIO and RNG clock | - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32l4xx_system - * @{ - */ - -/** @addtogroup STM32L4xx_System_Private_Includes - * @{ - */ - -#include "stm32l4xx.h" - -#if !defined (HSE_VALUE) - #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (MSI_VALUE) - #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -#if !defined (HSI_VALUE) - #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/*!< Uncomment the following line if you need to relocate your vector Table in - Internal SRAM. */ -/* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Variables - * @{ - */ - /* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency - Note: If you use this function to configure the system clock; then there - is no need to call the 2 first functions listed above, since SystemCoreClock - variable is updated automatically. - */ - uint32_t SystemCoreClock = 4000000U; - - const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; - const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ - 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ - /* FPU settings ------------------------------------------------------------*/ - #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ - #endif - - /* Reset the RCC clock configuration to the default reset state ------------*/ - /* Set MSION bit */ - RCC->CR |= RCC_CR_MSION; - - /* Reset CFGR register */ - RCC->CFGR = 0x00000000U; - - /* Reset HSEON, CSSON , HSION, and PLLON bits */ - RCC->CR &= 0xEAF6FFFFU; - - /* Reset PLLCFGR register */ - RCC->PLLCFGR = 0x00001000U; - - /* Reset HSEBYP bit */ - RCC->CR &= 0xFFFBFFFFU; - - /* Disable all interrupts */ - RCC->CIER = 0x00000000U; - - /* Configure the Vector Table location add offset address ------------------*/ -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ -#endif -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or configure - * other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) - * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value - * 4 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * - * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value - * 16 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value - * 8 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using fractional - * value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp = 0U, msirange = 0U, pllvco = 0U, pllr = 2U, pllsource = 0U, pllm = 2U; - - /* Get MSI Range frequency--------------------------------------------------*/ - if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) - { /* MSISRANGE from RCC_CSR applies */ - msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; - } - else - { /* MSIRANGE from RCC_CR applies */ - msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; - } - /*MSI frequency range in HZ*/ - msirange = MSIRangeTable[msirange]; - - /* Get SYSCLK source -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) - { - case 0x00: /* MSI used as system clock source */ - SystemCoreClock = msirange; - break; - - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; - - switch (pllsource) - { - case 0x02: /* HSI used as PLL clock source */ - pllvco = (HSI_VALUE / pllm); - break; - - case 0x03: /* HSE used as PLL clock source */ - pllvco = (HSE_VALUE / pllm); - break; - - default: /* MSI used as PLL clock source */ - pllvco = (msirange / pllm); - break; - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; - SystemCoreClock = pllvco/pllr; - break; - - default: - SystemCoreClock = msirange; - break; - } - /* Compute HCLK clock frequency --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Src/usb_device.c b/Samples/Nucleo-TPM/L4A6RG/Src/usb_device.c deleted file mode 100644 index 75e5d8d5..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Src/usb_device.c +++ /dev/null @@ -1,173 +0,0 @@ -/** - ****************************************************************************** - * @file : usb_device.c - * @version : v2.0_Cube - * @brief : This file implements the USB Device - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ - -#include "usb_device.h" -#include "usbd_core.h" -#include "usbd_desc.h" -#include "usbd_cdc.h" -#include "usbd_cdc_if.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* USER CODE BEGIN PV */ -/* Private variables ---------------------------------------------------------*/ - -/* USER CODE END PV */ - -/* USER CODE BEGIN PFP */ -/* Private function prototypes -----------------------------------------------*/ - -/* USER CODE END PFP */ - -/* Return USBD_OK if the Battery Charging Detection mode (BCD) is used, else USBD_FAIL. */ -extern USBD_StatusTypeDef USBD_LL_BatteryCharging(USBD_HandleTypeDef *pdev); - -/* USB Device Core handle declaration. */ -USBD_HandleTypeDef hUsbDeviceFS; - -/* - * -- Insert your variables declaration here -- - */ -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* - * -- Insert your external function declaration here -- - */ -/* USER CODE BEGIN 1 */ -void MX_USB_DEVICE_DeInit(void) -{ - USBD_DeInit(&hUsbDeviceFS); -} - -/* USER CODE END 1 */ - -/** - * Init USB device Library, add supported class and start the library - * @retval None - */ -void MX_USB_DEVICE_Init(void) -{ - /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ - - /* USER CODE END USB_DEVICE_Init_PreTreatment */ - - /* Init Device Library, add supported class and start the library. */ - USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS); - USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC); - USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS); - /* Verify if the Battery Charging Detection mode (BCD) is used : */ - /* If yes, the USB device is started in the HAL_PCDEx_BCD_Callback */ - /* upon reception of PCD_BCD_DISCOVERY_COMPLETED message. */ - /* If no, the USB device is started now. */ - if (USBD_LL_BatteryCharging(&hUsbDeviceFS) != USBD_OK) { - USBD_Start(&hUsbDeviceFS); - } - /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ - - /* USER CODE END USB_DEVICE_Init_PostTreatment */ -} - -/** - * @brief Send BCD message to user layer - * @param hpcd: PCD handle - * @param msg: LPM message - * @retval None - */ -void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) -{ - USBD_HandleTypeDef usbdHandle = hUsbDeviceFS; - - /* USER CODE BEGIN 7 */ - if (hpcd->battery_charging_active == ENABLE) - { - switch(msg) - { - case PCD_BCD_CONTACT_DETECTION: - - break; - - case PCD_BCD_STD_DOWNSTREAM_PORT: - - break; - - case PCD_BCD_CHARGING_DOWNSTREAM_PORT: - - break; - - case PCD_BCD_DEDICATED_CHARGING_PORT: - - break; - - case PCD_BCD_DISCOVERY_COMPLETED: - USBD_Start(&usbdHandle); - break; - - case PCD_BCD_ERROR: - default: - break; - } - } - /* USER CODE END 7 */ -} - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Src/usbd_cdc_if.c b/Samples/Nucleo-TPM/L4A6RG/Src/usbd_cdc_if.c deleted file mode 100644 index f5490fe9..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Src/usbd_cdc_if.c +++ /dev/null @@ -1,392 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_cdc_if.c - * @version : v2.0_Cube - * @brief : Usb device for Virtual Com Port. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_cdc_if.h" - -/* USER CODE BEGIN INCLUDE */ -#include -#include -#include "StmUtil.h" -#include "stm32l4xx_hal.h" - -/* USER CODE END INCLUDE */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ - -/* USER CODE BEGIN PV */ -/* Private variables ---------------------------------------------------------*/ - -/* USER CODE END PV */ - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @brief Usb device library. - * @{ - */ - -/** @addtogroup USBD_CDC_IF - * @{ - */ - -/** @defgroup USBD_CDC_IF_Private_TypesDefinitions USBD_CDC_IF_Private_TypesDefinitions - * @brief Private types. - * @{ - */ - -/* USER CODE BEGIN PRIVATE_TYPES */ -#define CDC_RTS_MASK 0x0002 -#define CDC_DTR_MASK 0x0001 -void TpmConnectionReset(void); -int TpmSignalEvent(uint8_t* Buf, uint32_t *Len); - -/* USER CODE END PRIVATE_TYPES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Private_Defines USBD_CDC_IF_Private_Defines - * @brief Private defines. - * @{ - */ - -/* USER CODE BEGIN PRIVATE_DEFINES */ -/* Define size for the receive and transmit buffer over CDC */ -/* It's up to user to redefine and/or remove those define */ -#define APP_RX_DATA_SIZE 2048 -#define APP_TX_DATA_SIZE 2048 -typedef struct -{ - uint8_t bReqType; - uint8_t bRequest; - uint16_t wVal; - uint16_t wIndex; - uint16_t wLength; -} USBD_SETUP_PKT, *PUSBD_SETUP_PKT; -extern RTC_HandleTypeDef hrtc; -/* USER CODE END PRIVATE_DEFINES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Private_Macros USBD_CDC_IF_Private_Macros - * @brief Private macros. - * @{ - */ - -/* USER CODE BEGIN PRIVATE_MACRO */ - -/* USER CODE END PRIVATE_MACRO */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Private_Variables USBD_CDC_IF_Private_Variables - * @brief Private variables. - * @{ - */ -/* Create buffer for reception and transmission */ -/* It's up to user to redefine and/or remove those define */ -/** Received data over USB are stored in this buffer */ -uint8_t UserRxBufferFS[APP_RX_DATA_SIZE]; - -/** Data to send over USB CDC are stored in this buffer */ -uint8_t UserTxBufferFS[APP_TX_DATA_SIZE]; - -/* USER CODE BEGIN PRIVATE_VARIABLES */ - -/* USER CODE END PRIVATE_VARIABLES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Exported_Variables USBD_CDC_IF_Exported_Variables - * @brief Public variables. - * @{ - */ - -extern USBD_HandleTypeDef hUsbDeviceFS; - -/* USER CODE BEGIN EXPORTED_VARIABLES */ -USBD_CDC_LineCodingTypeDef LineCoding = -{ - 115200, /* baud rate*/ - 0x00, /* stop bits-1*/ - 0x00, /* parity - none*/ - 0x08 /* nb. of bits 8*/ -}; -volatile uint8_t CDC_RTS = 0; // RequestToSend -volatile uint8_t CDC_DTR = 0; // DataTerminalReady - -/* USER CODE END EXPORTED_VARIABLES */ - -/** - * @} - */ - -/** @defgroup USBD_CDC_IF_Private_FunctionPrototypes USBD_CDC_IF_Private_FunctionPrototypes - * @brief Private functions declaration. - * @{ - */ - -static int8_t CDC_Init_FS(void); -static int8_t CDC_DeInit_FS(void); -static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length); -static int8_t CDC_Receive_FS(uint8_t* pbuf, uint32_t *Len); - -/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */ - -/* USER CODE END PRIVATE_FUNCTIONS_DECLARATION */ - -/** - * @} - */ - -USBD_CDC_ItfTypeDef USBD_Interface_fops_FS = -{ - CDC_Init_FS, - CDC_DeInit_FS, - CDC_Control_FS, - CDC_Receive_FS -}; - -/* Private functions ---------------------------------------------------------*/ -/** - * @brief Initializes the CDC media low layer over the FS USB IP - * @retval USBD_OK if all operations are OK else USBD_FAIL - */ -static int8_t CDC_Init_FS(void) -{ - /* USER CODE BEGIN 3 */ - /* Set Application Buffers */ - USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0); - USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS); - return (USBD_OK); - /* USER CODE END 3 */ -} - -/** - * @brief DeInitializes the CDC media low layer - * @retval USBD_OK if all operations are OK else USBD_FAIL - */ -static int8_t CDC_DeInit_FS(void) -{ - /* USER CODE BEGIN 4 */ - return (USBD_OK); - /* USER CODE END 4 */ -} - -/** - * @brief Manage the CDC class requests - * @param cmd: Command code - * @param pbuf: Buffer containing command data (request parameters) - * @param length: Number of data to be sent (in bytes) - * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL - */ -static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length) -{ - /* USER CODE BEGIN 5 */ - char parity[] = {'N', 'O', 'E', 'M', 'S'}; - uint8_t stop[] = {1, 15, 2}; - switch (cmd) - { - case CDC_SEND_ENCAPSULATED_COMMAND: - - break; - - case CDC_GET_ENCAPSULATED_RESPONSE: - - break; - - case CDC_SET_COMM_FEATURE: - - break; - - case CDC_GET_COMM_FEATURE: - - break; - - case CDC_CLEAR_COMM_FEATURE: - - break; - - /*******************************************************************************/ - /* Line Coding Structure */ - /*-----------------------------------------------------------------------------*/ - /* Offset | Field | Size | Value | Description */ - /* 0 | dwDTERate | 4 | Number |Data terminal rate, in bits per second*/ - /* 4 | bCharFormat | 1 | Number | Stop bits */ - /* 0 - 1 Stop bit */ - /* 1 - 1.5 Stop bits */ - /* 2 - 2 Stop bits */ - /* 5 | bParityType | 1 | Number | Parity */ - /* 0 - None */ - /* 1 - Odd */ - /* 2 - Even */ - /* 3 - Mark */ - /* 4 - Space */ - /* 6 | bDataBits | 1 | Number Data bits (5, 6, 7, 8 or 16). */ - /*******************************************************************************/ - case CDC_SET_LINE_CODING: - { - LineCoding.bitrate = pbuf[0] | (pbuf[1] << 8) | (pbuf[2] << 16) | (pbuf[3] << 24); - LineCoding.format = pbuf[4]; - LineCoding.paritytype = pbuf[5]; - LineCoding.datatype = pbuf[6]; - dbgPrint("CDC_SET_LINE_CODING: %lu-%d%c%d\r\n", LineCoding.bitrate, LineCoding.datatype, parity[LineCoding.paritytype], stop[LineCoding.format]); - break; - } - - case CDC_GET_LINE_CODING: - { - pbuf[0] = (uint8_t)(LineCoding.bitrate); - pbuf[1] = (uint8_t)(LineCoding.bitrate >> 8); - pbuf[2] = (uint8_t)(LineCoding.bitrate >> 16); - pbuf[3] = (uint8_t)(LineCoding.bitrate >> 24); - pbuf[4] = LineCoding.format; - pbuf[5] = LineCoding.paritytype; - pbuf[6] = LineCoding.datatype; - dbgPrint("CDC_GET_LINE_CODING: %lu-%d%c%d\r\n", LineCoding.bitrate, LineCoding.datatype, parity[LineCoding.paritytype], stop[LineCoding.format]); - break; - } - - case CDC_SET_CONTROL_LINE_STATE: - { - PUSBD_SETUP_PKT setupPkt = (PUSBD_SETUP_PKT)pbuf; - CDC_RTS = ((setupPkt->wVal & CDC_RTS_MASK) != 0); - CDC_DTR = ((setupPkt->wVal & CDC_DTR_MASK) != 0); - dbgPrint("CDC_SET_CONTROL_LINE_STATE: RTS=%d, DTR=%d\r\n", CDC_RTS, CDC_DTR); - // Reset any ongoing cmd transfers - TpmConnectionReset(); - break; - } - - case CDC_SEND_BREAK: - - break; - - default: - break; - } - - return (USBD_OK); - /* USER CODE END 5 */ -} - -/** - * @brief Data received over USB OUT endpoint are sent over CDC interface - * through this function. - * - * @note - * This function will block any OUT packet reception on USB endpoint - * untill exiting this function. If you exit this function before transfer - * is complete on CDC interface (ie. using DMA controller) it will result - * in receiving more data while previous ones are still not sent. - * - * @param Buf: Buffer of data to be received - * @param Len: Number of data received (in bytes) - * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL - */ -static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len) -{ - /* USER CODE BEGIN 6 */ - if(!TpmSignalEvent(Buf, Len)) - { - return(USBD_FAIL); - } - - USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]); - USBD_CDC_ReceivePacket(&hUsbDeviceFS); - return (USBD_OK); - /* USER CODE END 6 */ -} - -/** - * @brief CDC_Transmit_FS - * Data to send over USB IN endpoint are sent over CDC interface - * through this function. - * @note - * - * - * @param Buf: Buffer of data to be sent - * @param Len: Number of data to be sent (in bytes) - * @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY - */ -uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len) -{ - uint8_t result = USBD_OK; - /* USER CODE BEGIN 7 */ - USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData; - if (hcdc->TxState != 0){ - return USBD_BUSY; - } - USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len); - result = USBD_CDC_TransmitPacket(&hUsbDeviceFS); - /* USER CODE END 7 */ - return result; -} - -/* USER CODE BEGIN PRIVATE_FUNCTIONS_IMPLEMENTATION */ - -/* USER CODE END PRIVATE_FUNCTIONS_IMPLEMENTATION */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Src/usbd_conf.c b/Samples/Nucleo-TPM/L4A6RG/Src/usbd_conf.c deleted file mode 100644 index 1b9075fe..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Src/usbd_conf.c +++ /dev/null @@ -1,894 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_conf.c - * @version : v2.0_Cube - * @brief : This file implements the board support package for the USB device library - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx.h" -#include "stm32l4xx_hal.h" -#include "usbd_def.h" -#include "usbd_core.h" -#include "usbd_cdc.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ - -/* USER CODE BEGIN PV */ -/* Private variables ---------------------------------------------------------*/ - -/* USER CODE END PV */ - -PCD_HandleTypeDef hpcd_USB_OTG_FS; -void _Error_Handler(char * file, int line); - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* Exported function prototypes ----------------------------------------------*/ -extern USBD_StatusTypeDef USBD_LL_BatteryCharging(USBD_HandleTypeDef *pdev); - -/* USER CODE BEGIN PFP */ -/* Private function prototypes -----------------------------------------------*/ - -/* USER CODE END PFP */ - -/* Private functions ---------------------------------------------------------*/ - -/* USER CODE BEGIN 1 */ -static void SystemClockConfig_Resume(void); - -/* USER CODE END 1 */ - -void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state); -extern void SystemClock_Config(void); - -/******************************************************************************* - LL Driver Callbacks (PCD -> USB Device Library) -*******************************************************************************/ -/* MSP Init */ - -void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) -{ - GPIO_InitTypeDef GPIO_InitStruct; - if(pcdHandle->Instance==USB_OTG_FS) - { - /* USER CODE BEGIN USB_OTG_FS_MspInit 0 */ - - /* USER CODE END USB_OTG_FS_MspInit 0 */ - - /**USB_OTG_FS GPIO Configuration - PA11 ------> USB_OTG_FS_DM - PA12 ------> USB_OTG_FS_DP - */ - GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* Peripheral clock enable */ - __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - - /* Enable VDDUSB */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - HAL_PWREx_EnableVddUSB(); - __HAL_RCC_PWR_CLK_DISABLE(); - } - else - { - HAL_PWREx_EnableVddUSB(); - } - - /* Peripheral interrupt init */ - HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(OTG_FS_IRQn); - /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */ - - /* USER CODE END USB_OTG_FS_MspInit 1 */ - } -} - -void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle) -{ - if(pcdHandle->Instance==USB_OTG_FS) - { - /* USER CODE BEGIN USB_OTG_FS_MspDeInit 0 */ - - /* USER CODE END USB_OTG_FS_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USB_OTG_FS_CLK_DISABLE(); - - /**USB_OTG_FS GPIO Configuration - PA11 ------> USB_OTG_FS_DM - PA12 ------> USB_OTG_FS_DP - */ - HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); - - /* Disable VDDUSB */ - if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - { - __HAL_RCC_PWR_CLK_ENABLE(); - HAL_PWREx_DisableVddUSB(); - __HAL_RCC_PWR_CLK_DISABLE(); - } - else - { - HAL_PWREx_DisableVddUSB(); - } - - /* Peripheral interrupt Deinit*/ - HAL_NVIC_DisableIRQ(OTG_FS_IRQn); - - /* USER CODE BEGIN USB_OTG_FS_MspDeInit 1 */ - - /* USER CODE END USB_OTG_FS_MspDeInit 1 */ - } -} - -/** - * @brief Setup stage callback - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); -} - -/** - * @brief Data Out stage callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint number - * @retval None - */ -void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); -} - -/** - * @brief Data In stage callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint number - * @retval None - */ -void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); -} - -/** - * @brief SOF callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); -} - -/** - * @brief Reset callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_SpeedTypeDef speed = USBD_SPEED_FULL; - - /* Set USB current speed. */ - switch (hpcd->Init.speed) - { - case PCD_SPEED_FULL: - speed = USBD_SPEED_FULL; - break; - - default: - speed = USBD_SPEED_FULL; - break; - } - USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); - - /* Reset Device. */ - USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); -} - -/** - * @brief Suspend callback. - * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it) - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) -{ - __HAL_PCD_GATE_PHYCLOCK(hpcd); - /* Inform USB library that core enters in suspend Mode. */ - USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); - /* Enter in STOP mode. */ - /* USER CODE BEGIN 2 */ - if (hpcd->Init.low_power_enable) - { - /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ - SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - } - /* USER CODE END 2 */ -} - -/** - * @brief Resume callback. - * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it) - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) -{ - __HAL_PCD_UNGATE_PHYCLOCK(hpcd); - - /* USER CODE BEGIN 3 */ - if (hpcd->Init.low_power_enable) - { - /* Reset SLEEPDEEP bit of Cortex System Control Register. */ - SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - SystemClockConfig_Resume(); - } - /* USER CODE END 3 */ - USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); -} - -/** - * @brief ISOOUTIncomplete callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint number - * @retval None - */ -void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); -} - -/** - * @brief ISOINIncomplete callback. - * @param hpcd: PCD handle - * @param epnum: Endpoint number - * @retval None - */ -void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); -} - -/** - * @brief Connect callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData); -} - -/** - * @brief Disconnect callback. - * @param hpcd: PCD handle - * @retval None - */ -void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) -{ - USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData); -} - -/******************************************************************************* - LL Driver Interface (USB Device Library --> PCD) -*******************************************************************************/ - -/** - * @brief Initializes the low level portion of the device driver. - * @param pdev: Device handle - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) -{ - /* Init USB Ip. */ - if (pdev->id == DEVICE_FS) { - /* Enable USB power on Pwrctrl CR2 register. */ - /* Link the driver to the stack. */ - hpcd_USB_OTG_FS.pData = pdev; - pdev->pData = &hpcd_USB_OTG_FS; - - hpcd_USB_OTG_FS.Instance = USB_OTG_FS; - hpcd_USB_OTG_FS.Init.dev_endpoints = 6; - hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; - hpcd_USB_OTG_FS.Init.ep0_mps = DEP0CTL_MPS_64; - hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; - hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE; - hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; - hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; - hpcd_USB_OTG_FS.Init.battery_charging_enable = DISABLE; - hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; - hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE; - if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) - { - _Error_Handler(__FILE__, __LINE__); - } - - HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80); - HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40); - HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80); - } - return USBD_OK; -} - -/** - * @brief De-Initializes the low level portion of the device driver. - * @param pdev: Device handle - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_DeInit(pdev->pData); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Starts the low level portion of the device driver. - * @param pdev: Device handle - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_Start(pdev->pData); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Stops the low level portion of the device driver. - * @param pdev: Device handle - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_Stop(pdev->pData); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Opens an endpoint of the low level driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @param ep_type: Endpoint type - * @param ep_mps: Endpoint max packet size - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Closes an endpoint of the low level driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Flushes an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Sets a Stall condition on an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Clears a Stall condition on an endpoint of the Low Level Driver. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Returns Stall condition. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval Stall (1: Yes, 0: No) - */ -uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; - - if((ep_addr & 0x80) == 0x80) - { - return hpcd->IN_ep[ep_addr & 0x7F].is_stall; - } - else - { - return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; - } -} - -/** - * @brief Assigns a USB address to the device. - * @param pdev: Device handle - * @param dev_addr: Device address - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Transmits data over an endpoint. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @param pbuf: Pointer to data to be sent - * @param size: Data size - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Prepares an endpoint for reception. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @param pbuf: Pointer to data to be received - * @param size: Data size - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) -{ - HAL_StatusTypeDef hal_status = HAL_OK; - USBD_StatusTypeDef usb_status = USBD_OK; - - hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); - - switch (hal_status) { - case HAL_OK : - usb_status = USBD_OK; - break; - case HAL_ERROR : - usb_status = USBD_FAIL; - break; - case HAL_BUSY : - usb_status = USBD_BUSY; - break; - case HAL_TIMEOUT : - usb_status = USBD_FAIL; - break; - default : - usb_status = USBD_FAIL; - break; - } - return usb_status; -} - -/** - * @brief Returns the last transfered packet size. - * @param pdev: Device handle - * @param ep_addr: Endpoint number - * @retval Recived Data Size - */ -uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) -{ - return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr); -} - -#if (USBD_LPM_ENABLED == 1) -/** - * @brief Send LPM message to user layer - * @param hpcd: PCD handle - * @param msg: LPM message - * @retval None - */ -void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) -{ - switch (msg) - { - case PCD_LPM_L0_ACTIVE: - if (hpcd->Init.low_power_enable) - { - SystemClock_Config(); - - /* Reset SLEEPDEEP bit of Cortex System Control Register. */ - SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - } - __HAL_PCD_UNGATE_PHYCLOCK(hpcd); - USBD_LL_Resume(hpcd->pData); - break; - - case PCD_LPM_L1_ACTIVE: - __HAL_PCD_GATE_PHYCLOCK(hpcd); - USBD_LL_Suspend(hpcd->pData); - - /* Enter in STOP mode. */ - if (hpcd->Init.low_power_enable) - { - /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ - SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); - } - break; - } -} -#endif /* (USBD_LPM_ENABLED == 1) */ - -/** - * @brief Delays routine for the USB Device Library. - * @param Delay: Delay in ms - * @retval None - */ -void USBD_LL_Delay(uint32_t Delay) -{ - HAL_Delay(Delay); -} - -/** - * @brief Static single allocation. - * @param size: Size of allocated memory - * @retval None - */ -void *USBD_static_malloc(uint32_t size) -{ - static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */ - return mem; -} - -/** - * @brief Dummy memory free - * @param p: Pointer to allocated memory address - * @retval None - */ -void USBD_static_free(void *p) -{ - -} - -/* USER CODE BEGIN 5 */ -/** - * @brief Configures system clock after wake-up from USB resume callBack: - * enable HSI, PLL and select PLL as system clock source. - * @retval None - */ -static void SystemClockConfig_Resume(void) -{ - SystemClock_Config(); -} -/* USER CODE END 5 */ - -/** - * @brief Software device connection - * @param hpcd: PCD handle - * @param state: Connection state (0: disconnected / 1: connected) - * @retval None - */ -void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) -{ - /* USER CODE BEGIN 6 */ - if (state == 1) - { - /* Configure Low connection state. */ - - } - else - { - /* Configure High connection state. */ - - } - /* USER CODE END 6 */ -} - -/** - * @brief Verify if the Battery Charging Detection mode (BCD) is used : - * return USBD_OK if true - * else return USBD_FAIL if false - * @param pdev: Device handle - * @retval USBD status - */ -USBD_StatusTypeDef USBD_LL_BatteryCharging(USBD_HandleTypeDef *pdev) -{ - PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*)pdev->pData; - if (hpcd->Init.battery_charging_enable == ENABLE) - { - return USBD_OK; - } - else - { - return USBD_FAIL; - } -} - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/Src/usbd_desc.c b/Samples/Nucleo-TPM/L4A6RG/Src/usbd_desc.c deleted file mode 100644 index 2e3a7e1c..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/Src/usbd_desc.c +++ /dev/null @@ -1,405 +0,0 @@ -/** - ****************************************************************************** - * @file : usbd_desc.c - * @version : v2.0_Cube - * @brief : This file implements the USB device descriptors. - ****************************************************************************** - * This notice applies to any and all portions of this file - * that are not between comment pairs USER CODE BEGIN and - * USER CODE END. Other portions of this file, whether - * inserted by the user or by software development tools - * are owned by their respective copyright owners. - * - * Copyright (c) 2018 STMicroelectronics International N.V. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted, provided that the following conditions are met: - * - * 1. Redistribution of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products - * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this - * software, must execute solely and exclusively on microcontroller or - * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. - * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "usbd_core.h" -#include "usbd_desc.h" -#include "usbd_conf.h" - -/* USER CODE BEGIN INCLUDE */ - -/* USER CODE END INCLUDE */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ - -/* USER CODE BEGIN PV */ -/* Private variables ---------------------------------------------------------*/ - -/* USER CODE END PV */ - -/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY - * @{ - */ - -/** @addtogroup USBD_DESC - * @{ - */ - -/** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions - * @brief Private types. - * @{ - */ - -/* USER CODE BEGIN PRIVATE_TYPES */ - -/* USER CODE END PRIVATE_TYPES */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines - * @brief Private defines. - * @{ - */ - -#define USBD_VID 1155 -#define USBD_LANGID_STRING 1033 -#define USBD_MANUFACTURER_STRING "STMicroelectronics" -#define USBD_PID_FS 22336 -#define USBD_PRODUCT_STRING_FS "STM32 Virtual ComPort" -#define USBD_SERIALNUMBER_STRING_FS "00000000001A" -#define USBD_CONFIGURATION_STRING_FS "CDC Config" -#define USBD_INTERFACE_STRING_FS "CDC Interface" - -#define USB_SIZ_BOS_DESC 0x0C - -/* USER CODE BEGIN PRIVATE_DEFINES */ - -/* USER CODE END PRIVATE_DEFINES */ - -/** - * @} - */ - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros - * @brief Private macros. - * @{ - */ - -/* USER CODE BEGIN PRIVATE_MACRO */ - -/* USER CODE END PRIVATE_MACRO */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes - * @brief Private functions declaration. - * @{ - */ - -uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); - -#ifdef USB_SUPPORT_USER_STRING_DESC -uint8_t * USBD_FS_USRStringDesc(USBD_SpeedTypeDef speed, uint8_t idx, uint16_t *length); -#endif /* USB_SUPPORT_USER_STRING_DESC */ - -#if (USBD_LPM_ENABLED == 1) -uint8_t * USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); -#endif /* (USBD_LPM_ENABLED == 1) */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables - * @brief Private variables. - * @{ - */ - -USBD_DescriptorsTypeDef FS_Desc = -{ - USBD_FS_DeviceDescriptor -, USBD_FS_LangIDStrDescriptor -, USBD_FS_ManufacturerStrDescriptor -, USBD_FS_ProductStrDescriptor -, USBD_FS_SerialStrDescriptor -, USBD_FS_ConfigStrDescriptor -, USBD_FS_InterfaceStrDescriptor -#if (USBD_LPM_ENABLED == 1) -, USBD_FS_USR_BOSDescriptor -#endif /* (USBD_LPM_ENABLED == 1) */ -}; - -#if defined ( __ICCARM__ ) /* IAR Compiler */ - #pragma data_alignment=4 -#endif /* defined ( __ICCARM__ ) */ -/** USB standard device descriptor. */ -__ALIGN_BEGIN uint8_t USBD_FS_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END = -{ - 0x12, /*bLength */ - USB_DESC_TYPE_DEVICE, /*bDescriptorType*/ -#if (USBD_LPM_ENABLED == 1) - 0x01, /*bcdUSB */ /* changed to USB version 2.01 - in order to support LPM L1 suspend - resume test of USBCV3.0*/ -#else - 0x00, /*bcdUSB */ -#endif /* (USBD_LPM_ENABLED == 1) */ - 0x02, - 0x02, /*bDeviceClass*/ - 0x02, /*bDeviceSubClass*/ - 0x00, /*bDeviceProtocol*/ - USB_MAX_EP0_SIZE, /*bMaxPacketSize*/ - LOBYTE(USBD_VID), /*idVendor*/ - HIBYTE(USBD_VID), /*idVendor*/ - LOBYTE(USBD_PID_FS), /*idProduct*/ - HIBYTE(USBD_PID_FS), /*idProduct*/ - 0x00, /*bcdDevice rel. 2.00*/ - 0x02, - USBD_IDX_MFC_STR, /*Index of manufacturer string*/ - USBD_IDX_PRODUCT_STR, /*Index of product string*/ - USBD_IDX_SERIAL_STR, /*Index of serial number string*/ - USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/ -}; - -/* USB_DeviceDescriptor */ -/** BOS descriptor. */ -#if (USBD_LPM_ENABLED == 1) -#if defined ( __ICCARM__ ) /* IAR Compiler */ - #pragma data_alignment=4 -#endif /* defined ( __ICCARM__ ) */ -__ALIGN_BEGIN uint8_t USBD_FS_BOSDesc[USB_SIZ_BOS_DESC] __ALIGN_END = -{ - 0x5, - USB_DESC_TYPE_BOS, - 0xC, - 0x0, - 0x1, /* 1 device capability*/ - /* device capability*/ - 0x7, - USB_DEVICE_CAPABITY_TYPE, - 0x2, - 0x2, /* LPM capability bit set*/ - 0x0, - 0x0, - 0x0 -}; -#endif /* (USBD_LPM_ENABLED == 1) */ - -/** - * @} - */ - -/** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables - * @brief Private variables. - * @{ - */ - -#if defined ( __ICCARM__ ) /* IAR Compiler */ - #pragma data_alignment=4 -#endif /* defined ( __ICCARM__ ) */ - -/** USB lang indentifier descriptor. */ -__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END = -{ - USB_LEN_LANGID_STR_DESC, - USB_DESC_TYPE_STRING, - LOBYTE(USBD_LANGID_STRING), - HIBYTE(USBD_LANGID_STRING) -}; - -#if defined ( __ICCARM__ ) /* IAR Compiler */ - #pragma data_alignment=4 -#endif /* defined ( __ICCARM__ ) */ -/* Internal string descriptor. */ -__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END; - -/** - * @} - */ - -/** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions - * @brief Private functions. - * @{ - */ - -/** - * @brief Return the device descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - *length = sizeof(USBD_FS_DeviceDesc); - return USBD_FS_DeviceDesc; -} - -/** - * @brief Return the LangID string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - *length = sizeof(USBD_LangIDDesc); - return USBD_LangIDDesc; -} - -/** - * @brief Return the product string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - if(speed == 0) - { - USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); - } - else - { - USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); - } - return USBD_StrDesc; -} - -/** - * @brief Return the manufacturer string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); - return USBD_StrDesc; -} - -/** - * @brief Return the serial number string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - if(speed == USBD_SPEED_HIGH) - { - USBD_GetString((uint8_t *)USBD_SERIALNUMBER_STRING_FS, USBD_StrDesc, length); - } - else - { - USBD_GetString((uint8_t *)USBD_SERIALNUMBER_STRING_FS, USBD_StrDesc, length); - } - return USBD_StrDesc; -} - -/** - * @brief Return the configuration string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - if(speed == USBD_SPEED_HIGH) - { - USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); - } - else - { - USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); - } - return USBD_StrDesc; -} - -/** - * @brief Return the interface string descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - if(speed == 0) - { - USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); - } - else - { - USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); - } - return USBD_StrDesc; -} - -#if (USBD_LPM_ENABLED == 1) -/** - * @brief Return the BOS descriptor - * @param speed : Current device speed - * @param length : Pointer to data length variable - * @retval Pointer to descriptor buffer - */ -uint8_t * USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) -{ - *length = sizeof(USBD_FS_BOSDesc); - return (uint8_t*)USBD_FS_BOSDesc; -} -#endif /* (USBD_LPM_ENABLED == 1) */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/L4A6RG/mx.scratch b/Samples/Nucleo-TPM/L4A6RG/mx.scratch deleted file mode 100644 index a4d6e0b1..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/mx.scratch +++ /dev/null @@ -1,91 +0,0 @@ - - -D:\VS\brianTPM\Samples\Nucleo-TPM\L4A6RG\\Nucleo-L4A6RG -C -..\Drivers\CMSIS -C:\Users\Stefanth\STM32Cube\Repository\STM32Cube_FW_L4_V1.11.0\Drivers\CMSIS -TrueSTUDIO -0 - - - - - - - - - - - - - - - - - Nucleo-L4A6RG - STM32L4A6RGTx - 0x200 - 0x10000 - - custom - - true - swd - - 1 - - - - - - - - - - - - __weak=__attribute__((weak)) - __packed=__attribute__((__packed__)) - - - - - - - USE_FULL_LL_DRIVER - MBEDTLS_CONFIG_FILE="mbedtls_config.h" - - - - - ..\Inc - ..\Drivers\STM32L4xx_HAL_Driver\Inc - ..\Drivers\STM32L4xx_HAL_Driver\Inc\Legacy - ..\Middlewares\ST\STM32_USB_Device_Library\Core\Inc - ..\Middlewares\ST\STM32_USB_Device_Library\Class\CDC\Inc - ..\Drivers\CMSIS\Device\ST\STM32L4xx\Include - ..\Drivers\CMSIS\Include - - - - - - true - false - - - - Inc - - - Src - - - Drivers - - - Middlewares - - - - diff --git a/Samples/Nucleo-TPM/L4A6RG/startup/startup_stm32l4a6xx.s b/Samples/Nucleo-TPM/L4A6RG/startup/startup_stm32l4a6xx.s deleted file mode 100644 index 15a7f5a3..00000000 --- a/Samples/Nucleo-TPM/L4A6RG/startup/startup_stm32l4a6xx.s +++ /dev/null @@ -1,563 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32l4a6xx.s - * @author MCD Application Team - * @brief STM32L4A6xx devices vector table GCC toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address, - * - Configure the clock system - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m4 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - -.equ BootRAM, 0xF1E0F85F -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr sp, =_estack /* Atollic update: set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call static constructors */ - bl __libc_init_array -/* Call the application's entry point.*/ - bl main - -LoopForever: - b LoopForever - -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * - * @param None - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex-M4. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler - .word PVD_PVM_IRQHandler - .word TAMP_STAMP_IRQHandler - .word RTC_WKUP_IRQHandler - .word FLASH_IRQHandler - .word RCC_IRQHandler - .word EXTI0_IRQHandler - .word EXTI1_IRQHandler - .word EXTI2_IRQHandler - .word EXTI3_IRQHandler - .word EXTI4_IRQHandler - .word DMA1_Channel1_IRQHandler - .word DMA1_Channel2_IRQHandler - .word DMA1_Channel3_IRQHandler - .word DMA1_Channel4_IRQHandler - .word DMA1_Channel5_IRQHandler - .word DMA1_Channel6_IRQHandler - .word DMA1_Channel7_IRQHandler - .word ADC1_2_IRQHandler - .word CAN1_TX_IRQHandler - .word CAN1_RX0_IRQHandler - .word CAN1_RX1_IRQHandler - .word CAN1_SCE_IRQHandler - .word EXTI9_5_IRQHandler - .word TIM1_BRK_TIM15_IRQHandler - .word TIM1_UP_TIM16_IRQHandler - .word TIM1_TRG_COM_TIM17_IRQHandler - .word TIM1_CC_IRQHandler - .word TIM2_IRQHandler - .word TIM3_IRQHandler - .word TIM4_IRQHandler - .word I2C1_EV_IRQHandler - .word I2C1_ER_IRQHandler - .word I2C2_EV_IRQHandler - .word I2C2_ER_IRQHandler - .word SPI1_IRQHandler - .word SPI2_IRQHandler - .word USART1_IRQHandler - .word USART2_IRQHandler - .word USART3_IRQHandler - .word EXTI15_10_IRQHandler - .word RTC_Alarm_IRQHandler - .word DFSDM1_FLT3_IRQHandler - .word TIM8_BRK_IRQHandler - .word TIM8_UP_IRQHandler - .word TIM8_TRG_COM_IRQHandler - .word TIM8_CC_IRQHandler - .word ADC3_IRQHandler - .word FMC_IRQHandler - .word SDMMC1_IRQHandler - .word TIM5_IRQHandler - .word SPI3_IRQHandler - .word UART4_IRQHandler - .word UART5_IRQHandler - .word TIM6_DAC_IRQHandler - .word TIM7_IRQHandler - .word DMA2_Channel1_IRQHandler - .word DMA2_Channel2_IRQHandler - .word DMA2_Channel3_IRQHandler - .word DMA2_Channel4_IRQHandler - .word DMA2_Channel5_IRQHandler - .word DFSDM1_FLT0_IRQHandler - .word DFSDM1_FLT1_IRQHandler - .word DFSDM1_FLT2_IRQHandler - .word COMP_IRQHandler - .word LPTIM1_IRQHandler - .word LPTIM2_IRQHandler - .word OTG_FS_IRQHandler - .word DMA2_Channel6_IRQHandler - .word DMA2_Channel7_IRQHandler - .word LPUART1_IRQHandler - .word QUADSPI_IRQHandler - .word I2C3_EV_IRQHandler - .word I2C3_ER_IRQHandler - .word SAI1_IRQHandler - .word SAI2_IRQHandler - .word SWPMI1_IRQHandler - .word TSC_IRQHandler - .word LCD_IRQHandler - .word AES_IRQHandler - .word HASH_RNG_IRQHandler - .word FPU_IRQHandler - .word CRS_IRQHandler - .word I2C4_EV_IRQHandler - .word I2C4_ER_IRQHandler - .word DCMI_IRQHandler - .word CAN2_TX_IRQHandler - .word CAN2_RX0_IRQHandler - .word CAN2_RX1_IRQHandler - .word CAN2_SCE_IRQHandler - .word DMA2D_IRQHandler - - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_PVM_IRQHandler - .thumb_set PVD_PVM_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_IRQHandler - .thumb_set DMA1_Channel2_IRQHandler,Default_Handler - - .weak DMA1_Channel3_IRQHandler - .thumb_set DMA1_Channel3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_IRQHandler - .thumb_set DMA1_Channel4_IRQHandler,Default_Handler - - .weak DMA1_Channel5_IRQHandler - .thumb_set DMA1_Channel5_IRQHandler,Default_Handler - - .weak DMA1_Channel6_IRQHandler - .thumb_set DMA1_Channel6_IRQHandler,Default_Handler - - .weak DMA1_Channel7_IRQHandler - .thumb_set DMA1_Channel7_IRQHandler,Default_Handler - - .weak ADC1_2_IRQHandler - .thumb_set ADC1_2_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM15_IRQHandler - .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM16_IRQHandler - .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM17_IRQHandler - .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak DFSDM1_FLT3_IRQHandler - .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler - - .weak TIM8_BRK_IRQHandler - .thumb_set TIM8_BRK_IRQHandler,Default_Handler - - .weak TIM8_UP_IRQHandler - .thumb_set TIM8_UP_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_IRQHandler - .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak ADC3_IRQHandler - .thumb_set ADC3_IRQHandler,Default_Handler - - .weak FMC_IRQHandler - .thumb_set FMC_IRQHandler,Default_Handler - - .weak SDMMC1_IRQHandler - .thumb_set SDMMC1_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Channel1_IRQHandler - .thumb_set DMA2_Channel1_IRQHandler,Default_Handler - - .weak DMA2_Channel2_IRQHandler - .thumb_set DMA2_Channel2_IRQHandler,Default_Handler - - .weak DMA2_Channel3_IRQHandler - .thumb_set DMA2_Channel3_IRQHandler,Default_Handler - - .weak DMA2_Channel4_IRQHandler - .thumb_set DMA2_Channel4_IRQHandler,Default_Handler - - .weak DMA2_Channel5_IRQHandler - .thumb_set DMA2_Channel5_IRQHandler,Default_Handler - - .weak DFSDM1_FLT0_IRQHandler - .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler - - .weak DFSDM1_FLT1_IRQHandler - .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler - - .weak DFSDM1_FLT2_IRQHandler - .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler - - .weak COMP_IRQHandler - .thumb_set COMP_IRQHandler,Default_Handler - - .weak LPTIM1_IRQHandler - .thumb_set LPTIM1_IRQHandler,Default_Handler - - .weak LPTIM2_IRQHandler - .thumb_set LPTIM2_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Channel6_IRQHandler - .thumb_set DMA2_Channel6_IRQHandler,Default_Handler - - .weak DMA2_Channel7_IRQHandler - .thumb_set DMA2_Channel7_IRQHandler,Default_Handler - - .weak LPUART1_IRQHandler - .thumb_set LPUART1_IRQHandler,Default_Handler - - .weak QUADSPI_IRQHandler - .thumb_set QUADSPI_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak SAI1_IRQHandler - .thumb_set SAI1_IRQHandler,Default_Handler - - .weak SAI2_IRQHandler - .thumb_set SAI2_IRQHandler,Default_Handler - - .weak SWPMI1_IRQHandler - .thumb_set SWPMI1_IRQHandler,Default_Handler - - .weak TSC_IRQHandler - .thumb_set TSC_IRQHandler,Default_Handler - - .weak LCD_IRQHandler - .thumb_set LCD_IRQHandler,Default_Handler - - .weak AES_IRQHandler - .thumb_set AES_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - - .weak CRS_IRQHandler - .thumb_set CRS_IRQHandler,Default_Handler - - .weak I2C4_EV_IRQHandler - .thumb_set I2C4_EV_IRQHandler,Default_Handler - - .weak I2C4_ER_IRQHandler - .thumb_set I2C4_ER_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak DMA2D_IRQHandler - .thumb_set DMA2D_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Samples/Nucleo-TPM/Shared/Platform/include/PlatformData.h b/Samples/Nucleo-TPM/Shared/Platform/include/PlatformData.h deleted file mode 100644 index 045e8446..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/include/PlatformData.h +++ /dev/null @@ -1,126 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -// This file contains the instance data for the Platform module. It is collected -// in this file so that the state of the module is easier to manage. - -#ifndef _PLATFORM_DATA_H_ -#define _PLATFORM_DATA_H_ - - -#include "Implementation.h" - -// From Cancel.c -// Cancel flag. It is initialized as FALSE, which indicate the command is not -// being canceled -extern int s_isCanceled; - -#include - -#ifndef HARDWARE_CLOCK -// This is the value returned the last time that the system clock was read. This -// is only relevant for a simulator or virtual TPM. -extern clock_t s_realTimePrevious; -// This is the rate adjusted value that is the equivalent of what would be read from -// a hardware register that produced rate adjusted time. -extern clock_t s_tpmTime; -#endif // HARDWARE_CLOCK - -// This value indicates that the timer was reset -extern BOOL s_timerReset; -// This value indicates that the timer was stopped. It causes a clock discontinuity. -extern BOOL s_timerStopped; - -// CLOCK_NOMINAL is the number of hardware ticks per mS. A value of 300000 means -// that the nominal clock rate used to drive the hardware clock is 30 MHz. The -// adjustment rates are used to determine the conversion of the hardware ticks to -// internal hardware clock value. In practice, we would expect that there woudl be -// a hardware register will accumulated mS. It would be incremented by the output -// of a pre-scaler. The pre-scaler would divide the ticks from the clock by some -// value that would compensate for the difference between clock time and real time. -// The code in Clock does the emulation of this function. -#define CLOCK_NOMINAL 30000 -// A 1% change in rate is 300 counts -#define CLOCK_ADJUST_COARSE 300 -// A 0.1% change in rate is 30 counts -#define CLOCK_ADJUST_MEDIUM 30 -// A minimum change in rate is 1 count -#define CLOCK_ADJUST_FINE 1 -// The clock tolerance is +/-15% (4500 counts) -// Allow some guard band (16.7%) -#define CLOCK_ADJUST_LIMIT 5000 - -// This variable records the time when _plat__TimerReset is called. This mechanism -// allow us to subtract the time when TPM is power off from the total -// time reported by clock() function -extern uint64_t s_initClock; - -// This variable records the timer adjustment factor. -extern unsigned int s_adjustRate; - -// From LocalityPlat.c -// Locality of current command -extern unsigned char s_locality; - -// From NVMem.c -// Choose if the NV memory should be backed by RAM or by file. -// If this macro is defined, then a file is used as NV. If it is not defined, -// then RAM is used to back NV memory. Comment out to use RAM. -#define FILE_BACKED_NV -#if defined FILE_BACKED_NV -#include -// A file to emulate NV storage -extern FILE* s_NVFile; -#endif -extern unsigned char s_NV[NV_MEMORY_SIZE]; -extern BOOL s_NvIsAvailable; -extern BOOL s_NV_unrecoverable; -extern BOOL s_NV_recoverable; - - -// From PPPlat.c -// Physical presence. It is initialized to FALSE -extern BOOL s_physicalPresence; - -// From Power -extern BOOL s_powerLost; - -// From Entropy.c -extern uint32_t lastEntropy; - -extern int firstValue; - - -#endif // _PLATFORM_DATA_H_ diff --git a/Samples/Nucleo-TPM/Shared/Platform/include/prototypes/Platform_fp.h b/Samples/Nucleo-TPM/Shared/Platform/include/prototypes/Platform_fp.h deleted file mode 100644 index 8fa93abe..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/include/prototypes/Platform_fp.h +++ /dev/null @@ -1,443 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/*(Auto) - Automatically Generated by TpmPrototypes version 2.2 February 10, 2016 - Date: Mar 23, 2017 Time: 03:31:52 PM -*/ - -#ifndef _PLATFORM_FP_H_ -#define _PLATFORM_FP_H_ - -//** From Cancel.c - - - -//***_plat__IsCanceled() -// Check if the cancel flag is set -// return type: BOOL -// TRUE(1) if cancel flag is set -// FALSE(0) if cancel flag is not set -LIB_EXPORT int -_plat__IsCanceled( - void - ); - -// Set cancel flag. -LIB_EXPORT void -_plat__SetCancel( - void - ); - -//***_plat__ClearCancel() -// Clear cancel flag -LIB_EXPORT void -_plat__ClearCancel( - void - ); - - -//** From Clock.c - - - -//***_plat__TimerReset() -// This function sets current system clock time as t0 for counting TPM time. -// This function is called at a power on event to reset the clock. When the clock -// is reset, the indication that the clock was stopped is also set. -LIB_EXPORT void -_plat__TimerReset( - void - ); - -//*** _plat__TimerRestart() -// This function should be called in order to simulate the restart of the timer -// should it be stopped while power is still applied. -LIB_EXPORT void -_plat__TimerRestart( - void - ); - -//***_plat__TimerRead() -// This function provides access to the tick timer of the platform. The TPM code -// uses this value to drive the TPM Clock. -// -// The tick timer is supposed to run when power is applied to the device. This timer -// should not be reset by time events including _TPM_Init. It should only be reset -// when TPM power is re-applied. -// -// If the TPM is run in a protected environment, that environment may provide the -// tick time to the TPM as long as the time provided by the environment is not -// allowed to go backwards. If the time provided by the system can go backwards -// during a power discontinuity, then the _plat__Signal_PowerOn should call -// _plat__TimerReset(). -// -// The code in this function should be replaced by a read of a hardware tick timer. -LIB_EXPORT uint64_t -_plat__TimerRead( - void - ); - -//*** _plat__TimerWasReset() -// This function is used to interrogate the flag indicating if the tick timer has -// been reset. -// -// If the resetFlag parameter is SET, then the flag will be CLEAR before the -// function returns. -LIB_EXPORT BOOL -_plat__TimerWasReset( - void - ); - -//*** _plat__TimerWasStopped() -// This function is used to interrogate the flag indicating if the tick timer has -// been stopped. If so, this is typically a reason to roll the nonce. -// -// This function will CLEAR the s_timerStopped flag before returning. This provides -// functionality that is similar to status register that is cleared when read. This -// is the model used here because it is the one that has the most impact on the TPM -// code as the flag can only be accessed by one entity in the TPM. Any other -// implementation of the hardware can be made to look like a read-once register. -LIB_EXPORT BOOL -_plat__TimerWasStopped( - void - ); - -//***_plat__ClockAdjustRate() -// Adjust the clock rate -LIB_EXPORT void -_plat__ClockAdjustRate( - int adjust // IN: the adjust number. It could be positive - // or negative - ); - - -//** From Entropy.c - - -// return type: int32_t -// < 0 hardware failure of the entropy generator, this is sticky -// >= 0 the returned amount of entropy (bytes) -// -LIB_EXPORT int32_t -_plat__GetEntropy( - unsigned char *entropy, // output buffer - uint32_t amount // amount requested - ); - - -//** From LocalityPlat.c - - - -//***_plat__LocalityGet() -// Get the most recent command locality in locality value form. -// This is an integer value for locality and not a locality structure -// The locality can be 0-4 or 32-255. 5-31 is not allowed. -LIB_EXPORT unsigned char -_plat__LocalityGet( - void - ); - -//***_plat__LocalitySet() -// Set the most recent command locality in locality value form -LIB_EXPORT void -_plat__LocalitySet( - unsigned char locality - ); - - -//** From NVMem.c - - - -//*** _plat__NvErrors() -// This function is used by the simulator to set the error flags in the NV -// subsystem to simulate an error in the NV loading process -LIB_EXPORT void -_plat__NvErrors( - int recoverable, - int unrecoverable - ); - -//***_plat__NVEnable() -// Enable NV memory. -// -// This version just pulls in data from a file. In a real TPM, with NV on chip, -// this function would verify the integrity of the saved context. If the NV -// memory was not on chip but was in something like RPMB, the NV state would be -// read in, decrypted and integrity checked. -// -// The recovery from an integrity failure depends on where the error occurred. It -// it was in the state that is discarded by TPM Reset, then the error is -// recoverable if the TPM is reset. Otherwise, the TPM must go into failure mode. -// return type: int -// 0 if success -// > 0 if receive recoverable error -// <0 if unrecoverable error -LIB_EXPORT int -_plat__NVEnable( - void *platParameter // IN: platform specific parameters - ); - -//***_plat__NVDisable() -// Disable NV memory -LIB_EXPORT void -_plat__NVDisable( - void - ); - -//***_plat__IsNvAvailable() -// Check if NV is available -// return type: int -// 0 NV is available -// 1 NV is not available due to write failure -// 2 NV is not available due to rate limit -LIB_EXPORT int -_plat__IsNvAvailable( - void - ); - -//***_plat__NvMemoryRead() -// Function: Read a chunk of NV memory -LIB_EXPORT void -_plat__NvMemoryRead( - unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void *data // OUT: data buffer - ); - -//*** _plat__NvIsDifferent() -// This function checks to see if the NV is different from the test value. This is -// so that NV will not be written if it has not changed. -// return value: int -// TRUE(1) the NV location is different from the test value -// FALSE(0) the NV location is the same as the test value -LIB_EXPORT int -_plat__NvIsDifferent( - unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void *data // IN: data buffer - ); - -//***_plat__NvMemoryWrite() -// This function is used to update NV memory. The "write" is to a memory copy of -// NV. At the end of the current command, any changes are written to -// the actual NV memory. -// NOTE: A useful optimization would be for this code to compare the current -// contents of NV with the local copy and note the blocks that have changed. Then -// only write those blocks when _plat__NvCommit() is called. -LIB_EXPORT void -_plat__NvMemoryWrite( - unsigned int startOffset, // IN: write start - unsigned int size, // IN: size of bytes to write - void *data // OUT: data buffer - ); - -//***_plat__NvMemoryClear() -// Function is used to set a range of NV memory bytes to an implementation-dependent -// value. The value represents the erase state of the memory. -LIB_EXPORT void -_plat__NvMemoryClear( - unsigned int start, // IN: clear start - unsigned int size // IN: number of bytes to clear - ); - -//***_plat__NvMemoryMove() -// Function: Move a chunk of NV memory from source to destination -// This function should ensure that if there overlap, the original data is -// copied before it is written -LIB_EXPORT void -_plat__NvMemoryMove( - unsigned int sourceOffset, // IN: source offset - unsigned int destOffset, // IN: destination offset - unsigned int size // IN: size of data being moved - ); - -//***_plat__NvCommit() -// Update NV chip -// return type: int -// 0 NV write success -// non-0 NV write fail -LIB_EXPORT int -_plat__NvCommit( - void - ); - -//***_plat__SetNvAvail() -// Set the current NV state to available. This function is for testing purpose -// only. It is not part of the platform NV logic -LIB_EXPORT void -_plat__SetNvAvail( - void - ); - -//***_plat__ClearNvAvail() -// Set the current NV state to unavailable. This function is for testing purpose -// only. It is not part of the platform NV logic -LIB_EXPORT void -_plat__ClearNvAvail( - void - ); - - -//** From PlatformData.c - - - - -//** From PowerPlat.c - - - -//***_plat__Signal_PowerOn() -// Signal platform power on -LIB_EXPORT int -_plat__Signal_PowerOn( - void - ); - -//*** _plat__WasPowerLost() -// Test whether power was lost before a _TPM_Init. -// -// This function will clear the "hardware" indication of power loss before return. -// This means that there can only be one spot in the TPM code where this value -// gets read. This method is used here as it is the most difficult to manage in the -// TPM code and, if the hardware actually works this way, it is hard to make it -// look like anything else. So, the burden is placed on the TPM code rather than the -// platform code -// return type: int -// TRUE(1) power was lost -// FALSE(0) power was not lost -LIB_EXPORT int -_plat__WasPowerLost( - void - ); - -//*** _plat_Signal_Reset() -// This a TPM reset without a power loss. -LIB_EXPORT int -_plat__Signal_Reset( - void - ); - -//***_plat__Signal_PowerOff() -// Signal platform power off -LIB_EXPORT void -_plat__Signal_PowerOff( - void - ); - - -//** From PPPlat.c - - - -//***_plat__PhysicalPresenceAsserted() -// Check if physical presence is signaled -// return type: int -// TRUE(1) if physical presence is signaled -// FALSE(0) if physical presence is not signaled -LIB_EXPORT int -_plat__PhysicalPresenceAsserted( - void - ); - -//***_plat__Signal_PhysicalPresenceOn() -// Signal physical presence on -LIB_EXPORT void -_plat__Signal_PhysicalPresenceOn( - void - ); - -//***_plat__Signal_PhysicalPresenceOff() -// Signal physical presence off -LIB_EXPORT void -_plat__Signal_PhysicalPresenceOff( - void - ); - - -//** From RunCommand.c - - - -//***_plat__RunCommand() -// This version of RunCommand will set up a jum_buf and call ExecuteCommand(). If -// the command executes without failing, it will return and RunCommand will return. -// If there is a failure in the command, then _plat__Fail() is called and it will -// longjump back to RunCommand which will call ExecuteCommand again. However, this -// time, the TPM will be in failure mode so ExecuteCommand will simply build -// a failure response and return. -LIB_EXPORT void -_plat__RunCommand( - unsigned int requestSize, // IN: command buffer size - unsigned char *request, // IN: command buffer - unsigned int *responseSize, // IN/OUT: response buffer size - unsigned char **response // IN/OUT: response buffer - ); - -//***_plat__Fail() -// This is the platform depended failure exit for the TPM. -LIB_EXPORT NORETURN void -_plat__FailDetailed( - char * file, - int line, - const char * func - ); -#define _plat__Fail() _plat__FailDetailed(__FILE__, __LINE__, __FUNCTION__) - - -//** From Unique.c - - - -//** _plat__GetUnique() -// This function is used to access the platform-specific unique value. -// This function places the unique value in the provided buffer ('b') -// and returns the number of bytes transferred. The function will not -// copy more data than 'bSize'. -// NOTE: If a platform unique value has unequal distribution of uniqueness -// and 'bSize' is smaller than the size of the unique value, the 'bSize' -// portion with the most uniqueness should be returned. -LIB_EXPORT uint32_t -_plat__GetUnique( - uint32_t which, // authorities (0) or details - uint32_t bSize, // size of the buffer - unsigned char *b // output buffer - ); - - -#endif // _PLATFORM_FP_H_ diff --git a/Samples/Nucleo-TPM/Shared/Platform/src/Cancel.c b/Samples/Nucleo-TPM/Shared/Platform/src/Cancel.c deleted file mode 100644 index fb5d7e3d..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/src/Cancel.c +++ /dev/null @@ -1,81 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//**Introduction -/* - This module simulates the cancel pins on the TPM. -*/ -//** Includes, Typedefs, Structures, and Defines -#include "PlatformData.h" -#include "Platform_fp.h" - -//** Functions - -//***_plat__IsCanceled() -// Check if the cancel flag is set -// return type: BOOL -// TRUE(1) if cancel flag is set -// FALSE(0) if cancel flag is not set -LIB_EXPORT int -_plat__IsCanceled( - void - ) -{ - // return cancel flag - return s_isCanceled; -} - -//***_plat__SetCancel() - -// Set cancel flag. -LIB_EXPORT void -_plat__SetCancel( - void - ) -{ - s_isCanceled = TRUE; - return; -} - -//***_plat__ClearCancel() -// Clear cancel flag -LIB_EXPORT void -_plat__ClearCancel( - void - ) -{ - s_isCanceled = FALSE; - return; -} \ No newline at end of file diff --git a/Samples/Nucleo-TPM/Shared/Platform/src/Clock.c b/Samples/Nucleo-TPM/Shared/Platform/src/Clock.c deleted file mode 100644 index e0c6b0a8..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/src/Clock.c +++ /dev/null @@ -1,246 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// This file contains the routines that are used by the simulator to mimic -// a hardware clock on a TPM. - -// In this implementation, all the time values are measured in millisecond. -// However, the precision of the clock functions may be implementation dependent. - -//** Includes and Data Definitions -#include "PlatformData.h" -#include "Platform_fp.h" -#include "TpmFail_fp.h" -#include - -//** Simulator Functions -//*** Introduction -// This set of functions is intended to be called by the simulator environment in -// order to simulate hardware events. - -//***_plat__TimerReset() -// This function sets current system clock time as t0 for counting TPM time. -// This function is called at a power on event to reset the clock. When the clock -// is reset, the indication that the clock was stopped is also set. -LIB_EXPORT void -_plat__TimerReset( - void - ) -{ - s_realTimePrevious = clock(); - s_tpmTime = 0; - s_adjustRate = CLOCK_NOMINAL; - s_timerReset = TRUE; - s_timerStopped = TRUE; - return; -} - -//*** _plat__TimerRestart() -// This function should be called in order to simulate the restart of the timer -// should it be stopped while power is still applied. -LIB_EXPORT void -_plat__TimerRestart( - void - ) -{ - s_timerStopped = TRUE; - return; -} - - -//** Functions Used by TPM -//*** Introduction -// These functions are called by the TPM code. They should be replaced by -// appropriated hardware functions. - -//***_plat__TimerRead() -// This function provides access to the tick timer of the platform. The TPM code -// uses this value to drive the TPM Clock. -// -// The tick timer is supposed to run when power is applied to the device. This timer -// should not be reset by time events including _TPM_Init. It should only be reset -// when TPM power is re-applied. -// -// If the TPM is run in a protected environment, that environment may provide the -// tick time to the TPM as long as the time provided by the environment is not -// allowed to go backwards. If the time provided by the system can go backwards -// during a power discontinuity, then the _plat__Signal_PowerOn should call -// _plat__TimerReset(). -// -// The code in this function should be replaced by a read of a hardware tick timer. -LIB_EXPORT uint64_t -_plat__TimerRead( - void - ) -{ -#ifdef HARDWARE_CLOCK -#error "need a defintion for reading the hardware clock" - return HARDWARE_CLOCK -#else -#define BILLION 1000000000 -#define MILLION 1000000 -#define THOUSAND 1000 - clock_t timeDiff; - uint64_t adjusted; - - // Save the value previously read from the system clock - timeDiff = s_realTimePrevious; - // update with the current value of the system clock - s_realTimePrevious = clock(); - // In the place below when we "put back" the unused part of the timeDiff - // it is possible that we can put back more than we take out. That is, we could - // take out 1000 mSec, rate adjust it and put back 1001 mS. This means that - // on a subsequent call, time may not have caught up. Rather than trying - // to rate adjust this, just stop time. This only occurs in a simulation so - // time for more than one command being the same should not be an issue. - if(timeDiff >= s_realTimePrevious) - { - s_realTimePrevious = timeDiff; - return s_tpmTime; - } - // Compute the amount of time since the last call to the system clock - timeDiff = s_realTimePrevious - timeDiff; - - // Do the time rate adjustment and conversion from CLOCKS_PER_SEC to mSec - adjusted = (((uint64_t)timeDiff * (THOUSAND * CLOCK_NOMINAL)) - / ((uint64_t)s_adjustRate * CLOCKS_PER_SEC)); - - s_tpmTime += (clock_t)adjusted; - - // Might have some rounding error that would loose CLOCKS. See what is not - // being used. As mentioned above, this could result in putting back more than - // is taken out - adjusted = (adjusted * ((uint64_t)s_adjustRate * CLOCKS_PER_SEC)) - / (THOUSAND * CLOCK_NOMINAL); - - // If adjusted is not the same as timeDiff, then there is some rounding - // error that needs to be pushed back into the previous sample. - // NOTE: the following is so that the fact that everything is signed will not - // matter. - s_realTimePrevious = (clock_t)((int64_t)s_realTimePrevious - adjusted); - s_realTimePrevious += timeDiff; - -#ifdef DEBUGGING_TIME - // Put this in so that TPM time will pass much faster than real time when - // doing debug. - // A value of 1000 for DEBUG_TIME_MULTIPLER will make each ms into a second - // A good value might be 100 - return (s_tpmTime * DEBUG_TIME_MULTIPLIER); -#endif - return s_tpmTime; -#endif -} - - - -//*** _plat__TimerWasReset() -// This function is used to interrogate the flag indicating if the tick timer has -// been reset. -// -// If the resetFlag parameter is SET, then the flag will be CLEAR before the -// function returns. -LIB_EXPORT BOOL -_plat__TimerWasReset( - void - ) -{ - BOOL retVal = s_timerReset; - s_timerReset = FALSE; - return retVal; -} - -//*** _plat__TimerWasStopped() -// This function is used to interrogate the flag indicating if the tick timer has -// been stopped. If so, this is typically a reason to roll the nonce. -// -// This function will CLEAR the s_timerStopped flag before returning. This provides -// functionality that is similar to status register that is cleared when read. This -// is the model used here because it is the one that has the most impact on the TPM -// code as the flag can only be accessed by one entity in the TPM. Any other -// implementation of the hardware can be made to look like a read-once register. -LIB_EXPORT BOOL -_plat__TimerWasStopped( - void - ) -{ - BOOL retVal = s_timerStopped; - s_timerStopped = FALSE; - return retVal; -} - -//***_plat__ClockAdjustRate() -// Adjust the clock rate -LIB_EXPORT void -_plat__ClockAdjustRate( - int adjust // IN: the adjust number. It could be positive - // or negative - ) -{ - // We expect the caller should only use a fixed set of constant values to - // adjust the rate - switch(adjust) - { - case CLOCK_ADJUST_COARSE: - s_adjustRate += CLOCK_ADJUST_COARSE; - break; - case -CLOCK_ADJUST_COARSE: - s_adjustRate -= CLOCK_ADJUST_COARSE; - break; - case CLOCK_ADJUST_MEDIUM: - s_adjustRate += CLOCK_ADJUST_MEDIUM; - break; - case -CLOCK_ADJUST_MEDIUM: - s_adjustRate -= CLOCK_ADJUST_MEDIUM; - break; - case CLOCK_ADJUST_FINE: - s_adjustRate += CLOCK_ADJUST_FINE; - break; - case -CLOCK_ADJUST_FINE: - s_adjustRate -= CLOCK_ADJUST_FINE; - break; - default: - // ignore any other values; - break; - } - - if(s_adjustRate > (CLOCK_NOMINAL + CLOCK_ADJUST_LIMIT)) - s_adjustRate = CLOCK_NOMINAL + CLOCK_ADJUST_LIMIT; - if(s_adjustRate < (CLOCK_NOMINAL - CLOCK_ADJUST_LIMIT)) - s_adjustRate = CLOCK_NOMINAL - CLOCK_ADJUST_LIMIT; - - return; -} - diff --git a/Samples/Nucleo-TPM/Shared/Platform/src/Entropy.c b/Samples/Nucleo-TPM/Shared/Platform/src/Entropy.c deleted file mode 100644 index 75c72b87..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/src/Entropy.c +++ /dev/null @@ -1,104 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Includes -#include "stm32l4xx_hal.h" -#include -#include -#include "PlatformData.h" -#include "Platform_fp.h" - -#define MIN(a,b) ((a) < (b) ? (a) : (b)) - -extern RNG_HandleTypeDef hrng; - -//** Local values -// This is the last 32-bits of hardware entropy produced. We have to check to -// see that two consecutive 32-bit values are not the same because -// (according to FIPS 140-2, annex C -// -// 1. If each call to a RNG produces blocks of n bits (where n > 15), the first -// n-bit block generated after power-up, initialization, or reset shall not be -// used, but shall be saved for comparison with the next n-bit block to be -// generated. Each subsequent generation of an n-bit block shall be compared with -// the previously generated block. The test shall fail if any two compared n-bit -// blocks are equal. -extern uint32_t lastEntropy; - -extern int firstValue; - -//** _plat__GetEntropy() -// This function is used to get available hardware entropy. In a hardware -// implementation of this function, there would be no call to the system -// to get entropy. -// If the caller does not ask for any entropy, then this is a startup indication -// and 'firstValue' should be reset. - -// return type: int32_t -// < 0 hardware failure of the entropy generator, this is sticky -// >= 0 the returned amount of entropy (bytes) -// -LIB_EXPORT int32_t -_plat__GetEntropy( - unsigned char *entropy, // output buffer - uint32_t amount // amount requested - ) -{ - uint32_t random32bit; - - if(amount == 0) - { - firstValue = 1; - return 0; - } - - if(firstValue) - { - firstValue = 0; - } - - for(uint32_t n = 0; n < amount; n += sizeof(random32bit)) - { - if((HAL_RNG_GenerateRandomNumber(&hrng, &random32bit) != HAL_OK) || - (~firstValue && (lastEntropy == random32bit))) - { - return -1; - } - memcpy(&entropy[n], &random32bit, MIN(sizeof(random32bit), amount - n)); - lastEntropy = random32bit; - } - - return (int32_t)amount; -} diff --git a/Samples/Nucleo-TPM/Shared/Platform/src/LocalityPlat.c b/Samples/Nucleo-TPM/Shared/Platform/src/LocalityPlat.c deleted file mode 100644 index a38bbb36..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/src/LocalityPlat.c +++ /dev/null @@ -1,66 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Includes -#include "PlatformData.h" -#include "Platform_fp.h" - -//** Functions - -//***_plat__LocalityGet() -// Get the most recent command locality in locality value form. -// This is an integer value for locality and not a locality structure -// The locality can be 0-4 or 32-255. 5-31 is not allowed. -LIB_EXPORT unsigned char -_plat__LocalityGet( - void - ) -{ - return s_locality; - -} - -//***_plat__LocalitySet() -// Set the most recent command locality in locality value form -LIB_EXPORT void -_plat__LocalitySet( - unsigned char locality - ) -{ - if(locality > 4 && locality < 32) - locality = 0; - s_locality = locality; - return; -} diff --git a/Samples/Nucleo-TPM/Shared/Platform/src/NVMem.c b/Samples/Nucleo-TPM/Shared/Platform/src/NVMem.c deleted file mode 100644 index 28fb865d..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/src/NVMem.c +++ /dev/null @@ -1,558 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//**Introduction -/* - This file contains the NV read and write access methods. This implementation - uses RAM/file and does not manage the RAM/file as NV blocks. - The implementation may become more sophisticated over time. -*/ - -//** Includes -#include -#include -#include -#include -#include -#include "StmUtil.h" -#undef INLINE -#include "stm32l4xx_hal.h" -#include "PlatformData.h" -#include "Platform_fp.h" - -#define NVINTEGRITYMAGIC (0x44494E54) // TNID - TPM NV Integrity Data -typedef union -{ - struct - { - struct - { - uint32_t magic; - time_t created; - time_t lastWrite; - uint32_t writeCount; - uint8_t nvDigest[WC_SHA512_DIGEST_SIZE]; - } sig; - uint8_t nvSignature[WC_SHA512_DIGEST_SIZE]; - } s; - unsigned char b[0x800]; - unsigned int w[0x200]; -} IntegrityData_t, *pIntegrityData_t; - -__attribute__((section(".integrity"))) const IntegrityData_t nvIntegrity; -__attribute__((section(".nvfile"))) const uint8_t nvFile[NV_MEMORY_SIZE]; - -//**Functions -static BOOL NvHash2Data(uint8_t* data1, uint32_t data1Size, uint8_t* data2, uint32_t data2Size, uint8_t* digest) -{ - wc_Sha512 hash; - if(wc_InitSha512(&hash)) - { - dbgPrint("ERROR wc_InitSha512() failed.\r\n"); - return FALSE; - } - else if(data1 && (data1Size > 0) && wc_Sha512Update(&hash, data1, data1Size)) - { - dbgPrint("ERROR wc_Sha512Update() failed.\r\n"); - return FALSE; - } - else if(data2 && (data2Size > 0) && wc_Sha512Update(&hash, data2, data2Size)) - { - dbgPrint("ERROR wc_Sha512Update() failed.\r\n"); - return FALSE; - } - else if(wc_Sha512Final(&hash, (byte*)digest)) - { - dbgPrint("ERROR wc_Sha512Final failed.\r\n"); - return FALSE; - } - wc_Sha512Free(&hash); - return TRUE; -} - -static BOOL NvErasePages(void* dest, uint32_t size) -{ - BOOL result = TRUE; - uint32_t pageError = 0; - FLASH_EraseInitTypeDef eraseInfo = {FLASH_TYPEERASE_PAGES, - FLASH_BANK_1, - ((uint32_t)dest - 0x08000000) / 0x800, - (size + 0x7ff) / 0x800}; - - // Open the memory protection - for(uint32_t m = 0; m < 10; m++) - { - if((result = (HAL_FLASH_Unlock() == HAL_OK)) != FALSE) - { - break; - } - dbgPrint("WARNING HAL_FLASH_Unlock() retry %u.\r\n", (unsigned int)m); - // Bring the flash subsystem into a defined state. - HAL_FLASH_Lock(); - HAL_Delay(1); - } - if(!result) - { - dbgPrint("ERROR HAL_FLASH_Unlock() failed.\r\n"); - goto Cleanup; - } - - // Erase the necessary pages - for(uint32_t m = 0; m < 10; m++) - { - if((result = ((HAL_FLASHEx_Erase(&eraseInfo, &pageError) == HAL_OK) && (pageError == 0xffffffff)))) - { - break; - } - dbgPrint("WARNING HAL_FLASHEx_Erase() retry %u.\r\n", (unsigned int)m); - } - if(!result) - { - dbgPrint("ERROR HAL_FLASHEx_Erase() failed.\r\n"); - goto Cleanup; - } - -Cleanup: - HAL_FLASH_Lock(); - return result; -} - -static BOOL NvFlashPages(void* dest, void* src, uint32_t size) -{ - BOOL result = TRUE; - - // Parameter check - if(!(result = ((((uint32_t)src % sizeof(uint32_t)) == 0)))) - { - goto Cleanup; - } - - // Erase the required area - if(!(result = NvErasePages(dest, size))) - { - goto Cleanup; - } - - // Open the memory protection - if(!(result = (HAL_FLASH_Unlock() == HAL_OK))) - { - goto Cleanup; - } - - // Flash the src buffer 8 byte at a time and verify - for(uint32_t n = 0; n < ((size + sizeof(uint64_t) - 1) / sizeof(uint64_t)); n++) - { - result = FALSE; - for(uint32_t m = 0; m < 10; m++) - { - uint32_t progPtr = (uint32_t)&(((uint64_t*)dest)[n]); - uint64_t progData = ((uint64_t*)src)[n]; - if((progData == *((uint64_t*)progPtr)) || - ((result = (HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, progPtr, progData) == HAL_OK)) && - (progData == *((uint64_t*)progPtr)))) - { - result = TRUE; - break; - } - dbgPrint("WARNING HAL_FLASH_Program() retry %u.\r\n", (unsigned int)m); - } - if(result == FALSE) - { - dbgPrint("ERROR HAL_FLASH_Program() failed.\r\n"); - goto Cleanup; - } - } - -Cleanup: - HAL_FLASH_Lock(); - return result; -} - -char* NvMakeTimeStamp(time_t time, char* nvTimeStamp, uint32_t size) -{ - struct tm* timeInfo = NULL; - timeInfo = gmtime(&time); - snprintf(nvTimeStamp, size, "%04d.%02d.%02d-%02d:%02d:%02dGMT", - timeInfo->tm_year + 1900, - timeInfo->tm_mon + 1, - timeInfo->tm_mday, - timeInfo->tm_hour, - timeInfo->tm_min, - timeInfo->tm_sec); - return nvTimeStamp; -} -//*** _plat__NvErrors() -// This function is used by the simulator to set the error flags in the NV -// subsystem to simulate an error in the NV loading process -//LIB_EXPORT void -//_plat__NvErrors( -// int recoverable, -// int unrecoverable -// ) -//{ -// s_NV_unrecoverable = unrecoverable; -// s_NV_recoverable = recoverable; -//} - -//***_plat__NVEnable() -// Enable NV memory. -// -// This version just pulls in data from a file. In a real TPM, with NV on chip, -// this function would verify the integrity of the saved context. If the NV -// memory was not on chip but was in something like RPMB, the NV state would be -// read in, decrypted and integrity checked. -// -// The recovery from an integrity failure depends on where the error occurred. It -// it was in the state that is discarded by TPM Reset, then the error is -// recoverable if the TPM is reset. Otherwise, the TPM must go into failure mode. -// return type: int -// 0 if success -// > 0 if receive recoverable error -// <0 if unrecoverable error -LIB_EXPORT int -_plat__NVEnable( - void *platParameter // IN: platform specific parameters - ) -{ - BOOL result = TRUE; - uint8_t tpmUnique[WC_SHA512_DIGEST_SIZE]; - uint8_t tpmUniqueSize = 0; - tpmUniqueSize = _plat__GetUnique(0, sizeof(tpmUnique), tpmUnique); - - // Start assuming everything is OK - s_NV_unrecoverable = FALSE; - s_NV_recoverable = FALSE; - memcpy(s_NV, nvFile, sizeof(s_NV)); - - // Perform integrity verification - if((nvIntegrity.s.sig.magic != NVINTEGRITYMAGIC) || (platParameter)) - { - // Initialize NV - IntegrityData_t newIntegrity = {0}; - - if((result = NvErasePages((uint8_t*)&nvIntegrity, sizeof(nvIntegrity))) == FALSE) - { - dbgPrint("ERROR NvErasePages(nvIntegrity) failed.\r\n"); - s_NV_unrecoverable = TRUE; - goto Cleanup; - } - if((result = NvErasePages((uint8_t*)nvFile, sizeof(nvFile))) == FALSE) - { - dbgPrint("ERROR NvErasePages(nvFile) failed.\r\n"); - s_NV_unrecoverable = TRUE; - goto Cleanup; - } - - newIntegrity.s.sig.magic = NVINTEGRITYMAGIC; - newIntegrity.s.sig.created = time(NULL); - if((result = NvHash2Data((uint8_t*)nvFile, sizeof(nvFile), NULL, 0, newIntegrity.s.sig.nvDigest)) == FALSE) - { - dbgPrint("WARNING NvHash2Data(nvFile) failed.\r\n"); - s_NV_unrecoverable = TRUE; - goto Cleanup; - } - if((result = NvHash2Data(tpmUnique, tpmUniqueSize, (uint8_t*)&newIntegrity.s.sig, sizeof(newIntegrity.s.sig), newIntegrity.s.nvSignature)) == FALSE) - { - dbgPrint("WARNING NvHash2Data(tpmUnique, newIntegrity) failed.\r\n"); - s_NV_unrecoverable = TRUE; - goto Cleanup; - } - if((result = NvFlashPages((uint8_t*)&nvIntegrity, (uint8_t*)&newIntegrity, sizeof(newIntegrity))) == FALSE) - { - dbgPrint("ERROR NvFlashPages(nvIntegrity) failed.\r\n"); - s_NV_unrecoverable = TRUE; - goto Cleanup; - } - dbgPrint("Initialized %dkb NVFile.\r\n", sizeof(nvFile)/1024); - memcpy(s_NV, nvFile, sizeof(s_NV)); - s_NV_recoverable = TRUE; - } - else - { - uint8_t nvDigest[WC_SHA512_DIGEST_SIZE]; - if((result = NvHash2Data(tpmUnique, tpmUniqueSize, (uint8_t*)&nvIntegrity.s.sig, sizeof(nvIntegrity.s.sig), nvDigest)) == FALSE) - { - dbgPrint("WARNING NvHash2Data(tpmUnique, nvIntegrity) failed.\r\n"); - s_NV_unrecoverable = TRUE; - goto Cleanup; - } - if(memcmp(nvDigest, nvIntegrity.s.nvSignature, sizeof(nvDigest))) - { - dbgPrint("WARNING NV signature invalid.\r\n"); - s_NV_unrecoverable = TRUE; - goto Cleanup; - } - if((result = NvHash2Data((uint8_t*)nvFile, sizeof(nvFile), NULL, 0, nvDigest)) == FALSE) - { - dbgPrint("WARNING NvHash2Data(nvFile) filed.\r\n"); - s_NV_unrecoverable = TRUE; - goto Cleanup; - } - if(memcmp(nvDigest, nvIntegrity.s.sig.nvDigest, sizeof(nvDigest))) - { - dbgPrint("WARNING NV integrity measurement invalid.\r\n"); - s_NV_unrecoverable = TRUE; - goto Cleanup; - } - } - char created[50]; - char written[50]; - dbgPrint("NVFile loaded (%dkb, %s created, %d writes, %s last)\r\n", - sizeof(nvFile)/1024, - NvMakeTimeStamp(nvIntegrity.s.sig.created, created, sizeof(created)), - (int)nvIntegrity.s.sig.writeCount, - (nvIntegrity.s.sig.lastWrite) ? NvMakeTimeStamp(nvIntegrity.s.sig.lastWrite, written, sizeof(written)) : "NEVER"); - -Cleanup: - HAL_FLASH_Lock(); - if(s_NV_unrecoverable) - return -1; - return s_NV_recoverable; -} - -//***_plat__NVDisable() -// Disable NV memory -LIB_EXPORT void -_plat__NVDisable( - void - ) -{ - return; -} - -//***_plat__IsNvAvailable() -// Check if NV is available -// return type: int -// 0 NV is available -// 1 NV is not available due to write failure -// 2 NV is not available due to rate limit -LIB_EXPORT int -_plat__IsNvAvailable( - void - ) -{ - // NV is not available if the TPM is in failure mode - if(!s_NvIsAvailable) - return 1; - - return 0; -} - -//***_plat__NvMemoryRead() -// Function: Read a chunk of NV memory -LIB_EXPORT void -_plat__NvMemoryRead( - unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void *data // OUT: data buffer - ) -{ - assert(startOffset + size <= NV_MEMORY_SIZE); - - // Copy data from RAM - memcpy(data, &s_NV[startOffset], size); - return; -} - -//*** _plat__NvIsDifferent() -// This function checks to see if the NV is different from the test value. This is -// so that NV will not be written if it has not changed. -// return value: int -// TRUE(1) the NV location is different from the test value -// FALSE(0) the NV location is the same as the test value -LIB_EXPORT int -_plat__NvIsDifferent( - unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void *data // IN: data buffer - ) -{ - return (memcmp(&s_NV[startOffset], data, size) != 0); -} - -//***_plat__NvMemoryWrite() -// This function is used to update NV memory. The "write" is to a memory copy of -// NV. At the end of the current command, any changes are written to -// the actual NV memory. -// NOTE: A useful optimization would be for this code to compare the current -// contents of NV with the local copy and note the blocks that have changed. Then -// only write those blocks when _plat__NvCommit() is called. -LIB_EXPORT void -_plat__NvMemoryWrite( - unsigned int startOffset, // IN: write start - unsigned int size, // IN: size of bytes to write - void *data // OUT: data buffer - ) -{ - assert(startOffset + size <= NV_MEMORY_SIZE); - - // Copy the data to the NV image - memcpy(&s_NV[startOffset], data, size); -} - -//***_plat__NvMemoryClear() -// Function is used to set a range of NV memory bytes to an implementation-dependent -// value. The value represents the erase state of the memory. -LIB_EXPORT void -_plat__NvMemoryClear( - unsigned int start, // IN: clear start - unsigned int size // IN: number of bytes to clear - ) -{ - assert(start + size <= NV_MEMORY_SIZE); - - // In this implementation, assume that the errase value for NV is all 1s - memset(&s_NV[start], 0xff, size); -} - -//***_plat__NvMemoryMove() -// Function: Move a chunk of NV memory from source to destination -// This function should ensure that if there overlap, the original data is -// copied before it is written -LIB_EXPORT void -_plat__NvMemoryMove( - unsigned int sourceOffset, // IN: source offset - unsigned int destOffset, // IN: destination offset - unsigned int size // IN: size of data being moved - ) -{ - assert(sourceOffset + size <= NV_MEMORY_SIZE); - assert(destOffset + size <= NV_MEMORY_SIZE); - - // Move data in RAM - memmove(&s_NV[destOffset], &s_NV[sourceOffset], size); - - return; -} - -//***_plat__NvCommit() -// Update NV chip -// return type: int -// 0 NV write success -// non-0 NV write fail -LIB_EXPORT int -_plat__NvCommit( - void - ) -{ - BOOL result = TRUE; - char created[50]; - char written[50]; - IntegrityData_t newIntegrity = {0}; - uint8_t tpmUnique[WC_SHA512_DIGEST_SIZE]; - uint8_t tpmUniqueSize = 0; - - tpmUniqueSize = _plat__GetUnique(0, sizeof(tpmUnique), tpmUnique); - memcpy(&newIntegrity, &nvIntegrity, sizeof(newIntegrity)); - - if((result = NvHash2Data(s_NV, sizeof(s_NV), NULL, 0, newIntegrity.s.sig.nvDigest)) == FALSE) - { - dbgPrint("WARNING NvHash2Data(s_NV) failed.\r\n"); - result = FALSE; - goto Cleanup; - } - if((result = NvHash2Data(tpmUnique, tpmUniqueSize, (uint8_t*)&nvIntegrity.s.sig, sizeof(nvIntegrity.s.sig), newIntegrity.s.nvSignature)) == FALSE) - { - dbgPrint("WARNING NvHash2Data(tpmUnique, nvIntegrity) failed.\r\n"); - result = FALSE; - goto Cleanup; - } - - if((memcmp(newIntegrity.s.sig.nvDigest, nvIntegrity.s.sig.nvDigest, sizeof(newIntegrity.s.sig.nvDigest))) || - (memcmp(newIntegrity.s.nvSignature, nvIntegrity.s.nvSignature, sizeof(newIntegrity.s.nvSignature)))) - { - newIntegrity.s.sig.lastWrite = time(NULL); - newIntegrity.s.sig.writeCount++; - if((result = NvHash2Data(tpmUnique, tpmUniqueSize, (uint8_t*)&newIntegrity.s.sig, sizeof(newIntegrity.s.sig), newIntegrity.s.nvSignature)) == FALSE) - { - dbgPrint("WARNING NvHash2Data(tpmUnique, newIntegrity) failed.\r\n"); - result = FALSE; - goto Cleanup; - } - if((result = NvFlashPages((uint8_t*)nvFile, s_NV, sizeof(s_NV))) == FALSE) - { - dbgPrint("ERROR NvFlashPages(nvFile) failed.\r\n"); - result = FALSE; - goto Cleanup; - } - if((result = NvFlashPages((uint8_t*)&nvIntegrity, (uint8_t*)&newIntegrity, sizeof(newIntegrity))) == FALSE) - { - dbgPrint("ERROR NvFlashPages(nvIntegrity) failed.\r\n"); - result = FALSE; - goto Cleanup; - } - dbgPrint("NVFile written (%dkb, %s created, %d writes, %s last)\r\n", - sizeof(nvFile)/1024, - NvMakeTimeStamp(nvIntegrity.s.sig.created, created, sizeof(created)), - (int)nvIntegrity.s.sig.writeCount, - (nvIntegrity.s.sig.lastWrite) ? NvMakeTimeStamp(nvIntegrity.s.sig.lastWrite, written, sizeof(written)) : "NEVER"); - } - else - { - dbgPrint("NVFile unchanged (%dkb, %s created, %d writes, %s last)\r\n", - sizeof(nvFile)/1024, - NvMakeTimeStamp(nvIntegrity.s.sig.created, created, sizeof(created)), - (int)nvIntegrity.s.sig.writeCount, - (nvIntegrity.s.sig.lastWrite) ? NvMakeTimeStamp(nvIntegrity.s.sig.lastWrite, written, sizeof(written)) : "NEVER"); - } - - -Cleanup: - return (result != TRUE); -} - -//***_plat__SetNvAvail() -// Set the current NV state to available. This function is for testing purpose -// only. It is not part of the platform NV logic -LIB_EXPORT void -_plat__SetNvAvail( - void - ) -{ - s_NvIsAvailable = TRUE; - return; -} - -//***_plat__ClearNvAvail() -// Set the current NV state to unavailable. This function is for testing purpose -// only. It is not part of the platform NV logic -LIB_EXPORT void -_plat__ClearNvAvail( - void - ) -{ - s_NvIsAvailable = FALSE; - return; -} diff --git a/Samples/Nucleo-TPM/Shared/Platform/src/PPPlat.c b/Samples/Nucleo-TPM/Shared/Platform/src/PPPlat.c deleted file mode 100644 index 8e0b8a8a..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/src/PPPlat.c +++ /dev/null @@ -1,81 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Description - -// This module simulates the physical present interface pins on the TPM. - -//** Includes -#include "PlatformData.h" -#include "Platform_fp.h" - -//** Functions - -//***_plat__PhysicalPresenceAsserted() -// Check if physical presence is signaled -// return type: int -// TRUE(1) if physical presence is signaled -// FALSE(0) if physical presence is not signaled -LIB_EXPORT int -_plat__PhysicalPresenceAsserted( - void - ) -{ - // Do not know how to check physical presence without real hardware. - // so always return TRUE; - return s_physicalPresence; -} - -//***_plat__Signal_PhysicalPresenceOn() -// Signal physical presence on -LIB_EXPORT void -_plat__Signal_PhysicalPresenceOn( - void - ) -{ - s_physicalPresence = TRUE; - return; -} - -//***_plat__Signal_PhysicalPresenceOff() -// Signal physical presence off -LIB_EXPORT void -_plat__Signal_PhysicalPresenceOff( - void - ) -{ - s_physicalPresence = FALSE; - return; -} \ No newline at end of file diff --git a/Samples/Nucleo-TPM/Shared/Platform/src/PlatformData.c b/Samples/Nucleo-TPM/Shared/Platform/src/PlatformData.c deleted file mode 100644 index e6092e6f..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/src/PlatformData.c +++ /dev/null @@ -1,76 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Description -// This file will instance the TPM variables that are not stack allocated. The -// descriptions for these variables are in Global.h for this project. - -//** Includes -#include "Implementation.h" -#include "PlatformData.h" - -// From Cancel.c -BOOL s_isCanceled; - -// From Clock.c -unsigned int s_adjustRate; -BOOL s_timerReset; -BOOL s_timerStopped; - -#ifndef HARDWARE_CLOCK -#include -clock_t s_realTimePrevious; -clock_t s_tpmTime; -#endif - - -// From LocalityPlat.c -unsigned char s_locality; - -// From Power.c -BOOL s_powerLost; - -// From Entropy.c -uint32_t lastEntropy; -int firstValue; - -// From NVMem.c -unsigned char s_NV[NV_MEMORY_SIZE]; -BOOL s_NvIsAvailable; -BOOL s_NV_unrecoverable; -BOOL s_NV_recoverable; - -// From PPPlat.c -BOOL s_physicalPresence; diff --git a/Samples/Nucleo-TPM/Shared/Platform/src/PowerPlat.c b/Samples/Nucleo-TPM/Shared/Platform/src/PowerPlat.c deleted file mode 100644 index 8d250cdc..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/src/PowerPlat.c +++ /dev/null @@ -1,114 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Includes and Function Prototypes - -#include "PlatformData.h" -#include "Platform_fp.h" -#include "_TPM_Init_fp.h" - -//** Functions - -//***_plat__Signal_PowerOn() -// Signal platform power on -LIB_EXPORT int -_plat__Signal_PowerOn( - void - ) -{ - // Reset the timer - _plat__TimerReset(); - - // Need to indicate that we lost power - s_powerLost = TRUE; - - return 0; -} - -//*** _plat__WasPowerLost() -// Test whether power was lost before a _TPM_Init. -// -// This function will clear the "hardware" indication of power loss before return. -// This means that there can only be one spot in the TPM code where this value -// gets read. This method is used here as it is the most difficult to manage in the -// TPM code and, if the hardware actually works this way, it is hard to make it -// look like anything else. So, the burden is placed on the TPM code rather than the -// platform code -// return type: int -// TRUE(1) power was lost -// FALSE(0) power was not lost -LIB_EXPORT int -_plat__WasPowerLost( - void - ) -{ - BOOL retVal = s_powerLost; - s_powerLost = FALSE; - return retVal; -} - -//*** _plat_Signal_Reset() -// This a TPM reset without a power loss. -LIB_EXPORT int -_plat__Signal_Reset( - void - ) -{ - // Initialize locality - s_locality = 0; - - // Command cancel - s_isCanceled = FALSE; - - _TPM_Init(); - - // if we are doing reset but did not have a power failure, then we should - // not need to reload NV ... - - return 0; -} - -//***_plat__Signal_PowerOff() -// Signal platform power off -LIB_EXPORT void -_plat__Signal_PowerOff( - void - ) -{ - // Prepare NV memory for power off - _plat__NVDisable(); - - return; -} diff --git a/Samples/Nucleo-TPM/Shared/Platform/src/RunCommand.c b/Samples/Nucleo-TPM/Shared/Platform/src/RunCommand.c deleted file mode 100644 index aa97235b..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/src/RunCommand.c +++ /dev/null @@ -1,91 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//**Introduction -// This module provides the platform specific entry and fail processing. The -// _plat__RunCommand() function is used to call to ExecuteCommand() in the TPM code. -// This function does whatever processing is necessary to set up the platform -// in anticipation of the call to the TPM including settup for error processing. -// -// The _plat__Fail() function is called when there is a failure in the TPM. The TPM -// code will have set the flag to indicate that the TPM is in failure mode. -// This call will then recursively call ExecuteCommand in order to build the -// failure mode response. When ExecuteCommand() returns to _plat__Fail(), the -// platform will do some platform specif operation to return to the environment in -// which the TPM is executing. For a simulator, setjmp/longjmp is used. For an OS, -// a system exit to the OS would be appropriate. - -//** Includes and locals -#include "PlatformData.h" -#include "Platform_fp.h" -#include -#include "ExecCommand_fp.h" -#include "StmUtil.h" - -jmp_buf s_jumpBuffer; - -//** Functions - -//***_plat__RunCommand() -// This version of RunCommand will set up a jum_buf and call ExecuteCommand(). If -// the command executes without failing, it will return and RunCommand will return. -// If there is a failure in the command, then _plat__Fail() is called and it will -// longjump back to RunCommand which will call ExecuteCommand again. However, this -// time, the TPM will be in failure mode so ExecuteCommand will simply build -// a failure response and return. -LIB_EXPORT void -_plat__RunCommand( - unsigned int requestSize, // IN: command buffer size - unsigned char *request, // IN: command buffer - unsigned int *responseSize, // IN/OUT: response buffer size - unsigned char **response // IN/OUT: response buffer - ) -{ - setjmp(s_jumpBuffer); - ExecuteCommand((uint32_t)requestSize, request, (uint32_t*)responseSize, response); -} - -//***_plat__Fail() -// This is the platform depended failure exit for the TPM. -LIB_EXPORT NORETURN void -_plat__FailDetailed( - char * file, - int line, - const char * func - ) -{ - dbgPrint("TPMFAIL: %s (%s@%d)\r\n", func, file, line); - longjmp(&s_jumpBuffer[0], 1); -} diff --git a/Samples/Nucleo-TPM/Shared/Platform/src/Unique.c b/Samples/Nucleo-TPM/Shared/Platform/src/Unique.c deleted file mode 100644 index 0e3b88d3..00000000 --- a/Samples/Nucleo-TPM/Shared/Platform/src/Unique.c +++ /dev/null @@ -1,85 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// In some implementations of the TPM, the hardware can provide a secret -// value to the TPM. This secret value is statistically unique to the -// instance of the TPM. Typical uses of this value are to provide -// personalization to the random number generation and as a shared secret -// between the TPM and the manufacturer. - -//** Includes -#include "PlatformData.h" -#include "Platform_fp.h" -#include - -char tpmUnique[WC_SHA512_DIGEST_SIZE] = {0}; - -//** _plat__GetUnique() -// This function is used to access the platform-specific unique value. -// This function places the unique value in the provided buffer ('b') -// and returns the number of bytes transferred. The function will not -// copy more data than 'bSize'. -// NOTE: If a platform unique value has unequal distribution of uniqueness -// and 'bSize' is smaller than the size of the unique value, the 'bSize' -// portion with the most uniqueness should be returned. -LIB_EXPORT uint32_t -_plat__GetUnique( - uint32_t which, // authorities (0) or details - uint32_t bSize, // size of the buffer - unsigned char *b // output buffer - ) -{ - const char *from = tpmUnique; - uint32_t retVal = 0; - - if(which == 0) // the authorities value - { - for(retVal = 0; retVal < bSize; retVal++) - { - *b++ = *from++; - } - } - else - { -#define uSize sizeof(tpmUnique) - b = &b[((bSize < uSize) ? bSize : uSize) - 1]; - for(retVal = 0; retVal < bSize; retVal++) - { - *b-- = *from++; - } - } - return retVal; -} diff --git a/Samples/Nucleo-TPM/Shared/TPMDevice/include/StmUtil.h b/Samples/Nucleo-TPM/Shared/TPMDevice/include/StmUtil.h deleted file mode 100644 index 6a5735eb..00000000 --- a/Samples/Nucleo-TPM/Shared/TPMDevice/include/StmUtil.h +++ /dev/null @@ -1,35 +0,0 @@ -#include - -#define ITMSTDERR (0) -#define ITMSIGNAL (1) -#define ITMCMDRSP (2) -#define ITMCHANNELS (3) -#ifndef NDEBUG -#define dbgPrint(fmt, ...) fprintf(stderr, "%s: " fmt, GetLogStamp(), ##__VA_ARGS__); -#define dbgPrintAppend(fmt, ...) fprintf(stderr, fmt, ##__VA_ARGS__); -#define itmPrint(__channel, fmt, ...) fprintf(g_itm[__channel], "%s: " fmt, GetLogStamp(), ##__VA_ARGS__); -#define itmPrintAppend(__channel, fmt, ...) fprintf(g_itm[__channel], fmt, ##__VA_ARGS__); -#else -#define dbgPrint(fmt, ...) ((void)0) -#define dbgPrintAppend(fmt, ...) ((void)0) -#define itmPrintAppend(__channel, fmt, ...) ((void)0) -#define itmPrint(__channel, fmt, ...) ((void)0) -#endif -#define logError(fmt, ...) dbgPrint("[ERROR] %s (%s@%u) - " fmt, __func__, __FILE__, __LINE__, ##__VA_ARGS__); -#define logWarning(fmt, ...) dbgPrint("[WARNING] %s (%s@%u) - " fmt, __func__, __FILE__, __LINE__, ##__VA_ARGS__); -#define logInfo(fmt, ...) dbgPrint("[Info] %s (%s@%u) - " fmt, __func__, __FILE__, __LINE__, ##__VA_ARGS__); -extern char logStampStr[40]; -extern void* g_itm[ITMCHANNELS]; - -#define ITMFILENO (4) -#define ITMCHANNELNO (32) -void ITM_Out(uint32_t port, uint8_t ch); - -char* GetLogStamp(void); -int BlueButtonTransitionDetected(void); -void SetDutyCycleIndicator(bool on); -void KillUSBLink(void); -void SetRealTimeClock(time_t tm); -void ReadMcuInfo(unsigned char* serial, uint16_t *flashSize, uint16_t *mcuType, uint16_t *mcuRev); -void PerformSystemReset(void); -void InitializeITM(); diff --git a/Samples/Nucleo-TPM/Shared/TPMDevice/include/TpmDevice.h b/Samples/Nucleo-TPM/Shared/TPMDevice/include/TpmDevice.h deleted file mode 100644 index e683570b..00000000 --- a/Samples/Nucleo-TPM/Shared/TPMDevice/include/TpmDevice.h +++ /dev/null @@ -1,78 +0,0 @@ -#define SIGNALMAGIC (0x326d7054) //Tpm2 -#define MAX_TPM_MESSAGE_SIZE (sizeof(unsigned int) + 2048) - -typedef enum -{ - SignalNothing = 0, - SignalShutdown, - SignalReset, - SignalSetClock, - // IN {UINT32 time} - SignalCancelOn, - SignalCancelOff, - SignalCommand, - // IN {BYTE Locality, UINT32 InBufferSize, BYTE[InBufferSize] InBuffer} - // OUT {UINT32 OutBufferSize, BYTE[OutBufferSize] OutBuffer} - SignalResponse, - // OUT {UINT32 OutBufferSize, BYTE[OutBufferSize] OutBuffer} -} signalCode_t; - -typedef struct -{ - unsigned int magic; - signalCode_t signal; - unsigned int dataSize; -} signalHdr_t; - -typedef union -{ - struct - { - unsigned int time; - } SignalSetClockPayload; - struct - { - unsigned int locality; - unsigned int cmdSize; - unsigned char cmd[1]; - } SignalCommandPayload; -} signalPayload_t, *pSignalPayload_t; - -typedef union -{ - signalHdr_t s; - unsigned char b[sizeof(signalHdr_t)]; -} signalWrapper_t, *pSignalWrapper_t; - -typedef struct tpmOperationsFlags_t -{ - unsigned char resetRequested : 1; - unsigned char powerOffRequested : 1; - unsigned char executionRequested : 1; - unsigned char responseRequested : 1; -} tpmOperationsFlags_t; - -typedef struct tpmOperation_t -{ - tpmOperationsFlags_t flags; - int cmdSize; - int receivingCmd; - int rspSize; - unsigned char msgBuf[MAX_TPM_MESSAGE_SIZE]; -} tpmOperation_t; - -extern volatile tpmOperation_t tpmOp; - -int BlueButtonTransitionDetected(void); -void SetDutyCycleIndicator(bool on); -void KillUSBLink(void); -void SetRealTimeClock(time_t tm); -void ReadMcuInfo(unsigned char* serial, uint16_t *flashSize, uint16_t *mcuType, uint16_t *mcuRev); -void PerformSystemReset(void); -void HAL_Delay(uint32_t Delay); -uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len); - -bool TpmInitializeDevice(void); -bool TpmOperationsLoop(void); -void TpmConnectionReset(void); -bool TpmSignalEvent(uint8_t* Buf, uint32_t *Len); diff --git a/Samples/Nucleo-TPM/Shared/TPMDevice/include/user_settings.h b/Samples/Nucleo-TPM/Shared/TPMDevice/include/user_settings.h deleted file mode 100644 index a4d7e9cd..00000000 --- a/Samples/Nucleo-TPM/Shared/TPMDevice/include/user_settings.h +++ /dev/null @@ -1,54 +0,0 @@ -/* settings.h - * - * Copyright (C) 2006-2017 wolfSSL Inc. - * - * This file is part of wolfSSL. - * - * wolfSSL is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * wolfSSL is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA - */ - - -/* Place OS specific preprocessor flags, defines, includes here, will be - included into every file because types.h includes it */ - - -#ifndef WOLF_CRYPT_USER_SETTINGS_H -#define WOLF_CRYPT_USER_SETTINGS_H - -#ifdef __cplusplus - extern "C" { -#endif - -#define SINGLE_THREADED -#define NO_FILESYSTEM -#define NO_OLD_WC_NAMES -#define WC_NO_HARDEN -#define WOLFSSL_SHA384 -#define WOLFSSL_SHA512 -#define WOLFSSL_AES_DIRECT -#define WOLFSSL_DES_ECB -#define WOLFSSL_KEY_GEN -#define HAVE_ECC -#define ECC_SHAMIR -#define USE_FAST_MATH -#define WOLFSSL_PUBLIC_ECC_ADD_DBL -#define LIBRARY_COMPATIBILITY_CHECK -#define WOLFSSL_USER_IO - -#ifdef __cplusplus - } /* extern "C" */ -#endif - -#endif diff --git a/Samples/Nucleo-TPM/Shared/TPMDevice/src/StmUtil.c b/Samples/Nucleo-TPM/Shared/TPMDevice/src/StmUtil.c deleted file mode 100644 index 5d2889e3..00000000 --- a/Samples/Nucleo-TPM/Shared/TPMDevice/src/StmUtil.c +++ /dev/null @@ -1,141 +0,0 @@ -#include -#include -#include -#include -#include "stm32l4xx_hal.h" -#include "usb_device.h" -#include "StmUtil.h" - -// RTC initialized by MX_RTC_Init -extern RTC_HandleTypeDef hrtc; - -typedef unsigned char DEVICE_UNIQUE_ID_T[12]; -#define DEVICE_UNIQUE_ID (*(DEVICE_UNIQUE_ID_T*)(UID_BASE)) -#define DEVICE_FLASH_SIZE (*(uint16_t *)(FLASHSIZE_BASE)) -#define DEVICE_TYPE ((uint16_t) ((DBGMCU->IDCODE & DBGMCU_IDCODE_DEV_ID_Msk) >> DBGMCU_IDCODE_DEV_ID_Pos)) -#define DEVICE_REV ((uint16_t) ((DBGMCU->IDCODE & DBGMCU_IDCODE_REV_ID_Msk) >> DBGMCU_IDCODE_REV_ID_Pos)) -char __attribute__((section (".ram2"))) logStampStr[40] = {0}; -void* __attribute__((section (".ram2"))) g_itm[ITMCHANNELS] = {0}; - -GPIO_PinState BlueButtonLast = GPIO_PIN_SET; -int BlueButtonTransitionDetected(void) -{ - GPIO_PinState PPButton = HAL_GPIO_ReadPin(B1_GPIO_Port, B1_Pin); - if((PPButton == GPIO_PIN_RESET) && (BlueButtonLast == GPIO_PIN_SET)) - { - // Now pressed - BlueButtonLast = PPButton; - return 1; - } - else if((PPButton == GPIO_PIN_SET) && (BlueButtonLast == GPIO_PIN_RESET)) - { - // Now released - BlueButtonLast = PPButton; - return -1; - } - // No change - return 0; -} - -#ifndef NDEBUG -#define ITM_PORT_BITS (0xffffffff) -void InitializeITM() -{ -// CoreDebug->DEMCR = CoreDebug_DEMCR_TRCENA_Msk; /* enable trace in core debug */ -// ITM->TCR = ITM_TCR_TraceBusID_Msk | ITM_TCR_SWOENA_Msk | ITM_TCR_SYNCENA_Msk | ITM_TCR_ITMENA_Msk; /* ITM Trace Control Register */ -// ITM->TPR = ITM_TPR_PRIVMASK_Msk; /* ITM Trace Privilege Register */ -// ITM->TER = ITM_PORT_BITS; /* ITM Trace Enable Register. Enabled tracing on stimulus ports. One bit per stimulus port. */ -// *((volatile unsigned *)(ITM_BASE + 0x01000)) = 0x400003FE; /* DWT_CTRL */ -// *((volatile unsigned *)(ITM_BASE + 0x40304)) = 0x00000100; /* Formatter and Flush Control Register */ - - for(uint32_t n = 0; n < ITMCHANNELS; n++) - { - char fileName[10]; - sprintf(fileName, "ITM[%02u]", (unsigned int)n); - g_itm[n] = (void*)fopen(fileName, "wb"); - } -} - -void ITM_Out(uint32_t port, uint8_t ch) -{ - while(ITM->PORT[port].u32 == 0); - ITM->PORT[port].u8 = ch; -} -#else -void InitializeITM() -{ - -} -#endif - -void SetDutyCycleIndicator(bool on) -{ - HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, on ? GPIO_PIN_SET : GPIO_PIN_RESET); -} - -char* GetLogStamp(void) -{ - RTC_TimeTypeDef time = {0}; - RTC_DateTypeDef date = {0}; - HAL_RTC_GetTime(&hrtc, &time, RTC_FORMAT_BIN); - HAL_RTC_GetDate(&hrtc, &date, RTC_FORMAT_BIN); - - sprintf(logStampStr, "%04d.%02d.%02d-%02d:%02d:%02d.%03dGMT", - date.Year + 2000, - date.Month, - date.Date, - time.Hours, - time.Minutes, - time.Seconds, - (int)((1000 / time.SecondFraction) * (time.SecondFraction - time.SubSeconds))); - return logStampStr; -} - -void KillUSBLink(void) -{ - dbgPrint("USB de-initialization...\r\n"); - MX_USB_DEVICE_DeInit(); -} - -void SetRealTimeClock(time_t tm) -{ - struct tm* local = localtime((time_t*)&tm); - RTC_TimeTypeDef time = {0}; - RTC_DateTypeDef date = {0}; - date.Year = local->tm_year - 100; - date.Month = local->tm_mon + 1; - date.Date = local->tm_mday; - date.WeekDay = local->tm_wday + 1; - time.Hours = local->tm_hour; - time.Minutes = local->tm_min; - time.Seconds = local->tm_sec; - HAL_RTC_SetTime(&hrtc, &time, RTC_FORMAT_BIN); - HAL_RTC_SetDate(&hrtc, &date, RTC_FORMAT_BIN); -} - -void ReadMcuInfo(unsigned char* serial, uint16_t *flashSize, uint16_t *mcuType, uint16_t *mcuRev) -{ - if(serial) - { - memcpy(serial, DEVICE_UNIQUE_ID, sizeof(DEVICE_UNIQUE_ID)); - } - if(flashSize) - { - *flashSize = DEVICE_FLASH_SIZE; - } - if(mcuType) - { - *mcuType = DEVICE_TYPE; - } - if(mcuRev) - { - *mcuRev = DEVICE_REV; - } -} - -void PerformSystemReset(void) -{ - dbgPrint("Executing NVIC_SystemReset()...\r\n"); - HAL_Delay(1); - NVIC_SystemReset(); -} diff --git a/Samples/Nucleo-TPM/Shared/TPMDevice/src/TpmDevice.c b/Samples/Nucleo-TPM/Shared/TPMDevice/src/TpmDevice.c deleted file mode 100644 index 07b1aa89..00000000 --- a/Samples/Nucleo-TPM/Shared/TPMDevice/src/TpmDevice.c +++ /dev/null @@ -1,964 +0,0 @@ -#include -#include -#include -#include -#include "StmUtil.h" -#include -#undef INLINE -#include "Tpm.h" -#include "TpmDevice.h" - -volatile tpmOperation_t tpmOp = { 0 }; -extern char tpmUnique[WC_SHA512_DIGEST_SIZE]; - -uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len); - -#ifndef NDEBUG -#define TPM_RC_MAX_FM1 (TPM_RC)(RC_FMT1 + 0x03F) - -typedef struct -{ - uint32_t index; - char* str; -} lookup_t; - -const lookup_t tpm_cc_table[] = -{ -#if CC_NV_UndefineSpaceSpecial == YES - {TPM_CC_NV_UndefineSpaceSpecial, "TPM_CC_NV_UndefineSpaceSpecial"}, -#endif -#if CC_EvictControl == YES - {TPM_CC_EvictControl, "TPM_CC_EvictControl"}, -#endif -#if CC_HierarchyControl == YES - {TPM_CC_HierarchyControl, "TPM_CC_HierarchyControl"}, -#endif -#if CC_NV_UndefineSpace == YES - {TPM_CC_NV_UndefineSpace, "TPM_CC_NV_UndefineSpace"}, -#endif -#if CC_ChangeEPS == YES - {TPM_CC_ChangeEPS, "TPM_CC_ChangeEPS"}, -#endif -#if CC_ChangePPS == YES - {TPM_CC_ChangePPS, "TPM_CC_ChangePPS"}, -#endif -#if CC_Clear == YES - {TPM_CC_Clear, "TPM_CC_Clear"}, -#endif -#if CC_ClearControl == YES - {TPM_CC_ClearControl, "TPM_CC_ClearControl"}, -#endif -#if CC_ClockSet == YES - {TPM_CC_ClockSet, "TPM_CC_ClockSet"}, -#endif -#if CC_HierarchyChangeAuth == YES - {TPM_CC_HierarchyChangeAuth, "TPM_CC_HierarchyChangeAuth"}, -#endif -#if CC_NV_DefineSpace == YES - {TPM_CC_NV_DefineSpace, "TPM_CC_NV_DefineSpace"}, -#endif -#if CC_PCR_Allocate == YES - {TPM_CC_PCR_Allocate, "TPM_CC_PCR_Allocate"}, -#endif -#if CC_PCR_SetAuthPolicy == YES - {TPM_CC_PCR_SetAuthPolicy, "TPM_CC_PCR_SetAuthPolicy"}, -#endif -#if CC_PP_Commands == YES - {TPM_CC_PP_Commands, "TPM_CC_PP_Commands"}, -#endif -#if CC_SetPrimaryPolicy == YES - {TPM_CC_SetPrimaryPolicy, "TPM_CC_SetPrimaryPolicy"}, -#endif -#if CC_FieldUpgradeStart == YES - {TPM_CC_FieldUpgradeStart, "TPM_CC_FieldUpgradeStart"}, -#endif -#if CC_ClockRateAdjust == YES - {TPM_CC_ClockRateAdjust, "TPM_CC_ClockRateAdjust"}, -#endif -#if CC_CreatePrimary == YES - {TPM_CC_CreatePrimary, "TPM_CC_CreatePrimary"}, -#endif -#if CC_NV_GlobalWriteLock == YES - {TPM_CC_NV_GlobalWriteLock, "TPM_CC_NV_GlobalWriteLock"}, -#endif -#if CC_GetCommandAuditDigest == YES - {TPM_CC_GetCommandAuditDigest, ""}, -#endif -#if CC_NV_Increment == YES - {TPM_CC_NV_Increment, "TPM_CC_NV_Increment"}, -#endif -#if CC_NV_SetBits == YES - {TPM_CC_NV_SetBits, "TPM_CC_NV_SetBits"}, -#endif -#if CC_NV_Extend == YES - {TPM_CC_NV_Extend, "TPM_CC_NV_Extend"}, -#endif -#if CC_NV_Write == YES - {TPM_CC_NV_Write, "TPM_CC_NV_Write"}, -#endif -#if CC_NV_WriteLock == YES - {TPM_CC_NV_WriteLock, "TPM_CC_NV_WriteLock"}, -#endif -#if CC_DictionaryAttackLockReset == YES - {TPM_CC_DictionaryAttackLockReset, "TPM_CC_DictionaryAttackLockReset"}, -#endif -#if CC_DictionaryAttackParameters == YES - {TPM_CC_DictionaryAttackParameters, "TPM_CC_DictionaryAttackParameters"}, -#endif -#if CC_NV_ChangeAuth == YES - {TPM_CC_NV_ChangeAuth, "TPM_CC_NV_ChangeAuth"}, -#endif -#if CC_PCR_Event == YES - {TPM_CC_PCR_Event, "TPM_CC_PCR_Event"}, -#endif -#if CC_PCR_Reset == YES - {TPM_CC_PCR_Reset, "TPM_CC_PCR_Reset"}, -#endif -#if CC_SequenceComplete == YES - {TPM_CC_SequenceComplete, "TPM_CC_SequenceComplete"}, -#endif -#if CC_SetAlgorithmSet == YES - {TPM_CC_SetAlgorithmSet, "TPM_CC_SetAlgorithmSet"}, -#endif -#if CC_SetCommandCodeAuditStatus == YES - {TPM_CC_SetCommandCodeAuditStatus, "TPM_CC_SetCommandCodeAuditStatus"}, -#endif -#if CC_FieldUpgradeData == YES - {TPM_CC_FieldUpgradeData, "TPM_CC_FieldUpgradeData"}, -#endif -#if CC_IncrementalSelfTest == YES - {TPM_CC_IncrementalSelfTest, "TPM_CC_FieldUpgradeData"}, -#endif -#if CC_SelfTest == YES - {TPM_CC_SelfTest, "TPM_CC_SelfTest"}, -#endif -#if CC_Startup == YES - {TPM_CC_Startup, "TPM_CC_Startup"}, -#endif -#if CC_Shutdown == YES - {TPM_CC_Shutdown, "TPM_CC_Shutdown"}, -#endif -#if CC_StirRandom == YES - {TPM_CC_StirRandom, ""}, -#endif -#if CC_ActivateCredential == YES - {TPM_CC_ActivateCredential, "TPM_CC_ActivateCredential"}, -#endif -#if CC_Certify == YES - {TPM_CC_Certify, "TPM_CC_Certify"}, -#endif -#if CC_PolicyNV == YES - {TPM_CC_PolicyNV, "TPM_CC_PolicyNV"}, -#endif -#if CC_CertifyCreation == YES - {TPM_CC_CertifyCreation, "TPM_CC_CertifyCreation"}, -#endif -#if CC_Duplicate == YES - {TPM_CC_Duplicate, "TPM_CC_Duplicate"}, -#endif -#if CC_GetTime == YES - {TPM_CC_GetTime, "TPM_CC_GetTime"}, -#endif -#if CC_GetSessionAuditDigest == YES - {TPM_CC_GetSessionAuditDigest, "TPM_CC_GetSessionAuditDigest"}, -#endif -#if CC_NV_Read == YES - {TPM_CC_NV_Read, "TPM_CC_NV_Read"}, -#endif -#if CC_NV_ReadLock == YES - {TPM_CC_NV_ReadLock, "TPM_CC_NV_ReadLock"}, -#endif -#if CC_ObjectChangeAuth == YES - {TPM_CC_ObjectChangeAuth, "TPM_CC_ObjectChangeAuth"}, -#endif -#if CC_PolicySecret == YES - {TPM_CC_PolicySecret, "TPM_CC_PolicySecret"}, -#endif -#if CC_Rewrap == YES - {TPM_CC_Rewrap, "TPM_CC_Rewrap"}, -#endif -#if CC_Create == YES - {TPM_CC_Create, "TPM_CC_Create"}, -#endif -#if CC_ECDH_ZGen == YES - {TPM_CC_ECDH_ZGen, "TPM_CC_ECDH_ZGen"}, -#endif -#if CC_HMAC == YES - {TPM_CC_HMAC, "TPM_CC_HMAC"}, -#endif -#if CC_MAC == YES - {TPM_CC_MAC, "TPM_CC_HMAC"}, -#endif -#if CC_Import == YES - {TPM_CC_Import, "TPM_CC_Import"}, -#endif -#if CC_Load == YES - {TPM_CC_Load, "TPM_CC_Load"}, -#endif -#if CC_Quote == YES - {TPM_CC_Quote, "TPM_CC_Quote"}, -#endif -#if CC_RSA_Decrypt == YES - {TPM_CC_RSA_Decrypt, "TPM_CC_RSA_Decrypt"}, -#endif -#if CC_HMAC_Start == YES - {TPM_CC_HMAC_Start, "TPM_CC_HMAC_Start"}, -#endif -#if CC_MAC_Start == YES - {TPM_CC_MAC_Start, "TPM_CC_HMAC_Start"}, -#endif -#if CC_SequenceUpdate == YES - {TPM_CC_SequenceUpdate, "TPM_CC_SequenceUpdate"}, -#endif -#if CC_Sign == YES - {TPM_CC_Sign, "TPM_CC_Sign"}, -#endif -#if CC_Unseal == YES - {TPM_CC_Unseal, "TPM_CC_Sign"}, -#endif -#if CC_PolicySigned == YES - {TPM_CC_PolicySigned, "TPM_CC_PolicySigned"}, -#endif -#if CC_ContextLoad == YES - {TPM_CC_ContextLoad, "TPM_CC_ContextLoad"}, -#endif -#if CC_ContextSave == YES - {TPM_CC_ContextSave, "TPM_CC_ContextSave"}, -#endif -#if CC_ECDH_KeyGen == YES - {TPM_CC_ECDH_KeyGen, "TPM_CC_ECDH_KeyGen"}, -#endif -#if CC_EncryptDecrypt == YES - {TPM_CC_EncryptDecrypt, "TPM_CC_EncryptDecrypt"}, -#endif -#if CC_FlushContext == YES - {TPM_CC_FlushContext, "TPM_CC_FlushContext"}, -#endif -#if CC_LoadExternal == YES - {TPM_CC_LoadExternal, ""}, -#endif -#if CC_MakeCredential == YES - {TPM_CC_MakeCredential, "TPM_CC_MakeCredential"}, -#endif -#if CC_NV_ReadPublic == YES - {TPM_CC_NV_ReadPublic, "TPM_CC_NV_ReadPublic"}, -#endif -#if CC_PolicyAuthorize == YES - {TPM_CC_PolicyAuthorize, "TPM_CC_PolicyAuthorize"}, -#endif -#if CC_PolicyAuthValue == YES - {TPM_CC_PolicyAuthValue, "TPM_CC_PolicyAuthValue"}, -#endif -#if CC_PolicyCommandCode == YES - {TPM_CC_PolicyCommandCode, "TPM_CC_PolicyCommandCode"}, -#endif -#if CC_PolicyCounterTimer == YES - {TPM_CC_PolicyCounterTimer, "TPM_CC_PolicyCounterTimer"}, -#endif -#if CC_PolicyCpHash == YES - {TPM_CC_PolicyCpHash, "TPM_CC_PolicyCounterTimer"}, -#endif -#if CC_PolicyLocality == YES - {TPM_CC_PolicyLocality, "TPM_CC_PolicyLocality"}, -#endif -#if CC_PolicyNameHash == YES - {TPM_CC_PolicyNameHash, "TPM_CC_PolicyNameHash"}, -#endif -#if CC_PolicyOR == YES - {TPM_CC_PolicyOR, "TPM_CC_PolicyOR"}, -#endif -#if CC_PolicyTicket == YES - {TPM_CC_PolicyTicket, "TPM_CC_PolicyTicket"}, -#endif -#if CC_ReadPublic == YES - {TPM_CC_ReadPublic, "TPM_CC_ReadPublic"}, -#endif -#if CC_RSA_Encrypt == YES - {TPM_CC_RSA_Encrypt, "TPM_CC_RSA_Encrypt"}, -#endif -#if CC_StartAuthSession == YES - {TPM_CC_StartAuthSession, "TPM_CC_StartAuthSession"}, -#endif -#if CC_VerifySignature == YES - {TPM_CC_VerifySignature, "TPM_CC_VerifySignature"}, -#endif -#if CC_ECC_Parameters == YES - {TPM_CC_ECC_Parameters, "TPM_CC_VerifySignature"}, -#endif -#if CC_FirmwareRead == YES - {TPM_CC_FirmwareRead, "TPM_CC_FirmwareRead"}, -#endif -#if CC_GetCapability == YES - {TPM_CC_GetCapability, "TPM_CC_GetCapability"}, -#endif -#if CC_GetRandom == YES - {TPM_CC_GetRandom, "TPM_CC_GetRandom"}, -#endif -#if CC_GetTestResult == YES - {TPM_CC_GetTestResult, "TPM_CC_GetTestResult"}, -#endif -#if CC_Hash == YES - {TPM_CC_Hash, "TPM_CC_Hash"}, -#endif -#if CC_PCR_Read == YES - {TPM_CC_PCR_Read, "TPM_CC_Hash"}, -#endif -#if CC_PolicyPCR == YES - {TPM_CC_PolicyPCR, "TPM_CC_PolicyPCR"}, -#endif -#if CC_PolicyRestart == YES - {TPM_CC_PolicyRestart, "TPM_CC_PolicyRestart"}, -#endif -#if CC_ReadClock == YES - {TPM_CC_ReadClock, "TPM_CC_ReadClock"}, -#endif -#if CC_PCR_Extend == YES - {TPM_CC_PCR_Extend, "TPM_CC_PCR_Extend"}, -#endif -#if CC_PCR_SetAuthValue == YES - {TPM_CC_PCR_SetAuthValue, "TPM_CC_PCR_SetAuthValue"}, -#endif -#if CC_NV_Certify == YES - {TPM_CC_NV_Certify, "TPM_CC_NV_Certify"}, -#endif -#if CC_EventSequenceComplete == YES - {TPM_CC_EventSequenceComplete, "TPM_CC_EventSequenceComplete"}, -#endif -#if CC_HashSequenceStart == YES - {TPM_CC_HashSequenceStart, "TPM_CC_EventSequenceComplete"}, -#endif -#if CC_PolicyPhysicalPresence == YES - {TPM_CC_PolicyPhysicalPresence, ""}, -#endif -#if CC_PolicyDuplicationSelect == YES - {TPM_CC_PolicyDuplicationSelect, "TPM_CC_PolicyDuplicationSelect"}, -#endif -#if CC_PolicyGetDigest == YES - {TPM_CC_PolicyGetDigest, "TPM_CC_PolicyGetDigest"}, -#endif -#if CC_TestParms == YES - {TPM_CC_TestParms, "TPM_CC_TestParms"}, -#endif -#if CC_Commit == YES - {TPM_CC_Commit, "TPM_CC_Commit"}, -#endif -#if CC_PolicyPassword == YES - {TPM_CC_PolicyPassword, "TPM_CC_PolicyPassword"}, -#endif -#if CC_ZGen_2Phase == YES - {TPM_CC_ZGen_2Phase, "TPM_CC_ZGen_2Phase"}, -#endif -#if CC_EC_Ephemeral == YES - {TPM_CC_EC_Ephemeral, "TPM_CC_EC_Ephemeral"}, -#endif -#if CC_PolicyNvWritten == YES - {TPM_CC_PolicyNvWritten, "TPM_CC_PolicyNvWritten"}, -#endif -#if CC_PolicyTemplate == YES - {TPM_CC_PolicyTemplate, "TPM_CC_PolicyTemplate"}, -#endif -#if CC_CreateLoaded == YES - {TPM_CC_CreateLoaded, ""}, -#endif -#if CC_PolicyAuthorizeNV == YES - {TPM_CC_PolicyAuthorizeNV, "TPM_CC_PolicyAuthorizeNV"}, -#endif -#if CC_EncryptDecrypt2 == YES - {TPM_CC_EncryptDecrypt2, "TPM_CC_EncryptDecrypt2"}, -#endif -#if CC_AC_GetCapability == YES - {TPM_CC_AC_GetCapability, "TPM_CC_AC_GetCapability"}, -#endif -#if CC_AC_Send == YES - {TPM_CC_AC_Send, "TPM_CC_AC_Send"}, -#endif -#if CC_Policy_AC_SendSelect == YES - {TPM_CC_Policy_AC_SendSelect, "TPM_CC_Policy_AC_SendSelect"}, -#endif - {(uint32_t)-1, NULL} -}; - -const lookup_t tpm_rc_globalCodes[] = { - {TPM_RC_SUCCESS, "TPM_RC_SUCCESS"}, - {TPM_RC_BAD_TAG, "TPM_RC_BAD_TAG"}, - {(uint32_t)-1, NULL} -}; - -const lookup_t tpm_rc_formatZeroCodes[] = { - {TPM_RC_INITIALIZE, "TPM_RC_INITIALIZE"}, - {TPM_RC_FAILURE, "TPM_RC_FAILURE"}, - {TPM_RC_SEQUENCE, "TPM_RC_SEQUENCE"}, - {TPM_RC_PRIVATE, "TPM_RC_PRIVATE"}, - {TPM_RC_HMAC, "TPM_RC_HMAC"}, - {TPM_RC_DISABLED, "TPM_RC_DISABLED"}, - {TPM_RC_EXCLUSIVE, "TPM_RC_EXCLUSIVE"}, - {TPM_RC_AUTH_TYPE, "TPM_RC_AUTH_TYPE"}, - {TPM_RC_AUTH_MISSING, "TPM_RC_AUTH_MISSING"}, - {TPM_RC_POLICY, "TPM_RC_POLICY"}, - {TPM_RC_PCR, "TPM_RC_PCR"}, - {TPM_RC_PCR_CHANGED, "TPM_RC_PCR_CHANGED"}, - {TPM_RC_UPGRADE, "TPM_RC_UPGRADE"}, - {TPM_RC_TOO_MANY_CONTEXTS, "TPM_RC_TOO_MANY_CONTEXTS"}, - {TPM_RC_AUTH_UNAVAILABLE, "TPM_RC_AUTH_UNAVAILABLE"}, - {TPM_RC_REBOOT, "TPM_RC_REBOOT"}, - {TPM_RC_UNBALANCED, "TPM_RC_UNBALANCED"}, - {TPM_RC_COMMAND_SIZE, "TPM_RC_COMMAND_SIZE"}, - {TPM_RC_COMMAND_CODE, "TPM_RC_COMMAND_CODE"}, - {TPM_RC_AUTHSIZE, "TPM_RC_AUTHSIZE"}, - {TPM_RC_AUTH_CONTEXT, "TPM_RC_AUTH_CONTEXT"}, - {TPM_RC_NV_RANGE, "TPM_RC_NV_RANGE"}, - {TPM_RC_NV_SIZE, "TPM_RC_NV_SIZE"}, - {TPM_RC_NV_LOCKED, "TPM_RC_NV_LOCKED"}, - {TPM_RC_NV_AUTHORIZATION, "TPM_RC_NV_AUTHORIZATION"}, - {TPM_RC_NV_UNINITIALIZED, "TPM_RC_NV_UNINITIALIZED"}, - {TPM_RC_NV_SPACE, "TPM_RC_NV_SPACE"}, - {TPM_RC_NV_DEFINED, "TPM_RC_NV_DEFINED"}, - {TPM_RC_BAD_CONTEXT, "TPM_RC_BAD_CONTEXT"}, - {TPM_RC_CPHASH, "TPM_RC_CPHASH"}, - {TPM_RC_PARENT, "TPM_RC_PARENT"}, - {TPM_RC_NEEDS_TEST, "TPM_RC_NEEDS_TEST"}, - {TPM_RC_NO_RESULT, "TPM_RC_NO_RESULT"}, - {TPM_RC_SENSITIVE, "TPM_RC_SENSITIVE"}, - {(uint32_t)-1, NULL} -}; - -const lookup_t tpm_rc_warningCodes[] = { - {TPM_RC_CONTEXT_GAP, "TPM_RC_CONTEXT_GAP"}, - {TPM_RC_CONTEXT_GAP, "TPM_RC_CONTEXT_GAP"}, - {TPM_RC_OBJECT_MEMORY, "TPM_RC_OBJECT_MEMORY"}, - {TPM_RC_SESSION_MEMORY, "TPM_RC_SESSION_MEMORY"}, - {TPM_RC_MEMORY, "TPM_RC_MEMORY"}, - {TPM_RC_SESSION_HANDLES, "TPM_RC_SESSION_HANDLES"}, - {TPM_RC_OBJECT_HANDLES, "TPM_RC_OBJECT_HANDLES"}, - {TPM_RC_LOCALITY, "TPM_RC_LOCALITY"}, - {TPM_RC_YIELDED, "TPM_RC_YIELDED"}, - {TPM_RC_CANCELED, "TPM_RC_CANCELED"}, - {TPM_RC_TESTING, "TPM_RC_TESTING"}, - {TPM_RC_REFERENCE_H0, "TPM_RC_REFERENCE_H0"}, - {TPM_RC_REFERENCE_H1, "TPM_RC_REFERENCE_H1"}, - {TPM_RC_REFERENCE_H2, "TPM_RC_REFERENCE_H2"}, - {TPM_RC_REFERENCE_H3, "TPM_RC_REFERENCE_H3"}, - {TPM_RC_REFERENCE_H4, "TPM_RC_REFERENCE_H4"}, - {TPM_RC_REFERENCE_H5, "TPM_RC_REFERENCE_H5"}, - {TPM_RC_REFERENCE_H6, "TPM_RC_REFERENCE_H6"}, - {TPM_RC_REFERENCE_S0, "TPM_RC_REFERENCE_S0"}, - {TPM_RC_REFERENCE_S1, "TPM_RC_REFERENCE_S1"}, - {TPM_RC_REFERENCE_S2, "TPM_RC_REFERENCE_S2"}, - {TPM_RC_REFERENCE_S3, "TPM_RC_REFERENCE_S3"}, - {TPM_RC_REFERENCE_S4, "TPM_RC_REFERENCE_S4"}, - {TPM_RC_REFERENCE_S5, "TPM_RC_REFERENCE_S5"}, - {TPM_RC_REFERENCE_S6, "TPM_RC_REFERENCE_S6"}, - {TPM_RC_NV_RATE, "TPM_RC_NV_RATE"}, - {TPM_RC_LOCKOUT, "TPM_RC_LOCKOUT"}, - {TPM_RC_RETRY, "TPM_RC_RETRY"}, - {TPM_RC_NV_UNAVAILABLE, "TPM_RC_NV_UNAVAILABLE"}, - {(uint32_t)-1, NULL} -}; - -const lookup_t tpm_rc_formatCodes[] = { - {TPM_RCS_ASYMMETRIC, "TPM_RCS_ASYMMETRIC"}, - {TPM_RC_ATTRIBUTES, "TPM_RC_ATTRIBUTES"}, - {TPM_RCS_ATTRIBUTES, "TPM_RCS_ATTRIBUTES"}, - {TPM_RC_HASH, "TPM_RC_HASH"}, - {TPM_RCS_HASH, "TPM_RCS_HASH"}, - {TPM_RC_VALUE, "TPM_RC_VALUE"}, - {TPM_RCS_VALUE, "TPM_RCS_VALUE"}, - {TPM_RC_HIERARCHY, "TPM_RC_HIERARCHY"}, - {TPM_RCS_HIERARCHY, "TPM_RCS_HIERARCHY"}, - {TPM_RC_KEY_SIZE, "TPM_RC_KEY_SIZE"}, - {TPM_RCS_KEY_SIZE, "TPM_RCS_KEY_SIZE"}, - {TPM_RC_MGF, "TPM_RC_MGF"}, - {TPM_RCS_MGF, "TPM_RCS_MGF"}, - {TPM_RC_MODE, "TPM_RC_MODE"}, - {TPM_RCS_MODE, "TPM_RCS_MODE"}, - {TPM_RC_TYPE, "TPM_RC_TYPE"}, - {TPM_RCS_TYPE, "TPM_RCS_TYPE"}, - {TPM_RC_HANDLE, "TPM_RC_HANDLE"}, - {TPM_RCS_HANDLE, "TPM_RCS_HANDLE"}, - {TPM_RC_KDF, "TPM_RC_KDF"}, - {TPM_RCS_KDF, "TPM_RCS_KDF"}, - {TPM_RC_RANGE, "TPM_RC_RANGE"}, - {TPM_RCS_RANGE, "TPM_RCS_RANGE"}, - {TPM_RC_AUTH_FAIL, "TPM_RC_AUTH_FAIL"}, - {TPM_RCS_AUTH_FAIL, "TPM_RCS_AUTH_FAIL"}, - {TPM_RC_NONCE, "TPM_RC_NONCE"}, - {TPM_RCS_NONCE, "TPM_RCS_NONCE"}, - {TPM_RC_PP, "TPM_RC_PP"}, - {TPM_RCS_PP, "TPM_RCS_PP"}, - {TPM_RC_SCHEME, "TPM_RC_SCHEME"}, - {TPM_RCS_SCHEME, "TPM_RCS_SCHEME"}, - {TPM_RC_SIZE, "TPM_RC_SIZE"}, - {TPM_RCS_SIZE, "TPM_RCS_SIZE"}, - {TPM_RC_SYMMETRIC, "TPM_RC_SYMMETRIC"}, - {TPM_RCS_SYMMETRIC, "TPM_RCS_SYMMETRIC"}, - {TPM_RC_TAG, "TPM_RC_TAG"}, - {TPM_RCS_TAG, "TPM_RCS_TAG"}, - {TPM_RC_SELECTOR, "TPM_RC_SELECTOR"}, - {TPM_RCS_SELECTOR, "TPM_RCS_SELECTOR"}, - {TPM_RC_INSUFFICIENT, "TPM_RC_INSUFFICIENT"}, - {TPM_RCS_INSUFFICIENT, "TPM_RCS_INSUFFICIENT"}, - {TPM_RC_SIGNATURE, "TPM_RC_SIGNATURE"}, - {TPM_RCS_SIGNATURE, "TPM_RCS_SIGNATURE"}, - {TPM_RC_KEY, "TPM_RC_KEY"}, - {TPM_RCS_KEY, "TPM_RCS_KEY"}, - {TPM_RC_POLICY_FAIL, "TPM_RC_POLICY_FAIL"}, - {TPM_RCS_POLICY_FAIL, "TPM_RCS_POLICY_FAIL"}, - {TPM_RC_INTEGRITY, "TPM_RC_INTEGRITY"}, - {TPM_RCS_INTEGRITY, "TPM_RCS_INTEGRITY"}, - {TPM_RC_TICKET, "TPM_RC_TICKET"}, - {TPM_RCS_TICKET, "TPM_RCS_TICKET"}, - {TPM_RC_RESERVED_BITS, "TPM_RC_RESERVED_BITS"}, - {TPM_RCS_RESERVED_BITS, "TPM_RCS_RESERVED_BITS"}, - {TPM_RC_BAD_AUTH, "TPM_RC_BAD_AUTH"}, - {TPM_RCS_BAD_AUTH, "TPM_RCS_BAD_AUTH"}, - {TPM_RC_EXPIRED, "TPM_RC_EXPIRED"}, - {TPM_RCS_EXPIRED, "TPM_RCS_EXPIRED"}, - {TPM_RC_POLICY_CC, "TPM_RC_POLICY_CC"}, - {TPM_RCS_POLICY_CC, "TPM_RCS_POLICY_CC"}, - {TPM_RC_BINDING, "TPM_RC_BINDING"}, - {TPM_RCS_BINDING, "TPM_RCS_BINDING"}, - {TPM_RC_CURVE, "TPM_RC_CURVE"}, - {TPM_RCS_CURVE, "TPM_RCS_CURVE"}, - {TPM_RC_ECC_POINT, "TPM_RC_ECC_POINT"}, - {TPM_RCS_ECC_POINT, "TPM_RCS_ECC_POINT"}, - {(uint32_t)-1, NULL} -}; - -char decodeBuf[100]; -#else -char decodeBuf[6]; -#endif - -static char* TpmDecodeTPM_CC(uint8_t* in) -{ - TPM_CC cc = BYTE_ARRAY_TO_UINT32(in); -#ifndef NDEBUG - uint32_t n; - for(n = 0; ((tpm_cc_table[n].index != (uint32_t)-1) && (tpm_cc_table[n].index != cc)) ; n++ ); - if(tpm_cc_table[n].index != (uint32_t)-1) - { - sprintf(decodeBuf, "%s()", tpm_cc_table[n].str); - } - else - { -#endif - sprintf(decodeBuf, "0x%03x", (unsigned int)cc); -#ifndef NDEBUG - } -#endif - return decodeBuf; -} - -static char* TpmDecodeTPM_RC(uint8_t* in) -{ - TPM_RC rc = BYTE_ARRAY_TO_UINT32(in); -#ifndef NDEBUG - uint32_t n; - uint32_t cursor = 0; - - for(n = 0; ((tpm_rc_globalCodes[n].index != (uint32_t)-1) && (tpm_rc_globalCodes[n].index != rc)) ; n++ ); - if(tpm_rc_globalCodes[n].index != (uint32_t)-1) - { - cursor = sprintf(decodeBuf, "{%s}", tpm_rc_globalCodes[n].str); - } - else if((rc & RC_FMT1) == RC_FMT1) - { - if(rc & TPM_RC_P) - { - cursor = sprintf(decodeBuf, "{RC_FMT1 | TPM_RC_P | TPM_RC_%X | ", (unsigned int)((rc & 0x00000f00) >> 8)); - } - else if(rc & TPM_RC_S) - { - cursor = sprintf(decodeBuf, "{RC_FMT1 | TPM_RC_S | TPM_RC_%X | ", (unsigned int)((rc & 0x00000700) >> 8)); - } - else - { - cursor = sprintf(decodeBuf, "{RC_FMT1 | TPM_RC_H | TPM_RC_%X | ", (unsigned int)((rc & 0x00000700) >> 8)); - } - - for(n = 0; ((tpm_rc_formatCodes[n].index != (uint32_t)-1) && (tpm_rc_formatCodes[n].index != (rc & TPM_RC_MAX_FM1))) ; n++ ); - if(tpm_rc_formatCodes[n].index != (uint32_t)-1) - { - cursor = sprintf(&decodeBuf[cursor], "%s}", tpm_rc_formatCodes[n].str); - } - else - { - cursor = 0; - } - } - else if((rc & RC_WARN) == RC_WARN) - { - for(n = 0; ((tpm_rc_warningCodes[n].index != (uint32_t)-1) && (tpm_rc_warningCodes[n].index != rc)) ; n++ ); - if(tpm_rc_warningCodes[n].index != (uint32_t)-1) - { - cursor = sprintf(decodeBuf, "{RC_VER1 | RC_WARN | %s}", tpm_rc_warningCodes[n].str); - } - } - else if((rc & RC_VER1) == RC_VER1) - { - for(n = 0; ((tpm_rc_formatZeroCodes[n].index != (uint32_t)-1) && (tpm_rc_formatZeroCodes[n].index != rc)) ; n++ ); - if(tpm_rc_formatZeroCodes[n].index != (uint32_t)-1) - { - cursor = sprintf(decodeBuf, "{RC_VER1 | %s}", tpm_rc_formatZeroCodes[n].str); - } - } - - if(cursor == 0) - { -#endif - sprintf(decodeBuf, "0x%03x", (unsigned int)rc); - return decodeBuf; -#ifndef NDEBUG - } -#endif - return decodeBuf; -} - -static bool TpmGenerateUnique(void) -{ - wc_Sha512 hash; - struct - { - uint16_t mcuType; - uint16_t mcuRev; - uint16_t flashSize; - unsigned char serial[12]; - } mcuInfo; - - ReadMcuInfo(mcuInfo.serial, &mcuInfo.flashSize, &mcuInfo.mcuType, &mcuInfo.mcuRev); - - if((wc_InitSha512(&hash)) || - (wc_Sha512Update(&hash, (const byte*)&mcuInfo, sizeof(mcuInfo))) || - (wc_Sha512Final(&hash, (byte*)tpmUnique))) - { - logError("Sha512 failed\r\n"); - return false; - } - wc_Sha512Free(&hash); - -#ifndef NDEBUG - uint8_t unique[WC_SHA512_DIGEST_SIZE] = {0}; - _plat__GetUnique(0, sizeof(unique), unique); - dbgPrint("Generated tpmUnique"); - for(uint32_t n = 0; n < sizeof(unique); n++) - { - if(!(n % 16)) dbgPrintAppend("\r\n "); - dbgPrintAppend("%02x", ((unsigned int)(unique[n]))); - } - dbgPrintAppend("\r\n"); -#endif - return true; -} - -bool TpmInitializeDevice(void) -{ - int retVal = 0; - - tpmOp.receivingCmd = -1; - TpmGenerateUnique(); - - SetDutyCycleIndicator(FALSE); - - // Factory reset requested? - if(BlueButtonTransitionDetected()) - { - dbgPrint("Factory reset requested.\r\n"); - if((retVal = _plat__NVEnable((void*)1)) < 0) - { - logError("_plat__NVEnable(1) failed unrecoverable.") - } - dbgPrint("Waiting for the button to be released...\r\n"); - while(BlueButtonTransitionDetected() == 0); - } - else - { - if((retVal = _plat__NVEnable((void*)0)) < 0) - { - logError("_plat__NVEnable(0) failed unrecoverable.") - } - } - - - if(retVal > 0) - { - dbgPrint("TPM_Manufacture(1) requested.\r\n"); - if((retVal = TPM_Manufacture(1)) != 0) - { - logError("TPM_Manufacture(1) failed.\r\n"); - } - } - - dbgPrint("_plat__SetNvAvail().\r\n"); - _plat__SetNvAvail(); - dbgPrint("_plat__Signal_PowerOn().\r\n"); - if((retVal =_plat__Signal_PowerOn()) != 0) - { - logError("_plat__Signal_PowerOn() failed.\r\n"); - } - dbgPrint("_plat__Signal_Reset().\r\n"); - if((retVal =_plat__Signal_Reset()) != 0) - { - logError("_plat__Signal_Reset() failed.\r\n"); - } - return (retVal == 0); -} - -bool TpmOperationsLoop(void) -{ - // Device reset - if(tpmOp.flags.resetRequested == 1) - { - tpmOp.flags.resetRequested = 0; - - HAL_Delay(1); - dbgPrint("Executing _plat__Signal_PowerOff()\r\n"); - _plat__Signal_PowerOff(); - PerformSystemReset(); - return false; - } - - if(tpmOp.flags.powerOffRequested == 1) - { - tpmOp.flags.powerOffRequested = 0; - dbgPrint("Executing _plat__Signal_PowerOff()\r\n"); - _plat__Signal_PowerOff(); - KillUSBLink(); - return false; - } - - // Physical presence button (blue button on the Nucleo) - int ppButton = BlueButtonTransitionDetected(); - if(ppButton > 0) - { - dbgPrint("Executing _plat__Signal_PhysicalPresenceOn().\r\n"); - _plat__Signal_PhysicalPresenceOn(); - } - else if (ppButton < 0) - { - dbgPrint("Executing _plat__Signal_PhysicalPresenceOff().\r\n"); - _plat__Signal_PhysicalPresenceOff(); - } - - // Command processing - if(tpmOp.flags.executionRequested == 1) - { - tpmOp.flags.executionRequested = 0; - unsigned int rspLenTPM = sizeof(tpmOp.msgBuf) - sizeof(rspLenTPM); - unsigned char* rspTPM = (unsigned char*)&tpmOp.msgBuf[sizeof(rspLenTPM)]; - - itmPrintAppend(ITMCMDRSP, "//%s\r\nunsigned char CmdBuf[%d] = {", GetLogStamp(), tpmOp.cmdSize); - for(uint32_t n = 0; n < tpmOp.cmdSize; n++) - { - if(n > 0) itmPrintAppend(ITMCMDRSP, ", "); - if(!(n % 16)) itmPrintAppend(ITMCMDRSP, "\r\n"); - itmPrintAppend(ITMCMDRSP, "0x%02x", tpmOp.msgBuf[n]); - } - itmPrintAppend(ITMCMDRSP, "\r\n};\r\n"); - - SetDutyCycleIndicator(TRUE); - dbgPrint("Executing command %s\r\n", TpmDecodeTPM_CC((uint8_t*)&tpmOp.msgBuf[6])); - time_t execStart = time(NULL); - _plat__RunCommand((unsigned int)tpmOp.cmdSize, (unsigned char*)tpmOp.msgBuf, &rspLenTPM, &rspTPM); - *((unsigned int*)tpmOp.msgBuf) = rspLenTPM; - time_t execEnd = time(NULL); - dbgPrint("Completion time %u'%u\" with ReturnCode %s\r\n", (unsigned int)(execEnd - execStart) / 60, (unsigned int)(execEnd - execStart) % 60, TpmDecodeTPM_RC(&rspTPM[6])); - SetDutyCycleIndicator(FALSE); - - itmPrintAppend(ITMCMDRSP, "//%s\r\nunsigned char RspBuf[%d] = {", GetLogStamp(), tpmOp.cmdSize); - for(uint32_t n = 0; n < rspLenTPM; n++) - { - if(n > 0) itmPrintAppend(ITMCMDRSP, ", "); - if(!(n % 16)) itmPrintAppend(ITMCMDRSP, "\r\n"); - itmPrintAppend(ITMCMDRSP, "0x%02x", rspTPM[n]); - } - itmPrintAppend(ITMCMDRSP, "\r\n};\r\n"); - - tpmOp.rspSize = sizeof(rspLenTPM) + rspLenTPM; - tpmOp.cmdSize = 0; - tpmOp.flags.responseRequested = 1; - } - - if(tpmOp.flags.responseRequested == 1) - { - tpmOp.flags.responseRequested = 0; - if(tpmOp.rspSize > 0) - { - uint32_t chunk = 0; - while(CDC_Transmit_FS((unsigned char*)&tpmOp.msgBuf, 0) != 0); // Wake up the link - while(CDC_Transmit_FS((unsigned char*)&tpmOp.msgBuf, 14) != 0); // Send the header which is the minimum size - for(uint32_t n = 14; n < tpmOp.rspSize; n += chunk) // Send the rest in 16 byte increments - { - chunk = MIN(16, tpmOp.rspSize - n); - while(CDC_Transmit_FS((unsigned char*)&tpmOp.msgBuf[n], chunk) != 0); -// dbgPrint("Sent(%u)\r\n", (unsigned int)(n + chunk)); - } - itmPrint(ITMSIGNAL, "Response(%d)\r\n", tpmOp.rspSize); - } - } - - return true; -} - -void TpmConnectionReset(void) -{ - tpmOp.receivingCmd = -1; - tpmOp.cmdSize = 0; - tpmOp.rspSize = 0; - memset((void*)tpmOp.msgBuf, 0x00, sizeof(tpmOp.msgBuf)); -} - -bool TpmSignalEvent(uint8_t* Buf, uint32_t *Len) -{ - // Pending inbound transfer - if(tpmOp.receivingCmd > 0) - { - memcpy((void*)&tpmOp.msgBuf[tpmOp.cmdSize], (void*)Buf, *Len); - tpmOp.cmdSize += *Len; -// itmPrint(ITMSIGNAL, "Received(%d)\r\n", tpmOp.cmdSize); - if(tpmOp.cmdSize >= tpmOp.receivingCmd) - { - itmPrint(ITMSIGNAL, "Received(%d)\r\n", tpmOp.cmdSize); - tpmOp.receivingCmd = -1; - tpmOp.flags.executionRequested = 1; - } - } - else if(sizeof(signalWrapper_t) > *Len) - { - itmPrint(ITMSIGNAL, "Invalid frame received.\r\n"); - return false; - } - else - { - pSignalWrapper_t sig = (pSignalWrapper_t)Buf; - if(sig->s.magic == SIGNALMAGIC) - { - pSignalPayload_t payload; - switch(sig->s.signal) - { - case SignalNothing: - if((sig->s.dataSize != 0) || (*Len != sizeof(signalWrapper_t))) - { - itmPrint(ITMSIGNAL, "Invalid data size %u for SignalNothing(%u).\r\n", (unsigned int)*Len, (unsigned int)sig->s.dataSize); - return false; - } - itmPrint(ITMSIGNAL, "SignalNothing\r\n"); - break; - - case SignalShutdown: - if((sig->s.dataSize != 0) || (*Len != sizeof(signalWrapper_t))) - { - itmPrint(ITMSIGNAL, "Invalid data size %u for SignalShutdown(%u).\r\n", (unsigned int)*Len, (unsigned int)sig->s.dataSize); - return false; - } - itmPrint(ITMSIGNAL, "SignalShutdown\r\n"); - tpmOp.flags.powerOffRequested = 1; - break; - - case SignalReset: - if((sig->s.dataSize != 0) || (*Len != sizeof(signalWrapper_t))) - { - itmPrint(ITMSIGNAL, "Invalid data size %u for SignalReset(%u).\r\n", (unsigned int)*Len, (unsigned int)sig->s.dataSize); - return false; - } - itmPrint(ITMSIGNAL, "SignalReset\r\n"); - tpmOp.flags.resetRequested = 1; - break; - - case SignalSetClock: - if((sig->s.dataSize != sizeof(unsigned int)) || (*Len != sizeof(signalWrapper_t) + sizeof(unsigned int))) - { - itmPrint(ITMSIGNAL, "Invalid data size %u for SignalSetClock(%u).\r\n", (unsigned int)*Len, (unsigned int)sig->s.dataSize); - return false; - } - payload = (pSignalPayload_t)&Buf[sizeof(signalWrapper_t)]; - SetRealTimeClock(payload->SignalSetClockPayload.time); - itmPrint(ITMSIGNAL, "SignalSetClock(0x%08x)\r\n", payload->SignalSetClockPayload.time); - break; - - case SignalCancelOn: - if((sig->s.dataSize != 0) || (*Len != sizeof(signalWrapper_t))) - { - itmPrint(ITMSIGNAL, "Invalid data size %u for SignalCancelOn(%u).\r\n", (unsigned int)*Len, (unsigned int)sig->s.dataSize); - return false; - } - itmPrint(ITMSIGNAL, "SignalCancelOn\r\n"); - _plat__SetCancel(); - break; - - case SignalCancelOff: - if((sig->s.dataSize != 0) || (*Len != sizeof(signalWrapper_t))) - { - itmPrint(ITMSIGNAL, "Invalid data size %u for SignalCancelOff(%u).\r\n", (unsigned int)*Len, (unsigned int)sig->s.dataSize); - return false; - } - itmPrint(ITMSIGNAL, "SignalCancelOff\r\n"); - _plat__ClearCancel(); - break; - - case SignalCommand: - if((sig->s.dataSize == 0) || - (*Len == sizeof(signalWrapper_t))) - { - itmPrint(ITMSIGNAL, "Invalid data size %u for SignalCommand(%u).\r\n", (unsigned int)*Len, (unsigned int)sig->s.dataSize); - return false; - } - payload = (pSignalPayload_t)&Buf[sizeof(signalWrapper_t)]; - unsigned int expected = sizeof(signalWrapper_t) + sizeof(unsigned int) * 2 + payload->SignalCommandPayload.cmdSize; - unsigned int maxAllowed = sizeof(tpmOp.msgBuf); - memset((unsigned char*)tpmOp.msgBuf, 0x00, sizeof(tpmOp.msgBuf)); - tpmOp.rspSize = 0; - itmPrint(ITMSIGNAL, "SignalCommand(%d)\r\n", payload->SignalCommandPayload.cmdSize); - - // Set the locality for the command - if(_plat__LocalityGet() != payload->SignalCommandPayload.locality) - { - _plat__LocalitySet(payload->SignalCommandPayload.locality); - itmPrint(ITMSIGNAL, "SetLocality(%d)\r\n", payload->SignalCommandPayload.locality); - } - - if((*Len == expected) && - (payload->SignalCommandPayload.cmdSize <= maxAllowed)) - { - memcpy((void*)tpmOp.msgBuf, (void*)payload->SignalCommandPayload.cmd, payload->SignalCommandPayload.cmdSize); - tpmOp.cmdSize = payload->SignalCommandPayload.cmdSize; - tpmOp.flags.executionRequested = 1; -// itmPrint(ITMSIGNAL, "Received(%d)\r\n", tpmOp.cmdSize); - } - else if((*Len < expected) && - (payload->SignalCommandPayload.cmdSize <= maxAllowed)) - { - unsigned int dataSnip = *Len - (sizeof(signalWrapper_t) + sizeof(unsigned int) * 2); - memcpy((void*)tpmOp.msgBuf, (void*)payload->SignalCommandPayload.cmd, dataSnip); - tpmOp.receivingCmd = payload->SignalCommandPayload.cmdSize; - tpmOp.cmdSize = dataSnip; -// itmPrint(ITMSIGNAL, "Received(%d)\r\n", tpmOp.cmdSize); - } - else - { - logError("Invalid command size.\r\n"); - return false; - } - break; - - case SignalResponse: - if((sig->s.dataSize != 0) || (*Len != sizeof(signalWrapper_t))) - { - itmPrint(ITMSIGNAL, "Invalid data size %u for SignalResponse(%u).\r\n", (unsigned int)*Len, (unsigned int)sig->s.dataSize); - return false; - } - itmPrint(ITMSIGNAL, "SignalResponse\r\n"); - if(tpmOp.rspSize > 0) - { - tpmOp.flags.responseRequested = 1; - } - break; - - default: - itmPrint(ITMSIGNAL, "Unknown Signal %u received.\r\n", sig->s.signal); - return false; - break; - } - } - } - return true; -} diff --git a/Samples/Nucleo-TPM/Shared/syscalls.c b/Samples/Nucleo-TPM/Shared/syscalls.c deleted file mode 100644 index 35a949cb..00000000 --- a/Samples/Nucleo-TPM/Shared/syscalls.c +++ /dev/null @@ -1,296 +0,0 @@ -/* -****************************************************************************** -File: syscalls.c -Info: Generated by Atollic TrueSTUDIO(R) 8.0.0 2017-10-17 - -The MIT License (MIT) -Copyright (c) 2009-2017 Atollic AB - -Permission is hereby granted, free of charge, to any person obtaining a copy -of this software and associated documentation files (the "Software"), to deal -in the Software without restriction, including without limitation the rights -to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -copies of the Software, and to permit persons to whom the Software is -furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice shall be included in all -copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -SOFTWARE. - -****************************************************************************** -*/ - -/* Includes */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "stm32l4xx_hal.h" -#include "StmUtil.h" - -extern RTC_HandleTypeDef hrtc; -extern UART_HandleTypeDef huart2; - -/* Variables */ -#undef errno -extern int32_t errno; - -uint8_t *__env[1] = { 0 }; -uint8_t **environ = __env; - -/* Functions */ -void initialise_monitor_handles() -{ -} - -int _getpid(void) -{ - errno = ENOSYS; - return -1; -} - -int _gettimeofday(struct timeval *ptimeval, void *ptimezone) -{ - if(ptimezone) - { - struct timezone* tz = ptimezone; - tz->tz_minuteswest = _timezone / 60; - tz->tz_dsttime = _daylight; - } - - if(ptimeval) - { - RTC_TimeTypeDef time = {0}; - RTC_DateTypeDef date = {0}; - - if((HAL_RTC_GetTime(&hrtc, &time, RTC_FORMAT_BIN) != HAL_OK) || - (HAL_RTC_GetDate(&hrtc, &date, RTC_FORMAT_BIN) != HAL_OK)) - { - errno = ENOSYS; - return -1; - } - - struct tm local = {0}; - local.tm_year = date.Year + 100; - local.tm_mon = date.Month - 1; - local.tm_mday = date.Date; - local.tm_wday = date.WeekDay - 1; - local.tm_hour = time.Hours; - local.tm_min = time.Minutes; - local.tm_sec = time.Seconds; - ptimeval->tv_sec = mktime(&local); - ptimeval->tv_usec = (time.SecondFraction * 1000 * 1000 / time.SubSeconds); - } - - return 0; -} - -int _kill(int32_t pid, int32_t sig) -{ - errno = ENOSYS; - return -1; -} - -void _exit(int32_t status) -{ - while (1) {} /* Make sure we hang here */ -} - -int _write(int32_t file, uint8_t *ptr, int32_t len) -{ -#ifndef NDEBUG - if (file == 1) //STDOUT - { - HAL_UART_Transmit(&huart2, ptr, len, HAL_MAX_DELAY); - } - else if (file == 2) //STDERR - { - for(uint32_t n = 0; n < len; n++) - { - ITM_SendChar(ptr[n]); - } - return len; - } - else if ((file >= ITMFILENO) && (file < ITMFILENO + ITMCHANNELNO)) - { - for(uint32_t n = 0; n < len; n++) - { - ITM_Out(file - ITMFILENO, ptr[n]); - } - return len; - } -#endif - errno = ENOSYS; - return -1; -} - -void * _sbrk(int32_t incr) -{ - extern char end; /* Set by linker. */ - static char * heap_end; - char * prev_heap_end; - - if (heap_end == 0) { - heap_end = & end; - } - - prev_heap_end = heap_end; - heap_end += incr; - - return (void *) prev_heap_end; -} - -int _close(int32_t file) -{ - if ((file >= ITMFILENO) && (file < ITMFILENO + ITMCHANNELNO)) - { - return 0; - } - errno = ENOSYS; - return -1; -} - - -int _fstat(int32_t file, struct stat *st) -{ - if ((file >= ITMFILENO) && (file < ITMFILENO + ITMCHANNELNO)) - { - st->st_mode = S_IFCHR; - st->st_size = 0; - return 0; - } - errno = ENOSYS; - return -1; -} - -int _isatty(int32_t file) -{ - if ((file >= ITMFILENO) && (file < ITMFILENO + ITMCHANNELNO)) - { - return 1; - } - errno = ENOSYS; - return 0; -} - -int _lseek(int32_t file, int32_t ptr, int32_t dir) -{ - if ((file >= ITMFILENO) && (file < ITMFILENO + ITMCHANNELNO)) - { - return 0; - } - errno = ENOSYS; - return -1; -} - -int _read(int32_t file, uint8_t *ptr, int32_t len) -{ - errno = ENOSYS; - return -1; -} - -int _readlink(const char *path, char *buf, size_t bufsize) -{ - errno = ENOSYS; - return -1; -} - -int _open(const uint8_t *path, int32_t flags, int32_t mode) -{ - unsigned int channel = 0; - if((strlen((char*)path) == 7 ) && - !strncmp((char*)path, "ITM[", 4) && - !strcmp((char*)&path[6], "]") && - (sscanf((char*)&path[4],"%02u", &channel) == 1) && - (channel < ITMCHANNELNO) && - ((flags == 0x601) || (flags == 0x10601))) - { - return ITMFILENO + channel; - } - errno = ENOSYS; - return -1; -} - -int _wait(int32_t *status) -{ - errno = ENOSYS; - return -1; -} - -int _unlink(const uint8_t *name) -{ - errno = ENOSYS; - return -1; -} - -int _times(struct tms *buf) -{ - RTC_TimeTypeDef time = {0}; - RTC_DateTypeDef date = {0}; - - if((HAL_RTC_GetTime(&hrtc, &time, RTC_FORMAT_BIN) != HAL_OK) || - (HAL_RTC_GetDate(&hrtc, &date, RTC_FORMAT_BIN) != HAL_OK)) - { - errno = ENOSYS; - return -1; - } - - struct tm local = {0}; - local.tm_year = date.Year + 100; - local.tm_mon = date.Month - 1; - local.tm_mday = date.Date; - local.tm_wday = date.WeekDay - 1; - local.tm_hour = time.Hours; - local.tm_min = time.Minutes; - local.tm_sec = time.Seconds; - - buf->tms_utime = mktime(&local); /* user time */ - buf->tms_stime = 0; /* system time */ - buf->tms_cutime = 0; /* user time, children */ - buf->tms_cstime = 0; /* system time, children */ - return 0; -} - -int _stat(const uint8_t *file, struct stat *st) -{ - errno = ENOSYS; - return -1; -} - -int _symlink(const char *path1, const char *path2) -{ - errno = ENOSYS; - return -1; -} - -int _link(const uint8_t *old, const uint8_t *new) -{ - errno = ENOSYS; - return -1; -} - -int _fork(void) -{ - errno = ENOSYS; - return -1; -} - -int _execve(const uint8_t *name, uint8_t * const *argv, uint8_t * const *env) -{ - errno = ENOSYS; - return -1; -} - diff --git a/Samples/Nucleo-TPM/USB_Hookup.jpg b/Samples/Nucleo-TPM/USB_Hookup.jpg deleted file mode 100644 index c207456b..00000000 Binary files a/Samples/Nucleo-TPM/USB_Hookup.jpg and /dev/null differ diff --git a/Samples/Nucleo-TPM/VCOM/VCOM-TPM.sln b/Samples/Nucleo-TPM/VCOM/VCOM-TPM.sln deleted file mode 100644 index f6be6b9a..00000000 --- a/Samples/Nucleo-TPM/VCOM/VCOM-TPM.sln +++ /dev/null @@ -1,31 +0,0 @@ - -Microsoft Visual Studio Solution File, Format Version 12.00 -# Visual Studio 15 -VisualStudioVersion = 15.0.27004.2009 -MinimumVisualStudioVersion = 10.0.40219.1 -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "VCOM-TPM", "VCOM-TPM\VCOM-TPM.vcxproj", "{137D2EE5-E1D6-44E7-B11F-B082EEBD86E3}" -EndProject -Global - GlobalSection(SolutionConfigurationPlatforms) = preSolution - Debug|x64 = Debug|x64 - Debug|x86 = Debug|x86 - Release|x64 = Release|x64 - Release|x86 = Release|x86 - EndGlobalSection - GlobalSection(ProjectConfigurationPlatforms) = postSolution - {137D2EE5-E1D6-44E7-B11F-B082EEBD86E3}.Debug|x64.ActiveCfg = Debug|x64 - {137D2EE5-E1D6-44E7-B11F-B082EEBD86E3}.Debug|x64.Build.0 = Debug|x64 - {137D2EE5-E1D6-44E7-B11F-B082EEBD86E3}.Debug|x86.ActiveCfg = Debug|Win32 - {137D2EE5-E1D6-44E7-B11F-B082EEBD86E3}.Debug|x86.Build.0 = Debug|Win32 - {137D2EE5-E1D6-44E7-B11F-B082EEBD86E3}.Release|x64.ActiveCfg = Release|x64 - {137D2EE5-E1D6-44E7-B11F-B082EEBD86E3}.Release|x64.Build.0 = Release|x64 - {137D2EE5-E1D6-44E7-B11F-B082EEBD86E3}.Release|x86.ActiveCfg = Release|Win32 - {137D2EE5-E1D6-44E7-B11F-B082EEBD86E3}.Release|x86.Build.0 = Release|Win32 - EndGlobalSection - GlobalSection(SolutionProperties) = preSolution - HideSolutionNode = FALSE - EndGlobalSection - GlobalSection(ExtensibilityGlobals) = postSolution - SolutionGuid = {C3149E18-AC8A-49A8-BEE5-BC5854EC0506} - EndGlobalSection -EndGlobal diff --git a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/VCOM-TPM.cpp b/Samples/Nucleo-TPM/VCOM/VCOM-TPM/VCOM-TPM.cpp deleted file mode 100644 index fad3053e..00000000 Binary files a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/VCOM-TPM.cpp and /dev/null differ diff --git a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/VCOM-TPM.vcxproj b/Samples/Nucleo-TPM/VCOM/VCOM-TPM/VCOM-TPM.vcxproj deleted file mode 100644 index f2d4e7bf..00000000 --- a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/VCOM-TPM.vcxproj +++ /dev/null @@ -1,163 +0,0 @@ - - - - - Debug - Win32 - - - Release - Win32 - - - Debug - x64 - - - Release - x64 - - - - 15.0 - {137D2EE5-E1D6-44E7-B11F-B082EEBD86E3} - Win32Proj - VCOMTPM - 10.0.16299.0 - - - - Application - true - v141 - Unicode - - - Application - false - v141 - true - Unicode - - - Application - true - v141 - Unicode - - - Application - false - v141 - true - Unicode - - - - - - - - - - - - - - - - - - - - - true - - - true - - - false - - - false - - - - Use - Level3 - Disabled - true - WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions) - $(SolutionDir)..\external\Urchin\Inc - - - Console - true - crypt32.lib;bcrypt.lib;tbs.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) - - - - - Use - Level3 - Disabled - true - _DEBUG;_CONSOLE;%(PreprocessorDefinitions) - - - Console - true - - - - - Use - Level3 - MaxSpeed - true - true - true - WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) - - - Console - true - true - true - - - - - Use - Level3 - MaxSpeed - true - true - true - NDEBUG;_CONSOLE;%(PreprocessorDefinitions) - - - Console - true - true - true - - - - - - - - - Create - Create - Create - Create - - - - - - - \ No newline at end of file diff --git a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/VCOM-TPM.vcxproj.filters b/Samples/Nucleo-TPM/VCOM/VCOM-TPM/VCOM-TPM.vcxproj.filters deleted file mode 100644 index ad33d7c0..00000000 --- a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/VCOM-TPM.vcxproj.filters +++ /dev/null @@ -1,33 +0,0 @@ - - - - - {4FC737F1-C7A5-4376-A066-2A32D752A2FF} - cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx - - - {93995380-89BD-4b04-88EB-625FBE52EBFB} - h;hh;hpp;hxx;hm;inl;inc;xsd - - - {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} - rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms - - - - - Header Files - - - Header Files - - - - - Source Files - - - Source Files - - - \ No newline at end of file diff --git a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/stdafx.cpp b/Samples/Nucleo-TPM/VCOM/VCOM-TPM/stdafx.cpp deleted file mode 100644 index 199d4985..00000000 Binary files a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/stdafx.cpp and /dev/null differ diff --git a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/stdafx.h b/Samples/Nucleo-TPM/VCOM/VCOM-TPM/stdafx.h deleted file mode 100644 index b93ac608..00000000 Binary files a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/stdafx.h and /dev/null differ diff --git a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/targetver.h b/Samples/Nucleo-TPM/VCOM/VCOM-TPM/targetver.h deleted file mode 100644 index 567cd346..00000000 Binary files a/Samples/Nucleo-TPM/VCOM/VCOM-TPM/targetver.h and /dev/null differ diff --git a/Samples/Nucleo-TPM/microUSB_Hookup.jpg b/Samples/Nucleo-TPM/microUSB_Hookup.jpg deleted file mode 100644 index 22b5e577..00000000 Binary files a/Samples/Nucleo-TPM/microUSB_Hookup.jpg and /dev/null differ diff --git a/Samples/TPMCmd-DeviceID/Platform/src/EPS.c b/Samples/TPMCmd-DeviceID/Platform/src/EPS.c deleted file mode 100644 index b74e04dc..00000000 --- a/Samples/TPMCmd-DeviceID/Platform/src/EPS.c +++ /dev/null @@ -1,285 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#if !defined(_MSC_VER) && defined(USE_PLATFORM_EPS) -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "Tpm.h" -#include "Platform_fp.h" - -#define DEVICEID_SIZE 48 - -// This extension is needed as TPM2B_STRING only define TPM2B variable when #GLOBAL_C is defined. -#define TPM2B_STRING_EXTENSION(name, value) \ -TPM2B_STRING(name, value); \ -const TPM2B_##name##_ name##_ = STRING_INITIALIZER(value); \ -const TPM2B *name = &name##_.b - -TPM2B_STRING_EXTENSION(EPS_CREATION, "EPS Creation"); - -// Definition for Device ID value. -TPM2B_TYPE(DEVICEID, DEVICEID_SIZE); -const unsigned int MAC_ADDRESS_MAXIMUM_SIZE = 6; - -// This value is used to store device id derived from hardware parameters. -static TPM2B_DEVICEID deviceID = {0}; -static BOOL isDeviceIDSet = FALSE; - -// Read mac address of the device and copy over to the given buffer. -// Returns 0 for success and -1 for error. - -static int GetMacAddress() -{ - struct ifreq interfaceRequest = {0}; - struct ifconf interfaceConfiguration = {0}; - char interfaceConfigurationBuffer[1024] = {0}; - - int inetSocket = socket(AF_INET, SOCK_DGRAM, IPPROTO_IP); - if (inetSocket == -1) - { - return -1; - } - - interfaceConfiguration.ifc_len = sizeof(interfaceConfigurationBuffer); - interfaceConfiguration.ifc_buf = interfaceConfigurationBuffer; - if((ioctl(inetSocket, SIOCGIFCONF, &interfaceConfiguration)) == -1) - { - close(inetSocket); - return -1; - } - - struct ifreq* intefaceRequestStart = interfaceConfiguration.ifc_req; - const struct ifreq* const interfaceRequestEnd = intefaceRequestStart + (interfaceConfiguration.ifc_len / sizeof(struct ifreq)); - - int32_t result = -1; - - for (; intefaceRequestStart != interfaceRequestEnd; ++intefaceRequestStart) - { - strcpy(interfaceRequest.ifr_name, intefaceRequestStart->ifr_name); - if (ioctl(inetSocket, SIOCGIFFLAGS, &interfaceRequest) == 0) - { - // don't count loopback - if ((interfaceRequest.ifr_flags & IFF_LOOPBACK) == 0) - { - if (ioctl(inetSocket, SIOCGIFHWADDR, &interfaceRequest) == 0) - { - result = 0; - break; - } - } - } - else - { - break; - } - } - - if (result == 0) - { - unsigned int size = deviceID.t.size <= MAC_ADDRESS_MAXIMUM_SIZE ? deviceID.t.size : MAC_ADDRESS_MAXIMUM_SIZE; - memcpy(deviceID.t.buffer, interfaceRequest.ifr_hwaddr.sa_data, size); - } - - close(inetSocket); - return result; -} - -// Read primary harddisk/emmc disk serial id from device and copy over to the given buffer. -// Returns 0 for success and -1 for error. - -static int GetDiskSerialNumber() -{ - struct udev *ud = NULL; - struct stat statbuf; - struct udev_device *device = NULL; - struct udev_list_entry *entry = NULL; - int result = -1; - - ud = udev_new(); - if (NULL == ud) - { - return result; - } - else - { - - const unsigned int diskDeviceNamesSize = 2; - const char *diskDeviceNames[] = { - "/dev/sda", // primary hard disk. - "/dev/mmcblk0" // primary eMMC disk. - }; - - unsigned int i = 0; - while (i < diskDeviceNamesSize) - { - if (0 == stat(diskDeviceNames[i], &statbuf)) - { - break; - } - i++; - } - - if (i == diskDeviceNamesSize) - { - goto Cleanup; - } - - const char blockDeviceType = 'b'; - device = udev_device_new_from_devnum(ud, blockDeviceType, statbuf.st_rdev); - if (NULL == device) - { - goto Cleanup; - } - else - { - entry = udev_device_get_properties_list_entry(device); - while (NULL != entry) - { - if (0 == strcmp(udev_list_entry_get_name(entry), - "ID_SERIAL")) - { - break; - } - - entry = udev_list_entry_get_next(entry); - } - - if(entry == NULL) - { - goto Cleanup; - } - - const char* serialNumber = udev_list_entry_get_value(entry); - size_t serialNumberLength = strlen(serialNumber); - - size_t dataCopyLength = deviceID.t.size - MAC_ADDRESS_MAXIMUM_SIZE; - if (serialNumberLength < dataCopyLength) - { - dataCopyLength = serialNumberLength; - } - - memcpy(deviceID.t.buffer, serialNumber, dataCopyLength); - - result = 0; - } - -Cleanup: - if(device) - { - udev_device_unref(device); - } - - (void)udev_unref(ud); - return result; - } -} - -#if defined(SIMULATION) && (SIMULATION == YES) -// Get device id from hardware parameters. -// CAUTION: Primary seeds derived from device unique IDs are guaranteed to remain the same as long as the reference -// implementation manufactures its NV state on the same device. Since this implementation of GetDeviceID() relies -// solely on publicly accessible values (storage device serial numbers and networking card MAC address), it can -// only be used for the simulation purposes, as it cannot be used to produce a secret value. -// pre-requisites - assumes that MAC address or disk device (i.e. /dev/sda or /dev/mmcblk0) present on the device. -TPM_RC GetDeviceID() -{ - if(isDeviceIDSet == FALSE) - { - if(GetMacAddress() == 0) - { - isDeviceIDSet = TRUE; - } - - if(GetDiskSerialNumber() == 0) - { - isDeviceIDSet = TRUE; - } - - if(isDeviceIDSet == FALSE) - { - return TPM_RC_FAILURE; - } - } - - return TPM_RC_SUCCESS; -} -#endif - -void GetSeed(UINT16 size, uint8_t *seed, const TPM2B *purpose) -{ - RAND_STATE rand; - - TPM_RC result = GetDeviceID(); - if(result != TPM_RC_SUCCESS) - { - LOG_FAILURE(FATAL_ERROR_INTERNAL); - return; - } - - result = DRBG_InstantiateSeeded(&rand.drbg, &deviceID.b, purpose, NULL, NULL); - if(result != TPM_RC_SUCCESS) - { - LOG_FAILURE(FATAL_ERROR_INTERNAL); - return; - } - - if(DRBG_Generate(&rand, seed, size) == 0) - { - LOG_FAILURE(FATAL_ERROR_INTERNAL); - } - return; -} - -void -_plat__GetEPS( - UINT16 size, - uint8_t *seed - ) -{ - // Ignore GCC warning. - (void)EPS_CREATION_; - GetSeed(size, seed, EPS_CREATION); -} - -#endif \ No newline at end of file diff --git a/Samples/TPMCmd-DeviceID/build-tpmsimulator-deviceid b/Samples/TPMCmd-DeviceID/build-tpmsimulator-deviceid deleted file mode 100755 index 56f21c53..00000000 --- a/Samples/TPMCmd-DeviceID/build-tpmsimulator-deviceid +++ /dev/null @@ -1,52 +0,0 @@ -#!/usr/bin/env sh -# The copyright in this software is being made available under the BSD License, -# included below. This software may be subject to other third party and -# contributor rights, including patent rights, and no such rights are granted -# under this license. -# -# Copyright (c) Intel Corporation -# -# All rights reserved. -# -# BSD License -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, this list -# of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, this -# list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR -# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -# Script will build tpm2-simulator by using DeviceID. -# CAUTION: Endorsement seed derived from device unique IDs are guaranteed to remain the same as long as the reference -# implementation manufactures its NV state on the same device. It relies on publicly accessible values -# storage device serial numbers and networking card MAC address), it can only be used for the simulation purposes, -# as it cannot be used to produce a secret value. - -basedir=$1 - -# Copy needed tpm simulator reference implementation source code files. -cp -r -n -v $basedir/TPMCmd/* $basedir/Samples/TPMCmd-DeviceID - -cd $basedir/Samples/TPMCmd-DeviceID - -./bootstrap -./configure --enable-usedeviceid=yes -make -j2 - -cd $basedir - diff --git a/TPMCmd/.gitignore b/TPMCmd/.gitignore new file mode 100644 index 00000000..0415e768 --- /dev/null +++ b/TPMCmd/.gitignore @@ -0,0 +1 @@ +OsslInclude/ \ No newline at end of file diff --git a/TPMCmd/CMakeLists.txt b/TPMCmd/CMakeLists.txt new file mode 100644 index 00000000..4d803cc3 --- /dev/null +++ b/TPMCmd/CMakeLists.txt @@ -0,0 +1,252 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +# WARNING: CMAKE SUPPORT IS EXPERIMENTAL +# +########################################################## +# Summary +########################################################## +# Top-level CMakeLists file for building a TPM Application via CMake +# +# This file is an example, and is designed to be customized for a different +# application as detailed in comments below. +# +########################################################## +# Description +########################################################## +# The Platform library and Simulator examples in the repo support both +# add_directory (building the TPM library, Platform, and Simulator together), as +# well as building the library in a separate build domain where the Platform and +# Application (simulator) are built in subsequent build passes, perhaps by a +# different build environment. +# +# The default behavior of this script is to build the Platform and Simulator in +# the same CMake pass as the library. +# +# This behavior is controlled by the Tpm_BuildOption_LibOnly variable. If this +# is set to a TRUE value, then this CMakeLists file will only build the +# TPM Core Library and the crypto support. +# +# The scripts\cmake_all.cmd and related cmake_env/gen/build.cmd scripts +# demonstrate how to preform a multi-phase build using CMake where the Platform +# library and TPM Application are built separately from the Core library and +# each other and are connected by find_package(CONFIG). +# +# Note: The Core Library does not currently support building the crypto support +# in a separate build pass from the Core due to cyclic header dependencies between +# the crypto components. +# +########################################################## +# Notation +########################################################## +# Sections of this CMakeFiles.txt file are marked DO NOT MODIFY +# these are intended to be copied into a customized script +# in the same relative location of the other parts of the +# script when a custom TPM application is being created with +# CMake. +# Customizable sections are similarly marked and can be +# replaced as indicated. + +########################################################## +# PART 0 - SETUP +########################################################## +# DO NOT MODIFY - Validate Directory Structure +cmake_minimum_required(VERSION 3.16.3) +if (NOT TPM_CMAKE_CORE_FOLDER) + set(TPM_CMAKE_CORE_FOLDER ${CMAKE_CURRENT_SOURCE_DIR}/tpm) +endif() + +if (NOT EXISTS "${TPM_CMAKE_CORE_FOLDER}") + message(FATAL_ERROR "${TPM_CMAKE_CORE_FOLDER} does not exist" ) +endif() +if (NOT EXISTS "${TPM_CMAKE_CORE_FOLDER}/cryptolibs/common") + message(FATAL_ERROR "${TPM_CMAKE_CORE_FOLDER}/cryptolibs/common does not exist" ) +endif() +if (NOT EXISTS "${TPM_CMAKE_CORE_FOLDER}/include/public") + message(FATAL_ERROR "${TPM_CMAKE_CORE_FOLDER}/include/public does not exist" ) +endif() +if (NOT EXISTS "${TPM_CMAKE_CORE_FOLDER}/include/private") + message(FATAL_ERROR "${TPM_CMAKE_CORE_FOLDER}/include/private does not exist" ) +endif() +if (NOT EXISTS "${TPM_CMAKE_CORE_FOLDER}/cmake") + message(FATAL_ERROR "${TPM_CMAKE_CORE_FOLDER}/cmake does not exist" ) +endif() + +# Include Package macros expected by the +# Reference Code CMake system. +include(${CMAKE_CURRENT_SOURCE_DIR}/tpm/cmake/tpm_support.cmake) + +# Create CACHE placeholders Crypto options for CMake-gui +# and for verification. +generate_tpm_crypto_options() +########################################################## + +########################################################## +# CUSTOMIZABLE: Top-Level CMake project representing the +# application +# recommend not removing the ensure call +project(TpmReferenceApplication) +ensure_cross_compile_prefix() +print_project_info() +########################################################## + +########################################################## +# CUSTOMIZABLE: Set the list of AVAILABLE Crypto Libs that +# can be chosen in CMake-gui. This is not +# the active set, but does restrict what can +# be used. +set(cryptoLibOptions_Symmetric Ossl CACHE STRING "List of available symmetric crypto implementations") +set(cryptoLibOptions_Hash Ossl CACHE STRING "List of available hash implementations") +set(cryptoLibOptions_BnMath Ossl CACHE STRING "List of available bignum math implementations") +########################################################## + +########################################################## +# CUSTOMIZABLE: Set the Crypto Libs, or set the default. +# The values here or from the command line +# must be in the list of allowed values +# above. Providing defaults here allows +# opening this CMakeLists directly in +# Visual Studio. +# The folders represented must exist as subdirs +# of /cryptolibs/ (custom), or +# tpm/cryptolibs/ (built-ins) +# The match is CASE-SENSITIVE! +# +# NULL is the default cache value set by generate_tpm_crypto_options +# if nothing has been set from the command line, use defaults +if (cryptoLib_Symmetric STREQUAL "NULL") + set(cryptoLib_Symmetric Ossl) +endif() +if (cryptoLib_Hash STREQUAL "NULL") + set(cryptoLib_Hash Ossl) +endif() +if (cryptoLib_BnMath STREQUAL "NULL") + set(cryptoLib_BnMath Ossl) +endif() +if (cryptoLib_Math STREQUAL "NULL") + set(cryptoLib_Math TpmBigNum) +endif() +########################################################## + +########################################################## +# PART 1 - CONFIGURATION +########################################################## +# CUSTOMIZABLE: Copy/paste the TpmConfiguration folder +# and customize as indicated. Then, set the +# user_TpmConfiguration_Dir cache variable +# to point to the customized folder. +# +# WARNING: Project Name ** MUST ** be TpmConfiguration as this +# is referenced by multiple downstream components +verify_tpm_crypto_options() +set(user_TpmConfiguration_Dir "${CMAKE_CURRENT_LIST_DIR}/TpmConfiguration" CACHE PATH "Directory containing customized TPM configuration headers") +add_subdirectory(${user_TpmConfiguration_Dir} TpmConfiguration) +########################################################## + +########################################################## +# PART 2 - Enable Full Build warnings. +########################################################## +# set it on TpmConfiguration so it flows down to other libraries. +set(MSVC_OPTIONS /WX /Wall) +# turn off alignment padding warnings. +set(MSVC_OPTIONS "${MSVC_OPTIONS}" /wd4820) +# turn off Spectre warnings +set(MSVC_OPTIONS "${MSVC_OPTIONS}" /wd5045) +# turn off no function prototype given: converting '()' to '(void)' +set(MSVC_OPTIONS "${MSVC_OPTIONS}" /wd4255) +# for some reason the built-in limits.h complains without this on MSVC. +# minimal repro https://stackoverflow.com/questions/66408981/iostream-and-define-stdc-want-secure-lib-0-results-in-error-c2039-sprin +set(MSVC_OPTIONS "${MSVC_OPTIONS}" -D__STDC_WANT_SECURE_LIB__=1) +# turn off unreachable code warnings. +set(MSVC_OPTIONS "${MSVC_OPTIONS}" /wd4702) +# turn off C4668 - 'x' is not defined as a preprocessor macro, replacing with '0' for '#if/#elif' +# this is actually unsafe for the TPM code because this error can happen if there is a mismatch +# between the core library and the configuration provided by the consuming code. +# However, some build servers necessitate this because they use old Windows SDK headers. +# that don't build cleanly. +set(MSVC_OPTIONS "${MSVC_OPTIONS}" /wd4668) +# turn off C4710 - function not inlined +set(MSVC_OPTIONS "${MSVC_OPTIONS}" /wd4710) +# Hash casts fail on MSVC. +set(MSVC_OPTIONS "${MSVC_OPTIONS}" /wd4191) + +# debug includes +#set(MSVC_OPTIONS "${MSVC_OPTIONS}" /showIncludes) + +# warnings as errors +set(GCC_OPTIONS -Werror) + +target_compile_options(TpmConfiguration INTERFACE + "$<$,$>:${GCC_OPTIONS}>" + "$<$,$>:${MSVC_OPTIONS}>" +) + +########################################################## + +########################################################## +# PART 3 - Build Header Libraries +# Public headers are intended to be included by any consumers of the TPM - including +# platform implementations and apps +################################################################################### +# DO NOT MODIFY +# this project builds the Tpm_Public_Headers Library +add_subdirectory(tpm/include/public) +# this project builds the Tpm_CryptoLib_Common Library +add_subdirectory(tpm/cryptolibs/common) +########################################################## + +########################################################## +# PART 4 - Setup Crypto Library prerequisites +########################################################## +# CUSTOMIZABLE: Setup prerequisites for crypto libraries +# before process_tpm_crypto_options +# +if(WIN32) + # This layout of the OsslInclude folder is based on the behavior of the current + # VS solution. + if( CMAKE_SIZEOF_VOID_P EQUAL 8 ) + set( OSSL_INCLUDE_SUBDIR "/x64") + elseif( CMAKE_SIZEOF_VOID_P EQUAL 4 ) + set( OSSL_INCLUDE_SUBDIR "") + else() + message(FATAL_ERROR "Unable to determine OpenSSL Architecture.") + endif() + set(OSSL_INCLUDE_SUBDIR ${CMAKE_SOURCE_DIR}/OsslInclude${OSSL_INCLUDE_SUBDIR}) +else() + # let system defaults locate it. + unset(OSSL_INCLUDE_SUBDIR) +endif() + +########################################################## + +########################################################## +# PART 5 - Process Crypto Libraries +########################################################## +# DO NOT MODIFY +# This function scans the requested crypto options and +# looks for the appropriate directory and calls +# add_subdirectory on them if found. +# This step is customized indirectly via the +# cryptoLib_* variables set above. +process_tpm_crypto_options() +########################################################## + +########################################################## +# DO NOT MODIFY: build the Core TPM library. +add_subdirectory(tpm) +########################################################## + +########################################################## +# CUSTOMIZABLE: Add the subdirectories for the Platform +# and target application, if any. +# These lines may be omitted and the +# tpm library created above may be +# consumed in another build system manually. +# +if (NOT Tpm_BuildOption_LibOnly) + add_subdirectory(Platform) + add_subdirectory(Simulator) +endif() +########################################################## diff --git a/TPMCmd/CMakeSettings.json b/TPMCmd/CMakeSettings.json new file mode 100644 index 00000000..502a2d71 --- /dev/null +++ b/TPMCmd/CMakeSettings.json @@ -0,0 +1,26 @@ +{ + "configurations": [ + { + "name": "x64-Debug", + "generator": "Visual Studio 16 2019 Win64", + "configurationType": "Debug", + "inheritEnvironments": [ "msvc_x64_x64" ], + "buildRoot": "${projectDir}\\out\\build\\${name}", + "installRoot": "${projectDir}\\out\\install\\${name}", + "cmakeCommandArgs": "", + "buildCommandArgs": "", + "ctestCommandArgs": "" + }, + { + "name": "x86-Debug", + "generator": "Visual Studio 16 2019", + "configurationType": "Debug", + "buildRoot": "${projectDir}\\out\\build\\${name}", + "installRoot": "${projectDir}\\out\\install\\${name}", + "cmakeCommandArgs": "", + "buildCommandArgs": "", + "ctestCommandArgs": "", + "inheritEnvironments": [ "msvc_x86" ] + } + ] +} \ No newline at end of file diff --git a/TPMCmd/Makefile.am b/TPMCmd/Makefile.am index 1df7a5e2..4afe12e1 100644 --- a/TPMCmd/Makefile.am +++ b/TPMCmd/Makefile.am @@ -36,8 +36,18 @@ PLATFORM_INC = -I $(srcdir)/Platform/include \ -I $(srcdir)/Platform/include/prototypes SIMULATOR_INC = -I $(srcdir)/Simulator/include \ -I $(srcdir)/Simulator/include/prototypes -TPM_INC = -I $(srcdir)/tpm/include \ - -I $(srcdir)/tpm/include/prototypes +TPM_INC = \ + -I $(srcdir)/tpm/include \ + -I $(srcdir)/tpm/include/platform_interface \ + -I $(srcdir)/tpm/include/platform_interface/prototypes \ + -I $(srcdir)/tpm/include/private \ + -I $(srcdir)/tpm/include/private/prototypes \ + -I $(srcdir)/tpm/include/public \ + -I $(srcdir)/tpm/cryptolibs \ + -I $(srcdir)/tpm/cryptolibs/common/include \ + -I $(srcdir)/tpm/cryptolibs/Ossl/include \ + -I $(srcdir)/tpm/cryptolibs/TpmBigNum/include \ + -I $(srcdir)/TpmConfiguration libplatform = Platform/src/libplatform.a libtpm = tpm/src/libtpm.a diff --git a/TPMCmd/Platform/CMakeLists.txt b/TPMCmd/Platform/CMakeLists.txt new file mode 100644 index 00000000..86098c83 --- /dev/null +++ b/TPMCmd/Platform/CMakeLists.txt @@ -0,0 +1,84 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +cmake_minimum_required(VERSION 3.16.3) +include(${CMAKE_CURRENT_SOURCE_DIR}/../tpm/cmake/tpm_support.cmake) + +project(Tpm_PlatformLib VERSION 1.0) +print_project_info() + +# use standard output directories. Expected by package_utilities +include(GNUInstallDirs) + +add_library(Tpm_PlatformLib STATIC + src/Cancel.c + src/Clock.c + src/DebugHelpers.c + src/Entropy.c + src/ExtraData.c + src/LocalityPlat.c + src/NVMem.c + src/PlatformACT.c + src/PlatformData.c + src/PlatformPcr.c + src/PowerPlat.c + src/PPPlat.c + src/RunCommand.c + src/Unique.c + src/VendorInfo.c +) +add_library(Tpm_PlatformLib::Tpm_PlatformLib ALIAS Tpm_PlatformLib) + +target_include_directories(Tpm_PlatformLib PRIVATE + "$" +) + +# project public platform include dependencies +target_include_directories(Tpm_PlatformLib PUBLIC + "$" + "$" +) + +# Preprocessor definitions +target_compile_definitions(Tpm_PlatformLib PRIVATE + _UNICODE + WIN32 + _LIB +) + +# Only call find_package if this CMakeLists file is not being included via +# add_subdirectory. Calling find_package during add_subdirectory will cause the +# REQUIRED clause of the find_pacakge to fail since they haven't been built +# yet.) + +if(PROJECT_IS_TOP_LEVEL) + # Dependency libs and include directories published by Tpm_CoreLib + find_package(TpmConfiguration CONFIG REQUIRED PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(Tpm_Public_Headers CONFIG REQUIRED PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(Tpm_Platform_Interface CONFIG REQUIRED PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) +endif() + +target_link_libraries(Tpm_PlatformLib PUBLIC TpmConfiguration::TpmConfiguration) +target_link_libraries(Tpm_PlatformLib PUBLIC Tpm_Public_Headers::Tpm_Public_Headers) +target_link_libraries(Tpm_PlatformLib PUBLIC Tpm_Platform_Interface::Tpm_Platform_Interface) + +install_and_export_config_targets(${PROJECT_NAME}) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## +install(FILES + ${CMAKE_CURRENT_SOURCE_DIR}/include/Platform.h + ${CMAKE_CURRENT_SOURCE_DIR}/include/PlatformACT.h + ${CMAKE_CURRENT_SOURCE_DIR}/include/PlatformClock.h + ${CMAKE_CURRENT_SOURCE_DIR}/include/PlatformData.h + DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/Tpm_PlatformLib/include) + +install(FILES + ${CMAKE_CURRENT_SOURCE_DIR}/include/prototypes/platform_public_interface.h + DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/Tpm_PlatformLib/include/prototypes) + +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(${PROJECT_NAME}) diff --git a/TPMCmd/Platform/include/Platform.h b/TPMCmd/Platform/include/Platform.h index ed1b8203..af02e91e 100644 --- a/TPMCmd/Platform/include/Platform.h +++ b/TPMCmd/Platform/include/Platform.h @@ -1,51 +1,25 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #ifndef _PLATFORM_H_ #define _PLATFORM_H_ -#include "TpmBuildSwitches.h" -#include "BaseTypes.h" -#include "TPMB.h" -#include "MinMax.h" - -#include "TpmProfile.h" +#include +#include +// TODO_RENAME_INC_FOLDER: public refers to the TPM_CoreLib public headers +#include +#include +#include #include "PlatformACT.h" #include "PlatformClock.h" #include "PlatformData.h" -#include "Platform_fp.h" +#include "prototypes/platform_public_interface.h" +// TODO_RENAME_INC_FOLDER:platform_interface refers to the TPM_CoreLib platform interface +#include +#include + +#define GLOBAL_C +#define NV_C +#include +#include #endif // _PLATFORM_H_ diff --git a/TPMCmd/Platform/include/PlatformACT.h b/TPMCmd/Platform/include/PlatformACT.h index a9173673..cefd28b3 100644 --- a/TPMCmd/Platform/include/PlatformACT.h +++ b/TPMCmd/Platform/include/PlatformACT.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ // This file contains the definitions for the ACT macros and data types used in the // ACT implementation. @@ -160,22 +126,22 @@ typedef struct ACT_DATA # define IF_ACT_F_IMPLEMENTED(op) op(F) #endif -#define FOR_EACH_ACT(op) \ - IF_ACT_0_IMPLEMENTED(op) \ - IF_ACT_1_IMPLEMENTED(op) \ - IF_ACT_2_IMPLEMENTED(op) \ - IF_ACT_3_IMPLEMENTED(op) \ - IF_ACT_4_IMPLEMENTED(op) \ - IF_ACT_5_IMPLEMENTED(op) \ - IF_ACT_6_IMPLEMENTED(op) \ - IF_ACT_7_IMPLEMENTED(op) \ - IF_ACT_8_IMPLEMENTED(op) \ - IF_ACT_9_IMPLEMENTED(op) \ - IF_ACT_A_IMPLEMENTED(op) \ - IF_ACT_B_IMPLEMENTED(op) \ - IF_ACT_C_IMPLEMENTED(op) \ - IF_ACT_D_IMPLEMENTED(op) \ - IF_ACT_E_IMPLEMENTED(op) \ - IF_ACT_F_IMPLEMENTED(op) +#define FOR_EACH_ACT(op) \ + IF_ACT_0_IMPLEMENTED(op) \ + IF_ACT_1_IMPLEMENTED(op) \ + IF_ACT_2_IMPLEMENTED(op) \ + IF_ACT_3_IMPLEMENTED(op) \ + IF_ACT_4_IMPLEMENTED(op) \ + IF_ACT_5_IMPLEMENTED(op) \ + IF_ACT_6_IMPLEMENTED(op) \ + IF_ACT_7_IMPLEMENTED(op) \ + IF_ACT_8_IMPLEMENTED(op) \ + IF_ACT_9_IMPLEMENTED(op) \ + IF_ACT_A_IMPLEMENTED(op) \ + IF_ACT_B_IMPLEMENTED(op) \ + IF_ACT_C_IMPLEMENTED(op) \ + IF_ACT_D_IMPLEMENTED(op) \ + IF_ACT_E_IMPLEMENTED(op) \ + IF_ACT_F_IMPLEMENTED(op) #endif // _PLATFORM_ACT_H_ diff --git a/TPMCmd/Platform/include/PlatformClock.h b/TPMCmd/Platform/include/PlatformClock.h index d2b1b5d7..a76c0e42 100644 --- a/TPMCmd/Platform/include/PlatformClock.h +++ b/TPMCmd/Platform/include/PlatformClock.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ // This file contains the instance data for the Platform module. It is collected // in this file so that the state of the module is easier to manage. @@ -43,27 +9,8 @@ # include # include # else -# include # include # endif #endif -// CLOCK_NOMINAL is the number of hardware ticks per mS. A value of 300000 means -// that the nominal clock rate used to drive the hardware clock is 30 MHz. The -// adjustment rates are used to determine the conversion of the hardware ticks to -// internal hardware clock value. In practice, we would expect that there would be -// a hardware register will accumulated mS. It would be incremented by the output -// of a pre-scaler. The pre-scaler would divide the ticks from the clock by some -// value that would compensate for the difference between clock time and real time. -// The code in Clock does the emulation of this function. -#define CLOCK_NOMINAL 30000 -// A 1% change in rate is 300 counts -#define CLOCK_ADJUST_COARSE 300 -// A 0.1% change in rate is 30 counts -#define CLOCK_ADJUST_MEDIUM 30 -// A minimum change in rate is 1 count -#define CLOCK_ADJUST_FINE 1 -// The clock tolerance is +/-15% (4500 counts) -// Allow some guard band (16.7%) -#define CLOCK_ADJUST_LIMIT 5000 #endif // _PLATFORM_CLOCK_H_ diff --git a/TPMCmd/Platform/include/PlatformData.h b/TPMCmd/Platform/include/PlatformData.h index ec4530de..279c8e13 100644 --- a/TPMCmd/Platform/include/PlatformData.h +++ b/TPMCmd/Platform/include/PlatformData.h @@ -1,48 +1,16 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ // This file contains the instance data for the Platform module. It is collected // in this file so that the state of the module is easier to manage. #ifndef _PLATFORM_DATA_H_ #define _PLATFORM_DATA_H_ -#ifdef _PLATFORM_DATA_C_ -# define EXTERN -#else -# define EXTERN extern -#endif +#ifndef EXTERN +# ifdef _PLATFORM_DATA_C_ +# define EXTERN +# else +# define EXTERN extern +# endif // _PLATFORM_DATA_C_ +#endif // EXTERN // From Cancel.c // Cancel flag. It is initialized as FALSE, which indicate the command is not diff --git a/TPMCmd/Platform/include/prototypes/Platform_fp.h b/TPMCmd/Platform/include/prototypes/Platform_fp.h deleted file mode 100644 index a68ea19c..00000000 --- a/TPMCmd/Platform/include/prototypes/Platform_fp.h +++ /dev/null @@ -1,403 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 6, 2020 Time: 01:50:11PM - */ - -#ifndef _PLATFORM_FP_H_ -#define _PLATFORM_FP_H_ - -//** From Cancel.c - -//***_plat__IsCanceled() -// Check if the cancel flag is set -// Return Type: int -// TRUE(1) if cancel flag is set -// FALSE(0) if cancel flag is not set -LIB_EXPORT int _plat__IsCanceled(void); - -// Set cancel flag. -LIB_EXPORT void _plat__SetCancel(void); - -//***_plat__ClearCancel() -// Clear cancel flag -LIB_EXPORT void _plat__ClearCancel(void); - -//** From Clock.c - -//***_plat__TimerReset() -// This function sets current system clock time as t0 for counting TPM time. -// This function is called at a power on event to reset the clock. When the clock -// is reset, the indication that the clock was stopped is also set. -LIB_EXPORT void _plat__TimerReset(void); - -//*** _plat__TimerRestart() -// This function should be called in order to simulate the restart of the timer -// should it be stopped while power is still applied. -LIB_EXPORT void _plat__TimerRestart(void); - -//*** _plat__RealTime() -// This is another, probably futile, attempt to define a portable function -// that will return a 64-bit clock value that has mSec resolution. -LIB_EXPORT uint64_t _plat__RealTime(void); - -//***_plat__TimerRead() -// This function provides access to the tick timer of the platform. The TPM code -// uses this value to drive the TPM Clock. -// -// The tick timer is supposed to run when power is applied to the device. This timer -// should not be reset by time events including _TPM_Init. It should only be reset -// when TPM power is re-applied. -// -// If the TPM is run in a protected environment, that environment may provide the -// tick time to the TPM as long as the time provided by the environment is not -// allowed to go backwards. If the time provided by the system can go backwards -// during a power discontinuity, then the _plat__Signal_PowerOn should call -// _plat__TimerReset(). -LIB_EXPORT uint64_t _plat__TimerRead(void); - -//*** _plat__TimerWasReset() -// This function is used to interrogate the flag indicating if the tick timer has -// been reset. -// -// If the resetFlag parameter is SET, then the flag will be CLEAR before the -// function returns. -LIB_EXPORT int _plat__TimerWasReset(void); - -//*** _plat__TimerWasStopped() -// This function is used to interrogate the flag indicating if the tick timer has -// been stopped. If so, this is typically a reason to roll the nonce. -// -// This function will CLEAR the s_timerStopped flag before returning. This provides -// functionality that is similar to status register that is cleared when read. This -// is the model used here because it is the one that has the most impact on the TPM -// code as the flag can only be accessed by one entity in the TPM. Any other -// implementation of the hardware can be made to look like a read-once register. -LIB_EXPORT int _plat__TimerWasStopped(void); - -//***_plat__ClockAdjustRate() -// Adjust the clock rate -LIB_EXPORT void _plat__ClockAdjustRate( - int adjust // IN: the adjust number. It could be positive - // or negative -); - -//** From DebugHelpers.c - -#if CERTIFYX509_DEBUG - -//*** DebugFileInit() -// This function opens the file used to hold the debug data. -// Return Type: int -// 0 success -// != 0 error -int DebugFileInit(void); - -//*** DebugDumpBuffer() -void DebugDumpBuffer(int size, unsigned char* buf, const char* identifier); -#endif // CERTIFYX509_DEBUG - -//** From Entropy.c - -//*** _plat__GetEntropy() -// This function is used to get available hardware entropy. In a hardware -// implementation of this function, there would be no call to the system -// to get entropy. -// Return Type: int32_t -// < 0 hardware failure of the entropy generator, this is sticky -// >= 0 the returned amount of entropy (bytes) -// -LIB_EXPORT int32_t _plat__GetEntropy(unsigned char* entropy, // output buffer - uint32_t amount // amount requested -); - -//** From LocalityPlat.c - -//***_plat__LocalityGet() -// Get the most recent command locality in locality value form. -// This is an integer value for locality and not a locality structure -// The locality can be 0-4 or 32-255. 5-31 is not allowed. -LIB_EXPORT unsigned char _plat__LocalityGet(void); - -//***_plat__LocalitySet() -// Set the most recent command locality in locality value form -LIB_EXPORT void _plat__LocalitySet(unsigned char locality); - -//** From NVMem.c - -//*** _plat__NvErrors() -// This function is used by the simulator to set the error flags in the NV -// subsystem to simulate an error in the NV loading process -LIB_EXPORT void _plat__NvErrors(int recoverable, int unrecoverable); - -//***_plat__NVEnable() -// Enable NV memory. -// -// This version just pulls in data from a file. In a real TPM, with NV on chip, -// this function would verify the integrity of the saved context. If the NV -// memory was not on chip but was in something like RPMB, the NV state would be -// read in, decrypted and integrity checked. -// -// The recovery from an integrity failure depends on where the error occurred. It -// it was in the state that is discarded by TPM Reset, then the error is -// recoverable if the TPM is reset. Otherwise, the TPM must go into failure mode. -// Return Type: int -// 0 if success -// > 0 if receive recoverable error -// <0 if unrecoverable error -LIB_EXPORT int _plat__NVEnable( - void* platParameter // IN: platform specific parameters -); - -//***_plat__NVDisable() -// Disable NV memory -LIB_EXPORT void _plat__NVDisable(int delete // IN: If TRUE, delete the NV contents. -); - -//***_plat__IsNvAvailable() -// Check if NV is available -// Return Type: int -// 0 NV is available -// 1 NV is not available due to write failure -// 2 NV is not available due to rate limit -LIB_EXPORT int _plat__IsNvAvailable(void); - -//***_plat__NvMemoryRead() -// Function: Read a chunk of NV memory -LIB_EXPORT void _plat__NvMemoryRead(unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void* data // OUT: data buffer -); - -//*** _plat__NvIsDifferent() -// This function checks to see if the NV is different from the test value. This is -// so that NV will not be written if it has not changed. -// Return Type: int -// TRUE(1) the NV location is different from the test value -// FALSE(0) the NV location is the same as the test value -LIB_EXPORT int _plat__NvIsDifferent(unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void* data // IN: data buffer -); - -//***_plat__NvMemoryWrite() -// This function is used to update NV memory. The "write" is to a memory copy of -// NV. At the end of the current command, any changes are written to -// the actual NV memory. -// NOTE: A useful optimization would be for this code to compare the current -// contents of NV with the local copy and note the blocks that have changed. Then -// only write those blocks when _plat__NvCommit() is called. -LIB_EXPORT int _plat__NvMemoryWrite(unsigned int startOffset, // IN: write start - unsigned int size, // IN: size of bytes to write - void* data // OUT: data buffer -); - -//***_plat__NvMemoryClear() -// Function is used to set a range of NV memory bytes to an implementation-dependent -// value. The value represents the erase state of the memory. -LIB_EXPORT void _plat__NvMemoryClear( - unsigned int start, // IN: clear start - unsigned int size // IN: number of bytes to clear -); - -//***_plat__NvMemoryMove() -// Function: Move a chunk of NV memory from source to destination -// This function should ensure that if there overlap, the original data is -// copied before it is written -LIB_EXPORT void _plat__NvMemoryMove( - unsigned int sourceOffset, // IN: source offset - unsigned int destOffset, // IN: destination offset - unsigned int size // IN: size of data being moved -); - -//***_plat__NvCommit() -// This function writes the local copy of NV to NV for permanent store. It will write -// NV_MEMORY_SIZE bytes to NV. If a file is use, the entire file is written. -// Return Type: int -// 0 NV write success -// non-0 NV write fail -LIB_EXPORT int _plat__NvCommit(void); - -//***_plat__SetNvAvail() -// Set the current NV state to available. This function is for testing purpose -// only. It is not part of the platform NV logic -LIB_EXPORT void _plat__SetNvAvail(void); - -//***_plat__ClearNvAvail() -// Set the current NV state to unavailable. This function is for testing purpose -// only. It is not part of the platform NV logic -LIB_EXPORT void _plat__ClearNvAvail(void); - -//*** _plat__NVNeedsManufacture() -// This function is used by the simulator to determine when the TPM's NV state -// needs to be manufactured. -LIB_EXPORT int _plat__NVNeedsManufacture(void); - -//** From PlatformACT.c - -//*** _plat__ACT_GetImplemented() -// This function tests to see if an ACT is implemented. It is a belt and suspenders -// function because the TPM should not be calling to manipulate an ACT that is not -// implemented. However, this could help the simulator code which doesn't necessarily -// know if an ACT is implemented or not. -LIB_EXPORT int _plat__ACT_GetImplemented(uint32_t act); - -//*** _plat__ACT_GetRemaining() -// This function returns the remaining time. If an update is pending, 'newValue' is -// returned. Otherwise, the current counter value is returned. Note that since the -// timers keep running, the returned value can get stale immediately. The actual count -// value will be no greater than the returned value. -LIB_EXPORT uint32_t _plat__ACT_GetRemaining(uint32_t act //IN: the ACT selector -); - -//*** _plat__ACT_GetSignaled() -LIB_EXPORT int _plat__ACT_GetSignaled(uint32_t act //IN: number of ACT to check -); - -//*** _plat__ACT_SetSignaled() -LIB_EXPORT void _plat__ACT_SetSignaled(uint32_t act, int on); - -//*** _plat__ACT_GetPending() -LIB_EXPORT int _plat__ACT_GetPending(uint32_t act //IN: number of ACT to check -); - -//*** _plat__ACT_UpdateCounter() -// This function is used to write the newValue for the counter. If an update is -// pending, then no update occurs and the function returns FALSE. If 'setSignaled' -// is TRUE, then the ACT signaled state is SET and if 'newValue' is 0, nothing -// is posted. -LIB_EXPORT int _plat__ACT_UpdateCounter(uint32_t act, // IN: ACT to update - uint32_t newValue // IN: the value to post -); - -//***_plat__ACT_EnableTicks() -// This enables and disables the processing of the once-per-second ticks. This should -// be turned off ('enable' = FALSE) by _TPM_Init and turned on ('enable' = TRUE) by -// TPM2_Startup() after all the initializations have completed. -LIB_EXPORT void _plat__ACT_EnableTicks(int enable); - -//*** _plat__ACT_Tick() -// This processes the once-per-second clock tick from the hardware. This is set up -// for the simulator to use the control interface to send ticks to the TPM. These -// ticks do not have to be on a per second basis. They can be as slow or as fast as -// desired so that the simulation can be tested. -LIB_EXPORT void _plat__ACT_Tick(void); - -//***_plat__ACT_Initialize() -// This function initializes the ACT hardware and data structures -LIB_EXPORT int _plat__ACT_Initialize(void); - -//** From PowerPlat.c - -//***_plat__Signal_PowerOn() -// Signal platform power on -LIB_EXPORT int _plat__Signal_PowerOn(void); - -//*** _plat__WasPowerLost() -// Test whether power was lost before a _TPM_Init. -// -// This function will clear the "hardware" indication of power loss before return. -// This means that there can only be one spot in the TPM code where this value -// gets read. This method is used here as it is the most difficult to manage in the -// TPM code and, if the hardware actually works this way, it is hard to make it -// look like anything else. So, the burden is placed on the TPM code rather than the -// platform code -// Return Type: int -// TRUE(1) power was lost -// FALSE(0) power was not lost -LIB_EXPORT int _plat__WasPowerLost(void); - -//*** _plat_Signal_Reset() -// This a TPM reset without a power loss. -LIB_EXPORT int _plat__Signal_Reset(void); - -//***_plat__Signal_PowerOff() -// Signal platform power off -LIB_EXPORT void _plat__Signal_PowerOff(void); - -//** From PPPlat.c - -//***_plat__PhysicalPresenceAsserted() -// Check if physical presence is signaled -// Return Type: int -// TRUE(1) if physical presence is signaled -// FALSE(0) if physical presence is not signaled -LIB_EXPORT int _plat__PhysicalPresenceAsserted(void); - -//***_plat__Signal_PhysicalPresenceOn() -// Signal physical presence on -LIB_EXPORT void _plat__Signal_PhysicalPresenceOn(void); - -//***_plat__Signal_PhysicalPresenceOff() -// Signal physical presence off -LIB_EXPORT void _plat__Signal_PhysicalPresenceOff(void); - -//** From RunCommand.c - -//***_plat__RunCommand() -// This version of RunCommand will set up a jum_buf and call ExecuteCommand(). If -// the command executes without failing, it will return and RunCommand will return. -// If there is a failure in the command, then _plat__Fail() is called and it will -// longjump back to RunCommand which will call ExecuteCommand again. However, this -// time, the TPM will be in failure mode so ExecuteCommand will simply build -// a failure response and return. -LIB_EXPORT void _plat__RunCommand( - uint32_t requestSize, // IN: command buffer size - unsigned char* request, // IN: command buffer - uint32_t* responseSize, // IN/OUT: response buffer size - unsigned char** response // IN/OUT: response buffer -); - -//***_plat__Fail() -// This is the platform depended failure exit for the TPM. -LIB_EXPORT NORETURN void _plat__Fail(void); - -//** From Unique.c - -//** _plat__GetUnique() -// This function is used to access the platform-specific unique value. -// This function places the unique value in the provided buffer ('b') -// and returns the number of bytes transferred. The function will not -// copy more data than 'bSize'. -// NOTE: If a platform unique value has unequal distribution of uniqueness -// and 'bSize' is smaller than the size of the unique value, the 'bSize' -// portion with the most uniqueness should be returned. -LIB_EXPORT uint32_t _plat__GetUnique(uint32_t which, // authorities (0) or details - uint32_t bSize, // size of the buffer - unsigned char* b // output buffer -); - -#endif // _PLATFORM_FP_H_ diff --git a/TPMCmd/Platform/include/prototypes/platform_public_interface.h b/TPMCmd/Platform/include/prototypes/platform_public_interface.h new file mode 100644 index 00000000..9a85b801 --- /dev/null +++ b/TPMCmd/Platform/include/prototypes/platform_public_interface.h @@ -0,0 +1,142 @@ + +// This file contains the interface into the platform layer from external callers. +// External callers are expected to be implementation specific, and may be a simulator +// or some other implementation + +#ifndef _PLATFORM_PUBLIC_INTERFACE_H_ +#define _PLATFORM_PUBLIC_INTERFACE_H_ + +#include + +//** From Cancel.c + +// Set cancel flag. +LIB_EXPORT void _plat__SetCancel(void); + +//***_plat__ClearCancel() +// Clear cancel flag +LIB_EXPORT void _plat__ClearCancel(void); + +//** From Clock.c + +//***_plat__TimerReset() +// This function sets current system clock time as t0 for counting TPM time. +// This function is called at a power on event to reset the clock. When the clock +// is reset, the indication that the clock was stopped is also set. +LIB_EXPORT void _plat__TimerReset(void); + +//*** _plat__TimerRestart() +// This function should be called in order to simulate the restart of the timer +// should it be stopped while power is still applied. +LIB_EXPORT void _plat__TimerRestart(void); + +//*** _plat__RealTime() +// This is another, probably futile, attempt to define a portable function +// that will return a 64-bit clock value that has mSec resolution. +LIB_EXPORT uint64_t _plat__RealTime(void); + +//** From LocalityPlat.c + +//***_plat__LocalitySet() +// Set the most recent command locality in locality value form +LIB_EXPORT void _plat__LocalitySet(unsigned char locality); + +//** From NVMem.c + +//*** _plat__NvErrors() +// This function is used by the simulator to set the error flags in the NV +// subsystem to simulate an error in the NV loading process +LIB_EXPORT void _plat__NvErrors(int recoverable, int unrecoverable); + +//***_plat__NVDisable() +// Disable NV memory +LIB_EXPORT void _plat__NVDisable( + void* platParameter, // platform specific parameter + size_t paramSize // size of parameter. If size == 0, then + // parameter is a sizeof(void*) scalar and should + // be cast to an integer (intptr_t), not dereferenced. +); + +//***_plat__SetNvAvail() +// Set the current NV state to available. This function is for testing purpose +// only. It is not part of the platform NV logic +LIB_EXPORT void _plat__SetNvAvail(void); + +//***_plat__ClearNvAvail() +// Set the current NV state to unavailable. This function is for testing purpose +// only. It is not part of the platform NV logic +LIB_EXPORT void _plat__ClearNvAvail(void); + +//*** _plat__NVNeedsManufacture() +// This function is used by the simulator to determine when the TPM's NV state +// needs to be manufactured. +LIB_EXPORT int _plat__NVNeedsManufacture(void); + +//** From PlatformACT.c + +//*** _plat__ACT_GetPending() +LIB_EXPORT int _plat__ACT_GetPending(uint32_t act //IN: number of ACT to check +); + +//*** _plat__ACT_Tick() +// This processes the once-per-second clock tick from the hardware. This is set up +// for the simulator to use the control interface to send ticks to the TPM. These +// ticks do not have to be on a per second basis. They can be as slow or as fast as +// desired so that the simulation can be tested. +LIB_EXPORT void _plat__ACT_Tick(void); + +//** From PowerPlat.c + +//***_plat__Signal_PowerOn() +// Signal platform power on +LIB_EXPORT int _plat__Signal_PowerOn(void); + +//*** _plat_Signal_Reset() +// This a TPM reset without a power loss. +LIB_EXPORT int _plat__Signal_Reset(void); + +//***_plat__Signal_PowerOff() +// Signal platform power off +LIB_EXPORT void _plat__Signal_PowerOff(void); + +//** From PPPlat.c + +//***_plat__Signal_PhysicalPresenceOn() +// Signal physical presence on +LIB_EXPORT void _plat__Signal_PhysicalPresenceOn(void); + +//***_plat__Signal_PhysicalPresenceOff() +// Signal physical presence off +LIB_EXPORT void _plat__Signal_PhysicalPresenceOff(void); + +//*** _plat__SetTpmFirmwareHash() +// Called by the simulator to set the TPM Firmware hash used for +// firmware-bound hierarchies. Not a cryptographically-strong hash. +#if SIMULATION +LIB_EXPORT void _plat__SetTpmFirmwareHash(uint32_t hash); +#endif + +//*** _plat__SetTpmFirmwareSvn() +// Called by the simulator to set the TPM Firmware SVN reported by +// getCapability. +#if SIMULATION +LIB_EXPORT void _plat__SetTpmFirmwareSvn(uint16_t svn); +#endif + +//** From RunCommand.c + +//***_plat__RunCommand() +// This version of RunCommand will set up a jum_buf and call ExecuteCommand(). If +// the command executes without failing, it will return and RunCommand will return. +// If there is a failure in the command, then _plat__Fail() is called and it will +// longjump back to RunCommand which will call ExecuteCommand again. However, this +// time, the TPM will be in failure mode so ExecuteCommand will simply build +// a failure response and return. +LIB_EXPORT void _plat__RunCommand( + uint32_t requestSize, // IN: command buffer size + unsigned char* request, // IN: command buffer + uint32_t* responseSize, // IN/OUT: response buffer size + unsigned char** response // IN/OUT: response buffer +); + +#endif // _PLATFORM_PUBLIC_INTERFACE_H_ \ No newline at end of file diff --git a/TPMCmd/Platform/platform.vcxproj b/TPMCmd/Platform/platform.vcxproj index 753c8859..b7fe105a 100644 --- a/TPMCmd/Platform/platform.vcxproj +++ b/TPMCmd/Platform/platform.vcxproj @@ -1,509 +1,509 @@ - - - - - Debug - Win32 - - - Debug - x64 - - - Release - Win32 - - - Release - x64 - - - Static - Win32 - - - Static - x64 - - - WolfDebug - Win32 - - - WolfDebug - x64 - - - WolfRelease - Win32 - - - WolfRelease - x64 - - - - - - - - - - - - - - - - - - - - - - - - {A9249F05-0DF5-4D06-9873-FBBE61B6768B} - platform - Win32Proj - Platform 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$(OutDir)$(TargetName)$(TargetExt) + + + + + Disabled + $(ProjectDir)\include;$(ProjectDir)\include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)\tpm\include\public\include;$(SolutionDir)\TpmConfiguration\include\ + WIN32;_DEBUG;_LIB;%(PreprocessorDefinitions) + EnableFastChecks + MultiThreadedDebugDLL + + + EnableAllWarnings + ProgramDatabase + CompileAsC + 4668;4710;4711;4820;5045 + Default + true + + + true + + + $(OutDir)$(TargetName)$(TargetExt) + + + + + Disabled + $(ProjectDir)\include;$(ProjectDir)\include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)\tpm\include\public\include;$(SolutionDir)\TpmConfiguration\include\ + WIN32;_DEBUG;_LIB;%(PreprocessorDefinitions) + EnableFastChecks + MultiThreadedDebugDLL + + + EnableAllWarnings + ProgramDatabase + CompileAsC + 4668;4710;4711;4820;5045 + Default + true + + + + + true + + + $(OutDir)$(TargetName)$(TargetExt) + + + + + MaxSpeed + true + WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions) + MultiThreadedDLL + true + NotUsing + EnableAllWarnings + ProgramDatabase + $(ProjectDir)\include;$(ProjectDir)\include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)\tpm\include\public\include;$(SolutionDir)\TpmConfiguration\include\ + true + 4668;4710;4711;4820;5045 + + + + + $(OutDir)$(TargetName)$(TargetExt) + tpm.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + MaxSpeed + true + WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions) + MultiThreadedDLL + true + NotUsing + EnableAllWarnings + ProgramDatabase + $(ProjectDir)\include;$(ProjectDir)\include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)\tpm\include\public\include;$(SolutionDir)\TpmConfiguration\include\ + true + 4668;4710;4711;4820;5045 + + + + + $(OutDir)$(TargetName)$(TargetExt) + tpm.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + MaxSpeed + true + WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions) + MultiThreadedDLL + true + + + EnableAllWarnings + ProgramDatabase + $(ProjectDir)\include;$(ProjectDir)\include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)\tpm\include\public\include;$(SolutionDir)\TpmConfiguration\include\ + true + 4668;4710;4711;4820;5045 + + + + + kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib + + + + + MaxSpeed + true + WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions) + MultiThreadedDLL + true + + + EnableAllWarnings + ProgramDatabase + $(ProjectDir)\include;$(ProjectDir)\include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)\tpm\include\public\include;$(SolutionDir)\TpmConfiguration\include\ + true + 4668;4710;4711;4820;5045 + + + + + kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib + + + + + \ No newline at end of file diff --git a/TPMCmd/Platform/platform.vcxproj.filters b/TPMCmd/Platform/platform.vcxproj.filters index bdd73980..f0adafb6 100644 --- a/TPMCmd/Platform/platform.vcxproj.filters +++ b/TPMCmd/Platform/platform.vcxproj.filters @@ -1,66 +1,66 @@ - - - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - Source Files - - - - - {4303d7e7-8154-4a7c-9c6b-0df9b7e6447f} - - - {c7765704-4071-4d43-b451-b1dc177da099} - - - {356cc198-cb6e-4dbb-bf4f-b203b6e3fdb0} - - - - - Headers - - - Headers\prototypes - - - Headers - - - Headers - - + + + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + + + {4303d7e7-8154-4a7c-9c6b-0df9b7e6447f} + + + {c7765704-4071-4d43-b451-b1dc177da099} + + + {356cc198-cb6e-4dbb-bf4f-b203b6e3fdb0} + + + + + Headers + + + Headers\prototypes + + + Headers + + + Headers + + \ No newline at end of file diff --git a/TPMCmd/Platform/src/Cancel.c b/TPMCmd/Platform/src/Cancel.c index 9296d8c6..209bef53 100644 --- a/TPMCmd/Platform/src/Cancel.c +++ b/TPMCmd/Platform/src/Cancel.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // // This module simulates the cancel pins on the TPM. diff --git a/TPMCmd/Platform/src/Clock.c b/TPMCmd/Platform/src/Clock.c index 89260f10..f004b119 100644 --- a/TPMCmd/Platform/src/Clock.c +++ b/TPMCmd/Platform/src/Clock.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // // This file contains the routines that are used by the simulator to mimic @@ -43,7 +9,25 @@ //** Includes and Data Definitions #include #include "Platform.h" -#include "TpmFail_fp.h" + +// CLOCK_NOMINAL is the number of hardware ticks per ms. A value of 30000 means +// that the nominal clock rate used to drive the hardware clock is 30 MHz. The +// adjustment rates are used to determine the conversion of the hardware ticks to +// internal hardware clock value. In practice, we would expect that there would be +// a hardware register will accumulated mS. It would be incremented by the output +// of a pre-scaler. The pre-scaler would divide the ticks from the clock by some +// value that would compensate for the difference between clock time and real time. +// The code in Clock does the emulation of this function. +#define CLOCK_NOMINAL 30000 +// A 1% change in rate is 300 counts +#define CLOCK_ADJUST_COARSE 300 +// A 0.1% change in rate is 30 counts +#define CLOCK_ADJUST_MEDIUM 30 +// A minimum change in rate is 1 count +#define CLOCK_ADJUST_FINE 1 +// The clock tolerance is +/-15% (4500 counts) +// Allow some guard band (16.7%) +#define CLOCK_ADJUST_LIMIT 5000 //** Simulator Functions //*** Introduction @@ -217,35 +201,31 @@ LIB_EXPORT int _plat__TimerWasStopped(void) //***_plat__ClockAdjustRate() // Adjust the clock rate -LIB_EXPORT void _plat__ClockAdjustRate( - int adjust // IN: the adjust number. It could be positive - // or negative -) +LIB_EXPORT void _plat__ClockRateAdjust(_plat__ClockAdjustStep adjust) { // We expect the caller should only use a fixed set of constant values to // adjust the rate switch(adjust) { - case CLOCK_ADJUST_COARSE: + // slower increases the divisor + case PLAT_TPM_CLOCK_ADJUST_COARSE_SLOWER: s_adjustRate += CLOCK_ADJUST_COARSE; break; - case -CLOCK_ADJUST_COARSE: - s_adjustRate -= CLOCK_ADJUST_COARSE; - break; - case CLOCK_ADJUST_MEDIUM: + case PLAT_TPM_CLOCK_ADJUST_MEDIUM_SLOWER: s_adjustRate += CLOCK_ADJUST_MEDIUM; break; - case -CLOCK_ADJUST_MEDIUM: - s_adjustRate -= CLOCK_ADJUST_MEDIUM; - break; - case CLOCK_ADJUST_FINE: + case PLAT_TPM_CLOCK_ADJUST_FINE_SLOWER: s_adjustRate += CLOCK_ADJUST_FINE; break; - case -CLOCK_ADJUST_FINE: + // faster decreases the divisor + case PLAT_TPM_CLOCK_ADJUST_FINE_FASTER: s_adjustRate -= CLOCK_ADJUST_FINE; break; - default: - // ignore any other values; + case PLAT_TPM_CLOCK_ADJUST_MEDIUM_FASTER: + s_adjustRate -= CLOCK_ADJUST_MEDIUM; + break; + case PLAT_TPM_CLOCK_ADJUST_COARSE_FASTER: + s_adjustRate -= CLOCK_ADJUST_COARSE; break; } diff --git a/TPMCmd/Platform/src/DebugHelpers.c b/TPMCmd/Platform/src/DebugHelpers.c index 609e74b4..e72b8ef0 100644 --- a/TPMCmd/Platform/src/DebugHelpers.c +++ b/TPMCmd/Platform/src/DebugHelpers.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // // This file contains the NV read and write access methods. This implementation diff --git a/TPMCmd/Platform/src/Entropy.c b/TPMCmd/Platform/src/Entropy.c index af7a0c44..54549405 100644 --- a/TPMCmd/Platform/src/Entropy.c +++ b/TPMCmd/Platform/src/Entropy.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes and Local Values #define _CRT_RAND_S diff --git a/TPMCmd/Platform/src/ExtraData.c b/TPMCmd/Platform/src/ExtraData.c new file mode 100644 index 00000000..019f4a25 --- /dev/null +++ b/TPMCmd/Platform/src/ExtraData.c @@ -0,0 +1,30 @@ +//** Description +// +// This file contains routines that are called by the core library to allow the +// platform to use the Core storage structures for small amounts of related data. +// +// In this implementation, the buffers are all just set to 0xFF + +//** Includes and Data Definitions +#include +#include +#include +#include "Platform.h" + +//** _plat__GetPlatformManufactureData + +// This function allows the platform to provide a small amount of data to be +// stored as part of the TPM's PERSISTENT_DATA structure during manufacture. Of +// course the platform can store data separately as well, but this allows a +// simple platform implementation to store a few bytes of data without +// implementing a multi-layer storage system. This function is called on +// manufacture and CLEAR. The buffer will contain the last value provided +// to the Core library. +LIB_EXPORT void _plat__GetPlatformManufactureData(uint8_t* pPlatformPersistentData, + uint32_t bufferSize) +{ + if(bufferSize != 0) + { + memset((void*)pPlatformPersistentData, 0xFF, bufferSize); + } +} diff --git a/TPMCmd/Platform/src/LocalityPlat.c b/TPMCmd/Platform/src/LocalityPlat.c index 9fb2993a..795ccefa 100644 --- a/TPMCmd/Platform/src/LocalityPlat.c +++ b/TPMCmd/Platform/src/LocalityPlat.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Platform.h" diff --git a/TPMCmd/Platform/src/NVMem.c b/TPMCmd/Platform/src/NVMem.c index 29d92130..b02f3167 100644 --- a/TPMCmd/Platform/src/NVMem.c +++ b/TPMCmd/Platform/src/NVMem.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // // This file contains the NV read and write access methods. This implementation @@ -53,6 +19,7 @@ static int s_NeedsManufacture = FALSE; //**Functions #if FILE_BACKED_NV +const char* s_NvFilePath = "NVChip"; //*** NvFileOpen() // This function opens the file used to hold the NV image. @@ -61,22 +28,14 @@ static int s_NeedsManufacture = FALSE; // -1 error static int NvFileOpen(const char* mode) { -# if defined(NV_FILE_PATH) -# define TO_STRING(s) TO_STRING_IMPL(s) -# define TO_STRING_IMPL(s) #s - const char* s_NvFilePath = TO_STRING(NV_FILE_PATH); -# undef TO_STRING -# undef TO_STRING_IMPL -# else - const char* s_NvFilePath = "NVChip"; -# endif - // Try to open an exist NVChip file for read/write # if defined _MSC_VER && 1 if(fopen_s(&s_NvFile, s_NvFilePath, mode) != 0) + { s_NvFile = NULL; + } # else - s_NvFile = fopen(s_NvFilePath, mode); + s_NvFile = fopen(s_NvFilePath, mode); # endif return (s_NvFile == NULL) ? -1 : 0; } @@ -157,18 +116,24 @@ LIB_EXPORT void _plat__NvErrors(int recoverable, int unrecoverable) // 0 if success // > 0 if receive recoverable error // <0 if unrecoverable error +#define NV_ENABLE_SUCCESS 0 +#define NV_ENABLE_FAILED (-1) LIB_EXPORT int _plat__NVEnable( - void* platParameter // IN: platform specific parameters + void* platParameter, // platform specific parameter + size_t paramSize // size of parameter. If size == 0, then + // parameter is a sizeof(void*) scalar and should + // be cast to an integer (intptr_t), not dereferenced. ) { NOT_REFERENCED(platParameter); // to keep compiler quiet - // + NOT_REFERENCED(paramSize); // to keep compiler quiet + // Start assuming everything is OK s_NV_unrecoverable = FALSE; s_NV_recoverable = FALSE; #if FILE_BACKED_NV if(s_NvFile != NULL) - return 0; + return NV_ENABLE_SUCCESS; // Initialize all the bytes in the ram copy of the NV _plat__NvMemoryClear(0, NV_MEMORY_SIZE); @@ -202,15 +167,25 @@ LIB_EXPORT int _plat__NVEnable( // simulation purposes, use the signaling interface to indicate if an error is // to be simulated and the type of the error. if(s_NV_unrecoverable) - return -1; + return NV_ENABLE_FAILED; + s_NvIsAvailable = TRUE; return s_NV_recoverable; } //***_plat__NVDisable() // Disable NV memory -LIB_EXPORT void _plat__NVDisable(int delete // IN: If TRUE, delete the NV contents. +LIB_EXPORT void _plat__NVDisable( + void* platParameter, // platform specific parameter + size_t paramSize // size of parameter. If size == 0, then + // parameter is a sizeof(void*) scalar and should + // be cast to an integer (intptr_t), not dereferenced. ) { + NOT_REFERENCED(paramSize); // to keep compiler quiet + int delete = ((intptr_t)platParameter != 0) + ? TRUE + : FALSE; // IN: If TRUE (!=0), delete the NV contents. + #if FILE_BACKED_NV if(NULL != s_NvFile) { @@ -229,21 +204,21 @@ LIB_EXPORT void _plat__NVDisable(int delete // IN: If TRUE, delete the NV conte } s_NvFile = NULL; // Set file handle to NULL #endif + s_NvIsAvailable = FALSE; return; } -//***_plat__IsNvAvailable() +//***_plat__GetNvReadyState() // Check if NV is available // Return Type: int // 0 NV is available // 1 NV is not available due to write failure // 2 NV is not available due to rate limit -LIB_EXPORT int _plat__IsNvAvailable(void) +LIB_EXPORT int _plat__GetNvReadyState(void) { - int retVal = 0; - // NV is not available if the TPM is in failure mode + int retVal = NV_READY; if(!s_NvIsAvailable) - retVal = 1; + retVal = NV_WRITEFAILURE; #if FILE_BACKED_NV else retVal = (s_NvFile == NULL); @@ -253,28 +228,44 @@ LIB_EXPORT int _plat__IsNvAvailable(void) //***_plat__NvMemoryRead() // Function: Read a chunk of NV memory -LIB_EXPORT void _plat__NvMemoryRead(unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void* data // OUT: data buffer +// Return Type: int +// TRUE(1) offset and size is within available NV size +// FALSE(0) otherwise; also trigger failure mode +LIB_EXPORT int _plat__NvMemoryRead(unsigned int startOffset, // IN: read start + unsigned int size, // IN: size of bytes to read + void* data // OUT: data buffer ) { assert(startOffset + size <= NV_MEMORY_SIZE); - memcpy(data, &s_NV[startOffset], size); // Copy data from RAM - return; + if(startOffset + size <= NV_MEMORY_SIZE) + { + memcpy(data, &s_NV[startOffset], size); // Copy data from RAM + return TRUE; + } + return FALSE; } -//*** _plat__NvIsDifferent() +//*** _plat__NvGetChangedStatus() // This function checks to see if the NV is different from the test value. This is // so that NV will not be written if it has not changed. // Return Type: int -// TRUE(1) the NV location is different from the test value -// FALSE(0) the NV location is the same as the test value -LIB_EXPORT int _plat__NvIsDifferent(unsigned int startOffset, // IN: read start - unsigned int size, // IN: size of bytes to read - void* data // IN: data buffer +// NV_HAS_CHANGED(1) the NV location is different from the test value +// NV_IS_SAME(0) the NV location is the same as the test value +// NV_INVALID_LOCATION(-1) the NV location is invalid; also triggers failure mode +LIB_EXPORT int _plat__NvGetChangedStatus( + unsigned int startOffset, // IN: read start + unsigned int size, // IN: size of bytes to read + void* data // IN: data buffer ) { - return (memcmp(&s_NV[startOffset], data, size) != 0); + assert(startOffset + size <= NV_MEMORY_SIZE); + if(startOffset + size <= NV_MEMORY_SIZE) + { + return (memcmp(&s_NV[startOffset], data, size) != 0); + } + // the NV location is invalid; the assert above should have triggered failure + // mode + return NV_INVALID_LOCATION; } //***_plat__NvMemoryWrite() @@ -284,11 +275,15 @@ LIB_EXPORT int _plat__NvIsDifferent(unsigned int startOffset, // IN: read start // NOTE: A useful optimization would be for this code to compare the current // contents of NV with the local copy and note the blocks that have changed. Then // only write those blocks when _plat__NvCommit() is called. +// Return Type: int +// TRUE(1) offset and size is within available NV size +// FALSE(0) otherwise; also trigger failure mode LIB_EXPORT int _plat__NvMemoryWrite(unsigned int startOffset, // IN: write start unsigned int size, // IN: size of bytes to write void* data // OUT: data buffer ) { + assert(startOffset + size <= NV_MEMORY_SIZE); if(startOffset + size <= NV_MEMORY_SIZE) { memcpy(&s_NV[startOffset], data, size); // Copy the data to the NV image @@ -300,30 +295,37 @@ LIB_EXPORT int _plat__NvMemoryWrite(unsigned int startOffset, // IN: write star //***_plat__NvMemoryClear() // Function is used to set a range of NV memory bytes to an implementation-dependent // value. The value represents the erase state of the memory. -LIB_EXPORT void _plat__NvMemoryClear( - unsigned int start, // IN: clear start - unsigned int size // IN: number of bytes to clear +LIB_EXPORT int _plat__NvMemoryClear(unsigned int startOffset, // IN: clear start + unsigned int size // IN: number of bytes to clear ) { - assert(start + size <= NV_MEMORY_SIZE); - // In this implementation, assume that the erase value for NV is all 1s - memset(&s_NV[start], 0xff, size); + assert(startOffset + size <= NV_MEMORY_SIZE); + if(startOffset + size <= NV_MEMORY_SIZE) + { + // In this implementation, assume that the erase value for NV is all 1s + memset(&s_NV[startOffset], 0xff, size); + return TRUE; + } + return FALSE; } //***_plat__NvMemoryMove() // Function: Move a chunk of NV memory from source to destination // This function should ensure that if there overlap, the original data is // copied before it is written -LIB_EXPORT void _plat__NvMemoryMove( - unsigned int sourceOffset, // IN: source offset - unsigned int destOffset, // IN: destination offset - unsigned int size // IN: size of data being moved +LIB_EXPORT int _plat__NvMemoryMove(unsigned int sourceOffset, // IN: source offset + unsigned int destOffset, // IN: destination offset + unsigned int size // IN: size of data being moved ) { assert(sourceOffset + size <= NV_MEMORY_SIZE); assert(destOffset + size <= NV_MEMORY_SIZE); - memmove(&s_NV[destOffset], &s_NV[sourceOffset], size); // Move data in RAM - return; + if(sourceOffset + size <= NV_MEMORY_SIZE && destOffset + size <= NV_MEMORY_SIZE) + { + memmove(&s_NV[destOffset], &s_NV[sourceOffset], size); // Move data in RAM + return TRUE; + } + return FALSE; } //***_plat__NvCommit() @@ -341,6 +343,16 @@ LIB_EXPORT int _plat__NvCommit(void) #endif } +//***_plat__TearDown +// notify platform that TPM_TearDown was called so platform can cleanup or +// zeroize anything in the Platform. This should zeroize NV as well. +LIB_EXPORT void _plat__TearDown() +{ +#if FILE_BACKED_NV + // remove(s_NvFilePath); +#endif +} + //***_plat__SetNvAvail() // Set the current NV state to available. This function is for testing purpose // only. It is not part of the platform NV logic diff --git a/TPMCmd/Platform/src/PPPlat.c b/TPMCmd/Platform/src/PPPlat.c index d7625388..a0e13a9a 100644 --- a/TPMCmd/Platform/src/PPPlat.c +++ b/TPMCmd/Platform/src/PPPlat.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This module simulates the physical presence interface pins on the TPM. diff --git a/TPMCmd/Platform/src/PlatformACT.c b/TPMCmd/Platform/src/PlatformACT.c index e69f0243..3c7e047c 100644 --- a/TPMCmd/Platform/src/PlatformACT.c +++ b/TPMCmd/Platform/src/PlatformACT.c @@ -1,42 +1,10 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Platform.h" //** Functions +#if ACT_SUPPORT + //*** ActSignal() // Function called when there is an ACT event to signal or unsignal static void ActSignal(P_ACT_DATA actData, int on) @@ -54,71 +22,71 @@ static void ActSignal(P_ACT_DATA actData, int on) // It should test 'on' to see if it is turning the signal on or off. switch(actData->number) { -#if RH_ACT_0 +# if RH_ACT_0 case 0: // Do something return; -#endif -#if RH_ACT_1 +# endif +# if RH_ACT_1 case 1: // Do something return; -#endif -#if RH_ACT_2 +# endif +# if RH_ACT_2 case 2: // Do something return; -#endif -#if RH_ACT_3 +# endif +# if RH_ACT_3 case 3: // Do something return; -#endif -#if RH_ACT_4 +# endif +# if RH_ACT_4 case 4: // Do something return; -#endif -#if RH_ACT_5 +# endif +# if RH_ACT_5 case 5: // Do something return; -#endif -#if RH_ACT_6 +# endif +# if RH_ACT_6 case 6: // Do something return; -#endif -#if RH_ACT_7 +# endif +# if RH_ACT_7 case 7: // Do something return; -#endif -#if RH_ACT_8 +# endif +# if RH_ACT_8 case 8: // Do something return; -#endif -#if RH_ACT_9 +# endif +# if RH_ACT_9 case 9: // Do something return; -#endif -#if RH_ACT_A +# endif +# if RH_ACT_A case 0xA: // Do something return; -#endif -#if RH_ACT_B +# endif +# if RH_ACT_B case 0xB: // Do something return; -#endif -#if RH_ACT_C +# endif +# if RH_ACT_C case 0xC: // Do something return; -#endif -#if RH_ACT_D +# endif +# if RH_ACT_D case 0xD: // Do something return; -#endif -#if RH_ACT_E +# endif +# if RH_ACT_E case 0xE: // Do something return; -#endif -#if RH_ACT_F +# endif +# if RH_ACT_F case 0xF: // Do something return; -#endif +# endif default: return; } @@ -128,9 +96,9 @@ static void ActSignal(P_ACT_DATA actData, int on) static P_ACT_DATA ActGetDataPointer(uint32_t act) { -#define RETURN_ACT_POINTER(N) \ - if(0x##N == act) \ - return &ACT_##N; +# define RETURN_ACT_POINTER(N) \ + if(0x##N == act) \ + return &ACT_##N; FOR_EACH_ACT(RETURN_ACT_POINTER) @@ -273,7 +241,7 @@ LIB_EXPORT void _plat__ACT_Tick(void) if(actTicksAllowed) { // Handle the update for each counter. -#define DECREMENT_COUNT(N) ActDecrement(&ACT_##N); +# define DECREMENT_COUNT(N) ActDecrement(&ACT_##N); FOR_EACH_ACT(DECREMENT_COUNT) } @@ -295,8 +263,10 @@ static void ActZero(uint32_t act, P_ACT_DATA actData) LIB_EXPORT int _plat__ACT_Initialize(void) { actTicksAllowed = 0; -#define ZERO_ACT(N) ActZero(0x##N, &ACT_##N); +# define ZERO_ACT(N) ActZero(0x##N, &ACT_##N); FOR_EACH_ACT(ZERO_ACT) return TRUE; } + +#endif // ACT_SUPPORT diff --git a/TPMCmd/Platform/src/PlatformData.c b/TPMCmd/Platform/src/PlatformData.c index 43092929..edd59dae 100644 --- a/TPMCmd/Platform/src/PlatformData.c +++ b/TPMCmd/Platform/src/PlatformData.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file will instance the TPM variables that are not stack allocated. The // descriptions for these variables are in Global.h for this project. diff --git a/TPMCmd/Platform/src/PlatformPcr.c b/TPMCmd/Platform/src/PlatformPcr.c new file mode 100644 index 00000000..ca4893ff --- /dev/null +++ b/TPMCmd/Platform/src/PlatformPcr.c @@ -0,0 +1,153 @@ + +// PCR platform interface functions +#include "Platform.h" +#include + +// use this as a convenient lookup for hash size for PCRs. +UINT16 CryptHashGetDigestSize(TPM_ALG_ID hashAlg // IN: hash algorithm to look up +); +void MemorySet(void* dest, int value, size_t size); + +// The initial value of PCR attributes. The value of these fields should be +// consistent with PC Client specification. The bitfield meanings are defined by +// the TPM Reference code. +// In this implementation, we assume the total number of implemented PCR is 24. +static const PCR_Attributes s_initAttributes[] = { + // + // PCR 0 - 15, static RTM + // PCR[0] + { + 1, // save state + 0, // in the "do not increment the PcrCounter" group? (0 = increment the PcrCounter) + 0, // supportsPolicyAuth group number? 0 = policyAuth not supported for this PCR. + 0, // supportsAuthValue group number? 0 = AuthValue not supported for this PCR. + 0, // 0 = reset localities (cannot reset) + 0x1F // 0x1F = extendlocalities [0,4] + }, + {1, 0, 0, 0, 0, 0x1F}, // PCR 1-3 + {1, 0, 0, 0, 0, 0x1F}, + {1, 0, 0, 0, 0, 0x1F}, + {1, 0, 0, 0, 0, 0x1F}, // PCR 4-6 + {1, 0, 0, 0, 0, 0x1F}, + {1, 0, 0, 0, 0, 0x1F}, + {1, 0, 0, 0, 0, 0x1F}, // PCR 7-9 + {1, 0, 0, 0, 0, 0x1F}, + {1, 0, 0, 0, 0, 0x1F}, + {1, 0, 0, 0, 0, 0x1F}, // PCR 10-12 + {1, 0, 0, 0, 0, 0x1F}, + {1, 0, 0, 0, 0, 0x1F}, + {1, 0, 0, 0, 0, 0x1F}, // PCR 13-15 + {1, 0, 0, 0, 0, 0x1F}, + {1, 0, 0, 0, 0, 0x1F}, + + // these PCRs are never saved + {0, 0, 0, 0, 0x0F, 0x1F}, // PCR 16, Debug, reset allowed, extend all + {0, 0, 0, 0, 0x10, 0x1C}, // PCR 17, Locality 4, extend loc 2+ + {0, 0, 0, 0, 0x10, 0x1C}, // PCR 18, Locality 3, extend loc 2+ + {0, 0, 0, 0, 0x10, 0x0C}, // PCR 19, Locality 2, extend loc 2, 3 + // these three support doNotIncrement, PolicyAuth, and AuthValue. + // this is consistent with the existing behavior of the TPM Reference code + // but differs from the behavior of the PC client spec. + {0, 1, 1, 1, 0x14, 0x0E}, // PCR 20, Locality 1, extend loc 1, 2, 3 + {0, 1, 1, 1, 0x14, 0x04}, // PCR 21, Dynamic OS, extend loc 2 + {0, 1, 1, 1, 0x14, 0x04}, // PCR 22, Dynamic OS, extend loc 2 + {0, 0, 0, 0, 0x0F, 0x1F}, // PCR 23, reset allowed, App specific, extend all +}; + +#ifndef ARRAYSIZE +# define ARRAYSIZE(a) (sizeof(a) / sizeof(a[0])) +#endif + +MUST_BE(ARRAYSIZE(s_initAttributes) == IMPLEMENTATION_PCR); + +#if ALG_SHA256 != YES && ALG_SHA384 != YES +# error No default PCR banks defined +#endif + +static const TPM_ALG_ID DefaultActivePcrBanks[] = { +#if ALG_SHA256 + TPM_ALG_SHA256 +#endif +#if ALG_SHA384 +# if ALG_SHA256 + , +# endif + TPM_ALG_SHA384 +#endif +}; + +UINT32 _platPcr__NumberOfPcrs() +{ + return ARRAYSIZE(s_initAttributes); +} + +// return the initialization attributes of a given PCR. +// pcrNumber expected to be in [0, _platPcr__NumberOfPcrs) +// returns the attributes for PCR[0] if the requested pcrNumber is out of range. +PCR_Attributes _platPcr__GetPcrInitializationAttributes(UINT32 pcrNumber) +{ + if(pcrNumber >= _platPcr__NumberOfPcrs()) + { + pcrNumber = 0; + } + return s_initAttributes[pcrNumber]; +} + +// should the given PCR algorithm default to active in a new TPM? +BOOL _platPcr_IsPcrBankDefaultActive(TPM_ALG_ID pcrAlg) +{ + // brute force search is fast enough for a small array. + for(int i = 0; i < ARRAYSIZE(DefaultActivePcrBanks); i++) + { + if(DefaultActivePcrBanks[i] == pcrAlg) + { + return TRUE; + } + } + return FALSE; +} + +// Fill a given buffer with the PCR initialization value for a particular PCR and hash +// combination, and return its length. If the platform doesn't have a value, then +// the result size is expected to be zero, and the rfunction will return TPM_RC_PCR. +// If a valid is not available, then the core TPM library will ignore the value and +// treat it as non-existant and provide a default. +// If the buffer is not large enough for a pcr consistent with pcrAlg, then the +// platform will return TPM_RC_FAILURE. +TPM_RC _platPcr__GetInitialValueForPcr( + UINT32 pcrNumber, // IN: PCR to be initialized + TPM_ALG_ID pcrAlg, // IN: Algorithm of the PCR Bank being initialized + BYTE startupLocality, // IN: locality where startup is being called from + BYTE* pcrData, // OUT: buffer to put PCR initialization value into + uint16_t bufferSize, // IN: maximum size of value buffer can hold + uint16_t* pcrLength // OUT: size of initialization value returned in pcrBuffer +) +{ + // If the reset locality contains locality 4, then this + // indicates a DRTM PCR where the reset value is all ones, + // otherwise it is all zero. Don't check with equal because + // resetLocality is a bitfield of multiple values and does + // not support extended localities. + uint16_t pcrSize = CryptHashGetDigestSize(pcrAlg); + pAssert_RC(pcrNumber < _platPcr__NumberOfPcrs()); + pAssert_RC(bufferSize >= pcrSize) pAssert_RC(pcrLength != NULL); + + PCR_Attributes pcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcrNumber); + BYTE defaultValue = 0; + // PCRs that can be cleared from locality 4 are DRTM and initialize to all 0xFF + if((pcrAttributes.resetLocality & 0x10) != 0) + { + defaultValue = 0xFF; + } + MemorySet(pcrData, defaultValue, pcrSize); + if(pcrNumber == HCRTM_PCR) + { + pcrData[pcrSize - 1] = startupLocality; + } + + // platform could provide a value here if the platform has initialization rules + // different from the original PC Client spec (the default used by the Core library). + *pcrLength = pcrSize; + return TPM_RC_SUCCESS; +} diff --git a/TPMCmd/Platform/src/PowerPlat.c b/TPMCmd/Platform/src/PowerPlat.c index 5fda66da..aaa9175d 100644 --- a/TPMCmd/Platform/src/PowerPlat.c +++ b/TPMCmd/Platform/src/PowerPlat.c @@ -1,41 +1,6 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes and Function Prototypes #include "Platform.h" -#include "_TPM_Init_fp.h" //** Functions @@ -94,10 +59,12 @@ LIB_EXPORT int _plat__Signal_Reset(void) LIB_EXPORT void _plat__Signal_PowerOff(void) { // Prepare NV memory for power off - _plat__NVDisable(0); + _plat__NVDisable((void*)FALSE, 0); +#if ACT_SUPPORT // Disable tick ACT tick processing _plat__ACT_EnableTicks(FALSE); +#endif return; } \ No newline at end of file diff --git a/TPMCmd/Platform/src/RunCommand.c b/TPMCmd/Platform/src/RunCommand.c index 114421e1..9d846cf4 100644 --- a/TPMCmd/Platform/src/RunCommand.c +++ b/TPMCmd/Platform/src/RunCommand.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //**Introduction // This module provides the platform specific entry and fail processing. The // _plat__RunCommand() function is used to call to ExecuteCommand() in the TPM code. @@ -42,17 +8,32 @@ // code will have set the flag to indicate that the TPM is in failure mode. // This call will then recursively call ExecuteCommand in order to build the // failure mode response. When ExecuteCommand() returns to _plat__Fail(), the -// platform will do some platform specif operation to return to the environment in +// platform will do some platform specific operation to return to the environment in // which the TPM is executing. For a simulator, setjmp/longjmp is used. For an OS, // a system exit to the OS would be appropriate. //** Includes and locals #include "Platform.h" +#include #include -#include "ExecCommand_fp.h" +#include jmp_buf s_jumpBuffer; +// The following extern globals are copied here from Global.h to avoid including all of Tpm.h here. +// TODO: Improve the interface by which these values are shared. +extern BOOL g_inFailureMode; // Indicates that the TPM is in failure mode +#if ALLOW_FORCE_FAILURE_MODE +extern BOOL g_forceFailureMode; // flag to force failure mode during test +#endif +#if FAIL_TRACE +// The name of the function that triggered failure mode. +extern const char* s_failFunctionName; +#endif // FAIL_TRACE +extern UINT32 s_failFunction; +extern UINT32 s_failLine; +extern UINT32 s_failCode; + //** Functions //***_plat__RunCommand() @@ -77,5 +58,23 @@ LIB_EXPORT void _plat__RunCommand( // This is the platform depended failure exit for the TPM. LIB_EXPORT NORETURN void _plat__Fail(void) { + +#if ALLOW_FORCE_FAILURE_MODE + // The simulator asserts during unexpected (i.e., un-forced) failure modes. + if(!g_forceFailureMode) + { + fprintf(stderr, "Unexpected failure mode (code %d) in ", s_failCode); +# if FAIL_TRACE + fprintf(stderr, "function '%s' (line %d)\n", s_failFunctionName, s_failLine); +# else // FAIL_TRACE + fprintf(stderr, "location code 0x%0x\n", s_locationCode); +# endif // FAIL_TRACE + assert(FALSE); + } + + // Clear the forced-failure mode flag for next time. + g_forceFailureMode = FALSE; +#endif // ALLOW_FORCE_FAILURE_MODE + longjmp(&s_jumpBuffer[0], 1); -} \ No newline at end of file +} diff --git a/TPMCmd/Platform/src/Unique.c b/TPMCmd/Platform/src/Unique.c index 1b8237e4..000be3bc 100644 --- a/TPMCmd/Platform/src/Unique.c +++ b/TPMCmd/Platform/src/Unique.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // In some implementations of the TPM, the hardware can provide a secret // value to the TPM. This secret value is statistically unique to the @@ -42,41 +8,41 @@ //** Includes #include "Platform.h" -const char notReallyUnique[] = "This is not really a unique value. A real unique " - "value should" +#if VENDOR_PERMANENT_AUTH_ENABLED == YES + +const char notReallyUnique[] = "This is not really a unique value. A real " + "unique value should" " be generated by the platform."; //** _plat__GetUnique() -// This function is used to access the platform-specific unique value. +// This function is used to access the platform-specific vendor unique values. // This function places the unique value in the provided buffer ('b') // and returns the number of bytes transferred. The function will not // copy more data than 'bSize'. // NOTE: If a platform unique value has unequal distribution of uniqueness // and 'bSize' is smaller than the size of the unique value, the 'bSize' // portion with the most uniqueness should be returned. -LIB_EXPORT uint32_t _plat__GetUnique(uint32_t which, // authorities (0) or details - uint32_t bSize, // size of the buffer +// +// 'which' indicates the unique value to return: +// 0 = RESERVED, do not use +// 1 = the VENDOR_PERMANENT_AUTH_HANDLE authorization value for this device +LIB_EXPORT uint32_t _plat__GetUnique(uint32_t which, // which vendor value to return? + uint32_t bSize, // size of the buffer unsigned char* b // output buffer ) { const char* from = notReallyUnique; uint32_t retVal = 0; - if(which == 0) // the authorities value - { - for(retVal = 0; *from != 0 && retVal < bSize; retVal++) - { - *b++ = *from++; - } - } - else + if(which == 1) { -#define uSize sizeof(notReallyUnique) - b = &b[((bSize < uSize) ? bSize : uSize) - 1]; - for(retVal = 0; *from != 0 && retVal < bSize; retVal++) - { - *b-- = *from++; - } + const size_t uSize = + sizeof(notReallyUnique) <= bSize ? sizeof(notReallyUnique) : bSize; + MemoryCopy(b, notReallyUnique, uSize); } + // else fall through to default 0 + return retVal; -} \ No newline at end of file +} + +#endif \ No newline at end of file diff --git a/TPMCmd/Platform/src/VendorInfo.c b/TPMCmd/Platform/src/VendorInfo.c new file mode 100644 index 00000000..d3d38321 --- /dev/null +++ b/TPMCmd/Platform/src/VendorInfo.c @@ -0,0 +1,149 @@ +//** Introduction +// Provide vendor-specific version and identifiers to core TPM library for +// return in capabilities. These may not be compile time constants and therefore +// are provided by platform callbacks. These platform functions are expected to +// always be available, even in failure mode. +// +//** Includes +#include "Platform.h" + +// In this sample platform, these are compile time constants, but are not required to be. +#define MANUFACTURER "XYZ " +#define VENDOR_STRING_1 "xCG " +#define VENDOR_STRING_2 "fTPM" +#define VENDOR_STRING_3 "\0\0\0\0" +#define VENDOR_STRING_4 "\0\0\0\0" +#define FIRMWARE_V1 (0x20240125) +#define FIRMWARE_V2 (0x00120000) +#define MAX_SVN 255 + +static uint32_t currentHash = FIRMWARE_V2; +static uint16_t currentSvn = 10; + +// Similar to the Core Library's ByteArrayToUint32, but usable in Platform code. +static uint32_t StringToUint32(char s[4]) +{ + uint8_t* b = (uint8_t*)s; // Avoid promotion to a signed integer type + return (((uint32_t)b[0] << 8 | b[1]) << 8 | b[2]) << 8 | b[3]; +} + +// return the 4 character Manufacturer Capability code. This +// should come from the platform library since that is provided by the manufacturer +LIB_EXPORT uint32_t _plat__GetManufacturerCapabilityCode() +{ + return StringToUint32(MANUFACTURER); +} + +// return the 4 character VendorStrings for Capabilities. +// Index is ONE-BASED, and may be in the range [1,4] inclusive. +// Any other index returns all zeros. The return value will be interpreted +// as an array of 4 ASCII characters (with no null terminator) +LIB_EXPORT uint32_t _plat__GetVendorCapabilityCode(int index) +{ + switch(index) + { + case 1: + return StringToUint32(VENDOR_STRING_1); + case 2: + return StringToUint32(VENDOR_STRING_2); + case 3: + return StringToUint32(VENDOR_STRING_3); + case 4: + return StringToUint32(VENDOR_STRING_4); + } + return 0; +} + +// return the most-significant 32-bits of the TPM Firmware Version reported by +// getCapability. +LIB_EXPORT uint32_t _plat__GetTpmFirmwareVersionHigh() +{ + return FIRMWARE_V1; +} + +// return the least-significant 32-bits of the TPM Firmware Version reported by +// getCapability. +LIB_EXPORT uint32_t _plat__GetTpmFirmwareVersionLow() +{ + return FIRMWARE_V2; +} + +// return the TPM Firmware SVN reported by getCapability. +LIB_EXPORT uint16_t _plat__GetTpmFirmwareSvn(void) +{ + return currentSvn; +} + +// return the TPM Firmware maximum SVN reported by getCapability. +LIB_EXPORT uint16_t _plat__GetTpmFirmwareMaxSvn(void) +{ + return MAX_SVN; +} + +// Called by the simulator to set the TPM Firmware SVN reported by +// getCapability. +LIB_EXPORT void _plat__SetTpmFirmwareHash(uint32_t hash) +{ + currentHash = hash; +} + +// Called by the simulator to set the TPM Firmware SVN reported by +// getCapability. +LIB_EXPORT void _plat__SetTpmFirmwareSvn(uint16_t svn) +{ + currentSvn = MIN(svn, MAX_SVN); +} + +#if SVN_LIMITED_SUPPORT +// Dummy implmenentation for obtaining a Firmware SVN Secret bound +// to the given SVN. +LIB_EXPORT int _plat__GetTpmFirmwareSvnSecret(uint16_t svn, + uint16_t secret_buf_size, + uint8_t* secret_buf, + uint16_t* secret_size) +{ + int i; + + if(svn > currentSvn) + { + return -1; + } + + // INSECURE dummy implementation: repeat the SVN into the secret buffer. + for(i = 0; i < secret_buf_size; ++i) + { + secret_buf[i] = ((uint8_t*)&svn)[i % sizeof(svn)]; + } + + *secret_size = secret_buf_size; + + return 0; +} +#endif // SVN_LIMITED_SUPPORT + +#if FW_LIMITED_SUPPORT +// Dummy implmenentation for obtaining a Firmware Secret bound +// to the current firmware image. +LIB_EXPORT int _plat__GetTpmFirmwareSecret( + uint16_t secret_buf_size, uint8_t* secret_buf, uint16_t* secret_size) +{ + int i; + + // INSECURE dummy implementation: repeat the firmware hash into the + // secret buffer. + for(i = 0; i < secret_buf_size; ++i) + { + secret_buf[i] = ((uint8_t*)¤tHash)[i % sizeof(currentHash)]; + } + + *secret_size = secret_buf_size; + + return 0; +} +#endif // FW_LIMITED_SUPPORT + +// return the TPM Type returned by TPM_PT_VENDOR_TPM_TYPE +LIB_EXPORT uint32_t _plat__GetTpmType() +{ + return 1; // just the value the reference code has returned in the past. +} diff --git a/TPMCmd/Simulator/CMakeLists.txt b/TPMCmd/Simulator/CMakeLists.txt new file mode 100644 index 00000000..3d6a9cee --- /dev/null +++ b/TPMCmd/Simulator/CMakeLists.txt @@ -0,0 +1,110 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +cmake_minimum_required(VERSION 3.16.3) +include(${CMAKE_CURRENT_SOURCE_DIR}/../tpm/cmake/tpm_support.cmake) + +project(Simulator) +print_project_info() + +set(CMAKE_CONFIGURATION_TYPES "Debug" + CACHE STRING "Configuration types" FORCE) + +# use standard output directories. Expected by package_utilities +include(GNUInstallDirs) + +add_executable(Simulator + src/TcpServer.c + src/TPMCmdp.c + src/TPMCmds.c +) + +# Additional include directories +# simulator folders +target_include_directories(Simulator PRIVATE + ${CMAKE_CURRENT_SOURCE_DIR}/include; + ${CMAKE_CURRENT_SOURCE_DIR}/include/prototypes; +) + +# Preprocessor definitions +target_compile_definitions(Simulator PRIVATE + _UNICODE + _CONSOLE + _DIAGNOSTICS +) + + +# Only call find_package if this CMakeLists file is not being included via +# add_subdirectory. Calling find_package during add_subdirectory will cause the +# REQUIRED clause of the find_pacakge to fail since they haven't been built +# yet.) +if(PROJECT_IS_TOP_LEVEL) + # External libs and include directories + find_package(Tpm_CompilerOptions PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(TpmConfiguration CONFIG REQUIRED PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(Tpm_Public_Headers CONFIG REQUIRED PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(Tpm_Platform_Interface CONFIG REQUIRED PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(Tpm_PlatformLib CONFIG REQUIRED PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(Tpm_CryptoLib_Common PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(Tpm_CryptoLib_TpmBigNum_Headers PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(Tpm_CryptoLib_Math_Ossl CONFIG REQUIRED PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(Tpm_CryptoLib_TpmBigNum CONFIG REQUIRED PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) + find_package(Tpm_CoreLib CONFIG REQUIRED PATHS ${CMAKE_INSTALL_PREFIX} NO_DEFAULT_PATH ) +endif() + +# Link libraries +target_link_libraries(Simulator PUBLIC TpmConfiguration::TpmConfiguration) +target_link_libraries(Simulator PUBLIC Tpm_Public_Headers::Tpm_Public_Headers) +target_link_libraries(Simulator PUBLIC Tpm_PlatformLib::Tpm_PlatformLib) +target_link_libraries(Simulator PUBLIC Tpm_Platform_Interface::Tpm_Platform_Interface) +target_link_libraries(Simulator PUBLIC Tpm_CoreLib::Tpm_CoreLib) +target_link_libraries(Simulator PUBLIC Tpm_CryptoLib_TpmBigNum::Tpm_CryptoLib_TpmBigNum) + +set(WIN_LIBCRYPTO_PATH) + +if(WIN32) + if( CMAKE_SIZEOF_VOID_P EQUAL 8 ) + set(WIN_LIBCRYPTO_PATH "${CMAKE_CURRENT_SOURCE_DIR}/../lib/x64") + set(source_filename libcrypto-1_1-x64.dll) + elseif( CMAKE_SIZEOF_VOID_P EQUAL 4 ) + set(WIN_LIBCRYPTO_PATH "${CMAKE_CURRENT_SOURCE_DIR}/../lib") + set(source_filename libcrypto-1_1.dll) + else() + message(FATAL_ERROR "CMAKE_SIZEOF_VOID_P: ${CMAKE_SIZEOF_VOID_P}") + endif() + + target_link_libraries(Simulator PRIVATE + Ws2_32.lib + Rpcrt4.lib + ) + + target_link_directories(Simulator PRIVATE ${WIN_LIBCRYPTO_PATH}) + + # copy the openssl dll to simulator output folder if TPM is using openssl. + # only necessary on WIN32. + message(DEBUG "adding target to copy ${WIN_LIBCRYPTO_PATH}/${source_filename} to simulator folder") + + # target must be included in ALL or it won't be built by default + # since the direction of the dependency is simulator->copy, + # specifying DEPENDS here doesn't include the copy if simulator is built, but + # would build Simulator if --target copy_libcrypto_dll is built first. + add_custom_target(copy_libcrypto_dll ALL + COMMAND ${CMAKE_COMMAND} -E + copy ${WIN_LIBCRYPTO_PATH}/${source_filename} $/${source_filename} + ) + + install(FILES ${WIN_LIBCRYPTO_PATH}/${source_filename} + DESTINATION ${CMAKE_INSTALL_BINDIR}) + +else() + # not supported yet. +endif () + +# include Simulator +install(TARGETS ${PROJECT_NAME} + LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR} + ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR} + RUNTIME DESTINATION ${CMAKE_INSTALL_BINDIR} +) diff --git a/TPMCmd/Simulator/include/TpmTcpProtocol.h b/TPMCmd/Simulator/include/TpmTcpProtocol.h index e7b8d7af..643cc591 100644 --- a/TPMCmd/Simulator/include/TpmTcpProtocol.h +++ b/TPMCmd/Simulator/include/TpmTcpProtocol.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // TPM commands are communicated as uint8_t streams on a TCP connection. The TPM @@ -85,6 +51,9 @@ #define TPM_TEST_FAILURE_MODE 30 +#define TPM_SET_FW_HASH 35 +#define TPM_SET_FW_SVN 36 + //** Enumerations and Structures enum TpmEndPointInfo { diff --git a/TPMCmd/Simulator/include/prototypes/Simulator_fp.h b/TPMCmd/Simulator/include/prototypes/Simulator_fp.h index ff90a374..ff2e3fd7 100644 --- a/TPMCmd/Simulator/include/prototypes/Simulator_fp.h +++ b/TPMCmd/Simulator/include/prototypes/Simulator_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Mar 4, 2020 Time: 02:36:45PM @@ -59,18 +25,24 @@ DWORD WINAPI PlatformSvcRoutine(LPVOID port); // This function starts a new thread waiting for platform signals. // Platform signals are processed one at a time in the order in which they are // received. -int PlatformSignalService(int PortNumber); +// If PickPorts is true, the server finds the next available port if the specified +// port was unavailable. +int PlatformSignalService(int PortNumber, bool PickPorts); //*** RegularCommandService() // This function services regular commands. -int RegularCommandService(int PortNumber); +// If PickPorts is true, the server finds the next available port if the specified +// port was unavailable. +int RegularCommandService(int PortNumber, bool PickPorts); //*** StartTcpServer() -// This is the main entry-point to the TCP server. The server listens on port +// This is the main entry-point to the TCP server. The server listens on the port // specified. +// If PickPorts is true, the server finds the next available port if the specified +// port was unavailable. // // Note that there is no way to specify the network interface in this implementation. -int StartTcpServer(int PortNumber); +int StartTcpServer(int PortNumber, bool PickPorts); //*** ReadBytes() // This function reads the indicated number of bytes ('NumBytes') into buffer @@ -93,7 +65,7 @@ bool ReadUINT32(SOCKET s, uint32_t* val); //*** ReadVarBytes() // Get a uint32-length-prepended binary array. Note that the 4-byte length is // in network byte order (big-endian). -bool ReadVarBytes(SOCKET s, char* buffer, uint32_t* BytesReceived, uint32_t MaxLen); +bool ReadVarBytes(SOCKET s, char* buffer, uint32_t* BytesReceived, int MaxLen); //*** WriteVarBytes() // Send a UINT32-length-prepended binary array. Note that the 4-byte length is @@ -191,6 +163,14 @@ void _rpc__RsaKeyCacheControl(int state); // This function is used to count the ACT second tick. bool _rpc__ACT_GetSignaled(uint32_t actHandle); +//*** _rpc__SetTpmFirmwareHash() +// This function is used to modify the firmware's hash during simulation. +void _rpc__SetTpmFirmwareHash(uint32_t hash); + +//*** _rpc__SetTpmFirmwareSvn() +// This function is used to modify the firmware's SVN during simulation. +void _rpc__SetTpmFirmwareSvn(uint16_t svn); + //** From TPMCmds.c //*** main() diff --git a/TPMCmd/Simulator/simulator.vcxproj b/TPMCmd/Simulator/simulator.vcxproj index ac23db5c..02b024c6 100644 --- a/TPMCmd/Simulator/simulator.vcxproj +++ b/TPMCmd/Simulator/simulator.vcxproj @@ -1,491 +1,491 @@ - - - - - Debug - Win32 - - - Debug - x64 - - - Release - Win32 - - - Release - x64 - - - Static - Win32 - - - Static - x64 - - - WolfDebug - Win32 - - - WolfDebug - x64 - - - WolfRelease - Win32 - - - WolfRelease - x64 - - - - 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+ false + + + false + + + + Disabled + $(ProjectDir)include\;$(ProjectDir)include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\public\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)platform\include\;$(SolutionDir)platform\include\prototypes;$(SolutionDir)TpmConfiguration + WIN32;DEBUG;_CONSOLE;%(PreprocessorDefinitions);_DIAGNOSTICS + EnableFastChecks + MultiThreadedDebugDLL + NotUsing + EnableAllWarnings + ProgramDatabase + CompileAsC + true + true + 4127;4668;4710;4711;4820;5045 + + + + tpm.lib;libcrypto.lib;platform.lib;Ws2_32.lib;Rpcrt4.lib;%(AdditionalDependencies) + $(SolutionDir)\lib;$(OutDir);%(AdditionalLibraryDirectories) + true + Console + MachineX86 + $(OutDir)$(TargetName)$(TargetExt) + false + $(OutDir)Simulator.map + false + + + true + + + + + Disabled + $(ProjectDir)include\;$(ProjectDir)include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\public\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)platform\include\;$(SolutionDir)platform\include\prototypes;$(SolutionDir)TpmConfiguration + WIN32;DEBUG;_CONSOLE;%(PreprocessorDefinitions);_DIAGNOSTICS + EnableFastChecks + MultiThreadedDebugDLL + NotUsing + EnableAllWarnings + ProgramDatabase + CompileAsC + true + true + 4127;4668;4710;4711;4820;5045 + + + + tpm.lib;libcrypto.lib;platform.lib;Ws2_32.lib;Rpcrt4.lib;%(AdditionalDependencies) + $(SolutionDir)\lib;$(OutDir);%(AdditionalLibraryDirectories) + true + Console + MachineX86 + $(OutDir)$(TargetName)$(TargetExt) + false + $(OutDir)Simulator.map + false + + + true + + + + + Disabled + $(ProjectDir)include\;$(ProjectDir)include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\public\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)platform\include\;$(SolutionDir)platform\include\prototypes;$(SolutionDir)TpmConfiguration + WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions);_DIAGNOSTICS + EnableFastChecks + MultiThreadedDebugDLL + NotUsing + EnableAllWarnings + ProgramDatabase + CompileAsC + true + 4668;4710;4711;4820;5045 + + + + libeay32.lib;tpm.lib;platform.lib;Ws2_32.lib;Rpcrt4.lib;%(AdditionalDependencies) + $(SolutionDir)\lib;$(OutDir);%(AdditionalLibraryDirectories) + true + Console + MachineX86 + $(OutDir)$(TargetName)$(TargetExt) + + + + + Disabled + $(ProjectDir)include\;$(ProjectDir)include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\public\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)platform\include\;$(SolutionDir)platform\include\prototypes;$(SolutionDir)TpmConfiguration + WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions);_DIAGNOSTICS + EnableFastChecks + MultiThreadedDebugDLL + + + EnableAllWarnings + ProgramDatabase + true + 4127;4668;4710;4711;4820;5045 + + + + tpm.lib;libcrypto.lib;platform.lib;Ws2_32.lib;Rpcrt4.lib;%(AdditionalDependencies) + $(SolutionDir)\lib;$(OutDir);%(AdditionalLibraryDirectories) + true + Console + + + + + Disabled + $(ProjectDir)include\;$(ProjectDir)include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\public\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)platform\include\;$(SolutionDir)platform\include\prototypes;$(SolutionDir)TpmConfiguration + WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions);_DIAGNOSTICS + EnableFastChecks + MultiThreadedDebugDLL + + + EnableAllWarnings + ProgramDatabase + true + 4127;4668;4710;4711;4820;5045 + + + + tpm.lib;libcrypto.lib;platform.lib;Ws2_32.lib;Rpcrt4.lib;%(AdditionalDependencies) + $(SolutionDir)\lib;$(OutDir);%(AdditionalLibraryDirectories) + true + Console + + + + + Disabled + $(ProjectDir)include\;$(ProjectDir)include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\public\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)platform\include\;$(SolutionDir)platform\include\prototypes;$(SolutionDir)TpmConfiguration + WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions);_DIAGNOSTICS + EnableFastChecks + MultiThreadedDebugDLL + + + EnableAllWarnings + ProgramDatabase + true + 4668;4710;4711;4820;5045 + + + + libeay32.lib;tpm.lib;platform.lib;Ws2_32.lib;Rpcrt4.lib;%(AdditionalDependencies) + $(SolutionDir)\lib\x64;$(OutDir);%(AdditionalLibraryDirectories) + true + Console + + + + + MaxSpeed + true + WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) + MultiThreadedDLL + true + NotUsing + EnableAllWarnings + ProgramDatabase + $(ProjectDir)include\;$(ProjectDir)include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\public\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)platform\include\;$(SolutionDir)platform\include\prototypes;$(SolutionDir)TpmConfiguration + true + 4668;4710;4711;4820;5045 + + + + true + Console + true + true + MachineX86 + tpm.lib;libcrypto.lib;platform.lib;Ws2_32.lib;Rpcrt4.lib;%(AdditionalDependencies) + $(SolutionDir)\lib;$(OutDir);%(AdditionalLibraryDirectories) + $(OutDir)$(TargetName)$(TargetExt) + + + + + MaxSpeed + true + WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) + MultiThreadedDLL + true + NotUsing + EnableAllWarnings + ProgramDatabase + $(ProjectDir)include\;$(ProjectDir)include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\public\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)platform\include\;$(SolutionDir)platform\include\prototypes;$(SolutionDir)TpmConfiguration + true + 4668;4710;4711;4820;5045 + + + + true + Console + true + true + MachineX86 + tpm.lib;libcrypto.lib;platform.lib;Ws2_32.lib;Rpcrt4.lib;%(AdditionalDependencies) + $(SolutionDir)\lib;$(OutDir);%(AdditionalLibraryDirectories) + $(OutDir)$(TargetName)$(TargetExt) + + + + + MaxSpeed + true + WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) + MultiThreadedDLL + true + + + EnableAllWarnings + ProgramDatabase + $(ProjectDir)include\;$(ProjectDir)include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\public\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)platform\include\;$(SolutionDir)platform\include\prototypes;$(SolutionDir)TpmConfiguration + true + 4668;4710;4711;4820;5045 + + + + true + Console + true + true + tpm.lib;libcrypto.lib;platform.lib;Ws2_32.lib;Rpcrt4.lib + $(SolutionDir)\lib;$(OutDir);%(AdditionalLibraryDirectories) + + + false + + + + + MaxSpeed + true + WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) + MultiThreadedDLL + true + + + EnableAllWarnings + ProgramDatabase + $(ProjectDir)include\;$(ProjectDir)include\prototypes;$(SolutionDir)\tpm\include\;$(SolutionDir)\tpm\include\public\;$(SolutionDir)\tpm\include\platform_interface\;$(SolutionDir)platform\include\;$(SolutionDir)platform\include\prototypes;$(SolutionDir)TpmConfiguration + true + 4668;4710;4711;4820;5045 + + + + true + Console + true + true + tpm.lib;libcrypto.lib;platform.lib;Ws2_32.lib;Rpcrt4.lib + $(ProjectDir)\lib;$(OutDir);%(AdditionalLibraryDirectories) + + + false + + + + + + + + + + + + + \ No newline at end of file diff --git a/TPMCmd/Simulator/src/TPMCmdp.c b/TPMCmd/Simulator/src/TPMCmdp.c index 3bcc590f..2f7bf0bc 100644 --- a/TPMCmd/Simulator/src/TPMCmdp.c +++ b/TPMCmd/Simulator/src/TPMCmdp.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file contains the functions that process the commands received on the // control port or the command port of the simulator. The control port is used @@ -40,32 +6,7 @@ // of the testing. //** Includes and Data Definitions -#include -#include "TpmBuildSwitches.h" - -#ifdef _MSC_VER -# pragma warning(push, 3) -# include -# include -# pragma warning(pop) -#elif defined(__unix__) || defined(__APPLE__) -# include "BaseTypes.h" // on behalf of TpmFail_fp.h -typedef int SOCKET; -#else -# error "Unsupported platform." -#endif - -#include "Platform_fp.h" -#include "ExecCommand_fp.h" -#include "Manufacture_fp.h" -#include "_TPM_Init_fp.h" -#include "_TPM_Hash_Start_fp.h" -#include "_TPM_Hash_Data_fp.h" -#include "_TPM_Hash_End_fp.h" -#include "TpmFail_fp.h" - -#include "TpmTcpProtocol.h" -#include "Simulator_fp.h" +#include "simulatorPrivate.h" static bool s_isPowerOn = false; @@ -268,15 +209,35 @@ void _rpc__RsaKeyCacheControl(int state) return; } -#define TPM_RH_ACT_0 0x40000110 - //*** _rpc__ACT_GetSignaled() // This function is used to count the ACT second tick. bool _rpc__ACT_GetSignaled(uint32_t actHandle) { +#if ACT_SUPPORT // If TPM power is on... if(s_isPowerOn) // ... query the platform return _plat__ACT_GetSignaled(actHandle - TPM_RH_ACT_0); +#else // ACT_SUPPORT + NOT_REFERENCED(actHandle); +#endif // ACT_SUPPORT return false; } + +//*** _rpc__SetTpmFirmwareHash() +// This function is used to modify the firmware's hash during simulation. +void _rpc__SetTpmFirmwareHash(uint32_t hash) +{ +#if SIMULATION + _plat__SetTpmFirmwareHash(hash); +#endif +} + +//*** _rpc__SetTpmFirmwareSvn() +// This function is used to modify the firmware's SVN during simulation. +void _rpc__SetTpmFirmwareSvn(uint16_t svn) +{ +#if SIMULATION + _plat__SetTpmFirmwareSvn(svn); +#endif +} \ No newline at end of file diff --git a/TPMCmd/Simulator/src/TPMCmds.c b/TPMCmd/Simulator/src/TPMCmds.c index a2c6fb57..be51992c 100644 --- a/TPMCmd/Simulator/src/TPMCmds.c +++ b/TPMCmd/Simulator/src/TPMCmds.c @@ -1,70 +1,14 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file contains the entry point for the simulator. //** Includes, Defines, Data Definitions, and Function Prototypes -#include "TpmBuildSwitches.h" +#include "simulatorPrivate.h" +#include -#include -#include -#include -#include -#include -#include - -#ifdef _MSC_VER -# pragma warning(push, 3) -# include -# include -# pragma warning(pop) -#elif defined(__unix__) || defined(__APPLE__) -# define _strcmpi strcasecmp -typedef int SOCKET; -#else -# error "Unsupported platform." -#endif - -#include "TpmTcpProtocol.h" -#include "Manufacture_fp.h" -#include "Platform_fp.h" -#include "Simulator_fp.h" - -#define PURPOSE \ - "TPM 2.0 Reference Simulator.\n" \ - "Copyright (c) Microsoft Corporation. All rights reserved." +#define PURPOSE \ + "TPM 2.0 Reference Simulator.\n" \ + "Copyright (c) Microsoft Corporation; Trusted Computing Group. All rights " \ + "reserved." #define DEFAULT_TPM_PORT 2321 @@ -98,14 +42,18 @@ static void Usage(const char* programName) fprintf(stderr, "%s\n\n", PURPOSE); fprintf(stderr, "Usage: %s [PortNum] [opts]\n\n" - "Starts the TPM server listening on TCP port PortNum (by default %d).\n\n" + "Starts the TPM server listening on TCP port PortNum (by default " + "%d).\n\n" "An option can be in the short form (one letter preceded with '-' or " "'/')\n" "or in the full form (preceded with '--' or no option marker at all).\n" "Possible options are:\n" " -h (--help) or ? - print this message\n" " -m (--manufacture) - forces NV state of the TPM simulator to be " - "(re)manufactured\n", + "(re)manufactured\n" + " -p (--pick_ports) - choose the next available TCP ports " + "automatically " + "if PortNum is not available\n", programName, DEFAULT_TPM_PORT); exit(1); @@ -213,12 +161,27 @@ static void CmdLineParser_Done(const char* programName) Usage(programName); } +#if CRYPTO_LIB_REPORTING +void ReportCryptoLibs() +{ + _CRYPTO_IMPL_DESCRIPTION sym, hash, math = {0}; + _crypto_GetSymImpl(&sym); + _crypto_GetHashImpl(&hash); + _crypto_GetMathImpl(&math); + printf("Crypto implementation information:\n"); + printf(" Symmetric: %s (%s)\n", sym.name, sym.version); + printf(" Hashing: %s (%s)\n", hash.name, hash.version); + printf(" Math: %s (%s)\n", math.name, math.version); +} +#endif // CRYPTO_LIB_REPORTING + //*** main() // This is the main entry point for the simulator. // It registers the interface and starts listening for clients int main(int argc, char* argv[]) { bool manufacture = false; + bool pick_ports = false; int PortNum = DEFAULT_TPM_PORT; // Parse command line options @@ -234,6 +197,10 @@ int main(int argc, char* argv[]) { manufacture = true; } + if(CmdLineParser_IsOptPresent("pick_ports", "p")) + { + pick_ports = true; + } if(CmdLineParser_More()) { int i; @@ -257,37 +224,42 @@ int main(int argc, char* argv[]) } CmdLineParser_Done(argv[0]); } + +#if CRYPTO_LIB_REPORTING + ReportCryptoLibs(); +#endif // CRYPTO_LIB_REPORTING + printf("LIBRARY_COMPATIBILITY_CHECK is %s\n", (LIBRARY_COMPATIBILITY_CHECK ? "ON" : "OFF")); // Enable NV memory - _plat__NVEnable(NULL); + _plat__NVEnable(NULL, 0); if(manufacture || _plat__NVNeedsManufacture()) { printf("Manufacturing NV state...\n"); - if(TPM_Manufacture(1) != 0) + if(TPM_Manufacture(MANUF_FIRST_TIME) != MANUF_OK) { // if the manufacture didn't work, then make sure that the NV file doesn't // survive. This prevents manufacturing failures from being ignored the // next time the code is run. - _plat__NVDisable(1); + _plat__NVDisable((void*)TRUE, 0); exit(1); } // Coverage test - repeated manufacturing attempt - if(TPM_Manufacture(0) != 1) + if(TPM_Manufacture(MANUF_REMANUFACTURE) != MANUF_ALREADY_DONE) { exit(2); } // Coverage test - re-manufacturing TPM_TearDown(); - if(TPM_Manufacture(1) != 0) + if(TPM_Manufacture(MANUF_FIRST_TIME) != MANUF_OK) { exit(3); } } // Disable NV memory - _plat__NVDisable(0); + _plat__NVDisable((void*)FALSE, 0); - StartTcpServer(PortNum); + StartTcpServer(PortNum, pick_ports); return EXIT_SUCCESS; } diff --git a/TPMCmd/Simulator/src/TcpServer.c b/TPMCmd/Simulator/src/TcpServer.c index c90bf75b..34277ab2 100644 --- a/TPMCmd/Simulator/src/TcpServer.c +++ b/TPMCmd/Simulator/src/TcpServer.c @@ -1,79 +1,11 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // // This file contains the socket interface to a TPM simulator. // //** Includes, Locals, Defines and Function Prototypes -#include "TpmBuildSwitches.h" -#include -#include - -#ifdef _MSC_VER -# pragma warning(push, 3) -# include -# include -# pragma warning(pop) -typedef int socklen_t; -#elif defined(__unix__) || defined(__APPLE__) -# include -# include -# include -# include -# include -# include -# include -# define ZeroMemory(ptr, sz) (memset((ptr), 0, (sz))) -# define closesocket(x) close(x) -# define INVALID_SOCKET (-1) -# define SOCKET_ERROR (-1) -# define WSAGetLastError() (errno) -# define INT_PTR intptr_t - -typedef int SOCKET; -#else -# error "Unsupported platform." -#endif - -#include "TpmTcpProtocol.h" -#include "Manufacture_fp.h" -#include "TpmProfile.h" - -#include "Simulator_fp.h" -#include "Platform_fp.h" +#include "simulatorPrivate.h" +#include // To access key cache control in TPM void RsaKeyCacheControl(int state); @@ -100,7 +32,10 @@ struct //*** CreateSocket() // This function creates a socket listening on 'PortNumber'. -static int CreateSocket(int PortNumber, SOCKET* listenSocket) +// If PickPorts is true, the server finds the next available port if the specified +// port was unavailable. +static int CreateSocket( + int PortNumber, bool PickPorts, SOCKET* ListenSocket, int* ActualPort) { struct sockaddr_in MyAddress; int res; @@ -116,8 +51,8 @@ static int CreateSocket(int PortNumber, SOCKET* listenSocket) } #endif // create listening socket - *listenSocket = socket(PF_INET, SOCK_STREAM, 0); - if(INVALID_SOCKET == *listenSocket) + *ListenSocket = socket(PF_INET, SOCK_STREAM, 0); + if(INVALID_SOCKET == *ListenSocket) { printf("Cannot create server listen socket. Error is 0x%x\n", WSAGetLastError()); @@ -125,22 +60,39 @@ static int CreateSocket(int PortNumber, SOCKET* listenSocket) } // bind the listening socket to the specified port ZeroMemory(&MyAddress, sizeof(MyAddress)); - MyAddress.sin_port = htons((short)PortNumber); + MyAddress.sin_port = htons((unsigned short)PortNumber); MyAddress.sin_family = AF_INET; - res = bind(*listenSocket, (struct sockaddr*)&MyAddress, sizeof(MyAddress)); + res = bind(*ListenSocket, (struct sockaddr*)&MyAddress, sizeof(MyAddress)); + if(PickPorts) + { + while(res == SOCKET_ERROR && MyAddress.sin_port < UINT16_MAX) + { + // keep trying as long as the underlying error is that the port is already in use + if(WSAGetLastError() != WSAEADDRINUSE) + { + break; + } + MyAddress.sin_port++; + res = + bind(*ListenSocket, (struct sockaddr*)&MyAddress, sizeof(MyAddress)); + } + } if(res == SOCKET_ERROR) { printf("Bind error. Error is 0x%x\n", WSAGetLastError()); return -1; } + // listen/wait for server connections - res = listen(*listenSocket, 3); + res = listen(*ListenSocket, 3); if(res == SOCKET_ERROR) { printf("Listen error. Error is 0x%x\n", WSAGetLastError()); return -1; } + + *ActualPort = ntohs(MyAddress.sin_port); return 0; } @@ -222,6 +174,20 @@ bool PlatformServer(SOCKET s) WriteUINT32(s, _rpc__ACT_GetSignaled(actHandle)); break; } + case TPM_SET_FW_HASH: + { + uint32_t hash; + OK = ReadUINT32(s, &hash); + _rpc__SetTpmFirmwareHash(hash); + break; + } + case TPM_SET_FW_SVN: + { + uint32_t svn; + OK = ReadUINT32(s, &svn); + _rpc__SetTpmFirmwareSvn((uint16_t)svn); + break; + } default: printf("Unrecognized platform interface command %d\n", (int)Command); WriteUINT32(s, 1); @@ -231,24 +197,68 @@ bool PlatformServer(SOCKET s) } } +//*** WritePortToFile() +// This function writes the given port out to a file. +bool WritePortToFile(const char* filename, int port) +{ + FILE* f; + +#ifdef _MSC_VER +# pragma warning(push) +# pragma warning(disable : 4996) +#endif // _MSC_VER + f = fopen(filename, "w"); +#ifdef _MSC_VER +# pragma warning(pop) +#endif // _MSC_VER + if(f == NULL) + { + return false; + } + + fprintf(f, "%d\n", port); + return fclose(f) == 0; +} + +//*** DeletePortFile() +// This function deletes the port file. +bool DeletePortFile(const char* filename) +{ + return remove(filename) == 0; +} + +struct platformParameters +{ + int port; + bool pickPorts; +}; + //*** PlatformSvcRoutine() // This function is called to set up the socket interfaces to listen for // commands. -DWORD WINAPI PlatformSvcRoutine(LPVOID port) +DWORD WINAPI PlatformSvcRoutine(LPVOID parms) { - int PortNumber = (int)(INT_PTR)port; - SOCKET listenSocket, serverSocket; - struct sockaddr_in HerAddress; - int res; - socklen_t length; - bool continueServing; - // - res = CreateSocket(PortNumber, &listenSocket); + struct platformParameters* platformParms = (struct platformParameters*)parms; + int PortNumber = platformParms->port; + bool PickPorts = platformParms->pickPorts; + SOCKET listenSocket, serverSocket; + struct sockaddr_in HerAddress; + int res; + socklen_t length; + bool continueServing; + const char* portFile = "platform.port"; + + res = CreateSocket(PortNumber, PickPorts, &listenSocket, &PortNumber); if(res != 0) { - printf("Create platform service socket fail\n"); + printf("Could not create platform service socket\n"); return res; } + if(!WritePortToFile(portFile, PortNumber)) + { + printf("Could not write port to %s\n", portFile); + return (DWORD)-1; + } // Loop accepting connections one-by-one until we are killed or asked to stop // Note the platform service is single-threaded so we don't listen for a new // connection until the prior connection drops. @@ -271,7 +281,12 @@ DWORD WINAPI PlatformSvcRoutine(LPVOID port) continueServing = PlatformServer(serverSocket); closesocket(serverSocket); } while(continueServing); - + if(!DeletePortFile(portFile)) + { + printf("Could not delete %s", portFile); + return (DWORD)-1; + } + free(parms); return 0; } @@ -279,36 +294,39 @@ DWORD WINAPI PlatformSvcRoutine(LPVOID port) // This function starts a new thread waiting for platform signals. // Platform signals are processed one at a time in the order in which they are // received. -int PlatformSignalService(int PortNumber) +// If PickPorts is true, the server finds the next available port if the specified +// port was unavailable. +int PlatformSignalService(int PortNumber, bool PickPorts) { + struct platformParameters* parms; + + parms = (struct platformParameters*)malloc(sizeof(struct platformParameters)); + parms->port = PortNumber; + parms->pickPorts = PickPorts; #if defined(_MSC_VER) HANDLE hPlatformSvc; int ThreadId; - int port = PortNumber; - // - // Create service thread for platform signals + hPlatformSvc = CreateThread(NULL, 0, (LPTHREAD_START_ROUTINE)PlatformSvcRoutine, - (LPVOID)(INT_PTR)port, + (LPVOID)parms, 0, (LPDWORD)&ThreadId); if(hPlatformSvc == NULL) { - printf("Thread Creation failed\n"); + printf("Could not create platform thread\n"); return -1; } return 0; #else pthread_t thread_id; int ret; - int port = PortNumber; - ret = pthread_create( - &thread_id, NULL, (void*)PlatformSvcRoutine, (LPVOID)(INT_PTR)port); + ret = pthread_create(&thread_id, NULL, (void*)PlatformSvcRoutine, (LPVOID)parms); if(ret == -1) { - printf("pthread_create failed: %s", strerror(ret)); + printf("Could not create platform thread: %s\n", strerror(ret)); } return ret; #endif // _MSC_VER @@ -316,7 +334,9 @@ int PlatformSignalService(int PortNumber) //*** RegularCommandService() // This function services regular commands. -int RegularCommandService(int PortNumber) +// If PickPorts is true, the server finds the next available port if the specified +// port was unavailable. +int RegularCommandService(int PortNumber, bool PickPorts) { SOCKET listenSocket; SOCKET serverSocket; @@ -324,13 +344,19 @@ int RegularCommandService(int PortNumber) int res; socklen_t length; bool continueServing; - // - res = CreateSocket(PortNumber, &listenSocket); + const char* portFile = "command.port"; + + res = CreateSocket(PortNumber, PickPorts, &listenSocket, &PortNumber); if(res != 0) { - printf("Create platform service socket fail\n"); + printf("Could not create command service socket\n"); return res; } + if(!WritePortToFile(portFile, PortNumber)) + { + printf("Could not write port to %s\n", portFile); + return -1; + } // Loop accepting connections one-by-one until we are killed or asked to stop // Note the TPM command service is single-threaded so we don't listen for // a new connection until the prior connection drops. @@ -353,6 +379,12 @@ int RegularCommandService(int PortNumber) continueServing = TpmServer(serverSocket); closesocket(serverSocket); } while(continueServing); + + if(!DeletePortFile(portFile)) + { + printf("Could not delete %s", portFile); + return -1; + } return 0; } @@ -423,7 +455,7 @@ static int ActTimeService(void) hThr = CreateThread(NULL, 0, (LPTHREAD_START_ROUTINE)SimulatorTimeServiceRoutine, - (LPVOID)(INT_PTR)NULL, + (LPVOID)NULL, 0, (LPDWORD)&ThreadId); if(hThr != NULL) @@ -433,10 +465,8 @@ static int ActTimeService(void) # else pthread_t thread_id; // - ret = pthread_create(&thread_id, - NULL, - (void*)SimulatorTimeServiceRoutine, - (LPVOID)(INT_PTR)NULL); + ret = pthread_create( + &thread_id, NULL, (void*)SimulatorTimeServiceRoutine, (LPVOID)NULL); # endif // _MSC_VER if(ret != 0) @@ -450,15 +480,20 @@ static int ActTimeService(void) #endif // RH_ACT_0 //*** StartTcpServer() -// This is the main entry-point to the TCP server. The server listens on port +// This is the main entry-point to the TCP server. The server listens on the port // specified. +// If PickPorts is true, the server finds the next available port if the specified +// port was unavailable. // // Note that there is no way to specify the network interface in this implementation. -int StartTcpServer(int PortNumber) +int StartTcpServer(int PortNumber, bool PickPorts) { int res; -// -#ifdef RH_ACT_0 + +#if ACT_SUPPORT +# if !RH_ACT_0 +# error "Compliance tests currently require ACT_0 if ACT_SUPPORT" +# endif // Start the Time Service routine res = ActTimeService(); if(res != 0) @@ -466,17 +501,17 @@ int StartTcpServer(int PortNumber) printf("TimeService failed\n"); return res; } -#endif +#endif // ACT_SUPPORT // Start Platform Signal Processing Service - res = PlatformSignalService(PortNumber + 1); + res = PlatformSignalService(PortNumber + 1, PickPorts); if(res != 0) { printf("PlatformSignalService failed\n"); return res; } // Start Regular/DRTM TPM command service - res = RegularCommandService(PortNumber); + res = RegularCommandService(PortNumber, PickPorts); if(res != 0) { printf("RegularCommandService failed\n"); @@ -562,10 +597,10 @@ bool ReadUINT32(SOCKET s, uint32_t* val) //*** ReadVarBytes() // Get a uint32-length-prepended binary array. Note that the 4-byte length is // in network byte order (big-endian). -bool ReadVarBytes(SOCKET s, char* buffer, uint32_t* BytesReceived, uint32_t MaxLen) +bool ReadVarBytes(SOCKET s, char* buffer, uint32_t* BytesReceived, int MaxLen) { - uint32_t length; - bool res; + int length; + bool res; // res = ReadBytes(s, (char*)&length, 4); if(!res) @@ -574,7 +609,7 @@ bool ReadVarBytes(SOCKET s, char* buffer, uint32_t* BytesReceived, uint32_t MaxL *BytesReceived = length; if(length > MaxLen) { - printf("Buffer too big. Client says %u\n", length); + printf("Buffer too big. Client says %d\n", length); return false; } if(length == 0) diff --git a/TPMCmd/Simulator/src/simulatorPrivate.h b/TPMCmd/Simulator/src/simulatorPrivate.h new file mode 100644 index 00000000..6787415e --- /dev/null +++ b/TPMCmd/Simulator/src/simulatorPrivate.h @@ -0,0 +1,21 @@ + +// common headers for simulator implementation files + +#ifndef SIMULATOR_PRIVATE_H +#define SIMULATOR_PRIVATE_H + +//** Includes, Locals, Defines and Function Prototypes +#include + +#include "simulator_sysheaders.h" + +// TODO_RENAME_INC_FOLDER:prototypes refers to the platform library +#include +// TODO_RENAME_INC_FOLDER:platform_interface refers to the TPM_CoreLib platform interface +#include +#include + +#include "TpmTcpProtocol.h" +#include "Simulator_fp.h" + +#endif // SIMULATOR_PRIVATE_H diff --git a/TPMCmd/Simulator/src/simulator_sysheaders.h b/TPMCmd/Simulator/src/simulator_sysheaders.h new file mode 100644 index 00000000..11ca1033 --- /dev/null +++ b/TPMCmd/Simulator/src/simulator_sysheaders.h @@ -0,0 +1,45 @@ +// system headers for the simulator, both Windows and Linux + +#ifndef _SIMULATOR_SYSHEADERS_H_ +#define _SIMULATOR_SYSHEADERS_H_ +// include the system headers silencing warnings that occur with /Wall +#include +#include +#include +#include +#include +#include + +#ifdef _MSC_VER +# pragma warning(push, 3) +// C4668 is supposed to be level 4, but this is still necessary to suppress the +// error. We don't want to suppress it globally because the same error can +// happen in the TPM code and it shouldn't be ignored in those cases because it +// generally means a configuration header is missing. +// +// X is not defined as a preprocessor macro, assuming 0 for #if +# pragma warning(disable : 4668) +# include +# include +# pragma warning(pop) +typedef int socklen_t; +#elif defined(__unix__) || defined(__APPLE__) +# include +# include +# include +# include +# include +// simulate certain windows APIs +# define ZeroMemory(ptr, sz) (memset((ptr), 0, (sz))) +# define closesocket(x) close(x) +# define INVALID_SOCKET (-1) +# define SOCKET_ERROR (-1) +# define WSAGetLastError() (errno) +# define WSAEADDRINUSE EADDRINUSE +# define INT_PTR intptr_t +typedef int SOCKET; +# define _strcmpi strcasecmp +#else +# error "Unsupported platform." +#endif // _MSC_VER +#endif // _SIMULATOR_SYSHEADERS_H_ diff --git a/TPMCmd/TpmConfiguration/CMakeLists.txt b/TPMCmd/TpmConfiguration/CMakeLists.txt new file mode 100644 index 00000000..fc537480 --- /dev/null +++ b/TPMCmd/TpmConfiguration/CMakeLists.txt @@ -0,0 +1,50 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +########################################################## +# DO NOT MODIFY - TPM Configuration Library +########################################################## +# The contents of the source files may be modified to specify any valid +# desired configuraton. However, the CMake library name "TpmConfiguration" +# is required by the CoreLib to reference this project. Recommend making +# no changes in this file. +cmake_minimum_required(VERSION 3.16.3) + +# set the project name and version +# Must be TpmConfiguration +project(TpmConfiguration VERSION 1.0) +print_project_info() + +# use standard output directories. Expected by package_utilities +include(GNUInstallDirs) + +add_library(TpmConfiguration INTERFACE) +add_library(TpmConfiguration::TpmConfiguration ALIAS TpmConfiguration) + +target_include_directories(${PROJECT_NAME} + INTERFACE + "$" + "$" +) + +# create install and export information for downstream projects to use +install_and_export_config_targets(${PROJECT_NAME}) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## + +install(FILES + ${CMAKE_CURRENT_SOURCE_DIR}/TpmConfiguration/TpmBuildSwitches.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmConfiguration/TpmProfile.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmConfiguration/TpmProfile_CommandList.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmConfiguration/TpmProfile_Common.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmConfiguration/TpmProfile_ErrorCodes.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmConfiguration/TpmProfile_Misc.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmConfiguration/VendorInfo.h + DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/TpmConfiguration) + +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(${PROJECT_NAME}) diff --git a/TPMCmd/TpmConfiguration/TpmConfiguration/TpmBuildSwitches.h b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmBuildSwitches.h new file mode 100644 index 00000000..b2db9745 --- /dev/null +++ b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmBuildSwitches.h @@ -0,0 +1,212 @@ + +// This file contains the build switches. This contains switches for multiple +// versions of the crypto-library so some may not apply to your environment. +// Each switch has an accompanying description below. +// +// clang-format off +#ifndef _TPM_BUILD_SWITCHES_H_ +#define _TPM_BUILD_SWITCHES_H_ + +#if defined(YES) || defined(NO) +# error YES and NO should be defined in TpmBuildSwitches.h +#endif +#if defined(SET) || defined(CLEAR) +# error SET and CLEAR should be defined in TpmBuildSwitches.h +#endif + +#define YES 1 +#define SET 1 +#define NO 0 +#define CLEAR 0 + +// TRUE/FALSE may be coming from system headers, but if not, provide them. +#ifndef TRUE +# define TRUE 1 +#endif +#ifndef FALSE +# define FALSE 0 +#endif + +// Need an unambiguous definition for DEBUG. Do not change this +#ifndef DEBUG +# ifdef NDEBUG +# define DEBUG NO +# else +# define DEBUG YES +# endif +#elif(DEBUG != NO) && (DEBUG != YES) +# error DEBUG should be 0 or 1 +#endif + +//////////////////////////////////////////////////////////////// +// DEBUG OPTIONS +//////////////////////////////////////////////////////////////// + +// The SIMULATION switch allows certain other macros to be enabled. The things that +// can be enabled in a simulation include key caching, reproducible "random" +// sequences, instrumentation of the RSA key generation process, and certain other +// debug code. SIMULATION Needs to be defined as either YES or NO. This grouping of +// macros will make sure that it is set correctly. A simulated TPM would include a +// Virtual TPM. The interfaces for a Virtual TPM should be modified from the standard +// ones in the Simulator project. +#define SIMULATION YES + + +// The CRYPTO_LIB_REPORTING switch allows the TPM to report its +// crypto library implementation, e.g., at simulation startup. +#define CRYPTO_LIB_REPORTING YES + +// If doing debug, can set the DRBG to print out the intermediate test values. +// Before enabling this, make sure that the dbgDumpMemBlock() function +// has been added someplace (preferably, somewhere in CryptRand.c) +#define DRBG_DEBUG_PRINT (NO * DEBUG) + +// This define is used to control the debug for the CertifyX509 command. +#define CERTIFYX509_DEBUG (YES * DEBUG) + +// This provides fixed seeding of the RNG when doing debug on a simulator. This +// should allow consistent results on test runs as long as the input parameters +// to the functions remains the same. +#define USE_DEBUG_RNG (NO * DEBUG) + +//////////////////////////////////////////////////////////////// +// RSA DEBUG OPTIONS +//////////////////////////////////////////////////////////////// + +// Enable the instrumentation of the sieve process. This is used to tune the sieve +// variables. +#define RSA_INSTRUMENT (NO * DEBUG) + +// Enables use of the key cache. Default is YES +#define USE_RSA_KEY_CACHE (NO * DEBUG) + +// Enables use of a file to store the key cache values so that the TPM will start +// faster during debug. Default for this is YES +#define USE_KEY_CACHE_FILE (NO * DEBUG) + +//////////////////////////////////////////////////////////////// +// TEST OPTIONS +//////////////////////////////////////////////////////////////// +// The SIMULATION flag can enable test crypto behaviors and caching that +// significantly change the behavior of the code. This flag controls only the +// g_forceFailureMode flag in the TPM library while leaving the rest of the TPM +// behavior alone. Useful for testing when the full set of options controlled by +// SIMULATION may not be desired. +#define ALLOW_FORCE_FAILURE_MODE YES + +//////////////////////////////////////////////////////////////// +// Internal checks +//////////////////////////////////////////////////////////////// + +// Define this to run the function that checks the compatibility between the +// chosen big number math library and the TPM code. Not all ports use this. +#define LIBRARY_COMPATIBILITY_CHECK YES + +// In some cases, the relationship between two values may be dependent on things that +// change based on various selections like the chosen cryptographic libraries. It is +// possible that these selections will result in incompatible settings. These are often +// detectable by the compiler but it is not always possible to do the check in the +// preprocessor code. For example, when the check requires use of 'sizeof'() then the +// preprocessor can't do the comparison. For these cases, we include a special macro +// that, depending on the compiler will generate a warning to indicate if the check +// always passes or always fails because it involves fixed constants. +// +// In modern compilers this is now commonly known as a static_assert, but the precise +// implementation varies by compiler. CompilerDependencies.h defines MUST_BE as a macro +// that abstracts out the differences, and COMPILER_CHECKS can remove the checks where +// the current compiler doesn't support it. COMPILER_CHECKS should be enabled if the +// compiler supports some form of static_assert. +// See the CompilerDependencies_*.h files for specific implementations per compiler. +#define COMPILER_CHECKS YES + +// Some of the values (such as sizes) are the result of different options set in +// TpmProfile.h. The combination might not be consistent. A function is defined +// (TpmSizeChecks()) that is used to verify the sizes at run time. To enable the +// function, define this parameter. +#define RUNTIME_SIZE_CHECKS YES + +//////////////////////////////////////////////////////////////// +// Compliance options +//////////////////////////////////////////////////////////////// + +// Enable extra behaviors to meet FIPS compliance requirements +#define FIPS_COMPLIANT YES + +// Indicates if the implementation is to compute the sizes of the proof and primary +// seed size values based on the implemented algorithms. +#define USE_SPEC_COMPLIANT_PROOFS YES + +// Set this to allow compile to continue even though the chosen proof values +// do not match the compliant values. This is written so that someone would +// have to proactively ignore errors. +#define SKIP_PROOF_ERRORS NO + +//////////////////////////////////////////////////////////////// +// Implementation alternatives - don't change external behavior +//////////////////////////////////////////////////////////////// + +// Define TABLE_DRIVEN_DISPATCH to use tables rather than case statements +// for command dispatch and handle unmarshaling +#define TABLE_DRIVEN_DISPATCH YES + +// This define is used to enable the new table-driven marshaling code. +#define TABLE_DRIVEN_MARSHAL NO + +// This switch allows use of #defines in place of pass-through marshaling or +// unmarshaling code. A pass-through function just calls another function to do +// the required function and does no parameter checking of its own. The +// table-driven dispatcher calls directly to the lowest level +// marshaling/unmarshaling code and by-passes any pass-through functions. +#define USE_MARSHALING_DEFINES YES + +// Switch added to support packed lists that leave out space associated with +// unimplemented commands. Comment this out to use linear lists. +// Note: if vendor specific commands are present, the associated list is always +// in compressed form. +#define COMPRESSED_LISTS YES + +// This define is used to eliminate the use of bit-fields. It can be enabled for big- +// or little-endian machines. For big-endian architectures that numbers bits in +// registers from left to right (MSb0) this must be enabled. Little-endian machines +// number from right to left with the least significant bit having assigned a bit +// number of 0. These are LSb0 machines (they are also little-endian so they are also +// least-significant byte 0 (LSB0) machines. Big-endian (MSB0) machines may number in +// either direction (MSb0 or LSb0). For an MSB0+MSb0 machine this value is required to +// be 'NO' +#define USE_BIT_FIELD_STRUCTURES NO + +// Enable the generation of RSA primes using a sieve. +#define RSA_KEY_SIEVE YES + +//////////////////////////////////////////////////////////////// +// Implementation alternatives - changes external behavior +//////////////////////////////////////////////////////////////// + +// This switch enables the RNG state save and restore +#define _DRBG_STATE_SAVE YES + +// Definition to allow alternate behavior for non-orderly startup. If there is a +// chance that the TPM could not update 'failedTries' +#define USE_DA_USED YES + +// This switch is used to enable the self-test capability in AlgorithmTests.c +#define ENABLE_SELF_TESTS YES + +// This switch indicates where clock epoch value should be stored. If this value +// defined, then it is assumed that the timer will change at any time so the +// nonce should be a random number kept in RAM. When it is not defined, then the +// timer only stops during power outages. +#define CLOCK_STOPS NO + +// Indicate if the implementation is going to give lockout time credit for time up to +// the last orderly shutdown. +#define ACCUMULATE_SELF_HEAL_TIMER YES + +// If an assertion event is not going to produce any trace information (function and +// line number) then make FAIL_TRACE == NO +#define FAIL_TRACE YES + +// TODO_RENAME_INC_FOLDER: public refers to the TPM_CoreLib public headers +#include + +#endif // _TPM_BUILD_SWITCHES_H_ \ No newline at end of file diff --git a/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile.h b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile.h new file mode 100644 index 00000000..6cffcddb --- /dev/null +++ b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile.h @@ -0,0 +1,13 @@ +// The primary configuration file that collects all configuration options for a +// TPM build. +#ifndef _TPM_PROFILE_H_ +#define _TPM_PROFILE_H_ + +#include +#include +#include +#include +#include +#include + +#endif // _TPM_PROFILE_H_ diff --git a/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_CommandList.h b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_CommandList.h new file mode 100644 index 00000000..3d6eb16a --- /dev/null +++ b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_CommandList.h @@ -0,0 +1,165 @@ + +// this file defines the desired command list that should be built into the +// Tpm Core Lib. + +#ifndef _TPM_PROFILE_COMMAND_LIST_H_ +#define _TPM_PROFILE_COMMAND_LIST_H_ + +#if(YES != 1 || NO != 0) +# error YES and NO must be correctly set before including TpmProfile_CommandList.h +#endif +#if defined(CC_YES) || defined(CC_NO) +# error CC_YES and CC_NO should be defined by the command line file, not before +#endif + +#define CC_YES YES +#define CC_NO NO + +// +// Defines for Implemented Commands +// + +// Commands that are defined in the spec, but not implemented for various +// reasons: + +// The TPM reference implementation does not implement attached-component +// features, and the Compliance test suite has no test cases. +#define CC_AC_GetCapability CC_NO +#define CC_AC_Send CC_NO + +// The TPM reference implementation does not implement firmware upgrade. +#define CC_FieldUpgradeData CC_NO +#define CC_FieldUpgradeStart CC_NO +#define CC_FirmwareRead CC_NO + +// A prototype of CertifyX509 is provided here for informative purposes only. +// While all of the TPM reference implementation is provided "AS IS" without any +// warranty, the current design and implementation of CertifyX509 are considered +// to be especially unsuitable for product use. +#define CC_CertifyX509 CC_NO + +// Normal commands: + +#define CC_ACT_SetTimeout (CC_YES && ACT_SUPPORT) +#define CC_ActivateCredential CC_YES +#define CC_Certify CC_YES +#define CC_CertifyCreation CC_YES +#define CC_ChangeEPS CC_YES +#define CC_ChangePPS CC_YES +#define CC_Clear CC_YES +#define CC_ClearControl CC_YES +#define CC_ClockRateAdjust CC_YES +#define CC_ClockSet CC_YES +#define CC_Commit (CC_YES && ALG_ECC) +#define CC_ContextLoad CC_YES +#define CC_ContextSave CC_YES +#define CC_Create CC_YES +#define CC_CreateLoaded CC_YES +#define CC_CreatePrimary CC_YES +#define CC_DictionaryAttackLockReset CC_YES +#define CC_DictionaryAttackParameters CC_YES +#define CC_Duplicate CC_YES +#define CC_ECC_Decrypt (CC_YES && ALG_ECC) +#define CC_ECC_Encrypt (CC_YES && ALG_ECC) +#define CC_ECC_Parameters (CC_YES && ALG_ECC) +#define CC_ECDH_KeyGen (CC_YES && ALG_ECC) +#define CC_ECDH_ZGen (CC_YES && ALG_ECC) +#define CC_EC_Ephemeral (CC_YES && ALG_ECC) +#define CC_EncryptDecrypt CC_YES +#define CC_EncryptDecrypt2 CC_YES +#define CC_EventSequenceComplete CC_YES +#define CC_EvictControl CC_YES +#define CC_FlushContext CC_YES +#define CC_GetCapability CC_YES +#define CC_GetCommandAuditDigest CC_YES +#define CC_GetRandom CC_YES +#define CC_GetSessionAuditDigest CC_YES +#define CC_GetTestResult CC_YES +#define CC_GetTime CC_YES +#define CC_HMAC (CC_YES && !ALG_CMAC) +#define CC_HMAC_Start (CC_YES && !ALG_CMAC) +#define CC_Hash CC_YES +#define CC_HashSequenceStart CC_YES +#define CC_HierarchyChangeAuth CC_YES +#define CC_HierarchyControl CC_YES +#define CC_Import CC_YES +#define CC_IncrementalSelfTest CC_YES +#define CC_Load CC_YES +#define CC_LoadExternal CC_YES +#define CC_MAC (CC_YES && ALG_CMAC) +#define CC_MAC_Start (CC_YES && ALG_CMAC) +#define CC_MakeCredential CC_YES +#define CC_NV_Certify CC_YES +#define CC_NV_ChangeAuth CC_YES +#define CC_NV_DefineSpace CC_YES +#define CC_NV_Extend CC_YES +#define CC_NV_GlobalWriteLock CC_YES +#define CC_NV_Increment CC_YES +#define CC_NV_Read CC_YES +#define CC_NV_ReadLock CC_YES +#define CC_NV_ReadPublic CC_YES +#define CC_NV_SetBits CC_YES +#define CC_NV_UndefineSpace CC_YES +#define CC_NV_UndefineSpaceSpecial CC_YES +#define CC_NV_Write CC_YES +#define CC_NV_WriteLock CC_YES +#define CC_ObjectChangeAuth CC_YES +#define CC_PCR_Allocate CC_YES +#define CC_PCR_Event CC_YES +#define CC_PCR_Extend CC_YES +#define CC_PCR_Read CC_YES +#define CC_PCR_Reset CC_YES +#define CC_PCR_SetAuthPolicy CC_YES +#define CC_PCR_SetAuthValue CC_YES +#define CC_PP_Commands CC_YES +#define CC_PolicyAuthValue CC_YES +#define CC_PolicyAuthorize CC_YES +#define CC_PolicyAuthorizeNV CC_YES +#define CC_PolicyCapability CC_YES +#define CC_PolicyCommandCode CC_YES +#define CC_PolicyCounterTimer CC_YES +#define CC_PolicyCpHash CC_YES +#define CC_PolicyDuplicationSelect CC_YES +#define CC_PolicyGetDigest CC_YES +#define CC_PolicyLocality CC_YES +#define CC_PolicyNV CC_YES +#define CC_PolicyNameHash CC_YES +#define CC_PolicyNvWritten CC_YES +#define CC_PolicyOR CC_YES +#define CC_PolicyPCR CC_YES +#define CC_PolicyPassword CC_YES +#define CC_PolicyParameters CC_YES +#define CC_PolicyPhysicalPresence CC_YES +#define CC_PolicyRestart CC_YES +#define CC_PolicySecret CC_YES +#define CC_PolicySigned CC_YES +#define CC_PolicyTemplate CC_YES +#define CC_PolicyTicket CC_YES +#define CC_Policy_AC_SendSelect CC_YES +#define CC_Quote CC_YES +#define CC_RSA_Decrypt (CC_YES && ALG_RSA) +#define CC_RSA_Encrypt (CC_YES && ALG_RSA) +#define CC_ReadClock CC_YES +#define CC_ReadPublic CC_YES +#define CC_Rewrap CC_YES +#define CC_SelfTest CC_YES +#define CC_SequenceComplete CC_YES +#define CC_SequenceUpdate CC_YES +#define CC_SetAlgorithmSet CC_YES +#define CC_SetCommandCodeAuditStatus CC_YES +#define CC_SetPrimaryPolicy CC_YES +#define CC_Shutdown CC_YES +#define CC_Sign CC_YES +#define CC_StartAuthSession CC_YES +#define CC_Startup CC_YES +#define CC_StirRandom CC_YES +#define CC_TestParms CC_YES +#define CC_Unseal CC_YES +#define CC_Vendor_TCG_Test CC_YES +#define CC_VerifySignature CC_YES +#define CC_ZGen_2Phase (CC_YES && ALG_ECC) +#define CC_NV_DefineSpace2 CC_YES +#define CC_NV_ReadPublic2 CC_YES +#define CC_SetCapability CC_NO + +#endif // _TPM_PROFILE_COMMAND_LIST_H_ diff --git a/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_Common.h b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_Common.h new file mode 100644 index 00000000..a8dc1290 --- /dev/null +++ b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_Common.h @@ -0,0 +1,226 @@ + +// clang-format off +// clang-format off to preserve define alignment breaking sections. + +// this file defines the common optional selections for the TPM library build +// Requires basic YES/NO defines are already set (by TpmBuildSwitches.h) +// Less frequently changed items are in other TpmProfile Headers. + +#ifndef _TPM_PROFILE_COMMON_H_ +#define _TPM_PROFILE_COMMON_H_ +// YES & NO defined by TpmBuildSwitches.h +#if (YES != 1 || NO != 0) +# error YES or NO incorrectly set +#endif +#if defined(ALG_YES) || defined(ALG_NO) +# error ALG_YES and ALG_NO should only be defined by the TpmProfile_Common.h file +#endif + +// Change these definitions to turn all algorithms ON or OFF. That is, to turn +// all algorithms on, set ALG_NO to YES. This is intended as a debug feature. +#define ALG_YES YES +#define ALG_NO NO + +// Defines according to the processor being built for. +// Are building for a BIG_ENDIAN processor? +#define BIG_ENDIAN_TPM NO +#define LITTLE_ENDIAN_TPM !BIG_ENDIAN_TPM +// Does the processor put the most-significant bit at bit position 0? +#define MOST_SIGNIFICANT_BIT_0 NO +#define LEAST_SIGNIFICANT_BIT_0 !MOST_SIGNIFICANT_BIT_0 +// Does processor support Auto align? +#define AUTO_ALIGN NO + +//*********************************************** +// Defines for Symmetric Algorithms +//*********************************************** + +#define ALG_AES ALG_YES + +#define AES_128 (YES * ALG_AES) +#define AES_192 (NO * ALG_AES) +#define AES_256 (YES * ALG_AES) + +#define ALG_SM4 ALG_NO + +#define SM4_128 (NO * ALG_SM4) + +#define ALG_CAMELLIA ALG_YES + +#define CAMELLIA_128 (YES * ALG_CAMELLIA) +#define CAMELLIA_192 (NO * ALG_CAMELLIA) +#define CAMELLIA_256 (YES * ALG_CAMELLIA) + +// must be yes if any above are yes. +#define ALG_SYMCIPHER (ALG_AES || ALG_SM4 || ALG_CAMELLIA) +#define ALG_CMAC (YES * ALG_SYMCIPHER) + +// block cipher modes +#define ALG_CTR ALG_YES +#define ALG_OFB ALG_YES +#define ALG_CBC ALG_YES +#define ALG_CFB ALG_YES +#define ALG_ECB ALG_YES + +//*********************************************** +// Defines for RSA Asymmetric Algorithms +//*********************************************** +#define ALG_RSA ALG_YES +#define RSA_1024 (YES * ALG_RSA) +#define RSA_2048 (YES * ALG_RSA) +#define RSA_3072 (YES * ALG_RSA) +#define RSA_4096 (YES * ALG_RSA) +#define RSA_16384 (NO * ALG_RSA) + +#define ALG_RSASSA (YES * ALG_RSA) +#define ALG_RSAES (YES * ALG_RSA) +#define ALG_RSAPSS (YES * ALG_RSA) +#define ALG_OAEP (YES * ALG_RSA) + +// RSA Implementation Styles +// use Chinese Remainder Theorem (5 prime) format for private key ? +#define CRT_FORMAT_RSA YES +#define RSA_DEFAULT_PUBLIC_EXPONENT 0x00010001 + +//*********************************************** +// Defines for ECC Asymmetric Algorithms +//*********************************************** +#define ALG_ECC ALG_YES +#define ALG_ECDH (YES * ALG_ECC) +#define ALG_ECDSA (YES * ALG_ECC) +#define ALG_ECDAA (YES * ALG_ECC) +#define ALG_SM2 (YES * ALG_ECC) +#define ALG_ECSCHNORR (YES * ALG_ECC) +#define ALG_ECMQV (YES * ALG_ECC) +#define ALG_KDF1_SP800_56A (YES * ALG_ECC) +#define ALG_EDDSA (NO * ALG_ECC) +#define ALG_EDDSA_PH (NO * ALG_ECC) + +#define ECC_NIST_P192 (YES * ALG_ECC) +#define ECC_NIST_P224 (YES * ALG_ECC) +#define ECC_NIST_P256 (YES * ALG_ECC) +#define ECC_NIST_P384 (YES * ALG_ECC) +#define ECC_NIST_P521 (YES * ALG_ECC) +#define ECC_BN_P256 (YES * ALG_ECC) +#define ECC_BN_P638 (YES * ALG_ECC) +#define ECC_SM2_P256 (YES * ALG_ECC) + +#define ECC_BP_P256_R1 (NO * ALG_ECC) +#define ECC_BP_P384_R1 (NO * ALG_ECC) +#define ECC_BP_P512_R1 (NO * ALG_ECC) +#define ECC_CURVE_25519 (NO * ALG_ECC) +#define ECC_CURVE_448 (NO * ALG_ECC) + +//*********************************************** +// Defines for Hash/XOF Algorithms +//*********************************************** +#define ALG_MGF1 ALG_YES +#define ALG_SHA1 ALG_YES +#define ALG_SHA256 ALG_YES +#define ALG_SHA256_192 ALG_NO +#define ALG_SHA384 ALG_YES +#define ALG_SHA512 ALG_NO + +#define ALG_SHA3_256 ALG_NO +#define ALG_SHA3_384 ALG_NO +#define ALG_SHA3_512 ALG_NO + +#define ALG_SM3_256 ALG_NO + +#define ALG_SHAKE256_192 ALG_NO +#define ALG_SHAKE256_256 ALG_NO +#define ALG_SHAKE256_512 ALG_NO + +//*********************************************** +// Defines for Stateful Signature Algorithms +//*********************************************** +#define ALG_LMS ALG_NO +#define ALG_XMSS ALG_NO + +//*********************************************** +// Defines for Keyed Hashes +//*********************************************** +#define ALG_KEYEDHASH ALG_YES +#define ALG_HMAC ALG_YES + +//*********************************************** +// Defines for KDFs +//*********************************************** +#define ALG_KDF2 ALG_YES +#define ALG_KDF1_SP800_108 ALG_YES + +//*********************************************** +// Defines for Obscuration/MISC/compatibility +//*********************************************** +#define ALG_XOR ALG_YES + +//*********************************************** +// Defines controlling ACT +//*********************************************** +#define ACT_SUPPORT YES +#define RH_ACT_0 (YES * ACT_SUPPORT) +#define RH_ACT_1 ( NO * ACT_SUPPORT) +#define RH_ACT_2 ( NO * ACT_SUPPORT) +#define RH_ACT_3 ( NO * ACT_SUPPORT) +#define RH_ACT_4 ( NO * ACT_SUPPORT) +#define RH_ACT_5 ( NO * ACT_SUPPORT) +#define RH_ACT_6 ( NO * ACT_SUPPORT) +#define RH_ACT_7 ( NO * ACT_SUPPORT) +#define RH_ACT_8 ( NO * ACT_SUPPORT) +#define RH_ACT_9 ( NO * ACT_SUPPORT) +#define RH_ACT_A (YES * ACT_SUPPORT) +#define RH_ACT_B ( NO * ACT_SUPPORT) +#define RH_ACT_C ( NO * ACT_SUPPORT) +#define RH_ACT_D ( NO * ACT_SUPPORT) +#define RH_ACT_E ( NO * ACT_SUPPORT) +#define RH_ACT_F ( NO * ACT_SUPPORT) + + +//*********************************************** +// Enable VENDOR_PERMANENT_AUTH_HANDLE? +//*********************************************** +#define VENDOR_PERMANENT_AUTH_ENABLED NO +// if YES, this must be valid per Part2 (TPM_RH_AUTH_00 - TPM_RH_AUTH_FF) +// if NO, this must be #undef +#undef VENDOR_PERMANENT_AUTH_HANDLE + +//*********************************************** +// Defines controlling optional implementation +//*********************************************** +#define FIELD_UPGRADE_IMPLEMENTED NO + +//*********************************************** +// Buffer Sizes based on implementation +//*********************************************** +// When using PC CRB, the page size for both commands and +// control registers is 4k. The command buffer starts at +// offset 0x80, so the net size available is: +#define MAX_COMMAND_SIZE (4096-0x80) +#define MAX_RESPONSE_SIZE (4096-0x80) + +//*********************************************** +// Vendor Info +//*********************************************** +// max buffer for vendor commands +// Max data buffer leaving space for TPM2B size prefix +#define VENDOR_COMMAND_COUNT 0 +#define MAX_VENDOR_BUFFER_SIZE (MAX_RESPONSE_SIZE-2) +#define PRIVATE_VENDOR_SPECIFIC_BYTES RSA_PRIVATE_SIZE + +//*********************************************** +// Defines controlling Firmware- and SVN-limited objects +//*********************************************** +#define FW_LIMITED_SUPPORT YES +#define SVN_LIMITED_SUPPORT YES + +//*********************************************** +// Defines controlling External NV +//*********************************************** +// This is a software reference implementation of the TPM: there is no +// "external NV" as such. This #define configures the TPM to implement +// "external NV" that is stored in the same place as "internal NV." +// NOTE: enabling this doesn't necessarily mean that the expanded +// (external-NV-specific) attributes are supported. +#define EXTERNAL_NV YES + +#endif // _TPM_PROFILE_COMMON_H_ diff --git a/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_ErrorCodes.h b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_ErrorCodes.h new file mode 100644 index 00000000..63c434fc --- /dev/null +++ b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_ErrorCodes.h @@ -0,0 +1,51 @@ +//** Introduction +// This file defines error codes used in failure macros in the TPM Core Library. +// This file is part of TpmConfiguration because the Platform library can add error +// codes of it's own, and ultimately the specific error codes are a vendor decision +// because TPM2_GetTestResult returns manufacturer-defined data in failure mode. +// The only thing in this file that must be consistent with a vendor's implementation +// are the _names_ of error codes used by the core library. Even the values can +// change and are only a suggestion. + +#ifndef _TPMPROFILE_ERRORCODES_H +#define _TPMPROFILE_ERRORCODES_H + +// turn off clang-format because alignment doesn't persist across comments +// with current settings +// clang-format off + +#define FATAL_ERROR_ALLOCATION (1) +#define FATAL_ERROR_DIVIDE_ZERO (2) +#define FATAL_ERROR_INTERNAL (3) +#define FATAL_ERROR_PARAMETER (4) +#define FATAL_ERROR_ENTROPY (5) +#define FATAL_ERROR_SELF_TEST (6) +#define FATAL_ERROR_CRYPTO (7) +#define FATAL_ERROR_NV_UNRECOVERABLE (8) + +// indicates that the TPM has been re-manufactured after an +// unrecoverable NV error +#define FATAL_ERROR_REMANUFACTURED (9) +#define FATAL_ERROR_DRBG (10) +#define FATAL_ERROR_MOVE_SIZE (11) +#define FATAL_ERROR_COUNTER_OVERFLOW (12) +#define FATAL_ERROR_SUBTRACT (13) +#define FATAL_ERROR_MATHLIBRARY (14) +// end of codes defined through v1.52 + +// leave space for numbers that may have been used by vendors or platforms. +// Ultimately this file and these ranges are only a suggestion because +// TPM2_GetTestResult returns manufacturer-defined data in failure mode. +// Reserve 15-499 +#define FATAL_ERROR_RESERVED_START (15) +#define FATAL_ERROR_RESERVED_END (499) + +// Additional error codes defined by TPM library: +#define FATAL_ERROR_ASSERT (500) +// Platform library violated interface contract. +#define FATAL_ERROR_PLATFORM (600) + +// Test/Simulator errors 1000+ +#define FATAL_ERROR_FORCED (1000) + +#endif // _TPMPROFILE_ERRORCODES_H diff --git a/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_Misc.h b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_Misc.h new file mode 100644 index 00000000..d4178aed --- /dev/null +++ b/TPMCmd/TpmConfiguration/TpmConfiguration/TpmProfile_Misc.h @@ -0,0 +1,70 @@ +// Misc profile settings that don't currently have a better home. +// These are rarely changed, but available for vendor customization. + +#ifndef _TPM_PROFILE_MISC_H_ +#define _TPM_PROFILE_MISC_H_ + +// YES & NO defined by TpmBuildSwitches.h +#if(YES != 1 || NO != 0) +# error YES or NO incorrectly set +#endif + +// clang-format off +// clang-format off to preserve horizontal spacing +#define IMPLEMENTATION_PCR 24 +#define PLATFORM_PCR 24 +#define DRTM_PCR 17 +#define HCRTM_PCR 0 +#define NUM_LOCALITIES 5 +#define MAX_HANDLE_NUM 3 +#define MAX_ACTIVE_SESSIONS 64 +#define MAX_LOADED_SESSIONS 3 +#define MAX_SESSION_NUM 3 +#define MAX_LOADED_OBJECTS 3 +#define MIN_EVICT_OBJECTS 2 +#define NUM_POLICY_PCR_GROUP 1 +#define NUM_AUTHVALUE_PCR_GROUP 1 +#define MAX_CONTEXT_SIZE 2168 +#define MAX_DIGEST_BUFFER 1024 +#define MAX_NV_INDEX_SIZE 2048 +#define MAX_NV_BUFFER_SIZE 1024 +#define MAX_CAP_BUFFER 1024 +#define NV_MEMORY_SIZE 16384 +#define MIN_COUNTER_INDICES 8 +#define NUM_STATIC_PCR 16 +#define MAX_ALG_LIST_SIZE 64 +#define PRIMARY_SEED_SIZE 32 +#define CONTEXT_ENCRYPT_ALGORITHM AES +#define NV_CLOCK_UPDATE_INTERVAL 22 +#define NUM_POLICY_PCR 1 + +#define ORDERLY_BITS 8 +#define MAX_SYM_DATA 128 +#define MAX_RNG_ENTROPY_SIZE 64 +#define RAM_INDEX_SPACE 512 +#define ENABLE_PCR_NO_INCREMENT YES + +#define SIZE_OF_X509_SERIAL_NUMBER 20 + +// amount of space the platform can provide in PERSISTENT_DATA during +// manufacture +#define PERSISTENT_DATA_PLATFORM_SPACE 16 + +// structure padding space for these structures. Used if a +// particular configuration needs them to be aligned to a +// specific size +#define ORDERLY_DATA_PADDING 0 +#define STATE_CLEAR_DATA_PADDING 0 +#define STATE_RESET_DATA_PADDING 0 + +// configuration values that may vary by SIMULATION/DEBUG +#if SIMULATION && DEBUG +// This forces the use of a smaller context slot size. This reduction reduces the +// range of the epoch allowing the tester to force the epoch to occur faster than +// the normal production size +# define CONTEXT_SLOT UINT8 +#else +# define CONTEXT_SLOT UINT16 +#endif + +#endif // _TPM_PROFILE_MISC_H_ diff --git a/TPMCmd/TpmConfiguration/TpmConfiguration/VendorInfo.h b/TPMCmd/TpmConfiguration/TpmConfiguration/VendorInfo.h new file mode 100644 index 00000000..a5c62cc6 --- /dev/null +++ b/TPMCmd/TpmConfiguration/TpmConfiguration/VendorInfo.h @@ -0,0 +1,20 @@ + +#ifndef _VENDORINFO_H +#define _VENDORINFO_H + +// Define the TPM specification-specific capability values. +#define TPM_SPEC_FAMILY (0x322E3000) +#define TPM_SPEC_LEVEL (00) +#define TPM_SPEC_VERSION (183) +#define TPM_SPEC_YEAR (2024) +#define TPM_SPEC_DAY_OF_YEAR (25) +#define MAX_VENDOR_PROPERTY (1) + +// Define the platform specification-specific capability values. +#define PLATFORM_FAMILY (0) +#define PLATFORM_LEVEL (0) +#define PLATFORM_VERSION (0) +#define PLATFORM_YEAR (0) +#define PLATFORM_DAY_OF_YEAR (0) + +#endif diff --git a/TPMCmd/bootstrap b/TPMCmd/bootstrap index 293581c5..01115cbc 100755 --- a/TPMCmd/bootstrap +++ b/TPMCmd/bootstrap @@ -40,7 +40,8 @@ src_listvar () { suffix=$2 var=$3 - find "${basedir}" -name "${suffix}" | LC_ALL=C sort | tr '\n' ' ' | (printf "${var} = " && cat) + # filter out wolf files that don't build correctly and are unnecessary for openssl + find "${basedir}" -name "${suffix}" | LC_ALL=C sort | grep -vE 'wolf' | (printf "${var} = " && cat) | tr '\n' ' ' echo "" } @@ -56,11 +57,3 @@ echo "Generating file lists: src.mk" echo "Setting up build" ${AUTORECONF} --install --sym - -# A freshly checked out source tree will not build. VendorString.h must have -# these symbols defined to build. -echo "Setting default vendor strings" -sed -i.bak 's&^\/\/\(#define[[:space:]]\+FIRMWARE_V1.*\)&\1&; - s&^\/\/\(#define[[:space:]]\+MANUFACTURER.*\)&\1&; - s&^\/\/\(#define[[:space:]]\+VENDOR_STRING_1.*\)&\1&' \ - tpm/include/VendorString.h && rm tpm/include/VendorString.h.bak diff --git a/TPMCmd/configure.ac b/TPMCmd/configure.ac index 58a74b41..ab31cc41 100644 --- a/TPMCmd/configure.ac +++ b/TPMCmd/configure.ac @@ -60,7 +60,8 @@ AX_PTHREAD([], [AC_MSG_ERROR([requires pthread])]) AC_DEFINE([HASH_LIB], [Ossl], [Crypto lib for hash algorithms]) AC_DEFINE([SYM_LIB], [Ossl], [Crypto lib for symmetric encryption algorithms]) -AC_DEFINE([MATH_LIB], [Ossl], [Crypto lib for bignum operations]) +AC_DEFINE([MATH_LIB], [TpmBigNum], [Crypto lib for asymmetric operations]) +AC_DEFINE([BN_MATH_LIB], [Ossl], [Math lib for tpmbignum operations]) ADD_COMPILER_FLAG([-std=gnu11]) ADD_COMPILER_FLAG([-Werror]) @@ -68,12 +69,12 @@ ADD_COMPILER_FLAG([-Wall]) ADD_COMPILER_FLAG([-Wformat-security]) ADD_COMPILER_FLAG([-fstack-protector-all]) ADD_COMPILER_FLAG([-fPIC]) -ADD_COMPILER_FLAG([-Wno-error=empty-body]) -ADD_COMPILER_FLAG([-Wno-error=expansion-to-defined]) -ADD_COMPILER_FLAG([-Wno-error=parentheses]) -ADD_COMPILER_FLAG([-Wno-error=pointer-to-int-cast]) -ADD_COMPILER_FLAG([-Wno-error=missing-braces]) -ADD_COMPILER_FLAG([-Wno-error=unused-result]) + +# This is needed when compiling against OpenSSL 3.0, as the Ossl bindings use: +# - EC_POINT_set_affine_coordinates_GFp / EC_POINTs_mul +# - AES_set_encrypt_key / AES_encrypt +# - Camellia_set_key / Camellia_encrypt +ADD_COMPILER_FLAG([-Wno-error=deprecated-declarations]) AS_IF([test "x$enable_usedeviceid" = "xyes"], [ ADD_COMPILER_FLAG([-DNDEBUG]) diff --git a/TPMCmd/simulator.sln b/TPMCmd/simulator.sln index 59a398ab..d20598db 100644 --- a/TPMCmd/simulator.sln +++ b/TPMCmd/simulator.sln @@ -1,109 +1,109 @@ - -Microsoft Visual Studio Solution File, Format Version 12.00 -# Visual Studio 15 -VisualStudioVersion = 15.0.28307.1062 -MinimumVisualStudioVersion = 10.0.40219.1 -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "Simulator", "simulator\simulator.vcxproj", "{AAB9FA21-8671-4792-B000-B40A526058AD}" - ProjectSection(ProjectDependencies) = postProject - {A9249F05-0DF5-4D06-9873-FBBE61B6768B} = {A9249F05-0DF5-4D06-9873-FBBE61B6768B} - {B7456491-A2ED-4B1C-B59E-41C7B32B7E3B} = {B7456491-A2ED-4B1C-B59E-41C7B32B7E3B} - EndProjectSection -EndProject -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "Platform", "Platform\platform.vcxproj", "{A9249F05-0DF5-4D06-9873-FBBE61B6768B}" -EndProject -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "tpm", "tpm\TPM.vcxproj", "{B7456491-A2ED-4B1C-B59E-41C7B32B7E3B}" - ProjectSection(ProjectDependencies) = postProject - {A9249F05-0DF5-4D06-9873-FBBE61B6768B} = {A9249F05-0DF5-4D06-9873-FBBE61B6768B} - EndProjectSection -EndProject -Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "Crypt", "Crypt", "{26AD7978-27E2-46E7-9F8C-36CDB1B5AB01}" -EndProject -Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "Solution Items", "Solution Items", "{3587DA28-BEC1-44AE-8F4F-D24ECB719905}" - ProjectSection(SolutionItems) = preProject - ..\README.md = ..\README.md - EndProjectSection -EndProject -Global - GlobalSection(SolutionConfigurationPlatforms) = preSolution - Debug|Win32 = Debug|Win32 - Debug|x64 = Debug|x64 - Release|Win32 = Release|Win32 - Release|x64 = Release|x64 - Static|Win32 = Static|Win32 - Static|x64 = Static|x64 - WolfDebug|Win32 = WolfDebug|Win32 - WolfDebug|x64 = WolfDebug|x64 - WolfRelease|Win32 = WolfRelease|Win32 - WolfRelease|x64 = WolfRelease|x64 - EndGlobalSection - GlobalSection(ProjectConfigurationPlatforms) = postSolution - {AAB9FA21-8671-4792-B000-B40A526058AD}.Debug|Win32.ActiveCfg = Debug|Win32 - {AAB9FA21-8671-4792-B000-B40A526058AD}.Debug|Win32.Build.0 = Debug|Win32 - {AAB9FA21-8671-4792-B000-B40A526058AD}.Debug|x64.ActiveCfg = Debug|x64 - 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+ SolutionGuid = {C15EF5ED-F2C1-4785-A9C2-A2D213A367F7} + EndGlobalSection +EndGlobal diff --git a/TPMCmd/tpm/CMakeLists.txt b/TPMCmd/tpm/CMakeLists.txt new file mode 100644 index 00000000..477f6e90 --- /dev/null +++ b/TPMCmd/tpm/CMakeLists.txt @@ -0,0 +1,92 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +# +#################################################### +# TPM Crypto Library configuration +#################################################### +# +# The TPM library depends on related libraries: +# +# First, a "Platform" library. This library provides platform/hardware specific +# features, such as accessing random number hardware and external (e.g. flash) +# storage. +# +# Second, a set of "Crypto" libraries. This set consists of multiple libraries, one for each +# rough segment of cryptography: Symmetric algorithms (e.g. AES), Hashing algorithms (e.g. SHA), and +# Big Number mathematics for support asymmetric cryptographic algorithms, (e.g. RSA/ECC) +# +# Each of these crypto libraries are selected by a different CMake parameter: +# +# CMake TPM Crypto configuration variables: +# * cryptoLib_Hash +# * cryptoLib_Symmetric +# * cryptoLib_BnMath +# +# Each has a corresponding #define in the 'C' code", that must be set to a directory name +# relative to the "cryptolibs" folder. For example: +# * HASH_LIB=Ossl +# * SYM_LIB=Ossl +# * BN_MATH_LIB=Ossl +# +# Each must be represented by a CMake library that has already been +# declared/created via add_library, named as follows: +# Tpm_CryptoLib_Hash_${cryptoLib_Hash} +# Tpm_CryptoLib_Symmetric_${cryptoLib_Symmetric} +# Tpm_CryptoLib_BnMath_${cryptoLib_BnMath} +# +# Also, each crypto library must provide headers with a given naming pattern. +# +# For example, cryptoLib_Hash=Ossl requires a header exist named thus: +# +# #include etc. +# ^^^^ ^^^^ = value of *_LIB variable +# ^^^^ = Hardcoded based on the particular variable +# +# The BnMath library has slightly different naming convention, see the code. +# +# The expectation is these crypto libraries will be added to the Tpm_CoreLib environment +# by a top-level CMakeLists via add_subdirectory. + +#################################################### +# Project +#################################################### + +cmake_minimum_required(VERSION 3.16.3) +project(TpmCoreLibTop VERSION 1.62.0 LANGUAGES C) +print_project_info() + +# Set some compiler options for everything below +add_library(Tpm_CompilerOptions INTERFACE) +add_library(Tpm_CompilerOptions::Tpm_CompilerOptions ALIAS Tpm_CompilerOptions) +#################################################### +# Compiler Options +#################################################### + +# enable minimal rebuild +target_compile_options(Tpm_CompilerOptions INTERFACE + "$<$,$>:>" + "$<$,$>:/Gm->" +) + +# create install and export information for downstream projects to use +install_and_export_config_targets(Tpm_CompilerOptions) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## +# nothing to do, headers provided by TpmBigNum_Headers + +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(Tpm_CompilerOptions) + + +# this project builds the Tpm_Platform_Interface Library +add_subdirectory(include/platform_interface) +# this project builds the Tpm_CryptoLibs_TpmBigNum library +add_subdirectory(cryptolibs/TpmBigNum) +# this project builds the Tpm_CoreLib Library +add_subdirectory(src) + diff --git a/TPMCmd/tpm/Tpm.vcxproj b/TPMCmd/tpm/Tpm.vcxproj deleted file mode 100644 index 7c4af043..00000000 --- a/TPMCmd/tpm/Tpm.vcxproj +++ /dev/null @@ -1,1061 +0,0 @@ - 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Specify a build folder with -B.") + endif() +endfunction() + +# Don't pollute other projects by installing to the global system. +function(ensure_cross_compile_prefix) + if(CMAKE_INSTALL_PREFIX_INITIALIZED_TO_DEFAULT) + set(CMAKE_INSTALL_PREFIX ${CMAKE_BINARY_DIR}/install CACHE PATH "..." FORCE) + message(WARNING "CMAKE_INSTALL_PREFIX was not specified and the default is unsafe for cross-compiling; reset to ${CMAKE_INSTALL_PREFIX}!") + endif() +endfunction() + +# declare install folders, and create the package config files for the current project to be used +# by downstream projects. +function(install_and_export_config_targets SomeProjectName) + if (NOT CMAKE_INSTALL_INCLUDEDIR) + message(FATAL_ERROR "install_and_export_config_targets expects GNUInstallDirs to have been setup.") + endif() + + install(TARGETS ${SomeProjectName} + EXPORT ${SomeProjectName}Targets + LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR} + ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR} + RUNTIME DESTINATION ${CMAKE_INSTALL_BINDIR} + INCLUDES DESTINATION ${CMAKE_INSTALL_INCLUDEDIR} + FILE_SET HEADERS DESTINATION ${CMAKE_INSTALL_INCLUDEDIR} + ) + + # prefer (CMake 3.17) set(CONFIG_TEMPLATE_FILE "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/Package_Config.in.cmake") + set(CONFIG_TEMPLATE_FILE "${_THIS_MODULE_BASE_DIR}/Package_Config.in.cmake") + + # generate files to be used by downstream packages + include(CMakePackageConfigHelpers) + + # prefer (CMake 3.17) set_property(TARGET ${SomeProjectName} PROPERTY VERSION @PROJECT_VERSION@) + set_property(TARGET ${SomeProjectName} PROPERTY INTERFACE_${SomeProjectName}_VERSION ${PROJECT_VERSION}) + set_property(TARGET ${SomeProjectName} PROPERTY INTERFACE_${SomeProjectName}_MAJOR_VERSION ${PROJECT_MAJOR_VERSION}) + set_property(TARGET ${SomeProjectName} APPEND PROPERTY COMPATIBLE_INTERFACE_STRING INTERFACE_${SomeProjectName}_MAJOR_VERSION) + if (PACKAGE_PROJECT_NAME) + message(FATAL_ERROR "Package_Project_Name is expected to be unset") + endif() + + # pass in the SomeProjectName into the config template + set(PACKAGE_PROJECT_NAME ${SomeProjectName}) + configure_package_config_file(${CONFIG_TEMPLATE_FILE} + ${CMAKE_CURRENT_BINARY_DIR}/${SomeProjectName}Config.cmake + INSTALL_DESTINATION ${CMAKE_INSTALL_LIBDIR}/${SomeProjectName}/cmake + PATH_VARS CMAKE_INSTALL_INCLUDEDIR CMAKE_INSTALL_LIBDIR) + + write_basic_package_version_file( + ${CMAKE_CURRENT_BINARY_DIR}/${SomeProjectName}ConfigVersion.cmake + VERSION ${${SomeProjectName}_VERSION} + COMPATIBILITY SameMajorVersion ) + + install(FILES ${CMAKE_CURRENT_BINARY_DIR}/${SomeProjectName}Config.cmake + ${CMAKE_CURRENT_BINARY_DIR}/${SomeProjectName}ConfigVersion.cmake + DESTINATION ${CMAKE_INSTALL_LIBDIR}/${SomeProjectName}/cmake ) + + export(EXPORT ${SomeProjectName}Targets + FILE "${CMAKE_CURRENT_BINARY_DIR}/${SomeProjectName}/${SomeProjectName}ExportedTargets.cmake" + NAMESPACE ${SomeProjectName}:: + ) +endfunction() + +# export the Targets.cmake file for this project +function(export_targets_cmake_file SomeProjectName) + install(EXPORT ${SomeProjectName}Targets + FILE ${SomeProjectName}InstalledTargets.cmake + NAMESPACE ${SomeProjectName}:: + DESTINATION ${CMAKE_INSTALL_LIBDIR}/${SomeProjectName}/cmake + ) +endfunction() \ No newline at end of file diff --git a/TPMCmd/tpm/cmake/tpm_support.cmake b/TPMCmd/tpm/cmake/tpm_support.cmake new file mode 100644 index 00000000..1e5891cc --- /dev/null +++ b/TPMCmd/tpm/cmake/tpm_support.cmake @@ -0,0 +1,135 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +include(${CMAKE_CURRENT_LIST_DIR}/package_utilities.cmake) +include(${CMAKE_CURRENT_LIST_DIR}/misc_utilities.cmake) +disallow_in_source_builds() + +set(default_cryptoLib_Dir "${CMAKE_CURRENT_LIST_DIR}/../cryptolibs") + +function(generate_tpm_crypto_options) + # Create cmake-gui variables that can be used to set the various crypto options. + # the exact values here are expected to be provided by the calling script, except + # TpmBigNum, which is currently the only supported Math option. + # the other values are not set here, but are customized in the calling script. + # must use PARENT_SCOPE since this is a function + + # https://cmake.org/pipermail/cmake/2016-October/064342.html + # + # option() is a handy shortcut for boolean options, but it's little more than + # syntactic sugar for a cache variable of type BOOL. To create a tristate + # variable, you can do this: + # + # set(ENABLE_SOMETHING AUTO CACHE STRING "Enable SOMETHING support") # create the variable + # set_property(CACHE ENABLE_SOMETHING PROPERTY STRINGS AUTO ON OFF) # define list of values GUI will offer for the variable + # + # Then, you can test the variable like this: + # + # if(ENABLE_SOMETHING STREQUAL "AUTO") + # # AUTO was used + # elseif(ENABLE_SOMETHING) + # # a true value (such as ON) was used + # else() + # # a false value (such as OFF) was used + # endif() + + # Regular cache variable which holds the path of the crypto libs. User can set this to their own + # directory containing custom crypto implementations. + set(user_cryptoLib_Dir "${default_cryptoLib_Dir}" CACHE PATH "Directory containing custom crypto implementations") + + # each of these tuples does 3 things: + # 1. create a value in the cache (set to NULL) so we can attach a property to it (the option list) + # 2. define the option list in a separate variable in parent scope so visible to related functions for processing selection results + # 3. set the selection list as a property of the value in the cache. + #set(cryptoLibOptions_Symmetric Ossl WOLF PARENT_SCOPE) + set(cryptoLib_Symmetric NULL CACHE STRING "Choose Crypto Symmetric Library" ) # create the variable + set_property(CACHE cryptoLib_Symmetric PROPERTY STRINGS ${cryptoLibOptions_Symmetric} ) # define list of values GUI will offer for the variable + + #set(cryptoLibOptions_Hash Ossl WOLF PARENT_SCOPE) + set(cryptoLib_Hash NULL CACHE STRING "Choose Crypto Hash Library" ) # create the variable + set_property(CACHE cryptoLib_Hash PROPERTY STRINGS ${cryptoLibOptions_Hash}) # define list of values GUI will offer for the variable + + set(cryptoLibOptions_Math TpmBigNum PARENT_SCOPE) + set(cryptoLib_Math NULL CACHE STRING "Choose Crypto Math Library" ) # create the variable + set_property(CACHE cryptoLib_Math PROPERTY STRINGS ${cryptoLibOptions_Math}) # define list of values GUI will offer for the variable + + #set(cryptoLibOptions_BnMath Ossl WOLF PARENT_SCOPE) + set(cryptoLib_BnMath NULL CACHE STRING "Choose Crypto BnMath Library" ) # create the variable + set_property(CACHE cryptoLib_BnMath PROPERTY STRINGS ${cryptoLibOptions_BnMath}) # define list of values GUI will offer for the variable + +endfunction() + +function(verify_tpm_crypto_options) + # TPM Crypto Library Configuration + if(NOT cryptoLib_Symmetric IN_LIST cryptoLibOptions_Symmetric) + message(FATAL_ERROR "cryptoLib_Symmetric must be one of ${cryptoLibOptions_Symmetric}") + else() + message(NOTICE "Selected cryptoLib_Symmetric=${cryptoLib_Symmetric}") + endif() + + if(NOT cryptoLib_Hash IN_LIST cryptoLibOptions_Hash) + message(FATAL_ERROR "cryptoLib_Hash must be one of ${cryptoLibOptions_Hash}") + else() + message(NOTICE "Selected cryptoLib_Hash=${cryptoLib_Hash}") + endif() + + if(NOT cryptoLib_Math IN_LIST cryptoLibOptions_Math) + message(FATAL_ERROR "cryptoLib_Math (${cryptoLib_Math}) must be one of ${cryptoLibOptions_Math}") + else() + message(NOTICE "Selected cryptoLib_Math=${cryptoLib_Math}") + endif() + + if(NOT cryptoLib_BnMath IN_LIST cryptoLibOptions_BnMath) + message(FATAL_ERROR "cryptoLib_BnMath must be one of ${cryptoLibOptions_BnMath}") + else() + message(NOTICE "Selected cryptoLib_BnMath=${cryptoLib_BnMath}") + endif() + +endfunction() + +function(process_tpm_crypto_options) + # this function is expected to be called from the top-level CMakeLists.txt, and + # the requested crypto libraries are expected to be provided by a cryptolibs + # folder immediately below. + # Otherwise, try to find a built-in version + # Otherwise, fail + set(default_crypto_dir ${CMAKE_CURRENT_SOURCE_DIR}/tpm/cryptolibs) + + target_compile_definitions(TpmConfiguration INTERFACE + HASH_LIB=${cryptoLib_Hash} + SYM_LIB=${cryptoLib_Symmetric} + MATH_LIB=${cryptoLib_Math} + BN_MATH_LIB=${cryptoLib_BnMath} + ) + + set(tpm_crypto_libset ${cryptoLib_Symmetric} ${cryptoLib_Hash} ${cryptoLib_BnMath}) # for use in this function + list(REMOVE_DUPLICATES tpm_crypto_libset) + set(tpm_crypto_libset ${tpm_crypto_libset} PARENT_SCOPE) # for use by other functions + foreach(cryptodir ${tpm_crypto_libset}) + set(winner ${default_cryptoLib_Dir}/${cryptodir}) + set(winner_is_built_in TRUE) + if(EXISTS "${user_cryptoLib_Dir}/${cryptodir}") + set(winner "${user_cryptoLib_Dir}/${cryptodir}") + set(winner_is_built_in FALSE) + endif() + + if (NOT EXISTS "${winner}") + message(FATAL_ERROR "Directory ${winner} referenced by crypto selections does not exist!") + elseif (NOT EXISTS "${winner}/CMakeLists.txt") + message(FATAL_ERROR "Directory ${winner} referenced by crypto selections does not contain CMakeLists.txt!") + else() + message(NOTICE "Providing Crypto Library [${cryptodir}] from directory [${winner}] referenced by crypto selections!") + endif() + + if(winner_is_built_in) + set(binary_dir "") + else() + set(binary_dir cryptolib_${cryptodir}) + endif() + + add_subdirectory(${winner} ${binary_dir}) + endforeach() +endfunction() + diff --git a/TPMCmd/tpm/cryptolibs/Ossl/BnToOsslMath.c b/TPMCmd/tpm/cryptolibs/Ossl/BnToOsslMath.c new file mode 100644 index 00000000..92ad417c --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/Ossl/BnToOsslMath.c @@ -0,0 +1,553 @@ +//** Introduction +// The functions in this file provide the low-level interface between the TPM code +// and the big number and elliptic curve math routines in OpenSSL. +// +// Most math on big numbers require a context. The context contains the memory in +// which OpenSSL creates and manages the big number values. When a OpenSSL math +// function will be called that modifies a BIGNUM value, that value must be created in +// an OpenSSL context. The first line of code in such a function must be: +// OSSL_ENTER(); and the last operation before returning must be OSSL_LEAVE(). +// OpenSSL variables can then be created with BnNewVariable(). Constant values to be +// used by OpenSSL are created from the bigNum values passed to the functions in this +// file. Space for the BIGNUM control block is allocated in the stack of the +// function and then it is initialized by calling BigInitialized(). That function +// sets up the values in the BIGNUM structure and sets the data pointer to point to +// the data in the bignum_t. This is only used when the value is known to be a +// constant in the called function. +// +// Because the allocations of constants is on the local stack and the +// OSSL_ENTER()/OSSL_LEAVE() pair flushes everything created in OpenSSL memory, there +// should be no chance of a memory leak. + +//** Includes and Defines +//#include "Tpm.h" +#include "BnOssl.h" + +#ifdef MATH_LIB_OSSL +# include + +//** Functions + +//*** OsslToTpmBn() +// This function converts an OpenSSL BIGNUM to a TPM bigNum. In this implementation +// it is assumed that OpenSSL uses a different control structure but the same data +// layout -- an array of native-endian words in little-endian order. +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure because value will not fit or OpenSSL variable doesn't +// exist +BOOL OsslToTpmBn(bigNum bn, BIGNUM* osslBn) +{ + GOTO_ERROR_UNLESS(osslBn != NULL); + // If the bn is NULL, it means that an output value pointer was NULL meaning that + // the results is simply to be discarded. + if(bn != NULL) + { + int i; + // + GOTO_ERROR_UNLESS((unsigned)osslBn->top <= BnGetAllocated(bn)); + for(i = 0; i < osslBn->top; i++) + bn->d[i] = osslBn->d[i]; + BnSetTop(bn, osslBn->top); + } + return TRUE; +Error: + return FALSE; +} + +//*** BigInitialized() +// This function initializes an OSSL BIGNUM from a TPM bigConst. Do not use this for +// values that are passed to OpenSLL when they are not declared as const in the +// function prototype. Instead, use BnNewVariable(). +BIGNUM* BigInitialized(BIGNUM* toInit, bigConst initializer) +{ + if(initializer == NULL) + FAIL(FATAL_ERROR_PARAMETER); + if(toInit == NULL || initializer == NULL) + return NULL; + toInit->d = (BN_ULONG*)&initializer->d[0]; + toInit->dmax = (int)initializer->allocated; + toInit->top = (int)initializer->size; + toInit->neg = 0; + toInit->flags = 0; + return toInit; +} + +# ifndef OSSL_DEBUG +# define BIGNUM_PRINT(label, bn, eol) +# define DEBUG_PRINT(x) +# else +# define DEBUG_PRINT(x) printf("%s", x) +# define BIGNUM_PRINT(label, bn, eol) BIGNUM_print((label), (bn), (eol)) + +//*** BIGNUM_print() +static void BIGNUM_print(const char* label, const BIGNUM* a, BOOL eol) +{ + BN_ULONG* d; + int i; + int notZero = FALSE; + + if(label != NULL) + printf("%s", label); + if(a == NULL) + { + printf("NULL"); + goto done; + } + if(a->neg) + printf("-"); + for(i = a->top, d = &a->d[i - 1]; i > 0; i--) + { + int j; + BN_ULONG l = *d--; + for(j = BN_BITS2 - 8; j >= 0; j -= 8) + { + BYTE b = (BYTE)((l >> j) & 0xFF); + notZero = notZero || (b != 0); + if(notZero) + printf("%02x", b); + } + if(!notZero) + printf("0"); + } +done: + if(eol) + printf("\n"); + return; +} +# endif + +//*** BnNewVariable() +// This function allocates a new variable in the provided context. If the context +// does not exist or the allocation fails, it is a catastrophic failure. +static BIGNUM* BnNewVariable(BN_CTX* CTX) +{ + BIGNUM* new; + // + // This check is intended to protect against calling this function without + // having initialized the CTX. + if((CTX == NULL) || ((new = BN_CTX_get(CTX)) == NULL)) + FAIL(FATAL_ERROR_ALLOCATION); + return new; +} + +# if LIBRARY_COMPATIBILITY_CHECK + +//*** MathLibraryCompatibilityCheck() +BOOL BnMathLibraryCompatibilityCheck(void) +{ + OSSL_ENTER(); + BIGNUM* osslTemp = BnNewVariable(CTX); + crypt_uword_t i; + BYTE test[] = {0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, + 0x14, 0x13, 0x12, 0x11, 0x10, 0x0F, 0x0E, 0x0D, 0x0C, 0x0B, 0x0A, + 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00}; + BN_VAR(tpmTemp, sizeof(test) * 8); // allocate some space for a test value + // + // Convert the test data to a bigNum + BnFromBytes(tpmTemp, test, sizeof(test)); + // Convert the test data to an OpenSSL BIGNUM + BN_bin2bn(test, sizeof(test), osslTemp); + // Make sure the values are consistent + GOTO_ERROR_UNLESS(osslTemp->top == (int)tpmTemp->size); + for(i = 0; i < tpmTemp->size; i++) + GOTO_ERROR_UNLESS(osslTemp->d[i] == tpmTemp->d[i]); + OSSL_LEAVE(); + return 1; +Error: + return 0; +} +# endif + +//*** BnModMult() +// This function does a modular multiply. It first does a multiply and then a divide +// and returns the remainder of the divide. +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure in operation +LIB_EXPORT BOOL BnModMult(bigNum result, bigConst op1, bigConst op2, bigConst modulus) +{ + OSSL_ENTER(); + BOOL OK = TRUE; + BIGNUM* bnResult = BN_NEW(); + BIGNUM* bnTemp = BN_NEW(); + BIG_INITIALIZED(bnOp1, op1); + BIG_INITIALIZED(bnOp2, op2); + BIG_INITIALIZED(bnMod, modulus); + // + GOTO_ERROR_UNLESS(BN_mul(bnTemp, bnOp1, bnOp2, CTX)); + GOTO_ERROR_UNLESS(BN_div(NULL, bnResult, bnTemp, bnMod, CTX)); + GOTO_ERROR_UNLESS(OsslToTpmBn(result, bnResult)); + goto Exit; +Error: + OK = FALSE; +Exit: + OSSL_LEAVE(); + return OK; +} + +//*** BnMult() +// Multiplies two numbers +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure in operation +LIB_EXPORT BOOL BnMult(bigNum result, bigConst multiplicand, bigConst multiplier) +{ + OSSL_ENTER(); + BIGNUM* bnTemp = BN_NEW(); + BOOL OK = TRUE; + BIG_INITIALIZED(bnA, multiplicand); + BIG_INITIALIZED(bnB, multiplier); + // + GOTO_ERROR_UNLESS(BN_mul(bnTemp, bnA, bnB, CTX)); + GOTO_ERROR_UNLESS(OsslToTpmBn(result, bnTemp)); + goto Exit; +Error: + OK = FALSE; +Exit: + OSSL_LEAVE(); + return OK; +} + +//*** BnDiv() +// This function divides two bigNum values. The function returns FALSE if +// there is an error in the operation. +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure in operation +LIB_EXPORT BOOL BnDiv( + bigNum quotient, bigNum remainder, bigConst dividend, bigConst divisor) +{ + OSSL_ENTER(); + BIGNUM* bnQ = BN_NEW(); + BIGNUM* bnR = BN_NEW(); + BOOL OK = TRUE; + BIG_INITIALIZED(bnDend, dividend); + BIG_INITIALIZED(bnSor, divisor); + // + if(BnEqualZero(divisor)) + FAIL(FATAL_ERROR_DIVIDE_ZERO); + GOTO_ERROR_UNLESS(BN_div(bnQ, bnR, bnDend, bnSor, CTX)); + GOTO_ERROR_UNLESS(OsslToTpmBn(quotient, bnQ)); + GOTO_ERROR_UNLESS(OsslToTpmBn(remainder, bnR)); + DEBUG_PRINT("In BnDiv:\n"); + BIGNUM_PRINT(" bnDividend: ", bnDend, TRUE); + BIGNUM_PRINT(" bnDivisor: ", bnSor, TRUE); + BIGNUM_PRINT(" bnQuotient: ", bnQ, TRUE); + BIGNUM_PRINT(" bnRemainder: ", bnR, TRUE); + goto Exit; +Error: + OK = FALSE; +Exit: + OSSL_LEAVE(); + return OK; +} + +# if ALG_RSA +//*** BnGcd() +// Get the greatest common divisor of two numbers +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure in operation +LIB_EXPORT BOOL BnGcd(bigNum gcd, // OUT: the common divisor + bigConst number1, // IN: + bigConst number2 // IN: +) +{ + OSSL_ENTER(); + BIGNUM* bnGcd = BN_NEW(); + BOOL OK = TRUE; + BIG_INITIALIZED(bn1, number1); + BIG_INITIALIZED(bn2, number2); + // + GOTO_ERROR_UNLESS(BN_gcd(bnGcd, bn1, bn2, CTX)); + GOTO_ERROR_UNLESS(OsslToTpmBn(gcd, bnGcd)); + goto Exit; +Error: + OK = FALSE; +Exit: + OSSL_LEAVE(); + return OK; +} + +//***BnModExp() +// Do modular exponentiation using bigNum values. The conversion from a bignum_t to +// a bigNum is trivial as they are based on the same structure +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure in operation +LIB_EXPORT BOOL BnModExp(bigNum result, // OUT: the result + bigConst number, // IN: number to exponentiate + bigConst exponent, // IN: + bigConst modulus // IN: +) +{ + OSSL_ENTER(); + BIGNUM* bnResult = BN_NEW(); + BOOL OK = TRUE; + BIG_INITIALIZED(bnN, number); + BIG_INITIALIZED(bnE, exponent); + BIG_INITIALIZED(bnM, modulus); + // + GOTO_ERROR_UNLESS(BN_mod_exp(bnResult, bnN, bnE, bnM, CTX)); + GOTO_ERROR_UNLESS(OsslToTpmBn(result, bnResult)); + goto Exit; +Error: + OK = FALSE; +Exit: + OSSL_LEAVE(); + return OK; +} +# endif // ALG_RSA + +//*** BnModInverse() +// Modular multiplicative inverse +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure in operation +LIB_EXPORT BOOL BnModInverse(bigNum result, bigConst number, bigConst modulus) +{ + OSSL_ENTER(); + BIGNUM* bnResult = BN_NEW(); + BOOL OK = TRUE; + BIG_INITIALIZED(bnN, number); + BIG_INITIALIZED(bnM, modulus); + // + GOTO_ERROR_UNLESS(BN_mod_inverse(bnResult, bnN, bnM, CTX) != NULL); + GOTO_ERROR_UNLESS(OsslToTpmBn(result, bnResult)); + goto Exit; +Error: + OK = FALSE; +Exit: + OSSL_LEAVE(); + return OK; +} + +# if ALG_ECC + +//*** PointFromOssl() +// Function to copy the point result from an OSSL function to a bigNum +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure in operation +static BOOL PointFromOssl(bigPoint pOut, // OUT: resulting point + EC_POINT* pIn, // IN: the point to return + const bigCurveData* E // IN: the curve +) +{ + BIGNUM* x = NULL; + BIGNUM* y = NULL; + BOOL OK; + BN_CTX_start(E->CTX); + // + x = BN_CTX_get(E->CTX); + y = BN_CTX_get(E->CTX); + + if(y == NULL) + FAIL(FATAL_ERROR_ALLOCATION); + // If this returns false, then the point is at infinity + OK = EC_POINT_get_affine_coordinates_GFp(E->G, pIn, x, y, E->CTX); + if(OK) + { + OsslToTpmBn(pOut->x, x); + OsslToTpmBn(pOut->y, y); + BnSetWord(pOut->z, 1); + } + else + BnSetWord(pOut->z, 0); + BN_CTX_end(E->CTX); + return OK; +} + +//*** EcPointInitialized() +// Allocate and initialize a point. +static EC_POINT* EcPointInitialized(pointConst initializer, const bigCurveData* E) +{ + EC_POINT* P = NULL; + + if(initializer != NULL) + { + BIG_INITIALIZED(bnX, initializer->x); + BIG_INITIALIZED(bnY, initializer->y); + if(E == NULL) + FAIL(FATAL_ERROR_ALLOCATION); + P = EC_POINT_new(E->G); + if(!EC_POINT_set_affine_coordinates_GFp(E->G, P, bnX, bnY, E->CTX)) + P = NULL; + } + return P; +} + +//*** BnCurveInitialize() +// This function initializes the OpenSSL curve information structure. This +// structure points to the TPM-defined values for the curve, to the context for the +// number values in the frame, and to the OpenSSL-defined group values. +// Return Type: bigCurveData* +// NULL the TPM_ECC_CURVE is not valid or there was a problem in +// in initializing the curve data +// non-NULL points to 'E' +LIB_EXPORT bigCurveData* BnCurveInitialize( + bigCurveData* E, // IN: curve structure to initialize + TPM_ECC_CURVE curveId // IN: curve identifier +) +{ + const TPMBN_ECC_CURVE_CONSTANTS* C = BnGetCurveData(curveId); + if(C == NULL) + E = NULL; + if(E != NULL) + { + // This creates the OpenSSL memory context that stays in effect as long as the + // curve (E) is defined. + OSSL_ENTER(); // if the allocation fails, the TPM fails + EC_POINT* P = NULL; + BIG_INITIALIZED(bnP, C->prime); + BIG_INITIALIZED(bnA, C->a); + BIG_INITIALIZED(bnB, C->b); + BIG_INITIALIZED(bnX, C->base.x); + BIG_INITIALIZED(bnY, C->base.y); + BIG_INITIALIZED(bnN, C->order); + BIG_INITIALIZED(bnH, C->h); + // + E->C = C; + E->CTX = CTX; + + // initialize EC group, associate a generator point and initialize the point + // from the parameter data + // Create a group structure + E->G = EC_GROUP_new_curve_GFp(bnP, bnA, bnB, CTX); + GOTO_ERROR_UNLESS(E->G != NULL); + + // Allocate a point in the group that will be used in setting the + // generator. This is not needed after the generator is set. + P = EC_POINT_new(E->G); + GOTO_ERROR_UNLESS(P != NULL); + + // Need to use this in case Montgomery method is being used + GOTO_ERROR_UNLESS( + EC_POINT_set_affine_coordinates_GFp(E->G, P, bnX, bnY, CTX)); + // Now set the generator + GOTO_ERROR_UNLESS(EC_GROUP_set_generator(E->G, P, bnN, bnH)); + + EC_POINT_free(P); + goto Exit; +Error: + EC_POINT_free(P); + BnCurveFree(E); + E = NULL; + } +Exit: + return E; +} + +//*** BnCurveFree() +// This function will free the allocated components of the curve and end the +// frame in which the curve data exists +LIB_EXPORT void BnCurveFree(bigCurveData* E) +{ + if(E) + { + EC_GROUP_free(E->G); + OsslContextLeave(E->CTX); + } +} + +//*** BnEccModMult() +// This function does a point multiply of the form R = [d]S +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure in operation; treat as result being point at infinity +LIB_EXPORT BOOL BnEccModMult(bigPoint R, // OUT: computed point + pointConst S, // IN: point to multiply by 'd' (optional) + bigConst d, // IN: scalar for [d]S + const bigCurveData* E) +{ + EC_POINT* pR = EC_POINT_new(E->G); + EC_POINT* pS = EcPointInitialized(S, E); + BIG_INITIALIZED(bnD, d); + + if(S == NULL) + EC_POINT_mul(E->G, pR, bnD, NULL, NULL, E->CTX); + else + EC_POINT_mul(E->G, pR, NULL, pS, bnD, E->CTX); + PointFromOssl(R, pR, E); + EC_POINT_free(pR); + EC_POINT_free(pS); + return !BnEqualZero(R->z); +} + +//*** BnEccModMult2() +// This function does a point multiply of the form R = [d]G + [u]Q +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure in operation; treat as result being point at infinity +LIB_EXPORT BOOL BnEccModMult2(bigPoint R, // OUT: computed point + pointConst S, // IN: optional point + bigConst d, // IN: scalar for [d]S or [d]G + pointConst Q, // IN: second point + bigConst u, // IN: second scalar + const bigCurveData* E // IN: curve +) +{ + EC_POINT* pR = EC_POINT_new(E->G); + EC_POINT* pS = EcPointInitialized(S, E); + BIG_INITIALIZED(bnD, d); + EC_POINT* pQ = EcPointInitialized(Q, E); + BIG_INITIALIZED(bnU, u); + + if(S == NULL || S == (pointConst) & (AccessCurveConstants(E)->base)) + EC_POINT_mul(E->G, pR, bnD, pQ, bnU, E->CTX); + else + { + const EC_POINT* points[2]; + const BIGNUM* scalars[2]; + points[0] = pS; + points[1] = pQ; + scalars[0] = bnD; + scalars[1] = bnU; + EC_POINTs_mul(E->G, pR, NULL, 2, points, scalars, E->CTX); + } + PointFromOssl(R, pR, E); + EC_POINT_free(pR); + EC_POINT_free(pS); + EC_POINT_free(pQ); + return !BnEqualZero(R->z); +} + +//** BnEccAdd() +// This function does addition of two points. +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure in operation; treat as result being point at infinity +LIB_EXPORT BOOL BnEccAdd(bigPoint R, // OUT: computed point + pointConst S, // IN: first point to add + pointConst Q, // IN: second point + const bigCurveData* E // IN: curve +) +{ + EC_POINT* pR = EC_POINT_new(E->G); + EC_POINT* pS = EcPointInitialized(S, E); + EC_POINT* pQ = EcPointInitialized(Q, E); + // + EC_POINT_add(E->G, pR, pS, pQ, E->CTX); + + PointFromOssl(R, pR, E); + EC_POINT_free(pR); + EC_POINT_free(pS); + EC_POINT_free(pQ); + return !BnEqualZero(R->z); +} + +# endif // ALG_ECC + +# if CRYPTO_LIB_REPORTING + +//** BnGetImplementation() +// This function reports the underlying library being used for bignum operations. +void BnGetImplementation(_CRYPTO_IMPL_DESCRIPTION* result) +{ + OsslGetVersion(result); +} + +# endif // CRYPTO_LIB_REPORTING + +#endif // MATHLIB OSSL diff --git a/TPMCmd/tpm/cryptolibs/Ossl/CMakeLists.txt b/TPMCmd/tpm/cryptolibs/Ossl/CMakeLists.txt new file mode 100644 index 00000000..d8892737 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/Ossl/CMakeLists.txt @@ -0,0 +1,104 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +# This demonstrates how to create a crypto library. Ultimately, the Core Tpm +# library will expect 3 crypto libraries to be created, plus 3 related header +# libraries. They can all be created in a single CMakeLists.txt as demonstrated +# here, or separately. +# + +# this built-in library expects the caller to point to OpenSSL includes and library paths +# before calling this script +if (WIN32) + if (NOT OSSL_INCLUDE_SUBDIR) + message(FATAL_ERROR "OSSL_INCLUDE_SUBDIR must be set when using Ossl on Win32. was [${OSSL_INCLUDE_SUBDIR}]") + endif() + if (NOT EXISTS "${OSSL_INCLUDE_SUBDIR}") + message(FATAL_ERROR "OSSL_INCLUDE_SUBDIR must exist when using Ossl libraries; was [${OSSL_INCLUDE_SUBDIR}].") + endif() +endif() + +project(Tpm_Cryptolib_Ossl VERSION 1.0) +print_project_info() +# generate Tpm_Cryptolib_Ossl_Headers +add_subdirectory(include/Ossl) + +# Library First: Tpm_CryptoLib_Math_ +# Library Second: Tpm_CryptoLib_Symmetric_ +# Library Third: Tpm_CryptoLib_Hash_ +add_library(Tpm_CryptoLib_Math_Ossl STATIC) +add_library(Tpm_CryptoLib_Math_Ossl::Tpm_CryptoLib_Math_Ossl ALIAS Tpm_CryptoLib_Math_Ossl) +add_library(Tpm_CryptoLib_Symmetric_Ossl ALIAS Tpm_CryptoLib_Math_Ossl) +add_library(Tpm_CryptoLib_Hash_Ossl ALIAS Tpm_CryptoLib_Math_Ossl) + +# reference necessary includes from Tpm core library +target_link_libraries(Tpm_CryptoLib_Math_Ossl PUBLIC TpmConfiguration) +target_link_libraries(Tpm_CryptoLib_Math_Ossl PUBLIC Tpm_Public_Headers) +target_link_libraries(Tpm_CryptoLib_Math_Ossl PUBLIC Tpm_CryptoLib_TpmBigNum_Headers) + +# get access to the private TPM headers directly so they don't show up in the +# usage attributes. Using an INTERFACE library (Tpm_Private_Headers) doesn't allow +# private inheritance +target_include_directories(Tpm_CryptoLib_Math_Ossl PRIVATE + ../../include +) + +target_sources(Tpm_CryptoLib_Math_Ossl PRIVATE + "BnToOsslMath.c" + "TpmToOsslSupport.c" +) + +# include files will be referenced relative to the . +# for example, given this tree: +# C:\tpm\cryptolibs\Ossl +# │ BnToOsslMath.c +# │ +# └───include (*) +# └───Ossl +# BnToOsslMath.h +# +# Then, the correct include directory for the project is the include folder +# marked with an (*) +target_include_directories(Tpm_CryptoLib_Math_Ossl PUBLIC + "$" + "$" +) + +if (WIN32) + + cmake_path(RELATIVE_PATH OSSL_INCLUDE_SUBDIR + BASE_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} + OUTPUT_VARIABLE rel_ossl) + + cmake_path(ABSOLUTE_PATH rel_ossl + BASE_DIRECTORY ${CMAKE_INSTALL_INCLUDEDIR} + OUTPUT_VARIABLE OSSL_INCLUDE_SUBDIR2 + ) + + # don't provide the OpenSSL header directory on an INSTALL_INTERFACE basis. + # if a component is consuming from an install environment, it needs to + # provide a pointer to OpenSLL on Windows, and on Linux it's expected + # to be installed in the system standard location. + target_include_directories(Tpm_CryptoLib_Math_Ossl + PUBLIC + "$" + ) + target_link_libraries(Tpm_CryptoLib_Math_Ossl INTERFACE libcrypto) +else() + message(FATAL_ERROR "CMake not supported on Linux yet.") +# find_package(OpenSLL MODULE REQUIRED) +# target_link_libraries(Tpm_CryptoLib_Math_Ossl INTERFACE OpenSSL::Crypto) +endif() + +# create install and export information for downstream projects to use +install_and_export_config_targets(Tpm_CryptoLib_Math_Ossl) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## +# nothing to do + +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(Tpm_CryptoLib_Math_Ossl) diff --git a/TPMCmd/tpm/cryptolibs/Ossl/TpmToOsslSupport.c b/TPMCmd/tpm/cryptolibs/Ossl/TpmToOsslSupport.c new file mode 100644 index 00000000..ef88b1dc --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/Ossl/TpmToOsslSupport.c @@ -0,0 +1,112 @@ +//** Introduction +// +// The functions in this file are used for initialization of the interface to the +// OpenSSL library. + +//** Defines and Includes + +#include "BnOssl.h" +#include +#include +#include +#include +#include + +#if CRYPTO_LIB_REPORTING + +//*** OsslGetVersion() +// Report the version of OpenSSL. +void OsslGetVersion(_CRYPTO_IMPL_DESCRIPTION* result) +{ + snprintf(result->name, sizeof(result->name), "OpenSSL"); +# if defined(OPENSSL_VERSION_STR) + snprintf(result->version, sizeof(result->version), "%s", OPENSSL_VERSION_STR); +# else + // decode the hex version string according to the rules described in opensslv.h + snprintf(result->version, + sizeof(result->version), + "%d.%d.%d%c", + (unsigned char)((OPENSSL_VERSION_NUMBER >> 28) & 0x0f), + (unsigned char)((OPENSSL_VERSION_NUMBER >> 20) & 0xff), + (unsigned char)((OPENSSL_VERSION_NUMBER >> 12) & 0xff), + (char)((OPENSSL_VERSION_NUMBER >> 4) & 0xff) - 1 + 'a'); +# endif //OPENSSL_VERSION_STR +} + +#endif //CRYPTO_LIB_REPORTING + +#if defined(HASH_LIB_OSSL) || defined(MATH_LIB_OSSL) || defined(SYM_LIB_OSSL) +// Used to pass the pointers to the correct sub-keys +typedef const BYTE* desKeyPointers[3]; + +//*** BnSupportLibInit() +// This does any initialization required by the support library. +LIB_EXPORT int BnSupportLibInit(void) +{ + return TRUE; +} + +//*** OsslContextEnter() +// This function is used to initialize an OpenSSL context at the start of a function +// that will call to an OpenSSL math function. +BN_CTX* OsslContextEnter(void) +{ + BN_CTX* CTX = BN_CTX_new(); + // + return OsslPushContext(CTX); +} + +//*** OsslContextLeave() +// This is the companion function to OsslContextEnter(). +void OsslContextLeave(BN_CTX* CTX) +{ + OsslPopContext(CTX); + BN_CTX_free(CTX); +} + +//*** OsslPushContext() +// This function is used to create a frame in a context. All values allocated within +// this context after the frame is started will be automatically freed when the +// context (OsslPopContext() +BN_CTX* OsslPushContext(BN_CTX* CTX) +{ + if(CTX == NULL) + FAIL(FATAL_ERROR_ALLOCATION); + BN_CTX_start(CTX); + return CTX; +} + +//*** OsslPopContext() +// This is the companion function to OsslPushContext(). +void OsslPopContext(BN_CTX* CTX) +{ + // BN_CTX_end can't be called with NULL. It will blow up. + if(CTX != NULL) + BN_CTX_end(CTX); +} + +# if CRYPTO_LIB_REPORTING + +# if defined(SYM_LIB_OSSL) && SIMULATION && CRYPTO_LIB_REPORTING +//*** _crypto_GetSymImpl() +// Report the version of OpenSSL being used for symmetric crypto. +void _crypto_GetSymImpl(_CRYPTO_IMPL_DESCRIPTION* result) +{ + OsslGetVersion(result); +} +# else +# error huh? +# endif // defined(SYM_LIB_OSSL) && SIMULATION + +# if defined(HASH_LIB_OSSL) && SIMULATION && CRYPTO_LIB_REPORTING +//*** _crypto_GetHashImpl() +// Report the version of OpenSSL being used for hashing. +void _crypto_GetHashImpl(_CRYPTO_IMPL_DESCRIPTION* result) +{ + OsslGetVersion(result); +} +# endif // defined(HASH_LIB_OSSL) && SIMULATION + +# endif // CRYPTO_LIB_REPORTING + +#endif // HASH_LIB_OSSL || MATH_LIB_OSSL || SYM_LIB_OSSL diff --git a/TPMCmd/tpm/cryptolibs/Ossl/include/BnOssl.h b/TPMCmd/tpm/cryptolibs/Ossl/include/BnOssl.h new file mode 100644 index 00000000..b89ac7c5 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/Ossl/include/BnOssl.h @@ -0,0 +1,26 @@ +//** Introduction +// This file contains the headers necessary to build the Open SSL support for +// the TpmBigNum library. +#ifndef _BNOSSL_H_ +#define _BNOSSL_H_ +// TODO_RENAME_INC_FOLDER: public refers to the TPM_CoreLib public headers +#include +#include +#include +// TODO_RENAME_INC_FOLDER: these refer to TpmBigNum protected headers +#include +#include +#include +#include +#include + +#if CRYPTO_LIB_REPORTING +# include + +//*** OsslGetVersion() +// Report the current version of OpenSSL. +void OsslGetVersion(_CRYPTO_IMPL_DESCRIPTION* result); + +#endif // CRYPTO_LIB_REPORTING + +#endif // _BNOSSL_H_ diff --git a/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/BnToOsslMath.h b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/BnToOsslMath.h new file mode 100644 index 00000000..6c73a452 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/BnToOsslMath.h @@ -0,0 +1,96 @@ +//** Introduction +// This file contains OpenSSL specific functions called by TpmBigNum library to provide +// the TpmBigNum + OpenSSL math support. + +#ifndef _BN_TO_OSSL_MATH_H_ +#define _BN_TO_OSSL_MATH_H_ + +#define MATH_LIB_OSSL + +// Require TPM Big Num types +#if !defined(MATH_LIB_TPMBIGNUM) && !defined(_BNOSSL_H_) +# error this OpenSSL Interface expects to be used from TpmBigNum +#endif + +#include +#include +#include +#include + +#if OPENSSL_VERSION_NUMBER >= 0x30100000L +// Check the bignum_st definition against the one below and either update the +// version check or provide the new definition for this version. +# error Untested OpenSSL version +#elif OPENSSL_VERSION_NUMBER >= 0x10100000L +// from crypto/bn/bn_lcl.h (OpenSSL 1.x) or crypto/bn/bn_local.h (OpenSSL 3.0) +struct bignum_st +{ + BN_ULONG* d; /* Pointer to an array of 'BN_BITS2' bit + * chunks. */ + int top; /* Index of last used d +1. */ + /* The next are internal book keeping for bn_expand. */ + int dmax; /* Size of the d array. */ + int neg; /* one if the number is negative */ + int flags; +}; +#else +# define EC_POINT_get_affine_coordinates EC_POINT_get_affine_coordinates_GFp +# define EC_POINT_set_affine_coordinates EC_POINT_set_affine_coordinates_GFp +#endif // OPENSSL_VERSION_NUMBER + +//** Macros and Defines + +// Make sure that the library is using the correct size for a crypt word +#if defined THIRTY_TWO_BIT && (RADIX_BITS != 32) \ + || ((defined SIXTY_FOUR_BIT_LONG || defined SIXTY_FOUR_BIT) \ + && (RADIX_BITS != 64)) +# error Ossl library is using different radix +#endif + +// Allocate a local BIGNUM value. For the allocation, a bigNum structure is created +// as is a local BIGNUM. The bigNum is initialized and then the BIGNUM is +// set to reference the local value. +#define BIG_VAR(name, bits) \ + BN_VAR(name##Bn, (bits)); \ + BIGNUM _##name; \ + BIGNUM* name = BigInitialized( \ + &_##name, BnInit(name##Bn, BYTES_TO_CRYPT_WORDS(sizeof(_##name##Bn.d)))) + +// Allocate a BIGNUM and initialize with the values in a bigNum initializer +#define BIG_INITIALIZED(name, initializer) \ + BIGNUM _##name; \ + BIGNUM* name = BigInitialized(&_##name, initializer) + +typedef struct +{ + const TPMBN_ECC_CURVE_CONSTANTS* C; // the TPM curve values + EC_GROUP* G; // group parameters + BN_CTX* CTX; // the context for the math (this might not be + // the context in which the curve was created>; +} OSSL_CURVE_DATA; + +// Define the curve data type expected by the TpmBigNum library: +typedef OSSL_CURVE_DATA bigCurveData; + +TPM_INLINE const TPMBN_ECC_CURVE_CONSTANTS* AccessCurveConstants( + const bigCurveData* E) +{ + return E->C; +} + +#include + +// Start and end a context within which the OpenSSL memory management works +#define OSSL_ENTER() BN_CTX* CTX = OsslContextEnter() +#define OSSL_LEAVE() OsslContextLeave(CTX) + +// Start and end a local stack frame within the context of the curve frame +#define ECC_ENTER() BN_CTX* CTX = OsslPushContext(E->CTX) +#define ECC_LEAVE() OsslPopContext(CTX) + +#define BN_NEW() BnNewVariable(CTX) + +// This definition would change if there were something to report +#define MathLibSimulationEnd() + +#endif // _BN_TO_OSSL_MATH_H_ diff --git a/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/BnToOsslMath_fp.h b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/BnToOsslMath_fp.h new file mode 100644 index 00000000..a90a5e1f --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/BnToOsslMath_fp.h @@ -0,0 +1,28 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Oct 24, 2019 Time: 11:37:07AM + */ + +#ifndef _BN_TO_OSSL_MATH_FP_H_ +#define _BN_TO_OSSL_MATH_FP_H_ + +#ifdef MATH_LIB_OSSL + +//*** OsslToTpmBn() +// This function converts an OpenSSL BIGNUM to a TPM bigNum. In this implementation +// it is assumed that OpenSSL uses a different control structure but the same data +// layout -- an array of native-endian words in little-endian order. +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure because value will not fit or OpenSSL variable doesn't +// exist +BOOL OsslToTpmBn(bigNum bn, BIGNUM* osslBn); + +//*** BigInitialized() +// This function initializes an OSSL BIGNUM from a TPM bigConst. Do not use this for +// values that are passed to OpenSLL when they are not declared as const in the +// function prototype. Instead, use BnNewVariable(). +BIGNUM* BigInitialized(BIGNUM* toInit, bigConst initializer); +#endif // MATHLIB OSSL + +#endif // _TPM_TO_OSSL_MATH_FP_H_ diff --git a/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/CMakeLists.txt b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/CMakeLists.txt new file mode 100644 index 00000000..c7b18695 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/CMakeLists.txt @@ -0,0 +1,37 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +project(Tpm_CryptoLib_Ossl_Headers VERSION 1.0) +print_project_info() +add_library(Tpm_CryptoLib_Math_Ossl_Headers INTERFACE) +add_library(Tpm_CryptoLib_Math_Ossl_Headers::Tpm_CryptoLib_Math_Ossl_Headers ALIAS Tpm_CryptoLib_Math_Ossl_Headers) +add_library(Tpm_CryptoLib_Symmetric_Ossl_Headers ALIAS Tpm_CryptoLib_Math_Ossl_Headers) +add_library(Tpm_CryptoLib_Hash_Ossl_Headers ALIAS Tpm_CryptoLib_Math_Ossl_Headers) + +target_include_directories(Tpm_CryptoLib_Math_Ossl_Headers + INTERFACE + "$" + "$" +) + +# create install and export information for downstream projects to use +install_and_export_config_targets(Tpm_CryptoLib_Math_Ossl_Headers) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## + +install(FILES + ${CMAKE_CURRENT_SOURCE_DIR}/BnToOsslMath.h + ${CMAKE_CURRENT_SOURCE_DIR}/BnToOsslMath_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt + ${CMAKE_CURRENT_SOURCE_DIR}/TpmToOsslHash.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmToOsslSupport_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmToOsslSym.h + DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/Ossl +) + +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(Tpm_CryptoLib_Math_Ossl_Headers) diff --git a/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/TpmToOsslHash.h b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/TpmToOsslHash.h new file mode 100644 index 00000000..843b9cd4 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/TpmToOsslHash.h @@ -0,0 +1,163 @@ +//** Introduction +// +// This header file is used to 'splice' the OpenSSL hash code into the TPM code. +// +#ifndef HASH_LIB_DEFINED +#define HASH_LIB_DEFINED + +#define HASH_LIB_OSSL + +#include +#include + +#if ALG_SM3_256 +# if defined(OPENSSL_NO_SM3) || OPENSSL_VERSION_NUMBER < 0x10101010L +# error "Current version of OpenSSL doesn't support SM3" +# elif OPENSSL_VERSION_NUMBER >= 0x10200000L +# include +# else +// OpenSSL 1.1.1 keeps smX.h headers in the include/crypto directory, +// and they do not get installed as part of the libssl package +# define SM3_LBLOCK (64 / 4) + +typedef struct SM3state_st +{ + unsigned int A, B, C, D, E, F, G, H; + unsigned int Nl, Nh; + unsigned int data[SM3_LBLOCK]; + unsigned int num; +} SM3_CTX; + +int sm3_init(SM3_CTX* c); +int sm3_update(SM3_CTX* c, const void* data, size_t len); +int sm3_final(unsigned char* md, SM3_CTX* c); +# endif // OpenSSL < 1.2 +#endif // ALG_SM3_256 + +#include + +//*************************************************************** +//** Links to the OpenSSL HASH code +//*************************************************************** + +// Redefine the internal name used for each of the hash state structures to the +// name used by the library. +// These defines need to be known in all parts of the TPM so that the structure +// sizes can be properly computed when needed. +#define tpmHashStateSHA1_t SHA_CTX +#define tpmHashStateSHA256_t SHA256_CTX +#define tpmHashStateSHA384_t SHA512_CTX +#define tpmHashStateSHA512_t SHA512_CTX +#define tpmHashStateSM3_256_t SM3_CTX + +// The defines below are only needed when compiling CryptHash.c or CryptSmac.c. +// This isolation is primarily to avoid name space collision. However, if there +// is a real collision, it will likely show up when the linker tries to put things +// together. + +#ifdef _CRYPT_HASH_C_ + +typedef BYTE* PBYTE; +typedef const BYTE* PCBYTE; + +// Define the interface between CryptHash.c to the functions provided by the +// library. For each method, define the calling parameters of the method and then +// define how the method is invoked in CryptHash.c. +// +// All hashes are required to have the same calling sequence. If they don't, create +// a simple adaptation function that converts from the "standard" form of the call +// to the form used by the specific hash (and then send a nasty letter to the +// person who wrote the hash function for the library). +// +// The macro that calls the method also defines how the +// parameters get swizzled between the default form (in CryptHash.c)and the +// library form. +// +// Initialize the hash context +# define HASH_START_METHOD_DEF void(HASH_START_METHOD)(PANY_HASH_STATE state) +# define HASH_START(hashState) ((hashState)->def->method.start)(&(hashState)->state); + +// Add data to the hash +# define HASH_DATA_METHOD_DEF \ + void(HASH_DATA_METHOD)(PANY_HASH_STATE state, PCBYTE buffer, size_t size) +# define HASH_DATA(hashState, dInSize, dIn) \ + ((hashState)->def->method.data)(&(hashState)->state, dIn, dInSize) + +// Finalize the hash and get the digest +# define HASH_END_METHOD_DEF \ + void(HASH_END_METHOD)(BYTE * buffer, PANY_HASH_STATE state) +# define HASH_END(hashState, buffer) \ + ((hashState)->def->method.end)(buffer, &(hashState)->state) + +// Copy the hash context +// Note: For import, export, and copy, memcpy() is used since there is no +// reformatting necessary between the internal and external forms. +# define HASH_STATE_COPY_METHOD_DEF \ + void(HASH_STATE_COPY_METHOD)( \ + PANY_HASH_STATE to, PCANY_HASH_STATE from, size_t size) +# define HASH_STATE_COPY(hashStateOut, hashStateIn) \ + ((hashStateIn)->def->method.copy)(&(hashStateOut)->state, \ + &(hashStateIn)->state, \ + (hashStateIn)->def->contextSize) + +// Copy (with reformatting when necessary) an internal hash structure to an +// external blob +# define HASH_STATE_EXPORT_METHOD_DEF \ + void(HASH_STATE_EXPORT_METHOD)(BYTE * to, PCANY_HASH_STATE from, size_t size) +# define HASH_STATE_EXPORT(to, hashStateFrom) \ + ((hashStateFrom)->def->method.copyOut)( \ + &(((BYTE*)(to))[offsetof(HASH_STATE, state)]), \ + &(hashStateFrom)->state, \ + (hashStateFrom)->def->contextSize) + +// Copy from an external blob to an internal formate (with reformatting when +// necessary +# define HASH_STATE_IMPORT_METHOD_DEF \ + void(HASH_STATE_IMPORT_METHOD)( \ + PANY_HASH_STATE to, const BYTE* from, size_t size) +# define HASH_STATE_IMPORT(hashStateTo, from) \ + ((hashStateTo)->def->method.copyIn)( \ + &(hashStateTo)->state, \ + &(((const BYTE*)(from))[offsetof(HASH_STATE, state)]), \ + (hashStateTo)->def->contextSize) + +// Function aliases. The code in CryptHash.c uses the internal designation for the +// functions. These need to be translated to the function names of the library. +# define tpmHashStart_SHA1 SHA1_Init +# define tpmHashData_SHA1 SHA1_Update +# define tpmHashEnd_SHA1 SHA1_Final +# define tpmHashStateCopy_SHA1 memcpy +# define tpmHashStateExport_SHA1 memcpy +# define tpmHashStateImport_SHA1 memcpy +# define tpmHashStart_SHA256 SHA256_Init +# define tpmHashData_SHA256 SHA256_Update +# define tpmHashEnd_SHA256 SHA256_Final +# define tpmHashStateCopy_SHA256 memcpy +# define tpmHashStateExport_SHA256 memcpy +# define tpmHashStateImport_SHA256 memcpy +# define tpmHashStart_SHA384 SHA384_Init +# define tpmHashData_SHA384 SHA384_Update +# define tpmHashEnd_SHA384 SHA384_Final +# define tpmHashStateCopy_SHA384 memcpy +# define tpmHashStateExport_SHA384 memcpy +# define tpmHashStateImport_SHA384 memcpy +# define tpmHashStart_SHA512 SHA512_Init +# define tpmHashData_SHA512 SHA512_Update +# define tpmHashEnd_SHA512 SHA512_Final +# define tpmHashStateCopy_SHA512 memcpy +# define tpmHashStateExport_SHA512 memcpy +# define tpmHashStateImport_SHA512 memcpy +# define tpmHashStart_SM3_256 sm3_init +# define tpmHashData_SM3_256 sm3_update +# define tpmHashEnd_SM3_256 sm3_final +# define tpmHashStateCopy_SM3_256 memcpy +# define tpmHashStateExport_SM3_256 memcpy +# define tpmHashStateImport_SM3_256 memcpy + +#endif // _CRYPT_HASH_C_ + +#define LibHashInit() +// This definition would change if there were something to report +#define HashLibSimulationEnd() + +#endif // HASH_LIB_DEFINED diff --git a/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/TpmToOsslSupport_fp.h b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/TpmToOsslSupport_fp.h new file mode 100644 index 00000000..7975ce59 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/TpmToOsslSupport_fp.h @@ -0,0 +1,35 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _TPM_TO_OSSL_SUPPORT_FP_H_ +#define _TPM_TO_OSSL_SUPPORT_FP_H_ + +#if defined(HASH_LIB_OSSL) || defined(MATH_LIB_OSSL) || defined(SYM_LIB_OSSL) + +//*** BnSupportLibInit() +// This does any initialization required by the support library. +LIB_EXPORT int BnSupportLibInit(void); + +//*** OsslContextEnter() +// This function is used to initialize an OpenSSL context at the start of a function +// that will call to an OpenSSL math function. +BN_CTX* OsslContextEnter(void); + +//*** OsslContextLeave() +// This is the companion function to OsslContextEnter(). +void OsslContextLeave(BN_CTX* CTX); + +//*** OsslPushContext() +// This function is used to create a frame in a context. All values allocated within +// this context after the frame is started will be automatically freed when the +// context (OsslPopContext() +BN_CTX* OsslPushContext(BN_CTX* CTX); + +//*** OsslPopContext() +// This is the companion function to OsslPushContext(). +void OsslPopContext(BN_CTX* CTX); +#endif // HASH_LIB_OSSL || MATH_LIB_OSSL || SYM_LIB_OSSL + +#endif // _TPM_TO_OSSL_SUPPORT_FP_H_ diff --git a/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/TpmToOsslSym.h b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/TpmToOsslSym.h new file mode 100644 index 00000000..3ec3b4d9 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/Ossl/include/Ossl/TpmToOsslSym.h @@ -0,0 +1,122 @@ +//** Introduction +// +// This header file is used to 'splice' the OpenSSL library into the TPM code. +// +// The support required of a library are a hash module, a block cipher module and +// portions of a big number library. + +// All of the library-dependent headers should have the same guard to that only the +// first one gets defined. +#ifndef SYM_LIB_DEFINED +#define SYM_LIB_DEFINED + +#define SYM_LIB_OSSL + +#include + +#if ALG_SM4 +# if defined(OPENSSL_NO_SM4) || OPENSSL_VERSION_NUMBER < 0x10101010L +# error "Current version of OpenSSL doesn't support SM4" +# elif OPENSSL_VERSION_NUMBER >= 0x10200000L +# include +# else +// OpenSSL 1.1.1 keeps smX.h headers in the include/crypto directory, +// and they do not get installed as part of the libssl package + +# define SM4_KEY_SCHEDULE 32 + +typedef struct SM4_KEY_st +{ + uint32_t rk[SM4_KEY_SCHEDULE]; +} SM4_KEY; + +int SM4_set_key(const uint8_t* key, SM4_KEY* ks); +void SM4_encrypt(const uint8_t* in, uint8_t* out, const SM4_KEY* ks); +void SM4_decrypt(const uint8_t* in, uint8_t* out, const SM4_KEY* ks); +# endif // OpenSSL < 1.2 +#endif // ALG_SM4 + +#if ALG_CAMELLIA +# include +#endif + +#include +#include + +//*************************************************************** +//** Links to the OpenSSL symmetric algorithms. +//*************************************************************** + +// The Crypt functions that call the block encryption function use the parameters +// in the order: +// 1) keySchedule +// 2) in buffer +// 3) out buffer +// Since open SSL uses the order in encryptoCall_t above, need to swizzle the +// values to the order required by the library. +#define SWIZZLE(keySchedule, in, out) \ + (const BYTE*)(in), (BYTE*)(out), (void*)(keySchedule) + +// Define the order of parameters to the library functions that do block encryption +// and decryption. +typedef void (*TpmCryptSetSymKeyCall_t)(const BYTE* in, BYTE* out, void* keySchedule); + +//*************************************************************** +//** Links to the OpenSSL AES code +//*************************************************************** +// Macros to set up the encryption/decryption key schedules +// +// AES: +#define TpmCryptSetEncryptKeyAES(key, keySizeInBits, schedule) \ + AES_set_encrypt_key((key), (keySizeInBits), (tpmKeyScheduleAES*)(schedule)) +#define TpmCryptSetDecryptKeyAES(key, keySizeInBits, schedule) \ + AES_set_decrypt_key((key), (keySizeInBits), (tpmKeyScheduleAES*)(schedule)) + +// Macros to alias encryption calls to specific algorithms. This should be used +// sparingly. Currently, only used by CryptSym.c and CryptRand.c +// +// When using these calls, to call the AES block encryption code, the caller +// should use: +// TpmCryptEncryptAES(SWIZZLE(keySchedule, in, out)); +#define TpmCryptEncryptAES AES_encrypt +#define TpmCryptDecryptAES AES_decrypt +#define tpmKeyScheduleAES AES_KEY + +//*************************************************************** +//** Links to the OpenSSL SM4 code +//*************************************************************** +// Macros to set up the encryption/decryption key schedules +#define TpmCryptSetEncryptKeySM4(key, keySizeInBits, schedule) \ + SM4_set_key((key), (tpmKeyScheduleSM4*)(schedule)) +#define TpmCryptSetDecryptKeySM4(key, keySizeInBits, schedule) \ + SM4_set_key((key), (tpmKeyScheduleSM4*)(schedule)) + +// Macros to alias encryption calls to specific algorithms. This should be used +// sparingly. +#define TpmCryptEncryptSM4 SM4_encrypt +#define TpmCryptDecryptSM4 SM4_decrypt +#define tpmKeyScheduleSM4 SM4_KEY + +//*************************************************************** +//** Links to the OpenSSL CAMELLIA code +//*************************************************************** +// Macros to set up the encryption/decryption key schedules +#define TpmCryptSetEncryptKeyCAMELLIA(key, keySizeInBits, schedule) \ + Camellia_set_key((key), (keySizeInBits), (tpmKeyScheduleCAMELLIA*)(schedule)) +#define TpmCryptSetDecryptKeyCAMELLIA(key, keySizeInBits, schedule) \ + Camellia_set_key((key), (keySizeInBits), (tpmKeyScheduleCAMELLIA*)(schedule)) + +// Macros to alias encryption calls to specific algorithms. This should be used +// sparingly. +#define TpmCryptEncryptCAMELLIA Camellia_encrypt +#define TpmCryptDecryptCAMELLIA Camellia_decrypt +#define tpmKeyScheduleCAMELLIA CAMELLIA_KEY + +// Forward reference + +typedef union tpmCryptKeySchedule_t tpmCryptKeySchedule_t; + +// This definition would change if there were something to report +#define SymLibSimulationEnd() + +#endif // SYM_LIB_DEFINED diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/BnConvert.c b/TPMCmd/tpm/cryptolibs/TpmBigNum/BnConvert.c new file mode 100644 index 00000000..87bee07e --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/BnConvert.c @@ -0,0 +1,205 @@ +//** Introduction +// This file contains the basic conversion functions that will convert TPM2B +// to/from the internal format. The internal format is a bigNum, +// + +//** Includes + +#include "TpmBigNum.h" + +//** Functions + +//*** BnFromBytes() +// This function will convert a big-endian byte array to the internal number +// format. If bn is NULL, then the output is NULL. If bytes is null or the +// required size is 0, then the output is set to zero +LIB_EXPORT bigNum BnFromBytes(bigNum bn, const BYTE* bytes, NUMBYTES nBytes) +{ + const BYTE* pFrom; // 'p' points to the least significant bytes of source + BYTE* pTo; // points to least significant bytes of destination + crypt_uword_t size; + // + + size = (bytes != NULL) ? BYTES_TO_CRYPT_WORDS(nBytes) : 0; + + // If nothing in, nothing out + if(bn == NULL) + return NULL; + + // make sure things fit + pAssert(BnGetAllocated(bn) >= size); + + if(size > 0) + { + // Clear the topmost word in case it is not filled with data + bn->d[size - 1] = 0; + // Moving the input bytes from the end of the list (LSB) end + pFrom = bytes + nBytes - 1; + // To the LS0 of the LSW of the bigNum. + pTo = (BYTE*)bn->d; + for(; nBytes != 0; nBytes--) + *pTo++ = *pFrom--; + // For a little-endian machine, the conversion is a straight byte + // reversal. For a big-endian machine, we have to put the words in + // big-endian byte order +#if BIG_ENDIAN_TPM + { + crypt_word_t t; + for(t = (crypt_word_t)size - 1; t >= 0; t--) + bn->d[t] = SWAP_CRYPT_WORD(bn->d[t]); + } +#endif + } + BnSetTop(bn, size); + return bn; +} + +//*** BnFrom2B() +// Convert an TPM2B to a BIG_NUM. +// If the input value does not exist, or the output does not exist, or the input +// will not fit into the output the function returns NULL +LIB_EXPORT bigNum BnFrom2B(bigNum bn, // OUT: + const TPM2B* a2B // IN: number to convert +) +{ + if(a2B != NULL) + return BnFromBytes(bn, a2B->buffer, a2B->size); + // Make sure that the number has an initialized value rather than whatever + // was there before + BnSetTop(bn, 0); // Function accepts NULL + return NULL; +} + +//*** BnToBytes() +// This function converts a BIG_NUM to a byte array. It converts the bigNum to a +// big-endian byte string and sets 'size' to the normalized value. If 'size' is an +// input 0, then the receiving buffer is guaranteed to be large enough for the result +// and the size will be set to the size required for bigNum (leading zeros +// suppressed). +// +// The conversion for a little-endian machine simply requires that all significant +// bytes of the bigNum be reversed. For a big-endian machine, rather than +// unpack each word individually, the bigNum is converted to little-endian words, +// copied, and then converted back to big-endian. +LIB_EXPORT BOOL BnToBytes(bigConst bn, + BYTE* buffer, + NUMBYTES* size // This the number of bytes that are + // available in the buffer. The result + // should be this big. +) +{ + crypt_uword_t requiredSize; + BYTE* pFrom; + BYTE* pTo; + crypt_uword_t count; + // + // validate inputs + pAssert(bn && buffer && size); + + requiredSize = (BnSizeInBits(bn) + 7) / 8; + if(requiredSize == 0) + { + // If the input value is 0, return a byte of zero + *size = 1; + *buffer = 0; + } + else + { +#if BIG_ENDIAN_TPM + // Copy the constant input value into a modifiable value + BN_VAR(bnL, LARGEST_NUMBER_BITS * 2); + BnCopy(bnL, bn); + // byte swap the words in the local value to make them little-endian + for(count = 0; count < bnL->size; count++) + bnL->d[count] = SWAP_CRYPT_WORD(bnL->d[count]); + bn = (bigConst)bnL; +#endif + if(*size == 0) + *size = (NUMBYTES)requiredSize; + pAssert(requiredSize <= *size); + // Byte swap the number (not words but the whole value) + count = *size; + // Start from the least significant word and offset to the most significant + // byte which is in some high word + pFrom = (BYTE*)(&bn->d[0]) + requiredSize - 1; + pTo = buffer; + + // If the number of output bytes is larger than the number bytes required + // for the input number, pad with zeros + for(count = *size; count > requiredSize; count--) + *pTo++ = 0; + // Move the most significant byte at the end of the BigNum to the next most + // significant byte position of the 2B and repeat for all significant bytes. + for(; requiredSize > 0; requiredSize--) + *pTo++ = *pFrom--; + } + return TRUE; +} + +//*** BnTo2B() +// Function to convert a BIG_NUM to TPM2B. +// The TPM2B size is set to the requested 'size' which may require padding. +// If 'size' is non-zero and less than required by the value in 'bn' then an error +// is returned. If 'size' is zero, then the TPM2B is assumed to be large enough +// for the data and a2b->size will be adjusted accordingly. +LIB_EXPORT BOOL BnTo2B(bigConst bn, // IN: + TPM2B* a2B, // OUT: + NUMBYTES size // IN: the desired size +) +{ + // Set the output size + if(bn && a2B) + { + a2B->size = size; + return BnToBytes(bn, a2B->buffer, &a2B->size); + } + return FALSE; +} + +#if ALG_ECC + +//*** BnPointFromBytes() +// Function to create a BIG_POINT structure from a byte buffer in big-endian order. +// A point is going to be two ECC values in the same buffer. The values are going +// to be the size of the modulus. They are in modular form. +LIB_EXPORT bn_point_t* BnPointFromBytes( + bigPoint ecP, // OUT: the preallocated point structure + const BYTE* x, + NUMBYTES nBytesX, + const BYTE* y, + NUMBYTES nBytesY) +{ + if(x == NULL || y == NULL) + return NULL; + + if(NULL != ecP) + { + BnFromBytes(ecP->x, x, nBytesX); + BnFromBytes(ecP->y, y, nBytesY); + BnSetWord(ecP->z, 1); + } + return ecP; +} + +//*** BnPointToBytes() +// This function extracts coordinates from a BIG_POINT into +// most-significant-byte-first memory buffers (the native format of +// a TPMS_ECC_POINT.) +// on input the NUMBYTES* parameters indicate the maximum buffer size. +// on output, they represent the amount of significant data in that buffer. +LIB_EXPORT BOOL BnPointToBytes( + pointConst ecP, // OUT: the preallocated point structure + BYTE* x, + NUMBYTES* pBytesX, + BYTE* y, + NUMBYTES* pBytesY) +{ + pAssert(ecP && x && y && pBytesX && pBytesY); + pAssert(BnEqualWord(ecP->z, 1)); + BOOL result = BnToBytes(ecP->x, x, pBytesX); + result = result && BnToBytes(ecP->y, y, pBytesY); + // TODO: zeroize on error? + return result; +} + +#endif // ALG_ECC \ No newline at end of file diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/BnEccConstants.c b/TPMCmd/tpm/cryptolibs/TpmBigNum/BnEccConstants.c new file mode 100644 index 00000000..1f4cf558 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/BnEccConstants.c @@ -0,0 +1,190 @@ +/*(Auto-generated) + * Created by TpmStructures; Version 4.4 Mar 26, 2019 + * Date: Aug 30, 2019 Time: 02:11:52PM + */ +#include "TpmBigNum.h" +//#include "Tpm.h" +// TODO_RENAME_INC_FOLDER:private refers to the TPM_CoreLib private headers +#include + +#if ALG_ECC + +// define macros expected by EccConstantData to convert the data to BigNum format + +# define TO_ECC_64 TO_CRYPT_WORD_64 +# define TO_ECC_56(a, b, c, d, e, f, g) TO_ECC_64(0, a, b, c, d, e, f, g) +# define TO_ECC_48(a, b, c, d, e, f) TO_ECC_64(0, 0, a, b, c, d, e, f) +# define TO_ECC_40(a, b, c, d, e) TO_ECC_64(0, 0, 0, a, b, c, d, e) +# if RADIX_BITS > 32 +# define TO_ECC_32(a, b, c, d) TO_ECC_64(0, 0, 0, 0, a, b, c, d) +# define TO_ECC_24(a, b, c) TO_ECC_64(0, 0, 0, 0, 0, a, b, c) +# define TO_ECC_16(a, b) TO_ECC_64(0, 0, 0, 0, 0, 0, a, b) +# define TO_ECC_8(a) TO_ECC_64(0, 0, 0, 0, 0, 0, 0, a) +# else // RADIX_BITS == 32 +# define TO_ECC_32 BIG_ENDIAN_BYTES_TO_UINT32 +# define TO_ECC_24(a, b, c) TO_ECC_32(0, a, b, c) +# define TO_ECC_16(a, b) TO_ECC_32(0, 0, a, b) +# define TO_ECC_8(a) TO_ECC_32(0, 0, 0, a) +# endif +# define TO_ECC_192(a, b, c) c, b, a +# define TO_ECC_224(a, b, c, d) d, c, b, a +# define TO_ECC_256(a, b, c, d) d, c, b, a +# define TO_ECC_384(a, b, c, d, e, f) f, e, d, c, b, a +# define TO_ECC_528(a, b, c, d, e, f, g, h, i) i, h, g, f, e, d, c, b, a +# define TO_ECC_640(a, b, c, d, e, f, g, h, i, j) j, i, h, g, f, e, d, c, b, a + +# define BN_MIN_ALLOC(bytes) \ + (BYTES_TO_CRYPT_WORDS(bytes) == 0) ? 1 : BYTES_TO_CRYPT_WORDS(bytes) +# define ECC_CONST(NAME, bytes, initializer) \ + const struct \ + { \ + crypt_uword_t allocate, size, d[BN_MIN_ALLOC(bytes)]; \ + } NAME = {BN_MIN_ALLOC(bytes), BYTES_TO_CRYPT_WORDS(bytes), {initializer}} + +// This file contains the raw data for ECC curve constants. The data is wrapped +// in macros so this file can be included in other files that format the data in +// a memory format desired by the user. This file itself is never used alone. +# include + +// now define the TPMBN_ECC_CURVE_CONSTANTS objects for the known curves + +# if ECC_NIST_P192 +const TPMBN_ECC_CURVE_CONSTANTS NIST_P192 = {TPM_ECC_NIST_P192, + (bigNum)&NIST_P192_p, + (bigNum)&NIST_P192_n, + (bigNum)&NIST_P192_h, + (bigNum)&NIST_P192_a, + (bigNum)&NIST_P192_b, + {(bigNum)&NIST_P192_gX, + (bigNum)&NIST_P192_gY, + (bigNum)&NIST_P192_gZ}}; +# endif // ECC_NIST_P192 + +# if ECC_NIST_P224 +const TPMBN_ECC_CURVE_CONSTANTS NIST_P224 = {TPM_ECC_NIST_P224, + (bigNum)&NIST_P224_p, + (bigNum)&NIST_P224_n, + (bigNum)&NIST_P224_h, + (bigNum)&NIST_P224_a, + (bigNum)&NIST_P224_b, + {(bigNum)&NIST_P224_gX, + (bigNum)&NIST_P224_gY, + (bigNum)&NIST_P224_gZ}}; +# endif // ECC_NIST_P224 + +# if ECC_NIST_P256 +const TPMBN_ECC_CURVE_CONSTANTS NIST_P256 = {TPM_ECC_NIST_P256, + (bigNum)&NIST_P256_p, + (bigNum)&NIST_P256_n, + (bigNum)&NIST_P256_h, + (bigNum)&NIST_P256_a, + (bigNum)&NIST_P256_b, + {(bigNum)&NIST_P256_gX, + (bigNum)&NIST_P256_gY, + (bigNum)&NIST_P256_gZ}}; +# endif // ECC_NIST_P256 + +# if ECC_NIST_P384 +const TPMBN_ECC_CURVE_CONSTANTS NIST_P384 = {TPM_ECC_NIST_P384, + (bigNum)&NIST_P384_p, + (bigNum)&NIST_P384_n, + (bigNum)&NIST_P384_h, + (bigNum)&NIST_P384_a, + (bigNum)&NIST_P384_b, + {(bigNum)&NIST_P384_gX, + (bigNum)&NIST_P384_gY, + (bigNum)&NIST_P384_gZ}}; +# endif // ECC_NIST_P384 + +# if ECC_NIST_P521 +const TPMBN_ECC_CURVE_CONSTANTS NIST_P521 = {TPM_ECC_NIST_P521, + (bigNum)&NIST_P521_p, + (bigNum)&NIST_P521_n, + (bigNum)&NIST_P521_h, + (bigNum)&NIST_P521_a, + (bigNum)&NIST_P521_b, + {(bigNum)&NIST_P521_gX, + (bigNum)&NIST_P521_gY, + (bigNum)&NIST_P521_gZ}}; +# endif // ECC_NIST_P521 + +# if ECC_BN_P256 +const TPMBN_ECC_CURVE_CONSTANTS BN_P256 = {TPM_ECC_BN_P256, + (bigNum)&BN_P256_p, + (bigNum)&BN_P256_n, + (bigNum)&BN_P256_h, + (bigNum)&BN_P256_a, + (bigNum)&BN_P256_b, + {(bigNum)&BN_P256_gX, + (bigNum)&BN_P256_gY, + (bigNum)&BN_P256_gZ}}; +# endif // ECC_BN_P256 + +# if ECC_BN_P638 +const TPMBN_ECC_CURVE_CONSTANTS BN_P638 = {TPM_ECC_BN_P638, + (bigNum)&BN_P638_p, + (bigNum)&BN_P638_n, + (bigNum)&BN_P638_h, + (bigNum)&BN_P638_a, + (bigNum)&BN_P638_b, + {(bigNum)&BN_P638_gX, + (bigNum)&BN_P638_gY, + (bigNum)&BN_P638_gZ}}; +# endif // ECC_BN_P638 + +# if ECC_SM2_P256 +const TPMBN_ECC_CURVE_CONSTANTS SM2_P256 = {TPM_ECC_SM2_P256, + (bigNum)&SM2_P256_p, + (bigNum)&SM2_P256_n, + (bigNum)&SM2_P256_h, + (bigNum)&SM2_P256_a, + (bigNum)&SM2_P256_b, + {(bigNum)&SM2_P256_gX, + (bigNum)&SM2_P256_gY, + (bigNum)&SM2_P256_gZ}}; +# endif // ECC_SM2_P256 + +# define comma +const TPMBN_ECC_CURVE_CONSTANTS* bnEccCurveData[] = { +# if ECC_NIST_P192 + &NIST_P192, +# endif +# if ECC_NIST_P224 + &NIST_P224, +# endif +# if ECC_NIST_P256 + &NIST_P256, +# endif +# if ECC_NIST_P384 + &NIST_P384, +# endif +# if ECC_NIST_P521 + &NIST_P521, +# endif +# if ECC_BN_P256 + &BN_P256, +# endif +# if ECC_BN_P638 + &BN_P638, +# endif +# if ECC_SM2_P256 + &SM2_P256, +# endif +}; + +MUST_BE((sizeof(bnEccCurveData) / sizeof(bnEccCurveData[0])) == (ECC_CURVE_COUNT)); + +//*** BnGetCurveData() +// This function returns the pointer for the constant parameter data +// associated with a curve. +const TPMBN_ECC_CURVE_CONSTANTS* BnGetCurveData(TPM_ECC_CURVE curveId) +{ + for(int i = 0; i < ECC_CURVE_COUNT; i++) + { + if(bnEccCurveData[i]->curveId == curveId) + return bnEccCurveData[i]; + } + return NULL; +} + +#endif // TPM_ALG_ECC diff --git a/TPMCmd/tpm/src/crypt/BnMath.c b/TPMCmd/tpm/cryptolibs/TpmBigNum/BnMath.c similarity index 77% rename from TPMCmd/tpm/src/crypt/BnMath.c rename to TPMCmd/tpm/cryptolibs/TpmBigNum/BnMath.c index d6f69a31..b6c1b5a1 100644 --- a/TPMCmd/tpm/src/crypt/BnMath.c +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/BnMath.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // The simulator code uses the canonical form whenever possible in order to make // the code in Part 3 more accessible. The canonical data formats are simple and @@ -60,7 +26,8 @@ // where the BnSomething() function should not be called if OK isn't true. //** Includes -#include "Tpm.h" +#include "TpmBigNum.h" +extern BOOL g_inFailureMode; // can't use global.h because we can't use tpm.h // A constant value of zero as a stand in for NULL bigNum values const bignum_t BnConstZero = {1, 0, {0}}; @@ -295,7 +262,7 @@ LIB_EXPORT crypt_word_t BnModWord(bigConst numerator, crypt_word_t modulus) // Return Type: int // -1 the word was zero // n the bit number of the most significant bit in the word -LIB_EXPORT int Msb(crypt_uword_t word) +static int Msb(crypt_uword_t word) { int retVal = -1; // @@ -378,13 +345,17 @@ LIB_EXPORT bigNum BnSetWord(bigNum n, crypt_uword_t w) //*** BnSetBit() // This function will SET a bit in a bigNum. Bit 0 is the least-significant bit in -// the 0th digit_t. The function always return TRUE +// the 0th digit_t. The function will return FALSE if the bitNum is invalid, else TRUE. LIB_EXPORT BOOL BnSetBit(bigNum bn, // IN/OUT: big number to modify unsigned int bitNum // IN: Bit number to SET ) { crypt_uword_t offset = bitNum / RADIX_BITS; - pAssert(bn->allocated * RADIX_BITS >= bitNum); + if(bitNum > bn->allocated * RADIX_BITS) + { + // out of range + return FALSE; + } // Grow the number if necessary to set the bit. while(bn->size <= offset) bn->d[bn->size++] = 0; @@ -475,62 +446,36 @@ LIB_EXPORT BOOL BnShiftRight(bigNum result, bigConst toShift, uint32_t shiftAmou return TRUE; } -//*** BnGetRandomBits() -// This function gets random bits for use in various places. To make sure that the -// number is generated in a portable format, it is created as a TPM2B and then -// converted to the internal format. -// -// One consequence of the generation scheme is that, if the number of bits requested -// is not a multiple of 8, then the high-order bits are set to zero. This would come -// into play when generating a 521-bit ECC key. A 66-byte (528-bit) value is -// generated an the high order 7 bits are masked off (CLEAR). -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure -LIB_EXPORT BOOL BnGetRandomBits(bigNum n, size_t bits, RAND_STATE* rand) +//*** BnIsPointOnCurve() +// This function checks if a point is on the curve. +BOOL BnIsPointOnCurve(pointConst Q, const TPMBN_ECC_CURVE_CONSTANTS* C) { - // Since this could be used for ECC key generation using the extra bits method, - // make sure that the value is large enough - TPM2B_TYPE(LARGEST, LARGEST_NUMBER + 8); - TPM2B_LARGEST large; + BN_VAR(right, (MAX_ECC_KEY_BITS * 3)); + BN_VAR(left, (MAX_ECC_KEY_BITS * 2)); + bigConst prime = BnCurveGetPrime(C); // - large.b.size = (UINT16)BITS_TO_BYTES(bits); - if(DRBG_Generate(rand, large.t.buffer, large.t.size) == large.t.size) - { - if(BnFrom2B(n, &large.b) != NULL) - { - if(BnMaskBits(n, (crypt_uword_t)bits)) - return TRUE; - } - } - return FALSE; -} + // Show that point is on the curve y^2 = x^3 + ax + b; + // Or y^2 = x(x^2 + a) + b + // y^2 + BnMult(left, Q->y, Q->y); -//*** BnGenerateRandomInRange() -// This function is used to generate a random number r in the range 1 <= r < limit. -// The function gets a random number of bits that is the size of limit. There is some -// some probability that the returned number is going to be greater than or equal -// to the limit. If it is, try again. There is no more than 50% chance that the -// next number is also greater, so try again. We keep trying until we get a -// value that meets the criteria. Since limit is very often a number with a LOT of -// high order ones, this rarely would need a second try. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure ('limit' is too small) -LIB_EXPORT BOOL BnGenerateRandomInRange(bigNum dest, bigConst limit, RAND_STATE* rand) -{ - size_t bits = BnSizeInBits(limit); - // - if(bits < 2) - { - BnSetWord(dest, 0); - return FALSE; - } + BnMod(left, prime); + // x^2 + BnMult(right, Q->x, Q->x); + + // x^2 + a + BnAdd(right, right, BnCurveGet_a(C)); + + // ExtMath_Mod(right, CurveGetPrime(C)); + // x(x^2 + a) + BnMult(right, right, Q->x); + + // x(x^2 + a) + b + BnAdd(right, right, BnCurveGet_b(C)); + + BnMod(right, prime); + if(BnUnsignedCmp(left, right) == 0) + return TRUE; else - { - while(BnGetRandomBits(dest, bits, rand) - && (BnEqualZero(dest) || (BnUnsignedCmp(dest, limit) >= 0))) - ; - } - return !g_inFailureMode; -} \ No newline at end of file + return FALSE; +} diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/BnMemory.c b/TPMCmd/tpm/cryptolibs/TpmBigNum/BnMemory.c new file mode 100644 index 00000000..25a849e2 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/BnMemory.c @@ -0,0 +1,132 @@ +//** Introduction +// This file contains the memory setup functions used by the bigNum functions +// in CryptoEngine + +//** Includes +#include "TpmBigNum.h" + +//** Functions + +//*** BnSetTop() +// This function is used when the size of a bignum_t is changed. It +// makes sure that the unused words are set to zero and that any significant +// words of zeros are eliminated from the used size indicator. +LIB_EXPORT bigNum BnSetTop(bigNum bn, // IN/OUT: number to clean + crypt_uword_t top // IN: the new top +) +{ + if(bn != NULL) + { + pAssert(top <= bn->allocated); + // If forcing the size to be decreased, make sure that the words being + // discarded are being set to 0 + while(bn->size > top) + bn->d[--bn->size] = 0; + bn->size = top; + // Now make sure that the words that are left are 'normalized' (no high-order + // words of zero. + while((bn->size > 0) && (bn->d[bn->size - 1] == 0)) + bn->size -= 1; + } + return bn; +} + +//*** BnClearTop() +// This function will make sure that all unused words are zero. +LIB_EXPORT bigNum BnClearTop(bigNum bn) +{ + crypt_uword_t i; + // + if(bn != NULL) + { + for(i = bn->size; i < bn->allocated; i++) + bn->d[i] = 0; + while((bn->size > 0) && (bn->d[bn->size] == 0)) + bn->size -= 1; + } + return bn; +} + +//*** BnInitializeWord() +// This function is used to initialize an allocated bigNum with a word value. The +// bigNum does not have to be allocated with a single word. +LIB_EXPORT bigNum BnInitializeWord(bigNum bn, // IN: + crypt_uword_t allocated, // IN: + crypt_uword_t word // IN: +) +{ + bn->allocated = allocated; + bn->size = (word != 0); + bn->d[0] = word; + while(allocated > 1) + bn->d[--allocated] = 0; + return bn; +} + +//*** BnInit() +// This function initializes a stack allocated bignum_t. It initializes +// 'allocated' and 'size' and zeros the words of 'd'. +LIB_EXPORT bigNum BnInit(bigNum bn, crypt_uword_t allocated) +{ + if(bn != NULL) + { + bn->allocated = allocated; + bn->size = 0; + while(allocated != 0) + bn->d[--allocated] = 0; + } + return bn; +} + +//*** BnCopy() +// Function to copy a bignum_t. If the output is NULL, then +// nothing happens. If the input is NULL, the output is set +// to zero. +LIB_EXPORT BOOL BnCopy(bigNum out, bigConst in) +{ + if(in == out) + BnSetTop(out, BnGetSize(out)); + else if(out != NULL) + { + if(in != NULL) + { + unsigned int i; + pAssert(BnGetAllocated(out) >= BnGetSize(in)); + for(i = 0; i < BnGetSize(in); i++) + out->d[i] = in->d[i]; + BnSetTop(out, BnGetSize(in)); + } + else + BnSetTop(out, 0); + } + return TRUE; +} + +#if ALG_ECC + +//*** BnPointCopy() +// Function to copy a bn point. +LIB_EXPORT BOOL BnPointCopy(bigPoint pOut, pointConst pIn) +{ + return BnCopy(pOut->x, pIn->x) && BnCopy(pOut->y, pIn->y) + && BnCopy(pOut->z, pIn->z); +} + +//*** BnInitializePoint() +// This function is used to initialize a point structure with the addresses +// of the coordinates. +LIB_EXPORT bn_point_t* BnInitializePoint( + bigPoint p, // OUT: structure to receive pointers + bigNum x, // IN: x coordinate + bigNum y, // IN: y coordinate + bigNum z // IN: x coordinate +) +{ + p->x = x; + p->y = y; + p->z = z; + BnSetWord(z, 1); + return p; +} + +#endif // ALG_ECC \ No newline at end of file diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/BnUtil.c b/TPMCmd/tpm/cryptolibs/TpmBigNum/BnUtil.c new file mode 100644 index 00000000..ab44f697 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/BnUtil.c @@ -0,0 +1,27 @@ +//** Introduction +// Utility functions to support TpmBigNum library + +#include "TpmBigNum.h" +#include + +#if CRYPTO_LIB_REPORTING + +//*** _crypto_GetMathImpl() +// Report the library being used for math. +void _crypto_GetMathImpl(_CRYPTO_IMPL_DESCRIPTION* result) +{ + // TpmmBigNum relies on a sub-library for its implementation. + // Query the sub-library being used and use that to fill out the response. + _CRYPTO_IMPL_DESCRIPTION subResult; + BnGetImplementation(&subResult); + + // _CRYPTO_IMPL_DESCRIPTION has room for 31 characters plus NUL, and we use + // 10 characters for the prefix "TPMBigNum/". + // Using '%.21s' in snprintf below allows us to be safe and explicit about + // the fact that we expect truncation of the name of the bignum sub-provider + // in the event that its name is too long. + snprintf(result->name, sizeof(result->name), "TPMBigNum/%.21s", subResult.name); + snprintf(result->version, sizeof(result->version), "%s", subResult.version); +} + +#endif // CRYPTO_LIB_REPORTING diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/CMakeLists.txt b/TPMCmd/tpm/cryptolibs/TpmBigNum/CMakeLists.txt new file mode 100644 index 00000000..11598dd2 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/CMakeLists.txt @@ -0,0 +1,53 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# + +project(Tpm_CryptoLib_TpmBigNum VERSION 1.0) +print_project_info() +# generate Tpm_CryptoLib_TpmBigNum_Headers +add_subdirectory(include) + +add_library(Tpm_CryptoLib_TpmBigNum STATIC) +add_library(Tpm_CryptoLib_TpmBigNum::Tpm_CryptoLib_TpmBigNum ALIAS Tpm_CryptoLib_TpmBigNum) + +target_link_libraries(Tpm_CryptoLib_TpmBigNum PUBLIC Tpm_CompilerOptions) +target_link_libraries(Tpm_CryptoLib_TpmBigNum PUBLIC Tpm_CryptoLib_Common) +#target_link_libraries(Tpm_CryptoLib_TpmBigNum PRIVATE Tpm_Private_Headers) +target_link_libraries(Tpm_CryptoLib_TpmBigNum PUBLIC Tpm_CryptoLib_TpmBigNum_Headers) + +target_link_libraries(Tpm_CryptoLib_TpmBigNum PUBLIC Tpm_CryptoLib_Math_${cryptoLib_BnMath}) + +# get access to the private TPM headers directly so they don't show up in the +# usage attributes. Using an INTERFACE library (Tpm_Private_Headers) doesn't allow +# private inheritance +target_include_directories(Tpm_CryptoLib_TpmBigNum PRIVATE + "$" +) + +target_include_directories(Tpm_CryptoLib_TpmBigNum + PUBLIC + "$" + "$" +) + +target_sources(Tpm_CryptoLib_TpmBigNum PRIVATE + "BnConvert.c" + "BnEccConstants.c" + "BnMath.c" + "BnMemory.c" + "BnUtil.c" + "TpmBigNumThunks.c" +) + +# create install and export information for downstream projects to use +install_and_export_config_targets(${PROJECT_NAME}) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## +# nothing to do, headers provided by TpmBigNum_Headers + +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(${PROJECT_NAME}) diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/Tpm2bEccConstants.c.alt b/TPMCmd/tpm/cryptolibs/TpmBigNum/Tpm2bEccConstants.c.alt new file mode 100644 index 00000000..08a5a4a3 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/Tpm2bEccConstants.c.alt @@ -0,0 +1,160 @@ + +// This file is not built, but is provided as an example for a library that doesn't use +// bignum_t as the primary format. This file initializes the ECC constants as native +// TPM2B structures. The file extension is not .C so it is not found by the automake +// build which dynamically generates the file list. + +//** Introduction +// This file maintains a TPM2B format for ECC Constants, though it is not clear it was ever +// used by any released version of the reference code. In order to reduce the complexity +// in the bignum format, which is used, this was extracted here for reference and future +// consideration. + +#include "Tpm.h" +#include "OIDs.h" + +#if ALG_ECC + +// define macros expected by EccConstantData to convert the data to BigNum format +# define TO_ECC_64(a, b, c, d, e, f, g, h) a, b, c, d, e, f, g, h +# define TO_ECC_56(a, b, c, d, e, f, g) a, b, c, d, e, f, g +# define TO_ECC_48(a, b, c, d, e, f) a, b, c, d, e, f +# define TO_ECC_40(a, b, c, d, e) a, b, c, d, e +# define TO_ECC_32(a, b, c, d) a, b, c, d +# define TO_ECC_24(a, b, c) a, b, c +# define TO_ECC_16(a, b) a, b +# define TO_ECC_8(a) a + +TPM2B_BYTE_VALUE(24); +# define TO_ECC_192(a, b, c) a, b, c +TPM2B_BYTE_VALUE(28); +# define TO_ECC_224(a, b, c, d) a, b, c, d +TPM2B_BYTE_VALUE(32); +# define TO_ECC_256(a, b, c, d) a, b, c, d +TPM2B_BYTE_VALUE(48); +# define TO_ECC_384(a, b, c, d, e, f) a, b, c, d, e, f +TPM2B_BYTE_VALUE(66); +# define TO_ECC_528(a, b, c, d, e, f, g, h, i) a, b, c, d, e, f, g, h, i +TPM2B_BYTE_VALUE(80); +# define TO_ECC_640(a, b, c, d, e, f, g, h, i, j) a, b, c, d, e, f, g, h, i, j + +TPM2B_BYTE_VALUE(1); + +# define ECC_CONST(name, bytes, initializer) \ + const TPM2B_##bytes##_BYTE_VALUE name = {bytes, {initializer}} + +// This file contains the ECC curve data. The data is contained in macros so this +// file can be included in other files that format the data in a memory format +// desired by the user. This file itself is never used alone. +# include "EccConstantData.inl" + +typedef struct +{ + const TPM2B* prime; // a prime number + const TPM2B* order; // the order of the curve + const TPM2B* h; // cofactor + const TPM2B* a; // linear coefficient + const TPM2B* b; // constant term + const TPM2B* baseX; // base point - X + const TPM2B* baseY; // base point - Y + const TPM2B* baseZ; // base point - Z +} TPM2B_ECC_CURVE_CONSTANTS; + +# if ECC_NIST_P192 +const TPM2B_ECC_CURVE_CONSTANTS NIST_P192 = + {&NIST_P192_p.b, + &NIST_P192_n.b, + &NIST_P192_h.b, + &NIST_P192_a.b, + &NIST_P192_b.b, + &NIST_P192_gX.b, + &NIST_P192_gY.b, + &NIST_P192_gZ.b}; +# endif // ECC_NIST_P192 + +# if ECC_NIST_P224 +const TPM2B_ECC_CURVE_CONSTANTS NIST_P224 = + {&NIST_P224_p.b, + &NIST_P224_n.b, + &NIST_P224_h.b, + &NIST_P224_a.b, + &NIST_P224_b.b, + &NIST_P224_gX.b, + &NIST_P224_gY.b, + &NIST_P224_gZ.b}; +# endif // ECC_NIST_P224 + +# if ECC_NIST_P256 +const TPM2B_ECC_CURVE_CONSTANTS NIST_P256 = + {&NIST_P256_p.b, + &NIST_P256_n.b, + &NIST_P256_h.b, + &NIST_P256_a.b, + &NIST_P256_b.b, + &NIST_P256_gX.b, + &NIST_P256_gY.b, + &NIST_P256_gZ.b}; +# endif // ECC_NIST_P256 + +# if ECC_NIST_P384 +const TPM2B_ECC_CURVE_CONSTANTS NIST_P384 = + {&NIST_P384_p.b, + &NIST_P384_n.b, + &NIST_P384_h.b, + &NIST_P384_a.b, + &NIST_P384_b.b, + &NIST_P384_gX.b, + &NIST_P384_gY.b, + &NIST_P384_gZ.b}; +# endif // ECC_NIST_P384 + +# if ECC_NIST_P521 +const TPM2B_ECC_CURVE_CONSTANTS NIST_P521 = + {&NIST_P521_p.b, + &NIST_P521_n.b, + &NIST_P521_h.b, + &NIST_P521_a.b, + &NIST_P521_b.b, + &NIST_P521_gX.b, + &NIST_P521_gY.b, + &NIST_P521_gZ.b}; +# endif // ECC_NIST_P521 + +# if ECC_BN_P256 +const TPM2B_ECC_CURVE_CONSTANTS BN_P256 = + {&BN_P256_p.b, + &BN_P256_n.b, + &BN_P256_h.b, + &BN_P256_a.b, + &BN_P256_b.b, + &BN_P256_gX.b, + &BN_P256_gY.b, + &BN_P256_gZ.b}; +# endif // ECC_BN_P256 + +# if ECC_BN_P638 +const TPM2B_ECC_CURVE_CONSTANTS BN_P638 = + {&BN_P638_p.b, + &BN_P638_n.b, + &BN_P638_h.b, + &BN_P638_a.b, + &BN_P638_b.b, + &BN_P638_gX.b, + &BN_P638_gY.b, + &BN_P638_gZ.b}; +# endif // ECC_BN_P638 + +# if ECC_SM2_P256 +const TPM2B_ECC_CURVE_CONSTANTS SM2_P256 = + {&SM2_P256_p.b, + &SM2_P256_n.b, + &SM2_P256_h.b, + &SM2_P256_a.b, + &SM2_P256_b.b, + &SM2_P256_gX.b, + &SM2_P256_gY.b, + &SM2_P256_gZ.b}; +# endif // ECC_SM2_P256 + +#endif // TPM_ALG_ECC +#endif // zero \ No newline at end of file diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/TpmBigNum.h b/TPMCmd/tpm/cryptolibs/TpmBigNum/TpmBigNum.h new file mode 100644 index 00000000..0d8e9cfe --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/TpmBigNum.h @@ -0,0 +1,17 @@ +//** Introduction +// This file contains the headers necessary to build the tpm big num library. +// TODO_RENAME_INC_FOLDER: public refers to the TPM_CoreLib public headers +#include +#include +// TODO_RENAME_INC_FOLDER: private refers to the TPM_CoreLib private(protected) headers +#include +#include // required for TpmFail_fp.h +#include +#include // requires capabilities & GpMacros +#include +#include "BnSupport_Interface.h" +#include "BnConvert_fp.h" +#include "BnMemory_fp.h" +#include "BnMath_fp.h" +#include "BnUtil_fp.h" +#include \ No newline at end of file diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/TpmBigNumThunks.c b/TPMCmd/tpm/cryptolibs/TpmBigNum/TpmBigNumThunks.c new file mode 100644 index 00000000..3878ffe4 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/TpmBigNumThunks.c @@ -0,0 +1,470 @@ +//** Introduction +// This file contains BN Thunks between the MathInterfaceLibrary types and the +// bignum_t types. + +#include "TpmBigNum.h" + +// Note - these were moved out of TPM_INLINE to build correctly on GCC. On MSVC +// link time code generation correctly handles the inline versions, but +// it isn't portable to GCC. + +// *************************************************************************** +// Library Level Functions +// *************************************************************************** + +// Called when system is initializing to allow math libraries to perform +// startup actions. +LIB_EXPORT int ExtMath_LibInit(void) +{ + return BnSupportLibInit(); +} + +//** MathLibraryCompatibililtyCheck() +// This function is only used during development to make sure that the library +// that is being referenced is using the same size of data structures as the TPM. +LIB_EXPORT BOOL ExtMath_Debug_CompatibilityCheck(void) +{ + return BnMathLibraryCompatibilityCheck(); +} + +// *************************************************************************** +// Integer/Number Functions (non-ECC) +// *************************************************************************** +// ################# +// type initializers +// ################# +LIB_EXPORT Crypt_Int* ExtMath_Initialize_Int(Crypt_Int* var, NUMBYTES bitCount) +{ + return (Crypt_Int*)BnInit((bigNum)var, BN_STRUCT_ALLOCATION(bitCount)); +} + +// ################# +// Buffer Converters +// ################# +LIB_EXPORT Crypt_Int* ExtMath_IntFromBytes( + Crypt_Int* buffer, const BYTE* input, NUMBYTES byteCount) +{ + return (Crypt_Int*)BnFromBytes((bigNum)buffer, input, byteCount); +} + +LIB_EXPORT BOOL ExtMath_IntToBytes( + const Crypt_Int* value, BYTE* output, NUMBYTES* pByteCount) +{ + return BnToBytes((bigConst)value, output, pByteCount); +} + +LIB_EXPORT Crypt_Int* ExtMath_SetWord(Crypt_Int* n, crypt_uword_t w) +{ + return (Crypt_Int*)BnSetWord((bigNum)n, w); +} +// ################# +// Copy Functions +// ################# +LIB_EXPORT BOOL ExtMath_Copy(Crypt_Int* out, const Crypt_Int* in) +{ + return BnCopy((bigNum)out, (bigConst)in); +} + +// ############################### +// Ordinary Arithmetic, writ large +// ############################### + +//** ExtMath_Multiply() +// Multiplies two numbers and returns the result +LIB_EXPORT BOOL ExtMath_Multiply( + Crypt_Int* result, const Crypt_Int* multiplicand, const Crypt_Int* multiplier) +{ + return BnMult((bigNum)result, (bigConst)multiplicand, (bigConst)multiplier); +} + +//** ExtMath_Divide() +// This function divides two Crypt_Int* values. The function returns FALSE if there is +// an error in the operation. Quotient may be null, in which case this function returns +// only the remainder. +LIB_EXPORT BOOL ExtMath_Divide(Crypt_Int* quotient, + Crypt_Int* remainder, + const Crypt_Int* dividend, + const Crypt_Int* divisor) +{ + return BnDiv( + (bigNum)quotient, (bigNum)remainder, (bigConst)dividend, (bigConst)divisor); +} + +#if ALG_RSA +//** ExtMath_GCD() +// Get the greatest common divisor of two numbers. This function is only needed +// when the TPM implements RSA. +LIB_EXPORT BOOL ExtMath_GCD( + Crypt_Int* gcd, const Crypt_Int* number1, const Crypt_Int* number2) +{ + return BnGcd((bigNum)gcd, (bigConst)number1, (bigConst)number2); +} +#endif // ALG_RSA + +//*** ExtMath_Add() +// This function adds two Crypt_Int* values. This function always returns TRUE. +LIB_EXPORT BOOL ExtMath_Add( + Crypt_Int* result, const Crypt_Int* op1, const Crypt_Int* op2) +{ + return BnAdd((bigNum)result, (bigConst)op1, (bigConst)op2); +} + +//*** ExtMath_AddWord() +// This function adds a word value to a Crypt_Int*. This function always returns TRUE. +LIB_EXPORT BOOL ExtMath_AddWord( + Crypt_Int* result, const Crypt_Int* op, crypt_uword_t word) +{ + return BnAddWord((bigNum)result, (bigConst)op, word); +} + +//*** ExtMath_Subtract() +// This function does subtraction of two Crypt_Int* values and returns result = op1 - op2 +// when op1 is greater than op2. If op2 is greater than op1, then a fault is +// generated. This function always returns TRUE. +LIB_EXPORT BOOL ExtMath_Subtract( + Crypt_Int* result, const Crypt_Int* op1, const Crypt_Int* op2) +{ + return BnSub((bigNum)result, (bigConst)op1, (bigConst)op2); +} + +//*** ExtMath_SubtractWord() +// This function subtracts a word value from a Crypt_Int*. This function always +// returns TRUE. +LIB_EXPORT BOOL ExtMath_SubtractWord( + Crypt_Int* result, const Crypt_Int* op, crypt_uword_t word) +{ + return BnSubWord((bigNum)result, (bigConst)op, word); +} + +// ############################### +// Modular Arithmetic, writ large +// ############################### +// define Mod in terms of Divide +LIB_EXPORT BOOL ExtMath_Mod(Crypt_Int* valueAndResult, const Crypt_Int* modulus) +{ + return ExtMath_Divide(NULL, valueAndResult, valueAndResult, modulus); +} + +//** ExtMath_ModMult() +// Does 'op1' * 'op2' and divide by 'modulus' returning the remainder of the divide. +LIB_EXPORT BOOL ExtMath_ModMult(Crypt_Int* result, + const Crypt_Int* op1, + const Crypt_Int* op2, + const Crypt_Int* modulus) +{ + return BnModMult((bigNum)result, (bigConst)op1, (bigConst)op2, (bigConst)modulus); +} + +#if ALG_RSA +//** ExtMath_ModExp() +// Do modular exponentiation using Crypt_Int* values. This function is only needed +// when the TPM implements RSA. +LIB_EXPORT BOOL ExtMath_ModExp(Crypt_Int* result, + const Crypt_Int* number, + const Crypt_Int* exponent, + const Crypt_Int* modulus) +{ + return BnModExp( + (bigNum)result, (bigConst)number, (bigConst)exponent, (bigConst)modulus); +} +#endif // ALG_RSA + +//** ExtMath_ModInverse() +// Modular multiplicative inverse. +LIB_EXPORT BOOL ExtMath_ModInverse( + Crypt_Int* result, const Crypt_Int* number, const Crypt_Int* modulus) +{ + return BnModInverse((bigNum)result, (bigConst)number, (bigConst)modulus); +} + +//*** ExtMath_ModWord() +// This function does modular division of a big number when the modulus is a +// word value. +LIB_EXPORT crypt_word_t ExtMath_ModWord(const Crypt_Int* numerator, + crypt_word_t modulus) +{ + return BnModWord((bigConst)numerator, modulus); +} + +// ############################### +// Queries +// ############################### + +//*** ExtMath_UnsignedCmp() +// This function performs a comparison of op1 to op2. The compare is approximately +// constant time if the size of the values used in the compare is consistent +// across calls (from the same line in the calling code). +// Return Type: int +// < 0 op1 is less than op2 +// 0 op1 is equal to op2 +// > 0 op1 is greater than op2 +LIB_EXPORT int ExtMath_UnsignedCmp(const Crypt_Int* op1, const Crypt_Int* op2) +{ + return BnUnsignedCmp((bigConst)op1, (bigConst)op2); +} + +//*** ExtMath_UnsignedCmpWord() +// Compare a Crypt_Int* to a crypt_uword_t. +// Return Type: int +// -1 op1 is less that word +// 0 op1 is equal to word +// 1 op1 is greater than word +LIB_EXPORT int ExtMath_UnsignedCmpWord(const Crypt_Int* op1, crypt_uword_t word) +{ + return BnUnsignedCmpWord((bigConst)op1, word); +} + +LIB_EXPORT BOOL ExtMath_IsEqualWord(const Crypt_Int* bn, crypt_uword_t word) +{ + return BnEqualWord((bigConst)bn, word); +} + +LIB_EXPORT BOOL ExtMath_IsZero(const Crypt_Int* op1) +{ + return BnEqualZero((bigConst)op1); +} + +//*** ExtMath_MostSigBitNum() +// This function returns the number of the MSb of a Crypt_Int* value. +// Return Type: int +// -1 the word was zero or 'bn' was NULL +// n the bit number of the most significant bit in the word +LIB_EXPORT int ExtMath_MostSigBitNum(const Crypt_Int* bn) +{ + return BnMsb((bigConst)bn); +} + +LIB_EXPORT uint32_t ExtMath_GetLeastSignificant32bits(const Crypt_Int* bn) +{ + MUST_BE(RADIX_BITS >= 32); +#if RADIX_BITS == 32 + return BnGetWord(bn, 0); +#else + // RADIX_BITS must be > 32 by MUST_BE above. + return (uint32_t)(BnGetWord(bn, 0) & 0xFFFFFFFF); +#endif +} + +//*** ExtMath_SizeInBits() +// This function returns the number of bits required to hold a number. It is one +// greater than the Msb. +LIB_EXPORT unsigned ExtMath_SizeInBits(const Crypt_Int* n) +{ + return BnSizeInBits((bigConst)n); +} + +// ############################### +// Bitwise Operations +// ############################### + +LIB_EXPORT BOOL ExtMath_SetBit(Crypt_Int* bn, unsigned int bitNum) +{ + return BnSetBit((bigNum)bn, bitNum); +} + +// This function is used to check to see if a bit is SET in a bigNum_t. The 0th bit +//*** ExtMath_TestBit() +// is the LSb of d[0]. +// Return Type: BOOL +// TRUE(1) the bit is set +// FALSE(0) the bit is not set or the number is out of range +LIB_EXPORT BOOL ExtMath_TestBit(Crypt_Int* bn, // IN: number to check + unsigned int bitNum // IN: bit to test +) +{ + return BnTestBit((bigNum)bn, bitNum); +} + +//***ExtMath_MaskBits() +// This function is used to mask off high order bits of a big number. +// The returned value will have no more than 'maskBit' bits +// set. +// Note: There is a requirement that unused words of a bigNum_t are set to zero. +// Return Type: BOOL +// TRUE(1) result masked +// FALSE(0) the input was not as large as the mask +LIB_EXPORT BOOL ExtMath_MaskBits( + Crypt_Int* bn, // IN/OUT: number to mask + crypt_uword_t maskBit // IN: the bit number for the mask. +) +{ + return BnMaskBits((bigNum)bn, maskBit); +} + +//*** ExtMath_ShiftRight() +// This function will shift a Crypt_Int* to the right by the shiftAmount. +// This function always returns TRUE. +LIB_EXPORT BOOL ExtMath_ShiftRight( + Crypt_Int* result, const Crypt_Int* toShift, uint32_t shiftAmount) +{ + return BnShiftRight((bigNum)result, (bigConst)toShift, shiftAmount); +} + +// *************************************************************************** +// ECC Functions +// *************************************************************************** +// ################## +// Point initializers +// ################## +LIB_EXPORT Crypt_Point* ExtEcc_Initialize_Point(Crypt_Point* point, NUMBYTES bitCount) +{ + // Since we define the structure, we know that BN_POINT_BUFs are a bn_point_t followed by bignums. + // and that the size is always the MAX_ECC_KEY_SIZE + // tell the individual bignums how large they are: + bn_fullpoint_t* pBuf = (bn_fullpoint_t*)point; + BnInit((bigNum) & (pBuf->x), BN_STRUCT_ALLOCATION(bitCount)); + BnInit((bigNum) & (pBuf->y), BN_STRUCT_ALLOCATION(bitCount)); + BnInit((bigNum) & (pBuf->z), BN_STRUCT_ALLOCATION(bitCount)); + + // now feed the addresses of those coordinates to the bn_point_t structure + bn_point_t* bnPoint = (bn_point_t*)point; + BnInitializePoint( + bnPoint, (bigNum) & (pBuf->x), (bigNum) & (pBuf->y), (bigNum) & (pBuf->z)); + return point; +} + +// ################## +// Curve initializers +// ################## +LIB_EXPORT const Crypt_EccCurve* ExtEcc_CurveInitialize(Crypt_EccCurve* E, + TPM_ECC_CURVE curveId) +{ + return BnCurveInitialize((bigCurveData*)E, curveId); +} + +// ################# +// Curve DESTRUCTOR +// ################# +// WARNING: Not guaranteed to be called in presence of LONGJMP. +LIB_EXPORT void ExtEcc_CurveFree(const Crypt_EccCurve* E) +{ + BnCurveFree((bigCurveData*)E); +} + +// ################# +// Buffer Converters +// ################# +//*** BnPointFromBytes() +// Function to create a BIG_POINT structure from a 2B point. +// A point is going to be two ECC values in the same buffer. The values are going +// to be the size of the modulus. They are in modular form. +LIB_EXPORT Crypt_Point* ExtEcc_PointFromBytes(Crypt_Point* point, + const BYTE* x, + NUMBYTES nBytesX, + const BYTE* y, + NUMBYTES nBytesY) +{ + return (Crypt_Point*)BnPointFromBytes((bigPoint)point, x, nBytesX, y, nBytesY); +} + +LIB_EXPORT BOOL ExtEcc_PointToBytes( + const Crypt_Point* point, BYTE* x, NUMBYTES* pBytesX, BYTE* y, NUMBYTES* pBytesY) +{ + return BnPointToBytes((pointConst)point, x, pBytesX, y, pBytesY); +} + +// #################### +// ECC Point Operations +// #################### +//** ExtEcc_PointMultiply() +// This function does a point multiply of the form R = [d]S. A return of FALSE +// indicates that the result was the point at infinity. This function is only needed +// if the TPM supports ECC. +LIB_EXPORT BOOL ExtEcc_PointMultiply( + Crypt_Point* R, const Crypt_Point* S, const Crypt_Int* d, const Crypt_EccCurve* E) +{ + return BnEccModMult((bigPoint)R, (pointConst)S, (bigConst)d, (bigCurveData*)E); +} + +//** ExtEcc_PointMultiplyAndAdd() +// This function does a point multiply of the form R = [d]S + [u]Q. A return of +// FALSE indicates that the result was the point at infinity. This function is only +// needed if the TPM supports ECC. +LIB_EXPORT BOOL ExtEcc_PointMultiplyAndAdd(Crypt_Point* R, + const Crypt_Point* S, + const Crypt_Int* d, + const Crypt_Point* Q, + const Crypt_Int* u, + const Crypt_EccCurve* E) +{ + return BnEccModMult2((bigPoint)R, + (pointConst)S, + (bigConst)d, + (pointConst)Q, + (bigConst)u, + (bigCurveData*)E); +} + +LIB_EXPORT BOOL ExtEcc_PointAdd(Crypt_Point* R, + const Crypt_Point* S, + const Crypt_Point* Q, + const Crypt_EccCurve* E) +{ + return BnEccAdd((bigPoint)R, (pointConst)S, (pointConst)Q, (bigCurveData*)E); +} + +// ##################### +// ECC Point Information +// ##################### +LIB_EXPORT BOOL ExtEcc_IsPointOnCurve(const Crypt_Point* Q, const Crypt_EccCurve* E) +{ + return BnIsPointOnCurve((pointConst)Q, AccessCurveConstants(E)); +} + +LIB_EXPORT const Crypt_Int* ExtEcc_PointX(const Crypt_Point* point) +{ + return (const Crypt_Int*)(((pointConst)point)->x); +} + +LIB_EXPORT BOOL ExtEcc_IsInfinityPoint(const Crypt_Point* point) +{ + return BnEqualZero(((pointConst)point)->z); +} + +// ##################### +// ECC Curve Information +// ##################### +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGetPrime(TPM_ECC_CURVE curveId) +{ + return (const Crypt_Int*)BnCurveGetPrime(BnGetCurveData(curveId)); +} + +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGetOrder(TPM_ECC_CURVE curveId) +{ + return (const Crypt_Int*)BnCurveGetOrder(BnGetCurveData(curveId)); +} + +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGetCofactor(TPM_ECC_CURVE curveId) +{ + return (const Crypt_Int*)BnCurveGetCofactor(BnGetCurveData(curveId)); +} + +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGet_a(TPM_ECC_CURVE curveId) +{ + return (const Crypt_Int*)BnCurveGet_a(BnGetCurveData(curveId)); +} + +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGet_b(TPM_ECC_CURVE curveId) +{ + return (const Crypt_Int*)BnCurveGet_b(BnGetCurveData(curveId)); +} + +LIB_EXPORT const Crypt_Point* ExtEcc_CurveGetG(TPM_ECC_CURVE curveId) +{ + return (const Crypt_Point*)BnCurveGetG(BnGetCurveData(curveId)); +} + +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGetGx(TPM_ECC_CURVE curveId) +{ + return (const Crypt_Int*)BnCurveGetGx(BnGetCurveData(curveId)); +} + +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGetGy(TPM_ECC_CURVE curveId) +{ + return (const Crypt_Int*)BnCurveGetGy(BnGetCurveData(curveId)); +} + +LIB_EXPORT TPM_ECC_CURVE ExtEcc_CurveGetCurveId(const Crypt_EccCurve* E) +{ + return BnCurveGetCurveId(AccessCurveConstants(E)); +} diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnConvert_fp.h b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnConvert_fp.h new file mode 100644 index 00000000..0efdd357 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnConvert_fp.h @@ -0,0 +1,78 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:18PM + */ + +#ifndef _BN_CONVERT_FP_H_ +#define _BN_CONVERT_FP_H_ + +//*** BnFromBytes() +// This function will convert a big-endian byte array to the internal number +// format. If bn is NULL, then the output is NULL. If bytes is null or the +// required size is 0, then the output is set to zero +LIB_EXPORT bigNum BnFromBytes(bigNum bn, const BYTE* bytes, NUMBYTES nBytes); + +//*** BnFrom2B() +// Convert an TPM2B to a BIG_NUM. +// If the input value does not exist, or the output does not exist, or the input +// will not fit into the output the function returns NULL +LIB_EXPORT bigNum BnFrom2B(bigNum bn, // OUT: + const TPM2B* a2B // IN: number to convert +); + +//*** BnToBytes() +// This function converts a BIG_NUM to a byte array. It converts the bigNum to a +// big-endian byte string and sets 'size' to the normalized value. If 'size' is an +// input 0, then the receiving buffer is guaranteed to be large enough for the result +// and the size will be set to the size required for bigNum (leading zeros +// suppressed). +// +// The conversion for a little-endian machine simply requires that all significant +// bytes of the bigNum be reversed. For a big-endian machine, rather than +// unpack each word individually, the bigNum is converted to little-endian words, +// copied, and then converted back to big-endian. +LIB_EXPORT BOOL BnToBytes(bigConst bn, + BYTE* buffer, + NUMBYTES* size // This the number of bytes that are + // available in the buffer. The result + // should be this big. +); + +//*** BnTo2B() +// Function to convert a BIG_NUM to TPM2B. +// The TPM2B size is set to the requested 'size' which may require padding. +// If 'size' is non-zero and less than required by the value in 'bn' then an error +// is returned. If 'size' is zero, then the TPM2B is assumed to be large enough +// for the data and a2b->size will be adjusted accordingly. +LIB_EXPORT BOOL BnTo2B(bigConst bn, // IN: + TPM2B* a2B, // OUT: + NUMBYTES size // IN: the desired size +); +#if ALG_ECC + +//*** BnPointFromBytes() +// Function to create a BIG_POINT structure from a byte buffer in big-endian order. +// A point is going to be two ECC values in the same buffer. The values are going +// to be the size of the modulus. They are in modular form. +LIB_EXPORT bn_point_t* BnPointFromBytes( + bigPoint ecP, // OUT: the preallocated point structure + const BYTE* x, + NUMBYTES nBytesX, + const BYTE* y, + NUMBYTES nBytesY); + +//*** BnPointToBytes() +// This function converts a BIG_POINT into a TPMS_ECC_POINT. A TPMS_ECC_POINT +// contains two TPM2B_ECC_PARAMETER values. The maximum size of the parameters +// is dependent on the maximum EC key size used in an implementation. +// The presumption is that the TPMS_ECC_POINT is large enough to hold 2 TPM2B +// values, each as large as a MAX_ECC_PARAMETER_BYTES +LIB_EXPORT BOOL BnPointToBytes( + pointConst ecP, // OUT: the preallocated point structure + BYTE* x, + NUMBYTES* pBytesX, + BYTE* y, + NUMBYTES* pBytesY); +#endif // ALG_ECC + +#endif // _BN_CONVERT_FP_H_ diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnMath_fp.h b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnMath_fp.h new file mode 100644 index 00000000..aaf29ad6 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnMath_fp.h @@ -0,0 +1,111 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Aug 30, 2019 Time: 02:11:54PM + */ + +#ifndef _BN_MATH_FP_H_ +#define _BN_MATH_FP_H_ + +//*** BnAdd() +// This function adds two bigNum values. This function always returns TRUE. +LIB_EXPORT BOOL BnAdd(bigNum result, bigConst op1, bigConst op2); + +//*** BnAddWord() +// This function adds a word value to a bigNum. This function always returns TRUE. +LIB_EXPORT BOOL BnAddWord(bigNum result, bigConst op, crypt_uword_t word); + +//*** BnSub() +// This function does subtraction of two bigNum values and returns result = op1 - op2 +// when op1 is greater than op2. If op2 is greater than op1, then a fault is +// generated. This function always returns TRUE. +LIB_EXPORT BOOL BnSub(bigNum result, bigConst op1, bigConst op2); + +//*** BnSubWord() +// This function subtracts a word value from a bigNum. This function always +// returns TRUE. +LIB_EXPORT BOOL BnSubWord(bigNum result, bigConst op, crypt_uword_t word); + +//*** BnUnsignedCmp() +// This function performs a comparison of op1 to op2. The compare is approximately +// constant time if the size of the values used in the compare is consistent +// across calls (from the same line in the calling code). +// Return Type: int +// < 0 op1 is less than op2 +// 0 op1 is equal to op2 +// > 0 op1 is greater than op2 +LIB_EXPORT int BnUnsignedCmp(bigConst op1, bigConst op2); + +//*** BnUnsignedCmpWord() +// Compare a bigNum to a crypt_uword_t. +// Return Type: int +// -1 op1 is less that word +// 0 op1 is equal to word +// 1 op1 is greater than word +LIB_EXPORT int BnUnsignedCmpWord(bigConst op1, crypt_uword_t word); + +//*** BnModWord() +// This function does modular division of a big number when the modulus is a +// word value. +LIB_EXPORT crypt_word_t BnModWord(bigConst numerator, crypt_word_t modulus); + +//*** BnMsb() +// This function returns the number of the MSb of a bigNum value. +// Return Type: int +// -1 the word was zero or 'bn' was NULL +// n the bit number of the most significant bit in the word +LIB_EXPORT int BnMsb(bigConst bn); + +//*** BnSizeInBits() +// This function returns the number of bits required to hold a number. It is one +// greater than the Msb. +// +LIB_EXPORT unsigned BnSizeInBits(bigConst n); + +//*** BnSetWord() +// Change the value of a bignum_t to a word value. +LIB_EXPORT bigNum BnSetWord(bigNum n, crypt_uword_t w); + +//*** BnSetBit() +// This function will SET a bit in a bigNum. Bit 0 is the least-significant bit in +// the 0th digit_t. The function always return TRUE +LIB_EXPORT BOOL BnSetBit(bigNum bn, // IN/OUT: big number to modify + unsigned int bitNum // IN: Bit number to SET +); + +//*** BnTestBit() +// This function is used to check to see if a bit is SET in a bignum_t. The 0th bit +// is the LSb of d[0]. +// Return Type: BOOL +// TRUE(1) the bit is set +// FALSE(0) the bit is not set or the number is out of range +LIB_EXPORT BOOL BnTestBit(bigNum bn, // IN: number to check + unsigned int bitNum // IN: bit to test +); + +//***BnMaskBits() +// This function is used to mask off high order bits of a big number. +// The returned value will have no more than 'maskBit' bits +// set. +// Note: There is a requirement that unused words of a bignum_t are set to zero. +// Return Type: BOOL +// TRUE(1) result masked +// FALSE(0) the input was not as large as the mask +LIB_EXPORT BOOL BnMaskBits(bigNum bn, // IN/OUT: number to mask + crypt_uword_t maskBit // IN: the bit number for the mask. +); + +//*** BnShiftRight() +// This function will shift a bigNum to the right by the shiftAmount. +// This function always returns TRUE. +LIB_EXPORT BOOL BnShiftRight(bigNum result, bigConst toShift, uint32_t shiftAmount); + +//*** BnGetCurveData() +// This function returns the pointer for the parameter data +// associated with a curve. +const TPMBN_ECC_CURVE_CONSTANTS* BnGetCurveData(TPM_ECC_CURVE curveId); + +//*** BnIsPointOnCurve() +// This function checks if a point is on the curve. +BOOL BnIsPointOnCurve(pointConst Q, const TPMBN_ECC_CURVE_CONSTANTS* C); + +#endif // _BN_MATH_FP_H_ diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnMemory_fp.h b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnMemory_fp.h new file mode 100644 index 00000000..d6237763 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnMemory_fp.h @@ -0,0 +1,56 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:18PM + */ + +#ifndef _BN_MEMORY_FP_H_ +#define _BN_MEMORY_FP_H_ + +//*** BnSetTop() +// This function is used when the size of a bignum_t is changed. It +// makes sure that the unused words are set to zero and that any significant +// words of zeros are eliminated from the used size indicator. +LIB_EXPORT bigNum BnSetTop(bigNum bn, // IN/OUT: number to clean + crypt_uword_t top // IN: the new top +); + +//*** BnClearTop() +// This function will make sure that all unused words are zero. +LIB_EXPORT bigNum BnClearTop(bigNum bn); + +//*** BnInitializeWord() +// This function is used to initialize an allocated bigNum with a word value. The +// bigNum does not have to be allocated with a single word. +LIB_EXPORT bigNum BnInitializeWord(bigNum bn, // IN: + crypt_uword_t allocated, // IN: + crypt_uword_t word // IN: +); + +//*** BnInit() +// This function initializes a stack allocated bignum_t. It initializes +// 'allocated' and 'size' and zeros the words of 'd'. +LIB_EXPORT bigNum BnInit(bigNum bn, crypt_uword_t allocated); + +//*** BnCopy() +// Function to copy a bignum_t. If the output is NULL, then +// nothing happens. If the input is NULL, the output is set +// to zero. +LIB_EXPORT BOOL BnCopy(bigNum out, bigConst in); +#if ALG_ECC + +//*** BnPointCopy() +// Function to copy a bn point. +LIB_EXPORT BOOL BnPointCopy(bigPoint pOut, pointConst pIn); + +//*** BnInitializePoint() +// This function is used to initialize a point structure with the addresses +// of the coordinates. +LIB_EXPORT bn_point_t* BnInitializePoint( + bigPoint p, // OUT: structure to receive pointers + bigNum x, // IN: x coordinate + bigNum y, // IN: y coordinate + bigNum z // IN: x coordinate +); +#endif // ALG_ECC + +#endif // _BN_MEMORY_FP_H_ diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnSupport_Interface.h b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnSupport_Interface.h new file mode 100644 index 00000000..125bd253 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnSupport_Interface.h @@ -0,0 +1,119 @@ +//** Introduction +// Prototypes for functions the bignum library requires +// from a bignum-based math support library. +// Functions contained in the MathInterface but not listed here are provided by +// the TpmBigNum library itself. +// +// This file contains the function prototypes for the functions that need to be +// present in the selected math library. For each function listed, there should +// be a small stub function. That stub provides the interface between the TPM +// code and the support library. In most cases, the stub function will only need +// to do a format conversion between the TPM big number and the support library +// big number. The TPM big number format was chosen to make this relatively +// simple and fast. +// +// Arithmetic operations return a BOOL to indicate if the operation completed +// successfully or not. + +#ifndef BN_SUPPORT_INTERFACE_H +#define BN_SUPPORT_INTERFACE_H +// TODO_RENAME_INC_FOLDER:private refers to the TPM_CoreLib private headers +#include "public/GpMacros.h" +#include +#include "BnValues.h" + +//** BnSupportLibInit() +// This function is called by CryptInit() so that necessary initializations can be +// performed on the cryptographic library. +LIB_EXPORT +int BnSupportLibInit(void); + +//** MathLibraryCompatibililtyCheck() +// This function is only used during development to make sure that the library +// that is being referenced is using the same size of data structures as the TPM. +BOOL BnMathLibraryCompatibilityCheck(void); + +//** BnModMult() +// Does 'op1' * 'op2' and divide by 'modulus' returning the remainder of the divide. +LIB_EXPORT BOOL BnModMult( + bigNum result, bigConst op1, bigConst op2, bigConst modulus); + +//** BnMult() +// Multiplies two numbers and returns the result +LIB_EXPORT BOOL BnMult(bigNum result, bigConst multiplicand, bigConst multiplier); + +//** BnDiv() +// This function divides two bigNum values. The function returns FALSE if there is +// an error in the operation. +LIB_EXPORT BOOL BnDiv( + bigNum quotient, bigNum remainder, bigConst dividend, bigConst divisor); +//** BnMod() +#define BnMod(a, b) BnDiv(NULL, (a), (a), (b)) + +#if ALG_RSA +//** BnGcd() +// Get the greatest common divisor of two numbers. This function is only needed +// when the TPM implements RSA. +LIB_EXPORT BOOL BnGcd(bigNum gcd, bigConst number1, bigConst number2); + +//** BnModExp() +// Do modular exponentiation using bigNum values. This function is only needed +// when the TPM implements RSA. +LIB_EXPORT BOOL BnModExp( + bigNum result, bigConst number, bigConst exponent, bigConst modulus); +#endif // ALG_RSA + +//** BnModInverse() +// Modular multiplicative inverse. +LIB_EXPORT BOOL BnModInverse(bigNum result, bigConst number, bigConst modulus); + +#if ALG_ECC + +//** BnCurveInitialize() +// This function is used to initialize the pointers of a bigCurveData structure. The +// structure is a set of pointers to bigNum values. The curve-dependent values are +// set by a different function. This function is only needed +// if the TPM supports ECC. +LIB_EXPORT bigCurveData* BnCurveInitialize(bigCurveData* E, TPM_ECC_CURVE curveId); + +//*** BnCurveFree() +// This function will free the allocated components of the curve and end the +// frame in which the curve data exists +LIB_EXPORT void BnCurveFree(bigCurveData* E); + +//** BnEccModMult() +// This function does a point multiply of the form R = [d]S. A return of FALSE +// indicates that the result was the point at infinity. This function is only needed +// if the TPM supports ECC. +LIB_EXPORT BOOL BnEccModMult( + bigPoint R, pointConst S, bigConst d, const bigCurveData* E); + +//** BnEccModMult2() +// This function does a point multiply of the form R = [d]S + [u]Q. A return of +// FALSE indicates that the result was the point at infinity. This function is only +// needed if the TPM supports ECC. +LIB_EXPORT BOOL BnEccModMult2(bigPoint R, + pointConst S, + bigConst d, + pointConst Q, + bigConst u, + const bigCurveData* E); + +//** BnEccAdd() +// This function does a point add R = S + Q. A return of FALSE +// indicates that the result was the point at infinity. This function is only needed +// if the TPM supports ECC. +LIB_EXPORT BOOL BnEccAdd( + bigPoint R, pointConst S, pointConst Q, const bigCurveData* E); + +#endif // ALG_ECC + +#if CRYPTO_LIB_REPORTING + +//** BnGetImplementation() +// This function reports the underlying library being used for bignum operations. +void BnGetImplementation(_CRYPTO_IMPL_DESCRIPTION* result); + +#endif // CRYPTO_LIB_REPORTING + +#endif //BN_SUPPORT_INTERFACE_H diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnUtil_fp.h b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnUtil_fp.h new file mode 100644 index 00000000..7b1dda2c --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnUtil_fp.h @@ -0,0 +1,6 @@ +//** Introduction +// Utility functions to support TpmBigNum library +#ifndef _BNUTIL_FP_H_ +#define _BNUTIL_FP_H_ + +#endif // _BNUTIL_FP_H_ diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnValues.h b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnValues.h new file mode 100644 index 00000000..0cb72cfc --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/BnValues.h @@ -0,0 +1,318 @@ +//** Introduction + +// This file contains the definitions needed for defining the internal bigNum +// structure. + +// A bigNum is a pointer to a structure. The structure has three fields. The +// last field is and array (d) of crypt_uword_t. Each word is in machine format +// (big- or little-endian) with the words in ascending significance (i.e. words +// in little-endian order). This is the order that seems to be used in every +// big number library in the worlds, so... +// +// The first field in the structure (allocated) is the number of words in 'd'. +// This is the upper limit on the size of the number that can be held in the +// structure. This differs from libraries like OpenSSL as this is not intended +// to deal with numbers of arbitrary size; just numbers that are needed to deal +// with the algorithms that are defined in the TPM implementation. +// +// The second field in the structure (size) is the number of significant words +// in 'n'. When this number is zero, the number is zero. The word at used-1 should +// never be zero. All words between d[size] and d[allocated-1] should be zero. + +//** Defines + +#ifndef _BN_NUMBERS_H +#define _BN_NUMBERS_H +// TODO_RENAME_INC_FOLDER:private refers to the TPM_CoreLib private headers +#include +#include // required for TpmFail_fp.h +#include +#include // requires capabilities & GpMacros + +// These are the basic big number formats. This is convertible to the library- +// specific format without too much difficulty. For the math performed using +// these numbers, the value is always positive. +#define BN_STRUCT_DEF(struct_type, count) \ + struct st_##struct_type##_t \ + { \ + crypt_uword_t allocated; \ + crypt_uword_t size; \ + crypt_uword_t d[count]; \ + } + +typedef BN_STRUCT_DEF(bnroot, 1) bignum_t; + +#ifndef bigNum +typedef bignum_t* bigNum; +typedef const bignum_t* bigConst; +#endif //bigNum + +extern const bignum_t BnConstZero; + +// The Functions to access the properties of a big number. +// Get number of allocated words +#define BnGetAllocated(x) (unsigned)((x)->allocated) + +// Get number of words used +#define BnGetSize(x) ((x)->size) + +// Get a pointer to the data array +#define BnGetArray(x) ((crypt_uword_t*)&((x)->d[0])) + +// Get the nth word of a bigNum (zero-based) +#define BnGetWord(x, i) (crypt_uword_t)((x)->d[i]) + +// Some things that are done often. + +// Test to see if a bignum_t is equal to zero +#define BnEqualZero(bn) (BnGetSize(bn) == 0) + +// Test to see if a bignum_t is equal to a word type +#define BnEqualWord(bn, word) \ + ((BnGetSize(bn) == 1) && (BnGetWord(bn, 0) == (crypt_uword_t)word)) + +// Determine if a bigNum is even. A zero is even. Although the +// indication that a number is zero is that its size is zero, +// all words of the number are 0 so this test works on zero. +#define BnIsEven(n) ((BnGetWord(n, 0) & 1) == 0) + +// The macros below are used to define bigNum values of the required +// size. The values are allocated on the stack so they can be +// treated like simple local values. + +// This will call the initialization function for a defined bignum_t. +// This sets the allocated and used fields and clears the words of 'n'. +#define BN_INIT(name) \ + (bigNum) BnInit((bigNum) & (name), BYTES_TO_CRYPT_WORDS(sizeof(name.d))) + +#define CRYPT_WORDS(bytes) BYTES_TO_CRYPT_WORDS(bytes) +#define MIN_ALLOC(bytes) (CRYPT_WORDS(bytes) < 1 ? 1 : CRYPT_WORDS(bytes)) +#define BN_CONST(name, bytes, initializer) \ + typedef const struct name##_type \ + { \ + crypt_uword_t allocated; \ + crypt_uword_t size; \ + crypt_uword_t d[MIN_ALLOC(bytes)]; \ + } name##_type; \ + name##_type name = {MIN_ALLOC(bytes), CRYPT_WORDS(bytes), {initializer}}; + +#define BN_STRUCT_ALLOCATION(bits) (BITS_TO_CRYPT_WORDS(bits) + 1) + +// Create a structure of the correct size. +#define BN_STRUCT(struct_type, bits) \ + BN_STRUCT_DEF(struct_type, BN_STRUCT_ALLOCATION(bits)) + +// Define a bigNum type with a specific allocation +#define BN_TYPE(name, bits) typedef BN_STRUCT(name, bits) bn_##name##_t + +// This creates a local bigNum variable of a specific size and +// initializes it from a TPM2B input parameter. +#define BN_INITIALIZED(name, bits, initializer) \ + BN_STRUCT(name, bits) name##_; \ + bigNum name = TpmMath_IntFrom2B(BN_INIT(name##_), (const TPM2B*)initializer) + +// Create a local variable that can hold a number with 'bits' +#define BN_VAR(name, bits) \ + BN_STRUCT(name, bits) _##name; \ + bigNum name = BN_INIT(_##name) + +// Create a type that can hold the largest number defined by the +// implementation. +#define BN_MAX(name) BN_VAR(name, LARGEST_NUMBER_BITS) +#define BN_MAX_INITIALIZED(name, initializer) \ + BN_INITIALIZED(name, LARGEST_NUMBER_BITS, initializer) + +// A word size value is useful +#define BN_WORD(name) BN_VAR(name, RADIX_BITS) + +// This is used to create a word-size bigNum and initialize it with +// an input parameter to a function. +#define BN_WORD_INITIALIZED(name, initial) \ + BN_STRUCT(RADIX_BITS) name##_; \ + bigNum name = BnInitializeWord( \ + (bigNum) & name##_, BN_STRUCT_ALLOCATION(RADIX_BITS), initial) + +// ECC-Specific Values + +// This is the format for a point. It is always in affine format. The Z value is +// carried as part of the point, primarily to simplify the interface to the support +// library. Rather than have the interface layer have to create space for the +// point each time it is used... +// The x, y, and z values are pointers to bigNum values and not in-line versions of +// the numbers. This is a relic of the days when there was no standard TPM format +// for the numbers +typedef struct _bn_point_t +{ + bigNum x; + bigNum y; + bigNum z; +} bn_point_t; + +typedef bn_point_t* bigPoint; +typedef const bn_point_t* pointConst; + +typedef struct constant_point_t +{ + bigConst x; + bigConst y; + bigConst z; +} constant_point_t; + +// coords points into x,y,z +// a bigPoint is a pointer to one of these structures, and +// therefore a pointer to bn_point_t (a coords). +// so bigPoint->coords->x->size is the size of x, and +// all 3 components are the same size. +#define BN_POINT_BUF(typename, bits) \ + struct bnpt_st_##typename##_t \ + { \ + bn_point_t coords; \ + BN_STRUCT(typename##_x, MAX_ECC_KEY_BITS) x; \ + BN_STRUCT(typename##_y, MAX_ECC_KEY_BITS) y; \ + BN_STRUCT(typename##_z, MAX_ECC_KEY_BITS) z; \ + } + +typedef BN_POINT_BUF(fullpoint, MAX_ECC_KEY_BITS) bn_fullpoint_t; + +// TPMBN_ECC_CURVE_CONSTANTS +// ========================= +// A cryptographic elliptic curve is a mathematical set (Group) of points that +// satisfy the group equation and are generated by linear multiples of some +// initial "generator" point (Gx,Gy). +// +// The TPM code supports ECC Curves that satisfy equations of the following +// form: +// +// (y^2 = x^3 + a*x + b) mod p +// +// A particular cryptographic curve is fully described by the following +// parameters: +// +// | Name | Meaning | +// | :------ | :---------------------------------------------------------------------------------- | +// | p | curve prime | +// | a, b | equation coefficients | +// | (Gx,Gy) | X and Y coordinates of the generator point. | +// | n | the order (size) of the generated group. n must be prime. | +// | h | the cofactor of the group size to the full set of points for a particular equation. | +// +// The group of constants to describe a particular ECC Curve (such as NIST P256 +// or P384) are contained in TPMBN_ECC_CURVE_CONSTANTS objects. In the +// TpmBigNum library these constants are always stored in TPM's internal BN +// (bigNum) format. +// +// Other math libraries are expected to provide these as compile time constants +// in a format they can efficiently consume at runtime. + +// Structure for the curve parameters. This is an analog to the +// TPMS_ALGORITHM_DETAIL_ECC +typedef struct +{ + TPM_ECC_CURVE curveId; // TPM Algorithm ID for this data + bigConst prime; // a prime number + bigConst order; // the order of the curve + bigConst h; // cofactor + bigConst a; // linear coefficient + bigConst b; // constant term + constant_point_t base; // base point +} TPMBN_ECC_CURVE_CONSTANTS; + +// Access macros for the TPMBN_ECC_CURVE_CONSTANTS structure. The parameter 'C' is a pointer +// to an TPMBN_ECC_CURVE_CONSTANTS structure. In some libraries, the curve structure E contains +// a pointer to an TPMBN_ECC_CURVE_CONSTANTS structure as well as some other bits. For those +// cases, the AccessCurveConstants function is used in the code to first get the pointer +// to the TPMBN_ECC_CURVE_CONSTANTS for access. In some cases, the function does nothing. +// AccessCurveConstants and these functions are all defined as inline so they can be optimized +// away in cases where they are no-ops. +TPM_INLINE bigConst BnCurveGetPrime(const TPMBN_ECC_CURVE_CONSTANTS* C) +{ + return C->prime; +} +TPM_INLINE bigConst BnCurveGetOrder(const TPMBN_ECC_CURVE_CONSTANTS* C) +{ + return C->order; +} +TPM_INLINE bigConst BnCurveGetCofactor(const TPMBN_ECC_CURVE_CONSTANTS* C) +{ + return C->h; +} +TPM_INLINE bigConst BnCurveGet_a(const TPMBN_ECC_CURVE_CONSTANTS* C) +{ + return C->a; +} +TPM_INLINE bigConst BnCurveGet_b(const TPMBN_ECC_CURVE_CONSTANTS* C) +{ + return C->b; +} +TPM_INLINE pointConst BnCurveGetG(const TPMBN_ECC_CURVE_CONSTANTS* C) +{ + return (pointConst) & (C->base); +} +TPM_INLINE bigConst BnCurveGetGx(const TPMBN_ECC_CURVE_CONSTANTS* C) +{ + return C->base.x; +} +TPM_INLINE bigConst BnCurveGetGy(const TPMBN_ECC_CURVE_CONSTANTS* C) +{ + return C->base.y; +} +TPM_INLINE TPM_ECC_CURVE BnCurveGetCurveId(const TPMBN_ECC_CURVE_CONSTANTS* C) +{ + return C->curveId; +} + +// Convert bytes in initializers +// This is used for CryptEccData.c. +#define BIG_ENDIAN_BYTES_TO_UINT32(a, b, c, d) \ + (((UINT32)(a) << 24) + ((UINT32)(b) << 16) + ((UINT32)(c) << 8) + ((UINT32)(d))) + +#define BIG_ENDIAN_BYTES_TO_UINT64(a, b, c, d, e, f, g, h) \ + (((UINT64)(a) << 56) + ((UINT64)(b) << 48) + ((UINT64)(c) << 40) \ + + ((UINT64)(d) << 32) + ((UINT64)(e) << 24) + ((UINT64)(f) << 16) \ + + ((UINT64)(g) << 8) + ((UINT64)(h))) + +// These macros are used for data initialization of big number ECC constants +// These two macros combine a macro for data definition with a macro for +// structure initialization. The 'a' parameter is a macro that gives numbers to +// each of the bytes of the initializer and defines where each of the numberd +// bytes will show up in the final structure. The 'b' value is a structure that +// contains the requisite number of bytes in big endian order. S, the MJOIN +// and JOIND macros will combine a macro defining a data layout with a macro defining +// the data to be places. Generally, these macros will only need expansion when +// CryptEccData.c gets compiled. +#define JOINED(a, b) a b +#define MJOIN(a, b) a b + +#if RADIX_BYTES == 64 +# define B8_TO_BN(a, b, c, d, e, f, g, h) \ + ((((((((((((((((UINT64)a) << 8) | (UINT64)b) << 8) | (UINT64)c) << 8) \ + | (UINT64)d) \ + << 8) \ + | (UINT64)e) \ + << 8) \ + | (UINT64)f) \ + << 8) \ + | (UINT64)g) \ + << 8) \ + | (UINT64)h) +# define B1_TO_BN(a) B8_TO_BN(0, 0, 0, 0, 0, 0, 0, a) +# define B2_TO_BN(a, b) B8_TO_BN(0, 0, 0, 0, 0, 0, a, b) +# define B3_TO_BN(a, b, c) B8_TO_BN(0, 0, 0, 0, 0, a, b, c) +# define B4_TO_BN(a, b, c, d) B8_TO_BN(0, 0, 0, 0, a, b, c, d) +# define B5_TO_BN(a, b, c, d, e) B8_TO_BN(0, 0, 0, a, b, c, d, e) +# define B6_TO_BN(a, b, c, d, e, f) B8_TO_BN(0, 0, a, b, c, d, e, f) +# define B7_TO_BN(a, b, c, d, e, f, g) B8_TO_BN(0, a, b, c, d, e, f, g) +#else +# define B1_TO_BN(a) B4_TO_BN(0, 0, 0, a) +# define B2_TO_BN(a, b) B4_TO_BN(0, 0, a, b) +# define B3_TO_BN(a, b, c) B4_TO_BN(0, a, b, c) +# define B4_TO_BN(a, b, c, d) \ + (((((((UINT32)a << 8) | (UINT32)b) << 8) | (UINT32)c) << 8) | (UINT32)d) +# define B5_TO_BN(a, b, c, d, e) B4_TO_BN(b, c, d, e), B1_TO_BN(a) +# define B6_TO_BN(a, b, c, d, e, f) B4_TO_BN(c, d, e, f), B2_TO_BN(a, b) +# define B7_TO_BN(a, b, c, d, e, f, g) B4_TO_BN(d, e, f, g), B3_TO_BN(a, b, c) +# define B8_TO_BN(a, b, c, d, e, f, g, h) B4_TO_BN(e, f, g, h), B4_TO_BN(a, b, c, d) + +#endif + +#endif // _BN_NUMBERS_H \ No newline at end of file diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/include/CMakeLists.txt b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/CMakeLists.txt new file mode 100644 index 00000000..aa063fd0 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/CMakeLists.txt @@ -0,0 +1,37 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# + +project(Tpm_CryptoLib_TpmBigNum_Headers VERSION 1.0) +print_project_info() +add_library(Tpm_CryptoLib_TpmBigNum_Headers INTERFACE) +add_library(Tpm_CryptoLib_TpmBigNum_Headers::Tpm_CryptoLib_TpmBigNum_Headers ALIAS Tpm_CryptoLib_TpmBigNum_Headers) +target_link_libraries(Tpm_CryptoLib_TpmBigNum_Headers INTERFACE Tpm_CryptoLib_Common) +target_include_directories(Tpm_CryptoLib_TpmBigNum_Headers + INTERFACE + "$" + "$" +) + +# create install and export information for downstream projects to use +install_and_export_config_targets(${PROJECT_NAME}) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## + +install(FILES + ${CMAKE_CURRENT_SOURCE_DIR}/TpmBigNum/TpmToTpmBigNumMath.h + ${CMAKE_CURRENT_SOURCE_DIR}/BnConvert_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/BnMath_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/BnMemory_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/BnSupport_Interface.h + ${CMAKE_CURRENT_SOURCE_DIR}/BnUtil_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/BnValues.h + DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/TpmBigNum +) + +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(${PROJECT_NAME}) diff --git a/TPMCmd/tpm/cryptolibs/TpmBigNum/include/TpmBigNum/TpmToTpmBigNumMath.h b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/TpmBigNum/TpmToTpmBigNumMath.h new file mode 100644 index 00000000..a18fd43a --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/TpmBigNum/include/TpmBigNum/TpmToTpmBigNumMath.h @@ -0,0 +1,60 @@ +//** Introduction +// This file contains OpenSSL specific functions called by TpmBigNum library to provide +// the TpmBigNum + OpenSSL math support. + +#ifndef _TPM_TO_TPMBIGNUM_MATH_H_ +#define _TPM_TO_TPMBIGNUM_MATH_H_ + +#ifdef MATH_LIB_DEFINED +# error only one primary math library allowed +#endif +#define MATH_LIB_DEFINED + +// indicate the TPMBIGNUM library is active +#define MATH_LIB_TPMBIGNUM + +// TODO_RENAME_INC_FOLDER: private refers to the TPM_CoreLib private headers +#include // required for TpmFail_fp.h +#include +#include // requires capabilities & GpMacros +#include "BnValues.h" + +#ifndef LIB_INCLUDE +# error include ordering error, LIB_INCLUDE not defined +#endif +#ifndef BN_MATH_LIB +# error BN_MATH_LIB not defined, required to provide BN library functions. +#endif + +#if defined(CRYPT_CURVE_INITIALIZED) || defined(CRYPT_CURVE_FREE) +#error include ordering error, expected CRYPT_CURVE_INITIALIZED & CRYPT_CURVE_FREE to be undefined. +#endif + +// Add support library dependent definitions. +// For TpmBigNum, we expect bigCurveData to be a defined type. +#include LIB_INCLUDE(BnTo, BN_MATH_LIB, Math) + +#include "BnConvert_fp.h" +#include "BnMath_fp.h" +#include "BnMemory_fp.h" +#include "BnSupport_Interface.h" + +// Define macros and types necessary for the math library abstraction layer +// Create a data object backing a Crypt_Int big enough for the given number of +// data bits +#define CRYPT_INT_BUF(buftypename, bits) BN_STRUCT(buftypename, bits) + +// Create a data object backing a Crypt_Point big enough for the given number of +// data bits, per coordinate +#define CRYPT_POINT_BUF(buftypename, bits) BN_POINT_BUF(buftypename, bits) + +// Create an instance of a data object underlying Crypt_EccCurve on the stack +// sufficient for given bit size. In our case, all are the same size. +#define CRYPT_CURVE_BUF(buftypename, max_size_in_bits) bigCurveData + +// now include the math library functional interface and instantiate the +// Crypt_Int & related types +// TODO_RENAME_INC_FOLDER: This should have a Tpm_Cryptolib_Common component prefix. +#include + +#endif // _TPM_TO_TPMBIGNUM_MATH_H_ diff --git a/TPMCmd/tpm/cryptolibs/common/CMakeLists.txt b/TPMCmd/tpm/cryptolibs/common/CMakeLists.txt new file mode 100644 index 00000000..27fd8dd9 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/common/CMakeLists.txt @@ -0,0 +1,34 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +project(Tpm_CryptoLib_Common VERSION 1.0) +print_project_info() +add_library(Tpm_CryptoLib_Common INTERFACE) +add_library(Tpm_CryptoLib_Common::Tpm_CryptoLib_Common ALIAS Tpm_CryptoLib_Common) + +target_link_libraries(Tpm_CryptoLib_Common INTERFACE Tpm_Public_Headers) + +target_include_directories(${PROJECT_NAME} + INTERFACE + "$" + "$" +) + +# create install and export information for downstream projects to use +install_and_export_config_targets(${PROJECT_NAME}) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## + +install(FILES + ${CMAKE_CURRENT_SOURCE_DIR}/include/CryptoInterface.h + ${CMAKE_CURRENT_SOURCE_DIR}/include/EccConstantData.inl + ${CMAKE_CURRENT_SOURCE_DIR}/include/MathLibraryInterface.h + ${CMAKE_CURRENT_SOURCE_DIR}/include/MathLibraryInterfaceTypes.h + DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/Tpm_CryptoLib_Common) + +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(${PROJECT_NAME}) diff --git a/TPMCmd/tpm/cryptolibs/common/include/CryptoInterface.h b/TPMCmd/tpm/cryptolibs/common/include/CryptoInterface.h new file mode 100644 index 00000000..fae84cc4 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/common/include/CryptoInterface.h @@ -0,0 +1,28 @@ +//** Introduction +// +// This file contains prototypes that are common to all TPM crypto interfaces. +// +#ifndef CRYPTO_INTERFACE_H +#define CRYPTO_INTERFACE_H + +#include "TpmConfiguration/TpmBuildSwitches.h" + +#if SIMULATION && CRYPTO_LIB_REPORTING + +typedef struct crypto_impl_description +{ + // The name of the crypto library, ASCII encoded. + char name[32]; + // The version of the crypto library, ASCII encoded. + char version[32]; +} _CRYPTO_IMPL_DESCRIPTION; + +// When building the simulator, the plugged-in crypto libraries can report its +// version information by implementing these interfaces. +void _crypto_GetSymImpl(_CRYPTO_IMPL_DESCRIPTION* result); +void _crypto_GetHashImpl(_CRYPTO_IMPL_DESCRIPTION* result); +void _crypto_GetMathImpl(_CRYPTO_IMPL_DESCRIPTION* result); + +#endif // SIMULATION && CRYPTO_LIB_REPORTING + +#endif // CRYPTO_INTERFACE_H diff --git a/TPMCmd/tpm/cryptolibs/common/include/EccConstantData.inl b/TPMCmd/tpm/cryptolibs/common/include/EccConstantData.inl new file mode 100644 index 00000000..004cb61a --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/common/include/EccConstantData.inl @@ -0,0 +1,380 @@ + +// This file contains the ECC curve data. The data is contained in macros so this +// file can be included in other format-specific header files that reformat the +// constant data in any format desired. This file itself is never used alone. + +// Expected macros: +// +// TO_ECC_: +// <= 64: +// "N" byte arguments in most-significant to least-significant order The number +// of arguments depends on the bit length, which must be a multiple of 8. +// > 64: +// "Q" macro arguments from the <= 64 group to produce the total number +// of requested bits. +// +// ECC_CONST: +// Parameters: +// Name, Bytes, initial value; either a single byte value or a combination of TO_ECC macros + +#if ALG_ECC + +ECC_CONST(ECC_ZERO, 1, 0); +ECC_CONST(ECC_ONE, 1, 1); + +# if ECC_NIST_P192 +ECC_CONST(NIST_P192_p, + 24, + TO_ECC_192(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF))); +ECC_CONST(NIST_P192_a, + 24, + TO_ECC_192(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC))); +ECC_CONST(NIST_P192_b, + 24, + TO_ECC_192(TO_ECC_64(0x64, 0x21, 0x05, 0x19, 0xE5, 0x9C, 0x80, 0xE7), + TO_ECC_64(0x0F, 0xA7, 0xE9, 0xAB, 0x72, 0x24, 0x30, 0x49), + TO_ECC_64(0xFE, 0xB8, 0xDE, 0xEC, 0xC1, 0x46, 0xB9, 0xB1))); +ECC_CONST(NIST_P192_gX, + 24, + TO_ECC_192(TO_ECC_64(0x18, 0x8D, 0xA8, 0x0E, 0xB0, 0x30, 0x90, 0xF6), + TO_ECC_64(0x7C, 0xBF, 0x20, 0xEB, 0x43, 0xA1, 0x88, 0x00), + TO_ECC_64(0xF4, 0xFF, 0x0A, 0xFD, 0x82, 0xFF, 0x10, 0x12))); +ECC_CONST(NIST_P192_gY, + 24, + TO_ECC_192(TO_ECC_64(0x07, 0x19, 0x2B, 0x95, 0xFF, 0xC8, 0xDA, 0x78), + TO_ECC_64(0x63, 0x10, 0x11, 0xED, 0x6B, 0x24, 0xCD, 0xD5), + TO_ECC_64(0x73, 0xF9, 0x77, 0xA1, 0x1E, 0x79, 0x48, 0x11))); +ECC_CONST(NIST_P192_n, + 24, + TO_ECC_192(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x99, 0xDE, 0xF8, 0x36), + TO_ECC_64(0x14, 0x6B, 0xC9, 0xB1, 0xB4, 0xD2, 0x28, 0x31))); +# define NIST_P192_h ECC_ONE +# define NIST_P192_gZ ECC_ONE + +# endif // ECC_NIST_P192 + +# if ECC_NIST_P224 +ECC_CONST(NIST_P224_p, + 28, + TO_ECC_224(TO_ECC_32(0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), + TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01))); +ECC_CONST(NIST_P224_a, + 28, + TO_ECC_224(TO_ECC_32(0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE))); +ECC_CONST(NIST_P224_b, + 28, + TO_ECC_224(TO_ECC_32(0xB4, 0x05, 0x0A, 0x85), + TO_ECC_64(0x0C, 0x04, 0xB3, 0xAB, 0xF5, 0x41, 0x32, 0x56), + TO_ECC_64(0x50, 0x44, 0xB0, 0xB7, 0xD7, 0xBF, 0xD8, 0xBA), + TO_ECC_64(0x27, 0x0B, 0x39, 0x43, 0x23, 0x55, 0xFF, 0xB4))); +ECC_CONST(NIST_P224_gX, + 28, + TO_ECC_224(TO_ECC_32(0xB7, 0x0E, 0x0C, 0xBD), + TO_ECC_64(0x6B, 0xB4, 0xBF, 0x7F, 0x32, 0x13, 0x90, 0xB9), + TO_ECC_64(0x4A, 0x03, 0xC1, 0xD3, 0x56, 0xC2, 0x11, 0x22), + TO_ECC_64(0x34, 0x32, 0x80, 0xD6, 0x11, 0x5C, 0x1D, 0x21))); +ECC_CONST(NIST_P224_gY, + 28, + TO_ECC_224(TO_ECC_32(0xBD, 0x37, 0x63, 0x88), + TO_ECC_64(0xB5, 0xF7, 0x23, 0xFB, 0x4C, 0x22, 0xDF, 0xE6), + TO_ECC_64(0xCD, 0x43, 0x75, 0xA0, 0x5A, 0x07, 0x47, 0x64), + TO_ECC_64(0x44, 0xD5, 0x81, 0x99, 0x85, 0x00, 0x7E, 0x34))); +ECC_CONST(NIST_P224_n, + 28, + TO_ECC_224(TO_ECC_32(0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0x16, 0xA2, 0xE0, 0xB8, 0xF0, 0x3E), + TO_ECC_64(0x13, 0xDD, 0x29, 0x45, 0x5C, 0x5C, 0x2A, 0x3D))); +# define NIST_P224_h ECC_ONE +# define NIST_P224_gZ ECC_ONE + +# endif // ECC_NIST_P224 + +# if ECC_NIST_P256 +ECC_CONST(NIST_P256_p, + 32, + TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x01), + TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), + TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF))); +ECC_CONST(NIST_P256_a, + 32, + TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x01), + TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), + TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC))); +ECC_CONST(NIST_P256_b, + 32, + TO_ECC_256(TO_ECC_64(0x5A, 0xC6, 0x35, 0xD8, 0xAA, 0x3A, 0x93, 0xE7), + TO_ECC_64(0xB3, 0xEB, 0xBD, 0x55, 0x76, 0x98, 0x86, 0xBC), + TO_ECC_64(0x65, 0x1D, 0x06, 0xB0, 0xCC, 0x53, 0xB0, 0xF6), + TO_ECC_64(0x3B, 0xCE, 0x3C, 0x3E, 0x27, 0xD2, 0x60, 0x4B))); +ECC_CONST(NIST_P256_gX, + 32, + TO_ECC_256(TO_ECC_64(0x6B, 0x17, 0xD1, 0xF2, 0xE1, 0x2C, 0x42, 0x47), + TO_ECC_64(0xF8, 0xBC, 0xE6, 0xE5, 0x63, 0xA4, 0x40, 0xF2), + TO_ECC_64(0x77, 0x03, 0x7D, 0x81, 0x2D, 0xEB, 0x33, 0xA0), + TO_ECC_64(0xF4, 0xA1, 0x39, 0x45, 0xD8, 0x98, 0xC2, 0x96))); +ECC_CONST(NIST_P256_gY, + 32, + TO_ECC_256(TO_ECC_64(0x4F, 0xE3, 0x42, 0xE2, 0xFE, 0x1A, 0x7F, 0x9B), + TO_ECC_64(0x8E, 0xE7, 0xEB, 0x4A, 0x7C, 0x0F, 0x9E, 0x16), + TO_ECC_64(0x2B, 0xCE, 0x33, 0x57, 0x6B, 0x31, 0x5E, 0xCE), + TO_ECC_64(0xCB, 0xB6, 0x40, 0x68, 0x37, 0xBF, 0x51, 0xF5))); +ECC_CONST(NIST_P256_n, + 32, + TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xBC, 0xE6, 0xFA, 0xAD, 0xA7, 0x17, 0x9E, 0x84), + TO_ECC_64(0xF3, 0xB9, 0xCA, 0xC2, 0xFC, 0x63, 0x25, 0x51))); +# define NIST_P256_h ECC_ONE +# define NIST_P256_gZ ECC_ONE + +# endif // ECC_NIST_P256 + +# if ECC_NIST_P384 +ECC_CONST(NIST_P384_p, + 48, + TO_ECC_384(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), + TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF))); +ECC_CONST(NIST_P384_a, + 48, + TO_ECC_384(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), + TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFC))); +ECC_CONST(NIST_P384_b, + 48, + TO_ECC_384(TO_ECC_64(0xB3, 0x31, 0x2F, 0xA7, 0xE2, 0x3E, 0xE7, 0xE4), + TO_ECC_64(0x98, 0x8E, 0x05, 0x6B, 0xE3, 0xF8, 0x2D, 0x19), + TO_ECC_64(0x18, 0x1D, 0x9C, 0x6E, 0xFE, 0x81, 0x41, 0x12), + TO_ECC_64(0x03, 0x14, 0x08, 0x8F, 0x50, 0x13, 0x87, 0x5A), + TO_ECC_64(0xC6, 0x56, 0x39, 0x8D, 0x8A, 0x2E, 0xD1, 0x9D), + TO_ECC_64(0x2A, 0x85, 0xC8, 0xED, 0xD3, 0xEC, 0x2A, 0xEF))); +ECC_CONST(NIST_P384_gX, + 48, + TO_ECC_384(TO_ECC_64(0xAA, 0x87, 0xCA, 0x22, 0xBE, 0x8B, 0x05, 0x37), + TO_ECC_64(0x8E, 0xB1, 0xC7, 0x1E, 0xF3, 0x20, 0xAD, 0x74), + TO_ECC_64(0x6E, 0x1D, 0x3B, 0x62, 0x8B, 0xA7, 0x9B, 0x98), + TO_ECC_64(0x59, 0xF7, 0x41, 0xE0, 0x82, 0x54, 0x2A, 0x38), + TO_ECC_64(0x55, 0x02, 0xF2, 0x5D, 0xBF, 0x55, 0x29, 0x6C), + TO_ECC_64(0x3A, 0x54, 0x5E, 0x38, 0x72, 0x76, 0x0A, 0xB7))); +ECC_CONST(NIST_P384_gY, + 48, + TO_ECC_384(TO_ECC_64(0x36, 0x17, 0xDE, 0x4A, 0x96, 0x26, 0x2C, 0x6F), + TO_ECC_64(0x5D, 0x9E, 0x98, 0xBF, 0x92, 0x92, 0xDC, 0x29), + TO_ECC_64(0xF8, 0xF4, 0x1D, 0xBD, 0x28, 0x9A, 0x14, 0x7C), + TO_ECC_64(0xE9, 0xDA, 0x31, 0x13, 0xB5, 0xF0, 0xB8, 0xC0), + TO_ECC_64(0x0A, 0x60, 0xB1, 0xCE, 0x1D, 0x7E, 0x81, 0x9D), + TO_ECC_64(0x7A, 0x43, 0x1D, 0x7C, 0x90, 0xEA, 0x0E, 0x5F))); +ECC_CONST(NIST_P384_n, + 48, + TO_ECC_384(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xC7, 0x63, 0x4D, 0x81, 0xF4, 0x37, 0x2D, 0xDF), + TO_ECC_64(0x58, 0x1A, 0x0D, 0xB2, 0x48, 0xB0, 0xA7, 0x7A), + TO_ECC_64(0xEC, 0xEC, 0x19, 0x6A, 0xCC, 0xC5, 0x29, 0x73))); +# define NIST_P384_h ECC_ONE +# define NIST_P384_gZ ECC_ONE + +# endif // ECC_NIST_P384 + +# if ECC_NIST_P521 +ECC_CONST(NIST_P521_p, + 66, + TO_ECC_528(TO_ECC_16(0x01, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF))); +ECC_CONST(NIST_P521_a, + 66, + TO_ECC_528(TO_ECC_16(0x01, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC))); +ECC_CONST(NIST_P521_b, + 66, + TO_ECC_528(TO_ECC_16(0x00, 0x51), + TO_ECC_64(0x95, 0x3E, 0xB9, 0x61, 0x8E, 0x1C, 0x9A, 0x1F), + TO_ECC_64(0x92, 0x9A, 0x21, 0xA0, 0xB6, 0x85, 0x40, 0xEE), + TO_ECC_64(0xA2, 0xDA, 0x72, 0x5B, 0x99, 0xB3, 0x15, 0xF3), + TO_ECC_64(0xB8, 0xB4, 0x89, 0x91, 0x8E, 0xF1, 0x09, 0xE1), + TO_ECC_64(0x56, 0x19, 0x39, 0x51, 0xEC, 0x7E, 0x93, 0x7B), + TO_ECC_64(0x16, 0x52, 0xC0, 0xBD, 0x3B, 0xB1, 0xBF, 0x07), + TO_ECC_64(0x35, 0x73, 0xDF, 0x88, 0x3D, 0x2C, 0x34, 0xF1), + TO_ECC_64(0xEF, 0x45, 0x1F, 0xD4, 0x6B, 0x50, 0x3F, 0x00))); +ECC_CONST(NIST_P521_gX, + 66, + TO_ECC_528(TO_ECC_16(0x00, 0xC6), + TO_ECC_64(0x85, 0x8E, 0x06, 0xB7, 0x04, 0x04, 0xE9, 0xCD), + TO_ECC_64(0x9E, 0x3E, 0xCB, 0x66, 0x23, 0x95, 0xB4, 0x42), + TO_ECC_64(0x9C, 0x64, 0x81, 0x39, 0x05, 0x3F, 0xB5, 0x21), + TO_ECC_64(0xF8, 0x28, 0xAF, 0x60, 0x6B, 0x4D, 0x3D, 0xBA), + TO_ECC_64(0xA1, 0x4B, 0x5E, 0x77, 0xEF, 0xE7, 0x59, 0x28), + TO_ECC_64(0xFE, 0x1D, 0xC1, 0x27, 0xA2, 0xFF, 0xA8, 0xDE), + TO_ECC_64(0x33, 0x48, 0xB3, 0xC1, 0x85, 0x6A, 0x42, 0x9B), + TO_ECC_64(0xF9, 0x7E, 0x7E, 0x31, 0xC2, 0xE5, 0xBD, 0x66))); +ECC_CONST(NIST_P521_gY, + 66, + TO_ECC_528(TO_ECC_16(0x01, 0x18), + TO_ECC_64(0x39, 0x29, 0x6A, 0x78, 0x9A, 0x3B, 0xC0, 0x04), + TO_ECC_64(0x5C, 0x8A, 0x5F, 0xB4, 0x2C, 0x7D, 0x1B, 0xD9), + TO_ECC_64(0x98, 0xF5, 0x44, 0x49, 0x57, 0x9B, 0x44, 0x68), + TO_ECC_64(0x17, 0xAF, 0xBD, 0x17, 0x27, 0x3E, 0x66, 0x2C), + TO_ECC_64(0x97, 0xEE, 0x72, 0x99, 0x5E, 0xF4, 0x26, 0x40), + TO_ECC_64(0xC5, 0x50, 0xB9, 0x01, 0x3F, 0xAD, 0x07, 0x61), + TO_ECC_64(0x35, 0x3C, 0x70, 0x86, 0xA2, 0x72, 0xC2, 0x40), + TO_ECC_64(0x88, 0xBE, 0x94, 0x76, 0x9F, 0xD1, 0x66, 0x50))); +ECC_CONST(NIST_P521_n, + 66, + TO_ECC_528(TO_ECC_16(0x01, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFA), + TO_ECC_64(0x51, 0x86, 0x87, 0x83, 0xBF, 0x2F, 0x96, 0x6B), + TO_ECC_64(0x7F, 0xCC, 0x01, 0x48, 0xF7, 0x09, 0xA5, 0xD0), + TO_ECC_64(0x3B, 0xB5, 0xC9, 0xB8, 0x89, 0x9C, 0x47, 0xAE), + TO_ECC_64(0xBB, 0x6F, 0xB7, 0x1E, 0x91, 0x38, 0x64, 0x09))); +# define NIST_P521_h ECC_ONE +# define NIST_P521_gZ ECC_ONE + +# endif // ECC_NIST_P521 + +# if ECC_BN_P256 +ECC_CONST(BN_P256_p, + 32, + TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xF0, 0xCD), + TO_ECC_64(0x46, 0xE5, 0xF2, 0x5E, 0xEE, 0x71, 0xA4, 0x9F), + TO_ECC_64(0x0C, 0xDC, 0x65, 0xFB, 0x12, 0x98, 0x0A, 0x82), + TO_ECC_64(0xD3, 0x29, 0x2D, 0xDB, 0xAE, 0xD3, 0x30, 0x13))); +# define BN_P256_a ECC_ZERO +ECC_CONST(BN_P256_b, 1, TO_ECC_8(3)); +# define BN_P256_gX ECC_ONE +ECC_CONST(BN_P256_gY, 1, TO_ECC_8(2)); +ECC_CONST(BN_P256_n, + 32, + TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xF0, 0xCD), + TO_ECC_64(0x46, 0xE5, 0xF2, 0x5E, 0xEE, 0x71, 0xA4, 0x9E), + TO_ECC_64(0x0C, 0xDC, 0x65, 0xFB, 0x12, 0x99, 0x92, 0x1A), + TO_ECC_64(0xF6, 0x2D, 0x53, 0x6C, 0xD1, 0x0B, 0x50, 0x0D))); +# define BN_P256_h ECC_ONE +# define BN_P256_gZ ECC_ONE + +# endif // ECC_BN_P256 + +# if ECC_BN_P638 +ECC_CONST(BN_P638_p, + 80, + TO_ECC_640(TO_ECC_64(0x23, 0xFF, 0xFF, 0xFD, 0xC0, 0x00, 0x00, 0x0D), + TO_ECC_64(0x7F, 0xFF, 0xFF, 0xB8, 0x00, 0x00, 0x01, 0xD3), + TO_ECC_64(0xFF, 0xFF, 0xF9, 0x42, 0xD0, 0x00, 0x16, 0x5E), + TO_ECC_64(0x3F, 0xFF, 0x94, 0x87, 0x00, 0x00, 0xD5, 0x2F), + TO_ECC_64(0xFF, 0xFD, 0xD0, 0xE0, 0x00, 0x08, 0xDE, 0x55), + TO_ECC_64(0xC0, 0x00, 0x86, 0x52, 0x00, 0x21, 0xE5, 0x5B), + TO_ECC_64(0xFF, 0xFF, 0xF5, 0x1F, 0xFF, 0xF4, 0xEB, 0x80), + TO_ECC_64(0x00, 0x00, 0x00, 0x4C, 0x80, 0x01, 0x5A, 0xCD), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xE0), + TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x67))); +# define BN_P638_a ECC_ZERO +ECC_CONST(BN_P638_b, 2, TO_ECC_16(0x01, 0x01)); +ECC_CONST(BN_P638_gX, + 80, + TO_ECC_640(TO_ECC_64(0x23, 0xFF, 0xFF, 0xFD, 0xC0, 0x00, 0x00, 0x0D), + TO_ECC_64(0x7F, 0xFF, 0xFF, 0xB8, 0x00, 0x00, 0x01, 0xD3), + TO_ECC_64(0xFF, 0xFF, 0xF9, 0x42, 0xD0, 0x00, 0x16, 0x5E), + TO_ECC_64(0x3F, 0xFF, 0x94, 0x87, 0x00, 0x00, 0xD5, 0x2F), + TO_ECC_64(0xFF, 0xFD, 0xD0, 0xE0, 0x00, 0x08, 0xDE, 0x55), + TO_ECC_64(0xC0, 0x00, 0x86, 0x52, 0x00, 0x21, 0xE5, 0x5B), + TO_ECC_64(0xFF, 0xFF, 0xF5, 0x1F, 0xFF, 0xF4, 0xEB, 0x80), + TO_ECC_64(0x00, 0x00, 0x00, 0x4C, 0x80, 0x01, 0x5A, 0xCD), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xE0), + TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66))); +ECC_CONST(BN_P638_gY, 1, TO_ECC_8(0x10)); +ECC_CONST(BN_P638_n, + 80, + TO_ECC_640(TO_ECC_64(0x23, 0xFF, 0xFF, 0xFD, 0xC0, 0x00, 0x00, 0x0D), + TO_ECC_64(0x7F, 0xFF, 0xFF, 0xB8, 0x00, 0x00, 0x01, 0xD3), + TO_ECC_64(0xFF, 0xFF, 0xF9, 0x42, 0xD0, 0x00, 0x16, 0x5E), + TO_ECC_64(0x3F, 0xFF, 0x94, 0x87, 0x00, 0x00, 0xD5, 0x2F), + TO_ECC_64(0xFF, 0xFD, 0xD0, 0xE0, 0x00, 0x08, 0xDE, 0x55), + TO_ECC_64(0x60, 0x00, 0x86, 0x55, 0x00, 0x21, 0xE5, 0x55), + TO_ECC_64(0xFF, 0xFF, 0xF5, 0x4F, 0xFF, 0xF4, 0xEA, 0xC0), + TO_ECC_64(0x00, 0x00, 0x00, 0x49, 0x80, 0x01, 0x54, 0xD9), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xED, 0xA0), + TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x61))); +# define BN_P638_h ECC_ONE +# define BN_P638_gZ ECC_ONE + +# endif // ECC_BN_P638 + +# if ECC_SM2_P256 +ECC_CONST(SM2_P256_p, + 32, + TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF))); +ECC_CONST(SM2_P256_a, + 32, + TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC))); +ECC_CONST(SM2_P256_b, + 32, + TO_ECC_256(TO_ECC_64(0x28, 0xE9, 0xFA, 0x9E, 0x9D, 0x9F, 0x5E, 0x34), + TO_ECC_64(0x4D, 0x5A, 0x9E, 0x4B, 0xCF, 0x65, 0x09, 0xA7), + TO_ECC_64(0xF3, 0x97, 0x89, 0xF5, 0x15, 0xAB, 0x8F, 0x92), + TO_ECC_64(0xDD, 0xBC, 0xBD, 0x41, 0x4D, 0x94, 0x0E, 0x93))); +ECC_CONST(SM2_P256_gX, + 32, + TO_ECC_256(TO_ECC_64(0x32, 0xC4, 0xAE, 0x2C, 0x1F, 0x19, 0x81, 0x19), + TO_ECC_64(0x5F, 0x99, 0x04, 0x46, 0x6A, 0x39, 0xC9, 0x94), + TO_ECC_64(0x8F, 0xE3, 0x0B, 0xBF, 0xF2, 0x66, 0x0B, 0xE1), + TO_ECC_64(0x71, 0x5A, 0x45, 0x89, 0x33, 0x4C, 0x74, 0xC7))); +ECC_CONST(SM2_P256_gY, + 32, + TO_ECC_256(TO_ECC_64(0xBC, 0x37, 0x36, 0xA2, 0xF4, 0xF6, 0x77, 0x9C), + TO_ECC_64(0x59, 0xBD, 0xCE, 0xE3, 0x6B, 0x69, 0x21, 0x53), + TO_ECC_64(0xD0, 0xA9, 0x87, 0x7C, 0xC6, 0x2A, 0x47, 0x40), + TO_ECC_64(0x02, 0xDF, 0x32, 0xE5, 0x21, 0x39, 0xF0, 0xA0))); +ECC_CONST(SM2_P256_n, + 32, + TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), + TO_ECC_64(0x72, 0x03, 0xDF, 0x6B, 0x21, 0xC6, 0x05, 0x2B), + TO_ECC_64(0x53, 0xBB, 0xF4, 0x09, 0x39, 0xD5, 0x41, 0x23))); +# define SM2_P256_h ECC_ONE +# define SM2_P256_gZ ECC_ONE + +# endif // ECC_SM2_P256 + +#endif // TPM_ALG_ECC diff --git a/TPMCmd/tpm/cryptolibs/common/include/MathLibraryInterface.h b/TPMCmd/tpm/cryptolibs/common/include/MathLibraryInterface.h new file mode 100644 index 00000000..e56bb322 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/common/include/MathLibraryInterface.h @@ -0,0 +1,373 @@ +//** Introduction +// +// This file contains the function prototypes for the functions that need to be +// present in the selected math library. For each function listed, there should +// be a small stub function. That stub provides the interface between the TPM +// code and the support library. In most cases, the stub function will only need +// to do a format conversion between the Crypt_* formats to the internal support +// library format. Since the external library also provides the buffer macros +// for the underlying types, this is typically just a cast from the TPM type to +// the internal type. +// +// Arithmetic operations return a BOOL to indicate if the operation completed +// successfully or not. + +#ifndef MATH_LIBRARY_INTERFACE_H +#define MATH_LIBRARY_INTERFACE_H + +// Types +#include "MathLibraryInterfaceTypes.h" + +// *************************************************************************** +// Library Level Functions +// *************************************************************************** + +//** ExtMath_LibInit() +// This function is called by CryptInit() so that necessary initializations can be +// performed on the cryptographic library. +LIB_EXPORT int ExtMath_LibInit(void); + +//** MathLibraryCompatibililtyCheck() +// This function is only used during development to make sure that the library +// that is being referenced is using the same size of data structures as the TPM. +LIB_EXPORT BOOL ExtMath_Debug_CompatibilityCheck(void); + +// *************************************************************************** +// Integer/Number Functions (non-ECC) +// *************************************************************************** + +// ################# +// type initializers +// ################# + +//** ExtMath_Initialize_Int() +// Initialize* functions tells the Crypt_Int types how large of a value it can +// contain which is a compile time constant +LIB_EXPORT Crypt_Int* ExtMath_Initialize_Int(Crypt_Int* buffer, NUMBYTES bits); + +// ################# +// Buffer Converters +// ################# +// convert TPM2B byte datainto the private format. The Crypt_Int must already be +// initialized with it's maximum size. Byte-based Initializers must be MSB first +// (TPM external format). +LIB_EXPORT Crypt_Int* ExtMath_IntFromBytes( + Crypt_Int* buffer, const BYTE* input, NUMBYTES byteCount); +// Convert Crypt_Int into external format as a byte array. +LIB_EXPORT BOOL ExtMath_IntToBytes( + const Crypt_Int* value, BYTE* output, NUMBYTES* pByteCount); +// Set Crypt_Int to a given small value. Words are native format. +LIB_EXPORT Crypt_Int* ExtMath_SetWord(Crypt_Int* buffer, crypt_uword_t word); + +// ################# +// Copy Functions +// ################# + +//*** ExtMath_Copy() +// Function to copy a bignum_t. If the output is NULL, then +// nothing happens. If the input is NULL, the output is set to zero. +LIB_EXPORT BOOL ExtMath_Copy(Crypt_Int* out, const Crypt_Int* in); + +// ############################### +// Ordinary Arithmetic, writ large +// ############################### + +//** ExtMath_Multiply() +// Multiplies two numbers and returns the result +LIB_EXPORT BOOL ExtMath_Multiply( + Crypt_Int* result, const Crypt_Int* multiplicand, const Crypt_Int* multiplier); + +//** ExtMath_Divide() +// This function divides two Crypt_Int* values. The function returns FALSE if there is +// an error in the operation. Quotient may be null, in which case this function returns +// only the remainder. +LIB_EXPORT BOOL ExtMath_Divide(Crypt_Int* quotient, + Crypt_Int* remainder, + const Crypt_Int* dividend, + const Crypt_Int* divisor); + +//** ExtMath_GCD() +// Get the greatest common divisor of two numbers. This function is only needed +// when the TPM implements RSA. +LIB_EXPORT BOOL ExtMath_GCD( + Crypt_Int* gcd, const Crypt_Int* number1, const Crypt_Int* number2); + +//*** ExtMath_Add() +// This function adds two Crypt_Int* values. This function always returns TRUE. +LIB_EXPORT BOOL ExtMath_Add( + Crypt_Int* result, const Crypt_Int* op1, const Crypt_Int* op2); + +//*** ExtMath_AddWord() +// This function adds a word value to a Crypt_Int*. This function always returns TRUE. +LIB_EXPORT BOOL ExtMath_AddWord( + Crypt_Int* result, const Crypt_Int* op, crypt_uword_t word); + +//*** ExtMath_Subtract() +// This function does subtraction of two Crypt_Int* values and returns result = op1 - op2 +// when op1 is greater than op2. If op2 is greater than op1, then a fault is +// generated. This function always returns TRUE. +LIB_EXPORT BOOL ExtMath_Subtract( + Crypt_Int* result, const Crypt_Int* op1, const Crypt_Int* op2); + +//*** ExtMath_SubtractWord() +// This function subtracts a word value from a Crypt_Int*. This function always +// returns TRUE. +LIB_EXPORT BOOL ExtMath_SubtractWord( + Crypt_Int* result, const Crypt_Int* op, crypt_uword_t word); + +// ############################### +// Modular Arithmetic, writ large +// ############################### + +//** ExtMath_Mod() +// compute valueAndResult = valueAndResult mod modulus +// This function divides two Crypt_Int* values and returns only the remainder, +// replacing the original dividend. The function returns FALSE if there is an +// error in the operation. +LIB_EXPORT BOOL ExtMath_Mod(Crypt_Int* valueAndResult, const Crypt_Int* modulus); + +//** ExtMath_ModMult() +// Compute result = (op1 * op2) mod modulus +LIB_EXPORT BOOL ExtMath_ModMult(Crypt_Int* result, + const Crypt_Int* op1, + const Crypt_Int* op2, + const Crypt_Int* modulus); + +//** ExtMath_ModExp() +// Compute result = (number ^ exponent) mod modulus +// where ^ indicates exponentiation. +// This function is only needed when the TPM implements RSA. +LIB_EXPORT BOOL ExtMath_ModExp(Crypt_Int* result, + const Crypt_Int* number, + const Crypt_Int* exponent, + const Crypt_Int* modulus); + +//** ExtMath_ModInverse() +// Compute the modular multiplicative inverse. +// result = (number ^ -1) mod modulus +// This function is only needed when the TPM implements RSA. +LIB_EXPORT BOOL ExtMath_ModInverse( + Crypt_Int* result, const Crypt_Int* number, const Crypt_Int* modulus); + +//** ExtMath_ModInversePrime() +// Compute the modular multiplicative inverse. This is an optimized function for +// the case where the modulus is known to be prime. +// +// CAUTION: Depending on the library implementation this may be much faster than +// the normal ModInverse, and therefore is subject to exposing the fact the +// modulus is prime via a timing side-channel. In many cases (e.g. ECC primes), +// the prime is not sensitive and this optimized route can be used. +LIB_EXPORT BOOL ExtMath_ModInversePrime( + Crypt_Int* result, const Crypt_Int* number, const Crypt_Int* primeModulus); + +//*** ExtMath_ModWord() +// compute numerator +// This function does modular division of a big number when the modulus is a +// word value. +LIB_EXPORT crypt_word_t ExtMath_ModWord(const Crypt_Int* numerator, + crypt_word_t modulus); + +// ############################### +// Queries +// ############################### + +//*** ExtMath_UnsignedCmp() +// This function performs a comparison of op1 to op2. The compare is approximately +// constant time if the size of the values used in the compare is consistent +// across calls (from the same line in the calling code). +// Return Type: int +// < 0 op1 is less than op2 +// 0 op1 is equal to op2 +// > 0 op1 is greater than op2 +LIB_EXPORT int ExtMath_UnsignedCmp(const Crypt_Int* op1, const Crypt_Int* op2); + +//*** ExtMath_UnsignedCmpWord() +// Compare a Crypt_Int* to a crypt_uword_t. +// Return Type: int +// -1 op1 is less that word +// 0 op1 is equal to word +// 1 op1 is greater than word +LIB_EXPORT int ExtMath_UnsignedCmpWord(const Crypt_Int* op1, crypt_uword_t word); + +//*** ExtMath_IsEqualWord() +// Compare a Crypt_Int* to a crypt_uword_t for equality +// Return Type: BOOL +LIB_EXPORT BOOL ExtMath_IsEqualWord(const Crypt_Int* bn, crypt_uword_t word); + +//*** ExtMath_IsZero() +// Compare a Crypt_Int* to zero, expected to be O(1) time. +// Return Type: BOOL +LIB_EXPORT BOOL ExtMath_IsZero(const Crypt_Int* op1); + +//*** ExtMath_MostSigBitNum() +// +// This function returns the zero-based number of the MSb (Most significant bit) +// of a Crypt_Int* value. +// +// Return Type: int +// +// -1 the word was zero or 'bn' was NULL +// n the bit number of the most significant bit in the word +LIB_EXPORT int ExtMath_MostSigBitNum(const Crypt_Int* bn); + +//*** ExtMath_GetLeastSignificant32bits() +// +// This function returns the least significant 32-bits of an integer value +// Return Type: uint32_t +LIB_EXPORT uint32_t ExtMath_GetLeastSignificant32bits(const Crypt_Int* bn); + +//*** ExtMath_SizeInBits() +// +// This function returns the number of bits required to hold a number. It is one +// greater than the Msb. This function is expected to be side channel safe, and +// may be O(size) or O(1) where 'size' is the allocated (not actual) size of the +// value. +LIB_EXPORT unsigned ExtMath_SizeInBits(const Crypt_Int* n); + +// ############################### +// Bitwise Operations +// ############################### + +//*** ExtMath_SetBit() +// +// This function will SET a bit in a Crypt_Int*. Bit 0 is the least-significant +// bit in the 0th digit_t. The function returns TRUE if the bitNum is within the +// range valid for the given number. If bitNum is too large, the function +// should return FALSE, and the TPM will enter failure mode. +// Return Type: BOOL +LIB_EXPORT BOOL ExtMath_SetBit(Crypt_Int* bn, // IN/OUT: big number to modify + unsigned int bitNum // IN: Bit number to SET +); + +//*** ExtMath_TestBit() +// This function is used to check to see if a bit is SET in a bignum_t. The 0th bit +// is the LSb of d[0]. +// Return Type: BOOL +// TRUE(1) the bit is set +// FALSE(0) the bit is not set or the number is out of range +LIB_EXPORT BOOL ExtMath_TestBit(Crypt_Int* bn, // IN: number to check + unsigned int bitNum // IN: bit to test +); + +//***ExtMath_MaskBits() +// This function is used to mask off high order bits of a big number. +// The returned value will have no more than 'maskBit' bits +// set. +// Note: There is a requirement that unused words of a bignum_t are set to zero. +// Return Type: BOOL +// TRUE(1) result masked +// FALSE(0) the input was not as large as the mask +LIB_EXPORT BOOL ExtMath_MaskBits( + Crypt_Int* bn, // IN/OUT: number to mask + crypt_uword_t maskBit // IN: the bit number for the mask. +); + +//*** ExtMath_ShiftRight() +// This function will shift a Crypt_Int* to the right by the shiftAmount. +// This function always returns TRUE. +LIB_EXPORT BOOL ExtMath_ShiftRight( + Crypt_Int* result, const Crypt_Int* toShift, uint32_t shiftAmount); + +// *************************************************************************** +// ECC Functions +// *************************************************************************** +// ################# +// type initializers +// ################# + +//** initialize point structure given memory size of each coordinate +LIB_EXPORT Crypt_Point* ExtEcc_Initialize_Point(Crypt_Point* buffer, + NUMBYTES bitsPerCoord); + +//** ExtEcc_CurveInitialize() +// This function is used to initialize a Crypt_EccCurve structure. The +// structure is a set of pointers to Crypt_Int* values. The curve-dependent values are +// set by a different function. This function is only needed +// if the TPM supports ECC. +LIB_EXPORT const Crypt_EccCurve* ExtEcc_CurveInitialize(Crypt_EccCurve* E, + TPM_ECC_CURVE curveId); + +// ################# +// DESTRUCTOR - See Warning +// ################# + +//*** ExtEcc_CurveFree() +// This function will free the allocated components of the curve and end the +// frame in which the curve data exists. +// WARNING: Not guaranteed to be called in presence of LONGJMP. +LIB_EXPORT void ExtEcc_CurveFree(const Crypt_EccCurve* E); + +// ################# +// Buffer Converters +// ################# +//** point structure to/from raw coordinate buffers. +LIB_EXPORT Crypt_Point* ExtEcc_PointFromBytes(Crypt_Point* buffer, + const BYTE* x, + NUMBYTES nBytesX, + const BYTE* y, + NUMBYTES nBytesY); + +LIB_EXPORT BOOL ExtEcc_PointToBytes( + const Crypt_Point* point, BYTE* x, NUMBYTES* nBytesX, BYTE* y, NUMBYTES* nBytesY); + +// #################### +// ECC Point Operations +// #################### + +//** ExtEcc_PointMultiply() +// This function does a point multiply of the form R = [d]S. A return of FALSE +// indicates that the result was the point at infinity. This function is only needed +// if the TPM supports ECC. +LIB_EXPORT BOOL ExtEcc_PointMultiply(Crypt_Point* R, + const Crypt_Point* S, + const Crypt_Int* d, + const Crypt_EccCurve* E); + +//** ExtEcc_PointMultiplyAndAdd() +// This function does a point multiply of the form R = [d]S + [u]Q. A return of +// FALSE indicates that the result was the point at infinity. This function is only +// needed if the TPM supports ECC. +LIB_EXPORT BOOL ExtEcc_PointMultiplyAndAdd(Crypt_Point* R, + const Crypt_Point* S, + const Crypt_Int* d, + const Crypt_Point* Q, + const Crypt_Int* u, + const Crypt_EccCurve* E); + +//** ExtEcc_PointAdd() +// This function does a point add R = S + Q. A return of FALSE +// indicates that the result was the point at infinity. This function is only needed +// if the TPM supports ECC. +LIB_EXPORT BOOL ExtEcc_PointAdd(Crypt_Point* R, + const Crypt_Point* S, + const Crypt_Point* Q, + const Crypt_EccCurve* E); + +// ##################### +// ECC Point Information +// ##################### +LIB_EXPORT BOOL ExtEcc_IsPointOnCurve(const Crypt_Point* Q, const Crypt_EccCurve* E); +LIB_EXPORT BOOL ExtEcc_IsInfinityPoint(const Crypt_Point* pt); +// extract the X-Coordinate of a point +LIB_EXPORT const Crypt_Int* ExtEcc_PointX(const Crypt_Point* pt); + +// extract the Y-Coordinate of a point +// (no current use case for the Y coordinate alone, signatures use X) +// LIB_EXPORT const Crypt_Int* ExtEcc_PointY(const Crypt_Point* pt); + +// ##################### +// ECC Curve Information +// ##################### +// These functions are expected to be fast, returning pre-built constants without +// allocation or copying. +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGetPrime(TPM_ECC_CURVE curveId); +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGetOrder(TPM_ECC_CURVE curveId); +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGetCofactor(TPM_ECC_CURVE curveId); +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGet_a(TPM_ECC_CURVE curveId); +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGet_b(TPM_ECC_CURVE curveId); +LIB_EXPORT const Crypt_Point* ExtEcc_CurveGetG(TPM_ECC_CURVE curveId); +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGetGx(TPM_ECC_CURVE curveId); +LIB_EXPORT const Crypt_Int* ExtEcc_CurveGetGy(TPM_ECC_CURVE curveId); +LIB_EXPORT TPM_ECC_CURVE ExtEcc_CurveGetCurveId(const Crypt_EccCurve* E); + +#endif diff --git a/TPMCmd/tpm/cryptolibs/common/include/MathLibraryInterfaceTypes.h b/TPMCmd/tpm/cryptolibs/common/include/MathLibraryInterfaceTypes.h new file mode 100644 index 00000000..cc2a2437 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/common/include/MathLibraryInterfaceTypes.h @@ -0,0 +1,84 @@ +//** Introduction +// This file contains the declaration and initialization macros for +// low-level cryptographic buffer types. This requires the underlying +// Crypto library to have already defined the CRYPT_INT_BUF family of +// macros. See tpm_crypto_lib.md for details. + +#ifndef MATH_LIBRARY_INTERFACE_TYPES_H +#define MATH_LIBRARY_INTERFACE_TYPES_H + +#ifndef CRYPT_INT_BUF +# error CRYPT_INT_BUF must be defined before including this file. +#endif +#ifndef CRYPT_POINT_BUF +# error CRYPT_POINT_BUF must be defined before including this file. +#endif +#ifndef CRYPT_CURVE_BUF +# error CRYPT_CURVE_BUF must be defined before including this file. +#endif + +// Crypt_Int underlying types Crypt_Int is an abstract type that is used as a +// pointer. The underlying math library is expected to be able to find the +// actual allocated size for a given Crypt_Int object given a pointer to it, and +// therefore we typedef here to a size 1 (smallest possible). +typedef CRYPT_INT_BUF(one, 1) Crypt_Int; +typedef CRYPT_POINT_BUF(pointone, 1) Crypt_Point; +typedef CRYPT_CURVE_BUF(curvebuft, MAX_ECC_KEY_BITS) Crypt_EccCurve; + +// produces bare typedef ci__t +#define CRYPT_INT_TYPE(typename, bits) \ + typedef CRYPT_INT_BUF(ci_##typename##_buf_t, bits) ci_##typename##_t + +// produces allocated `Crypt_Int* varname` backed by a +// stack buffer named `_buf`. Initialization at the discretion of the +// ExtMath library. +#define CRYPT_INT_VAR(varname, bits) \ + CRYPT_INT_BUF(ci_##varname##_buf_t, bits) varname##_buf; \ + Crypt_Int* varname = ExtMath_Initialize_Int((Crypt_Int*)&(varname##_buf), bits); + +// produces initialized `Crypt_Int* varname = (TPM2B) initializer` backed by a +// stack buffer named `_buf` +#define CRYPT_INT_INITIALIZED(varname, bits, initializer) \ + CRYPT_INT_BUF(cibuf##varname, bits) varname##_buf; \ + Crypt_Int* varname = TpmMath_IntFrom2B( \ + ExtMath_Initialize_Int((Crypt_Int*)&(varname##_buf), bits), \ + (TPM2B*)initializer); + +// convenience variants of above: +// largest supported integer +#define CRYPT_INT_MAX(varname) CRYPT_INT_VAR(varname, LARGEST_NUMBER_BITS) + +#define CRYPT_INT_MAX_INITIALIZED(name, initializer) \ + CRYPT_INT_INITIALIZED(name, LARGEST_NUMBER_BITS, initializer) + +// A single RADIX_BITS value. +#define CRYPT_INT_WORD(name) CRYPT_INT_VAR(name, RADIX_BITS) + +#define CRYPT_INT_WORD_INITIALIZED(varname, initializer) \ + CRYPT_INT_BUF(cibuf##varname, RADIX_BITS) varname##_buf; \ + Crypt_Int* varname = ExtMath_SetWord( \ + ExtMath_Initialize_Int((Crypt_Int*)&(varname##_buf), RADIX_BITS), \ + initializer); + +// Crypt_EccCurve underlying types +#define CRYPT_CURVE_INITIALIZED(varname, initializer) \ + CRYPT_CURVE_BUF(cv##varname, MAX_ECC_KEY_BITS) varname##_buf; \ + const Crypt_EccCurve* varname = \ + ExtEcc_CurveInitialize(&(varname##_buf), initializer) + +/* no guarantee free will be called in the presence of longjmp */ +#define CRYPT_CURVE_FREE(varname) ExtEcc_CurveFree(varname) + +// Crypt_Point underlying types +#define CRYPT_POINT_VAR(varname) \ + CRYPT_POINT_BUF(cp_##varname##_buf_t, MAX_ECC_KEY_BITS) varname##_buf; \ + Crypt_Point* varname = \ + ExtEcc_Initialize_Point((Crypt_Point*)&(varname##_buf), MAX_ECC_KEY_BITS); + +#define CRYPT_POINT_INITIALIZED(varname, initValue) \ + CRYPT_POINT_BUF(cp_##varname##_buf_t, MAX_ECC_KEY_BITS) varname##_buf; \ + Crypt_Point* varname = TpmEcc_PointFrom2B( \ + ExtEcc_Initialize_Point((Crypt_Point*)&(varname##_buf), MAX_ECC_KEY_BITS), \ + initValue); + +#endif //MATH_LIBRARY_INTERFACE_TYPES_H diff --git a/TPMCmd/tpm/cryptolibs/wolf/BnToWolfMath.c b/TPMCmd/tpm/cryptolibs/wolf/BnToWolfMath.c new file mode 100644 index 00000000..382086fb --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/wolf/BnToWolfMath.c @@ -0,0 +1,488 @@ + +//** Introduction +// +// This file contains the math functions that are not implemented in the BnMath +// library (yet). These math functions will call the wolfcrypt library to execute +// the operations. There is a difference between the internal format and the +// wolfcrypt format. To call the wolfcrypt function, a mp_int structure is created +// for each passed variable. We define USE_FAST_MATH wolfcrypt option, which allocates +// mp_int on the stack. We must copy each word to the new structure, and set the used +// size. +// +// Not using USE_FAST_MATH would allow for a simple pointer swap for the big integer +// buffer 'd', however wolfcrypt expects to manage this memory, and will swap out +// the pointer to and from temporary variables and free the reference underneath us. +// Using USE_FAST_MATH also instructs wolfcrypt to use the stack for all these +// intermediate variables + +//** Includes and Defines +#include "Tpm.h" + +#ifdef MATH_LIB_WOLF +# include "BnConvert_fp.h" +# include "Wolf/BnToWolfMath_fp.h" + +# define WOLF_HALF_RADIX (RADIX_BITS == 64 && !defined(FP_64BIT)) + +//** Functions + +//*** BnFromWolf() +// This function converts a wolfcrypt mp_int to a TPM bignum. In this implementation +// it is assumed that wolfcrypt used the same format for a big number as does the +// TPM -- an array of native-endian words in little-endian order. +void BnFromWolf(bigNum bn, mp_int* wolfBn) +{ + if(bn != NULL) + { + int i; +# if WOLF_HALF_RADIX + pAssert((unsigned)wolfBn->used <= 2 * BnGetAllocated(bn)); +# else + pAssert((unsigned)wolfBn->used <= BnGetAllocated(bn)); +# endif + for(i = 0; i < wolfBn->used; i++) + { +# if WOLF_HALF_RADIX + if(i & 1) + bn->d[i / 2] |= (crypt_uword_t)wolfBn->dp[i] << 32; + else + bn->d[i / 2] = wolfBn->dp[i]; +# else + bn->d[i] = wolfBn->dp[i]; +# endif + } + +# if WOLF_HALF_RADIX + BnSetTop(bn, (wolfBn->used + 1) / 2); +# else + BnSetTop(bn, wolfBn->used); +# endif + } +} + +//*** BnToWolf() +// This function converts a TPM bignum to a wolfcrypt mp_init, and has the same +// assumptions as made by BnFromWolf() +void BnToWolf(mp_int* toInit, bigConst initializer) +{ + uint32_t i; + if(toInit != NULL && initializer != NULL) + { + for(i = 0; i < initializer->size; i++) + { +# if WOLF_HALF_RADIX + toInit->dp[2 * i] = (fp_digit)initializer->d[i]; + toInit->dp[2 * i + 1] = (fp_digit)(initializer->d[i] >> 32); +# else + toInit->dp[i] = initializer->d[i]; +# endif + } + +# if WOLF_HALF_RADIX + toInit->used = (int)initializer->size * 2; + if(toInit->dp[toInit->used - 1] == 0 && toInit->dp[toInit->used - 2] != 0) + --toInit->used; +# else + toInit->used = (int)initializer->size; +# endif + toInit->sign = 0; + } +} + +//*** MpInitialize() +// This function initializes an wolfcrypt mp_int. +mp_int* MpInitialize(mp_int* toInit) +{ + mp_init(toInit); + return toInit; +} + +# if LIBRARY_COMPATIBILITY_CHECK +//** MathLibraryCompatibililtyCheck() +// This function is only used during development to make sure that the library +// that is being referenced is using the same size of data structures as the TPM. +BOOL BnMathLibraryCompatibilityCheck(void) +{ + BN_VAR(tpmTemp, 64 * 8); // allocate some space for a test value + crypt_uword_t i; + TPM2B_TYPE(TEST, 16); + TPM2B_TEST test = {{16, + {0x0F, + 0x0E, + 0x0D, + 0x0C, + 0x0B, + 0x0A, + 0x09, + 0x08, + 0x07, + 0x06, + 0x05, + 0x04, + 0x03, + 0x02, + 0x01, + 0x00}}}; + // Convert the test TPM2B to a bigNum + BnFrom2B(tpmTemp, &test.b); + MP_INITIALIZED(wolfTemp, tpmTemp); + (wolfTemp); // compiler warning + // Make sure the values are consistent + GOTO_ERROR_UNLESS(wolfTemp->used * sizeof(fp_digit) + == (int)tpmTemp->size * sizeof(crypt_uword_t)); + for(i = 0; i < tpmTemp->size; i++) + GOTO_ERROR_UNLESS(((crypt_uword_t*)wolfTemp->dp)[i] == tpmTemp->d[i]); + return 1; +Error: + return 0; +} +# endif + +//*** BnModMult() +// Does multiply and divide returning the remainder of the divide. +LIB_EXPORT BOOL BnModMult(bigNum result, bigConst op1, bigConst op2, bigConst modulus) +{ + WOLF_ENTER(); + BOOL OK; + MP_INITIALIZED(bnOp1, op1); + MP_INITIALIZED(bnOp2, op2); + MP_INITIALIZED(bnTemp, NULL); + BN_VAR(temp, LARGEST_NUMBER_BITS * 2); + + pAssert(BnGetAllocated(result) >= BnGetSize(modulus)); + + OK = (mp_mul(bnOp1, bnOp2, bnTemp) == MP_OKAY); + if(OK) + { + BnFromWolf(temp, bnTemp); + OK = BnDiv(NULL, result, temp, modulus); + } + + WOLF_LEAVE(); + return OK; +} + +//*** BnMult() +// Multiplies two numbers +LIB_EXPORT BOOL BnMult(bigNum result, bigConst multiplicand, bigConst multiplier) +{ + WOLF_ENTER(); + BOOL OK; + MP_INITIALIZED(bnTemp, NULL); + MP_INITIALIZED(bnA, multiplicand); + MP_INITIALIZED(bnB, multiplier); + + pAssert(result->allocated >= (BITS_TO_CRYPT_WORDS( + BnSizeInBits(multiplicand) + BnSizeInBits(multiplier)))); + + OK = (mp_mul(bnA, bnB, bnTemp) == MP_OKAY); + if(OK) + { + BnFromWolf(result, bnTemp); + } + + WOLF_LEAVE(); + return OK; +} + +//*** BnDiv() +// This function divides two bigNum values. The function returns FALSE if +// there is an error in the operation. +LIB_EXPORT BOOL BnDiv( + bigNum quotient, bigNum remainder, bigConst dividend, bigConst divisor) +{ + WOLF_ENTER(); + BOOL OK; + MP_INITIALIZED(bnQ, quotient); + MP_INITIALIZED(bnR, remainder); + MP_INITIALIZED(bnDend, dividend); + MP_INITIALIZED(bnSor, divisor); + pAssert(!BnEqualZero(divisor)); + if(BnGetSize(dividend) < BnGetSize(divisor)) + { + if(quotient) + BnSetWord(quotient, 0); + if(remainder) + BnCopy(remainder, dividend); + OK = TRUE; + } + else + { + pAssert( + (quotient == NULL) + || (quotient->allocated >= (unsigned)(dividend->size - divisor->size))); + pAssert((remainder == NULL) || (remainder->allocated >= divisor->size)); + OK = (mp_div(bnDend, bnSor, bnQ, bnR) == MP_OKAY); + if(OK) + { + BnFromWolf(quotient, bnQ); + BnFromWolf(remainder, bnR); + } + } + + WOLF_LEAVE(); + return OK; +} + +# if ALG_RSA +//*** BnGcd() +// Get the greatest common divisor of two numbers +LIB_EXPORT BOOL BnGcd(bigNum gcd, // OUT: the common divisor + bigConst number1, // IN: + bigConst number2 // IN: +) +{ + WOLF_ENTER(); + BOOL OK; + MP_INITIALIZED(bnGcd, gcd); + MP_INITIALIZED(bn1, number1); + MP_INITIALIZED(bn2, number2); + pAssert(gcd != NULL); + OK = (mp_gcd(bn1, bn2, bnGcd) == MP_OKAY); + if(OK) + { + BnFromWolf(gcd, bnGcd); + } + WOLF_LEAVE(); + return OK; +} + +//***BnModExp() +// Do modular exponentiation using bigNum values. The conversion from a mp_int to +// a bigNum is trivial as they are based on the same structure +LIB_EXPORT BOOL BnModExp(bigNum result, // OUT: the result + bigConst number, // IN: number to exponentiate + bigConst exponent, // IN: + bigConst modulus // IN: +) +{ + WOLF_ENTER(); + BOOL OK; + MP_INITIALIZED(bnResult, result); + MP_INITIALIZED(bnN, number); + MP_INITIALIZED(bnE, exponent); + MP_INITIALIZED(bnM, modulus); + OK = (mp_exptmod(bnN, bnE, bnM, bnResult) == MP_OKAY); + if(OK) + { + BnFromWolf(result, bnResult); + } + + WOLF_LEAVE(); + return OK; +} +# endif // TPM_ALG_RSA + +//*** BnModInverse() +// Modular multiplicative inverse +LIB_EXPORT BOOL BnModInverse(bigNum result, bigConst number, bigConst modulus) +{ + WOLF_ENTER(); + BOOL OK; + MP_INITIALIZED(bnResult, result); + MP_INITIALIZED(bnN, number); + MP_INITIALIZED(bnM, modulus); + + OK = (mp_invmod(bnN, bnM, bnResult) == MP_OKAY); + if(OK) + { + BnFromWolf(result, bnResult); + } + + WOLF_LEAVE(); + return OK; +} + +# if ALG_ECC + +//*** PointFromWolf() +// Function to copy the point result from a wolf ecc_point to a bigNum +void PointFromWolf(bigPoint pOut, // OUT: resulting point + ecc_point* pIn // IN: the point to return +) +{ + BnFromWolf(pOut->x, pIn->x); + BnFromWolf(pOut->y, pIn->y); + BnFromWolf(pOut->z, pIn->z); +} + +//*** PointToWolf() +// Function to copy the point result from a bigNum to a wolf ecc_point +void PointToWolf(ecc_point* pOut, // OUT: resulting point + pointConst pIn // IN: the point to return +) +{ + BnToWolf(pOut->x, pIn->x); + BnToWolf(pOut->y, pIn->y); + BnToWolf(pOut->z, pIn->z); +} + +//*** EcPointInitialized() +// Allocate and initialize a point. +static ecc_point* EcPointInitialized(pointConst initializer) +{ + ecc_point* P; + + P = wc_ecc_new_point(); + pAssert(P != NULL); + // mp_int x,y,z are stack allocated. + // initializer is not required + if(P != NULL && initializer != NULL) + { + PointToWolf(P, initializer); + } + + return P; +} + +//*** BnEccModMult() +// This function does a point multiply of the form R = [d]S +// return type: BOOL +// FALSE failure in operation; treat as result being point at infinity +LIB_EXPORT BOOL BnEccModMult(bigPoint R, // OUT: computed point + pointConst S, // IN: point to multiply by 'd' (optional) + bigConst d, // IN: scalar for [d]S + const bigCurveData* E) +{ + WOLF_ENTER(); + BOOL OK; + MP_INITIALIZED(bnD, d); + MP_INITIALIZED(bnPrime, BnCurveGetPrime(AccessCurveConstants(E))); + POINT_CREATE(pS, NULL); + POINT_CREATE(pR, NULL); + + if(S == NULL) + S = BnCurveGetG(AccessCurveConstants(E)); + + PointToWolf(pS, S); + + OK = (wc_ecc_mulmod(bnD, pS, pR, NULL, bnPrime, 1) == MP_OKAY); + if(OK) + { + PointFromWolf(R, pR); + } + + POINT_DELETE(pR); + POINT_DELETE(pS); + + WOLF_LEAVE(); + return !BnEqualZero(R->z); +} + +//*** BnEccModMult2() +// This function does a point multiply of the form R = [d]G + [u]Q +// return type: BOOL +// FALSE failure in operation; treat as result being point at infinity +LIB_EXPORT BOOL BnEccModMult2(bigPoint R, // OUT: computed point + pointConst S, // IN: optional point + bigConst d, // IN: scalar for [d]S or [d]G + pointConst Q, // IN: second point + bigConst u, // IN: second scalar + const bigCurveData* E // IN: curve +) +{ + WOLF_ENTER(); + BOOL OK; + POINT_CREATE(pR, NULL); + POINT_CREATE(pS, NULL); + POINT_CREATE(pQ, Q); + MP_INITIALIZED(bnD, d); + MP_INITIALIZED(bnU, u); + MP_INITIALIZED(bnPrime, BnCurveGetPrime(AccessCurveConstants(E))); + MP_INITIALIZED(bnA, BnCurveGet_a(AccessCurveConstants(E))); + + if(S == NULL) + S = BnCurveGetG(AccessCurveConstants(E)); + PointToWolf(pS, S); + + OK = (ecc_mul2add(pS, bnD, pQ, bnU, pR, bnA, bnPrime, NULL) == MP_OKAY); + if(OK) + { + PointFromWolf(R, pR); + } + + POINT_DELETE(pS); + POINT_DELETE(pQ); + POINT_DELETE(pR); + + WOLF_LEAVE(); + return !BnEqualZero(R->z); +} + +//** BnEccAdd() +// This function does addition of two points. +// return type: BOOL +// FALSE failure in operation; treat as result being point at infinity +LIB_EXPORT BOOL BnEccAdd(bigPoint R, // OUT: computed point + pointConst S, // IN: point to multiply by 'd' + pointConst Q, // IN: second point + const bigCurveData* E // IN: curve +) +{ + WOLF_ENTER(); + BOOL OK; + mp_digit mp; + POINT_CREATE(pR, NULL); + POINT_CREATE(pS, S); + POINT_CREATE(pQ, Q); + MP_INITIALIZED(bnA, BnCurveGet_a(AccessCurveConstants(E))); + MP_INITIALIZED(bnMod, BnCurveGetPrime(AccessCurveConstants(E))); + // + OK = (mp_montgomery_setup(bnMod, &mp) == MP_OKAY); + OK = OK && (ecc_projective_add_point(pS, pQ, pR, bnA, bnMod, mp) == MP_OKAY); + if(OK) + { + PointFromWolf(R, pR); + } + + POINT_DELETE(pS); + POINT_DELETE(pQ); + POINT_DELETE(pR); + + WOLF_LEAVE(); + return !BnEqualZero(R->z); +} + +//*** BnCurveInitialize() +// This function initializes the OpenSSL curve information structure. This +// structure points to the TPM-defined values for the curve, to the context for the +// number values in the frame, and to the OpenSSL-defined group values. +// Return Type: bigCurveData* +// NULL the TPM_ECC_CURVE is not valid or there was a problem in +// in initializing the curve data +// non-NULL points to 'E' +LIB_EXPORT bigCurveData* BnCurveInitialize( + bigCurveData* + pDataE, // IN: our implementation of bigCurveData is a pointer, so this is pointer-to-pointer. + TPM_ECC_CURVE curveId // IN: curve identifier +) +{ + *pDataE = BnGetCurveData(curveId); + return pDataE; +} + +//*** BnCurveFree() +// This function will free the allocated components of the curve and end the +// frame in which the curve data exists +LIB_EXPORT void BnCurveFree(bigCurveData* E) +{ + // nothing to clean up +} + +# endif // TPM_ALG_ECC + +# if CRYPTO_LIB_REPORTING + +//** BnGetImplementation() +// This function reports the underlying library being used for bignum operations. +void BnGetImplementation(_CRYPTO_IMPL_DESCRIPTION* result) +{ + snprintf(result->name, sizeof(result->name), "WolfSSL"); + snprintf(result->version, sizeof(result->version), "n/a"); + // TODO: Populate version information based on whatever the WolfSSL + // equivalent to opensslv.h is. +} + +# endif // CRYPTO_LIB_REPORTING + +#endif // MATH_LIB_WOLF diff --git a/TPMCmd/tpm/cryptolibs/wolf/BnToWolfSupport.c b/TPMCmd/tpm/cryptolibs/wolf/BnToWolfSupport.c new file mode 100644 index 00000000..fe766aff --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/wolf/BnToWolfSupport.c @@ -0,0 +1,51 @@ + +//** Introduction +// +// The functions in this file are used for initialization of the interface to the +// wolfSSL library. + +//** Defines and Includes + +#include "Tpm.h" + +#if defined(HASH_LIB_WOLF) || defined(MATH_LIB_WOLF) || defined(SYM_LIB_WOLF) + +//*** BnSupportLibInit() +// This does any initialization required by the support library. +LIB_EXPORT int BnSupportLibInit(void) +{ +# if LIBRARY_COMPATIBILITY_CHECK + BnMathLibraryCompatibilityCheck(); +# endif + return TRUE; +} + +# if CRYPTO_LIB_REPORTING + +# if defined(SYM_LIB_WOLF) && SIMULATION +//*** _crypto_GetSymImpl() +// Report the version of OpenSSL being used for symmetric crypto. +void _crypto_GetSymImpl(_CRYPTO_IMPL_DESCRIPTION* result) +{ + snprintf(result->name, sizeof(result->name), "WolfSSL"); + snprintf(result->version, sizeof(result->version), "n/a"); + // TODO: Populate version information based on whatever the WolfSSL + // equivalent to opensslv.h is. +} +# endif // defined(SYM_LIB_WOLF) && SIMULATION + +# if defined(HASH_LIB_WOLF) && SIMULATION +//*** _crypto_GetHashImpl() +// Report the version of OpenSSL being used for hashing. +void _crypto_GetHashImpl(_CRYPTO_IMPL_DESCRIPTION* result) +{ + snprintf(result->name, sizeof(result->name), "WolfSSL"); + snprintf(result->version, sizeof(result->version), "n/a"); + // TODO: Populate version information based on whatever the WolfSSL + // equivalent to opensslv.h is. +} +# endif // defined(HASH_LIB_WOLF) && SIMULATION + +# endif // CRYPTO_LIB_REPORTING + +#endif // HASH_LIB_WOLF || MATH_LIB_WOLF || SYM_LIB_WOLF diff --git a/TPMCmd/tpm/cryptolibs/wolf/CMakeLists.txt b/TPMCmd/tpm/cryptolibs/wolf/CMakeLists.txt new file mode 100644 index 00000000..ce3104e9 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/wolf/CMakeLists.txt @@ -0,0 +1,64 @@ + +if (HAS_WOLF) + set_target_properties(tpm PROPERTIES HAS_WOLF YES) + set_target_properties(tpm PROPERTIES HASH_LIB Wolf) + set_target_properties(tpm PROPERTIES SYM_LIB Wolf) + set_target_properties(tpm PROPERTIES MATH_LIB Wolf) + + add_library(tpm_wolf STATIC) + + # allow the tpm core and bignum implementation to get our headers + target_link_libraries(TpmBigNum INTERFACE tpm_wolf) + target_link_libraries(tpm INTERFACE tpm_wolf) + + target_compile_definitions(tpm PUBLIC + HASH_LIB=Wolf + SYM_LIB=Wolf + MATH_LIB=TpmBigNum + BN_MATH_LIB=Wolf + WOLFSSL_USER_SETTINGS + WOLFSSL_LIB + ) + + # This interface library also needs the big num implementation + # from the reference code, public because tpm needs to inherit bignum as well + target_link_libraries(tpm_wolf PUBLIC TpmBigNum) + target_link_libraries(tpm_wolf PUBLIC tpm_cryptolib_includes) + target_link_libraries(tpm_wolf PRIVATE tpm_protected_includes) + target_link_libraries(tpm_wolf PRIVATE tpm) + + target_include_directories(tpm_wolf PUBLIC + ${CMAKE_CURRENT_SOURCE_DIR}/include + ${CMAKE_SOURCE_DIR}/../external/wolfssl/Debug; + ${CMAKE_SOURCE_DIR}/../external/wolfssl; + ) + + #find_library(WolfLibrary wolfssl.lib PATHS ${CMAKE_SOURCE_DIR}/../external/wolfssl/Debug;) + #target_link_libraries(tpm INTERFACE ${WolfLibrary}) + message(VERBOSE "-- Selecting ${CMAKE_SOURCE_DIR}/../external/wolfssl include directories") + + target_link_options(tpm_wolf PUBLIC /LIBPATH:${CMAKE_SOURCE_DIR}/../external/internal_tpm_support/wolfssl/lib/x64) + target_link_libraries(tpm INTERFACE wolfssl.lib) + + #target_link_directories(tpm_wolf PUBLIC ${CMAKE_SOURCE_DIR}/../external/wolfssl/Debug) + + target_sources(tpm_wolf PRIVATE + "TpmToWolfDesSupport.c" + "BnToWolfMath.c" + "BnToWolfSupport.c" + ) + + # WOLFSSL_USER_SETTINGS;CYASSL_USER_SETTINGS + # HAVE_AES_DECRYPT + # HAVE_AES_ECB + # WOLFSSL_AES_DIRECT + # WOLFSSL_AES_COUNTER + # HAVE_AESGCM + # HAVE_AESCCM + # WOLFSSL_AES_OFB + # WOLFSSL_AES_CFB + # WOLFSSL_AES_XTS + # HAVE_AES_KEYWRAP +else() + message(VERBOSE "No WolfSSL included.") +endif() diff --git a/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/BnToWolfMath.h b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/BnToWolfMath.h new file mode 100644 index 00000000..e1566b5e --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/BnToWolfMath.h @@ -0,0 +1,70 @@ + +//** Introduction +// This file contains the structure definitions used for ECC in the LibTomCrypt +// version of the code. These definitions would change, based on the library. +// The ECC-related structures that cross the TPM interface are defined +// in TpmTypes.h +// + +#ifndef _BN_TO_WOLF_MATH_H_ +#define _BN_TO_WOLF_MATH_H_ + +#ifndef BN_MATH_LIB_DEFINED +# define BN_MATH_LIB_DEFINED + +# define MATH_LIB_WOLF + +// Require TPM Big Num types +# ifndef MATH_LIB_TPMBIGNUM +# error this Wolf Interface expects to be used from TpmBigNum +# endif + +# if ALG_ECC +# define HAVE_ECC +# endif + +# include +# include + +# define MP_VAR(name) \ + mp_int _##name; \ + mp_int* name = MpInitialize(&_##name); + +// Allocate a mp_int and initialize with the values in a mp_int* initializer +# define MP_INITIALIZED(name, initializer) \ + MP_VAR(name); \ + BnToWolf(name, initializer); + +# define POINT_CREATE(name, initializer) \ + ecc_point* name = EcPointInitialized(initializer); + +# define POINT_DELETE(name) \ + wc_ecc_del_point(name); \ + name = NULL; + +// Note that this declaration results in Crypt_EccCurve being a pointer (and the +// usual usage oc Crypt_EccCurve* being a pointer-to-a-pointer). The extra +// indirection is allows CRYPT_CURVE_TYPE(b) to have consistent behavior so each +// sub-library doesn't need to implement separate CRYPT_CURVE_INITIALIZED macros, and +// it would be wasteful to create copies of the full TPMBN_ECC_CURVE_CONSTANTS +// structure for each usage. +typedef const TPMBN_ECC_CURVE_CONSTANTS* bigCurveData; + +TPM_INLINE const TPMBN_ECC_CURVE_CONSTANTS* AccessCurveConstants( + const bigCurveData* E) +{ + return *E; +} + +# include "BnToWolfSupport_fp.h" + +# define WOLF_ENTER() + +# define WOLF_LEAVE() + +// This definition would change if there were something to report +# define MathLibSimulationEnd() +#else +# error BN_MATH_LIB_DEFINED already defined +#endif // BN_MATH_LIB_DEFINED +#endif // _BN_TO_WOLF_MATH_H_ diff --git a/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/BnToWolfMath_fp.h b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/BnToWolfMath_fp.h new file mode 100644 index 00000000..ee8fb279 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/BnToWolfMath_fp.h @@ -0,0 +1,44 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Aug 30, 2019 Time: 02:11:54PM + */ + +#ifndef _TPM_TO_WOLF_MATH_FP_H_ +#define _TPM_TO_WOLF_MATH_FP_H_ + +#ifdef MATH_LIB_WOLF + +//*** BnFromWolf() +// This function converts a wolfcrypt mp_int to a TPM bignum. In this implementation +// it is assumed that wolfcrypt used the same format for a big number as does the +// TPM -- an array of native-endian words in little-endian order. +void BnFromWolf(bigNum bn, mp_int* wolfBn); + +//*** BnToWolf() +// This function converts a TPM bignum to a wolfcrypt mp_init, and has the same +// assumptions as made by BnFromWolf() +void BnToWolf(mp_int* toInit, bigConst initializer); + +//*** MpInitialize() +// This function initializes an wolfcrypt mp_int. +mp_int* MpInitialize(mp_int* toInit); + +# if ALG_ECC + +//*** PointFromWolf() +// Function to copy the point result from a wolf ecc_point to a bigNum +void PointFromWolf(bigPoint pOut, // OUT: resulting point + ecc_point* pIn // IN: the point to return +); + +//*** PointToWolf() +// Function to copy the point result from a bigNum to a wolf ecc_point +void PointToWolf(ecc_point* pOut, // OUT: resulting point + pointConst pIn // IN: the point to return +); + +# endif // TPM_ALG_ECC + +#endif // MATH_LIB_WOLF + +#endif // _TPM_TO_WOLF_MATH_FP_H_ diff --git a/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/BnToWolfSupport_fp.h b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/BnToWolfSupport_fp.h new file mode 100644 index 00000000..d0ecbd10 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/BnToWolfSupport_fp.h @@ -0,0 +1,16 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Aug 30, 2019 Time: 02:11:54PM + */ + +#ifndef _TPM_TO_WOLF_SUPPORT_FP_H_ +#define _TPM_TO_WOLF_SUPPORT_FP_H_ + +#if defined(HASH_LIB_WOLF) || defined(MATH_LIB_WOLF) || defined(SYM_LIB_WOLF) + +//*** BnSupportLibInit() +// This does any initialization required by the support library. +LIB_EXPORT int BnSupportLibInit(void); +#endif // HASH_LIB_WOLF || MATH_LIB_WOLF || SYM_LIB_WOLF + +#endif // _TPM_TO_WOLF_SUPPORT_FP_H_ diff --git a/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/TpmToWolfHash.h b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/TpmToWolfHash.h new file mode 100644 index 00000000..08fe6f19 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/TpmToWolfHash.h @@ -0,0 +1,151 @@ + +//** Introduction +// +// This header file is used to 'splice' the wolfcrypt hash code into the TPM code. +// +#ifndef HASH_LIB_DEFINED +#define HASH_LIB_DEFINED + +#define HASH_LIB_WOLF + +#ifndef WOLFSSL_USER_SETTINGS +# define WOLFSSL_USER_SETTINGS +#endif + +#if ALG_SHA384 || ALG_SHA512 +# define WOLFSSL_SHA512 +#endif + +#if ALG_SM3_256 +# error "Wolf doesn't support ALG_SM3_256" +#endif + +#include +#include +#include + +//*************************************************************** +//** Links to the wolfcrypt HASH code +//*************************************************************** + +// Redefine the internal name used for each of the hash state structures to the +// name used by the library. +// These defines need to be known in all parts of the TPM so that the structure +// sizes can be properly computed when needed. + +#define tpmHashStateSHA1_t wc_Sha +#define tpmHashStateSHA256_t wc_Sha256 +#define tpmHashStateSHA384_t wc_Sha512 +#define tpmHashStateSHA512_t wc_Sha512 + +#if ALG_SM3 +# error "The version of WolfCrypt used by this code does not support SM3" +#endif + +// The defines below are only needed when compiling CryptHash.c or CryptSmac.c. +// This isolation is primarily to avoid name space collision. However, if there +// is a real collision, it will likely show up when the linker tries to put things +// together. + +#ifdef _CRYPT_HASH_C_ + +typedef BYTE* PBYTE; +typedef const BYTE* PCBYTE; + +// Define the interface between CryptHash.c to the functions provided by the +// library. For each method, define the calling parameters of the method and then +// define how the method is invoked in CryptHash.c. +// +// All hashes are required to have the same calling sequence. If they don't, create +// a simple adaptation function that converts from the "standard" form of the call +// to the form used by the specific hash (and then send a nasty letter to the +// person who wrote the hash function for the library). +// +// The macro that calls the method also defines how the +// parameters get swizzled between the default form (in CryptHash.c)and the +// library form. +// +// Initialize the hash context +# define HASH_START_METHOD_DEF void(HASH_START_METHOD)(PANY_HASH_STATE state) +# define HASH_START(hashState) ((hashState)->def->method.start)(&(hashState)->state); + +// Add data to the hash +# define HASH_DATA_METHOD_DEF \ + void(HASH_DATA_METHOD)(PANY_HASH_STATE state, PCBYTE buffer, size_t size) +# define HASH_DATA(hashState, dInSize, dIn) \ + ((hashState)->def->method.data)(&(hashState)->state, dIn, dInSize) + +// Finalize the hash and get the digest +# define HASH_END_METHOD_DEF \ + void(HASH_END_METHOD)(PANY_HASH_STATE state, BYTE * buffer) +# define HASH_END(hashState, buffer) \ + ((hashState)->def->method.end)(&(hashState)->state, buffer) + +// Copy the hash context +// Note: For import, export, and copy, memcpy() is used since there is no +// reformatting necessary between the internal and external forms. +# define HASH_STATE_COPY_METHOD_DEF \ + void(HASH_STATE_COPY_METHOD)( \ + PANY_HASH_STATE to, PCANY_HASH_STATE from, size_t size) +# define HASH_STATE_COPY(hashStateOut, hashStateIn) \ + ((hashStateIn)->def->method.copy)(&(hashStateOut)->state, \ + &(hashStateIn)->state, \ + (hashStateIn)->def->contextSize) + +// Copy (with reformatting when necessary) an internal hash structure to an +// external blob +# define HASH_STATE_EXPORT_METHOD_DEF \ + void(HASH_STATE_EXPORT_METHOD)(BYTE * to, PCANY_HASH_STATE from, size_t size) +# define HASH_STATE_EXPORT(to, hashStateFrom) \ + ((hashStateFrom)->def->method.copyOut)( \ + &(((BYTE*)(to))[offsetof(HASH_STATE, state)]), \ + &(hashStateFrom)->state, \ + (hashStateFrom)->def->contextSize) + +// Copy from an external blob to an internal formate (with reformatting when +// necessary +# define HASH_STATE_IMPORT_METHOD_DEF \ + void(HASH_STATE_IMPORT_METHOD)( \ + PANY_HASH_STATE to, const BYTE* from, size_t size) +# define HASH_STATE_IMPORT(hashStateTo, from) \ + ((hashStateTo)->def->method.copyIn)( \ + &(hashStateTo)->state, \ + &(((const BYTE*)(from))[offsetof(HASH_STATE, state)]), \ + (hashStateTo)->def->contextSize) + +// Function aliases. The code in CryptHash.c uses the internal designation for the +// functions. These need to be translated to the function names of the library. +// Internal External +// Designation Designation +# define tpmHashStart_SHA1 wc_InitSha +# define tpmHashData_SHA1 wc_ShaUpdate +# define tpmHashEnd_SHA1 wc_ShaFinal +# define tpmHashStateCopy_SHA1 memcpy +# define tpmHashStateExport_SHA1 memcpy +# define tpmHashStateImport_SHA1 memcpy +# define tpmHashStart_SHA256 wc_InitSha256 +# define tpmHashData_SHA256 wc_Sha256Update +# define tpmHashEnd_SHA256 wc_Sha256Final +# define tpmHashStateCopy_SHA256 memcpy +# define tpmHashStateExport_SHA256 memcpy +# define tpmHashStateImport_SHA256 memcpy +# define tpmHashStart_SHA384 wc_InitSha384 +# define tpmHashData_SHA384 wc_Sha384Update +# define tpmHashEnd_SHA384 wc_Sha384Final +# define tpmHashStateCopy_SHA384 memcpy +# define tpmHashStateExport_SHA384 memcpy +# define tpmHashStateImport_SHA384 memcpy +# define tpmHashStart_SHA512 wc_InitSha512 +# define tpmHashData_SHA512 wc_Sha512Update +# define tpmHashEnd_SHA512 wc_Sha512Final +# define tpmHashStateCopy_SHA512 memcpy +# define tpmHashStateExport_SHA512 memcpy +# define tpmHashStateImport_SHA512 memcpy + +#endif // _CRYPT_HASH_C_ + +#define LibHashInit() +// This definition would change if there were something to report +#define HashLibSimulationEnd() + +#endif // HASH_LIB_DEFINED diff --git a/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/TpmToWolfSym.h b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/TpmToWolfSym.h new file mode 100644 index 00000000..d148824c --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/TpmToWolfSym.h @@ -0,0 +1,69 @@ + +//** Introduction +// +// This header file is used to 'splice' the wolfcrypt library into the TPM code. + +#ifndef SYM_LIB_DEFINED +#define SYM_LIB_DEFINED + +#define SYM_LIB_WOLF + +#include + +//*************************************************************** +//** Links to the wolfCrypt AES code +//*************************************************************** +#if ALG_SM4 +# error "Wolf doesn't support SM4" +#endif + +#if ALG_CAMELLIA +# error "Wolf doesn't support Camellia" +#endif + +// Define the order of parameters to the library functions that do block encryption +// and decryption. +typedef void (*TpmCryptSetSymKeyCall_t)(void* keySchedule, BYTE* out, const BYTE* in); + +// The Crypt functions that call the block encryption function use the parameters +// in the order: +// 1) keySchedule +// 2) in buffer +// 3) out buffer +// Since wolfcrypt uses the order in encryptoCall_t above, need to swizzle the +// values to the order required by the library. +#define SWIZZLE(keySchedule, in, out) \ + (void*)(keySchedule), (BYTE*)(out), (const BYTE*)(in) + +// Macros to set up the encryption/decryption key schedules +// +// AES: +#define TpmCryptSetEncryptKeyAES(key, keySizeInBits, schedule) \ + wc_AesSetKeyDirect((tpmKeyScheduleAES*)(schedule), \ + key, \ + BITS_TO_BYTES(keySizeInBits), \ + 0, \ + AES_ENCRYPTION) +#define TpmCryptSetDecryptKeyAES(key, keySizeInBits, schedule) \ + wc_AesSetKeyDirect((tpmKeyScheduleAES*)(schedule), \ + key, \ + BITS_TO_BYTES(keySizeInBits), \ + 0, \ + AES_DECRYPTION) + +// Macros to alias encryption calls to specific algorithms. This should be used +// sparingly. Currently, only used by CryptRand.c +// +// When using these calls, to call the AES block encryption code, the caller +// should use: +// TpmCryptEncryptAES(SWIZZLE(keySchedule, in, out)); +#define TpmCryptEncryptAES wc_AesEncryptDirect +#define TpmCryptDecryptAES wc_AesDecryptDirect +#define tpmKeyScheduleAES Aes + +typedef union tpmCryptKeySchedule_t tpmCryptKeySchedule_t; + +// This definition would change if there were something to report +#define SymLibSimulationEnd() + +#endif // SYM_LIB_DEFINED diff --git a/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/user_settings.h b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/user_settings.h new file mode 100644 index 00000000..1f7e3354 --- /dev/null +++ b/TPMCmd/tpm/cryptolibs/wolf/include/Wolf/user_settings.h @@ -0,0 +1,67 @@ + +/* TPM specific preprocessor flags for wolfcrypt */ + +#ifndef WOLF_CRYPT_USER_SETTINGS_H +#define WOLF_CRYPT_USER_SETTINGS_H + +/* Remove the automatic setting of the default I/O functions EmbedSend() + and EmbedReceive(). */ +#define WOLFSSL_USER_IO + +/* Avoid naming conflicts */ +#define NO_OLD_WC_NAMES + +/* Use stack based fast math for all big integer math */ +#define USE_FAST_MATH +#define TFM_TIMING_RESISTANT + +/* Expose direct encryption functions */ +#define WOLFSSL_AES_DIRECT + +/* Enable/Disable algorithm support based on TPM implementation header */ +#if ALG_SHA256 +# define WOLFSSL_SHA256 +#endif +#if ALG_SHA384 || ALG_SHA512 +# define WOLFSSL_SHA384 +# define WOLFSSL_SHA512 +#endif +#if ALG_RSA +/* Turn on RSA key generation functionality */ +# define WOLFSSL_KEY_GEN +#endif +#if ALG_ECC || defined(WOLFSSL_LIB) +# define HAVE_ECC + +/* Expose additional ECC primitives */ +# define WOLFSSL_PUBLIC_ECC_ADD_DBL +# define ECC_TIMING_RESISTANT + +/* Enables Shamir calc method */ +# define ECC_SHAMIR + +/* The TPM only needs low level ECC crypto */ +# define NO_ECC_SIGN +# define NO_ECC_VERIFY +# define NO_ECC_SECP + +# undef ECC_BN_P256 +# undef ECC_SM2_P256 +# undef ECC_BN_P638 +# define ECC_BN_P256 NO +# define ECC_SM2_P256 NO +# define ECC_BN_P638 NO + +#endif + +/* Disable explicit RSA. The TPM support for RSA is dependent only on TFM */ +#define NO_RSA +#define NO_RC4 +#define NO_ASN + +/* Enable debug wolf library check */ +//#define LIBRARY_COMPATIBILITY_CHECK + +#define WOLFSSL_ + +#endif // WOLF_CRYPT_USER_SETTINGS_H diff --git a/TPMCmd/tpm/include/ACT.h b/TPMCmd/tpm/include/ACT.h deleted file mode 100644 index 52da535c..00000000 --- a/TPMCmd/tpm/include/ACT.h +++ /dev/null @@ -1,235 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef _ACT_H_ -#define _ACT_H_ - -#include "TpmProfile.h" - -#if !(defined RH_ACT_0) || (RH_ACT_0 != YES) -# undef RH_ACT_0 -# define RH_ACT_0 NO -# define IF_ACT_0_IMPLEMENTED(op) -#else -# define IF_ACT_0_IMPLEMENTED(op) op(0) -#endif -#if !(defined RH_ACT_1) || (RH_ACT_1 != YES) -# undef RH_ACT_1 -# define RH_ACT_1 NO -# define IF_ACT_1_IMPLEMENTED(op) -#else -# define IF_ACT_1_IMPLEMENTED(op) op(1) -#endif -#if !(defined RH_ACT_2) || (RH_ACT_2 != YES) -# undef RH_ACT_2 -# define RH_ACT_2 NO -# define IF_ACT_2_IMPLEMENTED(op) -#else -# define IF_ACT_2_IMPLEMENTED(op) op(2) -#endif -#if !(defined RH_ACT_3) || (RH_ACT_3 != YES) -# undef RH_ACT_3 -# define RH_ACT_3 NO -# define IF_ACT_3_IMPLEMENTED(op) -#else -# define IF_ACT_3_IMPLEMENTED(op) op(3) -#endif -#if !(defined RH_ACT_4) || (RH_ACT_4 != YES) -# undef RH_ACT_4 -# define RH_ACT_4 NO -# define IF_ACT_4_IMPLEMENTED(op) -#else -# define IF_ACT_4_IMPLEMENTED(op) op(4) -#endif -#if !(defined RH_ACT_5) || (RH_ACT_5 != YES) -# undef RH_ACT_5 -# define RH_ACT_5 NO -# define IF_ACT_5_IMPLEMENTED(op) -#else -# define IF_ACT_5_IMPLEMENTED(op) op(5) -#endif -#if !(defined RH_ACT_6) || (RH_ACT_6 != YES) -# undef RH_ACT_6 -# define RH_ACT_6 NO -# define IF_ACT_6_IMPLEMENTED(op) -#else -# define IF_ACT_6_IMPLEMENTED(op) op(6) -#endif -#if !(defined RH_ACT_7) || (RH_ACT_7 != YES) -# undef RH_ACT_7 -# define RH_ACT_7 NO -# define IF_ACT_7_IMPLEMENTED(op) -#else -# define IF_ACT_7_IMPLEMENTED(op) op(7) -#endif -#if !(defined RH_ACT_8) || (RH_ACT_8 != YES) -# undef RH_ACT_8 -# define RH_ACT_8 NO -# define IF_ACT_8_IMPLEMENTED(op) -#else -# define IF_ACT_8_IMPLEMENTED(op) op(8) -#endif -#if !(defined RH_ACT_9) || (RH_ACT_9 != YES) -# undef RH_ACT_9 -# define RH_ACT_9 NO -# define IF_ACT_9_IMPLEMENTED(op) -#else -# define IF_ACT_9_IMPLEMENTED(op) op(9) -#endif -#if !(defined RH_ACT_A) || (RH_ACT_A != YES) -# undef RH_ACT_A -# define RH_ACT_A NO -# define IF_ACT_A_IMPLEMENTED(op) -#else -# define IF_ACT_A_IMPLEMENTED(op) op(A) -#endif -#if !(defined RH_ACT_B) || (RH_ACT_B != YES) -# undef RH_ACT_B -# define RH_ACT_B NO -# define IF_ACT_B_IMPLEMENTED(op) -#else -# define IF_ACT_B_IMPLEMENTED(op) op(B) -#endif -#if !(defined RH_ACT_C) || (RH_ACT_C != YES) -# undef RH_ACT_C -# define RH_ACT_C NO -# define IF_ACT_C_IMPLEMENTED(op) -#else -# define IF_ACT_C_IMPLEMENTED(op) op(C) -#endif -#if !(defined RH_ACT_D) || (RH_ACT_D != YES) -# undef RH_ACT_D -# define RH_ACT_D NO -# define IF_ACT_D_IMPLEMENTED(op) -#else -# define IF_ACT_D_IMPLEMENTED(op) op(D) -#endif -#if !(defined RH_ACT_E) || (RH_ACT_E != YES) -# undef RH_ACT_E -# define RH_ACT_E NO -# define IF_ACT_E_IMPLEMENTED(op) -#else -# define IF_ACT_E_IMPLEMENTED(op) op(E) -#endif -#if !(defined RH_ACT_F) || (RH_ACT_F != YES) -# undef RH_ACT_F -# define RH_ACT_F NO -# define IF_ACT_F_IMPLEMENTED(op) -#else -# define IF_ACT_F_IMPLEMENTED(op) op(F) -#endif - -#ifndef TPM_RH_ACT_0 -# error Need numeric definition for TPM_RH_ACT_0 -#endif - -#ifndef TPM_RH_ACT_1 -# define TPM_RH_ACT_1 (TPM_RH_ACT_0 + 1) -#endif -#ifndef TPM_RH_ACT_2 -# define TPM_RH_ACT_2 (TPM_RH_ACT_0 + 2) -#endif -#ifndef TPM_RH_ACT_3 -# define TPM_RH_ACT_3 (TPM_RH_ACT_0 + 3) -#endif -#ifndef TPM_RH_ACT_4 -# define TPM_RH_ACT_4 (TPM_RH_ACT_0 + 4) -#endif -#ifndef TPM_RH_ACT_5 -# define TPM_RH_ACT_5 (TPM_RH_ACT_0 + 5) -#endif -#ifndef TPM_RH_ACT_6 -# define TPM_RH_ACT_6 (TPM_RH_ACT_0 + 6) -#endif -#ifndef TPM_RH_ACT_7 -# define TPM_RH_ACT_7 (TPM_RH_ACT_0 + 7) -#endif -#ifndef TPM_RH_ACT_8 -# define TPM_RH_ACT_8 (TPM_RH_ACT_0 + 8) -#endif -#ifndef TPM_RH_ACT_9 -# define TPM_RH_ACT_9 (TPM_RH_ACT_0 + 9) -#endif -#ifndef TPM_RH_ACT_A -# define TPM_RH_ACT_A (TPM_RH_ACT_0 + 0xA) -#endif -#ifndef TPM_RH_ACT_B -# define TPM_RH_ACT_B (TPM_RH_ACT_0 + 0xB) -#endif -#ifndef TPM_RH_ACT_C -# define TPM_RH_ACT_C (TPM_RH_ACT_0 + 0xC) -#endif -#ifndef TPM_RH_ACT_D -# define TPM_RH_ACT_D (TPM_RH_ACT_0 + 0xD) -#endif -#ifndef TPM_RH_ACT_E -# define TPM_RH_ACT_E (TPM_RH_ACT_0 + 0xE) -#endif -#ifndef TPM_RH_ACT_F -# define TPM_RH_ACT_F (TPM_RH_ACT_0 + 0xF) -#endif - -#define FOR_EACH_ACT(op) \ - IF_ACT_0_IMPLEMENTED(op) \ - IF_ACT_1_IMPLEMENTED(op) \ - IF_ACT_2_IMPLEMENTED(op) \ - IF_ACT_3_IMPLEMENTED(op) \ - IF_ACT_4_IMPLEMENTED(op) \ - IF_ACT_5_IMPLEMENTED(op) \ - IF_ACT_6_IMPLEMENTED(op) \ - IF_ACT_7_IMPLEMENTED(op) \ - IF_ACT_8_IMPLEMENTED(op) \ - IF_ACT_9_IMPLEMENTED(op) \ - IF_ACT_A_IMPLEMENTED(op) \ - IF_ACT_B_IMPLEMENTED(op) \ - IF_ACT_C_IMPLEMENTED(op) \ - IF_ACT_D_IMPLEMENTED(op) \ - IF_ACT_E_IMPLEMENTED(op) \ - IF_ACT_F_IMPLEMENTED(op) - -// This is the mask for ACT that are implemented -//#define ACT_MASK(N) | (1 << 0x##N) -//#define ACT_IMPLEMENTED_MASK (0 FOR_EACH_ACT(ACT_MASK)) - -#define CASE_ACT_HANDLE(N) case TPM_RH_ACT_##N: -#define CASE_ACT_NUMBER(N) case 0x##N: - -typedef struct ACT_STATE -{ - UINT32 remaining; - TPM_ALG_ID hashAlg; - TPM2B_DIGEST authPolicy; -} ACT_STATE, *P_ACT_STATE; - -#endif // _ACT_H_ diff --git a/TPMCmd/tpm/include/BaseTypes.h b/TPMCmd/tpm/include/BaseTypes.h deleted file mode 100644 index 008739a8..00000000 --- a/TPMCmd/tpm/include/BaseTypes.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.2 Feb 22, 2019 - * Date: Mar 20, 2019 Time: 08:27:26PM - */ - -#ifndef _BASE_TYPES_H_ -#define _BASE_TYPES_H_ - -// NULL definition -#ifndef NULL -# define NULL (0) -#endif - -typedef uint8_t UINT8; -typedef uint8_t BYTE; -typedef int8_t INT8; -typedef int BOOL; -typedef uint16_t UINT16; -typedef int16_t INT16; -typedef uint32_t UINT32; -typedef int32_t INT32; -typedef uint64_t UINT64; -typedef int64_t INT64; - -#endif // _BASE_TYPES_H_ diff --git a/TPMCmd/tpm/include/BnValues.h b/TPMCmd/tpm/include/BnValues.h deleted file mode 100644 index fa7dc10a..00000000 --- a/TPMCmd/tpm/include/BnValues.h +++ /dev/null @@ -1,354 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction - -// This file contains the definitions needed for defining the internal BIGNUM -// structure. - -// A BIGNUM is a pointer to a structure. The structure has three fields. The -// last field is and array (d) of crypt_uword_t. Each word is in machine format -// (big- or little-endian) with the words in ascending significance (i.e. words -// in little-endian order). This is the order that seems to be used in every -// big number library in the worlds, so... -// -// The first field in the structure (allocated) is the number of words in 'd'. -// This is the upper limit on the size of the number that can be held in the -// structure. This differs from libraries like OpenSSL as this is not intended -// to deal with numbers of arbitrary size; just numbers that are needed to deal -// with the algorithms that are defined in the TPM implementation. -// -// The second field in the structure (size) is the number of significant words -// in 'n'. When this number is zero, the number is zero. The word at used-1 should -// never be zero. All words between d[size] and d[allocated-1] should be zero. - -//** Defines - -#ifndef _BN_NUMBERS_H -#define _BN_NUMBERS_H - -#if RADIX_BITS == 64 -# define RADIX_LOG2 6 -#elif RADIX_BITS == 32 -# define RADIX_LOG2 5 -#else -# error "Unsupported radix" -#endif - -#define RADIX_MOD(x) ((x) & ((1 << RADIX_LOG2) - 1)) -#define RADIX_DIV(x) ((x) >> RADIX_LOG2) -#define RADIX_MASK ((((crypt_uword_t)1) << RADIX_LOG2) - 1) - -#define BITS_TO_CRYPT_WORDS(bits) RADIX_DIV((bits) + (RADIX_BITS - 1)) -#define BYTES_TO_CRYPT_WORDS(bytes) BITS_TO_CRYPT_WORDS(bytes * 8) -#define SIZE_IN_CRYPT_WORDS(thing) BYTES_TO_CRYPT_WORDS(sizeof(thing)) - -#if RADIX_BITS == 64 -# define SWAP_CRYPT_WORD(x) REVERSE_ENDIAN_64(x) -typedef uint64_t crypt_uword_t; -typedef int64_t crypt_word_t; -# define TO_CRYPT_WORD_64 BIG_ENDIAN_BYTES_TO_UINT64 -# define TO_CRYPT_WORD_32(a, b, c, d) TO_CRYPT_WORD_64(0, 0, 0, 0, a, b, c, d) -#elif RADIX_BITS == 32 -# define SWAP_CRYPT_WORD(x) REVERSE_ENDIAN_32((x)) -typedef uint32_t crypt_uword_t; -typedef int32_t crypt_word_t; -# define TO_CRYPT_WORD_64(a, b, c, d, e, f, g, h) \ - BIG_ENDIAN_BYTES_TO_UINT32(e, f, g, h), BIG_ENDIAN_BYTES_TO_UINT32(a, b, c, d) -#endif - -#define MAX_CRYPT_UWORD (~((crypt_uword_t)0)) -#define MAX_CRYPT_WORD ((crypt_word_t)(MAX_CRYPT_UWORD >> 1)) -#define MIN_CRYPT_WORD (~MAX_CRYPT_WORD) - -#define LARGEST_NUMBER \ - (MAX((ALG_RSA * MAX_RSA_KEY_BYTES), \ - MAX((ALG_ECC * MAX_ECC_KEY_BYTES), MAX_DIGEST_SIZE))) -#define LARGEST_NUMBER_BITS (LARGEST_NUMBER * 8) - -#define MAX_ECC_PARAMETER_BYTES (MAX_ECC_KEY_BYTES * ALG_ECC) - -// These are the basic big number formats. This is convertible to the library- -// specific format without too much difficulty. For the math performed using -// these numbers, the value is always positive. -#define BN_STRUCT_DEF(count) \ - struct \ - { \ - crypt_uword_t allocated; \ - crypt_uword_t size; \ - crypt_uword_t d[count]; \ - } - -typedef BN_STRUCT_DEF(1) bignum_t; -#ifndef bigNum -typedef bignum_t* bigNum; -typedef const bignum_t* bigConst; -#endif - -extern const bignum_t BnConstZero; - -// The Functions to access the properties of a big number. -// Get number of allocated words -#define BnGetAllocated(x) (unsigned)((x)->allocated) - -// Get number of words used -#define BnGetSize(x) ((x)->size) - -// Get a pointer to the data array -#define BnGetArray(x) ((crypt_uword_t*)&((x)->d[0])) - -// Get the nth word of a BIGNUM (zero-based) -#define BnGetWord(x, i) (crypt_uword_t)((x)->d[i]) - -// Some things that are done often. - -// Test to see if a bignum_t is equal to zero -#define BnEqualZero(bn) (BnGetSize(bn) == 0) - -// Test to see if a bignum_t is equal to a word type -#define BnEqualWord(bn, word) \ - ((BnGetSize(bn) == 1) && (BnGetWord(bn, 0) == (crypt_uword_t)word)) - -// Determine if a BIGNUM is even. A zero is even. Although the -// indication that a number is zero is that its size is zero, -// all words of the number are 0 so this test works on zero. -#define BnIsEven(n) ((BnGetWord(n, 0) & 1) == 0) - -// The macros below are used to define BIGNUM values of the required -// size. The values are allocated on the stack so they can be -// treated like simple local values. - -// This will call the initialization function for a defined bignum_t. -// This sets the allocated and used fields and clears the words of 'n'. -#define BN_INIT(name) \ - (bigNum) BnInit((bigNum) & (name), BYTES_TO_CRYPT_WORDS(sizeof(name.d))) - -// In some cases, a function will need the address of the structure -// associated with a variable. The structure for a BIGNUM variable -// of 'name' is 'name_'. Generally, when the structure is created, it -// is initialized and a parameter is created with a pointer to the -// structure. The pointer has the 'name' and the structure it points -// to is 'name_' -#define BN_ADDRESS(name) (bigNum) & name##_ - -#define CRYPT_WORDS(bytes) BYTES_TO_CRYPT_WORDS(bytes) -#define MIN_ALLOC(bytes) (CRYPT_WORDS(bytes) < 1 ? 1 : CRYPT_WORDS(bytes)) -#define BN_CONST(name, bytes, initializer) \ - typedef const struct name##_type \ - { \ - crypt_uword_t allocated; \ - crypt_uword_t size; \ - crypt_uword_t d[MIN_ALLOC(bytes)]; \ - } name##_type; \ - name##_type name = {MIN_ALLOC(bytes), CRYPT_WORDS(bytes), {initializer}}; - -#define BN_STRUCT_ALLOCATION(bits) (BITS_TO_CRYPT_WORDS(bits) + 1) - -// Create a structure of the correct size. -#define BN_STRUCT(bits) BN_STRUCT_DEF(BN_STRUCT_ALLOCATION(bits)) - -// Define a BIGNUM type with a specific allocation -#define BN_TYPE(name, bits) typedef BN_STRUCT(bits) bn_##name##_t - -// This creates a local BIGNUM variable of a specific size and -// initializes it from a TPM2B input parameter. -#define BN_INITIALIZED(name, bits, initializer) \ - BN_STRUCT(bits) name##_; \ - bigNum name = BnFrom2B(BN_INIT(name##_), (const TPM2B*)initializer) - -// Create a local variable that can hold a number with 'bits' -#define BN_VAR(name, bits) \ - BN_STRUCT(bits) _##name; \ - bigNum name = BN_INIT(_##name) - -// Create a type that can hold the largest number defined by the -// implementation. -#define BN_MAX(name) BN_VAR(name, LARGEST_NUMBER_BITS) -#define BN_MAX_INITIALIZED(name, initializer) \ - BN_INITIALIZED(name, LARGEST_NUMBER_BITS, initializer) - -// A word size value is useful -#define BN_WORD(name) BN_VAR(name, RADIX_BITS) - -// This is used to create a word-size BIGNUM and initialize it with -// an input parameter to a function. -#define BN_WORD_INITIALIZED(name, initial) \ - BN_STRUCT(RADIX_BITS) name##_; \ - bigNum name = \ - BnInitializeWord((bigNum)&name##_, BN_STRUCT_ALLOCATION(RADIX_BITS), initial) - -// ECC-Specific Values - -// This is the format for a point. It is always in affine format. The Z value is -// carried as part of the point, primarily to simplify the interface to the support -// library. Rather than have the interface layer have to create space for the -// point each time it is used... -// The x, y, and z values are pointers to bigNum values and not in-line versions of -// the numbers. This is a relic of the days when there was no standard TPM format -// for the numbers -typedef struct _bn_point_t -{ - bigNum x; - bigNum y; - bigNum z; -} bn_point_t; - -typedef bn_point_t* bigPoint; -typedef const bn_point_t* pointConst; - -typedef struct constant_point_t -{ - bigConst x; - bigConst y; - bigConst z; -} constant_point_t; - -#define ECC_BITS (MAX_ECC_KEY_BYTES * 8) -BN_TYPE(ecc, ECC_BITS); -#define ECC_NUM(name) BN_VAR(name, ECC_BITS) -#define ECC_INITIALIZED(name, initializer) BN_INITIALIZED(name, ECC_BITS, initializer) - -#define POINT_INSTANCE(name, bits) \ - BN_STRUCT(bits) name##_x = {BITS_TO_CRYPT_WORDS(bits), 0, {0}}; \ - BN_STRUCT(bits) name##_y = {BITS_TO_CRYPT_WORDS(bits), 0, {0}}; \ - BN_STRUCT(bits) name##_z = {BITS_TO_CRYPT_WORDS(bits), 0, {0}}; \ - bn_point_t name##_ - -#define POINT_INITIALIZER(name) \ - BnInitializePoint(&name##_, (bigNum)&name##_x, (bigNum)&name##_y, (bigNum)&name##_z) - -#define POINT_INITIALIZED(name, initValue) \ - POINT_INSTANCE(name, MAX_ECC_KEY_BITS); \ - bigPoint name = BnPointFrom2B(POINT_INITIALIZER(name), initValue) - -#define POINT_VAR(name, bits) \ - POINT_INSTANCE(name, bits); \ - bigPoint name = POINT_INITIALIZER(name) - -#define POINT(name) POINT_VAR(name, MAX_ECC_KEY_BITS) - -// Structure for the curve parameters. This is an analog to the -// TPMS_ALGORITHM_DETAIL_ECC -typedef struct -{ - bigConst prime; // a prime number - bigConst order; // the order of the curve - bigConst h; // cofactor - bigConst a; // linear coefficient - bigConst b; // constant term - constant_point_t base; // base point -} ECC_CURVE_DATA; - -// Access macros for the ECC_CURVE structure. The parameter 'C' is a pointer -// to an ECC_CURVE_DATA structure. In some libraries, the curve structure contains -// a pointer to an ECC_CURVE_DATA structure as well as some other bits. For those -// cases, the AccessCurveData macro is used in the code to first get the pointer -// to the ECC_CURVE_DATA for access. In some cases, the macro does nothing. -#define CurveGetPrime(C) ((C)->prime) -#define CurveGetOrder(C) ((C)->order) -#define CurveGetCofactor(C) ((C)->h) -#define CurveGet_a(C) ((C)->a) -#define CurveGet_b(C) ((C)->b) -#define CurveGetG(C) ((pointConst) & ((C)->base)) -#define CurveGetGx(C) ((C)->base.x) -#define CurveGetGy(C) ((C)->base.y) - -// Convert bytes in initializers -// This is used for CryptEccData.c. -#define BIG_ENDIAN_BYTES_TO_UINT32(a, b, c, d) \ - (((UINT32)(a) << 24) + ((UINT32)(b) << 16) + ((UINT32)(c) << 8) + ((UINT32)(d))) - -#define BIG_ENDIAN_BYTES_TO_UINT64(a, b, c, d, e, f, g, h) \ - (((UINT64)(a) << 56) + ((UINT64)(b) << 48) + ((UINT64)(c) << 40) \ - + ((UINT64)(d) << 32) + ((UINT64)(e) << 24) + ((UINT64)(f) << 16) \ - + ((UINT64)(g) << 8) + ((UINT64)(h))) - -#ifndef RADIX_BYTES -# if RADIX_BITS == 32 -# define RADIX_BYTES 4 -# elif RADIX_BITS == 64 -# define RADIX_BYTES 8 -# else -# error "RADIX_BITS must either be 32 or 64" -# endif -#endif - -// These macros are used for data initialization of big number ECC constants -// These two macros combine a macro for data definition with a macro for -// structure initialization. The 'a' parameter is a macro that gives numbers to -// each of the bytes of the initializer and defines where each of the numberd -// bytes will show up in the final structure. The 'b' value is a structure that -// contains the requisite number of bytes in big endian order. S, the MJOIN -// and JOIND macros will combine a macro defining a data layout with a macro defining -// the data to be places. Generally, these macros will only need expansion when -// CryptEccData.c gets compiled. -#define JOINED(a, b) a b -#define MJOIN(a, b) a b - -#if RADIX_BYTES == 64 -# define B8_TO_BN(a, b, c, d, e, f, g, h) \ - ((((((((((((((((UINT64)a) << 8) | (UINT64)b) << 8) | (UINT64)c) << 8) \ - | (UINT64)d) \ - << 8) \ - | (UINT64)e) \ - << 8) \ - | (UINT64)f) \ - << 8) \ - | (UINT64)g) \ - << 8) \ - | (UINT64)h) -# define B1_TO_BN(a) B8_TO_BN(0, 0, 0, 0, 0, 0, 0, a) -# define B2_TO_BN(a, b) B8_TO_BN(0, 0, 0, 0, 0, 0, a, b) -# define B3_TO_BN(a, b, c) B8_TO_BN(0, 0, 0, 0, 0, a, b, c) -# define B4_TO_BN(a, b, c, d) B8_TO_BN(0, 0, 0, 0, a, b, c, d) -# define B5_TO_BN(a, b, c, d, e) B8_TO_BN(0, 0, 0, a, b, c, d, e) -# define B6_TO_BN(a, b, c, d, e, f) B8_TO_BN(0, 0, a, b, c, d, e, f) -# define B7_TO_BN(a, b, c, d, e, f, g) B8_TO_BN(0, a, b, c, d, e, f, g) -#else -# define B1_TO_BN(a) B4_TO_BN(0, 0, 0, a) -# define B2_TO_BN(a, b) B4_TO_BN(0, 0, a, b) -# define B3_TO_BN(a, b, c) B4_TO_BN(0, a, b, c) -# define B4_TO_BN(a, b, c, d) \ - (((((((UINT32)a << 8) | (UINT32)b) << 8) | (UINT32)c) << 8) | (UINT32)d) -# define B5_TO_BN(a, b, c, d, e) B4_TO_BN(b, c, d, e), B1_TO_BN(a) -# define B6_TO_BN(a, b, c, d, e, f) B4_TO_BN(c, d, e, f), B2_TO_BN(a, b) -# define B7_TO_BN(a, b, c, d, e, f, g) B4_TO_BN(d, e, f, g), B3_TO_BN(a, b, c) -# define B8_TO_BN(a, b, c, d, e, f, g, h) B4_TO_BN(e, f, g, h), B4_TO_BN(a, b, c, d) - -#endif - -// Add implementation dependent definitions for other ECC Values and for linkages. -#include LIB_INCLUDE(MATH_LIB, Math) - -#endif // _BN_NUMBERS_H \ No newline at end of file diff --git a/TPMCmd/tpm/include/Capabilities.h b/TPMCmd/tpm/include/Capabilities.h deleted file mode 100644 index 63048815..00000000 --- a/TPMCmd/tpm/include/Capabilities.h +++ /dev/null @@ -1,50 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef _CAPABILITIES_H -#define _CAPABILITIES_H - -#define MAX_CAP_DATA (MAX_CAP_BUFFER - sizeof(TPM_CAP) - sizeof(UINT32)) -#define MAX_CAP_ALGS (MAX_CAP_DATA / sizeof(TPMS_ALG_PROPERTY)) -#define MAX_CAP_HANDLES (MAX_CAP_DATA / sizeof(TPM_HANDLE)) -#define MAX_CAP_CC (MAX_CAP_DATA / sizeof(TPM_CC)) -#define MAX_TPM_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PROPERTY)) -#define MAX_PCR_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PCR_SELECT)) -#define MAX_ECC_CURVES (MAX_CAP_DATA / sizeof(TPM_ECC_CURVE)) -#define MAX_TAGGED_POLICIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_POLICY)) -#define MAX_ACT_DATA (MAX_CAP_DATA / sizeof(TPMS_ACT_DATA)) - -#define MAX_AC_CAPABILITIES (MAX_CAP_DATA / sizeof(TPMS_AC_OUTPUT)) - -#endif diff --git a/TPMCmd/tpm/include/CommandAttributeData.h b/TPMCmd/tpm/include/CommandAttributeData.h deleted file mode 100644 index d0637298..00000000 --- a/TPMCmd/tpm/include/CommandAttributeData.h +++ /dev/null @@ -1,944 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Sep 7, 2019 Time: 04:51:22PM - */ - -// This file should only be included by CommandCodeAttibutes.c -#ifdef _COMMAND_CODE_ATTRIBUTES_ - -# include "CommandAttributes.h" - -# if COMPRESSED_LISTS -# define PAD_LIST 0 -# else -# define PAD_LIST 1 -# endif - -// This is the command code attribute array for GetCapability. -// Both this array and s_commandAttributes provides command code attributes, -// but tuned for different purpose -const TPMA_CC s_ccAttr[] = { -# if(PAD_LIST || CC_NV_UndefineSpaceSpecial) - TPMA_CC_INITIALIZER(0x011F, 0, 1, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_EvictControl) - TPMA_CC_INITIALIZER(0x0120, 0, 1, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_HierarchyControl) - TPMA_CC_INITIALIZER(0x0121, 0, 1, 1, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_UndefineSpace) - TPMA_CC_INITIALIZER(0x0122, 0, 1, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST) - TPMA_CC_INITIALIZER(0x0123, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ChangeEPS) - TPMA_CC_INITIALIZER(0x0124, 0, 1, 1, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ChangePPS) - TPMA_CC_INITIALIZER(0x0125, 0, 1, 1, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Clear) - TPMA_CC_INITIALIZER(0x0126, 0, 1, 1, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ClearControl) - TPMA_CC_INITIALIZER(0x0127, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ClockSet) - TPMA_CC_INITIALIZER(0x0128, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_HierarchyChangeAuth) - TPMA_CC_INITIALIZER(0x0129, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_DefineSpace) - TPMA_CC_INITIALIZER(0x012A, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PCR_Allocate) - TPMA_CC_INITIALIZER(0x012B, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PCR_SetAuthPolicy) - TPMA_CC_INITIALIZER(0x012C, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PP_Commands) - TPMA_CC_INITIALIZER(0x012D, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_SetPrimaryPolicy) - TPMA_CC_INITIALIZER(0x012E, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_FieldUpgradeStart) - TPMA_CC_INITIALIZER(0x012F, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ClockRateAdjust) - TPMA_CC_INITIALIZER(0x0130, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_CreatePrimary) - TPMA_CC_INITIALIZER(0x0131, 0, 0, 0, 0, 1, 1, 0, 0), -# endif -# if(PAD_LIST || CC_NV_GlobalWriteLock) - TPMA_CC_INITIALIZER(0x0132, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_GetCommandAuditDigest) - TPMA_CC_INITIALIZER(0x0133, 0, 1, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_Increment) - TPMA_CC_INITIALIZER(0x0134, 0, 1, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_SetBits) - TPMA_CC_INITIALIZER(0x0135, 0, 1, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_Extend) - TPMA_CC_INITIALIZER(0x0136, 0, 1, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_Write) - TPMA_CC_INITIALIZER(0x0137, 0, 1, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_WriteLock) - TPMA_CC_INITIALIZER(0x0138, 0, 1, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_DictionaryAttackLockReset) - TPMA_CC_INITIALIZER(0x0139, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_DictionaryAttackParameters) - TPMA_CC_INITIALIZER(0x013A, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_ChangeAuth) - TPMA_CC_INITIALIZER(0x013B, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PCR_Event) - TPMA_CC_INITIALIZER(0x013C, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PCR_Reset) - TPMA_CC_INITIALIZER(0x013D, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_SequenceComplete) - TPMA_CC_INITIALIZER(0x013E, 0, 0, 0, 1, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_SetAlgorithmSet) - TPMA_CC_INITIALIZER(0x013F, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_SetCommandCodeAuditStatus) - TPMA_CC_INITIALIZER(0x0140, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_FieldUpgradeData) - TPMA_CC_INITIALIZER(0x0141, 0, 1, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_IncrementalSelfTest) - TPMA_CC_INITIALIZER(0x0142, 0, 1, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_SelfTest) - TPMA_CC_INITIALIZER(0x0143, 0, 1, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Startup) - TPMA_CC_INITIALIZER(0x0144, 0, 1, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Shutdown) - TPMA_CC_INITIALIZER(0x0145, 0, 1, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_StirRandom) - TPMA_CC_INITIALIZER(0x0146, 0, 1, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ActivateCredential) - TPMA_CC_INITIALIZER(0x0147, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Certify) - TPMA_CC_INITIALIZER(0x0148, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyNV) - TPMA_CC_INITIALIZER(0x0149, 0, 0, 0, 0, 3, 0, 0, 0), -# endif -# if(PAD_LIST || CC_CertifyCreation) - TPMA_CC_INITIALIZER(0x014A, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Duplicate) - TPMA_CC_INITIALIZER(0x014B, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_GetTime) - TPMA_CC_INITIALIZER(0x014C, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_GetSessionAuditDigest) - TPMA_CC_INITIALIZER(0x014D, 0, 0, 0, 0, 3, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_Read) - TPMA_CC_INITIALIZER(0x014E, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_ReadLock) - TPMA_CC_INITIALIZER(0x014F, 0, 1, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ObjectChangeAuth) - TPMA_CC_INITIALIZER(0x0150, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicySecret) - TPMA_CC_INITIALIZER(0x0151, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Rewrap) - TPMA_CC_INITIALIZER(0x0152, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Create) - TPMA_CC_INITIALIZER(0x0153, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ECDH_ZGen) - TPMA_CC_INITIALIZER(0x0154, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || (CC_HMAC || CC_MAC)) - TPMA_CC_INITIALIZER(0x0155, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Import) - TPMA_CC_INITIALIZER(0x0156, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Load) - TPMA_CC_INITIALIZER(0x0157, 0, 0, 0, 0, 1, 1, 0, 0), -# endif -# if(PAD_LIST || CC_Quote) - TPMA_CC_INITIALIZER(0x0158, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_RSA_Decrypt) - TPMA_CC_INITIALIZER(0x0159, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST) - TPMA_CC_INITIALIZER(0x015A, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || (CC_HMAC_Start || CC_MAC_Start)) - TPMA_CC_INITIALIZER(0x015B, 0, 0, 0, 0, 1, 1, 0, 0), -# endif -# if(PAD_LIST || CC_SequenceUpdate) - TPMA_CC_INITIALIZER(0x015C, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Sign) - TPMA_CC_INITIALIZER(0x015D, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Unseal) - TPMA_CC_INITIALIZER(0x015E, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST) - TPMA_CC_INITIALIZER(0x015F, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicySigned) - TPMA_CC_INITIALIZER(0x0160, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ContextLoad) - TPMA_CC_INITIALIZER(0x0161, 0, 0, 0, 0, 0, 1, 0, 0), -# endif -# if(PAD_LIST || CC_ContextSave) - TPMA_CC_INITIALIZER(0x0162, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ECDH_KeyGen) - TPMA_CC_INITIALIZER(0x0163, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_EncryptDecrypt) - TPMA_CC_INITIALIZER(0x0164, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_FlushContext) - TPMA_CC_INITIALIZER(0x0165, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST) - TPMA_CC_INITIALIZER(0x0166, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_LoadExternal) - TPMA_CC_INITIALIZER(0x0167, 0, 0, 0, 0, 0, 1, 0, 0), -# endif -# if(PAD_LIST || CC_MakeCredential) - TPMA_CC_INITIALIZER(0x0168, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_ReadPublic) - TPMA_CC_INITIALIZER(0x0169, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyAuthorize) - TPMA_CC_INITIALIZER(0x016A, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyAuthValue) - TPMA_CC_INITIALIZER(0x016B, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyCommandCode) - TPMA_CC_INITIALIZER(0x016C, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyCounterTimer) - TPMA_CC_INITIALIZER(0x016D, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyCpHash) - TPMA_CC_INITIALIZER(0x016E, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyLocality) - TPMA_CC_INITIALIZER(0x016F, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyNameHash) - TPMA_CC_INITIALIZER(0x0170, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyOR) - TPMA_CC_INITIALIZER(0x0171, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyTicket) - TPMA_CC_INITIALIZER(0x0172, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ReadPublic) - TPMA_CC_INITIALIZER(0x0173, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_RSA_Encrypt) - TPMA_CC_INITIALIZER(0x0174, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST) - TPMA_CC_INITIALIZER(0x0175, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_StartAuthSession) - TPMA_CC_INITIALIZER(0x0176, 0, 0, 0, 0, 2, 1, 0, 0), -# endif -# if(PAD_LIST || CC_VerifySignature) - TPMA_CC_INITIALIZER(0x0177, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ECC_Parameters) - TPMA_CC_INITIALIZER(0x0178, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_FirmwareRead) - TPMA_CC_INITIALIZER(0x0179, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_GetCapability) - TPMA_CC_INITIALIZER(0x017A, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_GetRandom) - TPMA_CC_INITIALIZER(0x017B, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_GetTestResult) - TPMA_CC_INITIALIZER(0x017C, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Hash) - TPMA_CC_INITIALIZER(0x017D, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PCR_Read) - TPMA_CC_INITIALIZER(0x017E, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyPCR) - TPMA_CC_INITIALIZER(0x017F, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyRestart) - TPMA_CC_INITIALIZER(0x0180, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ReadClock) - TPMA_CC_INITIALIZER(0x0181, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PCR_Extend) - TPMA_CC_INITIALIZER(0x0182, 0, 1, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PCR_SetAuthValue) - TPMA_CC_INITIALIZER(0x0183, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_NV_Certify) - TPMA_CC_INITIALIZER(0x0184, 0, 0, 0, 0, 3, 0, 0, 0), -# endif -# if(PAD_LIST || CC_EventSequenceComplete) - TPMA_CC_INITIALIZER(0x0185, 0, 1, 0, 1, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_HashSequenceStart) - TPMA_CC_INITIALIZER(0x0186, 0, 0, 0, 0, 0, 1, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyPhysicalPresence) - TPMA_CC_INITIALIZER(0x0187, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyDuplicationSelect) - TPMA_CC_INITIALIZER(0x0188, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyGetDigest) - TPMA_CC_INITIALIZER(0x0189, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_TestParms) - TPMA_CC_INITIALIZER(0x018A, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Commit) - TPMA_CC_INITIALIZER(0x018B, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyPassword) - TPMA_CC_INITIALIZER(0x018C, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ZGen_2Phase) - TPMA_CC_INITIALIZER(0x018D, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_EC_Ephemeral) - TPMA_CC_INITIALIZER(0x018E, 0, 0, 0, 0, 0, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyNvWritten) - TPMA_CC_INITIALIZER(0x018F, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyTemplate) - TPMA_CC_INITIALIZER(0x0190, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_CreateLoaded) - TPMA_CC_INITIALIZER(0x0191, 0, 0, 0, 0, 1, 1, 0, 0), -# endif -# if(PAD_LIST || CC_PolicyAuthorizeNV) - TPMA_CC_INITIALIZER(0x0192, 0, 0, 0, 0, 3, 0, 0, 0), -# endif -# if(PAD_LIST || CC_EncryptDecrypt2) - TPMA_CC_INITIALIZER(0x0193, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_AC_GetCapability) - TPMA_CC_INITIALIZER(0x0194, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_AC_Send) - TPMA_CC_INITIALIZER(0x0195, 0, 0, 0, 0, 3, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Policy_AC_SendSelect) - TPMA_CC_INITIALIZER(0x0196, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_CertifyX509) - TPMA_CC_INITIALIZER(0x0197, 0, 0, 0, 0, 2, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ACT_SetTimeout) - TPMA_CC_INITIALIZER(0x0198, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ECC_Encrypt) - TPMA_CC_INITIALIZER(0x0199, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_ECC_Decrypt) - TPMA_CC_INITIALIZER(0x019A, 0, 0, 0, 0, 1, 0, 0, 0), -# endif -# if(PAD_LIST || CC_Vendor_TCG_Test) - TPMA_CC_INITIALIZER(0x0000, 0, 0, 0, 0, 0, 0, 1, 0), -# endif - TPMA_ZERO_INITIALIZER()}; - -// This is the command code attribute structure. -const COMMAND_ATTRIBUTES s_commandAttributes[] = { -# if(PAD_LIST || CC_NV_UndefineSpaceSpecial) - (COMMAND_ATTRIBUTES)(CC_NV_UndefineSpaceSpecial * // 0x011F - (IS_IMPLEMENTED + HANDLE_1_ADMIN + HANDLE_2_USER - + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_EvictControl) - (COMMAND_ATTRIBUTES)(CC_EvictControl* // 0x0120 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_HierarchyControl) - (COMMAND_ATTRIBUTES)(CC_HierarchyControl* // 0x0121 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_NV_UndefineSpace) - (COMMAND_ATTRIBUTES)(CC_NV_UndefineSpace* // 0x0122 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST) - (COMMAND_ATTRIBUTES)(0), // 0x0123 -# endif -# if(PAD_LIST || CC_ChangeEPS) - (COMMAND_ATTRIBUTES)(CC_ChangeEPS* // 0x0124 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_ChangePPS) - (COMMAND_ATTRIBUTES)(CC_ChangePPS* // 0x0125 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_Clear) - (COMMAND_ATTRIBUTES)(CC_Clear* // 0x0126 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_ClearControl) - (COMMAND_ATTRIBUTES)(CC_ClearControl* // 0x0127 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_ClockSet) - (COMMAND_ATTRIBUTES)(CC_ClockSet* // 0x0128 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_HierarchyChangeAuth) - (COMMAND_ATTRIBUTES)(CC_HierarchyChangeAuth* // 0x0129 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_NV_DefineSpace) - (COMMAND_ATTRIBUTES)(CC_NV_DefineSpace* // 0x012A - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_PCR_Allocate) - (COMMAND_ATTRIBUTES)(CC_PCR_Allocate* // 0x012B - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_PCR_SetAuthPolicy) - (COMMAND_ATTRIBUTES)(CC_PCR_SetAuthPolicy* // 0x012C - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_PP_Commands) - (COMMAND_ATTRIBUTES)(CC_PP_Commands* // 0x012D - (IS_IMPLEMENTED + HANDLE_1_USER + PP_REQUIRED)), -# endif -# if(PAD_LIST || CC_SetPrimaryPolicy) - (COMMAND_ATTRIBUTES)(CC_SetPrimaryPolicy* // 0x012E - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_FieldUpgradeStart) - (COMMAND_ATTRIBUTES)(CC_FieldUpgradeStart* // 0x012F - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_ADMIN + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_ClockRateAdjust) - (COMMAND_ATTRIBUTES)(CC_ClockRateAdjust* // 0x0130 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_CreatePrimary) - (COMMAND_ATTRIBUTES)(CC_CreatePrimary* // 0x0131 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + PP_COMMAND - + ENCRYPT_2 + R_HANDLE)), -# endif -# if(PAD_LIST || CC_NV_GlobalWriteLock) - (COMMAND_ATTRIBUTES)(CC_NV_GlobalWriteLock* // 0x0132 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_GetCommandAuditDigest) - (COMMAND_ATTRIBUTES)(CC_GetCommandAuditDigest* // 0x0133 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + HANDLE_2_USER - + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_NV_Increment) - (COMMAND_ATTRIBUTES)(CC_NV_Increment* // 0x0134 - (IS_IMPLEMENTED + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_NV_SetBits) - (COMMAND_ATTRIBUTES)(CC_NV_SetBits* // 0x0135 - (IS_IMPLEMENTED + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_NV_Extend) - (COMMAND_ATTRIBUTES)(CC_NV_Extend* // 0x0136 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_NV_Write) - (COMMAND_ATTRIBUTES)(CC_NV_Write* // 0x0137 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_NV_WriteLock) - (COMMAND_ATTRIBUTES)(CC_NV_WriteLock* // 0x0138 - (IS_IMPLEMENTED + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_DictionaryAttackLockReset) - (COMMAND_ATTRIBUTES)(CC_DictionaryAttackLockReset* // 0x0139 - (IS_IMPLEMENTED + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_DictionaryAttackParameters) - (COMMAND_ATTRIBUTES)(CC_DictionaryAttackParameters* // 0x013A - (IS_IMPLEMENTED + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_NV_ChangeAuth) - (COMMAND_ATTRIBUTES)(CC_NV_ChangeAuth* // 0x013B - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_ADMIN)), -# endif -# if(PAD_LIST || CC_PCR_Event) - (COMMAND_ATTRIBUTES)(CC_PCR_Event* // 0x013C - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_PCR_Reset) - (COMMAND_ATTRIBUTES)(CC_PCR_Reset* // 0x013D - (IS_IMPLEMENTED + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_SequenceComplete) - (COMMAND_ATTRIBUTES)(CC_SequenceComplete* // 0x013E - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_SetAlgorithmSet) - (COMMAND_ATTRIBUTES)(CC_SetAlgorithmSet* // 0x013F - (IS_IMPLEMENTED + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_SetCommandCodeAuditStatus) - (COMMAND_ATTRIBUTES)(CC_SetCommandCodeAuditStatus* // 0x0140 - (IS_IMPLEMENTED + HANDLE_1_USER + PP_COMMAND)), -# endif -# if(PAD_LIST || CC_FieldUpgradeData) - (COMMAND_ATTRIBUTES)(CC_FieldUpgradeData* // 0x0141 - (IS_IMPLEMENTED + DECRYPT_2)), -# endif -# if(PAD_LIST || CC_IncrementalSelfTest) - (COMMAND_ATTRIBUTES)(CC_IncrementalSelfTest* // 0x0142 - (IS_IMPLEMENTED)), -# endif -# if(PAD_LIST || CC_SelfTest) - (COMMAND_ATTRIBUTES)(CC_SelfTest* // 0x0143 - (IS_IMPLEMENTED)), -# endif -# if(PAD_LIST || CC_Startup) - (COMMAND_ATTRIBUTES)(CC_Startup* // 0x0144 - (IS_IMPLEMENTED + NO_SESSIONS)), -# endif -# if(PAD_LIST || CC_Shutdown) - (COMMAND_ATTRIBUTES)(CC_Shutdown* // 0x0145 - (IS_IMPLEMENTED)), -# endif -# if(PAD_LIST || CC_StirRandom) - (COMMAND_ATTRIBUTES)(CC_StirRandom* // 0x0146 - (IS_IMPLEMENTED + DECRYPT_2)), -# endif -# if(PAD_LIST || CC_ActivateCredential) - (COMMAND_ATTRIBUTES)(CC_ActivateCredential* // 0x0147 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_ADMIN + HANDLE_2_USER - + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_Certify) - (COMMAND_ATTRIBUTES)(CC_Certify* // 0x0148 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_ADMIN + HANDLE_2_USER - + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_PolicyNV) - (COMMAND_ATTRIBUTES)(CC_PolicyNV* // 0x0149 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_CertifyCreation) - (COMMAND_ATTRIBUTES)(CC_CertifyCreation* // 0x014A - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_Duplicate) - (COMMAND_ATTRIBUTES)(CC_Duplicate* // 0x014B - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_DUP + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_GetTime) - (COMMAND_ATTRIBUTES)(CC_GetTime* // 0x014C - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + HANDLE_2_USER - + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_GetSessionAuditDigest) - (COMMAND_ATTRIBUTES)(CC_GetSessionAuditDigest* // 0x014D - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + HANDLE_2_USER - + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_NV_Read) - (COMMAND_ATTRIBUTES)(CC_NV_Read* // 0x014E - (IS_IMPLEMENTED + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_NV_ReadLock) - (COMMAND_ATTRIBUTES)(CC_NV_ReadLock* // 0x014F - (IS_IMPLEMENTED + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_ObjectChangeAuth) - (COMMAND_ATTRIBUTES)(CC_ObjectChangeAuth* // 0x0150 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_ADMIN + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_PolicySecret) - (COMMAND_ATTRIBUTES)(CC_PolicySecret* // 0x0151 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ALLOW_TRIAL - + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_Rewrap) - (COMMAND_ATTRIBUTES)(CC_Rewrap* // 0x0152 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_Create) - (COMMAND_ATTRIBUTES)(CC_Create* // 0x0153 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_ECDH_ZGen) - (COMMAND_ATTRIBUTES)(CC_ECDH_ZGen* // 0x0154 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || (CC_HMAC || CC_MAC)) - (COMMAND_ATTRIBUTES)((CC_HMAC || CC_MAC) * // 0x0155 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_Import) - (COMMAND_ATTRIBUTES)(CC_Import* // 0x0156 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_Load) - (COMMAND_ATTRIBUTES)(CC_Load* // 0x0157 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2 - + R_HANDLE)), -# endif -# if(PAD_LIST || CC_Quote) - (COMMAND_ATTRIBUTES)(CC_Quote* // 0x0158 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_RSA_Decrypt) - (COMMAND_ATTRIBUTES)(CC_RSA_Decrypt* // 0x0159 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST) - (COMMAND_ATTRIBUTES)(0), // 0x015A -# endif -# if(PAD_LIST || (CC_HMAC_Start || CC_MAC_Start)) - (COMMAND_ATTRIBUTES)((CC_HMAC_Start || CC_MAC_Start) * // 0x015B - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + R_HANDLE)), -# endif -# if(PAD_LIST || CC_SequenceUpdate) - (COMMAND_ATTRIBUTES)(CC_SequenceUpdate* // 0x015C - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_Sign) - (COMMAND_ATTRIBUTES)(CC_Sign* // 0x015D - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_Unseal) - (COMMAND_ATTRIBUTES)(CC_Unseal* // 0x015E - (IS_IMPLEMENTED + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST) - (COMMAND_ATTRIBUTES)(0), // 0x015F -# endif -# if(PAD_LIST || CC_PolicySigned) - (COMMAND_ATTRIBUTES)(CC_PolicySigned* // 0x0160 - (IS_IMPLEMENTED + DECRYPT_2 + ALLOW_TRIAL + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_ContextLoad) - (COMMAND_ATTRIBUTES)(CC_ContextLoad* // 0x0161 - (IS_IMPLEMENTED + NO_SESSIONS + R_HANDLE)), -# endif -# if(PAD_LIST || CC_ContextSave) - (COMMAND_ATTRIBUTES)(CC_ContextSave* // 0x0162 - (IS_IMPLEMENTED + NO_SESSIONS)), -# endif -# if(PAD_LIST || CC_ECDH_KeyGen) - (COMMAND_ATTRIBUTES)(CC_ECDH_KeyGen* // 0x0163 - (IS_IMPLEMENTED + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_EncryptDecrypt) - (COMMAND_ATTRIBUTES)(CC_EncryptDecrypt* // 0x0164 - (IS_IMPLEMENTED + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_FlushContext) - (COMMAND_ATTRIBUTES)(CC_FlushContext* // 0x0165 - (IS_IMPLEMENTED + NO_SESSIONS)), -# endif -# if(PAD_LIST) - (COMMAND_ATTRIBUTES)(0), // 0x0166 -# endif -# if(PAD_LIST || CC_LoadExternal) - (COMMAND_ATTRIBUTES)(CC_LoadExternal* // 0x0167 - (IS_IMPLEMENTED + DECRYPT_2 + ENCRYPT_2 + R_HANDLE)), -# endif -# if(PAD_LIST || CC_MakeCredential) - (COMMAND_ATTRIBUTES)(CC_MakeCredential* // 0x0168 - (IS_IMPLEMENTED + DECRYPT_2 + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_NV_ReadPublic) - (COMMAND_ATTRIBUTES)(CC_NV_ReadPublic* // 0x0169 - (IS_IMPLEMENTED + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_PolicyAuthorize) - (COMMAND_ATTRIBUTES)(CC_PolicyAuthorize* // 0x016A - (IS_IMPLEMENTED + DECRYPT_2 + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyAuthValue) - (COMMAND_ATTRIBUTES)(CC_PolicyAuthValue* // 0x016B - (IS_IMPLEMENTED + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyCommandCode) - (COMMAND_ATTRIBUTES)(CC_PolicyCommandCode* // 0x016C - (IS_IMPLEMENTED + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyCounterTimer) - (COMMAND_ATTRIBUTES)(CC_PolicyCounterTimer* // 0x016D - (IS_IMPLEMENTED + DECRYPT_2 + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyCpHash) - (COMMAND_ATTRIBUTES)(CC_PolicyCpHash* // 0x016E - (IS_IMPLEMENTED + DECRYPT_2 + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyLocality) - (COMMAND_ATTRIBUTES)(CC_PolicyLocality* // 0x016F - (IS_IMPLEMENTED + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyNameHash) - (COMMAND_ATTRIBUTES)(CC_PolicyNameHash* // 0x0170 - (IS_IMPLEMENTED + DECRYPT_2 + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyOR) - (COMMAND_ATTRIBUTES)(CC_PolicyOR* // 0x0171 - (IS_IMPLEMENTED + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyTicket) - (COMMAND_ATTRIBUTES)(CC_PolicyTicket* // 0x0172 - (IS_IMPLEMENTED + DECRYPT_2 + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_ReadPublic) - (COMMAND_ATTRIBUTES)(CC_ReadPublic* // 0x0173 - (IS_IMPLEMENTED + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_RSA_Encrypt) - (COMMAND_ATTRIBUTES)(CC_RSA_Encrypt* // 0x0174 - (IS_IMPLEMENTED + DECRYPT_2 + ENCRYPT_2)), -# endif -# if(PAD_LIST) - (COMMAND_ATTRIBUTES)(0), // 0x0175 -# endif -# if(PAD_LIST || CC_StartAuthSession) - (COMMAND_ATTRIBUTES)(CC_StartAuthSession* // 0x0176 - (IS_IMPLEMENTED + DECRYPT_2 + ENCRYPT_2 + R_HANDLE)), -# endif -# if(PAD_LIST || CC_VerifySignature) - (COMMAND_ATTRIBUTES)(CC_VerifySignature* // 0x0177 - (IS_IMPLEMENTED + DECRYPT_2)), -# endif -# if(PAD_LIST || CC_ECC_Parameters) - (COMMAND_ATTRIBUTES)(CC_ECC_Parameters* // 0x0178 - (IS_IMPLEMENTED)), -# endif -# if(PAD_LIST || CC_FirmwareRead) - (COMMAND_ATTRIBUTES)(CC_FirmwareRead* // 0x0179 - (IS_IMPLEMENTED + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_GetCapability) - (COMMAND_ATTRIBUTES)(CC_GetCapability* // 0x017A - (IS_IMPLEMENTED)), -# endif -# if(PAD_LIST || CC_GetRandom) - (COMMAND_ATTRIBUTES)(CC_GetRandom* // 0x017B - (IS_IMPLEMENTED + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_GetTestResult) - (COMMAND_ATTRIBUTES)(CC_GetTestResult* // 0x017C - (IS_IMPLEMENTED + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_Hash) - (COMMAND_ATTRIBUTES)(CC_Hash* // 0x017D - (IS_IMPLEMENTED + DECRYPT_2 + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_PCR_Read) - (COMMAND_ATTRIBUTES)(CC_PCR_Read* // 0x017E - (IS_IMPLEMENTED)), -# endif -# if(PAD_LIST || CC_PolicyPCR) - (COMMAND_ATTRIBUTES)(CC_PolicyPCR* // 0x017F - (IS_IMPLEMENTED + DECRYPT_2 + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyRestart) - (COMMAND_ATTRIBUTES)(CC_PolicyRestart* // 0x0180 - (IS_IMPLEMENTED + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_ReadClock) - (COMMAND_ATTRIBUTES)(CC_ReadClock* // 0x0181 - (IS_IMPLEMENTED)), -# endif -# if(PAD_LIST || CC_PCR_Extend) - (COMMAND_ATTRIBUTES)(CC_PCR_Extend* // 0x0182 - (IS_IMPLEMENTED + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_PCR_SetAuthValue) - (COMMAND_ATTRIBUTES)(CC_PCR_SetAuthValue* // 0x0183 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_NV_Certify) - (COMMAND_ATTRIBUTES)(CC_NV_Certify* // 0x0184 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + HANDLE_2_USER - + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_EventSequenceComplete) - (COMMAND_ATTRIBUTES)(CC_EventSequenceComplete* // 0x0185 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER - + HANDLE_2_USER)), -# endif -# if(PAD_LIST || CC_HashSequenceStart) - (COMMAND_ATTRIBUTES)(CC_HashSequenceStart* // 0x0186 - (IS_IMPLEMENTED + DECRYPT_2 + R_HANDLE)), -# endif -# if(PAD_LIST || CC_PolicyPhysicalPresence) - (COMMAND_ATTRIBUTES)(CC_PolicyPhysicalPresence* // 0x0187 - (IS_IMPLEMENTED + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyDuplicationSelect) - (COMMAND_ATTRIBUTES)(CC_PolicyDuplicationSelect* // 0x0188 - (IS_IMPLEMENTED + DECRYPT_2 + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyGetDigest) - (COMMAND_ATTRIBUTES)(CC_PolicyGetDigest* // 0x0189 - (IS_IMPLEMENTED + ALLOW_TRIAL + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_TestParms) - (COMMAND_ATTRIBUTES)(CC_TestParms* // 0x018A - (IS_IMPLEMENTED)), -# endif -# if(PAD_LIST || CC_Commit) - (COMMAND_ATTRIBUTES)(CC_Commit* // 0x018B - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_PolicyPassword) - (COMMAND_ATTRIBUTES)(CC_PolicyPassword* // 0x018C - (IS_IMPLEMENTED + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_ZGen_2Phase) - (COMMAND_ATTRIBUTES)(CC_ZGen_2Phase* // 0x018D - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_EC_Ephemeral) - (COMMAND_ATTRIBUTES)(CC_EC_Ephemeral* // 0x018E - (IS_IMPLEMENTED + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_PolicyNvWritten) - (COMMAND_ATTRIBUTES)(CC_PolicyNvWritten* // 0x018F - (IS_IMPLEMENTED + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_PolicyTemplate) - (COMMAND_ATTRIBUTES)(CC_PolicyTemplate* // 0x0190 - (IS_IMPLEMENTED + DECRYPT_2 + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_CreateLoaded) - (COMMAND_ATTRIBUTES)(CC_CreateLoaded* // 0x0191 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + PP_COMMAND - + ENCRYPT_2 + R_HANDLE)), -# endif -# if(PAD_LIST || CC_PolicyAuthorizeNV) - (COMMAND_ATTRIBUTES)(CC_PolicyAuthorizeNV* // 0x0192 - (IS_IMPLEMENTED + HANDLE_1_USER + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_EncryptDecrypt2) - (COMMAND_ATTRIBUTES)(CC_EncryptDecrypt2* // 0x0193 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_AC_GetCapability) - (COMMAND_ATTRIBUTES)(CC_AC_GetCapability* // 0x0194 - (IS_IMPLEMENTED)), -# endif -# if(PAD_LIST || CC_AC_Send) - (COMMAND_ATTRIBUTES)(CC_AC_Send* // 0x0195 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_DUP + HANDLE_2_USER)), -# endif -# if(PAD_LIST || CC_Policy_AC_SendSelect) - (COMMAND_ATTRIBUTES)(CC_Policy_AC_SendSelect* // 0x0196 - (IS_IMPLEMENTED + DECRYPT_2 + ALLOW_TRIAL)), -# endif -# if(PAD_LIST || CC_CertifyX509) - (COMMAND_ATTRIBUTES)(CC_CertifyX509* // 0x0197 - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_ADMIN + HANDLE_2_USER - + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_ACT_SetTimeout) - (COMMAND_ATTRIBUTES)(CC_ACT_SetTimeout* // 0x0198 - (IS_IMPLEMENTED + HANDLE_1_USER)), -# endif -# if(PAD_LIST || CC_ECC_Encrypt) - (COMMAND_ATTRIBUTES)(CC_ECC_Encrypt* // 0x0199 - (IS_IMPLEMENTED + DECRYPT_2 + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_ECC_Decrypt) - (COMMAND_ATTRIBUTES)(CC_ECC_Decrypt* // 0x019A - (IS_IMPLEMENTED + DECRYPT_2 + HANDLE_1_USER + ENCRYPT_2)), -# endif -# if(PAD_LIST || CC_Vendor_TCG_Test) - (COMMAND_ATTRIBUTES)(CC_Vendor_TCG_Test* // 0x0000 - (IS_IMPLEMENTED + DECRYPT_2 + ENCRYPT_2)), -# endif - 0}; - -#endif // _COMMAND_CODE_ATTRIBUTES_ diff --git a/TPMCmd/tpm/include/CommandAttributes.h b/TPMCmd/tpm/include/CommandAttributes.h deleted file mode 100644 index 40c2dbd4..00000000 --- a/TPMCmd/tpm/include/CommandAttributes.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Aug 30, 2019 Time: 02:11:52PM - */ - -// The attributes defined in this file are produced by the parser that -// creates the structure definitions from Part 3. The attributes are defined -// in that parser and should track the attributes being tested in -// CommandCodeAttributes.c. Generally, when an attribute is added to this list, -// new code will be needed in CommandCodeAttributes.c to test it. - -#ifndef COMMAND_ATTRIBUTES_H -#define COMMAND_ATTRIBUTES_H - -typedef UINT16 COMMAND_ATTRIBUTES; -#define NOT_IMPLEMENTED (COMMAND_ATTRIBUTES)(0) -#define ENCRYPT_2 ((COMMAND_ATTRIBUTES)1 << 0) -#define ENCRYPT_4 ((COMMAND_ATTRIBUTES)1 << 1) -#define DECRYPT_2 ((COMMAND_ATTRIBUTES)1 << 2) -#define DECRYPT_4 ((COMMAND_ATTRIBUTES)1 << 3) -#define HANDLE_1_USER ((COMMAND_ATTRIBUTES)1 << 4) -#define HANDLE_1_ADMIN ((COMMAND_ATTRIBUTES)1 << 5) -#define HANDLE_1_DUP ((COMMAND_ATTRIBUTES)1 << 6) -#define HANDLE_2_USER ((COMMAND_ATTRIBUTES)1 << 7) -#define PP_COMMAND ((COMMAND_ATTRIBUTES)1 << 8) -#define IS_IMPLEMENTED ((COMMAND_ATTRIBUTES)1 << 9) -#define NO_SESSIONS ((COMMAND_ATTRIBUTES)1 << 10) -#define NV_COMMAND ((COMMAND_ATTRIBUTES)1 << 11) -#define PP_REQUIRED ((COMMAND_ATTRIBUTES)1 << 12) -#define R_HANDLE ((COMMAND_ATTRIBUTES)1 << 13) -#define ALLOW_TRIAL ((COMMAND_ATTRIBUTES)1 << 14) - -#endif // COMMAND_ATTRIBUTES_H diff --git a/TPMCmd/tpm/include/CommandDispatchData.h b/TPMCmd/tpm/include/CommandDispatchData.h deleted file mode 100644 index f9b95c33..00000000 --- a/TPMCmd/tpm/include/CommandDispatchData.h +++ /dev/null @@ -1,5090 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 6, 2020 Time: 01:50:09PM - */ - -// This file should only be included by CommandCodeAttibutes.c -#ifdef _COMMAND_TABLE_DISPATCH_ - -// Define the stop value -# define END_OF_LIST 0xff -# define ADD_FLAG 0x80 - -// These macros provide some variability in how the data is encoded. They also make -// the lines a little shorter. ;-) -# if TABLE_DRIVEN_MARSHAL -# define UNMARSHAL_DISPATCH(name) (marshalIndex_t) name##_MARSHAL_REF -# define MARSHAL_DISPATCH(name) (marshalIndex_t) name##_MARSHAL_REF -# define _UNMARSHAL_T_ marshalIndex_t -# define _MARSHAL_T_ marshalIndex_t -# else -# define UNMARSHAL_DISPATCH(name) (UNMARSHAL_t) name##_Unmarshal -# define MARSHAL_DISPATCH(name) (MARSHAL_t) name##_Marshal -# define _UNMARSHAL_T_ UNMARSHAL_t -# define _MARSHAL_T_ MARSHAL_t -# endif - -// The unmarshalArray contains the dispatch functions for the unmarshaling code. -// The defines in this array are used to make it easier to cross reference the -// unmarshaling values in the types array of each command - -const _UNMARSHAL_T_ unmarshalArray[] = { -# define TPMI_DH_CONTEXT_H_UNMARSHAL 0 - UNMARSHAL_DISPATCH(TPMI_DH_CONTEXT), -# define TPMI_RH_AC_H_UNMARSHAL (TPMI_DH_CONTEXT_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_AC), -# define TPMI_RH_ACT_H_UNMARSHAL (TPMI_RH_AC_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_ACT), -# define TPMI_RH_CLEAR_H_UNMARSHAL (TPMI_RH_ACT_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_CLEAR), -# define TPMI_RH_HIERARCHY_AUTH_H_UNMARSHAL (TPMI_RH_CLEAR_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_HIERARCHY_AUTH), -# define TPMI_RH_HIERARCHY_POLICY_H_UNMARSHAL \ - (TPMI_RH_HIERARCHY_AUTH_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_HIERARCHY_POLICY), -# define TPMI_RH_LOCKOUT_H_UNMARSHAL (TPMI_RH_HIERARCHY_POLICY_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_LOCKOUT), -# define TPMI_RH_NV_AUTH_H_UNMARSHAL (TPMI_RH_LOCKOUT_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_NV_AUTH), -# define TPMI_RH_NV_INDEX_H_UNMARSHAL (TPMI_RH_NV_AUTH_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_NV_INDEX), -# define TPMI_RH_PLATFORM_H_UNMARSHAL (TPMI_RH_NV_INDEX_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_PLATFORM), -# define TPMI_RH_PROVISION_H_UNMARSHAL (TPMI_RH_PLATFORM_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_PROVISION), -# define TPMI_SH_HMAC_H_UNMARSHAL (TPMI_RH_PROVISION_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_SH_HMAC), -# define TPMI_SH_POLICY_H_UNMARSHAL (TPMI_SH_HMAC_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_SH_POLICY), -// HANDLE_FIRST_FLAG_TYPE is the first handle that needs a flag when called. -# define HANDLE_FIRST_FLAG_TYPE (TPMI_SH_POLICY_H_UNMARSHAL + 1) -# define TPMI_DH_ENTITY_H_UNMARSHAL (TPMI_SH_POLICY_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_DH_ENTITY), -# define TPMI_DH_OBJECT_H_UNMARSHAL (TPMI_DH_ENTITY_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_DH_OBJECT), -# define TPMI_DH_PARENT_H_UNMARSHAL (TPMI_DH_OBJECT_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_DH_PARENT), -# define TPMI_DH_PCR_H_UNMARSHAL (TPMI_DH_PARENT_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_DH_PCR), -# define TPMI_RH_ENDORSEMENT_H_UNMARSHAL (TPMI_DH_PCR_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_ENDORSEMENT), -# define TPMI_RH_HIERARCHY_H_UNMARSHAL (TPMI_RH_ENDORSEMENT_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_HIERARCHY), -// PARAMETER_FIRST_TYPE marks the end of the handle list. -# define PARAMETER_FIRST_TYPE (TPMI_RH_HIERARCHY_H_UNMARSHAL + 1) -# define TPM2B_DATA_P_UNMARSHAL (TPMI_RH_HIERARCHY_H_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_DATA), -# define TPM2B_DIGEST_P_UNMARSHAL (TPM2B_DATA_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_DIGEST), -# define TPM2B_ECC_PARAMETER_P_UNMARSHAL (TPM2B_DIGEST_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_ECC_PARAMETER), -# define TPM2B_ECC_POINT_P_UNMARSHAL (TPM2B_ECC_PARAMETER_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_ECC_POINT), -# define TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL (TPM2B_ECC_POINT_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_ENCRYPTED_SECRET), -# define TPM2B_EVENT_P_UNMARSHAL (TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_EVENT), -# define TPM2B_ID_OBJECT_P_UNMARSHAL (TPM2B_EVENT_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_ID_OBJECT), -# define TPM2B_IV_P_UNMARSHAL (TPM2B_ID_OBJECT_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_IV), -# define TPM2B_MAX_BUFFER_P_UNMARSHAL (TPM2B_IV_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_MAX_BUFFER), -# define TPM2B_MAX_NV_BUFFER_P_UNMARSHAL (TPM2B_MAX_BUFFER_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_MAX_NV_BUFFER), -# define TPM2B_NAME_P_UNMARSHAL (TPM2B_MAX_NV_BUFFER_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_NAME), -# define TPM2B_NV_PUBLIC_P_UNMARSHAL (TPM2B_NAME_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_NV_PUBLIC), -# define TPM2B_PRIVATE_P_UNMARSHAL (TPM2B_NV_PUBLIC_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_PRIVATE), -# define TPM2B_PUBLIC_KEY_RSA_P_UNMARSHAL (TPM2B_PRIVATE_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_PUBLIC_KEY_RSA), -# define TPM2B_SENSITIVE_P_UNMARSHAL (TPM2B_PUBLIC_KEY_RSA_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_SENSITIVE), -# define TPM2B_SENSITIVE_CREATE_P_UNMARSHAL (TPM2B_SENSITIVE_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_SENSITIVE_CREATE), -# define TPM2B_SENSITIVE_DATA_P_UNMARSHAL (TPM2B_SENSITIVE_CREATE_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_SENSITIVE_DATA), -# define TPM2B_TEMPLATE_P_UNMARSHAL (TPM2B_SENSITIVE_DATA_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_TEMPLATE), -# define TPM2B_TIMEOUT_P_UNMARSHAL (TPM2B_TEMPLATE_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_TIMEOUT), -# define TPMI_DH_CONTEXT_P_UNMARSHAL (TPM2B_TIMEOUT_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_DH_CONTEXT), -# define TPMI_DH_PERSISTENT_P_UNMARSHAL (TPMI_DH_CONTEXT_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_DH_PERSISTENT), -# define TPMI_ECC_CURVE_P_UNMARSHAL (TPMI_DH_PERSISTENT_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_ECC_CURVE), -# define TPMI_YES_NO_P_UNMARSHAL (TPMI_ECC_CURVE_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_YES_NO), -# define TPML_ALG_P_UNMARSHAL (TPMI_YES_NO_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPML_ALG), -# define TPML_CC_P_UNMARSHAL (TPML_ALG_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPML_CC), -# define TPML_DIGEST_P_UNMARSHAL (TPML_CC_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPML_DIGEST), -# define TPML_DIGEST_VALUES_P_UNMARSHAL (TPML_DIGEST_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPML_DIGEST_VALUES), -# define TPML_PCR_SELECTION_P_UNMARSHAL (TPML_DIGEST_VALUES_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPML_PCR_SELECTION), -# define TPMS_CONTEXT_P_UNMARSHAL (TPML_PCR_SELECTION_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMS_CONTEXT), -# define TPMT_PUBLIC_PARMS_P_UNMARSHAL (TPMS_CONTEXT_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_PUBLIC_PARMS), -# define TPMT_TK_AUTH_P_UNMARSHAL (TPMT_PUBLIC_PARMS_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_TK_AUTH), -# define TPMT_TK_CREATION_P_UNMARSHAL (TPMT_TK_AUTH_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_TK_CREATION), -# define TPMT_TK_HASHCHECK_P_UNMARSHAL (TPMT_TK_CREATION_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_TK_HASHCHECK), -# define TPMT_TK_VERIFIED_P_UNMARSHAL (TPMT_TK_HASHCHECK_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_TK_VERIFIED), -# define TPM_AT_P_UNMARSHAL (TPMT_TK_VERIFIED_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM_AT), -# define TPM_CAP_P_UNMARSHAL (TPM_AT_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM_CAP), -# define TPM_CLOCK_ADJUST_P_UNMARSHAL (TPM_CAP_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM_CLOCK_ADJUST), -# define TPM_EO_P_UNMARSHAL (TPM_CLOCK_ADJUST_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM_EO), -# define TPM_SE_P_UNMARSHAL (TPM_EO_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM_SE), -# define TPM_SU_P_UNMARSHAL (TPM_SE_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM_SU), -# define UINT16_P_UNMARSHAL (TPM_SU_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(UINT16), -# define UINT32_P_UNMARSHAL (UINT16_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(UINT32), -# define UINT64_P_UNMARSHAL (UINT32_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(UINT64), -# define UINT8_P_UNMARSHAL (UINT64_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(UINT8), -// PARAMETER_FIRST_FLAG_TYPE is the first parameter to need a flag. -# define PARAMETER_FIRST_FLAG_TYPE (UINT8_P_UNMARSHAL + 1) -# define TPM2B_PUBLIC_P_UNMARSHAL (UINT8_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPM2B_PUBLIC), -# define TPMI_ALG_CIPHER_MODE_P_UNMARSHAL (TPM2B_PUBLIC_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_ALG_CIPHER_MODE), -# define TPMI_ALG_HASH_P_UNMARSHAL (TPMI_ALG_CIPHER_MODE_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_ALG_HASH), -# define TPMI_ALG_MAC_SCHEME_P_UNMARSHAL (TPMI_ALG_HASH_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_ALG_MAC_SCHEME), -# define TPMI_DH_PCR_P_UNMARSHAL (TPMI_ALG_MAC_SCHEME_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_DH_PCR), -# define TPMI_ECC_KEY_EXCHANGE_P_UNMARSHAL (TPMI_DH_PCR_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_ECC_KEY_EXCHANGE), -# define TPMI_RH_ENABLES_P_UNMARSHAL (TPMI_ECC_KEY_EXCHANGE_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_ENABLES), -# define TPMI_RH_HIERARCHY_P_UNMARSHAL (TPMI_RH_ENABLES_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMI_RH_HIERARCHY), -# define TPMT_KDF_SCHEME_P_UNMARSHAL (TPMI_RH_HIERARCHY_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_KDF_SCHEME), -# define TPMT_RSA_DECRYPT_P_UNMARSHAL (TPMT_KDF_SCHEME_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_RSA_DECRYPT), -# define TPMT_SIGNATURE_P_UNMARSHAL (TPMT_RSA_DECRYPT_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_SIGNATURE), -# define TPMT_SIG_SCHEME_P_UNMARSHAL (TPMT_SIGNATURE_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_SIG_SCHEME), -# define TPMT_SYM_DEF_P_UNMARSHAL (TPMT_SIG_SCHEME_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_SYM_DEF), -# define TPMT_SYM_DEF_OBJECT_P_UNMARSHAL (TPMT_SYM_DEF_P_UNMARSHAL + 1) - UNMARSHAL_DISPATCH(TPMT_SYM_DEF_OBJECT) -// PARAMETER_LAST_TYPE is the end of the command parameter list. -# define PARAMETER_LAST_TYPE (TPMT_SYM_DEF_OBJECT_P_UNMARSHAL) -}; - -// The marshalArray contains the dispatch functions for the marshaling code. -// The defines in this array are used to make it easier to cross reference the -// marshaling values in the types array of each command -const _MARSHAL_T_ marshalArray[] = { - -# define UINT32_H_MARSHAL 0 - MARSHAL_DISPATCH(UINT32), -// RESPONSE_PARAMETER_FIRST_TYPE marks the end of the response handles. -# define RESPONSE_PARAMETER_FIRST_TYPE (UINT32_H_MARSHAL + 1) -# define TPM2B_ATTEST_P_MARSHAL (UINT32_H_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_ATTEST), -# define TPM2B_CREATION_DATA_P_MARSHAL (TPM2B_ATTEST_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_CREATION_DATA), -# define TPM2B_DATA_P_MARSHAL (TPM2B_CREATION_DATA_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_DATA), -# define TPM2B_DIGEST_P_MARSHAL (TPM2B_DATA_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_DIGEST), -# define TPM2B_ECC_POINT_P_MARSHAL (TPM2B_DIGEST_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_ECC_POINT), -# define TPM2B_ENCRYPTED_SECRET_P_MARSHAL (TPM2B_ECC_POINT_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_ENCRYPTED_SECRET), -# define TPM2B_ID_OBJECT_P_MARSHAL (TPM2B_ENCRYPTED_SECRET_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_ID_OBJECT), -# define TPM2B_IV_P_MARSHAL (TPM2B_ID_OBJECT_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_IV), -# define TPM2B_MAX_BUFFER_P_MARSHAL (TPM2B_IV_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_MAX_BUFFER), -# define TPM2B_MAX_NV_BUFFER_P_MARSHAL (TPM2B_MAX_BUFFER_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_MAX_NV_BUFFER), -# define TPM2B_NAME_P_MARSHAL (TPM2B_MAX_NV_BUFFER_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_NAME), -# define TPM2B_NV_PUBLIC_P_MARSHAL (TPM2B_NAME_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_NV_PUBLIC), -# define TPM2B_PRIVATE_P_MARSHAL (TPM2B_NV_PUBLIC_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_PRIVATE), -# define TPM2B_PUBLIC_P_MARSHAL (TPM2B_PRIVATE_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_PUBLIC), -# define TPM2B_PUBLIC_KEY_RSA_P_MARSHAL (TPM2B_PUBLIC_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_PUBLIC_KEY_RSA), -# define TPM2B_SENSITIVE_DATA_P_MARSHAL (TPM2B_PUBLIC_KEY_RSA_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_SENSITIVE_DATA), -# define TPM2B_TIMEOUT_P_MARSHAL (TPM2B_SENSITIVE_DATA_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPM2B_TIMEOUT), -# define UINT8_P_MARSHAL (TPM2B_TIMEOUT_P_MARSHAL + 1) - MARSHAL_DISPATCH(UINT8), -# define TPML_AC_CAPABILITIES_P_MARSHAL (UINT8_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPML_AC_CAPABILITIES), -# define TPML_ALG_P_MARSHAL (TPML_AC_CAPABILITIES_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPML_ALG), -# define TPML_DIGEST_P_MARSHAL (TPML_ALG_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPML_DIGEST), -# define TPML_DIGEST_VALUES_P_MARSHAL (TPML_DIGEST_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPML_DIGEST_VALUES), -# define TPML_PCR_SELECTION_P_MARSHAL (TPML_DIGEST_VALUES_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPML_PCR_SELECTION), -# define TPMS_AC_OUTPUT_P_MARSHAL (TPML_PCR_SELECTION_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMS_AC_OUTPUT), -# define TPMS_ALGORITHM_DETAIL_ECC_P_MARSHAL (TPMS_AC_OUTPUT_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMS_ALGORITHM_DETAIL_ECC), -# define TPMS_CAPABILITY_DATA_P_MARSHAL (TPMS_ALGORITHM_DETAIL_ECC_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMS_CAPABILITY_DATA), -# define TPMS_CONTEXT_P_MARSHAL (TPMS_CAPABILITY_DATA_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMS_CONTEXT), -# define TPMS_TIME_INFO_P_MARSHAL (TPMS_CONTEXT_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMS_TIME_INFO), -# define TPMT_HA_P_MARSHAL (TPMS_TIME_INFO_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMT_HA), -# define TPMT_SIGNATURE_P_MARSHAL (TPMT_HA_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMT_SIGNATURE), -# define TPMT_TK_AUTH_P_MARSHAL (TPMT_SIGNATURE_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMT_TK_AUTH), -# define TPMT_TK_CREATION_P_MARSHAL (TPMT_TK_AUTH_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMT_TK_CREATION), -# define TPMT_TK_HASHCHECK_P_MARSHAL (TPMT_TK_CREATION_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMT_TK_HASHCHECK), -# define TPMT_TK_VERIFIED_P_MARSHAL (TPMT_TK_HASHCHECK_P_MARSHAL + 1) - MARSHAL_DISPATCH(TPMT_TK_VERIFIED), -# define UINT32_P_MARSHAL (TPMT_TK_VERIFIED_P_MARSHAL + 1) - MARSHAL_DISPATCH(UINT32), -# define UINT16_P_MARSHAL (UINT32_P_MARSHAL + 1) - MARSHAL_DISPATCH(UINT16) -// RESPONSE_PARAMETER_LAST_TYPE is the end of the response parameter list. -# define RESPONSE_PARAMETER_LAST_TYPE (UINT16_P_MARSHAL) -}; - -// This list of aliases allows the types in the _COMMAND_DESCRIPTOR_T to match the -// types in the command/response templates of part 3. -# define INT32_P_UNMARSHAL UINT32_P_UNMARSHAL -# define TPM2B_AUTH_P_UNMARSHAL TPM2B_DIGEST_P_UNMARSHAL -# define TPM2B_NONCE_P_UNMARSHAL TPM2B_DIGEST_P_UNMARSHAL -# define TPM2B_OPERAND_P_UNMARSHAL TPM2B_DIGEST_P_UNMARSHAL -# define TPMA_LOCALITY_P_UNMARSHAL UINT8_P_UNMARSHAL -# define TPM_CC_P_UNMARSHAL UINT32_P_UNMARSHAL -# define TPMI_DH_CONTEXT_H_MARSHAL UINT32_H_MARSHAL -# define TPMI_DH_OBJECT_H_MARSHAL UINT32_H_MARSHAL -# define TPMI_SH_AUTH_SESSION_H_MARSHAL UINT32_H_MARSHAL -# define TPM_HANDLE_H_MARSHAL UINT32_H_MARSHAL -# define TPM2B_NONCE_P_MARSHAL TPM2B_DIGEST_P_MARSHAL -# define TPMI_YES_NO_P_MARSHAL UINT8_P_MARSHAL -# define TPM_RC_P_MARSHAL UINT32_P_MARSHAL - -# if CC_Startup - -# include "Startup_fp.h" - -typedef TPM_RC(Startup_Entry)(Startup_In* in); - -typedef const struct -{ - Startup_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} Startup_COMMAND_DESCRIPTOR_t; - -Startup_COMMAND_DESCRIPTOR_t _StartupData = { - /* entry */ &TPM2_Startup, - /* inSize */ (UINT16)(sizeof(Startup_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(Startup_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPM_SU_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _StartupDataAddress (&_StartupData) -# else -# define _StartupDataAddress 0 -# endif // CC_Startup - -# if CC_Shutdown - -# include "Shutdown_fp.h" - -typedef TPM_RC(Shutdown_Entry)(Shutdown_In* in); - -typedef const struct -{ - Shutdown_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} Shutdown_COMMAND_DESCRIPTOR_t; - -Shutdown_COMMAND_DESCRIPTOR_t _ShutdownData = { - /* entry */ &TPM2_Shutdown, - /* inSize */ (UINT16)(sizeof(Shutdown_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(Shutdown_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPM_SU_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _ShutdownDataAddress (&_ShutdownData) -# else -# define _ShutdownDataAddress 0 -# endif // CC_Shutdown - -# if CC_SelfTest - -# include "SelfTest_fp.h" - -typedef TPM_RC(SelfTest_Entry)(SelfTest_In* in); - -typedef const struct -{ - SelfTest_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} SelfTest_COMMAND_DESCRIPTOR_t; - -SelfTest_COMMAND_DESCRIPTOR_t _SelfTestData = { - /* entry */ &TPM2_SelfTest, - /* inSize */ (UINT16)(sizeof(SelfTest_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(SelfTest_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_YES_NO_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _SelfTestDataAddress (&_SelfTestData) -# else -# define _SelfTestDataAddress 0 -# endif // CC_SelfTest - -# if CC_IncrementalSelfTest - -# include "IncrementalSelfTest_fp.h" - -typedef TPM_RC(IncrementalSelfTest_Entry)(IncrementalSelfTest_In* in, - IncrementalSelfTest_Out* out); - -typedef const struct -{ - IncrementalSelfTest_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[4]; -} IncrementalSelfTest_COMMAND_DESCRIPTOR_t; - -IncrementalSelfTest_COMMAND_DESCRIPTOR_t _IncrementalSelfTestData = { - /* entry */ &TPM2_IncrementalSelfTest, - /* inSize */ (UINT16)(sizeof(IncrementalSelfTest_In)), - /* outSize */ (UINT16)(sizeof(IncrementalSelfTest_Out)), - /* offsetOfTypes */ offsetof(IncrementalSelfTest_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ - {TPML_ALG_P_UNMARSHAL, END_OF_LIST, TPML_ALG_P_MARSHAL, END_OF_LIST}}; - -# define _IncrementalSelfTestDataAddress (&_IncrementalSelfTestData) -# else -# define _IncrementalSelfTestDataAddress 0 -# endif // CC_IncrementalSelfTest - -# if CC_GetTestResult - -# include "GetTestResult_fp.h" - -typedef TPM_RC(GetTestResult_Entry)(GetTestResult_Out* out); - -typedef const struct -{ - GetTestResult_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} GetTestResult_COMMAND_DESCRIPTOR_t; - -GetTestResult_COMMAND_DESCRIPTOR_t _GetTestResultData = { - /* entry */ &TPM2_GetTestResult, - /* inSize */ 0, - /* outSize */ (UINT16)(sizeof(GetTestResult_Out)), - /* offsetOfTypes */ offsetof(GetTestResult_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(GetTestResult_Out, testResult))}, - /* types */ - {END_OF_LIST, TPM2B_MAX_BUFFER_P_MARSHAL, TPM_RC_P_MARSHAL, END_OF_LIST}}; - -# define _GetTestResultDataAddress (&_GetTestResultData) -# else -# define _GetTestResultDataAddress 0 -# endif // CC_GetTestResult - -# if CC_StartAuthSession - -# include "StartAuthSession_fp.h" - -typedef TPM_RC(StartAuthSession_Entry)(StartAuthSession_In* in, - StartAuthSession_Out* out); - -typedef const struct -{ - StartAuthSession_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[7]; - BYTE types[11]; -} StartAuthSession_COMMAND_DESCRIPTOR_t; - -StartAuthSession_COMMAND_DESCRIPTOR_t _StartAuthSessionData = { - /* entry */ &TPM2_StartAuthSession, - /* inSize */ (UINT16)(sizeof(StartAuthSession_In)), - /* outSize */ (UINT16)(sizeof(StartAuthSession_Out)), - /* offsetOfTypes */ offsetof(StartAuthSession_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(StartAuthSession_In, bind)), - (UINT16)(offsetof(StartAuthSession_In, nonceCaller)), - (UINT16)(offsetof(StartAuthSession_In, encryptedSalt)), - (UINT16)(offsetof(StartAuthSession_In, sessionType)), - (UINT16)(offsetof(StartAuthSession_In, symmetric)), - (UINT16)(offsetof(StartAuthSession_In, authHash)), - (UINT16)(offsetof(StartAuthSession_Out, nonceTPM))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPMI_DH_ENTITY_H_UNMARSHAL + ADD_FLAG, - TPM2B_NONCE_P_UNMARSHAL, - TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL, - TPM_SE_P_UNMARSHAL, - TPMT_SYM_DEF_P_UNMARSHAL + ADD_FLAG, - TPMI_ALG_HASH_P_UNMARSHAL, - END_OF_LIST, - TPMI_SH_AUTH_SESSION_H_MARSHAL, - TPM2B_NONCE_P_MARSHAL, - END_OF_LIST}}; - -# define _StartAuthSessionDataAddress (&_StartAuthSessionData) -# else -# define _StartAuthSessionDataAddress 0 -# endif // CC_StartAuthSession - -# if CC_PolicyRestart - -# include "PolicyRestart_fp.h" - -typedef TPM_RC(PolicyRestart_Entry)(PolicyRestart_In* in); - -typedef const struct -{ - PolicyRestart_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} PolicyRestart_COMMAND_DESCRIPTOR_t; - -PolicyRestart_COMMAND_DESCRIPTOR_t _PolicyRestartData = { - /* entry */ &TPM2_PolicyRestart, - /* inSize */ (UINT16)(sizeof(PolicyRestart_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyRestart_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PolicyRestartDataAddress (&_PolicyRestartData) -# else -# define _PolicyRestartDataAddress 0 -# endif // CC_PolicyRestart - -# if CC_Create - -# include "Create_fp.h" - -typedef TPM_RC(Create_Entry)(Create_In* in, Create_Out* out); - -typedef const struct -{ - Create_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[8]; - BYTE types[12]; -} Create_COMMAND_DESCRIPTOR_t; - -Create_COMMAND_DESCRIPTOR_t _CreateData = { - /* entry */ &TPM2_Create, - /* inSize */ (UINT16)(sizeof(Create_In)), - /* outSize */ (UINT16)(sizeof(Create_Out)), - /* offsetOfTypes */ offsetof(Create_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Create_In, inSensitive)), - (UINT16)(offsetof(Create_In, inPublic)), - (UINT16)(offsetof(Create_In, outsideInfo)), - (UINT16)(offsetof(Create_In, creationPCR)), - (UINT16)(offsetof(Create_Out, outPublic)), - (UINT16)(offsetof(Create_Out, creationData)), - (UINT16)(offsetof(Create_Out, creationHash)), - (UINT16)(offsetof(Create_Out, creationTicket))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_SENSITIVE_CREATE_P_UNMARSHAL, - TPM2B_PUBLIC_P_UNMARSHAL, - TPM2B_DATA_P_UNMARSHAL, - TPML_PCR_SELECTION_P_UNMARSHAL, - END_OF_LIST, - TPM2B_PRIVATE_P_MARSHAL, - TPM2B_PUBLIC_P_MARSHAL, - TPM2B_CREATION_DATA_P_MARSHAL, - TPM2B_DIGEST_P_MARSHAL, - TPMT_TK_CREATION_P_MARSHAL, - END_OF_LIST}}; - -# define _CreateDataAddress (&_CreateData) -# else -# define _CreateDataAddress 0 -# endif // CC_Create - -# if CC_Load - -# include "Load_fp.h" - -typedef TPM_RC(Load_Entry)(Load_In* in, Load_Out* out); - -typedef const struct -{ - Load_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} Load_COMMAND_DESCRIPTOR_t; - -Load_COMMAND_DESCRIPTOR_t _LoadData = { - /* entry */ &TPM2_Load, - /* inSize */ (UINT16)(sizeof(Load_In)), - /* outSize */ (UINT16)(sizeof(Load_Out)), - /* offsetOfTypes */ offsetof(Load_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Load_In, inPrivate)), - (UINT16)(offsetof(Load_In, inPublic)), - (UINT16)(offsetof(Load_Out, name))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_PRIVATE_P_UNMARSHAL, - TPM2B_PUBLIC_P_UNMARSHAL, - END_OF_LIST, - TPM_HANDLE_H_MARSHAL, - TPM2B_NAME_P_MARSHAL, - END_OF_LIST}}; - -# define _LoadDataAddress (&_LoadData) -# else -# define _LoadDataAddress 0 -# endif // CC_Load - -# if CC_LoadExternal - -# include "LoadExternal_fp.h" - -typedef TPM_RC(LoadExternal_Entry)(LoadExternal_In* in, LoadExternal_Out* out); - -typedef const struct -{ - LoadExternal_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} LoadExternal_COMMAND_DESCRIPTOR_t; - -LoadExternal_COMMAND_DESCRIPTOR_t _LoadExternalData = { - /* entry */ &TPM2_LoadExternal, - /* inSize */ (UINT16)(sizeof(LoadExternal_In)), - /* outSize */ (UINT16)(sizeof(LoadExternal_Out)), - /* offsetOfTypes */ offsetof(LoadExternal_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(LoadExternal_In, inPublic)), - (UINT16)(offsetof(LoadExternal_In, hierarchy)), - (UINT16)(offsetof(LoadExternal_Out, name))}, - /* types */ - {TPM2B_SENSITIVE_P_UNMARSHAL, - TPM2B_PUBLIC_P_UNMARSHAL + ADD_FLAG, - TPMI_RH_HIERARCHY_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM_HANDLE_H_MARSHAL, - TPM2B_NAME_P_MARSHAL, - END_OF_LIST}}; - -# define _LoadExternalDataAddress (&_LoadExternalData) -# else -# define _LoadExternalDataAddress 0 -# endif // CC_LoadExternal - -# if CC_ReadPublic - -# include "ReadPublic_fp.h" - -typedef TPM_RC(ReadPublic_Entry)(ReadPublic_In* in, ReadPublic_Out* out); - -typedef const struct -{ - ReadPublic_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[6]; -} ReadPublic_COMMAND_DESCRIPTOR_t; - -ReadPublic_COMMAND_DESCRIPTOR_t _ReadPublicData = { - /* entry */ &TPM2_ReadPublic, - /* inSize */ (UINT16)(sizeof(ReadPublic_In)), - /* outSize */ (UINT16)(sizeof(ReadPublic_Out)), - /* offsetOfTypes */ offsetof(ReadPublic_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(ReadPublic_Out, name)), - (UINT16)(offsetof(ReadPublic_Out, qualifiedName))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - END_OF_LIST, - TPM2B_PUBLIC_P_MARSHAL, - TPM2B_NAME_P_MARSHAL, - TPM2B_NAME_P_MARSHAL, - END_OF_LIST}}; - -# define _ReadPublicDataAddress (&_ReadPublicData) -# else -# define _ReadPublicDataAddress 0 -# endif // CC_ReadPublic - -# if CC_ActivateCredential - -# include "ActivateCredential_fp.h" - -typedef TPM_RC(ActivateCredential_Entry)(ActivateCredential_In* in, - ActivateCredential_Out* out); - -typedef const struct -{ - ActivateCredential_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} ActivateCredential_COMMAND_DESCRIPTOR_t; - -ActivateCredential_COMMAND_DESCRIPTOR_t _ActivateCredentialData = { - /* entry */ &TPM2_ActivateCredential, - /* inSize */ (UINT16)(sizeof(ActivateCredential_In)), - /* outSize */ (UINT16)(sizeof(ActivateCredential_Out)), - /* offsetOfTypes */ offsetof(ActivateCredential_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(ActivateCredential_In, keyHandle)), - (UINT16)(offsetof(ActivateCredential_In, credentialBlob)), - (UINT16)(offsetof(ActivateCredential_In, secret))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_ID_OBJECT_P_UNMARSHAL, - TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL, - END_OF_LIST, - TPM2B_DIGEST_P_MARSHAL, - END_OF_LIST}}; - -# define _ActivateCredentialDataAddress (&_ActivateCredentialData) -# else -# define _ActivateCredentialDataAddress 0 -# endif // CC_ActivateCredential - -# if CC_MakeCredential - -# include "MakeCredential_fp.h" - -typedef TPM_RC(MakeCredential_Entry)(MakeCredential_In* in, MakeCredential_Out* out); - -typedef const struct -{ - MakeCredential_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} MakeCredential_COMMAND_DESCRIPTOR_t; - -MakeCredential_COMMAND_DESCRIPTOR_t _MakeCredentialData = { - /* entry */ &TPM2_MakeCredential, - /* inSize */ (UINT16)(sizeof(MakeCredential_In)), - /* outSize */ (UINT16)(sizeof(MakeCredential_Out)), - /* offsetOfTypes */ offsetof(MakeCredential_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(MakeCredential_In, credential)), - (UINT16)(offsetof(MakeCredential_In, objectName)), - (UINT16)(offsetof(MakeCredential_Out, secret))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPM2B_NAME_P_UNMARSHAL, - END_OF_LIST, - TPM2B_ID_OBJECT_P_MARSHAL, - TPM2B_ENCRYPTED_SECRET_P_MARSHAL, - END_OF_LIST}}; - -# define _MakeCredentialDataAddress (&_MakeCredentialData) -# else -# define _MakeCredentialDataAddress 0 -# endif // CC_MakeCredential - -# if CC_Unseal - -# include "Unseal_fp.h" - -typedef TPM_RC(Unseal_Entry)(Unseal_In* in, Unseal_Out* out); - -typedef const struct -{ - Unseal_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[4]; -} Unseal_COMMAND_DESCRIPTOR_t; - -Unseal_COMMAND_DESCRIPTOR_t _UnsealData = { - /* entry */ &TPM2_Unseal, - /* inSize */ (UINT16)(sizeof(Unseal_In)), - /* outSize */ (UINT16)(sizeof(Unseal_Out)), - /* offsetOfTypes */ offsetof(Unseal_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - END_OF_LIST, - TPM2B_SENSITIVE_DATA_P_MARSHAL, - END_OF_LIST}}; - -# define _UnsealDataAddress (&_UnsealData) -# else -# define _UnsealDataAddress 0 -# endif // CC_Unseal - -# if CC_ObjectChangeAuth - -# include "ObjectChangeAuth_fp.h" - -typedef TPM_RC(ObjectChangeAuth_Entry)(ObjectChangeAuth_In* in, - ObjectChangeAuth_Out* out); - -typedef const struct -{ - ObjectChangeAuth_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[6]; -} ObjectChangeAuth_COMMAND_DESCRIPTOR_t; - -ObjectChangeAuth_COMMAND_DESCRIPTOR_t _ObjectChangeAuthData = { - /* entry */ &TPM2_ObjectChangeAuth, - /* inSize */ (UINT16)(sizeof(ObjectChangeAuth_In)), - /* outSize */ (UINT16)(sizeof(ObjectChangeAuth_Out)), - /* offsetOfTypes */ offsetof(ObjectChangeAuth_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(ObjectChangeAuth_In, parentHandle)), - (UINT16)(offsetof(ObjectChangeAuth_In, newAuth))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_AUTH_P_UNMARSHAL, - END_OF_LIST, - TPM2B_PRIVATE_P_MARSHAL, - END_OF_LIST}}; - -# define _ObjectChangeAuthDataAddress (&_ObjectChangeAuthData) -# else -# define _ObjectChangeAuthDataAddress 0 -# endif // CC_ObjectChangeAuth - -# if CC_CreateLoaded - -# include "CreateLoaded_fp.h" - -typedef TPM_RC(CreateLoaded_Entry)(CreateLoaded_In* in, CreateLoaded_Out* out); - -typedef const struct -{ - CreateLoaded_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[5]; - BYTE types[9]; -} CreateLoaded_COMMAND_DESCRIPTOR_t; - -CreateLoaded_COMMAND_DESCRIPTOR_t _CreateLoadedData = { - /* entry */ &TPM2_CreateLoaded, - /* inSize */ (UINT16)(sizeof(CreateLoaded_In)), - /* outSize */ (UINT16)(sizeof(CreateLoaded_Out)), - /* offsetOfTypes */ offsetof(CreateLoaded_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(CreateLoaded_In, inSensitive)), - (UINT16)(offsetof(CreateLoaded_In, inPublic)), - (UINT16)(offsetof(CreateLoaded_Out, outPrivate)), - (UINT16)(offsetof(CreateLoaded_Out, outPublic)), - (UINT16)(offsetof(CreateLoaded_Out, name))}, - /* types */ - {TPMI_DH_PARENT_H_UNMARSHAL + ADD_FLAG, - TPM2B_SENSITIVE_CREATE_P_UNMARSHAL, - TPM2B_TEMPLATE_P_UNMARSHAL, - END_OF_LIST, - TPM_HANDLE_H_MARSHAL, - TPM2B_PRIVATE_P_MARSHAL, - TPM2B_PUBLIC_P_MARSHAL, - TPM2B_NAME_P_MARSHAL, - END_OF_LIST}}; - -# define _CreateLoadedDataAddress (&_CreateLoadedData) -# else -# define _CreateLoadedDataAddress 0 -# endif // CC_CreateLoaded - -# if CC_Duplicate - -# include "Duplicate_fp.h" - -typedef TPM_RC(Duplicate_Entry)(Duplicate_In* in, Duplicate_Out* out); - -typedef const struct -{ - Duplicate_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[5]; - BYTE types[9]; -} Duplicate_COMMAND_DESCRIPTOR_t; - -Duplicate_COMMAND_DESCRIPTOR_t _DuplicateData = { - /* entry */ &TPM2_Duplicate, - /* inSize */ (UINT16)(sizeof(Duplicate_In)), - /* outSize */ (UINT16)(sizeof(Duplicate_Out)), - /* offsetOfTypes */ offsetof(Duplicate_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Duplicate_In, newParentHandle)), - (UINT16)(offsetof(Duplicate_In, encryptionKeyIn)), - (UINT16)(offsetof(Duplicate_In, symmetricAlg)), - (UINT16)(offsetof(Duplicate_Out, duplicate)), - (UINT16)(offsetof(Duplicate_Out, outSymSeed))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPM2B_DATA_P_UNMARSHAL, - TPMT_SYM_DEF_OBJECT_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_DATA_P_MARSHAL, - TPM2B_PRIVATE_P_MARSHAL, - TPM2B_ENCRYPTED_SECRET_P_MARSHAL, - END_OF_LIST}}; - -# define _DuplicateDataAddress (&_DuplicateData) -# else -# define _DuplicateDataAddress 0 -# endif // CC_Duplicate - -# if CC_Rewrap - -# include "Rewrap_fp.h" - -typedef TPM_RC(Rewrap_Entry)(Rewrap_In* in, Rewrap_Out* out); - -typedef const struct -{ - Rewrap_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[5]; - BYTE types[9]; -} Rewrap_COMMAND_DESCRIPTOR_t; - -Rewrap_COMMAND_DESCRIPTOR_t _RewrapData = { - /* entry */ &TPM2_Rewrap, - /* inSize */ (UINT16)(sizeof(Rewrap_In)), - /* outSize */ (UINT16)(sizeof(Rewrap_Out)), - /* offsetOfTypes */ offsetof(Rewrap_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Rewrap_In, newParent)), - (UINT16)(offsetof(Rewrap_In, inDuplicate)), - (UINT16)(offsetof(Rewrap_In, name)), - (UINT16)(offsetof(Rewrap_In, inSymSeed)), - (UINT16)(offsetof(Rewrap_Out, outSymSeed))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPM2B_PRIVATE_P_UNMARSHAL, - TPM2B_NAME_P_UNMARSHAL, - TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL, - END_OF_LIST, - TPM2B_PRIVATE_P_MARSHAL, - TPM2B_ENCRYPTED_SECRET_P_MARSHAL, - END_OF_LIST}}; - -# define _RewrapDataAddress (&_RewrapData) -# else -# define _RewrapDataAddress 0 -# endif // CC_Rewrap - -# if CC_Import - -# include "Import_fp.h" - -typedef TPM_RC(Import_Entry)(Import_In* in, Import_Out* out); - -typedef const struct -{ - Import_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[5]; - BYTE types[9]; -} Import_COMMAND_DESCRIPTOR_t; - -Import_COMMAND_DESCRIPTOR_t _ImportData = { - /* entry */ &TPM2_Import, - /* inSize */ (UINT16)(sizeof(Import_In)), - /* outSize */ (UINT16)(sizeof(Import_Out)), - /* offsetOfTypes */ offsetof(Import_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Import_In, encryptionKey)), - (UINT16)(offsetof(Import_In, objectPublic)), - (UINT16)(offsetof(Import_In, duplicate)), - (UINT16)(offsetof(Import_In, inSymSeed)), - (UINT16)(offsetof(Import_In, symmetricAlg))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_DATA_P_UNMARSHAL, - TPM2B_PUBLIC_P_UNMARSHAL, - TPM2B_PRIVATE_P_UNMARSHAL, - TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL, - TPMT_SYM_DEF_OBJECT_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_PRIVATE_P_MARSHAL, - END_OF_LIST}}; - -# define _ImportDataAddress (&_ImportData) -# else -# define _ImportDataAddress 0 -# endif // CC_Import - -# if CC_RSA_Encrypt - -# include "RSA_Encrypt_fp.h" - -typedef TPM_RC(RSA_Encrypt_Entry)(RSA_Encrypt_In* in, RSA_Encrypt_Out* out); - -typedef const struct -{ - RSA_Encrypt_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} RSA_Encrypt_COMMAND_DESCRIPTOR_t; - -RSA_Encrypt_COMMAND_DESCRIPTOR_t _RSA_EncryptData = { - /* entry */ &TPM2_RSA_Encrypt, - /* inSize */ (UINT16)(sizeof(RSA_Encrypt_In)), - /* outSize */ (UINT16)(sizeof(RSA_Encrypt_Out)), - /* offsetOfTypes */ offsetof(RSA_Encrypt_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(RSA_Encrypt_In, message)), - (UINT16)(offsetof(RSA_Encrypt_In, inScheme)), - (UINT16)(offsetof(RSA_Encrypt_In, label))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_PUBLIC_KEY_RSA_P_UNMARSHAL, - TPMT_RSA_DECRYPT_P_UNMARSHAL + ADD_FLAG, - TPM2B_DATA_P_UNMARSHAL, - END_OF_LIST, - TPM2B_PUBLIC_KEY_RSA_P_MARSHAL, - END_OF_LIST}}; - -# define _RSA_EncryptDataAddress (&_RSA_EncryptData) -# else -# define _RSA_EncryptDataAddress 0 -# endif // CC_RSA_Encrypt - -# if CC_RSA_Decrypt - -# include "RSA_Decrypt_fp.h" - -typedef TPM_RC(RSA_Decrypt_Entry)(RSA_Decrypt_In* in, RSA_Decrypt_Out* out); - -typedef const struct -{ - RSA_Decrypt_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} RSA_Decrypt_COMMAND_DESCRIPTOR_t; - -RSA_Decrypt_COMMAND_DESCRIPTOR_t _RSA_DecryptData = { - /* entry */ &TPM2_RSA_Decrypt, - /* inSize */ (UINT16)(sizeof(RSA_Decrypt_In)), - /* outSize */ (UINT16)(sizeof(RSA_Decrypt_Out)), - /* offsetOfTypes */ offsetof(RSA_Decrypt_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(RSA_Decrypt_In, cipherText)), - (UINT16)(offsetof(RSA_Decrypt_In, inScheme)), - (UINT16)(offsetof(RSA_Decrypt_In, label))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_PUBLIC_KEY_RSA_P_UNMARSHAL, - TPMT_RSA_DECRYPT_P_UNMARSHAL + ADD_FLAG, - TPM2B_DATA_P_UNMARSHAL, - END_OF_LIST, - TPM2B_PUBLIC_KEY_RSA_P_MARSHAL, - END_OF_LIST}}; - -# define _RSA_DecryptDataAddress (&_RSA_DecryptData) -# else -# define _RSA_DecryptDataAddress 0 -# endif // CC_RSA_Decrypt - -# if CC_ECDH_KeyGen - -# include "ECDH_KeyGen_fp.h" - -typedef TPM_RC(ECDH_KeyGen_Entry)(ECDH_KeyGen_In* in, ECDH_KeyGen_Out* out); - -typedef const struct -{ - ECDH_KeyGen_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[5]; -} ECDH_KeyGen_COMMAND_DESCRIPTOR_t; - -ECDH_KeyGen_COMMAND_DESCRIPTOR_t _ECDH_KeyGenData = { - /* entry */ &TPM2_ECDH_KeyGen, - /* inSize */ (UINT16)(sizeof(ECDH_KeyGen_In)), - /* outSize */ (UINT16)(sizeof(ECDH_KeyGen_Out)), - /* offsetOfTypes */ offsetof(ECDH_KeyGen_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(ECDH_KeyGen_Out, pubPoint))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - END_OF_LIST, - TPM2B_ECC_POINT_P_MARSHAL, - TPM2B_ECC_POINT_P_MARSHAL, - END_OF_LIST}}; - -# define _ECDH_KeyGenDataAddress (&_ECDH_KeyGenData) -# else -# define _ECDH_KeyGenDataAddress 0 -# endif // CC_ECDH_KeyGen - -# if CC_ECDH_ZGen - -# include "ECDH_ZGen_fp.h" - -typedef TPM_RC(ECDH_ZGen_Entry)(ECDH_ZGen_In* in, ECDH_ZGen_Out* out); - -typedef const struct -{ - ECDH_ZGen_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[5]; -} ECDH_ZGen_COMMAND_DESCRIPTOR_t; - -ECDH_ZGen_COMMAND_DESCRIPTOR_t _ECDH_ZGenData = { - /* entry */ &TPM2_ECDH_ZGen, - /* inSize */ (UINT16)(sizeof(ECDH_ZGen_In)), - /* outSize */ (UINT16)(sizeof(ECDH_ZGen_Out)), - /* offsetOfTypes */ offsetof(ECDH_ZGen_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(ECDH_ZGen_In, inPoint))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_ECC_POINT_P_UNMARSHAL, - END_OF_LIST, - TPM2B_ECC_POINT_P_MARSHAL, - END_OF_LIST}}; - -# define _ECDH_ZGenDataAddress (&_ECDH_ZGenData) -# else -# define _ECDH_ZGenDataAddress 0 -# endif // CC_ECDH_ZGen - -# if CC_ECC_Parameters - -# include "ECC_Parameters_fp.h" - -typedef TPM_RC(ECC_Parameters_Entry)(ECC_Parameters_In* in, ECC_Parameters_Out* out); - -typedef const struct -{ - ECC_Parameters_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[4]; -} ECC_Parameters_COMMAND_DESCRIPTOR_t; - -ECC_Parameters_COMMAND_DESCRIPTOR_t _ECC_ParametersData = { - /* entry */ &TPM2_ECC_Parameters, - /* inSize */ (UINT16)(sizeof(ECC_Parameters_In)), - /* outSize */ (UINT16)(sizeof(ECC_Parameters_Out)), - /* offsetOfTypes */ offsetof(ECC_Parameters_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ - {TPMI_ECC_CURVE_P_UNMARSHAL, - END_OF_LIST, - TPMS_ALGORITHM_DETAIL_ECC_P_MARSHAL, - END_OF_LIST}}; - -# define _ECC_ParametersDataAddress (&_ECC_ParametersData) -# else -# define _ECC_ParametersDataAddress 0 -# endif // CC_ECC_Parameters - -# if CC_ZGen_2Phase - -# include "ZGen_2Phase_fp.h" - -typedef TPM_RC(ZGen_2Phase_Entry)(ZGen_2Phase_In* in, ZGen_2Phase_Out* out); - -typedef const struct -{ - ZGen_2Phase_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[5]; - BYTE types[9]; -} ZGen_2Phase_COMMAND_DESCRIPTOR_t; - -ZGen_2Phase_COMMAND_DESCRIPTOR_t _ZGen_2PhaseData = { - /* entry */ &TPM2_ZGen_2Phase, - /* inSize */ (UINT16)(sizeof(ZGen_2Phase_In)), - /* outSize */ (UINT16)(sizeof(ZGen_2Phase_Out)), - /* offsetOfTypes */ offsetof(ZGen_2Phase_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(ZGen_2Phase_In, inQsB)), - (UINT16)(offsetof(ZGen_2Phase_In, inQeB)), - (UINT16)(offsetof(ZGen_2Phase_In, inScheme)), - (UINT16)(offsetof(ZGen_2Phase_In, counter)), - (UINT16)(offsetof(ZGen_2Phase_Out, outZ2))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_ECC_POINT_P_UNMARSHAL, - TPM2B_ECC_POINT_P_UNMARSHAL, - TPMI_ECC_KEY_EXCHANGE_P_UNMARSHAL, - UINT16_P_UNMARSHAL, - END_OF_LIST, - TPM2B_ECC_POINT_P_MARSHAL, - TPM2B_ECC_POINT_P_MARSHAL, - END_OF_LIST}}; - -# define _ZGen_2PhaseDataAddress (&_ZGen_2PhaseData) -# else -# define _ZGen_2PhaseDataAddress 0 -# endif // CC_ZGen_2Phase - -# if CC_ECC_Encrypt - -# include "ECC_Encrypt_fp.h" - -typedef TPM_RC(ECC_Encrypt_Entry)(ECC_Encrypt_In* in, ECC_Encrypt_Out* out); - -typedef const struct -{ - ECC_Encrypt_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[4]; - BYTE types[8]; -} ECC_Encrypt_COMMAND_DESCRIPTOR_t; - -ECC_Encrypt_COMMAND_DESCRIPTOR_t _ECC_EncryptData = { - /* entry */ &TPM2_ECC_Encrypt, - /* inSize */ (UINT16)(sizeof(ECC_Encrypt_In)), - /* outSize */ (UINT16)(sizeof(ECC_Encrypt_Out)), - /* offsetOfTypes */ offsetof(ECC_Encrypt_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(ECC_Encrypt_In, plainText)), - (UINT16)(offsetof(ECC_Encrypt_In, inScheme)), - (UINT16)(offsetof(ECC_Encrypt_Out, C2)), - (UINT16)(offsetof(ECC_Encrypt_Out, C3))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - TPMT_KDF_SCHEME_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_ECC_POINT_P_MARSHAL, - TPM2B_MAX_BUFFER_P_MARSHAL, - TPM2B_DIGEST_P_MARSHAL, - END_OF_LIST}}; - -# define _ECC_EncryptDataAddress (&_ECC_EncryptData) -# else -# define _ECC_EncryptDataAddress 0 -# endif // CC_ECC_Encrypt - -# if CC_ECC_Decrypt - -# include "ECC_Decrypt_fp.h" - -typedef TPM_RC(ECC_Decrypt_Entry)(ECC_Decrypt_In* in, ECC_Decrypt_Out* out); - -typedef const struct -{ - ECC_Decrypt_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[4]; - BYTE types[8]; -} ECC_Decrypt_COMMAND_DESCRIPTOR_t; - -ECC_Decrypt_COMMAND_DESCRIPTOR_t _ECC_DecryptData = { - /* entry */ &TPM2_ECC_Decrypt, - /* inSize */ (UINT16)(sizeof(ECC_Decrypt_In)), - /* outSize */ (UINT16)(sizeof(ECC_Decrypt_Out)), - /* offsetOfTypes */ offsetof(ECC_Decrypt_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(ECC_Decrypt_In, C1)), - (UINT16)(offsetof(ECC_Decrypt_In, C2)), - (UINT16)(offsetof(ECC_Decrypt_In, C3)), - (UINT16)(offsetof(ECC_Decrypt_In, inScheme))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_ECC_POINT_P_UNMARSHAL, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPMT_KDF_SCHEME_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_MAX_BUFFER_P_MARSHAL, - END_OF_LIST}}; - -# define _ECC_DecryptDataAddress (&_ECC_DecryptData) -# else -# define _ECC_DecryptDataAddress 0 -# endif // CC_ECC_Decrypt - -# if CC_EncryptDecrypt - -# include "EncryptDecrypt_fp.h" - -typedef TPM_RC(EncryptDecrypt_Entry)(EncryptDecrypt_In* in, EncryptDecrypt_Out* out); - -typedef const struct -{ - EncryptDecrypt_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[5]; - BYTE types[9]; -} EncryptDecrypt_COMMAND_DESCRIPTOR_t; - -EncryptDecrypt_COMMAND_DESCRIPTOR_t _EncryptDecryptData = { - /* entry */ &TPM2_EncryptDecrypt, - /* inSize */ (UINT16)(sizeof(EncryptDecrypt_In)), - /* outSize */ (UINT16)(sizeof(EncryptDecrypt_Out)), - /* offsetOfTypes */ offsetof(EncryptDecrypt_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(EncryptDecrypt_In, decrypt)), - (UINT16)(offsetof(EncryptDecrypt_In, mode)), - (UINT16)(offsetof(EncryptDecrypt_In, ivIn)), - (UINT16)(offsetof(EncryptDecrypt_In, inData)), - (UINT16)(offsetof(EncryptDecrypt_Out, ivOut))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPMI_YES_NO_P_UNMARSHAL, - TPMI_ALG_CIPHER_MODE_P_UNMARSHAL + ADD_FLAG, - TPM2B_IV_P_UNMARSHAL, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - END_OF_LIST, - TPM2B_MAX_BUFFER_P_MARSHAL, - TPM2B_IV_P_MARSHAL, - END_OF_LIST}}; - -# define _EncryptDecryptDataAddress (&_EncryptDecryptData) -# else -# define _EncryptDecryptDataAddress 0 -# endif // CC_EncryptDecrypt - -# if CC_EncryptDecrypt2 - -# include "EncryptDecrypt2_fp.h" - -typedef TPM_RC(EncryptDecrypt2_Entry)(EncryptDecrypt2_In* in, - EncryptDecrypt2_Out* out); - -typedef const struct -{ - EncryptDecrypt2_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[5]; - BYTE types[9]; -} EncryptDecrypt2_COMMAND_DESCRIPTOR_t; - -EncryptDecrypt2_COMMAND_DESCRIPTOR_t _EncryptDecrypt2Data = { - /* entry */ &TPM2_EncryptDecrypt2, - /* inSize */ (UINT16)(sizeof(EncryptDecrypt2_In)), - /* outSize */ (UINT16)(sizeof(EncryptDecrypt2_Out)), - /* offsetOfTypes */ offsetof(EncryptDecrypt2_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(EncryptDecrypt2_In, inData)), - (UINT16)(offsetof(EncryptDecrypt2_In, decrypt)), - (UINT16)(offsetof(EncryptDecrypt2_In, mode)), - (UINT16)(offsetof(EncryptDecrypt2_In, ivIn)), - (UINT16)(offsetof(EncryptDecrypt2_Out, ivOut))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - TPMI_YES_NO_P_UNMARSHAL, - TPMI_ALG_CIPHER_MODE_P_UNMARSHAL + ADD_FLAG, - TPM2B_IV_P_UNMARSHAL, - END_OF_LIST, - TPM2B_MAX_BUFFER_P_MARSHAL, - TPM2B_IV_P_MARSHAL, - END_OF_LIST}}; - -# define _EncryptDecrypt2DataAddress (&_EncryptDecrypt2Data) -# else -# define _EncryptDecrypt2DataAddress 0 -# endif // CC_EncryptDecrypt2 - -# if CC_Hash - -# include "Hash_fp.h" - -typedef TPM_RC(Hash_Entry)(Hash_In* in, Hash_Out* out); - -typedef const struct -{ - Hash_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} Hash_COMMAND_DESCRIPTOR_t; - -Hash_COMMAND_DESCRIPTOR_t _HashData = { - /* entry */ &TPM2_Hash, - /* inSize */ (UINT16)(sizeof(Hash_In)), - /* outSize */ (UINT16)(sizeof(Hash_Out)), - /* offsetOfTypes */ offsetof(Hash_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Hash_In, hashAlg)), - (UINT16)(offsetof(Hash_In, hierarchy)), - (UINT16)(offsetof(Hash_Out, validation))}, - /* types */ - {TPM2B_MAX_BUFFER_P_UNMARSHAL, - TPMI_ALG_HASH_P_UNMARSHAL, - TPMI_RH_HIERARCHY_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_DIGEST_P_MARSHAL, - TPMT_TK_HASHCHECK_P_MARSHAL, - END_OF_LIST}}; - -# define _HashDataAddress (&_HashData) -# else -# define _HashDataAddress 0 -# endif // CC_Hash - -# if CC_HMAC - -# include "HMAC_fp.h" - -typedef TPM_RC(HMAC_Entry)(HMAC_In* in, HMAC_Out* out); - -typedef const struct -{ - HMAC_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[6]; -} HMAC_COMMAND_DESCRIPTOR_t; - -HMAC_COMMAND_DESCRIPTOR_t _HMACData = { - /* entry */ &TPM2_HMAC, - /* inSize */ (UINT16)(sizeof(HMAC_In)), - /* outSize */ (UINT16)(sizeof(HMAC_Out)), - /* offsetOfTypes */ offsetof(HMAC_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(HMAC_In, buffer)), (UINT16)(offsetof(HMAC_In, hashAlg))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_DIGEST_P_MARSHAL, - END_OF_LIST}}; - -# define _HMACDataAddress (&_HMACData) -# else -# define _HMACDataAddress 0 -# endif // CC_HMAC - -# if CC_MAC - -# include "MAC_fp.h" - -typedef TPM_RC(MAC_Entry)(MAC_In* in, MAC_Out* out); - -typedef const struct -{ - MAC_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[6]; -} MAC_COMMAND_DESCRIPTOR_t; - -MAC_COMMAND_DESCRIPTOR_t _MACData = { - /* entry */ &TPM2_MAC, - /* inSize */ (UINT16)(sizeof(MAC_In)), - /* outSize */ (UINT16)(sizeof(MAC_Out)), - /* offsetOfTypes */ offsetof(MAC_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(MAC_In, buffer)), (UINT16)(offsetof(MAC_In, inScheme))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - TPMI_ALG_MAC_SCHEME_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_DIGEST_P_MARSHAL, - END_OF_LIST}}; - -# define _MACDataAddress (&_MACData) -# else -# define _MACDataAddress 0 -# endif // CC_MAC - -# if CC_GetRandom - -# include "GetRandom_fp.h" - -typedef TPM_RC(GetRandom_Entry)(GetRandom_In* in, GetRandom_Out* out); - -typedef const struct -{ - GetRandom_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[4]; -} GetRandom_COMMAND_DESCRIPTOR_t; - -GetRandom_COMMAND_DESCRIPTOR_t _GetRandomData = { - /* entry */ &TPM2_GetRandom, - /* inSize */ (UINT16)(sizeof(GetRandom_In)), - /* outSize */ (UINT16)(sizeof(GetRandom_Out)), - /* offsetOfTypes */ offsetof(GetRandom_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ - {UINT16_P_UNMARSHAL, END_OF_LIST, TPM2B_DIGEST_P_MARSHAL, END_OF_LIST}}; - -# define _GetRandomDataAddress (&_GetRandomData) -# else -# define _GetRandomDataAddress 0 -# endif // CC_GetRandom - -# if CC_StirRandom - -# include "StirRandom_fp.h" - -typedef TPM_RC(StirRandom_Entry)(StirRandom_In* in); - -typedef const struct -{ - StirRandom_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} StirRandom_COMMAND_DESCRIPTOR_t; - -StirRandom_COMMAND_DESCRIPTOR_t _StirRandomData = { - /* entry */ &TPM2_StirRandom, - /* inSize */ (UINT16)(sizeof(StirRandom_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(StirRandom_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPM2B_SENSITIVE_DATA_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _StirRandomDataAddress (&_StirRandomData) -# else -# define _StirRandomDataAddress 0 -# endif // CC_StirRandom - -# if CC_HMAC_Start - -# include "HMAC_Start_fp.h" - -typedef TPM_RC(HMAC_Start_Entry)(HMAC_Start_In* in, HMAC_Start_Out* out); - -typedef const struct -{ - HMAC_Start_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[6]; -} HMAC_Start_COMMAND_DESCRIPTOR_t; - -HMAC_Start_COMMAND_DESCRIPTOR_t _HMAC_StartData = { - /* entry */ &TPM2_HMAC_Start, - /* inSize */ (UINT16)(sizeof(HMAC_Start_In)), - /* outSize */ (UINT16)(sizeof(HMAC_Start_Out)), - /* offsetOfTypes */ offsetof(HMAC_Start_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(HMAC_Start_In, auth)), - (UINT16)(offsetof(HMAC_Start_In, hashAlg))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_AUTH_P_UNMARSHAL, - TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPMI_DH_OBJECT_H_MARSHAL, - END_OF_LIST}}; - -# define _HMAC_StartDataAddress (&_HMAC_StartData) -# else -# define _HMAC_StartDataAddress 0 -# endif // CC_HMAC_Start - -# if CC_MAC_Start - -# include "MAC_Start_fp.h" - -typedef TPM_RC(MAC_Start_Entry)(MAC_Start_In* in, MAC_Start_Out* out); - -typedef const struct -{ - MAC_Start_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[6]; -} MAC_Start_COMMAND_DESCRIPTOR_t; - -MAC_Start_COMMAND_DESCRIPTOR_t _MAC_StartData = { - /* entry */ &TPM2_MAC_Start, - /* inSize */ (UINT16)(sizeof(MAC_Start_In)), - /* outSize */ (UINT16)(sizeof(MAC_Start_Out)), - /* offsetOfTypes */ offsetof(MAC_Start_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(MAC_Start_In, auth)), - (UINT16)(offsetof(MAC_Start_In, inScheme))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_AUTH_P_UNMARSHAL, - TPMI_ALG_MAC_SCHEME_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPMI_DH_OBJECT_H_MARSHAL, - END_OF_LIST}}; - -# define _MAC_StartDataAddress (&_MAC_StartData) -# else -# define _MAC_StartDataAddress 0 -# endif // CC_MAC_Start - -# if CC_HashSequenceStart - -# include "HashSequenceStart_fp.h" - -typedef TPM_RC(HashSequenceStart_Entry)(HashSequenceStart_In* in, - HashSequenceStart_Out* out); - -typedef const struct -{ - HashSequenceStart_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[5]; -} HashSequenceStart_COMMAND_DESCRIPTOR_t; - -HashSequenceStart_COMMAND_DESCRIPTOR_t _HashSequenceStartData = { - /* entry */ &TPM2_HashSequenceStart, - /* inSize */ (UINT16)(sizeof(HashSequenceStart_In)), - /* outSize */ (UINT16)(sizeof(HashSequenceStart_Out)), - /* offsetOfTypes */ offsetof(HashSequenceStart_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(HashSequenceStart_In, hashAlg))}, - /* types */ - {TPM2B_AUTH_P_UNMARSHAL, - TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPMI_DH_OBJECT_H_MARSHAL, - END_OF_LIST}}; - -# define _HashSequenceStartDataAddress (&_HashSequenceStartData) -# else -# define _HashSequenceStartDataAddress 0 -# endif // CC_HashSequenceStart - -# if CC_SequenceUpdate - -# include "SequenceUpdate_fp.h" - -typedef TPM_RC(SequenceUpdate_Entry)(SequenceUpdate_In* in); - -typedef const struct -{ - SequenceUpdate_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} SequenceUpdate_COMMAND_DESCRIPTOR_t; - -SequenceUpdate_COMMAND_DESCRIPTOR_t _SequenceUpdateData = { - /* entry */ &TPM2_SequenceUpdate, - /* inSize */ (UINT16)(sizeof(SequenceUpdate_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(SequenceUpdate_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(SequenceUpdate_In, buffer))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _SequenceUpdateDataAddress (&_SequenceUpdateData) -# else -# define _SequenceUpdateDataAddress 0 -# endif // CC_SequenceUpdate - -# if CC_SequenceComplete - -# include "SequenceComplete_fp.h" - -typedef TPM_RC(SequenceComplete_Entry)(SequenceComplete_In* in, - SequenceComplete_Out* out); - -typedef const struct -{ - SequenceComplete_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} SequenceComplete_COMMAND_DESCRIPTOR_t; - -SequenceComplete_COMMAND_DESCRIPTOR_t _SequenceCompleteData = { - /* entry */ &TPM2_SequenceComplete, - /* inSize */ (UINT16)(sizeof(SequenceComplete_In)), - /* outSize */ (UINT16)(sizeof(SequenceComplete_Out)), - /* offsetOfTypes */ offsetof(SequenceComplete_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(SequenceComplete_In, buffer)), - (UINT16)(offsetof(SequenceComplete_In, hierarchy)), - (UINT16)(offsetof(SequenceComplete_Out, validation))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - TPMI_RH_HIERARCHY_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_DIGEST_P_MARSHAL, - TPMT_TK_HASHCHECK_P_MARSHAL, - END_OF_LIST}}; - -# define _SequenceCompleteDataAddress (&_SequenceCompleteData) -# else -# define _SequenceCompleteDataAddress 0 -# endif // CC_SequenceComplete - -# if CC_EventSequenceComplete - -# include "EventSequenceComplete_fp.h" - -typedef TPM_RC(EventSequenceComplete_Entry)(EventSequenceComplete_In* in, - EventSequenceComplete_Out* out); - -typedef const struct -{ - EventSequenceComplete_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[6]; -} EventSequenceComplete_COMMAND_DESCRIPTOR_t; - -EventSequenceComplete_COMMAND_DESCRIPTOR_t _EventSequenceCompleteData = { - /* entry */ &TPM2_EventSequenceComplete, - /* inSize */ (UINT16)(sizeof(EventSequenceComplete_In)), - /* outSize */ (UINT16)(sizeof(EventSequenceComplete_Out)), - /* offsetOfTypes */ offsetof(EventSequenceComplete_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(EventSequenceComplete_In, sequenceHandle)), - (UINT16)(offsetof(EventSequenceComplete_In, buffer))}, - /* types */ - {TPMI_DH_PCR_H_UNMARSHAL + ADD_FLAG, - TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - END_OF_LIST, - TPML_DIGEST_VALUES_P_MARSHAL, - END_OF_LIST}}; - -# define _EventSequenceCompleteDataAddress (&_EventSequenceCompleteData) -# else -# define _EventSequenceCompleteDataAddress 0 -# endif // CC_EventSequenceComplete - -# if CC_Certify - -# include "Certify_fp.h" - -typedef TPM_RC(Certify_Entry)(Certify_In* in, Certify_Out* out); - -typedef const struct -{ - Certify_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[4]; - BYTE types[8]; -} Certify_COMMAND_DESCRIPTOR_t; - -Certify_COMMAND_DESCRIPTOR_t _CertifyData = { - /* entry */ &TPM2_Certify, - /* inSize */ (UINT16)(sizeof(Certify_In)), - /* outSize */ (UINT16)(sizeof(Certify_Out)), - /* offsetOfTypes */ offsetof(Certify_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Certify_In, signHandle)), - (UINT16)(offsetof(Certify_In, qualifyingData)), - (UINT16)(offsetof(Certify_In, inScheme)), - (UINT16)(offsetof(Certify_Out, signature))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPM2B_DATA_P_UNMARSHAL, - TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_ATTEST_P_MARSHAL, - TPMT_SIGNATURE_P_MARSHAL, - END_OF_LIST}}; - -# define _CertifyDataAddress (&_CertifyData) -# else -# define _CertifyDataAddress 0 -# endif // CC_Certify - -# if CC_CertifyCreation - -# include "CertifyCreation_fp.h" - -typedef TPM_RC(CertifyCreation_Entry)(CertifyCreation_In* in, - CertifyCreation_Out* out); - -typedef const struct -{ - CertifyCreation_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[6]; - BYTE types[10]; -} CertifyCreation_COMMAND_DESCRIPTOR_t; - -CertifyCreation_COMMAND_DESCRIPTOR_t _CertifyCreationData = { - /* entry */ &TPM2_CertifyCreation, - /* inSize */ (UINT16)(sizeof(CertifyCreation_In)), - /* outSize */ (UINT16)(sizeof(CertifyCreation_Out)), - /* offsetOfTypes */ offsetof(CertifyCreation_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(CertifyCreation_In, objectHandle)), - (UINT16)(offsetof(CertifyCreation_In, qualifyingData)), - (UINT16)(offsetof(CertifyCreation_In, creationHash)), - (UINT16)(offsetof(CertifyCreation_In, inScheme)), - (UINT16)(offsetof(CertifyCreation_In, creationTicket)), - (UINT16)(offsetof(CertifyCreation_Out, signature))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_DATA_P_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, - TPMT_TK_CREATION_P_UNMARSHAL, - END_OF_LIST, - TPM2B_ATTEST_P_MARSHAL, - TPMT_SIGNATURE_P_MARSHAL, - END_OF_LIST}}; - -# define _CertifyCreationDataAddress (&_CertifyCreationData) -# else -# define _CertifyCreationDataAddress 0 -# endif // CC_CertifyCreation - -# if CC_Quote - -# include "Quote_fp.h" - -typedef TPM_RC(Quote_Entry)(Quote_In* in, Quote_Out* out); - -typedef const struct -{ - Quote_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[4]; - BYTE types[8]; -} Quote_COMMAND_DESCRIPTOR_t; - -Quote_COMMAND_DESCRIPTOR_t _QuoteData = { - /* entry */ &TPM2_Quote, - /* inSize */ (UINT16)(sizeof(Quote_In)), - /* outSize */ (UINT16)(sizeof(Quote_Out)), - /* offsetOfTypes */ offsetof(Quote_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Quote_In, qualifyingData)), - (UINT16)(offsetof(Quote_In, inScheme)), - (UINT16)(offsetof(Quote_In, PCRselect)), - (UINT16)(offsetof(Quote_Out, signature))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPM2B_DATA_P_UNMARSHAL, - TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, - TPML_PCR_SELECTION_P_UNMARSHAL, - END_OF_LIST, - TPM2B_ATTEST_P_MARSHAL, - TPMT_SIGNATURE_P_MARSHAL, - END_OF_LIST}}; - -# define _QuoteDataAddress (&_QuoteData) -# else -# define _QuoteDataAddress 0 -# endif // CC_Quote - -# if CC_GetSessionAuditDigest - -# include "GetSessionAuditDigest_fp.h" - -typedef TPM_RC(GetSessionAuditDigest_Entry)(GetSessionAuditDigest_In* in, - GetSessionAuditDigest_Out* out); - -typedef const struct -{ - GetSessionAuditDigest_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[5]; - BYTE types[9]; -} GetSessionAuditDigest_COMMAND_DESCRIPTOR_t; - -GetSessionAuditDigest_COMMAND_DESCRIPTOR_t _GetSessionAuditDigestData = { - /* entry */ &TPM2_GetSessionAuditDigest, - /* inSize */ (UINT16)(sizeof(GetSessionAuditDigest_In)), - /* outSize */ (UINT16)(sizeof(GetSessionAuditDigest_Out)), - /* offsetOfTypes */ offsetof(GetSessionAuditDigest_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(GetSessionAuditDigest_In, signHandle)), - (UINT16)(offsetof(GetSessionAuditDigest_In, sessionHandle)), - (UINT16)(offsetof(GetSessionAuditDigest_In, qualifyingData)), - (UINT16)(offsetof(GetSessionAuditDigest_In, inScheme)), - (UINT16)(offsetof(GetSessionAuditDigest_Out, signature))}, - /* types */ - {TPMI_RH_ENDORSEMENT_H_UNMARSHAL, - TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPMI_SH_HMAC_H_UNMARSHAL, - TPM2B_DATA_P_UNMARSHAL, - TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_ATTEST_P_MARSHAL, - TPMT_SIGNATURE_P_MARSHAL, - END_OF_LIST}}; - -# define _GetSessionAuditDigestDataAddress (&_GetSessionAuditDigestData) -# else -# define _GetSessionAuditDigestDataAddress 0 -# endif // CC_GetSessionAuditDigest - -# if CC_GetCommandAuditDigest - -# include "GetCommandAuditDigest_fp.h" - -typedef TPM_RC(GetCommandAuditDigest_Entry)(GetCommandAuditDigest_In* in, - GetCommandAuditDigest_Out* out); - -typedef const struct -{ - GetCommandAuditDigest_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[4]; - BYTE types[8]; -} GetCommandAuditDigest_COMMAND_DESCRIPTOR_t; - -GetCommandAuditDigest_COMMAND_DESCRIPTOR_t _GetCommandAuditDigestData = { - /* entry */ &TPM2_GetCommandAuditDigest, - /* inSize */ (UINT16)(sizeof(GetCommandAuditDigest_In)), - /* outSize */ (UINT16)(sizeof(GetCommandAuditDigest_Out)), - /* offsetOfTypes */ offsetof(GetCommandAuditDigest_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(GetCommandAuditDigest_In, signHandle)), - (UINT16)(offsetof(GetCommandAuditDigest_In, qualifyingData)), - (UINT16)(offsetof(GetCommandAuditDigest_In, inScheme)), - (UINT16)(offsetof(GetCommandAuditDigest_Out, signature))}, - /* types */ - {TPMI_RH_ENDORSEMENT_H_UNMARSHAL, - TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPM2B_DATA_P_UNMARSHAL, - TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_ATTEST_P_MARSHAL, - TPMT_SIGNATURE_P_MARSHAL, - END_OF_LIST}}; - -# define _GetCommandAuditDigestDataAddress (&_GetCommandAuditDigestData) -# else -# define _GetCommandAuditDigestDataAddress 0 -# endif // CC_GetCommandAuditDigest - -# if CC_GetTime - -# include "GetTime_fp.h" - -typedef TPM_RC(GetTime_Entry)(GetTime_In* in, GetTime_Out* out); - -typedef const struct -{ - GetTime_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[4]; - BYTE types[8]; -} GetTime_COMMAND_DESCRIPTOR_t; - -GetTime_COMMAND_DESCRIPTOR_t _GetTimeData = { - /* entry */ &TPM2_GetTime, - /* inSize */ (UINT16)(sizeof(GetTime_In)), - /* outSize */ (UINT16)(sizeof(GetTime_Out)), - /* offsetOfTypes */ offsetof(GetTime_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(GetTime_In, signHandle)), - (UINT16)(offsetof(GetTime_In, qualifyingData)), - (UINT16)(offsetof(GetTime_In, inScheme)), - (UINT16)(offsetof(GetTime_Out, signature))}, - /* types */ - {TPMI_RH_ENDORSEMENT_H_UNMARSHAL, - TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPM2B_DATA_P_UNMARSHAL, - TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - TPM2B_ATTEST_P_MARSHAL, - TPMT_SIGNATURE_P_MARSHAL, - END_OF_LIST}}; - -# define _GetTimeDataAddress (&_GetTimeData) -# else -# define _GetTimeDataAddress 0 -# endif // CC_GetTime - -# if CC_CertifyX509 - -# include "CertifyX509_fp.h" - -typedef TPM_RC(CertifyX509_Entry)(CertifyX509_In* in, CertifyX509_Out* out); - -typedef const struct -{ - CertifyX509_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[6]; - BYTE types[10]; -} CertifyX509_COMMAND_DESCRIPTOR_t; - -CertifyX509_COMMAND_DESCRIPTOR_t _CertifyX509Data = { - /* entry */ &TPM2_CertifyX509, - /* inSize */ (UINT16)(sizeof(CertifyX509_In)), - /* outSize */ (UINT16)(sizeof(CertifyX509_Out)), - /* offsetOfTypes */ offsetof(CertifyX509_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(CertifyX509_In, signHandle)), - (UINT16)(offsetof(CertifyX509_In, reserved)), - (UINT16)(offsetof(CertifyX509_In, inScheme)), - (UINT16)(offsetof(CertifyX509_In, partialCertificate)), - (UINT16)(offsetof(CertifyX509_Out, tbsDigest)), - (UINT16)(offsetof(CertifyX509_Out, signature))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPM2B_DATA_P_UNMARSHAL, - TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - END_OF_LIST, - TPM2B_MAX_BUFFER_P_MARSHAL, - TPM2B_DIGEST_P_MARSHAL, - TPMT_SIGNATURE_P_MARSHAL, - END_OF_LIST}}; - -# define _CertifyX509DataAddress (&_CertifyX509Data) -# else -# define _CertifyX509DataAddress 0 -# endif // CC_CertifyX509 - -# if CC_Commit - -# include "Commit_fp.h" - -typedef TPM_RC(Commit_Entry)(Commit_In* in, Commit_Out* out); - -typedef const struct -{ - Commit_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[6]; - BYTE types[10]; -} Commit_COMMAND_DESCRIPTOR_t; - -Commit_COMMAND_DESCRIPTOR_t _CommitData = { - /* entry */ &TPM2_Commit, - /* inSize */ (UINT16)(sizeof(Commit_In)), - /* outSize */ (UINT16)(sizeof(Commit_Out)), - /* offsetOfTypes */ offsetof(Commit_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Commit_In, P1)), - (UINT16)(offsetof(Commit_In, s2)), - (UINT16)(offsetof(Commit_In, y2)), - (UINT16)(offsetof(Commit_Out, L)), - (UINT16)(offsetof(Commit_Out, E)), - (UINT16)(offsetof(Commit_Out, counter))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_ECC_POINT_P_UNMARSHAL, - TPM2B_SENSITIVE_DATA_P_UNMARSHAL, - TPM2B_ECC_PARAMETER_P_UNMARSHAL, - END_OF_LIST, - TPM2B_ECC_POINT_P_MARSHAL, - TPM2B_ECC_POINT_P_MARSHAL, - TPM2B_ECC_POINT_P_MARSHAL, - UINT16_P_MARSHAL, - END_OF_LIST}}; - -# define _CommitDataAddress (&_CommitData) -# else -# define _CommitDataAddress 0 -# endif // CC_Commit - -# if CC_EC_Ephemeral - -# include "EC_Ephemeral_fp.h" - -typedef TPM_RC(EC_Ephemeral_Entry)(EC_Ephemeral_In* in, EC_Ephemeral_Out* out); - -typedef const struct -{ - EC_Ephemeral_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[5]; -} EC_Ephemeral_COMMAND_DESCRIPTOR_t; - -EC_Ephemeral_COMMAND_DESCRIPTOR_t _EC_EphemeralData = { - /* entry */ &TPM2_EC_Ephemeral, - /* inSize */ (UINT16)(sizeof(EC_Ephemeral_In)), - /* outSize */ (UINT16)(sizeof(EC_Ephemeral_Out)), - /* offsetOfTypes */ offsetof(EC_Ephemeral_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(EC_Ephemeral_Out, counter))}, - /* types */ - {TPMI_ECC_CURVE_P_UNMARSHAL, - END_OF_LIST, - TPM2B_ECC_POINT_P_MARSHAL, - UINT16_P_MARSHAL, - END_OF_LIST}}; - -# define _EC_EphemeralDataAddress (&_EC_EphemeralData) -# else -# define _EC_EphemeralDataAddress 0 -# endif // CC_EC_Ephemeral - -# if CC_VerifySignature - -# include "VerifySignature_fp.h" - -typedef TPM_RC(VerifySignature_Entry)(VerifySignature_In* in, - VerifySignature_Out* out); - -typedef const struct -{ - VerifySignature_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[6]; -} VerifySignature_COMMAND_DESCRIPTOR_t; - -VerifySignature_COMMAND_DESCRIPTOR_t _VerifySignatureData = { - /* entry */ &TPM2_VerifySignature, - /* inSize */ (UINT16)(sizeof(VerifySignature_In)), - /* outSize */ (UINT16)(sizeof(VerifySignature_Out)), - /* offsetOfTypes */ offsetof(VerifySignature_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(VerifySignature_In, digest)), - (UINT16)(offsetof(VerifySignature_In, signature))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPMT_SIGNATURE_P_UNMARSHAL, - END_OF_LIST, - TPMT_TK_VERIFIED_P_MARSHAL, - END_OF_LIST}}; - -# define _VerifySignatureDataAddress (&_VerifySignatureData) -# else -# define _VerifySignatureDataAddress 0 -# endif // CC_VerifySignature - -# if CC_Sign - -# include "Sign_fp.h" - -typedef TPM_RC(Sign_Entry)(Sign_In* in, Sign_Out* out); - -typedef const struct -{ - Sign_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} Sign_COMMAND_DESCRIPTOR_t; - -Sign_COMMAND_DESCRIPTOR_t _SignData = { - /* entry */ &TPM2_Sign, - /* inSize */ (UINT16)(sizeof(Sign_In)), - /* outSize */ (UINT16)(sizeof(Sign_Out)), - /* offsetOfTypes */ offsetof(Sign_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Sign_In, digest)), - (UINT16)(offsetof(Sign_In, inScheme)), - (UINT16)(offsetof(Sign_In, validation))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, - TPMT_TK_HASHCHECK_P_UNMARSHAL, - END_OF_LIST, - TPMT_SIGNATURE_P_MARSHAL, - END_OF_LIST}}; - -# define _SignDataAddress (&_SignData) -# else -# define _SignDataAddress 0 -# endif // CC_Sign - -# if CC_SetCommandCodeAuditStatus - -# include "SetCommandCodeAuditStatus_fp.h" - -typedef TPM_RC(SetCommandCodeAuditStatus_Entry)(SetCommandCodeAuditStatus_In* in); - -typedef const struct -{ - SetCommandCodeAuditStatus_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[6]; -} SetCommandCodeAuditStatus_COMMAND_DESCRIPTOR_t; - -SetCommandCodeAuditStatus_COMMAND_DESCRIPTOR_t _SetCommandCodeAuditStatusData = { - /* entry */ &TPM2_SetCommandCodeAuditStatus, - /* inSize */ (UINT16)(sizeof(SetCommandCodeAuditStatus_In)), - /* outSize */ 0, - /* offsetOfTypes */ - offsetof(SetCommandCodeAuditStatus_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(SetCommandCodeAuditStatus_In, auditAlg)), - (UINT16)(offsetof(SetCommandCodeAuditStatus_In, setList)), - (UINT16)(offsetof(SetCommandCodeAuditStatus_In, clearList))}, - /* types */ - {TPMI_RH_PROVISION_H_UNMARSHAL, - TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, - TPML_CC_P_UNMARSHAL, - TPML_CC_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _SetCommandCodeAuditStatusDataAddress (&_SetCommandCodeAuditStatusData) -# else -# define _SetCommandCodeAuditStatusDataAddress 0 -# endif // CC_SetCommandCodeAuditStatus - -# if CC_PCR_Extend - -# include "PCR_Extend_fp.h" - -typedef TPM_RC(PCR_Extend_Entry)(PCR_Extend_In* in); - -typedef const struct -{ - PCR_Extend_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} PCR_Extend_COMMAND_DESCRIPTOR_t; - -PCR_Extend_COMMAND_DESCRIPTOR_t _PCR_ExtendData = { - /* entry */ &TPM2_PCR_Extend, - /* inSize */ (UINT16)(sizeof(PCR_Extend_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PCR_Extend_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(PCR_Extend_In, digests))}, - /* types */ - {TPMI_DH_PCR_H_UNMARSHAL + ADD_FLAG, - TPML_DIGEST_VALUES_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PCR_ExtendDataAddress (&_PCR_ExtendData) -# else -# define _PCR_ExtendDataAddress 0 -# endif // CC_PCR_Extend - -# if CC_PCR_Event - -# include "PCR_Event_fp.h" - -typedef TPM_RC(PCR_Event_Entry)(PCR_Event_In* in, PCR_Event_Out* out); - -typedef const struct -{ - PCR_Event_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[5]; -} PCR_Event_COMMAND_DESCRIPTOR_t; - -PCR_Event_COMMAND_DESCRIPTOR_t _PCR_EventData = { - /* entry */ &TPM2_PCR_Event, - /* inSize */ (UINT16)(sizeof(PCR_Event_In)), - /* outSize */ (UINT16)(sizeof(PCR_Event_Out)), - /* offsetOfTypes */ offsetof(PCR_Event_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(PCR_Event_In, eventData))}, - /* types */ - {TPMI_DH_PCR_H_UNMARSHAL + ADD_FLAG, - TPM2B_EVENT_P_UNMARSHAL, - END_OF_LIST, - TPML_DIGEST_VALUES_P_MARSHAL, - END_OF_LIST}}; - -# define _PCR_EventDataAddress (&_PCR_EventData) -# else -# define _PCR_EventDataAddress 0 -# endif // CC_PCR_Event - -# if CC_PCR_Read - -# include "PCR_Read_fp.h" - -typedef TPM_RC(PCR_Read_Entry)(PCR_Read_In* in, PCR_Read_Out* out); - -typedef const struct -{ - PCR_Read_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[6]; -} PCR_Read_COMMAND_DESCRIPTOR_t; - -PCR_Read_COMMAND_DESCRIPTOR_t _PCR_ReadData = { - /* entry */ &TPM2_PCR_Read, - /* inSize */ (UINT16)(sizeof(PCR_Read_In)), - /* outSize */ (UINT16)(sizeof(PCR_Read_Out)), - /* offsetOfTypes */ offsetof(PCR_Read_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PCR_Read_Out, pcrSelectionOut)), - (UINT16)(offsetof(PCR_Read_Out, pcrValues))}, - /* types */ - {TPML_PCR_SELECTION_P_UNMARSHAL, - END_OF_LIST, - UINT32_P_MARSHAL, - TPML_PCR_SELECTION_P_MARSHAL, - TPML_DIGEST_P_MARSHAL, - END_OF_LIST}}; - -# define _PCR_ReadDataAddress (&_PCR_ReadData) -# else -# define _PCR_ReadDataAddress 0 -# endif // CC_PCR_Read - -# if CC_PCR_Allocate - -# include "PCR_Allocate_fp.h" - -typedef TPM_RC(PCR_Allocate_Entry)(PCR_Allocate_In* in, PCR_Allocate_Out* out); - -typedef const struct -{ - PCR_Allocate_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[4]; - BYTE types[8]; -} PCR_Allocate_COMMAND_DESCRIPTOR_t; - -PCR_Allocate_COMMAND_DESCRIPTOR_t _PCR_AllocateData = { - /* entry */ &TPM2_PCR_Allocate, - /* inSize */ (UINT16)(sizeof(PCR_Allocate_In)), - /* outSize */ (UINT16)(sizeof(PCR_Allocate_Out)), - /* offsetOfTypes */ offsetof(PCR_Allocate_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PCR_Allocate_In, pcrAllocation)), - (UINT16)(offsetof(PCR_Allocate_Out, maxPCR)), - (UINT16)(offsetof(PCR_Allocate_Out, sizeNeeded)), - (UINT16)(offsetof(PCR_Allocate_Out, sizeAvailable))}, - /* types */ - {TPMI_RH_PLATFORM_H_UNMARSHAL, - TPML_PCR_SELECTION_P_UNMARSHAL, - END_OF_LIST, - TPMI_YES_NO_P_MARSHAL, - UINT32_P_MARSHAL, - UINT32_P_MARSHAL, - UINT32_P_MARSHAL, - END_OF_LIST}}; - -# define _PCR_AllocateDataAddress (&_PCR_AllocateData) -# else -# define _PCR_AllocateDataAddress 0 -# endif // CC_PCR_Allocate - -# if CC_PCR_SetAuthPolicy - -# include "PCR_SetAuthPolicy_fp.h" - -typedef TPM_RC(PCR_SetAuthPolicy_Entry)(PCR_SetAuthPolicy_In* in); - -typedef const struct -{ - PCR_SetAuthPolicy_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[6]; -} PCR_SetAuthPolicy_COMMAND_DESCRIPTOR_t; - -PCR_SetAuthPolicy_COMMAND_DESCRIPTOR_t _PCR_SetAuthPolicyData = { - /* entry */ &TPM2_PCR_SetAuthPolicy, - /* inSize */ (UINT16)(sizeof(PCR_SetAuthPolicy_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PCR_SetAuthPolicy_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PCR_SetAuthPolicy_In, authPolicy)), - (UINT16)(offsetof(PCR_SetAuthPolicy_In, hashAlg)), - (UINT16)(offsetof(PCR_SetAuthPolicy_In, pcrNum))}, - /* types */ - {TPMI_RH_PLATFORM_H_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, - TPMI_DH_PCR_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PCR_SetAuthPolicyDataAddress (&_PCR_SetAuthPolicyData) -# else -# define _PCR_SetAuthPolicyDataAddress 0 -# endif // CC_PCR_SetAuthPolicy - -# if CC_PCR_SetAuthValue - -# include "PCR_SetAuthValue_fp.h" - -typedef TPM_RC(PCR_SetAuthValue_Entry)(PCR_SetAuthValue_In* in); - -typedef const struct -{ - PCR_SetAuthValue_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} PCR_SetAuthValue_COMMAND_DESCRIPTOR_t; - -PCR_SetAuthValue_COMMAND_DESCRIPTOR_t _PCR_SetAuthValueData = { - /* entry */ &TPM2_PCR_SetAuthValue, - /* inSize */ (UINT16)(sizeof(PCR_SetAuthValue_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PCR_SetAuthValue_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(PCR_SetAuthValue_In, auth))}, - /* types */ - {TPMI_DH_PCR_H_UNMARSHAL, TPM2B_DIGEST_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PCR_SetAuthValueDataAddress (&_PCR_SetAuthValueData) -# else -# define _PCR_SetAuthValueDataAddress 0 -# endif // CC_PCR_SetAuthValue - -# if CC_PCR_Reset - -# include "PCR_Reset_fp.h" - -typedef TPM_RC(PCR_Reset_Entry)(PCR_Reset_In* in); - -typedef const struct -{ - PCR_Reset_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} PCR_Reset_COMMAND_DESCRIPTOR_t; - -PCR_Reset_COMMAND_DESCRIPTOR_t _PCR_ResetData = { - /* entry */ &TPM2_PCR_Reset, - /* inSize */ (UINT16)(sizeof(PCR_Reset_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PCR_Reset_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_DH_PCR_H_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PCR_ResetDataAddress (&_PCR_ResetData) -# else -# define _PCR_ResetDataAddress 0 -# endif // CC_PCR_Reset - -# if CC_PolicySigned - -# include "PolicySigned_fp.h" - -typedef TPM_RC(PolicySigned_Entry)(PolicySigned_In* in, PolicySigned_Out* out); - -typedef const struct -{ - PolicySigned_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[7]; - BYTE types[11]; -} PolicySigned_COMMAND_DESCRIPTOR_t; - -PolicySigned_COMMAND_DESCRIPTOR_t _PolicySignedData = { - /* entry */ &TPM2_PolicySigned, - /* inSize */ (UINT16)(sizeof(PolicySigned_In)), - /* outSize */ (UINT16)(sizeof(PolicySigned_Out)), - /* offsetOfTypes */ offsetof(PolicySigned_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PolicySigned_In, policySession)), - (UINT16)(offsetof(PolicySigned_In, nonceTPM)), - (UINT16)(offsetof(PolicySigned_In, cpHashA)), - (UINT16)(offsetof(PolicySigned_In, policyRef)), - (UINT16)(offsetof(PolicySigned_In, expiration)), - (UINT16)(offsetof(PolicySigned_In, auth)), - (UINT16)(offsetof(PolicySigned_Out, policyTicket))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPMI_SH_POLICY_H_UNMARSHAL, - TPM2B_NONCE_P_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPM2B_NONCE_P_UNMARSHAL, - INT32_P_UNMARSHAL, - TPMT_SIGNATURE_P_UNMARSHAL, - END_OF_LIST, - TPM2B_TIMEOUT_P_MARSHAL, - TPMT_TK_AUTH_P_MARSHAL, - END_OF_LIST}}; - -# define _PolicySignedDataAddress (&_PolicySignedData) -# else -# define _PolicySignedDataAddress 0 -# endif // CC_PolicySigned - -# if CC_PolicySecret - -# include "PolicySecret_fp.h" - -typedef TPM_RC(PolicySecret_Entry)(PolicySecret_In* in, PolicySecret_Out* out); - -typedef const struct -{ - PolicySecret_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[6]; - BYTE types[10]; -} PolicySecret_COMMAND_DESCRIPTOR_t; - -PolicySecret_COMMAND_DESCRIPTOR_t _PolicySecretData = { - /* entry */ &TPM2_PolicySecret, - /* inSize */ (UINT16)(sizeof(PolicySecret_In)), - /* outSize */ (UINT16)(sizeof(PolicySecret_Out)), - /* offsetOfTypes */ offsetof(PolicySecret_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PolicySecret_In, policySession)), - (UINT16)(offsetof(PolicySecret_In, nonceTPM)), - (UINT16)(offsetof(PolicySecret_In, cpHashA)), - (UINT16)(offsetof(PolicySecret_In, policyRef)), - (UINT16)(offsetof(PolicySecret_In, expiration)), - (UINT16)(offsetof(PolicySecret_Out, policyTicket))}, - /* types */ - {TPMI_DH_ENTITY_H_UNMARSHAL, - TPMI_SH_POLICY_H_UNMARSHAL, - TPM2B_NONCE_P_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPM2B_NONCE_P_UNMARSHAL, - INT32_P_UNMARSHAL, - END_OF_LIST, - TPM2B_TIMEOUT_P_MARSHAL, - TPMT_TK_AUTH_P_MARSHAL, - END_OF_LIST}}; - -# define _PolicySecretDataAddress (&_PolicySecretData) -# else -# define _PolicySecretDataAddress 0 -# endif // CC_PolicySecret - -# if CC_PolicyTicket - -# include "PolicyTicket_fp.h" - -typedef TPM_RC(PolicyTicket_Entry)(PolicyTicket_In* in); - -typedef const struct -{ - PolicyTicket_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[5]; - BYTE types[8]; -} PolicyTicket_COMMAND_DESCRIPTOR_t; - -PolicyTicket_COMMAND_DESCRIPTOR_t _PolicyTicketData = { - /* entry */ &TPM2_PolicyTicket, - /* inSize */ (UINT16)(sizeof(PolicyTicket_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyTicket_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PolicyTicket_In, timeout)), - (UINT16)(offsetof(PolicyTicket_In, cpHashA)), - (UINT16)(offsetof(PolicyTicket_In, policyRef)), - (UINT16)(offsetof(PolicyTicket_In, authName)), - (UINT16)(offsetof(PolicyTicket_In, ticket))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, - TPM2B_TIMEOUT_P_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPM2B_NONCE_P_UNMARSHAL, - TPM2B_NAME_P_UNMARSHAL, - TPMT_TK_AUTH_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PolicyTicketDataAddress (&_PolicyTicketData) -# else -# define _PolicyTicketDataAddress 0 -# endif // CC_PolicyTicket - -# if CC_PolicyOR - -# include "PolicyOR_fp.h" - -typedef TPM_RC(PolicyOR_Entry)(PolicyOR_In* in); - -typedef const struct -{ - PolicyOR_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} PolicyOR_COMMAND_DESCRIPTOR_t; - -PolicyOR_COMMAND_DESCRIPTOR_t _PolicyORData = { - /* entry */ &TPM2_PolicyOR, - /* inSize */ (UINT16)(sizeof(PolicyOR_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyOR_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(PolicyOR_In, pHashList))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, TPML_DIGEST_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PolicyORDataAddress (&_PolicyORData) -# else -# define _PolicyORDataAddress 0 -# endif // CC_PolicyOR - -# if CC_PolicyPCR - -# include "PolicyPCR_fp.h" - -typedef TPM_RC(PolicyPCR_Entry)(PolicyPCR_In* in); - -typedef const struct -{ - PolicyPCR_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[5]; -} PolicyPCR_COMMAND_DESCRIPTOR_t; - -PolicyPCR_COMMAND_DESCRIPTOR_t _PolicyPCRData = { - /* entry */ &TPM2_PolicyPCR, - /* inSize */ (UINT16)(sizeof(PolicyPCR_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyPCR_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PolicyPCR_In, pcrDigest)), - (UINT16)(offsetof(PolicyPCR_In, pcrs))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPML_PCR_SELECTION_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PolicyPCRDataAddress (&_PolicyPCRData) -# else -# define _PolicyPCRDataAddress 0 -# endif // CC_PolicyPCR - -# if CC_PolicyLocality - -# include "PolicyLocality_fp.h" - -typedef TPM_RC(PolicyLocality_Entry)(PolicyLocality_In* in); - -typedef const struct -{ - PolicyLocality_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} PolicyLocality_COMMAND_DESCRIPTOR_t; - -PolicyLocality_COMMAND_DESCRIPTOR_t _PolicyLocalityData = { - /* entry */ &TPM2_PolicyLocality, - /* inSize */ (UINT16)(sizeof(PolicyLocality_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyLocality_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(PolicyLocality_In, locality))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, - TPMA_LOCALITY_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PolicyLocalityDataAddress (&_PolicyLocalityData) -# else -# define _PolicyLocalityDataAddress 0 -# endif // CC_PolicyLocality - -# if CC_PolicyNV - -# include "PolicyNV_fp.h" - -typedef TPM_RC(PolicyNV_Entry)(PolicyNV_In* in); - -typedef const struct -{ - PolicyNV_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[5]; - BYTE types[8]; -} PolicyNV_COMMAND_DESCRIPTOR_t; - -PolicyNV_COMMAND_DESCRIPTOR_t _PolicyNVData = { - /* entry */ &TPM2_PolicyNV, - /* inSize */ (UINT16)(sizeof(PolicyNV_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyNV_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PolicyNV_In, nvIndex)), - (UINT16)(offsetof(PolicyNV_In, policySession)), - (UINT16)(offsetof(PolicyNV_In, operandB)), - (UINT16)(offsetof(PolicyNV_In, offset)), - (UINT16)(offsetof(PolicyNV_In, operation))}, - /* types */ - {TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - TPMI_SH_POLICY_H_UNMARSHAL, - TPM2B_OPERAND_P_UNMARSHAL, - UINT16_P_UNMARSHAL, - TPM_EO_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PolicyNVDataAddress (&_PolicyNVData) -# else -# define _PolicyNVDataAddress 0 -# endif // CC_PolicyNV - -# if CC_PolicyCounterTimer - -# include "PolicyCounterTimer_fp.h" - -typedef TPM_RC(PolicyCounterTimer_Entry)(PolicyCounterTimer_In* in); - -typedef const struct -{ - PolicyCounterTimer_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[6]; -} PolicyCounterTimer_COMMAND_DESCRIPTOR_t; - -PolicyCounterTimer_COMMAND_DESCRIPTOR_t _PolicyCounterTimerData = { - /* entry */ &TPM2_PolicyCounterTimer, - /* inSize */ (UINT16)(sizeof(PolicyCounterTimer_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyCounterTimer_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PolicyCounterTimer_In, operandB)), - (UINT16)(offsetof(PolicyCounterTimer_In, offset)), - (UINT16)(offsetof(PolicyCounterTimer_In, operation))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, - TPM2B_OPERAND_P_UNMARSHAL, - UINT16_P_UNMARSHAL, - TPM_EO_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PolicyCounterTimerDataAddress (&_PolicyCounterTimerData) -# else -# define _PolicyCounterTimerDataAddress 0 -# endif // CC_PolicyCounterTimer - -# if CC_PolicyCommandCode - -# include "PolicyCommandCode_fp.h" - -typedef TPM_RC(PolicyCommandCode_Entry)(PolicyCommandCode_In* in); - -typedef const struct -{ - PolicyCommandCode_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} PolicyCommandCode_COMMAND_DESCRIPTOR_t; - -PolicyCommandCode_COMMAND_DESCRIPTOR_t _PolicyCommandCodeData = { - /* entry */ &TPM2_PolicyCommandCode, - /* inSize */ (UINT16)(sizeof(PolicyCommandCode_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyCommandCode_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(PolicyCommandCode_In, code))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, TPM_CC_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PolicyCommandCodeDataAddress (&_PolicyCommandCodeData) -# else -# define _PolicyCommandCodeDataAddress 0 -# endif // CC_PolicyCommandCode - -# if CC_PolicyPhysicalPresence - -# include "PolicyPhysicalPresence_fp.h" - -typedef TPM_RC(PolicyPhysicalPresence_Entry)(PolicyPhysicalPresence_In* in); - -typedef const struct -{ - PolicyPhysicalPresence_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} PolicyPhysicalPresence_COMMAND_DESCRIPTOR_t; - -PolicyPhysicalPresence_COMMAND_DESCRIPTOR_t _PolicyPhysicalPresenceData = { - /* entry */ &TPM2_PolicyPhysicalPresence, - /* inSize */ (UINT16)(sizeof(PolicyPhysicalPresence_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyPhysicalPresence_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PolicyPhysicalPresenceDataAddress (&_PolicyPhysicalPresenceData) -# else -# define _PolicyPhysicalPresenceDataAddress 0 -# endif // CC_PolicyPhysicalPresence - -# if CC_PolicyCpHash - -# include "PolicyCpHash_fp.h" - -typedef TPM_RC(PolicyCpHash_Entry)(PolicyCpHash_In* in); - -typedef const struct -{ - PolicyCpHash_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} PolicyCpHash_COMMAND_DESCRIPTOR_t; - -PolicyCpHash_COMMAND_DESCRIPTOR_t _PolicyCpHashData = { - /* entry */ &TPM2_PolicyCpHash, - /* inSize */ (UINT16)(sizeof(PolicyCpHash_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyCpHash_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(PolicyCpHash_In, cpHashA))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, TPM2B_DIGEST_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PolicyCpHashDataAddress (&_PolicyCpHashData) -# else -# define _PolicyCpHashDataAddress 0 -# endif // CC_PolicyCpHash - -# if CC_PolicyNameHash - -# include "PolicyNameHash_fp.h" - -typedef TPM_RC(PolicyNameHash_Entry)(PolicyNameHash_In* in); - -typedef const struct -{ - PolicyNameHash_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} PolicyNameHash_COMMAND_DESCRIPTOR_t; - -PolicyNameHash_COMMAND_DESCRIPTOR_t _PolicyNameHashData = { - /* entry */ &TPM2_PolicyNameHash, - /* inSize */ (UINT16)(sizeof(PolicyNameHash_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyNameHash_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(PolicyNameHash_In, nameHash))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, TPM2B_DIGEST_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PolicyNameHashDataAddress (&_PolicyNameHashData) -# else -# define _PolicyNameHashDataAddress 0 -# endif // CC_PolicyNameHash - -# if CC_PolicyDuplicationSelect - -# include "PolicyDuplicationSelect_fp.h" - -typedef TPM_RC(PolicyDuplicationSelect_Entry)(PolicyDuplicationSelect_In* in); - -typedef const struct -{ - PolicyDuplicationSelect_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[6]; -} PolicyDuplicationSelect_COMMAND_DESCRIPTOR_t; - -PolicyDuplicationSelect_COMMAND_DESCRIPTOR_t _PolicyDuplicationSelectData = { - /* entry */ &TPM2_PolicyDuplicationSelect, - /* inSize */ (UINT16)(sizeof(PolicyDuplicationSelect_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyDuplicationSelect_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PolicyDuplicationSelect_In, objectName)), - (UINT16)(offsetof(PolicyDuplicationSelect_In, newParentName)), - (UINT16)(offsetof(PolicyDuplicationSelect_In, includeObject))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, - TPM2B_NAME_P_UNMARSHAL, - TPM2B_NAME_P_UNMARSHAL, - TPMI_YES_NO_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PolicyDuplicationSelectDataAddress (&_PolicyDuplicationSelectData) -# else -# define _PolicyDuplicationSelectDataAddress 0 -# endif // CC_PolicyDuplicationSelect - -# if CC_PolicyAuthorize - -# include "PolicyAuthorize_fp.h" - -typedef TPM_RC(PolicyAuthorize_Entry)(PolicyAuthorize_In* in); - -typedef const struct -{ - PolicyAuthorize_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[4]; - BYTE types[7]; -} PolicyAuthorize_COMMAND_DESCRIPTOR_t; - -PolicyAuthorize_COMMAND_DESCRIPTOR_t _PolicyAuthorizeData = { - /* entry */ &TPM2_PolicyAuthorize, - /* inSize */ (UINT16)(sizeof(PolicyAuthorize_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyAuthorize_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PolicyAuthorize_In, approvedPolicy)), - (UINT16)(offsetof(PolicyAuthorize_In, policyRef)), - (UINT16)(offsetof(PolicyAuthorize_In, keySign)), - (UINT16)(offsetof(PolicyAuthorize_In, checkTicket))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPM2B_NONCE_P_UNMARSHAL, - TPM2B_NAME_P_UNMARSHAL, - TPMT_TK_VERIFIED_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PolicyAuthorizeDataAddress (&_PolicyAuthorizeData) -# else -# define _PolicyAuthorizeDataAddress 0 -# endif // CC_PolicyAuthorize - -# if CC_PolicyAuthValue - -# include "PolicyAuthValue_fp.h" - -typedef TPM_RC(PolicyAuthValue_Entry)(PolicyAuthValue_In* in); - -typedef const struct -{ - PolicyAuthValue_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} PolicyAuthValue_COMMAND_DESCRIPTOR_t; - -PolicyAuthValue_COMMAND_DESCRIPTOR_t _PolicyAuthValueData = { - /* entry */ &TPM2_PolicyAuthValue, - /* inSize */ (UINT16)(sizeof(PolicyAuthValue_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyAuthValue_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PolicyAuthValueDataAddress (&_PolicyAuthValueData) -# else -# define _PolicyAuthValueDataAddress 0 -# endif // CC_PolicyAuthValue - -# if CC_PolicyPassword - -# include "PolicyPassword_fp.h" - -typedef TPM_RC(PolicyPassword_Entry)(PolicyPassword_In* in); - -typedef const struct -{ - PolicyPassword_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} PolicyPassword_COMMAND_DESCRIPTOR_t; - -PolicyPassword_COMMAND_DESCRIPTOR_t _PolicyPasswordData = { - /* entry */ &TPM2_PolicyPassword, - /* inSize */ (UINT16)(sizeof(PolicyPassword_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyPassword_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PolicyPasswordDataAddress (&_PolicyPasswordData) -# else -# define _PolicyPasswordDataAddress 0 -# endif // CC_PolicyPassword - -# if CC_PolicyGetDigest - -# include "PolicyGetDigest_fp.h" - -typedef TPM_RC(PolicyGetDigest_Entry)(PolicyGetDigest_In* in, - PolicyGetDigest_Out* out); - -typedef const struct -{ - PolicyGetDigest_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[4]; -} PolicyGetDigest_COMMAND_DESCRIPTOR_t; - -PolicyGetDigest_COMMAND_DESCRIPTOR_t _PolicyGetDigestData = { - /* entry */ &TPM2_PolicyGetDigest, - /* inSize */ (UINT16)(sizeof(PolicyGetDigest_In)), - /* outSize */ (UINT16)(sizeof(PolicyGetDigest_Out)), - /* offsetOfTypes */ offsetof(PolicyGetDigest_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, END_OF_LIST, TPM2B_DIGEST_P_MARSHAL, END_OF_LIST}}; - -# define _PolicyGetDigestDataAddress (&_PolicyGetDigestData) -# else -# define _PolicyGetDigestDataAddress 0 -# endif // CC_PolicyGetDigest - -# if CC_PolicyNvWritten - -# include "PolicyNvWritten_fp.h" - -typedef TPM_RC(PolicyNvWritten_Entry)(PolicyNvWritten_In* in); - -typedef const struct -{ - PolicyNvWritten_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} PolicyNvWritten_COMMAND_DESCRIPTOR_t; - -PolicyNvWritten_COMMAND_DESCRIPTOR_t _PolicyNvWrittenData = { - /* entry */ &TPM2_PolicyNvWritten, - /* inSize */ (UINT16)(sizeof(PolicyNvWritten_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyNvWritten_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(PolicyNvWritten_In, writtenSet))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, TPMI_YES_NO_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PolicyNvWrittenDataAddress (&_PolicyNvWrittenData) -# else -# define _PolicyNvWrittenDataAddress 0 -# endif // CC_PolicyNvWritten - -# if CC_PolicyTemplate - -# include "PolicyTemplate_fp.h" - -typedef TPM_RC(PolicyTemplate_Entry)(PolicyTemplate_In* in); - -typedef const struct -{ - PolicyTemplate_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} PolicyTemplate_COMMAND_DESCRIPTOR_t; - -PolicyTemplate_COMMAND_DESCRIPTOR_t _PolicyTemplateData = { - /* entry */ &TPM2_PolicyTemplate, - /* inSize */ (UINT16)(sizeof(PolicyTemplate_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyTemplate_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(PolicyTemplate_In, templateHash))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, TPM2B_DIGEST_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _PolicyTemplateDataAddress (&_PolicyTemplateData) -# else -# define _PolicyTemplateDataAddress 0 -# endif // CC_PolicyTemplate - -# if CC_PolicyAuthorizeNV - -# include "PolicyAuthorizeNV_fp.h" - -typedef TPM_RC(PolicyAuthorizeNV_Entry)(PolicyAuthorizeNV_In* in); - -typedef const struct -{ - PolicyAuthorizeNV_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[5]; -} PolicyAuthorizeNV_COMMAND_DESCRIPTOR_t; - -PolicyAuthorizeNV_COMMAND_DESCRIPTOR_t _PolicyAuthorizeNVData = { - /* entry */ &TPM2_PolicyAuthorizeNV, - /* inSize */ (UINT16)(sizeof(PolicyAuthorizeNV_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PolicyAuthorizeNV_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PolicyAuthorizeNV_In, nvIndex)), - (UINT16)(offsetof(PolicyAuthorizeNV_In, policySession))}, - /* types */ - {TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - TPMI_SH_POLICY_H_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PolicyAuthorizeNVDataAddress (&_PolicyAuthorizeNVData) -# else -# define _PolicyAuthorizeNVDataAddress 0 -# endif // CC_PolicyAuthorizeNV - -# if CC_CreatePrimary - -# include "CreatePrimary_fp.h" - -typedef TPM_RC(CreatePrimary_Entry)(CreatePrimary_In* in, CreatePrimary_Out* out); - -typedef const struct -{ - CreatePrimary_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[9]; - BYTE types[13]; -} CreatePrimary_COMMAND_DESCRIPTOR_t; - -CreatePrimary_COMMAND_DESCRIPTOR_t _CreatePrimaryData = { - /* entry */ &TPM2_CreatePrimary, - /* inSize */ (UINT16)(sizeof(CreatePrimary_In)), - /* outSize */ (UINT16)(sizeof(CreatePrimary_Out)), - /* offsetOfTypes */ offsetof(CreatePrimary_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(CreatePrimary_In, inSensitive)), - (UINT16)(offsetof(CreatePrimary_In, inPublic)), - (UINT16)(offsetof(CreatePrimary_In, outsideInfo)), - (UINT16)(offsetof(CreatePrimary_In, creationPCR)), - (UINT16)(offsetof(CreatePrimary_Out, outPublic)), - (UINT16)(offsetof(CreatePrimary_Out, creationData)), - (UINT16)(offsetof(CreatePrimary_Out, creationHash)), - (UINT16)(offsetof(CreatePrimary_Out, creationTicket)), - (UINT16)(offsetof(CreatePrimary_Out, name))}, - /* types */ - {TPMI_RH_HIERARCHY_H_UNMARSHAL + ADD_FLAG, - TPM2B_SENSITIVE_CREATE_P_UNMARSHAL, - TPM2B_PUBLIC_P_UNMARSHAL, - TPM2B_DATA_P_UNMARSHAL, - TPML_PCR_SELECTION_P_UNMARSHAL, - END_OF_LIST, - TPM_HANDLE_H_MARSHAL, - TPM2B_PUBLIC_P_MARSHAL, - TPM2B_CREATION_DATA_P_MARSHAL, - TPM2B_DIGEST_P_MARSHAL, - TPMT_TK_CREATION_P_MARSHAL, - TPM2B_NAME_P_MARSHAL, - END_OF_LIST}}; - -# define _CreatePrimaryDataAddress (&_CreatePrimaryData) -# else -# define _CreatePrimaryDataAddress 0 -# endif // CC_CreatePrimary - -# if CC_HierarchyControl - -# include "HierarchyControl_fp.h" - -typedef TPM_RC(HierarchyControl_Entry)(HierarchyControl_In* in); - -typedef const struct -{ - HierarchyControl_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[5]; -} HierarchyControl_COMMAND_DESCRIPTOR_t; - -HierarchyControl_COMMAND_DESCRIPTOR_t _HierarchyControlData = { - /* entry */ &TPM2_HierarchyControl, - /* inSize */ (UINT16)(sizeof(HierarchyControl_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(HierarchyControl_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(HierarchyControl_In, enable)), - (UINT16)(offsetof(HierarchyControl_In, state))}, - /* types */ - {TPMI_RH_HIERARCHY_H_UNMARSHAL, - TPMI_RH_ENABLES_P_UNMARSHAL, - TPMI_YES_NO_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _HierarchyControlDataAddress (&_HierarchyControlData) -# else -# define _HierarchyControlDataAddress 0 -# endif // CC_HierarchyControl - -# if CC_SetPrimaryPolicy - -# include "SetPrimaryPolicy_fp.h" - -typedef TPM_RC(SetPrimaryPolicy_Entry)(SetPrimaryPolicy_In* in); - -typedef const struct -{ - SetPrimaryPolicy_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[5]; -} SetPrimaryPolicy_COMMAND_DESCRIPTOR_t; - -SetPrimaryPolicy_COMMAND_DESCRIPTOR_t _SetPrimaryPolicyData = { - /* entry */ &TPM2_SetPrimaryPolicy, - /* inSize */ (UINT16)(sizeof(SetPrimaryPolicy_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(SetPrimaryPolicy_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(SetPrimaryPolicy_In, authPolicy)), - (UINT16)(offsetof(SetPrimaryPolicy_In, hashAlg))}, - /* types */ - {TPMI_RH_HIERARCHY_POLICY_H_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, - END_OF_LIST, - END_OF_LIST}}; - -# define _SetPrimaryPolicyDataAddress (&_SetPrimaryPolicyData) -# else -# define _SetPrimaryPolicyDataAddress 0 -# endif // CC_SetPrimaryPolicy - -# if CC_ChangePPS - -# include "ChangePPS_fp.h" - -typedef TPM_RC(ChangePPS_Entry)(ChangePPS_In* in); - -typedef const struct -{ - ChangePPS_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} ChangePPS_COMMAND_DESCRIPTOR_t; - -ChangePPS_COMMAND_DESCRIPTOR_t _ChangePPSData = { - /* entry */ &TPM2_ChangePPS, - /* inSize */ (UINT16)(sizeof(ChangePPS_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(ChangePPS_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_RH_PLATFORM_H_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _ChangePPSDataAddress (&_ChangePPSData) -# else -# define _ChangePPSDataAddress 0 -# endif // CC_ChangePPS - -# if CC_ChangeEPS - -# include "ChangeEPS_fp.h" - -typedef TPM_RC(ChangeEPS_Entry)(ChangeEPS_In* in); - -typedef const struct -{ - ChangeEPS_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} ChangeEPS_COMMAND_DESCRIPTOR_t; - -ChangeEPS_COMMAND_DESCRIPTOR_t _ChangeEPSData = { - /* entry */ &TPM2_ChangeEPS, - /* inSize */ (UINT16)(sizeof(ChangeEPS_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(ChangeEPS_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_RH_PLATFORM_H_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _ChangeEPSDataAddress (&_ChangeEPSData) -# else -# define _ChangeEPSDataAddress 0 -# endif // CC_ChangeEPS - -# if CC_Clear - -# include "Clear_fp.h" - -typedef TPM_RC(Clear_Entry)(Clear_In* in); - -typedef const struct -{ - Clear_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} Clear_COMMAND_DESCRIPTOR_t; - -Clear_COMMAND_DESCRIPTOR_t _ClearData = { - /* entry */ &TPM2_Clear, - /* inSize */ (UINT16)(sizeof(Clear_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(Clear_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_RH_CLEAR_H_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _ClearDataAddress (&_ClearData) -# else -# define _ClearDataAddress 0 -# endif // CC_Clear - -# if CC_ClearControl - -# include "ClearControl_fp.h" - -typedef TPM_RC(ClearControl_Entry)(ClearControl_In* in); - -typedef const struct -{ - ClearControl_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} ClearControl_COMMAND_DESCRIPTOR_t; - -ClearControl_COMMAND_DESCRIPTOR_t _ClearControlData = { - /* entry */ &TPM2_ClearControl, - /* inSize */ (UINT16)(sizeof(ClearControl_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(ClearControl_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(ClearControl_In, disable))}, - /* types */ - {TPMI_RH_CLEAR_H_UNMARSHAL, TPMI_YES_NO_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _ClearControlDataAddress (&_ClearControlData) -# else -# define _ClearControlDataAddress 0 -# endif // CC_ClearControl - -# if CC_HierarchyChangeAuth - -# include "HierarchyChangeAuth_fp.h" - -typedef TPM_RC(HierarchyChangeAuth_Entry)(HierarchyChangeAuth_In* in); - -typedef const struct -{ - HierarchyChangeAuth_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} HierarchyChangeAuth_COMMAND_DESCRIPTOR_t; - -HierarchyChangeAuth_COMMAND_DESCRIPTOR_t _HierarchyChangeAuthData = { - /* entry */ &TPM2_HierarchyChangeAuth, - /* inSize */ (UINT16)(sizeof(HierarchyChangeAuth_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(HierarchyChangeAuth_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(HierarchyChangeAuth_In, newAuth))}, - /* types */ - {TPMI_RH_HIERARCHY_AUTH_H_UNMARSHAL, - TPM2B_AUTH_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _HierarchyChangeAuthDataAddress (&_HierarchyChangeAuthData) -# else -# define _HierarchyChangeAuthDataAddress 0 -# endif // CC_HierarchyChangeAuth - -# if CC_DictionaryAttackLockReset - -# include "DictionaryAttackLockReset_fp.h" - -typedef TPM_RC(DictionaryAttackLockReset_Entry)(DictionaryAttackLockReset_In* in); - -typedef const struct -{ - DictionaryAttackLockReset_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} DictionaryAttackLockReset_COMMAND_DESCRIPTOR_t; - -DictionaryAttackLockReset_COMMAND_DESCRIPTOR_t _DictionaryAttackLockResetData = { - /* entry */ &TPM2_DictionaryAttackLockReset, - /* inSize */ (UINT16)(sizeof(DictionaryAttackLockReset_In)), - /* outSize */ 0, - /* offsetOfTypes */ - offsetof(DictionaryAttackLockReset_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_RH_LOCKOUT_H_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _DictionaryAttackLockResetDataAddress (&_DictionaryAttackLockResetData) -# else -# define _DictionaryAttackLockResetDataAddress 0 -# endif // CC_DictionaryAttackLockReset - -# if CC_DictionaryAttackParameters - -# include "DictionaryAttackParameters_fp.h" - -typedef TPM_RC(DictionaryAttackParameters_Entry)(DictionaryAttackParameters_In* in); - -typedef const struct -{ - DictionaryAttackParameters_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[6]; -} DictionaryAttackParameters_COMMAND_DESCRIPTOR_t; - -DictionaryAttackParameters_COMMAND_DESCRIPTOR_t _DictionaryAttackParametersData = { - /* entry */ &TPM2_DictionaryAttackParameters, - /* inSize */ (UINT16)(sizeof(DictionaryAttackParameters_In)), - /* outSize */ 0, - /* offsetOfTypes */ - offsetof(DictionaryAttackParameters_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(DictionaryAttackParameters_In, newMaxTries)), - (UINT16)(offsetof(DictionaryAttackParameters_In, newRecoveryTime)), - (UINT16)(offsetof(DictionaryAttackParameters_In, lockoutRecovery))}, - /* types */ - {TPMI_RH_LOCKOUT_H_UNMARSHAL, - UINT32_P_UNMARSHAL, - UINT32_P_UNMARSHAL, - UINT32_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _DictionaryAttackParametersDataAddress (&_DictionaryAttackParametersData) -# else -# define _DictionaryAttackParametersDataAddress 0 -# endif // CC_DictionaryAttackParameters - -# if CC_PP_Commands - -# include "PP_Commands_fp.h" - -typedef TPM_RC(PP_Commands_Entry)(PP_Commands_In* in); - -typedef const struct -{ - PP_Commands_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[5]; -} PP_Commands_COMMAND_DESCRIPTOR_t; - -PP_Commands_COMMAND_DESCRIPTOR_t _PP_CommandsData = { - /* entry */ &TPM2_PP_Commands, - /* inSize */ (UINT16)(sizeof(PP_Commands_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(PP_Commands_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(PP_Commands_In, setList)), - (UINT16)(offsetof(PP_Commands_In, clearList))}, - /* types */ - {TPMI_RH_PLATFORM_H_UNMARSHAL, - TPML_CC_P_UNMARSHAL, - TPML_CC_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _PP_CommandsDataAddress (&_PP_CommandsData) -# else -# define _PP_CommandsDataAddress 0 -# endif // CC_PP_Commands - -# if CC_SetAlgorithmSet - -# include "SetAlgorithmSet_fp.h" - -typedef TPM_RC(SetAlgorithmSet_Entry)(SetAlgorithmSet_In* in); - -typedef const struct -{ - SetAlgorithmSet_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} SetAlgorithmSet_COMMAND_DESCRIPTOR_t; - -SetAlgorithmSet_COMMAND_DESCRIPTOR_t _SetAlgorithmSetData = { - /* entry */ &TPM2_SetAlgorithmSet, - /* inSize */ (UINT16)(sizeof(SetAlgorithmSet_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(SetAlgorithmSet_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(SetAlgorithmSet_In, algorithmSet))}, - /* types */ - {TPMI_RH_PLATFORM_H_UNMARSHAL, UINT32_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _SetAlgorithmSetDataAddress (&_SetAlgorithmSetData) -# else -# define _SetAlgorithmSetDataAddress 0 -# endif // CC_SetAlgorithmSet - -# if CC_FieldUpgradeStart - -# include "FieldUpgradeStart_fp.h" - -typedef TPM_RC(FieldUpgradeStart_Entry)(FieldUpgradeStart_In* in); - -typedef const struct -{ - FieldUpgradeStart_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[6]; -} FieldUpgradeStart_COMMAND_DESCRIPTOR_t; - -FieldUpgradeStart_COMMAND_DESCRIPTOR_t _FieldUpgradeStartData = { - /* entry */ &TPM2_FieldUpgradeStart, - /* inSize */ (UINT16)(sizeof(FieldUpgradeStart_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(FieldUpgradeStart_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(FieldUpgradeStart_In, keyHandle)), - (UINT16)(offsetof(FieldUpgradeStart_In, fuDigest)), - (UINT16)(offsetof(FieldUpgradeStart_In, manifestSignature))}, - /* types */ - {TPMI_RH_PLATFORM_H_UNMARSHAL, - TPMI_DH_OBJECT_H_UNMARSHAL, - TPM2B_DIGEST_P_UNMARSHAL, - TPMT_SIGNATURE_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _FieldUpgradeStartDataAddress (&_FieldUpgradeStartData) -# else -# define _FieldUpgradeStartDataAddress 0 -# endif // CC_FieldUpgradeStart - -# if CC_FieldUpgradeData - -# include "FieldUpgradeData_fp.h" - -typedef TPM_RC(FieldUpgradeData_Entry)(FieldUpgradeData_In* in, - FieldUpgradeData_Out* out); - -typedef const struct -{ - FieldUpgradeData_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[5]; -} FieldUpgradeData_COMMAND_DESCRIPTOR_t; - -FieldUpgradeData_COMMAND_DESCRIPTOR_t _FieldUpgradeDataData = { - /* entry */ &TPM2_FieldUpgradeData, - /* inSize */ (UINT16)(sizeof(FieldUpgradeData_In)), - /* outSize */ (UINT16)(sizeof(FieldUpgradeData_Out)), - /* offsetOfTypes */ offsetof(FieldUpgradeData_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(FieldUpgradeData_Out, firstDigest))}, - /* types */ - {TPM2B_MAX_BUFFER_P_UNMARSHAL, - END_OF_LIST, - TPMT_HA_P_MARSHAL, - TPMT_HA_P_MARSHAL, - END_OF_LIST}}; - -# define _FieldUpgradeDataDataAddress (&_FieldUpgradeDataData) -# else -# define _FieldUpgradeDataDataAddress 0 -# endif // CC_FieldUpgradeData - -# if CC_FirmwareRead - -# include "FirmwareRead_fp.h" - -typedef TPM_RC(FirmwareRead_Entry)(FirmwareRead_In* in, FirmwareRead_Out* out); - -typedef const struct -{ - FirmwareRead_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[4]; -} FirmwareRead_COMMAND_DESCRIPTOR_t; - -FirmwareRead_COMMAND_DESCRIPTOR_t _FirmwareReadData = { - /* entry */ &TPM2_FirmwareRead, - /* inSize */ (UINT16)(sizeof(FirmwareRead_In)), - /* outSize */ (UINT16)(sizeof(FirmwareRead_Out)), - /* offsetOfTypes */ offsetof(FirmwareRead_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ - {UINT32_P_UNMARSHAL, END_OF_LIST, TPM2B_MAX_BUFFER_P_MARSHAL, END_OF_LIST}}; - -# define _FirmwareReadDataAddress (&_FirmwareReadData) -# else -# define _FirmwareReadDataAddress 0 -# endif // CC_FirmwareRead - -# if CC_ContextSave - -# include "ContextSave_fp.h" - -typedef TPM_RC(ContextSave_Entry)(ContextSave_In* in, ContextSave_Out* out); - -typedef const struct -{ - ContextSave_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[4]; -} ContextSave_COMMAND_DESCRIPTOR_t; - -ContextSave_COMMAND_DESCRIPTOR_t _ContextSaveData = { - /* entry */ &TPM2_ContextSave, - /* inSize */ (UINT16)(sizeof(ContextSave_In)), - /* outSize */ (UINT16)(sizeof(ContextSave_Out)), - /* offsetOfTypes */ offsetof(ContextSave_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ - {TPMI_DH_CONTEXT_H_UNMARSHAL, END_OF_LIST, TPMS_CONTEXT_P_MARSHAL, END_OF_LIST}}; - -# define _ContextSaveDataAddress (&_ContextSaveData) -# else -# define _ContextSaveDataAddress 0 -# endif // CC_ContextSave - -# if CC_ContextLoad - -# include "ContextLoad_fp.h" - -typedef TPM_RC(ContextLoad_Entry)(ContextLoad_In* in, ContextLoad_Out* out); - -typedef const struct -{ - ContextLoad_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[4]; -} ContextLoad_COMMAND_DESCRIPTOR_t; - -ContextLoad_COMMAND_DESCRIPTOR_t _ContextLoadData = { - /* entry */ &TPM2_ContextLoad, - /* inSize */ (UINT16)(sizeof(ContextLoad_In)), - /* outSize */ (UINT16)(sizeof(ContextLoad_Out)), - /* offsetOfTypes */ offsetof(ContextLoad_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ - {TPMS_CONTEXT_P_UNMARSHAL, END_OF_LIST, TPMI_DH_CONTEXT_H_MARSHAL, END_OF_LIST}}; - -# define _ContextLoadDataAddress (&_ContextLoadData) -# else -# define _ContextLoadDataAddress 0 -# endif // CC_ContextLoad - -# if CC_FlushContext - -# include "FlushContext_fp.h" - -typedef TPM_RC(FlushContext_Entry)(FlushContext_In* in); - -typedef const struct -{ - FlushContext_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} FlushContext_COMMAND_DESCRIPTOR_t; - -FlushContext_COMMAND_DESCRIPTOR_t _FlushContextData = { - /* entry */ &TPM2_FlushContext, - /* inSize */ (UINT16)(sizeof(FlushContext_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(FlushContext_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_DH_CONTEXT_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _FlushContextDataAddress (&_FlushContextData) -# else -# define _FlushContextDataAddress 0 -# endif // CC_FlushContext - -# if CC_EvictControl - -# include "EvictControl_fp.h" - -typedef TPM_RC(EvictControl_Entry)(EvictControl_In* in); - -typedef const struct -{ - EvictControl_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[5]; -} EvictControl_COMMAND_DESCRIPTOR_t; - -EvictControl_COMMAND_DESCRIPTOR_t _EvictControlData = { - /* entry */ &TPM2_EvictControl, - /* inSize */ (UINT16)(sizeof(EvictControl_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(EvictControl_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(EvictControl_In, objectHandle)), - (UINT16)(offsetof(EvictControl_In, persistentHandle))}, - /* types */ - {TPMI_RH_PROVISION_H_UNMARSHAL, - TPMI_DH_OBJECT_H_UNMARSHAL, - TPMI_DH_PERSISTENT_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _EvictControlDataAddress (&_EvictControlData) -# else -# define _EvictControlDataAddress 0 -# endif // CC_EvictControl - -# if CC_ReadClock - -# include "ReadClock_fp.h" - -typedef TPM_RC(ReadClock_Entry)(ReadClock_Out* out); - -typedef const struct -{ - ReadClock_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} ReadClock_COMMAND_DESCRIPTOR_t; - -ReadClock_COMMAND_DESCRIPTOR_t _ReadClockData = { - /* entry */ &TPM2_ReadClock, - /* inSize */ 0, - /* outSize */ (UINT16)(sizeof(ReadClock_Out)), - /* offsetOfTypes */ offsetof(ReadClock_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {END_OF_LIST, TPMS_TIME_INFO_P_MARSHAL, END_OF_LIST}}; - -# define _ReadClockDataAddress (&_ReadClockData) -# else -# define _ReadClockDataAddress 0 -# endif // CC_ReadClock - -# if CC_ClockSet - -# include "ClockSet_fp.h" - -typedef TPM_RC(ClockSet_Entry)(ClockSet_In* in); - -typedef const struct -{ - ClockSet_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} ClockSet_COMMAND_DESCRIPTOR_t; - -ClockSet_COMMAND_DESCRIPTOR_t _ClockSetData = { - /* entry */ &TPM2_ClockSet, - /* inSize */ (UINT16)(sizeof(ClockSet_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(ClockSet_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(ClockSet_In, newTime))}, - /* types */ - {TPMI_RH_PROVISION_H_UNMARSHAL, UINT64_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _ClockSetDataAddress (&_ClockSetData) -# else -# define _ClockSetDataAddress 0 -# endif // CC_ClockSet - -# if CC_ClockRateAdjust - -# include "ClockRateAdjust_fp.h" - -typedef TPM_RC(ClockRateAdjust_Entry)(ClockRateAdjust_In* in); - -typedef const struct -{ - ClockRateAdjust_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} ClockRateAdjust_COMMAND_DESCRIPTOR_t; - -ClockRateAdjust_COMMAND_DESCRIPTOR_t _ClockRateAdjustData = { - /* entry */ &TPM2_ClockRateAdjust, - /* inSize */ (UINT16)(sizeof(ClockRateAdjust_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(ClockRateAdjust_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(ClockRateAdjust_In, rateAdjust))}, - /* types */ - {TPMI_RH_PROVISION_H_UNMARSHAL, - TPM_CLOCK_ADJUST_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _ClockRateAdjustDataAddress (&_ClockRateAdjustData) -# else -# define _ClockRateAdjustDataAddress 0 -# endif // CC_ClockRateAdjust - -# if CC_GetCapability - -# include "GetCapability_fp.h" - -typedef TPM_RC(GetCapability_Entry)(GetCapability_In* in, GetCapability_Out* out); - -typedef const struct -{ - GetCapability_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} GetCapability_COMMAND_DESCRIPTOR_t; - -GetCapability_COMMAND_DESCRIPTOR_t _GetCapabilityData = { - /* entry */ &TPM2_GetCapability, - /* inSize */ (UINT16)(sizeof(GetCapability_In)), - /* outSize */ (UINT16)(sizeof(GetCapability_Out)), - /* offsetOfTypes */ offsetof(GetCapability_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(GetCapability_In, property)), - (UINT16)(offsetof(GetCapability_In, propertyCount)), - (UINT16)(offsetof(GetCapability_Out, capabilityData))}, - /* types */ - {TPM_CAP_P_UNMARSHAL, - UINT32_P_UNMARSHAL, - UINT32_P_UNMARSHAL, - END_OF_LIST, - TPMI_YES_NO_P_MARSHAL, - TPMS_CAPABILITY_DATA_P_MARSHAL, - END_OF_LIST}}; - -# define _GetCapabilityDataAddress (&_GetCapabilityData) -# else -# define _GetCapabilityDataAddress 0 -# endif // CC_GetCapability - -# if CC_TestParms - -# include "TestParms_fp.h" - -typedef TPM_RC(TestParms_Entry)(TestParms_In* in); - -typedef const struct -{ - TestParms_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} TestParms_COMMAND_DESCRIPTOR_t; - -TestParms_COMMAND_DESCRIPTOR_t _TestParmsData = { - /* entry */ &TPM2_TestParms, - /* inSize */ (UINT16)(sizeof(TestParms_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(TestParms_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMT_PUBLIC_PARMS_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _TestParmsDataAddress (&_TestParmsData) -# else -# define _TestParmsDataAddress 0 -# endif // CC_TestParms - -# if CC_NV_DefineSpace - -# include "NV_DefineSpace_fp.h" - -typedef TPM_RC(NV_DefineSpace_Entry)(NV_DefineSpace_In* in); - -typedef const struct -{ - NV_DefineSpace_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[5]; -} NV_DefineSpace_COMMAND_DESCRIPTOR_t; - -NV_DefineSpace_COMMAND_DESCRIPTOR_t _NV_DefineSpaceData = { - /* entry */ &TPM2_NV_DefineSpace, - /* inSize */ (UINT16)(sizeof(NV_DefineSpace_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_DefineSpace_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(NV_DefineSpace_In, auth)), - (UINT16)(offsetof(NV_DefineSpace_In, publicInfo))}, - /* types */ - {TPMI_RH_PROVISION_H_UNMARSHAL, - TPM2B_AUTH_P_UNMARSHAL, - TPM2B_NV_PUBLIC_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _NV_DefineSpaceDataAddress (&_NV_DefineSpaceData) -# else -# define _NV_DefineSpaceDataAddress 0 -# endif // CC_NV_DefineSpace - -# if CC_NV_UndefineSpace - -# include "NV_UndefineSpace_fp.h" - -typedef TPM_RC(NV_UndefineSpace_Entry)(NV_UndefineSpace_In* in); - -typedef const struct -{ - NV_UndefineSpace_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} NV_UndefineSpace_COMMAND_DESCRIPTOR_t; - -NV_UndefineSpace_COMMAND_DESCRIPTOR_t _NV_UndefineSpaceData = { - /* entry */ &TPM2_NV_UndefineSpace, - /* inSize */ (UINT16)(sizeof(NV_UndefineSpace_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_UndefineSpace_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(NV_UndefineSpace_In, nvIndex))}, - /* types */ - {TPMI_RH_PROVISION_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _NV_UndefineSpaceDataAddress (&_NV_UndefineSpaceData) -# else -# define _NV_UndefineSpaceDataAddress 0 -# endif // CC_NV_UndefineSpace - -# if CC_NV_UndefineSpaceSpecial - -# include "NV_UndefineSpaceSpecial_fp.h" - -typedef TPM_RC(NV_UndefineSpaceSpecial_Entry)(NV_UndefineSpaceSpecial_In* in); - -typedef const struct -{ - NV_UndefineSpaceSpecial_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} NV_UndefineSpaceSpecial_COMMAND_DESCRIPTOR_t; - -NV_UndefineSpaceSpecial_COMMAND_DESCRIPTOR_t _NV_UndefineSpaceSpecialData = { - /* entry */ &TPM2_NV_UndefineSpaceSpecial, - /* inSize */ (UINT16)(sizeof(NV_UndefineSpaceSpecial_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_UndefineSpaceSpecial_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(NV_UndefineSpaceSpecial_In, platform))}, - /* types */ - {TPMI_RH_NV_INDEX_H_UNMARSHAL, - TPMI_RH_PLATFORM_H_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _NV_UndefineSpaceSpecialDataAddress (&_NV_UndefineSpaceSpecialData) -# else -# define _NV_UndefineSpaceSpecialDataAddress 0 -# endif // CC_NV_UndefineSpaceSpecial - -# if CC_NV_ReadPublic - -# include "NV_ReadPublic_fp.h" - -typedef TPM_RC(NV_ReadPublic_Entry)(NV_ReadPublic_In* in, NV_ReadPublic_Out* out); - -typedef const struct -{ - NV_ReadPublic_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[5]; -} NV_ReadPublic_COMMAND_DESCRIPTOR_t; - -NV_ReadPublic_COMMAND_DESCRIPTOR_t _NV_ReadPublicData = { - /* entry */ &TPM2_NV_ReadPublic, - /* inSize */ (UINT16)(sizeof(NV_ReadPublic_In)), - /* outSize */ (UINT16)(sizeof(NV_ReadPublic_Out)), - /* offsetOfTypes */ offsetof(NV_ReadPublic_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(NV_ReadPublic_Out, nvName))}, - /* types */ - {TPMI_RH_NV_INDEX_H_UNMARSHAL, - END_OF_LIST, - TPM2B_NV_PUBLIC_P_MARSHAL, - TPM2B_NAME_P_MARSHAL, - END_OF_LIST}}; - -# define _NV_ReadPublicDataAddress (&_NV_ReadPublicData) -# else -# define _NV_ReadPublicDataAddress 0 -# endif // CC_NV_ReadPublic - -# if CC_NV_Write - -# include "NV_Write_fp.h" - -typedef TPM_RC(NV_Write_Entry)(NV_Write_In* in); - -typedef const struct -{ - NV_Write_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[6]; -} NV_Write_COMMAND_DESCRIPTOR_t; - -NV_Write_COMMAND_DESCRIPTOR_t _NV_WriteData = { - /* entry */ &TPM2_NV_Write, - /* inSize */ (UINT16)(sizeof(NV_Write_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_Write_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(NV_Write_In, nvIndex)), - (UINT16)(offsetof(NV_Write_In, data)), - (UINT16)(offsetof(NV_Write_In, offset))}, - /* types */ - {TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - TPM2B_MAX_NV_BUFFER_P_UNMARSHAL, - UINT16_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _NV_WriteDataAddress (&_NV_WriteData) -# else -# define _NV_WriteDataAddress 0 -# endif // CC_NV_Write - -# if CC_NV_Increment - -# include "NV_Increment_fp.h" - -typedef TPM_RC(NV_Increment_Entry)(NV_Increment_In* in); - -typedef const struct -{ - NV_Increment_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} NV_Increment_COMMAND_DESCRIPTOR_t; - -NV_Increment_COMMAND_DESCRIPTOR_t _NV_IncrementData = { - /* entry */ &TPM2_NV_Increment, - /* inSize */ (UINT16)(sizeof(NV_Increment_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_Increment_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(NV_Increment_In, nvIndex))}, - /* types */ - {TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _NV_IncrementDataAddress (&_NV_IncrementData) -# else -# define _NV_IncrementDataAddress 0 -# endif // CC_NV_Increment - -# if CC_NV_Extend - -# include "NV_Extend_fp.h" - -typedef TPM_RC(NV_Extend_Entry)(NV_Extend_In* in); - -typedef const struct -{ - NV_Extend_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[5]; -} NV_Extend_COMMAND_DESCRIPTOR_t; - -NV_Extend_COMMAND_DESCRIPTOR_t _NV_ExtendData = { - /* entry */ &TPM2_NV_Extend, - /* inSize */ (UINT16)(sizeof(NV_Extend_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_Extend_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(NV_Extend_In, nvIndex)), - (UINT16)(offsetof(NV_Extend_In, data))}, - /* types */ - {TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - TPM2B_MAX_NV_BUFFER_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _NV_ExtendDataAddress (&_NV_ExtendData) -# else -# define _NV_ExtendDataAddress 0 -# endif // CC_NV_Extend - -# if CC_NV_SetBits - -# include "NV_SetBits_fp.h" - -typedef TPM_RC(NV_SetBits_Entry)(NV_SetBits_In* in); - -typedef const struct -{ - NV_SetBits_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[2]; - BYTE types[5]; -} NV_SetBits_COMMAND_DESCRIPTOR_t; - -NV_SetBits_COMMAND_DESCRIPTOR_t _NV_SetBitsData = { - /* entry */ &TPM2_NV_SetBits, - /* inSize */ (UINT16)(sizeof(NV_SetBits_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_SetBits_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(NV_SetBits_In, nvIndex)), - (UINT16)(offsetof(NV_SetBits_In, bits))}, - /* types */ - {TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - UINT64_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _NV_SetBitsDataAddress (&_NV_SetBitsData) -# else -# define _NV_SetBitsDataAddress 0 -# endif // CC_NV_SetBits - -# if CC_NV_WriteLock - -# include "NV_WriteLock_fp.h" - -typedef TPM_RC(NV_WriteLock_Entry)(NV_WriteLock_In* in); - -typedef const struct -{ - NV_WriteLock_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} NV_WriteLock_COMMAND_DESCRIPTOR_t; - -NV_WriteLock_COMMAND_DESCRIPTOR_t _NV_WriteLockData = { - /* entry */ &TPM2_NV_WriteLock, - /* inSize */ (UINT16)(sizeof(NV_WriteLock_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_WriteLock_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(NV_WriteLock_In, nvIndex))}, - /* types */ - {TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _NV_WriteLockDataAddress (&_NV_WriteLockData) -# else -# define _NV_WriteLockDataAddress 0 -# endif // CC_NV_WriteLock - -# if CC_NV_GlobalWriteLock - -# include "NV_GlobalWriteLock_fp.h" - -typedef TPM_RC(NV_GlobalWriteLock_Entry)(NV_GlobalWriteLock_In* in); - -typedef const struct -{ - NV_GlobalWriteLock_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[3]; -} NV_GlobalWriteLock_COMMAND_DESCRIPTOR_t; - -NV_GlobalWriteLock_COMMAND_DESCRIPTOR_t _NV_GlobalWriteLockData = { - /* entry */ &TPM2_NV_GlobalWriteLock, - /* inSize */ (UINT16)(sizeof(NV_GlobalWriteLock_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_GlobalWriteLock_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ {TPMI_RH_PROVISION_H_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _NV_GlobalWriteLockDataAddress (&_NV_GlobalWriteLockData) -# else -# define _NV_GlobalWriteLockDataAddress 0 -# endif // CC_NV_GlobalWriteLock - -# if CC_NV_Read - -# include "NV_Read_fp.h" - -typedef TPM_RC(NV_Read_Entry)(NV_Read_In* in, NV_Read_Out* out); - -typedef const struct -{ - NV_Read_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} NV_Read_COMMAND_DESCRIPTOR_t; - -NV_Read_COMMAND_DESCRIPTOR_t _NV_ReadData = { - /* entry */ &TPM2_NV_Read, - /* inSize */ (UINT16)(sizeof(NV_Read_In)), - /* outSize */ (UINT16)(sizeof(NV_Read_Out)), - /* offsetOfTypes */ offsetof(NV_Read_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(NV_Read_In, nvIndex)), - (UINT16)(offsetof(NV_Read_In, size)), - (UINT16)(offsetof(NV_Read_In, offset))}, - /* types */ - {TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - UINT16_P_UNMARSHAL, - UINT16_P_UNMARSHAL, - END_OF_LIST, - TPM2B_MAX_NV_BUFFER_P_MARSHAL, - END_OF_LIST}}; - -# define _NV_ReadDataAddress (&_NV_ReadData) -# else -# define _NV_ReadDataAddress 0 -# endif // CC_NV_Read - -# if CC_NV_ReadLock - -# include "NV_ReadLock_fp.h" - -typedef TPM_RC(NV_ReadLock_Entry)(NV_ReadLock_In* in); - -typedef const struct -{ - NV_ReadLock_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} NV_ReadLock_COMMAND_DESCRIPTOR_t; - -NV_ReadLock_COMMAND_DESCRIPTOR_t _NV_ReadLockData = { - /* entry */ &TPM2_NV_ReadLock, - /* inSize */ (UINT16)(sizeof(NV_ReadLock_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_ReadLock_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(NV_ReadLock_In, nvIndex))}, - /* types */ - {TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _NV_ReadLockDataAddress (&_NV_ReadLockData) -# else -# define _NV_ReadLockDataAddress 0 -# endif // CC_NV_ReadLock - -# if CC_NV_ChangeAuth - -# include "NV_ChangeAuth_fp.h" - -typedef TPM_RC(NV_ChangeAuth_Entry)(NV_ChangeAuth_In* in); - -typedef const struct -{ - NV_ChangeAuth_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} NV_ChangeAuth_COMMAND_DESCRIPTOR_t; - -NV_ChangeAuth_COMMAND_DESCRIPTOR_t _NV_ChangeAuthData = { - /* entry */ &TPM2_NV_ChangeAuth, - /* inSize */ (UINT16)(sizeof(NV_ChangeAuth_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(NV_ChangeAuth_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(NV_ChangeAuth_In, newAuth))}, - /* types */ - {TPMI_RH_NV_INDEX_H_UNMARSHAL, TPM2B_AUTH_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _NV_ChangeAuthDataAddress (&_NV_ChangeAuthData) -# else -# define _NV_ChangeAuthDataAddress 0 -# endif // CC_NV_ChangeAuth - -# if CC_NV_Certify - -# include "NV_Certify_fp.h" - -typedef TPM_RC(NV_Certify_Entry)(NV_Certify_In* in, NV_Certify_Out* out); - -typedef const struct -{ - NV_Certify_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[7]; - BYTE types[11]; -} NV_Certify_COMMAND_DESCRIPTOR_t; - -NV_Certify_COMMAND_DESCRIPTOR_t _NV_CertifyData = { - /* entry */ &TPM2_NV_Certify, - /* inSize */ (UINT16)(sizeof(NV_Certify_In)), - /* outSize */ (UINT16)(sizeof(NV_Certify_Out)), - /* offsetOfTypes */ offsetof(NV_Certify_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(NV_Certify_In, authHandle)), - (UINT16)(offsetof(NV_Certify_In, nvIndex)), - (UINT16)(offsetof(NV_Certify_In, qualifyingData)), - (UINT16)(offsetof(NV_Certify_In, inScheme)), - (UINT16)(offsetof(NV_Certify_In, size)), - (UINT16)(offsetof(NV_Certify_In, offset)), - (UINT16)(offsetof(NV_Certify_Out, signature))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, - TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_NV_INDEX_H_UNMARSHAL, - TPM2B_DATA_P_UNMARSHAL, - TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, - UINT16_P_UNMARSHAL, - UINT16_P_UNMARSHAL, - END_OF_LIST, - TPM2B_ATTEST_P_MARSHAL, - TPMT_SIGNATURE_P_MARSHAL, - END_OF_LIST}}; - -# define _NV_CertifyDataAddress (&_NV_CertifyData) -# else -# define _NV_CertifyDataAddress 0 -# endif // CC_NV_Certify - -# if CC_AC_GetCapability - -# include "AC_GetCapability_fp.h" - -typedef TPM_RC(AC_GetCapability_Entry)(AC_GetCapability_In* in, - AC_GetCapability_Out* out); - -typedef const struct -{ - AC_GetCapability_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} AC_GetCapability_COMMAND_DESCRIPTOR_t; - -AC_GetCapability_COMMAND_DESCRIPTOR_t _AC_GetCapabilityData = { - /* entry */ &TPM2_AC_GetCapability, - /* inSize */ (UINT16)(sizeof(AC_GetCapability_In)), - /* outSize */ (UINT16)(sizeof(AC_GetCapability_Out)), - /* offsetOfTypes */ offsetof(AC_GetCapability_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(AC_GetCapability_In, capability)), - (UINT16)(offsetof(AC_GetCapability_In, count)), - (UINT16)(offsetof(AC_GetCapability_Out, capabilitiesData))}, - /* types */ - {TPMI_RH_AC_H_UNMARSHAL, - TPM_AT_P_UNMARSHAL, - UINT32_P_UNMARSHAL, - END_OF_LIST, - TPMI_YES_NO_P_MARSHAL, - TPML_AC_CAPABILITIES_P_MARSHAL, - END_OF_LIST}}; - -# define _AC_GetCapabilityDataAddress (&_AC_GetCapabilityData) -# else -# define _AC_GetCapabilityDataAddress 0 -# endif // CC_AC_GetCapability - -# if CC_AC_Send - -# include "AC_Send_fp.h" - -typedef TPM_RC(AC_Send_Entry)(AC_Send_In* in, AC_Send_Out* out); - -typedef const struct -{ - AC_Send_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[3]; - BYTE types[7]; -} AC_Send_COMMAND_DESCRIPTOR_t; - -AC_Send_COMMAND_DESCRIPTOR_t _AC_SendData = { - /* entry */ &TPM2_AC_Send, - /* inSize */ (UINT16)(sizeof(AC_Send_In)), - /* outSize */ (UINT16)(sizeof(AC_Send_Out)), - /* offsetOfTypes */ offsetof(AC_Send_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(AC_Send_In, authHandle)), - (UINT16)(offsetof(AC_Send_In, ac)), - (UINT16)(offsetof(AC_Send_In, acDataIn))}, - /* types */ - {TPMI_DH_OBJECT_H_UNMARSHAL, - TPMI_RH_NV_AUTH_H_UNMARSHAL, - TPMI_RH_AC_H_UNMARSHAL, - TPM2B_MAX_BUFFER_P_UNMARSHAL, - END_OF_LIST, - TPMS_AC_OUTPUT_P_MARSHAL, - END_OF_LIST}}; - -# define _AC_SendDataAddress (&_AC_SendData) -# else -# define _AC_SendDataAddress 0 -# endif // CC_AC_Send - -# if CC_Policy_AC_SendSelect - -# include "Policy_AC_SendSelect_fp.h" - -typedef TPM_RC(Policy_AC_SendSelect_Entry)(Policy_AC_SendSelect_In* in); - -typedef const struct -{ - Policy_AC_SendSelect_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[4]; - BYTE types[7]; -} Policy_AC_SendSelect_COMMAND_DESCRIPTOR_t; - -Policy_AC_SendSelect_COMMAND_DESCRIPTOR_t _Policy_AC_SendSelectData = { - /* entry */ &TPM2_Policy_AC_SendSelect, - /* inSize */ (UINT16)(sizeof(Policy_AC_SendSelect_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(Policy_AC_SendSelect_COMMAND_DESCRIPTOR_t, types), - /* offsets */ - {(UINT16)(offsetof(Policy_AC_SendSelect_In, objectName)), - (UINT16)(offsetof(Policy_AC_SendSelect_In, authHandleName)), - (UINT16)(offsetof(Policy_AC_SendSelect_In, acName)), - (UINT16)(offsetof(Policy_AC_SendSelect_In, includeObject))}, - /* types */ - {TPMI_SH_POLICY_H_UNMARSHAL, - TPM2B_NAME_P_UNMARSHAL, - TPM2B_NAME_P_UNMARSHAL, - TPM2B_NAME_P_UNMARSHAL, - TPMI_YES_NO_P_UNMARSHAL, - END_OF_LIST, - END_OF_LIST}}; - -# define _Policy_AC_SendSelectDataAddress (&_Policy_AC_SendSelectData) -# else -# define _Policy_AC_SendSelectDataAddress 0 -# endif // CC_Policy_AC_SendSelect - -# if CC_ACT_SetTimeout - -# include "ACT_SetTimeout_fp.h" - -typedef TPM_RC(ACT_SetTimeout_Entry)(ACT_SetTimeout_In* in); - -typedef const struct -{ - ACT_SetTimeout_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - UINT16 paramOffsets[1]; - BYTE types[4]; -} ACT_SetTimeout_COMMAND_DESCRIPTOR_t; - -ACT_SetTimeout_COMMAND_DESCRIPTOR_t _ACT_SetTimeoutData = { - /* entry */ &TPM2_ACT_SetTimeout, - /* inSize */ (UINT16)(sizeof(ACT_SetTimeout_In)), - /* outSize */ 0, - /* offsetOfTypes */ offsetof(ACT_SetTimeout_COMMAND_DESCRIPTOR_t, types), - /* offsets */ {(UINT16)(offsetof(ACT_SetTimeout_In, startTimeout))}, - /* types */ - {TPMI_RH_ACT_H_UNMARSHAL, UINT32_P_UNMARSHAL, END_OF_LIST, END_OF_LIST}}; - -# define _ACT_SetTimeoutDataAddress (&_ACT_SetTimeoutData) -# else -# define _ACT_SetTimeoutDataAddress 0 -# endif // CC_ACT_SetTimeout - -# if CC_Vendor_TCG_Test - -# include "Vendor_TCG_Test_fp.h" - -typedef TPM_RC(Vendor_TCG_Test_Entry)(Vendor_TCG_Test_In* in, - Vendor_TCG_Test_Out* out); - -typedef const struct -{ - Vendor_TCG_Test_Entry* entry; - UINT16 inSize; - UINT16 outSize; - UINT16 offsetOfTypes; - BYTE types[4]; -} Vendor_TCG_Test_COMMAND_DESCRIPTOR_t; - -Vendor_TCG_Test_COMMAND_DESCRIPTOR_t _Vendor_TCG_TestData = { - /* entry */ &TPM2_Vendor_TCG_Test, - /* inSize */ (UINT16)(sizeof(Vendor_TCG_Test_In)), - /* outSize */ (UINT16)(sizeof(Vendor_TCG_Test_Out)), - /* offsetOfTypes */ offsetof(Vendor_TCG_Test_COMMAND_DESCRIPTOR_t, types), - /* offsets */ // No parameter offsets; - /* types */ - {TPM2B_DATA_P_UNMARSHAL, END_OF_LIST, TPM2B_DATA_P_MARSHAL, END_OF_LIST}}; - -# define _Vendor_TCG_TestDataAddress (&_Vendor_TCG_TestData) -# else -# define _Vendor_TCG_TestDataAddress 0 -# endif // CC_Vendor_TCG_Test - -COMMAND_DESCRIPTOR_t* s_CommandDataArray[] = { -# if(PAD_LIST || CC_NV_UndefineSpaceSpecial) - (COMMAND_DESCRIPTOR_t*)_NV_UndefineSpaceSpecialDataAddress, -# endif // CC_NV_UndefineSpaceSpecial -# if(PAD_LIST || CC_EvictControl) - (COMMAND_DESCRIPTOR_t*)_EvictControlDataAddress, -# endif // CC_EvictControl -# if(PAD_LIST || CC_HierarchyControl) - (COMMAND_DESCRIPTOR_t*)_HierarchyControlDataAddress, -# endif // CC_HierarchyControl -# if(PAD_LIST || CC_NV_UndefineSpace) - (COMMAND_DESCRIPTOR_t*)_NV_UndefineSpaceDataAddress, -# endif // CC_NV_UndefineSpace -# if(PAD_LIST) - (COMMAND_DESCRIPTOR_t*)0, -# endif // -# if(PAD_LIST || CC_ChangeEPS) - (COMMAND_DESCRIPTOR_t*)_ChangeEPSDataAddress, -# endif // CC_ChangeEPS -# if(PAD_LIST || CC_ChangePPS) - (COMMAND_DESCRIPTOR_t*)_ChangePPSDataAddress, -# endif // CC_ChangePPS -# if(PAD_LIST || CC_Clear) - (COMMAND_DESCRIPTOR_t*)_ClearDataAddress, -# endif // CC_Clear -# if(PAD_LIST || CC_ClearControl) - (COMMAND_DESCRIPTOR_t*)_ClearControlDataAddress, -# endif // CC_ClearControl -# if(PAD_LIST || CC_ClockSet) - (COMMAND_DESCRIPTOR_t*)_ClockSetDataAddress, -# endif // CC_ClockSet -# if(PAD_LIST || CC_HierarchyChangeAuth) - (COMMAND_DESCRIPTOR_t*)_HierarchyChangeAuthDataAddress, -# endif // CC_HierarchyChangeAuth -# if(PAD_LIST || CC_NV_DefineSpace) - (COMMAND_DESCRIPTOR_t*)_NV_DefineSpaceDataAddress, -# endif // CC_NV_DefineSpace -# if(PAD_LIST || CC_PCR_Allocate) - (COMMAND_DESCRIPTOR_t*)_PCR_AllocateDataAddress, -# endif // CC_PCR_Allocate -# if(PAD_LIST || CC_PCR_SetAuthPolicy) - (COMMAND_DESCRIPTOR_t*)_PCR_SetAuthPolicyDataAddress, -# endif // CC_PCR_SetAuthPolicy -# if(PAD_LIST || CC_PP_Commands) - (COMMAND_DESCRIPTOR_t*)_PP_CommandsDataAddress, -# endif // CC_PP_Commands -# if(PAD_LIST || CC_SetPrimaryPolicy) - (COMMAND_DESCRIPTOR_t*)_SetPrimaryPolicyDataAddress, -# endif // CC_SetPrimaryPolicy -# if(PAD_LIST || CC_FieldUpgradeStart) - (COMMAND_DESCRIPTOR_t*)_FieldUpgradeStartDataAddress, -# endif // CC_FieldUpgradeStart -# if(PAD_LIST || CC_ClockRateAdjust) - (COMMAND_DESCRIPTOR_t*)_ClockRateAdjustDataAddress, -# endif // CC_ClockRateAdjust -# if(PAD_LIST || CC_CreatePrimary) - (COMMAND_DESCRIPTOR_t*)_CreatePrimaryDataAddress, -# endif // CC_CreatePrimary -# if(PAD_LIST || CC_NV_GlobalWriteLock) - (COMMAND_DESCRIPTOR_t*)_NV_GlobalWriteLockDataAddress, -# endif // CC_NV_GlobalWriteLock -# if(PAD_LIST || CC_GetCommandAuditDigest) - (COMMAND_DESCRIPTOR_t*)_GetCommandAuditDigestDataAddress, -# endif // CC_GetCommandAuditDigest -# if(PAD_LIST || CC_NV_Increment) - (COMMAND_DESCRIPTOR_t*)_NV_IncrementDataAddress, -# endif // CC_NV_Increment -# if(PAD_LIST || CC_NV_SetBits) - (COMMAND_DESCRIPTOR_t*)_NV_SetBitsDataAddress, -# endif // CC_NV_SetBits -# if(PAD_LIST || CC_NV_Extend) - (COMMAND_DESCRIPTOR_t*)_NV_ExtendDataAddress, -# endif // CC_NV_Extend -# if(PAD_LIST || CC_NV_Write) - (COMMAND_DESCRIPTOR_t*)_NV_WriteDataAddress, -# endif // CC_NV_Write -# if(PAD_LIST || CC_NV_WriteLock) - (COMMAND_DESCRIPTOR_t*)_NV_WriteLockDataAddress, -# endif // CC_NV_WriteLock -# if(PAD_LIST || CC_DictionaryAttackLockReset) - (COMMAND_DESCRIPTOR_t*)_DictionaryAttackLockResetDataAddress, -# endif // CC_DictionaryAttackLockReset -# if(PAD_LIST || CC_DictionaryAttackParameters) - (COMMAND_DESCRIPTOR_t*)_DictionaryAttackParametersDataAddress, -# endif // CC_DictionaryAttackParameters -# if(PAD_LIST || CC_NV_ChangeAuth) - (COMMAND_DESCRIPTOR_t*)_NV_ChangeAuthDataAddress, -# endif // CC_NV_ChangeAuth -# if(PAD_LIST || CC_PCR_Event) - (COMMAND_DESCRIPTOR_t*)_PCR_EventDataAddress, -# endif // CC_PCR_Event -# if(PAD_LIST || CC_PCR_Reset) - (COMMAND_DESCRIPTOR_t*)_PCR_ResetDataAddress, -# endif // CC_PCR_Reset -# if(PAD_LIST || CC_SequenceComplete) - (COMMAND_DESCRIPTOR_t*)_SequenceCompleteDataAddress, -# endif // CC_SequenceComplete -# if(PAD_LIST || CC_SetAlgorithmSet) - (COMMAND_DESCRIPTOR_t*)_SetAlgorithmSetDataAddress, -# endif // CC_SetAlgorithmSet -# if(PAD_LIST || CC_SetCommandCodeAuditStatus) - (COMMAND_DESCRIPTOR_t*)_SetCommandCodeAuditStatusDataAddress, -# endif // CC_SetCommandCodeAuditStatus -# if(PAD_LIST || CC_FieldUpgradeData) - (COMMAND_DESCRIPTOR_t*)_FieldUpgradeDataDataAddress, -# endif // CC_FieldUpgradeData -# if(PAD_LIST || CC_IncrementalSelfTest) - (COMMAND_DESCRIPTOR_t*)_IncrementalSelfTestDataAddress, -# endif // CC_IncrementalSelfTest -# if(PAD_LIST || CC_SelfTest) - (COMMAND_DESCRIPTOR_t*)_SelfTestDataAddress, -# endif // CC_SelfTest -# if(PAD_LIST || CC_Startup) - (COMMAND_DESCRIPTOR_t*)_StartupDataAddress, -# endif // CC_Startup -# if(PAD_LIST || CC_Shutdown) - (COMMAND_DESCRIPTOR_t*)_ShutdownDataAddress, -# endif // CC_Shutdown -# if(PAD_LIST || CC_StirRandom) - (COMMAND_DESCRIPTOR_t*)_StirRandomDataAddress, -# endif // CC_StirRandom -# if(PAD_LIST || CC_ActivateCredential) - (COMMAND_DESCRIPTOR_t*)_ActivateCredentialDataAddress, -# endif // CC_ActivateCredential -# if(PAD_LIST || CC_Certify) - (COMMAND_DESCRIPTOR_t*)_CertifyDataAddress, -# endif // CC_Certify -# if(PAD_LIST || CC_PolicyNV) - (COMMAND_DESCRIPTOR_t*)_PolicyNVDataAddress, -# endif // CC_PolicyNV -# if(PAD_LIST || CC_CertifyCreation) - (COMMAND_DESCRIPTOR_t*)_CertifyCreationDataAddress, -# endif // CC_CertifyCreation -# if(PAD_LIST || CC_Duplicate) - (COMMAND_DESCRIPTOR_t*)_DuplicateDataAddress, -# endif // CC_Duplicate -# if(PAD_LIST || CC_GetTime) - (COMMAND_DESCRIPTOR_t*)_GetTimeDataAddress, -# endif // CC_GetTime -# if(PAD_LIST || CC_GetSessionAuditDigest) - (COMMAND_DESCRIPTOR_t*)_GetSessionAuditDigestDataAddress, -# endif // CC_GetSessionAuditDigest -# if(PAD_LIST || CC_NV_Read) - (COMMAND_DESCRIPTOR_t*)_NV_ReadDataAddress, -# endif // CC_NV_Read -# if(PAD_LIST || CC_NV_ReadLock) - (COMMAND_DESCRIPTOR_t*)_NV_ReadLockDataAddress, -# endif // CC_NV_ReadLock -# if(PAD_LIST || CC_ObjectChangeAuth) - (COMMAND_DESCRIPTOR_t*)_ObjectChangeAuthDataAddress, -# endif // CC_ObjectChangeAuth -# if(PAD_LIST || CC_PolicySecret) - (COMMAND_DESCRIPTOR_t*)_PolicySecretDataAddress, -# endif // CC_PolicySecret -# if(PAD_LIST || CC_Rewrap) - (COMMAND_DESCRIPTOR_t*)_RewrapDataAddress, -# endif // CC_Rewrap -# if(PAD_LIST || CC_Create) - (COMMAND_DESCRIPTOR_t*)_CreateDataAddress, -# endif // CC_Create -# if(PAD_LIST || CC_ECDH_ZGen) - (COMMAND_DESCRIPTOR_t*)_ECDH_ZGenDataAddress, -# endif // CC_ECDH_ZGen -# if(PAD_LIST || (CC_HMAC || CC_MAC)) -# if CC_HMAC - (COMMAND_DESCRIPTOR_t*)_HMACDataAddress, -# endif -# if CC_MAC - (COMMAND_DESCRIPTOR_t*)_MACDataAddress, -# endif -# if(CC_HMAC || CC_MAC) > 1 -# error "More than one aliased command defined" -# endif -# endif // CC_HMAC CC_MAC -# if(PAD_LIST || CC_Import) - (COMMAND_DESCRIPTOR_t*)_ImportDataAddress, -# endif // CC_Import -# if(PAD_LIST || CC_Load) - (COMMAND_DESCRIPTOR_t*)_LoadDataAddress, -# endif // CC_Load -# if(PAD_LIST || CC_Quote) - (COMMAND_DESCRIPTOR_t*)_QuoteDataAddress, -# endif // CC_Quote -# if(PAD_LIST || CC_RSA_Decrypt) - (COMMAND_DESCRIPTOR_t*)_RSA_DecryptDataAddress, -# endif // CC_RSA_Decrypt -# if(PAD_LIST) - (COMMAND_DESCRIPTOR_t*)0, -# endif // -# if(PAD_LIST || (CC_HMAC_Start || CC_MAC_Start)) -# if CC_HMAC_Start - (COMMAND_DESCRIPTOR_t*)_HMAC_StartDataAddress, -# endif -# if CC_MAC_Start - (COMMAND_DESCRIPTOR_t*)_MAC_StartDataAddress, -# endif -# if(CC_HMAC_Start || CC_MAC_Start) > 1 -# error "More than one aliased command defined" -# endif -# endif // CC_HMAC_Start CC_MAC_Start -# if(PAD_LIST || CC_SequenceUpdate) - (COMMAND_DESCRIPTOR_t*)_SequenceUpdateDataAddress, -# endif // CC_SequenceUpdate -# if(PAD_LIST || CC_Sign) - (COMMAND_DESCRIPTOR_t*)_SignDataAddress, -# endif // CC_Sign -# if(PAD_LIST || CC_Unseal) - (COMMAND_DESCRIPTOR_t*)_UnsealDataAddress, -# endif // CC_Unseal -# if(PAD_LIST) - (COMMAND_DESCRIPTOR_t*)0, -# endif // -# if(PAD_LIST || CC_PolicySigned) - (COMMAND_DESCRIPTOR_t*)_PolicySignedDataAddress, -# endif // CC_PolicySigned -# if(PAD_LIST || CC_ContextLoad) - (COMMAND_DESCRIPTOR_t*)_ContextLoadDataAddress, -# endif // CC_ContextLoad -# if(PAD_LIST || CC_ContextSave) - (COMMAND_DESCRIPTOR_t*)_ContextSaveDataAddress, -# endif // CC_ContextSave -# if(PAD_LIST || CC_ECDH_KeyGen) - (COMMAND_DESCRIPTOR_t*)_ECDH_KeyGenDataAddress, -# endif // CC_ECDH_KeyGen -# if(PAD_LIST || CC_EncryptDecrypt) - (COMMAND_DESCRIPTOR_t*)_EncryptDecryptDataAddress, -# endif // CC_EncryptDecrypt -# if(PAD_LIST || CC_FlushContext) - (COMMAND_DESCRIPTOR_t*)_FlushContextDataAddress, -# endif // CC_FlushContext -# if(PAD_LIST) - (COMMAND_DESCRIPTOR_t*)0, -# endif // -# if(PAD_LIST || CC_LoadExternal) - (COMMAND_DESCRIPTOR_t*)_LoadExternalDataAddress, -# endif // CC_LoadExternal -# if(PAD_LIST || CC_MakeCredential) - (COMMAND_DESCRIPTOR_t*)_MakeCredentialDataAddress, -# endif // CC_MakeCredential -# if(PAD_LIST || CC_NV_ReadPublic) - (COMMAND_DESCRIPTOR_t*)_NV_ReadPublicDataAddress, -# endif // CC_NV_ReadPublic -# if(PAD_LIST || CC_PolicyAuthorize) - (COMMAND_DESCRIPTOR_t*)_PolicyAuthorizeDataAddress, -# endif // CC_PolicyAuthorize -# if(PAD_LIST || CC_PolicyAuthValue) - (COMMAND_DESCRIPTOR_t*)_PolicyAuthValueDataAddress, -# endif // CC_PolicyAuthValue -# if(PAD_LIST || CC_PolicyCommandCode) - (COMMAND_DESCRIPTOR_t*)_PolicyCommandCodeDataAddress, -# endif // CC_PolicyCommandCode -# if(PAD_LIST || CC_PolicyCounterTimer) - (COMMAND_DESCRIPTOR_t*)_PolicyCounterTimerDataAddress, -# endif // CC_PolicyCounterTimer -# if(PAD_LIST || CC_PolicyCpHash) - (COMMAND_DESCRIPTOR_t*)_PolicyCpHashDataAddress, -# endif // CC_PolicyCpHash -# if(PAD_LIST || CC_PolicyLocality) - (COMMAND_DESCRIPTOR_t*)_PolicyLocalityDataAddress, -# endif // CC_PolicyLocality -# if(PAD_LIST || CC_PolicyNameHash) - (COMMAND_DESCRIPTOR_t*)_PolicyNameHashDataAddress, -# endif // CC_PolicyNameHash -# if(PAD_LIST || CC_PolicyOR) - (COMMAND_DESCRIPTOR_t*)_PolicyORDataAddress, -# endif // CC_PolicyOR -# if(PAD_LIST || CC_PolicyTicket) - (COMMAND_DESCRIPTOR_t*)_PolicyTicketDataAddress, -# endif // CC_PolicyTicket -# if(PAD_LIST || CC_ReadPublic) - (COMMAND_DESCRIPTOR_t*)_ReadPublicDataAddress, -# endif // CC_ReadPublic -# if(PAD_LIST || CC_RSA_Encrypt) - (COMMAND_DESCRIPTOR_t*)_RSA_EncryptDataAddress, -# endif // CC_RSA_Encrypt -# if(PAD_LIST) - (COMMAND_DESCRIPTOR_t*)0, -# endif // -# if(PAD_LIST || CC_StartAuthSession) - (COMMAND_DESCRIPTOR_t*)_StartAuthSessionDataAddress, -# endif // CC_StartAuthSession -# if(PAD_LIST || CC_VerifySignature) - (COMMAND_DESCRIPTOR_t*)_VerifySignatureDataAddress, -# endif // CC_VerifySignature -# if(PAD_LIST || CC_ECC_Parameters) - (COMMAND_DESCRIPTOR_t*)_ECC_ParametersDataAddress, -# endif // CC_ECC_Parameters -# if(PAD_LIST || CC_FirmwareRead) - (COMMAND_DESCRIPTOR_t*)_FirmwareReadDataAddress, -# endif // CC_FirmwareRead -# if(PAD_LIST || CC_GetCapability) - (COMMAND_DESCRIPTOR_t*)_GetCapabilityDataAddress, -# endif // CC_GetCapability -# if(PAD_LIST || CC_GetRandom) - (COMMAND_DESCRIPTOR_t*)_GetRandomDataAddress, -# endif // CC_GetRandom -# if(PAD_LIST || CC_GetTestResult) - (COMMAND_DESCRIPTOR_t*)_GetTestResultDataAddress, -# endif // CC_GetTestResult -# if(PAD_LIST || CC_Hash) - (COMMAND_DESCRIPTOR_t*)_HashDataAddress, -# endif // CC_Hash -# if(PAD_LIST || CC_PCR_Read) - (COMMAND_DESCRIPTOR_t*)_PCR_ReadDataAddress, -# endif // CC_PCR_Read -# if(PAD_LIST || CC_PolicyPCR) - (COMMAND_DESCRIPTOR_t*)_PolicyPCRDataAddress, -# endif // CC_PolicyPCR -# if(PAD_LIST || CC_PolicyRestart) - (COMMAND_DESCRIPTOR_t*)_PolicyRestartDataAddress, -# endif // CC_PolicyRestart -# if(PAD_LIST || CC_ReadClock) - (COMMAND_DESCRIPTOR_t*)_ReadClockDataAddress, -# endif // CC_ReadClock -# if(PAD_LIST || CC_PCR_Extend) - (COMMAND_DESCRIPTOR_t*)_PCR_ExtendDataAddress, -# endif // CC_PCR_Extend -# if(PAD_LIST || CC_PCR_SetAuthValue) - (COMMAND_DESCRIPTOR_t*)_PCR_SetAuthValueDataAddress, -# endif // CC_PCR_SetAuthValue -# if(PAD_LIST || CC_NV_Certify) - (COMMAND_DESCRIPTOR_t*)_NV_CertifyDataAddress, -# endif // CC_NV_Certify -# if(PAD_LIST || CC_EventSequenceComplete) - (COMMAND_DESCRIPTOR_t*)_EventSequenceCompleteDataAddress, -# endif // CC_EventSequenceComplete -# if(PAD_LIST || CC_HashSequenceStart) - (COMMAND_DESCRIPTOR_t*)_HashSequenceStartDataAddress, -# endif // CC_HashSequenceStart -# if(PAD_LIST || CC_PolicyPhysicalPresence) - (COMMAND_DESCRIPTOR_t*)_PolicyPhysicalPresenceDataAddress, -# endif // CC_PolicyPhysicalPresence -# if(PAD_LIST || CC_PolicyDuplicationSelect) - (COMMAND_DESCRIPTOR_t*)_PolicyDuplicationSelectDataAddress, -# endif // CC_PolicyDuplicationSelect -# if(PAD_LIST || CC_PolicyGetDigest) - (COMMAND_DESCRIPTOR_t*)_PolicyGetDigestDataAddress, -# endif // CC_PolicyGetDigest -# if(PAD_LIST || CC_TestParms) - (COMMAND_DESCRIPTOR_t*)_TestParmsDataAddress, -# endif // CC_TestParms -# if(PAD_LIST || CC_Commit) - (COMMAND_DESCRIPTOR_t*)_CommitDataAddress, -# endif // CC_Commit -# if(PAD_LIST || CC_PolicyPassword) - (COMMAND_DESCRIPTOR_t*)_PolicyPasswordDataAddress, -# endif // CC_PolicyPassword -# if(PAD_LIST || CC_ZGen_2Phase) - (COMMAND_DESCRIPTOR_t*)_ZGen_2PhaseDataAddress, -# endif // CC_ZGen_2Phase -# if(PAD_LIST || CC_EC_Ephemeral) - (COMMAND_DESCRIPTOR_t*)_EC_EphemeralDataAddress, -# endif // CC_EC_Ephemeral -# if(PAD_LIST || CC_PolicyNvWritten) - (COMMAND_DESCRIPTOR_t*)_PolicyNvWrittenDataAddress, -# endif // CC_PolicyNvWritten -# if(PAD_LIST || CC_PolicyTemplate) - (COMMAND_DESCRIPTOR_t*)_PolicyTemplateDataAddress, -# endif // CC_PolicyTemplate -# if(PAD_LIST || CC_CreateLoaded) - (COMMAND_DESCRIPTOR_t*)_CreateLoadedDataAddress, -# endif // CC_CreateLoaded -# if(PAD_LIST || CC_PolicyAuthorizeNV) - (COMMAND_DESCRIPTOR_t*)_PolicyAuthorizeNVDataAddress, -# endif // CC_PolicyAuthorizeNV -# if(PAD_LIST || CC_EncryptDecrypt2) - (COMMAND_DESCRIPTOR_t*)_EncryptDecrypt2DataAddress, -# endif // CC_EncryptDecrypt2 -# if(PAD_LIST || CC_AC_GetCapability) - (COMMAND_DESCRIPTOR_t*)_AC_GetCapabilityDataAddress, -# endif // CC_AC_GetCapability -# if(PAD_LIST || CC_AC_Send) - (COMMAND_DESCRIPTOR_t*)_AC_SendDataAddress, -# endif // CC_AC_Send -# if(PAD_LIST || CC_Policy_AC_SendSelect) - (COMMAND_DESCRIPTOR_t*)_Policy_AC_SendSelectDataAddress, -# endif // CC_Policy_AC_SendSelect -# if(PAD_LIST || CC_CertifyX509) - (COMMAND_DESCRIPTOR_t*)_CertifyX509DataAddress, -# endif // CC_CertifyX509 -# if(PAD_LIST || CC_ACT_SetTimeout) - (COMMAND_DESCRIPTOR_t*)_ACT_SetTimeoutDataAddress, -# endif // CC_ACT_SetTimeout -# if(PAD_LIST || CC_ECC_Encrypt) - (COMMAND_DESCRIPTOR_t*)_ECC_EncryptDataAddress, -# endif // CC_ECC_Encrypt -# if(PAD_LIST || CC_ECC_Decrypt) - (COMMAND_DESCRIPTOR_t*)_ECC_DecryptDataAddress, -# endif // CC_ECC_Decrypt -# if(PAD_LIST || CC_Vendor_TCG_Test) - (COMMAND_DESCRIPTOR_t*)_Vendor_TCG_TestDataAddress, -# endif // CC_Vendor_TCG_Test - 0}; - -#endif // _COMMAND_TABLE_DISPATCH_ diff --git a/TPMCmd/tpm/include/Commands.h b/TPMCmd/tpm/include/Commands.h deleted file mode 100644 index bcdc52e0..00000000 --- a/TPMCmd/tpm/include/Commands.h +++ /dev/null @@ -1,461 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Feb 28, 2020 Time: 03:04:47PM - */ - -#ifndef _COMMANDS_H_ -#define _COMMANDS_H_ - -// Start-up -#if CC_Startup -# include "Startup_fp.h" -#endif -#if CC_Shutdown -# include "Shutdown_fp.h" -#endif - -// Testing -#if CC_SelfTest -# include "SelfTest_fp.h" -#endif -#if CC_IncrementalSelfTest -# include "IncrementalSelfTest_fp.h" -#endif -#if CC_GetTestResult -# include "GetTestResult_fp.h" -#endif - -// Session Commands -#if CC_StartAuthSession -# include "StartAuthSession_fp.h" -#endif -#if CC_PolicyRestart -# include "PolicyRestart_fp.h" -#endif - -// Object Commands -#if CC_Create -# include "Create_fp.h" -#endif -#if CC_Load -# include "Load_fp.h" -#endif -#if CC_LoadExternal -# include "LoadExternal_fp.h" -#endif -#if CC_ReadPublic -# include "ReadPublic_fp.h" -#endif -#if CC_ActivateCredential -# include "ActivateCredential_fp.h" -#endif -#if CC_MakeCredential -# include "MakeCredential_fp.h" -#endif -#if CC_Unseal -# include "Unseal_fp.h" -#endif -#if CC_ObjectChangeAuth -# include "ObjectChangeAuth_fp.h" -#endif -#if CC_CreateLoaded -# include "CreateLoaded_fp.h" -#endif - -// Duplication Commands -#if CC_Duplicate -# include "Duplicate_fp.h" -#endif -#if CC_Rewrap -# include "Rewrap_fp.h" -#endif -#if CC_Import -# include "Import_fp.h" -#endif - -// Asymmetric Primitives -#if CC_RSA_Encrypt -# include "RSA_Encrypt_fp.h" -#endif -#if CC_RSA_Decrypt -# include "RSA_Decrypt_fp.h" -#endif -#if CC_ECDH_KeyGen -# include "ECDH_KeyGen_fp.h" -#endif -#if CC_ECDH_ZGen -# include "ECDH_ZGen_fp.h" -#endif -#if CC_ECC_Parameters -# include "ECC_Parameters_fp.h" -#endif -#if CC_ZGen_2Phase -# include "ZGen_2Phase_fp.h" -#endif -#if CC_ECC_Encrypt -# include "ECC_Encrypt_fp.h" -#endif -#if CC_ECC_Decrypt -# include "ECC_Decrypt_fp.h" -#endif - -// Symmetric Primitives -#if CC_EncryptDecrypt -# include "EncryptDecrypt_fp.h" -#endif -#if CC_EncryptDecrypt2 -# include "EncryptDecrypt2_fp.h" -#endif -#if CC_Hash -# include "Hash_fp.h" -#endif -#if CC_HMAC -# include "HMAC_fp.h" -#endif -#if CC_MAC -# include "MAC_fp.h" -#endif - -// Random Number Generator -#if CC_GetRandom -# include "GetRandom_fp.h" -#endif -#if CC_StirRandom -# include "StirRandom_fp.h" -#endif - -// Hash/HMAC/Event Sequences -#if CC_HMAC_Start -# include "HMAC_Start_fp.h" -#endif -#if CC_MAC_Start -# include "MAC_Start_fp.h" -#endif -#if CC_HashSequenceStart -# include "HashSequenceStart_fp.h" -#endif -#if CC_SequenceUpdate -# include "SequenceUpdate_fp.h" -#endif -#if CC_SequenceComplete -# include "SequenceComplete_fp.h" -#endif -#if CC_EventSequenceComplete -# include "EventSequenceComplete_fp.h" -#endif - -// Attestation Commands -#if CC_Certify -# include "Certify_fp.h" -#endif -#if CC_CertifyCreation -# include "CertifyCreation_fp.h" -#endif -#if CC_Quote -# include "Quote_fp.h" -#endif -#if CC_GetSessionAuditDigest -# include "GetSessionAuditDigest_fp.h" -#endif -#if CC_GetCommandAuditDigest -# include "GetCommandAuditDigest_fp.h" -#endif -#if CC_GetTime -# include "GetTime_fp.h" -#endif -#if CC_CertifyX509 -# include "CertifyX509_fp.h" -#endif - -// Ephemeral EC Keys -#if CC_Commit -# include "Commit_fp.h" -#endif -#if CC_EC_Ephemeral -# include "EC_Ephemeral_fp.h" -#endif - -// Signing and Signature Verification -#if CC_VerifySignature -# include "VerifySignature_fp.h" -#endif -#if CC_Sign -# include "Sign_fp.h" -#endif - -// Command Audit -#if CC_SetCommandCodeAuditStatus -# include "SetCommandCodeAuditStatus_fp.h" -#endif - -// Integrity Collection (PCR) -#if CC_PCR_Extend -# include "PCR_Extend_fp.h" -#endif -#if CC_PCR_Event -# include "PCR_Event_fp.h" -#endif -#if CC_PCR_Read -# include "PCR_Read_fp.h" -#endif -#if CC_PCR_Allocate -# include "PCR_Allocate_fp.h" -#endif -#if CC_PCR_SetAuthPolicy -# include "PCR_SetAuthPolicy_fp.h" -#endif -#if CC_PCR_SetAuthValue -# include "PCR_SetAuthValue_fp.h" -#endif -#if CC_PCR_Reset -# include "PCR_Reset_fp.h" -#endif - -// Enhanced Authorization (EA) Commands -#if CC_PolicySigned -# include "PolicySigned_fp.h" -#endif -#if CC_PolicySecret -# include "PolicySecret_fp.h" -#endif -#if CC_PolicyTicket -# include "PolicyTicket_fp.h" -#endif -#if CC_PolicyOR -# include "PolicyOR_fp.h" -#endif -#if CC_PolicyPCR -# include "PolicyPCR_fp.h" -#endif -#if CC_PolicyLocality -# include "PolicyLocality_fp.h" -#endif -#if CC_PolicyNV -# include "PolicyNV_fp.h" -#endif -#if CC_PolicyCounterTimer -# include "PolicyCounterTimer_fp.h" -#endif -#if CC_PolicyCommandCode -# include "PolicyCommandCode_fp.h" -#endif -#if CC_PolicyPhysicalPresence -# include "PolicyPhysicalPresence_fp.h" -#endif -#if CC_PolicyCpHash -# include "PolicyCpHash_fp.h" -#endif -#if CC_PolicyNameHash -# include "PolicyNameHash_fp.h" -#endif -#if CC_PolicyDuplicationSelect -# include "PolicyDuplicationSelect_fp.h" -#endif -#if CC_PolicyAuthorize -# include "PolicyAuthorize_fp.h" -#endif -#if CC_PolicyAuthValue -# include "PolicyAuthValue_fp.h" -#endif -#if CC_PolicyPassword -# include "PolicyPassword_fp.h" -#endif -#if CC_PolicyGetDigest -# include "PolicyGetDigest_fp.h" -#endif -#if CC_PolicyNvWritten -# include "PolicyNvWritten_fp.h" -#endif -#if CC_PolicyTemplate -# include "PolicyTemplate_fp.h" -#endif -#if CC_PolicyAuthorizeNV -# include "PolicyAuthorizeNV_fp.h" -#endif - -// Hierarchy Commands -#if CC_CreatePrimary -# include "CreatePrimary_fp.h" -#endif -#if CC_HierarchyControl -# include "HierarchyControl_fp.h" -#endif -#if CC_SetPrimaryPolicy -# include "SetPrimaryPolicy_fp.h" -#endif -#if CC_ChangePPS -# include "ChangePPS_fp.h" -#endif -#if CC_ChangeEPS -# include "ChangeEPS_fp.h" -#endif -#if CC_Clear -# include "Clear_fp.h" -#endif -#if CC_ClearControl -# include "ClearControl_fp.h" -#endif -#if CC_HierarchyChangeAuth -# include "HierarchyChangeAuth_fp.h" -#endif - -// Dictionary Attack Functions -#if CC_DictionaryAttackLockReset -# include "DictionaryAttackLockReset_fp.h" -#endif -#if CC_DictionaryAttackParameters -# include "DictionaryAttackParameters_fp.h" -#endif - -// Miscellaneous Management Functions -#if CC_PP_Commands -# include "PP_Commands_fp.h" -#endif -#if CC_SetAlgorithmSet -# include "SetAlgorithmSet_fp.h" -#endif - -// Field Upgrade -#if CC_FieldUpgradeStart -# include "FieldUpgradeStart_fp.h" -#endif -#if CC_FieldUpgradeData -# include "FieldUpgradeData_fp.h" -#endif -#if CC_FirmwareRead -# include "FirmwareRead_fp.h" -#endif - -// Context Management -#if CC_ContextSave -# include "ContextSave_fp.h" -#endif -#if CC_ContextLoad -# include "ContextLoad_fp.h" -#endif -#if CC_FlushContext -# include "FlushContext_fp.h" -#endif -#if CC_EvictControl -# include "EvictControl_fp.h" -#endif - -// Clocks and Timers -#if CC_ReadClock -# include "ReadClock_fp.h" -#endif -#if CC_ClockSet -# include "ClockSet_fp.h" -#endif -#if CC_ClockRateAdjust -# include "ClockRateAdjust_fp.h" -#endif - -// Capability Commands -#if CC_GetCapability -# include "GetCapability_fp.h" -#endif -#if CC_TestParms -# include "TestParms_fp.h" -#endif - -// Non-volatile Storage -#if CC_NV_DefineSpace -# include "NV_DefineSpace_fp.h" -#endif -#if CC_NV_UndefineSpace -# include "NV_UndefineSpace_fp.h" -#endif -#if CC_NV_UndefineSpaceSpecial -# include "NV_UndefineSpaceSpecial_fp.h" -#endif -#if CC_NV_ReadPublic -# include "NV_ReadPublic_fp.h" -#endif -#if CC_NV_Write -# include "NV_Write_fp.h" -#endif -#if CC_NV_Increment -# include "NV_Increment_fp.h" -#endif -#if CC_NV_Extend -# include "NV_Extend_fp.h" -#endif -#if CC_NV_SetBits -# include "NV_SetBits_fp.h" -#endif -#if CC_NV_WriteLock -# include "NV_WriteLock_fp.h" -#endif -#if CC_NV_GlobalWriteLock -# include "NV_GlobalWriteLock_fp.h" -#endif -#if CC_NV_Read -# include "NV_Read_fp.h" -#endif -#if CC_NV_ReadLock -# include "NV_ReadLock_fp.h" -#endif -#if CC_NV_ChangeAuth -# include "NV_ChangeAuth_fp.h" -#endif -#if CC_NV_Certify -# include "NV_Certify_fp.h" -#endif - -// Attached Components -#if CC_AC_GetCapability -# include "AC_GetCapability_fp.h" -#endif -#if CC_AC_Send -# include "AC_Send_fp.h" -#endif -#if CC_Policy_AC_SendSelect -# include "Policy_AC_SendSelect_fp.h" -#endif - -// Authenticated Countdown Timer -#if CC_ACT_SetTimeout -# include "ACT_SetTimeout_fp.h" -#endif - -// Vendor Specific -#if CC_Vendor_TCG_Test -# include "Vendor_TCG_Test_fp.h" -#endif - -#endif diff --git a/TPMCmd/tpm/include/CompilerDependencies.h b/TPMCmd/tpm/include/CompilerDependencies.h deleted file mode 100644 index dd6e65f3..00000000 --- a/TPMCmd/tpm/include/CompilerDependencies.h +++ /dev/null @@ -1,130 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -// This file contains the build switches. This contains switches for multiple -// versions of the crypto-library so some may not apply to your environment. -// - -#ifndef _COMPILER_DEPENDENCIES_H_ -#define _COMPILER_DEPENDENCIES_H_ - -#ifdef GCC -# undef _MSC_VER -# undef WIN32 -#endif - -#ifdef _MSC_VER -// These definitions are for the Microsoft compiler - -// Endian conversion for aligned structures -# define REVERSE_ENDIAN_16(_Number) _byteswap_ushort(_Number) -# define REVERSE_ENDIAN_32(_Number) _byteswap_ulong(_Number) -# define REVERSE_ENDIAN_64(_Number) _byteswap_uint64(_Number) - -// Avoid compiler warning for in line of stdio (or not) -//#define _NO_CRT_STDIO_INLINE - -// This macro is used to handle LIB_EXPORT of function and variable names in lieu -// of a .def file. Visual Studio requires that functions be explicitly exported and -// imported. -# define LIB_EXPORT __declspec(dllexport) // VS compatible version -# define LIB_IMPORT __declspec(dllimport) - -// This is defined to indicate a function that does not return. Microsoft compilers -// do not support the _Noretrun function parameter. -# define NORETURN __declspec(noreturn) -# if _MSC_VER >= 1400 // SAL processing when needed -# include -# endif - -# ifdef _WIN64 -# define _INTPTR 2 -# else -# define _INTPTR 1 -# endif - -# define NOT_REFERENCED(x) (x) - -// Lower the compiler error warning for system include -// files. They tend not to be that clean and there is no -// reason to sort through all the spurious errors that they -// generate when the normal error level is set to /Wall -# define _REDUCE_WARNING_LEVEL_(n) __pragma(warning(push, n)) -// Restore the compiler warning level -# define _NORMAL_WARNING_LEVEL_ __pragma(warning(pop)) -# include -#endif - -#ifndef _MSC_VER -# ifndef WINAPI -# define WINAPI -# endif -# ifndef __pragma -# define __pragma(x) -# endif -# define REVERSE_ENDIAN_16(_Number) __builtin_bswap16(_Number) -# define REVERSE_ENDIAN_32(_Number) __builtin_bswap32(_Number) -# define REVERSE_ENDIAN_64(_Number) __builtin_bswap64(_Number) -#endif - -#if defined(__GNUC__) -# define NORETURN __attribute__((noreturn)) -# include -#endif - -// Things that are not defined should be defined as NULL -#ifndef NORETURN -# define NORETURN -#endif -#ifndef LIB_EXPORT -# define LIB_EXPORT -#endif -#ifndef LIB_IMPORT -# define LIB_IMPORT -#endif -#ifndef _REDUCE_WARNING_LEVEL_ -# define _REDUCE_WARNING_LEVEL_(n) -#endif -#ifndef _NORMAL_WARNING_LEVEL_ -# define _NORMAL_WARNING_LEVEL_ -#endif -#ifndef NOT_REFERENCED -# define NOT_REFERENCED(x) (x = x) -#endif - -#ifdef _POSIX_ -typedef int SOCKET; -#endif - -#endif // _COMPILER_DEPENDENCIES_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/CryptEcc.h b/TPMCmd/tpm/include/CryptEcc.h deleted file mode 100644 index ad59a4aa..00000000 --- a/TPMCmd/tpm/include/CryptEcc.h +++ /dev/null @@ -1,80 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This file contains structure definitions used for ECC. The -// structures in this file are only used internally. The ECC-related structures -// that cross the TPM interface are defined in TpmTypes.h -// - -#ifndef _CRYPT_ECC_H -#define _CRYPT_ECC_H - -//** Structures - -typedef struct ECC_CURVE -{ - const TPM_ECC_CURVE curveId; - const UINT16 keySizeBits; - const TPMT_KDF_SCHEME kdf; - const TPMT_ECC_SCHEME sign; - const ECC_CURVE_DATA* curveData; // the address of the curve data - const BYTE* OID; -} ECC_CURVE; - -//*** Macros - -// This macro is used to instance an ECC_CURVE_DATA structure for the curve. This -// structure is referenced by the ECC_CURVE structure -#define CURVE_DATA_DEF(CURVE) \ - const ECC_CURVE_DATA CURVE = {(bigNum)&CURVE##_p_DATA, \ - (bigNum)&CURVE##_n_DATA, \ - (bigNum)&CURVE##_h_DATA, \ - (bigNum)&CURVE##_a_DATA, \ - (bigNum)&CURVE##_b_DATA, \ - {(bigNum)&CURVE##_gX_DATA, \ - (bigNum)&CURVE##_gY_DATA, \ - (bigNum)&BN_ONE}}; - -extern const ECC_CURVE eccCurves[ECC_CURVE_COUNT]; - -#define CURVE_DEF(CURVE) \ - { \ - TPM_ECC_##CURVE, CURVE##_KEY_SIZE, CURVE##_KDF, CURVE##_SIGN, &##CURVE, \ - OID_ECC_##CURVE \ - } - -#define CURVE_NAME(N) - -#endif diff --git a/TPMCmd/tpm/include/CryptHash.h b/TPMCmd/tpm/include/CryptHash.h deleted file mode 100644 index d13ef809..00000000 --- a/TPMCmd/tpm/include/CryptHash.h +++ /dev/null @@ -1,324 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This header contains the hash structure definitions used in the TPM code -// to define the amount of space to be reserved for the hash state. This allows -// the TPM code to not have to import all of the symbols used by the hash -// computations. This lets the build environment of the TPM code not to have -// include the header files associated with the CryptoEngine code. - -#ifndef _CRYPT_HASH_H -#define _CRYPT_HASH_H - -//** Hash-related Structures - -union SMAC_STATES; - -// These definitions add the high-level methods for processing state that may be -// an SMAC -typedef void (*SMAC_DATA_METHOD)( - union SMAC_STATES* state, UINT32 size, const BYTE* buffer); - -typedef UINT16 (*SMAC_END_METHOD)( - union SMAC_STATES* state, UINT32 size, BYTE* buffer); - -typedef struct sequenceMethods -{ - SMAC_DATA_METHOD data; - SMAC_END_METHOD end; -} SMAC_METHODS; - -#define SMAC_IMPLEMENTED (CC_MAC || CC_MAC_Start) - -// These definitions are here because the SMAC state is in the union of hash states. -typedef struct tpmCmacState -{ - TPM_ALG_ID symAlg; - UINT16 keySizeBits; - INT16 bcount; // current count of bytes accumulated in IV - TPM2B_IV iv; // IV buffer - TPM2B_SYM_KEY symKey; -} tpmCmacState_t; - -typedef union SMAC_STATES -{ -#if ALG_CMAC - tpmCmacState_t cmac; -#endif - UINT64 pad; -} SMAC_STATES; - -typedef struct SMAC_STATE -{ - SMAC_METHODS smacMethods; - SMAC_STATES state; -} SMAC_STATE; - -#if ALG_SHA1 -# define IF_IMPLEMENTED_SHA1(op) op(SHA1, Sha1) -#else -# define IF_IMPLEMENTED_SHA1(op) -#endif -#if ALG_SHA256 -# define IF_IMPLEMENTED_SHA256(op) op(SHA256, Sha256) -#else -# define IF_IMPLEMENTED_SHA256(op) -#endif -#if ALG_SHA384 -# define IF_IMPLEMENTED_SHA384(op) op(SHA384, Sha384) -#else -# define IF_IMPLEMENTED_SHA384(op) -#endif -#if ALG_SHA512 -# define IF_IMPLEMENTED_SHA512(op) op(SHA512, Sha512) -#else -# define IF_IMPLEMENTED_SHA512(op) -#endif -#if ALG_SM3_256 -# define IF_IMPLEMENTED_SM3_256(op) op(SM3_256, Sm3_256) -#else -# define IF_IMPLEMENTED_SM3_256(op) -#endif -#if ALG_SHA3_256 -# define IF_IMPLEMENTED_SHA3_256(op) op(SHA3_256, Sha3_256) -#else -# define IF_IMPLEMENTED_SHA3_256(op) -#endif -#if ALG_SHA3_384 -# define IF_IMPLEMENTED_SHA3_384(op) op(SHA3_384, Sha3_384) -#else -# define IF_IMPLEMENTED_SHA3_384(op) -#endif -#if ALG_SHA3_512 -# define IF_IMPLEMENTED_SHA3_512(op) op(SHA3_512, Sha3_512) -#else -# define IF_IMPLEMENTED_SHA3_512(op) -#endif - -#define FOR_EACH_HASH(op) \ - IF_IMPLEMENTED_SHA1(op) \ - IF_IMPLEMENTED_SHA256(op) \ - IF_IMPLEMENTED_SHA384(op) \ - IF_IMPLEMENTED_SHA512(op) \ - IF_IMPLEMENTED_SM3_256(op) \ - IF_IMPLEMENTED_SHA3_256(op) \ - IF_IMPLEMENTED_SHA3_384(op) \ - IF_IMPLEMENTED_SHA3_512(op) - -#define HASH_TYPE(HASH, Hash) tpmHashState##HASH##_t Hash; -typedef union -{ - FOR_EACH_HASH(HASH_TYPE) -// Additions for symmetric block cipher MAC -#if SMAC_IMPLEMENTED - SMAC_STATE smac; -#endif - // to force structure alignment to be no worse than HASH_ALIGNMENT -#if HASH_ALIGNMENT == 8 - uint64_t align; -#else - uint32_t align; -#endif -} ANY_HASH_STATE; - -typedef ANY_HASH_STATE* PANY_HASH_STATE; -typedef const ANY_HASH_STATE* PCANY_HASH_STATE; - -#define ALIGNED_SIZE(x, b) ((((x) + (b)-1) / (b)) * (b)) -// MAX_HASH_STATE_SIZE will change with each implementation. It is assumed that -// a hash state will not be larger than twice the block size plus some -// overhead (in this case, 16 bytes). The overall size needs to be as -// large as any of the hash contexts. The structure needs to start on an -// alignment boundary and be an even multiple of the alignment -#define MAX_HASH_STATE_SIZE ((2 * MAX_HASH_BLOCK_SIZE) + 16) -#define MAX_HASH_STATE_SIZE_ALIGNED ALIGNED_SIZE(MAX_HASH_STATE_SIZE, HASH_ALIGNMENT) - -// This is an aligned byte array that will hold any of the hash contexts. -typedef ANY_HASH_STATE ALIGNED_HASH_STATE; - -// The header associated with the hash library is expected to define the methods -// which include the calling sequence. When not compiling CryptHash.c, the methods -// are not defined so we need placeholder functions for the structures - -#ifndef HASH_START_METHOD_DEF -# define HASH_START_METHOD_DEF void(HASH_START_METHOD)(void) -#endif -#ifndef HASH_DATA_METHOD_DEF -# define HASH_DATA_METHOD_DEF void(HASH_DATA_METHOD)(void) -#endif -#ifndef HASH_END_METHOD_DEF -# define HASH_END_METHOD_DEF void(HASH_END_METHOD)(void) -#endif -#ifndef HASH_STATE_COPY_METHOD_DEF -# define HASH_STATE_COPY_METHOD_DEF void(HASH_STATE_COPY_METHOD)(void) -#endif -#ifndef HASH_STATE_EXPORT_METHOD_DEF -# define HASH_STATE_EXPORT_METHOD_DEF void(HASH_STATE_EXPORT_METHOD)(void) -#endif -#ifndef HASH_STATE_IMPORT_METHOD_DEF -# define HASH_STATE_IMPORT_METHOD_DEF void(HASH_STATE_IMPORT_METHOD)(void) -#endif - -// Define the prototypical function call for each of the methods. This defines the -// order in which the parameters are passed to the underlying function. -typedef HASH_START_METHOD_DEF; -typedef HASH_DATA_METHOD_DEF; -typedef HASH_END_METHOD_DEF; -typedef HASH_STATE_COPY_METHOD_DEF; -typedef HASH_STATE_EXPORT_METHOD_DEF; -typedef HASH_STATE_IMPORT_METHOD_DEF; - -typedef struct _HASH_METHODS -{ - HASH_START_METHOD* start; - HASH_DATA_METHOD* data; - HASH_END_METHOD* end; - HASH_STATE_COPY_METHOD* copy; // Copy a hash block - HASH_STATE_EXPORT_METHOD* copyOut; // Copy a hash block from a hash - // context - HASH_STATE_IMPORT_METHOD* copyIn; // Copy a hash block to a proper hash - // context -} HASH_METHODS, *PHASH_METHODS; - -#define HASH_TPM2B(HASH, Hash) TPM2B_TYPE(HASH##_DIGEST, HASH##_DIGEST_SIZE); - -FOR_EACH_HASH(HASH_TPM2B) - -// When the TPM implements RSA, the hash-dependent OID pointers are part of the -// HASH_DEF. These macros conditionally add the OID reference to the HASH_DEF and the -// HASH_DEF_TEMPLATE. -#if ALG_RSA -# define PKCS1_HASH_REF const BYTE* PKCS1; -# define PKCS1_OID(NAME) , OID_PKCS1_##NAME -#else -# define PKCS1_HASH_REF -# define PKCS1_OID(NAME) -#endif - -// When the TPM implements ECC, the hash-dependent OID pointers are part of the -// HASH_DEF. These macros conditionally add the OID reference to the HASH_DEF and the -// HASH_DEF_TEMPLATE. -#if ALG_ECDSA -# define ECDSA_HASH_REF const BYTE* ECDSA; -# define ECDSA_OID(NAME) , OID_ECDSA_##NAME -#else -# define ECDSA_HASH_REF -# define ECDSA_OID(NAME) -#endif - -typedef const struct HASH_DEF -{ - HASH_METHODS method; - uint16_t blockSize; - uint16_t digestSize; - uint16_t contextSize; - uint16_t hashAlg; - const BYTE* OID; - PKCS1_HASH_REF // PKCS1 OID - ECDSA_HASH_REF // ECDSA OID -} HASH_DEF, *PHASH_DEF; - -// Macro to fill in the HASH_DEF for an algorithm. For SHA1, the instance would be: -// HASH_DEF_TEMPLATE(Sha1, SHA1) -// This handles the difference in capitalization for the various pieces. -#define HASH_DEF_TEMPLATE(HASH, Hash) \ - HASH_DEF Hash##_Def = {{ \ - (HASH_START_METHOD*)&tpmHashStart_##HASH, \ - (HASH_DATA_METHOD*)&tpmHashData_##HASH, \ - (HASH_END_METHOD*)&tpmHashEnd_##HASH, \ - (HASH_STATE_COPY_METHOD*)&tpmHashStateCopy_##HASH, \ - (HASH_STATE_EXPORT_METHOD*)&tpmHashStateExport_##HASH, \ - (HASH_STATE_IMPORT_METHOD*)&tpmHashStateImport_##HASH, \ - }, \ - HASH##_BLOCK_SIZE, /*block size */ \ - HASH##_DIGEST_SIZE, /*data size */ \ - sizeof(tpmHashState##HASH##_t), \ - TPM_ALG_##HASH, \ - OID_##HASH PKCS1_OID(HASH) ECDSA_OID(HASH)}; - -// These definitions are for the types that can be in a hash state structure. -// These types are used in the cryptographic utilities. This is a define rather than -// an enum so that the size of this field can be explicit. -typedef BYTE HASH_STATE_TYPE; -#define HASH_STATE_EMPTY ((HASH_STATE_TYPE)0) -#define HASH_STATE_HASH ((HASH_STATE_TYPE)1) -#define HASH_STATE_HMAC ((HASH_STATE_TYPE)2) -#if CC_MAC || CC_MAC_Start -# define HASH_STATE_SMAC ((HASH_STATE_TYPE)3) -#endif - -// This is the structure that is used for passing a context into the hashing -// functions. It should be the same size as the function context used within -// the hashing functions. This is checked when the hash function is initialized. -// This version uses a new layout for the contexts and a different definition. The -// state buffer is an array of HASH_UNIT values so that a decent compiler will put -// the structure on a HASH_UNIT boundary. If the structure is not properly aligned, -// the code that manipulates the structure will copy to a properly aligned -// structure before it is used and copy the result back. This just makes things -// slower. -// NOTE: This version of the state had the pointer to the update method in the -// state. This is to allow the SMAC functions to use the same structure without -// having to replicate the entire HASH_DEF structure. -typedef struct _HASH_STATE -{ - HASH_STATE_TYPE type; // type of the context - TPM_ALG_ID hashAlg; - PHASH_DEF def; - ANY_HASH_STATE state; -} HASH_STATE, *PHASH_STATE; -typedef const HASH_STATE* PCHASH_STATE; - -//** HMAC State Structures - -// An HMAC_STATE structure contains an opaque HMAC stack state. A caller would -// use this structure when performing incremental HMAC operations. This structure -// contains a hash state and an HMAC key and allows slightly better stack -// optimization than adding an HMAC key to each hash state. -typedef struct hmacState -{ - HASH_STATE hashState; // the hash state - TPM2B_HASH_BLOCK hmacKey; // the HMAC key -} HMAC_STATE, *PHMAC_STATE; - -// This is for the external hash state. This implementation assumes that the size -// of the exported hash state is no larger than the internal hash state. -typedef struct -{ - BYTE buffer[sizeof(HASH_STATE)]; -} EXPORT_HASH_STATE, *PEXPORT_HASH_STATE; - -typedef const EXPORT_HASH_STATE* PCEXPORT_HASH_STATE; - -#endif // _CRYPT_HASH_H diff --git a/TPMCmd/tpm/include/CryptRand.h b/TPMCmd/tpm/include/CryptRand.h deleted file mode 100644 index f679e6c6..00000000 --- a/TPMCmd/tpm/include/CryptRand.h +++ /dev/null @@ -1,195 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This file contains constant definition shared by CryptUtil and the parts -// of the Crypto Engine. -// - -#ifndef _CRYPT_RAND_H -#define _CRYPT_RAND_H - -//** DRBG Structures and Defines - -// Values and structures for the random number generator. These values are defined -// in this header file so that the size of the RNG state can be known to TPM.lib. -// This allows the allocation of some space in NV memory for the state to -// be stored on an orderly shutdown. - -// The DRBG based on a symmetric block cipher is defined by three values, -// 1) the key size -// 2) the block size (the IV size) -// 3) the symmetric algorithm - -#define DRBG_KEY_SIZE_BITS AES_MAX_KEY_SIZE_BITS -#define DRBG_IV_SIZE_BITS (AES_MAX_BLOCK_SIZE * 8) -#define DRBG_ALGORITHM TPM_ALG_AES - -typedef tpmKeyScheduleAES DRBG_KEY_SCHEDULE; -#define DRBG_ENCRYPT_SETUP(key, keySizeInBits, schedule) \ - TpmCryptSetEncryptKeyAES(key, keySizeInBits, schedule) -#define DRBG_ENCRYPT(keySchedule, in, out) \ - TpmCryptEncryptAES(SWIZZLE(keySchedule, in, out)) - -#if((DRBG_KEY_SIZE_BITS % RADIX_BITS) != 0) || ((DRBG_IV_SIZE_BITS % RADIX_BITS) != 0) -# error "Key size and IV for DRBG must be even multiples of the radix" -#endif -#if(DRBG_KEY_SIZE_BITS % DRBG_IV_SIZE_BITS) != 0 -# error "Key size for DRBG must be even multiple of the cypher block size" -#endif - -// Derived values -#define DRBG_MAX_REQUESTS_PER_RESEED (1 << 48) -#define DRBG_MAX_REQEST_SIZE (1 << 32) - -#define pDRBG_KEY(seed) ((DRBG_KEY*)&(((BYTE*)(seed))[0])) -#define pDRBG_IV(seed) ((DRBG_IV*)&(((BYTE*)(seed))[DRBG_KEY_SIZE_BYTES])) - -#define DRBG_KEY_SIZE_WORDS (BITS_TO_CRYPT_WORDS(DRBG_KEY_SIZE_BITS)) -#define DRBG_KEY_SIZE_BYTES (DRBG_KEY_SIZE_WORDS * RADIX_BYTES) - -#define DRBG_IV_SIZE_WORDS (BITS_TO_CRYPT_WORDS(DRBG_IV_SIZE_BITS)) -#define DRBG_IV_SIZE_BYTES (DRBG_IV_SIZE_WORDS * RADIX_BYTES) - -#define DRBG_SEED_SIZE_WORDS (DRBG_KEY_SIZE_WORDS + DRBG_IV_SIZE_WORDS) -#define DRBG_SEED_SIZE_BYTES (DRBG_KEY_SIZE_BYTES + DRBG_IV_SIZE_BYTES) - -typedef union -{ - BYTE bytes[DRBG_KEY_SIZE_BYTES]; - crypt_uword_t words[DRBG_KEY_SIZE_WORDS]; -} DRBG_KEY; - -typedef union -{ - BYTE bytes[DRBG_IV_SIZE_BYTES]; - crypt_uword_t words[DRBG_IV_SIZE_WORDS]; -} DRBG_IV; - -typedef union -{ - BYTE bytes[DRBG_SEED_SIZE_BYTES]; - crypt_uword_t words[DRBG_SEED_SIZE_WORDS]; -} DRBG_SEED; - -#define CTR_DRBG_MAX_REQUESTS_PER_RESEED ((UINT64)1 << 20) -#define CTR_DRBG_MAX_BYTES_PER_REQUEST (1 << 16) - -#define CTR_DRBG_MIN_ENTROPY_INPUT_LENGTH DRBG_SEED_SIZE_BYTES -#define CTR_DRBG_MAX_ENTROPY_INPUT_LENGTH DRBG_SEED_SIZE_BYTES -#define CTR_DRBG_MAX_ADDITIONAL_INPUT_LENGTH DRBG_SEED_SIZE_BYTES - -#define TESTING (1 << 0) -#define ENTROPY (1 << 1) -#define TESTED (1 << 2) - -#define IsTestStateSet(BIT) ((g_cryptoSelfTestState.rng & BIT) != 0) -#define SetTestStateBit(BIT) (g_cryptoSelfTestState.rng |= BIT) -#define ClearTestStateBit(BIT) (g_cryptoSelfTestState.rng &= ~BIT) - -#define IsSelfTest() IsTestStateSet(TESTING) -#define SetSelfTest() SetTestStateBit(TESTING) -#define ClearSelfTest() ClearTestStateBit(TESTING) - -#define IsEntropyBad() IsTestStateSet(ENTROPY) -#define SetEntropyBad() SetTestStateBit(ENTROPY) -#define ClearEntropyBad() ClearTestStateBit(ENTROPY) - -#define IsDrbgTested() IsTestStateSet(TESTED) -#define SetDrbgTested() SetTestStateBit(TESTED) -#define ClearDrbgTested() ClearTestStateBit(TESTED) - -typedef struct -{ - UINT64 reseedCounter; - UINT32 magic; - DRBG_SEED seed; // contains the key and IV for the counter mode DRBG - UINT32 lastValue[4]; // used when the TPM does continuous self-test - // for FIPS compliance of DRBG -} DRBG_STATE, *pDRBG_STATE; -#define DRBG_MAGIC ((UINT32)0x47425244) // "DRBG" backwards so that it displays - -typedef struct KDF_STATE -{ - UINT64 counter; - UINT32 magic; - UINT32 limit; - TPM2B* seed; - const TPM2B* label; - TPM2B* context; - TPM_ALG_ID hash; - TPM_ALG_ID kdf; - UINT16 digestSize; - TPM2B_DIGEST residual; -} KDF_STATE, *pKDR_STATE; -#define KDF_MAGIC ((UINT32)0x4048444a) // "KDF " backwards - -// Make sure that any other structures added to this union start with a 64-bit -// counter and a 32-bit magic number -typedef union -{ - DRBG_STATE drbg; - KDF_STATE kdf; -} RAND_STATE; - -// This is the state used when the library uses a random number generator. -// A special function is installed for the library to call. That function -// picks up the state from this location and uses it for the generation -// of the random number. -extern RAND_STATE* s_random; - -// When instrumenting RSA key sieve -#if RSA_INSTRUMENT -# define PRIME_INDEX(x) ((x) == 512 ? 0 : (x) == 1024 ? 1 : 2) -# define INSTRUMENT_SET(a, b) ((a) = (b)) -# define INSTRUMENT_ADD(a, b) (a) = (a) + (b) -# define INSTRUMENT_INC(a) (a) = (a) + 1 - -extern UINT32 PrimeIndex; -extern UINT32 failedAtIteration[10]; -extern UINT32 PrimeCounts[3]; -extern UINT32 MillerRabinTrials[3]; -extern UINT32 totalFieldsSieved[3]; -extern UINT32 bitsInFieldAfterSieve[3]; -extern UINT32 emptyFieldsSieved[3]; -extern UINT32 noPrimeFields[3]; -extern UINT32 primesChecked[3]; -extern UINT16 lastSievePrime; -#else -# define INSTRUMENT_SET(a, b) -# define INSTRUMENT_ADD(a, b) -# define INSTRUMENT_INC(a) -#endif - -#endif // _CRYPT_RAND_H diff --git a/TPMCmd/tpm/include/CryptRsa.h b/TPMCmd/tpm/include/CryptRsa.h deleted file mode 100644 index 3cdb5fd2..00000000 --- a/TPMCmd/tpm/include/CryptRsa.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -// This file contains the RSA-related structures and defines. - -#ifndef _CRYPT_RSA_H -#define _CRYPT_RSA_H - -// These values are used in the bigNum representation of various RSA values. -BN_TYPE(rsa, MAX_RSA_KEY_BITS); -#define BN_RSA(name) BN_VAR(name, MAX_RSA_KEY_BITS) -#define BN_RSA_INITIALIZED(name, initializer) \ - BN_INITIALIZED(name, MAX_RSA_KEY_BITS, initializer) - -#define BN_PRIME(name) BN_VAR(name, (MAX_RSA_KEY_BITS / 2)) -BN_TYPE(prime, (MAX_RSA_KEY_BITS / 2)); -#define BN_PRIME_INITIALIZED(name, initializer) \ - BN_INITIALIZED(name, MAX_RSA_KEY_BITS / 2, initializer) - -#if !CRT_FORMAT_RSA -# error This verson only works with CRT formatted data -#endif // !CRT_FORMAT_RSA - -typedef struct privateExponent -{ - bigNum P; - bigNum Q; - bigNum dP; - bigNum dQ; - bigNum qInv; - bn_prime_t entries[5]; -} privateExponent; - -#define NEW_PRIVATE_EXPONENT(X) \ - privateExponent _##X; \ - privateExponent* X = RsaInitializeExponent(&(_##X)) - -#endif // _CRYPT_RSA_H diff --git a/TPMCmd/tpm/include/CryptSym.h b/TPMCmd/tpm/include/CryptSym.h deleted file mode 100644 index c3582e3e..00000000 --- a/TPMCmd/tpm/include/CryptSym.h +++ /dev/null @@ -1,116 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// -// This file contains the implementation of the symmetric block cipher modes -// allowed for a TPM. These functions only use the single block encryption functions -// of the selected symmetric cryptographic library. - -//** Includes, Defines, and Typedefs -#ifndef CRYPT_SYM_H -#define CRYPT_SYM_H - -#if ALG_AES -# define IF_IMPLEMENTED_AES(op) op(AES, aes) -#else -# define IF_IMPLEMENTED_AES(op) -#endif -#if ALG_SM4 -# define IF_IMPLEMENTED_SM4(op) op(SM4, sm4) -#else -# define IF_IMPLEMENTED_SM4(op) -#endif -#if ALG_CAMELLIA -# define IF_IMPLEMENTED_CAMELLIA(op) op(CAMELLIA, camellia) -#else -# define IF_IMPLEMENTED_CAMELLIA(op) -#endif -#if ALG_TDES -# define IF_IMPLEMENTED_TDES(op) op(TDES, tdes) -#else -# define IF_IMPLEMENTED_TDES(op) -#endif - -#define FOR_EACH_SYM(op) \ - IF_IMPLEMENTED_AES(op) \ - IF_IMPLEMENTED_SM4(op) \ - IF_IMPLEMENTED_CAMELLIA(op) \ - IF_IMPLEMENTED_TDES(op) - -// Macros for creating the key schedule union -#define KEY_SCHEDULE(SYM, sym) tpmKeySchedule##SYM sym; -#define TDES DES[3] -typedef union tpmCryptKeySchedule_t -{ - FOR_EACH_SYM(KEY_SCHEDULE) - -#if SYMMETRIC_ALIGNMENT == 8 - uint64_t alignment; -#else - uint32_t alignment; -#endif -} tpmCryptKeySchedule_t; - -// Each block cipher within a library is expected to conform to the same calling -// conventions with three parameters ('keySchedule', 'in', and 'out') in the same -// order. That means that all algorithms would use the same order of the same -// parameters. The code is written assuming the ('keySchedule', 'in', and 'out') -// order. However, if the library uses a different order, the order can be changed -// with a SWIZZLE macro that puts the parameters in the correct order. -// Note that all algorithms have to use the same order and number of parameters -// because the code to build the calling list is common for each call to encrypt -// or decrypt with the algorithm chosen by setting a function pointer to select -// the algorithm that is used. - -#define ENCRYPT(keySchedule, in, out) encrypt(SWIZZLE(keySchedule, in, out)) - -#define DECRYPT(keySchedule, in, out) decrypt(SWIZZLE(keySchedule, in, out)) - -// Note that the macros rely on 'encrypt' as local values in the -// functions that use these macros. Those parameters are set by the macro that -// set the key schedule to be used for the call. - -#define ENCRYPT_CASE(ALG, alg) \ - case TPM_ALG_##ALG: \ - TpmCryptSetEncryptKey##ALG(key, keySizeInBits, &keySchedule.alg); \ - encrypt = (TpmCryptSetSymKeyCall_t)TpmCryptEncrypt##ALG; \ - break; -#define DECRYPT_CASE(ALG, alg) \ - case TPM_ALG_##ALG: \ - TpmCryptSetDecryptKey##ALG(key, keySizeInBits, &keySchedule.alg); \ - decrypt = (TpmCryptSetSymKeyCall_t)TpmCryptDecrypt##ALG; \ - break; - -#endif // CRYPT_SYM_H \ No newline at end of file diff --git a/TPMCmd/tpm/include/CryptTest.h b/TPMCmd/tpm/include/CryptTest.h deleted file mode 100644 index f587f451..00000000 --- a/TPMCmd/tpm/include/CryptTest.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -// This file contains constant definitions used for self-test. - -#ifndef _CRYPT_TEST_H -#define _CRYPT_TEST_H - -// This is the definition of a bit array with one bit per algorithm. -// NOTE: Since bit numbering starts at zero, when TPM_ALG_LAST is a multiple of 8, -// ALGORITHM_VECTOR will need to have byte for the single bit in the last byte. So, -// for example, when TPM_ALG_LAST is 8, ALGORITHM_VECTOR will need 2 bytes. -#define ALGORITHM_VECTOR_BYTES ((TPM_ALG_LAST + 8) / 8) -typedef BYTE ALGORITHM_VECTOR[ALGORITHM_VECTOR_BYTES]; - -#ifdef TEST_SELF_TEST -LIB_EXPORT extern ALGORITHM_VECTOR LibToTest; -#endif - -// This structure is used to contain self-test tracking information for the -// cryptographic modules. Each of the major modules is given a 32-bit value in -// which it may maintain its own self test information. The convention for this -// state is that when all of the bits in this structure are 0, all functions need -// to be tested. -typedef struct -{ - UINT32 rng; - UINT32 hash; - UINT32 sym; -#if ALG_RSA - UINT32 rsa; -#endif -#if ALG_ECC - UINT32 ecc; -#endif -} CRYPTO_SELF_TEST_STATE; - -#endif // _CRYPT_TEST_H diff --git a/TPMCmd/tpm/include/GpMacros.h b/TPMCmd/tpm/include/GpMacros.h deleted file mode 100644 index 72ccac1e..00000000 --- a/TPMCmd/tpm/include/GpMacros.h +++ /dev/null @@ -1,398 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This file is a collection of miscellaneous macros. - -#ifndef GP_MACROS_H -#define GP_MACROS_H - -#ifndef NULL -# define NULL 0 -#endif - -#include "swap.h" -#include "VendorString.h" - -//** For Self-test -// These macros are used in CryptUtil to invoke the incremental self test. -#if SELF_TEST -# define TEST(alg) \ - do \ - { \ - if(TEST_BIT(alg, g_toTest)) \ - CryptTestAlgorithm(alg, NULL); \ - } while(0) - -// Use of TPM_ALG_NULL is reserved for RSAEP/RSADP testing. If someone is wanting -// to test a hash with that value, don't do it. -# define TEST_HASH(alg) \ - do \ - { \ - if(TEST_BIT(alg, g_toTest) && (alg != TPM_ALG_NULL)) \ - CryptTestAlgorithm(alg, NULL); \ - } while(0) -#else -# define TEST(alg) \ - do \ - { \ - } while(0) -# define TEST_HASH(alg) \ - do \ - { \ - } while(0) -#endif // SELF_TEST - -//** For Failures -#if defined _POSIX_ -# define FUNCTION_NAME 0 -#else -# define FUNCTION_NAME __FUNCTION__ -#endif - -#if !FAIL_TRACE -# define FAIL(errorCode) (TpmFail(errorCode)) -# define LOG_FAILURE(errorCode) (TpmLogFailure(errorCode)) -#else -# define FAIL(errorCode) TpmFail(FUNCTION_NAME, __LINE__, errorCode) -# define LOG_FAILURE(errorCode) TpmLogFailure(FUNCTION_NAME, __LINE__, errorCode) -#endif - -// If implementation is using longjmp, then the call to TpmFail() does not return -// and the compiler will complain about unreachable code that comes after. To allow -// for not having longjmp, TpmFail() will return and the subsequent code will be -// executed. This macro accounts for the difference. -#ifndef NO_LONGJMP -# define FAIL_RETURN(returnCode) \ - do \ - { \ - } while(0) -# define TPM_FAIL_RETURN NORETURN void -#else -# define FAIL_RETURN(returnCode) \ - do \ - { \ - return (returnCode); \ - } while(0) -# define TPM_FAIL_RETURN void -#endif - -// This macro tests that a condition is TRUE and puts the TPM into failure mode -// if it is not. If longjmp is being used, then the FAIL(FATAL_ERROR_) macro makes -// a call from which there is no return. Otherwise, it returns and the function -// will exit with the appropriate return code. -#define REQUIRE(condition, errorCode, returnCode) \ - do \ - { \ - if(!!(condition)) \ - { \ - FAIL(FATAL_ERROR_##errorCode); \ - FAIL_RETURN(returnCode); \ - } \ - } while(0) - -#define PARAMETER_CHECK(condition, returnCode) \ - REQUIRE((condition), PARAMETER, returnCode) - -#if(defined EMPTY_ASSERT) && (EMPTY_ASSERT != NO) -# define pAssert(a) \ - do \ - { \ - } while(0) -#else -# define pAssert(a) \ - do \ - { \ - if(!(a)) \ - FAIL(FATAL_ERROR_PARAMETER); \ - } while(0) -#endif - -//** Derived from Vendor-specific values -// Values derived from vendor specific settings in TpmProfile.h -#define PCR_SELECT_MIN ((PLATFORM_PCR + 7) / 8) -#define PCR_SELECT_MAX ((IMPLEMENTATION_PCR + 7) / 8) -#define MAX_ORDERLY_COUNT ((1 << ORDERLY_BITS) - 1) -#define RSA_MAX_PRIME (MAX_RSA_KEY_BYTES / 2) -#define RSA_PRIVATE_SIZE (RSA_MAX_PRIME * 5) - -//** Compile-time Checks -// In some cases, the relationship between two values may be dependent -// on things that change based on various selections like the chosen cryptographic -// libraries. It is possible that these selections will result in incompatible -// settings. These are often detectable by the compiler but it is not always -// possible to do the check in the preprocessor code. For example, when the -// check requires use of "sizeof" then the preprocessor can't do the comparison. -// For these cases, we include a special macro that, depending on the compiler -// will generate a warning to indicate if the check always passes or always fails -// because it involves fixed constants. To run these checks, define COMPILER_CHECKS -// in TpmBuildSwitches.h -#if COMPILER_CHECKS -# define cAssert pAssert -#else -# define cAssert(value) -#endif - -// This is used commonly in the "Crypt" code as a way to keep listings from -// getting too long. This is not to save paper but to allow one to see more -// useful stuff on the screen at any given time. -#define ERROR_RETURN(returnCode) \ - do \ - { \ - retVal = (returnCode); \ - goto Exit; \ - } while(0) - -#ifndef MAX -# define MAX(a, b) ((a) > (b) ? (a) : (b)) -#endif -#ifndef MIN -# define MIN(a, b) ((a) < (b) ? (a) : (b)) -#endif -#ifndef IsOdd -# define IsOdd(a) (((a)&1) != 0) -#endif - -#ifndef BITS_TO_BYTES -# define BITS_TO_BYTES(bits) (((bits) + 7) >> 3) -#endif - -// These are defined for use when the size of the vector being checked is known -// at compile time. -#define TEST_BIT(bit, vector) TestBit((bit), (BYTE*)&(vector), sizeof(vector)) -#define SET_BIT(bit, vector) SetBit((bit), (BYTE*)&(vector), sizeof(vector)) -#define CLEAR_BIT(bit, vector) ClearBit((bit), (BYTE*)&(vector), sizeof(vector)) - -// The following definitions are used if they have not already been defined. The -// defaults for these settings are compatible with ISO/IEC 9899:2011 (E) -#ifndef LIB_EXPORT -# define LIB_EXPORT -# define LIB_IMPORT -#endif -#ifndef NORETURN -# define NORETURN _Noreturn -#endif -#ifndef NOT_REFERENCED -# define NOT_REFERENCED(x = x) ((void)(x)) -#endif - -#define STD_RESPONSE_HEADER (sizeof(TPM_ST) + sizeof(UINT32) + sizeof(TPM_RC)) - -#define JOIN(x, y) x##y -#define JOIN3(x, y, z) x##y##z -#define CONCAT(x, y) JOIN(x, y) -#define CONCAT3(x, y, z) JOIN3(x, y, z) - -// If CONTEXT_INTEGRITY_HASH_ALG is defined, then the vendor is using the old style -// table. Otherwise, pick the "strongest" implemented hash algorithm as the context -// hash. -#ifndef CONTEXT_HASH_ALGORITHM -# if defined ALG_SHA3_512 && ALG_SHA3_512 == YES -# define CONTEXT_HASH_ALGORITHM SHA3_512 -# elif defined ALG_SHA512 && ALG_SHA512 == YES -# define CONTEXT_HASH_ALGORITHM SHA512 -# elif defined ALG_SHA3_384 && ALG_SHA3_384 == YES -# define CONTEXT_HASH_ALGORITHM SHA3_384 -# elif defined ALG_SHA384 && ALG_SHA384 == YES -# define CONTEXT_HASH_ALGORITHM SHA384 -# elif defined ALG_SHA3_256 && ALG_SHA3_256 == YES -# define CONTEXT_HASH_ALGORITHM SHA3_256 -# elif defined ALG_SHA256 && ALG_SHA256 == YES -# define CONTEXT_HASH_ALGORITHM SHA256 -# elif defined ALG_SM3_256 && ALG_SM3_256 == YES -# define CONTEXT_HASH_ALGORITHM SM3_256 -# elif defined ALG_SHA1 && ALG_SHA1 == YES -# define CONTEXT_HASH_ALGORITHM SHA1 -# endif -# define CONTEXT_INTEGRITY_HASH_ALG CONCAT(TPM_ALG_, CONTEXT_HASH_ALGORITHM) -#endif - -#ifndef CONTEXT_INTEGRITY_HASH_SIZE -# define CONTEXT_INTEGRITY_HASH_SIZE CONCAT(CONTEXT_HASH_ALGORITHM, _DIGEST_SIZE) -#endif -#if ALG_RSA -# define RSA_SECURITY_STRENGTH \ - (MAX_RSA_KEY_BITS >= 15360 \ - ? 256 \ - : (MAX_RSA_KEY_BITS >= 7680 \ - ? 192 \ - : (MAX_RSA_KEY_BITS >= 3072 \ - ? 128 \ - : (MAX_RSA_KEY_BITS >= 2048 \ - ? 112 \ - : (MAX_RSA_KEY_BITS >= 1024 ? 80 : 0))))) -#else -# define RSA_SECURITY_STRENGTH 0 -#endif // ALG_RSA - -#if ALG_ECC -# define ECC_SECURITY_STRENGTH \ - (MAX_ECC_KEY_BITS >= 521 \ - ? 256 \ - : (MAX_ECC_KEY_BITS >= 384 ? 192 : (MAX_ECC_KEY_BITS >= 256 ? 128 : 0))) -#else -# define ECC_SECURITY_STRENGTH 0 -#endif // ALG_ECC - -#define MAX_ASYM_SECURITY_STRENGTH MAX(RSA_SECURITY_STRENGTH, ECC_SECURITY_STRENGTH) - -#define MAX_HASH_SECURITY_STRENGTH ((CONTEXT_INTEGRITY_HASH_SIZE * 8) / 2) - -// Unless some algorithm is broken... -#define MAX_SYM_SECURITY_STRENGTH MAX_SYM_KEY_BITS - -#define MAX_SECURITY_STRENGTH_BITS \ - MAX(MAX_ASYM_SECURITY_STRENGTH, \ - MAX(MAX_SYM_SECURITY_STRENGTH, MAX_HASH_SECURITY_STRENGTH)) - -// This is the size that was used before the 1.38 errata requiring that P1.14.4 be -// followed -#define PROOF_SIZE CONTEXT_INTEGRITY_HASH_SIZE - -// As required by P1.14.4 -#define COMPLIANT_PROOF_SIZE \ - (MAX(CONTEXT_INTEGRITY_HASH_SIZE, (2 * MAX_SYM_KEY_BYTES))) - -// As required by P1.14.3.1 -#define COMPLIANT_PRIMARY_SEED_SIZE BITS_TO_BYTES(MAX_SECURITY_STRENGTH_BITS * 2) - -// This is the pre-errata version -#ifndef PRIMARY_SEED_SIZE -# define PRIMARY_SEED_SIZE PROOF_SIZE -#endif - -#if USE_SPEC_COMPLIANT_PROOFS -# undef PROOF_SIZE -# define PROOF_SIZE COMPLIANT_PROOF_SIZE -# undef PRIMARY_SEED_SIZE -# define PRIMARY_SEED_SIZE COMPLIANT_PRIMARY_SEED_SIZE -#endif // USE_SPEC_COMPLIANT_PROOFS - -#if !SKIP_PROOF_ERRORS -# if PROOF_SIZE < COMPLIANT_PROOF_SIZE -# error "PROOF_SIZE is not compliant with TPM specification" -# endif -# if PRIMARY_SEED_SIZE < COMPLIANT_PRIMARY_SEED_SIZE -# error Non-compliant PRIMARY_SEED_SIZE -# endif -#endif // !SKIP_PROOF_ERRORS - -// If CONTEXT_ENCRYPT_ALG is defined, then the vendor is using the old style table -#if defined CONTEXT_ENCRYPT_ALG -# undef CONTEXT_ENCRYPT_ALGORITHM -# if CONTEXT_ENCRYPT_ALG == ALG_AES_VALUE -# define CONTEXT_ENCRYPT_ALGORITHM AES -# elif CONTEXT_ENCRYPT_ALG == ALG_SM4_VALUE -# define CONTEXT_ENCRYPT_ALGORITHM SM4 -# elif CONTEXT_ENCRYPT_ALG == ALG_CAMELLIA_VALUE -# define CONTEXT_ENCRYPT_ALGORITHM CAMELLIA -# elif CONTEXT_ENCRYPT_ALG == ALG_TDES_VALUE -# error Are you kidding? -# else -# error Unknown value for CONTEXT_ENCRYPT_ALG -# endif // CONTEXT_ENCRYPT_ALG == ALG_AES_VALUE -#else -# define CONTEXT_ENCRYPT_ALG CONCAT3(ALG_, CONTEXT_ENCRYPT_ALGORITHM, _VALUE) -#endif // CONTEXT_ENCRYPT_ALG -#define CONTEXT_ENCRYPT_KEY_BITS CONCAT(CONTEXT_ENCRYPT_ALGORITHM, _MAX_KEY_SIZE_BITS) -#define CONTEXT_ENCRYPT_KEY_BYTES ((CONTEXT_ENCRYPT_KEY_BITS + 7) / 8) - -// This is updated to follow the requirement of P2 that the label not be larger -// than 32 bytes. -#ifndef LABEL_MAX_BUFFER -# define LABEL_MAX_BUFFER MIN(32, MAX(MAX_ECC_KEY_BYTES, MAX_DIGEST_SIZE)) -#endif - -// This bit is used to indicate that an authorization ticket expires on TPM Reset -// and TPM Restart. It is added to the timeout value returned by TPM2_PoliySigned() -// and TPM2_PolicySecret() and used by TPM2_PolicyTicket(). The timeout value is -// relative to Time (g_time). Time is reset whenever the TPM loses power and cannot -// be moved forward by the user (as can Clock). 'g_time' is a 64-bit value expressing -// time in ms. Stealing the MSb for a flag means that the TPM needs to be reset -// at least once every 292,471,208 years rather than once every 584,942,417 years. -#define EXPIRATION_BIT ((UINT64)1 << 63) - -// Check for consistency of the bit ordering of bit fields -#if BIG_ENDIAN_TPM && MOST_SIGNIFICANT_BIT_0 && USE_BIT_FIELD_STRUCTURES -# error "Settings not consistent" -#endif - -// These macros are used to handle the variation in handling of bit fields. If -#if USE_BIT_FIELD_STRUCTURES // The default, old version, with bit fields -# define IS_ATTRIBUTE(a, type, b) ((a.b) != 0) -# define SET_ATTRIBUTE(a, type, b) (a.b = SET) -# define CLEAR_ATTRIBUTE(a, type, b) (a.b = CLEAR) -# define GET_ATTRIBUTE(a, type, b) (a.b) -# define TPMA_ZERO_INITIALIZER() \ - { \ - 0 \ - } -#else -# define IS_ATTRIBUTE(a, type, b) ((a & type##_##b) != 0) -# define SET_ATTRIBUTE(a, type, b) (a |= type##_##b) -# define CLEAR_ATTRIBUTE(a, type, b) (a &= ~type##_##b) -# define GET_ATTRIBUTE(a, type, b) (type)((a & type##_##b) >> type##_##b##_SHIFT) -# define TPMA_ZERO_INITIALIZER() (0) -#endif - -#define VERIFY(_X) \ - do \ - { \ - if(!(_X)) \ - goto Error; \ - } while(0) - -// These macros determine if the values in this file are referenced or instanced. -// Global.c defines GLOBAL_C so all the values in this file will be instanced in -// Global.obj. For all other files that include this file, the values will simply -// be external references. For constants, there can be an initializer. -#ifdef GLOBAL_C -# define EXTERN -# define INITIALIZER(_value_) = _value_ -#else -# define EXTERN extern -# define INITIALIZER(_value_) -#endif - -// This macro will create an OID. All OIDs are in DER form with a first octet of -// 0x06 indicating an OID fallowed by an octet indicating the number of octets in the -// rest of the OID. This allows a user of this OID to know how much/little to copy. -#define MAKE_OID(NAME) EXTERN const BYTE OID##NAME[] INITIALIZER({OID##NAME##_VALUE}) - -// This definition is moved from TpmProfile.h because it is not actually vendor- -// specific. It has to be the same size as the 'sequence' parameter of a TPMS_CONTEXT -// and that is a UINT64. So, this is an invariant value -#define CONTEXT_COUNTER UINT64 - -#endif // GP_MACROS_H diff --git a/TPMCmd/tpm/include/HandleProcess.h b/TPMCmd/tpm/include/HandleProcess.h deleted file mode 100644 index dc9e0092..00000000 --- a/TPMCmd/tpm/include/HandleProcess.h +++ /dev/null @@ -1,1168 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmDispatch; Version 4.0 July 8,2017 - * Date: Feb 28, 2020 Time: 03:04:48PM - */ - -#if CC_Startup -case TPM_CC_Startup: - break; -#endif // CC_Startup -#if CC_Shutdown -case TPM_CC_Shutdown: - break; -#endif // CC_Shutdown -#if CC_SelfTest -case TPM_CC_SelfTest: - break; -#endif // CC_SelfTest -#if CC_IncrementalSelfTest -case TPM_CC_IncrementalSelfTest: - break; -#endif // CC_IncrementalSelfTest -#if CC_GetTestResult -case TPM_CC_GetTestResult: - break; -#endif // CC_GetTestResult -#if CC_StartAuthSession -case TPM_CC_StartAuthSession: - *handleCount = 2; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_ENTITY_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_StartAuthSession -#if CC_PolicyRestart -case TPM_CC_PolicyRestart: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyRestart -#if CC_Create -case TPM_CC_Create: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_Create -#if CC_Load -case TPM_CC_Load: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_Load -#if CC_LoadExternal -case TPM_CC_LoadExternal: - break; -#endif // CC_LoadExternal -#if CC_ReadPublic -case TPM_CC_ReadPublic: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ReadPublic -#if CC_ActivateCredential -case TPM_CC_ActivateCredential: - *handleCount = 2; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_ActivateCredential -#if CC_MakeCredential -case TPM_CC_MakeCredential: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_MakeCredential -#if CC_Unseal -case TPM_CC_Unseal: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_Unseal -#if CC_ObjectChangeAuth -case TPM_CC_ObjectChangeAuth: - *handleCount = 2; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_ObjectChangeAuth -#if CC_CreateLoaded -case TPM_CC_CreateLoaded: - *handleCount = 1; - result = TPMI_DH_PARENT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_CreateLoaded -#if CC_Duplicate -case TPM_CC_Duplicate: - *handleCount = 2; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_Duplicate -#if CC_Rewrap -case TPM_CC_Rewrap: - *handleCount = 2; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_Rewrap -#if CC_Import -case TPM_CC_Import: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_Import -#if CC_RSA_Encrypt -case TPM_CC_RSA_Encrypt: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_RSA_Encrypt -#if CC_RSA_Decrypt -case TPM_CC_RSA_Decrypt: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_RSA_Decrypt -#if CC_ECDH_KeyGen -case TPM_CC_ECDH_KeyGen: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ECDH_KeyGen -#if CC_ECDH_ZGen -case TPM_CC_ECDH_ZGen: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ECDH_ZGen -#if CC_ECC_Parameters -case TPM_CC_ECC_Parameters: - break; -#endif // CC_ECC_Parameters -#if CC_ZGen_2Phase -case TPM_CC_ZGen_2Phase: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ZGen_2Phase -#if CC_ECC_Encrypt -case TPM_CC_ECC_Encrypt: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ECC_Encrypt -#if CC_ECC_Decrypt -case TPM_CC_ECC_Decrypt: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ECC_Decrypt -#if CC_EncryptDecrypt -case TPM_CC_EncryptDecrypt: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_EncryptDecrypt -#if CC_EncryptDecrypt2 -case TPM_CC_EncryptDecrypt2: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_EncryptDecrypt2 -#if CC_Hash -case TPM_CC_Hash: - break; -#endif // CC_Hash -#if CC_HMAC -case TPM_CC_HMAC: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_HMAC -#if CC_MAC -case TPM_CC_MAC: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_MAC -#if CC_GetRandom -case TPM_CC_GetRandom: - break; -#endif // CC_GetRandom -#if CC_StirRandom -case TPM_CC_StirRandom: - break; -#endif // CC_StirRandom -#if CC_HMAC_Start -case TPM_CC_HMAC_Start: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_HMAC_Start -#if CC_MAC_Start -case TPM_CC_MAC_Start: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_MAC_Start -#if CC_HashSequenceStart -case TPM_CC_HashSequenceStart: - break; -#endif // CC_HashSequenceStart -#if CC_SequenceUpdate -case TPM_CC_SequenceUpdate: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_SequenceUpdate -#if CC_SequenceComplete -case TPM_CC_SequenceComplete: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_SequenceComplete -#if CC_EventSequenceComplete -case TPM_CC_EventSequenceComplete: - *handleCount = 2; - result = TPMI_DH_PCR_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_EventSequenceComplete -#if CC_Certify -case TPM_CC_Certify: - *handleCount = 2; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_Certify -#if CC_CertifyCreation -case TPM_CC_CertifyCreation: - *handleCount = 2; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_CertifyCreation -#if CC_Quote -case TPM_CC_Quote: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_Quote -#if CC_GetSessionAuditDigest -case TPM_CC_GetSessionAuditDigest: - *handleCount = 3; - result = TPMI_RH_ENDORSEMENT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - result = - TPMI_SH_HMAC_Unmarshal(&handles[2], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_3; - break; -#endif // CC_GetSessionAuditDigest -#if CC_GetCommandAuditDigest -case TPM_CC_GetCommandAuditDigest: - *handleCount = 2; - result = TPMI_RH_ENDORSEMENT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_GetCommandAuditDigest -#if CC_GetTime -case TPM_CC_GetTime: - *handleCount = 2; - result = TPMI_RH_ENDORSEMENT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_GetTime -#if CC_CertifyX509 -case TPM_CC_CertifyX509: - *handleCount = 2; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_CertifyX509 -#if CC_Commit -case TPM_CC_Commit: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_Commit -#if CC_EC_Ephemeral -case TPM_CC_EC_Ephemeral: - break; -#endif // CC_EC_Ephemeral -#if CC_VerifySignature -case TPM_CC_VerifySignature: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_VerifySignature -#if CC_Sign -case TPM_CC_Sign: - *handleCount = 1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_Sign -#if CC_SetCommandCodeAuditStatus -case TPM_CC_SetCommandCodeAuditStatus: - *handleCount = 1; - result = TPMI_RH_PROVISION_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_SetCommandCodeAuditStatus -#if CC_PCR_Extend -case TPM_CC_PCR_Extend: - *handleCount = 1; - result = TPMI_DH_PCR_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PCR_Extend -#if CC_PCR_Event -case TPM_CC_PCR_Event: - *handleCount = 1; - result = TPMI_DH_PCR_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PCR_Event -#if CC_PCR_Read -case TPM_CC_PCR_Read: - break; -#endif // CC_PCR_Read -#if CC_PCR_Allocate -case TPM_CC_PCR_Allocate: - *handleCount = 1; - result = TPMI_RH_PLATFORM_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PCR_Allocate -#if CC_PCR_SetAuthPolicy -case TPM_CC_PCR_SetAuthPolicy: - *handleCount = 1; - result = TPMI_RH_PLATFORM_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PCR_SetAuthPolicy -#if CC_PCR_SetAuthValue -case TPM_CC_PCR_SetAuthValue: - *handleCount = 1; - result = TPMI_DH_PCR_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PCR_SetAuthValue -#if CC_PCR_Reset -case TPM_CC_PCR_Reset: - *handleCount = 1; - result = TPMI_DH_PCR_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PCR_Reset -#if CC_PolicySigned -case TPM_CC_PolicySigned: - *handleCount = 2; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_PolicySigned -#if CC_PolicySecret -case TPM_CC_PolicySecret: - *handleCount = 2; - result = TPMI_DH_ENTITY_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_PolicySecret -#if CC_PolicyTicket -case TPM_CC_PolicyTicket: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyTicket -#if CC_PolicyOR -case TPM_CC_PolicyOR: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyOR -#if CC_PolicyPCR -case TPM_CC_PolicyPCR: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyPCR -#if CC_PolicyLocality -case TPM_CC_PolicyLocality: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyLocality -#if CC_PolicyNV -case TPM_CC_PolicyNV: - *handleCount = 3; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - result = - TPMI_SH_POLICY_Unmarshal(&handles[2], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_3; - break; -#endif // CC_PolicyNV -#if CC_PolicyCounterTimer -case TPM_CC_PolicyCounterTimer: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyCounterTimer -#if CC_PolicyCommandCode -case TPM_CC_PolicyCommandCode: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyCommandCode -#if CC_PolicyPhysicalPresence -case TPM_CC_PolicyPhysicalPresence: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyPhysicalPresence -#if CC_PolicyCpHash -case TPM_CC_PolicyCpHash: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyCpHash -#if CC_PolicyNameHash -case TPM_CC_PolicyNameHash: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyNameHash -#if CC_PolicyDuplicationSelect -case TPM_CC_PolicyDuplicationSelect: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyDuplicationSelect -#if CC_PolicyAuthorize -case TPM_CC_PolicyAuthorize: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyAuthorize -#if CC_PolicyAuthValue -case TPM_CC_PolicyAuthValue: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyAuthValue -#if CC_PolicyPassword -case TPM_CC_PolicyPassword: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyPassword -#if CC_PolicyGetDigest -case TPM_CC_PolicyGetDigest: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyGetDigest -#if CC_PolicyNvWritten -case TPM_CC_PolicyNvWritten: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyNvWritten -#if CC_PolicyTemplate -case TPM_CC_PolicyTemplate: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PolicyTemplate -#if CC_PolicyAuthorizeNV -case TPM_CC_PolicyAuthorizeNV: - *handleCount = 3; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - result = - TPMI_SH_POLICY_Unmarshal(&handles[2], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_3; - break; -#endif // CC_PolicyAuthorizeNV -#if CC_CreatePrimary -case TPM_CC_CreatePrimary: - *handleCount = 1; - result = TPMI_RH_HIERARCHY_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_CreatePrimary -#if CC_HierarchyControl -case TPM_CC_HierarchyControl: - *handleCount = 1; - result = TPMI_RH_HIERARCHY_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_HierarchyControl -#if CC_SetPrimaryPolicy -case TPM_CC_SetPrimaryPolicy: - *handleCount = 1; - result = TPMI_RH_HIERARCHY_POLICY_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_SetPrimaryPolicy -#if CC_ChangePPS -case TPM_CC_ChangePPS: - *handleCount = 1; - result = TPMI_RH_PLATFORM_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ChangePPS -#if CC_ChangeEPS -case TPM_CC_ChangeEPS: - *handleCount = 1; - result = TPMI_RH_PLATFORM_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ChangeEPS -#if CC_Clear -case TPM_CC_Clear: - *handleCount = 1; - result = - TPMI_RH_CLEAR_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_Clear -#if CC_ClearControl -case TPM_CC_ClearControl: - *handleCount = 1; - result = - TPMI_RH_CLEAR_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ClearControl -#if CC_HierarchyChangeAuth -case TPM_CC_HierarchyChangeAuth: - *handleCount = 1; - result = TPMI_RH_HIERARCHY_AUTH_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_HierarchyChangeAuth -#if CC_DictionaryAttackLockReset -case TPM_CC_DictionaryAttackLockReset: - *handleCount = 1; - result = TPMI_RH_LOCKOUT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_DictionaryAttackLockReset -#if CC_DictionaryAttackParameters -case TPM_CC_DictionaryAttackParameters: - *handleCount = 1; - result = TPMI_RH_LOCKOUT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_DictionaryAttackParameters -#if CC_PP_Commands -case TPM_CC_PP_Commands: - *handleCount = 1; - result = TPMI_RH_PLATFORM_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_PP_Commands -#if CC_SetAlgorithmSet -case TPM_CC_SetAlgorithmSet: - *handleCount = 1; - result = TPMI_RH_PLATFORM_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_SetAlgorithmSet -#if CC_FieldUpgradeStart -case TPM_CC_FieldUpgradeStart: - *handleCount = 2; - result = TPMI_RH_PLATFORM_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_FieldUpgradeStart -#if CC_FieldUpgradeData -case TPM_CC_FieldUpgradeData: - break; -#endif // CC_FieldUpgradeData -#if CC_FirmwareRead -case TPM_CC_FirmwareRead: - break; -#endif // CC_FirmwareRead -#if CC_ContextSave -case TPM_CC_ContextSave: - *handleCount = 1; - result = TPMI_DH_CONTEXT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ContextSave -#if CC_ContextLoad -case TPM_CC_ContextLoad: - break; -#endif // CC_ContextLoad -#if CC_FlushContext -case TPM_CC_FlushContext: - break; -#endif // CC_FlushContext -#if CC_EvictControl -case TPM_CC_EvictControl: - *handleCount = 2; - result = TPMI_RH_PROVISION_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_EvictControl -#if CC_ReadClock -case TPM_CC_ReadClock: - break; -#endif // CC_ReadClock -#if CC_ClockSet -case TPM_CC_ClockSet: - *handleCount = 1; - result = TPMI_RH_PROVISION_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ClockSet -#if CC_ClockRateAdjust -case TPM_CC_ClockRateAdjust: - *handleCount = 1; - result = TPMI_RH_PROVISION_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ClockRateAdjust -#if CC_GetCapability -case TPM_CC_GetCapability: - break; -#endif // CC_GetCapability -#if CC_TestParms -case TPM_CC_TestParms: - break; -#endif // CC_TestParms -#if CC_NV_DefineSpace -case TPM_CC_NV_DefineSpace: - *handleCount = 1; - result = TPMI_RH_PROVISION_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_NV_DefineSpace -#if CC_NV_UndefineSpace -case TPM_CC_NV_UndefineSpace: - *handleCount = 2; - result = TPMI_RH_PROVISION_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_NV_UndefineSpace -#if CC_NV_UndefineSpaceSpecial -case TPM_CC_NV_UndefineSpaceSpecial: - *handleCount = 2; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_PLATFORM_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_NV_UndefineSpaceSpecial -#if CC_NV_ReadPublic -case TPM_CC_NV_ReadPublic: - *handleCount = 1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_NV_ReadPublic -#if CC_NV_Write -case TPM_CC_NV_Write: - *handleCount = 2; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_NV_Write -#if CC_NV_Increment -case TPM_CC_NV_Increment: - *handleCount = 2; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_NV_Increment -#if CC_NV_Extend -case TPM_CC_NV_Extend: - *handleCount = 2; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_NV_Extend -#if CC_NV_SetBits -case TPM_CC_NV_SetBits: - *handleCount = 2; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_NV_SetBits -#if CC_NV_WriteLock -case TPM_CC_NV_WriteLock: - *handleCount = 2; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_NV_WriteLock -#if CC_NV_GlobalWriteLock -case TPM_CC_NV_GlobalWriteLock: - *handleCount = 1; - result = TPMI_RH_PROVISION_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_NV_GlobalWriteLock -#if CC_NV_Read -case TPM_CC_NV_Read: - *handleCount = 2; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_NV_Read -#if CC_NV_ReadLock -case TPM_CC_NV_ReadLock: - *handleCount = 2; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - break; -#endif // CC_NV_ReadLock -#if CC_NV_ChangeAuth -case TPM_CC_NV_ChangeAuth: - *handleCount = 1; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_NV_ChangeAuth -#if CC_NV_Certify -case TPM_CC_NV_Certify: - *handleCount = 3; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, TRUE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - result = TPMI_RH_NV_INDEX_Unmarshal( - &handles[2], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_3; - break; -#endif // CC_NV_Certify -#if CC_AC_GetCapability -case TPM_CC_AC_GetCapability: - *handleCount = 1; - result = - TPMI_RH_AC_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_AC_GetCapability -#if CC_AC_Send -case TPM_CC_AC_Send: - *handleCount = 3; - result = TPMI_DH_OBJECT_Unmarshal( - &handles[0], handleBufferStart, bufferRemainingSize, FALSE); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - result = TPMI_RH_NV_AUTH_Unmarshal( - &handles[1], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_2; - result = - TPMI_RH_AC_Unmarshal(&handles[2], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_3; - break; -#endif // CC_AC_Send -#if CC_Policy_AC_SendSelect -case TPM_CC_Policy_AC_SendSelect: - *handleCount = 1; - result = - TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_Policy_AC_SendSelect -#if CC_ACT_SetTimeout -case TPM_CC_ACT_SetTimeout: - *handleCount = 1; - result = - TPMI_RH_ACT_Unmarshal(&handles[0], handleBufferStart, bufferRemainingSize); - if(TPM_RC_SUCCESS != result) - return result + TPM_RC_H + TPM_RC_1; - break; -#endif // CC_ACT_SetTimeout -#if CC_Vendor_TCG_Test -case TPM_CC_Vendor_TCG_Test: - break; -#endif // CC_Vendor_TCG_Test diff --git a/TPMCmd/tpm/include/HashTestData.h b/TPMCmd/tpm/include/HashTestData.h deleted file mode 100644 index e84d039e..00000000 --- a/TPMCmd/tpm/include/HashTestData.h +++ /dev/null @@ -1,128 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -// -// Hash Test Vectors -// - -TPM2B_TYPE(HASH_TEST_KEY, 128); // Twice the largest digest size -TPM2B_HASH_TEST_KEY c_hashTestKey = { - {128, - {0xa0, 0xed, 0x5c, 0x9a, 0xd2, 0x4a, 0x21, 0x40, 0x1a, 0xd0, 0x81, 0x47, 0x39, - 0x63, 0xf9, 0x50, 0xdc, 0x59, 0x47, 0x11, 0x40, 0x13, 0x99, 0x92, 0xc0, 0x72, - 0xa4, 0x0f, 0xe2, 0x33, 0xe4, 0x63, 0x9b, 0xb6, 0x76, 0xc3, 0x1e, 0x6f, 0x13, - 0xee, 0xcc, 0x99, 0x71, 0xa5, 0xc0, 0xcf, 0x9a, 0x40, 0xcf, 0xdb, 0x66, 0x70, - 0x05, 0x63, 0x54, 0x12, 0x25, 0xf4, 0xe0, 0x1b, 0x23, 0x35, 0xe3, 0x70, 0x7d, - 0x19, 0x5f, 0x00, 0xe4, 0xf1, 0x61, 0x73, 0x05, 0xd8, 0x58, 0x7f, 0x60, 0x61, - 0x84, 0x36, 0xec, 0xbe, 0x96, 0x1b, 0x69, 0x00, 0xf0, 0x9a, 0x6e, 0xe3, 0x26, - 0x73, 0x0d, 0x17, 0x5b, 0x33, 0x41, 0x44, 0x9d, 0x90, 0xab, 0xd9, 0x6b, 0x7d, - 0x48, 0x99, 0x25, 0x93, 0x29, 0x14, 0x2b, 0xce, 0x93, 0x8d, 0x8c, 0xaf, 0x31, - 0x0e, 0x9c, 0x57, 0xd8, 0x5b, 0x57, 0x20, 0x1b, 0x9f, 0x2d, 0xa5}}}; - -TPM2B_TYPE(HASH_TEST_DATA, 256); // Twice the largest block size -TPM2B_HASH_TEST_DATA c_hashTestData = { - {256, - {0x88, 0xac, 0xc3, 0xe5, 0x5f, 0x66, 0x9d, 0x18, 0x80, 0xc9, 0x7a, 0x9c, 0xa4, - 0x08, 0x90, 0x98, 0x0f, 0x3a, 0x53, 0x92, 0x4c, 0x67, 0x4e, 0xb7, 0x37, 0xec, - 0x67, 0x87, 0xb6, 0xbe, 0x10, 0xca, 0x11, 0x5b, 0x4a, 0x0b, 0x45, 0xc3, 0x32, - 0x68, 0x48, 0x69, 0xce, 0x25, 0x1b, 0xc8, 0xaf, 0x44, 0x79, 0x22, 0x83, 0xc8, - 0xfb, 0xe2, 0x63, 0x94, 0xa2, 0x3c, 0x59, 0x3e, 0x3e, 0xc6, 0x64, 0x2c, 0x1f, - 0x8c, 0x11, 0x93, 0x24, 0xa3, 0x17, 0xc5, 0x2f, 0x37, 0xcf, 0x95, 0x97, 0x8e, - 0x63, 0x39, 0x68, 0xd5, 0xca, 0xba, 0x18, 0x37, 0x69, 0x6e, 0x4f, 0x19, 0xfd, - 0x8a, 0xc0, 0x8d, 0x87, 0x3a, 0xbc, 0x31, 0x42, 0x04, 0x05, 0xef, 0xb5, 0x02, - 0xef, 0x1e, 0x92, 0x4b, 0xb7, 0x73, 0x2c, 0x8c, 0xeb, 0x23, 0x13, 0x81, 0x34, - 0xb9, 0xb5, 0xc1, 0x17, 0x37, 0x39, 0xf8, 0x3e, 0xe4, 0x4c, 0x06, 0xa8, 0x81, - 0x52, 0x2f, 0xef, 0xc9, 0x9c, 0x69, 0x89, 0xbc, 0x85, 0x9c, 0x30, 0x16, 0x02, - 0xca, 0xe3, 0x61, 0xd4, 0x0f, 0xed, 0x34, 0x1b, 0xca, 0xc1, 0x1b, 0xd1, 0xfa, - 0xc1, 0xa2, 0xe0, 0xdf, 0x52, 0x2f, 0x0b, 0x4b, 0x9f, 0x0e, 0x45, 0x54, 0xb9, - 0x17, 0xb6, 0xaf, 0xd6, 0xd5, 0xca, 0x90, 0x29, 0x57, 0x7b, 0x70, 0x50, 0x94, - 0x5c, 0x8e, 0xf6, 0x4e, 0x21, 0x8b, 0xc6, 0x8b, 0xa6, 0xbc, 0xb9, 0x64, 0xd4, - 0x4d, 0xf3, 0x68, 0xd8, 0xac, 0xde, 0xd8, 0xd8, 0xb5, 0x6d, 0xcd, 0x93, 0xeb, - 0x28, 0xa4, 0xe2, 0x5c, 0x44, 0xef, 0xf0, 0xe1, 0x6f, 0x38, 0x1a, 0x3c, 0xe6, - 0xef, 0xa2, 0x9d, 0xb9, 0xa8, 0x05, 0x2a, 0x95, 0xec, 0x5f, 0xdb, 0xb0, 0x25, - 0x67, 0x9c, 0x86, 0x7a, 0x8e, 0xea, 0x51, 0xcc, 0xc3, 0xd3, 0xff, 0x6e, 0xf0, - 0xed, 0xa3, 0xae, 0xf9, 0x5d, 0x33, 0x70, 0xf2, 0x11}}}; - -#if ALG_SHA1 == YES -TPM2B_TYPE(SHA1, 20); -TPM2B_SHA1 c_SHA1_digest = { - {20, {0xee, 0x2c, 0xef, 0x93, 0x76, 0xbd, 0xf8, 0x91, 0xbc, 0xe6, - 0xe5, 0x57, 0x53, 0x77, 0x01, 0xb5, 0x70, 0x95, 0xe5, 0x40}}}; -#endif - -#if ALG_SHA256 == YES -TPM2B_TYPE(SHA256, 32); -TPM2B_SHA256 c_SHA256_digest = { - {32, {0x64, 0xe8, 0xe0, 0xc3, 0xa9, 0xa4, 0x51, 0x49, 0x10, 0x55, 0x8d, - 0x31, 0x71, 0xe5, 0x2f, 0x69, 0x3a, 0xdc, 0xc7, 0x11, 0x32, 0x44, - 0x61, 0xbd, 0x34, 0x39, 0x57, 0xb0, 0xa8, 0x75, 0x86, 0x1b}}}; -#endif - -#if ALG_SHA384 == YES -TPM2B_TYPE(SHA384, 48); -TPM2B_SHA384 c_SHA384_digest = { - {48, {0x37, 0x75, 0x29, 0xb5, 0x20, 0x15, 0x6e, 0xa3, 0x7e, 0xa3, 0x0d, 0xcd, - 0x80, 0xa8, 0xa3, 0x3d, 0xeb, 0xe8, 0xad, 0x4e, 0x1c, 0x77, 0x94, 0x5a, - 0xaf, 0x6c, 0xd0, 0xc1, 0xfa, 0x43, 0x3f, 0xc7, 0xb8, 0xf1, 0x01, 0xc0, - 0x60, 0xbf, 0xf2, 0x87, 0xe8, 0x71, 0x9e, 0x51, 0x97, 0xa0, 0x09, 0x8d}}}; -#endif - -#if ALG_SHA512 == YES -TPM2B_TYPE(SHA512, 64); -TPM2B_SHA512 c_SHA512_digest = { - {64, - {0xe2, 0x7b, 0x10, 0x3d, 0x5e, 0x48, 0x58, 0x44, 0x67, 0xac, 0xa3, 0x81, 0x8c, - 0x1d, 0xc5, 0x71, 0x66, 0x92, 0x8a, 0x89, 0xaa, 0xd4, 0x35, 0x51, 0x60, 0x37, - 0x31, 0xd7, 0xba, 0xe7, 0x93, 0x0b, 0x16, 0x4d, 0xb3, 0xc8, 0x34, 0x98, 0x3c, - 0xd3, 0x53, 0xde, 0x5e, 0xe8, 0x0c, 0xbc, 0xaf, 0xc9, 0x24, 0x2c, 0xcc, 0xed, - 0xdb, 0xde, 0xba, 0x1f, 0x14, 0x14, 0x5a, 0x95, 0x80, 0xde, 0x66, 0xbd}}}; -#endif - -TPM2B_TYPE(EMPTY, 1); - -#if ALG_SM3_256 == YES -TPM2B_EMPTY c_SM3_256_digest = {{0, {0}}}; -#endif - -#if ALG_SHA3_256 == YES -TPM2B_EMPTY c_SHA3_256_digest = {{0, {0}}}; -#endif - -#if ALG_SHA3_384 == YES -TPM2B_EMPTY c_SHA3_384_digest = {{0, {0}}}; -#endif - -#if ALG_SHA3_512 == YES -TPM2B_EMPTY c_SHA3_512_digest = {{0, {0}}}; -#endif diff --git a/TPMCmd/tpm/include/InternalRoutines.h b/TPMCmd/tpm/include/InternalRoutines.h deleted file mode 100644 index d71da32c..00000000 --- a/TPMCmd/tpm/include/InternalRoutines.h +++ /dev/null @@ -1,129 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef INTERNAL_ROUTINES_H -#define INTERNAL_ROUTINES_H - -#if !defined _LIB_SUPPORT_H_ && !defined _TPM_H_ -# error "Should not be called" -#endif - -// DRTM functions -#include "_TPM_Hash_Start_fp.h" -#include "_TPM_Hash_Data_fp.h" -#include "_TPM_Hash_End_fp.h" - -// Internal subsystem functions -#include "Object_fp.h" -#include "Context_spt_fp.h" -#include "Object_spt_fp.h" -#include "Entity_fp.h" -#include "Session_fp.h" -#include "Hierarchy_fp.h" -#include "NvReserved_fp.h" -#include "NvDynamic_fp.h" -#include "NV_spt_fp.h" -#include "ACT_spt_fp.h" -#include "PCR_fp.h" -#include "DA_fp.h" -#include "TpmFail_fp.h" -#include "SessionProcess_fp.h" - -// Internal support functions -#include "CommandCodeAttributes_fp.h" -#include "Marshal.h" -#include "Time_fp.h" -#include "Locality_fp.h" -#include "PP_fp.h" -#include "CommandAudit_fp.h" -#include "Manufacture_fp.h" -#include "Handle_fp.h" -#include "Power_fp.h" -#include "Response_fp.h" -#include "CommandDispatcher_fp.h" - -#ifdef CC_AC_Send -# include "AC_spt_fp.h" -#endif // CC_AC_Send - -// Miscellaneous -#include "Bits_fp.h" -#include "AlgorithmCap_fp.h" -#include "PropertyCap_fp.h" -#include "IoBuffers_fp.h" -#include "Memory_fp.h" -#include "ResponseCodeProcessing_fp.h" - -// Internal cryptographic functions -#include "BnConvert_fp.h" -#include "BnMath_fp.h" -#include "BnMemory_fp.h" -#include "Ticket_fp.h" -#include "CryptUtil_fp.h" -#include "CryptHash_fp.h" -#include "CryptSym_fp.h" -#include "CryptDes_fp.h" -#include "CryptPrime_fp.h" -#include "CryptRand_fp.h" -#include "CryptSelfTest_fp.h" -#include "MathOnByteBuffers_fp.h" -#include "CryptSym_fp.h" -#include "AlgorithmTests_fp.h" - -#if ALG_RSA -# include "CryptRsa_fp.h" -# include "CryptPrimeSieve_fp.h" -#endif - -#if ALG_ECC -# include "CryptEccMain_fp.h" -# include "CryptEccSignature_fp.h" -# include "CryptEccKeyExchange_fp.h" -# include "CryptEccCrypt_fp.h" -#endif - -#if CC_MAC || CC_MAC_Start -# include "CryptSmac_fp.h" -# if ALG_CMAC -# include "CryptCmac_fp.h" -# endif -#endif - -// Support library -#include "SupportLibraryFunctionPrototypes_fp.h" - -// Linkage to platform functions -#include "Platform_fp.h" - -#endif diff --git a/TPMCmd/tpm/include/KdfTestData.h b/TPMCmd/tpm/include/KdfTestData.h deleted file mode 100644 index 07f67305..00000000 --- a/TPMCmd/tpm/include/KdfTestData.h +++ /dev/null @@ -1,98 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -// -// Hash Test Vectors -// - -#define TEST_KDF_KEY_SIZE 20 - -TPM2B_TYPE(KDF_TEST_KEY, TEST_KDF_KEY_SIZE); -TPM2B_KDF_TEST_KEY c_kdfTestKeyIn = { - {TEST_KDF_KEY_SIZE, - {0x27, 0x1F, 0xA0, 0x8B, 0xBD, 0xC5, 0x06, 0x0E, 0xC3, 0xDF, - 0xA9, 0x28, 0xFF, 0x9B, 0x73, 0x12, 0x3A, 0x12, 0xDA, 0x0C}}}; - -TPM2B_TYPE(KDF_TEST_LABEL, 17); -TPM2B_KDF_TEST_LABEL c_kdfTestLabel = {{17, - {0x4B, - 0x44, - 0x46, - 0x53, - 0x45, - 0x4C, - 0x46, - 0x54, - 0x45, - 0x53, - 0x54, - 0x4C, - 0x41, - 0x42, - 0x45, - 0x4C, - 0x00}}}; - -TPM2B_TYPE(KDF_TEST_CONTEXT, 8); -TPM2B_KDF_TEST_CONTEXT c_kdfTestContextU = { - {8, {0xCE, 0x24, 0x4F, 0x39, 0x5D, 0xCA, 0x73, 0x91}}}; - -TPM2B_KDF_TEST_CONTEXT c_kdfTestContextV = { - {8, {0xDA, 0x50, 0x40, 0x31, 0xDD, 0xF1, 0x2E, 0x83}}}; - -#if ALG_SHA512 == ALG_YES -TPM2B_KDF_TEST_KEY c_kdfTestKeyOut = { - {20, {0x8b, 0xe2, 0xc1, 0xb8, 0x5b, 0x78, 0x56, 0x9b, 0x9f, 0xa7, - 0x59, 0xf5, 0x85, 0x7c, 0x56, 0xd6, 0x84, 0x81, 0x0f, 0xd3}}}; -# define KDF_TEST_ALG TPM_ALG_SHA512 - -#elif ALG_SHA384 == ALG_YES -TPM2B_KDF_TEST_KEY c_kdfTestKeyOut = { - {20, {0x1d, 0xce, 0x70, 0xc9, 0x11, 0x3e, 0xb2, 0xdb, 0xa4, 0x7b, - 0xd9, 0xcf, 0xc7, 0x2b, 0xf4, 0x6f, 0x45, 0xb0, 0x93, 0x12}}}; -# define KDF_TEST_ALG TPM_ALG_SHA384 - -#elif ALG_SHA256 == ALG_YES -TPM2B_KDF_TEST_KEY c_kdfTestKeyOut = { - {20, {0xbb, 0x02, 0x59, 0xe1, 0xc8, 0xba, 0x60, 0x7e, 0x6a, 0x2c, - 0xd7, 0x04, 0xb6, 0x9a, 0x90, 0x2e, 0x9a, 0xde, 0x84, 0xc4}}}; -# define KDF_TEST_ALG TPM_ALG_SHA256 - -#elif ALG_SHA1 == ALG_YES -TPM2B_KDF_TEST_KEY c_kdfTestKeyOut = { - {20, {0x55, 0xb5, 0xa7, 0x18, 0x4a, 0xa0, 0x74, 0x23, 0xc4, 0x7d, - 0xae, 0x76, 0x6c, 0x26, 0xa2, 0x37, 0x7d, 0x7c, 0xf8, 0x51}}}; -# define KDF_TEST_ALG TPM_ALG_SHA1 -#endif diff --git a/TPMCmd/tpm/include/LibSupport.h b/TPMCmd/tpm/include/LibSupport.h deleted file mode 100644 index aefff7ab..00000000 --- a/TPMCmd/tpm/include/LibSupport.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -// This header file is used to select the library code that gets included in the -// TPM build. - -#ifndef _LIB_SUPPORT_H_ -#define _LIB_SUPPORT_H_ - -//********************* -#ifndef RADIX_BITS -# if defined(__x86_64__) || defined(__x86_64) || defined(__amd64__) \ - || defined(__amd64) || defined(_WIN64) || defined(_M_X64) || defined(_M_ARM64) \ - || defined(__aarch64__) || defined(__PPC64__) || defined(__s390x__) \ - || defined(__powerpc64__) || defined(__ppc64__) -# define RADIX_BITS 64 -# elif defined(__i386__) || defined(__i386) || defined(i386) || defined(_WIN32) \ - || defined(_M_IX86) || defined(_M_ARM) || defined(__arm__) \ - || defined(__thumb__) -# define RADIX_BITS 32 -# else -# error Unable to determine RADIX_BITS from compiler environment -# endif -#endif // RADIX_BITS - -// These macros use the selected libraries to the proper include files. -#define LIB_QUOTE(_STRING_) #_STRING_ -#define LIB_INCLUDE2(_LIB_, _TYPE_) LIB_QUOTE(_LIB_/TpmTo##_LIB_##_TYPE_.h) -#define LIB_INCLUDE(_LIB_, _TYPE_) LIB_INCLUDE2(_LIB_, _TYPE_) - -// Include the options for hashing and symmetric. Defer the load of the math package -// Until the bignum parameters are defined. -#include LIB_INCLUDE(SYM_LIB, Sym) -#include LIB_INCLUDE(HASH_LIB, Hash) - -#undef MIN -#undef MAX - -#endif // _LIB_SUPPORT_H_ diff --git a/TPMCmd/tpm/include/Ltc/LtcSettings.h b/TPMCmd/tpm/include/Ltc/LtcSettings.h deleted file mode 100644 index 84a815e4..00000000 --- a/TPMCmd/tpm/include/Ltc/LtcSettings.h +++ /dev/null @@ -1,84 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// This header file contains some defines that are necessary to get LTC to compile -// correctly -// -#ifndef _LTC_SETTINGS_H_ -#define _LTC_SETTINGS_H_ - -#if(defined HASH_LIB_LTC) || (defined SYM_LIB_LTC) || (defined MATH_LIB_LTC) - -# if ALG_AES -# define LTC_RIJNDAEL -# endif -# if ALG_TDES -# define LTC_DES -# endif - -# define _Bool int - -// LibTomCrypt types -typedef unsigned long long ulong64; - -/* default no functions m for LTC */ -# define LTC_MUTEX_GLOBAL(x) -# define LTC_MUTEX_PROTO(x) -# define LTC_MUTEX_TYPE(x) -# define LTC_MUTEX_INIT(x) -# define LTC_MUTEX_LOCK(x) -# define LTC_MUTEX_UNLOCK(x) - -# ifndef XMEM_NEQ -# define XMEM_NEQ -# endif - -# define LTC_SHA512 -# define LTC_SHA384 -# define LTC_SHA256 -# define LTC_SHA1 - -// Define these function calls as needed -# define CryptLibStartup() LtcLibStartup() - -_REDUCE_WARNING_LEVEL_(0) -# include "tomcrypt.h" -_NORMAL_WARNING_LEVEL_ - -#endif - -#endif // diff --git a/TPMCmd/tpm/include/Ltc/TpmToLtcHash.h b/TPMCmd/tpm/include/Ltc/TpmToLtcHash.h deleted file mode 100644 index 007e8252..00000000 --- a/TPMCmd/tpm/include/Ltc/TpmToLtcHash.h +++ /dev/null @@ -1,162 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// This header defines the interface between the hashing code and the LIbTomCrypt -// hash functions. - -#ifndef HASH_LIB_DEFINED -#define HASH_LIB_DEFINED - -#define HASH_LIB_LTC - -// Avoid pulling in the MPA math if not doing asymmetric with LTC -#if !(defined MATH_LIB_LTC) -# define LTC_NO_ASYMMETRIC -#endif - -#define HASH_ALIGNMENT RADIX_BYTES - -#include "LtcSettings.h" - -//*************************************************************** -//******** Linking to the TomCrypt HASH code ******************** -//*************************************************************** -// These defines need to be known in all parts of the TPM so that the structure -// sizes can be properly computed when needed. -#define tpmHashStateSHA1_t struct sha1_state -#define tpmHashStateSHA256_t struct sha256_state -#define tpmHashStateSHA512_t struct sha512_state -#define tpmHashStateSHA384_t struct sha512_state - -// The following defines are only needed by CryptHash.c -#ifdef _CRYPT_HASH_C_ - -// Define the interface between CryptHash.c to the functions provided by the -// library. For each method, define the calling parameters of the method and then -// define how the method is invoked in CryptHash.c. -// -// All hashes are required to have the same calling sequence. If they don't, create -// a simple adaptation function that converts from the "standard" form of the call -// to the form used by the specific hash (and then send a nasty letter to the -// person who wrote the hash function for the library). -// -// The macro that calls the method also defines how the -// parameters get swizzled between the default form (in CryptHash.c)and the -// library form. -// -// Initialize the hash context -# define HASH_START_METHOD_DEF void(HASH_START_METHOD)(PANY_HASH_STATE state) -# define HASH_START(hashState) ((hashState)->def->method.start)(&(hashState)->state) - -// Add data to the hash -# define HASH_DATA_METHOD_DEF \ - void(HASH_DATA_METHOD)(PANY_HASH_STATE state, const BYTE* buffer, size_t size) -# define HASH_DATA(hashState, dInSize, dIn) \ - ((hashState)->def->method.data)(&(hashState)->state, dIn, dInSize) - -// Finalize the hash and get the digest -# define HASH_END_METHOD_DEF \ - void(HASH_END_METHOD)(PANY_HASH_STATE state, BYTE * buffer) -# define HASH_END(hashState, buffer) \ - ((hashState)->def->method.end)(&(hashState)->state, buffer) - -// Copy the hash context -// Note: For import, export, and copy, memcpy() is used since there is no -// reformatting necessary between the internal and external forms -# define HASH_STATE_COPY_METHOD_DEF \ - void(HASH_STATE_COPY_METHOD)( \ - PANY_HASH_STATE to, PCANY_HASH_STATE from, size_t size) -# define HASH_STATE_COPY(hashStateOut, hashStateIn) \ - ((hashStateIn)->def->method.copy)(&(hashStateOut)->state, \ - &(hashStateIn)->state, \ - (hashStateIn)->def->contextSize) - -// Copy (with reformatting when necessary) an internal hash structure to an -// external blob -# define HASH_STATE_EXPORT_METHOD_DEF \ - void(HASH_STATE_EXPORT_METHOD)(BYTE * to, PANY_HASH_STATE from, size_t size) -# define HASH_STATE_EXPORT(to, hashStateFrom) \ - ((hashStateFrom)->def->method.copyOut)( \ - &(((BYTE*)(to))[offsetof(HASH_STATE, state)]), \ - &(hashStateFrom)->state, \ - (hashStateFrom)->def->contextSize) - -// Copy from an external blob to an internal formate (with reformatting when -// necessary -# define HASH_STATE_IMPORT_METHOD_DEF \ - void(HASH_STATE_IMPORT_METHOD)(PANY_HASH_STATE to, const BYTE* from, size_t size) -# define HASH_STATE_IMPORT(hashStateTo, from) \ - ((hashStateTo)->def->method.copyIn)( \ - &(hashStateTo)->state, \ - &(((const BYTE*)(from))[offsetof(HASH_STATE, state)]), \ - (hashStateTo)->def->contextSize) - -// Internal External -// Designation Designation -# define tpmHashStart_SHA1 sha1_init -# define tpmHashData_SHA1 sha1_process -# define tpmHashEnd_SHA1 sha1_done -# define tpmHashStateCopy_SHA1 memcpy -# define tpmHashStateExport_SHA1 memcpy -# define tpmHashStateImport_SHA1 memcpy -# define tpmHashStart_SHA256 sha256_init -# define tpmHashData_SHA256 sha256_process -# define tpmHashEnd_SHA256 sha256_done -# define tpmHashStateCopy_SHA256 memcpy -# define tpmHashStateExport_SHA256 memcpy -# define tpmHashStateImport_SHA256 memcpy -# define tpmHashStart_SHA384 sha384_init -# define tpmHashData_SHA384 sha384_process -# define tpmHashEnd_SHA384 sha384_done -# define tpmHashStateCopy_SHA384 memcpy -# define tpmHashStateExport_SHA384 memcpy -# define tpmHashStateImport_SHA384 memcpy -# define tpmHashStart_SHA512 sha512_init -# define tpmHashData_SHA512 sha512_process -# define tpmHashEnd_SHA512 sha512_done -# define tpmHashStateCopy_SHA512 memcpy -# define tpmHashStateExport_SHA512 memcpy -# define tpmHashStateImport_SHA512 memcpy - -#endif // _CRYPT_HASH_C_ - -// No special processing to initialize the LTC hash library -#define LibHashInit() - -// No special processing at the end of the simulation (i.e., no statistics to print) -#define HashLibSimulationEnd() - -#endif // HASH_LIB_DEFINED diff --git a/TPMCmd/tpm/include/Ltc/TpmToLtcMath.h b/TPMCmd/tpm/include/Ltc/TpmToLtcMath.h deleted file mode 100644 index 60348e03..00000000 --- a/TPMCmd/tpm/include/Ltc/TpmToLtcMath.h +++ /dev/null @@ -1,87 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// This file contains the structure definitions used for linking from the TPM -// code to the MPA and LTC math libraries. - -#ifndef MATH_LIB_DEFINED -#define MATH_LIB_DEFINED - -#define MATH_LIB_LTC - -_REDUCE_WARNING_LEVEL_(2) -#include "LtcSettings.h" -#include "mpalib.h" -#include "mpa.h" -#include "tomcrypt_mpa.h" -_NORMAL_WARNING_LEVEL_ - -#if RADIX_BITS != 32 -# error "The mpa library used with LibTomCrypt only works for 32-bit words" -#endif - -// These macros handle entering and leaving a scope -// from which an MPA or LibTomCrypt function may be called. -// Many of these functions require a scratch pool from which -// they will allocate scratch variables (rather than using their -// own stack). -extern mpa_scratch_mem external_mem_pool; - -#define MPA_ENTER(vars, bits) \ - mpa_word_t POOL_[mpa_scratch_mem_size_in_U32(vars, bits)]; \ - mpa_scratch_mem pool_save = external_mem_pool; \ - mpa_scratch_mem POOL = LtcPoolInit(POOL_, vars, bits) - -#define MPA_LEAVE() init_mpa_tomcrypt(pool_save) - -typedef ECC_CURVE_DATA bnCurve_t; - -typedef bnCurve_t* bigCurve; - -#define AccessCurveData(E) (E) - -// Include the support functions for the routines that are used by LTC thunk. -#include "TpmToLtcSupport_fp.h" - -#define CURVE_INITIALIZED(name, initializer) \ - bnCurve_t* name = (ECC_CURVE_DATA*)GetCurveData(initializer) - -#define CURVE_FREE(E) - -// This definition would change if there were something to report -#define MathLibSimulationEnd() - -#endif // MATH_LIB_DEFINED diff --git a/TPMCmd/tpm/include/Ltc/TpmToLtcSym.h b/TPMCmd/tpm/include/Ltc/TpmToLtcSym.h deleted file mode 100644 index 4074c85a..00000000 --- a/TPMCmd/tpm/include/Ltc/TpmToLtcSym.h +++ /dev/null @@ -1,107 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// This header file is used to "splice" the TPM to the LTC symmetric cipher code. - -#ifndef SYM_LIB_DEFINED -#define SYM_LIB_DEFINED - -#define SYM_LIB_LTC - -#define SYM_ALIGNMENT RADIX_BYTES - -// Avoid pulling in the MPA math if not doing asymmetric with LTC -#if !(defined MATH_LIB_LTC) -# define LTC_NO_ASYMMETRIC -#endif - -#include "LtcSettings.h" - -//*************************************************************** -//******** Linking to the TomCrypt AES code ********************* -//*************************************************************** - -#if ALG_SM4 -# error "SM4 is not available" -#endif - -#if ALG_CAMELLIA -# error "Camellia is not available" -#endif - -// Define the order of parameters to the functions that do block encryption and -// decryption. -typedef void (*TpmCryptSetSymKeyCall_t)(const void* in, void* out, void* keySchedule); - -// Macro to put the parameters in the order required by the library -#define SWIZZLE(keySchedule, in, out) \ - (const void*)(in), (void*)(out), (void*)(keySchedule) - -// Macros to set up the encryption/decryption key schedules -// -// AES: -#define TpmCryptSetEncryptKeyAES(key, keySizeInBits, schedule) \ - aes_setup((key), BITS_TO_BYTES(keySizeInBits), 0, (symmetric_key*)(schedule)) -#define TpmCryptSetDecryptKeyAES(key, keySizeInBits, schedule) \ - aes_setup((key), BITS_TO_BYTES(keySizeInBits), 0, (symmetric_key*)(schedule)) - -// TDES: -#define TpmCryptSetEncryptKeyTDES(key, keySizeInBits, schedule) \ - TDES_setup((key), (keySizeInBits), (symmetric_key*)(schedule)) -#define TpmCryptSetDecryptKeyTDES(key, keySizeInBits, schedule) \ - TDES_setup((key), (keySizeInBits), (symmetric_key*)(schedule)) - -// Macros to alias encrypt and decrypt function calls to library-specific values -// sparingly. These should be used sparingly. Currently, they are only used by -// CryptRand.c in the AES version of the DRBG. -#define TpmCryptEncryptAES aes_ecb_encrypt -#define TpmCryptDecryptAES aes_ecb_decrypt -#define tpmKeyScheduleAES struct rijndael_key -// -#define TpmCryptEncryptTDES des3_ecb_encrypt -#define TpmCryptDecryptTDES des3_ecb_decrypt -#define tpmKeyScheduleTDES struct des3_key - -typedef union tpmCryptKeySchedule_t tpmCryptKeySchedule_t; - -#include "TpmToLtcDesSupport_fp.h" - -// This is used to trigger printing of simulation statistics - -#define SymLibSimulationEnd() - -#endif // SYM_LIB_DEFINED diff --git a/TPMCmd/tpm/include/Marshal.h b/TPMCmd/tpm/include/Marshal.h deleted file mode 100644 index c26a7f71..00000000 --- a/TPMCmd/tpm/include/Marshal.h +++ /dev/null @@ -1,53 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// This file is used to provide the things needed by a module that uses the marshaling -// functions. It handles the variations between the marshaling choices (procedural or -// table-driven). - -#if TABLE_DRIVEN_MARSHAL - -# include "TableMarshalTypes.h" - -# include "TableMarshalDefines.h" - -# include "TableDrivenMarshal_fp.h" - -#else - -# include "Marshal_fp.h" - -#endif diff --git a/TPMCmd/tpm/include/MinMax.h b/TPMCmd/tpm/include/MinMax.h deleted file mode 100644 index 613ef6df..00000000 --- a/TPMCmd/tpm/include/MinMax.h +++ /dev/null @@ -1,46 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MIN_MAX_H_ -#define _MIN_MAX_H_ - -#ifndef MAX -# define MAX(a, b) ((a) > (b) ? (a) : (b)) -#endif -#ifndef MIN -# define MIN(a, b) ((a) < (b) ? (a) : (b)) -#endif - -#endif // _MIN_MAX_H_ diff --git a/TPMCmd/tpm/include/NV.h b/TPMCmd/tpm/include/NV.h deleted file mode 100644 index 2f19a28f..00000000 --- a/TPMCmd/tpm/include/NV.h +++ /dev/null @@ -1,150 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Index Type Definitions - -// These definitions allow the same code to be used pre and post 1.21. The main -// action is to redefine the index type values from the bit values. -// Use TPM_NT_ORDINARY to indicate if the TPM_NT type is defined - -#ifndef _NV_H_ -#define _NV_H_ - -#ifdef TPM_NT_ORDINARY -// If TPM_NT_ORDINARY is defined, then the TPM_NT field is present in a TPMA_NV -# define GET_TPM_NT(attributes) GET_ATTRIBUTE(attributes, TPMA_NV, TPM_NT) -#else -// If TPM_NT_ORDINARY is not defined, then need to synthesize it from the -// attributes -# define GetNv_TPM_NV(attributes) \ - (IS_ATTRIBUTE(attributes, TPMA_NV, COUNTER) \ - + (IS_ATTRIBUTE(attributes, TPMA_NV, BITS) << 1) \ - + (IS_ATTRIBUTE(attributes, TPMA_NV, EXTEND) << 2)) -# define TPM_NT_ORDINARY (0) -# define TPM_NT_COUNTER (1) -# define TPM_NT_BITS (2) -# define TPM_NT_EXTEND (4) -#endif - -//** Attribute Macros -// These macros are used to isolate the differences in the way that the index type -// changed in version 1.21 of the specification -#define IsNvOrdinaryIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_ORDINARY) - -#define IsNvCounterIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_COUNTER) - -#define IsNvBitsIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_BITS) - -#define IsNvExtendIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_EXTEND) - -#ifdef TPM_NT_PIN_PASS -# define IsNvPinPassIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_PIN_PASS) -#endif - -#ifdef TPM_NT_PIN_FAIL -# define IsNvPinFailIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_PIN_FAIL) -#endif - -typedef struct -{ - UINT32 size; - TPM_HANDLE handle; -} NV_ENTRY_HEADER; - -#define NV_EVICT_OBJECT_SIZE (sizeof(UINT32) + sizeof(TPM_HANDLE) + sizeof(OBJECT)) - -#define NV_INDEX_COUNTER_SIZE (sizeof(UINT32) + sizeof(NV_INDEX) + sizeof(UINT64)) - -#define NV_RAM_INDEX_COUNTER_SIZE (sizeof(NV_RAM_HEADER) + sizeof(UINT64)) - -typedef struct -{ - UINT32 size; - TPM_HANDLE handle; - TPMA_NV attributes; -} NV_RAM_HEADER; - -// Defines the end-of-list marker for NV. The list terminator is -// a UINT32 of zero, followed by the current value of s_maxCounter which is a -// 64-bit value. The structure is defined as an array of 3 UINT32 values so that -// there is no padding between the UINT32 list end marker and the UINT64 maxCounter -// value. -typedef UINT32 NV_LIST_TERMINATOR[3]; - -//** Orderly RAM Values -// The following defines are for accessing orderly RAM values. - -// This is the initialize for the RAM reference iterator. -#define NV_RAM_REF_INIT 0 -// This is the starting address of the RAM space used for orderly data -#define RAM_ORDERLY_START (&s_indexOrderlyRam[0]) -// This is the offset within NV that is used to save the orderly data on an -// orderly shutdown. -#define NV_ORDERLY_START (NV_INDEX_RAM_DATA) -// This is the end of the orderly RAM space. It is actually the first byte after the -// last byte of orderly RAM data -#define RAM_ORDERLY_END (RAM_ORDERLY_START + sizeof(s_indexOrderlyRam)) -// This is the end of the orderly space in NV memory. As with RAM_ORDERLY_END, it is -// actually the offset of the first byte after the end of the NV orderly data. -#define NV_ORDERLY_END (NV_ORDERLY_START + sizeof(s_indexOrderlyRam)) - -// Macro to check that an orderly RAM address is with range. -#define ORDERLY_RAM_ADDRESS_OK(start, offset) \ - ((start >= RAM_ORDERLY_START) && ((start + offset - 1) < RAM_ORDERLY_END)) - -#define RETURN_IF_NV_IS_NOT_AVAILABLE \ - { \ - if(g_NvStatus != TPM_RC_SUCCESS) \ - return g_NvStatus; \ - } - -// Routinely have to clear the orderly flag and fail if the -// NV is not available so that it can be cleared. -#define RETURN_IF_ORDERLY \ - { \ - if(NvClearOrderly() != TPM_RC_SUCCESS) \ - return g_NvStatus; \ - } - -#define NV_IS_AVAILABLE (g_NvStatus == TPM_RC_SUCCESS) - -#define IS_ORDERLY(value) (value < SU_DA_USED_VALUE) - -#define NV_IS_ORDERLY (IS_ORDERLY(gp.orderlyState)) - -// Macro to set the NV UPDATE_TYPE. This deals with the fact that the update is -// possibly a combination of UT_NV and UT_ORDERLY. -#define SET_NV_UPDATE(type) g_updateNV |= (type) - -#endif // _NV_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/OIDs.h b/TPMCmd/tpm/include/OIDs.h deleted file mode 100644 index 7482321f..00000000 --- a/TPMCmd/tpm/include/OIDs.h +++ /dev/null @@ -1,287 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _OIDS_H_ -#define _OIDS_H_ - -// All the OIDs in this file are defined as DER-encoded values with a leading tag -// 0x06 (ASN1_OBJECT_IDENTIFIER), followed by a single length byte. This allows the -// OID size to be determined by looking at octet[1] of the OID (total size is -// OID[1] + 2). - -// These macros allow OIDs to be defined (or not) depending on whether the associated -// hash algorithm is implemented. -// NOTE: When one of these macros is used, the NAME needs '_" on each side. The -// exception is when the macro is used for the hash OID when only a single '_' is -// used. -#ifndef ALG_SHA1 -# define ALG_SHA1 NO -#endif -#if ALG_SHA1 -# define SHA1_OID(NAME) MAKE_OID(NAME##SHA1) -#else -# define SHA1_OID(NAME) -#endif -#ifndef ALG_SHA256 -# define ALG_SHA256 NO -#endif -#if ALG_SHA256 -# define SHA256_OID(NAME) MAKE_OID(NAME##SHA256) -#else -# define SHA256_OID(NAME) -#endif -#ifndef ALG_SHA384 -# define ALG_SHA384 NO -#endif -#if ALG_SHA384 -# define SHA384_OID(NAME) MAKE_OID(NAME##SHA384) -#else -# define SHA384_OID(NAME) -#endif -#ifndef ALG_SHA512 -# define ALG_SHA512 NO -#endif -#if ALG_SHA512 -# define SHA512_OID(NAME) MAKE_OID(NAME##SHA512) -#else -# define SHA512_OID(NAME) -#endif -#ifndef ALG_SM3_256 -# define ALG_SM3_256 NO -#endif -#if ALG_SM3_256 -# define SM3_256_OID(NAME) MAKE_OID(NAME##SM3_256) -#else -# define SM3_256_OID(NAME) -#endif -#ifndef ALG_SHA3_256 -# define ALG_SHA3_256 NO -#endif -#if ALG_SHA3_256 -# define SHA3_256_OID(NAME) MAKE_OID(NAME##SHA3_256) -#else -# define SHA3_256_OID(NAME) -#endif -#ifndef ALG_SHA3_384 -# define ALG_SHA3_384 NO -#endif -#if ALG_SHA3_384 -# define SHA3_384_OID(NAME) MAKE_OID(NAME##SHA3_384) -#else -# define SHA3_384_OID(NAME) -#endif -#ifndef ALG_SHA3_512 -# define ALG_SHA3_512 NO -#endif -#if ALG_SHA3_512 -# define SHA3_512_OID(NAME) MAKE_OID(NAME##SHA3_512) -#else -# define SHA3_512_OID(NAME) -#endif - -// These are encoded to take one additional byte of algorithm selector -#define NIST_HASH 0x06, 0x09, 0x60, 0x86, 0x48, 1, 101, 3, 4, 2 -#define NIST_SIG 0x06, 0x09, 0x60, 0x86, 0x48, 1, 101, 3, 4, 3 - -// These hash OIDs used in a lot of places. -#define OID_SHA1_VALUE 0x06, 0x05, 0x2B, 0x0E, 0x03, 0x02, 0x1A -SHA1_OID(_); // Expands to: - // MAKE_OID(_SHA1) - // which expands to: - // EXTERN const BYTE OID_SHA1[] INITIALIZER({OID_SHA1_VALUE}) - // which, depending on the setting of EXTERN and - // INITIALIZER, expands to either: - // extern const BYTE OID_SHA1[] - // or - // const BYTE OID_SHA1[] = {OID_SHA1_VALUE} - // which is: - // const BYTE OID_SHA1[] = {0x06, 0x05, 0x2B, 0x0E, - // 0x03, 0x02, 0x1A} - -#define OID_SHA256_VALUE NIST_HASH, 1 -SHA256_OID(_); - -#define OID_SHA384_VALUE NIST_HASH, 2 -SHA384_OID(_); - -#define OID_SHA512_VALUE NIST_HASH, 3 -SHA512_OID(_); - -#define OID_SM3_256_VALUE 0x06, 0x08, 0x2A, 0x81, 0x1C, 0xCF, 0x55, 0x01, 0x83, 0x11 -SM3_256_OID(_); // (1.2.156.10197.1.401) - -#define OID_SHA3_256_VALUE NIST_HASH, 8 -SHA3_256_OID(_); - -#define OID_SHA3_384_VALUE NIST_HASH, 9 -SHA3_384_OID(_); - -#define OID_SHA3_512_VALUE NIST_HASH, 10 -SHA3_512_OID(_); - -// These are used for RSA-PSS -#if ALG_RSA - -# define OID_MGF1_VALUE \ - 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x08 -MAKE_OID(_MGF1); - -# define OID_RSAPSS_VALUE \ - 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x0A -MAKE_OID(_RSAPSS); - -// This is the OID to designate the public part of an RSA key. -# define OID_PKCS1_PUB_VALUE \ - 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x01 -MAKE_OID(_PKCS1_PUB); - -// These are used for RSA PKCS1 signature Algorithms -# define OID_PKCS1_SHA1_VALUE \ - 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x05 -SHA1_OID(_PKCS1_); // (1.2.840.113549.1.1.5) - -# define OID_PKCS1_SHA256_VALUE \ - 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x0B -SHA256_OID(_PKCS1_); // (1.2.840.113549.1.1.11) - -# define OID_PKCS1_SHA384_VALUE \ - 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x0C -SHA384_OID(_PKCS1_); // (1.2.840.113549.1.1.12) - -# define OID_PKCS1_SHA512_VALUE \ - 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x0D -SHA512_OID(_PKCS1_); //(1.2.840.113549.1.1.13) - -# define OID_PKCS1_SM3_256_VALUE \ - 0x06, 0x08, 0x2A, 0x81, 0x1C, 0xCF, 0x55, 0x01, 0x83, 0x78 -SM3_256_OID(_PKCS1_); // 1.2.156.10197.1.504 - -# define OID_PKCS1_SHA3_256_VALUE NIST_SIG, 14 -SHA3_256_OID(_PKCS1_); -# define OID_PKCS1_SHA3_384_VALUE NIST_SIG, 15 -SHA3_384_OID(_PKCS1_); -# define OID_PKCS1_SHA3_512_VALUE NIST_SIG, 16 -SHA3_512_OID(_PKCS1_); - -#endif // ALG_RSA - -#if ALG_ECDSA - -# define OID_ECDSA_SHA1_VALUE 0x06, 0x07, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x04, 0x01 -SHA1_OID(_ECDSA_); // (1.2.840.10045.4.1) SHA1 digest signed by an ECDSA key. - -# define OID_ECDSA_SHA256_VALUE \ - 0x06, 0x08, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x04, 0x03, 0x02 -SHA256_OID(_ECDSA_); // (1.2.840.10045.4.3.2) SHA256 digest signed by an ECDSA key. - -# define OID_ECDSA_SHA384_VALUE \ - 0x06, 0x08, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x04, 0x03, 0x03 -SHA384_OID(_ECDSA_); // (1.2.840.10045.4.3.3) SHA384 digest signed by an ECDSA key. - -# define OID_ECDSA_SHA512_VALUE \ - 0x06, 0x08, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x04, 0x03, 0x04 -SHA512_OID(_ECDSA_); // (1.2.840.10045.4.3.4) SHA512 digest signed by an ECDSA key. - -# define OID_ECDSA_SM3_256_VALUE \ - 0x06, 0x08, 0x2A, 0x81, 0x1C, 0xCF, 0x55, 0x01, 0x83, 0x75 -SM3_256_OID(_ECDSA_); // 1.2.156.10197.1.501 - -# define OID_ECDSA_SHA3_256_VALUE NIST_SIG, 10 -SHA3_256_OID(_ECDSA_); -# define OID_ECDSA_SHA3_384_VALUE NIST_SIG, 11 -SHA3_384_OID(_ECDSA_); -# define OID_ECDSA_SHA3_512_VALUE NIST_SIG, 12 -SHA3_512_OID(_ECDSA_); - -#endif // ALG_ECDSA - -#if ALG_ECC - -# define OID_ECC_PUBLIC_VALUE 0x06, 0x07, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x02, 0x01 -MAKE_OID(_ECC_PUBLIC); - -# define OID_ECC_NIST_P192_VALUE \ - 0x06, 0x08, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x03, 0x01, 0x01 -# if ECC_NIST_P192 -MAKE_OID(_ECC_NIST_P192); // (1.2.840.10045.3.1.1) 'nistP192' -# endif // ECC_NIST_P192 - -# define OID_ECC_NIST_P224_VALUE 0x06, 0x05, 0x2B, 0x81, 0x04, 0x00, 0x21 -# if ECC_NIST_P224 -MAKE_OID(_ECC_NIST_P224); // (1.3.132.0.33) 'nistP224' -# endif // ECC_NIST_P224 - -# define OID_ECC_NIST_P256_VALUE \ - 0x06, 0x08, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x03, 0x01, 0x07 -# if ECC_NIST_P256 -MAKE_OID(_ECC_NIST_P256); // (1.2.840.10045.3.1.7) 'nistP256' -# endif // ECC_NIST_P256 - -# define OID_ECC_NIST_P384_VALUE 0x06, 0x05, 0x2B, 0x81, 0x04, 0x00, 0x22 -# if ECC_NIST_P384 -MAKE_OID(_ECC_NIST_P384); // (1.3.132.0.34) 'nistP384' -# endif // ECC_NIST_P384 - -# define OID_ECC_NIST_P521_VALUE 0x06, 0x05, 0x2B, 0x81, 0x04, 0x00, 0x23 -# if ECC_NIST_P521 -MAKE_OID(_ECC_NIST_P521); // (1.3.132.0.35) 'nistP521' -# endif // ECC_NIST_P521 - -// No OIDs defined for these anonymous curves -# define OID_ECC_BN_P256_VALUE 0x00 -# if ECC_BN_P256 -MAKE_OID(_ECC_BN_P256); -# endif // ECC_BN_P256 - -# define OID_ECC_BN_P638_VALUE 0x00 -# if ECC_BN_P638 -MAKE_OID(_ECC_BN_P638); -# endif // ECC_BN_P638 - -# define OID_ECC_SM2_P256_VALUE \ - 0x06, 0x08, 0x2A, 0x81, 0x1C, 0xCF, 0x55, 0x01, 0x82, 0x2D -# if ECC_SM2_P256 -MAKE_OID(_ECC_SM2_P256); // Don't know where I found this OID. It needs checking -# endif // ECC_SM2_P256 - -# if ECC_BN_P256 -# define OID_ECC_BN_P256 NULL -# endif // ECC_BN_P256 - -#endif // ALG_ECC - -#define OID_SIZE(OID) (OID[1] + 2) - -#endif // !_OIDS_H_ diff --git a/TPMCmd/tpm/include/Ossl/TpmToOsslHash.h b/TPMCmd/tpm/include/Ossl/TpmToOsslHash.h deleted file mode 100644 index 0a45b99d..00000000 --- a/TPMCmd/tpm/include/Ossl/TpmToOsslHash.h +++ /dev/null @@ -1,201 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// -// This header file is used to 'splice' the OpenSSL hash code into the TPM code. -// -#ifndef HASH_LIB_DEFINED -#define HASH_LIB_DEFINED - -#define HASH_LIB_OSSL - -#include -#include - -#if ALG_SM3_256 -# if defined(OPENSSL_NO_SM3) || OPENSSL_VERSION_NUMBER < 0x10101010L -# undef ALG_SM3_256 -# define ALG_SM3_256 ALG_NO -# elif OPENSSL_VERSION_NUMBER >= 0x10200000L -# include -# else -// OpenSSL 1.1.1 keeps smX.h headers in the include/crypto directory, -// and they do not get installed as part of the libssl package -# define SM3_LBLOCK (64 / 4) - -typedef struct SM3state_st -{ - unsigned int A, B, C, D, E, F, G, H; - unsigned int Nl, Nh; - unsigned int data[SM3_LBLOCK]; - unsigned int num; -} SM3_CTX; - -int sm3_init(SM3_CTX* c); -int sm3_update(SM3_CTX* c, const void* data, size_t len); -int sm3_final(unsigned char* md, SM3_CTX* c); -# endif // OpenSSL < 1.2 -#endif // ALG_SM3_256 - -#include - -#define HASH_ALIGNMENT RADIX_BYTES - -//*************************************************************** -//** Links to the OpenSSL HASH code -//*************************************************************** - -// Redefine the internal name used for each of the hash state structures to the -// name used by the library. -// These defines need to be known in all parts of the TPM so that the structure -// sizes can be properly computed when needed. -#define tpmHashStateSHA1_t SHA_CTX -#define tpmHashStateSHA256_t SHA256_CTX -#define tpmHashStateSHA384_t SHA512_CTX -#define tpmHashStateSHA512_t SHA512_CTX -#define tpmHashStateSM3_256_t SM3_CTX - -// The defines below are only needed when compiling CryptHash.c or CryptSmac.c. -// This isolation is primarily to avoid name space collision. However, if there -// is a real collision, it will likely show up when the linker tries to put things -// together. - -#ifdef _CRYPT_HASH_C_ - -typedef BYTE* PBYTE; -typedef const BYTE* PCBYTE; - -// Define the interface between CryptHash.c to the functions provided by the -// library. For each method, define the calling parameters of the method and then -// define how the method is invoked in CryptHash.c. -// -// All hashes are required to have the same calling sequence. If they don't, create -// a simple adaptation function that converts from the "standard" form of the call -// to the form used by the specific hash (and then send a nasty letter to the -// person who wrote the hash function for the library). -// -// The macro that calls the method also defines how the -// parameters get swizzled between the default form (in CryptHash.c)and the -// library form. -// -// Initialize the hash context -# define HASH_START_METHOD_DEF void(HASH_START_METHOD)(PANY_HASH_STATE state) -# define HASH_START(hashState) ((hashState)->def->method.start)(&(hashState)->state); - -// Add data to the hash -# define HASH_DATA_METHOD_DEF \ - void(HASH_DATA_METHOD)(PANY_HASH_STATE state, PCBYTE buffer, size_t size) -# define HASH_DATA(hashState, dInSize, dIn) \ - ((hashState)->def->method.data)(&(hashState)->state, dIn, dInSize) - -// Finalize the hash and get the digest -# define HASH_END_METHOD_DEF \ - void(HASH_END_METHOD)(BYTE * buffer, PANY_HASH_STATE state) -# define HASH_END(hashState, buffer) \ - ((hashState)->def->method.end)(buffer, &(hashState)->state) - -// Copy the hash context -// Note: For import, export, and copy, memcpy() is used since there is no -// reformatting necessary between the internal and external forms. -# define HASH_STATE_COPY_METHOD_DEF \ - void(HASH_STATE_COPY_METHOD)( \ - PANY_HASH_STATE to, PCANY_HASH_STATE from, size_t size) -# define HASH_STATE_COPY(hashStateOut, hashStateIn) \ - ((hashStateIn)->def->method.copy)(&(hashStateOut)->state, \ - &(hashStateIn)->state, \ - (hashStateIn)->def->contextSize) - -// Copy (with reformatting when necessary) an internal hash structure to an -// external blob -# define HASH_STATE_EXPORT_METHOD_DEF \ - void(HASH_STATE_EXPORT_METHOD)(BYTE * to, PCANY_HASH_STATE from, size_t size) -# define HASH_STATE_EXPORT(to, hashStateFrom) \ - ((hashStateFrom)->def->method.copyOut)( \ - &(((BYTE*)(to))[offsetof(HASH_STATE, state)]), \ - &(hashStateFrom)->state, \ - (hashStateFrom)->def->contextSize) - -// Copy from an external blob to an internal formate (with reformatting when -// necessary -# define HASH_STATE_IMPORT_METHOD_DEF \ - void(HASH_STATE_IMPORT_METHOD)(PANY_HASH_STATE to, const BYTE* from, size_t size) -# define HASH_STATE_IMPORT(hashStateTo, from) \ - ((hashStateTo)->def->method.copyIn)( \ - &(hashStateTo)->state, \ - &(((const BYTE*)(from))[offsetof(HASH_STATE, state)]), \ - (hashStateTo)->def->contextSize) - -// Function aliases. The code in CryptHash.c uses the internal designation for the -// functions. These need to be translated to the function names of the library. -// external name of the -// initialization method -# define tpmHashStart_SHA1 SHA1_Init -# define tpmHashData_SHA1 SHA1_Update -# define tpmHashEnd_SHA1 SHA1_Final -# define tpmHashStateCopy_SHA1 memcpy -# define tpmHashStateExport_SHA1 memcpy -# define tpmHashStateImport_SHA1 memcpy -# define tpmHashStart_SHA256 SHA256_Init -# define tpmHashData_SHA256 SHA256_Update -# define tpmHashEnd_SHA256 SHA256_Final -# define tpmHashStateCopy_SHA256 memcpy -# define tpmHashStateExport_SHA256 memcpy -# define tpmHashStateImport_SHA256 memcpy -# define tpmHashStart_SHA384 SHA384_Init -# define tpmHashData_SHA384 SHA384_Update -# define tpmHashEnd_SHA384 SHA384_Final -# define tpmHashStateCopy_SHA384 memcpy -# define tpmHashStateExport_SHA384 memcpy -# define tpmHashStateImport_SHA384 memcpy -# define tpmHashStart_SHA512 SHA512_Init -# define tpmHashData_SHA512 SHA512_Update -# define tpmHashEnd_SHA512 SHA512_Final -# define tpmHashStateCopy_SHA512 memcpy -# define tpmHashStateExport_SHA512 memcpy -# define tpmHashStateImport_SHA512 memcpy -# define tpmHashStart_SM3_256 sm3_init -# define tpmHashData_SM3_256 sm3_update -# define tpmHashEnd_SM3_256 sm3_final -# define tpmHashStateCopy_SM3_256 memcpy -# define tpmHashStateExport_SM3_256 memcpy -# define tpmHashStateImport_SM3_256 memcpy - -#endif // _CRYPT_HASH_C_ - -#define LibHashInit() -// This definition would change if there were something to report -#define HashLibSimulationEnd() - -#endif // HASH_LIB_DEFINED diff --git a/TPMCmd/tpm/include/Ossl/TpmToOsslMath.h b/TPMCmd/tpm/include/Ossl/TpmToOsslMath.h deleted file mode 100644 index ddaded45..00000000 --- a/TPMCmd/tpm/include/Ossl/TpmToOsslMath.h +++ /dev/null @@ -1,132 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This file contains the structure definitions used for ECC in the OpenSSL -// version of the code. These definitions would change, based on the library. -// The ECC-related structures that cross the TPM interface are defined -// in TpmTypes.h -// - -#ifndef MATH_LIB_DEFINED -#define MATH_LIB_DEFINED - -#define MATH_LIB_OSSL - -#include -#include - -#define SYMMETRIC_ALIGNMENT RADIX_BYTES - -#if OPENSSL_VERSION_NUMBER >= 0x10200000L -// Check the bignum_st definition in crypto/bn/bn_lcl.h and either update the -// version check or provide the new definition for this version. -# error Untested OpenSSL version -#elif OPENSSL_VERSION_NUMBER >= 0x10100000L -// from crypto/bn/bn_lcl.h -struct bignum_st -{ - BN_ULONG* d; /* Pointer to an array of 'BN_BITS2' bit - * chunks. */ - int top; /* Index of last used d +1. */ - /* The next are internal book keeping for bn_expand. */ - int dmax; /* Size of the d array. */ - int neg; /* one if the number is negative */ - int flags; -}; -#else -# define EC_POINT_get_affine_coordinates EC_POINT_get_affine_coordinates_GFp -# define EC_POINT_set_affine_coordinates EC_POINT_set_affine_coordinates_GFp -#endif // OPENSSL_VERSION_NUMBER - -#include - -//** Macros and Defines - -// Make sure that the library is using the correct size for a crypt word -#if defined THIRTY_TWO_BIT && (RADIX_BITS != 32) \ - || ((defined SIXTY_FOUR_BIT_LONG || defined SIXTY_FOUR_BIT) \ - && (RADIX_BITS != 64)) -# error Ossl library is using different radix -#endif - -// Allocate a local BIGNUM value. For the allocation, a bigNum structure is created -// as is a local BIGNUM. The bigNum is initialized and then the BIGNUM is -// set to reference the local value. -#define BIG_VAR(name, bits) \ - BN_VAR(name##Bn, (bits)); \ - BIGNUM _##name; \ - BIGNUM* name = BigInitialized( \ - &_##name, BnInit(name##Bn, BYTES_TO_CRYPT_WORDS(sizeof(_##name##Bn.d)))) - -// Allocate a BIGNUM and initialize with the values in a bigNum initializer -#define BIG_INITIALIZED(name, initializer) \ - BIGNUM _##name; \ - BIGNUM* name = BigInitialized(&_##name, initializer) - -typedef struct -{ - const ECC_CURVE_DATA* C; // the TPM curve values - EC_GROUP* G; // group parameters - BN_CTX* CTX; // the context for the math (this might not be - // the context in which the curve was created>; -} OSSL_CURVE_DATA; - -typedef OSSL_CURVE_DATA* bigCurve; - -#define AccessCurveData(E) ((E)->C) - -#include "TpmToOsslSupport_fp.h" - -// Start and end a context within which the OpenSSL memory management works -#define OSSL_ENTER() BN_CTX* CTX = OsslContextEnter() -#define OSSL_LEAVE() OsslContextLeave(CTX) - -// Start and end a context that spans multiple ECC functions. This is used so that -// the group for the curve can persist across multiple frames. -#define CURVE_INITIALIZED(name, initializer) \ - OSSL_CURVE_DATA _##name; \ - bigCurve name = BnCurveInitialize(&_##name, initializer) -#define CURVE_FREE(name) BnCurveFree(name) - -// Start and end a local stack frame within the context of the curve frame -#define ECC_ENTER() BN_CTX* CTX = OsslPushContext(E->CTX) -#define ECC_LEAVE() OsslPopContext(CTX) - -#define BN_NEW() BnNewVariable(CTX) - -// This definition would change if there were something to report -#define MathLibSimulationEnd() - -#endif // MATH_LIB_DEFINED diff --git a/TPMCmd/tpm/include/Ossl/TpmToOsslSym.h b/TPMCmd/tpm/include/Ossl/TpmToOsslSym.h deleted file mode 100644 index b07a0bc4..00000000 --- a/TPMCmd/tpm/include/Ossl/TpmToOsslSym.h +++ /dev/null @@ -1,181 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// -// This header file is used to 'splice' the OpenSSL library into the TPM code. -// -// The support required of a library are a hash module, a block cipher module and -// portions of a big number library. - -// All of the library-dependent headers should have the same guard to that only the -// first one gets defined. -#ifndef SYM_LIB_DEFINED -#define SYM_LIB_DEFINED - -#define SYM_LIB_OSSL - -#include - -#if ALG_TDES -# include -#endif - -#if ALG_SM4 -# if defined(OPENSSL_NO_SM4) || OPENSSL_VERSION_NUMBER < 0x10101010L -# undef ALG_SM4 -# define ALG_SM4 ALG_NO -# elif OPENSSL_VERSION_NUMBER >= 0x10200000L -# include -# else -// OpenSSL 1.1.1 keeps smX.h headers in the include/crypto directory, -// and they do not get installed as part of the libssl package - -# define SM4_KEY_SCHEDULE 32 - -typedef struct SM4_KEY_st -{ - uint32_t rk[SM4_KEY_SCHEDULE]; -} SM4_KEY; - -int SM4_set_key(const uint8_t* key, SM4_KEY* ks); -void SM4_encrypt(const uint8_t* in, uint8_t* out, const SM4_KEY* ks); -void SM4_decrypt(const uint8_t* in, uint8_t* out, const SM4_KEY* ks); -# endif // OpenSSL < 1.2 -#endif // ALG_SM4 - -#if ALG_CAMELLIA -# include -#endif - -#include -#include - -//*************************************************************** -//** Links to the OpenSSL symmetric algorithms. -//*************************************************************** - -// The Crypt functions that call the block encryption function use the parameters -// in the order: -// 1) keySchedule -// 2) in buffer -// 3) out buffer -// Since open SSL uses the order in encryptoCall_t above, need to swizzle the -// values to the order required by the library. -#define SWIZZLE(keySchedule, in, out) \ - (const BYTE*)(in), (BYTE*)(out), (void*)(keySchedule) - -// Define the order of parameters to the library functions that do block encryption -// and decryption. -typedef void (*TpmCryptSetSymKeyCall_t)(const BYTE* in, BYTE* out, void* keySchedule); - -#define SYM_ALIGNMENT RADIX_BYTES - -//*************************************************************** -//** Links to the OpenSSL AES code -//*************************************************************** -// Macros to set up the encryption/decryption key schedules -// -// AES: -#define TpmCryptSetEncryptKeyAES(key, keySizeInBits, schedule) \ - AES_set_encrypt_key((key), (keySizeInBits), (tpmKeyScheduleAES*)(schedule)) -#define TpmCryptSetDecryptKeyAES(key, keySizeInBits, schedule) \ - AES_set_decrypt_key((key), (keySizeInBits), (tpmKeyScheduleAES*)(schedule)) - -// Macros to alias encryption calls to specific algorithms. This should be used -// sparingly. Currently, only used by CryptSym.c and CryptRand.c -// -// When using these calls, to call the AES block encryption code, the caller -// should use: -// TpmCryptEncryptAES(SWIZZLE(keySchedule, in, out)); -#define TpmCryptEncryptAES AES_encrypt -#define TpmCryptDecryptAES AES_decrypt -#define tpmKeyScheduleAES AES_KEY - -//*************************************************************** -//** Links to the OpenSSL DES code -//*************************************************************** -#if ALG_TDES -# include "TpmToOsslDesSupport_fp.h" -#endif - -#define TpmCryptSetEncryptKeyTDES(key, keySizeInBits, schedule) \ - TDES_set_encrypt_key((key), (keySizeInBits), (tpmKeyScheduleTDES*)(schedule)) -#define TpmCryptSetDecryptKeyTDES(key, keySizeInBits, schedule) \ - TDES_set_encrypt_key((key), (keySizeInBits), (tpmKeyScheduleTDES*)(schedule)) - -// Macros to alias encryption calls to specific algorithms. This should be used -// sparingly. Currently, only used by CryptRand.c -#define TpmCryptEncryptTDES TDES_encrypt -#define TpmCryptDecryptTDES TDES_decrypt -#define tpmKeyScheduleTDES DES_key_schedule - -//*************************************************************** -//** Links to the OpenSSL SM4 code -//*************************************************************** -// Macros to set up the encryption/decryption key schedules -#define TpmCryptSetEncryptKeySM4(key, keySizeInBits, schedule) \ - SM4_set_key((key), (tpmKeyScheduleSM4*)(schedule)) -#define TpmCryptSetDecryptKeySM4(key, keySizeInBits, schedule) \ - SM4_set_key((key), (tpmKeyScheduleSM4*)(schedule)) - -// Macros to alias encryption calls to specific algorithms. This should be used -// sparingly. -#define TpmCryptEncryptSM4 SM4_encrypt -#define TpmCryptDecryptSM4 SM4_decrypt -#define tpmKeyScheduleSM4 SM4_KEY - -//*************************************************************** -//** Links to the OpenSSL CAMELLIA code -//*************************************************************** -// Macros to set up the encryption/decryption key schedules -#define TpmCryptSetEncryptKeyCAMELLIA(key, keySizeInBits, schedule) \ - Camellia_set_key((key), (keySizeInBits), (tpmKeyScheduleCAMELLIA*)(schedule)) -#define TpmCryptSetDecryptKeyCAMELLIA(key, keySizeInBits, schedule) \ - Camellia_set_key((key), (keySizeInBits), (tpmKeyScheduleCAMELLIA*)(schedule)) - -// Macros to alias encryption calls to specific algorithms. This should be used -// sparingly. -#define TpmCryptEncryptCAMELLIA Camellia_encrypt -#define TpmCryptDecryptCAMELLIA Camellia_decrypt -#define tpmKeyScheduleCAMELLIA CAMELLIA_KEY - -// Forward reference - -typedef union tpmCryptKeySchedule_t tpmCryptKeySchedule_t; - -// This definition would change if there were something to report -#define SymLibSimulationEnd() - -#endif // SYM_LIB_DEFINED diff --git a/TPMCmd/tpm/include/PRNG_TestVectors.h b/TPMCmd/tpm/include/PRNG_TestVectors.h deleted file mode 100644 index 4a53fffa..00000000 --- a/TPMCmd/tpm/include/PRNG_TestVectors.h +++ /dev/null @@ -1,131 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef _MSBN_DRBG_TEST_VECTORS_H -#define _MSBN_DRBG_TEST_VECTORS_H - -//#if DRBG_ALGORITHM == TPM_ALG_AES && DRBG_KEY_BITS == 256 -#if DRBG_KEY_SIZE_BITS == 256 - -/*(NIST test vector) -[AES-256 no df] -[PredictionResistance = False] -[EntropyInputLen = 384] -[NonceLen = 128] -[PersonalizationStringLen = 0] -[AdditionalInputLen = 0] - -COUNT = 0 -EntropyInput = 0d15aa80 b16c3a10 906cfedb 795dae0b 5b81041c 5c5bfacb - 373d4440 d9120f7e 3d6cf909 86cf52d8 5d3e947d 8c061f91 -Nonce = 06caef5f b538e08e 1f3b0452 03f8f4b2 -PersonalizationString = -AdditionalInput = - INTERMEDIATE Key = be5df629 34cc1230 166a6773 345bbd6b - 4c8869cf 8aec1c3b 1aa98bca 37cacf61 - INTERMEDIATE V = 3182dd1e 7638ec70 014e93bd 813e524c - INTERMEDIATE ReturnedBits = 28e0ebb8 21016650 8c8f65f2 207bd0a3 -EntropyInputReseed = 6ee793a3 3955d72a d12fd80a 8a3fcf95 ed3b4dac 5795fe25 - cf869f7c 27573bbc 56f1acae 13a65042 b340093c 464a7a22 -AdditionalInputReseed = -AdditionalInput = -ReturnedBits = 946f5182 d54510b9 461248f5 71ca06c9 -*/ - -// Entropy is the size of the state. The state is the size of the key -// plus the IV. The IV is a block. If Key = 256 and Block = 128 then State = 384 -# define DRBG_TEST_INITIATE_ENTROPY \ - 0x0d, 0x15, 0xaa, 0x80, 0xb1, 0x6c, 0x3a, 0x10, 0x90, 0x6c, 0xfe, 0xdb, 0x79, \ - 0x5d, 0xae, 0x0b, 0x5b, 0x81, 0x04, 0x1c, 0x5c, 0x5b, 0xfa, 0xcb, 0x37, \ - 0x3d, 0x44, 0x40, 0xd9, 0x12, 0x0f, 0x7e, 0x3d, 0x6c, 0xf9, 0x09, 0x86, \ - 0xcf, 0x52, 0xd8, 0x5d, 0x3e, 0x94, 0x7d, 0x8c, 0x06, 0x1f, 0x91 - -# define DRBG_TEST_RESEED_ENTROPY \ - 0x6e, 0xe7, 0x93, 0xa3, 0x39, 0x55, 0xd7, 0x2a, 0xd1, 0x2f, 0xd8, 0x0a, 0x8a, \ - 0x3f, 0xcf, 0x95, 0xed, 0x3b, 0x4d, 0xac, 0x57, 0x95, 0xfe, 0x25, 0xcf, \ - 0x86, 0x9f, 0x7c, 0x27, 0x57, 0x3b, 0xbc, 0x56, 0xf1, 0xac, 0xae, 0x13, \ - 0xa6, 0x50, 0x42, 0xb3, 0x40, 0x09, 0x3c, 0x46, 0x4a, 0x7a, 0x22 - -# define DRBG_TEST_GENERATED_INTERM \ - 0x28, 0xe0, 0xeb, 0xb8, 0x21, 0x01, 0x66, 0x50, 0x8c, 0x8f, 0x65, 0xf2, 0x20, \ - 0x7b, 0xd0, 0xa3 - -# define DRBG_TEST_GENERATED \ - 0x94, 0x6f, 0x51, 0x82, 0xd5, 0x45, 0x10, 0xb9, 0x46, 0x12, 0x48, 0xf5, 0x71, \ - 0xca, 0x06, 0xc9 -#elif DRBG_KEY_SIZE_BITS == 128 -/*(NIST test vector) -[AES-128 no df] -[PredictionResistance = False] -[EntropyInputLen = 256] -[NonceLen = 64] -[PersonalizationStringLen = 0] -[AdditionalInputLen = 0] - -COUNT = 0 -EntropyInput = 8fc11bdb5aabb7e093b61428e0907303cb459f3b600dad870955f22da80a44f8 -Nonce = be1f73885ddd15aa -PersonalizationString = -AdditionalInput = - INTERMEDIATE Key = b134ecc836df6dbd624900af118dd7e6 - INTERMEDIATE V = 01bb09e86dabd75c9f26dbf6f9531368 - INTERMEDIATE ReturnedBits = dc3cf6bf5bd341135f2c6811a1071c87 -EntropyInputReseed = - 0cd53cd5eccd5a10d7ea266111259b05574fc6ddd8bed8bd72378cf82f1dba2a -AdditionalInputReseed = -AdditionalInput = -ReturnedBits = b61850decfd7106d44769a8e6e8c1ad4 -*/ - -# define DRBG_TEST_INITIATE_ENTROPY \ - 0x8f, 0xc1, 0x1b, 0xdb, 0x5a, 0xab, 0xb7, 0xe0, 0x93, 0xb6, 0x14, 0x28, 0xe0, \ - 0x90, 0x73, 0x03, 0xcb, 0x45, 0x9f, 0x3b, 0x60, 0x0d, 0xad, 0x87, 0x09, \ - 0x55, 0xf2, 0x2d, 0xa8, 0x0a, 0x44, 0xf8 - -# define DRBG_TEST_RESEED_ENTROPY \ - 0x0c, 0xd5, 0x3c, 0xd5, 0xec, 0xcd, 0x5a, 0x10, 0xd7, 0xea, 0x26, 0x61, 0x11, \ - 0x25, 0x9b, 0x05, 0x57, 0x4f, 0xc6, 0xdd, 0xd8, 0xbe, 0xd8, 0xbd, 0x72, \ - 0x37, 0x8c, 0xf8, 0x2f, 0x1d, 0xba, 0x2a - -# define DRBG_TEST_GENERATED_INTERM \ - 0xdc, 0x3c, 0xf6, 0xbf, 0x5b, 0xd3, 0x41, 0x13, 0x5f, 0x2c, 0x68, 0x11, 0xa1, \ - 0x07, 0x1c, 0x87 - -# define DRBG_TEST_GENERATED \ - 0xb6, 0x18, 0x50, 0xde, 0xcf, 0xd7, 0x10, 0x6d, 0x44, 0x76, 0x9a, 0x8e, 0x6e, \ - 0x8c, 0x1a, 0xd4 - -#endif - -#endif // _MSBN_DRBG_TEST_VECTORS_H \ No newline at end of file diff --git a/TPMCmd/tpm/include/SelfTest.h b/TPMCmd/tpm/include/SelfTest.h deleted file mode 100644 index f483932c..00000000 --- a/TPMCmd/tpm/include/SelfTest.h +++ /dev/null @@ -1,105 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This file contains the structure definitions for the self-test. It also contains -// macros for use when the self-test is implemented. -#ifndef _SELF_TEST_H_ -#define _SELF_TEST_H_ - -//** Defines - -// Was typing this a lot -#define SELF_TEST_FAILURE FAIL(FATAL_ERROR_SELF_TEST) - -// Use the definition of key sizes to set algorithm values for key size. -#define AES_ENTRIES (AES_128 + AES_192 + AES_256) -#define SM4_ENTRIES (SM4_128) -#define CAMELLIA_ENTRIES (CAMELLIA_128 + CAMELLIA_192 + CAMELLIA_256) -#define TDES_ENTRIES (TDES_128 + TDES_192) - -#define NUM_SYMS (AES_ENTRIES + SM4_ENTRIES + CAMELLIA_ENTRIES + TDES_ENTRIES) - -typedef UINT32 SYM_INDEX; - -// These two defines deal with the fact that the TPM_ALG_ID table does not delimit -// the symmetric mode values with a SYM_MODE_FIRST and SYM_MODE_LAST -#define SYM_MODE_FIRST ALG_CTR_VALUE -#define SYM_MODE_LAST ALG_ECB_VALUE - -#define NUM_SYM_MODES (SYM_MODE_LAST - SYM_MODE_FIRST + 1) - -// Define a type to hold a bit vector for the modes. -#if NUM_SYM_MODES <= 0 -# error "No symmetric modes implemented" -#elif NUM_SYM_MODES <= 8 -typedef BYTE SYM_MODES; -#elif NUM_SYM_MODES <= 16 -typedef UINT16 SYM_MODES; -#elif NUM_SYM_MODES <= 32 -typedef UINT32 SYM_MODES; -#else -# error "Too many symmetric modes" -#endif - -typedef struct SYMMETRIC_TEST_VECTOR -{ - const TPM_ALG_ID alg; // the algorithm - const UINT16 keyBits; // bits in the key - const BYTE* key; // The test key - const UINT32 ivSize; // block size of the algorithm - const UINT32 dataInOutSize; // size to encrypt/decrypt - const BYTE* dataIn; // data to encrypt - const BYTE* dataOut[NUM_SYM_MODES]; // data to decrypt -} SYMMETRIC_TEST_VECTOR; - -#if ALG_SHA512 -# define DEFAULT_TEST_HASH ALG_SHA512_VALUE -# define DEFAULT_TEST_DIGEST_SIZE SHA512_DIGEST_SIZE -# define DEFAULT_TEST_HASH_BLOCK_SIZE SHA512_BLOCK_SIZE -#elif ALG_SHA384 -# define DEFAULT_TEST_HASH ALG_SHA384_VALUE -# define DEFAULT_TEST_DIGEST_SIZE SHA384_DIGEST_SIZE -# define DEFAULT_TEST_HASH_BLOCK_SIZE SHA384_BLOCK_SIZE -#elif ALG_SHA256 -# define DEFAULT_TEST_HASH ALG_SHA256_VALUE -# define DEFAULT_TEST_DIGEST_SIZE SHA256_DIGEST_SIZE -# define DEFAULT_TEST_HASH_BLOCK_SIZE SHA256_BLOCK_SIZE -#elif ALG_SHA1 -# define DEFAULT_TEST_HASH ALG_SHA1_VALUE -# define DEFAULT_TEST_DIGEST_SIZE SHA1_DIGEST_SIZE -# define DEFAULT_TEST_HASH_BLOCK_SIZE SHA1_BLOCK_SIZE -#endif - -#endif // _SELF_TEST_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/SupportLibraryFunctionPrototypes_fp.h b/TPMCmd/tpm/include/SupportLibraryFunctionPrototypes_fp.h deleted file mode 100644 index c5cf455d..00000000 --- a/TPMCmd/tpm/include/SupportLibraryFunctionPrototypes_fp.h +++ /dev/null @@ -1,124 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This file contains the function prototypes for the functions that need to be -// present in the selected math library. For each function listed, there should -// be a small stub function. That stub provides the interface between the TPM -// code and the support library. In most cases, the stub function will only need -// to do a format conversion between the TPM big number and the support library -// big number. The TPM big number format was chosen to make this relatively -// simple and fast. -// -// Arithmetic operations return a BOOL to indicate if the operation completed -// successfully or not. - -#ifndef SUPPORT_LIBRARY_FUNCTION_PROTOTYPES_H -#define SUPPORT_LIBRARY_FUNCTION_PROTOTYPES_H - -//** SupportLibInit() -// This function is called by CryptInit() so that necessary initializations can be -// performed on the cryptographic library. -LIB_EXPORT -int SupportLibInit(void); - -//** MathLibraryCompatibililtyCheck() -// This function is only used during development to make sure that the library -// that is being referenced is using the same size of data structures as the TPM. -BOOL MathLibraryCompatibilityCheck(void); - -//** BnModMult() -// Does 'op1' * 'op2' and divide by 'modulus' returning the remainder of the divide. -LIB_EXPORT BOOL BnModMult( - bigNum result, bigConst op1, bigConst op2, bigConst modulus); - -//** BnMult() -// Multiplies two numbers and returns the result -LIB_EXPORT BOOL BnMult(bigNum result, bigConst multiplicand, bigConst multiplier); - -//** BnDiv() -// This function divides two bigNum values. The function returns FALSE if there is -// an error in the operation. -LIB_EXPORT BOOL BnDiv( - bigNum quotient, bigNum remainder, bigConst dividend, bigConst divisor); -//** BnMod() -#define BnMod(a, b) BnDiv(NULL, (a), (a), (b)) - -//** BnGcd() -// Get the greatest common divisor of two numbers. This function is only needed -// when the TPM implements RSA. -LIB_EXPORT BOOL BnGcd(bigNum gcd, bigConst number1, bigConst number2); - -//** BnModExp() -// Do modular exponentiation using bigNum values. This function is only needed -// when the TPM implements RSA. -LIB_EXPORT BOOL BnModExp( - bigNum result, bigConst number, bigConst exponent, bigConst modulus); -//** BnModInverse() -// Modular multiplicative inverse. This function is only needed -// when the TPM implements RSA. -LIB_EXPORT BOOL BnModInverse(bigNum result, bigConst number, bigConst modulus); - -//** BnEccModMult() -// This function does a point multiply of the form R = [d]S. A return of FALSE -// indicates that the result was the point at infinity. This function is only needed -// if the TPM supports ECC. -LIB_EXPORT BOOL BnEccModMult(bigPoint R, pointConst S, bigConst d, bigCurve E); - -//** BnEccModMult2() -// This function does a point multiply of the form R = [d]S + [u]Q. A return of -// FALSE indicates that the result was the point at infinity. This function is only -// needed if the TPM supports ECC. -LIB_EXPORT BOOL BnEccModMult2( - bigPoint R, pointConst S, bigConst d, pointConst Q, bigConst u, bigCurve E); - -//** BnEccAdd() -// This function does a point add R = S + Q. A return of FALSE -// indicates that the result was the point at infinity. This function is only needed -// if the TPM supports ECC. -LIB_EXPORT BOOL BnEccAdd(bigPoint R, pointConst S, pointConst Q, bigCurve E); - -//** BnCurveInitialize() -// This function is used to initialize the pointers of a bnCurve_t structure. The -// structure is a set of pointers to bigNum values. The curve-dependent values are -// set by a different function. This function is only needed -// if the TPM supports ECC. -LIB_EXPORT bigCurve BnCurveInitialize(bigCurve E, TPM_ECC_CURVE curveId); - -//*** BnCurveFree() -// This function will free the allocated components of the curve and end the -// frame in which the curve data exists -LIB_EXPORT void BnCurveFree(bigCurve E); - -#endif \ No newline at end of file diff --git a/TPMCmd/tpm/include/SymmetricTest.h b/TPMCmd/tpm/include/SymmetricTest.h deleted file mode 100644 index 2f71ff17..00000000 --- a/TPMCmd/tpm/include/SymmetricTest.h +++ /dev/null @@ -1,107 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction - -// This file contains the structures and data definitions for the symmetric tests. -// This file references the header file that contains the actual test vectors. This -// organization was chosen so that the program that is used to generate the test -// vector values does not have to also re-generate this data. -#ifndef SELF_TEST_DATA -# error "This file may only be included in AlgorithmTests.c" -#endif - -#ifndef _SYMMETRIC_TEST_H -# define _SYMMETRIC_TEST_H -# include "SymmetricTestData.h" - -//** Symmetric Test Structures - -const SYMMETRIC_TEST_VECTOR c_symTestValues[NUM_SYMS + 1] = { -# if ALG_AES && AES_128 - {TPM_ALG_AES, - 128, - key_AES128, - 16, - sizeof(dataIn_AES128), - dataIn_AES128, - {dataOut_AES128_CTR, - dataOut_AES128_OFB, - dataOut_AES128_CBC, - dataOut_AES128_CFB, - dataOut_AES128_ECB}}, -# endif -# if ALG_AES && AES_192 - {TPM_ALG_AES, - 192, - key_AES192, - 16, - sizeof(dataIn_AES192), - dataIn_AES192, - {dataOut_AES192_CTR, - dataOut_AES192_OFB, - dataOut_AES192_CBC, - dataOut_AES192_CFB, - dataOut_AES192_ECB}}, -# endif -# if ALG_AES && AES_256 - {TPM_ALG_AES, - 256, - key_AES256, - 16, - sizeof(dataIn_AES256), - dataIn_AES256, - {dataOut_AES256_CTR, - dataOut_AES256_OFB, - dataOut_AES256_CBC, - dataOut_AES256_CFB, - dataOut_AES256_ECB}}, -# endif -// There are no SM4 test values yet so... -# if ALG_SM4 && SM4_128 && 0 - {TPM_ALG_SM4, - 128, - key_SM4128, - 16, - sizeof(dataIn_SM4128), - dataIn_SM4128, - {dataOut_SM4128_CTR, - dataOut_SM4128_OFB, - dataOut_SM4128_CBC, - dataOut_SM4128_CFB, - dataOut_AES128_ECB}}, -# endif - {0}}; - -#endif // _SYMMETRIC_TEST_H diff --git a/TPMCmd/tpm/include/TPMB.h b/TPMCmd/tpm/include/TPMB.h deleted file mode 100644 index 3a6cb26b..00000000 --- a/TPMCmd/tpm/include/TPMB.h +++ /dev/null @@ -1,74 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -// -// This file contains extra TPM2B structures -// - -#ifndef _TPMB_H -#define _TPMB_H - -// TPM2B Types -typedef struct -{ - UINT16 size; - BYTE buffer[1]; -} TPM2B, *P2B; -typedef const TPM2B* PC2B; - -// This macro helps avoid having to type in the structure in order to create -// a new TPM2B type that is used in a function. -#define TPM2B_TYPE(name, bytes) \ - typedef union \ - { \ - struct \ - { \ - UINT16 size; \ - BYTE buffer[(bytes)]; \ - } t; \ - TPM2B b; \ - } TPM2B_##name - -// This macro defines a TPM2B with a constant character value. This macro -// sets the size of the string to the size minus the terminating zero byte. -// This lets the user of the label add their terminating 0. This method -// is chosen so that existing code that provides a label will continue -// to work correctly. - -// Macro to instance and initialize a TPM2B value -#define TPM2B_INIT(TYPE, name) TPM2B_##TYPE name = {sizeof(name.t.buffer), {0}} - -#define TPM2B_BYTE_VALUE(bytes) TPM2B_TYPE(bytes##_BYTE_VALUE, bytes) - -#endif diff --git a/TPMCmd/tpm/include/TableMarshalDefines.h b/TPMCmd/tpm/include/TableMarshalDefines.h deleted file mode 100644 index 6b898556..00000000 --- a/TPMCmd/tpm/include/TableMarshalDefines.h +++ /dev/null @@ -1,1453 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by NewMarshal; Version 1.4 Apr 7, 2019 - * Date: Mar 6, 2020 Time: 01:50:10PM - */ - -#ifndef _TABLE_MARSHAL_DEFINES_H_ -#define _TABLE_MARSHAL_DEFINES_H_ - -#define NULL_SHIFT 15 -#define NULL_FLAG (1 << NULL_SHIFT) - -// The range macro processes a min, max value and produces a values that is used in -// the computation to see if something is within a range. The max value is (max-min). -// This lets the check for something ('val') within a range become: -// if((val - min) <= max) // passes if in range -// if((val - min) > max) // passes if not in range -// This works because all values are converted to UINT32 values before the compare. -// For (val - min), all values greater than or equal to val will become positive -// values with a value equal to 'min' being zero. This means that in an unsigned -// compare against 'max,' any value that is outside the range will appear to be a -// number greater than max. The benefit of this operation is that this will work even -// if the input value is a signed number as long as the input is sign extended. - -#define RANGE(_min_, _max_, _base_) (UINT32) _min_, (UINT32)((_base_)(_max_ - _min_)) - -// This macro is like the offsetof macro but, instead of computing the offset of -// a structure element, it computes the stride between elements that are in a -// structure array. This is used instead of sizeof() because the sizeof() operator on -// a structure can return an implementation dependent value. -#define STRIDE(s) ((UINT16)(size_t) & (((s*)0)[1])) - -#define MARSHAL_REF(TYPE) ((UINT16)(offsetof(MARSHAL_DATA, TYPE))) - -// This macro creates the entry in the array lookup table -#define ARRAY_MARSHAL_ENTRY(TYPE) \ - { \ - (marshalIndex_t) TYPE##_MARSHAL_REF, (UINT16)STRIDE(TYPE) \ - } - -// Defines for array lookup -#define UINT8_ARRAY_MARSHAL_INDEX 0 // 0x00 -#define TPM_CC_ARRAY_MARSHAL_INDEX 1 // 0x01 -#define TPMA_CC_ARRAY_MARSHAL_INDEX 2 // 0x02 -#define TPM_ALG_ID_ARRAY_MARSHAL_INDEX 3 // 0x03 -#define TPM_HANDLE_ARRAY_MARSHAL_INDEX 4 // 0x04 -#define TPM2B_DIGEST_ARRAY_MARSHAL_INDEX 5 // 0x05 -#define TPMT_HA_ARRAY_MARSHAL_INDEX 6 // 0x06 -#define TPMS_PCR_SELECTION_ARRAY_MARSHAL_INDEX 7 // 0x07 -#define TPMS_ALG_PROPERTY_ARRAY_MARSHAL_INDEX 8 // 0x08 -#define TPMS_TAGGED_PROPERTY_ARRAY_MARSHAL_INDEX 9 // 0x09 -#define TPMS_TAGGED_PCR_SELECT_ARRAY_MARSHAL_INDEX 10 // 0x0A -#define TPM_ECC_CURVE_ARRAY_MARSHAL_INDEX 11 // 0x0B -#define TPMS_TAGGED_POLICY_ARRAY_MARSHAL_INDEX 12 // 0x0C -#define TPMS_ACT_DATA_ARRAY_MARSHAL_INDEX 13 // 0x0D -#define TPMS_AC_OUTPUT_ARRAY_MARSHAL_INDEX 14 // 0x0E - -// Defines for referencing a type by offset -#define UINT8_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, UINT8_DATA))) -#define BYTE_MARSHAL_REF UINT8_MARSHAL_REF -#define TPM_HT_MARSHAL_REF UINT8_MARSHAL_REF -#define TPMA_LOCALITY_MARSHAL_REF UINT8_MARSHAL_REF -#define UINT16_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, UINT16_DATA))) -#define TPM_KEY_SIZE_MARSHAL_REF UINT16_MARSHAL_REF -#define TPM_KEY_BITS_MARSHAL_REF UINT16_MARSHAL_REF -#define TPM_ALG_ID_MARSHAL_REF UINT16_MARSHAL_REF -#define TPM_ST_MARSHAL_REF UINT16_MARSHAL_REF -#define UINT32_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, UINT32_DATA))) -#define TPM_ALGORITHM_ID_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_MODIFIER_INDICATOR_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_AUTHORIZATION_SIZE_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_PARAMETER_SIZE_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_SPEC_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_CONSTANTS32_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_CC_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_RC_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_PT_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_PT_PCR_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_PS_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_HANDLE_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_RH_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_HC_MARSHAL_REF UINT32_MARSHAL_REF -#define TPMA_PERMANENT_MARSHAL_REF UINT32_MARSHAL_REF -#define TPMA_STARTUP_CLEAR_MARSHAL_REF UINT32_MARSHAL_REF -#define TPMA_MEMORY_MARSHAL_REF UINT32_MARSHAL_REF -#define TPMA_CC_MARSHAL_REF UINT32_MARSHAL_REF -#define TPMA_MODES_MARSHAL_REF UINT32_MARSHAL_REF -#define TPMA_X509_KEY_USAGE_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_NV_INDEX_MARSHAL_REF UINT32_MARSHAL_REF -#define TPM_AE_MARSHAL_REF UINT32_MARSHAL_REF -#define UINT64_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, UINT64_DATA))) -#define INT8_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, INT8_DATA))) -#define INT16_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, INT16_DATA))) -#define INT32_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, INT32_DATA))) -#define INT64_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, INT64_DATA))) -#define UINT0_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, UINT0_DATA))) -#define TPM_ECC_CURVE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM_ECC_CURVE_DATA))) -#define TPM_CLOCK_ADJUST_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM_CLOCK_ADJUST_DATA))) -#define TPM_EO_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM_EO_DATA))) -#define TPM_SU_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM_SU_DATA))) -#define TPM_SE_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM_SE_DATA))) -#define TPM_CAP_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM_CAP_DATA))) -#define TPMA_ALGORITHM_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMA_ALGORITHM_DATA))) -#define TPMA_OBJECT_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMA_OBJECT_DATA))) -#define TPMA_SESSION_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMA_SESSION_DATA))) -#define TPMA_ACT_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMA_ACT_DATA))) -#define TPMI_YES_NO_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMI_YES_NO_DATA))) -#define TPMI_DH_OBJECT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_DH_OBJECT_DATA))) -#define TPMI_DH_PARENT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_DH_PARENT_DATA))) -#define TPMI_DH_PERSISTENT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_DH_PERSISTENT_DATA))) -#define TPMI_DH_ENTITY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_DH_ENTITY_DATA))) -#define TPMI_DH_PCR_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMI_DH_PCR_DATA))) -#define TPMI_SH_AUTH_SESSION_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_SH_AUTH_SESSION_DATA))) -#define TPMI_SH_HMAC_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_SH_HMAC_DATA))) -#define TPMI_SH_POLICY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_SH_POLICY_DATA))) -#define TPMI_DH_CONTEXT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_DH_CONTEXT_DATA))) -#define TPMI_DH_SAVED_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_DH_SAVED_DATA))) -#define TPMI_RH_HIERARCHY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_HIERARCHY_DATA))) -#define TPMI_RH_ENABLES_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_ENABLES_DATA))) -#define TPMI_RH_HIERARCHY_AUTH_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_HIERARCHY_AUTH_DATA))) -#define TPMI_RH_HIERARCHY_POLICY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_HIERARCHY_POLICY_DATA))) -#define TPMI_RH_PLATFORM_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_PLATFORM_DATA))) -#define TPMI_RH_OWNER_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_OWNER_DATA))) -#define TPMI_RH_ENDORSEMENT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_ENDORSEMENT_DATA))) -#define TPMI_RH_PROVISION_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_PROVISION_DATA))) -#define TPMI_RH_CLEAR_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_CLEAR_DATA))) -#define TPMI_RH_NV_AUTH_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_NV_AUTH_DATA))) -#define TPMI_RH_LOCKOUT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_LOCKOUT_DATA))) -#define TPMI_RH_NV_INDEX_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RH_NV_INDEX_DATA))) -#define TPMI_RH_AC_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMI_RH_AC_DATA))) -#define TPMI_RH_ACT_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMI_RH_ACT_DATA))) -#define TPMI_ALG_HASH_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_HASH_DATA))) -#define TPMI_ALG_ASYM_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_ASYM_DATA))) -#define TPMI_ALG_SYM_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_SYM_DATA))) -#define TPMI_ALG_SYM_OBJECT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_SYM_OBJECT_DATA))) -#define TPMI_ALG_SYM_MODE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_SYM_MODE_DATA))) -#define TPMI_ALG_KDF_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_KDF_DATA))) -#define TPMI_ALG_SIG_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_SIG_SCHEME_DATA))) -#define TPMI_ECC_KEY_EXCHANGE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ECC_KEY_EXCHANGE_DATA))) -#define TPMI_ST_COMMAND_TAG_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ST_COMMAND_TAG_DATA))) -#define TPMI_ALG_MAC_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_MAC_SCHEME_DATA))) -#define TPMI_ALG_CIPHER_MODE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_CIPHER_MODE_DATA))) -#define TPMS_EMPTY_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMS_EMPTY_DATA))) -#define TPMS_ENC_SCHEME_RSAES_MARSHAL_REF TPMS_EMPTY_MARSHAL_REF -#define TPMS_ALGORITHM_DESCRIPTION_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_ALGORITHM_DESCRIPTION_DATA))) -#define TPMU_HA_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMU_HA_DATA))) -#define TPMT_HA_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMT_HA_DATA))) -#define TPM2B_DIGEST_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_DIGEST_DATA))) -#define TPM2B_NONCE_MARSHAL_REF TPM2B_DIGEST_MARSHAL_REF -#define TPM2B_AUTH_MARSHAL_REF TPM2B_DIGEST_MARSHAL_REF -#define TPM2B_OPERAND_MARSHAL_REF TPM2B_DIGEST_MARSHAL_REF -#define TPM2B_DATA_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM2B_DATA_DATA))) -#define TPM2B_EVENT_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM2B_EVENT_DATA))) -#define TPM2B_MAX_BUFFER_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_MAX_BUFFER_DATA))) -#define TPM2B_MAX_NV_BUFFER_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_MAX_NV_BUFFER_DATA))) -#define TPM2B_TIMEOUT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_TIMEOUT_DATA))) -#define TPM2B_IV_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM2B_IV_DATA))) -#define NULL_UNION_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, NULL_UNION_DATA))) -#define TPMU_NAME_MARSHAL_REF NULL_UNION_MARSHAL_REF -#define TPMU_SENSITIVE_CREATE_MARSHAL_REF NULL_UNION_MARSHAL_REF -#define TPM2B_NAME_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM2B_NAME_DATA))) -#define TPMS_PCR_SELECT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_PCR_SELECT_DATA))) -#define TPMS_PCR_SELECTION_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_PCR_SELECTION_DATA))) -#define TPMT_TK_CREATION_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_TK_CREATION_DATA))) -#define TPMT_TK_VERIFIED_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_TK_VERIFIED_DATA))) -#define TPMT_TK_AUTH_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_TK_AUTH_DATA))) -#define TPMT_TK_HASHCHECK_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_TK_HASHCHECK_DATA))) -#define TPMS_ALG_PROPERTY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_ALG_PROPERTY_DATA))) -#define TPMS_TAGGED_PROPERTY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_TAGGED_PROPERTY_DATA))) -#define TPMS_TAGGED_PCR_SELECT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_TAGGED_PCR_SELECT_DATA))) -#define TPMS_TAGGED_POLICY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_TAGGED_POLICY_DATA))) -#define TPMS_ACT_DATA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_ACT_DATA_DATA))) -#define TPML_CC_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPML_CC_DATA))) -#define TPML_CCA_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPML_CCA_DATA))) -#define TPML_ALG_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPML_ALG_DATA))) -#define TPML_HANDLE_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPML_HANDLE_DATA))) -#define TPML_DIGEST_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPML_DIGEST_DATA))) -#define TPML_DIGEST_VALUES_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPML_DIGEST_VALUES_DATA))) -#define TPML_PCR_SELECTION_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPML_PCR_SELECTION_DATA))) -#define TPML_ALG_PROPERTY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPML_ALG_PROPERTY_DATA))) -#define TPML_TAGGED_TPM_PROPERTY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPML_TAGGED_TPM_PROPERTY_DATA))) -#define TPML_TAGGED_PCR_PROPERTY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPML_TAGGED_PCR_PROPERTY_DATA))) -#define TPML_ECC_CURVE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPML_ECC_CURVE_DATA))) -#define TPML_TAGGED_POLICY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPML_TAGGED_POLICY_DATA))) -#define TPML_ACT_DATA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPML_ACT_DATA_DATA))) -#define TPMU_CAPABILITIES_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_CAPABILITIES_DATA))) -#define TPMS_CAPABILITY_DATA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_CAPABILITY_DATA_DATA))) -#define TPMS_CLOCK_INFO_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_CLOCK_INFO_DATA))) -#define TPMS_TIME_INFO_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_TIME_INFO_DATA))) -#define TPMS_TIME_ATTEST_INFO_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_TIME_ATTEST_INFO_DATA))) -#define TPMS_CERTIFY_INFO_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_CERTIFY_INFO_DATA))) -#define TPMS_QUOTE_INFO_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_QUOTE_INFO_DATA))) -#define TPMS_COMMAND_AUDIT_INFO_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_COMMAND_AUDIT_INFO_DATA))) -#define TPMS_SESSION_AUDIT_INFO_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_SESSION_AUDIT_INFO_DATA))) -#define TPMS_CREATION_INFO_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_CREATION_INFO_DATA))) -#define TPMS_NV_CERTIFY_INFO_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_NV_CERTIFY_INFO_DATA))) -#define TPMS_NV_DIGEST_CERTIFY_INFO_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_NV_DIGEST_CERTIFY_INFO_DATA))) -#define TPMI_ST_ATTEST_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ST_ATTEST_DATA))) -#define TPMU_ATTEST_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMU_ATTEST_DATA))) -#define TPMS_ATTEST_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMS_ATTEST_DATA))) -#define TPM2B_ATTEST_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_ATTEST_DATA))) -#define TPMS_AUTH_COMMAND_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_AUTH_COMMAND_DATA))) -#define TPMS_AUTH_RESPONSE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_AUTH_RESPONSE_DATA))) -#define TPMI_TDES_KEY_BITS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_TDES_KEY_BITS_DATA))) -#define TPMI_AES_KEY_BITS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_AES_KEY_BITS_DATA))) -#define TPMI_SM4_KEY_BITS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_SM4_KEY_BITS_DATA))) -#define TPMI_CAMELLIA_KEY_BITS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_CAMELLIA_KEY_BITS_DATA))) -#define TPMU_SYM_KEY_BITS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_SYM_KEY_BITS_DATA))) -#define TPMU_SYM_MODE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_SYM_MODE_DATA))) -#define TPMT_SYM_DEF_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_SYM_DEF_DATA))) -#define TPMT_SYM_DEF_OBJECT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_SYM_DEF_OBJECT_DATA))) -#define TPM2B_SYM_KEY_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_SYM_KEY_DATA))) -#define TPMS_SYMCIPHER_PARMS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_SYMCIPHER_PARMS_DATA))) -#define TPM2B_LABEL_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM2B_LABEL_DATA))) -#define TPMS_DERIVE_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMS_DERIVE_DATA))) -#define TPM2B_DERIVE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_DERIVE_DATA))) -#define TPM2B_SENSITIVE_DATA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_SENSITIVE_DATA_DATA))) -#define TPMS_SENSITIVE_CREATE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_SENSITIVE_CREATE_DATA))) -#define TPM2B_SENSITIVE_CREATE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_SENSITIVE_CREATE_DATA))) -#define TPMS_SCHEME_HASH_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_SCHEME_HASH_DATA))) -#define TPMS_SCHEME_HMAC_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_SIG_SCHEME_RSASSA_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_SIG_SCHEME_RSAPSS_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_SIG_SCHEME_ECDSA_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_SIG_SCHEME_SM2_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_SIG_SCHEME_ECSCHNORR_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_ENC_SCHEME_OAEP_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_KEY_SCHEME_ECDH_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_KEY_SCHEME_ECMQV_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_KDF_SCHEME_MGF1_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_KDF_SCHEME_KDF1_SP800_56A_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_KDF_SCHEME_KDF2_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_KDF_SCHEME_KDF1_SP800_108_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF -#define TPMS_SCHEME_ECDAA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_SCHEME_ECDAA_DATA))) -#define TPMS_SIG_SCHEME_ECDAA_MARSHAL_REF TPMS_SCHEME_ECDAA_MARSHAL_REF -#define TPMI_ALG_KEYEDHASH_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_KEYEDHASH_SCHEME_DATA))) -#define TPMS_SCHEME_XOR_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_SCHEME_XOR_DATA))) -#define TPMU_SCHEME_KEYEDHASH_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_SCHEME_KEYEDHASH_DATA))) -#define TPMT_KEYEDHASH_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_KEYEDHASH_SCHEME_DATA))) -#define TPMU_SIG_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_SIG_SCHEME_DATA))) -#define TPMT_SIG_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_SIG_SCHEME_DATA))) -#define TPMU_KDF_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_KDF_SCHEME_DATA))) -#define TPMT_KDF_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_KDF_SCHEME_DATA))) -#define TPMI_ALG_ASYM_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_ASYM_SCHEME_DATA))) -#define TPMU_ASYM_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_ASYM_SCHEME_DATA))) -#define TPMI_ALG_RSA_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_RSA_SCHEME_DATA))) -#define TPMT_RSA_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_RSA_SCHEME_DATA))) -#define TPMI_ALG_RSA_DECRYPT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_RSA_DECRYPT_DATA))) -#define TPMT_RSA_DECRYPT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_RSA_DECRYPT_DATA))) -#define TPM2B_PUBLIC_KEY_RSA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_PUBLIC_KEY_RSA_DATA))) -#define TPMI_RSA_KEY_BITS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_RSA_KEY_BITS_DATA))) -#define TPM2B_PRIVATE_KEY_RSA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_PRIVATE_KEY_RSA_DATA))) -#define TPM2B_ECC_PARAMETER_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_ECC_PARAMETER_DATA))) -#define TPMS_ECC_POINT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_ECC_POINT_DATA))) -#define TPM2B_ECC_POINT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_ECC_POINT_DATA))) -#define TPMI_ALG_ECC_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_ECC_SCHEME_DATA))) -#define TPMI_ECC_CURVE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ECC_CURVE_DATA))) -#define TPMT_ECC_SCHEME_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_ECC_SCHEME_DATA))) -#define TPMS_ALGORITHM_DETAIL_ECC_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_ALGORITHM_DETAIL_ECC_DATA))) -#define TPMS_SIGNATURE_RSA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_SIGNATURE_RSA_DATA))) -#define TPMS_SIGNATURE_RSASSA_MARSHAL_REF TPMS_SIGNATURE_RSA_MARSHAL_REF -#define TPMS_SIGNATURE_RSAPSS_MARSHAL_REF TPMS_SIGNATURE_RSA_MARSHAL_REF -#define TPMS_SIGNATURE_ECC_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_SIGNATURE_ECC_DATA))) -#define TPMS_SIGNATURE_ECDAA_MARSHAL_REF TPMS_SIGNATURE_ECC_MARSHAL_REF -#define TPMS_SIGNATURE_ECDSA_MARSHAL_REF TPMS_SIGNATURE_ECC_MARSHAL_REF -#define TPMS_SIGNATURE_SM2_MARSHAL_REF TPMS_SIGNATURE_ECC_MARSHAL_REF -#define TPMS_SIGNATURE_ECSCHNORR_MARSHAL_REF TPMS_SIGNATURE_ECC_MARSHAL_REF -#define TPMU_SIGNATURE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_SIGNATURE_DATA))) -#define TPMT_SIGNATURE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_SIGNATURE_DATA))) -#define TPMU_ENCRYPTED_SECRET_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_ENCRYPTED_SECRET_DATA))) -#define TPM2B_ENCRYPTED_SECRET_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_ENCRYPTED_SECRET_DATA))) -#define TPMI_ALG_PUBLIC_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_PUBLIC_DATA))) -#define TPMU_PUBLIC_ID_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_PUBLIC_ID_DATA))) -#define TPMS_KEYEDHASH_PARMS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_KEYEDHASH_PARMS_DATA))) -#define TPMS_RSA_PARMS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_RSA_PARMS_DATA))) -#define TPMS_ECC_PARMS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_ECC_PARMS_DATA))) -#define TPMU_PUBLIC_PARMS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_PUBLIC_PARMS_DATA))) -#define TPMT_PUBLIC_PARMS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_PUBLIC_PARMS_DATA))) -#define TPMT_PUBLIC_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMT_PUBLIC_DATA))) -#define TPM2B_PUBLIC_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_PUBLIC_DATA))) -#define TPM2B_TEMPLATE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_TEMPLATE_DATA))) -#define TPM2B_PRIVATE_VENDOR_SPECIFIC_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_PRIVATE_VENDOR_SPECIFIC_DATA))) -#define TPMU_SENSITIVE_COMPOSITE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMU_SENSITIVE_COMPOSITE_DATA))) -#define TPMT_SENSITIVE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMT_SENSITIVE_DATA))) -#define TPM2B_SENSITIVE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_SENSITIVE_DATA))) -#define TPM2B_PRIVATE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_PRIVATE_DATA))) -#define TPM2B_ID_OBJECT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_ID_OBJECT_DATA))) -#define TPMS_NV_PIN_COUNTER_PARAMETERS_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_NV_PIN_COUNTER_PARAMETERS_DATA))) -#define TPMA_NV_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMA_NV_DATA))) -#define TPMS_NV_PUBLIC_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_NV_PUBLIC_DATA))) -#define TPM2B_NV_PUBLIC_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_NV_PUBLIC_DATA))) -#define TPM2B_CONTEXT_SENSITIVE_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_CONTEXT_SENSITIVE_DATA))) -#define TPMS_CONTEXT_DATA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_CONTEXT_DATA_DATA))) -#define TPM2B_CONTEXT_DATA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_CONTEXT_DATA_DATA))) -#define TPMS_CONTEXT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_CONTEXT_DATA))) -#define TPMS_CREATION_DATA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_CREATION_DATA_DATA))) -#define TPM2B_CREATION_DATA_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPM2B_CREATION_DATA_DATA))) -#define TPM_AT_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM_AT_DATA))) -#define TPMS_AC_OUTPUT_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPMS_AC_OUTPUT_DATA))) -#define TPML_AC_CAPABILITIES_MARSHAL_REF \ - ((UINT16)(offsetof(MarshalData_st, TPML_AC_CAPABILITIES_DATA))) -#define Type00_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type00_DATA))) -#define Type01_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type01_DATA))) -#define Type02_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type02_DATA))) -#define Type03_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type03_DATA))) -#define Type04_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type04_DATA))) -#define Type05_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type05_DATA))) -#define Type06_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type06_DATA))) -#define Type07_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type07_DATA))) -#define Type08_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type08_DATA))) -#define Type09_MARSHAL_REF Type08_MARSHAL_REF -#define Type14_MARSHAL_REF Type08_MARSHAL_REF -#define Type10_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type10_DATA))) -#define Type11_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type11_DATA))) -#define Type12_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type12_DATA))) -#define Type13_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type13_DATA))) -#define Type15_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type15_DATA))) -#define Type16_MARSHAL_REF Type15_MARSHAL_REF -#define Type17_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type17_DATA))) -#define Type18_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type18_DATA))) -#define Type19_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type19_DATA))) -#define Type20_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type20_DATA))) -#define Type21_MARSHAL_REF Type20_MARSHAL_REF -#define Type22_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type22_DATA))) -#define Type23_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type23_DATA))) -#define Type24_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type24_DATA))) -#define Type25_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type25_DATA))) -#define Type26_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type26_DATA))) -#define Type27_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type27_DATA))) -#define Type28_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type28_DATA))) -#define Type29_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type29_DATA))) -#define Type30_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type30_DATA))) -#define Type31_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type31_DATA))) -#define Type32_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type32_DATA))) -#define Type33_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type33_DATA))) -#define Type34_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type34_DATA))) -#define Type35_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type35_DATA))) -#define Type36_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type36_DATA))) -#define Type37_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type37_DATA))) -#define Type38_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type38_DATA))) -#define Type39_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type39_DATA))) -#define Type40_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type40_DATA))) -#define Type41_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type41_DATA))) -#define Type42_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type42_DATA))) -#define Type43_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type43_DATA))) -#define Type44_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type44_DATA))) - -//#defines to change calling sequence for code using marshaling -#define UINT8_Unmarshal(target, buffer, size) \ - Unmarshal(UINT8_MARSHAL_REF, (target), (buffer), (size)) -#define UINT8_Marshal(source, buffer, size) \ - Marshal(UINT8_MARSHAL_REF, (source), (buffer), (size)) -#define BYTE_Unmarshal(target, buffer, size) \ - Unmarshal(UINT8_MARSHAL_REF, (target), (buffer), (size)) -#define BYTE_Marshal(source, buffer, size) \ - Marshal(UINT8_MARSHAL_REF, (source), (buffer), (size)) -#define INT8_Unmarshal(target, buffer, size) \ - Unmarshal(INT8_MARSHAL_REF, (target), (buffer), (size)) -#define INT8_Marshal(source, buffer, size) \ - Marshal(INT8_MARSHAL_REF, (source), (buffer), (size)) -#define UINT16_Unmarshal(target, buffer, size) \ - Unmarshal(UINT16_MARSHAL_REF, (target), (buffer), (size)) -#define UINT16_Marshal(source, buffer, size) \ - Marshal(UINT16_MARSHAL_REF, (source), (buffer), (size)) -#define INT16_Unmarshal(target, buffer, size) \ - Unmarshal(INT16_MARSHAL_REF, (target), (buffer), (size)) -#define INT16_Marshal(source, buffer, size) \ - Marshal(INT16_MARSHAL_REF, (source), (buffer), (size)) -#define UINT32_Unmarshal(target, buffer, size) \ - Unmarshal(UINT32_MARSHAL_REF, (target), (buffer), (size)) -#define UINT32_Marshal(source, buffer, size) \ - Marshal(UINT32_MARSHAL_REF, (source), (buffer), (size)) -#define INT32_Unmarshal(target, buffer, size) \ - Unmarshal(INT32_MARSHAL_REF, (target), (buffer), (size)) -#define INT32_Marshal(source, buffer, size) \ - Marshal(INT32_MARSHAL_REF, (source), (buffer), (size)) -#define UINT64_Unmarshal(target, buffer, size) \ - Unmarshal(UINT64_MARSHAL_REF, (target), (buffer), (size)) -#define UINT64_Marshal(source, buffer, size) \ - Marshal(UINT64_MARSHAL_REF, (source), (buffer), (size)) -#define INT64_Unmarshal(target, buffer, size) \ - Unmarshal(INT64_MARSHAL_REF, (target), (buffer), (size)) -#define INT64_Marshal(source, buffer, size) \ - Marshal(INT64_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_ALGORITHM_ID_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_ALGORITHM_ID_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_ALGORITHM_ID_Marshal(source, buffer, size) \ - Marshal(TPM_ALGORITHM_ID_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_MODIFIER_INDICATOR_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_MODIFIER_INDICATOR_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_MODIFIER_INDICATOR_Marshal(source, buffer, size) \ - Marshal(TPM_MODIFIER_INDICATOR_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_AUTHORIZATION_SIZE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_AUTHORIZATION_SIZE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_AUTHORIZATION_SIZE_Marshal(source, buffer, size) \ - Marshal(TPM_AUTHORIZATION_SIZE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_PARAMETER_SIZE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_PARAMETER_SIZE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_PARAMETER_SIZE_Marshal(source, buffer, size) \ - Marshal(TPM_PARAMETER_SIZE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_KEY_SIZE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_KEY_SIZE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_KEY_SIZE_Marshal(source, buffer, size) \ - Marshal(TPM_KEY_SIZE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_KEY_BITS_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_KEY_BITS_Marshal(source, buffer, size) \ - Marshal(TPM_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_CONSTANTS32_Marshal(source, buffer, size) \ - Marshal(TPM_CONSTANTS32_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_ALG_ID_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_ALG_ID_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_ALG_ID_Marshal(source, buffer, size) \ - Marshal(TPM_ALG_ID_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_ECC_CURVE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_ECC_CURVE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_ECC_CURVE_Marshal(source, buffer, size) \ - Marshal(TPM_ECC_CURVE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_CC_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_CC_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_CC_Marshal(source, buffer, size) \ - Marshal(TPM_CC_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_RC_Marshal(source, buffer, size) \ - Marshal(TPM_RC_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_CLOCK_ADJUST_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_CLOCK_ADJUST_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_EO_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_EO_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_EO_Marshal(source, buffer, size) \ - Marshal(TPM_EO_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_ST_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_ST_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_ST_Marshal(source, buffer, size) \ - Marshal(TPM_ST_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_SU_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_SU_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_SE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_SE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_CAP_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_CAP_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_CAP_Marshal(source, buffer, size) \ - Marshal(TPM_CAP_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_PT_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_PT_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_PT_Marshal(source, buffer, size) \ - Marshal(TPM_PT_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_PT_PCR_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_PT_PCR_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_PT_PCR_Marshal(source, buffer, size) \ - Marshal(TPM_PT_PCR_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_PS_Marshal(source, buffer, size) \ - Marshal(TPM_PS_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_HANDLE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_HANDLE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_HANDLE_Marshal(source, buffer, size) \ - Marshal(TPM_HANDLE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_HT_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_HT_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_HT_Marshal(source, buffer, size) \ - Marshal(TPM_HT_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_RH_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_RH_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_RH_Marshal(source, buffer, size) \ - Marshal(TPM_RH_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_HC_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_HC_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_HC_Marshal(source, buffer, size) \ - Marshal(TPM_HC_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_ALGORITHM_Unmarshal(target, buffer, size) \ - Unmarshal(TPMA_ALGORITHM_MARSHAL_REF, (target), (buffer), (size)) -#define TPMA_ALGORITHM_Marshal(source, buffer, size) \ - Marshal(TPMA_ALGORITHM_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_OBJECT_Unmarshal(target, buffer, size) \ - Unmarshal(TPMA_OBJECT_MARSHAL_REF, (target), (buffer), (size)) -#define TPMA_OBJECT_Marshal(source, buffer, size) \ - Marshal(TPMA_OBJECT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_SESSION_Unmarshal(target, buffer, size) \ - Unmarshal(TPMA_SESSION_MARSHAL_REF, (target), (buffer), (size)) -#define TPMA_SESSION_Marshal(source, buffer, size) \ - Marshal(TPMA_SESSION_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_LOCALITY_Unmarshal(target, buffer, size) \ - Unmarshal(TPMA_LOCALITY_MARSHAL_REF, (target), (buffer), (size)) -#define TPMA_LOCALITY_Marshal(source, buffer, size) \ - Marshal(TPMA_LOCALITY_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_PERMANENT_Marshal(source, buffer, size) \ - Marshal(TPMA_PERMANENT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_STARTUP_CLEAR_Marshal(source, buffer, size) \ - Marshal(TPMA_STARTUP_CLEAR_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_MEMORY_Marshal(source, buffer, size) \ - Marshal(TPMA_MEMORY_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_CC_Marshal(source, buffer, size) \ - Marshal(TPMA_CC_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_MODES_Marshal(source, buffer, size) \ - Marshal(TPMA_MODES_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_X509_KEY_USAGE_Marshal(source, buffer, size) \ - Marshal(TPMA_X509_KEY_USAGE_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_ACT_Unmarshal(target, buffer, size) \ - Unmarshal(TPMA_ACT_MARSHAL_REF, (target), (buffer), (size)) -#define TPMA_ACT_Marshal(source, buffer, size) \ - Marshal(TPMA_ACT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_YES_NO_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_YES_NO_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_YES_NO_Marshal(source, buffer, size) \ - Marshal(TPMI_YES_NO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_DH_OBJECT_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_DH_OBJECT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_DH_OBJECT_Marshal(source, buffer, size) \ - Marshal(TPMI_DH_OBJECT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_DH_PARENT_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_DH_PARENT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_DH_PARENT_Marshal(source, buffer, size) \ - Marshal(TPMI_DH_PARENT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_DH_PERSISTENT_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_DH_PERSISTENT_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_DH_PERSISTENT_Marshal(source, buffer, size) \ - Marshal(TPMI_DH_PERSISTENT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_DH_ENTITY_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_DH_ENTITY_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_DH_PCR_Unmarshal(target, buffer, size, flag) \ - Unmarshal( \ - TPMI_DH_PCR_MARSHAL_REF | (flag ? NULL_FLAG : 0), (target), (buffer), (size)) -#define TPMI_SH_AUTH_SESSION_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_SH_AUTH_SESSION_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_SH_AUTH_SESSION_Marshal(source, buffer, size) \ - Marshal(TPMI_SH_AUTH_SESSION_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_SH_HMAC_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_SH_HMAC_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_SH_HMAC_Marshal(source, buffer, size) \ - Marshal(TPMI_SH_HMAC_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_SH_POLICY_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_SH_POLICY_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_SH_POLICY_Marshal(source, buffer, size) \ - Marshal(TPMI_SH_POLICY_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_DH_CONTEXT_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_DH_CONTEXT_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_DH_CONTEXT_Marshal(source, buffer, size) \ - Marshal(TPMI_DH_CONTEXT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_DH_SAVED_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_DH_SAVED_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_DH_SAVED_Marshal(source, buffer, size) \ - Marshal(TPMI_DH_SAVED_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_RH_HIERARCHY_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_RH_HIERARCHY_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_RH_HIERARCHY_Marshal(source, buffer, size) \ - Marshal(TPMI_RH_HIERARCHY_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_RH_ENABLES_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_RH_ENABLES_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_RH_ENABLES_Marshal(source, buffer, size) \ - Marshal(TPMI_RH_ENABLES_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_RH_HIERARCHY_AUTH_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RH_HIERARCHY_AUTH_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RH_HIERARCHY_POLICY_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RH_HIERARCHY_POLICY_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RH_PLATFORM_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RH_PLATFORM_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RH_OWNER_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_RH_OWNER_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_RH_ENDORSEMENT_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_RH_ENDORSEMENT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_RH_PROVISION_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RH_PROVISION_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RH_CLEAR_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RH_CLEAR_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RH_NV_AUTH_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RH_NV_AUTH_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RH_LOCKOUT_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RH_LOCKOUT_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RH_NV_INDEX_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RH_NV_INDEX_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RH_NV_INDEX_Marshal(source, buffer, size) \ - Marshal(TPMI_RH_NV_INDEX_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_RH_AC_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RH_AC_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RH_ACT_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RH_ACT_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RH_ACT_Marshal(source, buffer, size) \ - Marshal(TPMI_RH_ACT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_HASH_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_HASH_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_HASH_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_HASH_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_ASYM_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_ASYM_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_ASYM_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_ASYM_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_SYM_Unmarshal(target, buffer, size, flag) \ - Unmarshal( \ - TPMI_ALG_SYM_MARSHAL_REF | (flag ? NULL_FLAG : 0), (target), (buffer), (size)) -#define TPMI_ALG_SYM_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_SYM_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_SYM_OBJECT_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_SYM_OBJECT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_SYM_OBJECT_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_SYM_OBJECT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_SYM_MODE_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_SYM_MODE_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_SYM_MODE_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_SYM_MODE_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_KDF_Unmarshal(target, buffer, size, flag) \ - Unmarshal( \ - TPMI_ALG_KDF_MARSHAL_REF | (flag ? NULL_FLAG : 0), (target), (buffer), (size)) -#define TPMI_ALG_KDF_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_KDF_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_SIG_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_SIG_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_SIG_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_SIG_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ECC_KEY_EXCHANGE_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ECC_KEY_EXCHANGE_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ECC_KEY_EXCHANGE_Marshal(source, buffer, size) \ - Marshal(TPMI_ECC_KEY_EXCHANGE_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ST_COMMAND_TAG_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_ST_COMMAND_TAG_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_ST_COMMAND_TAG_Marshal(source, buffer, size) \ - Marshal(TPMI_ST_COMMAND_TAG_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_MAC_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_MAC_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_MAC_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_MAC_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_CIPHER_MODE_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_CIPHER_MODE_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_CIPHER_MODE_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_CIPHER_MODE_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_EMPTY_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_EMPTY_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_EMPTY_Marshal(source, buffer, size) \ - Marshal(TPMS_EMPTY_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_ALGORITHM_DESCRIPTION_Marshal(source, buffer, size) \ - Marshal(TPMS_ALGORITHM_DESCRIPTION_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_HA_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion(TPMU_HA_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_HA_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_HA_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMT_HA_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMT_HA_MARSHAL_REF | (flag ? NULL_FLAG : 0), (target), (buffer), (size)) -#define TPMT_HA_Marshal(source, buffer, size) \ - Marshal(TPMT_HA_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_DIGEST_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_DIGEST_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_DIGEST_Marshal(source, buffer, size) \ - Marshal(TPM2B_DIGEST_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_DATA_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_DATA_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_DATA_Marshal(source, buffer, size) \ - Marshal(TPM2B_DATA_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_NONCE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_NONCE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_NONCE_Marshal(source, buffer, size) \ - Marshal(TPM2B_NONCE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_AUTH_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_AUTH_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_AUTH_Marshal(source, buffer, size) \ - Marshal(TPM2B_AUTH_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_OPERAND_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_OPERAND_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_OPERAND_Marshal(source, buffer, size) \ - Marshal(TPM2B_OPERAND_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_EVENT_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_EVENT_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_EVENT_Marshal(source, buffer, size) \ - Marshal(TPM2B_EVENT_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_MAX_BUFFER_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_MAX_BUFFER_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_MAX_BUFFER_Marshal(source, buffer, size) \ - Marshal(TPM2B_MAX_BUFFER_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_MAX_NV_BUFFER_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_MAX_NV_BUFFER_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_MAX_NV_BUFFER_Marshal(source, buffer, size) \ - Marshal(TPM2B_MAX_NV_BUFFER_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_TIMEOUT_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_TIMEOUT_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_TIMEOUT_Marshal(source, buffer, size) \ - Marshal(TPM2B_TIMEOUT_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_IV_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_IV_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_IV_Marshal(source, buffer, size) \ - Marshal(TPM2B_IV_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_NAME_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_NAME_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_NAME_Marshal(source, buffer, size) \ - Marshal(TPM2B_NAME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_PCR_SELECT_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_PCR_SELECT_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_PCR_SELECT_Marshal(source, buffer, size) \ - Marshal(TPMS_PCR_SELECT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_PCR_SELECTION_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_PCR_SELECTION_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_PCR_SELECTION_Marshal(source, buffer, size) \ - Marshal(TPMS_PCR_SELECTION_MARSHAL_REF, (source), (buffer), (size)) -#define TPMT_TK_CREATION_Unmarshal(target, buffer, size) \ - Unmarshal(TPMT_TK_CREATION_MARSHAL_REF, (target), (buffer), (size)) -#define TPMT_TK_CREATION_Marshal(source, buffer, size) \ - Marshal(TPMT_TK_CREATION_MARSHAL_REF, (source), (buffer), (size)) -#define TPMT_TK_VERIFIED_Unmarshal(target, buffer, size) \ - Unmarshal(TPMT_TK_VERIFIED_MARSHAL_REF, (target), (buffer), (size)) -#define TPMT_TK_VERIFIED_Marshal(source, buffer, size) \ - Marshal(TPMT_TK_VERIFIED_MARSHAL_REF, (source), (buffer), (size)) -#define TPMT_TK_AUTH_Unmarshal(target, buffer, size) \ - Unmarshal(TPMT_TK_AUTH_MARSHAL_REF, (target), (buffer), (size)) -#define TPMT_TK_AUTH_Marshal(source, buffer, size) \ - Marshal(TPMT_TK_AUTH_MARSHAL_REF, (source), (buffer), (size)) -#define TPMT_TK_HASHCHECK_Unmarshal(target, buffer, size) \ - Unmarshal(TPMT_TK_HASHCHECK_MARSHAL_REF, (target), (buffer), (size)) -#define TPMT_TK_HASHCHECK_Marshal(source, buffer, size) \ - Marshal(TPMT_TK_HASHCHECK_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_ALG_PROPERTY_Marshal(source, buffer, size) \ - Marshal(TPMS_ALG_PROPERTY_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_TAGGED_PROPERTY_Marshal(source, buffer, size) \ - Marshal(TPMS_TAGGED_PROPERTY_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_TAGGED_PCR_SELECT_Marshal(source, buffer, size) \ - Marshal(TPMS_TAGGED_PCR_SELECT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_TAGGED_POLICY_Marshal(source, buffer, size) \ - Marshal(TPMS_TAGGED_POLICY_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_ACT_DATA_Marshal(source, buffer, size) \ - Marshal(TPMS_ACT_DATA_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_CC_Unmarshal(target, buffer, size) \ - Unmarshal(TPML_CC_MARSHAL_REF, (target), (buffer), (size)) -#define TPML_CC_Marshal(source, buffer, size) \ - Marshal(TPML_CC_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_CCA_Marshal(source, buffer, size) \ - Marshal(TPML_CCA_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_ALG_Unmarshal(target, buffer, size) \ - Unmarshal(TPML_ALG_MARSHAL_REF, (target), (buffer), (size)) -#define TPML_ALG_Marshal(source, buffer, size) \ - Marshal(TPML_ALG_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_HANDLE_Marshal(source, buffer, size) \ - Marshal(TPML_HANDLE_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_DIGEST_Unmarshal(target, buffer, size) \ - Unmarshal(TPML_DIGEST_MARSHAL_REF, (target), (buffer), (size)) -#define TPML_DIGEST_Marshal(source, buffer, size) \ - Marshal(TPML_DIGEST_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_DIGEST_VALUES_Unmarshal(target, buffer, size) \ - Unmarshal(TPML_DIGEST_VALUES_MARSHAL_REF, (target), (buffer), (size)) -#define TPML_DIGEST_VALUES_Marshal(source, buffer, size) \ - Marshal(TPML_DIGEST_VALUES_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_PCR_SELECTION_Unmarshal(target, buffer, size) \ - Unmarshal(TPML_PCR_SELECTION_MARSHAL_REF, (target), (buffer), (size)) -#define TPML_PCR_SELECTION_Marshal(source, buffer, size) \ - Marshal(TPML_PCR_SELECTION_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_ALG_PROPERTY_Marshal(source, buffer, size) \ - Marshal(TPML_ALG_PROPERTY_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_TAGGED_TPM_PROPERTY_Marshal(source, buffer, size) \ - Marshal(TPML_TAGGED_TPM_PROPERTY_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_TAGGED_PCR_PROPERTY_Marshal(source, buffer, size) \ - Marshal(TPML_TAGGED_PCR_PROPERTY_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_ECC_CURVE_Marshal(source, buffer, size) \ - Marshal(TPML_ECC_CURVE_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_TAGGED_POLICY_Marshal(source, buffer, size) \ - Marshal(TPML_TAGGED_POLICY_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_ACT_DATA_Marshal(source, buffer, size) \ - Marshal(TPML_ACT_DATA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_CAPABILITIES_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_CAPABILITIES_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMS_CAPABILITY_DATA_Marshal(source, buffer, size) \ - Marshal(TPMS_CAPABILITY_DATA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_CLOCK_INFO_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_CLOCK_INFO_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_CLOCK_INFO_Marshal(source, buffer, size) \ - Marshal(TPMS_CLOCK_INFO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_TIME_INFO_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_TIME_INFO_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_TIME_INFO_Marshal(source, buffer, size) \ - Marshal(TPMS_TIME_INFO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_TIME_ATTEST_INFO_Marshal(source, buffer, size) \ - Marshal(TPMS_TIME_ATTEST_INFO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_CERTIFY_INFO_Marshal(source, buffer, size) \ - Marshal(TPMS_CERTIFY_INFO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_QUOTE_INFO_Marshal(source, buffer, size) \ - Marshal(TPMS_QUOTE_INFO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_COMMAND_AUDIT_INFO_Marshal(source, buffer, size) \ - Marshal(TPMS_COMMAND_AUDIT_INFO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SESSION_AUDIT_INFO_Marshal(source, buffer, size) \ - Marshal(TPMS_SESSION_AUDIT_INFO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_CREATION_INFO_Marshal(source, buffer, size) \ - Marshal(TPMS_CREATION_INFO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_NV_CERTIFY_INFO_Marshal(source, buffer, size) \ - Marshal(TPMS_NV_CERTIFY_INFO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_NV_DIGEST_CERTIFY_INFO_Marshal(source, buffer, size) \ - Marshal(TPMS_NV_DIGEST_CERTIFY_INFO_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ST_ATTEST_Marshal(source, buffer, size) \ - Marshal(TPMI_ST_ATTEST_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_ATTEST_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_ATTEST_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMS_ATTEST_Marshal(source, buffer, size) \ - Marshal(TPMS_ATTEST_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_ATTEST_Marshal(source, buffer, size) \ - Marshal(TPM2B_ATTEST_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_AUTH_COMMAND_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_AUTH_COMMAND_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_AUTH_RESPONSE_Marshal(source, buffer, size) \ - Marshal(TPMS_AUTH_RESPONSE_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_TDES_KEY_BITS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_TDES_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_TDES_KEY_BITS_Marshal(source, buffer, size) \ - Marshal(TPMI_TDES_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_AES_KEY_BITS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_AES_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_AES_KEY_BITS_Marshal(source, buffer, size) \ - Marshal(TPMI_AES_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_SM4_KEY_BITS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_SM4_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_SM4_KEY_BITS_Marshal(source, buffer, size) \ - Marshal(TPMI_SM4_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_CAMELLIA_KEY_BITS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_CAMELLIA_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_CAMELLIA_KEY_BITS_Marshal(source, buffer, size) \ - Marshal(TPMI_CAMELLIA_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_SYM_KEY_BITS_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion( \ - TPMU_SYM_KEY_BITS_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_SYM_KEY_BITS_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_SYM_KEY_BITS_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMU_SYM_MODE_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion(TPMU_SYM_MODE_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_SYM_MODE_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_SYM_MODE_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMT_SYM_DEF_Unmarshal(target, buffer, size, flag) \ - Unmarshal( \ - TPMT_SYM_DEF_MARSHAL_REF | (flag ? NULL_FLAG : 0), (target), (buffer), (size)) -#define TPMT_SYM_DEF_Marshal(source, buffer, size) \ - Marshal(TPMT_SYM_DEF_MARSHAL_REF, (source), (buffer), (size)) -#define TPMT_SYM_DEF_OBJECT_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMT_SYM_DEF_OBJECT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMT_SYM_DEF_OBJECT_Marshal(source, buffer, size) \ - Marshal(TPMT_SYM_DEF_OBJECT_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_SYM_KEY_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_SYM_KEY_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_SYM_KEY_Marshal(source, buffer, size) \ - Marshal(TPM2B_SYM_KEY_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SYMCIPHER_PARMS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SYMCIPHER_PARMS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SYMCIPHER_PARMS_Marshal(source, buffer, size) \ - Marshal(TPMS_SYMCIPHER_PARMS_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_LABEL_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_LABEL_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_LABEL_Marshal(source, buffer, size) \ - Marshal(TPM2B_LABEL_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_DERIVE_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_DERIVE_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_DERIVE_Marshal(source, buffer, size) \ - Marshal(TPMS_DERIVE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_DERIVE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_DERIVE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_DERIVE_Marshal(source, buffer, size) \ - Marshal(TPM2B_DERIVE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_SENSITIVE_DATA_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_SENSITIVE_DATA_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_SENSITIVE_DATA_Marshal(source, buffer, size) \ - Marshal(TPM2B_SENSITIVE_DATA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SENSITIVE_CREATE_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SENSITIVE_CREATE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_SENSITIVE_CREATE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_SENSITIVE_CREATE_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SCHEME_HASH_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SCHEME_HASH_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SCHEME_HASH_Marshal(source, buffer, size) \ - Marshal(TPMS_SCHEME_HASH_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SCHEME_ECDAA_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SCHEME_ECDAA_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SCHEME_ECDAA_Marshal(source, buffer, size) \ - Marshal(TPMS_SCHEME_ECDAA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_KEYEDHASH_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_KEYEDHASH_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_KEYEDHASH_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_KEYEDHASH_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SCHEME_HMAC_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SCHEME_HMAC_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SCHEME_HMAC_Marshal(source, buffer, size) \ - Marshal(TPMS_SCHEME_HMAC_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SCHEME_XOR_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SCHEME_XOR_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SCHEME_XOR_Marshal(source, buffer, size) \ - Marshal(TPMS_SCHEME_XOR_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_SCHEME_KEYEDHASH_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion( \ - TPMU_SCHEME_KEYEDHASH_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_SCHEME_KEYEDHASH_Marshal(source, buffer, size, selector) \ - MarshalUnion( \ - TPMU_SCHEME_KEYEDHASH_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMT_KEYEDHASH_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMT_KEYEDHASH_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMT_KEYEDHASH_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMT_KEYEDHASH_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIG_SCHEME_RSASSA_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIG_SCHEME_RSASSA_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIG_SCHEME_RSASSA_Marshal(source, buffer, size) \ - Marshal(TPMS_SIG_SCHEME_RSASSA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIG_SCHEME_RSAPSS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIG_SCHEME_RSAPSS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIG_SCHEME_RSAPSS_Marshal(source, buffer, size) \ - Marshal(TPMS_SIG_SCHEME_RSAPSS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIG_SCHEME_ECDSA_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIG_SCHEME_ECDSA_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIG_SCHEME_ECDSA_Marshal(source, buffer, size) \ - Marshal(TPMS_SIG_SCHEME_ECDSA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIG_SCHEME_SM2_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIG_SCHEME_SM2_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIG_SCHEME_SM2_Marshal(source, buffer, size) \ - Marshal(TPMS_SIG_SCHEME_SM2_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIG_SCHEME_ECSCHNORR_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIG_SCHEME_ECSCHNORR_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIG_SCHEME_ECSCHNORR_Marshal(source, buffer, size) \ - Marshal(TPMS_SIG_SCHEME_ECSCHNORR_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIG_SCHEME_ECDAA_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIG_SCHEME_ECDAA_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIG_SCHEME_ECDAA_Marshal(source, buffer, size) \ - Marshal(TPMS_SIG_SCHEME_ECDAA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_SIG_SCHEME_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion(TPMU_SIG_SCHEME_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_SIG_SCHEME_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_SIG_SCHEME_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMT_SIG_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMT_SIG_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMT_SIG_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMT_SIG_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_ENC_SCHEME_OAEP_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_ENC_SCHEME_OAEP_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_ENC_SCHEME_OAEP_Marshal(source, buffer, size) \ - Marshal(TPMS_ENC_SCHEME_OAEP_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_ENC_SCHEME_RSAES_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_ENC_SCHEME_RSAES_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_ENC_SCHEME_RSAES_Marshal(source, buffer, size) \ - Marshal(TPMS_ENC_SCHEME_RSAES_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_KEY_SCHEME_ECDH_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_KEY_SCHEME_ECDH_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_KEY_SCHEME_ECDH_Marshal(source, buffer, size) \ - Marshal(TPMS_KEY_SCHEME_ECDH_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_KEY_SCHEME_ECMQV_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_KEY_SCHEME_ECMQV_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_KEY_SCHEME_ECMQV_Marshal(source, buffer, size) \ - Marshal(TPMS_KEY_SCHEME_ECMQV_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_KDF_SCHEME_MGF1_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_KDF_SCHEME_MGF1_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_KDF_SCHEME_MGF1_Marshal(source, buffer, size) \ - Marshal(TPMS_KDF_SCHEME_MGF1_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_KDF_SCHEME_KDF1_SP800_56A_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_KDF_SCHEME_KDF1_SP800_56A_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_KDF_SCHEME_KDF1_SP800_56A_Marshal(source, buffer, size) \ - Marshal(TPMS_KDF_SCHEME_KDF1_SP800_56A_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_KDF_SCHEME_KDF2_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_KDF_SCHEME_KDF2_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_KDF_SCHEME_KDF2_Marshal(source, buffer, size) \ - Marshal(TPMS_KDF_SCHEME_KDF2_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_KDF_SCHEME_KDF1_SP800_108_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_KDF_SCHEME_KDF1_SP800_108_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_KDF_SCHEME_KDF1_SP800_108_Marshal(source, buffer, size) \ - Marshal(TPMS_KDF_SCHEME_KDF1_SP800_108_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_KDF_SCHEME_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion(TPMU_KDF_SCHEME_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_KDF_SCHEME_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_KDF_SCHEME_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMT_KDF_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMT_KDF_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMT_KDF_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMT_KDF_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_ASYM_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_ASYM_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_ASYM_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_ASYM_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_ASYM_SCHEME_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion(TPMU_ASYM_SCHEME_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_ASYM_SCHEME_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_ASYM_SCHEME_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMI_ALG_RSA_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_RSA_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_RSA_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_RSA_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMT_RSA_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMT_RSA_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMT_RSA_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMT_RSA_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_RSA_DECRYPT_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_RSA_DECRYPT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_RSA_DECRYPT_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_RSA_DECRYPT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMT_RSA_DECRYPT_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMT_RSA_DECRYPT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMT_RSA_DECRYPT_Marshal(source, buffer, size) \ - Marshal(TPMT_RSA_DECRYPT_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_PUBLIC_KEY_RSA_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_PUBLIC_KEY_RSA_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_PUBLIC_KEY_RSA_Marshal(source, buffer, size) \ - Marshal(TPM2B_PUBLIC_KEY_RSA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_RSA_KEY_BITS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_RSA_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_RSA_KEY_BITS_Marshal(source, buffer, size) \ - Marshal(TPMI_RSA_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_PRIVATE_KEY_RSA_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_PRIVATE_KEY_RSA_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_PRIVATE_KEY_RSA_Marshal(source, buffer, size) \ - Marshal(TPM2B_PRIVATE_KEY_RSA_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_ECC_PARAMETER_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_ECC_PARAMETER_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_ECC_PARAMETER_Marshal(source, buffer, size) \ - Marshal(TPM2B_ECC_PARAMETER_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_ECC_POINT_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_ECC_POINT_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_ECC_POINT_Marshal(source, buffer, size) \ - Marshal(TPMS_ECC_POINT_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_ECC_POINT_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_ECC_POINT_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_ECC_POINT_Marshal(source, buffer, size) \ - Marshal(TPM2B_ECC_POINT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_ECC_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMI_ALG_ECC_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMI_ALG_ECC_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_ECC_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ECC_CURVE_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_ECC_CURVE_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_ECC_CURVE_Marshal(source, buffer, size) \ - Marshal(TPMI_ECC_CURVE_MARSHAL_REF, (source), (buffer), (size)) -#define TPMT_ECC_SCHEME_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMT_ECC_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMT_ECC_SCHEME_Marshal(source, buffer, size) \ - Marshal(TPMT_ECC_SCHEME_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_ALGORITHM_DETAIL_ECC_Marshal(source, buffer, size) \ - Marshal(TPMS_ALGORITHM_DETAIL_ECC_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIGNATURE_RSA_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIGNATURE_RSA_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIGNATURE_RSA_Marshal(source, buffer, size) \ - Marshal(TPMS_SIGNATURE_RSA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIGNATURE_RSASSA_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIGNATURE_RSASSA_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIGNATURE_RSASSA_Marshal(source, buffer, size) \ - Marshal(TPMS_SIGNATURE_RSASSA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIGNATURE_RSAPSS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIGNATURE_RSAPSS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIGNATURE_RSAPSS_Marshal(source, buffer, size) \ - Marshal(TPMS_SIGNATURE_RSAPSS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIGNATURE_ECC_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIGNATURE_ECC_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIGNATURE_ECC_Marshal(source, buffer, size) \ - Marshal(TPMS_SIGNATURE_ECC_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIGNATURE_ECDAA_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIGNATURE_ECDAA_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIGNATURE_ECDAA_Marshal(source, buffer, size) \ - Marshal(TPMS_SIGNATURE_ECDAA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIGNATURE_ECDSA_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIGNATURE_ECDSA_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIGNATURE_ECDSA_Marshal(source, buffer, size) \ - Marshal(TPMS_SIGNATURE_ECDSA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIGNATURE_SM2_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIGNATURE_SM2_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIGNATURE_SM2_Marshal(source, buffer, size) \ - Marshal(TPMS_SIGNATURE_SM2_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_SIGNATURE_ECSCHNORR_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_SIGNATURE_ECSCHNORR_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_SIGNATURE_ECSCHNORR_Marshal(source, buffer, size) \ - Marshal(TPMS_SIGNATURE_ECSCHNORR_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_SIGNATURE_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion(TPMU_SIGNATURE_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_SIGNATURE_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_SIGNATURE_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMT_SIGNATURE_Unmarshal(target, buffer, size, flag) \ - Unmarshal(TPMT_SIGNATURE_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ - (target), \ - (buffer), \ - (size)) -#define TPMT_SIGNATURE_Marshal(source, buffer, size) \ - Marshal(TPMT_SIGNATURE_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_ENCRYPTED_SECRET_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion( \ - TPMU_ENCRYPTED_SECRET_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_ENCRYPTED_SECRET_Marshal(source, buffer, size, selector) \ - MarshalUnion( \ - TPMU_ENCRYPTED_SECRET_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPM2B_ENCRYPTED_SECRET_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_ENCRYPTED_SECRET_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_ENCRYPTED_SECRET_Marshal(source, buffer, size) \ - Marshal(TPM2B_ENCRYPTED_SECRET_MARSHAL_REF, (source), (buffer), (size)) -#define TPMI_ALG_PUBLIC_Unmarshal(target, buffer, size) \ - Unmarshal(TPMI_ALG_PUBLIC_MARSHAL_REF, (target), (buffer), (size)) -#define TPMI_ALG_PUBLIC_Marshal(source, buffer, size) \ - Marshal(TPMI_ALG_PUBLIC_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_PUBLIC_ID_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion(TPMU_PUBLIC_ID_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_PUBLIC_ID_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_PUBLIC_ID_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMS_KEYEDHASH_PARMS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_KEYEDHASH_PARMS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_KEYEDHASH_PARMS_Marshal(source, buffer, size) \ - Marshal(TPMS_KEYEDHASH_PARMS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_RSA_PARMS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_RSA_PARMS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_RSA_PARMS_Marshal(source, buffer, size) \ - Marshal(TPMS_RSA_PARMS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_ECC_PARMS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_ECC_PARMS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_ECC_PARMS_Marshal(source, buffer, size) \ - Marshal(TPMS_ECC_PARMS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_PUBLIC_PARMS_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion( \ - TPMU_PUBLIC_PARMS_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_PUBLIC_PARMS_Marshal(source, buffer, size, selector) \ - MarshalUnion(TPMU_PUBLIC_PARMS_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMT_PUBLIC_PARMS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMT_PUBLIC_PARMS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMT_PUBLIC_PARMS_Marshal(source, buffer, size) \ - Marshal(TPMT_PUBLIC_PARMS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMT_PUBLIC_Unmarshal(target, buffer, size, flag) \ - Unmarshal( \ - TPMT_PUBLIC_MARSHAL_REF | (flag ? NULL_FLAG : 0), (target), (buffer), (size)) -#define TPMT_PUBLIC_Marshal(source, buffer, size) \ - Marshal(TPMT_PUBLIC_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_PUBLIC_Unmarshal(target, buffer, size, flag) \ - Unmarshal( \ - TPM2B_PUBLIC_MARSHAL_REF | (flag ? NULL_FLAG : 0), (target), (buffer), (size)) -#define TPM2B_PUBLIC_Marshal(source, buffer, size) \ - Marshal(TPM2B_PUBLIC_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_TEMPLATE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_TEMPLATE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_TEMPLATE_Marshal(source, buffer, size) \ - Marshal(TPM2B_TEMPLATE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_PRIVATE_VENDOR_SPECIFIC_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_PRIVATE_VENDOR_SPECIFIC_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_PRIVATE_VENDOR_SPECIFIC_Marshal(source, buffer, size) \ - Marshal(TPM2B_PRIVATE_VENDOR_SPECIFIC_MARSHAL_REF, (source), (buffer), (size)) -#define TPMU_SENSITIVE_COMPOSITE_Unmarshal(target, buffer, size, selector) \ - UnmarshalUnion( \ - TPMU_SENSITIVE_COMPOSITE_MARSHAL_REF, (target), (buffer), (size), (selector)) -#define TPMU_SENSITIVE_COMPOSITE_Marshal(source, buffer, size, selector) \ - MarshalUnion( \ - TPMU_SENSITIVE_COMPOSITE_MARSHAL_REF, (source), (buffer), (size), (selector)) -#define TPMT_SENSITIVE_Unmarshal(target, buffer, size) \ - Unmarshal(TPMT_SENSITIVE_MARSHAL_REF, (target), (buffer), (size)) -#define TPMT_SENSITIVE_Marshal(source, buffer, size) \ - Marshal(TPMT_SENSITIVE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_SENSITIVE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_SENSITIVE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_SENSITIVE_Marshal(source, buffer, size) \ - Marshal(TPM2B_SENSITIVE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_PRIVATE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_PRIVATE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_PRIVATE_Marshal(source, buffer, size) \ - Marshal(TPM2B_PRIVATE_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_ID_OBJECT_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_ID_OBJECT_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_ID_OBJECT_Marshal(source, buffer, size) \ - Marshal(TPM2B_ID_OBJECT_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_NV_INDEX_Marshal(source, buffer, size) \ - Marshal(TPM_NV_INDEX_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_NV_PIN_COUNTER_PARAMETERS_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_NV_PIN_COUNTER_PARAMETERS_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_NV_PIN_COUNTER_PARAMETERS_Marshal(source, buffer, size) \ - Marshal(TPMS_NV_PIN_COUNTER_PARAMETERS_MARSHAL_REF, (source), (buffer), (size)) -#define TPMA_NV_Unmarshal(target, buffer, size) \ - Unmarshal(TPMA_NV_MARSHAL_REF, (target), (buffer), (size)) -#define TPMA_NV_Marshal(source, buffer, size) \ - Marshal(TPMA_NV_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_NV_PUBLIC_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_NV_PUBLIC_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_NV_PUBLIC_Marshal(source, buffer, size) \ - Marshal(TPMS_NV_PUBLIC_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_NV_PUBLIC_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_NV_PUBLIC_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_NV_PUBLIC_Marshal(source, buffer, size) \ - Marshal(TPM2B_NV_PUBLIC_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_CONTEXT_SENSITIVE_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_CONTEXT_SENSITIVE_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_CONTEXT_SENSITIVE_Marshal(source, buffer, size) \ - Marshal(TPM2B_CONTEXT_SENSITIVE_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_CONTEXT_DATA_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_CONTEXT_DATA_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_CONTEXT_DATA_Marshal(source, buffer, size) \ - Marshal(TPMS_CONTEXT_DATA_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_CONTEXT_DATA_Unmarshal(target, buffer, size) \ - Unmarshal(TPM2B_CONTEXT_DATA_MARSHAL_REF, (target), (buffer), (size)) -#define TPM2B_CONTEXT_DATA_Marshal(source, buffer, size) \ - Marshal(TPM2B_CONTEXT_DATA_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_CONTEXT_Unmarshal(target, buffer, size) \ - Unmarshal(TPMS_CONTEXT_MARSHAL_REF, (target), (buffer), (size)) -#define TPMS_CONTEXT_Marshal(source, buffer, size) \ - Marshal(TPMS_CONTEXT_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_CREATION_DATA_Marshal(source, buffer, size) \ - Marshal(TPMS_CREATION_DATA_MARSHAL_REF, (source), (buffer), (size)) -#define TPM2B_CREATION_DATA_Marshal(source, buffer, size) \ - Marshal(TPM2B_CREATION_DATA_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_AT_Unmarshal(target, buffer, size) \ - Unmarshal(TPM_AT_MARSHAL_REF, (target), (buffer), (size)) -#define TPM_AT_Marshal(source, buffer, size) \ - Marshal(TPM_AT_MARSHAL_REF, (source), (buffer), (size)) -#define TPM_AE_Marshal(source, buffer, size) \ - Marshal(TPM_AE_MARSHAL_REF, (source), (buffer), (size)) -#define TPMS_AC_OUTPUT_Marshal(source, buffer, size) \ - Marshal(TPMS_AC_OUTPUT_MARSHAL_REF, (source), (buffer), (size)) -#define TPML_AC_CAPABILITIES_Marshal(source, buffer, size) \ - Marshal(TPML_AC_CAPABILITIES_MARSHAL_REF, (source), (buffer), (size)) - -#endif // _TABLE_MARSHAL_DEFINES_H_ diff --git a/TPMCmd/tpm/include/Tpm.h b/TPMCmd/tpm/include/Tpm.h deleted file mode 100644 index c7bc0886..00000000 --- a/TPMCmd/tpm/include/Tpm.h +++ /dev/null @@ -1,55 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -// Root header file for building any TPM.lib code - -#ifndef _TPM_H_ -#define _TPM_H_ - -#include "TpmBuildSwitches.h" -#include "BaseTypes.h" -#include "TPMB.h" -#include "MinMax.h" - -#include "TpmProfile.h" -#include "TpmAlgorithmDefines.h" -#include "LibSupport.h" // Types from the library. These need to come before - // Global.h because some of the structures in - // that file depend on the structures used by the - // cryptographic libraries. -#include "GpMacros.h" // Define additional macros -#include "Global.h" // Define other TPM types -#include "InternalRoutines.h" // Function prototypes - -#endif // _TPM_H_ diff --git a/TPMCmd/tpm/include/TpmASN1.h b/TPMCmd/tpm/include/TpmASN1.h deleted file mode 100644 index 66ad5503..00000000 --- a/TPMCmd/tpm/include/TpmASN1.h +++ /dev/null @@ -1,126 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This file contains the macro and structure definitions for the X509 commands and -// functions. - -#ifndef _TPMASN1_H_ -#define _TPMASN1_H_ - -//** Includes - -#include "Tpm.h" -#include "OIDs.h" - -//** Defined Constants -//*** ASN.1 Universal Types (Class 00b) -#define ASN1_EOC 0x00 -#define ASN1_BOOLEAN 0x01 -#define ASN1_INTEGER 0x02 -#define ASN1_BITSTRING 0x03 -#define ASN1_OCTET_STRING 0x04 -#define ASN1_NULL 0x05 -#define ASN1_OBJECT_IDENTIFIER 0x06 -#define ASN1_OBJECT_DESCRIPTOR 0x07 -#define ASN1_EXTERNAL 0x08 -#define ASN1_REAL 0x09 -#define ASN1_ENUMERATED 0x0A -#define ASN1_EMBEDDED 0x0B -#define ASN1_UTF8String 0x0C -#define ASN1_RELATIVE_OID 0x0D -#define ASN1_SEQUENCE 0x10 // Primitive + Constructed + 0x10 -#define ASN1_SET 0x11 // Primitive + Constructed + 0x11 -#define ASN1_NumericString 0x12 -#define ASN1_PrintableString 0x13 -#define ASN1_T61String 0x14 -#define ASN1_VideoString 0x15 -#define ASN1_IA5String 0x16 -#define ASN1_UTCTime 0x17 -#define ASN1_GeneralizeTime 0x18 -#define ASN1_VisibleString 0x1A -#define ASN1_GeneralString 0x1B -#define ASN1_UniversalString 0x1C -#define ASN1_CHARACTER STRING 0x1D -#define ASN1_BMPString 0x1E -#define ASN1_CONSTRUCTED 0x20 - -#define ASN1_APPLICAIION_SPECIFIC 0xA0 - -#define ASN1_CONSTRUCTED_SEQUENCE (ASN1_SEQUENCE + ASN1_CONSTRUCTED) - -#define MAX_DEPTH 10 // maximum push depth for marshaling context. - -//** Macros - -//*** Unmarshaling Macros -// Checks the validity of the size making sure that there is no wrap around -#define CHECK_SIZE(context, length) \ - VERIFY((((length) + (context)->offset) >= (context)->offset) \ - && (((length) + (context)->offset) <= (context)->size)) -#define NEXT_OCTET(context) ((context)->buffer[(context)->offset++]) -#define PEEK_NEXT(context) ((context)->buffer[(context)->offset]) - -//*** Marshaling Macros - -// Marshaling works in reverse order. The offset is set to the top of the buffer and, -// as the buffer is filled, 'offset' counts down to zero. When the full thing is -// encoded it can be moved to the top of the buffer. This happens when the last -// context is closed. - -#define CHECK_SPACE(context, length) VERIFY(context->offset > length) - -//** Structures - -typedef struct ASN1UnmarshalContext -{ - BYTE* buffer; // pointer to the buffer - INT16 size; // size of the buffer (a negative number indicates - // a parsing failure). - INT16 offset; // current offset into the buffer (a negative number - // indicates a parsing failure). Not used - BYTE tag; // The last unmarshaled tag -} ASN1UnmarshalContext; - -typedef struct ASN1MarshalContext -{ - BYTE* buffer; // pointer to the start of the buffer - INT16 offset; // place on the top where the last entry was added - // items are added from the bottom up. - INT16 end; // the end offset of the current value - INT16 depth; // how many pushed end values. - INT16 ends[MAX_DEPTH]; -} ASN1MarshalContext; - -#endif // _TPMASN1_H_ diff --git a/TPMCmd/tpm/include/TpmAlgorithmDefines.h b/TPMCmd/tpm/include/TpmAlgorithmDefines.h deleted file mode 100644 index 07760c0d..00000000 --- a/TPMCmd/tpm/include/TpmAlgorithmDefines.h +++ /dev/null @@ -1,409 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Feb 28, 2020 Time: 03:04:46PM - */ - -#ifndef _TPM_ALGORITHM_DEFINES_H_ -#define _TPM_ALGORITHM_DEFINES_H_ - -// Table 2:3 - Definition of Base Types -// Base Types are in BaseTypes.h - -#define ECC_CURVES \ - { \ - TPM_ECC_BN_P256, TPM_ECC_BN_P638, TPM_ECC_NIST_P192, TPM_ECC_NIST_P224, \ - TPM_ECC_NIST_P256, TPM_ECC_NIST_P384, TPM_ECC_NIST_P521, TPM_ECC_SM2_P256 \ - } -#define ECC_CURVE_COUNT \ - (ECC_BN_P256 + ECC_BN_P638 + ECC_NIST_P192 + ECC_NIST_P224 + ECC_NIST_P256 \ - + ECC_NIST_P384 + ECC_NIST_P521 + ECC_SM2_P256) -#define MAX_ECC_KEY_BITS \ - MAX(ECC_BN_P256 * 256, \ - MAX(ECC_BN_P638 * 638, \ - MAX(ECC_NIST_P192 * 192, \ - MAX(ECC_NIST_P224 * 224, \ - MAX(ECC_NIST_P256 * 256, \ - MAX(ECC_NIST_P384 * 384, \ - MAX(ECC_NIST_P521 * 521, MAX(ECC_SM2_P256 * 256, 0)))))))) -#define MAX_ECC_KEY_BYTES BITS_TO_BYTES(MAX_ECC_KEY_BITS) - -// Table 0:6 - Defines for PLATFORM Values -#define PLATFORM_FAMILY TPM_SPEC_FAMILY -#define PLATFORM_LEVEL TPM_SPEC_LEVEL -#define PLATFORM_VERSION TPM_SPEC_VERSION -#define PLATFORM_YEAR TPM_SPEC_YEAR -#define PLATFORM_DAY_OF_YEAR TPM_SPEC_DAY_OF_YEAR - -// Table 1:3 - Defines for RSA Asymmetric Cipher Algorithm Constants -#define RSA_KEY_SIZES_BITS \ - (1024 * RSA_1024), (2048 * RSA_2048), (3072 * RSA_3072), (4096 * RSA_4096), \ - (16384 * RSA_16384) -#if RSA_16384 -# define RSA_MAX_KEY_SIZE_BITS 16384 -#elif RSA_4096 -# define RSA_MAX_KEY_SIZE_BITS 4096 -#elif RSA_3072 -# define RSA_MAX_KEY_SIZE_BITS 3072 -#elif RSA_2048 -# define RSA_MAX_KEY_SIZE_BITS 2048 -#elif RSA_1024 -# define RSA_MAX_KEY_SIZE_BITS 1024 -#else -# define RSA_MAX_KEY_SIZE_BITS 0 -#endif -#define MAX_RSA_KEY_BITS RSA_MAX_KEY_SIZE_BITS -#define MAX_RSA_KEY_BYTES ((RSA_MAX_KEY_SIZE_BITS + 7) / 8) - -// Table 1:13 - Defines for SHA1 Hash Values -#define SHA1_DIGEST_SIZE 20 -#define SHA1_BLOCK_SIZE 64 - -// Table 1:14 - Defines for SHA256 Hash Values -#define SHA256_DIGEST_SIZE 32 -#define SHA256_BLOCK_SIZE 64 - -// Table 1:15 - Defines for SHA384 Hash Values -#define SHA384_DIGEST_SIZE 48 -#define SHA384_BLOCK_SIZE 128 - -// Table 1:16 - Defines for SHA512 Hash Values -#define SHA512_DIGEST_SIZE 64 -#define SHA512_BLOCK_SIZE 128 - -// Table 1:17 - Defines for SM3_256 Hash Values -#define SM3_256_DIGEST_SIZE 32 -#define SM3_256_BLOCK_SIZE 64 - -// Table 1:18 - Defines for SHA3_256 Hash Values -#define SHA3_256_DIGEST_SIZE 32 -#define SHA3_256_BLOCK_SIZE 136 - -// Table 1:19 - Defines for SHA3_384 Hash Values -#define SHA3_384_DIGEST_SIZE 48 -#define SHA3_384_BLOCK_SIZE 104 - -// Table 1:20 - Defines for SHA3_512 Hash Values -#define SHA3_512_DIGEST_SIZE 64 -#define SHA3_512_BLOCK_SIZE 72 - -// Table 1:21 - Defines for AES Symmetric Cipher Algorithm Constants -#define AES_KEY_SIZES_BITS (128 * AES_128), (192 * AES_192), (256 * AES_256) -#if AES_256 -# define AES_MAX_KEY_SIZE_BITS 256 -#elif AES_192 -# define AES_MAX_KEY_SIZE_BITS 192 -#elif AES_128 -# define AES_MAX_KEY_SIZE_BITS 128 -#else -# define AES_MAX_KEY_SIZE_BITS 0 -#endif -#define MAX_AES_KEY_BITS AES_MAX_KEY_SIZE_BITS -#define MAX_AES_KEY_BYTES ((AES_MAX_KEY_SIZE_BITS + 7) / 8) -#define AES_128_BLOCK_SIZE_BYTES (AES_128 * 16) -#define AES_192_BLOCK_SIZE_BYTES (AES_192 * 16) -#define AES_256_BLOCK_SIZE_BYTES (AES_256 * 16) -#define AES_BLOCK_SIZES \ - AES_128_BLOCK_SIZE_BYTES, AES_192_BLOCK_SIZE_BYTES, AES_256_BLOCK_SIZE_BYTES -#if ALG_AES -# define AES_MAX_BLOCK_SIZE 16 -#else -# define AES_MAX_BLOCK_SIZE 0 -#endif -#define MAX_AES_BLOCK_SIZE_BYTES AES_MAX_BLOCK_SIZE - -// Table 1:22 - Defines for SM4 Symmetric Cipher Algorithm Constants -#define SM4_KEY_SIZES_BITS (128 * SM4_128) -#if SM4_128 -# define SM4_MAX_KEY_SIZE_BITS 128 -#else -# define SM4_MAX_KEY_SIZE_BITS 0 -#endif -#define MAX_SM4_KEY_BITS SM4_MAX_KEY_SIZE_BITS -#define MAX_SM4_KEY_BYTES ((SM4_MAX_KEY_SIZE_BITS + 7) / 8) -#define SM4_128_BLOCK_SIZE_BYTES (SM4_128 * 16) -#define SM4_BLOCK_SIZES SM4_128_BLOCK_SIZE_BYTES -#if ALG_SM4 -# define SM4_MAX_BLOCK_SIZE 16 -#else -# define SM4_MAX_BLOCK_SIZE 0 -#endif -#define MAX_SM4_BLOCK_SIZE_BYTES SM4_MAX_BLOCK_SIZE - -// Table 1:23 - Defines for CAMELLIA Symmetric Cipher Algorithm Constants -#define CAMELLIA_KEY_SIZES_BITS \ - (128 * CAMELLIA_128), (192 * CAMELLIA_192), (256 * CAMELLIA_256) -#if CAMELLIA_256 -# define CAMELLIA_MAX_KEY_SIZE_BITS 256 -#elif CAMELLIA_192 -# define CAMELLIA_MAX_KEY_SIZE_BITS 192 -#elif CAMELLIA_128 -# define CAMELLIA_MAX_KEY_SIZE_BITS 128 -#else -# define CAMELLIA_MAX_KEY_SIZE_BITS 0 -#endif -#define MAX_CAMELLIA_KEY_BITS CAMELLIA_MAX_KEY_SIZE_BITS -#define MAX_CAMELLIA_KEY_BYTES ((CAMELLIA_MAX_KEY_SIZE_BITS + 7) / 8) -#define CAMELLIA_128_BLOCK_SIZE_BYTES (CAMELLIA_128 * 16) -#define CAMELLIA_192_BLOCK_SIZE_BYTES (CAMELLIA_192 * 16) -#define CAMELLIA_256_BLOCK_SIZE_BYTES (CAMELLIA_256 * 16) -#define CAMELLIA_BLOCK_SIZES \ - CAMELLIA_128_BLOCK_SIZE_BYTES, CAMELLIA_192_BLOCK_SIZE_BYTES, \ - CAMELLIA_256_BLOCK_SIZE_BYTES -#if ALG_CAMELLIA -# define CAMELLIA_MAX_BLOCK_SIZE 16 -#else -# define CAMELLIA_MAX_BLOCK_SIZE 0 -#endif -#define MAX_CAMELLIA_BLOCK_SIZE_BYTES CAMELLIA_MAX_BLOCK_SIZE - -// Table 1:24 - Defines for TDES Symmetric Cipher Algorithm Constants -#define TDES_KEY_SIZES_BITS (128 * TDES_128), (192 * TDES_192) -#if TDES_192 -# define TDES_MAX_KEY_SIZE_BITS 192 -#elif TDES_128 -# define TDES_MAX_KEY_SIZE_BITS 128 -#else -# define TDES_MAX_KEY_SIZE_BITS 0 -#endif -#define MAX_TDES_KEY_BITS TDES_MAX_KEY_SIZE_BITS -#define MAX_TDES_KEY_BYTES ((TDES_MAX_KEY_SIZE_BITS + 7) / 8) -#define TDES_128_BLOCK_SIZE_BYTES (TDES_128 * 8) -#define TDES_192_BLOCK_SIZE_BYTES (TDES_192 * 8) -#define TDES_BLOCK_SIZES TDES_128_BLOCK_SIZE_BYTES, TDES_192_BLOCK_SIZE_BYTES -#if ALG_TDES -# define TDES_MAX_BLOCK_SIZE 8 -#else -# define TDES_MAX_BLOCK_SIZE 0 -#endif -#define MAX_TDES_BLOCK_SIZE_BYTES TDES_MAX_BLOCK_SIZE - -// Additional values for benefit of code -#define TPM_CC_FIRST 0x0000011F -#define TPM_CC_LAST 0x0000019A - -#if COMPRESSED_LISTS -# define ADD_FILL 0 -#else -# define ADD_FILL 1 -#endif - -// Size the array of library commands based on whether or not -// the array is packed (only defined commands) or dense -// (having entries for unimplemented commands) -#define LIBRARY_COMMAND_ARRAY_SIZE \ - (0 + (ADD_FILL || CC_NV_UndefineSpaceSpecial) /* 0x0000011F */ \ - + (ADD_FILL || CC_EvictControl) /* 0x00000120 */ \ - + (ADD_FILL || CC_HierarchyControl) /* 0x00000121 */ \ - + (ADD_FILL || CC_NV_UndefineSpace) /* 0x00000122 */ \ - + ADD_FILL /* 0x00000123 */ \ - + (ADD_FILL || CC_ChangeEPS) /* 0x00000124 */ \ - + (ADD_FILL || CC_ChangePPS) /* 0x00000125 */ \ - + (ADD_FILL || CC_Clear) /* 0x00000126 */ \ - + (ADD_FILL || CC_ClearControl) /* 0x00000127 */ \ - + (ADD_FILL || CC_ClockSet) /* 0x00000128 */ \ - + (ADD_FILL || CC_HierarchyChangeAuth) /* 0x00000129 */ \ - + (ADD_FILL || CC_NV_DefineSpace) /* 0x0000012A */ \ - + (ADD_FILL || CC_PCR_Allocate) /* 0x0000012B */ \ - + (ADD_FILL || CC_PCR_SetAuthPolicy) /* 0x0000012C */ \ - + (ADD_FILL || CC_PP_Commands) /* 0x0000012D */ \ - + (ADD_FILL || CC_SetPrimaryPolicy) /* 0x0000012E */ \ - + (ADD_FILL || CC_FieldUpgradeStart) /* 0x0000012F */ \ - + (ADD_FILL || CC_ClockRateAdjust) /* 0x00000130 */ \ - + (ADD_FILL || CC_CreatePrimary) /* 0x00000131 */ \ - + (ADD_FILL || CC_NV_GlobalWriteLock) /* 0x00000132 */ \ - + (ADD_FILL || CC_GetCommandAuditDigest) /* 0x00000133 */ \ - + (ADD_FILL || CC_NV_Increment) /* 0x00000134 */ \ - + (ADD_FILL || CC_NV_SetBits) /* 0x00000135 */ \ - + (ADD_FILL || CC_NV_Extend) /* 0x00000136 */ \ - + (ADD_FILL || CC_NV_Write) /* 0x00000137 */ \ - + (ADD_FILL || CC_NV_WriteLock) /* 0x00000138 */ \ - + (ADD_FILL || CC_DictionaryAttackLockReset) /* 0x00000139 */ \ - + (ADD_FILL || CC_DictionaryAttackParameters) /* 0x0000013A */ \ - + (ADD_FILL || CC_NV_ChangeAuth) /* 0x0000013B */ \ - + (ADD_FILL || CC_PCR_Event) /* 0x0000013C */ \ - + (ADD_FILL || CC_PCR_Reset) /* 0x0000013D */ \ - + (ADD_FILL || CC_SequenceComplete) /* 0x0000013E */ \ - + (ADD_FILL || CC_SetAlgorithmSet) /* 0x0000013F */ \ - + (ADD_FILL || CC_SetCommandCodeAuditStatus) /* 0x00000140 */ \ - + (ADD_FILL || CC_FieldUpgradeData) /* 0x00000141 */ \ - + (ADD_FILL || CC_IncrementalSelfTest) /* 0x00000142 */ \ - + (ADD_FILL || CC_SelfTest) /* 0x00000143 */ \ - + (ADD_FILL || CC_Startup) /* 0x00000144 */ \ - + (ADD_FILL || CC_Shutdown) /* 0x00000145 */ \ - + (ADD_FILL || CC_StirRandom) /* 0x00000146 */ \ - + (ADD_FILL || CC_ActivateCredential) /* 0x00000147 */ \ - + (ADD_FILL || CC_Certify) /* 0x00000148 */ \ - + (ADD_FILL || CC_PolicyNV) /* 0x00000149 */ \ - + (ADD_FILL || CC_CertifyCreation) /* 0x0000014A */ \ - + (ADD_FILL || CC_Duplicate) /* 0x0000014B */ \ - + (ADD_FILL || CC_GetTime) /* 0x0000014C */ \ - + (ADD_FILL || CC_GetSessionAuditDigest) /* 0x0000014D */ \ - + (ADD_FILL || CC_NV_Read) /* 0x0000014E */ \ - + (ADD_FILL || CC_NV_ReadLock) /* 0x0000014F */ \ - + (ADD_FILL || CC_ObjectChangeAuth) /* 0x00000150 */ \ - + (ADD_FILL || CC_PolicySecret) /* 0x00000151 */ \ - + (ADD_FILL || CC_Rewrap) /* 0x00000152 */ \ - + (ADD_FILL || CC_Create) /* 0x00000153 */ \ - + (ADD_FILL || CC_ECDH_ZGen) /* 0x00000154 */ \ - + (ADD_FILL || CC_HMAC || CC_MAC) /* 0x00000155 */ \ - + (ADD_FILL || CC_Import) /* 0x00000156 */ \ - + (ADD_FILL || CC_Load) /* 0x00000157 */ \ - + (ADD_FILL || CC_Quote) /* 0x00000158 */ \ - + (ADD_FILL || CC_RSA_Decrypt) /* 0x00000159 */ \ - + ADD_FILL /* 0x0000015A */ \ - + (ADD_FILL || CC_HMAC_Start || CC_MAC_Start) /* 0x0000015B */ \ - + (ADD_FILL || CC_SequenceUpdate) /* 0x0000015C */ \ - + (ADD_FILL || CC_Sign) /* 0x0000015D */ \ - + (ADD_FILL || CC_Unseal) /* 0x0000015E */ \ - + ADD_FILL /* 0x0000015F */ \ - + (ADD_FILL || CC_PolicySigned) /* 0x00000160 */ \ - + (ADD_FILL || CC_ContextLoad) /* 0x00000161 */ \ - + (ADD_FILL || CC_ContextSave) /* 0x00000162 */ \ - + (ADD_FILL || CC_ECDH_KeyGen) /* 0x00000163 */ \ - + (ADD_FILL || CC_EncryptDecrypt) /* 0x00000164 */ \ - + (ADD_FILL || CC_FlushContext) /* 0x00000165 */ \ - + ADD_FILL /* 0x00000166 */ \ - + (ADD_FILL || CC_LoadExternal) /* 0x00000167 */ \ - + (ADD_FILL || CC_MakeCredential) /* 0x00000168 */ \ - + (ADD_FILL || CC_NV_ReadPublic) /* 0x00000169 */ \ - + (ADD_FILL || CC_PolicyAuthorize) /* 0x0000016A */ \ - + (ADD_FILL || CC_PolicyAuthValue) /* 0x0000016B */ \ - + (ADD_FILL || CC_PolicyCommandCode) /* 0x0000016C */ \ - + (ADD_FILL || CC_PolicyCounterTimer) /* 0x0000016D */ \ - + (ADD_FILL || CC_PolicyCpHash) /* 0x0000016E */ \ - + (ADD_FILL || CC_PolicyLocality) /* 0x0000016F */ \ - + (ADD_FILL || CC_PolicyNameHash) /* 0x00000170 */ \ - + (ADD_FILL || CC_PolicyOR) /* 0x00000171 */ \ - + (ADD_FILL || CC_PolicyTicket) /* 0x00000172 */ \ - + (ADD_FILL || CC_ReadPublic) /* 0x00000173 */ \ - + (ADD_FILL || CC_RSA_Encrypt) /* 0x00000174 */ \ - + ADD_FILL /* 0x00000175 */ \ - + (ADD_FILL || CC_StartAuthSession) /* 0x00000176 */ \ - + (ADD_FILL || CC_VerifySignature) /* 0x00000177 */ \ - + (ADD_FILL || CC_ECC_Parameters) /* 0x00000178 */ \ - + (ADD_FILL || CC_FirmwareRead) /* 0x00000179 */ \ - + (ADD_FILL || CC_GetCapability) /* 0x0000017A */ \ - + (ADD_FILL || CC_GetRandom) /* 0x0000017B */ \ - + (ADD_FILL || CC_GetTestResult) /* 0x0000017C */ \ - + (ADD_FILL || CC_Hash) /* 0x0000017D */ \ - + (ADD_FILL || CC_PCR_Read) /* 0x0000017E */ \ - + (ADD_FILL || CC_PolicyPCR) /* 0x0000017F */ \ - + (ADD_FILL || CC_PolicyRestart) /* 0x00000180 */ \ - + (ADD_FILL || CC_ReadClock) /* 0x00000181 */ \ - + (ADD_FILL || CC_PCR_Extend) /* 0x00000182 */ \ - + (ADD_FILL || CC_PCR_SetAuthValue) /* 0x00000183 */ \ - + (ADD_FILL || CC_NV_Certify) /* 0x00000184 */ \ - + (ADD_FILL || CC_EventSequenceComplete) /* 0x00000185 */ \ - + (ADD_FILL || CC_HashSequenceStart) /* 0x00000186 */ \ - + (ADD_FILL || CC_PolicyPhysicalPresence) /* 0x00000187 */ \ - + (ADD_FILL || CC_PolicyDuplicationSelect) /* 0x00000188 */ \ - + (ADD_FILL || CC_PolicyGetDigest) /* 0x00000189 */ \ - + (ADD_FILL || CC_TestParms) /* 0x0000018A */ \ - + (ADD_FILL || CC_Commit) /* 0x0000018B */ \ - + (ADD_FILL || CC_PolicyPassword) /* 0x0000018C */ \ - + (ADD_FILL || CC_ZGen_2Phase) /* 0x0000018D */ \ - + (ADD_FILL || CC_EC_Ephemeral) /* 0x0000018E */ \ - + (ADD_FILL || CC_PolicyNvWritten) /* 0x0000018F */ \ - + (ADD_FILL || CC_PolicyTemplate) /* 0x00000190 */ \ - + (ADD_FILL || CC_CreateLoaded) /* 0x00000191 */ \ - + (ADD_FILL || CC_PolicyAuthorizeNV) /* 0x00000192 */ \ - + (ADD_FILL || CC_EncryptDecrypt2) /* 0x00000193 */ \ - + (ADD_FILL || CC_AC_GetCapability) /* 0x00000194 */ \ - + (ADD_FILL || CC_AC_Send) /* 0x00000195 */ \ - + (ADD_FILL || CC_Policy_AC_SendSelect) /* 0x00000196 */ \ - + (ADD_FILL || CC_CertifyX509) /* 0x00000197 */ \ - + (ADD_FILL || CC_ACT_SetTimeout) /* 0x00000198 */ \ - + (ADD_FILL || CC_ECC_Encrypt) /* 0x00000199 */ \ - + (ADD_FILL || CC_ECC_Decrypt) /* 0x0000019A */ \ - ) - -#define VENDOR_COMMAND_ARRAY_SIZE (0 + CC_Vendor_TCG_Test) - -#define COMMAND_COUNT (LIBRARY_COMMAND_ARRAY_SIZE + VENDOR_COMMAND_ARRAY_SIZE) - -#define HASH_COUNT \ - (ALG_SHA1 + ALG_SHA256 + ALG_SHA384 + ALG_SHA3_256 + ALG_SHA3_384 + ALG_SHA3_512 \ - + ALG_SHA512 + ALG_SM3_256) - -#define MAX_HASH_BLOCK_SIZE \ - (MAX(ALG_SHA1 * SHA1_BLOCK_SIZE, \ - MAX(ALG_SHA256 * SHA256_BLOCK_SIZE, \ - MAX(ALG_SHA384 * SHA384_BLOCK_SIZE, \ - MAX(ALG_SHA3_256 * SHA3_256_BLOCK_SIZE, \ - MAX(ALG_SHA3_384 * SHA3_384_BLOCK_SIZE, \ - MAX(ALG_SHA3_512 * SHA3_512_BLOCK_SIZE, \ - MAX(ALG_SHA512 * SHA512_BLOCK_SIZE, \ - MAX(ALG_SM3_256 * SM3_256_BLOCK_SIZE, 0))))))))) - -#define MAX_DIGEST_SIZE \ - (MAX(ALG_SHA1 * SHA1_DIGEST_SIZE, \ - MAX(ALG_SHA256 * SHA256_DIGEST_SIZE, \ - MAX(ALG_SHA384 * SHA384_DIGEST_SIZE, \ - MAX(ALG_SHA3_256 * SHA3_256_DIGEST_SIZE, \ - MAX(ALG_SHA3_384 * SHA3_384_DIGEST_SIZE, \ - MAX(ALG_SHA3_512 * SHA3_512_DIGEST_SIZE, \ - MAX(ALG_SHA512 * SHA512_DIGEST_SIZE, \ - MAX(ALG_SM3_256 * SM3_256_DIGEST_SIZE, 0))))))))) - -#if MAX_DIGEST_SIZE == 0 || MAX_HASH_BLOCK_SIZE == 0 -# error "Hash data not valid" -#endif - -// Define the 2B structure that would hold any hash block -TPM2B_TYPE(MAX_HASH_BLOCK, MAX_HASH_BLOCK_SIZE); - -// Following typedef is for some old code -typedef TPM2B_MAX_HASH_BLOCK TPM2B_HASH_BLOCK; - -/* Additional symmetric constants */ -#define MAX_SYM_KEY_BITS \ - (MAX(AES_MAX_KEY_SIZE_BITS, \ - MAX(CAMELLIA_MAX_KEY_SIZE_BITS, \ - MAX(SM4_MAX_KEY_SIZE_BITS, MAX(TDES_MAX_KEY_SIZE_BITS, 0))))) - -#define MAX_SYM_KEY_BYTES ((MAX_SYM_KEY_BITS + 7) / 8) - -#define MAX_SYM_BLOCK_SIZE \ - (MAX(AES_MAX_BLOCK_SIZE, \ - MAX(CAMELLIA_MAX_BLOCK_SIZE, \ - MAX(SM4_MAX_BLOCK_SIZE, MAX(TDES_MAX_BLOCK_SIZE, 0))))) - -#if MAX_SYM_KEY_BITS == 0 || MAX_SYM_BLOCK_SIZE == 0 -# error Bad size for MAX_SYM_KEY_BITS or MAX_SYM_BLOCK -#endif - -#endif // _TPM_ALGORITHM_DEFINES_H_ diff --git a/TPMCmd/tpm/include/TpmBuildSwitches.h b/TPMCmd/tpm/include/TpmBuildSwitches.h deleted file mode 100644 index 32d77f6e..00000000 --- a/TPMCmd/tpm/include/TpmBuildSwitches.h +++ /dev/null @@ -1,343 +0,0 @@ - -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -// This file contains the build switches. This contains switches for multiple -// versions of the crypto-library so some may not apply to your environment. -// -// The switches are guarded so that they can either be set on the command line or -// set here. If the switch is listed on the command line (-DSOME_SWITCH) with NO -// setting, then the switch will be set to YES. If the switch setting is not on the -// command line or if the setting is other than YES or NO, then the switch will be set -// to the default value. The default can either be YES or NO as indicated on each line -// where the default is selected. -// -// A caution: do not try to test these macros by inserting #defines in this file. For -// some curious reason, a variable set on the command line with no setting will have a -// value of 1. An "#if SOME_VARIABLE" will work if the variable is not defined or is -// defined on the command line with no initial setting. However, a -// "#define SOME_VARIABLE" is a null string and when used in "#if SOME_VARIABLE" will -// not be a proper expression If you want to test various switches, either use the -// command line or change the default. -// -#ifndef _TPM_BUILD_SWITCHES_H_ -#define _TPM_BUILD_SWITCHES_H_ - -#undef YES -#define YES 1 -#undef NO -#define NO 0 - -// Allow the command line to specify a "profile" file -#ifdef PROFILE -# define PROFILE_QUOTE(a) #a -# define PROFILE_INCLUDE(a) PROFILE_QUOTE(a) -# include PROFILE_INCLUDE(PROFILE) -#endif - -// Need an unambiguous definition for DEBUG. Do not change this -#ifndef DEBUG -# ifdef NDEBUG -# define DEBUG NO -# else -# define DEBUG YES -# endif -#elif(DEBUG != NO) && (DEBUG != YES) -# undef DEBUG -# define DEBUG YES // Default: Either YES or NO -#endif - -#include "CompilerDependencies.h" - -// This definition is required for the re-factored code -#if(!defined USE_BN_ECC_DATA) || ((USE_BN_ECC_DATA != NO) && (USE_BN_ECC_DATA != YES)) -# undef USE_BN_ECC_DATA -# define USE_BN_ECC_DATA YES // Default: Either YES or NO -#endif - -// The SIMULATION switch allows certain other macros to be enabled. The things that -// can be enabled in a simulation include key caching, reproducible "random" -// sequences, instrumentation of the RSA key generation process, and certain other -// debug code. SIMULATION Needs to be defined as either YES or NO. This grouping of -// macros will make sure that it is set correctly. A simulated TPM would include a -// Virtual TPM. The interfaces for a Virtual TPM should be modified from the standard -// ones in the Simulator project. -// -// If SIMULATION is in the compile parameters without modifiers, -// make SIMULATION == YES -#if !(defined SIMULATION) || ((SIMULATION != NO) && (SIMULATION != YES)) -# undef SIMULATION -# define SIMULATION YES // Default: Either YES or NO -#endif - -// Define this to run the function that checks the compatibility between the -// chosen big number math library and the TPM code. Not all ports use this. -#if !(defined LIBRARY_COMPATIBILITY_CHECK) \ - || ((LIBRARY_COMPATIBILITY_CHECK != NO) && (LIBRARY_COMPATIBILITY_CHECK != YES)) -# undef LIBRARY_COMPATIBILITY_CHECK -# define LIBRARY_COMPATIBILITY_CHECK YES // Default: Either YES or NO -#endif - -#if !(defined FIPS_COMPLIANT) || ((FIPS_COMPLIANT != NO) && (FIPS_COMPLIANT != YES)) -# undef FIPS_COMPLIANT -# define FIPS_COMPLIANT YES // Default: Either YES or NO -#endif - -// Definition to allow alternate behavior for non-orderly startup. If there is a -// chance that the TPM could not update 'failedTries' -#if !(defined USE_DA_USED) || ((USE_DA_USED != NO) && (USE_DA_USED != YES)) -# undef USE_DA_USED -# define USE_DA_USED YES // Default: Either YES or NO -#endif - -// Define TABLE_DRIVEN_DISPATCH to use tables rather than case statements -// for command dispatch and handle unmarshaling -#if !(defined TABLE_DRIVEN_DISPATCH) \ - || ((TABLE_DRIVEN_DISPATCH != NO) && (TABLE_DRIVEN_DISPATCH != YES)) -# undef TABLE_DRIVEN_DISPATCH -# define TABLE_DRIVEN_DISPATCH YES // Default: Either YES or NO -#endif - -// This switch is used to enable the self-test capability in AlgorithmTests.c -#if !(defined SELF_TEST) || ((SELF_TEST != NO) && (SELF_TEST != YES)) -# undef SELF_TEST -# define SELF_TEST YES // Default: Either YES or NO -#endif - -// Enable the generation of RSA primes using a sieve. -#if !(defined RSA_KEY_SIEVE) || ((RSA_KEY_SIEVE != NO) && (RSA_KEY_SIEVE != YES)) -# undef RSA_KEY_SIEVE -# define RSA_KEY_SIEVE YES // Default: Either YES or NO -#endif - -// Enable the instrumentation of the sieve process. This is used to tune the sieve -// variables. -#if RSA_KEY_SIEVE && SIMULATION -# if !(defined RSA_INSTRUMENT) || ((RSA_INSTRUMENT != NO) && (RSA_INSTRUMENT != YES)) -# undef RSA_INSTRUMENT -# define RSA_INSTRUMENT NO // Default: Either YES or NO -# endif -#endif - -// This switch enables the RNG state save and restore -#if !(defined _DRBG_STATE_SAVE) \ - || ((_DRBG_STATE_SAVE != NO) && (_DRBG_STATE_SAVE != YES)) -# undef _DRBG_STATE_SAVE -# define _DRBG_STATE_SAVE YES // Default: Either YES or NO -#endif - -// Switch added to support packed lists that leave out space associated with -// unimplemented commands. Comment this out to use linear lists. -// Note: if vendor specific commands are present, the associated list is always -// in compressed form. -#if !(defined COMPRESSED_LISTS) \ - || ((COMPRESSED_LISTS != NO) && (COMPRESSED_LISTS != YES)) -# undef COMPRESSED_LISTS -# define COMPRESSED_LISTS YES // Default: Either YES or NO -#endif - -// This switch indicates where clock epoch value should be stored. If this value -// defined, then it is assumed that the timer will change at any time so the -// nonce should be a random number kept in RAM. When it is not defined, then the -// timer only stops during power outages. -#if !(defined CLOCK_STOPS) || ((CLOCK_STOPS != NO) && (CLOCK_STOPS != YES)) -# undef CLOCK_STOPS -# define CLOCK_STOPS NO // Default: Either YES or NO -#endif - -// This switch allows use of #defines in place of pass-through marshaling or -// unmarshaling code. A pass-through function just calls another function to do -// the required function and does no parameter checking of its own. The -// table-driven dispatcher calls directly to the lowest level -// marshaling/unmarshaling code and by-passes any pass-through functions. -#if(defined USE_MARSHALING_DEFINES) && (USE_MARSHALING_DEFINES != NO) -# undef USE_MARSHALING_DEFINES -# define USE_MARSHALING_DEFINES YES -#else -# define USE_MARSHALING_DEFINES YES // Default: Either YES or NO -#endif - -//********************************** -// The switches in this group can only be enabled when doing debug during simulation -#if SIMULATION && DEBUG -// This forces the use of a smaller context slot size. This reduction reduces the -// range of the epoch allowing the tester to force the epoch to occur faster than -// the normal defined in TpmProfile.h -# if !(defined CONTEXT_SLOT) -# define CONTEXT_SLOT UINT8 -# endif -// Enables use of the key cache. Default is YES -# if !(defined USE_RSA_KEY_CACHE) \ - || ((USE_RSA_KEY_CACHE != NO) && (USE_RSA_KEY_CACHE != YES)) -# undef USE_RSA_KEY_CACHE -# define USE_RSA_KEY_CACHE YES // Default: Either YES or NO -# endif - -// Enables use of a file to store the key cache values so that the TPM will start -// faster during debug. Default for this is YES -# if USE_RSA_KEY_CACHE -# if !(defined USE_KEY_CACHE_FILE) \ - || ((USE_KEY_CACHE_FILE != NO) && (USE_KEY_CACHE_FILE != YES)) -# undef USE_KEY_CACHE_FILE -# define USE_KEY_CACHE_FILE YES // Default: Either YES or NO -# endif -# else -# undef USE_KEY_CACHE_FILE -# define USE_KEY_CACHE_FILE NO -# endif // USE_RSA_KEY_CACHE - -// This provides fixed seeding of the RNG when doing debug on a simulator. This -// should allow consistent results on test runs as long as the input parameters -// to the functions remains the same. There is no default value. -# if !(defined USE_DEBUG_RNG) || ((USE_DEBUG_RNG != NO) && (USE_DEBUG_RNG != YES)) -# undef USE_DEBUG_RNG -# define USE_DEBUG_RNG YES // Default: Either YES or NO -# endif - -// Do not change these. They are the settings needed when not doing a simulation and -// not doing debug. Can't use the key cache except during debug. Otherwise, all of the -// key values end up being the same -#else -# define USE_RSA_KEY_CACHE NO -# define USE_RSA_KEY_CACHE_FILE NO -# define USE_DEBUG_RNG NO -#endif // DEBUG && SIMULATION - -#if DEBUG - -// In some cases, the relationship between two values may be dependent -// on things that change based on various selections like the chosen cryptographic -// libraries. It is possible that these selections will result in incompatible -// settings. These are often detectable by the compiler but it is not always -// possible to do the check in the preprocessor code. For example, when the -// check requires use of 'sizeof'() then the preprocessor can't do the comparison. -// For these cases, we include a special macro that, depending on the compiler -// will generate a warning to indicate if the check always passes or always fails -// because it involves fixed constants. To run these checks, define COMPILER_CHECKS. -# if !(defined COMPILER_CHECKS) \ - || ((COMPILER_CHECKS != NO) && (COMPILER_CHECKS != YES)) -# undef COMPILER_CHECKS -# define COMPILER_CHECKS NO // Default: Either YES or NO -# endif - -// Some of the values (such as sizes) are the result of different options set in -// TpmProfile.h. The combination might not be consistent. A function is defined -// (TpmSizeChecks()) that is used to verify the sizes at run time. To enable the -// function, define this parameter. -# if !(defined RUNTIME_SIZE_CHECKS) \ - || ((RUNTIME_SIZE_CHECKS != NO) && (RUNTIME_SIZE_CHECKS != YES)) -# undef RUNTIME_SIZE_CHECKS -# define RUNTIME_SIZE_CHECKS YES // Default: Either YES or NO -# endif - -// If doing debug, can set the DRBG to print out the intermediate test values. -// Before enabling this, make sure that the dbgDumpMemBlock() function -// has been added someplace (preferably, somewhere in CryptRand.c) -# if !(defined DRBG_DEBUG_PRINT) \ - || ((DRBG_DEBUG_PRINT != NO) && (DRBG_DEBUG_PRINT != YES)) -# undef DRBG_DEBUG_PRINT -# define DRBG_DEBUG_PRINT NO // Default: Either YES or NO -# endif - -// If an assertion event it not going to produce any trace information (function and -// line number) then make FAIL_TRACE == NO -# if !(defined FAIL_TRACE) || ((FAIL_TRACE != NO) && (FAIL_TRACE != YES)) -# undef FAIL_TRACE -# define FAIL_TRACE YES // Default: Either YES or NO -# endif - -#endif // DEBUG - -// Indicate if the implementation is going to give lockout time credit for time up to -// the last orderly shutdown. -#if !(defined ACCUMULATE_SELF_HEAL_TIMER) \ - || ((ACCUMULATE_SELF_HEAL_TIMER != NO) && (ACCUMULATE_SELF_HEAL_TIMER != YES)) -# undef ACCUMULATE_SELF_HEAL_TIMER -# define ACCUMULATE_SELF_HEAL_TIMER YES // Default: Either YES or NO -#endif - -// Indicates if the implementation is to compute the sizes of the proof and primary -// seed size values based on the implemented algorithms. -#if !(defined USE_SPEC_COMPLIANT_PROOFS) \ - || ((USE_SPEC_COMPLIANT_PROOFS != NO) && (USE_SPEC_COMPLIANT_PROOFS != YES)) -# undef USE_SPEC_COMPLIANT_PROOFS -# define USE_SPEC_COMPLIANT_PROOFS YES // Default: Either YES or NO -#endif - -// Comment this out to allow compile to continue even though the chosen proof values -// do not match the compliant values. This is written so that someone would -// have to proactively ignore errors. -#if !(defined SKIP_PROOF_ERRORS) \ - || ((SKIP_PROOF_ERRORS != NO) && (SKIP_PROOF_ERRORS != YES)) -# undef SKIP_PROOF_ERRORS -# define SKIP_PROOF_ERRORS NO // Default: Either YES or NO -#endif - -// This define is used to eliminate the use of bit-fields. It can be enabled for big- -// or little-endian machines. For big-endian architectures that numbers bits in -// registers from left to right (MSb0) this must be enabled. Little-endian machines -// number from right to left with the least significant bit having assigned a bit -// number of 0. These are LSb0 machines (they are also little-endian so they are also -// least-significant byte 0 (LSB0) machines. Big-endian (MSB0) machines may number in -// either direction (MSb0 or LSb0). For an MSB0+MSb0 machine this value is required to -// be 'NO' -#if !(defined USE_BIT_FIELD_STRUCTURES) \ - || ((USE_BIT_FIELD_STRUCTURES != NO) && (USE_BIT_FIELD_STRUCTURES != YES)) -# undef USE_BIT_FIELD_STRUCTURES -# define USE_BIT_FIELD_STRUCTURES NO // Default: Either YES or NO -#endif - -// This define is used to control the debug for the CertifyX509 command. -#if !(defined CERTIFYX509_DEBUG) \ - || ((CERTIFYX509_DEBUG != NO) && (CERTIFYX509_DEBUG != YES)) -# undef CERTIFYX509_DEBUG -# define CERTIFYX509_DEBUG YES // Default: Either YES or NO -#endif - -// This define is used to enable the new table-driven marshaling code. -#if !(defined TABLE_DRIVEN_MARSHAL) \ - || ((TABLE_DRIVEN_MARSHAL != NO) && (TABLE_DRIVEN_MARSHAL != YES)) -# undef TABLE_DRIVEN_MARSHAL -# define TABLE_DRIVEN_MARSHAL NO // Default: Either YES or NO -#endif - -// Change these definitions to turn all algorithms or commands ON or OFF. That is, -// to turn all algorithms on, set ALG_NO to YES. This is mostly useful as a debug -// feature. -#define ALG_YES YES -#define ALG_NO NO -#define CC_YES YES -#define CC_NO NO - -#endif // _TPM_BUILD_SWITCHES_H_ diff --git a/TPMCmd/tpm/include/TpmError.h b/TPMCmd/tpm/include/TpmError.h deleted file mode 100644 index 80a057ac..00000000 --- a/TPMCmd/tpm/include/TpmError.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef _TPM_ERROR_H -#define _TPM_ERROR_H - -#define FATAL_ERROR_ALLOCATION (1) -#define FATAL_ERROR_DIVIDE_ZERO (2) -#define FATAL_ERROR_INTERNAL (3) -#define FATAL_ERROR_PARAMETER (4) -#define FATAL_ERROR_ENTROPY (5) -#define FATAL_ERROR_SELF_TEST (6) -#define FATAL_ERROR_CRYPTO (7) -#define FATAL_ERROR_NV_UNRECOVERABLE (8) -// indicates that the TPM has -// been re-manufactured after an -// unrecoverable NV error -#define FATAL_ERROR_REMANUFACTURED (9) -#define FATAL_ERROR_DRBG (10) -#define FATAL_ERROR_MOVE_SIZE (11) -#define FATAL_ERROR_COUNTER_OVERFLOW (12) -#define FATAL_ERROR_SUBTRACT (13) -#define FATAL_ERROR_MATHLIBRARY (14) -#define FATAL_ERROR_FORCED (666) - -#endif // _TPM_ERROR_H diff --git a/TPMCmd/tpm/include/TpmProfile.h b/TPMCmd/tpm/include/TpmProfile.h deleted file mode 100644 index 774e5134..00000000 --- a/TPMCmd/tpm/include/TpmProfile.h +++ /dev/null @@ -1,784 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 4, 2020 Time: 02:36:43PM - */ - -#ifndef _TPM_PROFILE_H_ -#define _TPM_PROFILE_H_ - -// Table 2:4 - Defines for Logic Values -#undef TRUE -#define TRUE 1 -#undef FALSE -#define FALSE 0 -#undef YES -#define YES 1 -#undef NO -#define NO 0 -#undef SET -#define SET 1 -#undef CLEAR -#define CLEAR 0 - -// Table 0:1 - Defines for Processor Values -#ifndef BIG_ENDIAN_TPM -# define BIG_ENDIAN_TPM NO -#endif -#ifndef LITTLE_ENDIAN_TPM -# define LITTLE_ENDIAN_TPM !BIG_ENDIAN_TPM -#endif -#ifndef MOST_SIGNIFICANT_BIT_0 -# define MOST_SIGNIFICANT_BIT_0 NO -#endif -#ifndef LEAST_SIGNIFICANT_BIT_0 -# define LEAST_SIGNIFICANT_BIT_0 !MOST_SIGNIFICANT_BIT_0 -#endif -#ifndef AUTO_ALIGN -# define AUTO_ALIGN NO -#endif - -// Table 0:4 - Defines for Implemented Curves -#ifndef ECC_NIST_P192 -# define ECC_NIST_P192 NO -#endif -#ifndef ECC_NIST_P224 -# define ECC_NIST_P224 NO -#endif -#ifndef ECC_NIST_P256 -# define ECC_NIST_P256 YES -#endif -#ifndef ECC_NIST_P384 -# define ECC_NIST_P384 YES -#endif -#ifndef ECC_NIST_P521 -# define ECC_NIST_P521 NO -#endif -#ifndef ECC_BN_P256 -# define ECC_BN_P256 YES -#endif -#ifndef ECC_BN_P638 -# define ECC_BN_P638 NO -#endif -#ifndef ECC_SM2_P256 -# define ECC_SM2_P256 YES -#endif - -// Table 0:6 - Defines for Implemented ACT -#ifndef RH_ACT_0 -# define RH_ACT_0 YES -#endif -#ifndef RH_ACT_1 -# define RH_ACT_1 NO -#endif -#ifndef RH_ACT_A -# define RH_ACT_A YES -#endif - -// Table 0:7 - Defines for Implementation Values -#ifndef FIELD_UPGRADE_IMPLEMENTED -# define FIELD_UPGRADE_IMPLEMENTED NO -#endif -#ifndef HASH_LIB -# define HASH_LIB Ossl -#endif -#ifndef SYM_LIB -# define SYM_LIB Ossl -#endif -#ifndef MATH_LIB -# define MATH_LIB Ossl -#endif -#ifndef IMPLEMENTATION_PCR -# define IMPLEMENTATION_PCR 24 -#endif -#ifndef PLATFORM_PCR -# define PLATFORM_PCR 24 -#endif -#ifndef DRTM_PCR -# define DRTM_PCR 17 -#endif -#ifndef HCRTM_PCR -# define HCRTM_PCR 0 -#endif -#ifndef NUM_LOCALITIES -# define NUM_LOCALITIES 5 -#endif -#ifndef MAX_HANDLE_NUM -# define MAX_HANDLE_NUM 3 -#endif -#ifndef MAX_ACTIVE_SESSIONS -# define MAX_ACTIVE_SESSIONS 64 -#endif -#ifndef CONTEXT_SLOT -# define CONTEXT_SLOT UINT16 -#endif -#ifndef MAX_LOADED_SESSIONS -# define MAX_LOADED_SESSIONS 3 -#endif -#ifndef MAX_SESSION_NUM -# define MAX_SESSION_NUM 3 -#endif -#ifndef MAX_LOADED_OBJECTS -# define MAX_LOADED_OBJECTS 3 -#endif -#ifndef MIN_EVICT_OBJECTS -# define MIN_EVICT_OBJECTS 2 -#endif -#ifndef NUM_POLICY_PCR_GROUP -# define NUM_POLICY_PCR_GROUP 1 -#endif -#ifndef NUM_AUTHVALUE_PCR_GROUP -# define NUM_AUTHVALUE_PCR_GROUP 1 -#endif -#ifndef MAX_CONTEXT_SIZE -# define MAX_CONTEXT_SIZE 1344 -#endif -#ifndef MAX_DIGEST_BUFFER -# define MAX_DIGEST_BUFFER 1024 -#endif -#ifndef MAX_NV_INDEX_SIZE -# define MAX_NV_INDEX_SIZE 2048 -#endif -#ifndef MAX_NV_BUFFER_SIZE -# define MAX_NV_BUFFER_SIZE 1024 -#endif -#ifndef MAX_CAP_BUFFER -# define MAX_CAP_BUFFER 1024 -#endif -#ifndef NV_MEMORY_SIZE -# define NV_MEMORY_SIZE 16384 -#endif -#ifndef MIN_COUNTER_INDICES -# define MIN_COUNTER_INDICES 8 -#endif -#ifndef NUM_STATIC_PCR -# define NUM_STATIC_PCR 16 -#endif -#ifndef MAX_ALG_LIST_SIZE -# define MAX_ALG_LIST_SIZE 64 -#endif -#ifndef PRIMARY_SEED_SIZE -# define PRIMARY_SEED_SIZE 32 -#endif -#ifndef CONTEXT_ENCRYPT_ALGORITHM -# define CONTEXT_ENCRYPT_ALGORITHM AES -#endif -#ifndef NV_CLOCK_UPDATE_INTERVAL -# define NV_CLOCK_UPDATE_INTERVAL 12 -#endif -#ifndef NUM_POLICY_PCR -# define NUM_POLICY_PCR 1 -#endif -#ifndef MAX_COMMAND_SIZE -# define MAX_COMMAND_SIZE 4096 -#endif -#ifndef MAX_RESPONSE_SIZE -# define MAX_RESPONSE_SIZE 4096 -#endif -#ifndef ORDERLY_BITS -# define ORDERLY_BITS 8 -#endif -#ifndef MAX_SYM_DATA -# define MAX_SYM_DATA 128 -#endif -#ifndef MAX_RNG_ENTROPY_SIZE -# define MAX_RNG_ENTROPY_SIZE 64 -#endif -#ifndef RAM_INDEX_SPACE -# define RAM_INDEX_SPACE 512 -#endif -#ifndef RSA_DEFAULT_PUBLIC_EXPONENT -# define RSA_DEFAULT_PUBLIC_EXPONENT 0x00010001 -#endif -#ifndef ENABLE_PCR_NO_INCREMENT -# define ENABLE_PCR_NO_INCREMENT YES -#endif -#ifndef CRT_FORMAT_RSA -# define CRT_FORMAT_RSA YES -#endif -#ifndef VENDOR_COMMAND_COUNT -# define VENDOR_COMMAND_COUNT 0 -#endif -#ifndef MAX_VENDOR_BUFFER_SIZE -# define MAX_VENDOR_BUFFER_SIZE 1024 -#endif -#ifndef SIZE_OF_X509_SERIAL_NUMBER -# define SIZE_OF_X509_SERIAL_NUMBER 20 -#endif -#ifndef PRIVATE_VENDOR_SPECIFIC_BYTES -# define PRIVATE_VENDOR_SPECIFIC_BYTES RSA_PRIVATE_SIZE -#endif - -// Table 0:2 - Defines for Implemented Algorithms -#ifndef ALG_AES -# define ALG_AES ALG_YES -#endif -#ifndef ALG_CAMELLIA -# define ALG_CAMELLIA ALG_YES -#endif -#ifndef ALG_CBC -# define ALG_CBC ALG_YES -#endif -#ifndef ALG_CFB -# define ALG_CFB ALG_YES -#endif -#ifndef ALG_CMAC -# define ALG_CMAC ALG_YES -#endif -#ifndef ALG_CTR -# define ALG_CTR ALG_YES -#endif -#ifndef ALG_ECB -# define ALG_ECB ALG_YES -#endif -#ifndef ALG_ECC -# define ALG_ECC ALG_YES -#endif -#ifndef ALG_ECDAA -# define ALG_ECDAA (ALG_YES && ALG_ECC) -#endif -#ifndef ALG_ECDH -# define ALG_ECDH (ALG_YES && ALG_ECC) -#endif -#ifndef ALG_ECDSA -# define ALG_ECDSA (ALG_YES && ALG_ECC) -#endif -#ifndef ALG_ECMQV -# define ALG_ECMQV (ALG_NO && ALG_ECC) -#endif -#ifndef ALG_ECSCHNORR -# define ALG_ECSCHNORR (ALG_YES && ALG_ECC) -#endif -#ifndef ALG_HMAC -# define ALG_HMAC ALG_YES -#endif -#ifndef ALG_KDF1_SP800_108 -# define ALG_KDF1_SP800_108 ALG_YES -#endif -#ifndef ALG_KDF1_SP800_56A -# define ALG_KDF1_SP800_56A (ALG_YES && ALG_ECC) -#endif -#ifndef ALG_KDF2 -# define ALG_KDF2 ALG_YES -#endif -#ifndef ALG_KEYEDHASH -# define ALG_KEYEDHASH ALG_YES -#endif -#ifndef ALG_MGF1 -# define ALG_MGF1 ALG_YES -#endif -#ifndef ALG_OAEP -# define ALG_OAEP (ALG_YES && ALG_RSA) -#endif -#ifndef ALG_OFB -# define ALG_OFB ALG_YES -#endif -#ifndef ALG_RSA -# define ALG_RSA ALG_YES -#endif -#ifndef ALG_RSAES -# define ALG_RSAES (ALG_YES && ALG_RSA) -#endif -#ifndef ALG_RSAPSS -# define ALG_RSAPSS (ALG_YES && ALG_RSA) -#endif -#ifndef ALG_RSASSA -# define ALG_RSASSA (ALG_YES && ALG_RSA) -#endif -#ifndef ALG_SHA -# define ALG_SHA ALG_NO /* Not specified by vendor */ -#endif -#ifndef ALG_SHA1 -# define ALG_SHA1 ALG_YES -#endif -#ifndef ALG_SHA256 -# define ALG_SHA256 ALG_YES -#endif -#ifndef ALG_SHA384 -# define ALG_SHA384 ALG_YES -#endif -#ifndef ALG_SHA3_256 -# define ALG_SHA3_256 ALG_NO /* Not specified by vendor */ -#endif -#ifndef ALG_SHA3_384 -# define ALG_SHA3_384 ALG_NO /* Not specified by vendor */ -#endif -#ifndef ALG_SHA3_512 -# define ALG_SHA3_512 ALG_NO /* Not specified by vendor */ -#endif -#ifndef ALG_SHA512 -# define ALG_SHA512 ALG_NO -#endif -#ifndef ALG_SM2 -# define ALG_SM2 (ALG_NO && ALG_ECC) -#endif -#ifndef ALG_SM3_256 -# define ALG_SM3_256 ALG_NO -#endif -#ifndef ALG_SM4 -# define ALG_SM4 ALG_NO -#endif -#ifndef ALG_SYMCIPHER -# define ALG_SYMCIPHER ALG_YES -#endif -#ifndef ALG_TDES -# define ALG_TDES ALG_NO -#endif -#ifndef ALG_XOR -# define ALG_XOR ALG_YES -#endif - -// Table 1:3 - Defines for RSA Asymmetric Cipher Algorithm Constants -#ifndef RSA_1024 -# define RSA_1024 (ALG_RSA && YES) -#endif -#ifndef RSA_2048 -# define RSA_2048 (ALG_RSA && YES) -#endif -#ifndef RSA_3072 -# define RSA_3072 (ALG_RSA && NO) -#endif -#ifndef RSA_4096 -# define RSA_4096 (ALG_RSA && NO) -#endif -#ifndef RSA_16384 -# define RSA_16384 (ALG_RSA && NO) -#endif - -// Table 1:21 - Defines for AES Symmetric Cipher Algorithm Constants -#ifndef AES_128 -# define AES_128 (ALG_AES && YES) -#endif -#ifndef AES_192 -# define AES_192 (ALG_AES && NO) -#endif -#ifndef AES_256 -# define AES_256 (ALG_AES && YES) -#endif - -// Table 1:22 - Defines for SM4 Symmetric Cipher Algorithm Constants -#ifndef SM4_128 -# define SM4_128 (ALG_SM4 && YES) -#endif - -// Table 1:23 - Defines for CAMELLIA Symmetric Cipher Algorithm Constants -#ifndef CAMELLIA_128 -# define CAMELLIA_128 (ALG_CAMELLIA && YES) -#endif -#ifndef CAMELLIA_192 -# define CAMELLIA_192 (ALG_CAMELLIA && NO) -#endif -#ifndef CAMELLIA_256 -# define CAMELLIA_256 (ALG_CAMELLIA && YES) -#endif - -// Table 1:24 - Defines for TDES Symmetric Cipher Algorithm Constants -#ifndef TDES_128 -# define TDES_128 (ALG_TDES && YES) -#endif -#ifndef TDES_192 -# define TDES_192 (ALG_TDES && YES) -#endif - -// Table 0:5 - Defines for Implemented Commands -#ifndef CC_ACT_SetTimeout -# define CC_ACT_SetTimeout CC_YES -#endif -#ifndef CC_AC_GetCapability -# define CC_AC_GetCapability CC_YES -#endif -#ifndef CC_AC_Send -# define CC_AC_Send CC_YES -#endif -#ifndef CC_ActivateCredential -# define CC_ActivateCredential CC_YES -#endif -#ifndef CC_Certify -# define CC_Certify CC_YES -#endif -#ifndef CC_CertifyCreation -# define CC_CertifyCreation CC_YES -#endif -#ifndef CC_CertifyX509 -# define CC_CertifyX509 CC_YES -#endif -#ifndef CC_ChangeEPS -# define CC_ChangeEPS CC_YES -#endif -#ifndef CC_ChangePPS -# define CC_ChangePPS CC_YES -#endif -#ifndef CC_Clear -# define CC_Clear CC_YES -#endif -#ifndef CC_ClearControl -# define CC_ClearControl CC_YES -#endif -#ifndef CC_ClockRateAdjust -# define CC_ClockRateAdjust CC_YES -#endif -#ifndef CC_ClockSet -# define CC_ClockSet CC_YES -#endif -#ifndef CC_Commit -# define CC_Commit (CC_YES && ALG_ECC) -#endif -#ifndef CC_ContextLoad -# define CC_ContextLoad CC_YES -#endif -#ifndef CC_ContextSave -# define CC_ContextSave CC_YES -#endif -#ifndef CC_Create -# define CC_Create CC_YES -#endif -#ifndef CC_CreateLoaded -# define CC_CreateLoaded CC_YES -#endif -#ifndef CC_CreatePrimary -# define CC_CreatePrimary CC_YES -#endif -#ifndef CC_DictionaryAttackLockReset -# define CC_DictionaryAttackLockReset CC_YES -#endif -#ifndef CC_DictionaryAttackParameters -# define CC_DictionaryAttackParameters CC_YES -#endif -#ifndef CC_Duplicate -# define CC_Duplicate CC_YES -#endif -#ifndef CC_ECC_Decrypt -# define CC_ECC_Decrypt (CC_YES && ALG_ECC) -#endif -#ifndef CC_ECC_Encrypt -# define CC_ECC_Encrypt (CC_YES && ALG_ECC) -#endif -#ifndef CC_ECC_Parameters -# define CC_ECC_Parameters (CC_YES && ALG_ECC) -#endif -#ifndef CC_ECDH_KeyGen -# define CC_ECDH_KeyGen (CC_YES && ALG_ECC) -#endif -#ifndef CC_ECDH_ZGen -# define CC_ECDH_ZGen (CC_YES && ALG_ECC) -#endif -#ifndef CC_EC_Ephemeral -# define CC_EC_Ephemeral (CC_YES && ALG_ECC) -#endif -#ifndef CC_EncryptDecrypt -# define CC_EncryptDecrypt CC_YES -#endif -#ifndef CC_EncryptDecrypt2 -# define CC_EncryptDecrypt2 CC_YES -#endif -#ifndef CC_EventSequenceComplete -# define CC_EventSequenceComplete CC_YES -#endif -#ifndef CC_EvictControl -# define CC_EvictControl CC_YES -#endif -#ifndef CC_FieldUpgradeData -# define CC_FieldUpgradeData CC_NO -#endif -#ifndef CC_FieldUpgradeStart -# define CC_FieldUpgradeStart CC_NO -#endif -#ifndef CC_FirmwareRead -# define CC_FirmwareRead CC_NO -#endif -#ifndef CC_FlushContext -# define CC_FlushContext CC_YES -#endif -#ifndef CC_GetCapability -# define CC_GetCapability CC_YES -#endif -#ifndef CC_GetCommandAuditDigest -# define CC_GetCommandAuditDigest CC_YES -#endif -#ifndef CC_GetRandom -# define CC_GetRandom CC_YES -#endif -#ifndef CC_GetSessionAuditDigest -# define CC_GetSessionAuditDigest CC_YES -#endif -#ifndef CC_GetTestResult -# define CC_GetTestResult CC_YES -#endif -#ifndef CC_GetTime -# define CC_GetTime CC_YES -#endif -#ifndef CC_HMAC -# define CC_HMAC (CC_YES && !ALG_CMAC) -#endif -#ifndef CC_HMAC_Start -# define CC_HMAC_Start (CC_YES && !ALG_CMAC) -#endif -#ifndef CC_Hash -# define CC_Hash CC_YES -#endif -#ifndef CC_HashSequenceStart -# define CC_HashSequenceStart CC_YES -#endif -#ifndef CC_HierarchyChangeAuth -# define CC_HierarchyChangeAuth CC_YES -#endif -#ifndef CC_HierarchyControl -# define CC_HierarchyControl CC_YES -#endif -#ifndef CC_Import -# define CC_Import CC_YES -#endif -#ifndef CC_IncrementalSelfTest -# define CC_IncrementalSelfTest CC_YES -#endif -#ifndef CC_Load -# define CC_Load CC_YES -#endif -#ifndef CC_LoadExternal -# define CC_LoadExternal CC_YES -#endif -#ifndef CC_MAC -# define CC_MAC (CC_YES && ALG_CMAC) -#endif -#ifndef CC_MAC_Start -# define CC_MAC_Start (CC_YES && ALG_CMAC) -#endif -#ifndef CC_MakeCredential -# define CC_MakeCredential CC_YES -#endif -#ifndef CC_NV_Certify -# define CC_NV_Certify CC_YES -#endif -#ifndef CC_NV_ChangeAuth -# define CC_NV_ChangeAuth CC_YES -#endif -#ifndef CC_NV_DefineSpace -# define CC_NV_DefineSpace CC_YES -#endif -#ifndef CC_NV_Extend -# define CC_NV_Extend CC_YES -#endif -#ifndef CC_NV_GlobalWriteLock -# define CC_NV_GlobalWriteLock CC_YES -#endif -#ifndef CC_NV_Increment -# define CC_NV_Increment CC_YES -#endif -#ifndef CC_NV_Read -# define CC_NV_Read CC_YES -#endif -#ifndef CC_NV_ReadLock -# define CC_NV_ReadLock CC_YES -#endif -#ifndef CC_NV_ReadPublic -# define CC_NV_ReadPublic CC_YES -#endif -#ifndef CC_NV_SetBits -# define CC_NV_SetBits CC_YES -#endif -#ifndef CC_NV_UndefineSpace -# define CC_NV_UndefineSpace CC_YES -#endif -#ifndef CC_NV_UndefineSpaceSpecial -# define CC_NV_UndefineSpaceSpecial CC_YES -#endif -#ifndef CC_NV_Write -# define CC_NV_Write CC_YES -#endif -#ifndef CC_NV_WriteLock -# define CC_NV_WriteLock CC_YES -#endif -#ifndef CC_ObjectChangeAuth -# define CC_ObjectChangeAuth CC_YES -#endif -#ifndef CC_PCR_Allocate -# define CC_PCR_Allocate CC_YES -#endif -#ifndef CC_PCR_Event -# define CC_PCR_Event CC_YES -#endif -#ifndef CC_PCR_Extend -# define CC_PCR_Extend CC_YES -#endif -#ifndef CC_PCR_Read -# define CC_PCR_Read CC_YES -#endif -#ifndef CC_PCR_Reset -# define CC_PCR_Reset CC_YES -#endif -#ifndef CC_PCR_SetAuthPolicy -# define CC_PCR_SetAuthPolicy CC_YES -#endif -#ifndef CC_PCR_SetAuthValue -# define CC_PCR_SetAuthValue CC_YES -#endif -#ifndef CC_PP_Commands -# define CC_PP_Commands CC_YES -#endif -#ifndef CC_PolicyAuthValue -# define CC_PolicyAuthValue CC_YES -#endif -#ifndef CC_PolicyAuthorize -# define CC_PolicyAuthorize CC_YES -#endif -#ifndef CC_PolicyAuthorizeNV -# define CC_PolicyAuthorizeNV CC_YES -#endif -#ifndef CC_PolicyCommandCode -# define CC_PolicyCommandCode CC_YES -#endif -#ifndef CC_PolicyCounterTimer -# define CC_PolicyCounterTimer CC_YES -#endif -#ifndef CC_PolicyCpHash -# define CC_PolicyCpHash CC_YES -#endif -#ifndef CC_PolicyDuplicationSelect -# define CC_PolicyDuplicationSelect CC_YES -#endif -#ifndef CC_PolicyGetDigest -# define CC_PolicyGetDigest CC_YES -#endif -#ifndef CC_PolicyLocality -# define CC_PolicyLocality CC_YES -#endif -#ifndef CC_PolicyNV -# define CC_PolicyNV CC_YES -#endif -#ifndef CC_PolicyNameHash -# define CC_PolicyNameHash CC_YES -#endif -#ifndef CC_PolicyNvWritten -# define CC_PolicyNvWritten CC_YES -#endif -#ifndef CC_PolicyOR -# define CC_PolicyOR CC_YES -#endif -#ifndef CC_PolicyPCR -# define CC_PolicyPCR CC_YES -#endif -#ifndef CC_PolicyPassword -# define CC_PolicyPassword CC_YES -#endif -#ifndef CC_PolicyPhysicalPresence -# define CC_PolicyPhysicalPresence CC_YES -#endif -#ifndef CC_PolicyRestart -# define CC_PolicyRestart CC_YES -#endif -#ifndef CC_PolicySecret -# define CC_PolicySecret CC_YES -#endif -#ifndef CC_PolicySigned -# define CC_PolicySigned CC_YES -#endif -#ifndef CC_PolicyTemplate -# define CC_PolicyTemplate CC_YES -#endif -#ifndef CC_PolicyTicket -# define CC_PolicyTicket CC_YES -#endif -#ifndef CC_Policy_AC_SendSelect -# define CC_Policy_AC_SendSelect CC_YES -#endif -#ifndef CC_Quote -# define CC_Quote CC_YES -#endif -#ifndef CC_RSA_Decrypt -# define CC_RSA_Decrypt (CC_YES && ALG_RSA) -#endif -#ifndef CC_RSA_Encrypt -# define CC_RSA_Encrypt (CC_YES && ALG_RSA) -#endif -#ifndef CC_ReadClock -# define CC_ReadClock CC_YES -#endif -#ifndef CC_ReadPublic -# define CC_ReadPublic CC_YES -#endif -#ifndef CC_Rewrap -# define CC_Rewrap CC_YES -#endif -#ifndef CC_SelfTest -# define CC_SelfTest CC_YES -#endif -#ifndef CC_SequenceComplete -# define CC_SequenceComplete CC_YES -#endif -#ifndef CC_SequenceUpdate -# define CC_SequenceUpdate CC_YES -#endif -#ifndef CC_SetAlgorithmSet -# define CC_SetAlgorithmSet CC_YES -#endif -#ifndef CC_SetCommandCodeAuditStatus -# define CC_SetCommandCodeAuditStatus CC_YES -#endif -#ifndef CC_SetPrimaryPolicy -# define CC_SetPrimaryPolicy CC_YES -#endif -#ifndef CC_Shutdown -# define CC_Shutdown CC_YES -#endif -#ifndef CC_Sign -# define CC_Sign CC_YES -#endif -#ifndef CC_StartAuthSession -# define CC_StartAuthSession CC_YES -#endif -#ifndef CC_Startup -# define CC_Startup CC_YES -#endif -#ifndef CC_StirRandom -# define CC_StirRandom CC_YES -#endif -#ifndef CC_TestParms -# define CC_TestParms CC_YES -#endif -#ifndef CC_Unseal -# define CC_Unseal CC_YES -#endif -#ifndef CC_Vendor_TCG_Test -# define CC_Vendor_TCG_Test CC_YES -#endif -#ifndef CC_VerifySignature -# define CC_VerifySignature CC_YES -#endif -#ifndef CC_ZGen_2Phase -# define CC_ZGen_2Phase (CC_YES && ALG_ECC) -#endif - -#endif // _TPM_PROFILE_H_ diff --git a/TPMCmd/tpm/include/TpmTypes.h b/TPMCmd/tpm/include/TpmTypes.h deleted file mode 100644 index 378e628f..00000000 --- a/TPMCmd/tpm/include/TpmTypes.h +++ /dev/null @@ -1,2724 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 6, 2020 Time: 01:50:09PM - */ - -#ifndef _TPM_TYPES_H_ -#define _TPM_TYPES_H_ - -// Table 1:2 - Definition of TPM_ALG_ID Constants -typedef UINT16 TPM_ALG_ID; -#define TYPE_OF_TPM_ALG_ID UINT16 -#define ALG_ERROR_VALUE 0x0000 -#define TPM_ALG_ERROR (TPM_ALG_ID)(ALG_ERROR_VALUE) -#define ALG_RSA_VALUE 0x0001 -#define TPM_ALG_RSA (TPM_ALG_ID)(ALG_RSA_VALUE) -#define ALG_TDES_VALUE 0x0003 -#define TPM_ALG_TDES (TPM_ALG_ID)(ALG_TDES_VALUE) -#define ALG_SHA_VALUE 0x0004 -#define TPM_ALG_SHA (TPM_ALG_ID)(ALG_SHA_VALUE) -#define ALG_SHA1_VALUE 0x0004 -#define TPM_ALG_SHA1 (TPM_ALG_ID)(ALG_SHA1_VALUE) -#define ALG_HMAC_VALUE 0x0005 -#define TPM_ALG_HMAC (TPM_ALG_ID)(ALG_HMAC_VALUE) -#define ALG_AES_VALUE 0x0006 -#define TPM_ALG_AES (TPM_ALG_ID)(ALG_AES_VALUE) -#define ALG_MGF1_VALUE 0x0007 -#define TPM_ALG_MGF1 (TPM_ALG_ID)(ALG_MGF1_VALUE) -#define ALG_KEYEDHASH_VALUE 0x0008 -#define TPM_ALG_KEYEDHASH (TPM_ALG_ID)(ALG_KEYEDHASH_VALUE) -#define ALG_XOR_VALUE 0x000A -#define TPM_ALG_XOR (TPM_ALG_ID)(ALG_XOR_VALUE) -#define ALG_SHA256_VALUE 0x000B -#define TPM_ALG_SHA256 (TPM_ALG_ID)(ALG_SHA256_VALUE) -#define ALG_SHA384_VALUE 0x000C -#define TPM_ALG_SHA384 (TPM_ALG_ID)(ALG_SHA384_VALUE) -#define ALG_SHA512_VALUE 0x000D -#define TPM_ALG_SHA512 (TPM_ALG_ID)(ALG_SHA512_VALUE) -#define ALG_NULL_VALUE 0x0010 -#define TPM_ALG_NULL (TPM_ALG_ID)(ALG_NULL_VALUE) -#define ALG_SM3_256_VALUE 0x0012 -#define TPM_ALG_SM3_256 (TPM_ALG_ID)(ALG_SM3_256_VALUE) -#define ALG_SM4_VALUE 0x0013 -#define TPM_ALG_SM4 (TPM_ALG_ID)(ALG_SM4_VALUE) -#define ALG_RSASSA_VALUE 0x0014 -#define TPM_ALG_RSASSA (TPM_ALG_ID)(ALG_RSASSA_VALUE) -#define ALG_RSAES_VALUE 0x0015 -#define TPM_ALG_RSAES (TPM_ALG_ID)(ALG_RSAES_VALUE) -#define ALG_RSAPSS_VALUE 0x0016 -#define TPM_ALG_RSAPSS (TPM_ALG_ID)(ALG_RSAPSS_VALUE) -#define ALG_OAEP_VALUE 0x0017 -#define TPM_ALG_OAEP (TPM_ALG_ID)(ALG_OAEP_VALUE) -#define ALG_ECDSA_VALUE 0x0018 -#define TPM_ALG_ECDSA (TPM_ALG_ID)(ALG_ECDSA_VALUE) -#define ALG_ECDH_VALUE 0x0019 -#define TPM_ALG_ECDH (TPM_ALG_ID)(ALG_ECDH_VALUE) -#define ALG_ECDAA_VALUE 0x001A -#define TPM_ALG_ECDAA (TPM_ALG_ID)(ALG_ECDAA_VALUE) -#define ALG_SM2_VALUE 0x001B -#define TPM_ALG_SM2 (TPM_ALG_ID)(ALG_SM2_VALUE) -#define ALG_ECSCHNORR_VALUE 0x001C -#define TPM_ALG_ECSCHNORR (TPM_ALG_ID)(ALG_ECSCHNORR_VALUE) -#define ALG_ECMQV_VALUE 0x001D -#define TPM_ALG_ECMQV (TPM_ALG_ID)(ALG_ECMQV_VALUE) -#define ALG_KDF1_SP800_56A_VALUE 0x0020 -#define TPM_ALG_KDF1_SP800_56A (TPM_ALG_ID)(ALG_KDF1_SP800_56A_VALUE) -#define ALG_KDF2_VALUE 0x0021 -#define TPM_ALG_KDF2 (TPM_ALG_ID)(ALG_KDF2_VALUE) -#define ALG_KDF1_SP800_108_VALUE 0x0022 -#define TPM_ALG_KDF1_SP800_108 (TPM_ALG_ID)(ALG_KDF1_SP800_108_VALUE) -#define ALG_ECC_VALUE 0x0023 -#define TPM_ALG_ECC (TPM_ALG_ID)(ALG_ECC_VALUE) -#define ALG_SYMCIPHER_VALUE 0x0025 -#define TPM_ALG_SYMCIPHER (TPM_ALG_ID)(ALG_SYMCIPHER_VALUE) -#define ALG_CAMELLIA_VALUE 0x0026 -#define TPM_ALG_CAMELLIA (TPM_ALG_ID)(ALG_CAMELLIA_VALUE) -#define ALG_SHA3_256_VALUE 0x0027 -#define TPM_ALG_SHA3_256 (TPM_ALG_ID)(ALG_SHA3_256_VALUE) -#define ALG_SHA3_384_VALUE 0x0028 -#define TPM_ALG_SHA3_384 (TPM_ALG_ID)(ALG_SHA3_384_VALUE) -#define ALG_SHA3_512_VALUE 0x0029 -#define TPM_ALG_SHA3_512 (TPM_ALG_ID)(ALG_SHA3_512_VALUE) -#define ALG_CMAC_VALUE 0x003F -#define TPM_ALG_CMAC (TPM_ALG_ID)(ALG_CMAC_VALUE) -#define ALG_CTR_VALUE 0x0040 -#define TPM_ALG_CTR (TPM_ALG_ID)(ALG_CTR_VALUE) -#define ALG_OFB_VALUE 0x0041 -#define TPM_ALG_OFB (TPM_ALG_ID)(ALG_OFB_VALUE) -#define ALG_CBC_VALUE 0x0042 -#define TPM_ALG_CBC (TPM_ALG_ID)(ALG_CBC_VALUE) -#define ALG_CFB_VALUE 0x0043 -#define TPM_ALG_CFB (TPM_ALG_ID)(ALG_CFB_VALUE) -#define ALG_ECB_VALUE 0x0044 -#define TPM_ALG_ECB (TPM_ALG_ID)(ALG_ECB_VALUE) -// Values derived from Table 1:2 -#define ALG_FIRST_VALUE 0x0001 -#define TPM_ALG_FIRST (TPM_ALG_ID)(ALG_FIRST_VALUE) -#define ALG_LAST_VALUE 0x0044 -#define TPM_ALG_LAST (TPM_ALG_ID)(ALG_LAST_VALUE) - -// Table 1:4 - Definition of TPM_ECC_CURVE Constants -typedef UINT16 TPM_ECC_CURVE; -#define TYPE_OF_TPM_ECC_CURVE UINT16 -#define TPM_ECC_NONE (TPM_ECC_CURVE)(0x0000) -#define TPM_ECC_NIST_P192 (TPM_ECC_CURVE)(0x0001) -#define TPM_ECC_NIST_P224 (TPM_ECC_CURVE)(0x0002) -#define TPM_ECC_NIST_P256 (TPM_ECC_CURVE)(0x0003) -#define TPM_ECC_NIST_P384 (TPM_ECC_CURVE)(0x0004) -#define TPM_ECC_NIST_P521 (TPM_ECC_CURVE)(0x0005) -#define TPM_ECC_BN_P256 (TPM_ECC_CURVE)(0x0010) -#define TPM_ECC_BN_P638 (TPM_ECC_CURVE)(0x0011) -#define TPM_ECC_SM2_P256 (TPM_ECC_CURVE)(0x0020) - -// Table 2:12 - Definition of TPM_CC Constants -typedef UINT32 TPM_CC; -#define TYPE_OF_TPM_CC UINT32 -#define TPM_CC_NV_UndefineSpaceSpecial (TPM_CC)(0x0000011F) -#define TPM_CC_EvictControl (TPM_CC)(0x00000120) -#define TPM_CC_HierarchyControl (TPM_CC)(0x00000121) -#define TPM_CC_NV_UndefineSpace (TPM_CC)(0x00000122) -#define TPM_CC_ChangeEPS (TPM_CC)(0x00000124) -#define TPM_CC_ChangePPS (TPM_CC)(0x00000125) -#define TPM_CC_Clear (TPM_CC)(0x00000126) -#define TPM_CC_ClearControl (TPM_CC)(0x00000127) -#define TPM_CC_ClockSet (TPM_CC)(0x00000128) -#define TPM_CC_HierarchyChangeAuth (TPM_CC)(0x00000129) -#define TPM_CC_NV_DefineSpace (TPM_CC)(0x0000012A) -#define TPM_CC_PCR_Allocate (TPM_CC)(0x0000012B) -#define TPM_CC_PCR_SetAuthPolicy (TPM_CC)(0x0000012C) -#define TPM_CC_PP_Commands (TPM_CC)(0x0000012D) -#define TPM_CC_SetPrimaryPolicy (TPM_CC)(0x0000012E) -#define TPM_CC_FieldUpgradeStart (TPM_CC)(0x0000012F) -#define TPM_CC_ClockRateAdjust (TPM_CC)(0x00000130) -#define TPM_CC_CreatePrimary (TPM_CC)(0x00000131) -#define TPM_CC_NV_GlobalWriteLock (TPM_CC)(0x00000132) -#define TPM_CC_GetCommandAuditDigest (TPM_CC)(0x00000133) -#define TPM_CC_NV_Increment (TPM_CC)(0x00000134) -#define TPM_CC_NV_SetBits (TPM_CC)(0x00000135) -#define TPM_CC_NV_Extend (TPM_CC)(0x00000136) -#define TPM_CC_NV_Write (TPM_CC)(0x00000137) -#define TPM_CC_NV_WriteLock (TPM_CC)(0x00000138) -#define TPM_CC_DictionaryAttackLockReset (TPM_CC)(0x00000139) -#define TPM_CC_DictionaryAttackParameters (TPM_CC)(0x0000013A) -#define TPM_CC_NV_ChangeAuth (TPM_CC)(0x0000013B) -#define TPM_CC_PCR_Event (TPM_CC)(0x0000013C) -#define TPM_CC_PCR_Reset (TPM_CC)(0x0000013D) -#define TPM_CC_SequenceComplete (TPM_CC)(0x0000013E) -#define TPM_CC_SetAlgorithmSet (TPM_CC)(0x0000013F) -#define TPM_CC_SetCommandCodeAuditStatus (TPM_CC)(0x00000140) -#define TPM_CC_FieldUpgradeData (TPM_CC)(0x00000141) -#define TPM_CC_IncrementalSelfTest (TPM_CC)(0x00000142) -#define TPM_CC_SelfTest (TPM_CC)(0x00000143) -#define TPM_CC_Startup (TPM_CC)(0x00000144) -#define TPM_CC_Shutdown (TPM_CC)(0x00000145) -#define TPM_CC_StirRandom (TPM_CC)(0x00000146) -#define TPM_CC_ActivateCredential (TPM_CC)(0x00000147) -#define TPM_CC_Certify (TPM_CC)(0x00000148) -#define TPM_CC_PolicyNV (TPM_CC)(0x00000149) -#define TPM_CC_CertifyCreation (TPM_CC)(0x0000014A) -#define TPM_CC_Duplicate (TPM_CC)(0x0000014B) -#define TPM_CC_GetTime (TPM_CC)(0x0000014C) -#define TPM_CC_GetSessionAuditDigest (TPM_CC)(0x0000014D) -#define TPM_CC_NV_Read (TPM_CC)(0x0000014E) -#define TPM_CC_NV_ReadLock (TPM_CC)(0x0000014F) -#define TPM_CC_ObjectChangeAuth (TPM_CC)(0x00000150) -#define TPM_CC_PolicySecret (TPM_CC)(0x00000151) -#define TPM_CC_Rewrap (TPM_CC)(0x00000152) -#define TPM_CC_Create (TPM_CC)(0x00000153) -#define TPM_CC_ECDH_ZGen (TPM_CC)(0x00000154) -#define TPM_CC_HMAC (TPM_CC)(0x00000155) -#define TPM_CC_MAC (TPM_CC)(0x00000155) -#define TPM_CC_Import (TPM_CC)(0x00000156) -#define TPM_CC_Load (TPM_CC)(0x00000157) -#define TPM_CC_Quote (TPM_CC)(0x00000158) -#define TPM_CC_RSA_Decrypt (TPM_CC)(0x00000159) -#define TPM_CC_HMAC_Start (TPM_CC)(0x0000015B) -#define TPM_CC_MAC_Start (TPM_CC)(0x0000015B) -#define TPM_CC_SequenceUpdate (TPM_CC)(0x0000015C) -#define TPM_CC_Sign (TPM_CC)(0x0000015D) -#define TPM_CC_Unseal (TPM_CC)(0x0000015E) -#define TPM_CC_PolicySigned (TPM_CC)(0x00000160) -#define TPM_CC_ContextLoad (TPM_CC)(0x00000161) -#define TPM_CC_ContextSave (TPM_CC)(0x00000162) -#define TPM_CC_ECDH_KeyGen (TPM_CC)(0x00000163) -#define TPM_CC_EncryptDecrypt (TPM_CC)(0x00000164) -#define TPM_CC_FlushContext (TPM_CC)(0x00000165) -#define TPM_CC_LoadExternal (TPM_CC)(0x00000167) -#define TPM_CC_MakeCredential (TPM_CC)(0x00000168) -#define TPM_CC_NV_ReadPublic (TPM_CC)(0x00000169) -#define TPM_CC_PolicyAuthorize (TPM_CC)(0x0000016A) -#define TPM_CC_PolicyAuthValue (TPM_CC)(0x0000016B) -#define TPM_CC_PolicyCommandCode (TPM_CC)(0x0000016C) -#define TPM_CC_PolicyCounterTimer (TPM_CC)(0x0000016D) -#define TPM_CC_PolicyCpHash (TPM_CC)(0x0000016E) -#define TPM_CC_PolicyLocality (TPM_CC)(0x0000016F) -#define TPM_CC_PolicyNameHash (TPM_CC)(0x00000170) -#define TPM_CC_PolicyOR (TPM_CC)(0x00000171) -#define TPM_CC_PolicyTicket (TPM_CC)(0x00000172) -#define TPM_CC_ReadPublic (TPM_CC)(0x00000173) -#define TPM_CC_RSA_Encrypt (TPM_CC)(0x00000174) -#define TPM_CC_StartAuthSession (TPM_CC)(0x00000176) -#define TPM_CC_VerifySignature (TPM_CC)(0x00000177) -#define TPM_CC_ECC_Parameters (TPM_CC)(0x00000178) -#define TPM_CC_FirmwareRead (TPM_CC)(0x00000179) -#define TPM_CC_GetCapability (TPM_CC)(0x0000017A) -#define TPM_CC_GetRandom (TPM_CC)(0x0000017B) -#define TPM_CC_GetTestResult (TPM_CC)(0x0000017C) -#define TPM_CC_Hash (TPM_CC)(0x0000017D) -#define TPM_CC_PCR_Read (TPM_CC)(0x0000017E) -#define TPM_CC_PolicyPCR (TPM_CC)(0x0000017F) -#define TPM_CC_PolicyRestart (TPM_CC)(0x00000180) -#define TPM_CC_ReadClock (TPM_CC)(0x00000181) -#define TPM_CC_PCR_Extend (TPM_CC)(0x00000182) -#define TPM_CC_PCR_SetAuthValue (TPM_CC)(0x00000183) -#define TPM_CC_NV_Certify (TPM_CC)(0x00000184) -#define TPM_CC_EventSequenceComplete (TPM_CC)(0x00000185) -#define TPM_CC_HashSequenceStart (TPM_CC)(0x00000186) -#define TPM_CC_PolicyPhysicalPresence (TPM_CC)(0x00000187) -#define TPM_CC_PolicyDuplicationSelect (TPM_CC)(0x00000188) -#define TPM_CC_PolicyGetDigest (TPM_CC)(0x00000189) -#define TPM_CC_TestParms (TPM_CC)(0x0000018A) -#define TPM_CC_Commit (TPM_CC)(0x0000018B) -#define TPM_CC_PolicyPassword (TPM_CC)(0x0000018C) -#define TPM_CC_ZGen_2Phase (TPM_CC)(0x0000018D) -#define TPM_CC_EC_Ephemeral (TPM_CC)(0x0000018E) -#define TPM_CC_PolicyNvWritten (TPM_CC)(0x0000018F) -#define TPM_CC_PolicyTemplate (TPM_CC)(0x00000190) -#define TPM_CC_CreateLoaded (TPM_CC)(0x00000191) -#define TPM_CC_PolicyAuthorizeNV (TPM_CC)(0x00000192) -#define TPM_CC_EncryptDecrypt2 (TPM_CC)(0x00000193) -#define TPM_CC_AC_GetCapability (TPM_CC)(0x00000194) -#define TPM_CC_AC_Send (TPM_CC)(0x00000195) -#define TPM_CC_Policy_AC_SendSelect (TPM_CC)(0x00000196) -#define TPM_CC_CertifyX509 (TPM_CC)(0x00000197) -#define TPM_CC_ACT_SetTimeout (TPM_CC)(0x00000198) -#define TPM_CC_ECC_Encrypt (TPM_CC)(0x00000199) -#define TPM_CC_ECC_Decrypt (TPM_CC)(0x0000019A) -#define CC_VEND 0x20000000 -#define TPM_CC_Vendor_TCG_Test (TPM_CC)(0x20000000) - -// Table 2:5 - Definition of Types for Documentation Clarity -typedef UINT32 TPM_ALGORITHM_ID; -#define TYPE_OF_TPM_ALGORITHM_ID UINT32 -typedef UINT32 TPM_MODIFIER_INDICATOR; -#define TYPE_OF_TPM_MODIFIER_INDICATOR UINT32 -typedef UINT32 TPM_AUTHORIZATION_SIZE; -#define TYPE_OF_TPM_AUTHORIZATION_SIZE UINT32 -typedef UINT32 TPM_PARAMETER_SIZE; -#define TYPE_OF_TPM_PARAMETER_SIZE UINT32 -typedef UINT16 TPM_KEY_SIZE; -#define TYPE_OF_TPM_KEY_SIZE UINT16 -typedef UINT16 TPM_KEY_BITS; -#define TYPE_OF_TPM_KEY_BITS UINT16 - -// Table 2:6 - Definition of TPM_SPEC Constants -typedef UINT32 TPM_SPEC; -#define TYPE_OF_TPM_SPEC UINT32 -#define SPEC_FAMILY 0x322E3000 -#define TPM_SPEC_FAMILY (TPM_SPEC)(SPEC_FAMILY) -#define SPEC_LEVEL 00 -#define TPM_SPEC_LEVEL (TPM_SPEC)(SPEC_LEVEL) -#define SPEC_VERSION 162 -#define TPM_SPEC_VERSION (TPM_SPEC)(SPEC_VERSION) -#define SPEC_YEAR 2020 -#define TPM_SPEC_YEAR (TPM_SPEC)(SPEC_YEAR) -#define SPEC_DAY_OF_YEAR 53 -#define TPM_SPEC_DAY_OF_YEAR (TPM_SPEC)(SPEC_DAY_OF_YEAR) - -// Table 2:7 - Definition of TPM_CONSTANTS32 Constants -typedef UINT32 TPM_CONSTANTS32; -#define TYPE_OF_TPM_CONSTANTS32 UINT32 -#define TPM_GENERATED_VALUE (TPM_CONSTANTS32)(0xFF544347) -#define TPM_MAX_DERIVATION_BITS (TPM_CONSTANTS32)(8192) - -// Table 2:16 - Definition of TPM_RC Constants -typedef UINT32 TPM_RC; -#define TYPE_OF_TPM_RC UINT32 -#define TPM_RC_SUCCESS (TPM_RC)(0x000) -#define TPM_RC_BAD_TAG (TPM_RC)(0x01E) -#define RC_VER1 (TPM_RC)(0x100) -#define TPM_RC_INITIALIZE (TPM_RC)(RC_VER1 + 0x000) -#define TPM_RC_FAILURE (TPM_RC)(RC_VER1 + 0x001) -#define TPM_RC_SEQUENCE (TPM_RC)(RC_VER1 + 0x003) -#define TPM_RC_PRIVATE (TPM_RC)(RC_VER1 + 0x00B) -#define TPM_RC_HMAC (TPM_RC)(RC_VER1 + 0x019) -#define TPM_RC_DISABLED (TPM_RC)(RC_VER1 + 0x020) -#define TPM_RC_EXCLUSIVE (TPM_RC)(RC_VER1 + 0x021) -#define TPM_RC_AUTH_TYPE (TPM_RC)(RC_VER1 + 0x024) -#define TPM_RC_AUTH_MISSING (TPM_RC)(RC_VER1 + 0x025) -#define TPM_RC_POLICY (TPM_RC)(RC_VER1 + 0x026) -#define TPM_RC_PCR (TPM_RC)(RC_VER1 + 0x027) -#define TPM_RC_PCR_CHANGED (TPM_RC)(RC_VER1 + 0x028) -#define TPM_RC_UPGRADE (TPM_RC)(RC_VER1 + 0x02D) -#define TPM_RC_TOO_MANY_CONTEXTS (TPM_RC)(RC_VER1 + 0x02E) -#define TPM_RC_AUTH_UNAVAILABLE (TPM_RC)(RC_VER1 + 0x02F) -#define TPM_RC_REBOOT (TPM_RC)(RC_VER1 + 0x030) -#define TPM_RC_UNBALANCED (TPM_RC)(RC_VER1 + 0x031) -#define TPM_RC_COMMAND_SIZE (TPM_RC)(RC_VER1 + 0x042) -#define TPM_RC_COMMAND_CODE (TPM_RC)(RC_VER1 + 0x043) -#define TPM_RC_AUTHSIZE (TPM_RC)(RC_VER1 + 0x044) -#define TPM_RC_AUTH_CONTEXT (TPM_RC)(RC_VER1 + 0x045) -#define TPM_RC_NV_RANGE (TPM_RC)(RC_VER1 + 0x046) -#define TPM_RC_NV_SIZE (TPM_RC)(RC_VER1 + 0x047) -#define TPM_RC_NV_LOCKED (TPM_RC)(RC_VER1 + 0x048) -#define TPM_RC_NV_AUTHORIZATION (TPM_RC)(RC_VER1 + 0x049) -#define TPM_RC_NV_UNINITIALIZED (TPM_RC)(RC_VER1 + 0x04A) -#define TPM_RC_NV_SPACE (TPM_RC)(RC_VER1 + 0x04B) -#define TPM_RC_NV_DEFINED (TPM_RC)(RC_VER1 + 0x04C) -#define TPM_RC_BAD_CONTEXT (TPM_RC)(RC_VER1 + 0x050) -#define TPM_RC_CPHASH (TPM_RC)(RC_VER1 + 0x051) -#define TPM_RC_PARENT (TPM_RC)(RC_VER1 + 0x052) -#define TPM_RC_NEEDS_TEST (TPM_RC)(RC_VER1 + 0x053) -#define TPM_RC_NO_RESULT (TPM_RC)(RC_VER1 + 0x054) -#define TPM_RC_SENSITIVE (TPM_RC)(RC_VER1 + 0x055) -#define RC_MAX_FM0 (TPM_RC)(RC_VER1 + 0x07F) -#define RC_FMT1 (TPM_RC)(0x080) -#define TPM_RC_ASYMMETRIC (TPM_RC)(RC_FMT1 + 0x001) -#define TPM_RCS_ASYMMETRIC (TPM_RC)(RC_FMT1 + 0x001) -#define TPM_RC_ATTRIBUTES (TPM_RC)(RC_FMT1 + 0x002) -#define TPM_RCS_ATTRIBUTES (TPM_RC)(RC_FMT1 + 0x002) -#define TPM_RC_HASH (TPM_RC)(RC_FMT1 + 0x003) -#define TPM_RCS_HASH (TPM_RC)(RC_FMT1 + 0x003) -#define TPM_RC_VALUE (TPM_RC)(RC_FMT1 + 0x004) -#define TPM_RCS_VALUE (TPM_RC)(RC_FMT1 + 0x004) -#define TPM_RC_HIERARCHY (TPM_RC)(RC_FMT1 + 0x005) -#define TPM_RCS_HIERARCHY (TPM_RC)(RC_FMT1 + 0x005) -#define TPM_RC_KEY_SIZE (TPM_RC)(RC_FMT1 + 0x007) -#define TPM_RCS_KEY_SIZE (TPM_RC)(RC_FMT1 + 0x007) -#define TPM_RC_MGF (TPM_RC)(RC_FMT1 + 0x008) -#define TPM_RCS_MGF (TPM_RC)(RC_FMT1 + 0x008) -#define TPM_RC_MODE (TPM_RC)(RC_FMT1 + 0x009) -#define TPM_RCS_MODE (TPM_RC)(RC_FMT1 + 0x009) -#define TPM_RC_TYPE (TPM_RC)(RC_FMT1 + 0x00A) -#define TPM_RCS_TYPE (TPM_RC)(RC_FMT1 + 0x00A) -#define TPM_RC_HANDLE (TPM_RC)(RC_FMT1 + 0x00B) -#define TPM_RCS_HANDLE (TPM_RC)(RC_FMT1 + 0x00B) -#define TPM_RC_KDF (TPM_RC)(RC_FMT1 + 0x00C) -#define TPM_RCS_KDF (TPM_RC)(RC_FMT1 + 0x00C) -#define TPM_RC_RANGE (TPM_RC)(RC_FMT1 + 0x00D) -#define TPM_RCS_RANGE (TPM_RC)(RC_FMT1 + 0x00D) -#define TPM_RC_AUTH_FAIL (TPM_RC)(RC_FMT1 + 0x00E) -#define TPM_RCS_AUTH_FAIL (TPM_RC)(RC_FMT1 + 0x00E) -#define TPM_RC_NONCE (TPM_RC)(RC_FMT1 + 0x00F) -#define TPM_RCS_NONCE (TPM_RC)(RC_FMT1 + 0x00F) -#define TPM_RC_PP (TPM_RC)(RC_FMT1 + 0x010) -#define TPM_RCS_PP (TPM_RC)(RC_FMT1 + 0x010) -#define TPM_RC_SCHEME (TPM_RC)(RC_FMT1 + 0x012) -#define TPM_RCS_SCHEME (TPM_RC)(RC_FMT1 + 0x012) -#define TPM_RC_SIZE (TPM_RC)(RC_FMT1 + 0x015) -#define TPM_RCS_SIZE (TPM_RC)(RC_FMT1 + 0x015) -#define TPM_RC_SYMMETRIC (TPM_RC)(RC_FMT1 + 0x016) -#define TPM_RCS_SYMMETRIC (TPM_RC)(RC_FMT1 + 0x016) -#define TPM_RC_TAG (TPM_RC)(RC_FMT1 + 0x017) -#define TPM_RCS_TAG (TPM_RC)(RC_FMT1 + 0x017) -#define TPM_RC_SELECTOR (TPM_RC)(RC_FMT1 + 0x018) -#define TPM_RCS_SELECTOR (TPM_RC)(RC_FMT1 + 0x018) -#define TPM_RC_INSUFFICIENT (TPM_RC)(RC_FMT1 + 0x01A) -#define TPM_RCS_INSUFFICIENT (TPM_RC)(RC_FMT1 + 0x01A) -#define TPM_RC_SIGNATURE (TPM_RC)(RC_FMT1 + 0x01B) -#define TPM_RCS_SIGNATURE (TPM_RC)(RC_FMT1 + 0x01B) -#define TPM_RC_KEY (TPM_RC)(RC_FMT1 + 0x01C) -#define TPM_RCS_KEY (TPM_RC)(RC_FMT1 + 0x01C) -#define TPM_RC_POLICY_FAIL (TPM_RC)(RC_FMT1 + 0x01D) -#define TPM_RCS_POLICY_FAIL (TPM_RC)(RC_FMT1 + 0x01D) -#define TPM_RC_INTEGRITY (TPM_RC)(RC_FMT1 + 0x01F) -#define TPM_RCS_INTEGRITY (TPM_RC)(RC_FMT1 + 0x01F) -#define TPM_RC_TICKET (TPM_RC)(RC_FMT1 + 0x020) -#define TPM_RCS_TICKET (TPM_RC)(RC_FMT1 + 0x020) -#define TPM_RC_RESERVED_BITS (TPM_RC)(RC_FMT1 + 0x021) -#define TPM_RCS_RESERVED_BITS (TPM_RC)(RC_FMT1 + 0x021) -#define TPM_RC_BAD_AUTH (TPM_RC)(RC_FMT1 + 0x022) -#define TPM_RCS_BAD_AUTH (TPM_RC)(RC_FMT1 + 0x022) -#define TPM_RC_EXPIRED (TPM_RC)(RC_FMT1 + 0x023) -#define TPM_RCS_EXPIRED (TPM_RC)(RC_FMT1 + 0x023) -#define TPM_RC_POLICY_CC (TPM_RC)(RC_FMT1 + 0x024) -#define TPM_RCS_POLICY_CC (TPM_RC)(RC_FMT1 + 0x024) -#define TPM_RC_BINDING (TPM_RC)(RC_FMT1 + 0x025) -#define TPM_RCS_BINDING (TPM_RC)(RC_FMT1 + 0x025) -#define TPM_RC_CURVE (TPM_RC)(RC_FMT1 + 0x026) -#define TPM_RCS_CURVE (TPM_RC)(RC_FMT1 + 0x026) -#define TPM_RC_ECC_POINT (TPM_RC)(RC_FMT1 + 0x027) -#define TPM_RCS_ECC_POINT (TPM_RC)(RC_FMT1 + 0x027) -#define RC_WARN (TPM_RC)(0x900) -#define TPM_RC_CONTEXT_GAP (TPM_RC)(RC_WARN + 0x001) -#define TPM_RC_OBJECT_MEMORY (TPM_RC)(RC_WARN + 0x002) -#define TPM_RC_SESSION_MEMORY (TPM_RC)(RC_WARN + 0x003) -#define TPM_RC_MEMORY (TPM_RC)(RC_WARN + 0x004) -#define TPM_RC_SESSION_HANDLES (TPM_RC)(RC_WARN + 0x005) -#define TPM_RC_OBJECT_HANDLES (TPM_RC)(RC_WARN + 0x006) -#define TPM_RC_LOCALITY (TPM_RC)(RC_WARN + 0x007) -#define TPM_RC_YIELDED (TPM_RC)(RC_WARN + 0x008) -#define TPM_RC_CANCELED (TPM_RC)(RC_WARN + 0x009) -#define TPM_RC_TESTING (TPM_RC)(RC_WARN + 0x00A) -#define TPM_RC_REFERENCE_H0 (TPM_RC)(RC_WARN + 0x010) -#define TPM_RC_REFERENCE_H1 (TPM_RC)(RC_WARN + 0x011) -#define TPM_RC_REFERENCE_H2 (TPM_RC)(RC_WARN + 0x012) -#define TPM_RC_REFERENCE_H3 (TPM_RC)(RC_WARN + 0x013) -#define TPM_RC_REFERENCE_H4 (TPM_RC)(RC_WARN + 0x014) -#define TPM_RC_REFERENCE_H5 (TPM_RC)(RC_WARN + 0x015) -#define TPM_RC_REFERENCE_H6 (TPM_RC)(RC_WARN + 0x016) -#define TPM_RC_REFERENCE_S0 (TPM_RC)(RC_WARN + 0x018) -#define TPM_RC_REFERENCE_S1 (TPM_RC)(RC_WARN + 0x019) -#define TPM_RC_REFERENCE_S2 (TPM_RC)(RC_WARN + 0x01A) -#define TPM_RC_REFERENCE_S3 (TPM_RC)(RC_WARN + 0x01B) -#define TPM_RC_REFERENCE_S4 (TPM_RC)(RC_WARN + 0x01C) -#define TPM_RC_REFERENCE_S5 (TPM_RC)(RC_WARN + 0x01D) -#define TPM_RC_REFERENCE_S6 (TPM_RC)(RC_WARN + 0x01E) -#define TPM_RC_NV_RATE (TPM_RC)(RC_WARN + 0x020) -#define TPM_RC_LOCKOUT (TPM_RC)(RC_WARN + 0x021) -#define TPM_RC_RETRY (TPM_RC)(RC_WARN + 0x022) -#define TPM_RC_NV_UNAVAILABLE (TPM_RC)(RC_WARN + 0x023) -#define TPM_RC_NOT_USED (TPM_RC)(RC_WARN + 0x7F) -#define TPM_RC_H (TPM_RC)(0x000) -#define TPM_RC_P (TPM_RC)(0x040) -#define TPM_RC_S (TPM_RC)(0x800) -#define TPM_RC_1 (TPM_RC)(0x100) -#define TPM_RC_2 (TPM_RC)(0x200) -#define TPM_RC_3 (TPM_RC)(0x300) -#define TPM_RC_4 (TPM_RC)(0x400) -#define TPM_RC_5 (TPM_RC)(0x500) -#define TPM_RC_6 (TPM_RC)(0x600) -#define TPM_RC_7 (TPM_RC)(0x700) -#define TPM_RC_8 (TPM_RC)(0x800) -#define TPM_RC_9 (TPM_RC)(0x900) -#define TPM_RC_A (TPM_RC)(0xA00) -#define TPM_RC_B (TPM_RC)(0xB00) -#define TPM_RC_C (TPM_RC)(0xC00) -#define TPM_RC_D (TPM_RC)(0xD00) -#define TPM_RC_E (TPM_RC)(0xE00) -#define TPM_RC_F (TPM_RC)(0xF00) -#define TPM_RC_N_MASK (TPM_RC)(0xF00) - -// Table 2:17 - Definition of TPM_CLOCK_ADJUST Constants -typedef INT8 TPM_CLOCK_ADJUST; -#define TYPE_OF_TPM_CLOCK_ADJUST UINT8 -#define TPM_CLOCK_COARSE_SLOWER (TPM_CLOCK_ADJUST)(-3) -#define TPM_CLOCK_MEDIUM_SLOWER (TPM_CLOCK_ADJUST)(-2) -#define TPM_CLOCK_FINE_SLOWER (TPM_CLOCK_ADJUST)(-1) -#define TPM_CLOCK_NO_CHANGE (TPM_CLOCK_ADJUST)(0) -#define TPM_CLOCK_FINE_FASTER (TPM_CLOCK_ADJUST)(1) -#define TPM_CLOCK_MEDIUM_FASTER (TPM_CLOCK_ADJUST)(2) -#define TPM_CLOCK_COARSE_FASTER (TPM_CLOCK_ADJUST)(3) - -// Table 2:18 - Definition of TPM_EO Constants -typedef UINT16 TPM_EO; -#define TYPE_OF_TPM_EO UINT16 -#define TPM_EO_EQ (TPM_EO)(0x0000) -#define TPM_EO_NEQ (TPM_EO)(0x0001) -#define TPM_EO_SIGNED_GT (TPM_EO)(0x0002) -#define TPM_EO_UNSIGNED_GT (TPM_EO)(0x0003) -#define TPM_EO_SIGNED_LT (TPM_EO)(0x0004) -#define TPM_EO_UNSIGNED_LT (TPM_EO)(0x0005) -#define TPM_EO_SIGNED_GE (TPM_EO)(0x0006) -#define TPM_EO_UNSIGNED_GE (TPM_EO)(0x0007) -#define TPM_EO_SIGNED_LE (TPM_EO)(0x0008) -#define TPM_EO_UNSIGNED_LE (TPM_EO)(0x0009) -#define TPM_EO_BITSET (TPM_EO)(0x000A) -#define TPM_EO_BITCLEAR (TPM_EO)(0x000B) - -// Table 2:19 - Definition of TPM_ST Constants -typedef UINT16 TPM_ST; -#define TYPE_OF_TPM_ST UINT16 -#define TPM_ST_RSP_COMMAND (TPM_ST)(0x00C4) -#define TPM_ST_NULL (TPM_ST)(0x8000) -#define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001) -#define TPM_ST_SESSIONS (TPM_ST)(0x8002) -#define TPM_ST_ATTEST_NV (TPM_ST)(0x8014) -#define TPM_ST_ATTEST_COMMAND_AUDIT (TPM_ST)(0x8015) -#define TPM_ST_ATTEST_SESSION_AUDIT (TPM_ST)(0x8016) -#define TPM_ST_ATTEST_CERTIFY (TPM_ST)(0x8017) -#define TPM_ST_ATTEST_QUOTE (TPM_ST)(0x8018) -#define TPM_ST_ATTEST_TIME (TPM_ST)(0x8019) -#define TPM_ST_ATTEST_CREATION (TPM_ST)(0x801A) -#define TPM_ST_ATTEST_NV_DIGEST (TPM_ST)(0x801C) -#define TPM_ST_CREATION (TPM_ST)(0x8021) -#define TPM_ST_VERIFIED (TPM_ST)(0x8022) -#define TPM_ST_AUTH_SECRET (TPM_ST)(0x8023) -#define TPM_ST_HASHCHECK (TPM_ST)(0x8024) -#define TPM_ST_AUTH_SIGNED (TPM_ST)(0x8025) -#define TPM_ST_FU_MANIFEST (TPM_ST)(0x8029) - -// Table 2:20 - Definition of TPM_SU Constants -typedef UINT16 TPM_SU; -#define TYPE_OF_TPM_SU UINT16 -#define TPM_SU_CLEAR (TPM_SU)(0x0000) -#define TPM_SU_STATE (TPM_SU)(0x0001) - -// Table 2:21 - Definition of TPM_SE Constants -typedef UINT8 TPM_SE; -#define TYPE_OF_TPM_SE UINT8 -#define TPM_SE_HMAC (TPM_SE)(0x00) -#define TPM_SE_POLICY (TPM_SE)(0x01) -#define TPM_SE_TRIAL (TPM_SE)(0x03) - -// Table 2:22 - Definition of TPM_CAP Constants -typedef UINT32 TPM_CAP; -#define TYPE_OF_TPM_CAP UINT32 -#define TPM_CAP_FIRST (TPM_CAP)(0x00000000) -#define TPM_CAP_ALGS (TPM_CAP)(0x00000000) -#define TPM_CAP_HANDLES (TPM_CAP)(0x00000001) -#define TPM_CAP_COMMANDS (TPM_CAP)(0x00000002) -#define TPM_CAP_PP_COMMANDS (TPM_CAP)(0x00000003) -#define TPM_CAP_AUDIT_COMMANDS (TPM_CAP)(0x00000004) -#define TPM_CAP_PCRS (TPM_CAP)(0x00000005) -#define TPM_CAP_TPM_PROPERTIES (TPM_CAP)(0x00000006) -#define TPM_CAP_PCR_PROPERTIES (TPM_CAP)(0x00000007) -#define TPM_CAP_ECC_CURVES (TPM_CAP)(0x00000008) -#define TPM_CAP_AUTH_POLICIES (TPM_CAP)(0x00000009) -#define TPM_CAP_ACT (TPM_CAP)(0x0000000A) -#define TPM_CAP_LAST (TPM_CAP)(0x0000000A) -#define TPM_CAP_VENDOR_PROPERTY (TPM_CAP)(0x00000100) - -// Table 2:23 - Definition of TPM_PT Constants -typedef UINT32 TPM_PT; -#define TYPE_OF_TPM_PT UINT32 -#define TPM_PT_NONE (TPM_PT)(0x00000000) -#define PT_GROUP (TPM_PT)(0x00000100) -#define PT_FIXED (TPM_PT)(PT_GROUP * 1) -#define TPM_PT_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 0) -#define TPM_PT_LEVEL (TPM_PT)(PT_FIXED + 1) -#define TPM_PT_REVISION (TPM_PT)(PT_FIXED + 2) -#define TPM_PT_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 3) -#define TPM_PT_YEAR (TPM_PT)(PT_FIXED + 4) -#define TPM_PT_MANUFACTURER (TPM_PT)(PT_FIXED + 5) -#define TPM_PT_VENDOR_STRING_1 (TPM_PT)(PT_FIXED + 6) -#define TPM_PT_VENDOR_STRING_2 (TPM_PT)(PT_FIXED + 7) -#define TPM_PT_VENDOR_STRING_3 (TPM_PT)(PT_FIXED + 8) -#define TPM_PT_VENDOR_STRING_4 (TPM_PT)(PT_FIXED + 9) -#define TPM_PT_VENDOR_TPM_TYPE (TPM_PT)(PT_FIXED + 10) -#define TPM_PT_FIRMWARE_VERSION_1 (TPM_PT)(PT_FIXED + 11) -#define TPM_PT_FIRMWARE_VERSION_2 (TPM_PT)(PT_FIXED + 12) -#define TPM_PT_INPUT_BUFFER (TPM_PT)(PT_FIXED + 13) -#define TPM_PT_HR_TRANSIENT_MIN (TPM_PT)(PT_FIXED + 14) -#define TPM_PT_HR_PERSISTENT_MIN (TPM_PT)(PT_FIXED + 15) -#define TPM_PT_HR_LOADED_MIN (TPM_PT)(PT_FIXED + 16) -#define TPM_PT_ACTIVE_SESSIONS_MAX (TPM_PT)(PT_FIXED + 17) -#define TPM_PT_PCR_COUNT (TPM_PT)(PT_FIXED + 18) -#define TPM_PT_PCR_SELECT_MIN (TPM_PT)(PT_FIXED + 19) -#define TPM_PT_CONTEXT_GAP_MAX (TPM_PT)(PT_FIXED + 20) -#define TPM_PT_NV_COUNTERS_MAX (TPM_PT)(PT_FIXED + 22) -#define TPM_PT_NV_INDEX_MAX (TPM_PT)(PT_FIXED + 23) -#define TPM_PT_MEMORY (TPM_PT)(PT_FIXED + 24) -#define TPM_PT_CLOCK_UPDATE (TPM_PT)(PT_FIXED + 25) -#define TPM_PT_CONTEXT_HASH (TPM_PT)(PT_FIXED + 26) -#define TPM_PT_CONTEXT_SYM (TPM_PT)(PT_FIXED + 27) -#define TPM_PT_CONTEXT_SYM_SIZE (TPM_PT)(PT_FIXED + 28) -#define TPM_PT_ORDERLY_COUNT (TPM_PT)(PT_FIXED + 29) -#define TPM_PT_MAX_COMMAND_SIZE (TPM_PT)(PT_FIXED + 30) -#define TPM_PT_MAX_RESPONSE_SIZE (TPM_PT)(PT_FIXED + 31) -#define TPM_PT_MAX_DIGEST (TPM_PT)(PT_FIXED + 32) -#define TPM_PT_MAX_OBJECT_CONTEXT (TPM_PT)(PT_FIXED + 33) -#define TPM_PT_MAX_SESSION_CONTEXT (TPM_PT)(PT_FIXED + 34) -#define TPM_PT_PS_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 35) -#define TPM_PT_PS_LEVEL (TPM_PT)(PT_FIXED + 36) -#define TPM_PT_PS_REVISION (TPM_PT)(PT_FIXED + 37) -#define TPM_PT_PS_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 38) -#define TPM_PT_PS_YEAR (TPM_PT)(PT_FIXED + 39) -#define TPM_PT_SPLIT_MAX (TPM_PT)(PT_FIXED + 40) -#define TPM_PT_TOTAL_COMMANDS (TPM_PT)(PT_FIXED + 41) -#define TPM_PT_LIBRARY_COMMANDS (TPM_PT)(PT_FIXED + 42) -#define TPM_PT_VENDOR_COMMANDS (TPM_PT)(PT_FIXED + 43) -#define TPM_PT_NV_BUFFER_MAX (TPM_PT)(PT_FIXED + 44) -#define TPM_PT_MODES (TPM_PT)(PT_FIXED + 45) -#define TPM_PT_MAX_CAP_BUFFER (TPM_PT)(PT_FIXED + 46) -#define PT_VAR (TPM_PT)(PT_GROUP * 2) -#define TPM_PT_PERMANENT (TPM_PT)(PT_VAR + 0) -#define TPM_PT_STARTUP_CLEAR (TPM_PT)(PT_VAR + 1) -#define TPM_PT_HR_NV_INDEX (TPM_PT)(PT_VAR + 2) -#define TPM_PT_HR_LOADED (TPM_PT)(PT_VAR + 3) -#define TPM_PT_HR_LOADED_AVAIL (TPM_PT)(PT_VAR + 4) -#define TPM_PT_HR_ACTIVE (TPM_PT)(PT_VAR + 5) -#define TPM_PT_HR_ACTIVE_AVAIL (TPM_PT)(PT_VAR + 6) -#define TPM_PT_HR_TRANSIENT_AVAIL (TPM_PT)(PT_VAR + 7) -#define TPM_PT_HR_PERSISTENT (TPM_PT)(PT_VAR + 8) -#define TPM_PT_HR_PERSISTENT_AVAIL (TPM_PT)(PT_VAR + 9) -#define TPM_PT_NV_COUNTERS (TPM_PT)(PT_VAR + 10) -#define TPM_PT_NV_COUNTERS_AVAIL (TPM_PT)(PT_VAR + 11) -#define TPM_PT_ALGORITHM_SET (TPM_PT)(PT_VAR + 12) -#define TPM_PT_LOADED_CURVES (TPM_PT)(PT_VAR + 13) -#define TPM_PT_LOCKOUT_COUNTER (TPM_PT)(PT_VAR + 14) -#define TPM_PT_MAX_AUTH_FAIL (TPM_PT)(PT_VAR + 15) -#define TPM_PT_LOCKOUT_INTERVAL (TPM_PT)(PT_VAR + 16) -#define TPM_PT_LOCKOUT_RECOVERY (TPM_PT)(PT_VAR + 17) -#define TPM_PT_NV_WRITE_RECOVERY (TPM_PT)(PT_VAR + 18) -#define TPM_PT_AUDIT_COUNTER_0 (TPM_PT)(PT_VAR + 19) -#define TPM_PT_AUDIT_COUNTER_1 (TPM_PT)(PT_VAR + 20) - -// Table 2:24 - Definition of TPM_PT_PCR Constants -typedef UINT32 TPM_PT_PCR; -#define TYPE_OF_TPM_PT_PCR UINT32 -#define TPM_PT_PCR_FIRST (TPM_PT_PCR)(0x00000000) -#define TPM_PT_PCR_SAVE (TPM_PT_PCR)(0x00000000) -#define TPM_PT_PCR_EXTEND_L0 (TPM_PT_PCR)(0x00000001) -#define TPM_PT_PCR_RESET_L0 (TPM_PT_PCR)(0x00000002) -#define TPM_PT_PCR_EXTEND_L1 (TPM_PT_PCR)(0x00000003) -#define TPM_PT_PCR_RESET_L1 (TPM_PT_PCR)(0x00000004) -#define TPM_PT_PCR_EXTEND_L2 (TPM_PT_PCR)(0x00000005) -#define TPM_PT_PCR_RESET_L2 (TPM_PT_PCR)(0x00000006) -#define TPM_PT_PCR_EXTEND_L3 (TPM_PT_PCR)(0x00000007) -#define TPM_PT_PCR_RESET_L3 (TPM_PT_PCR)(0x00000008) -#define TPM_PT_PCR_EXTEND_L4 (TPM_PT_PCR)(0x00000009) -#define TPM_PT_PCR_RESET_L4 (TPM_PT_PCR)(0x0000000A) -#define TPM_PT_PCR_NO_INCREMENT (TPM_PT_PCR)(0x00000011) -#define TPM_PT_PCR_DRTM_RESET (TPM_PT_PCR)(0x00000012) -#define TPM_PT_PCR_POLICY (TPM_PT_PCR)(0x00000013) -#define TPM_PT_PCR_AUTH (TPM_PT_PCR)(0x00000014) -#define TPM_PT_PCR_LAST (TPM_PT_PCR)(0x00000014) - -// Table 2:25 - Definition of TPM_PS Constants -typedef UINT32 TPM_PS; -#define TYPE_OF_TPM_PS UINT32 -#define TPM_PS_MAIN (TPM_PS)(0x00000000) -#define TPM_PS_PC (TPM_PS)(0x00000001) -#define TPM_PS_PDA (TPM_PS)(0x00000002) -#define TPM_PS_CELL_PHONE (TPM_PS)(0x00000003) -#define TPM_PS_SERVER (TPM_PS)(0x00000004) -#define TPM_PS_PERIPHERAL (TPM_PS)(0x00000005) -#define TPM_PS_TSS (TPM_PS)(0x00000006) -#define TPM_PS_STORAGE (TPM_PS)(0x00000007) -#define TPM_PS_AUTHENTICATION (TPM_PS)(0x00000008) -#define TPM_PS_EMBEDDED (TPM_PS)(0x00000009) -#define TPM_PS_HARDCOPY (TPM_PS)(0x0000000A) -#define TPM_PS_INFRASTRUCTURE (TPM_PS)(0x0000000B) -#define TPM_PS_VIRTUALIZATION (TPM_PS)(0x0000000C) -#define TPM_PS_TNC (TPM_PS)(0x0000000D) -#define TPM_PS_MULTI_TENANT (TPM_PS)(0x0000000E) -#define TPM_PS_TC (TPM_PS)(0x0000000F) - -// Table 2:26 - Definition of Types for Handles -typedef UINT32 TPM_HANDLE; -#define TYPE_OF_TPM_HANDLE UINT32 - -// Table 2:27 - Definition of TPM_HT Constants -typedef UINT8 TPM_HT; -#define TYPE_OF_TPM_HT UINT8 -#define TPM_HT_PCR (TPM_HT)(0x00) -#define TPM_HT_NV_INDEX (TPM_HT)(0x01) -#define TPM_HT_HMAC_SESSION (TPM_HT)(0x02) -#define TPM_HT_LOADED_SESSION (TPM_HT)(0x02) -#define TPM_HT_POLICY_SESSION (TPM_HT)(0x03) -#define TPM_HT_SAVED_SESSION (TPM_HT)(0x03) -#define TPM_HT_PERMANENT (TPM_HT)(0x40) -#define TPM_HT_TRANSIENT (TPM_HT)(0x80) -#define TPM_HT_PERSISTENT (TPM_HT)(0x81) -#define TPM_HT_AC (TPM_HT)(0x90) - -// Table 2:28 - Definition of TPM_RH Constants -typedef TPM_HANDLE TPM_RH; -#define TPM_RH_FIRST (TPM_RH)(0x40000000) -#define TPM_RH_SRK (TPM_RH)(0x40000000) -#define TPM_RH_OWNER (TPM_RH)(0x40000001) -#define TPM_RH_REVOKE (TPM_RH)(0x40000002) -#define TPM_RH_TRANSPORT (TPM_RH)(0x40000003) -#define TPM_RH_OPERATOR (TPM_RH)(0x40000004) -#define TPM_RH_ADMIN (TPM_RH)(0x40000005) -#define TPM_RH_EK (TPM_RH)(0x40000006) -#define TPM_RH_NULL (TPM_RH)(0x40000007) -#define TPM_RH_UNASSIGNED (TPM_RH)(0x40000008) -#define TPM_RS_PW (TPM_RH)(0x40000009) -#define TPM_RH_LOCKOUT (TPM_RH)(0x4000000A) -#define TPM_RH_ENDORSEMENT (TPM_RH)(0x4000000B) -#define TPM_RH_PLATFORM (TPM_RH)(0x4000000C) -#define TPM_RH_PLATFORM_NV (TPM_RH)(0x4000000D) -#define TPM_RH_AUTH_00 (TPM_RH)(0x40000010) -#define TPM_RH_AUTH_FF (TPM_RH)(0x4000010F) -#define TPM_RH_ACT_0 (TPM_RH)(0x40000110) -#define TPM_RH_ACT_F (TPM_RH)(0x4000011F) -#define TPM_RH_LAST (TPM_RH)(0x4000011F) - -// Table 2:29 - Definition of TPM_HC Constants -typedef TPM_HANDLE TPM_HC; -#define HR_HANDLE_MASK (TPM_HC)(0x00FFFFFF) -#define HR_RANGE_MASK (TPM_HC)(0xFF000000) -#define HR_SHIFT (TPM_HC)(24) -#define HR_PCR (TPM_HC)((TPM_HT_PCR << HR_SHIFT)) -#define HR_HMAC_SESSION (TPM_HC)((TPM_HT_HMAC_SESSION << HR_SHIFT)) -#define HR_POLICY_SESSION (TPM_HC)((TPM_HT_POLICY_SESSION << HR_SHIFT)) -#define HR_TRANSIENT (TPM_HC)((TPM_HT_TRANSIENT << HR_SHIFT)) -#define HR_PERSISTENT (TPM_HC)((TPM_HT_PERSISTENT << HR_SHIFT)) -#define HR_NV_INDEX (TPM_HC)((TPM_HT_NV_INDEX << HR_SHIFT)) -#define HR_PERMANENT (TPM_HC)((TPM_HT_PERMANENT << HR_SHIFT)) -#define PCR_FIRST (TPM_HC)((HR_PCR + 0)) -#define PCR_LAST (TPM_HC)((PCR_FIRST + IMPLEMENTATION_PCR - 1)) -#define HMAC_SESSION_FIRST (TPM_HC)((HR_HMAC_SESSION + 0)) -#define HMAC_SESSION_LAST (TPM_HC)((HMAC_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)) -#define LOADED_SESSION_FIRST (TPM_HC)(HMAC_SESSION_FIRST) -#define LOADED_SESSION_LAST (TPM_HC)(HMAC_SESSION_LAST) -#define POLICY_SESSION_FIRST (TPM_HC)((HR_POLICY_SESSION + 0)) -#define POLICY_SESSION_LAST (TPM_HC)((POLICY_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)) -#define TRANSIENT_FIRST (TPM_HC)((HR_TRANSIENT + 0)) -#define ACTIVE_SESSION_FIRST (TPM_HC)(POLICY_SESSION_FIRST) -#define ACTIVE_SESSION_LAST (TPM_HC)(POLICY_SESSION_LAST) -#define TRANSIENT_LAST (TPM_HC)((TRANSIENT_FIRST + MAX_LOADED_OBJECTS - 1)) -#define PERSISTENT_FIRST (TPM_HC)((HR_PERSISTENT + 0)) -#define PERSISTENT_LAST (TPM_HC)((PERSISTENT_FIRST + 0x00FFFFFF)) -#define PLATFORM_PERSISTENT (TPM_HC)((PERSISTENT_FIRST + 0x00800000)) -#define NV_INDEX_FIRST (TPM_HC)((HR_NV_INDEX + 0)) -#define NV_INDEX_LAST (TPM_HC)((NV_INDEX_FIRST + 0x00FFFFFF)) -#define PERMANENT_FIRST (TPM_HC)(TPM_RH_FIRST) -#define PERMANENT_LAST (TPM_HC)(TPM_RH_LAST) -#define HR_NV_AC (TPM_HC)(((TPM_HT_NV_INDEX << HR_SHIFT) + 0xD00000)) -#define NV_AC_FIRST (TPM_HC)((HR_NV_AC + 0)) -#define NV_AC_LAST (TPM_HC)((HR_NV_AC + 0x0000FFFF)) -#define HR_AC (TPM_HC)((TPM_HT_AC << HR_SHIFT)) -#define AC_FIRST (TPM_HC)((HR_AC + 0)) -#define AC_LAST (TPM_HC)((HR_AC + 0x0000FFFF)) - -#define TYPE_OF_TPMA_ALGORITHM UINT32 -#define TPMA_ALGORITHM_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPMA_ALGORITHM(a) (*((TPMA_ALGORITHM*)&(a))) -#define TPMA_ALGORITHM_TO_BYTE_ARRAY(i, a) \ - UINT32_TO_BYTE_ARRAY((TPMA_ALGORITHM_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_ALGORITHM(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPMA_ALGORITHM(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_ALGORITHM -{ // Table 2:30 - unsigned asymmetric : 1; - unsigned symmetric : 1; - unsigned hash : 1; - unsigned object : 1; - unsigned Reserved_bits_at_4 : 4; - unsigned signing : 1; - unsigned encrypting : 1; - unsigned method : 1; - unsigned Reserved_bits_at_11 : 21; -} TPMA_ALGORITHM; /* Bits */ -// This is the initializer for a TPMA_ALGORITHM structure -# define TPMA_ALGORITHM_INITIALIZER(asymmetric, \ - symmetric, \ - hash, \ - object, \ - bits_at_4, \ - signing, \ - encrypting, \ - method, \ - bits_at_11) \ - { \ - asymmetric, symmetric, hash, object, bits_at_4, signing, encrypting, method, \ - bits_at_11 \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:30 TPMA_ALGORITHM using bit masking -typedef UINT32 TPMA_ALGORITHM; -# define TYPE_OF_TPMA_ALGORITHM UINT32 -# define TPMA_ALGORITHM_asymmetric ((TPMA_ALGORITHM)1 << 0) -# define TPMA_ALGORITHM_symmetric ((TPMA_ALGORITHM)1 << 1) -# define TPMA_ALGORITHM_hash ((TPMA_ALGORITHM)1 << 2) -# define TPMA_ALGORITHM_object ((TPMA_ALGORITHM)1 << 3) -# define TPMA_ALGORITHM_signing ((TPMA_ALGORITHM)1 << 8) -# define TPMA_ALGORITHM_encrypting ((TPMA_ALGORITHM)1 << 9) -# define TPMA_ALGORITHM_method ((TPMA_ALGORITHM)1 << 10) -// This is the initializer for a TPMA_ALGORITHM bit array. -# define TPMA_ALGORITHM_INITIALIZER(asymmetric, \ - symmetric, \ - hash, \ - object, \ - bits_at_4, \ - signing, \ - encrypting, \ - method, \ - bits_at_11) \ - (TPMA_ALGORITHM)((asymmetric << 0) + (symmetric << 1) + (hash << 2) \ - + (object << 3) + (signing << 8) + (encrypting << 9) \ - + (method << 10)) -#endif // USE_BIT_FIELD_STRUCTURES - -#define TYPE_OF_TPMA_OBJECT UINT32 -#define TPMA_OBJECT_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPMA_OBJECT(a) (*((TPMA_OBJECT*)&(a))) -#define TPMA_OBJECT_TO_BYTE_ARRAY(i, a) \ - UINT32_TO_BYTE_ARRAY((TPMA_OBJECT_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_OBJECT(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPMA_OBJECT(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_OBJECT -{ // Table 2:31 - unsigned Reserved_bit_at_0 : 1; - unsigned fixedTPM : 1; - unsigned stClear : 1; - unsigned Reserved_bit_at_3 : 1; - unsigned fixedParent : 1; - unsigned sensitiveDataOrigin : 1; - unsigned userWithAuth : 1; - unsigned adminWithPolicy : 1; - unsigned Reserved_bits_at_8 : 2; - unsigned noDA : 1; - unsigned encryptedDuplication : 1; - unsigned Reserved_bits_at_12 : 4; - unsigned restricted : 1; - unsigned decrypt : 1; - unsigned sign : 1; - unsigned x509sign : 1; - unsigned Reserved_bits_at_20 : 12; -} TPMA_OBJECT; /* Bits */ -// This is the initializer for a TPMA_OBJECT structure -# define TPMA_OBJECT_INITIALIZER(bit_at_0, \ - fixedtpm, \ - stclear, \ - bit_at_3, \ - fixedparent, \ - sensitivedataorigin, \ - userwithauth, \ - adminwithpolicy, \ - bits_at_8, \ - noda, \ - encryptedduplication, \ - bits_at_12, \ - restricted, \ - decrypt, \ - sign, \ - x509sign, \ - bits_at_20) \ - { \ - bit_at_0, fixedtpm, stclear, bit_at_3, fixedparent, sensitivedataorigin, \ - userwithauth, adminwithpolicy, bits_at_8, noda, encryptedduplication, \ - bits_at_12, restricted, decrypt, sign, x509sign, bits_at_20 \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:31 TPMA_OBJECT using bit masking -typedef UINT32 TPMA_OBJECT; -# define TYPE_OF_TPMA_OBJECT UINT32 -# define TPMA_OBJECT_fixedTPM ((TPMA_OBJECT)1 << 1) -# define TPMA_OBJECT_stClear ((TPMA_OBJECT)1 << 2) -# define TPMA_OBJECT_fixedParent ((TPMA_OBJECT)1 << 4) -# define TPMA_OBJECT_sensitiveDataOrigin ((TPMA_OBJECT)1 << 5) -# define TPMA_OBJECT_userWithAuth ((TPMA_OBJECT)1 << 6) -# define TPMA_OBJECT_adminWithPolicy ((TPMA_OBJECT)1 << 7) -# define TPMA_OBJECT_noDA ((TPMA_OBJECT)1 << 10) -# define TPMA_OBJECT_encryptedDuplication ((TPMA_OBJECT)1 << 11) -# define TPMA_OBJECT_restricted ((TPMA_OBJECT)1 << 16) -# define TPMA_OBJECT_decrypt ((TPMA_OBJECT)1 << 17) -# define TPMA_OBJECT_sign ((TPMA_OBJECT)1 << 18) -# define TPMA_OBJECT_x509sign ((TPMA_OBJECT)1 << 19) -// This is the initializer for a TPMA_OBJECT bit array. -# define TPMA_OBJECT_INITIALIZER(bit_at_0, \ - fixedtpm, \ - stclear, \ - bit_at_3, \ - fixedparent, \ - sensitivedataorigin, \ - userwithauth, \ - adminwithpolicy, \ - bits_at_8, \ - noda, \ - encryptedduplication, \ - bits_at_12, \ - restricted, \ - decrypt, \ - sign, \ - x509sign, \ - bits_at_20) \ - (TPMA_OBJECT)((fixedtpm << 1) + (stclear << 2) + (fixedparent << 4) \ - + (sensitivedataorigin << 5) + (userwithauth << 6) \ - + (adminwithpolicy << 7) + (noda << 10) \ - + (encryptedduplication << 11) + (restricted << 16) \ - + (decrypt << 17) + (sign << 18) + (x509sign << 19)) -#endif // USE_BIT_FIELD_STRUCTURES - -#define TYPE_OF_TPMA_SESSION UINT8 -#define TPMA_SESSION_TO_UINT8(a) (*((UINT8*)&(a))) -#define UINT8_TO_TPMA_SESSION(a) (*((TPMA_SESSION*)&(a))) -#define TPMA_SESSION_TO_BYTE_ARRAY(i, a) \ - UINT8_TO_BYTE_ARRAY((TPMA_SESSION_TO_UINT8(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_SESSION(i, a) \ - { \ - UINT8 x = BYTE_ARRAY_TO_UINT8(a); \ - i = UINT8_TO_TPMA_SESSION(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_SESSION -{ // Table 2:32 - unsigned continueSession : 1; - unsigned auditExclusive : 1; - unsigned auditReset : 1; - unsigned Reserved_bits_at_3 : 2; - unsigned decrypt : 1; - unsigned encrypt : 1; - unsigned audit : 1; -} TPMA_SESSION; /* Bits */ -// This is the initializer for a TPMA_SESSION structure -# define TPMA_SESSION_INITIALIZER(continuesession, \ - auditexclusive, \ - auditreset, \ - bits_at_3, \ - decrypt, \ - encrypt, \ - audit) \ - { \ - continuesession, auditexclusive, auditreset, bits_at_3, decrypt, encrypt, \ - audit \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:32 TPMA_SESSION using bit masking -typedef UINT8 TPMA_SESSION; -# define TYPE_OF_TPMA_SESSION UINT8 -# define TPMA_SESSION_continueSession ((TPMA_SESSION)1 << 0) -# define TPMA_SESSION_auditExclusive ((TPMA_SESSION)1 << 1) -# define TPMA_SESSION_auditReset ((TPMA_SESSION)1 << 2) -# define TPMA_SESSION_decrypt ((TPMA_SESSION)1 << 5) -# define TPMA_SESSION_encrypt ((TPMA_SESSION)1 << 6) -# define TPMA_SESSION_audit ((TPMA_SESSION)1 << 7) -// This is the initializer for a TPMA_SESSION bit array. -# define TPMA_SESSION_INITIALIZER(continuesession, \ - auditexclusive, \ - auditreset, \ - bits_at_3, \ - decrypt, \ - encrypt, \ - audit) \ - (TPMA_SESSION)((continuesession << 0) + (auditexclusive << 1) \ - + (auditreset << 2) + (decrypt << 5) + (encrypt << 6) \ - + (audit << 7)) -#endif // USE_BIT_FIELD_STRUCTURES - -#define TYPE_OF_TPMA_LOCALITY UINT8 -#define TPMA_LOCALITY_TO_UINT8(a) (*((UINT8*)&(a))) -#define UINT8_TO_TPMA_LOCALITY(a) (*((TPMA_LOCALITY*)&(a))) -#define TPMA_LOCALITY_TO_BYTE_ARRAY(i, a) \ - UINT8_TO_BYTE_ARRAY((TPMA_LOCALITY_TO_UINT8(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_LOCALITY(i, a) \ - { \ - UINT8 x = BYTE_ARRAY_TO_UINT8(a); \ - i = UINT8_TO_TPMA_LOCALITY(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_LOCALITY -{ // Table 2:33 - unsigned TPM_LOC_ZERO : 1; - unsigned TPM_LOC_ONE : 1; - unsigned TPM_LOC_TWO : 1; - unsigned TPM_LOC_THREE : 1; - unsigned TPM_LOC_FOUR : 1; - unsigned Extended : 3; -} TPMA_LOCALITY; /* Bits */ -// This is the initializer for a TPMA_LOCALITY structure -# define TPMA_LOCALITY_INITIALIZER( \ - tpm_loc_zero, tpm_loc_one, tpm_loc_two, tpm_loc_three, tpm_loc_four, extended) \ - { \ - tpm_loc_zero, tpm_loc_one, tpm_loc_two, tpm_loc_three, tpm_loc_four, extended \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:33 TPMA_LOCALITY using bit masking -typedef UINT8 TPMA_LOCALITY; -# define TYPE_OF_TPMA_LOCALITY UINT8 -# define TPMA_LOCALITY_TPM_LOC_ZERO ((TPMA_LOCALITY)1 << 0) -# define TPMA_LOCALITY_TPM_LOC_ONE ((TPMA_LOCALITY)1 << 1) -# define TPMA_LOCALITY_TPM_LOC_TWO ((TPMA_LOCALITY)1 << 2) -# define TPMA_LOCALITY_TPM_LOC_THREE ((TPMA_LOCALITY)1 << 3) -# define TPMA_LOCALITY_TPM_LOC_FOUR ((TPMA_LOCALITY)1 << 4) -# define TPMA_LOCALITY_Extended_SHIFT 5 -# define TPMA_LOCALITY_Extended ((TPMA_LOCALITY)0x7 << 5) -// This is the initializer for a TPMA_LOCALITY bit array. -# define TPMA_LOCALITY_INITIALIZER( \ - tpm_loc_zero, tpm_loc_one, tpm_loc_two, tpm_loc_three, tpm_loc_four, extended) \ - (TPMA_LOCALITY)((tpm_loc_zero << 0) + (tpm_loc_one << 1) + (tpm_loc_two << 2) \ - + (tpm_loc_three << 3) + (tpm_loc_four << 4) + (extended << 5)) -#endif // USE_BIT_FIELD_STRUCTURES - -#define TYPE_OF_TPMA_PERMANENT UINT32 -#define TPMA_PERMANENT_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPMA_PERMANENT(a) (*((TPMA_PERMANENT*)&(a))) -#define TPMA_PERMANENT_TO_BYTE_ARRAY(i, a) \ - UINT32_TO_BYTE_ARRAY((TPMA_PERMANENT_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_PERMANENT(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPMA_PERMANENT(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_PERMANENT -{ // Table 2:34 - unsigned ownerAuthSet : 1; - unsigned endorsementAuthSet : 1; - unsigned lockoutAuthSet : 1; - unsigned Reserved_bits_at_3 : 5; - unsigned disableClear : 1; - unsigned inLockout : 1; - unsigned tpmGeneratedEPS : 1; - unsigned Reserved_bits_at_11 : 21; -} TPMA_PERMANENT; /* Bits */ -// This is the initializer for a TPMA_PERMANENT structure -# define TPMA_PERMANENT_INITIALIZER(ownerauthset, \ - endorsementauthset, \ - lockoutauthset, \ - bits_at_3, \ - disableclear, \ - inlockout, \ - tpmgeneratedeps, \ - bits_at_11) \ - { \ - ownerauthset, endorsementauthset, lockoutauthset, bits_at_3, disableclear, \ - inlockout, tpmgeneratedeps, bits_at_11 \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:34 TPMA_PERMANENT using bit masking -typedef UINT32 TPMA_PERMANENT; -# define TYPE_OF_TPMA_PERMANENT UINT32 -# define TPMA_PERMANENT_ownerAuthSet ((TPMA_PERMANENT)1 << 0) -# define TPMA_PERMANENT_endorsementAuthSet ((TPMA_PERMANENT)1 << 1) -# define TPMA_PERMANENT_lockoutAuthSet ((TPMA_PERMANENT)1 << 2) -# define TPMA_PERMANENT_disableClear ((TPMA_PERMANENT)1 << 8) -# define TPMA_PERMANENT_inLockout ((TPMA_PERMANENT)1 << 9) -# define TPMA_PERMANENT_tpmGeneratedEPS ((TPMA_PERMANENT)1 << 10) -// This is the initializer for a TPMA_PERMANENT bit array. -# define TPMA_PERMANENT_INITIALIZER(ownerauthset, \ - endorsementauthset, \ - lockoutauthset, \ - bits_at_3, \ - disableclear, \ - inlockout, \ - tpmgeneratedeps, \ - bits_at_11) \ - (TPMA_PERMANENT)((ownerauthset << 0) + (endorsementauthset << 1) \ - + (lockoutauthset << 2) + (disableclear << 8) \ - + (inlockout << 9) + (tpmgeneratedeps << 10)) -#endif // USE_BIT_FIELD_STRUCTURES - -#define TYPE_OF_TPMA_STARTUP_CLEAR UINT32 -#define TPMA_STARTUP_CLEAR_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPMA_STARTUP_CLEAR(a) (*((TPMA_STARTUP_CLEAR*)&(a))) -#define TPMA_STARTUP_CLEAR_TO_BYTE_ARRAY(i, a) \ - UINT32_TO_BYTE_ARRAY((TPMA_STARTUP_CLEAR_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_STARTUP_CLEAR(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPMA_STARTUP_CLEAR(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_STARTUP_CLEAR -{ // Table 2:35 - unsigned phEnable : 1; - unsigned shEnable : 1; - unsigned ehEnable : 1; - unsigned phEnableNV : 1; - unsigned Reserved_bits_at_4 : 27; - unsigned orderly : 1; -} TPMA_STARTUP_CLEAR; /* Bits */ -// This is the initializer for a TPMA_STARTUP_CLEAR structure -# define TPMA_STARTUP_CLEAR_INITIALIZER( \ - phenable, shenable, ehenable, phenablenv, bits_at_4, orderly) \ - { \ - phenable, shenable, ehenable, phenablenv, bits_at_4, orderly \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:35 TPMA_STARTUP_CLEAR using bit masking -typedef UINT32 TPMA_STARTUP_CLEAR; -# define TYPE_OF_TPMA_STARTUP_CLEAR UINT32 -# define TPMA_STARTUP_CLEAR_phEnable ((TPMA_STARTUP_CLEAR)1 << 0) -# define TPMA_STARTUP_CLEAR_shEnable ((TPMA_STARTUP_CLEAR)1 << 1) -# define TPMA_STARTUP_CLEAR_ehEnable ((TPMA_STARTUP_CLEAR)1 << 2) -# define TPMA_STARTUP_CLEAR_phEnableNV ((TPMA_STARTUP_CLEAR)1 << 3) -# define TPMA_STARTUP_CLEAR_orderly ((TPMA_STARTUP_CLEAR)1 << 31) -// This is the initializer for a TPMA_STARTUP_CLEAR bit array. -# define TPMA_STARTUP_CLEAR_INITIALIZER( \ - phenable, shenable, ehenable, phenablenv, bits_at_4, orderly) \ - (TPMA_STARTUP_CLEAR)((phenable << 0) + (shenable << 1) + (ehenable << 2) \ - + (phenablenv << 3) + (orderly << 31)) -#endif // USE_BIT_FIELD_STRUCTURES - -#define TYPE_OF_TPMA_MEMORY UINT32 -#define TPMA_MEMORY_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPMA_MEMORY(a) (*((TPMA_MEMORY*)&(a))) -#define TPMA_MEMORY_TO_BYTE_ARRAY(i, a) \ - UINT32_TO_BYTE_ARRAY((TPMA_MEMORY_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_MEMORY(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPMA_MEMORY(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_MEMORY -{ // Table 2:36 - unsigned sharedRAM : 1; - unsigned sharedNV : 1; - unsigned objectCopiedToRam : 1; - unsigned Reserved_bits_at_3 : 29; -} TPMA_MEMORY; /* Bits */ -// This is the initializer for a TPMA_MEMORY structure -# define TPMA_MEMORY_INITIALIZER(sharedram, sharednv, objectcopiedtoram, bits_at_3) \ - { \ - sharedram, sharednv, objectcopiedtoram, bits_at_3 \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:36 TPMA_MEMORY using bit masking -typedef UINT32 TPMA_MEMORY; -# define TYPE_OF_TPMA_MEMORY UINT32 -# define TPMA_MEMORY_sharedRAM ((TPMA_MEMORY)1 << 0) -# define TPMA_MEMORY_sharedNV ((TPMA_MEMORY)1 << 1) -# define TPMA_MEMORY_objectCopiedToRam ((TPMA_MEMORY)1 << 2) -// This is the initializer for a TPMA_MEMORY bit array. -# define TPMA_MEMORY_INITIALIZER(sharedram, sharednv, objectcopiedtoram, bits_at_3) \ - (TPMA_MEMORY)((sharedram << 0) + (sharednv << 1) + (objectcopiedtoram << 2)) -#endif // USE_BIT_FIELD_STRUCTURES - -#define TYPE_OF_TPMA_CC UINT32 -#define TPMA_CC_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPMA_CC(a) (*((TPMA_CC*)&(a))) -#define TPMA_CC_TO_BYTE_ARRAY(i, a) UINT32_TO_BYTE_ARRAY((TPMA_CC_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_CC(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPMA_CC(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_CC -{ // Table 2:37 - unsigned commandIndex : 16; - unsigned Reserved_bits_at_16 : 6; - unsigned nv : 1; - unsigned extensive : 1; - unsigned flushed : 1; - unsigned cHandles : 3; - unsigned rHandle : 1; - unsigned V : 1; - unsigned Reserved_bits_at_30 : 2; -} TPMA_CC; /* Bits */ -// This is the initializer for a TPMA_CC structure -# define TPMA_CC_INITIALIZER(commandindex, \ - bits_at_16, \ - nv, \ - extensive, \ - flushed, \ - chandles, \ - rhandle, \ - v, \ - bits_at_30) \ - { \ - commandindex, bits_at_16, nv, extensive, flushed, chandles, rhandle, v, \ - bits_at_30 \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:37 TPMA_CC using bit masking -typedef UINT32 TPMA_CC; -# define TYPE_OF_TPMA_CC UINT32 -# define TPMA_CC_commandIndex_SHIFT 0 -# define TPMA_CC_commandIndex ((TPMA_CC)0xffff << 0) -# define TPMA_CC_nv ((TPMA_CC)1 << 22) -# define TPMA_CC_extensive ((TPMA_CC)1 << 23) -# define TPMA_CC_flushed ((TPMA_CC)1 << 24) -# define TPMA_CC_cHandles_SHIFT 25 -# define TPMA_CC_cHandles ((TPMA_CC)0x7 << 25) -# define TPMA_CC_rHandle ((TPMA_CC)1 << 28) -# define TPMA_CC_V ((TPMA_CC)1 << 29) -// This is the initializer for a TPMA_CC bit array. -# define TPMA_CC_INITIALIZER(commandindex, \ - bits_at_16, \ - nv, \ - extensive, \ - flushed, \ - chandles, \ - rhandle, \ - v, \ - bits_at_30) \ - (TPMA_CC)((commandindex << 0) + (nv << 22) + (extensive << 23) + (flushed << 24) \ - + (chandles << 25) + (rhandle << 28) + (v << 29)) -#endif // USE_BIT_FIELD_STRUCTURES - -#define TYPE_OF_TPMA_MODES UINT32 -#define TPMA_MODES_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPMA_MODES(a) (*((TPMA_MODES*)&(a))) -#define TPMA_MODES_TO_BYTE_ARRAY(i, a) \ - UINT32_TO_BYTE_ARRAY((TPMA_MODES_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_MODES(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPMA_MODES(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_MODES -{ // Table 2:38 - unsigned FIPS_140_2 : 1; - unsigned Reserved_bits_at_1 : 31; -} TPMA_MODES; /* Bits */ -// This is the initializer for a TPMA_MODES structure -# define TPMA_MODES_INITIALIZER(fips_140_2, bits_at_1) \ - { \ - fips_140_2, bits_at_1 \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:38 TPMA_MODES using bit masking -typedef UINT32 TPMA_MODES; -# define TYPE_OF_TPMA_MODES UINT32 -# define TPMA_MODES_FIPS_140_2 ((TPMA_MODES)1 << 0) -// This is the initializer for a TPMA_MODES bit array. -# define TPMA_MODES_INITIALIZER(fips_140_2, bits_at_1) \ - (TPMA_MODES)((fips_140_2 << 0)) -#endif // USE_BIT_FIELD_STRUCTURES - -#define TYPE_OF_TPMA_X509_KEY_USAGE UINT32 -#define TPMA_X509_KEY_USAGE_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPMA_X509_KEY_USAGE(a) (*((TPMA_X509_KEY_USAGE*)&(a))) -#define TPMA_X509_KEY_USAGE_TO_BYTE_ARRAY(i, a) \ - UINT32_TO_BYTE_ARRAY((TPMA_X509_KEY_USAGE_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_X509_KEY_USAGE(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPMA_X509_KEY_USAGE(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_X509_KEY_USAGE -{ // Table 2:39 - unsigned Reserved_bits_at_0 : 23; - unsigned decipherOnly : 1; - unsigned encipherOnly : 1; - unsigned cRLSign : 1; - unsigned keyCertSign : 1; - unsigned keyAgreement : 1; - unsigned dataEncipherment : 1; - unsigned keyEncipherment : 1; - unsigned nonrepudiation : 1; - unsigned digitalSignature : 1; -} TPMA_X509_KEY_USAGE; /* Bits */ -// This is the initializer for a TPMA_X509_KEY_USAGE structure -# define TPMA_X509_KEY_USAGE_INITIALIZER(bits_at_0, \ - decipheronly, \ - encipheronly, \ - crlsign, \ - keycertsign, \ - keyagreement, \ - dataencipherment, \ - keyencipherment, \ - nonrepudiation, \ - digitalsignature) \ - { \ - bits_at_0, decipheronly, encipheronly, crlsign, keycertsign, keyagreement, \ - dataencipherment, keyencipherment, nonrepudiation, digitalsignature \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:39 TPMA_X509_KEY_USAGE using bit masking -typedef UINT32 TPMA_X509_KEY_USAGE; -# define TYPE_OF_TPMA_X509_KEY_USAGE UINT32 -# define TPMA_X509_KEY_USAGE_decipherOnly ((TPMA_X509_KEY_USAGE)1 << 23) -# define TPMA_X509_KEY_USAGE_encipherOnly ((TPMA_X509_KEY_USAGE)1 << 24) -# define TPMA_X509_KEY_USAGE_cRLSign ((TPMA_X509_KEY_USAGE)1 << 25) -# define TPMA_X509_KEY_USAGE_keyCertSign ((TPMA_X509_KEY_USAGE)1 << 26) -# define TPMA_X509_KEY_USAGE_keyAgreement ((TPMA_X509_KEY_USAGE)1 << 27) -# define TPMA_X509_KEY_USAGE_dataEncipherment ((TPMA_X509_KEY_USAGE)1 << 28) -# define TPMA_X509_KEY_USAGE_keyEncipherment ((TPMA_X509_KEY_USAGE)1 << 29) -# define TPMA_X509_KEY_USAGE_nonrepudiation ((TPMA_X509_KEY_USAGE)1 << 30) -# define TPMA_X509_KEY_USAGE_digitalSignature ((TPMA_X509_KEY_USAGE)1 << 31) -// This is the initializer for a TPMA_X509_KEY_USAGE bit array. -# define TPMA_X509_KEY_USAGE_INITIALIZER(bits_at_0, \ - decipheronly, \ - encipheronly, \ - crlsign, \ - keycertsign, \ - keyagreement, \ - dataencipherment, \ - keyencipherment, \ - nonrepudiation, \ - digitalsignature) \ - (TPMA_X509_KEY_USAGE)((decipheronly << 23) + (encipheronly << 24) \ - + (crlsign << 25) + (keycertsign << 26) \ - + (keyagreement << 27) + (dataencipherment << 28) \ - + (keyencipherment << 29) + (nonrepudiation << 30) \ - + (digitalsignature << 31)) -#endif // USE_BIT_FIELD_STRUCTURES - -#define TYPE_OF_TPMA_ACT UINT32 -#define TPMA_ACT_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPMA_ACT(a) (*((TPMA_ACT*)&(a))) -#define TPMA_ACT_TO_BYTE_ARRAY(i, a) \ - UINT32_TO_BYTE_ARRAY((TPMA_ACT_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_ACT(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPMA_ACT(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_ACT -{ // Table 2:40 - unsigned signaled : 1; - unsigned preserveSignaled : 1; - unsigned Reserved_bits_at_2 : 30; -} TPMA_ACT; /* Bits */ -// This is the initializer for a TPMA_ACT structure -# define TPMA_ACT_INITIALIZER(signaled, preservesignaled, bits_at_2) \ - { \ - signaled, preservesignaled, bits_at_2 \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:40 TPMA_ACT using bit masking -typedef UINT32 TPMA_ACT; -# define TYPE_OF_TPMA_ACT UINT32 -# define TPMA_ACT_signaled ((TPMA_ACT)1 << 0) -# define TPMA_ACT_preserveSignaled ((TPMA_ACT)1 << 1) -// This is the initializer for a TPMA_ACT bit array. -# define TPMA_ACT_INITIALIZER(signaled, preservesignaled, bits_at_2) \ - (TPMA_ACT)((signaled << 0) + (preservesignaled << 1)) -#endif // USE_BIT_FIELD_STRUCTURES - -typedef BYTE TPMI_YES_NO; // Table 2:41 /* Interface */ - -typedef TPM_HANDLE TPMI_DH_OBJECT; // Table 2:42 /* Interface */ - -typedef TPM_HANDLE TPMI_DH_PARENT; // Table 2:43 /* Interface */ - -typedef TPM_HANDLE TPMI_DH_PERSISTENT; // Table 2:44 /* Interface */ - -typedef TPM_HANDLE TPMI_DH_ENTITY; // Table 2:45 /* Interface */ - -typedef TPM_HANDLE TPMI_DH_PCR; // Table 2:46 /* Interface */ - -typedef TPM_HANDLE TPMI_SH_AUTH_SESSION; // Table 2:47 /* Interface */ - -typedef TPM_HANDLE TPMI_SH_HMAC; // Table 2:48 /* Interface */ - -typedef TPM_HANDLE TPMI_SH_POLICY; // Table 2:49 /* Interface */ - -typedef TPM_HANDLE TPMI_DH_CONTEXT; // Table 2:50 /* Interface */ - -typedef TPM_HANDLE TPMI_DH_SAVED; // Table 2:51 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_HIERARCHY; // Table 2:52 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_ENABLES; // Table 2:53 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_HIERARCHY_AUTH; // Table 2:54 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_HIERARCHY_POLICY; - -typedef TPM_HANDLE TPMI_RH_PLATFORM; // Table 2:56 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_OWNER; // Table 2:57 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_ENDORSEMENT; // Table 2:58 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_PROVISION; // Table 2:59 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_CLEAR; // Table 2:60 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_NV_AUTH; // Table 2:61 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_LOCKOUT; // Table 2:62 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_NV_INDEX; // Table 2:63 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_AC; // Table 2:64 /* Interface */ - -typedef TPM_HANDLE TPMI_RH_ACT; // Table 2:65 /* Interface */ - -typedef TPM_ALG_ID TPMI_ALG_HASH; // Table 2:66 /* Interface */ - -typedef TPM_ALG_ID TPMI_ALG_ASYM; // Table 2:67 /* Interface */ - -typedef TPM_ALG_ID TPMI_ALG_SYM; // Table 2:68 /* Interface */ - -typedef TPM_ALG_ID TPMI_ALG_SYM_OBJECT; // Table 2:69 /* Interface */ - -typedef TPM_ALG_ID TPMI_ALG_SYM_MODE; // Table 2:70 /* Interface */ - -typedef TPM_ALG_ID TPMI_ALG_KDF; // Table 2:71 /* Interface */ - -typedef TPM_ALG_ID TPMI_ALG_SIG_SCHEME; // Table 2:72 /* Interface */ - -typedef TPM_ALG_ID TPMI_ECC_KEY_EXCHANGE; // Table 2:73 /* Interface */ - -typedef TPM_ST TPMI_ST_COMMAND_TAG; // Table 2:74 /* Interface */ - -typedef TPM_ALG_ID TPMI_ALG_MAC_SCHEME; // Table 2:75 /* Interface */ - -typedef TPM_ALG_ID TPMI_ALG_CIPHER_MODE; // Table 2:76 /* Interface */ - -typedef BYTE TPMS_EMPTY; // Table 2:77 - -typedef struct -{ // Table 2:78 - TPM_ALG_ID alg; - TPMA_ALGORITHM attributes; -} TPMS_ALGORITHM_DESCRIPTION; /* Structure */ - -typedef union -{ // Table 2:79 -#if ALG_SHA1 - BYTE sha1[SHA1_DIGEST_SIZE]; -#endif // ALG_SHA1 -#if ALG_SHA256 - BYTE sha256[SHA256_DIGEST_SIZE]; -#endif // ALG_SHA256 -#if ALG_SHA384 - BYTE sha384[SHA384_DIGEST_SIZE]; -#endif // ALG_SHA384 -#if ALG_SHA512 - BYTE sha512[SHA512_DIGEST_SIZE]; -#endif // ALG_SHA512 -#if ALG_SM3_256 - BYTE sm3_256[SM3_256_DIGEST_SIZE]; -#endif // ALG_SM3_256 -#if ALG_SHA3_256 - BYTE sha3_256[SHA3_256_DIGEST_SIZE]; -#endif // ALG_SHA3_256 -#if ALG_SHA3_384 - BYTE sha3_384[SHA3_384_DIGEST_SIZE]; -#endif // ALG_SHA3_384 -#if ALG_SHA3_512 - BYTE sha3_512[SHA3_512_DIGEST_SIZE]; -#endif // ALG_SHA3_512 -} TPMU_HA; /* Structure */ - -typedef struct -{ // Table 2:80 - TPMI_ALG_HASH hashAlg; - TPMU_HA digest; -} TPMT_HA; /* Structure */ - -typedef union -{ // Table 2:81 - struct - { - UINT16 size; - BYTE buffer[sizeof(TPMU_HA)]; - } t; - TPM2B b; -} TPM2B_DIGEST; /* Structure */ - -typedef union -{ // Table 2:82 - struct - { - UINT16 size; - BYTE buffer[sizeof(TPMT_HA)]; - } t; - TPM2B b; -} TPM2B_DATA; /* Structure */ - -// Table 2:83 - Definition of Types for TPM2B_NONCE -typedef TPM2B_DIGEST TPM2B_NONCE; - -// Table 2:84 - Definition of Types for TPM2B_AUTH -typedef TPM2B_DIGEST TPM2B_AUTH; - -// Table 2:85 - Definition of Types for TPM2B_OPERAND -typedef TPM2B_DIGEST TPM2B_OPERAND; - -typedef union -{ // Table 2:86 - struct - { - UINT16 size; - BYTE buffer[1024]; - } t; - TPM2B b; -} TPM2B_EVENT; /* Structure */ - -typedef union -{ // Table 2:87 - struct - { - UINT16 size; - BYTE buffer[MAX_DIGEST_BUFFER]; - } t; - TPM2B b; -} TPM2B_MAX_BUFFER; /* Structure */ - -typedef union -{ // Table 2:88 - struct - { - UINT16 size; - BYTE buffer[MAX_NV_BUFFER_SIZE]; - } t; - TPM2B b; -} TPM2B_MAX_NV_BUFFER; /* Structure */ - -typedef union -{ // Table 2:89 - struct - { - UINT16 size; - BYTE buffer[sizeof(UINT64)]; - } t; - TPM2B b; -} TPM2B_TIMEOUT; /* Structure */ - -typedef union -{ // Table 2:90 - struct - { - UINT16 size; - BYTE buffer[MAX_SYM_BLOCK_SIZE]; - } t; - TPM2B b; -} TPM2B_IV; /* Structure */ - -typedef union -{ // Table 2:91 - TPMT_HA digest; - TPM_HANDLE handle; -} TPMU_NAME; /* Structure */ - -typedef union -{ // Table 2:92 - struct - { - UINT16 size; - BYTE name[sizeof(TPMU_NAME)]; - } t; - TPM2B b; -} TPM2B_NAME; /* Structure */ - -typedef struct -{ // Table 2:93 - UINT8 sizeofSelect; - BYTE pcrSelect[PCR_SELECT_MAX]; -} TPMS_PCR_SELECT; /* Structure */ - -typedef struct -{ // Table 2:94 - TPMI_ALG_HASH hash; - UINT8 sizeofSelect; - BYTE pcrSelect[PCR_SELECT_MAX]; -} TPMS_PCR_SELECTION; /* Structure */ - -typedef struct -{ // Table 2:97 - TPM_ST tag; - TPMI_RH_HIERARCHY hierarchy; - TPM2B_DIGEST digest; -} TPMT_TK_CREATION; /* Structure */ - -typedef struct -{ // Table 2:98 - TPM_ST tag; - TPMI_RH_HIERARCHY hierarchy; - TPM2B_DIGEST digest; -} TPMT_TK_VERIFIED; /* Structure */ - -typedef struct -{ // Table 2:99 - TPM_ST tag; - TPMI_RH_HIERARCHY hierarchy; - TPM2B_DIGEST digest; -} TPMT_TK_AUTH; /* Structure */ - -typedef struct -{ // Table 2:100 - TPM_ST tag; - TPMI_RH_HIERARCHY hierarchy; - TPM2B_DIGEST digest; -} TPMT_TK_HASHCHECK; /* Structure */ - -typedef struct -{ // Table 2:101 - TPM_ALG_ID alg; - TPMA_ALGORITHM algProperties; -} TPMS_ALG_PROPERTY; /* Structure */ - -typedef struct -{ // Table 2:102 - TPM_PT property; - UINT32 value; -} TPMS_TAGGED_PROPERTY; /* Structure */ - -typedef struct -{ // Table 2:103 - TPM_PT_PCR tag; - UINT8 sizeofSelect; - BYTE pcrSelect[PCR_SELECT_MAX]; -} TPMS_TAGGED_PCR_SELECT; /* Structure */ - -typedef struct -{ // Table 2:104 - TPM_HANDLE handle; - TPMT_HA policyHash; -} TPMS_TAGGED_POLICY; /* Structure */ - -typedef struct -{ // Table 2:105 - TPM_HANDLE handle; - UINT32 timeout; - TPMA_ACT attributes; -} TPMS_ACT_DATA; /* Structure */ - -typedef struct -{ // Table 2:106 - UINT32 count; - TPM_CC commandCodes[MAX_CAP_CC]; -} TPML_CC; /* Structure */ - -typedef struct -{ // Table 2:107 - UINT32 count; - TPMA_CC commandAttributes[MAX_CAP_CC]; -} TPML_CCA; /* Structure */ - -typedef struct -{ // Table 2:108 - UINT32 count; - TPM_ALG_ID algorithms[MAX_ALG_LIST_SIZE]; -} TPML_ALG; /* Structure */ - -typedef struct -{ // Table 2:109 - UINT32 count; - TPM_HANDLE handle[MAX_CAP_HANDLES]; -} TPML_HANDLE; /* Structure */ - -typedef struct -{ // Table 2:110 - UINT32 count; - TPM2B_DIGEST digests[8]; -} TPML_DIGEST; /* Structure */ - -typedef struct -{ // Table 2:111 - UINT32 count; - TPMT_HA digests[HASH_COUNT]; -} TPML_DIGEST_VALUES; /* Structure */ - -typedef struct -{ // Table 2:112 - UINT32 count; - TPMS_PCR_SELECTION pcrSelections[HASH_COUNT]; -} TPML_PCR_SELECTION; /* Structure */ - -typedef struct -{ // Table 2:113 - UINT32 count; - TPMS_ALG_PROPERTY algProperties[MAX_CAP_ALGS]; -} TPML_ALG_PROPERTY; /* Structure */ - -typedef struct -{ // Table 2:114 - UINT32 count; - TPMS_TAGGED_PROPERTY tpmProperty[MAX_TPM_PROPERTIES]; -} TPML_TAGGED_TPM_PROPERTY; /* Structure */ - -typedef struct -{ // Table 2:115 - UINT32 count; - TPMS_TAGGED_PCR_SELECT pcrProperty[MAX_PCR_PROPERTIES]; -} TPML_TAGGED_PCR_PROPERTY; /* Structure */ - -typedef struct -{ // Table 2:116 - UINT32 count; - TPM_ECC_CURVE eccCurves[MAX_ECC_CURVES]; -} TPML_ECC_CURVE; /* Structure */ - -typedef struct -{ // Table 2:117 - UINT32 count; - TPMS_TAGGED_POLICY policies[MAX_TAGGED_POLICIES]; -} TPML_TAGGED_POLICY; /* Structure */ - -typedef struct -{ // Table 2:118 - UINT32 count; - TPMS_ACT_DATA actData[MAX_ACT_DATA]; -} TPML_ACT_DATA; /* Structure */ - -typedef union -{ // Table 2:119 - TPML_ALG_PROPERTY algorithms; - TPML_HANDLE handles; - TPML_CCA command; - TPML_CC ppCommands; - TPML_CC auditCommands; - TPML_PCR_SELECTION assignedPCR; - TPML_TAGGED_TPM_PROPERTY tpmProperties; - TPML_TAGGED_PCR_PROPERTY pcrProperties; -#if ALG_ECC - TPML_ECC_CURVE eccCurves; -#endif // ALG_ECC - TPML_TAGGED_POLICY authPolicies; - TPML_ACT_DATA actData; -} TPMU_CAPABILITIES; /* Structure */ - -typedef struct -{ // Table 2:120 - TPM_CAP capability; - TPMU_CAPABILITIES data; -} TPMS_CAPABILITY_DATA; /* Structure */ - -typedef struct -{ // Table 2:121 - UINT64 clock; - UINT32 resetCount; - UINT32 restartCount; - TPMI_YES_NO safe; -} TPMS_CLOCK_INFO; /* Structure */ - -typedef struct -{ // Table 2:122 - UINT64 time; - TPMS_CLOCK_INFO clockInfo; -} TPMS_TIME_INFO; /* Structure */ - -typedef struct -{ // Table 2:123 - TPMS_TIME_INFO time; - UINT64 firmwareVersion; -} TPMS_TIME_ATTEST_INFO; /* Structure */ - -typedef struct -{ // Table 2:124 - TPM2B_NAME name; - TPM2B_NAME qualifiedName; -} TPMS_CERTIFY_INFO; /* Structure */ - -typedef struct -{ // Table 2:125 - TPML_PCR_SELECTION pcrSelect; - TPM2B_DIGEST pcrDigest; -} TPMS_QUOTE_INFO; /* Structure */ - -typedef struct -{ // Table 2:126 - UINT64 auditCounter; - TPM_ALG_ID digestAlg; - TPM2B_DIGEST auditDigest; - TPM2B_DIGEST commandDigest; -} TPMS_COMMAND_AUDIT_INFO; /* Structure */ - -typedef struct -{ // Table 2:127 - TPMI_YES_NO exclusiveSession; - TPM2B_DIGEST sessionDigest; -} TPMS_SESSION_AUDIT_INFO; /* Structure */ - -typedef struct -{ // Table 2:128 - TPM2B_NAME objectName; - TPM2B_DIGEST creationHash; -} TPMS_CREATION_INFO; /* Structure */ - -typedef struct -{ // Table 2:129 - TPM2B_NAME indexName; - UINT16 offset; - TPM2B_MAX_NV_BUFFER nvContents; -} TPMS_NV_CERTIFY_INFO; /* Structure */ - -typedef struct -{ // Table 2:130 - TPM2B_NAME indexName; - TPM2B_DIGEST nvDigest; -} TPMS_NV_DIGEST_CERTIFY_INFO; /* Structure */ - -typedef TPM_ST TPMI_ST_ATTEST; // Table 2:131 /* Interface */ - -typedef union -{ // Table 2:132 - TPMS_CERTIFY_INFO certify; - TPMS_CREATION_INFO creation; - TPMS_QUOTE_INFO quote; - TPMS_COMMAND_AUDIT_INFO commandAudit; - TPMS_SESSION_AUDIT_INFO sessionAudit; - TPMS_TIME_ATTEST_INFO time; - TPMS_NV_CERTIFY_INFO nv; - TPMS_NV_DIGEST_CERTIFY_INFO nvDigest; -} TPMU_ATTEST; /* Structure */ - -typedef struct -{ // Table 2:133 - TPM_CONSTANTS32 magic; - TPMI_ST_ATTEST type; - TPM2B_NAME qualifiedSigner; - TPM2B_DATA extraData; - TPMS_CLOCK_INFO clockInfo; - UINT64 firmwareVersion; - TPMU_ATTEST attested; -} TPMS_ATTEST; /* Structure */ - -typedef union -{ // Table 2:134 - struct - { - UINT16 size; - BYTE attestationData[sizeof(TPMS_ATTEST)]; - } t; - TPM2B b; -} TPM2B_ATTEST; /* Structure */ - -typedef struct -{ // Table 2:135 - TPMI_SH_AUTH_SESSION sessionHandle; - TPM2B_NONCE nonce; - TPMA_SESSION sessionAttributes; - TPM2B_AUTH hmac; -} TPMS_AUTH_COMMAND; /* Structure */ - -typedef struct -{ // Table 2:136 - TPM2B_NONCE nonce; - TPMA_SESSION sessionAttributes; - TPM2B_AUTH hmac; -} TPMS_AUTH_RESPONSE; /* Structure */ - -typedef TPM_KEY_BITS TPMI_TDES_KEY_BITS; // Table 2:137 /* Interface */ - -typedef TPM_KEY_BITS TPMI_AES_KEY_BITS; // Table 2:137 /* Interface */ - -typedef TPM_KEY_BITS TPMI_SM4_KEY_BITS; // Table 2:137 /* Interface */ - -typedef TPM_KEY_BITS TPMI_CAMELLIA_KEY_BITS; // Table 2:137 /* Interface */ - -typedef union -{ // Table 2:138 -#if ALG_TDES - TPMI_TDES_KEY_BITS tdes; -#endif // ALG_TDES -#if ALG_AES - TPMI_AES_KEY_BITS aes; -#endif // ALG_AES -#if ALG_SM4 - TPMI_SM4_KEY_BITS sm4; -#endif // ALG_SM4 -#if ALG_CAMELLIA - TPMI_CAMELLIA_KEY_BITS camellia; -#endif // ALG_CAMELLIA - TPM_KEY_BITS sym; -#if ALG_XOR - TPMI_ALG_HASH xor ; -#endif // ALG_XOR -} TPMU_SYM_KEY_BITS; /* Structure */ - -typedef union -{ // Table 2:139 -#if ALG_TDES - TPMI_ALG_SYM_MODE tdes; -#endif // ALG_TDES -#if ALG_AES - TPMI_ALG_SYM_MODE aes; -#endif // ALG_AES -#if ALG_SM4 - TPMI_ALG_SYM_MODE sm4; -#endif // ALG_SM4 -#if ALG_CAMELLIA - TPMI_ALG_SYM_MODE camellia; -#endif // ALG_CAMELLIA - TPMI_ALG_SYM_MODE sym; -} TPMU_SYM_MODE; /* Structure */ - -typedef struct -{ // Table 2:141 - TPMI_ALG_SYM algorithm; - TPMU_SYM_KEY_BITS keyBits; - TPMU_SYM_MODE mode; -} TPMT_SYM_DEF; /* Structure */ - -typedef struct -{ // Table 2:142 - TPMI_ALG_SYM_OBJECT algorithm; - TPMU_SYM_KEY_BITS keyBits; - TPMU_SYM_MODE mode; -} TPMT_SYM_DEF_OBJECT; /* Structure */ - -typedef union -{ // Table 2:143 - struct - { - UINT16 size; - BYTE buffer[MAX_SYM_KEY_BYTES]; - } t; - TPM2B b; -} TPM2B_SYM_KEY; /* Structure */ - -typedef struct -{ // Table 2:144 - TPMT_SYM_DEF_OBJECT sym; -} TPMS_SYMCIPHER_PARMS; /* Structure */ - -typedef union -{ // Table 2:145 - struct - { - UINT16 size; - BYTE buffer[LABEL_MAX_BUFFER]; - } t; - TPM2B b; -} TPM2B_LABEL; /* Structure */ - -typedef struct -{ // Table 2:146 - TPM2B_LABEL label; - TPM2B_LABEL context; -} TPMS_DERIVE; /* Structure */ - -typedef union -{ // Table 2:147 - struct - { - UINT16 size; - BYTE buffer[sizeof(TPMS_DERIVE)]; - } t; - TPM2B b; -} TPM2B_DERIVE; /* Structure */ - -typedef union -{ // Table 2:148 - BYTE create[MAX_SYM_DATA]; - TPMS_DERIVE derive; -} TPMU_SENSITIVE_CREATE; /* Structure */ - -typedef union -{ // Table 2:149 - struct - { - UINT16 size; - BYTE buffer[sizeof(TPMU_SENSITIVE_CREATE)]; - } t; - TPM2B b; -} TPM2B_SENSITIVE_DATA; /* Structure */ - -typedef struct -{ // Table 2:150 - TPM2B_AUTH userAuth; - TPM2B_SENSITIVE_DATA data; -} TPMS_SENSITIVE_CREATE; /* Structure */ - -typedef struct -{ // Table 2:151 - UINT16 size; - TPMS_SENSITIVE_CREATE sensitive; -} TPM2B_SENSITIVE_CREATE; /* Structure */ - -typedef struct -{ // Table 2:152 - TPMI_ALG_HASH hashAlg; -} TPMS_SCHEME_HASH; /* Structure */ - -typedef struct -{ // Table 2:153 - TPMI_ALG_HASH hashAlg; - UINT16 count; -} TPMS_SCHEME_ECDAA; /* Structure */ - -typedef TPM_ALG_ID TPMI_ALG_KEYEDHASH_SCHEME; - -// Table 2:155 - Definition of Types for HMAC_SIG_SCHEME -typedef TPMS_SCHEME_HASH TPMS_SCHEME_HMAC; - -typedef struct -{ // Table 2:156 - TPMI_ALG_HASH hashAlg; - TPMI_ALG_KDF kdf; -} TPMS_SCHEME_XOR; /* Structure */ - -typedef union -{ // Table 2:157 -#if ALG_HMAC - TPMS_SCHEME_HMAC hmac; -#endif // ALG_HMAC -#if ALG_XOR - TPMS_SCHEME_XOR xor ; -#endif // ALG_XOR -} TPMU_SCHEME_KEYEDHASH; /* Structure */ - -typedef struct -{ // Table 2:158 - TPMI_ALG_KEYEDHASH_SCHEME scheme; - TPMU_SCHEME_KEYEDHASH details; -} TPMT_KEYEDHASH_SCHEME; /* Structure */ - -// Table 2:159 - Definition of Types for RSA Signature Schemes -typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_RSASSA; -typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_RSAPSS; - -// Table 2:160 - Definition of Types for ECC Signature Schemes -typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_ECDSA; -typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_SM2; -typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_ECSCHNORR; -typedef TPMS_SCHEME_ECDAA TPMS_SIG_SCHEME_ECDAA; - -typedef union -{ // Table 2:161 -#if ALG_ECC - TPMS_SIG_SCHEME_ECDAA ecdaa; -#endif // ALG_ECC -#if ALG_RSASSA - TPMS_SIG_SCHEME_RSASSA rsassa; -#endif // ALG_RSASSA -#if ALG_RSAPSS - TPMS_SIG_SCHEME_RSAPSS rsapss; -#endif // ALG_RSAPSS -#if ALG_ECDSA - TPMS_SIG_SCHEME_ECDSA ecdsa; -#endif // ALG_ECDSA -#if ALG_SM2 - TPMS_SIG_SCHEME_SM2 sm2; -#endif // ALG_SM2 -#if ALG_ECSCHNORR - TPMS_SIG_SCHEME_ECSCHNORR ecschnorr; -#endif // ALG_ECSCHNORR -#if ALG_HMAC - TPMS_SCHEME_HMAC hmac; -#endif // ALG_HMAC - TPMS_SCHEME_HASH any; -} TPMU_SIG_SCHEME; /* Structure */ - -typedef struct -{ // Table 2:162 - TPMI_ALG_SIG_SCHEME scheme; - TPMU_SIG_SCHEME details; -} TPMT_SIG_SCHEME; /* Structure */ - -// Table 2:163 - Definition of Types for Encryption Schemes -typedef TPMS_SCHEME_HASH TPMS_ENC_SCHEME_OAEP; -typedef TPMS_EMPTY TPMS_ENC_SCHEME_RSAES; - -// Table 2:164 - Definition of Types for ECC Key Exchange -typedef TPMS_SCHEME_HASH TPMS_KEY_SCHEME_ECDH; -typedef TPMS_SCHEME_HASH TPMS_KEY_SCHEME_ECMQV; - -// Table 2:165 - Definition of Types for KDF Schemes -typedef TPMS_SCHEME_HASH TPMS_KDF_SCHEME_MGF1; -typedef TPMS_SCHEME_HASH TPMS_KDF_SCHEME_KDF1_SP800_56A; -typedef TPMS_SCHEME_HASH TPMS_KDF_SCHEME_KDF2; -typedef TPMS_SCHEME_HASH TPMS_KDF_SCHEME_KDF1_SP800_108; - -typedef union -{ // Table 2:166 -#if ALG_MGF1 - TPMS_KDF_SCHEME_MGF1 mgf1; -#endif // ALG_MGF1 -#if ALG_KDF1_SP800_56A - TPMS_KDF_SCHEME_KDF1_SP800_56A kdf1_sp800_56a; -#endif // ALG_KDF1_SP800_56A -#if ALG_KDF2 - TPMS_KDF_SCHEME_KDF2 kdf2; -#endif // ALG_KDF2 -#if ALG_KDF1_SP800_108 - TPMS_KDF_SCHEME_KDF1_SP800_108 kdf1_sp800_108; -#endif // ALG_KDF1_SP800_108 - TPMS_SCHEME_HASH anyKdf; -} TPMU_KDF_SCHEME; /* Structure */ - -typedef struct -{ // Table 2:167 - TPMI_ALG_KDF scheme; - TPMU_KDF_SCHEME details; -} TPMT_KDF_SCHEME; /* Structure */ - -typedef TPM_ALG_ID TPMI_ALG_ASYM_SCHEME; // Table 2:168 /* Interface */ - -typedef union -{ // Table 2:169 -#if ALG_ECDH - TPMS_KEY_SCHEME_ECDH ecdh; -#endif // ALG_ECDH -#if ALG_ECMQV - TPMS_KEY_SCHEME_ECMQV ecmqv; -#endif // ALG_ECMQV -#if ALG_ECC - TPMS_SIG_SCHEME_ECDAA ecdaa; -#endif // ALG_ECC -#if ALG_RSASSA - TPMS_SIG_SCHEME_RSASSA rsassa; -#endif // ALG_RSASSA -#if ALG_RSAPSS - TPMS_SIG_SCHEME_RSAPSS rsapss; -#endif // ALG_RSAPSS -#if ALG_ECDSA - TPMS_SIG_SCHEME_ECDSA ecdsa; -#endif // ALG_ECDSA -#if ALG_SM2 - TPMS_SIG_SCHEME_SM2 sm2; -#endif // ALG_SM2 -#if ALG_ECSCHNORR - TPMS_SIG_SCHEME_ECSCHNORR ecschnorr; -#endif // ALG_ECSCHNORR -#if ALG_RSAES - TPMS_ENC_SCHEME_RSAES rsaes; -#endif // ALG_RSAES -#if ALG_OAEP - TPMS_ENC_SCHEME_OAEP oaep; -#endif // ALG_OAEP - TPMS_SCHEME_HASH anySig; -} TPMU_ASYM_SCHEME; /* Structure */ - -typedef struct -{ // Table 2:170 - TPMI_ALG_ASYM_SCHEME scheme; - TPMU_ASYM_SCHEME details; -} TPMT_ASYM_SCHEME; /* Structure */ - -typedef TPM_ALG_ID TPMI_ALG_RSA_SCHEME; // Table 2:171 /* Interface */ - -typedef struct -{ // Table 2:172 - TPMI_ALG_RSA_SCHEME scheme; - TPMU_ASYM_SCHEME details; -} TPMT_RSA_SCHEME; /* Structure */ - -typedef TPM_ALG_ID TPMI_ALG_RSA_DECRYPT; // Table 2:173 /* Interface */ - -typedef struct -{ // Table 2:174 - TPMI_ALG_RSA_DECRYPT scheme; - TPMU_ASYM_SCHEME details; -} TPMT_RSA_DECRYPT; /* Structure */ - -typedef union -{ // Table 2:175 - struct - { - UINT16 size; - BYTE buffer[MAX_RSA_KEY_BYTES]; - } t; - TPM2B b; -} TPM2B_PUBLIC_KEY_RSA; /* Structure */ - -typedef TPM_KEY_BITS TPMI_RSA_KEY_BITS; // Table 2:176 /* Interface */ - -typedef union -{ // Table 2:177 - struct - { - UINT16 size; - BYTE buffer[RSA_PRIVATE_SIZE]; - } t; - TPM2B b; -} TPM2B_PRIVATE_KEY_RSA; /* Structure */ - -typedef union -{ // Table 2:178 - struct - { - UINT16 size; - BYTE buffer[MAX_ECC_KEY_BYTES]; - } t; - TPM2B b; -} TPM2B_ECC_PARAMETER; /* Structure */ - -typedef struct -{ // Table 2:179 - TPM2B_ECC_PARAMETER x; - TPM2B_ECC_PARAMETER y; -} TPMS_ECC_POINT; /* Structure */ - -typedef struct -{ // Table 2:180 - UINT16 size; - TPMS_ECC_POINT point; -} TPM2B_ECC_POINT; /* Structure */ - -typedef TPM_ALG_ID TPMI_ALG_ECC_SCHEME; // Table 2:181 /* Interface */ - -typedef TPM_ECC_CURVE TPMI_ECC_CURVE; // Table 2:182 /* Interface */ - -typedef struct -{ // Table 2:183 - TPMI_ALG_ECC_SCHEME scheme; - TPMU_ASYM_SCHEME details; -} TPMT_ECC_SCHEME; /* Structure */ - -typedef struct -{ // Table 2:184 - TPM_ECC_CURVE curveID; - UINT16 keySize; - TPMT_KDF_SCHEME kdf; - TPMT_ECC_SCHEME sign; - TPM2B_ECC_PARAMETER p; - TPM2B_ECC_PARAMETER a; - TPM2B_ECC_PARAMETER b; - TPM2B_ECC_PARAMETER gX; - TPM2B_ECC_PARAMETER gY; - TPM2B_ECC_PARAMETER n; - TPM2B_ECC_PARAMETER h; -} TPMS_ALGORITHM_DETAIL_ECC; /* Structure */ - -typedef struct -{ // Table 2:185 - TPMI_ALG_HASH hash; - TPM2B_PUBLIC_KEY_RSA sig; -} TPMS_SIGNATURE_RSA; /* Structure */ - -// Table 2:186 - Definition of Types for Signature -typedef TPMS_SIGNATURE_RSA TPMS_SIGNATURE_RSASSA; -typedef TPMS_SIGNATURE_RSA TPMS_SIGNATURE_RSAPSS; - -typedef struct -{ // Table 2:187 - TPMI_ALG_HASH hash; - TPM2B_ECC_PARAMETER signatureR; - TPM2B_ECC_PARAMETER signatureS; -} TPMS_SIGNATURE_ECC; /* Structure */ - -// Table 2:188 - Definition of Types for TPMS_SIGNATURE_ECC -typedef TPMS_SIGNATURE_ECC TPMS_SIGNATURE_ECDAA; -typedef TPMS_SIGNATURE_ECC TPMS_SIGNATURE_ECDSA; -typedef TPMS_SIGNATURE_ECC TPMS_SIGNATURE_SM2; -typedef TPMS_SIGNATURE_ECC TPMS_SIGNATURE_ECSCHNORR; - -typedef union -{ // Table 2:189 -#if ALG_ECC - TPMS_SIGNATURE_ECDAA ecdaa; -#endif // ALG_ECC -#if ALG_RSA - TPMS_SIGNATURE_RSASSA rsassa; -#endif // ALG_RSA -#if ALG_RSA - TPMS_SIGNATURE_RSAPSS rsapss; -#endif // ALG_RSA -#if ALG_ECC - TPMS_SIGNATURE_ECDSA ecdsa; -#endif // ALG_ECC -#if ALG_ECC - TPMS_SIGNATURE_SM2 sm2; -#endif // ALG_ECC -#if ALG_ECC - TPMS_SIGNATURE_ECSCHNORR ecschnorr; -#endif // ALG_ECC -#if ALG_HMAC - TPMT_HA hmac; -#endif // ALG_HMAC - TPMS_SCHEME_HASH any; -} TPMU_SIGNATURE; /* Structure */ - -typedef struct -{ // Table 2:190 - TPMI_ALG_SIG_SCHEME sigAlg; - TPMU_SIGNATURE signature; -} TPMT_SIGNATURE; /* Structure */ - -typedef union -{ // Table 2:191 -#if ALG_ECC - BYTE ecc[sizeof(TPMS_ECC_POINT)]; -#endif // ALG_ECC -#if ALG_RSA - BYTE rsa[MAX_RSA_KEY_BYTES]; -#endif // ALG_RSA -#if ALG_SYMCIPHER - BYTE symmetric[sizeof(TPM2B_DIGEST)]; -#endif // ALG_SYMCIPHER -#if ALG_KEYEDHASH - BYTE keyedHash[sizeof(TPM2B_DIGEST)]; -#endif // ALG_KEYEDHASH -} TPMU_ENCRYPTED_SECRET; /* Structure */ - -typedef union -{ // Table 2:192 - struct - { - UINT16 size; - BYTE secret[sizeof(TPMU_ENCRYPTED_SECRET)]; - } t; - TPM2B b; -} TPM2B_ENCRYPTED_SECRET; /* Structure */ - -typedef TPM_ALG_ID TPMI_ALG_PUBLIC; // Table 2:193 /* Interface */ - -typedef union -{ // Table 2:194 -#if ALG_KEYEDHASH - TPM2B_DIGEST keyedHash; -#endif // ALG_KEYEDHASH -#if ALG_SYMCIPHER - TPM2B_DIGEST sym; -#endif // ALG_SYMCIPHER -#if ALG_RSA - TPM2B_PUBLIC_KEY_RSA rsa; -#endif // ALG_RSA -#if ALG_ECC - TPMS_ECC_POINT ecc; -#endif // ALG_ECC - TPMS_DERIVE derive; -} TPMU_PUBLIC_ID; /* Structure */ - -typedef struct -{ // Table 2:195 - TPMT_KEYEDHASH_SCHEME scheme; -} TPMS_KEYEDHASH_PARMS; /* Structure */ - -typedef struct -{ // Table 2:196 - TPMT_SYM_DEF_OBJECT symmetric; - TPMT_ASYM_SCHEME scheme; -} TPMS_ASYM_PARMS; /* Structure */ - -typedef struct -{ // Table 2:197 - TPMT_SYM_DEF_OBJECT symmetric; - TPMT_RSA_SCHEME scheme; - TPMI_RSA_KEY_BITS keyBits; - UINT32 exponent; -} TPMS_RSA_PARMS; /* Structure */ - -typedef struct -{ // Table 2:198 - TPMT_SYM_DEF_OBJECT symmetric; - TPMT_ECC_SCHEME scheme; - TPMI_ECC_CURVE curveID; - TPMT_KDF_SCHEME kdf; -} TPMS_ECC_PARMS; /* Structure */ - -typedef union -{ // Table 2:199 -#if ALG_KEYEDHASH - TPMS_KEYEDHASH_PARMS keyedHashDetail; -#endif // ALG_KEYEDHASH -#if ALG_SYMCIPHER - TPMS_SYMCIPHER_PARMS symDetail; -#endif // ALG_SYMCIPHER -#if ALG_RSA - TPMS_RSA_PARMS rsaDetail; -#endif // ALG_RSA -#if ALG_ECC - TPMS_ECC_PARMS eccDetail; -#endif // ALG_ECC - TPMS_ASYM_PARMS asymDetail; -} TPMU_PUBLIC_PARMS; /* Structure */ - -typedef struct -{ // Table 2:200 - TPMI_ALG_PUBLIC type; - TPMU_PUBLIC_PARMS parameters; -} TPMT_PUBLIC_PARMS; /* Structure */ - -typedef struct -{ // Table 2:201 - TPMI_ALG_PUBLIC type; - TPMI_ALG_HASH nameAlg; - TPMA_OBJECT objectAttributes; - TPM2B_DIGEST authPolicy; - TPMU_PUBLIC_PARMS parameters; - TPMU_PUBLIC_ID unique; -} TPMT_PUBLIC; /* Structure */ - -typedef struct -{ // Table 2:202 - UINT16 size; - TPMT_PUBLIC publicArea; -} TPM2B_PUBLIC; /* Structure */ - -typedef union -{ // Table 2:203 - struct - { - UINT16 size; - BYTE buffer[sizeof(TPMT_PUBLIC)]; - } t; - TPM2B b; -} TPM2B_TEMPLATE; /* Structure */ - -typedef union -{ // Table 2:204 - struct - { - UINT16 size; - BYTE buffer[PRIVATE_VENDOR_SPECIFIC_BYTES]; - } t; - TPM2B b; -} TPM2B_PRIVATE_VENDOR_SPECIFIC; /* Structure */ - -typedef union -{ // Table 2:205 -#if ALG_RSA - TPM2B_PRIVATE_KEY_RSA rsa; -#endif // ALG_RSA -#if ALG_ECC - TPM2B_ECC_PARAMETER ecc; -#endif // ALG_ECC -#if ALG_KEYEDHASH - TPM2B_SENSITIVE_DATA bits; -#endif // ALG_KEYEDHASH -#if ALG_SYMCIPHER - TPM2B_SYM_KEY sym; -#endif // ALG_SYMCIPHER - TPM2B_PRIVATE_VENDOR_SPECIFIC any; -} TPMU_SENSITIVE_COMPOSITE; /* Structure */ - -typedef struct -{ // Table 2:206 - TPMI_ALG_PUBLIC sensitiveType; - TPM2B_AUTH authValue; - TPM2B_DIGEST seedValue; - TPMU_SENSITIVE_COMPOSITE sensitive; -} TPMT_SENSITIVE; /* Structure */ - -typedef struct -{ // Table 2:207 - UINT16 size; - TPMT_SENSITIVE sensitiveArea; -} TPM2B_SENSITIVE; /* Structure */ - -typedef struct -{ // Table 2:208 - TPM2B_DIGEST integrityOuter; - TPM2B_DIGEST integrityInner; - TPM2B_SENSITIVE sensitive; -} _PRIVATE; /* Structure */ - -typedef union -{ // Table 2:209 - struct - { - UINT16 size; - BYTE buffer[sizeof(_PRIVATE)]; - } t; - TPM2B b; -} TPM2B_PRIVATE; /* Structure */ - -typedef struct -{ // Table 2:210 - TPM2B_DIGEST integrityHMAC; - TPM2B_DIGEST encIdentity; -} TPMS_ID_OBJECT; /* Structure */ - -typedef union -{ // Table 2:211 - struct - { - UINT16 size; - BYTE credential[sizeof(TPMS_ID_OBJECT)]; - } t; - TPM2B b; -} TPM2B_ID_OBJECT; /* Structure */ - -#define TYPE_OF_TPM_NV_INDEX UINT32 -#define TPM_NV_INDEX_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPM_NV_INDEX(a) (*((TPM_NV_INDEX*)&(a))) -#define TPM_NV_INDEX_TO_BYTE_ARRAY(i, a) \ - UINT32_TO_BYTE_ARRAY((TPM_NV_INDEX_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPM_NV_INDEX(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPM_NV_INDEX(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPM_NV_INDEX -{ // Table 2:212 - unsigned index : 24; - unsigned RH_NV : 8; -} TPM_NV_INDEX; /* Bits */ -// This is the initializer for a TPM_NV_INDEX structure -# define TPM_NV_INDEX_INITIALIZER(index, rh_nv) \ - { \ - index, rh_nv \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:212 TPM_NV_INDEX using bit masking -typedef UINT32 TPM_NV_INDEX; -# define TYPE_OF_TPM_NV_INDEX UINT32 -# define TPM_NV_INDEX_index_SHIFT 0 -# define TPM_NV_INDEX_index ((TPM_NV_INDEX)0xffffff << 0) -# define TPM_NV_INDEX_RH_NV_SHIFT 24 -# define TPM_NV_INDEX_RH_NV ((TPM_NV_INDEX)0xff << 24) -// This is the initializer for a TPM_NV_INDEX bit array. -# define TPM_NV_INDEX_INITIALIZER(index, rh_nv) \ - (TPM_NV_INDEX)((index << 0) + (rh_nv << 24)) -#endif // USE_BIT_FIELD_STRUCTURES - -// Table 2:213 - Definition of TPM_NT Constants -typedef UINT32 TPM_NT; -#define TYPE_OF_TPM_NT UINT32 -#define TPM_NT_ORDINARY (TPM_NT)(0x0) -#define TPM_NT_COUNTER (TPM_NT)(0x1) -#define TPM_NT_BITS (TPM_NT)(0x2) -#define TPM_NT_EXTEND (TPM_NT)(0x4) -#define TPM_NT_PIN_FAIL (TPM_NT)(0x8) -#define TPM_NT_PIN_PASS (TPM_NT)(0x9) - -typedef struct -{ // Table 2:214 - UINT32 pinCount; - UINT32 pinLimit; -} TPMS_NV_PIN_COUNTER_PARAMETERS; /* Structure */ - -#define TYPE_OF_TPMA_NV UINT32 -#define TPMA_NV_TO_UINT32(a) (*((UINT32*)&(a))) -#define UINT32_TO_TPMA_NV(a) (*((TPMA_NV*)&(a))) -#define TPMA_NV_TO_BYTE_ARRAY(i, a) UINT32_TO_BYTE_ARRAY((TPMA_NV_TO_UINT32(i)), (a)) -#define BYTE_ARRAY_TO_TPMA_NV(i, a) \ - { \ - UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ - i = UINT32_TO_TPMA_NV(x); \ - } -#if USE_BIT_FIELD_STRUCTURES -typedef struct TPMA_NV -{ // Table 2:215 - unsigned PPWRITE : 1; - unsigned OWNERWRITE : 1; - unsigned AUTHWRITE : 1; - unsigned POLICYWRITE : 1; - unsigned TPM_NT : 4; - unsigned Reserved_bits_at_8 : 2; - unsigned POLICY_DELETE : 1; - unsigned WRITELOCKED : 1; - unsigned WRITEALL : 1; - unsigned WRITEDEFINE : 1; - unsigned WRITE_STCLEAR : 1; - unsigned GLOBALLOCK : 1; - unsigned PPREAD : 1; - unsigned OWNERREAD : 1; - unsigned AUTHREAD : 1; - unsigned POLICYREAD : 1; - unsigned Reserved_bits_at_20 : 5; - unsigned NO_DA : 1; - unsigned ORDERLY : 1; - unsigned CLEAR_STCLEAR : 1; - unsigned READLOCKED : 1; - unsigned WRITTEN : 1; - unsigned PLATFORMCREATE : 1; - unsigned READ_STCLEAR : 1; -} TPMA_NV; /* Bits */ -// This is the initializer for a TPMA_NV structure -# define TPMA_NV_INITIALIZER(ppwrite, \ - ownerwrite, \ - authwrite, \ - policywrite, \ - tpm_nt, \ - bits_at_8, \ - policy_delete, \ - writelocked, \ - writeall, \ - writedefine, \ - write_stclear, \ - globallock, \ - ppread, \ - ownerread, \ - authread, \ - policyread, \ - bits_at_20, \ - no_da, \ - orderly, \ - clear_stclear, \ - readlocked, \ - written, \ - platformcreate, \ - read_stclear) \ - { \ - ppwrite, ownerwrite, authwrite, policywrite, tpm_nt, bits_at_8, policy_delete, \ - writelocked, writeall, writedefine, write_stclear, globallock, ppread, \ - ownerread, authread, policyread, bits_at_20, no_da, orderly, \ - clear_stclear, readlocked, written, platformcreate, read_stclear \ - } -#else // USE_BIT_FIELD_STRUCTURES -// This implements Table 2:215 TPMA_NV using bit masking -typedef UINT32 TPMA_NV; -# define TYPE_OF_TPMA_NV UINT32 -# define TPMA_NV_PPWRITE ((TPMA_NV)1 << 0) -# define TPMA_NV_OWNERWRITE ((TPMA_NV)1 << 1) -# define TPMA_NV_AUTHWRITE ((TPMA_NV)1 << 2) -# define TPMA_NV_POLICYWRITE ((TPMA_NV)1 << 3) -# define TPMA_NV_TPM_NT_SHIFT 4 -# define TPMA_NV_TPM_NT ((TPMA_NV)0xf << 4) -# define TPMA_NV_POLICY_DELETE ((TPMA_NV)1 << 10) -# define TPMA_NV_WRITELOCKED ((TPMA_NV)1 << 11) -# define TPMA_NV_WRITEALL ((TPMA_NV)1 << 12) -# define TPMA_NV_WRITEDEFINE ((TPMA_NV)1 << 13) -# define TPMA_NV_WRITE_STCLEAR ((TPMA_NV)1 << 14) -# define TPMA_NV_GLOBALLOCK ((TPMA_NV)1 << 15) -# define TPMA_NV_PPREAD ((TPMA_NV)1 << 16) -# define TPMA_NV_OWNERREAD ((TPMA_NV)1 << 17) -# define TPMA_NV_AUTHREAD ((TPMA_NV)1 << 18) -# define TPMA_NV_POLICYREAD ((TPMA_NV)1 << 19) -# define TPMA_NV_NO_DA ((TPMA_NV)1 << 25) -# define TPMA_NV_ORDERLY ((TPMA_NV)1 << 26) -# define TPMA_NV_CLEAR_STCLEAR ((TPMA_NV)1 << 27) -# define TPMA_NV_READLOCKED ((TPMA_NV)1 << 28) -# define TPMA_NV_WRITTEN ((TPMA_NV)1 << 29) -# define TPMA_NV_PLATFORMCREATE ((TPMA_NV)1 << 30) -# define TPMA_NV_READ_STCLEAR ((TPMA_NV)1 << 31) -// This is the initializer for a TPMA_NV bit array. -# define TPMA_NV_INITIALIZER(ppwrite, \ - ownerwrite, \ - authwrite, \ - policywrite, \ - tpm_nt, \ - bits_at_8, \ - policy_delete, \ - writelocked, \ - writeall, \ - writedefine, \ - write_stclear, \ - globallock, \ - ppread, \ - ownerread, \ - authread, \ - policyread, \ - bits_at_20, \ - no_da, \ - orderly, \ - clear_stclear, \ - readlocked, \ - written, \ - platformcreate, \ - read_stclear) \ - (TPMA_NV)((ppwrite << 0) + (ownerwrite << 1) + (authwrite << 2) \ - + (policywrite << 3) + (tpm_nt << 4) + (policy_delete << 10) \ - + (writelocked << 11) + (writeall << 12) + (writedefine << 13) \ - + (write_stclear << 14) + (globallock << 15) + (ppread << 16) \ - + (ownerread << 17) + (authread << 18) + (policyread << 19) \ - + (no_da << 25) + (orderly << 26) + (clear_stclear << 27) \ - + (readlocked << 28) + (written << 29) + (platformcreate << 30) \ - + (read_stclear << 31)) -#endif // USE_BIT_FIELD_STRUCTURES - -typedef struct -{ // Table 2:216 - TPMI_RH_NV_INDEX nvIndex; - TPMI_ALG_HASH nameAlg; - TPMA_NV attributes; - TPM2B_DIGEST authPolicy; - UINT16 dataSize; -} TPMS_NV_PUBLIC; /* Structure */ - -typedef struct -{ // Table 2:217 - UINT16 size; - TPMS_NV_PUBLIC nvPublic; -} TPM2B_NV_PUBLIC; /* Structure */ - -typedef union -{ // Table 2:218 - struct - { - UINT16 size; - BYTE buffer[MAX_CONTEXT_SIZE]; - } t; - TPM2B b; -} TPM2B_CONTEXT_SENSITIVE; /* Structure */ - -typedef struct -{ // Table 2:219 - TPM2B_DIGEST integrity; - TPM2B_CONTEXT_SENSITIVE encrypted; -} TPMS_CONTEXT_DATA; /* Structure */ - -typedef union -{ // Table 2:220 - struct - { - UINT16 size; - BYTE buffer[sizeof(TPMS_CONTEXT_DATA)]; - } t; - TPM2B b; -} TPM2B_CONTEXT_DATA; /* Structure */ - -typedef struct -{ // Table 2:221 - UINT64 sequence; - TPMI_DH_SAVED savedHandle; - TPMI_RH_HIERARCHY hierarchy; - TPM2B_CONTEXT_DATA contextBlob; -} TPMS_CONTEXT; /* Structure */ - -typedef struct -{ // Table 2:223 - TPML_PCR_SELECTION pcrSelect; - TPM2B_DIGEST pcrDigest; - TPMA_LOCALITY locality; - TPM_ALG_ID parentNameAlg; - TPM2B_NAME parentName; - TPM2B_NAME parentQualifiedName; - TPM2B_DATA outsideInfo; -} TPMS_CREATION_DATA; /* Structure */ - -typedef struct -{ // Table 2:224 - UINT16 size; - TPMS_CREATION_DATA creationData; -} TPM2B_CREATION_DATA; /* Structure */ - -// Table 2:225 - Definition of TPM_AT Constants -typedef UINT32 TPM_AT; -#define TYPE_OF_TPM_AT UINT32 -#define TPM_AT_ANY (TPM_AT)(0x00000000) -#define TPM_AT_ERROR (TPM_AT)(0x00000001) -#define TPM_AT_PV1 (TPM_AT)(0x00000002) -#define TPM_AT_VEND (TPM_AT)(0x80000000) - -// Table 2:226 - Definition of TPM_AE Constants -typedef UINT32 TPM_AE; -#define TYPE_OF_TPM_AE UINT32 -#define TPM_AE_NONE (TPM_AE)(0x00000000) - -typedef struct -{ // Table 2:227 - TPM_AT tag; - UINT32 data; -} TPMS_AC_OUTPUT; /* Structure */ - -typedef struct -{ // Table 2:228 - UINT32 count; - TPMS_AC_OUTPUT acCapabilities[MAX_AC_CAPABILITIES]; -} TPML_AC_CAPABILITIES; /* Structure */ - -#endif // _TPM_TYPES_H_ diff --git a/TPMCmd/tpm/include/VendorString.h b/TPMCmd/tpm/include/VendorString.h deleted file mode 100644 index bb7525fc..00000000 --- a/TPMCmd/tpm/include/VendorString.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _VENDOR_STRING_H -#define _VENDOR_STRING_H - -// Define up to 4-byte values for MANUFACTURER. This value defines the response -// for TPM_PT_MANUFACTURER in TPM2_GetCapability. -// The following line should be un-commented and a vendor specific string -// should be provided here. -#define MANUFACTURER "MSFT" - -// The following #if macro may be deleted after a proper MANUFACTURER is provided. -#ifndef MANUFACTURER -# error MANUFACTURER is not provided. \ -Please modify include/VendorString.h to provide a specific \ -manufacturer name. -#endif - -// Define up to 4, 4-byte values. The values must each be 4 bytes long and the last -// value used may contain trailing zeros. -// These values define the response for TPM_PT_VENDOR_STRING_(1-4) -// in TPM2_GetCapability. -// The following line should be un-commented and a vendor specific string -// should be provided here. -// The vendor strings 2-4 may also be defined as appropriate. -#define VENDOR_STRING_1 "xCG " -#define VENDOR_STRING_2 "fTPM" -// #define VENDOR_STRING_3 -// #define VENDOR_STRING_4 - -// The following #if macro may be deleted after a proper VENDOR_STRING_1 -// is provided. -#ifndef VENDOR_STRING_1 -# error VENDOR_STRING_1 is not provided. \ -Please modify include/VendorString.h to provide a vendor-specific string. -#endif - -// the more significant 32-bits of a vendor-specific value -// indicating the version of the firmware -// The following line should be un-commented and a vendor specific firmware V1 -// should be provided here. -// The FIRMWARE_V2 may also be defined as appropriate. -#define FIRMWARE_V1 (0x20170619) -// the less significant 32-bits of a vendor-specific value -// indicating the version of the firmware -#define FIRMWARE_V2 (0x00163636) - -// The following #if macro may be deleted after a proper FIRMWARE_V1 is provided. -#ifndef FIRMWARE_V1 -# error FIRMWARE_V1 is not provided. \ -Please modify include/VendorString.h to provide a vendor-specific firmware \ -version -#endif - -#endif diff --git a/TPMCmd/tpm/include/Wolf/TpmToWolfHash.h b/TPMCmd/tpm/include/Wolf/TpmToWolfHash.h deleted file mode 100644 index 5af59cbd..00000000 --- a/TPMCmd/tpm/include/Wolf/TpmToWolfHash.h +++ /dev/null @@ -1,190 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// This header file is used to 'splice' the wolfcrypt hash code into the TPM code. -// -#ifndef HASH_LIB_DEFINED -#define HASH_LIB_DEFINED - -#define HASH_LIB_WOLF - -#define HASH_ALIGNMENT RADIX_BYTES - -#ifndef WOLFSSL_USER_SETTINGS -# define WOLFSSL_USER_SETTINGS -#endif - -#if ALG_SHA384 || ALG_SHA512 -# define WOLFSSL_SHA512 -#endif - -#if ALG_SM3_256 -# undef ALG_SM3_256 -# define ALG_SM3_256 ALG_NO -//#error "SM3 is not available" -#endif - -#include -#include -#include - -//*************************************************************** -//** Links to the wolfcrypt HASH code -//*************************************************************** - -// Redefine the internal name used for each of the hash state structures to the -// name used by the library. -// These defines need to be known in all parts of the TPM so that the structure -// sizes can be properly computed when needed. - -#define tpmHashStateSHA1_t wc_Sha -#define tpmHashStateSHA256_t wc_Sha256 -#define tpmHashStateSHA384_t wc_Sha512 -#define tpmHashStateSHA512_t wc_Sha512 - -#if ALG_SM3 -# error "The version of WolfCrypt used by this code does not support SM3" -#endif - -// The defines below are only needed when compiling CryptHash.c or CryptSmac.c. -// This isolation is primarily to avoid name space collision. However, if there -// is a real collision, it will likely show up when the linker tries to put things -// together. - -#ifdef _CRYPT_HASH_C_ - -typedef BYTE* PBYTE; -typedef const BYTE* PCBYTE; - -// Define the interface between CryptHash.c to the functions provided by the -// library. For each method, define the calling parameters of the method and then -// define how the method is invoked in CryptHash.c. -// -// All hashes are required to have the same calling sequence. If they don't, create -// a simple adaptation function that converts from the "standard" form of the call -// to the form used by the specific hash (and then send a nasty letter to the -// person who wrote the hash function for the library). -// -// The macro that calls the method also defines how the -// parameters get swizzled between the default form (in CryptHash.c)and the -// library form. -// -// Initialize the hash context -# define HASH_START_METHOD_DEF void(HASH_START_METHOD)(PANY_HASH_STATE state) -# define HASH_START(hashState) ((hashState)->def->method.start)(&(hashState)->state); - -// Add data to the hash -# define HASH_DATA_METHOD_DEF \ - void(HASH_DATA_METHOD)(PANY_HASH_STATE state, PCBYTE buffer, size_t size) -# define HASH_DATA(hashState, dInSize, dIn) \ - ((hashState)->def->method.data)(&(hashState)->state, dIn, dInSize) - -// Finalize the hash and get the digest -# define HASH_END_METHOD_DEF \ - void(HASH_END_METHOD)(PANY_HASH_STATE state, BYTE * buffer) -# define HASH_END(hashState, buffer) \ - ((hashState)->def->method.end)(&(hashState)->state, buffer) - -// Copy the hash context -// Note: For import, export, and copy, memcpy() is used since there is no -// reformatting necessary between the internal and external forms. -# define HASH_STATE_COPY_METHOD_DEF \ - void(HASH_STATE_COPY_METHOD)( \ - PANY_HASH_STATE to, PCANY_HASH_STATE from, size_t size) -# define HASH_STATE_COPY(hashStateOut, hashStateIn) \ - ((hashStateIn)->def->method.copy)(&(hashStateOut)->state, \ - &(hashStateIn)->state, \ - (hashStateIn)->def->contextSize) - -// Copy (with reformatting when necessary) an internal hash structure to an -// external blob -# define HASH_STATE_EXPORT_METHOD_DEF \ - void(HASH_STATE_EXPORT_METHOD)(BYTE * to, PCANY_HASH_STATE from, size_t size) -# define HASH_STATE_EXPORT(to, hashStateFrom) \ - ((hashStateFrom)->def->method.copyOut)( \ - &(((BYTE*)(to))[offsetof(HASH_STATE, state)]), \ - &(hashStateFrom)->state, \ - (hashStateFrom)->def->contextSize) - -// Copy from an external blob to an internal formate (with reformatting when -// necessary -# define HASH_STATE_IMPORT_METHOD_DEF \ - void(HASH_STATE_IMPORT_METHOD)(PANY_HASH_STATE to, const BYTE* from, size_t size) -# define HASH_STATE_IMPORT(hashStateTo, from) \ - ((hashStateTo)->def->method.copyIn)( \ - &(hashStateTo)->state, \ - &(((const BYTE*)(from))[offsetof(HASH_STATE, state)]), \ - (hashStateTo)->def->contextSize) - -// Function aliases. The code in CryptHash.c uses the internal designation for the -// functions. These need to be translated to the function names of the library. -// Internal External -// Designation Designation -// external name of the -// initialization method -# define tpmHashStart_SHA1 wc_InitSha -# define tpmHashData_SHA1 wc_ShaUpdate -# define tpmHashEnd_SHA1 wc_ShaFinal -# define tpmHashStateCopy_SHA1 memcpy -# define tpmHashStateExport_SHA1 memcpy -# define tpmHashStateImport_SHA1 memcpy -# define tpmHashStart_SHA256 wc_InitSha256 -# define tpmHashData_SHA256 wc_Sha256Update -# define tpmHashEnd_SHA256 wc_Sha256Final -# define tpmHashStateCopy_SHA256 memcpy -# define tpmHashStateExport_SHA256 memcpy -# define tpmHashStateImport_SHA256 memcpy -# define tpmHashStart_SHA384 wc_InitSha384 -# define tpmHashData_SHA384 wc_Sha384Update -# define tpmHashEnd_SHA384 wc_Sha384Final -# define tpmHashStateCopy_SHA384 memcpy -# define tpmHashStateExport_SHA384 memcpy -# define tpmHashStateImport_SHA384 memcpy -# define tpmHashStart_SHA512 wc_InitSha512 -# define tpmHashData_SHA512 wc_Sha512Update -# define tpmHashEnd_SHA512 wc_Sha512Final -# define tpmHashStateCopy_SHA512 memcpy -# define tpmHashStateExport_SHA512 memcpy -# define tpmHashStateImport_SHA512 memcpy - -#endif // _CRYPT_HASH_C_ - -#define LibHashInit() -// This definition would change if there were something to report -#define HashLibSimulationEnd() - -#endif // HASH_LIB_DEFINED diff --git a/TPMCmd/tpm/include/Wolf/TpmToWolfMath.h b/TPMCmd/tpm/include/Wolf/TpmToWolfMath.h deleted file mode 100644 index 82237bda..00000000 --- a/TPMCmd/tpm/include/Wolf/TpmToWolfMath.h +++ /dev/null @@ -1,91 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// This file contains the structure definitions used for ECC in the LibTomCrypt -// version of the code. These definitions would change, based on the library. -// The ECC-related structures that cross the TPM interface are defined -// in TpmTypes.h -// - -#ifndef MATH_LIB_DEFINED -#define MATH_LIB_DEFINED - -#define MATH_LIB_WOLF - -#if ALG_ECC -# define HAVE_ECC -#endif - -#include -#include - -#define MP_VAR(name) \ - mp_int _##name; \ - mp_int* name = MpInitialize(&_##name); - -// Allocate a mp_int and initialize with the values in a mp_int* initializer -#define MP_INITIALIZED(name, initializer) \ - MP_VAR(name); \ - BnToWolf(name, initializer); - -#define POINT_CREATE(name, initializer) \ - ecc_point* name = EcPointInitialized(initializer); - -#define POINT_DELETE(name) \ - wc_ecc_del_point(name); \ - name = NULL; - -typedef ECC_CURVE_DATA bnCurve_t; - -typedef bnCurve_t* bigCurve; - -#define AccessCurveData(E) (E) - -#define CURVE_INITIALIZED(name, initializer) \ - bnCurve_t* name = (ECC_CURVE_DATA*)GetCurveData(initializer) - -#define CURVE_FREE(E) - -#include "TpmToWolfSupport_fp.h" - -#define WOLF_ENTER() - -#define WOLF_LEAVE() - -// This definition would change if there were something to report -#define MathLibSimulationEnd() - -#endif // MATH_LIB_DEFINED diff --git a/TPMCmd/tpm/include/Wolf/TpmToWolfSym.h b/TPMCmd/tpm/include/Wolf/TpmToWolfSym.h deleted file mode 100644 index 5a48db27..00000000 --- a/TPMCmd/tpm/include/Wolf/TpmToWolfSym.h +++ /dev/null @@ -1,124 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// This header file is used to 'splice' the wolfcrypt library into the TPM code. - -#ifndef SYM_LIB_DEFINED -#define SYM_LIB_DEFINED - -#define SYM_LIB_WOLF - -#define SYM_ALIGNMENT RADIX_BYTES - -#include -#include - -//*************************************************************** -//** Links to the wolfCrypt AES code -//*************************************************************** -#if ALG_SM4 -# undef ALG_SM4 -# define ALG_SM4 ALG_NO -//#error "SM4 is not available" -#endif - -#if ALG_CAMELLIA -# undef ALG_CAMELLIA -# define ALG_CAMELLIA ALG_NO -//#error "Camellia is not available" -#endif - -// Define the order of parameters to the library functions that do block encryption -// and decryption. -typedef void (*TpmCryptSetSymKeyCall_t)(void* keySchedule, BYTE* out, const BYTE* in); - -// The Crypt functions that call the block encryption function use the parameters -// in the order: -// 1) keySchedule -// 2) in buffer -// 3) out buffer -// Since wolfcrypt uses the order in encryptoCall_t above, need to swizzle the -// values to the order required by the library. -#define SWIZZLE(keySchedule, in, out) \ - (void*)(keySchedule), (BYTE*)(out), (const BYTE*)(in) - -// Macros to set up the encryption/decryption key schedules -// -// AES: -#define TpmCryptSetEncryptKeyAES(key, keySizeInBits, schedule) \ - wc_AesSetKeyDirect((tpmKeyScheduleAES*)(schedule), \ - key, \ - BITS_TO_BYTES(keySizeInBits), \ - 0, \ - AES_ENCRYPTION) -#define TpmCryptSetDecryptKeyAES(key, keySizeInBits, schedule) \ - wc_AesSetKeyDirect((tpmKeyScheduleAES*)(schedule), \ - key, \ - BITS_TO_BYTES(keySizeInBits), \ - 0, \ - AES_DECRYPTION) - -// TDES: -#define TpmCryptSetEncryptKeyTDES(key, keySizeInBits, schedule) \ - TDES_setup_encrypt_key((key), (keySizeInBits), (tpmKeyScheduleTDES*)(schedule)) -#define TpmCryptSetDecryptKeyTDES(key, keySizeInBits, schedule) \ - TDES_setup_decrypt_key((key), (keySizeInBits), (tpmKeyScheduleTDES*)(schedule)) - -// Macros to alias encryption calls to specific algorithms. This should be used -// sparingly. Currently, only used by CryptRand.c -// -// When using these calls, to call the AES block encryption code, the caller -// should use: -// TpmCryptEncryptAES(SWIZZLE(keySchedule, in, out)); -#define TpmCryptEncryptAES wc_AesEncryptDirect -#define TpmCryptDecryptAES wc_AesDecryptDirect -#define tpmKeyScheduleAES Aes - -#define TpmCryptEncryptTDES TDES_encrypt -#define TpmCryptDecryptTDES TDES_decrypt -#define tpmKeyScheduleTDES Des3 - -typedef union tpmCryptKeySchedule_t tpmCryptKeySchedule_t; - -#if ALG_TDES -# include "TpmToWolfDesSupport_fp.h" -#endif - -// This definition would change if there were something to report -#define SymLibSimulationEnd() - -#endif // SYM_LIB_DEFINED diff --git a/TPMCmd/tpm/include/Wolf/user_settings.h b/TPMCmd/tpm/include/Wolf/user_settings.h deleted file mode 100644 index 652028e9..00000000 --- a/TPMCmd/tpm/include/Wolf/user_settings.h +++ /dev/null @@ -1,104 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* TPM specific preprocessor flags for wolfcrypt */ - -#ifndef WOLF_CRYPT_USER_SETTINGS_H -#define WOLF_CRYPT_USER_SETTINGS_H - -/* Remove the automatic setting of the default I/O functions EmbedSend() - and EmbedReceive(). */ -#define WOLFSSL_USER_IO - -/* Avoid naming conflicts */ -#define NO_OLD_WC_NAMES - -/* Use stack based fast math for all big integer math */ -#define USE_FAST_MATH -#define TFM_TIMING_RESISTANT - -/* Expose direct encryption functions */ -#define WOLFSSL_AES_DIRECT - -/* Enable/Disable algorithm support based on TPM implementation header */ -#if ALG_SHA256 -# define WOLFSSL_SHA256 -#endif -#if ALG_SHA384 || ALG_SHA512 -# define WOLFSSL_SHA384 -# define WOLFSSL_SHA512 -#endif -#if ALG_TDES -# define WOLFSSL_DES_ECB -#endif -#if ALG_RSA -/* Turn on RSA key generation functionality */ -# define WOLFSSL_KEY_GEN -#endif -#if ALG_ECC || defined(WOLFSSL_LIB) -# define HAVE_ECC - -/* Expose additional ECC primitives */ -# define WOLFSSL_PUBLIC_ECC_ADD_DBL -# define ECC_TIMING_RESISTANT - -/* Enables Shamir calc method */ -# define ECC_SHAMIR - -/* The TPM only needs low level ECC crypto */ -# define NO_ECC_SIGN -# define NO_ECC_VERIFY -# define NO_ECC_SECP - -# undef ECC_BN_P256 -# undef ECC_SM2_P256 -# undef ECC_BN_P638 -# define ECC_BN_P256 NO -# define ECC_SM2_P256 NO -# define ECC_BN_P638 NO - -#endif - -/* Disable explicit RSA. The TPM support for RSA is dependent only on TFM */ -#define NO_RSA -#define NO_RC4 -#define NO_ASN - -/* Enable debug wolf library check */ -//#define LIBRARY_COMPATIBILITY_CHECK - -#define WOLFSSL_ - -#endif // WOLF_CRYPT_USER_SETTINGS_H diff --git a/TPMCmd/tpm/include/X509.h b/TPMCmd/tpm/include/X509.h deleted file mode 100644 index e3b2355a..00000000 --- a/TPMCmd/tpm/include/X509.h +++ /dev/null @@ -1,132 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This file contains the macro and structure definitions for the X509 commands and -// functions. - -#ifndef _X509_H_ -#define _X509_H_ - -//** Includes - -#include "Tpm.h" -#include "TpmASN1.h" - -//** Defined Constants - -//*** X509 Application-specific types -#define X509_SELECTION 0xA0 -#define X509_ISSUER_UNIQUE_ID 0xA1 -#define X509_SUBJECT_UNIQUE_ID 0xA2 -#define X509_EXTENSIONS 0xA3 - -// These defines give the order in which values appear in the TBScertificate -// of an x.509 certificate. These values are used to index into an array of -// -#define ENCODED_SIZE_REF 0 -#define VERSION_REF (ENCODED_SIZE_REF + 1) -#define SERIAL_NUMBER_REF (VERSION_REF + 1) -#define SIGNATURE_REF (SERIAL_NUMBER_REF + 1) -#define ISSUER_REF (SIGNATURE_REF + 1) -#define VALIDITY_REF (ISSUER_REF + 1) -#define SUBJECT_KEY_REF (VALIDITY_REF + 1) -#define SUBJECT_PUBLIC_KEY_REF (SUBJECT_KEY_REF + 1) -#define EXTENSIONS_REF (SUBJECT_PUBLIC_KEY_REF + 1) -#define REF_COUNT (EXTENSIONS_REF + 1) - -//** Structures - -// Used to access the fields of a TBSsignature some of which are in the in_CertifyX509 -// structure and some of which are in the out_CertifyX509 structure. -typedef struct stringRef -{ - BYTE* buf; - INT16 len; -} stringRef; - -// This is defined to avoid bit by bit comparisons within a UINT32 -typedef union x509KeyUsageUnion -{ - TPMA_X509_KEY_USAGE x509; - UINT32 integer; -} x509KeyUsageUnion; - -//** Global X509 Constants -// These values are instanced by X509_spt.c and referenced by other X509-related -// files. - -// This is the DER-encoded value for the Key Usage OID (2.5.29.15). This is the -// full OID, not just the numeric value -#define OID_KEY_USAGE_EXTENSION_VALUE 0x06, 0x03, 0x55, 0x1D, 0x0F -MAKE_OID(_KEY_USAGE_EXTENSION); - -// This is the DER-encoded value for the TCG-defined TPMA_OBJECT OID -// (2.23.133.10.1.1.1) -#define OID_TCG_TPMA_OBJECT_VALUE 0x06, 0x07, 0x67, 0x81, 0x05, 0x0a, 0x01, 0x01, 0x01 -MAKE_OID(_TCG_TPMA_OBJECT); - -#ifdef _X509_SPT_ -// If a bit is SET in KEY_USAGE_SIGN is also SET in keyUsage then -// the associated key has to have 'sign' SET. -const x509KeyUsageUnion KEY_USAGE_SIGN = {TPMA_X509_KEY_USAGE_INITIALIZER( - /* bits_at_0 */ 0, - /* decipheronly */ 0, - /* encipheronly */ 0, - /* crlsign */ 1, - /* keycertsign */ 1, - /* keyagreement */ 0, - /* dataencipherment */ 0, - /* keyencipherment */ 0, - /* nonrepudiation */ 0, - /* digitalsignature */ 1)}; -// If a bit is SET in KEY_USAGE_DECRYPT is also SET in keyUsage then -// the associated key has to have 'decrypt' SET. -const x509KeyUsageUnion KEY_USAGE_DECRYPT = {TPMA_X509_KEY_USAGE_INITIALIZER( - /* bits_at_0 */ 0, - /* decipheronly */ 1, - /* encipheronly */ 1, - /* crlsign */ 0, - /* keycertsign */ 0, - /* keyagreement */ 1, - /* dataencipherment */ 1, - /* keyencipherment */ 1, - /* nonrepudiation */ 0, - /* digitalsignature */ 0)}; -#else -extern x509KeyUsageUnion KEY_USAGE_SIGN; -extern x509KeyUsageUnion KEY_USAGE_DECRYPT; -#endif - -#endif // _X509_H_ diff --git a/TPMCmd/tpm/include/platform_interface/CMakeLists.txt b/TPMCmd/tpm/include/platform_interface/CMakeLists.txt new file mode 100644 index 00000000..2e1780a7 --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/CMakeLists.txt @@ -0,0 +1,45 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +project(Tpm_Platform_Interface VERSION 1.0) +print_project_info() +add_library(Tpm_Platform_Interface INTERFACE) +add_library(Tpm_Platform_Interface::Tpm_Platform_Interface ALIAS Tpm_Platform_Interface) +target_link_libraries(Tpm_Platform_Interface INTERFACE TpmConfiguration::TpmConfiguration) +target_link_libraries(Tpm_Platform_Interface INTERFACE Tpm_Public_Headers::Tpm_Public_Headers) + +# publish current directory parent so references need to use +# prefix. +target_include_directories(${PROJECT_NAME} + INTERFACE + "$" + "$" +) + +# create install and export information for downstream projects to use +install_and_export_config_targets(${PROJECT_NAME}) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## +install(FILES + ${CMAKE_CURRENT_SOURCE_DIR}/platform_to_tpm_interface.h + ${CMAKE_CURRENT_SOURCE_DIR}/tpm_to_platform_interface.h + ${CMAKE_CURRENT_SOURCE_DIR}/pcrstruct.h + DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/Tpm_Platform_Interface/platform_interface) + +install(FILES + ${CMAKE_CURRENT_SOURCE_DIR}/prototypes/ExecCommand_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/prototypes/Manufacture_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/prototypes/platform_pcr_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/prototypes/_TPM_Hash_Data_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/prototypes/_TPM_Hash_End_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/prototypes/_TPM_Hash_Start_fp.h + ${CMAKE_CURRENT_SOURCE_DIR}/prototypes/_TPM_Init_fp.h + DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/Tpm_Platform_Interface/platform_interface/prototypes) + +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(${PROJECT_NAME}) + diff --git a/TPMCmd/tpm/include/platform_interface/pcrstruct.h b/TPMCmd/tpm/include/platform_interface/pcrstruct.h new file mode 100644 index 00000000..cf608d3d --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/pcrstruct.h @@ -0,0 +1,97 @@ +// +// This file defines the PCR and PCR_Attributes structures and +// related interface functions +// + +#ifndef _PCRSTRUCT_H_ +#define _PCRSTRUCT_H_ + +#include +#include +#include + +// a single PCR +typedef struct +{ +#if ALG_SHA1 + BYTE Sha1Pcr[SHA1_DIGEST_SIZE]; +#endif +#if ALG_SHA256 + BYTE Sha256Pcr[SHA256_DIGEST_SIZE]; +#endif +#if ALG_SHA384 + BYTE Sha384[SHA384_DIGEST_SIZE]; +#endif +#if ALG_SHA512 + BYTE Sha512[SHA512_DIGEST_SIZE]; +#endif +#if ALG_SM3_256 + BYTE Sm3_256[SM3_256_DIGEST_SIZE]; +#endif +#if ALG_SHA3_256 + BYTE Sha3_256[SHA3_256_DIGEST_SIZE]; +#endif +#if ALG_SHA3_384 + BYTE Sha3_384[SHA3_384_DIGEST_SIZE]; +#endif +#if ALG_SHA3_512 + BYTE Sha3_512[SHA3_512_DIGEST_SIZE]; +#endif +} PCR; + +// see the comments below for supportsPolicyAuth to explain this +#define MAX_PCR_GROUP_BITS 3 + +typedef struct +{ + // SET if the PCR value should be saved in state save + unsigned int stateSave : 1; + + // SET if the PCR is part of the "TCB group", causes the PCR counter not to increment + unsigned int doNotIncrementPcrCounter : 1; + + // PCRs may support policy or auth-value authorization. + // + // Such authorization values, if supported, are set by + // TPM2_PCR_SetAuthPolicy and/or TPM2_PCR_SetAuthValue. + // + // PCRs that share the same policy/auth value are said to be in a "group". + // PCRs that don't support authorization are said to be in group Zero. + // + // Group numbers are only used internally to indicate which PCRs share an + // authorization value. IOW the TPM client cannot refer to PCRs by group + // number; the range of group numbers is implementation defined. zero + // indicates the PCR doesn't support policy or auth verification. + // + // The size of this field must be large enough to support + // NUM_POLICY_PCR_GROUP & NUM_AUTHVALUE_PCR_GROUP; the maximum number of groups + // actually supported by this build of the core library. + // + // The number of bits allocated here does not control the number of groups, + // but there is a static assert that the number of bits here is large + // enough. + unsigned int policyAuthGroup : MAX_PCR_GROUP_BITS; + unsigned int authValuesGroup : MAX_PCR_GROUP_BITS; + + // these bitfields indicating the localities that can + // reset or extend this PCR. A SET bit indicates the PCR can + // be extended or reset from that locality. The low-order bit in + // each field is locality zero, and the high-order bit is locality 4. + unsigned int resetLocality : 5; + unsigned int extendLocality : 5; +} PCR_Attributes; + +// Get pointer to particular PCR from array if that PCR is allocated. +// otherwise returns NULL +BYTE* GetPcrPointerIfAllocated(PCR* pPcrArray, + TPM_ALG_ID alg, // IN: algorithm for bank + UINT32 pcrNumber // IN: PCR number +); + +// get a PCR pointer from the TPM's internal list, if it's allocated +// otherwise NULL +BYTE* GetPcrPointer(TPM_ALG_ID alg, // IN: algorithm for bank + UINT32 pcrNumber // IN: PCR number +); + +#endif diff --git a/TPMCmd/tpm/include/platform_interface/platform_to_tpm_interface.h b/TPMCmd/tpm/include/platform_interface/platform_to_tpm_interface.h new file mode 100644 index 00000000..a21e6045 --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/platform_to_tpm_interface.h @@ -0,0 +1,9 @@ + +#include +#include +#include +#include +#include +#include +// TODO_RENAME_INC_FOLDER: public refers to the TPM_CoreLib public headers +#include diff --git a/TPMCmd/tpm/include/platform_interface/prototypes/ExecCommand_fp.h b/TPMCmd/tpm/include/platform_interface/prototypes/ExecCommand_fp.h new file mode 100644 index 00000000..967c988a --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/prototypes/ExecCommand_fp.h @@ -0,0 +1,53 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _EXEC_COMMAND_FP_H_ +#define _EXEC_COMMAND_FP_H_ + +//** ExecuteCommand() +// +// The function performs the following steps. +// +// a) Parses the command header from input buffer. +// b) Calls ParseHandleBuffer() to parse the handle area of the command. +// c) Validates that each of the handles references a loaded entity. +// d) Calls ParseSessionBuffer () to: +// 1) unmarshal and parse the session area; +// 2) check the authorizations; and +// 3) when necessary, decrypt a parameter. +// e) Calls CommandDispatcher() to: +// 1) unmarshal the command parameters from the command buffer; +// 2) call the routine that performs the command actions; and +// 3) marshal the responses into the response buffer. +// f) If any error occurs in any of the steps above create the error response +// and return. +// g) Calls BuildResponseSession() to: +// 1) when necessary, encrypt a parameter +// 2) build the response authorization sessions +// 3) update the audit sessions and nonces +// h) Calls BuildResponseHeader() to complete the construction of the response. +// +// 'responseSize' is set by the caller to the maximum number of bytes available in +// the output buffer. ExecuteCommand will adjust the value and return the number +// of bytes placed in the buffer. +// +// 'response' is also set by the caller to indicate the buffer into which +// ExecuteCommand is to place the response. +// +// 'request' and 'response' may point to the same buffer +// +// Note: As of February, 2016, the failure processing has been moved to the +// platform-specific code. When the TPM code encounters an unrecoverable failure, it +// will SET g_inFailureMode and call _plat__Fail(). That function should not return +// but may call ExecuteCommand(). +// +LIB_EXPORT void ExecuteCommand( + uint32_t requestSize, // IN: command buffer size + unsigned char* request, // IN: command buffer + uint32_t* responseSize, // IN/OUT: response buffer size + unsigned char** response // IN/OUT: response buffer +); + +#endif // _EXEC_COMMAND_FP_H_ diff --git a/TPMCmd/tpm/include/platform_interface/prototypes/Manufacture_fp.h b/TPMCmd/tpm/include/platform_interface/prototypes/Manufacture_fp.h new file mode 100644 index 00000000..c78bc0f9 --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/prototypes/Manufacture_fp.h @@ -0,0 +1,48 @@ + +#ifndef _MANUFACTURE_FP_H_ +#define _MANUFACTURE_FP_H_ + +//*** TPM_Manufacture() +// This function initializes the TPM values in preparation for the TPM's first +// use. This function will fail if previously called. The TPM can be re-manufactured +// by calling TPM_Teardown() first and then calling this function again. +// NV must be enabled first (typically with NvPowerOn() via _TPM_Init) +// +// return type: int +// -2 NV System not available +// -1 FAILURE - System is incorrectly compiled. +// 0 success +// 1 manufacturing process previously performed +// returns +#define MANUF_NV_NOT_READY (-2) +#define MANUF_INVALID_CONFIG (-1) +#define MANUF_OK 0 +#define MANUF_ALREADY_DONE 1 +// params +#define MANUF_FIRST_TIME 1 +#define MANUF_REMANUFACTURE 0 +LIB_EXPORT int TPM_Manufacture( + int firstTime // IN: indicates if this is the first call from + // main() +); + +//*** TPM_TearDown() +// This function prepares the TPM for re-manufacture. It should not be implemented +// in anything other than a simulated TPM. +// +// In this implementation, all that is needs is to stop the cryptographic units +// and set a flag to indicate that the TPM can be re-manufactured. This should +// be all that is necessary to start the manufacturing process again. +// Return Type: int +// 0 success +// 1 TPM not previously manufactured +#define TEARDOWN_OK 0 +#define TEARDOWN_NOTHINGDONE 1 +LIB_EXPORT int TPM_TearDown(void); + +//*** TpmEndSimulation() +// This function is called at the end of the simulation run. It is used to provoke +// printing of any statistics that might be needed. +LIB_EXPORT void TpmEndSimulation(void); + +#endif // _MANUFACTURE_FP_H_ diff --git a/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Hash_Data_fp.h b/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Hash_Data_fp.h new file mode 100644 index 00000000..72c9deec --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Hash_Data_fp.h @@ -0,0 +1,14 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef __TPM_HASH_DATA_FP_H_ +#define __TPM_HASH_DATA_FP_H_ + +// This function is called to process a _TPM_Hash_Data indication. +LIB_EXPORT void _TPM_Hash_Data(uint32_t dataSize, // IN: size of data to be extend + unsigned char* data // IN: data buffer +); + +#endif // __TPM_HASH_DATA_FP_H_ diff --git a/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Hash_End_fp.h b/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Hash_End_fp.h new file mode 100644 index 00000000..ab3dce1d --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Hash_End_fp.h @@ -0,0 +1,12 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef __TPM_HASH_END_FP_H_ +#define __TPM_HASH_END_FP_H_ + +// This function is called to process a _TPM_Hash_End indication. +LIB_EXPORT void _TPM_Hash_End(void); + +#endif // __TPM_HASH_END_FP_H_ diff --git a/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Hash_Start_fp.h b/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Hash_Start_fp.h new file mode 100644 index 00000000..26bfe811 --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Hash_Start_fp.h @@ -0,0 +1,12 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef __TPM_HASH_START_FP_H_ +#define __TPM_HASH_START_FP_H_ + +// This function is called to process a _TPM_Hash_Start indication. +LIB_EXPORT void _TPM_Hash_Start(void); + +#endif // __TPM_HASH_START_FP_H_ diff --git a/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Init_fp.h b/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Init_fp.h new file mode 100644 index 00000000..ab8d875c --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/prototypes/_TPM_Init_fp.h @@ -0,0 +1,12 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef __TPM_INIT_FP_H_ +#define __TPM_INIT_FP_H_ + +// This function is used to process a _TPM_Init indication. +LIB_EXPORT void _TPM_Init(void); + +#endif // __TPM_INIT_FP_H_ diff --git a/TPMCmd/tpm/include/platform_interface/prototypes/platform_pcr_fp.h b/TPMCmd/tpm/include/platform_interface/prototypes/platform_pcr_fp.h new file mode 100644 index 00000000..6e4d3134 --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/prototypes/platform_pcr_fp.h @@ -0,0 +1,42 @@ + +// platform PCR functions called by the TPM library + +#ifndef _PLATFORM_PCR_FP_H_ +#define _PLATFORM_PCR_FP_H_ + +#include +#include +#include + +// return the number of PCRs the platform recognizes for GetPcrInitializationAttributes. +// PCRs are numbered starting at zero. +// Note: The TPM Library will enter failure mode if this number doesn't match +// IMPLEMENTATION_PCR. +UINT32 _platPcr__NumberOfPcrs(void); + +// return the initialization attributes of a given PCR. +// pcrNumber expected to be in [0, _platPcr__NumberOfPcrs) +// returns the attributes for PCR[0] if the requested pcrNumber is out of range. +// Note this returns a structure by-value, which is fast because the structure is +// a bitfield. +PCR_Attributes _platPcr__GetPcrInitializationAttributes(UINT32 pcrNumber); + +// Fill a given buffer with the PCR initialization value for a particular PCR and hash +// combination, and return its length. If the platform doesn't have a value, then +// the result size is expected to be zero, and the rfunction will return TPM_RC_PCR. +// If a valid is not available, then the core TPM library will ignore the value and +// treat it as non-existant and provide a default. +// If the buffer is not large enough for a pcr consistent with pcrAlg, then the +// platform will return TPM_RC_FAILURE. +TPM_RC _platPcr__GetInitialValueForPcr( + UINT32 pcrNumber, // IN: PCR to be initialized + TPM_ALG_ID pcrAlg, // IN: Algorithm of the PCR Bank being initialized + BYTE startupLocality, // IN: locality where startup is being called from + BYTE* pcrBuffer, // OUT: buffer to put PCR initialization value into + uint16_t bufferSize, // IN: maximum size of value buffer can hold + uint16_t* pcrLength); // OUT: size of initialization value returned in pcrBuffer + +// should the given PCR algorithm default to active in a new TPM? +BOOL _platPcr_IsPcrBankDefaultActive(TPM_ALG_ID pcrAlg); + +#endif // _PLATFORM_PCR_FP_H_ diff --git a/TPMCmd/tpm/include/platform_interface/readme.md b/TPMCmd/tpm/include/platform_interface/readme.md new file mode 100644 index 00000000..ebcc1089 --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/readme.md @@ -0,0 +1,14 @@ +# TPM Platform Interface + +- [TPM Platform Interface](#tpm-platform-interface) +- [Description](#description) + +# Description + +This folder contains headers for the platform interface (functions and data) between the `Core` TPM library and the implementor-provided `Platform` library. +Observe that the interfaces are directional. + +| Filename | Purpose | +| :-------------------------- | :--------------------------------------------------- | +| tpm_to_platform_interface.h | Functional interface `Core` requires from `Platform` | +| platform_to_tpm_interface.h | Functional interface `Core` exposes to `Platform` | diff --git a/TPMCmd/tpm/include/platform_interface/tpm_to_platform_interface.h b/TPMCmd/tpm/include/platform_interface/tpm_to_platform_interface.h new file mode 100644 index 00000000..7b55c85f --- /dev/null +++ b/TPMCmd/tpm/include/platform_interface/tpm_to_platform_interface.h @@ -0,0 +1,385 @@ + +// This file represents the functional interface that all platform libraries must +// provide because they are called by the Core TPM library. +#ifndef _TPM_TO_PLATFORM_INTERFACE_H_ +#define _TPM_TO_PLATFORM_INTERFACE_H_ + +// need to read configuration for ACT_SUPPORT flag check below +#include +#include +#include + +//** From Cancel.c + +//***_plat__IsCanceled() +// Check if the cancel flag is set +// Return Type: int +// TRUE(1) if cancel flag is set +// FALSE(0) if cancel flag is not set +LIB_EXPORT int _plat__IsCanceled(void); + +//***_plat__TimerRead() +// This function provides access to the tick timer of the platform. The TPM code +// uses this value to drive the TPM Clock. +// +// The tick timer is supposed to run when power is applied to the device. This timer +// should not be reset by time events including _TPM_Init. It should only be reset +// when TPM power is re-applied. +// +// If the TPM is run in a protected environment, that environment may provide the +// tick time to the TPM as long as the time provided by the environment is not +// allowed to go backwards. If the time provided by the system can go backwards +// during a power discontinuity, then the _plat__Signal_PowerOn should call +// _plat__TimerReset(). +LIB_EXPORT uint64_t _plat__TimerRead(void); + +//*** _plat__TimerWasReset() +// This function is used to interrogate the flag indicating if the tick timer has +// been reset. +// +// If the resetFlag parameter is SET, then the flag will be CLEAR before the +// function returns. +LIB_EXPORT int _plat__TimerWasReset(void); + +//*** _plat__TimerWasStopped() +// This function is used to interrogate the flag indicating if the tick timer has +// been stopped. If so, this is typically a reason to roll the nonce. +// +// This function will CLEAR the s_timerStopped flag before returning. This provides +// functionality that is similar to status register that is cleared when read. This +// is the model used here because it is the one that has the most impact on the TPM +// code as the flag can only be accessed by one entity in the TPM. Any other +// implementation of the hardware can be made to look like a read-once register. +LIB_EXPORT int _plat__TimerWasStopped(void); + +//***_plat__ClockRateAdjust() +// Adjust the clock rate +// the old function name is ClockAdjustRate, and took a value which was an absolute +// number of ticks. +// +// ClockRateAdjust uses predefined signal values and encapsulates the platform +// specifics regarding the number of ticks the underlying clock is running at. +// +// The adjustment must be one of these values. A COARSE adjustment is 1%, MEDIUM +// is 0.1%, and FINE is the smallest amount supported by the platform. The +// total (cumulative) adjustment is limited to ~15% total. Attempts to adjust +// the clock further are silently ignored as are any invalid values. These +// values are defined here to insulate them from spec changes and to avoid +// needing visibility to the doc-generated structure headers. +typedef enum _plat__ClockAdjustStep +{ + PLAT_TPM_CLOCK_ADJUST_COARSE_SLOWER = -3, + PLAT_TPM_CLOCK_ADJUST_MEDIUM_SLOWER = -2, + PLAT_TPM_CLOCK_ADJUST_FINE_SLOWER = -1, + PLAT_TPM_CLOCK_ADJUST_FINE_FASTER = 1, + PLAT_TPM_CLOCK_ADJUST_MEDIUM_FASTER = 2, + PLAT_TPM_CLOCK_ADJUST_COARSE_FASTER = 3 +} _plat__ClockAdjustStep; +LIB_EXPORT void _plat__ClockRateAdjust(_plat__ClockAdjustStep adjustment); + +//** From DebugHelpers.c + +#if CERTIFYX509_DEBUG + +//*** DebugFileInit() +// This function opens the file used to hold the debug data. +// Return Type: int +// 0 success +// != 0 error +int DebugFileInit(void); + +//*** DebugDumpBuffer() +void DebugDumpBuffer(int size, unsigned char* buf, const char* identifier); +#endif // CERTIFYX509_DEBUG + +//** From Entropy.c + +//*** _plat__GetEntropy() +// This function is used to get available hardware entropy. In a hardware +// implementation of this function, there would be no call to the system +// to get entropy. +// Return Type: int32_t +// < 0 hardware failure of the entropy generator, this is sticky +// >= 0 the returned amount of entropy (bytes) +// +LIB_EXPORT int32_t _plat__GetEntropy(unsigned char* entropy, // output buffer + uint32_t amount // amount requested +); + +//** From LocalityPlat.c + +//***_plat__LocalityGet() +// Get the most recent command locality in locality value form. +// This is an integer value for locality and not a locality structure +// The locality can be 0-4 or 32-255. 5-31 is not allowed. +LIB_EXPORT unsigned char _plat__LocalityGet(void); + +//***_plat__NVEnable() +// Enable NV memory. +// +// This version just pulls in data from a file. In a real TPM, with NV on chip, +// this function would verify the integrity of the saved context. If the NV +// memory was not on chip but was in something like RPMB, the NV state would be +// read in, decrypted and integrity checked. +// +// The recovery from an integrity failure depends on where the error occurred. It +// it was in the state that is discarded by TPM Reset, then the error is +// recoverable if the TPM is reset. Otherwise, the TPM must go into failure mode. +// +// Return Type: int +// 0 if success +// >0 if recoverable error +// <0 if unrecoverable error +LIB_EXPORT int _plat__NVEnable( + void* platParameter, // platform specific parameter + size_t paramSize // size of parameter. If size == 0, then + // parameter is a sizeof(void*) scalar and should + // be cast to an integer (intptr_t), not dereferenced. +); + +//***_plat__GetNvReadyState() +// Check if NV is available +// Return Type: int +// 0 NV is available +// 1 NV is not available due to write failure +// 2 NV is not available due to rate limit +#define NV_READY 0 +#define NV_WRITEFAILURE 1 +#define NV_RATE_LIMIT 2 +LIB_EXPORT int _plat__GetNvReadyState(void); + +//***_plat__NvMemoryRead() +// Function: Read a chunk of NV memory +// Return Type: int +// TRUE(1) offset and size is within available NV size +// FALSE(0) otherwise; also trigger failure mode +LIB_EXPORT int _plat__NvMemoryRead(unsigned int startOffset, // IN: read start + unsigned int size, // IN: size of bytes to read + void* data // OUT: data buffer +); + +//*** _plat__NvGetChangedStatus() +// This function checks to see if the NV is different from the test value. This is +// so that NV will not be written if it has not changed. +// Return Type: int +// NV_HAS_CHANGED(1) the NV location is different from the test value +// NV_IS_SAME(0) the NV location is the same as the test value +// NV_INVALID_LOCATION(-1) the NV location is invalid; also triggers failure mode +#define NV_HAS_CHANGED (1) +#define NV_IS_SAME (0) +#define NV_INVALID_LOCATION (-1) +LIB_EXPORT int _plat__NvGetChangedStatus( + unsigned int startOffset, // IN: read start + unsigned int size, // IN: size of bytes to read + void* data // IN: data buffer +); + +//***_plat__NvMemoryWrite() +// This function is used to update NV memory. The "write" is to a memory copy of +// NV. At the end of the current command, any changes are written to +// the actual NV memory. +// NOTE: A useful optimization would be for this code to compare the current +// contents of NV with the local copy and note the blocks that have changed. Then +// only write those blocks when _plat__NvCommit() is called. +// Return Type: int +// TRUE(1) offset and size is within available NV size +// FALSE(0) otherwise; also trigger failure mode +LIB_EXPORT int _plat__NvMemoryWrite(unsigned int startOffset, // IN: write start + unsigned int size, // IN: size of bytes to write + void* data // OUT: data buffer +); + +//***_plat__NvMemoryClear() +// Function is used to set a range of NV memory bytes to an implementation-dependent +// value. The value represents the erase state of the memory. +LIB_EXPORT int _plat__NvMemoryClear(unsigned int startOffset, // IN: clear start + unsigned int size // IN: number of bytes to clear +); + +//***_plat__NvMemoryMove() +// Function: Move a chunk of NV memory from source to destination +// This function should ensure that if there overlap, the original data is +// copied before it is written +LIB_EXPORT int _plat__NvMemoryMove(unsigned int sourceOffset, // IN: source offset + unsigned int destOffset, // IN: destination offset + unsigned int size // IN: size of data being moved +); + +//***_plat__NvCommit() +// This function writes the local copy of NV to NV for permanent store. It will write +// NV_MEMORY_SIZE bytes to NV. If a file is use, the entire file is written. +// Return Type: int +// 0 NV write success +// non-0 NV write fail +LIB_EXPORT int _plat__NvCommit(void); + +//***_plat__TearDown +// notify platform that TPM_TearDown was called so platform can cleanup or +// zeroize anything in the Platform. This should zeroize NV as well. +LIB_EXPORT void _plat__TearDown(); + +//** From PlatformACT.c + +#if ACT_SUPPORT +//*** _plat__ACT_GetImplemented() +// This function tests to see if an ACT is implemented. It is a belt and suspenders +// function because the TPM should not be calling to manipulate an ACT that is not +// implemented. However, this could help the simulator code which doesn't necessarily +// know if an ACT is implemented or not. +LIB_EXPORT int _plat__ACT_GetImplemented(uint32_t act); + +//*** _plat__ACT_GetRemaining() +// This function returns the remaining time. If an update is pending, 'newValue' is +// returned. Otherwise, the current counter value is returned. Note that since the +// timers keep running, the returned value can get stale immediately. The actual count +// value will be no greater than the returned value. +LIB_EXPORT uint32_t _plat__ACT_GetRemaining(uint32_t act //IN: the ACT selector +); + +//*** _plat__ACT_GetSignaled() +LIB_EXPORT int _plat__ACT_GetSignaled(uint32_t act //IN: number of ACT to check +); + +//*** _plat__ACT_SetSignaled() +LIB_EXPORT void _plat__ACT_SetSignaled(uint32_t act, int on); + +//*** _plat__ACT_UpdateCounter() +// This function is used to write the newValue for the counter. If an update is +// pending, then no update occurs and the function returns FALSE. If 'setSignaled' +// is TRUE, then the ACT signaled state is SET and if 'newValue' is 0, nothing +// is posted. +LIB_EXPORT int _plat__ACT_UpdateCounter(uint32_t act, // IN: ACT to update + uint32_t newValue // IN: the value to post +); + +//***_plat__ACT_EnableTicks() +// This enables and disables the processing of the once-per-second ticks. This should +// be turned off ('enable' = FALSE) by _TPM_Init and turned on ('enable' = TRUE) by +// TPM2_Startup() after all the initializations have completed. +LIB_EXPORT void _plat__ACT_EnableTicks(int enable); + +//***_plat__ACT_Initialize() +// This function initializes the ACT hardware and data structures +LIB_EXPORT int _plat__ACT_Initialize(void); + +#endif // ACT_SUPPORT + +//** From PowerPlat.c + +//*** _plat__WasPowerLost() +// Test whether power was lost before a _TPM_Init. +// +// This function will clear the "hardware" indication of power loss before return. +// This means that there can only be one spot in the TPM code where this value +// gets read. This method is used here as it is the most difficult to manage in the +// TPM code and, if the hardware actually works this way, it is hard to make it +// look like anything else. So, the burden is placed on the TPM code rather than the +// platform code +// Return Type: int +// TRUE(1) power was lost +// FALSE(0) power was not lost +LIB_EXPORT int _plat__WasPowerLost(void); + +//** From PPPlat.c + +//***_plat__PhysicalPresenceAsserted() +// Check if physical presence is signaled +// Return Type: int +// TRUE(1) if physical presence is signaled +// FALSE(0) if physical presence is not signaled +LIB_EXPORT int _plat__PhysicalPresenceAsserted(void); + +//***_plat__Fail() +// This is the platform depended failure exit for the TPM. +LIB_EXPORT NORETURN void _plat__Fail(void); + +//** From Unique.c + +#if VENDOR_PERMANENT_AUTH_ENABLED == YES +//** _plat__GetUnique() +// This function is used to access the platform-specific unique values. +// This function places the unique value in the provided buffer ('b') +// and returns the number of bytes transferred. The function will not +// copy more data than 'bSize'. +// zero indicates value does not exist or an error occurred. +// +// 'which' indicates the unique value to return: +// 0 = RESERVED, do not use +// 1 = the VENDOR_PERMANENT_AUTH_HANDLE authorization value for this device +LIB_EXPORT uint32_t _plat__GetUnique(uint32_t which, + uint32_t bSize, // size of the buffer + unsigned char* b // output buffer +); +#endif + +//** _plat__GetPlatformManufactureData +// This function allows the platform to provide a small amount of data to be +// stored as part of the TPM's PERSISTENT_DATA structure during manufacture. Of +// course the platform can store data separately as well, but this allows a +// simple platform implementation to store a few bytes of data without +// implementing a multi-layer storage system. This function is called on +// manufacture and CLEAR. The buffer will contain the last value provided +// to the Core library. +LIB_EXPORT void _plat__GetPlatformManufactureData(uint8_t* pPlatformPersistentData, + uint32_t bufferSize); + +// return the 4 character Manufacturer Capability code. This +// should come from the platform library since that is provided by the manufacturer +LIB_EXPORT uint32_t _plat__GetManufacturerCapabilityCode(); + +// return the 4 character VendorStrings for Capabilities. +// Index is ONE-BASED, and may be in the range [1,4] inclusive. +// Any other index returns all zeros. The return value will be interpreted +// as an array of 4 ASCII characters (with no null terminator) +LIB_EXPORT uint32_t _plat__GetVendorCapabilityCode(int index); + +// return the most-significant 32-bits of the TPM Firmware Version reported by +// getCapability. +LIB_EXPORT uint32_t _plat__GetTpmFirmwareVersionHigh(); + +// return the least-significant 32-bits of the TPM Firmware Version reported by +// getCapability. +LIB_EXPORT uint32_t _plat__GetTpmFirmwareVersionLow(); + +// return the TPM Firmware's current SVN. +LIB_EXPORT uint16_t _plat__GetTpmFirmwareSvn(void); + +// return the maximum value that the TPM Firmware SVN may take. +LIB_EXPORT uint16_t _plat__GetTpmFirmwareMaxSvn(void); + +#if SVN_LIMITED_SUPPORT +//***_plat__GetTpmFirmwareSvnSecret() +// Function: Obtain a Firmware SVN Secret bound to the given SVN. Fails if the +// given SVN is greater than the firmware's current SVN. +// size must equal PRIMARY_SEED_SIZE. +// Return Type: int +// 0 success +// != 0 error +LIB_EXPORT int _plat__GetTpmFirmwareSvnSecret( + uint16_t svn, // IN: specified SVN + uint16_t secret_buf_size, // IN: size of secret buffer + uint8_t* secret_buf, // OUT: secret buffer + uint16_t* secret_size // OUT: secret buffer +); +#endif // SVN_LIMITED_SUPPORT + +#if FW_LIMITED_SUPPORT +//***_plat__GetTpmFirmwareSecret() +// Function: Obtain a Firmware Secret bound to the current firmware image. +// Return Type: int +// 0 success +// != 0 error +LIB_EXPORT int _plat__GetTpmFirmwareSecret( + uint16_t secret_buf_size, // IN: size of secret buffer + uint8_t* secret_buf, // OUT: secret buffer + uint16_t* secret_size // OUT: secret buffer +); +#endif // FW_LIMITED_SUPPORT + +// return the TPM Type returned by TPM_PT_VENDOR_TPM_TYPE +LIB_EXPORT uint32_t _plat__GetTpmType(); + +// platform PCR initialization functions +#include + +#endif // _TPM_TO_PLATFORM_INTERFACE_H_ diff --git a/TPMCmd/tpm/include/private/CommandAttributeData.h b/TPMCmd/tpm/include/private/CommandAttributeData.h new file mode 100644 index 00000000..f1b45d24 --- /dev/null +++ b/TPMCmd/tpm/include/private/CommandAttributeData.h @@ -0,0 +1,934 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT +// clang-format off + +// This file should only be included by CommandCodeAttibutes.c +#ifdef _COMMAND_CODE_ATTRIBUTES_ + +#include "CommandAttributes.h" + +#if COMPRESSED_LISTS +# define PAD_LIST 0 +#else +# define PAD_LIST 1 +#endif + +// This is the command code attribute array for GetCapability. +// Both this array and s_commandAttributes provides command code attributes, +// but tuned for different purpose +const TPMA_CC s_ccAttr [] = { +#if (PAD_LIST || CC_NV_UndefineSpaceSpecial) + TPMA_CC_INITIALIZER(0x011F, 0, 1, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_EvictControl) + TPMA_CC_INITIALIZER(0x0120, 0, 1, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_HierarchyControl) + TPMA_CC_INITIALIZER(0x0121, 0, 1, 1, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_UndefineSpace) + TPMA_CC_INITIALIZER(0x0122, 0, 1, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST) + TPMA_CC_INITIALIZER(0x0123, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ChangeEPS) + TPMA_CC_INITIALIZER(0x0124, 0, 1, 1, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ChangePPS) + TPMA_CC_INITIALIZER(0x0125, 0, 1, 1, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Clear) + TPMA_CC_INITIALIZER(0x0126, 0, 1, 1, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ClearControl) + TPMA_CC_INITIALIZER(0x0127, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ClockSet) + TPMA_CC_INITIALIZER(0x0128, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_HierarchyChangeAuth) + TPMA_CC_INITIALIZER(0x0129, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_DefineSpace) + TPMA_CC_INITIALIZER(0x012A, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PCR_Allocate) + TPMA_CC_INITIALIZER(0x012B, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PCR_SetAuthPolicy) + TPMA_CC_INITIALIZER(0x012C, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PP_Commands) + TPMA_CC_INITIALIZER(0x012D, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_SetPrimaryPolicy) + TPMA_CC_INITIALIZER(0x012E, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_FieldUpgradeStart) + TPMA_CC_INITIALIZER(0x012F, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ClockRateAdjust) + TPMA_CC_INITIALIZER(0x0130, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_CreatePrimary) + TPMA_CC_INITIALIZER(0x0131, 0, 0, 0, 0, 1, 1, 0, 0), +#endif +#if (PAD_LIST || CC_NV_GlobalWriteLock) + TPMA_CC_INITIALIZER(0x0132, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_GetCommandAuditDigest) + TPMA_CC_INITIALIZER(0x0133, 0, 1, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_Increment) + TPMA_CC_INITIALIZER(0x0134, 0, 1, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_SetBits) + TPMA_CC_INITIALIZER(0x0135, 0, 1, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_Extend) + TPMA_CC_INITIALIZER(0x0136, 0, 1, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_Write) + TPMA_CC_INITIALIZER(0x0137, 0, 1, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_WriteLock) + TPMA_CC_INITIALIZER(0x0138, 0, 1, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_DictionaryAttackLockReset) + TPMA_CC_INITIALIZER(0x0139, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_DictionaryAttackParameters) + TPMA_CC_INITIALIZER(0x013A, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_ChangeAuth) + TPMA_CC_INITIALIZER(0x013B, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PCR_Event) + TPMA_CC_INITIALIZER(0x013C, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PCR_Reset) + TPMA_CC_INITIALIZER(0x013D, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_SequenceComplete) + TPMA_CC_INITIALIZER(0x013E, 0, 0, 0, 1, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_SetAlgorithmSet) + TPMA_CC_INITIALIZER(0x013F, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_SetCommandCodeAuditStatus) + TPMA_CC_INITIALIZER(0x0140, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_FieldUpgradeData) + TPMA_CC_INITIALIZER(0x0141, 0, 1, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_IncrementalSelfTest) + TPMA_CC_INITIALIZER(0x0142, 0, 1, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_SelfTest) + TPMA_CC_INITIALIZER(0x0143, 0, 1, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Startup) + TPMA_CC_INITIALIZER(0x0144, 0, 1, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Shutdown) + TPMA_CC_INITIALIZER(0x0145, 0, 1, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_StirRandom) + TPMA_CC_INITIALIZER(0x0146, 0, 1, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ActivateCredential) + TPMA_CC_INITIALIZER(0x0147, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Certify) + TPMA_CC_INITIALIZER(0x0148, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyNV) + TPMA_CC_INITIALIZER(0x0149, 0, 0, 0, 0, 3, 0, 0, 0), +#endif +#if (PAD_LIST || CC_CertifyCreation) + TPMA_CC_INITIALIZER(0x014A, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Duplicate) + TPMA_CC_INITIALIZER(0x014B, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_GetTime) + TPMA_CC_INITIALIZER(0x014C, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_GetSessionAuditDigest) + TPMA_CC_INITIALIZER(0x014D, 0, 0, 0, 0, 3, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_Read) + TPMA_CC_INITIALIZER(0x014E, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_ReadLock) + TPMA_CC_INITIALIZER(0x014F, 0, 1, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ObjectChangeAuth) + TPMA_CC_INITIALIZER(0x0150, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicySecret) + TPMA_CC_INITIALIZER(0x0151, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Rewrap) + TPMA_CC_INITIALIZER(0x0152, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Create) + TPMA_CC_INITIALIZER(0x0153, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ECDH_ZGen) + TPMA_CC_INITIALIZER(0x0154, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || (CC_HMAC || CC_MAC)) + TPMA_CC_INITIALIZER(0x0155, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Import) + TPMA_CC_INITIALIZER(0x0156, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Load) + TPMA_CC_INITIALIZER(0x0157, 0, 0, 0, 0, 1, 1, 0, 0), +#endif +#if (PAD_LIST || CC_Quote) + TPMA_CC_INITIALIZER(0x0158, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_RSA_Decrypt) + TPMA_CC_INITIALIZER(0x0159, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST) + TPMA_CC_INITIALIZER(0x015A, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || (CC_HMAC_Start || CC_MAC_Start)) + TPMA_CC_INITIALIZER(0x015B, 0, 0, 0, 0, 1, 1, 0, 0), +#endif +#if (PAD_LIST || CC_SequenceUpdate) + TPMA_CC_INITIALIZER(0x015C, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Sign) + TPMA_CC_INITIALIZER(0x015D, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Unseal) + TPMA_CC_INITIALIZER(0x015E, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST) + TPMA_CC_INITIALIZER(0x015F, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicySigned) + TPMA_CC_INITIALIZER(0x0160, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ContextLoad) + TPMA_CC_INITIALIZER(0x0161, 0, 0, 0, 0, 0, 1, 0, 0), +#endif +#if (PAD_LIST || CC_ContextSave) + TPMA_CC_INITIALIZER(0x0162, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ECDH_KeyGen) + TPMA_CC_INITIALIZER(0x0163, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_EncryptDecrypt) + TPMA_CC_INITIALIZER(0x0164, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_FlushContext) + TPMA_CC_INITIALIZER(0x0165, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST) + TPMA_CC_INITIALIZER(0x0166, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_LoadExternal) + TPMA_CC_INITIALIZER(0x0167, 0, 0, 0, 0, 0, 1, 0, 0), +#endif +#if (PAD_LIST || CC_MakeCredential) + TPMA_CC_INITIALIZER(0x0168, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_ReadPublic) + TPMA_CC_INITIALIZER(0x0169, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyAuthorize) + TPMA_CC_INITIALIZER(0x016A, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyAuthValue) + TPMA_CC_INITIALIZER(0x016B, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyCommandCode) + TPMA_CC_INITIALIZER(0x016C, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyCounterTimer) + TPMA_CC_INITIALIZER(0x016D, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyCpHash) + TPMA_CC_INITIALIZER(0x016E, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyLocality) + TPMA_CC_INITIALIZER(0x016F, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyNameHash) + TPMA_CC_INITIALIZER(0x0170, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyOR) + TPMA_CC_INITIALIZER(0x0171, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyTicket) + TPMA_CC_INITIALIZER(0x0172, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ReadPublic) + TPMA_CC_INITIALIZER(0x0173, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_RSA_Encrypt) + TPMA_CC_INITIALIZER(0x0174, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST) + TPMA_CC_INITIALIZER(0x0175, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_StartAuthSession) + TPMA_CC_INITIALIZER(0x0176, 0, 0, 0, 0, 2, 1, 0, 0), +#endif +#if (PAD_LIST || CC_VerifySignature) + TPMA_CC_INITIALIZER(0x0177, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ECC_Parameters) + TPMA_CC_INITIALIZER(0x0178, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_FirmwareRead) + TPMA_CC_INITIALIZER(0x0179, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_GetCapability) + TPMA_CC_INITIALIZER(0x017A, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_GetRandom) + TPMA_CC_INITIALIZER(0x017B, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_GetTestResult) + TPMA_CC_INITIALIZER(0x017C, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Hash) + TPMA_CC_INITIALIZER(0x017D, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PCR_Read) + TPMA_CC_INITIALIZER(0x017E, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyPCR) + TPMA_CC_INITIALIZER(0x017F, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyRestart) + TPMA_CC_INITIALIZER(0x0180, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ReadClock) + TPMA_CC_INITIALIZER(0x0181, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PCR_Extend) + TPMA_CC_INITIALIZER(0x0182, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PCR_SetAuthValue) + TPMA_CC_INITIALIZER(0x0183, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_Certify) + TPMA_CC_INITIALIZER(0x0184, 0, 0, 0, 0, 3, 0, 0, 0), +#endif +#if (PAD_LIST || CC_EventSequenceComplete) + TPMA_CC_INITIALIZER(0x0185, 0, 1, 0, 1, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_HashSequenceStart) + TPMA_CC_INITIALIZER(0x0186, 0, 0, 0, 0, 0, 1, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyPhysicalPresence) + TPMA_CC_INITIALIZER(0x0187, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyDuplicationSelect) + TPMA_CC_INITIALIZER(0x0188, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyGetDigest) + TPMA_CC_INITIALIZER(0x0189, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_TestParms) + TPMA_CC_INITIALIZER(0x018A, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Commit) + TPMA_CC_INITIALIZER(0x018B, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyPassword) + TPMA_CC_INITIALIZER(0x018C, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ZGen_2Phase) + TPMA_CC_INITIALIZER(0x018D, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_EC_Ephemeral) + TPMA_CC_INITIALIZER(0x018E, 0, 0, 0, 0, 0, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyNvWritten) + TPMA_CC_INITIALIZER(0x018F, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyTemplate) + TPMA_CC_INITIALIZER(0x0190, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_CreateLoaded) + TPMA_CC_INITIALIZER(0x0191, 0, 0, 0, 0, 1, 1, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyAuthorizeNV) + TPMA_CC_INITIALIZER(0x0192, 0, 0, 0, 0, 3, 0, 0, 0), +#endif +#if (PAD_LIST || CC_EncryptDecrypt2) + TPMA_CC_INITIALIZER(0x0193, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_AC_GetCapability) + TPMA_CC_INITIALIZER(0x0194, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_AC_Send) + TPMA_CC_INITIALIZER(0x0195, 0, 0, 0, 0, 3, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Policy_AC_SendSelect) + TPMA_CC_INITIALIZER(0x0196, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_CertifyX509) + TPMA_CC_INITIALIZER(0x0197, 0, 0, 0, 0, 2, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ACT_SetTimeout) + TPMA_CC_INITIALIZER(0x0198, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ECC_Encrypt) + TPMA_CC_INITIALIZER(0x0199, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_ECC_Decrypt) + TPMA_CC_INITIALIZER(0x019A, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyCapability) + TPMA_CC_INITIALIZER(0x019B, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_PolicyParameters) + TPMA_CC_INITIALIZER(0x019C, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_DefineSpace2) + TPMA_CC_INITIALIZER(0x019D, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_NV_ReadPublic2) + TPMA_CC_INITIALIZER(0x019E, 0, 0, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_SetCapability) + TPMA_CC_INITIALIZER(0x019F, 0, 1, 0, 0, 1, 0, 0, 0), +#endif +#if (PAD_LIST || CC_Vendor_TCG_Test) + TPMA_CC_INITIALIZER(0x0000, 0, 0, 0, 0, 0, 0, 1, 0), +#endif + TPMA_ZERO_INITIALIZER() +}; + + +// This is the command code attribute structure. +const COMMAND_ATTRIBUTES s_commandAttributes [] = { +#if (PAD_LIST || CC_NV_UndefineSpaceSpecial) + (COMMAND_ATTRIBUTES)(CC_NV_UndefineSpaceSpecial * // 0x011F + (IS_IMPLEMENTED+HANDLE_1_ADMIN+HANDLE_2_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_EvictControl) + (COMMAND_ATTRIBUTES)(CC_EvictControl * // 0x0120 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_HierarchyControl) + (COMMAND_ATTRIBUTES)(CC_HierarchyControl * // 0x0121 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_NV_UndefineSpace) + (COMMAND_ATTRIBUTES)(CC_NV_UndefineSpace * // 0x0122 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST) + (COMMAND_ATTRIBUTES)(0), // 0x0123 +#endif +#if (PAD_LIST || CC_ChangeEPS) + (COMMAND_ATTRIBUTES)(CC_ChangeEPS * // 0x0124 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_ChangePPS) + (COMMAND_ATTRIBUTES)(CC_ChangePPS * // 0x0125 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_Clear) + (COMMAND_ATTRIBUTES)(CC_Clear * // 0x0126 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_ClearControl) + (COMMAND_ATTRIBUTES)(CC_ClearControl * // 0x0127 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_ClockSet) + (COMMAND_ATTRIBUTES)(CC_ClockSet * // 0x0128 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_HierarchyChangeAuth) + (COMMAND_ATTRIBUTES)(CC_HierarchyChangeAuth * // 0x0129 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_NV_DefineSpace) + (COMMAND_ATTRIBUTES)(CC_NV_DefineSpace * // 0x012A + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_PCR_Allocate) + (COMMAND_ATTRIBUTES)(CC_PCR_Allocate * // 0x012B + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_PCR_SetAuthPolicy) + (COMMAND_ATTRIBUTES)(CC_PCR_SetAuthPolicy * // 0x012C + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_PP_Commands) + (COMMAND_ATTRIBUTES)(CC_PP_Commands * // 0x012D + (IS_IMPLEMENTED+HANDLE_1_USER+PP_REQUIRED)), +#endif +#if (PAD_LIST || CC_SetPrimaryPolicy) + (COMMAND_ATTRIBUTES)(CC_SetPrimaryPolicy * // 0x012E + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_FieldUpgradeStart) + (COMMAND_ATTRIBUTES)(CC_FieldUpgradeStart * // 0x012F + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_ADMIN+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_ClockRateAdjust) + (COMMAND_ATTRIBUTES)(CC_ClockRateAdjust * // 0x0130 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_CreatePrimary) + (COMMAND_ATTRIBUTES)(CC_CreatePrimary * // 0x0131 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+PP_COMMAND+ENCRYPT_2+R_HANDLE)), +#endif +#if (PAD_LIST || CC_NV_GlobalWriteLock) + (COMMAND_ATTRIBUTES)(CC_NV_GlobalWriteLock * // 0x0132 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_GetCommandAuditDigest) + (COMMAND_ATTRIBUTES)(CC_GetCommandAuditDigest * // 0x0133 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+HANDLE_2_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_NV_Increment) + (COMMAND_ATTRIBUTES)(CC_NV_Increment * // 0x0134 + (IS_IMPLEMENTED+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_NV_SetBits) + (COMMAND_ATTRIBUTES)(CC_NV_SetBits * // 0x0135 + (IS_IMPLEMENTED+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_NV_Extend) + (COMMAND_ATTRIBUTES)(CC_NV_Extend * // 0x0136 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_NV_Write) + (COMMAND_ATTRIBUTES)(CC_NV_Write * // 0x0137 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_NV_WriteLock) + (COMMAND_ATTRIBUTES)(CC_NV_WriteLock * // 0x0138 + (IS_IMPLEMENTED+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_DictionaryAttackLockReset) + (COMMAND_ATTRIBUTES)(CC_DictionaryAttackLockReset * // 0x0139 + (IS_IMPLEMENTED+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_DictionaryAttackParameters) + (COMMAND_ATTRIBUTES)(CC_DictionaryAttackParameters * // 0x013A + (IS_IMPLEMENTED+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_NV_ChangeAuth) + (COMMAND_ATTRIBUTES)(CC_NV_ChangeAuth * // 0x013B + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_ADMIN)), +#endif +#if (PAD_LIST || CC_PCR_Event) + (COMMAND_ATTRIBUTES)(CC_PCR_Event * // 0x013C + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_PCR_Reset) + (COMMAND_ATTRIBUTES)(CC_PCR_Reset * // 0x013D + (IS_IMPLEMENTED+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_SequenceComplete) + (COMMAND_ATTRIBUTES)(CC_SequenceComplete * // 0x013E + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_SetAlgorithmSet) + (COMMAND_ATTRIBUTES)(CC_SetAlgorithmSet * // 0x013F + (IS_IMPLEMENTED+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_SetCommandCodeAuditStatus) + (COMMAND_ATTRIBUTES)(CC_SetCommandCodeAuditStatus * // 0x0140 + (IS_IMPLEMENTED+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_FieldUpgradeData) + (COMMAND_ATTRIBUTES)(CC_FieldUpgradeData * // 0x0141 + (IS_IMPLEMENTED+DECRYPT_2)), +#endif +#if (PAD_LIST || CC_IncrementalSelfTest) + (COMMAND_ATTRIBUTES)(CC_IncrementalSelfTest * // 0x0142 + (IS_IMPLEMENTED)), +#endif +#if (PAD_LIST || CC_SelfTest) + (COMMAND_ATTRIBUTES)(CC_SelfTest * // 0x0143 + (IS_IMPLEMENTED)), +#endif +#if (PAD_LIST || CC_Startup) + (COMMAND_ATTRIBUTES)(CC_Startup * // 0x0144 + (IS_IMPLEMENTED+NO_SESSIONS)), +#endif +#if (PAD_LIST || CC_Shutdown) + (COMMAND_ATTRIBUTES)(CC_Shutdown * // 0x0145 + (IS_IMPLEMENTED)), +#endif +#if (PAD_LIST || CC_StirRandom) + (COMMAND_ATTRIBUTES)(CC_StirRandom * // 0x0146 + (IS_IMPLEMENTED+DECRYPT_2)), +#endif +#if (PAD_LIST || CC_ActivateCredential) + (COMMAND_ATTRIBUTES)(CC_ActivateCredential * // 0x0147 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_ADMIN+HANDLE_2_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_Certify) + (COMMAND_ATTRIBUTES)(CC_Certify * // 0x0148 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_ADMIN+HANDLE_2_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_PolicyNV) + (COMMAND_ATTRIBUTES)(CC_PolicyNV * // 0x0149 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_CertifyCreation) + (COMMAND_ATTRIBUTES)(CC_CertifyCreation * // 0x014A + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_Duplicate) + (COMMAND_ATTRIBUTES)(CC_Duplicate * // 0x014B + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_DUP+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_GetTime) + (COMMAND_ATTRIBUTES)(CC_GetTime * // 0x014C + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+HANDLE_2_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_GetSessionAuditDigest) + (COMMAND_ATTRIBUTES)(CC_GetSessionAuditDigest * // 0x014D + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+HANDLE_2_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_NV_Read) + (COMMAND_ATTRIBUTES)(CC_NV_Read * // 0x014E + (IS_IMPLEMENTED+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_NV_ReadLock) + (COMMAND_ATTRIBUTES)(CC_NV_ReadLock * // 0x014F + (IS_IMPLEMENTED+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_ObjectChangeAuth) + (COMMAND_ATTRIBUTES)(CC_ObjectChangeAuth * // 0x0150 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_ADMIN+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_PolicySecret) + (COMMAND_ATTRIBUTES)(CC_PolicySecret * // 0x0151 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ALLOW_TRIAL+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_Rewrap) + (COMMAND_ATTRIBUTES)(CC_Rewrap * // 0x0152 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_Create) + (COMMAND_ATTRIBUTES)(CC_Create * // 0x0153 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_ECDH_ZGen) + (COMMAND_ATTRIBUTES)(CC_ECDH_ZGen * // 0x0154 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || (CC_HMAC || CC_MAC)) + (COMMAND_ATTRIBUTES)((CC_HMAC || CC_MAC) * // 0x0155 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_Import) + (COMMAND_ATTRIBUTES)(CC_Import * // 0x0156 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_Load) + (COMMAND_ATTRIBUTES)(CC_Load * // 0x0157 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2+R_HANDLE)), +#endif +#if (PAD_LIST || CC_Quote) + (COMMAND_ATTRIBUTES)(CC_Quote * // 0x0158 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_RSA_Decrypt) + (COMMAND_ATTRIBUTES)(CC_RSA_Decrypt * // 0x0159 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST) + (COMMAND_ATTRIBUTES)(0), // 0x015A +#endif +#if (PAD_LIST || (CC_HMAC_Start || CC_MAC_Start)) + (COMMAND_ATTRIBUTES)((CC_HMAC_Start || CC_MAC_Start) * // 0x015B + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+R_HANDLE)), +#endif +#if (PAD_LIST || CC_SequenceUpdate) + (COMMAND_ATTRIBUTES)(CC_SequenceUpdate * // 0x015C + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_Sign) + (COMMAND_ATTRIBUTES)(CC_Sign * // 0x015D + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_Unseal) + (COMMAND_ATTRIBUTES)(CC_Unseal * // 0x015E + (IS_IMPLEMENTED+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST) + (COMMAND_ATTRIBUTES)(0), // 0x015F +#endif +#if (PAD_LIST || CC_PolicySigned) + (COMMAND_ATTRIBUTES)(CC_PolicySigned * // 0x0160 + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_ContextLoad) + (COMMAND_ATTRIBUTES)(CC_ContextLoad * // 0x0161 + (IS_IMPLEMENTED+NO_SESSIONS+R_HANDLE)), +#endif +#if (PAD_LIST || CC_ContextSave) + (COMMAND_ATTRIBUTES)(CC_ContextSave * // 0x0162 + (IS_IMPLEMENTED+NO_SESSIONS)), +#endif +#if (PAD_LIST || CC_ECDH_KeyGen) + (COMMAND_ATTRIBUTES)(CC_ECDH_KeyGen * // 0x0163 + (IS_IMPLEMENTED+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_EncryptDecrypt) + (COMMAND_ATTRIBUTES)(CC_EncryptDecrypt * // 0x0164 + (IS_IMPLEMENTED+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_FlushContext) + (COMMAND_ATTRIBUTES)(CC_FlushContext * // 0x0165 + (IS_IMPLEMENTED+NO_SESSIONS)), +#endif +#if (PAD_LIST) + (COMMAND_ATTRIBUTES)(0), // 0x0166 +#endif +#if (PAD_LIST || CC_LoadExternal) + (COMMAND_ATTRIBUTES)(CC_LoadExternal * // 0x0167 + (IS_IMPLEMENTED+DECRYPT_2+ENCRYPT_2+R_HANDLE)), +#endif +#if (PAD_LIST || CC_MakeCredential) + (COMMAND_ATTRIBUTES)(CC_MakeCredential * // 0x0168 + (IS_IMPLEMENTED+DECRYPT_2+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_NV_ReadPublic) + (COMMAND_ATTRIBUTES)(CC_NV_ReadPublic * // 0x0169 + (IS_IMPLEMENTED+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_PolicyAuthorize) + (COMMAND_ATTRIBUTES)(CC_PolicyAuthorize * // 0x016A + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyAuthValue) + (COMMAND_ATTRIBUTES)(CC_PolicyAuthValue * // 0x016B + (IS_IMPLEMENTED+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyCommandCode) + (COMMAND_ATTRIBUTES)(CC_PolicyCommandCode * // 0x016C + (IS_IMPLEMENTED+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyCounterTimer) + (COMMAND_ATTRIBUTES)(CC_PolicyCounterTimer * // 0x016D + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyCpHash) + (COMMAND_ATTRIBUTES)(CC_PolicyCpHash * // 0x016E + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyLocality) + (COMMAND_ATTRIBUTES)(CC_PolicyLocality * // 0x016F + (IS_IMPLEMENTED+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyNameHash) + (COMMAND_ATTRIBUTES)(CC_PolicyNameHash * // 0x0170 + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyOR) + (COMMAND_ATTRIBUTES)(CC_PolicyOR * // 0x0171 + (IS_IMPLEMENTED+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyTicket) + (COMMAND_ATTRIBUTES)(CC_PolicyTicket * // 0x0172 + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_ReadPublic) + (COMMAND_ATTRIBUTES)(CC_ReadPublic * // 0x0173 + (IS_IMPLEMENTED+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_RSA_Encrypt) + (COMMAND_ATTRIBUTES)(CC_RSA_Encrypt * // 0x0174 + (IS_IMPLEMENTED+DECRYPT_2+ENCRYPT_2)), +#endif +#if (PAD_LIST) + (COMMAND_ATTRIBUTES)(0), // 0x0175 +#endif +#if (PAD_LIST || CC_StartAuthSession) + (COMMAND_ATTRIBUTES)(CC_StartAuthSession * // 0x0176 + (IS_IMPLEMENTED+DECRYPT_2+ENCRYPT_2+R_HANDLE)), +#endif +#if (PAD_LIST || CC_VerifySignature) + (COMMAND_ATTRIBUTES)(CC_VerifySignature * // 0x0177 + (IS_IMPLEMENTED+DECRYPT_2)), +#endif +#if (PAD_LIST || CC_ECC_Parameters) + (COMMAND_ATTRIBUTES)(CC_ECC_Parameters * // 0x0178 + (IS_IMPLEMENTED)), +#endif +#if (PAD_LIST || CC_FirmwareRead) + (COMMAND_ATTRIBUTES)(CC_FirmwareRead * // 0x0179 + (IS_IMPLEMENTED+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_GetCapability) + (COMMAND_ATTRIBUTES)(CC_GetCapability * // 0x017A + (IS_IMPLEMENTED)), +#endif +#if (PAD_LIST || CC_GetRandom) + (COMMAND_ATTRIBUTES)(CC_GetRandom * // 0x017B + (IS_IMPLEMENTED+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_GetTestResult) + (COMMAND_ATTRIBUTES)(CC_GetTestResult * // 0x017C + (IS_IMPLEMENTED+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_Hash) + (COMMAND_ATTRIBUTES)(CC_Hash * // 0x017D + (IS_IMPLEMENTED+DECRYPT_2+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_PCR_Read) + (COMMAND_ATTRIBUTES)(CC_PCR_Read * // 0x017E + (IS_IMPLEMENTED)), +#endif +#if (PAD_LIST || CC_PolicyPCR) + (COMMAND_ATTRIBUTES)(CC_PolicyPCR * // 0x017F + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyRestart) + (COMMAND_ATTRIBUTES)(CC_PolicyRestart * // 0x0180 + (IS_IMPLEMENTED+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_ReadClock) + (COMMAND_ATTRIBUTES)(CC_ReadClock * // 0x0181 + (IS_IMPLEMENTED)), +#endif +#if (PAD_LIST || CC_PCR_Extend) + (COMMAND_ATTRIBUTES)(CC_PCR_Extend * // 0x0182 + (IS_IMPLEMENTED+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_PCR_SetAuthValue) + (COMMAND_ATTRIBUTES)(CC_PCR_SetAuthValue * // 0x0183 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_NV_Certify) + (COMMAND_ATTRIBUTES)(CC_NV_Certify * // 0x0184 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+HANDLE_2_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_EventSequenceComplete) + (COMMAND_ATTRIBUTES)(CC_EventSequenceComplete * // 0x0185 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+HANDLE_2_USER)), +#endif +#if (PAD_LIST || CC_HashSequenceStart) + (COMMAND_ATTRIBUTES)(CC_HashSequenceStart * // 0x0186 + (IS_IMPLEMENTED+DECRYPT_2+R_HANDLE)), +#endif +#if (PAD_LIST || CC_PolicyPhysicalPresence) + (COMMAND_ATTRIBUTES)(CC_PolicyPhysicalPresence * // 0x0187 + (IS_IMPLEMENTED+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyDuplicationSelect) + (COMMAND_ATTRIBUTES)(CC_PolicyDuplicationSelect * // 0x0188 + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyGetDigest) + (COMMAND_ATTRIBUTES)(CC_PolicyGetDigest * // 0x0189 + (IS_IMPLEMENTED+ALLOW_TRIAL+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_TestParms) + (COMMAND_ATTRIBUTES)(CC_TestParms * // 0x018A + (IS_IMPLEMENTED)), +#endif +#if (PAD_LIST || CC_Commit) + (COMMAND_ATTRIBUTES)(CC_Commit * // 0x018B + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_PolicyPassword) + (COMMAND_ATTRIBUTES)(CC_PolicyPassword * // 0x018C + (IS_IMPLEMENTED+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_ZGen_2Phase) + (COMMAND_ATTRIBUTES)(CC_ZGen_2Phase * // 0x018D + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_EC_Ephemeral) + (COMMAND_ATTRIBUTES)(CC_EC_Ephemeral * // 0x018E + (IS_IMPLEMENTED+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_PolicyNvWritten) + (COMMAND_ATTRIBUTES)(CC_PolicyNvWritten * // 0x018F + (IS_IMPLEMENTED+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyTemplate) + (COMMAND_ATTRIBUTES)(CC_PolicyTemplate * // 0x0190 + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_CreateLoaded) + (COMMAND_ATTRIBUTES)(CC_CreateLoaded * // 0x0191 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+PP_COMMAND+ENCRYPT_2+R_HANDLE)), +#endif +#if (PAD_LIST || CC_PolicyAuthorizeNV) + (COMMAND_ATTRIBUTES)(CC_PolicyAuthorizeNV * // 0x0192 + (IS_IMPLEMENTED+HANDLE_1_USER+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_EncryptDecrypt2) + (COMMAND_ATTRIBUTES)(CC_EncryptDecrypt2 * // 0x0193 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_AC_GetCapability) + (COMMAND_ATTRIBUTES)(CC_AC_GetCapability * // 0x0194 + (IS_IMPLEMENTED)), +#endif +#if (PAD_LIST || CC_AC_Send) + (COMMAND_ATTRIBUTES)(CC_AC_Send * // 0x0195 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_DUP+HANDLE_2_USER)), +#endif +#if (PAD_LIST || CC_Policy_AC_SendSelect) + (COMMAND_ATTRIBUTES)(CC_Policy_AC_SendSelect * // 0x0196 + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_CertifyX509) + (COMMAND_ATTRIBUTES)(CC_CertifyX509 * // 0x0197 + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_ADMIN+HANDLE_2_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_ACT_SetTimeout) + (COMMAND_ATTRIBUTES)(CC_ACT_SetTimeout * // 0x0198 + (IS_IMPLEMENTED+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_ECC_Encrypt) + (COMMAND_ATTRIBUTES)(CC_ECC_Encrypt * // 0x0199 + (IS_IMPLEMENTED+DECRYPT_2+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_ECC_Decrypt) + (COMMAND_ATTRIBUTES)(CC_ECC_Decrypt * // 0x019A + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_PolicyCapability) + (COMMAND_ATTRIBUTES)(CC_PolicyCapability * // 0x019B + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_PolicyParameters) + (COMMAND_ATTRIBUTES)(CC_PolicyParameters * // 0x019C + (IS_IMPLEMENTED+DECRYPT_2+ALLOW_TRIAL)), +#endif +#if (PAD_LIST || CC_NV_DefineSpace2) + (COMMAND_ATTRIBUTES)(CC_NV_DefineSpace2 * // 0x019D + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER+PP_COMMAND)), +#endif +#if (PAD_LIST || CC_NV_ReadPublic2) + (COMMAND_ATTRIBUTES)(CC_NV_ReadPublic2 * // 0x019E + (IS_IMPLEMENTED+ENCRYPT_2)), +#endif +#if (PAD_LIST || CC_SetCapability) + (COMMAND_ATTRIBUTES)(CC_SetCapability * // 0x019F + (IS_IMPLEMENTED+DECRYPT_2+HANDLE_1_USER)), +#endif +#if (PAD_LIST || CC_Vendor_TCG_Test) + (COMMAND_ATTRIBUTES)(CC_Vendor_TCG_Test * // 0x0000 + (IS_IMPLEMENTED+DECRYPT_2+ENCRYPT_2)), +#endif + 0 +}; + +#endif // _COMMAND_CODE_ATTRIBUTES_ diff --git a/TPMCmd/tpm/include/private/CommandAttributes.h b/TPMCmd/tpm/include/private/CommandAttributes.h new file mode 100644 index 00000000..0ce114ad --- /dev/null +++ b/TPMCmd/tpm/include/private/CommandAttributes.h @@ -0,0 +1,33 @@ +/*(Auto-generated) + * Created by TpmStructures; Version 4.4 Mar 26, 2019 + * Date: Aug 30, 2019 Time: 02:11:52PM + */ + +// The attributes defined in this file are produced by the parser that +// creates the structure definitions from Part 3. The attributes are defined +// in that parser and should track the attributes being tested in +// CommandCodeAttributes.c. Generally, when an attribute is added to this list, +// new code will be needed in CommandCodeAttributes.c to test it. + +#ifndef COMMAND_ATTRIBUTES_H +#define COMMAND_ATTRIBUTES_H + +typedef UINT16 COMMAND_ATTRIBUTES; +#define NOT_IMPLEMENTED (COMMAND_ATTRIBUTES)(0) +#define ENCRYPT_2 ((COMMAND_ATTRIBUTES)1 << 0) +#define ENCRYPT_4 ((COMMAND_ATTRIBUTES)1 << 1) +#define DECRYPT_2 ((COMMAND_ATTRIBUTES)1 << 2) +#define DECRYPT_4 ((COMMAND_ATTRIBUTES)1 << 3) +#define HANDLE_1_USER ((COMMAND_ATTRIBUTES)1 << 4) +#define HANDLE_1_ADMIN ((COMMAND_ATTRIBUTES)1 << 5) +#define HANDLE_1_DUP ((COMMAND_ATTRIBUTES)1 << 6) +#define HANDLE_2_USER ((COMMAND_ATTRIBUTES)1 << 7) +#define PP_COMMAND ((COMMAND_ATTRIBUTES)1 << 8) +#define IS_IMPLEMENTED ((COMMAND_ATTRIBUTES)1 << 9) +#define NO_SESSIONS ((COMMAND_ATTRIBUTES)1 << 10) +#define NV_COMMAND ((COMMAND_ATTRIBUTES)1 << 11) +#define PP_REQUIRED ((COMMAND_ATTRIBUTES)1 << 12) +#define R_HANDLE ((COMMAND_ATTRIBUTES)1 << 13) +#define ALLOW_TRIAL ((COMMAND_ATTRIBUTES)1 << 14) + +#endif // COMMAND_ATTRIBUTES_H diff --git a/TPMCmd/tpm/include/private/CommandDispatchData.h b/TPMCmd/tpm/include/private/CommandDispatchData.h new file mode 100644 index 00000000..a38b0190 --- /dev/null +++ b/TPMCmd/tpm/include/private/CommandDispatchData.h @@ -0,0 +1,5566 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT +// clang-format off + +// This file should only be included by CommandCodeAttributes.c +#ifdef _COMMAND_TABLE_DISPATCH_ + +// Define the stop value +#define END_OF_LIST 0xff +#define ADD_FLAG 0x80 + +// These macros provide some variability in how the data is encoded. They also +// make the lines a little shorter. :-) +// When TABLE_DRIVEN_MARSHAL is 'NO', the un/marshaling of parameters uses +// calls to the function that does the type-specific un/marshaling. When +// TABLE_DRIVEN_MARSHAL is 'YES', the un/marshaling of parameters calls the +// singular code with a value that is the offset of the data descriptor of the +// type. +#if TABLE_DRIVEN_MARSHAL +# define UNMARSHAL_DISPATCH(name) (marshalIndex_t)name##_MARSHAL_REF +# define MARSHAL_DISPATCH(name) (marshalIndex_t)name##_MARSHAL_REF +# define _UNMARSHAL_T_ marshalIndex_t +# define _MARSHAL_T_ marshalIndex_t +#else +# define UNMARSHAL_DISPATCH(name) (UNMARSHAL_t)name##_Unmarshal +# define MARSHAL_DISPATCH(name) (MARSHAL_t)name##_Marshal +# define _UNMARSHAL_T_ UNMARSHAL_t +# define _MARSHAL_T_ MARSHAL_t +#endif + +// The unmarshalArray contains the dispatch functions for the unmarshaling +// code. The defines in this array are used to make it easier to cross +// reference the unmarshaling values in the types array of each command + +const _UNMARSHAL_T_ unmarshalArray[] = { +#define TPMI_DH_CONTEXT_H_UNMARSHAL 0 + UNMARSHAL_DISPATCH(TPMI_DH_CONTEXT), +#define TPMI_RH_AC_H_UNMARSHAL (TPMI_DH_CONTEXT_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_AC), +#define TPMI_RH_ACT_H_UNMARSHAL (TPMI_RH_AC_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_ACT), +#define TPMI_RH_CLEAR_H_UNMARSHAL (TPMI_RH_ACT_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_CLEAR), +#define TPMI_RH_HIERARCHY_AUTH_H_UNMARSHAL (TPMI_RH_CLEAR_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_HIERARCHY_AUTH), +#define TPMI_RH_HIERARCHY_POLICY_H_UNMARSHAL \ + (TPMI_RH_HIERARCHY_AUTH_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_HIERARCHY_POLICY), +#define TPMI_RH_BASE_HIERARCHY_H_UNMARSHAL \ + (TPMI_RH_HIERARCHY_POLICY_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_BASE_HIERARCHY), +#define TPMI_RH_LOCKOUT_H_UNMARSHAL (TPMI_RH_BASE_HIERARCHY_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_LOCKOUT), +#define TPMI_RH_NV_AUTH_H_UNMARSHAL (TPMI_RH_LOCKOUT_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_NV_AUTH), +#define TPMI_RH_NV_DEFINED_INDEX_H_UNMARSHAL (TPMI_RH_NV_AUTH_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_NV_DEFINED_INDEX), +#define TPMI_RH_NV_INDEX_H_UNMARSHAL (TPMI_RH_NV_DEFINED_INDEX_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_NV_INDEX), +#define TPMI_RH_PLATFORM_H_UNMARSHAL (TPMI_RH_NV_INDEX_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_PLATFORM), +#define TPMI_RH_PROVISION_H_UNMARSHAL (TPMI_RH_PLATFORM_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_PROVISION), +#define TPMI_SH_HMAC_H_UNMARSHAL (TPMI_RH_PROVISION_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_SH_HMAC), +#define TPMI_SH_POLICY_H_UNMARSHAL (TPMI_SH_HMAC_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_SH_POLICY), +// HANDLE_FIRST_FLAG_TYPE is the first handle that needs a flag when called. +#define HANDLE_FIRST_FLAG_TYPE (TPMI_SH_POLICY_H_UNMARSHAL + 1) +#define TPMI_DH_ENTITY_H_UNMARSHAL (TPMI_SH_POLICY_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_DH_ENTITY), +#define TPMI_DH_OBJECT_H_UNMARSHAL (TPMI_DH_ENTITY_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_DH_OBJECT), +#define TPMI_DH_PARENT_H_UNMARSHAL (TPMI_DH_OBJECT_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_DH_PARENT), +#define TPMI_DH_PCR_H_UNMARSHAL (TPMI_DH_PARENT_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_DH_PCR), +#define TPMI_RH_ENDORSEMENT_H_UNMARSHAL (TPMI_DH_PCR_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_ENDORSEMENT), +#define TPMI_RH_HIERARCHY_H_UNMARSHAL (TPMI_RH_ENDORSEMENT_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_HIERARCHY), +// PARAMETER_FIRST_TYPE marks the end of the handle list. +#define PARAMETER_FIRST_TYPE (TPMI_RH_HIERARCHY_H_UNMARSHAL + 1) +#define TPM_AT_P_UNMARSHAL (TPMI_RH_HIERARCHY_H_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM_AT), +#define TPM_CAP_P_UNMARSHAL (TPM_AT_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM_CAP), +#define TPM_CLOCK_ADJUST_P_UNMARSHAL (TPM_CAP_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM_CLOCK_ADJUST), +#define TPM_EO_P_UNMARSHAL (TPM_CLOCK_ADJUST_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM_EO), +#define TPM_SE_P_UNMARSHAL (TPM_EO_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM_SE), +#define TPM_SU_P_UNMARSHAL (TPM_SE_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM_SU), +#define TPM2B_DATA_P_UNMARSHAL (TPM_SU_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_DATA), +#define TPM2B_DIGEST_P_UNMARSHAL (TPM2B_DATA_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_DIGEST), +#define TPM2B_ECC_PARAMETER_P_UNMARSHAL (TPM2B_DIGEST_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_ECC_PARAMETER), +#define TPM2B_ECC_POINT_P_UNMARSHAL (TPM2B_ECC_PARAMETER_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_ECC_POINT), +#define TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL (TPM2B_ECC_POINT_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_ENCRYPTED_SECRET), +#define TPM2B_EVENT_P_UNMARSHAL (TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_EVENT), +#define TPM2B_ID_OBJECT_P_UNMARSHAL (TPM2B_EVENT_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_ID_OBJECT), +#define TPM2B_IV_P_UNMARSHAL (TPM2B_ID_OBJECT_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_IV), +#define TPM2B_MAX_BUFFER_P_UNMARSHAL (TPM2B_IV_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_MAX_BUFFER), +#define TPM2B_MAX_NV_BUFFER_P_UNMARSHAL (TPM2B_MAX_BUFFER_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_MAX_NV_BUFFER), +#define TPM2B_NAME_P_UNMARSHAL (TPM2B_MAX_NV_BUFFER_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_NAME), +#define TPM2B_NV_PUBLIC_P_UNMARSHAL (TPM2B_NAME_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_NV_PUBLIC), +#define TPM2B_NV_PUBLIC_2_P_UNMARSHAL (TPM2B_NV_PUBLIC_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_NV_PUBLIC_2), +#define TPM2B_PRIVATE_P_UNMARSHAL (TPM2B_NV_PUBLIC_2_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_PRIVATE), +#define TPM2B_PUBLIC_KEY_RSA_P_UNMARSHAL (TPM2B_PRIVATE_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_PUBLIC_KEY_RSA), +#define TPM2B_SENSITIVE_P_UNMARSHAL (TPM2B_PUBLIC_KEY_RSA_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_SENSITIVE), +#define TPM2B_SENSITIVE_CREATE_P_UNMARSHAL (TPM2B_SENSITIVE_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_SENSITIVE_CREATE), +#define TPM2B_SENSITIVE_DATA_P_UNMARSHAL (TPM2B_SENSITIVE_CREATE_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_SENSITIVE_DATA), +#define TPM2B_SET_CAPABILITY_DATA_P_UNMARSHAL (TPM2B_SENSITIVE_DATA_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_SET_CAPABILITY_DATA), +#define TPM2B_TEMPLATE_P_UNMARSHAL (TPM2B_SET_CAPABILITY_DATA_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_TEMPLATE), +#define TPM2B_TIMEOUT_P_UNMARSHAL (TPM2B_TEMPLATE_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_TIMEOUT), +#define TPMI_DH_CONTEXT_P_UNMARSHAL (TPM2B_TIMEOUT_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_DH_CONTEXT), +#define TPMI_DH_PERSISTENT_P_UNMARSHAL (TPMI_DH_CONTEXT_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_DH_PERSISTENT), +#define TPMI_YES_NO_P_UNMARSHAL (TPMI_DH_PERSISTENT_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_YES_NO), +#define TPML_ALG_P_UNMARSHAL (TPMI_YES_NO_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPML_ALG), +#define TPML_CC_P_UNMARSHAL (TPML_ALG_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPML_CC), +#define TPML_DIGEST_P_UNMARSHAL (TPML_CC_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPML_DIGEST), +#define TPML_DIGEST_VALUES_P_UNMARSHAL (TPML_DIGEST_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPML_DIGEST_VALUES), +#define TPML_PCR_SELECTION_P_UNMARSHAL (TPML_DIGEST_VALUES_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPML_PCR_SELECTION), +#define TPMS_CONTEXT_P_UNMARSHAL (TPML_PCR_SELECTION_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMS_CONTEXT), +#define TPMT_PUBLIC_PARMS_P_UNMARSHAL (TPMS_CONTEXT_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_PUBLIC_PARMS), +#define TPMT_TK_AUTH_P_UNMARSHAL (TPMT_PUBLIC_PARMS_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_TK_AUTH), +#define TPMT_TK_CREATION_P_UNMARSHAL (TPMT_TK_AUTH_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_TK_CREATION), +#define TPMT_TK_HASHCHECK_P_UNMARSHAL (TPMT_TK_CREATION_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_TK_HASHCHECK), +#define TPMT_TK_VERIFIED_P_UNMARSHAL (TPMT_TK_HASHCHECK_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_TK_VERIFIED), +#define UINT16_P_UNMARSHAL (TPMT_TK_VERIFIED_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(UINT16), +#define UINT32_P_UNMARSHAL (UINT16_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(UINT32), +#define UINT64_P_UNMARSHAL (UINT32_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(UINT64), +#define UINT8_P_UNMARSHAL (UINT64_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(UINT8), +// PARAMETER_FIRST_FLAG_TYPE is the first parameter to need a flag. +#define PARAMETER_FIRST_FLAG_TYPE (UINT8_P_UNMARSHAL + 1) +#define TPM2B_PUBLIC_P_UNMARSHAL (UINT8_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPM2B_PUBLIC), +#define TPMI_ALG_CIPHER_MODE_P_UNMARSHAL (TPM2B_PUBLIC_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_ALG_CIPHER_MODE), +#define TPMI_ALG_HASH_P_UNMARSHAL (TPMI_ALG_CIPHER_MODE_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_ALG_HASH), +#define TPMI_ALG_MAC_SCHEME_P_UNMARSHAL (TPMI_ALG_HASH_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_ALG_MAC_SCHEME), +#define TPMI_DH_PCR_P_UNMARSHAL (TPMI_ALG_MAC_SCHEME_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_DH_PCR), +#define TPMI_ECC_CURVE_P_UNMARSHAL (TPMI_DH_PCR_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_ECC_CURVE), +#define TPMI_ECC_KEY_EXCHANGE_P_UNMARSHAL (TPMI_ECC_CURVE_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_ECC_KEY_EXCHANGE), +#define TPMI_RH_ENABLES_P_UNMARSHAL (TPMI_ECC_KEY_EXCHANGE_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_ENABLES), +#define TPMI_RH_HIERARCHY_P_UNMARSHAL (TPMI_RH_ENABLES_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMI_RH_HIERARCHY), +#define TPMT_KDF_SCHEME_P_UNMARSHAL (TPMI_RH_HIERARCHY_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_KDF_SCHEME), +#define TPMT_RSA_DECRYPT_P_UNMARSHAL (TPMT_KDF_SCHEME_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_RSA_DECRYPT), +#define TPMT_SIG_SCHEME_P_UNMARSHAL (TPMT_RSA_DECRYPT_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_SIG_SCHEME), +#define TPMT_SIGNATURE_P_UNMARSHAL (TPMT_SIG_SCHEME_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_SIGNATURE), +#define TPMT_SYM_DEF_P_UNMARSHAL (TPMT_SIGNATURE_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_SYM_DEF), +#define TPMT_SYM_DEF_OBJECT_P_UNMARSHAL (TPMT_SYM_DEF_P_UNMARSHAL + 1) + UNMARSHAL_DISPATCH(TPMT_SYM_DEF_OBJECT) +// PARAMETER_LAST_TYPE is the index of the last command parameter. +#define PARAMETER_LAST_TYPE (TPMT_SYM_DEF_OBJECT_P_UNMARSHAL) +}; + +// The marshalArray contains the dispatch functions for the marshaling code. +// The defines in this array are used to make it easier to cross reference the +// marshaling values in the types array of each command +const _MARSHAL_T_ marshalArray[] = { +#define UINT32_H_MARSHAL 0 + MARSHAL_DISPATCH(UINT32), +// RESPONSE_PARAMETER_FIRST_TYPE marks the end of the response handles. +#define RESPONSE_PARAMETER_FIRST_TYPE (UINT32_H_MARSHAL + 1) +#define TPM2B_ATTEST_P_MARSHAL (UINT32_H_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_ATTEST), +#define TPM2B_CREATION_DATA_P_MARSHAL (TPM2B_ATTEST_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_CREATION_DATA), +#define TPM2B_DATA_P_MARSHAL (TPM2B_CREATION_DATA_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_DATA), +#define TPM2B_DIGEST_P_MARSHAL (TPM2B_DATA_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_DIGEST), +#define TPM2B_ECC_POINT_P_MARSHAL (TPM2B_DIGEST_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_ECC_POINT), +#define TPM2B_ENCRYPTED_SECRET_P_MARSHAL (TPM2B_ECC_POINT_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_ENCRYPTED_SECRET), +#define TPM2B_ID_OBJECT_P_MARSHAL (TPM2B_ENCRYPTED_SECRET_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_ID_OBJECT), +#define TPM2B_IV_P_MARSHAL (TPM2B_ID_OBJECT_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_IV), +#define TPM2B_MAX_BUFFER_P_MARSHAL (TPM2B_IV_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_MAX_BUFFER), +#define TPM2B_MAX_NV_BUFFER_P_MARSHAL (TPM2B_MAX_BUFFER_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_MAX_NV_BUFFER), +#define TPM2B_NAME_P_MARSHAL (TPM2B_MAX_NV_BUFFER_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_NAME), +#define TPM2B_NV_PUBLIC_P_MARSHAL (TPM2B_NAME_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_NV_PUBLIC), +#define TPM2B_NV_PUBLIC_2_P_MARSHAL (TPM2B_NV_PUBLIC_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_NV_PUBLIC_2), +#define TPM2B_PRIVATE_P_MARSHAL (TPM2B_NV_PUBLIC_2_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_PRIVATE), +#define TPM2B_PUBLIC_P_MARSHAL (TPM2B_PRIVATE_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_PUBLIC), +#define TPM2B_PUBLIC_KEY_RSA_P_MARSHAL (TPM2B_PUBLIC_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_PUBLIC_KEY_RSA), +#define TPM2B_SENSITIVE_DATA_P_MARSHAL (TPM2B_PUBLIC_KEY_RSA_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_SENSITIVE_DATA), +#define TPM2B_TIMEOUT_P_MARSHAL (TPM2B_SENSITIVE_DATA_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPM2B_TIMEOUT), +#define TPML_AC_CAPABILITIES_P_MARSHAL (TPM2B_TIMEOUT_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPML_AC_CAPABILITIES), +#define TPML_ALG_P_MARSHAL (TPML_AC_CAPABILITIES_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPML_ALG), +#define TPML_DIGEST_P_MARSHAL (TPML_ALG_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPML_DIGEST), +#define TPML_DIGEST_VALUES_P_MARSHAL (TPML_DIGEST_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPML_DIGEST_VALUES), +#define TPML_PCR_SELECTION_P_MARSHAL (TPML_DIGEST_VALUES_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPML_PCR_SELECTION), +#define TPMS_AC_OUTPUT_P_MARSHAL (TPML_PCR_SELECTION_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMS_AC_OUTPUT), +#define TPMS_ALGORITHM_DETAIL_ECC_P_MARSHAL (TPMS_AC_OUTPUT_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMS_ALGORITHM_DETAIL_ECC), +#define TPMS_CAPABILITY_DATA_P_MARSHAL (TPMS_ALGORITHM_DETAIL_ECC_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMS_CAPABILITY_DATA), +#define TPMS_CONTEXT_P_MARSHAL (TPMS_CAPABILITY_DATA_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMS_CONTEXT), +#define TPMS_TIME_INFO_P_MARSHAL (TPMS_CONTEXT_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMS_TIME_INFO), +#define TPMT_HA_P_MARSHAL (TPMS_TIME_INFO_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMT_HA), +#define TPMT_SIGNATURE_P_MARSHAL (TPMT_HA_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMT_SIGNATURE), +#define TPMT_TK_AUTH_P_MARSHAL (TPMT_SIGNATURE_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMT_TK_AUTH), +#define TPMT_TK_CREATION_P_MARSHAL (TPMT_TK_AUTH_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMT_TK_CREATION), +#define TPMT_TK_HASHCHECK_P_MARSHAL (TPMT_TK_CREATION_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMT_TK_HASHCHECK), +#define TPMT_TK_VERIFIED_P_MARSHAL (TPMT_TK_HASHCHECK_P_MARSHAL + 1) + MARSHAL_DISPATCH(TPMT_TK_VERIFIED), +#define UINT16_P_MARSHAL (TPMT_TK_VERIFIED_P_MARSHAL + 1) + MARSHAL_DISPATCH(UINT16), +#define UINT32_P_MARSHAL (UINT16_P_MARSHAL + 1) + MARSHAL_DISPATCH(UINT32), +#define UINT8_P_MARSHAL (UINT32_P_MARSHAL + 1) + MARSHAL_DISPATCH(UINT8) +// RESPONSE_PARAMETER_LAST_TYPE is the index of the last response parameter. +#define RESPONSE_PARAMETER_LAST_TYPE (UINT8_P_MARSHAL) +}; + +// This list of aliases allows the types in the _COMMAND_DESCRIPTOR_t to match +// the types in the command/response templates of part 3. +#define TPM2B_NONCE_P_UNMARSHAL TPM2B_DIGEST_P_UNMARSHAL +#define TPM2B_AUTH_P_UNMARSHAL TPM2B_DIGEST_P_UNMARSHAL +#define TPM2B_OPERAND_P_UNMARSHAL TPM2B_DIGEST_P_UNMARSHAL +#define INT32_P_UNMARSHAL UINT32_P_UNMARSHAL +#define TPM_CC_P_UNMARSHAL UINT32_P_UNMARSHAL +#define TPMA_LOCALITY_P_UNMARSHAL UINT8_P_UNMARSHAL +#define TPMI_SH_AUTH_SESSION_H_MARSHAL UINT32_H_MARSHAL +#define TPM_HANDLE_H_MARSHAL UINT32_H_MARSHAL +#define TPMI_DH_OBJECT_H_MARSHAL UINT32_H_MARSHAL +#define TPMI_DH_CONTEXT_H_MARSHAL UINT32_H_MARSHAL +#define TPM2B_NONCE_P_MARSHAL TPM2B_DIGEST_P_MARSHAL +#define TPM_RC_P_MARSHAL UINT32_P_MARSHAL +#define TPMI_YES_NO_P_MARSHAL UINT8_P_MARSHAL + + +// Per-command un/marshaling tables + +#if CC_Startup +#include "Startup_fp.h" + +typedef TPM_RC (Startup_Entry)( + Startup_In* in +); + + +typedef const struct +{ + Startup_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} Startup_COMMAND_DESCRIPTOR_t; + +Startup_COMMAND_DESCRIPTOR_t _StartupData = { + /* entry */ &TPM2_Startup, + /* inSize */ (UINT16)(sizeof(Startup_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(Startup_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPM_SU_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _StartupDataAddress (&_StartupData) +#else +#define _StartupDataAddress 0 +#endif // CC_Startup + +#if CC_Shutdown +#include "Shutdown_fp.h" + +typedef TPM_RC (Shutdown_Entry)( + Shutdown_In* in +); + + +typedef const struct +{ + Shutdown_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} Shutdown_COMMAND_DESCRIPTOR_t; + +Shutdown_COMMAND_DESCRIPTOR_t _ShutdownData = { + /* entry */ &TPM2_Shutdown, + /* inSize */ (UINT16)(sizeof(Shutdown_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(Shutdown_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPM_SU_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _ShutdownDataAddress (&_ShutdownData) +#else +#define _ShutdownDataAddress 0 +#endif // CC_Shutdown + +#if CC_SelfTest +#include "SelfTest_fp.h" + +typedef TPM_RC (SelfTest_Entry)( + SelfTest_In* in +); + + +typedef const struct +{ + SelfTest_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} SelfTest_COMMAND_DESCRIPTOR_t; + +SelfTest_COMMAND_DESCRIPTOR_t _SelfTestData = { + /* entry */ &TPM2_SelfTest, + /* inSize */ (UINT16)(sizeof(SelfTest_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(SelfTest_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_YES_NO_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _SelfTestDataAddress (&_SelfTestData) +#else +#define _SelfTestDataAddress 0 +#endif // CC_SelfTest + +#if CC_IncrementalSelfTest +#include "IncrementalSelfTest_fp.h" + +typedef TPM_RC (IncrementalSelfTest_Entry)( + IncrementalSelfTest_In* in, + IncrementalSelfTest_Out* out +); + + +typedef const struct +{ + IncrementalSelfTest_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[4]; +} IncrementalSelfTest_COMMAND_DESCRIPTOR_t; + +IncrementalSelfTest_COMMAND_DESCRIPTOR_t _IncrementalSelfTestData = { + /* entry */ &TPM2_IncrementalSelfTest, + /* inSize */ (UINT16)(sizeof(IncrementalSelfTest_In)), + /* outSize */ (UINT16)(sizeof(IncrementalSelfTest_Out)), + /* offsetOfTypes */ offsetof(IncrementalSelfTest_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPML_ALG_P_UNMARSHAL, + END_OF_LIST, + TPML_ALG_P_MARSHAL, + END_OF_LIST} +}; + +#define _IncrementalSelfTestDataAddress (&_IncrementalSelfTestData) +#else +#define _IncrementalSelfTestDataAddress 0 +#endif // CC_IncrementalSelfTest + +#if CC_GetTestResult +#include "GetTestResult_fp.h" + +typedef TPM_RC (GetTestResult_Entry)( + GetTestResult_Out* out +); + + +typedef const struct +{ + GetTestResult_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} GetTestResult_COMMAND_DESCRIPTOR_t; + +GetTestResult_COMMAND_DESCRIPTOR_t _GetTestResultData = { + /* entry */ &TPM2_GetTestResult, + /* inSize */ 0, + /* outSize */ (UINT16)(sizeof(GetTestResult_Out)), + /* offsetOfTypes */ offsetof(GetTestResult_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(GetTestResult_Out, testResult))}, + /* types */ {END_OF_LIST, + TPM2B_MAX_BUFFER_P_MARSHAL, + TPM_RC_P_MARSHAL, + END_OF_LIST} +}; + +#define _GetTestResultDataAddress (&_GetTestResultData) +#else +#define _GetTestResultDataAddress 0 +#endif // CC_GetTestResult + +#if CC_StartAuthSession +#include "StartAuthSession_fp.h" + +typedef TPM_RC (StartAuthSession_Entry)( + StartAuthSession_In* in, + StartAuthSession_Out* out +); + + +typedef const struct +{ + StartAuthSession_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[7]; + BYTE types[11]; +} StartAuthSession_COMMAND_DESCRIPTOR_t; + +StartAuthSession_COMMAND_DESCRIPTOR_t _StartAuthSessionData = { + /* entry */ &TPM2_StartAuthSession, + /* inSize */ (UINT16)(sizeof(StartAuthSession_In)), + /* outSize */ (UINT16)(sizeof(StartAuthSession_Out)), + /* offsetOfTypes */ offsetof(StartAuthSession_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(StartAuthSession_In, bind)), + (UINT16)(offsetof(StartAuthSession_In, nonceCaller)), + (UINT16)(offsetof(StartAuthSession_In, encryptedSalt)), + (UINT16)(offsetof(StartAuthSession_In, sessionType)), + (UINT16)(offsetof(StartAuthSession_In, symmetric)), + (UINT16)(offsetof(StartAuthSession_In, authHash)), + (UINT16)(offsetof(StartAuthSession_Out, nonceTPM))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPMI_DH_ENTITY_H_UNMARSHAL + ADD_FLAG, + TPM2B_NONCE_P_UNMARSHAL, + TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL, + TPM_SE_P_UNMARSHAL, + TPMT_SYM_DEF_P_UNMARSHAL + ADD_FLAG, + TPMI_ALG_HASH_P_UNMARSHAL, + END_OF_LIST, + TPMI_SH_AUTH_SESSION_H_MARSHAL, + TPM2B_NONCE_P_MARSHAL, + END_OF_LIST} +}; + +#define _StartAuthSessionDataAddress (&_StartAuthSessionData) +#else +#define _StartAuthSessionDataAddress 0 +#endif // CC_StartAuthSession + +#if CC_PolicyRestart +#include "PolicyRestart_fp.h" + +typedef TPM_RC (PolicyRestart_Entry)( + PolicyRestart_In* in +); + + +typedef const struct +{ + PolicyRestart_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} PolicyRestart_COMMAND_DESCRIPTOR_t; + +PolicyRestart_COMMAND_DESCRIPTOR_t _PolicyRestartData = { + /* entry */ &TPM2_PolicyRestart, + /* inSize */ (UINT16)(sizeof(PolicyRestart_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyRestart_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyRestartDataAddress (&_PolicyRestartData) +#else +#define _PolicyRestartDataAddress 0 +#endif // CC_PolicyRestart + +#if CC_Create +#include "Create_fp.h" + +typedef TPM_RC (Create_Entry)( + Create_In* in, + Create_Out* out +); + + +typedef const struct +{ + Create_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[8]; + BYTE types[12]; +} Create_COMMAND_DESCRIPTOR_t; + +Create_COMMAND_DESCRIPTOR_t _CreateData = { + /* entry */ &TPM2_Create, + /* inSize */ (UINT16)(sizeof(Create_In)), + /* outSize */ (UINT16)(sizeof(Create_Out)), + /* offsetOfTypes */ offsetof(Create_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Create_In, inSensitive)), + (UINT16)(offsetof(Create_In, inPublic)), + (UINT16)(offsetof(Create_In, outsideInfo)), + (UINT16)(offsetof(Create_In, creationPCR)), + (UINT16)(offsetof(Create_Out, outPublic)), + (UINT16)(offsetof(Create_Out, creationData)), + (UINT16)(offsetof(Create_Out, creationHash)), + (UINT16)(offsetof(Create_Out, creationTicket))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_SENSITIVE_CREATE_P_UNMARSHAL, + TPM2B_PUBLIC_P_UNMARSHAL, + TPM2B_DATA_P_UNMARSHAL, + TPML_PCR_SELECTION_P_UNMARSHAL, + END_OF_LIST, + TPM2B_PRIVATE_P_MARSHAL, + TPM2B_PUBLIC_P_MARSHAL, + TPM2B_CREATION_DATA_P_MARSHAL, + TPM2B_DIGEST_P_MARSHAL, + TPMT_TK_CREATION_P_MARSHAL, + END_OF_LIST} +}; + +#define _CreateDataAddress (&_CreateData) +#else +#define _CreateDataAddress 0 +#endif // CC_Create + +#if CC_Load +#include "Load_fp.h" + +typedef TPM_RC (Load_Entry)( + Load_In* in, + Load_Out* out +); + + +typedef const struct +{ + Load_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} Load_COMMAND_DESCRIPTOR_t; + +Load_COMMAND_DESCRIPTOR_t _LoadData = { + /* entry */ &TPM2_Load, + /* inSize */ (UINT16)(sizeof(Load_In)), + /* outSize */ (UINT16)(sizeof(Load_Out)), + /* offsetOfTypes */ offsetof(Load_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Load_In, inPrivate)), + (UINT16)(offsetof(Load_In, inPublic)), + (UINT16)(offsetof(Load_Out, name))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_PRIVATE_P_UNMARSHAL, + TPM2B_PUBLIC_P_UNMARSHAL, + END_OF_LIST, + TPM_HANDLE_H_MARSHAL, + TPM2B_NAME_P_MARSHAL, + END_OF_LIST} +}; + +#define _LoadDataAddress (&_LoadData) +#else +#define _LoadDataAddress 0 +#endif // CC_Load + +#if CC_LoadExternal +#include "LoadExternal_fp.h" + +typedef TPM_RC (LoadExternal_Entry)( + LoadExternal_In* in, + LoadExternal_Out* out +); + + +typedef const struct +{ + LoadExternal_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} LoadExternal_COMMAND_DESCRIPTOR_t; + +LoadExternal_COMMAND_DESCRIPTOR_t _LoadExternalData = { + /* entry */ &TPM2_LoadExternal, + /* inSize */ (UINT16)(sizeof(LoadExternal_In)), + /* outSize */ (UINT16)(sizeof(LoadExternal_Out)), + /* offsetOfTypes */ offsetof(LoadExternal_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(LoadExternal_In, inPublic)), + (UINT16)(offsetof(LoadExternal_In, hierarchy)), + (UINT16)(offsetof(LoadExternal_Out, name))}, + /* types */ {TPM2B_SENSITIVE_P_UNMARSHAL, + TPM2B_PUBLIC_P_UNMARSHAL + ADD_FLAG, + TPMI_RH_HIERARCHY_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM_HANDLE_H_MARSHAL, + TPM2B_NAME_P_MARSHAL, + END_OF_LIST} +}; + +#define _LoadExternalDataAddress (&_LoadExternalData) +#else +#define _LoadExternalDataAddress 0 +#endif // CC_LoadExternal + +#if CC_ReadPublic +#include "ReadPublic_fp.h" + +typedef TPM_RC (ReadPublic_Entry)( + ReadPublic_In* in, + ReadPublic_Out* out +); + + +typedef const struct +{ + ReadPublic_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[6]; +} ReadPublic_COMMAND_DESCRIPTOR_t; + +ReadPublic_COMMAND_DESCRIPTOR_t _ReadPublicData = { + /* entry */ &TPM2_ReadPublic, + /* inSize */ (UINT16)(sizeof(ReadPublic_In)), + /* outSize */ (UINT16)(sizeof(ReadPublic_Out)), + /* offsetOfTypes */ offsetof(ReadPublic_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ReadPublic_Out, name)), + (UINT16)(offsetof(ReadPublic_Out, qualifiedName))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + END_OF_LIST, + TPM2B_PUBLIC_P_MARSHAL, + TPM2B_NAME_P_MARSHAL, + TPM2B_NAME_P_MARSHAL, + END_OF_LIST} +}; + +#define _ReadPublicDataAddress (&_ReadPublicData) +#else +#define _ReadPublicDataAddress 0 +#endif // CC_ReadPublic + +#if CC_ActivateCredential +#include "ActivateCredential_fp.h" + +typedef TPM_RC (ActivateCredential_Entry)( + ActivateCredential_In* in, + ActivateCredential_Out* out +); + + +typedef const struct +{ + ActivateCredential_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} ActivateCredential_COMMAND_DESCRIPTOR_t; + +ActivateCredential_COMMAND_DESCRIPTOR_t _ActivateCredentialData = { + /* entry */ &TPM2_ActivateCredential, + /* inSize */ (UINT16)(sizeof(ActivateCredential_In)), + /* outSize */ (UINT16)(sizeof(ActivateCredential_Out)), + /* offsetOfTypes */ offsetof(ActivateCredential_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ActivateCredential_In, keyHandle)), + (UINT16)(offsetof(ActivateCredential_In, credentialBlob)), + (UINT16)(offsetof(ActivateCredential_In, secret))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_ID_OBJECT_P_UNMARSHAL, + TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL, + END_OF_LIST, + TPM2B_DIGEST_P_MARSHAL, + END_OF_LIST} +}; + +#define _ActivateCredentialDataAddress (&_ActivateCredentialData) +#else +#define _ActivateCredentialDataAddress 0 +#endif // CC_ActivateCredential + +#if CC_MakeCredential +#include "MakeCredential_fp.h" + +typedef TPM_RC (MakeCredential_Entry)( + MakeCredential_In* in, + MakeCredential_Out* out +); + + +typedef const struct +{ + MakeCredential_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} MakeCredential_COMMAND_DESCRIPTOR_t; + +MakeCredential_COMMAND_DESCRIPTOR_t _MakeCredentialData = { + /* entry */ &TPM2_MakeCredential, + /* inSize */ (UINT16)(sizeof(MakeCredential_In)), + /* outSize */ (UINT16)(sizeof(MakeCredential_Out)), + /* offsetOfTypes */ offsetof(MakeCredential_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(MakeCredential_In, credential)), + (UINT16)(offsetof(MakeCredential_In, objectName)), + (UINT16)(offsetof(MakeCredential_Out, secret))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPM2B_NAME_P_UNMARSHAL, + END_OF_LIST, + TPM2B_ID_OBJECT_P_MARSHAL, + TPM2B_ENCRYPTED_SECRET_P_MARSHAL, + END_OF_LIST} +}; + +#define _MakeCredentialDataAddress (&_MakeCredentialData) +#else +#define _MakeCredentialDataAddress 0 +#endif // CC_MakeCredential + +#if CC_Unseal +#include "Unseal_fp.h" + +typedef TPM_RC (Unseal_Entry)( + Unseal_In* in, + Unseal_Out* out +); + + +typedef const struct +{ + Unseal_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[4]; +} Unseal_COMMAND_DESCRIPTOR_t; + +Unseal_COMMAND_DESCRIPTOR_t _UnsealData = { + /* entry */ &TPM2_Unseal, + /* inSize */ (UINT16)(sizeof(Unseal_In)), + /* outSize */ (UINT16)(sizeof(Unseal_Out)), + /* offsetOfTypes */ offsetof(Unseal_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + END_OF_LIST, + TPM2B_SENSITIVE_DATA_P_MARSHAL, + END_OF_LIST} +}; + +#define _UnsealDataAddress (&_UnsealData) +#else +#define _UnsealDataAddress 0 +#endif // CC_Unseal + +#if CC_ObjectChangeAuth +#include "ObjectChangeAuth_fp.h" + +typedef TPM_RC (ObjectChangeAuth_Entry)( + ObjectChangeAuth_In* in, + ObjectChangeAuth_Out* out +); + + +typedef const struct +{ + ObjectChangeAuth_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[6]; +} ObjectChangeAuth_COMMAND_DESCRIPTOR_t; + +ObjectChangeAuth_COMMAND_DESCRIPTOR_t _ObjectChangeAuthData = { + /* entry */ &TPM2_ObjectChangeAuth, + /* inSize */ (UINT16)(sizeof(ObjectChangeAuth_In)), + /* outSize */ (UINT16)(sizeof(ObjectChangeAuth_Out)), + /* offsetOfTypes */ offsetof(ObjectChangeAuth_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ObjectChangeAuth_In, parentHandle)), + (UINT16)(offsetof(ObjectChangeAuth_In, newAuth))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_AUTH_P_UNMARSHAL, + END_OF_LIST, + TPM2B_PRIVATE_P_MARSHAL, + END_OF_LIST} +}; + +#define _ObjectChangeAuthDataAddress (&_ObjectChangeAuthData) +#else +#define _ObjectChangeAuthDataAddress 0 +#endif // CC_ObjectChangeAuth + +#if CC_CreateLoaded +#include "CreateLoaded_fp.h" + +typedef TPM_RC (CreateLoaded_Entry)( + CreateLoaded_In* in, + CreateLoaded_Out* out +); + + +typedef const struct +{ + CreateLoaded_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[9]; +} CreateLoaded_COMMAND_DESCRIPTOR_t; + +CreateLoaded_COMMAND_DESCRIPTOR_t _CreateLoadedData = { + /* entry */ &TPM2_CreateLoaded, + /* inSize */ (UINT16)(sizeof(CreateLoaded_In)), + /* outSize */ (UINT16)(sizeof(CreateLoaded_Out)), + /* offsetOfTypes */ offsetof(CreateLoaded_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(CreateLoaded_In, inSensitive)), + (UINT16)(offsetof(CreateLoaded_In, inPublic)), + (UINT16)(offsetof(CreateLoaded_Out, outPrivate)), + (UINT16)(offsetof(CreateLoaded_Out, outPublic)), + (UINT16)(offsetof(CreateLoaded_Out, name))}, + /* types */ {TPMI_DH_PARENT_H_UNMARSHAL + ADD_FLAG, + TPM2B_SENSITIVE_CREATE_P_UNMARSHAL, + TPM2B_TEMPLATE_P_UNMARSHAL, + END_OF_LIST, + TPM_HANDLE_H_MARSHAL, + TPM2B_PRIVATE_P_MARSHAL, + TPM2B_PUBLIC_P_MARSHAL, + TPM2B_NAME_P_MARSHAL, + END_OF_LIST} +}; + +#define _CreateLoadedDataAddress (&_CreateLoadedData) +#else +#define _CreateLoadedDataAddress 0 +#endif // CC_CreateLoaded + +#if CC_Duplicate +#include "Duplicate_fp.h" + +typedef TPM_RC (Duplicate_Entry)( + Duplicate_In* in, + Duplicate_Out* out +); + + +typedef const struct +{ + Duplicate_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[9]; +} Duplicate_COMMAND_DESCRIPTOR_t; + +Duplicate_COMMAND_DESCRIPTOR_t _DuplicateData = { + /* entry */ &TPM2_Duplicate, + /* inSize */ (UINT16)(sizeof(Duplicate_In)), + /* outSize */ (UINT16)(sizeof(Duplicate_Out)), + /* offsetOfTypes */ offsetof(Duplicate_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Duplicate_In, newParentHandle)), + (UINT16)(offsetof(Duplicate_In, encryptionKeyIn)), + (UINT16)(offsetof(Duplicate_In, symmetricAlg)), + (UINT16)(offsetof(Duplicate_Out, duplicate)), + (UINT16)(offsetof(Duplicate_Out, outSymSeed))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPM2B_DATA_P_UNMARSHAL, + TPMT_SYM_DEF_OBJECT_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_DATA_P_MARSHAL, + TPM2B_PRIVATE_P_MARSHAL, + TPM2B_ENCRYPTED_SECRET_P_MARSHAL, + END_OF_LIST} +}; + +#define _DuplicateDataAddress (&_DuplicateData) +#else +#define _DuplicateDataAddress 0 +#endif // CC_Duplicate + +#if CC_Rewrap +#include "Rewrap_fp.h" + +typedef TPM_RC (Rewrap_Entry)( + Rewrap_In* in, + Rewrap_Out* out +); + + +typedef const struct +{ + Rewrap_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[9]; +} Rewrap_COMMAND_DESCRIPTOR_t; + +Rewrap_COMMAND_DESCRIPTOR_t _RewrapData = { + /* entry */ &TPM2_Rewrap, + /* inSize */ (UINT16)(sizeof(Rewrap_In)), + /* outSize */ (UINT16)(sizeof(Rewrap_Out)), + /* offsetOfTypes */ offsetof(Rewrap_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Rewrap_In, newParent)), + (UINT16)(offsetof(Rewrap_In, inDuplicate)), + (UINT16)(offsetof(Rewrap_In, name)), + (UINT16)(offsetof(Rewrap_In, inSymSeed)), + (UINT16)(offsetof(Rewrap_Out, outSymSeed))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPM2B_PRIVATE_P_UNMARSHAL, + TPM2B_NAME_P_UNMARSHAL, + TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL, + END_OF_LIST, + TPM2B_PRIVATE_P_MARSHAL, + TPM2B_ENCRYPTED_SECRET_P_MARSHAL, + END_OF_LIST} +}; + +#define _RewrapDataAddress (&_RewrapData) +#else +#define _RewrapDataAddress 0 +#endif // CC_Rewrap + +#if CC_Import +#include "Import_fp.h" + +typedef TPM_RC (Import_Entry)( + Import_In* in, + Import_Out* out +); + + +typedef const struct +{ + Import_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[9]; +} Import_COMMAND_DESCRIPTOR_t; + +Import_COMMAND_DESCRIPTOR_t _ImportData = { + /* entry */ &TPM2_Import, + /* inSize */ (UINT16)(sizeof(Import_In)), + /* outSize */ (UINT16)(sizeof(Import_Out)), + /* offsetOfTypes */ offsetof(Import_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Import_In, encryptionKey)), + (UINT16)(offsetof(Import_In, objectPublic)), + (UINT16)(offsetof(Import_In, duplicate)), + (UINT16)(offsetof(Import_In, inSymSeed)), + (UINT16)(offsetof(Import_In, symmetricAlg))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_DATA_P_UNMARSHAL, + TPM2B_PUBLIC_P_UNMARSHAL, + TPM2B_PRIVATE_P_UNMARSHAL, + TPM2B_ENCRYPTED_SECRET_P_UNMARSHAL, + TPMT_SYM_DEF_OBJECT_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_PRIVATE_P_MARSHAL, + END_OF_LIST} +}; + +#define _ImportDataAddress (&_ImportData) +#else +#define _ImportDataAddress 0 +#endif // CC_Import + +#if CC_RSA_Encrypt +#include "RSA_Encrypt_fp.h" + +typedef TPM_RC (RSA_Encrypt_Entry)( + RSA_Encrypt_In* in, + RSA_Encrypt_Out* out +); + + +typedef const struct +{ + RSA_Encrypt_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} RSA_Encrypt_COMMAND_DESCRIPTOR_t; + +RSA_Encrypt_COMMAND_DESCRIPTOR_t _RSA_EncryptData = { + /* entry */ &TPM2_RSA_Encrypt, + /* inSize */ (UINT16)(sizeof(RSA_Encrypt_In)), + /* outSize */ (UINT16)(sizeof(RSA_Encrypt_Out)), + /* offsetOfTypes */ offsetof(RSA_Encrypt_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(RSA_Encrypt_In, message)), + (UINT16)(offsetof(RSA_Encrypt_In, inScheme)), + (UINT16)(offsetof(RSA_Encrypt_In, label))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_PUBLIC_KEY_RSA_P_UNMARSHAL, + TPMT_RSA_DECRYPT_P_UNMARSHAL + ADD_FLAG, + TPM2B_DATA_P_UNMARSHAL, + END_OF_LIST, + TPM2B_PUBLIC_KEY_RSA_P_MARSHAL, + END_OF_LIST} +}; + +#define _RSA_EncryptDataAddress (&_RSA_EncryptData) +#else +#define _RSA_EncryptDataAddress 0 +#endif // CC_RSA_Encrypt + +#if CC_RSA_Decrypt +#include "RSA_Decrypt_fp.h" + +typedef TPM_RC (RSA_Decrypt_Entry)( + RSA_Decrypt_In* in, + RSA_Decrypt_Out* out +); + + +typedef const struct +{ + RSA_Decrypt_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} RSA_Decrypt_COMMAND_DESCRIPTOR_t; + +RSA_Decrypt_COMMAND_DESCRIPTOR_t _RSA_DecryptData = { + /* entry */ &TPM2_RSA_Decrypt, + /* inSize */ (UINT16)(sizeof(RSA_Decrypt_In)), + /* outSize */ (UINT16)(sizeof(RSA_Decrypt_Out)), + /* offsetOfTypes */ offsetof(RSA_Decrypt_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(RSA_Decrypt_In, cipherText)), + (UINT16)(offsetof(RSA_Decrypt_In, inScheme)), + (UINT16)(offsetof(RSA_Decrypt_In, label))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_PUBLIC_KEY_RSA_P_UNMARSHAL, + TPMT_RSA_DECRYPT_P_UNMARSHAL + ADD_FLAG, + TPM2B_DATA_P_UNMARSHAL, + END_OF_LIST, + TPM2B_PUBLIC_KEY_RSA_P_MARSHAL, + END_OF_LIST} +}; + +#define _RSA_DecryptDataAddress (&_RSA_DecryptData) +#else +#define _RSA_DecryptDataAddress 0 +#endif // CC_RSA_Decrypt + +#if CC_ECDH_KeyGen +#include "ECDH_KeyGen_fp.h" + +typedef TPM_RC (ECDH_KeyGen_Entry)( + ECDH_KeyGen_In* in, + ECDH_KeyGen_Out* out +); + + +typedef const struct +{ + ECDH_KeyGen_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[5]; +} ECDH_KeyGen_COMMAND_DESCRIPTOR_t; + +ECDH_KeyGen_COMMAND_DESCRIPTOR_t _ECDH_KeyGenData = { + /* entry */ &TPM2_ECDH_KeyGen, + /* inSize */ (UINT16)(sizeof(ECDH_KeyGen_In)), + /* outSize */ (UINT16)(sizeof(ECDH_KeyGen_Out)), + /* offsetOfTypes */ offsetof(ECDH_KeyGen_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ECDH_KeyGen_Out, pubPoint))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + END_OF_LIST, + TPM2B_ECC_POINT_P_MARSHAL, + TPM2B_ECC_POINT_P_MARSHAL, + END_OF_LIST} +}; + +#define _ECDH_KeyGenDataAddress (&_ECDH_KeyGenData) +#else +#define _ECDH_KeyGenDataAddress 0 +#endif // CC_ECDH_KeyGen + +#if CC_ECDH_ZGen +#include "ECDH_ZGen_fp.h" + +typedef TPM_RC (ECDH_ZGen_Entry)( + ECDH_ZGen_In* in, + ECDH_ZGen_Out* out +); + + +typedef const struct +{ + ECDH_ZGen_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[5]; +} ECDH_ZGen_COMMAND_DESCRIPTOR_t; + +ECDH_ZGen_COMMAND_DESCRIPTOR_t _ECDH_ZGenData = { + /* entry */ &TPM2_ECDH_ZGen, + /* inSize */ (UINT16)(sizeof(ECDH_ZGen_In)), + /* outSize */ (UINT16)(sizeof(ECDH_ZGen_Out)), + /* offsetOfTypes */ offsetof(ECDH_ZGen_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ECDH_ZGen_In, inPoint))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_ECC_POINT_P_UNMARSHAL, + END_OF_LIST, + TPM2B_ECC_POINT_P_MARSHAL, + END_OF_LIST} +}; + +#define _ECDH_ZGenDataAddress (&_ECDH_ZGenData) +#else +#define _ECDH_ZGenDataAddress 0 +#endif // CC_ECDH_ZGen + +#if CC_ECC_Parameters +#include "ECC_Parameters_fp.h" + +typedef TPM_RC (ECC_Parameters_Entry)( + ECC_Parameters_In* in, + ECC_Parameters_Out* out +); + + +typedef const struct +{ + ECC_Parameters_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[4]; +} ECC_Parameters_COMMAND_DESCRIPTOR_t; + +ECC_Parameters_COMMAND_DESCRIPTOR_t _ECC_ParametersData = { + /* entry */ &TPM2_ECC_Parameters, + /* inSize */ (UINT16)(sizeof(ECC_Parameters_In)), + /* outSize */ (UINT16)(sizeof(ECC_Parameters_Out)), + /* offsetOfTypes */ offsetof(ECC_Parameters_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_ECC_CURVE_P_UNMARSHAL, + END_OF_LIST, + TPMS_ALGORITHM_DETAIL_ECC_P_MARSHAL, + END_OF_LIST} +}; + +#define _ECC_ParametersDataAddress (&_ECC_ParametersData) +#else +#define _ECC_ParametersDataAddress 0 +#endif // CC_ECC_Parameters + +#if CC_ZGen_2Phase +#include "ZGen_2Phase_fp.h" + +typedef TPM_RC (ZGen_2Phase_Entry)( + ZGen_2Phase_In* in, + ZGen_2Phase_Out* out +); + + +typedef const struct +{ + ZGen_2Phase_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[9]; +} ZGen_2Phase_COMMAND_DESCRIPTOR_t; + +ZGen_2Phase_COMMAND_DESCRIPTOR_t _ZGen_2PhaseData = { + /* entry */ &TPM2_ZGen_2Phase, + /* inSize */ (UINT16)(sizeof(ZGen_2Phase_In)), + /* outSize */ (UINT16)(sizeof(ZGen_2Phase_Out)), + /* offsetOfTypes */ offsetof(ZGen_2Phase_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ZGen_2Phase_In, inQsB)), + (UINT16)(offsetof(ZGen_2Phase_In, inQeB)), + (UINT16)(offsetof(ZGen_2Phase_In, inScheme)), + (UINT16)(offsetof(ZGen_2Phase_In, counter)), + (UINT16)(offsetof(ZGen_2Phase_Out, outZ2))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_ECC_POINT_P_UNMARSHAL, + TPM2B_ECC_POINT_P_UNMARSHAL, + TPMI_ECC_KEY_EXCHANGE_P_UNMARSHAL, + UINT16_P_UNMARSHAL, + END_OF_LIST, + TPM2B_ECC_POINT_P_MARSHAL, + TPM2B_ECC_POINT_P_MARSHAL, + END_OF_LIST} +}; + +#define _ZGen_2PhaseDataAddress (&_ZGen_2PhaseData) +#else +#define _ZGen_2PhaseDataAddress 0 +#endif // CC_ZGen_2Phase + +#if CC_ECC_Encrypt +#include "ECC_Encrypt_fp.h" + +typedef TPM_RC (ECC_Encrypt_Entry)( + ECC_Encrypt_In* in, + ECC_Encrypt_Out* out +); + + +typedef const struct +{ + ECC_Encrypt_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[4]; + BYTE types[8]; +} ECC_Encrypt_COMMAND_DESCRIPTOR_t; + +ECC_Encrypt_COMMAND_DESCRIPTOR_t _ECC_EncryptData = { + /* entry */ &TPM2_ECC_Encrypt, + /* inSize */ (UINT16)(sizeof(ECC_Encrypt_In)), + /* outSize */ (UINT16)(sizeof(ECC_Encrypt_Out)), + /* offsetOfTypes */ offsetof(ECC_Encrypt_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ECC_Encrypt_In, plainText)), + (UINT16)(offsetof(ECC_Encrypt_In, inScheme)), + (UINT16)(offsetof(ECC_Encrypt_Out, C2)), + (UINT16)(offsetof(ECC_Encrypt_Out, C3))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + TPMT_KDF_SCHEME_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_ECC_POINT_P_MARSHAL, + TPM2B_MAX_BUFFER_P_MARSHAL, + TPM2B_DIGEST_P_MARSHAL, + END_OF_LIST} +}; + +#define _ECC_EncryptDataAddress (&_ECC_EncryptData) +#else +#define _ECC_EncryptDataAddress 0 +#endif // CC_ECC_Encrypt + +#if CC_ECC_Decrypt +#include "ECC_Decrypt_fp.h" + +typedef TPM_RC (ECC_Decrypt_Entry)( + ECC_Decrypt_In* in, + ECC_Decrypt_Out* out +); + + +typedef const struct +{ + ECC_Decrypt_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[4]; + BYTE types[8]; +} ECC_Decrypt_COMMAND_DESCRIPTOR_t; + +ECC_Decrypt_COMMAND_DESCRIPTOR_t _ECC_DecryptData = { + /* entry */ &TPM2_ECC_Decrypt, + /* inSize */ (UINT16)(sizeof(ECC_Decrypt_In)), + /* outSize */ (UINT16)(sizeof(ECC_Decrypt_Out)), + /* offsetOfTypes */ offsetof(ECC_Decrypt_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ECC_Decrypt_In, C1)), + (UINT16)(offsetof(ECC_Decrypt_In, C2)), + (UINT16)(offsetof(ECC_Decrypt_In, C3)), + (UINT16)(offsetof(ECC_Decrypt_In, inScheme))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_ECC_POINT_P_UNMARSHAL, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPMT_KDF_SCHEME_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_MAX_BUFFER_P_MARSHAL, + END_OF_LIST} +}; + +#define _ECC_DecryptDataAddress (&_ECC_DecryptData) +#else +#define _ECC_DecryptDataAddress 0 +#endif // CC_ECC_Decrypt + +#if CC_EncryptDecrypt +#include "EncryptDecrypt_fp.h" + +typedef TPM_RC (EncryptDecrypt_Entry)( + EncryptDecrypt_In* in, + EncryptDecrypt_Out* out +); + + +typedef const struct +{ + EncryptDecrypt_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[9]; +} EncryptDecrypt_COMMAND_DESCRIPTOR_t; + +EncryptDecrypt_COMMAND_DESCRIPTOR_t _EncryptDecryptData = { + /* entry */ &TPM2_EncryptDecrypt, + /* inSize */ (UINT16)(sizeof(EncryptDecrypt_In)), + /* outSize */ (UINT16)(sizeof(EncryptDecrypt_Out)), + /* offsetOfTypes */ offsetof(EncryptDecrypt_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(EncryptDecrypt_In, decrypt)), + (UINT16)(offsetof(EncryptDecrypt_In, mode)), + (UINT16)(offsetof(EncryptDecrypt_In, ivIn)), + (UINT16)(offsetof(EncryptDecrypt_In, inData)), + (UINT16)(offsetof(EncryptDecrypt_Out, ivOut))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPMI_YES_NO_P_UNMARSHAL, + TPMI_ALG_CIPHER_MODE_P_UNMARSHAL + ADD_FLAG, + TPM2B_IV_P_UNMARSHAL, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + END_OF_LIST, + TPM2B_MAX_BUFFER_P_MARSHAL, + TPM2B_IV_P_MARSHAL, + END_OF_LIST} +}; + +#define _EncryptDecryptDataAddress (&_EncryptDecryptData) +#else +#define _EncryptDecryptDataAddress 0 +#endif // CC_EncryptDecrypt + +#if CC_EncryptDecrypt2 +#include "EncryptDecrypt2_fp.h" + +typedef TPM_RC (EncryptDecrypt2_Entry)( + EncryptDecrypt2_In* in, + EncryptDecrypt2_Out* out +); + + +typedef const struct +{ + EncryptDecrypt2_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[9]; +} EncryptDecrypt2_COMMAND_DESCRIPTOR_t; + +EncryptDecrypt2_COMMAND_DESCRIPTOR_t _EncryptDecrypt2Data = { + /* entry */ &TPM2_EncryptDecrypt2, + /* inSize */ (UINT16)(sizeof(EncryptDecrypt2_In)), + /* outSize */ (UINT16)(sizeof(EncryptDecrypt2_Out)), + /* offsetOfTypes */ offsetof(EncryptDecrypt2_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(EncryptDecrypt2_In, inData)), + (UINT16)(offsetof(EncryptDecrypt2_In, decrypt)), + (UINT16)(offsetof(EncryptDecrypt2_In, mode)), + (UINT16)(offsetof(EncryptDecrypt2_In, ivIn)), + (UINT16)(offsetof(EncryptDecrypt2_Out, ivOut))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + TPMI_YES_NO_P_UNMARSHAL, + TPMI_ALG_CIPHER_MODE_P_UNMARSHAL + ADD_FLAG, + TPM2B_IV_P_UNMARSHAL, + END_OF_LIST, + TPM2B_MAX_BUFFER_P_MARSHAL, + TPM2B_IV_P_MARSHAL, + END_OF_LIST} +}; + +#define _EncryptDecrypt2DataAddress (&_EncryptDecrypt2Data) +#else +#define _EncryptDecrypt2DataAddress 0 +#endif // CC_EncryptDecrypt2 + +#if CC_Hash +#include "Hash_fp.h" + +typedef TPM_RC (Hash_Entry)( + Hash_In* in, + Hash_Out* out +); + + +typedef const struct +{ + Hash_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} Hash_COMMAND_DESCRIPTOR_t; + +Hash_COMMAND_DESCRIPTOR_t _HashData = { + /* entry */ &TPM2_Hash, + /* inSize */ (UINT16)(sizeof(Hash_In)), + /* outSize */ (UINT16)(sizeof(Hash_Out)), + /* offsetOfTypes */ offsetof(Hash_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Hash_In, hashAlg)), + (UINT16)(offsetof(Hash_In, hierarchy)), + (UINT16)(offsetof(Hash_Out, validation))}, + /* types */ {TPM2B_MAX_BUFFER_P_UNMARSHAL, + TPMI_ALG_HASH_P_UNMARSHAL, + TPMI_RH_HIERARCHY_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_DIGEST_P_MARSHAL, + TPMT_TK_HASHCHECK_P_MARSHAL, + END_OF_LIST} +}; + +#define _HashDataAddress (&_HashData) +#else +#define _HashDataAddress 0 +#endif // CC_Hash + +#if CC_HMAC +#include "HMAC_fp.h" + +typedef TPM_RC (HMAC_Entry)( + HMAC_In* in, + HMAC_Out* out +); + + +typedef const struct +{ + HMAC_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[6]; +} HMAC_COMMAND_DESCRIPTOR_t; + +HMAC_COMMAND_DESCRIPTOR_t _HMACData = { + /* entry */ &TPM2_HMAC, + /* inSize */ (UINT16)(sizeof(HMAC_In)), + /* outSize */ (UINT16)(sizeof(HMAC_Out)), + /* offsetOfTypes */ offsetof(HMAC_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(HMAC_In, buffer)), + (UINT16)(offsetof(HMAC_In, hashAlg))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_DIGEST_P_MARSHAL, + END_OF_LIST} +}; + +#define _HMACDataAddress (&_HMACData) +#else +#define _HMACDataAddress 0 +#endif // CC_HMAC + +#if CC_MAC +#include "MAC_fp.h" + +typedef TPM_RC (MAC_Entry)( + MAC_In* in, + MAC_Out* out +); + + +typedef const struct +{ + MAC_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[6]; +} MAC_COMMAND_DESCRIPTOR_t; + +MAC_COMMAND_DESCRIPTOR_t _MACData = { + /* entry */ &TPM2_MAC, + /* inSize */ (UINT16)(sizeof(MAC_In)), + /* outSize */ (UINT16)(sizeof(MAC_Out)), + /* offsetOfTypes */ offsetof(MAC_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(MAC_In, buffer)), + (UINT16)(offsetof(MAC_In, inScheme))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + TPMI_ALG_MAC_SCHEME_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_DIGEST_P_MARSHAL, + END_OF_LIST} +}; + +#define _MACDataAddress (&_MACData) +#else +#define _MACDataAddress 0 +#endif // CC_MAC + +#if CC_GetRandom +#include "GetRandom_fp.h" + +typedef TPM_RC (GetRandom_Entry)( + GetRandom_In* in, + GetRandom_Out* out +); + + +typedef const struct +{ + GetRandom_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[4]; +} GetRandom_COMMAND_DESCRIPTOR_t; + +GetRandom_COMMAND_DESCRIPTOR_t _GetRandomData = { + /* entry */ &TPM2_GetRandom, + /* inSize */ (UINT16)(sizeof(GetRandom_In)), + /* outSize */ (UINT16)(sizeof(GetRandom_Out)), + /* offsetOfTypes */ offsetof(GetRandom_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {UINT16_P_UNMARSHAL, + END_OF_LIST, + TPM2B_DIGEST_P_MARSHAL, + END_OF_LIST} +}; + +#define _GetRandomDataAddress (&_GetRandomData) +#else +#define _GetRandomDataAddress 0 +#endif // CC_GetRandom + +#if CC_StirRandom +#include "StirRandom_fp.h" + +typedef TPM_RC (StirRandom_Entry)( + StirRandom_In* in +); + + +typedef const struct +{ + StirRandom_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} StirRandom_COMMAND_DESCRIPTOR_t; + +StirRandom_COMMAND_DESCRIPTOR_t _StirRandomData = { + /* entry */ &TPM2_StirRandom, + /* inSize */ (UINT16)(sizeof(StirRandom_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(StirRandom_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPM2B_SENSITIVE_DATA_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _StirRandomDataAddress (&_StirRandomData) +#else +#define _StirRandomDataAddress 0 +#endif // CC_StirRandom + +#if CC_HMAC_Start +#include "HMAC_Start_fp.h" + +typedef TPM_RC (HMAC_Start_Entry)( + HMAC_Start_In* in, + HMAC_Start_Out* out +); + + +typedef const struct +{ + HMAC_Start_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[6]; +} HMAC_Start_COMMAND_DESCRIPTOR_t; + +HMAC_Start_COMMAND_DESCRIPTOR_t _HMAC_StartData = { + /* entry */ &TPM2_HMAC_Start, + /* inSize */ (UINT16)(sizeof(HMAC_Start_In)), + /* outSize */ (UINT16)(sizeof(HMAC_Start_Out)), + /* offsetOfTypes */ offsetof(HMAC_Start_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(HMAC_Start_In, auth)), + (UINT16)(offsetof(HMAC_Start_In, hashAlg))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_AUTH_P_UNMARSHAL, + TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPMI_DH_OBJECT_H_MARSHAL, + END_OF_LIST} +}; + +#define _HMAC_StartDataAddress (&_HMAC_StartData) +#else +#define _HMAC_StartDataAddress 0 +#endif // CC_HMAC_Start + +#if CC_MAC_Start +#include "MAC_Start_fp.h" + +typedef TPM_RC (MAC_Start_Entry)( + MAC_Start_In* in, + MAC_Start_Out* out +); + + +typedef const struct +{ + MAC_Start_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[6]; +} MAC_Start_COMMAND_DESCRIPTOR_t; + +MAC_Start_COMMAND_DESCRIPTOR_t _MAC_StartData = { + /* entry */ &TPM2_MAC_Start, + /* inSize */ (UINT16)(sizeof(MAC_Start_In)), + /* outSize */ (UINT16)(sizeof(MAC_Start_Out)), + /* offsetOfTypes */ offsetof(MAC_Start_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(MAC_Start_In, auth)), + (UINT16)(offsetof(MAC_Start_In, inScheme))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_AUTH_P_UNMARSHAL, + TPMI_ALG_MAC_SCHEME_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPMI_DH_OBJECT_H_MARSHAL, + END_OF_LIST} +}; + +#define _MAC_StartDataAddress (&_MAC_StartData) +#else +#define _MAC_StartDataAddress 0 +#endif // CC_MAC_Start + +#if CC_HashSequenceStart +#include "HashSequenceStart_fp.h" + +typedef TPM_RC (HashSequenceStart_Entry)( + HashSequenceStart_In* in, + HashSequenceStart_Out* out +); + + +typedef const struct +{ + HashSequenceStart_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[5]; +} HashSequenceStart_COMMAND_DESCRIPTOR_t; + +HashSequenceStart_COMMAND_DESCRIPTOR_t _HashSequenceStartData = { + /* entry */ &TPM2_HashSequenceStart, + /* inSize */ (UINT16)(sizeof(HashSequenceStart_In)), + /* outSize */ (UINT16)(sizeof(HashSequenceStart_Out)), + /* offsetOfTypes */ offsetof(HashSequenceStart_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(HashSequenceStart_In, hashAlg))}, + /* types */ {TPM2B_AUTH_P_UNMARSHAL, + TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPMI_DH_OBJECT_H_MARSHAL, + END_OF_LIST} +}; + +#define _HashSequenceStartDataAddress (&_HashSequenceStartData) +#else +#define _HashSequenceStartDataAddress 0 +#endif // CC_HashSequenceStart + +#if CC_SequenceUpdate +#include "SequenceUpdate_fp.h" + +typedef TPM_RC (SequenceUpdate_Entry)( + SequenceUpdate_In* in +); + + +typedef const struct +{ + SequenceUpdate_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} SequenceUpdate_COMMAND_DESCRIPTOR_t; + +SequenceUpdate_COMMAND_DESCRIPTOR_t _SequenceUpdateData = { + /* entry */ &TPM2_SequenceUpdate, + /* inSize */ (UINT16)(sizeof(SequenceUpdate_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(SequenceUpdate_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(SequenceUpdate_In, buffer))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _SequenceUpdateDataAddress (&_SequenceUpdateData) +#else +#define _SequenceUpdateDataAddress 0 +#endif // CC_SequenceUpdate + +#if CC_SequenceComplete +#include "SequenceComplete_fp.h" + +typedef TPM_RC (SequenceComplete_Entry)( + SequenceComplete_In* in, + SequenceComplete_Out* out +); + + +typedef const struct +{ + SequenceComplete_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} SequenceComplete_COMMAND_DESCRIPTOR_t; + +SequenceComplete_COMMAND_DESCRIPTOR_t _SequenceCompleteData = { + /* entry */ &TPM2_SequenceComplete, + /* inSize */ (UINT16)(sizeof(SequenceComplete_In)), + /* outSize */ (UINT16)(sizeof(SequenceComplete_Out)), + /* offsetOfTypes */ offsetof(SequenceComplete_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(SequenceComplete_In, buffer)), + (UINT16)(offsetof(SequenceComplete_In, hierarchy)), + (UINT16)(offsetof(SequenceComplete_Out, validation))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + TPMI_RH_HIERARCHY_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_DIGEST_P_MARSHAL, + TPMT_TK_HASHCHECK_P_MARSHAL, + END_OF_LIST} +}; + +#define _SequenceCompleteDataAddress (&_SequenceCompleteData) +#else +#define _SequenceCompleteDataAddress 0 +#endif // CC_SequenceComplete + +#if CC_EventSequenceComplete +#include "EventSequenceComplete_fp.h" + +typedef TPM_RC (EventSequenceComplete_Entry)( + EventSequenceComplete_In* in, + EventSequenceComplete_Out* out +); + + +typedef const struct +{ + EventSequenceComplete_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[6]; +} EventSequenceComplete_COMMAND_DESCRIPTOR_t; + +EventSequenceComplete_COMMAND_DESCRIPTOR_t _EventSequenceCompleteData = { + /* entry */ &TPM2_EventSequenceComplete, + /* inSize */ (UINT16)(sizeof(EventSequenceComplete_In)), + /* outSize */ (UINT16)(sizeof(EventSequenceComplete_Out)), + /* offsetOfTypes */ offsetof(EventSequenceComplete_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(EventSequenceComplete_In, sequenceHandle)), + (UINT16)(offsetof(EventSequenceComplete_In, buffer))}, + /* types */ {TPMI_DH_PCR_H_UNMARSHAL + ADD_FLAG, + TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + END_OF_LIST, + TPML_DIGEST_VALUES_P_MARSHAL, + END_OF_LIST} +}; + +#define _EventSequenceCompleteDataAddress (&_EventSequenceCompleteData) +#else +#define _EventSequenceCompleteDataAddress 0 +#endif // CC_EventSequenceComplete + +#if CC_Certify +#include "Certify_fp.h" + +typedef TPM_RC (Certify_Entry)( + Certify_In* in, + Certify_Out* out +); + + +typedef const struct +{ + Certify_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[4]; + BYTE types[8]; +} Certify_COMMAND_DESCRIPTOR_t; + +Certify_COMMAND_DESCRIPTOR_t _CertifyData = { + /* entry */ &TPM2_Certify, + /* inSize */ (UINT16)(sizeof(Certify_In)), + /* outSize */ (UINT16)(sizeof(Certify_Out)), + /* offsetOfTypes */ offsetof(Certify_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Certify_In, signHandle)), + (UINT16)(offsetof(Certify_In, qualifyingData)), + (UINT16)(offsetof(Certify_In, inScheme)), + (UINT16)(offsetof(Certify_Out, signature))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPM2B_DATA_P_UNMARSHAL, + TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_ATTEST_P_MARSHAL, + TPMT_SIGNATURE_P_MARSHAL, + END_OF_LIST} +}; + +#define _CertifyDataAddress (&_CertifyData) +#else +#define _CertifyDataAddress 0 +#endif // CC_Certify + +#if CC_CertifyCreation +#include "CertifyCreation_fp.h" + +typedef TPM_RC (CertifyCreation_Entry)( + CertifyCreation_In* in, + CertifyCreation_Out* out +); + + +typedef const struct +{ + CertifyCreation_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[6]; + BYTE types[10]; +} CertifyCreation_COMMAND_DESCRIPTOR_t; + +CertifyCreation_COMMAND_DESCRIPTOR_t _CertifyCreationData = { + /* entry */ &TPM2_CertifyCreation, + /* inSize */ (UINT16)(sizeof(CertifyCreation_In)), + /* outSize */ (UINT16)(sizeof(CertifyCreation_Out)), + /* offsetOfTypes */ offsetof(CertifyCreation_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(CertifyCreation_In, objectHandle)), + (UINT16)(offsetof(CertifyCreation_In, qualifyingData)), + (UINT16)(offsetof(CertifyCreation_In, creationHash)), + (UINT16)(offsetof(CertifyCreation_In, inScheme)), + (UINT16)(offsetof(CertifyCreation_In, creationTicket)), + (UINT16)(offsetof(CertifyCreation_Out, signature))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_DATA_P_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, + TPMT_TK_CREATION_P_UNMARSHAL, + END_OF_LIST, + TPM2B_ATTEST_P_MARSHAL, + TPMT_SIGNATURE_P_MARSHAL, + END_OF_LIST} +}; + +#define _CertifyCreationDataAddress (&_CertifyCreationData) +#else +#define _CertifyCreationDataAddress 0 +#endif // CC_CertifyCreation + +#if CC_Quote +#include "Quote_fp.h" + +typedef TPM_RC (Quote_Entry)( + Quote_In* in, + Quote_Out* out +); + + +typedef const struct +{ + Quote_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[4]; + BYTE types[8]; +} Quote_COMMAND_DESCRIPTOR_t; + +Quote_COMMAND_DESCRIPTOR_t _QuoteData = { + /* entry */ &TPM2_Quote, + /* inSize */ (UINT16)(sizeof(Quote_In)), + /* outSize */ (UINT16)(sizeof(Quote_Out)), + /* offsetOfTypes */ offsetof(Quote_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Quote_In, qualifyingData)), + (UINT16)(offsetof(Quote_In, inScheme)), + (UINT16)(offsetof(Quote_In, PCRselect)), + (UINT16)(offsetof(Quote_Out, signature))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPM2B_DATA_P_UNMARSHAL, + TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, + TPML_PCR_SELECTION_P_UNMARSHAL, + END_OF_LIST, + TPM2B_ATTEST_P_MARSHAL, + TPMT_SIGNATURE_P_MARSHAL, + END_OF_LIST} +}; + +#define _QuoteDataAddress (&_QuoteData) +#else +#define _QuoteDataAddress 0 +#endif // CC_Quote + +#if CC_GetSessionAuditDigest +#include "GetSessionAuditDigest_fp.h" + +typedef TPM_RC (GetSessionAuditDigest_Entry)( + GetSessionAuditDigest_In* in, + GetSessionAuditDigest_Out* out +); + + +typedef const struct +{ + GetSessionAuditDigest_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[9]; +} GetSessionAuditDigest_COMMAND_DESCRIPTOR_t; + +GetSessionAuditDigest_COMMAND_DESCRIPTOR_t _GetSessionAuditDigestData = { + /* entry */ &TPM2_GetSessionAuditDigest, + /* inSize */ (UINT16)(sizeof(GetSessionAuditDigest_In)), + /* outSize */ (UINT16)(sizeof(GetSessionAuditDigest_Out)), + /* offsetOfTypes */ offsetof(GetSessionAuditDigest_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(GetSessionAuditDigest_In, signHandle)), + (UINT16)(offsetof(GetSessionAuditDigest_In, sessionHandle)), + (UINT16)(offsetof(GetSessionAuditDigest_In, qualifyingData)), + (UINT16)(offsetof(GetSessionAuditDigest_In, inScheme)), + (UINT16)(offsetof(GetSessionAuditDigest_Out, signature))}, + /* types */ {TPMI_RH_ENDORSEMENT_H_UNMARSHAL, + TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPMI_SH_HMAC_H_UNMARSHAL, + TPM2B_DATA_P_UNMARSHAL, + TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_ATTEST_P_MARSHAL, + TPMT_SIGNATURE_P_MARSHAL, + END_OF_LIST} +}; + +#define _GetSessionAuditDigestDataAddress (&_GetSessionAuditDigestData) +#else +#define _GetSessionAuditDigestDataAddress 0 +#endif // CC_GetSessionAuditDigest + +#if CC_GetCommandAuditDigest +#include "GetCommandAuditDigest_fp.h" + +typedef TPM_RC (GetCommandAuditDigest_Entry)( + GetCommandAuditDigest_In* in, + GetCommandAuditDigest_Out* out +); + + +typedef const struct +{ + GetCommandAuditDigest_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[4]; + BYTE types[8]; +} GetCommandAuditDigest_COMMAND_DESCRIPTOR_t; + +GetCommandAuditDigest_COMMAND_DESCRIPTOR_t _GetCommandAuditDigestData = { + /* entry */ &TPM2_GetCommandAuditDigest, + /* inSize */ (UINT16)(sizeof(GetCommandAuditDigest_In)), + /* outSize */ (UINT16)(sizeof(GetCommandAuditDigest_Out)), + /* offsetOfTypes */ offsetof(GetCommandAuditDigest_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(GetCommandAuditDigest_In, signHandle)), + (UINT16)(offsetof(GetCommandAuditDigest_In, qualifyingData)), + (UINT16)(offsetof(GetCommandAuditDigest_In, inScheme)), + (UINT16)(offsetof(GetCommandAuditDigest_Out, signature))}, + /* types */ {TPMI_RH_ENDORSEMENT_H_UNMARSHAL, + TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPM2B_DATA_P_UNMARSHAL, + TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_ATTEST_P_MARSHAL, + TPMT_SIGNATURE_P_MARSHAL, + END_OF_LIST} +}; + +#define _GetCommandAuditDigestDataAddress (&_GetCommandAuditDigestData) +#else +#define _GetCommandAuditDigestDataAddress 0 +#endif // CC_GetCommandAuditDigest + +#if CC_GetTime +#include "GetTime_fp.h" + +typedef TPM_RC (GetTime_Entry)( + GetTime_In* in, + GetTime_Out* out +); + + +typedef const struct +{ + GetTime_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[4]; + BYTE types[8]; +} GetTime_COMMAND_DESCRIPTOR_t; + +GetTime_COMMAND_DESCRIPTOR_t _GetTimeData = { + /* entry */ &TPM2_GetTime, + /* inSize */ (UINT16)(sizeof(GetTime_In)), + /* outSize */ (UINT16)(sizeof(GetTime_Out)), + /* offsetOfTypes */ offsetof(GetTime_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(GetTime_In, signHandle)), + (UINT16)(offsetof(GetTime_In, qualifyingData)), + (UINT16)(offsetof(GetTime_In, inScheme)), + (UINT16)(offsetof(GetTime_Out, signature))}, + /* types */ {TPMI_RH_ENDORSEMENT_H_UNMARSHAL, + TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPM2B_DATA_P_UNMARSHAL, + TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + TPM2B_ATTEST_P_MARSHAL, + TPMT_SIGNATURE_P_MARSHAL, + END_OF_LIST} +}; + +#define _GetTimeDataAddress (&_GetTimeData) +#else +#define _GetTimeDataAddress 0 +#endif // CC_GetTime + +#if CC_CertifyX509 +#include "CertifyX509_fp.h" + +typedef TPM_RC (CertifyX509_Entry)( + CertifyX509_In* in, + CertifyX509_Out* out +); + + +typedef const struct +{ + CertifyX509_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[6]; + BYTE types[10]; +} CertifyX509_COMMAND_DESCRIPTOR_t; + +CertifyX509_COMMAND_DESCRIPTOR_t _CertifyX509Data = { + /* entry */ &TPM2_CertifyX509, + /* inSize */ (UINT16)(sizeof(CertifyX509_In)), + /* outSize */ (UINT16)(sizeof(CertifyX509_Out)), + /* offsetOfTypes */ offsetof(CertifyX509_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(CertifyX509_In, signHandle)), + (UINT16)(offsetof(CertifyX509_In, reserved)), + (UINT16)(offsetof(CertifyX509_In, inScheme)), + (UINT16)(offsetof(CertifyX509_In, partialCertificate)), + (UINT16)(offsetof(CertifyX509_Out, tbsDigest)), + (UINT16)(offsetof(CertifyX509_Out, signature))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPM2B_DATA_P_UNMARSHAL, + TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + END_OF_LIST, + TPM2B_MAX_BUFFER_P_MARSHAL, + TPM2B_DIGEST_P_MARSHAL, + TPMT_SIGNATURE_P_MARSHAL, + END_OF_LIST} +}; + +#define _CertifyX509DataAddress (&_CertifyX509Data) +#else +#define _CertifyX509DataAddress 0 +#endif // CC_CertifyX509 + +#if CC_Commit +#include "Commit_fp.h" + +typedef TPM_RC (Commit_Entry)( + Commit_In* in, + Commit_Out* out +); + + +typedef const struct +{ + Commit_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[6]; + BYTE types[10]; +} Commit_COMMAND_DESCRIPTOR_t; + +Commit_COMMAND_DESCRIPTOR_t _CommitData = { + /* entry */ &TPM2_Commit, + /* inSize */ (UINT16)(sizeof(Commit_In)), + /* outSize */ (UINT16)(sizeof(Commit_Out)), + /* offsetOfTypes */ offsetof(Commit_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Commit_In, P1)), + (UINT16)(offsetof(Commit_In, s2)), + (UINT16)(offsetof(Commit_In, y2)), + (UINT16)(offsetof(Commit_Out, L)), + (UINT16)(offsetof(Commit_Out, E)), + (UINT16)(offsetof(Commit_Out, counter))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_ECC_POINT_P_UNMARSHAL, + TPM2B_SENSITIVE_DATA_P_UNMARSHAL, + TPM2B_ECC_PARAMETER_P_UNMARSHAL, + END_OF_LIST, + TPM2B_ECC_POINT_P_MARSHAL, + TPM2B_ECC_POINT_P_MARSHAL, + TPM2B_ECC_POINT_P_MARSHAL, + UINT16_P_MARSHAL, + END_OF_LIST} +}; + +#define _CommitDataAddress (&_CommitData) +#else +#define _CommitDataAddress 0 +#endif // CC_Commit + +#if CC_EC_Ephemeral +#include "EC_Ephemeral_fp.h" + +typedef TPM_RC (EC_Ephemeral_Entry)( + EC_Ephemeral_In* in, + EC_Ephemeral_Out* out +); + + +typedef const struct +{ + EC_Ephemeral_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[5]; +} EC_Ephemeral_COMMAND_DESCRIPTOR_t; + +EC_Ephemeral_COMMAND_DESCRIPTOR_t _EC_EphemeralData = { + /* entry */ &TPM2_EC_Ephemeral, + /* inSize */ (UINT16)(sizeof(EC_Ephemeral_In)), + /* outSize */ (UINT16)(sizeof(EC_Ephemeral_Out)), + /* offsetOfTypes */ offsetof(EC_Ephemeral_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(EC_Ephemeral_Out, counter))}, + /* types */ {TPMI_ECC_CURVE_P_UNMARSHAL, + END_OF_LIST, + TPM2B_ECC_POINT_P_MARSHAL, + UINT16_P_MARSHAL, + END_OF_LIST} +}; + +#define _EC_EphemeralDataAddress (&_EC_EphemeralData) +#else +#define _EC_EphemeralDataAddress 0 +#endif // CC_EC_Ephemeral + +#if CC_VerifySignature +#include "VerifySignature_fp.h" + +typedef TPM_RC (VerifySignature_Entry)( + VerifySignature_In* in, + VerifySignature_Out* out +); + + +typedef const struct +{ + VerifySignature_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[6]; +} VerifySignature_COMMAND_DESCRIPTOR_t; + +VerifySignature_COMMAND_DESCRIPTOR_t _VerifySignatureData = { + /* entry */ &TPM2_VerifySignature, + /* inSize */ (UINT16)(sizeof(VerifySignature_In)), + /* outSize */ (UINT16)(sizeof(VerifySignature_Out)), + /* offsetOfTypes */ offsetof(VerifySignature_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(VerifySignature_In, digest)), + (UINT16)(offsetof(VerifySignature_In, signature))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPMT_SIGNATURE_P_UNMARSHAL, + END_OF_LIST, + TPMT_TK_VERIFIED_P_MARSHAL, + END_OF_LIST} +}; + +#define _VerifySignatureDataAddress (&_VerifySignatureData) +#else +#define _VerifySignatureDataAddress 0 +#endif // CC_VerifySignature + +#if CC_Sign +#include "Sign_fp.h" + +typedef TPM_RC (Sign_Entry)( + Sign_In* in, + Sign_Out* out +); + + +typedef const struct +{ + Sign_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} Sign_COMMAND_DESCRIPTOR_t; + +Sign_COMMAND_DESCRIPTOR_t _SignData = { + /* entry */ &TPM2_Sign, + /* inSize */ (UINT16)(sizeof(Sign_In)), + /* outSize */ (UINT16)(sizeof(Sign_Out)), + /* offsetOfTypes */ offsetof(Sign_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Sign_In, digest)), + (UINT16)(offsetof(Sign_In, inScheme)), + (UINT16)(offsetof(Sign_In, validation))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, + TPMT_TK_HASHCHECK_P_UNMARSHAL, + END_OF_LIST, + TPMT_SIGNATURE_P_MARSHAL, + END_OF_LIST} +}; + +#define _SignDataAddress (&_SignData) +#else +#define _SignDataAddress 0 +#endif // CC_Sign + +#if CC_SetCommandCodeAuditStatus +#include "SetCommandCodeAuditStatus_fp.h" + +typedef TPM_RC (SetCommandCodeAuditStatus_Entry)( + SetCommandCodeAuditStatus_In* in +); + + +typedef const struct +{ + SetCommandCodeAuditStatus_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[6]; +} SetCommandCodeAuditStatus_COMMAND_DESCRIPTOR_t; + +SetCommandCodeAuditStatus_COMMAND_DESCRIPTOR_t _SetCommandCodeAuditStatusData = { + /* entry */ &TPM2_SetCommandCodeAuditStatus, + /* inSize */ (UINT16)(sizeof(SetCommandCodeAuditStatus_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(SetCommandCodeAuditStatus_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(SetCommandCodeAuditStatus_In, auditAlg)), + (UINT16)(offsetof(SetCommandCodeAuditStatus_In, setList)), + (UINT16)(offsetof(SetCommandCodeAuditStatus_In, clearList))}, + /* types */ {TPMI_RH_PROVISION_H_UNMARSHAL, + TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, + TPML_CC_P_UNMARSHAL, + TPML_CC_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _SetCommandCodeAuditStatusDataAddress (&_SetCommandCodeAuditStatusData) +#else +#define _SetCommandCodeAuditStatusDataAddress 0 +#endif // CC_SetCommandCodeAuditStatus + +#if CC_PCR_Extend +#include "PCR_Extend_fp.h" + +typedef TPM_RC (PCR_Extend_Entry)( + PCR_Extend_In* in +); + + +typedef const struct +{ + PCR_Extend_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} PCR_Extend_COMMAND_DESCRIPTOR_t; + +PCR_Extend_COMMAND_DESCRIPTOR_t _PCR_ExtendData = { + /* entry */ &TPM2_PCR_Extend, + /* inSize */ (UINT16)(sizeof(PCR_Extend_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PCR_Extend_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PCR_Extend_In, digests))}, + /* types */ {TPMI_DH_PCR_H_UNMARSHAL + ADD_FLAG, + TPML_DIGEST_VALUES_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PCR_ExtendDataAddress (&_PCR_ExtendData) +#else +#define _PCR_ExtendDataAddress 0 +#endif // CC_PCR_Extend + +#if CC_PCR_Event +#include "PCR_Event_fp.h" + +typedef TPM_RC (PCR_Event_Entry)( + PCR_Event_In* in, + PCR_Event_Out* out +); + + +typedef const struct +{ + PCR_Event_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[5]; +} PCR_Event_COMMAND_DESCRIPTOR_t; + +PCR_Event_COMMAND_DESCRIPTOR_t _PCR_EventData = { + /* entry */ &TPM2_PCR_Event, + /* inSize */ (UINT16)(sizeof(PCR_Event_In)), + /* outSize */ (UINT16)(sizeof(PCR_Event_Out)), + /* offsetOfTypes */ offsetof(PCR_Event_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PCR_Event_In, eventData))}, + /* types */ {TPMI_DH_PCR_H_UNMARSHAL + ADD_FLAG, + TPM2B_EVENT_P_UNMARSHAL, + END_OF_LIST, + TPML_DIGEST_VALUES_P_MARSHAL, + END_OF_LIST} +}; + +#define _PCR_EventDataAddress (&_PCR_EventData) +#else +#define _PCR_EventDataAddress 0 +#endif // CC_PCR_Event + +#if CC_PCR_Read +#include "PCR_Read_fp.h" + +typedef TPM_RC (PCR_Read_Entry)( + PCR_Read_In* in, + PCR_Read_Out* out +); + + +typedef const struct +{ + PCR_Read_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[6]; +} PCR_Read_COMMAND_DESCRIPTOR_t; + +PCR_Read_COMMAND_DESCRIPTOR_t _PCR_ReadData = { + /* entry */ &TPM2_PCR_Read, + /* inSize */ (UINT16)(sizeof(PCR_Read_In)), + /* outSize */ (UINT16)(sizeof(PCR_Read_Out)), + /* offsetOfTypes */ offsetof(PCR_Read_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PCR_Read_Out, pcrSelectionOut)), + (UINT16)(offsetof(PCR_Read_Out, pcrValues))}, + /* types */ {TPML_PCR_SELECTION_P_UNMARSHAL, + END_OF_LIST, + UINT32_P_MARSHAL, + TPML_PCR_SELECTION_P_MARSHAL, + TPML_DIGEST_P_MARSHAL, + END_OF_LIST} +}; + +#define _PCR_ReadDataAddress (&_PCR_ReadData) +#else +#define _PCR_ReadDataAddress 0 +#endif // CC_PCR_Read + +#if CC_PCR_Allocate +#include "PCR_Allocate_fp.h" + +typedef TPM_RC (PCR_Allocate_Entry)( + PCR_Allocate_In* in, + PCR_Allocate_Out* out +); + + +typedef const struct +{ + PCR_Allocate_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[4]; + BYTE types[8]; +} PCR_Allocate_COMMAND_DESCRIPTOR_t; + +PCR_Allocate_COMMAND_DESCRIPTOR_t _PCR_AllocateData = { + /* entry */ &TPM2_PCR_Allocate, + /* inSize */ (UINT16)(sizeof(PCR_Allocate_In)), + /* outSize */ (UINT16)(sizeof(PCR_Allocate_Out)), + /* offsetOfTypes */ offsetof(PCR_Allocate_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PCR_Allocate_In, pcrAllocation)), + (UINT16)(offsetof(PCR_Allocate_Out, maxPCR)), + (UINT16)(offsetof(PCR_Allocate_Out, sizeNeeded)), + (UINT16)(offsetof(PCR_Allocate_Out, sizeAvailable))}, + /* types */ {TPMI_RH_PLATFORM_H_UNMARSHAL, + TPML_PCR_SELECTION_P_UNMARSHAL, + END_OF_LIST, + TPMI_YES_NO_P_MARSHAL, + UINT32_P_MARSHAL, + UINT32_P_MARSHAL, + UINT32_P_MARSHAL, + END_OF_LIST} +}; + +#define _PCR_AllocateDataAddress (&_PCR_AllocateData) +#else +#define _PCR_AllocateDataAddress 0 +#endif // CC_PCR_Allocate + +#if CC_PCR_SetAuthPolicy +#include "PCR_SetAuthPolicy_fp.h" + +typedef TPM_RC (PCR_SetAuthPolicy_Entry)( + PCR_SetAuthPolicy_In* in +); + + +typedef const struct +{ + PCR_SetAuthPolicy_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[6]; +} PCR_SetAuthPolicy_COMMAND_DESCRIPTOR_t; + +PCR_SetAuthPolicy_COMMAND_DESCRIPTOR_t _PCR_SetAuthPolicyData = { + /* entry */ &TPM2_PCR_SetAuthPolicy, + /* inSize */ (UINT16)(sizeof(PCR_SetAuthPolicy_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PCR_SetAuthPolicy_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PCR_SetAuthPolicy_In, authPolicy)), + (UINT16)(offsetof(PCR_SetAuthPolicy_In, hashAlg)), + (UINT16)(offsetof(PCR_SetAuthPolicy_In, pcrNum))}, + /* types */ {TPMI_RH_PLATFORM_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, + TPMI_DH_PCR_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PCR_SetAuthPolicyDataAddress (&_PCR_SetAuthPolicyData) +#else +#define _PCR_SetAuthPolicyDataAddress 0 +#endif // CC_PCR_SetAuthPolicy + +#if CC_PCR_SetAuthValue +#include "PCR_SetAuthValue_fp.h" + +typedef TPM_RC (PCR_SetAuthValue_Entry)( + PCR_SetAuthValue_In* in +); + + +typedef const struct +{ + PCR_SetAuthValue_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} PCR_SetAuthValue_COMMAND_DESCRIPTOR_t; + +PCR_SetAuthValue_COMMAND_DESCRIPTOR_t _PCR_SetAuthValueData = { + /* entry */ &TPM2_PCR_SetAuthValue, + /* inSize */ (UINT16)(sizeof(PCR_SetAuthValue_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PCR_SetAuthValue_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PCR_SetAuthValue_In, auth))}, + /* types */ {TPMI_DH_PCR_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PCR_SetAuthValueDataAddress (&_PCR_SetAuthValueData) +#else +#define _PCR_SetAuthValueDataAddress 0 +#endif // CC_PCR_SetAuthValue + +#if CC_PCR_Reset +#include "PCR_Reset_fp.h" + +typedef TPM_RC (PCR_Reset_Entry)( + PCR_Reset_In* in +); + + +typedef const struct +{ + PCR_Reset_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} PCR_Reset_COMMAND_DESCRIPTOR_t; + +PCR_Reset_COMMAND_DESCRIPTOR_t _PCR_ResetData = { + /* entry */ &TPM2_PCR_Reset, + /* inSize */ (UINT16)(sizeof(PCR_Reset_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PCR_Reset_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_DH_PCR_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PCR_ResetDataAddress (&_PCR_ResetData) +#else +#define _PCR_ResetDataAddress 0 +#endif // CC_PCR_Reset + +#if CC_PolicySigned +#include "PolicySigned_fp.h" + +typedef TPM_RC (PolicySigned_Entry)( + PolicySigned_In* in, + PolicySigned_Out* out +); + + +typedef const struct +{ + PolicySigned_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[7]; + BYTE types[11]; +} PolicySigned_COMMAND_DESCRIPTOR_t; + +PolicySigned_COMMAND_DESCRIPTOR_t _PolicySignedData = { + /* entry */ &TPM2_PolicySigned, + /* inSize */ (UINT16)(sizeof(PolicySigned_In)), + /* outSize */ (UINT16)(sizeof(PolicySigned_Out)), + /* offsetOfTypes */ offsetof(PolicySigned_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicySigned_In, policySession)), + (UINT16)(offsetof(PolicySigned_In, nonceTPM)), + (UINT16)(offsetof(PolicySigned_In, cpHashA)), + (UINT16)(offsetof(PolicySigned_In, policyRef)), + (UINT16)(offsetof(PolicySigned_In, expiration)), + (UINT16)(offsetof(PolicySigned_In, auth)), + (UINT16)(offsetof(PolicySigned_Out, policyTicket))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_NONCE_P_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPM2B_NONCE_P_UNMARSHAL, + INT32_P_UNMARSHAL, + TPMT_SIGNATURE_P_UNMARSHAL, + END_OF_LIST, + TPM2B_TIMEOUT_P_MARSHAL, + TPMT_TK_AUTH_P_MARSHAL, + END_OF_LIST} +}; + +#define _PolicySignedDataAddress (&_PolicySignedData) +#else +#define _PolicySignedDataAddress 0 +#endif // CC_PolicySigned + +#if CC_PolicySecret +#include "PolicySecret_fp.h" + +typedef TPM_RC (PolicySecret_Entry)( + PolicySecret_In* in, + PolicySecret_Out* out +); + + +typedef const struct +{ + PolicySecret_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[6]; + BYTE types[10]; +} PolicySecret_COMMAND_DESCRIPTOR_t; + +PolicySecret_COMMAND_DESCRIPTOR_t _PolicySecretData = { + /* entry */ &TPM2_PolicySecret, + /* inSize */ (UINT16)(sizeof(PolicySecret_In)), + /* outSize */ (UINT16)(sizeof(PolicySecret_Out)), + /* offsetOfTypes */ offsetof(PolicySecret_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicySecret_In, policySession)), + (UINT16)(offsetof(PolicySecret_In, nonceTPM)), + (UINT16)(offsetof(PolicySecret_In, cpHashA)), + (UINT16)(offsetof(PolicySecret_In, policyRef)), + (UINT16)(offsetof(PolicySecret_In, expiration)), + (UINT16)(offsetof(PolicySecret_Out, policyTicket))}, + /* types */ {TPMI_DH_ENTITY_H_UNMARSHAL, + TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_NONCE_P_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPM2B_NONCE_P_UNMARSHAL, + INT32_P_UNMARSHAL, + END_OF_LIST, + TPM2B_TIMEOUT_P_MARSHAL, + TPMT_TK_AUTH_P_MARSHAL, + END_OF_LIST} +}; + +#define _PolicySecretDataAddress (&_PolicySecretData) +#else +#define _PolicySecretDataAddress 0 +#endif // CC_PolicySecret + +#if CC_PolicyTicket +#include "PolicyTicket_fp.h" + +typedef TPM_RC (PolicyTicket_Entry)( + PolicyTicket_In* in +); + + +typedef const struct +{ + PolicyTicket_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[8]; +} PolicyTicket_COMMAND_DESCRIPTOR_t; + +PolicyTicket_COMMAND_DESCRIPTOR_t _PolicyTicketData = { + /* entry */ &TPM2_PolicyTicket, + /* inSize */ (UINT16)(sizeof(PolicyTicket_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyTicket_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyTicket_In, timeout)), + (UINT16)(offsetof(PolicyTicket_In, cpHashA)), + (UINT16)(offsetof(PolicyTicket_In, policyRef)), + (UINT16)(offsetof(PolicyTicket_In, authName)), + (UINT16)(offsetof(PolicyTicket_In, ticket))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_TIMEOUT_P_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPM2B_NONCE_P_UNMARSHAL, + TPM2B_NAME_P_UNMARSHAL, + TPMT_TK_AUTH_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyTicketDataAddress (&_PolicyTicketData) +#else +#define _PolicyTicketDataAddress 0 +#endif // CC_PolicyTicket + +#if CC_PolicyOR +#include "PolicyOR_fp.h" + +typedef TPM_RC (PolicyOR_Entry)( + PolicyOR_In* in +); + + +typedef const struct +{ + PolicyOR_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} PolicyOR_COMMAND_DESCRIPTOR_t; + +PolicyOR_COMMAND_DESCRIPTOR_t _PolicyORData = { + /* entry */ &TPM2_PolicyOR, + /* inSize */ (UINT16)(sizeof(PolicyOR_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyOR_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyOR_In, pHashList))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPML_DIGEST_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyORDataAddress (&_PolicyORData) +#else +#define _PolicyORDataAddress 0 +#endif // CC_PolicyOR + +#if CC_PolicyPCR +#include "PolicyPCR_fp.h" + +typedef TPM_RC (PolicyPCR_Entry)( + PolicyPCR_In* in +); + + +typedef const struct +{ + PolicyPCR_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[5]; +} PolicyPCR_COMMAND_DESCRIPTOR_t; + +PolicyPCR_COMMAND_DESCRIPTOR_t _PolicyPCRData = { + /* entry */ &TPM2_PolicyPCR, + /* inSize */ (UINT16)(sizeof(PolicyPCR_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyPCR_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyPCR_In, pcrDigest)), + (UINT16)(offsetof(PolicyPCR_In, pcrs))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPML_PCR_SELECTION_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyPCRDataAddress (&_PolicyPCRData) +#else +#define _PolicyPCRDataAddress 0 +#endif // CC_PolicyPCR + +#if CC_PolicyLocality +#include "PolicyLocality_fp.h" + +typedef TPM_RC (PolicyLocality_Entry)( + PolicyLocality_In* in +); + + +typedef const struct +{ + PolicyLocality_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} PolicyLocality_COMMAND_DESCRIPTOR_t; + +PolicyLocality_COMMAND_DESCRIPTOR_t _PolicyLocalityData = { + /* entry */ &TPM2_PolicyLocality, + /* inSize */ (UINT16)(sizeof(PolicyLocality_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyLocality_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyLocality_In, locality))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPMA_LOCALITY_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyLocalityDataAddress (&_PolicyLocalityData) +#else +#define _PolicyLocalityDataAddress 0 +#endif // CC_PolicyLocality + +#if CC_PolicyNV +#include "PolicyNV_fp.h" + +typedef TPM_RC (PolicyNV_Entry)( + PolicyNV_In* in +); + + +typedef const struct +{ + PolicyNV_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[8]; +} PolicyNV_COMMAND_DESCRIPTOR_t; + +PolicyNV_COMMAND_DESCRIPTOR_t _PolicyNVData = { + /* entry */ &TPM2_PolicyNV, + /* inSize */ (UINT16)(sizeof(PolicyNV_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyNV_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyNV_In, nvIndex)), + (UINT16)(offsetof(PolicyNV_In, policySession)), + (UINT16)(offsetof(PolicyNV_In, operandB)), + (UINT16)(offsetof(PolicyNV_In, offset)), + (UINT16)(offsetof(PolicyNV_In, operation))}, + /* types */ {TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_NV_INDEX_H_UNMARSHAL, + TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_OPERAND_P_UNMARSHAL, + UINT16_P_UNMARSHAL, + TPM_EO_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyNVDataAddress (&_PolicyNVData) +#else +#define _PolicyNVDataAddress 0 +#endif // CC_PolicyNV + +#if CC_PolicyCounterTimer +#include "PolicyCounterTimer_fp.h" + +typedef TPM_RC (PolicyCounterTimer_Entry)( + PolicyCounterTimer_In* in +); + + +typedef const struct +{ + PolicyCounterTimer_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[6]; +} PolicyCounterTimer_COMMAND_DESCRIPTOR_t; + +PolicyCounterTimer_COMMAND_DESCRIPTOR_t _PolicyCounterTimerData = { + /* entry */ &TPM2_PolicyCounterTimer, + /* inSize */ (UINT16)(sizeof(PolicyCounterTimer_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyCounterTimer_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyCounterTimer_In, operandB)), + (UINT16)(offsetof(PolicyCounterTimer_In, offset)), + (UINT16)(offsetof(PolicyCounterTimer_In, operation))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_OPERAND_P_UNMARSHAL, + UINT16_P_UNMARSHAL, + TPM_EO_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyCounterTimerDataAddress (&_PolicyCounterTimerData) +#else +#define _PolicyCounterTimerDataAddress 0 +#endif // CC_PolicyCounterTimer + +#if CC_PolicyCommandCode +#include "PolicyCommandCode_fp.h" + +typedef TPM_RC (PolicyCommandCode_Entry)( + PolicyCommandCode_In* in +); + + +typedef const struct +{ + PolicyCommandCode_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} PolicyCommandCode_COMMAND_DESCRIPTOR_t; + +PolicyCommandCode_COMMAND_DESCRIPTOR_t _PolicyCommandCodeData = { + /* entry */ &TPM2_PolicyCommandCode, + /* inSize */ (UINT16)(sizeof(PolicyCommandCode_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyCommandCode_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyCommandCode_In, code))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM_CC_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyCommandCodeDataAddress (&_PolicyCommandCodeData) +#else +#define _PolicyCommandCodeDataAddress 0 +#endif // CC_PolicyCommandCode + +#if CC_PolicyPhysicalPresence +#include "PolicyPhysicalPresence_fp.h" + +typedef TPM_RC (PolicyPhysicalPresence_Entry)( + PolicyPhysicalPresence_In* in +); + + +typedef const struct +{ + PolicyPhysicalPresence_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} PolicyPhysicalPresence_COMMAND_DESCRIPTOR_t; + +PolicyPhysicalPresence_COMMAND_DESCRIPTOR_t _PolicyPhysicalPresenceData = { + /* entry */ &TPM2_PolicyPhysicalPresence, + /* inSize */ (UINT16)(sizeof(PolicyPhysicalPresence_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyPhysicalPresence_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyPhysicalPresenceDataAddress (&_PolicyPhysicalPresenceData) +#else +#define _PolicyPhysicalPresenceDataAddress 0 +#endif // CC_PolicyPhysicalPresence + +#if CC_PolicyCpHash +#include "PolicyCpHash_fp.h" + +typedef TPM_RC (PolicyCpHash_Entry)( + PolicyCpHash_In* in +); + + +typedef const struct +{ + PolicyCpHash_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} PolicyCpHash_COMMAND_DESCRIPTOR_t; + +PolicyCpHash_COMMAND_DESCRIPTOR_t _PolicyCpHashData = { + /* entry */ &TPM2_PolicyCpHash, + /* inSize */ (UINT16)(sizeof(PolicyCpHash_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyCpHash_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyCpHash_In, cpHashA))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyCpHashDataAddress (&_PolicyCpHashData) +#else +#define _PolicyCpHashDataAddress 0 +#endif // CC_PolicyCpHash + +#if CC_PolicyNameHash +#include "PolicyNameHash_fp.h" + +typedef TPM_RC (PolicyNameHash_Entry)( + PolicyNameHash_In* in +); + + +typedef const struct +{ + PolicyNameHash_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} PolicyNameHash_COMMAND_DESCRIPTOR_t; + +PolicyNameHash_COMMAND_DESCRIPTOR_t _PolicyNameHashData = { + /* entry */ &TPM2_PolicyNameHash, + /* inSize */ (UINT16)(sizeof(PolicyNameHash_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyNameHash_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyNameHash_In, nameHash))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyNameHashDataAddress (&_PolicyNameHashData) +#else +#define _PolicyNameHashDataAddress 0 +#endif // CC_PolicyNameHash + +#if CC_PolicyDuplicationSelect +#include "PolicyDuplicationSelect_fp.h" + +typedef TPM_RC (PolicyDuplicationSelect_Entry)( + PolicyDuplicationSelect_In* in +); + + +typedef const struct +{ + PolicyDuplicationSelect_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[6]; +} PolicyDuplicationSelect_COMMAND_DESCRIPTOR_t; + +PolicyDuplicationSelect_COMMAND_DESCRIPTOR_t _PolicyDuplicationSelectData = { + /* entry */ &TPM2_PolicyDuplicationSelect, + /* inSize */ (UINT16)(sizeof(PolicyDuplicationSelect_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyDuplicationSelect_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyDuplicationSelect_In, objectName)), + (UINT16)(offsetof(PolicyDuplicationSelect_In, newParentName)), + (UINT16)(offsetof(PolicyDuplicationSelect_In, includeObject))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_NAME_P_UNMARSHAL, + TPM2B_NAME_P_UNMARSHAL, + TPMI_YES_NO_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyDuplicationSelectDataAddress (&_PolicyDuplicationSelectData) +#else +#define _PolicyDuplicationSelectDataAddress 0 +#endif // CC_PolicyDuplicationSelect + +#if CC_PolicyAuthorize +#include "PolicyAuthorize_fp.h" + +typedef TPM_RC (PolicyAuthorize_Entry)( + PolicyAuthorize_In* in +); + + +typedef const struct +{ + PolicyAuthorize_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[4]; + BYTE types[7]; +} PolicyAuthorize_COMMAND_DESCRIPTOR_t; + +PolicyAuthorize_COMMAND_DESCRIPTOR_t _PolicyAuthorizeData = { + /* entry */ &TPM2_PolicyAuthorize, + /* inSize */ (UINT16)(sizeof(PolicyAuthorize_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyAuthorize_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyAuthorize_In, approvedPolicy)), + (UINT16)(offsetof(PolicyAuthorize_In, policyRef)), + (UINT16)(offsetof(PolicyAuthorize_In, keySign)), + (UINT16)(offsetof(PolicyAuthorize_In, checkTicket))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPM2B_NONCE_P_UNMARSHAL, + TPM2B_NAME_P_UNMARSHAL, + TPMT_TK_VERIFIED_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyAuthorizeDataAddress (&_PolicyAuthorizeData) +#else +#define _PolicyAuthorizeDataAddress 0 +#endif // CC_PolicyAuthorize + +#if CC_PolicyAuthValue +#include "PolicyAuthValue_fp.h" + +typedef TPM_RC (PolicyAuthValue_Entry)( + PolicyAuthValue_In* in +); + + +typedef const struct +{ + PolicyAuthValue_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} PolicyAuthValue_COMMAND_DESCRIPTOR_t; + +PolicyAuthValue_COMMAND_DESCRIPTOR_t _PolicyAuthValueData = { + /* entry */ &TPM2_PolicyAuthValue, + /* inSize */ (UINT16)(sizeof(PolicyAuthValue_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyAuthValue_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyAuthValueDataAddress (&_PolicyAuthValueData) +#else +#define _PolicyAuthValueDataAddress 0 +#endif // CC_PolicyAuthValue + +#if CC_PolicyPassword +#include "PolicyPassword_fp.h" + +typedef TPM_RC (PolicyPassword_Entry)( + PolicyPassword_In* in +); + + +typedef const struct +{ + PolicyPassword_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} PolicyPassword_COMMAND_DESCRIPTOR_t; + +PolicyPassword_COMMAND_DESCRIPTOR_t _PolicyPasswordData = { + /* entry */ &TPM2_PolicyPassword, + /* inSize */ (UINT16)(sizeof(PolicyPassword_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyPassword_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyPasswordDataAddress (&_PolicyPasswordData) +#else +#define _PolicyPasswordDataAddress 0 +#endif // CC_PolicyPassword + +#if CC_PolicyGetDigest +#include "PolicyGetDigest_fp.h" + +typedef TPM_RC (PolicyGetDigest_Entry)( + PolicyGetDigest_In* in, + PolicyGetDigest_Out* out +); + + +typedef const struct +{ + PolicyGetDigest_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[4]; +} PolicyGetDigest_COMMAND_DESCRIPTOR_t; + +PolicyGetDigest_COMMAND_DESCRIPTOR_t _PolicyGetDigestData = { + /* entry */ &TPM2_PolicyGetDigest, + /* inSize */ (UINT16)(sizeof(PolicyGetDigest_In)), + /* outSize */ (UINT16)(sizeof(PolicyGetDigest_Out)), + /* offsetOfTypes */ offsetof(PolicyGetDigest_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + END_OF_LIST, + TPM2B_DIGEST_P_MARSHAL, + END_OF_LIST} +}; + +#define _PolicyGetDigestDataAddress (&_PolicyGetDigestData) +#else +#define _PolicyGetDigestDataAddress 0 +#endif // CC_PolicyGetDigest + +#if CC_PolicyNvWritten +#include "PolicyNvWritten_fp.h" + +typedef TPM_RC (PolicyNvWritten_Entry)( + PolicyNvWritten_In* in +); + + +typedef const struct +{ + PolicyNvWritten_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} PolicyNvWritten_COMMAND_DESCRIPTOR_t; + +PolicyNvWritten_COMMAND_DESCRIPTOR_t _PolicyNvWrittenData = { + /* entry */ &TPM2_PolicyNvWritten, + /* inSize */ (UINT16)(sizeof(PolicyNvWritten_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyNvWritten_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyNvWritten_In, writtenSet))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPMI_YES_NO_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyNvWrittenDataAddress (&_PolicyNvWrittenData) +#else +#define _PolicyNvWrittenDataAddress 0 +#endif // CC_PolicyNvWritten + +#if CC_PolicyTemplate +#include "PolicyTemplate_fp.h" + +typedef TPM_RC (PolicyTemplate_Entry)( + PolicyTemplate_In* in +); + + +typedef const struct +{ + PolicyTemplate_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} PolicyTemplate_COMMAND_DESCRIPTOR_t; + +PolicyTemplate_COMMAND_DESCRIPTOR_t _PolicyTemplateData = { + /* entry */ &TPM2_PolicyTemplate, + /* inSize */ (UINT16)(sizeof(PolicyTemplate_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyTemplate_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyTemplate_In, templateHash))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyTemplateDataAddress (&_PolicyTemplateData) +#else +#define _PolicyTemplateDataAddress 0 +#endif // CC_PolicyTemplate + +#if CC_PolicyAuthorizeNV +#include "PolicyAuthorizeNV_fp.h" + +typedef TPM_RC (PolicyAuthorizeNV_Entry)( + PolicyAuthorizeNV_In* in +); + + +typedef const struct +{ + PolicyAuthorizeNV_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[5]; +} PolicyAuthorizeNV_COMMAND_DESCRIPTOR_t; + +PolicyAuthorizeNV_COMMAND_DESCRIPTOR_t _PolicyAuthorizeNVData = { + /* entry */ &TPM2_PolicyAuthorizeNV, + /* inSize */ (UINT16)(sizeof(PolicyAuthorizeNV_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyAuthorizeNV_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyAuthorizeNV_In, nvIndex)), + (UINT16)(offsetof(PolicyAuthorizeNV_In, policySession))}, + /* types */ {TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_NV_INDEX_H_UNMARSHAL, + TPMI_SH_POLICY_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyAuthorizeNVDataAddress (&_PolicyAuthorizeNVData) +#else +#define _PolicyAuthorizeNVDataAddress 0 +#endif // CC_PolicyAuthorizeNV + +#if CC_PolicyCapability +#include "PolicyCapability_fp.h" + +typedef TPM_RC (PolicyCapability_Entry)( + PolicyCapability_In* in +); + + +typedef const struct +{ + PolicyCapability_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[5]; + BYTE types[8]; +} PolicyCapability_COMMAND_DESCRIPTOR_t; + +PolicyCapability_COMMAND_DESCRIPTOR_t _PolicyCapabilityData = { + /* entry */ &TPM2_PolicyCapability, + /* inSize */ (UINT16)(sizeof(PolicyCapability_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyCapability_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyCapability_In, operandB)), + (UINT16)(offsetof(PolicyCapability_In, offset)), + (UINT16)(offsetof(PolicyCapability_In, operation)), + (UINT16)(offsetof(PolicyCapability_In, capability)), + (UINT16)(offsetof(PolicyCapability_In, property))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_OPERAND_P_UNMARSHAL, + UINT16_P_UNMARSHAL, + TPM_EO_P_UNMARSHAL, + TPM_CAP_P_UNMARSHAL, + UINT32_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyCapabilityDataAddress (&_PolicyCapabilityData) +#else +#define _PolicyCapabilityDataAddress 0 +#endif // CC_PolicyCapability + +#if CC_PolicyParameters +#include "PolicyParameters_fp.h" + +typedef TPM_RC (PolicyParameters_Entry)( + PolicyParameters_In* in +); + + +typedef const struct +{ + PolicyParameters_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} PolicyParameters_COMMAND_DESCRIPTOR_t; + +PolicyParameters_COMMAND_DESCRIPTOR_t _PolicyParametersData = { + /* entry */ &TPM2_PolicyParameters, + /* inSize */ (UINT16)(sizeof(PolicyParameters_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PolicyParameters_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PolicyParameters_In, pHash))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PolicyParametersDataAddress (&_PolicyParametersData) +#else +#define _PolicyParametersDataAddress 0 +#endif // CC_PolicyParameters + +#if CC_CreatePrimary +#include "CreatePrimary_fp.h" + +typedef TPM_RC (CreatePrimary_Entry)( + CreatePrimary_In* in, + CreatePrimary_Out* out +); + + +typedef const struct +{ + CreatePrimary_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[9]; + BYTE types[13]; +} CreatePrimary_COMMAND_DESCRIPTOR_t; + +CreatePrimary_COMMAND_DESCRIPTOR_t _CreatePrimaryData = { + /* entry */ &TPM2_CreatePrimary, + /* inSize */ (UINT16)(sizeof(CreatePrimary_In)), + /* outSize */ (UINT16)(sizeof(CreatePrimary_Out)), + /* offsetOfTypes */ offsetof(CreatePrimary_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(CreatePrimary_In, inSensitive)), + (UINT16)(offsetof(CreatePrimary_In, inPublic)), + (UINT16)(offsetof(CreatePrimary_In, outsideInfo)), + (UINT16)(offsetof(CreatePrimary_In, creationPCR)), + (UINT16)(offsetof(CreatePrimary_Out, outPublic)), + (UINT16)(offsetof(CreatePrimary_Out, creationData)), + (UINT16)(offsetof(CreatePrimary_Out, creationHash)), + (UINT16)(offsetof(CreatePrimary_Out, creationTicket)), + (UINT16)(offsetof(CreatePrimary_Out, name))}, + /* types */ {TPMI_RH_HIERARCHY_H_UNMARSHAL + ADD_FLAG, + TPM2B_SENSITIVE_CREATE_P_UNMARSHAL, + TPM2B_PUBLIC_P_UNMARSHAL, + TPM2B_DATA_P_UNMARSHAL, + TPML_PCR_SELECTION_P_UNMARSHAL, + END_OF_LIST, + TPM_HANDLE_H_MARSHAL, + TPM2B_PUBLIC_P_MARSHAL, + TPM2B_CREATION_DATA_P_MARSHAL, + TPM2B_DIGEST_P_MARSHAL, + TPMT_TK_CREATION_P_MARSHAL, + TPM2B_NAME_P_MARSHAL, + END_OF_LIST} +}; + +#define _CreatePrimaryDataAddress (&_CreatePrimaryData) +#else +#define _CreatePrimaryDataAddress 0 +#endif // CC_CreatePrimary + +#if CC_HierarchyControl +#include "HierarchyControl_fp.h" + +typedef TPM_RC (HierarchyControl_Entry)( + HierarchyControl_In* in +); + + +typedef const struct +{ + HierarchyControl_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[5]; +} HierarchyControl_COMMAND_DESCRIPTOR_t; + +HierarchyControl_COMMAND_DESCRIPTOR_t _HierarchyControlData = { + /* entry */ &TPM2_HierarchyControl, + /* inSize */ (UINT16)(sizeof(HierarchyControl_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(HierarchyControl_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(HierarchyControl_In, enable)), + (UINT16)(offsetof(HierarchyControl_In, state))}, + /* types */ {TPMI_RH_HIERARCHY_H_UNMARSHAL, + TPMI_RH_ENABLES_P_UNMARSHAL, + TPMI_YES_NO_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _HierarchyControlDataAddress (&_HierarchyControlData) +#else +#define _HierarchyControlDataAddress 0 +#endif // CC_HierarchyControl + +#if CC_SetPrimaryPolicy +#include "SetPrimaryPolicy_fp.h" + +typedef TPM_RC (SetPrimaryPolicy_Entry)( + SetPrimaryPolicy_In* in +); + + +typedef const struct +{ + SetPrimaryPolicy_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[5]; +} SetPrimaryPolicy_COMMAND_DESCRIPTOR_t; + +SetPrimaryPolicy_COMMAND_DESCRIPTOR_t _SetPrimaryPolicyData = { + /* entry */ &TPM2_SetPrimaryPolicy, + /* inSize */ (UINT16)(sizeof(SetPrimaryPolicy_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(SetPrimaryPolicy_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(SetPrimaryPolicy_In, authPolicy)), + (UINT16)(offsetof(SetPrimaryPolicy_In, hashAlg))}, + /* types */ {TPMI_RH_HIERARCHY_POLICY_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPMI_ALG_HASH_P_UNMARSHAL + ADD_FLAG, + END_OF_LIST, + END_OF_LIST} +}; + +#define _SetPrimaryPolicyDataAddress (&_SetPrimaryPolicyData) +#else +#define _SetPrimaryPolicyDataAddress 0 +#endif // CC_SetPrimaryPolicy + +#if CC_ChangePPS +#include "ChangePPS_fp.h" + +typedef TPM_RC (ChangePPS_Entry)( + ChangePPS_In* in +); + + +typedef const struct +{ + ChangePPS_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} ChangePPS_COMMAND_DESCRIPTOR_t; + +ChangePPS_COMMAND_DESCRIPTOR_t _ChangePPSData = { + /* entry */ &TPM2_ChangePPS, + /* inSize */ (UINT16)(sizeof(ChangePPS_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(ChangePPS_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_RH_PLATFORM_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _ChangePPSDataAddress (&_ChangePPSData) +#else +#define _ChangePPSDataAddress 0 +#endif // CC_ChangePPS + +#if CC_ChangeEPS +#include "ChangeEPS_fp.h" + +typedef TPM_RC (ChangeEPS_Entry)( + ChangeEPS_In* in +); + + +typedef const struct +{ + ChangeEPS_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} ChangeEPS_COMMAND_DESCRIPTOR_t; + +ChangeEPS_COMMAND_DESCRIPTOR_t _ChangeEPSData = { + /* entry */ &TPM2_ChangeEPS, + /* inSize */ (UINT16)(sizeof(ChangeEPS_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(ChangeEPS_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_RH_PLATFORM_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _ChangeEPSDataAddress (&_ChangeEPSData) +#else +#define _ChangeEPSDataAddress 0 +#endif // CC_ChangeEPS + +#if CC_Clear +#include "Clear_fp.h" + +typedef TPM_RC (Clear_Entry)( + Clear_In* in +); + + +typedef const struct +{ + Clear_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} Clear_COMMAND_DESCRIPTOR_t; + +Clear_COMMAND_DESCRIPTOR_t _ClearData = { + /* entry */ &TPM2_Clear, + /* inSize */ (UINT16)(sizeof(Clear_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(Clear_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_RH_CLEAR_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _ClearDataAddress (&_ClearData) +#else +#define _ClearDataAddress 0 +#endif // CC_Clear + +#if CC_ClearControl +#include "ClearControl_fp.h" + +typedef TPM_RC (ClearControl_Entry)( + ClearControl_In* in +); + + +typedef const struct +{ + ClearControl_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} ClearControl_COMMAND_DESCRIPTOR_t; + +ClearControl_COMMAND_DESCRIPTOR_t _ClearControlData = { + /* entry */ &TPM2_ClearControl, + /* inSize */ (UINT16)(sizeof(ClearControl_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(ClearControl_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ClearControl_In, disable))}, + /* types */ {TPMI_RH_CLEAR_H_UNMARSHAL, + TPMI_YES_NO_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _ClearControlDataAddress (&_ClearControlData) +#else +#define _ClearControlDataAddress 0 +#endif // CC_ClearControl + +#if CC_HierarchyChangeAuth +#include "HierarchyChangeAuth_fp.h" + +typedef TPM_RC (HierarchyChangeAuth_Entry)( + HierarchyChangeAuth_In* in +); + + +typedef const struct +{ + HierarchyChangeAuth_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} HierarchyChangeAuth_COMMAND_DESCRIPTOR_t; + +HierarchyChangeAuth_COMMAND_DESCRIPTOR_t _HierarchyChangeAuthData = { + /* entry */ &TPM2_HierarchyChangeAuth, + /* inSize */ (UINT16)(sizeof(HierarchyChangeAuth_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(HierarchyChangeAuth_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(HierarchyChangeAuth_In, newAuth))}, + /* types */ {TPMI_RH_HIERARCHY_AUTH_H_UNMARSHAL, + TPM2B_AUTH_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _HierarchyChangeAuthDataAddress (&_HierarchyChangeAuthData) +#else +#define _HierarchyChangeAuthDataAddress 0 +#endif // CC_HierarchyChangeAuth + +#if CC_DictionaryAttackLockReset +#include "DictionaryAttackLockReset_fp.h" + +typedef TPM_RC (DictionaryAttackLockReset_Entry)( + DictionaryAttackLockReset_In* in +); + + +typedef const struct +{ + DictionaryAttackLockReset_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} DictionaryAttackLockReset_COMMAND_DESCRIPTOR_t; + +DictionaryAttackLockReset_COMMAND_DESCRIPTOR_t _DictionaryAttackLockResetData = { + /* entry */ &TPM2_DictionaryAttackLockReset, + /* inSize */ (UINT16)(sizeof(DictionaryAttackLockReset_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(DictionaryAttackLockReset_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_RH_LOCKOUT_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _DictionaryAttackLockResetDataAddress (&_DictionaryAttackLockResetData) +#else +#define _DictionaryAttackLockResetDataAddress 0 +#endif // CC_DictionaryAttackLockReset + +#if CC_DictionaryAttackParameters +#include "DictionaryAttackParameters_fp.h" + +typedef TPM_RC (DictionaryAttackParameters_Entry)( + DictionaryAttackParameters_In* in +); + + +typedef const struct +{ + DictionaryAttackParameters_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[6]; +} DictionaryAttackParameters_COMMAND_DESCRIPTOR_t; + +DictionaryAttackParameters_COMMAND_DESCRIPTOR_t _DictionaryAttackParametersData = { + /* entry */ &TPM2_DictionaryAttackParameters, + /* inSize */ (UINT16)(sizeof(DictionaryAttackParameters_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(DictionaryAttackParameters_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(DictionaryAttackParameters_In, newMaxTries)), + (UINT16)(offsetof(DictionaryAttackParameters_In, newRecoveryTime)), + (UINT16)(offsetof(DictionaryAttackParameters_In, lockoutRecovery))}, + /* types */ {TPMI_RH_LOCKOUT_H_UNMARSHAL, + UINT32_P_UNMARSHAL, + UINT32_P_UNMARSHAL, + UINT32_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _DictionaryAttackParametersDataAddress (&_DictionaryAttackParametersData) +#else +#define _DictionaryAttackParametersDataAddress 0 +#endif // CC_DictionaryAttackParameters + +#if CC_PP_Commands +#include "PP_Commands_fp.h" + +typedef TPM_RC (PP_Commands_Entry)( + PP_Commands_In* in +); + + +typedef const struct +{ + PP_Commands_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[5]; +} PP_Commands_COMMAND_DESCRIPTOR_t; + +PP_Commands_COMMAND_DESCRIPTOR_t _PP_CommandsData = { + /* entry */ &TPM2_PP_Commands, + /* inSize */ (UINT16)(sizeof(PP_Commands_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(PP_Commands_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(PP_Commands_In, setList)), + (UINT16)(offsetof(PP_Commands_In, clearList))}, + /* types */ {TPMI_RH_PLATFORM_H_UNMARSHAL, + TPML_CC_P_UNMARSHAL, + TPML_CC_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _PP_CommandsDataAddress (&_PP_CommandsData) +#else +#define _PP_CommandsDataAddress 0 +#endif // CC_PP_Commands + +#if CC_SetAlgorithmSet +#include "SetAlgorithmSet_fp.h" + +typedef TPM_RC (SetAlgorithmSet_Entry)( + SetAlgorithmSet_In* in +); + + +typedef const struct +{ + SetAlgorithmSet_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} SetAlgorithmSet_COMMAND_DESCRIPTOR_t; + +SetAlgorithmSet_COMMAND_DESCRIPTOR_t _SetAlgorithmSetData = { + /* entry */ &TPM2_SetAlgorithmSet, + /* inSize */ (UINT16)(sizeof(SetAlgorithmSet_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(SetAlgorithmSet_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(SetAlgorithmSet_In, algorithmSet))}, + /* types */ {TPMI_RH_PLATFORM_H_UNMARSHAL, + UINT32_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _SetAlgorithmSetDataAddress (&_SetAlgorithmSetData) +#else +#define _SetAlgorithmSetDataAddress 0 +#endif // CC_SetAlgorithmSet + +#if CC_FieldUpgradeStart +#include "FieldUpgradeStart_fp.h" + +typedef TPM_RC (FieldUpgradeStart_Entry)( + FieldUpgradeStart_In* in +); + + +typedef const struct +{ + FieldUpgradeStart_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[6]; +} FieldUpgradeStart_COMMAND_DESCRIPTOR_t; + +FieldUpgradeStart_COMMAND_DESCRIPTOR_t _FieldUpgradeStartData = { + /* entry */ &TPM2_FieldUpgradeStart, + /* inSize */ (UINT16)(sizeof(FieldUpgradeStart_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(FieldUpgradeStart_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(FieldUpgradeStart_In, keyHandle)), + (UINT16)(offsetof(FieldUpgradeStart_In, fuDigest)), + (UINT16)(offsetof(FieldUpgradeStart_In, manifestSignature))}, + /* types */ {TPMI_RH_PLATFORM_H_UNMARSHAL, + TPMI_DH_OBJECT_H_UNMARSHAL, + TPM2B_DIGEST_P_UNMARSHAL, + TPMT_SIGNATURE_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _FieldUpgradeStartDataAddress (&_FieldUpgradeStartData) +#else +#define _FieldUpgradeStartDataAddress 0 +#endif // CC_FieldUpgradeStart + +#if CC_FieldUpgradeData +#include "FieldUpgradeData_fp.h" + +typedef TPM_RC (FieldUpgradeData_Entry)( + FieldUpgradeData_In* in, + FieldUpgradeData_Out* out +); + + +typedef const struct +{ + FieldUpgradeData_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[5]; +} FieldUpgradeData_COMMAND_DESCRIPTOR_t; + +FieldUpgradeData_COMMAND_DESCRIPTOR_t _FieldUpgradeDataData = { + /* entry */ &TPM2_FieldUpgradeData, + /* inSize */ (UINT16)(sizeof(FieldUpgradeData_In)), + /* outSize */ (UINT16)(sizeof(FieldUpgradeData_Out)), + /* offsetOfTypes */ offsetof(FieldUpgradeData_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(FieldUpgradeData_Out, firstDigest))}, + /* types */ {TPM2B_MAX_BUFFER_P_UNMARSHAL, + END_OF_LIST, + TPMT_HA_P_MARSHAL, + TPMT_HA_P_MARSHAL, + END_OF_LIST} +}; + +#define _FieldUpgradeDataDataAddress (&_FieldUpgradeDataData) +#else +#define _FieldUpgradeDataDataAddress 0 +#endif // CC_FieldUpgradeData + +#if CC_FirmwareRead +#include "FirmwareRead_fp.h" + +typedef TPM_RC (FirmwareRead_Entry)( + FirmwareRead_In* in, + FirmwareRead_Out* out +); + + +typedef const struct +{ + FirmwareRead_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[4]; +} FirmwareRead_COMMAND_DESCRIPTOR_t; + +FirmwareRead_COMMAND_DESCRIPTOR_t _FirmwareReadData = { + /* entry */ &TPM2_FirmwareRead, + /* inSize */ (UINT16)(sizeof(FirmwareRead_In)), + /* outSize */ (UINT16)(sizeof(FirmwareRead_Out)), + /* offsetOfTypes */ offsetof(FirmwareRead_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {UINT32_P_UNMARSHAL, + END_OF_LIST, + TPM2B_MAX_BUFFER_P_MARSHAL, + END_OF_LIST} +}; + +#define _FirmwareReadDataAddress (&_FirmwareReadData) +#else +#define _FirmwareReadDataAddress 0 +#endif // CC_FirmwareRead + +#if CC_ContextSave +#include "ContextSave_fp.h" + +typedef TPM_RC (ContextSave_Entry)( + ContextSave_In* in, + ContextSave_Out* out +); + + +typedef const struct +{ + ContextSave_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[4]; +} ContextSave_COMMAND_DESCRIPTOR_t; + +ContextSave_COMMAND_DESCRIPTOR_t _ContextSaveData = { + /* entry */ &TPM2_ContextSave, + /* inSize */ (UINT16)(sizeof(ContextSave_In)), + /* outSize */ (UINT16)(sizeof(ContextSave_Out)), + /* offsetOfTypes */ offsetof(ContextSave_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_DH_CONTEXT_H_UNMARSHAL, + END_OF_LIST, + TPMS_CONTEXT_P_MARSHAL, + END_OF_LIST} +}; + +#define _ContextSaveDataAddress (&_ContextSaveData) +#else +#define _ContextSaveDataAddress 0 +#endif // CC_ContextSave + +#if CC_ContextLoad +#include "ContextLoad_fp.h" + +typedef TPM_RC (ContextLoad_Entry)( + ContextLoad_In* in, + ContextLoad_Out* out +); + + +typedef const struct +{ + ContextLoad_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[4]; +} ContextLoad_COMMAND_DESCRIPTOR_t; + +ContextLoad_COMMAND_DESCRIPTOR_t _ContextLoadData = { + /* entry */ &TPM2_ContextLoad, + /* inSize */ (UINT16)(sizeof(ContextLoad_In)), + /* outSize */ (UINT16)(sizeof(ContextLoad_Out)), + /* offsetOfTypes */ offsetof(ContextLoad_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMS_CONTEXT_P_UNMARSHAL, + END_OF_LIST, + TPMI_DH_CONTEXT_H_MARSHAL, + END_OF_LIST} +}; + +#define _ContextLoadDataAddress (&_ContextLoadData) +#else +#define _ContextLoadDataAddress 0 +#endif // CC_ContextLoad + +#if CC_FlushContext +#include "FlushContext_fp.h" + +typedef TPM_RC (FlushContext_Entry)( + FlushContext_In* in +); + + +typedef const struct +{ + FlushContext_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} FlushContext_COMMAND_DESCRIPTOR_t; + +FlushContext_COMMAND_DESCRIPTOR_t _FlushContextData = { + /* entry */ &TPM2_FlushContext, + /* inSize */ (UINT16)(sizeof(FlushContext_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(FlushContext_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_DH_CONTEXT_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _FlushContextDataAddress (&_FlushContextData) +#else +#define _FlushContextDataAddress 0 +#endif // CC_FlushContext + +#if CC_EvictControl +#include "EvictControl_fp.h" + +typedef TPM_RC (EvictControl_Entry)( + EvictControl_In* in +); + + +typedef const struct +{ + EvictControl_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[5]; +} EvictControl_COMMAND_DESCRIPTOR_t; + +EvictControl_COMMAND_DESCRIPTOR_t _EvictControlData = { + /* entry */ &TPM2_EvictControl, + /* inSize */ (UINT16)(sizeof(EvictControl_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(EvictControl_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(EvictControl_In, objectHandle)), + (UINT16)(offsetof(EvictControl_In, persistentHandle))}, + /* types */ {TPMI_RH_PROVISION_H_UNMARSHAL, + TPMI_DH_OBJECT_H_UNMARSHAL, + TPMI_DH_PERSISTENT_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _EvictControlDataAddress (&_EvictControlData) +#else +#define _EvictControlDataAddress 0 +#endif // CC_EvictControl + +#if CC_ReadClock +#include "ReadClock_fp.h" + +typedef TPM_RC (ReadClock_Entry)( + ReadClock_Out* out +); + + +typedef const struct +{ + ReadClock_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} ReadClock_COMMAND_DESCRIPTOR_t; + +ReadClock_COMMAND_DESCRIPTOR_t _ReadClockData = { + /* entry */ &TPM2_ReadClock, + /* inSize */ 0, + /* outSize */ (UINT16)(sizeof(ReadClock_Out)), + /* offsetOfTypes */ offsetof(ReadClock_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {END_OF_LIST, + TPMS_TIME_INFO_P_MARSHAL, + END_OF_LIST} +}; + +#define _ReadClockDataAddress (&_ReadClockData) +#else +#define _ReadClockDataAddress 0 +#endif // CC_ReadClock + +#if CC_ClockSet +#include "ClockSet_fp.h" + +typedef TPM_RC (ClockSet_Entry)( + ClockSet_In* in +); + + +typedef const struct +{ + ClockSet_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} ClockSet_COMMAND_DESCRIPTOR_t; + +ClockSet_COMMAND_DESCRIPTOR_t _ClockSetData = { + /* entry */ &TPM2_ClockSet, + /* inSize */ (UINT16)(sizeof(ClockSet_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(ClockSet_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ClockSet_In, newTime))}, + /* types */ {TPMI_RH_PROVISION_H_UNMARSHAL, + UINT64_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _ClockSetDataAddress (&_ClockSetData) +#else +#define _ClockSetDataAddress 0 +#endif // CC_ClockSet + +#if CC_ClockRateAdjust +#include "ClockRateAdjust_fp.h" + +typedef TPM_RC (ClockRateAdjust_Entry)( + ClockRateAdjust_In* in +); + + +typedef const struct +{ + ClockRateAdjust_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} ClockRateAdjust_COMMAND_DESCRIPTOR_t; + +ClockRateAdjust_COMMAND_DESCRIPTOR_t _ClockRateAdjustData = { + /* entry */ &TPM2_ClockRateAdjust, + /* inSize */ (UINT16)(sizeof(ClockRateAdjust_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(ClockRateAdjust_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ClockRateAdjust_In, rateAdjust))}, + /* types */ {TPMI_RH_PROVISION_H_UNMARSHAL, + TPM_CLOCK_ADJUST_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _ClockRateAdjustDataAddress (&_ClockRateAdjustData) +#else +#define _ClockRateAdjustDataAddress 0 +#endif // CC_ClockRateAdjust + +#if CC_GetCapability +#include "GetCapability_fp.h" + +typedef TPM_RC (GetCapability_Entry)( + GetCapability_In* in, + GetCapability_Out* out +); + + +typedef const struct +{ + GetCapability_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} GetCapability_COMMAND_DESCRIPTOR_t; + +GetCapability_COMMAND_DESCRIPTOR_t _GetCapabilityData = { + /* entry */ &TPM2_GetCapability, + /* inSize */ (UINT16)(sizeof(GetCapability_In)), + /* outSize */ (UINT16)(sizeof(GetCapability_Out)), + /* offsetOfTypes */ offsetof(GetCapability_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(GetCapability_In, property)), + (UINT16)(offsetof(GetCapability_In, propertyCount)), + (UINT16)(offsetof(GetCapability_Out, capabilityData))}, + /* types */ {TPM_CAP_P_UNMARSHAL, + UINT32_P_UNMARSHAL, + UINT32_P_UNMARSHAL, + END_OF_LIST, + TPMI_YES_NO_P_MARSHAL, + TPMS_CAPABILITY_DATA_P_MARSHAL, + END_OF_LIST} +}; + +#define _GetCapabilityDataAddress (&_GetCapabilityData) +#else +#define _GetCapabilityDataAddress 0 +#endif // CC_GetCapability + +#if CC_TestParms +#include "TestParms_fp.h" + +typedef TPM_RC (TestParms_Entry)( + TestParms_In* in +); + + +typedef const struct +{ + TestParms_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} TestParms_COMMAND_DESCRIPTOR_t; + +TestParms_COMMAND_DESCRIPTOR_t _TestParmsData = { + /* entry */ &TPM2_TestParms, + /* inSize */ (UINT16)(sizeof(TestParms_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(TestParms_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMT_PUBLIC_PARMS_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _TestParmsDataAddress (&_TestParmsData) +#else +#define _TestParmsDataAddress 0 +#endif // CC_TestParms + +#if CC_NV_DefineSpace +#include "NV_DefineSpace_fp.h" + +typedef TPM_RC (NV_DefineSpace_Entry)( + NV_DefineSpace_In* in +); + + +typedef const struct +{ + NV_DefineSpace_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[5]; +} NV_DefineSpace_COMMAND_DESCRIPTOR_t; + +NV_DefineSpace_COMMAND_DESCRIPTOR_t _NV_DefineSpaceData = { + /* entry */ &TPM2_NV_DefineSpace, + /* inSize */ (UINT16)(sizeof(NV_DefineSpace_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_DefineSpace_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_DefineSpace_In, auth)), + (UINT16)(offsetof(NV_DefineSpace_In, publicInfo))}, + /* types */ {TPMI_RH_PROVISION_H_UNMARSHAL, + TPM2B_AUTH_P_UNMARSHAL, + TPM2B_NV_PUBLIC_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_DefineSpaceDataAddress (&_NV_DefineSpaceData) +#else +#define _NV_DefineSpaceDataAddress 0 +#endif // CC_NV_DefineSpace + +#if CC_NV_UndefineSpace +#include "NV_UndefineSpace_fp.h" + +typedef TPM_RC (NV_UndefineSpace_Entry)( + NV_UndefineSpace_In* in +); + + +typedef const struct +{ + NV_UndefineSpace_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} NV_UndefineSpace_COMMAND_DESCRIPTOR_t; + +NV_UndefineSpace_COMMAND_DESCRIPTOR_t _NV_UndefineSpaceData = { + /* entry */ &TPM2_NV_UndefineSpace, + /* inSize */ (UINT16)(sizeof(NV_UndefineSpace_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_UndefineSpace_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_UndefineSpace_In, nvIndex))}, + /* types */ {TPMI_RH_PROVISION_H_UNMARSHAL, + TPMI_RH_NV_DEFINED_INDEX_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_UndefineSpaceDataAddress (&_NV_UndefineSpaceData) +#else +#define _NV_UndefineSpaceDataAddress 0 +#endif // CC_NV_UndefineSpace + +#if CC_NV_UndefineSpaceSpecial +#include "NV_UndefineSpaceSpecial_fp.h" + +typedef TPM_RC (NV_UndefineSpaceSpecial_Entry)( + NV_UndefineSpaceSpecial_In* in +); + + +typedef const struct +{ + NV_UndefineSpaceSpecial_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} NV_UndefineSpaceSpecial_COMMAND_DESCRIPTOR_t; + +NV_UndefineSpaceSpecial_COMMAND_DESCRIPTOR_t _NV_UndefineSpaceSpecialData = { + /* entry */ &TPM2_NV_UndefineSpaceSpecial, + /* inSize */ (UINT16)(sizeof(NV_UndefineSpaceSpecial_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_UndefineSpaceSpecial_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_UndefineSpaceSpecial_In, platform))}, + /* types */ {TPMI_RH_NV_DEFINED_INDEX_H_UNMARSHAL, + TPMI_RH_PLATFORM_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_UndefineSpaceSpecialDataAddress (&_NV_UndefineSpaceSpecialData) +#else +#define _NV_UndefineSpaceSpecialDataAddress 0 +#endif // CC_NV_UndefineSpaceSpecial + +#if CC_NV_ReadPublic +#include "NV_ReadPublic_fp.h" + +typedef TPM_RC (NV_ReadPublic_Entry)( + NV_ReadPublic_In* in, + NV_ReadPublic_Out* out +); + + +typedef const struct +{ + NV_ReadPublic_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[5]; +} NV_ReadPublic_COMMAND_DESCRIPTOR_t; + +NV_ReadPublic_COMMAND_DESCRIPTOR_t _NV_ReadPublicData = { + /* entry */ &TPM2_NV_ReadPublic, + /* inSize */ (UINT16)(sizeof(NV_ReadPublic_In)), + /* outSize */ (UINT16)(sizeof(NV_ReadPublic_Out)), + /* offsetOfTypes */ offsetof(NV_ReadPublic_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_ReadPublic_Out, nvName))}, + /* types */ {TPMI_RH_NV_INDEX_H_UNMARSHAL, + END_OF_LIST, + TPM2B_NV_PUBLIC_P_MARSHAL, + TPM2B_NAME_P_MARSHAL, + END_OF_LIST} +}; + +#define _NV_ReadPublicDataAddress (&_NV_ReadPublicData) +#else +#define _NV_ReadPublicDataAddress 0 +#endif // CC_NV_ReadPublic + +#if CC_NV_Write +#include "NV_Write_fp.h" + +typedef TPM_RC (NV_Write_Entry)( + NV_Write_In* in +); + + +typedef const struct +{ + NV_Write_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[6]; +} NV_Write_COMMAND_DESCRIPTOR_t; + +NV_Write_COMMAND_DESCRIPTOR_t _NV_WriteData = { + /* entry */ &TPM2_NV_Write, + /* inSize */ (UINT16)(sizeof(NV_Write_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_Write_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_Write_In, nvIndex)), + (UINT16)(offsetof(NV_Write_In, data)), + (UINT16)(offsetof(NV_Write_In, offset))}, + /* types */ {TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_NV_INDEX_H_UNMARSHAL, + TPM2B_MAX_NV_BUFFER_P_UNMARSHAL, + UINT16_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_WriteDataAddress (&_NV_WriteData) +#else +#define _NV_WriteDataAddress 0 +#endif // CC_NV_Write + +#if CC_NV_Increment +#include "NV_Increment_fp.h" + +typedef TPM_RC (NV_Increment_Entry)( + NV_Increment_In* in +); + + +typedef const struct +{ + NV_Increment_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} NV_Increment_COMMAND_DESCRIPTOR_t; + +NV_Increment_COMMAND_DESCRIPTOR_t _NV_IncrementData = { + /* entry */ &TPM2_NV_Increment, + /* inSize */ (UINT16)(sizeof(NV_Increment_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_Increment_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_Increment_In, nvIndex))}, + /* types */ {TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_NV_INDEX_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_IncrementDataAddress (&_NV_IncrementData) +#else +#define _NV_IncrementDataAddress 0 +#endif // CC_NV_Increment + +#if CC_NV_Extend +#include "NV_Extend_fp.h" + +typedef TPM_RC (NV_Extend_Entry)( + NV_Extend_In* in +); + + +typedef const struct +{ + NV_Extend_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[5]; +} NV_Extend_COMMAND_DESCRIPTOR_t; + +NV_Extend_COMMAND_DESCRIPTOR_t _NV_ExtendData = { + /* entry */ &TPM2_NV_Extend, + /* inSize */ (UINT16)(sizeof(NV_Extend_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_Extend_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_Extend_In, nvIndex)), + (UINT16)(offsetof(NV_Extend_In, data))}, + /* types */ {TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_NV_INDEX_H_UNMARSHAL, + TPM2B_MAX_NV_BUFFER_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_ExtendDataAddress (&_NV_ExtendData) +#else +#define _NV_ExtendDataAddress 0 +#endif // CC_NV_Extend + +#if CC_NV_SetBits +#include "NV_SetBits_fp.h" + +typedef TPM_RC (NV_SetBits_Entry)( + NV_SetBits_In* in +); + + +typedef const struct +{ + NV_SetBits_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[5]; +} NV_SetBits_COMMAND_DESCRIPTOR_t; + +NV_SetBits_COMMAND_DESCRIPTOR_t _NV_SetBitsData = { + /* entry */ &TPM2_NV_SetBits, + /* inSize */ (UINT16)(sizeof(NV_SetBits_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_SetBits_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_SetBits_In, nvIndex)), + (UINT16)(offsetof(NV_SetBits_In, bits))}, + /* types */ {TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_NV_INDEX_H_UNMARSHAL, + UINT64_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_SetBitsDataAddress (&_NV_SetBitsData) +#else +#define _NV_SetBitsDataAddress 0 +#endif // CC_NV_SetBits + +#if CC_NV_WriteLock +#include "NV_WriteLock_fp.h" + +typedef TPM_RC (NV_WriteLock_Entry)( + NV_WriteLock_In* in +); + + +typedef const struct +{ + NV_WriteLock_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} NV_WriteLock_COMMAND_DESCRIPTOR_t; + +NV_WriteLock_COMMAND_DESCRIPTOR_t _NV_WriteLockData = { + /* entry */ &TPM2_NV_WriteLock, + /* inSize */ (UINT16)(sizeof(NV_WriteLock_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_WriteLock_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_WriteLock_In, nvIndex))}, + /* types */ {TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_NV_INDEX_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_WriteLockDataAddress (&_NV_WriteLockData) +#else +#define _NV_WriteLockDataAddress 0 +#endif // CC_NV_WriteLock + +#if CC_NV_GlobalWriteLock +#include "NV_GlobalWriteLock_fp.h" + +typedef TPM_RC (NV_GlobalWriteLock_Entry)( + NV_GlobalWriteLock_In* in +); + + +typedef const struct +{ + NV_GlobalWriteLock_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[3]; +} NV_GlobalWriteLock_COMMAND_DESCRIPTOR_t; + +NV_GlobalWriteLock_COMMAND_DESCRIPTOR_t _NV_GlobalWriteLockData = { + /* entry */ &TPM2_NV_GlobalWriteLock, + /* inSize */ (UINT16)(sizeof(NV_GlobalWriteLock_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_GlobalWriteLock_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPMI_RH_PROVISION_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_GlobalWriteLockDataAddress (&_NV_GlobalWriteLockData) +#else +#define _NV_GlobalWriteLockDataAddress 0 +#endif // CC_NV_GlobalWriteLock + +#if CC_NV_Read +#include "NV_Read_fp.h" + +typedef TPM_RC (NV_Read_Entry)( + NV_Read_In* in, + NV_Read_Out* out +); + + +typedef const struct +{ + NV_Read_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} NV_Read_COMMAND_DESCRIPTOR_t; + +NV_Read_COMMAND_DESCRIPTOR_t _NV_ReadData = { + /* entry */ &TPM2_NV_Read, + /* inSize */ (UINT16)(sizeof(NV_Read_In)), + /* outSize */ (UINT16)(sizeof(NV_Read_Out)), + /* offsetOfTypes */ offsetof(NV_Read_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_Read_In, nvIndex)), + (UINT16)(offsetof(NV_Read_In, size)), + (UINT16)(offsetof(NV_Read_In, offset))}, + /* types */ {TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_NV_INDEX_H_UNMARSHAL, + UINT16_P_UNMARSHAL, + UINT16_P_UNMARSHAL, + END_OF_LIST, + TPM2B_MAX_NV_BUFFER_P_MARSHAL, + END_OF_LIST} +}; + +#define _NV_ReadDataAddress (&_NV_ReadData) +#else +#define _NV_ReadDataAddress 0 +#endif // CC_NV_Read + +#if CC_NV_ReadLock +#include "NV_ReadLock_fp.h" + +typedef TPM_RC (NV_ReadLock_Entry)( + NV_ReadLock_In* in +); + + +typedef const struct +{ + NV_ReadLock_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} NV_ReadLock_COMMAND_DESCRIPTOR_t; + +NV_ReadLock_COMMAND_DESCRIPTOR_t _NV_ReadLockData = { + /* entry */ &TPM2_NV_ReadLock, + /* inSize */ (UINT16)(sizeof(NV_ReadLock_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_ReadLock_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_ReadLock_In, nvIndex))}, + /* types */ {TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_NV_INDEX_H_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_ReadLockDataAddress (&_NV_ReadLockData) +#else +#define _NV_ReadLockDataAddress 0 +#endif // CC_NV_ReadLock + +#if CC_NV_ChangeAuth +#include "NV_ChangeAuth_fp.h" + +typedef TPM_RC (NV_ChangeAuth_Entry)( + NV_ChangeAuth_In* in +); + + +typedef const struct +{ + NV_ChangeAuth_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} NV_ChangeAuth_COMMAND_DESCRIPTOR_t; + +NV_ChangeAuth_COMMAND_DESCRIPTOR_t _NV_ChangeAuthData = { + /* entry */ &TPM2_NV_ChangeAuth, + /* inSize */ (UINT16)(sizeof(NV_ChangeAuth_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_ChangeAuth_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_ChangeAuth_In, newAuth))}, + /* types */ {TPMI_RH_NV_INDEX_H_UNMARSHAL, + TPM2B_AUTH_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_ChangeAuthDataAddress (&_NV_ChangeAuthData) +#else +#define _NV_ChangeAuthDataAddress 0 +#endif // CC_NV_ChangeAuth + +#if CC_NV_Certify +#include "NV_Certify_fp.h" + +typedef TPM_RC (NV_Certify_Entry)( + NV_Certify_In* in, + NV_Certify_Out* out +); + + +typedef const struct +{ + NV_Certify_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[7]; + BYTE types[11]; +} NV_Certify_COMMAND_DESCRIPTOR_t; + +NV_Certify_COMMAND_DESCRIPTOR_t _NV_CertifyData = { + /* entry */ &TPM2_NV_Certify, + /* inSize */ (UINT16)(sizeof(NV_Certify_In)), + /* outSize */ (UINT16)(sizeof(NV_Certify_Out)), + /* offsetOfTypes */ offsetof(NV_Certify_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_Certify_In, authHandle)), + (UINT16)(offsetof(NV_Certify_In, nvIndex)), + (UINT16)(offsetof(NV_Certify_In, qualifyingData)), + (UINT16)(offsetof(NV_Certify_In, inScheme)), + (UINT16)(offsetof(NV_Certify_In, size)), + (UINT16)(offsetof(NV_Certify_In, offset)), + (UINT16)(offsetof(NV_Certify_Out, signature))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL + ADD_FLAG, + TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_NV_INDEX_H_UNMARSHAL, + TPM2B_DATA_P_UNMARSHAL, + TPMT_SIG_SCHEME_P_UNMARSHAL + ADD_FLAG, + UINT16_P_UNMARSHAL, + UINT16_P_UNMARSHAL, + END_OF_LIST, + TPM2B_ATTEST_P_MARSHAL, + TPMT_SIGNATURE_P_MARSHAL, + END_OF_LIST} +}; + +#define _NV_CertifyDataAddress (&_NV_CertifyData) +#else +#define _NV_CertifyDataAddress 0 +#endif // CC_NV_Certify + +#if CC_NV_DefineSpace2 +#include "NV_DefineSpace2_fp.h" + +typedef TPM_RC (NV_DefineSpace2_Entry)( + NV_DefineSpace2_In* in +); + + +typedef const struct +{ + NV_DefineSpace2_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[2]; + BYTE types[5]; +} NV_DefineSpace2_COMMAND_DESCRIPTOR_t; + +NV_DefineSpace2_COMMAND_DESCRIPTOR_t _NV_DefineSpace2Data = { + /* entry */ &TPM2_NV_DefineSpace2, + /* inSize */ (UINT16)(sizeof(NV_DefineSpace2_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(NV_DefineSpace2_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_DefineSpace2_In, auth)), + (UINT16)(offsetof(NV_DefineSpace2_In, publicInfo))}, + /* types */ {TPMI_RH_PROVISION_H_UNMARSHAL, + TPM2B_AUTH_P_UNMARSHAL, + TPM2B_NV_PUBLIC_2_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _NV_DefineSpace2DataAddress (&_NV_DefineSpace2Data) +#else +#define _NV_DefineSpace2DataAddress 0 +#endif // CC_NV_DefineSpace2 + +#if CC_NV_ReadPublic2 +#include "NV_ReadPublic2_fp.h" + +typedef TPM_RC (NV_ReadPublic2_Entry)( + NV_ReadPublic2_In* in, + NV_ReadPublic2_Out* out +); + + +typedef const struct +{ + NV_ReadPublic2_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[5]; +} NV_ReadPublic2_COMMAND_DESCRIPTOR_t; + +NV_ReadPublic2_COMMAND_DESCRIPTOR_t _NV_ReadPublic2Data = { + /* entry */ &TPM2_NV_ReadPublic2, + /* inSize */ (UINT16)(sizeof(NV_ReadPublic2_In)), + /* outSize */ (UINT16)(sizeof(NV_ReadPublic2_Out)), + /* offsetOfTypes */ offsetof(NV_ReadPublic2_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(NV_ReadPublic2_Out, nvName))}, + /* types */ {TPMI_RH_NV_INDEX_H_UNMARSHAL, + END_OF_LIST, + TPM2B_NV_PUBLIC_2_P_MARSHAL, + TPM2B_NAME_P_MARSHAL, + END_OF_LIST} +}; + +#define _NV_ReadPublic2DataAddress (&_NV_ReadPublic2Data) +#else +#define _NV_ReadPublic2DataAddress 0 +#endif // CC_NV_ReadPublic2 + +#if CC_SetCapability +#include "SetCapability_fp.h" + +typedef TPM_RC (SetCapability_Entry)( + SetCapability_In* in +); + +typedef const struct +{ + SetCapability_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} SetCapability_COMMAND_DESCRIPTOR_t; + +SetCapability_COMMAND_DESCRIPTOR_t _SetCapabilityData = { + /* entry */ &TPM2_SetCapability, + /* inSize */ (UINT16)(sizeof(SetCapability_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(SetCapability_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(SetCapability_In, setCapabilityData))}, + /* types */ {TPMI_RH_HIERARCHY_H_UNMARSHAL, + TPM2B_SET_CAPABILITY_DATA_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _SetCapabilityDataAddress (&_SetCapabilityData) +#else +#define _SetCapabilityDataAddress 0 +#endif // CC_SetCapability + +#if CC_AC_Send +#include "AC_Send_fp.h" + +typedef TPM_RC (AC_Send_Entry)( + AC_Send_In* in, + AC_Send_Out* out +); + + +typedef const struct +{ + AC_Send_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[3]; + BYTE types[7]; +} AC_Send_COMMAND_DESCRIPTOR_t; + +AC_Send_COMMAND_DESCRIPTOR_t _AC_SendData = { + /* entry */ &TPM2_AC_Send, + /* inSize */ (UINT16)(sizeof(AC_Send_In)), + /* outSize */ (UINT16)(sizeof(AC_Send_Out)), + /* offsetOfTypes */ offsetof(AC_Send_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(AC_Send_In, authHandle)), + (UINT16)(offsetof(AC_Send_In, ac)), + (UINT16)(offsetof(AC_Send_In, acDataIn))}, + /* types */ {TPMI_DH_OBJECT_H_UNMARSHAL, + TPMI_RH_NV_AUTH_H_UNMARSHAL, + TPMI_RH_AC_H_UNMARSHAL, + TPM2B_MAX_BUFFER_P_UNMARSHAL, + END_OF_LIST, + TPMS_AC_OUTPUT_P_MARSHAL, + END_OF_LIST} +}; + +#define _AC_SendDataAddress (&_AC_SendData) +#else +#define _AC_SendDataAddress 0 +#endif // CC_AC_Send + +#if CC_Policy_AC_SendSelect +#include "Policy_AC_SendSelect_fp.h" + +typedef TPM_RC (Policy_AC_SendSelect_Entry)( + Policy_AC_SendSelect_In* in +); + + +typedef const struct +{ + Policy_AC_SendSelect_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[4]; + BYTE types[7]; +} Policy_AC_SendSelect_COMMAND_DESCRIPTOR_t; + +Policy_AC_SendSelect_COMMAND_DESCRIPTOR_t _Policy_AC_SendSelectData = { + /* entry */ &TPM2_Policy_AC_SendSelect, + /* inSize */ (UINT16)(sizeof(Policy_AC_SendSelect_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(Policy_AC_SendSelect_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(Policy_AC_SendSelect_In, objectName)), + (UINT16)(offsetof(Policy_AC_SendSelect_In, authHandleName)), + (UINT16)(offsetof(Policy_AC_SendSelect_In, acName)), + (UINT16)(offsetof(Policy_AC_SendSelect_In, includeObject))}, + /* types */ {TPMI_SH_POLICY_H_UNMARSHAL, + TPM2B_NAME_P_UNMARSHAL, + TPM2B_NAME_P_UNMARSHAL, + TPM2B_NAME_P_UNMARSHAL, + TPMI_YES_NO_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _Policy_AC_SendSelectDataAddress (&_Policy_AC_SendSelectData) +#else +#define _Policy_AC_SendSelectDataAddress 0 +#endif // CC_Policy_AC_SendSelect + +#if CC_ACT_SetTimeout +#include "ACT_SetTimeout_fp.h" + +typedef TPM_RC (ACT_SetTimeout_Entry)( + ACT_SetTimeout_In* in +); + + +typedef const struct +{ + ACT_SetTimeout_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + UINT16 paramOffsets[1]; + BYTE types[4]; +} ACT_SetTimeout_COMMAND_DESCRIPTOR_t; + +ACT_SetTimeout_COMMAND_DESCRIPTOR_t _ACT_SetTimeoutData = { + /* entry */ &TPM2_ACT_SetTimeout, + /* inSize */ (UINT16)(sizeof(ACT_SetTimeout_In)), + /* outSize */ 0, + /* offsetOfTypes */ offsetof(ACT_SetTimeout_COMMAND_DESCRIPTOR_t, types), + /* offsets */ {(UINT16)(offsetof(ACT_SetTimeout_In, startTimeout))}, + /* types */ {TPMI_RH_ACT_H_UNMARSHAL, + UINT32_P_UNMARSHAL, + END_OF_LIST, + END_OF_LIST} +}; + +#define _ACT_SetTimeoutDataAddress (&_ACT_SetTimeoutData) +#else +#define _ACT_SetTimeoutDataAddress 0 +#endif // CC_ACT_SetTimeout + +#if CC_Vendor_TCG_Test +#include "Vendor_TCG_Test_fp.h" + +typedef TPM_RC (Vendor_TCG_Test_Entry)( + Vendor_TCG_Test_In* in, + Vendor_TCG_Test_Out* out +); + + +typedef const struct +{ + Vendor_TCG_Test_Entry *entry; + UINT16 inSize; + UINT16 outSize; + UINT16 offsetOfTypes; + BYTE types[4]; +} Vendor_TCG_Test_COMMAND_DESCRIPTOR_t; + +Vendor_TCG_Test_COMMAND_DESCRIPTOR_t _Vendor_TCG_TestData = { + /* entry */ &TPM2_Vendor_TCG_Test, + /* inSize */ (UINT16)(sizeof(Vendor_TCG_Test_In)), + /* outSize */ (UINT16)(sizeof(Vendor_TCG_Test_Out)), + /* offsetOfTypes */ offsetof(Vendor_TCG_Test_COMMAND_DESCRIPTOR_t, types), + /* offsets */ // No parameter offsets + /* types */ {TPM2B_DATA_P_UNMARSHAL, + END_OF_LIST, + TPM2B_DATA_P_MARSHAL, + END_OF_LIST} +}; + +#define _Vendor_TCG_TestDataAddress (&_Vendor_TCG_TestData) +#else +#define _Vendor_TCG_TestDataAddress 0 +#endif // CC_Vendor_TCG_Test + + +// Lookup table to access the per-command tables above + +COMMAND_DESCRIPTOR_t* s_CommandDataArray[] = { +#if (PAD_LIST || CC_NV_UndefineSpaceSpecial) + (COMMAND_DESCRIPTOR_t*)_NV_UndefineSpaceSpecialDataAddress, +#endif // CC_NV_UndefineSpaceSpecial +#if (PAD_LIST || CC_EvictControl) + (COMMAND_DESCRIPTOR_t*)_EvictControlDataAddress, +#endif // CC_EvictControl +#if (PAD_LIST || CC_HierarchyControl) + (COMMAND_DESCRIPTOR_t*)_HierarchyControlDataAddress, +#endif // CC_HierarchyControl +#if (PAD_LIST || CC_NV_UndefineSpace) + (COMMAND_DESCRIPTOR_t*)_NV_UndefineSpaceDataAddress, +#endif // CC_NV_UndefineSpace +#if (PAD_LIST) + (COMMAND_DESCRIPTOR_t*)0, +#endif // +#if (PAD_LIST || CC_ChangeEPS) + (COMMAND_DESCRIPTOR_t*)_ChangeEPSDataAddress, +#endif // CC_ChangeEPS +#if (PAD_LIST || CC_ChangePPS) + (COMMAND_DESCRIPTOR_t*)_ChangePPSDataAddress, +#endif // CC_ChangePPS +#if (PAD_LIST || CC_Clear) + (COMMAND_DESCRIPTOR_t*)_ClearDataAddress, +#endif // CC_Clear +#if (PAD_LIST || CC_ClearControl) + (COMMAND_DESCRIPTOR_t*)_ClearControlDataAddress, +#endif // CC_ClearControl +#if (PAD_LIST || CC_ClockSet) + (COMMAND_DESCRIPTOR_t*)_ClockSetDataAddress, +#endif // CC_ClockSet +#if (PAD_LIST || CC_HierarchyChangeAuth) + (COMMAND_DESCRIPTOR_t*)_HierarchyChangeAuthDataAddress, +#endif // CC_HierarchyChangeAuth +#if (PAD_LIST || CC_NV_DefineSpace) + (COMMAND_DESCRIPTOR_t*)_NV_DefineSpaceDataAddress, +#endif // CC_NV_DefineSpace +#if (PAD_LIST || CC_PCR_Allocate) + (COMMAND_DESCRIPTOR_t*)_PCR_AllocateDataAddress, +#endif // CC_PCR_Allocate +#if (PAD_LIST || CC_PCR_SetAuthPolicy) + (COMMAND_DESCRIPTOR_t*)_PCR_SetAuthPolicyDataAddress, +#endif // CC_PCR_SetAuthPolicy +#if (PAD_LIST || CC_PP_Commands) + (COMMAND_DESCRIPTOR_t*)_PP_CommandsDataAddress, +#endif // CC_PP_Commands +#if (PAD_LIST || CC_SetPrimaryPolicy) + (COMMAND_DESCRIPTOR_t*)_SetPrimaryPolicyDataAddress, +#endif // CC_SetPrimaryPolicy +#if (PAD_LIST || CC_FieldUpgradeStart) + (COMMAND_DESCRIPTOR_t*)_FieldUpgradeStartDataAddress, +#endif // CC_FieldUpgradeStart +#if (PAD_LIST || CC_ClockRateAdjust) + (COMMAND_DESCRIPTOR_t*)_ClockRateAdjustDataAddress, +#endif // CC_ClockRateAdjust +#if (PAD_LIST || CC_CreatePrimary) + (COMMAND_DESCRIPTOR_t*)_CreatePrimaryDataAddress, +#endif // CC_CreatePrimary +#if (PAD_LIST || CC_NV_GlobalWriteLock) + (COMMAND_DESCRIPTOR_t*)_NV_GlobalWriteLockDataAddress, +#endif // CC_NV_GlobalWriteLock +#if (PAD_LIST || CC_GetCommandAuditDigest) + (COMMAND_DESCRIPTOR_t*)_GetCommandAuditDigestDataAddress, +#endif // CC_GetCommandAuditDigest +#if (PAD_LIST || CC_NV_Increment) + (COMMAND_DESCRIPTOR_t*)_NV_IncrementDataAddress, +#endif // CC_NV_Increment +#if (PAD_LIST || CC_NV_SetBits) + (COMMAND_DESCRIPTOR_t*)_NV_SetBitsDataAddress, +#endif // CC_NV_SetBits +#if (PAD_LIST || CC_NV_Extend) + (COMMAND_DESCRIPTOR_t*)_NV_ExtendDataAddress, +#endif // CC_NV_Extend +#if (PAD_LIST || CC_NV_Write) + (COMMAND_DESCRIPTOR_t*)_NV_WriteDataAddress, +#endif // CC_NV_Write +#if (PAD_LIST || CC_NV_WriteLock) + (COMMAND_DESCRIPTOR_t*)_NV_WriteLockDataAddress, +#endif // CC_NV_WriteLock +#if (PAD_LIST || CC_DictionaryAttackLockReset) + (COMMAND_DESCRIPTOR_t*)_DictionaryAttackLockResetDataAddress, +#endif // CC_DictionaryAttackLockReset +#if (PAD_LIST || CC_DictionaryAttackParameters) + (COMMAND_DESCRIPTOR_t*)_DictionaryAttackParametersDataAddress, +#endif // CC_DictionaryAttackParameters +#if (PAD_LIST || CC_NV_ChangeAuth) + (COMMAND_DESCRIPTOR_t*)_NV_ChangeAuthDataAddress, +#endif // CC_NV_ChangeAuth +#if (PAD_LIST || CC_PCR_Event) + (COMMAND_DESCRIPTOR_t*)_PCR_EventDataAddress, +#endif // CC_PCR_Event +#if (PAD_LIST || CC_PCR_Reset) + (COMMAND_DESCRIPTOR_t*)_PCR_ResetDataAddress, +#endif // CC_PCR_Reset +#if (PAD_LIST || CC_SequenceComplete) + (COMMAND_DESCRIPTOR_t*)_SequenceCompleteDataAddress, +#endif // CC_SequenceComplete +#if (PAD_LIST || CC_SetAlgorithmSet) + (COMMAND_DESCRIPTOR_t*)_SetAlgorithmSetDataAddress, +#endif // CC_SetAlgorithmSet +#if (PAD_LIST || CC_SetCommandCodeAuditStatus) + (COMMAND_DESCRIPTOR_t*)_SetCommandCodeAuditStatusDataAddress, +#endif // CC_SetCommandCodeAuditStatus +#if (PAD_LIST || CC_FieldUpgradeData) + (COMMAND_DESCRIPTOR_t*)_FieldUpgradeDataDataAddress, +#endif // CC_FieldUpgradeData +#if (PAD_LIST || CC_IncrementalSelfTest) + (COMMAND_DESCRIPTOR_t*)_IncrementalSelfTestDataAddress, +#endif // CC_IncrementalSelfTest +#if (PAD_LIST || CC_SelfTest) + (COMMAND_DESCRIPTOR_t*)_SelfTestDataAddress, +#endif // CC_SelfTest +#if (PAD_LIST || CC_Startup) + (COMMAND_DESCRIPTOR_t*)_StartupDataAddress, +#endif // CC_Startup +#if (PAD_LIST || CC_Shutdown) + (COMMAND_DESCRIPTOR_t*)_ShutdownDataAddress, +#endif // CC_Shutdown +#if (PAD_LIST || CC_StirRandom) + (COMMAND_DESCRIPTOR_t*)_StirRandomDataAddress, +#endif // CC_StirRandom +#if (PAD_LIST || CC_ActivateCredential) + (COMMAND_DESCRIPTOR_t*)_ActivateCredentialDataAddress, +#endif // CC_ActivateCredential +#if (PAD_LIST || CC_Certify) + (COMMAND_DESCRIPTOR_t*)_CertifyDataAddress, +#endif // CC_Certify +#if (PAD_LIST || CC_PolicyNV) + (COMMAND_DESCRIPTOR_t*)_PolicyNVDataAddress, +#endif // CC_PolicyNV +#if (PAD_LIST || CC_CertifyCreation) + (COMMAND_DESCRIPTOR_t*)_CertifyCreationDataAddress, +#endif // CC_CertifyCreation +#if (PAD_LIST || CC_Duplicate) + (COMMAND_DESCRIPTOR_t*)_DuplicateDataAddress, +#endif // CC_Duplicate +#if (PAD_LIST || CC_GetTime) + (COMMAND_DESCRIPTOR_t*)_GetTimeDataAddress, +#endif // CC_GetTime +#if (PAD_LIST || CC_GetSessionAuditDigest) + (COMMAND_DESCRIPTOR_t*)_GetSessionAuditDigestDataAddress, +#endif // CC_GetSessionAuditDigest +#if (PAD_LIST || CC_NV_Read) + (COMMAND_DESCRIPTOR_t*)_NV_ReadDataAddress, +#endif // CC_NV_Read +#if (PAD_LIST || CC_NV_ReadLock) + (COMMAND_DESCRIPTOR_t*)_NV_ReadLockDataAddress, +#endif // CC_NV_ReadLock +#if (PAD_LIST || CC_ObjectChangeAuth) + (COMMAND_DESCRIPTOR_t*)_ObjectChangeAuthDataAddress, +#endif // CC_ObjectChangeAuth +#if (PAD_LIST || CC_PolicySecret) + (COMMAND_DESCRIPTOR_t*)_PolicySecretDataAddress, +#endif // CC_PolicySecret +#if (PAD_LIST || CC_Rewrap) + (COMMAND_DESCRIPTOR_t*)_RewrapDataAddress, +#endif // CC_Rewrap +#if (PAD_LIST || CC_Create) + (COMMAND_DESCRIPTOR_t*)_CreateDataAddress, +#endif // CC_Create +#if (PAD_LIST || CC_ECDH_ZGen) + (COMMAND_DESCRIPTOR_t*)_ECDH_ZGenDataAddress, +#endif // CC_ECDH_ZGen +#if (PAD_LIST || (CC_HMAC || CC_MAC)) +# if CC_HMAC + (COMMAND_DESCRIPTOR_t*)_HMACDataAddress, +# endif +# if CC_MAC + (COMMAND_DESCRIPTOR_t*)_MACDataAddress, +# endif +#endif // (CC_HMAC || CC_MAC) +#if (PAD_LIST || CC_Import) + (COMMAND_DESCRIPTOR_t*)_ImportDataAddress, +#endif // CC_Import +#if (PAD_LIST || CC_Load) + (COMMAND_DESCRIPTOR_t*)_LoadDataAddress, +#endif // CC_Load +#if (PAD_LIST || CC_Quote) + (COMMAND_DESCRIPTOR_t*)_QuoteDataAddress, +#endif // CC_Quote +#if (PAD_LIST || CC_RSA_Decrypt) + (COMMAND_DESCRIPTOR_t*)_RSA_DecryptDataAddress, +#endif // CC_RSA_Decrypt +#if (PAD_LIST) + (COMMAND_DESCRIPTOR_t*)0, +#endif // +#if (PAD_LIST || (CC_HMAC_Start || CC_MAC_Start)) +# if CC_HMAC_Start + (COMMAND_DESCRIPTOR_t*)_HMAC_StartDataAddress, +# endif +# if CC_MAC_Start + (COMMAND_DESCRIPTOR_t*)_MAC_StartDataAddress, +# endif +#endif // (CC_HMAC_Start || CC_MAC_Start) +#if (PAD_LIST || CC_SequenceUpdate) + (COMMAND_DESCRIPTOR_t*)_SequenceUpdateDataAddress, +#endif // CC_SequenceUpdate +#if (PAD_LIST || CC_Sign) + (COMMAND_DESCRIPTOR_t*)_SignDataAddress, +#endif // CC_Sign +#if (PAD_LIST || CC_Unseal) + (COMMAND_DESCRIPTOR_t*)_UnsealDataAddress, +#endif // CC_Unseal +#if (PAD_LIST) + (COMMAND_DESCRIPTOR_t*)0, +#endif // +#if (PAD_LIST || CC_PolicySigned) + (COMMAND_DESCRIPTOR_t*)_PolicySignedDataAddress, +#endif // CC_PolicySigned +#if (PAD_LIST || CC_ContextLoad) + (COMMAND_DESCRIPTOR_t*)_ContextLoadDataAddress, +#endif // CC_ContextLoad +#if (PAD_LIST || CC_ContextSave) + (COMMAND_DESCRIPTOR_t*)_ContextSaveDataAddress, +#endif // CC_ContextSave +#if (PAD_LIST || CC_ECDH_KeyGen) + (COMMAND_DESCRIPTOR_t*)_ECDH_KeyGenDataAddress, +#endif // CC_ECDH_KeyGen +#if (PAD_LIST || CC_EncryptDecrypt) + (COMMAND_DESCRIPTOR_t*)_EncryptDecryptDataAddress, +#endif // CC_EncryptDecrypt +#if (PAD_LIST || CC_FlushContext) + (COMMAND_DESCRIPTOR_t*)_FlushContextDataAddress, +#endif // CC_FlushContext +#if (PAD_LIST) + (COMMAND_DESCRIPTOR_t*)0, +#endif // +#if (PAD_LIST || CC_LoadExternal) + (COMMAND_DESCRIPTOR_t*)_LoadExternalDataAddress, +#endif // CC_LoadExternal +#if (PAD_LIST || CC_MakeCredential) + (COMMAND_DESCRIPTOR_t*)_MakeCredentialDataAddress, +#endif // CC_MakeCredential +#if (PAD_LIST || CC_NV_ReadPublic) + (COMMAND_DESCRIPTOR_t*)_NV_ReadPublicDataAddress, +#endif // CC_NV_ReadPublic +#if (PAD_LIST || CC_PolicyAuthorize) + (COMMAND_DESCRIPTOR_t*)_PolicyAuthorizeDataAddress, +#endif // CC_PolicyAuthorize +#if (PAD_LIST || CC_PolicyAuthValue) + (COMMAND_DESCRIPTOR_t*)_PolicyAuthValueDataAddress, +#endif // CC_PolicyAuthValue +#if (PAD_LIST || CC_PolicyCommandCode) + (COMMAND_DESCRIPTOR_t*)_PolicyCommandCodeDataAddress, +#endif // CC_PolicyCommandCode +#if (PAD_LIST || CC_PolicyCounterTimer) + (COMMAND_DESCRIPTOR_t*)_PolicyCounterTimerDataAddress, +#endif // CC_PolicyCounterTimer +#if (PAD_LIST || CC_PolicyCpHash) + (COMMAND_DESCRIPTOR_t*)_PolicyCpHashDataAddress, +#endif // CC_PolicyCpHash +#if (PAD_LIST || CC_PolicyLocality) + (COMMAND_DESCRIPTOR_t*)_PolicyLocalityDataAddress, +#endif // CC_PolicyLocality +#if (PAD_LIST || CC_PolicyNameHash) + (COMMAND_DESCRIPTOR_t*)_PolicyNameHashDataAddress, +#endif // CC_PolicyNameHash +#if (PAD_LIST || CC_PolicyOR) + (COMMAND_DESCRIPTOR_t*)_PolicyORDataAddress, +#endif // CC_PolicyOR +#if (PAD_LIST || CC_PolicyTicket) + (COMMAND_DESCRIPTOR_t*)_PolicyTicketDataAddress, +#endif // CC_PolicyTicket +#if (PAD_LIST || CC_ReadPublic) + (COMMAND_DESCRIPTOR_t*)_ReadPublicDataAddress, +#endif // CC_ReadPublic +#if (PAD_LIST || CC_RSA_Encrypt) + (COMMAND_DESCRIPTOR_t*)_RSA_EncryptDataAddress, +#endif // CC_RSA_Encrypt +#if (PAD_LIST) + (COMMAND_DESCRIPTOR_t*)0, +#endif // +#if (PAD_LIST || CC_StartAuthSession) + (COMMAND_DESCRIPTOR_t*)_StartAuthSessionDataAddress, +#endif // CC_StartAuthSession +#if (PAD_LIST || CC_VerifySignature) + (COMMAND_DESCRIPTOR_t*)_VerifySignatureDataAddress, +#endif // CC_VerifySignature +#if (PAD_LIST || CC_ECC_Parameters) + (COMMAND_DESCRIPTOR_t*)_ECC_ParametersDataAddress, +#endif // CC_ECC_Parameters +#if (PAD_LIST || CC_FirmwareRead) + (COMMAND_DESCRIPTOR_t*)_FirmwareReadDataAddress, +#endif // CC_FirmwareRead +#if (PAD_LIST || CC_GetCapability) + (COMMAND_DESCRIPTOR_t*)_GetCapabilityDataAddress, +#endif // CC_GetCapability +#if (PAD_LIST || CC_GetRandom) + (COMMAND_DESCRIPTOR_t*)_GetRandomDataAddress, +#endif // CC_GetRandom +#if (PAD_LIST || CC_GetTestResult) + (COMMAND_DESCRIPTOR_t*)_GetTestResultDataAddress, +#endif // CC_GetTestResult +#if (PAD_LIST || CC_Hash) + (COMMAND_DESCRIPTOR_t*)_HashDataAddress, +#endif // CC_Hash +#if (PAD_LIST || CC_PCR_Read) + (COMMAND_DESCRIPTOR_t*)_PCR_ReadDataAddress, +#endif // CC_PCR_Read +#if (PAD_LIST || CC_PolicyPCR) + (COMMAND_DESCRIPTOR_t*)_PolicyPCRDataAddress, +#endif // CC_PolicyPCR +#if (PAD_LIST || CC_PolicyRestart) + (COMMAND_DESCRIPTOR_t*)_PolicyRestartDataAddress, +#endif // CC_PolicyRestart +#if (PAD_LIST || CC_ReadClock) + (COMMAND_DESCRIPTOR_t*)_ReadClockDataAddress, +#endif // CC_ReadClock +#if (PAD_LIST || CC_PCR_Extend) + (COMMAND_DESCRIPTOR_t*)_PCR_ExtendDataAddress, +#endif // CC_PCR_Extend +#if (PAD_LIST || CC_PCR_SetAuthValue) + (COMMAND_DESCRIPTOR_t*)_PCR_SetAuthValueDataAddress, +#endif // CC_PCR_SetAuthValue +#if (PAD_LIST || CC_NV_Certify) + (COMMAND_DESCRIPTOR_t*)_NV_CertifyDataAddress, +#endif // CC_NV_Certify +#if (PAD_LIST || CC_EventSequenceComplete) + (COMMAND_DESCRIPTOR_t*)_EventSequenceCompleteDataAddress, +#endif // CC_EventSequenceComplete +#if (PAD_LIST || CC_HashSequenceStart) + (COMMAND_DESCRIPTOR_t*)_HashSequenceStartDataAddress, +#endif // CC_HashSequenceStart +#if (PAD_LIST || CC_PolicyPhysicalPresence) + (COMMAND_DESCRIPTOR_t*)_PolicyPhysicalPresenceDataAddress, +#endif // CC_PolicyPhysicalPresence +#if (PAD_LIST || CC_PolicyDuplicationSelect) + (COMMAND_DESCRIPTOR_t*)_PolicyDuplicationSelectDataAddress, +#endif // CC_PolicyDuplicationSelect +#if (PAD_LIST || CC_PolicyGetDigest) + (COMMAND_DESCRIPTOR_t*)_PolicyGetDigestDataAddress, +#endif // CC_PolicyGetDigest +#if (PAD_LIST || CC_TestParms) + (COMMAND_DESCRIPTOR_t*)_TestParmsDataAddress, +#endif // CC_TestParms +#if (PAD_LIST || CC_Commit) + (COMMAND_DESCRIPTOR_t*)_CommitDataAddress, +#endif // CC_Commit +#if (PAD_LIST || CC_PolicyPassword) + (COMMAND_DESCRIPTOR_t*)_PolicyPasswordDataAddress, +#endif // CC_PolicyPassword +#if (PAD_LIST || CC_ZGen_2Phase) + (COMMAND_DESCRIPTOR_t*)_ZGen_2PhaseDataAddress, +#endif // CC_ZGen_2Phase +#if (PAD_LIST || CC_EC_Ephemeral) + (COMMAND_DESCRIPTOR_t*)_EC_EphemeralDataAddress, +#endif // CC_EC_Ephemeral +#if (PAD_LIST || CC_PolicyNvWritten) + (COMMAND_DESCRIPTOR_t*)_PolicyNvWrittenDataAddress, +#endif // CC_PolicyNvWritten +#if (PAD_LIST || CC_PolicyTemplate) + (COMMAND_DESCRIPTOR_t*)_PolicyTemplateDataAddress, +#endif // CC_PolicyTemplate +#if (PAD_LIST || CC_CreateLoaded) + (COMMAND_DESCRIPTOR_t*)_CreateLoadedDataAddress, +#endif // CC_CreateLoaded +#if (PAD_LIST || CC_PolicyAuthorizeNV) + (COMMAND_DESCRIPTOR_t*)_PolicyAuthorizeNVDataAddress, +#endif // CC_PolicyAuthorizeNV +#if (PAD_LIST || CC_EncryptDecrypt2) + (COMMAND_DESCRIPTOR_t*)_EncryptDecrypt2DataAddress, +#endif // CC_EncryptDecrypt2 +#if (PAD_LIST || CC_AC_GetCapability) + (COMMAND_DESCRIPTOR_t*)_GetCapabilityDataAddress, +#endif // CC_AC_GetCapability +#if (PAD_LIST || CC_AC_Send) + (COMMAND_DESCRIPTOR_t*)_AC_SendDataAddress, +#endif // CC_AC_Send +#if (PAD_LIST || CC_Policy_AC_SendSelect) + (COMMAND_DESCRIPTOR_t*)_Policy_AC_SendSelectDataAddress, +#endif // CC_Policy_AC_SendSelect +#if (PAD_LIST || CC_CertifyX509) + (COMMAND_DESCRIPTOR_t*)_CertifyX509DataAddress, +#endif // CC_CertifyX509 +#if (PAD_LIST || CC_ACT_SetTimeout) + (COMMAND_DESCRIPTOR_t*)_ACT_SetTimeoutDataAddress, +#endif // CC_ACT_SetTimeout +#if (PAD_LIST || CC_ECC_Encrypt) + (COMMAND_DESCRIPTOR_t*)_ECC_EncryptDataAddress, +#endif // CC_ECC_Encrypt +#if (PAD_LIST || CC_ECC_Decrypt) + (COMMAND_DESCRIPTOR_t*)_ECC_DecryptDataAddress, +#endif // CC_ECC_Decrypt +#if (PAD_LIST || CC_PolicyCapability) + (COMMAND_DESCRIPTOR_t*)_PolicyCapabilityDataAddress, +#endif // CC_PolicyCapability +#if (PAD_LIST || CC_PolicyParameters) + (COMMAND_DESCRIPTOR_t*)_PolicyParametersDataAddress, +#endif // CC_PolicyParameters +#if (PAD_LIST || CC_NV_DefineSpace2) + (COMMAND_DESCRIPTOR_t*)_NV_DefineSpace2DataAddress, +#endif // CC_NV_DefineSpace2 +#if (PAD_LIST || CC_NV_ReadPublic2) + (COMMAND_DESCRIPTOR_t*)_NV_ReadPublic2DataAddress, +#endif // CC_NV_ReadPublic2 +#if (PAD_LIST || CC_SetCapability) + (COMMAND_DESCRIPTOR_t*)_SetCapabilityDataAddress, +#endif // CC_SetCapability +#if (PAD_LIST || CC_Vendor_TCG_Test) + (COMMAND_DESCRIPTOR_t*)_Vendor_TCG_TestDataAddress, +#endif // CC_Vendor_TCG_Test + + 0 +}; + +#endif // _COMMAND_TABLE_DISPATCH_ diff --git a/TPMCmd/tpm/include/CommandDispatcher.h b/TPMCmd/tpm/include/private/CommandDispatcher.h similarity index 95% rename from TPMCmd/tpm/include/CommandDispatcher.h rename to TPMCmd/tpm/include/private/CommandDispatcher.h index 8d036fe8..2569f38f 100644 --- a/TPMCmd/tpm/include/CommandDispatcher.h +++ b/TPMCmd/tpm/include/private/CommandDispatcher.h @@ -1,49 +1,13 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmDispatch; Version 4.0 July 8,2017 - * Date: Mar 6, 2020 Time: 01:50:10PM - */ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT // This macro is added just so that the code is only excessively long. -#define EXIT_IF_ERROR_PLUS(x) \ - if(TPM_RC_SUCCESS != result) \ - { \ - result += (x); \ - goto Exit; \ - } +#define EXIT_IF_ERROR_PLUS(x) \ + if(TPM_RC_SUCCESS != result) \ + { \ + result += (x); \ + goto Exit; \ + } #if CC_Startup case TPM_CC_Startup: { @@ -589,7 +553,8 @@ case TPM_CC_ECC_Parameters: (ECC_Parameters_In*)MemoryGetInBuffer(sizeof(ECC_Parameters_In)); ECC_Parameters_Out* out = (ECC_Parameters_Out*)MemoryGetOutBuffer(sizeof(ECC_Parameters_Out)); - result = TPMI_ECC_CURVE_Unmarshal(&in->curveID, paramBuffer, paramBufferSize); + result = + TPMI_ECC_CURVE_Unmarshal(&in->curveID, paramBuffer, paramBufferSize, FALSE); EXIT_IF_ERROR_PLUS(RC_ECC_Parameters_curveID); if(*paramBufferSize != 0) { @@ -1206,7 +1171,8 @@ case TPM_CC_EC_Ephemeral: (EC_Ephemeral_In*)MemoryGetInBuffer(sizeof(EC_Ephemeral_In)); EC_Ephemeral_Out* out = (EC_Ephemeral_Out*)MemoryGetOutBuffer(sizeof(EC_Ephemeral_Out)); - result = TPMI_ECC_CURVE_Unmarshal(&in->curveID, paramBuffer, paramBufferSize); + result = + TPMI_ECC_CURVE_Unmarshal(&in->curveID, paramBuffer, paramBufferSize, FALSE); EXIT_IF_ERROR_PLUS(RC_EC_Ephemeral_curveID); if(*paramBufferSize != 0) { @@ -1821,6 +1787,48 @@ case TPM_CC_PolicyAuthorizeNV: break; } #endif // CC_PolicyAuthorizeNV +#if CC_PolicyCapability +case TPM_CC_PolicyCapability: +{ + PolicyCapability_In* in = + (PolicyCapability_In*)MemoryGetInBuffer(sizeof(PolicyCapability_In)); + in->policySession = handles[0]; + result = TPM2B_OPERAND_Unmarshal(&in->operandB, paramBuffer, paramBufferSize); + EXIT_IF_ERROR_PLUS(RC_PolicyCapability_operandB); + result = UINT16_Unmarshal(&in->offset, paramBuffer, paramBufferSize); + EXIT_IF_ERROR_PLUS(RC_PolicyCapability_offset); + result = TPM_EO_Unmarshal(&in->operation, paramBuffer, paramBufferSize); + EXIT_IF_ERROR_PLUS(RC_PolicyCapability_operation); + result = TPM_CAP_Unmarshal(&in->capability, paramBuffer, paramBufferSize); + EXIT_IF_ERROR_PLUS(RC_PolicyCapability_capability); + result = UINT32_Unmarshal(&in->property, paramBuffer, paramBufferSize); + EXIT_IF_ERROR_PLUS(RC_PolicyCapability_property); + if(*paramBufferSize != 0) + { + result = TPM_RC_SIZE; + goto Exit; + } + result = TPM2_PolicyCapability(in); + break; +} +#endif // CC_PolicyCapability +#if CC_PolicyParameters +case TPM_CC_PolicyParameters: +{ + PolicyParameters_In* in = + (PolicyParameters_In*)MemoryGetInBuffer(sizeof(PolicyParameters_In)); + in->policySession = handles[0]; + result = TPM2B_DIGEST_Unmarshal(&in->pHash, paramBuffer, paramBufferSize); + EXIT_IF_ERROR_PLUS(RC_PolicyParameters_pHash); + if(*paramBufferSize != 0) + { + result = TPM_RC_SIZE; + goto Exit; + } + result = TPM2_PolicyParameters(in); + break; +} +#endif // CC_PolicyParameters #if CC_CreatePrimary case TPM_CC_CreatePrimary: { @@ -2532,6 +2540,67 @@ case TPM_CC_NV_Certify: break; } #endif // CC_NV_Certify +#if CC_NV_DefineSpace2 +case TPM_CC_NV_DefineSpace2: +{ + NV_DefineSpace2_In* in = + (NV_DefineSpace2_In*)MemoryGetInBuffer(sizeof(NV_DefineSpace2_In)); + in->authHandle = handles[0]; + result = TPM2B_AUTH_Unmarshal(&in->auth, paramBuffer, paramBufferSize); + EXIT_IF_ERROR_PLUS(RC_NV_DefineSpace2_auth); + result = + TPM2B_NV_PUBLIC_2_Unmarshal(&in->publicInfo, paramBuffer, paramBufferSize); + EXIT_IF_ERROR_PLUS(RC_NV_DefineSpace2_publicInfo); + if(*paramBufferSize != 0) + { + result = TPM_RC_SIZE; + goto Exit; + } + result = TPM2_NV_DefineSpace2(in); + break; +} +#endif // CC_NV_DefineSpace2 +#if CC_NV_ReadPublic2 +case TPM_CC_NV_ReadPublic2: +{ + NV_ReadPublic2_In* in = + (NV_ReadPublic2_In*)MemoryGetInBuffer(sizeof(NV_ReadPublic2_In)); + NV_ReadPublic2_Out* out = + (NV_ReadPublic2_Out*)MemoryGetOutBuffer(sizeof(NV_ReadPublic2_Out)); + in->nvIndex = handles[0]; + if(*paramBufferSize != 0) + { + result = TPM_RC_SIZE; + goto Exit; + } + result = TPM2_NV_ReadPublic2(in, out); + rSize = sizeof(NV_ReadPublic2_Out); + *respParmSize += + TPM2B_NV_PUBLIC_2_Marshal(&out->nvPublic, responseBuffer, &rSize); + *respParmSize += TPM2B_NAME_Marshal(&out->nvName, responseBuffer, &rSize); + break; +} +#endif // CC_NV_ReadPublic2 +#if CC_SetCapability +case TPM_CC_SetCapability: +{ + SetCapability_In* in = + (SetCapability_In*)MemoryGetInBuffer(sizeof(SetCapability_In)); + SetCapability_Out* out = + (SetCapability_Out*)MemoryGetOutBuffer(sizeof(SetCapability_Out)); + in->authHandle = handles[0]; + result = TPM2B_SET_CAPABILITY_DATA_Unmarshal( + &in->setCapabilityData, paramBuffer, paramBufferSize); + EXIT_IF_ERROR_PLUS(RC_SetCapability_setCapabilityData); + if(*paramBufferSize != 0) + { + result = TPM_RC_SIZE; + goto Exit; + } + result = TPM2_SetCapability(in); + break; +} +#endif // CC_SetCapability #if CC_AC_GetCapability case TPM_CC_AC_GetCapability: { diff --git a/TPMCmd/tpm/include/private/Commands.h b/TPMCmd/tpm/include/private/Commands.h new file mode 100644 index 00000000..b227aa89 --- /dev/null +++ b/TPMCmd/tpm/include/private/Commands.h @@ -0,0 +1,386 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#ifndef _COMMANDS_H_ +#define _COMMANDS_H_ + +#if CC_Startup +# include "Startup_fp.h" +#endif +#if CC_Shutdown +# include "Shutdown_fp.h" +#endif +#if CC_SelfTest +# include "SelfTest_fp.h" +#endif +#if CC_IncrementalSelfTest +# include "IncrementalSelfTest_fp.h" +#endif +#if CC_GetTestResult +# include "GetTestResult_fp.h" +#endif +#if CC_StartAuthSession +# include "StartAuthSession_fp.h" +#endif +#if CC_PolicyRestart +# include "PolicyRestart_fp.h" +#endif +#if CC_Create +# include "Create_fp.h" +#endif +#if CC_Load +# include "Load_fp.h" +#endif +#if CC_LoadExternal +# include "LoadExternal_fp.h" +#endif +#if CC_ReadPublic +# include "ReadPublic_fp.h" +#endif +#if CC_ActivateCredential +# include "ActivateCredential_fp.h" +#endif +#if CC_MakeCredential +# include "MakeCredential_fp.h" +#endif +#if CC_Unseal +# include "Unseal_fp.h" +#endif +#if CC_ObjectChangeAuth +# include "ObjectChangeAuth_fp.h" +#endif +#if CC_CreateLoaded +# include "CreateLoaded_fp.h" +#endif +#if CC_Duplicate +# include "Duplicate_fp.h" +#endif +#if CC_Rewrap +# include "Rewrap_fp.h" +#endif +#if CC_Import +# include "Import_fp.h" +#endif +#if CC_RSA_Encrypt +# include "RSA_Encrypt_fp.h" +#endif +#if CC_RSA_Decrypt +# include "RSA_Decrypt_fp.h" +#endif +#if CC_ECDH_KeyGen +# include "ECDH_KeyGen_fp.h" +#endif +#if CC_ECDH_ZGen +# include "ECDH_ZGen_fp.h" +#endif +#if CC_ECC_Parameters +# include "ECC_Parameters_fp.h" +#endif +#if CC_ZGen_2Phase +# include "ZGen_2Phase_fp.h" +#endif +#if CC_ECC_Encrypt +# include "ECC_Encrypt_fp.h" +#endif +#if CC_ECC_Decrypt +# include "ECC_Decrypt_fp.h" +#endif +#if CC_EncryptDecrypt +# include "EncryptDecrypt_fp.h" +#endif +#if CC_EncryptDecrypt2 +# include "EncryptDecrypt2_fp.h" +#endif +#if CC_Hash +# include "Hash_fp.h" +#endif +#if CC_HMAC +# include "HMAC_fp.h" +#endif +#if CC_MAC +# include "MAC_fp.h" +#endif +#if CC_GetRandom +# include "GetRandom_fp.h" +#endif +#if CC_StirRandom +# include "StirRandom_fp.h" +#endif +#if CC_HMAC_Start +# include "HMAC_Start_fp.h" +#endif +#if CC_MAC_Start +# include "MAC_Start_fp.h" +#endif +#if CC_HashSequenceStart +# include "HashSequenceStart_fp.h" +#endif +#if CC_SequenceUpdate +# include "SequenceUpdate_fp.h" +#endif +#if CC_SequenceComplete +# include "SequenceComplete_fp.h" +#endif +#if CC_EventSequenceComplete +# include "EventSequenceComplete_fp.h" +#endif +#if CC_Certify +# include "Certify_fp.h" +#endif +#if CC_CertifyCreation +# include "CertifyCreation_fp.h" +#endif +#if CC_Quote +# include "Quote_fp.h" +#endif +#if CC_GetSessionAuditDigest +# include "GetSessionAuditDigest_fp.h" +#endif +#if CC_GetCommandAuditDigest +# include "GetCommandAuditDigest_fp.h" +#endif +#if CC_GetTime +# include "GetTime_fp.h" +#endif +#if CC_CertifyX509 +# include "CertifyX509_fp.h" +#endif +#if CC_Commit +# include "Commit_fp.h" +#endif +#if CC_EC_Ephemeral +# include "EC_Ephemeral_fp.h" +#endif +#if CC_VerifySignature +# include "VerifySignature_fp.h" +#endif +#if CC_Sign +# include "Sign_fp.h" +#endif +#if CC_SetCommandCodeAuditStatus +# include "SetCommandCodeAuditStatus_fp.h" +#endif +#if CC_PCR_Extend +# include "PCR_Extend_fp.h" +#endif +#if CC_PCR_Event +# include "PCR_Event_fp.h" +#endif +#if CC_PCR_Read +# include "PCR_Read_fp.h" +#endif +#if CC_PCR_Allocate +# include "PCR_Allocate_fp.h" +#endif +#if CC_PCR_SetAuthPolicy +# include "PCR_SetAuthPolicy_fp.h" +#endif +#if CC_PCR_SetAuthValue +# include "PCR_SetAuthValue_fp.h" +#endif +#if CC_PCR_Reset +# include "PCR_Reset_fp.h" +#endif +#if CC_PolicySigned +# include "PolicySigned_fp.h" +#endif +#if CC_PolicySecret +# include "PolicySecret_fp.h" +#endif +#if CC_PolicyTicket +# include "PolicyTicket_fp.h" +#endif +#if CC_PolicyOR +# include "PolicyOR_fp.h" +#endif +#if CC_PolicyPCR +# include "PolicyPCR_fp.h" +#endif +#if CC_PolicyLocality +# include "PolicyLocality_fp.h" +#endif +#if CC_PolicyNV +# include "PolicyNV_fp.h" +#endif +#if CC_PolicyCounterTimer +# include "PolicyCounterTimer_fp.h" +#endif +#if CC_PolicyCommandCode +# include "PolicyCommandCode_fp.h" +#endif +#if CC_PolicyPhysicalPresence +# include "PolicyPhysicalPresence_fp.h" +#endif +#if CC_PolicyCpHash +# include "PolicyCpHash_fp.h" +#endif +#if CC_PolicyNameHash +# include "PolicyNameHash_fp.h" +#endif +#if CC_PolicyDuplicationSelect +# include "PolicyDuplicationSelect_fp.h" +#endif +#if CC_PolicyAuthorize +# include "PolicyAuthorize_fp.h" +#endif +#if CC_PolicyAuthValue +# include "PolicyAuthValue_fp.h" +#endif +#if CC_PolicyPassword +# include "PolicyPassword_fp.h" +#endif +#if CC_PolicyGetDigest +# include "PolicyGetDigest_fp.h" +#endif +#if CC_PolicyNvWritten +# include "PolicyNvWritten_fp.h" +#endif +#if CC_PolicyTemplate +# include "PolicyTemplate_fp.h" +#endif +#if CC_PolicyAuthorizeNV +# include "PolicyAuthorizeNV_fp.h" +#endif +#if CC_PolicyCapability +# include "PolicyCapability_fp.h" +#endif +#if CC_PolicyParameters +# include "PolicyParameters_fp.h" +#endif +#if CC_CreatePrimary +# include "CreatePrimary_fp.h" +#endif +#if CC_HierarchyControl +# include "HierarchyControl_fp.h" +#endif +#if CC_SetPrimaryPolicy +# include "SetPrimaryPolicy_fp.h" +#endif +#if CC_ChangePPS +# include "ChangePPS_fp.h" +#endif +#if CC_ChangeEPS +# include "ChangeEPS_fp.h" +#endif +#if CC_Clear +# include "Clear_fp.h" +#endif +#if CC_ClearControl +# include "ClearControl_fp.h" +#endif +#if CC_HierarchyChangeAuth +# include "HierarchyChangeAuth_fp.h" +#endif +#if CC_DictionaryAttackLockReset +# include "DictionaryAttackLockReset_fp.h" +#endif +#if CC_DictionaryAttackParameters +# include "DictionaryAttackParameters_fp.h" +#endif +#if CC_PP_Commands +# include "PP_Commands_fp.h" +#endif +#if CC_SetAlgorithmSet +# include "SetAlgorithmSet_fp.h" +#endif +#if CC_FieldUpgradeStart +# include "FieldUpgradeStart_fp.h" +#endif +#if CC_FieldUpgradeData +# include "FieldUpgradeData_fp.h" +#endif +#if CC_FirmwareRead +# include "FirmwareRead_fp.h" +#endif +#if CC_ContextSave +# include "ContextSave_fp.h" +#endif +#if CC_ContextLoad +# include "ContextLoad_fp.h" +#endif +#if CC_FlushContext +# include "FlushContext_fp.h" +#endif +#if CC_EvictControl +# include "EvictControl_fp.h" +#endif +#if CC_ReadClock +# include "ReadClock_fp.h" +#endif +#if CC_ClockSet +# include "ClockSet_fp.h" +#endif +#if CC_ClockRateAdjust +# include "ClockRateAdjust_fp.h" +#endif +#if CC_GetCapability +# include "GetCapability_fp.h" +#endif +#if CC_TestParms +# include "TestParms_fp.h" +#endif +#if CC_NV_DefineSpace +# include "NV_DefineSpace_fp.h" +#endif +#if CC_NV_UndefineSpace +# include "NV_UndefineSpace_fp.h" +#endif +#if CC_NV_UndefineSpaceSpecial +# include "NV_UndefineSpaceSpecial_fp.h" +#endif +#if CC_NV_ReadPublic +# include "NV_ReadPublic_fp.h" +#endif +#if CC_NV_Write +# include "NV_Write_fp.h" +#endif +#if CC_NV_Increment +# include "NV_Increment_fp.h" +#endif +#if CC_NV_Extend +# include "NV_Extend_fp.h" +#endif +#if CC_NV_SetBits +# include "NV_SetBits_fp.h" +#endif +#if CC_NV_WriteLock +# include "NV_WriteLock_fp.h" +#endif +#if CC_NV_GlobalWriteLock +# include "NV_GlobalWriteLock_fp.h" +#endif +#if CC_NV_Read +# include "NV_Read_fp.h" +#endif +#if CC_NV_ReadLock +# include "NV_ReadLock_fp.h" +#endif +#if CC_NV_ChangeAuth +# include "NV_ChangeAuth_fp.h" +#endif +#if CC_NV_Certify +# include "NV_Certify_fp.h" +#endif +#if CC_NV_DefineSpace2 +# include "NV_DefineSpace2_fp.h" +#endif +#if CC_NV_ReadPublic2 +# include "NV_ReadPublic2_fp.h" +#endif +#if CC_SetCapability +# include "SetCapability_fp.h" +#endif +#if CC_AC_Send +# include "AC_Send_fp.h" +#endif +#if CC_Policy_AC_SendSelect +# include "Policy_AC_SendSelect_fp.h" +#endif +#if CC_ACT_SetTimeout +# include "ACT_SetTimeout_fp.h" +#endif +#if CC_Vendor_TCG_Test +# include "Vendor_TCG_Test_fp.h" +#endif + +#endif // _COMMANDS_H_ diff --git a/TPMCmd/tpm/include/private/CryptEcc.h b/TPMCmd/tpm/include/private/CryptEcc.h new file mode 100644 index 00000000..f5525257 --- /dev/null +++ b/TPMCmd/tpm/include/private/CryptEcc.h @@ -0,0 +1,60 @@ +//** Introduction +// +// This file contains structure definitions used for ECC. The structures in this +// file are only used internally. The ECC-related structures that cross the +// public TPM interface are defined in TpmTypes.h +// + +// ECC Curve data type decoder ring +// ================================ +// | Name | Old Name* | Comments | +// | ------------------------- | -------------- | ------------------------------------------------------------------------------------------ | +// | TPM_ECC_CURVE | | 16-bit Curve ID from Part 2 of TCG TPM Spec | +// | TPM_ECC_CURVE_METADATA | ECC_CURVE | See description below | +// | | | | +// * - if different + +// TPM_ECC_CURVE_METADATA +// ====================== +// TPM-specific metadata for a particular curve, such as OIDs and signing/kdf +// schemes associated with the curve. +// +// TODO_ECC: Need to remove the curve constants from this structure and replace +// them with a reference to math-lib provided calls. Note: this structure does *NOT* +// include the actual curve constants. The curve constants are no longer in this +// structure because the constants need to be in a format compatible with the +// math library and are retrieved by the `ExtEcc_CurveGet*` family of functions. +// +// Using the math library's constant structure here is not necessary and breaks +// encapsulation. Using a tpm-specific format means either redundancy (the same +// values exist here and in a math-specific format), or forces the math library +// to adopt a particular format determined by this structure. Neither outcome +// is as clean as simply leaving the actual constants out of this structure. + +#ifndef _CRYPT_ECC_H +#define _CRYPT_ECC_H + +//** Structures + +#define ECC_BITS (MAX_ECC_KEY_BYTES * 8) +CRYPT_INT_TYPE(ecc, ECC_BITS); + +#define CRYPT_ECC_NUM(name) CRYPT_INT_VAR(name, ECC_BITS) + +#define CRYPT_ECC_INITIALIZED(name, initializer) \ + CRYPT_INT_INITIALIZED(name, ECC_BITS, initializer) + +typedef struct TPM_ECC_CURVE_METADATA +{ + const TPM_ECC_CURVE curveId; + const UINT16 keySizeBits; + const TPMT_KDF_SCHEME kdf; + const TPMT_ECC_SCHEME sign; + const BYTE* OID; +} TPM_ECC_CURVE_METADATA; + +//*** Macros +extern const TPM_ECC_CURVE_METADATA eccCurves[ECC_CURVE_COUNT]; + +#endif diff --git a/TPMCmd/tpm/include/private/CryptHash.h b/TPMCmd/tpm/include/private/CryptHash.h new file mode 100644 index 00000000..578eb69e --- /dev/null +++ b/TPMCmd/tpm/include/private/CryptHash.h @@ -0,0 +1,291 @@ +//** Introduction +// This header contains the hash structure definitions used in the TPM code +// to define the amount of space to be reserved for the hash state. This allows +// the TPM code to not have to import all of the symbols used by the hash +// computations. This lets the build environment of the TPM code not to have +// include the header files associated with the CryptoEngine code. + +#ifndef _CRYPT_HASH_H +#define _CRYPT_HASH_H + +//** Hash-related Structures + +union SMAC_STATES; + +// These definitions add the high-level methods for processing state that may be +// an SMAC +typedef void (*SMAC_DATA_METHOD)( + union SMAC_STATES* state, UINT32 size, const BYTE* buffer); + +typedef UINT16 (*SMAC_END_METHOD)( + union SMAC_STATES* state, UINT32 size, BYTE* buffer); + +typedef struct sequenceMethods +{ + SMAC_DATA_METHOD data; + SMAC_END_METHOD end; +} SMAC_METHODS; + +#define SMAC_IMPLEMENTED (CC_MAC || CC_MAC_Start) + +// These definitions are here because the SMAC state is in the union of hash states. +typedef struct tpmCmacState +{ + TPM_ALG_ID symAlg; + UINT16 keySizeBits; + INT16 bcount; // current count of bytes accumulated in IV + TPM2B_IV iv; // IV buffer + TPM2B_SYM_KEY symKey; +} tpmCmacState_t; + +typedef union SMAC_STATES +{ +#if ALG_CMAC + tpmCmacState_t cmac; +#endif + UINT64 pad; +} SMAC_STATES; + +typedef struct SMAC_STATE +{ + SMAC_METHODS smacMethods; + SMAC_STATES state; +} SMAC_STATE; + +#if ALG_SHA1 +# define IF_IMPLEMENTED_SHA1(op) op(SHA1, Sha1) +#else +# define IF_IMPLEMENTED_SHA1(op) +#endif +#if ALG_SHA256 +# define IF_IMPLEMENTED_SHA256(op) op(SHA256, Sha256) +#else +# define IF_IMPLEMENTED_SHA256(op) +#endif +#if ALG_SHA384 +# define IF_IMPLEMENTED_SHA384(op) op(SHA384, Sha384) +#else +# define IF_IMPLEMENTED_SHA384(op) +#endif +#if ALG_SHA512 +# define IF_IMPLEMENTED_SHA512(op) op(SHA512, Sha512) +#else +# define IF_IMPLEMENTED_SHA512(op) +#endif +#if ALG_SM3_256 +# define IF_IMPLEMENTED_SM3_256(op) op(SM3_256, Sm3_256) +#else +# define IF_IMPLEMENTED_SM3_256(op) +#endif +#if ALG_SHA3_256 +# define IF_IMPLEMENTED_SHA3_256(op) op(SHA3_256, Sha3_256) +#else +# define IF_IMPLEMENTED_SHA3_256(op) +#endif +#if ALG_SHA3_384 +# define IF_IMPLEMENTED_SHA3_384(op) op(SHA3_384, Sha3_384) +#else +# define IF_IMPLEMENTED_SHA3_384(op) +#endif +#if ALG_SHA3_512 +# define IF_IMPLEMENTED_SHA3_512(op) op(SHA3_512, Sha3_512) +#else +# define IF_IMPLEMENTED_SHA3_512(op) +#endif + +#define FOR_EACH_HASH(op) \ + IF_IMPLEMENTED_SHA1(op) \ + IF_IMPLEMENTED_SHA256(op) \ + IF_IMPLEMENTED_SHA384(op) \ + IF_IMPLEMENTED_SHA512(op) \ + IF_IMPLEMENTED_SM3_256(op) \ + IF_IMPLEMENTED_SHA3_256(op) \ + IF_IMPLEMENTED_SHA3_384(op) \ + IF_IMPLEMENTED_SHA3_512(op) + +#define HASH_TYPE(HASH, Hash) tpmHashState##HASH##_t Hash; +typedef union +{ + FOR_EACH_HASH(HASH_TYPE) +// Additions for symmetric block cipher MAC +#if SMAC_IMPLEMENTED + SMAC_STATE smac; +#endif + // to force structure alignment to be no worse than HASH_ALIGNMENT +#if HASH_ALIGNMENT == 8 + uint64_t align; +#else + uint32_t align; +#endif +} ANY_HASH_STATE; + +typedef ANY_HASH_STATE* PANY_HASH_STATE; +typedef const ANY_HASH_STATE* PCANY_HASH_STATE; + +#define ALIGNED_SIZE(x, b) ((((x) + (b)-1) / (b)) * (b)) +// MAX_HASH_STATE_SIZE will change with each implementation. It is assumed that +// a hash state will not be larger than twice the block size plus some +// overhead (in this case, 16 bytes). The overall size needs to be as +// large as any of the hash contexts. The structure needs to start on an +// alignment boundary and be an even multiple of the alignment +#define MAX_HASH_STATE_SIZE ((2 * MAX_HASH_BLOCK_SIZE) + 16) +#define MAX_HASH_STATE_SIZE_ALIGNED ALIGNED_SIZE(MAX_HASH_STATE_SIZE, HASH_ALIGNMENT) + +// This is an aligned byte array that will hold any of the hash contexts. +typedef ANY_HASH_STATE ALIGNED_HASH_STATE; + +// The header associated with the hash library is expected to define the methods +// which include the calling sequence. When not compiling CryptHash.c, the methods +// are not defined so we need placeholder functions for the structures + +#ifndef HASH_START_METHOD_DEF +# define HASH_START_METHOD_DEF void(HASH_START_METHOD)(void) +#endif +#ifndef HASH_DATA_METHOD_DEF +# define HASH_DATA_METHOD_DEF void(HASH_DATA_METHOD)(void) +#endif +#ifndef HASH_END_METHOD_DEF +# define HASH_END_METHOD_DEF void(HASH_END_METHOD)(void) +#endif +#ifndef HASH_STATE_COPY_METHOD_DEF +# define HASH_STATE_COPY_METHOD_DEF void(HASH_STATE_COPY_METHOD)(void) +#endif +#ifndef HASH_STATE_EXPORT_METHOD_DEF +# define HASH_STATE_EXPORT_METHOD_DEF void(HASH_STATE_EXPORT_METHOD)(void) +#endif +#ifndef HASH_STATE_IMPORT_METHOD_DEF +# define HASH_STATE_IMPORT_METHOD_DEF void(HASH_STATE_IMPORT_METHOD)(void) +#endif + +// Define the prototypical function call for each of the methods. This defines the +// order in which the parameters are passed to the underlying function. +typedef HASH_START_METHOD_DEF; +typedef HASH_DATA_METHOD_DEF; +typedef HASH_END_METHOD_DEF; +typedef HASH_STATE_COPY_METHOD_DEF; +typedef HASH_STATE_EXPORT_METHOD_DEF; +typedef HASH_STATE_IMPORT_METHOD_DEF; + +typedef struct _HASH_METHODS +{ + HASH_START_METHOD* start; + HASH_DATA_METHOD* data; + HASH_END_METHOD* end; + HASH_STATE_COPY_METHOD* copy; // Copy a hash block + HASH_STATE_EXPORT_METHOD* copyOut; // Copy a hash block from a hash + // context + HASH_STATE_IMPORT_METHOD* copyIn; // Copy a hash block to a proper hash + // context +} HASH_METHODS, *PHASH_METHODS; + +#define HASH_TPM2B(HASH, Hash) TPM2B_TYPE(HASH##_DIGEST, HASH##_DIGEST_SIZE); + +FOR_EACH_HASH(HASH_TPM2B) + +// When the TPM implements RSA, the hash-dependent OID pointers are part of the +// HASH_DEF. These macros conditionally add the OID reference to the HASH_DEF and the +// HASH_DEF_TEMPLATE. +#if ALG_RSA +# define PKCS1_HASH_REF const BYTE* PKCS1; +# define PKCS1_OID(NAME) , OID_PKCS1_##NAME +#else +# define PKCS1_HASH_REF +# define PKCS1_OID(NAME) +#endif + +// When the TPM implements ECC, the hash-dependent OID pointers are part of the +// HASH_DEF. These macros conditionally add the OID reference to the HASH_DEF and the +// HASH_DEF_TEMPLATE. +#if ALG_ECDSA +# define ECDSA_HASH_REF const BYTE* ECDSA; +# define ECDSA_OID(NAME) , OID_ECDSA_##NAME +#else +# define ECDSA_HASH_REF +# define ECDSA_OID(NAME) +#endif + +typedef const struct HASH_DEF_STRUCT +{ + HASH_METHODS method; + uint16_t blockSize; + uint16_t digestSize; + uint16_t contextSize; + uint16_t hashAlg; + const BYTE* OID; + PKCS1_HASH_REF // PKCS1 OID + ECDSA_HASH_REF // ECDSA OID +} HASH_DEF, *PHASH_DEF; + +// Macro to fill in the HASH_DEF for an algorithm. For SHA1, the instance would be: +// HASH_DEF_TEMPLATE(Sha1, SHA1) +// This handles the difference in capitalization for the various pieces. +#define HASH_DEF_TEMPLATE(HASH, Hash) \ + HASH_DEF Hash##_Def = \ + {{ \ + (HASH_START_METHOD*)&tpmHashStart_##HASH, \ + (HASH_DATA_METHOD*)&tpmHashData_##HASH, \ + (HASH_END_METHOD*)&tpmHashEnd_##HASH, \ + (HASH_STATE_COPY_METHOD*)&tpmHashStateCopy_##HASH, \ + (HASH_STATE_EXPORT_METHOD*)&tpmHashStateExport_##HASH, \ + (HASH_STATE_IMPORT_METHOD*)&tpmHashStateImport_##HASH, \ + }, \ + HASH##_BLOCK_SIZE, /*block size */ \ + HASH##_DIGEST_SIZE, /*data size */ \ + sizeof(tpmHashState##HASH##_t), \ + TPM_ALG_##HASH, \ + OID_##HASH PKCS1_OID(HASH) ECDSA_OID(HASH)}; + +// These definitions are for the types that can be in a hash state structure. +// These types are used in the cryptographic utilities. This is a define rather than +// an enum so that the size of this field can be explicit. +typedef BYTE HASH_STATE_TYPE; +#define HASH_STATE_EMPTY ((HASH_STATE_TYPE)0) +#define HASH_STATE_HASH ((HASH_STATE_TYPE)1) +#define HASH_STATE_HMAC ((HASH_STATE_TYPE)2) +#if CC_MAC || CC_MAC_Start +# define HASH_STATE_SMAC ((HASH_STATE_TYPE)3) +#endif + +// This is the structure that is used for passing a context into the hashing +// functions. It should be the same size as the function context used within +// the hashing functions. This is checked when the hash function is initialized. +// This version uses a new layout for the contexts and a different definition. The +// state buffer is an array of HASH_UNIT values so that a decent compiler will put +// the structure on a HASH_UNIT boundary. If the structure is not properly aligned, +// the code that manipulates the structure will copy to a properly aligned +// structure before it is used and copy the result back. This just makes things +// slower. +// NOTE: This version of the state had the pointer to the update method in the +// state. This is to allow the SMAC functions to use the same structure without +// having to replicate the entire HASH_DEF structure. +typedef struct _HASH_STATE +{ + HASH_STATE_TYPE type; // type of the context + TPM_ALG_ID hashAlg; + PHASH_DEF def; + ANY_HASH_STATE state; +} HASH_STATE, *PHASH_STATE; +typedef const HASH_STATE* PCHASH_STATE; + +//** HMAC State Structures + +// An HMAC_STATE structure contains an opaque HMAC stack state. A caller would +// use this structure when performing incremental HMAC operations. This structure +// contains a hash state and an HMAC key and allows slightly better stack +// optimization than adding an HMAC key to each hash state. +typedef struct hmacState +{ + HASH_STATE hashState; // the hash state + TPM2B_HASH_BLOCK hmacKey; // the HMAC key +} HMAC_STATE, *PHMAC_STATE; + +// This is for the external hash state. This implementation assumes that the size +// of the exported hash state is no larger than the internal hash state. +typedef struct +{ + BYTE buffer[sizeof(HASH_STATE)]; +} EXPORT_HASH_STATE, *PEXPORT_HASH_STATE; + +typedef const EXPORT_HASH_STATE* PCEXPORT_HASH_STATE; + +#endif // _CRYPT_HASH_H diff --git a/TPMCmd/tpm/include/private/CryptRand.h b/TPMCmd/tpm/include/private/CryptRand.h new file mode 100644 index 00000000..f8a39f7d --- /dev/null +++ b/TPMCmd/tpm/include/private/CryptRand.h @@ -0,0 +1,160 @@ +//** Introduction +// This file contains constant definition shared by CryptUtil and the parts +// of the Crypto Engine. +// + +#ifndef _CRYPT_RAND_H +#define _CRYPT_RAND_H + +//** DRBG Structures and Defines + +// Values and structures for the random number generator. These values are defined +// in this header file so that the size of the RNG state can be known to TPM.lib. +// This allows the allocation of some space in NV memory for the state to +// be stored on an orderly shutdown. + +// The DRBG based on a symmetric block cipher is defined by three values, +// 1) the key size +// 2) the block size (the IV size) +// 3) the symmetric algorithm + +#define DRBG_KEY_SIZE_BITS AES_MAX_KEY_SIZE_BITS +#define DRBG_IV_SIZE_BITS (AES_MAX_BLOCK_SIZE * 8) +#define DRBG_ALGORITHM TPM_ALG_AES + +#define DRBG_ENCRYPT_SETUP(key, keySizeInBits, schedule) \ + TpmCryptSetEncryptKeyAES(key, keySizeInBits, schedule) +#define DRBG_ENCRYPT(keySchedule, in, out) \ + TpmCryptEncryptAES(SWIZZLE(keySchedule, in, out)) + +#if((DRBG_KEY_SIZE_BITS % RADIX_BITS) != 0) || ((DRBG_IV_SIZE_BITS % RADIX_BITS) != 0) +# error "Key size and IV for DRBG must be even multiples of the radix" +#endif +#if(DRBG_KEY_SIZE_BITS % DRBG_IV_SIZE_BITS) != 0 +# error "Key size for DRBG must be even multiple of the cypher block size" +#endif + +// Derived values +#define DRBG_MAX_REQUESTS_PER_RESEED (1 << 48) +#define DRBG_MAX_REQEST_SIZE (1 << 32) + +#define pDRBG_KEY(seed) ((DRBG_KEY*)&(((BYTE*)(seed))[0])) +#define pDRBG_IV(seed) ((DRBG_IV*)&(((BYTE*)(seed))[DRBG_KEY_SIZE_BYTES])) + +#define DRBG_KEY_SIZE_WORDS (BITS_TO_CRYPT_WORDS(DRBG_KEY_SIZE_BITS)) +#define DRBG_KEY_SIZE_BYTES (DRBG_KEY_SIZE_WORDS * RADIX_BYTES) + +#define DRBG_IV_SIZE_WORDS (BITS_TO_CRYPT_WORDS(DRBG_IV_SIZE_BITS)) +#define DRBG_IV_SIZE_BYTES (DRBG_IV_SIZE_WORDS * RADIX_BYTES) + +#define DRBG_SEED_SIZE_WORDS (DRBG_KEY_SIZE_WORDS + DRBG_IV_SIZE_WORDS) +#define DRBG_SEED_SIZE_BYTES (DRBG_KEY_SIZE_BYTES + DRBG_IV_SIZE_BYTES) + +typedef union +{ + BYTE bytes[DRBG_KEY_SIZE_BYTES]; + crypt_uword_t words[DRBG_KEY_SIZE_WORDS]; +} DRBG_KEY; + +typedef union +{ + BYTE bytes[DRBG_IV_SIZE_BYTES]; + crypt_uword_t words[DRBG_IV_SIZE_WORDS]; +} DRBG_IV; + +typedef union +{ + BYTE bytes[DRBG_SEED_SIZE_BYTES]; + crypt_uword_t words[DRBG_SEED_SIZE_WORDS]; +} DRBG_SEED; + +#define CTR_DRBG_MAX_REQUESTS_PER_RESEED ((UINT64)1 << 20) +#define CTR_DRBG_MAX_BYTES_PER_REQUEST (1 << 16) + +#define CTR_DRBG_MIN_ENTROPY_INPUT_LENGTH DRBG_SEED_SIZE_BYTES +#define CTR_DRBG_MAX_ENTROPY_INPUT_LENGTH DRBG_SEED_SIZE_BYTES +#define CTR_DRBG_MAX_ADDITIONAL_INPUT_LENGTH DRBG_SEED_SIZE_BYTES + +#define TESTING (1 << 0) +#define ENTROPY (1 << 1) +#define TESTED (1 << 2) + +#define IsTestStateSet(BIT) ((g_cryptoSelfTestState.rng & BIT) != 0) +#define SetTestStateBit(BIT) (g_cryptoSelfTestState.rng |= BIT) +#define ClearTestStateBit(BIT) (g_cryptoSelfTestState.rng &= ~BIT) + +#define IsSelfTest() IsTestStateSet(TESTING) +#define SetSelfTest() SetTestStateBit(TESTING) +#define ClearSelfTest() ClearTestStateBit(TESTING) + +#define IsEntropyBad() IsTestStateSet(ENTROPY) +#define SetEntropyBad() SetTestStateBit(ENTROPY) +#define ClearEntropyBad() ClearTestStateBit(ENTROPY) + +#define IsDrbgTested() IsTestStateSet(TESTED) +#define SetDrbgTested() SetTestStateBit(TESTED) +#define ClearDrbgTested() ClearTestStateBit(TESTED) + +typedef struct +{ + UINT64 reseedCounter; + UINT32 magic; + DRBG_SEED seed; // contains the key and IV for the counter mode DRBG + UINT32 lastValue[4]; // used when the TPM does continuous self-test + // for FIPS compliance of DRBG +} DRBG_STATE, *pDRBG_STATE; +#define DRBG_MAGIC ((UINT32)0x47425244) // "DRBG" backwards so that it displays + +typedef struct KDF_STATE +{ + UINT64 counter; + UINT32 magic; + UINT32 limit; + TPM2B* seed; + const TPM2B* label; + TPM2B* context; + TPM_ALG_ID hash; + TPM_ALG_ID kdf; + UINT16 digestSize; + TPM2B_DIGEST residual; +} KDF_STATE, *pKDR_STATE; +#define KDF_MAGIC ((UINT32)0x4048444a) // "KDF " backwards + +// Make sure that any other structures added to this union start with a 64-bit +// counter and a 32-bit magic number +typedef union +{ + DRBG_STATE drbg; + KDF_STATE kdf; +} RAND_STATE; + +// This is the state used when the library uses a random number generator. +// A special function is installed for the library to call. That function +// picks up the state from this location and uses it for the generation +// of the random number. +extern RAND_STATE* s_random; + +// When instrumenting RSA key sieve +#if RSA_INSTRUMENT +# define PRIME_INDEX(x) ((x) == 512 ? 0 : (x) == 1024 ? 1 : 2) +# define INSTRUMENT_SET(a, b) ((a) = (b)) +# define INSTRUMENT_ADD(a, b) (a) = (a) + (b) +# define INSTRUMENT_INC(a) (a) = (a) + 1 + +extern UINT32 PrimeIndex; +extern UINT32 failedAtIteration[10]; +extern UINT32 PrimeCounts[3]; +extern UINT32 MillerRabinTrials[3]; +extern UINT32 totalFieldsSieved[3]; +extern UINT32 bitsInFieldAfterSieve[3]; +extern UINT32 emptyFieldsSieved[3]; +extern UINT32 noPrimeFields[3]; +extern UINT32 primesChecked[3]; +extern UINT16 lastSievePrime; +#else +# define INSTRUMENT_SET(a, b) +# define INSTRUMENT_ADD(a, b) +# define INSTRUMENT_INC(a) +#endif + +#endif // _CRYPT_RAND_H diff --git a/TPMCmd/tpm/include/private/CryptRsa.h b/TPMCmd/tpm/include/private/CryptRsa.h new file mode 100644 index 00000000..acfce22e --- /dev/null +++ b/TPMCmd/tpm/include/private/CryptRsa.h @@ -0,0 +1,39 @@ +// This file contains the RSA-related structures and defines. + +#ifndef _CRYPT_RSA_H +#define _CRYPT_RSA_H + +// These values are used in the Crypt_Int* representation of various RSA values. +// define ci_rsa_t as buffer containing a CRYPT_INT object with space for +// (MAX_RSA_KEY_BITS) of actual data. +CRYPT_INT_TYPE(rsa, MAX_RSA_KEY_BITS); +#define CRYPT_RSA_VAR(name) CRYPT_INT_VAR(name, MAX_RSA_KEY_BITS) +#define CRYPT_RSA_INITIALIZED(name, initializer) \ + CRYPT_INT_INITIALIZED(name, MAX_RSA_KEY_BITS, initializer) + +#define CRYPT_PRIME_VAR(name) CRYPT_INT_VAR(name, (MAX_RSA_KEY_BITS / 2)) +// define ci_prime_t as buffer containing a CRYPT_INT object with space for +// (MAX_RSA_KEY_BITS/2) of actual data. +CRYPT_INT_TYPE(prime, (MAX_RSA_KEY_BITS / 2)); +#define CRYPT_PRIME_INITIALIZED(name, initializer) \ + CRYPT_INT_INITIALIZED(name, MAX_RSA_KEY_BITS / 2, initializer) + +#if !CRT_FORMAT_RSA +# error This verson only works with CRT formatted data +#endif // !CRT_FORMAT_RSA + +typedef struct privateExponent +{ + Crypt_Int* P; + Crypt_Int* Q; + Crypt_Int* dP; + Crypt_Int* dQ; + Crypt_Int* qInv; + ci_prime_t entries[5]; +} privateExponent; + +#define NEW_PRIVATE_EXPONENT(X) \ + privateExponent _##X; \ + privateExponent* X = RsaInitializeExponent(&(_##X)) + +#endif // _CRYPT_RSA_H diff --git a/TPMCmd/tpm/include/private/CryptSym.h b/TPMCmd/tpm/include/private/CryptSym.h new file mode 100644 index 00000000..bd78ae25 --- /dev/null +++ b/TPMCmd/tpm/include/private/CryptSym.h @@ -0,0 +1,75 @@ +//** Introduction +// +// This file contains the implementation of the symmetric block cipher modes +// allowed for a TPM. These functions only use the single block encryption functions +// of the selected symmetric cryptographic library. + +//** Includes, Defines, and Typedefs +#ifndef CRYPT_SYM_H +#define CRYPT_SYM_H + +#if ALG_AES +# define IF_IMPLEMENTED_AES(op) op(AES, aes) +#else +# define IF_IMPLEMENTED_AES(op) +#endif +#if ALG_SM4 +# define IF_IMPLEMENTED_SM4(op) op(SM4, sm4) +#else +# define IF_IMPLEMENTED_SM4(op) +#endif +#if ALG_CAMELLIA +# define IF_IMPLEMENTED_CAMELLIA(op) op(CAMELLIA, camellia) +#else +# define IF_IMPLEMENTED_CAMELLIA(op) +#endif + +#define FOR_EACH_SYM(op) \ + IF_IMPLEMENTED_AES(op) \ + IF_IMPLEMENTED_SM4(op) \ + IF_IMPLEMENTED_CAMELLIA(op) + +// Macros for creating the key schedule union +#define KEY_SCHEDULE(SYM, sym) tpmKeySchedule##SYM sym; +typedef union tpmCryptKeySchedule_t +{ + FOR_EACH_SYM(KEY_SCHEDULE) + +#if SYMMETRIC_ALIGNMENT == 8 + uint64_t alignment; +#else + uint32_t alignment; +#endif +} tpmCryptKeySchedule_t; + +// Each block cipher within a library is expected to conform to the same calling +// conventions with three parameters ('keySchedule', 'in', and 'out') in the same +// order. That means that all algorithms would use the same order of the same +// parameters. The code is written assuming the ('keySchedule', 'in', and 'out') +// order. However, if the library uses a different order, the order can be changed +// with a SWIZZLE macro that puts the parameters in the correct order. +// Note that all algorithms have to use the same order and number of parameters +// because the code to build the calling list is common for each call to encrypt +// or decrypt with the algorithm chosen by setting a function pointer to select +// the algorithm that is used. + +#define ENCRYPT(keySchedule, in, out) encrypt(SWIZZLE(keySchedule, in, out)) + +#define DECRYPT(keySchedule, in, out) decrypt(SWIZZLE(keySchedule, in, out)) + +// Note that the macros rely on 'encrypt' as local values in the +// functions that use these macros. Those parameters are set by the macro that +// set the key schedule to be used for the call. + +#define ENCRYPT_CASE(ALG, alg) \ + case TPM_ALG_##ALG: \ + TpmCryptSetEncryptKey##ALG(key, keySizeInBits, &keySchedule.alg); \ + encrypt = (TpmCryptSetSymKeyCall_t)TpmCryptEncrypt##ALG; \ + break; +#define DECRYPT_CASE(ALG, alg) \ + case TPM_ALG_##ALG: \ + TpmCryptSetDecryptKey##ALG(key, keySizeInBits, &keySchedule.alg); \ + decrypt = (TpmCryptSetSymKeyCall_t)TpmCryptDecrypt##ALG; \ + break; + +#endif // CRYPT_SYM_H \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/CryptTest.h b/TPMCmd/tpm/include/private/CryptTest.h new file mode 100644 index 00000000..b0ef51df --- /dev/null +++ b/TPMCmd/tpm/include/private/CryptTest.h @@ -0,0 +1,35 @@ +// This file contains constant definitions used for self-test. + +#ifndef _CRYPT_TEST_H +#define _CRYPT_TEST_H + +// This is the definition of a bit array with one bit per algorithm. +// NOTE: Since bit numbering starts at zero, when TPM_ALG_LAST is a multiple of 8, +// ALGORITHM_VECTOR will need to have byte for the single bit in the last byte. So, +// for example, when TPM_ALG_LAST is 8, ALGORITHM_VECTOR will need 2 bytes. +#define ALGORITHM_VECTOR_BYTES ((TPM_ALG_LAST + 8) / 8) +typedef BYTE ALGORITHM_VECTOR[ALGORITHM_VECTOR_BYTES]; + +#ifdef TEST_SELF_TEST +LIB_EXPORT extern ALGORITHM_VECTOR LibToTest; +#endif + +// This structure is used to contain self-test tracking information for the +// cryptographic modules. Each of the major modules is given a 32-bit value in +// which it may maintain its own self test information. The convention for this +// state is that when all of the bits in this structure are 0, all functions need +// to be tested. +typedef struct +{ + UINT32 rng; + UINT32 hash; + UINT32 sym; +#if ALG_RSA + UINT32 rsa; +#endif +#if ALG_ECC + UINT32 ecc; +#endif +} CRYPTO_SELF_TEST_STATE; + +#endif // _CRYPT_TEST_H diff --git a/TPMCmd/tpm/include/EccTestData.h b/TPMCmd/tpm/include/private/EccTestData.h similarity index 81% rename from TPMCmd/tpm/include/EccTestData.h rename to TPMCmd/tpm/include/private/EccTestData.h index d4f5e67c..7c391f01 100644 --- a/TPMCmd/tpm/include/EccTestData.h +++ b/TPMCmd/tpm/include/private/EccTestData.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ // This file contains the parameter data for ECC testing. #ifdef SELF_TEST_DATA diff --git a/TPMCmd/tpm/include/Global.h b/TPMCmd/tpm/include/private/Global.h similarity index 84% rename from TPMCmd/tpm/include/Global.h rename to TPMCmd/tpm/include/private/Global.h index 7bf4dd3d..3b645d77 100644 --- a/TPMCmd/tpm/include/Global.h +++ b/TPMCmd/tpm/include/private/Global.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description @@ -63,29 +29,28 @@ _REDUCE_WARNING_LEVEL_(2) # include _NORMAL_WARNING_LEVEL_ +# include "GpMacros.h" # include "Capabilities.h" -# include "TpmTypes.h" +# include "TpmTypes.h" // requires GpMacros & Capabilities # include "CommandAttributes.h" # include "CryptTest.h" -# include "BnValues.h" + +# ifndef MATH_LIB +# error MATH_LIB required +# endif +# include LIB_INCLUDE(TpmTo, MATH_LIB, Math) + # include "CryptHash.h" # include "CryptSym.h" # include "CryptRand.h" # include "CryptEcc.h" # include "CryptRsa.h" # include "CryptTest.h" -# include "TpmError.h" # include "NV.h" # include "ACT.h" //** Defines and Types -//*** Size Types -// These types are used to differentiate the two different size values used. -// -// NUMBYTES is used when a size is a number of bytes (usually a TPM2B) -typedef UINT16 NUMBYTES; - //*** Other Types // An AUTH_VALUE is a BYTE array containing a digest (TPMU_HA) typedef BYTE AUTH_VALUE[sizeof(TPMU_HA)]; @@ -202,6 +167,13 @@ typedef struct OBJECT // handle of an object slot. TPM2B_NAME name; // Name of the object name. Kept here // to avoid repeatedly computing it. + TPMI_RH_HIERARCHY hierarchy; // Hierarchy for the object. While the + // base hierarchy can be deduced from + // 'attributes', if the hierarchy is + // firmware-bound or SVN-bound then + // this field carries additional metadata + // needed to derive the proof value for + // the object. } OBJECT; //*** HASH_OBJECT Structure @@ -263,55 +235,62 @@ typedef UINT32 AUTH_ROLE; typedef struct SESSION_ATTRIBUTES { - unsigned isPolicy : 1; //1) SET if the session may only be used - // for policy - unsigned isAudit : 1; //2) SET if the session is used for audit - unsigned isBound : 1; //3) SET if the session is bound to with an - // entity. This attribute will be CLEAR - // if either isPolicy or isAudit is SET. - unsigned isCpHashDefined : 1; //4) SET if the cpHash has been defined - // This attribute is not SET unless - // 'isPolicy' is SET. - unsigned isAuthValueNeeded : 1; //5) SET if the authValue is required for - // computing the session HMAC. This - // attribute is not SET unless 'isPolicy' - // is SET. - unsigned isPasswordNeeded : 1; //6) SET if a password authValue is required - // for authorization This attribute is not - // SET unless 'isPolicy' is SET. - unsigned isPPRequired : 1; //7) SET if physical presence is required to - // be asserted when the authorization is - // checked. This attribute is not SET - // unless 'isPolicy' is SET. - unsigned isTrialPolicy : 1; //8) SET if the policy session is created - // for trial of the policy's policyHash - // generation. This attribute is not SET - // unless 'isPolicy' is SET. - unsigned isDaBound : 1; //9) SET if the bind entity had noDA CLEAR. - // If this is SET, then an authorization - // failure using this session will count - // against lockout even if the object - // being authorized is exempt from DA. - unsigned isLockoutBound : 1; //10) SET if the session is bound to - // lockoutAuth. - unsigned includeAuth : 1; //11) This attribute is SET when the - // authValue of an object is to be - // included in the computation of the - // HMAC key for the command and response - // computations. (was 'requestWasBound') - unsigned checkNvWritten : 1; //12) SET if the TPMA_NV_WRITTEN attribute - // needs to be checked when the policy is - // used for authorization for NV access. - // If this is SET for any other type, the - // policy will fail. - unsigned nvWrittenState : 1; //13) SET if TPMA_NV_WRITTEN is required to - // be SET. Used when 'checkNvWritten' is - // SET - unsigned isTemplateSet : 1; //14) SET if the templateHash needs to be - // checked for Create, CreatePrimary, or - // CreateLoaded. + // SET if the session may only be used for policy + unsigned isPolicy : 1; + // SET if the session is used for audit + unsigned isAudit : 1; + // SET if the session is bound to an entity. This attribute will be CLEAR if + // either isPolicy or isAudit is SET. + unsigned isBound : 1; + // SET if the cpHash has been defined. This attribute is not SET unless + // 'isPolicy' is SET. + unsigned isCpHashDefined : 1; + // SET if the nameHash has been defined. This attribute is not SET unless + // 'isPolicy' is SET. + unsigned isNameHashDefined : 1; + // SET if the pHash has been defined. This attribute is not SET unless + // 'isPolicy' is SET. + unsigned isParametersHashDefined : 1; + // SET if the templateHash needs to be checked for Create, CreatePrimary, or + // CreateLoaded. + unsigned isTemplateHashDefined : 1; + // SET if the authValue is required for computing the session HMAC. This + // attribute is not SET unless 'isPolicy' is SET. + unsigned isAuthValueNeeded : 1; + // SET if a password authValue is required for authorization This attribute + // is not SET unless 'isPolicy' is SET. + unsigned isPasswordNeeded : 1; + // SET if physical presence is required to be asserted when the + // authorization is checked. This attribute is not SET unless 'isPolicy' is + // SET. + unsigned isPPRequired : 1; + // SET if the policy session is created for trial of the policy's policyHash + // generation. This attribute is not SET unless 'isPolicy' is SET. + unsigned isTrialPolicy : 1; + // SET if the bind entity had noDA CLEAR. If this is SET, then an + // authorization failure using this session will count against lockout even + // if the object being authorized is exempt from DA. + unsigned isDaBound : 1; + // SET if the session is bound to lockoutAuth. + unsigned isLockoutBound : 1; + // This attribute is SET when the authValue of an object is to be included + // in the computation of the HMAC key for the command and response + // computations. (was 'requestWasBound') + unsigned includeAuth : 1; + // SET if the TPMA_NV_WRITTEN attribute needs to be checked when the policy + // is used for authorization for NV access. If this is SET for any other + // type, the policy will fail. + unsigned checkNvWritten : 1; + // SET if TPMA_NV_WRITTEN is required to be SET. Used when 'checkNvWritten' + // is SET + unsigned nvWrittenState : 1; } SESSION_ATTRIBUTES; +//*** IsCpHashUnionOccupied() +// This function indicates whether the session attributes indicate that one of +// the members of the union containing `cpHash` are set. +BOOL IsCpHashUnionOccupied(SESSION_ATTRIBUTES attrs); + //*** SESSION Structure // The SESSION structure contains all the context of a session except for the // associated contextID. @@ -353,6 +332,8 @@ typedef struct SESSION // command being authorized TPM2B_DIGEST nameHash; // the required nameHash TPM2B_DIGEST templateHash; // the required template for creation + TPM2B_DIGEST pHash; // the required parameter hash value for the + // command being authorized } u1; union @@ -428,6 +409,10 @@ typedef enum // The NV_INDEX structure defines the internal format for an NV index. // The 'indexData' size varies according to the type of the index. // In this implementation, all of the index is manipulated as a unit. +// NOTE: In this implementation of the TPM, the extended bits are always 0. +// Therefore, they are stored in the NV subsystem as legacy structures, +// even when the handle type indicates that the index can have extended +// attributes. typedef struct NV_INDEX { TPMS_NV_PUBLIC publicArea; @@ -500,13 +485,7 @@ EXTERN ALGORITHM_VECTOR g_toTest; // code when it is a parameter-, handle-, or session-related error. // This is an implementation choice and the same result can be achieved by using // a macro. -# define g_rcIndexInitializer \ - { \ - TPM_RC_1, TPM_RC_2, TPM_RC_3, TPM_RC_4, TPM_RC_5, TPM_RC_6, TPM_RC_7, \ - TPM_RC_8, TPM_RC_9, TPM_RC_A, TPM_RC_B, TPM_RC_C, TPM_RC_D, TPM_RC_E, \ - TPM_RC_F \ - } -EXTERN const UINT16 g_rcIndex[15] INITIALIZER(g_rcIndexInitializer); +extern const UINT16 g_rcIndex[15]; //*** g_exclusiveAuditSession // This location holds the session handle for the current exclusive audit @@ -652,19 +631,15 @@ EXTERN BOOL g_nvOk; EXTERN TPM_RC g_NvStatus; //*** g_platformUnique -// This location contains the unique value(s) used to identify the TPM. It is -// loaded on every _TPM2_Startup() -// The first value is used to seed the RNG. The second value is used as a vendor -// authValue. The value used by the RNG would be the value derived from the -// chip unique value (such as fused) with a dependency on the authorities of the -// code in the TPM boot path. The second would be derived from the chip unique value -// with a dependency on the details of the code in the boot path. That is, the -// first value depends on the various signers of the code and the second depends on -// what was signed. The TPM vendor should not be able to know the first value but -// they are expected to know the second. -EXTERN TPM2B_AUTH g_platformUniqueAuthorities; // Reserved for RNG - -EXTERN TPM2B_AUTH g_platformUniqueDetails; // referenced by VENDOR_PERMANENT + +// This location contains unique value(s) used by the TPM Platform vendor. +// These are loaded on every _TPM2_Startup() using the _plat__GetUnique function. +// The "which" parameter to _plat__GetUnique indicates the value to return. +// If used, the TPM vendor is expected to use these values for authentication. +# if VENDOR_PERMANENT_AUTH_ENABLED == YES +// which = 1, the authorization value for VENDOR_PERMANENT_AUTH_HANDLE +EXTERN TPM2B_AUTH g_platformUniqueAuth; +# endif //********************************************************************************* //********************************************************************************* @@ -684,6 +659,10 @@ EXTERN TPM2B_AUTH g_platformUniqueDetails; // referenced by VENDOR_PERMANENT // (TPM2_Startup() or TPM2_Shutdown(). typedef struct { + // data provided by the platform library during manufacturing. + // Opaque to the TPM Core library, but may be used by the platform library. + BYTE platformReserved[PERSISTENT_DATA_PLATFORM_SPACE]; + //********************************************************************************* // Hierarchy //********************************************************************************* @@ -881,6 +860,11 @@ typedef struct orderly_data // structure. UINT16 signaledACT; UINT16 preservedSignaled; + +# if ORDERLY_DATA_PADDING != 0 + BYTE reserved[ORDERLY_DATA_PADDING]; +# endif + } ORDERLY_DATA; # if ACCUMULATE_SELF_HEAL_TIMER @@ -936,6 +920,9 @@ typedef struct state_clear_data # define DefineActPolicySpace(N) TPMT_HA act_##N; FOR_EACH_ACT(DefineActPolicySpace) +# if STATE_CLEAR_DATA_PADDING != 0 + BYTE reserved[STATE_CLEAR_DATA_PADDING]; +# endif } STATE_CLEAR_DATA; EXTERN STATE_CLEAR_DATA gc; @@ -1041,6 +1028,9 @@ typedef struct state_reset_data BYTE commitArray[16]; // The default reset value is {0}. # endif // ALG_ECC +# if STATE_RESET_DATA_PADDING != 0 + BYTE reserved[STATE_RESET_DATA_PADDING]; +# endif } STATE_RESET_DATA; EXTERN STATE_RESET_DATA gr; @@ -1064,13 +1054,13 @@ EXTERN STATE_RESET_DATA gr; // The NV_READ_PERSISTENT and NV_WRITE_PERSISTENT macros are used to access members // of the PERSISTENT_DATA structure in NV. # define NV_READ_PERSISTENT(to, from) \ - NvRead(&to, offsetof(PERSISTENT_DATA, from), sizeof(to)) + NvRead(&to, offsetof(PERSISTENT_DATA, from), sizeof(to)) # define NV_WRITE_PERSISTENT(to, from) \ - NvWrite(offsetof(PERSISTENT_DATA, to), sizeof(gp.to), &from) + NvWrite(offsetof(PERSISTENT_DATA, to), sizeof(gp.to), &from) # define CLEAR_PERSISTENT(item) \ - NvClearPersistent(offsetof(PERSISTENT_DATA, item), sizeof(gp.item)) + NvClearPersistent(offsetof(PERSISTENT_DATA, item), sizeof(gp.item)) # define NV_SYNC_PERSISTENT(item) NV_WRITE_PERSISTENT(item, gp.item) @@ -1125,47 +1115,27 @@ typedef struct COMMAND FOR_EACH_HASH(RP_HASH) // space for the RP hashes } COMMAND; -// Global string constants for consistency in KDF function calls. -// These string constants are shared across functions to make sure that they -// are all using consistent string values. - -# define STRING_INITIALIZER(value) \ - { \ - { \ - sizeof(value), \ - { \ - value \ - } \ - } \ - } -# define TPM2B_STRING(name, value) \ - typedef union name##_ \ - { \ - struct \ - { \ - UINT16 size; \ - BYTE buffer[sizeof(value)]; \ - } t; \ - TPM2B b; \ - } TPM2B_##name##_; \ - EXTERN const TPM2B_##name##_ name##_ INITIALIZER(STRING_INITIALIZER(value)); \ - EXTERN const TPM2B* name INITIALIZER(&name##_.b) - -TPM2B_STRING(PRIMARY_OBJECT_CREATION, "Primary Object Creation"); -TPM2B_STRING(CFB_KEY, "CFB"); -TPM2B_STRING(CONTEXT_KEY, "CONTEXT"); -TPM2B_STRING(INTEGRITY_KEY, "INTEGRITY"); -TPM2B_STRING(SECRET_KEY, "SECRET"); -TPM2B_STRING(SESSION_KEY, "ATH"); -TPM2B_STRING(STORAGE_KEY, "STORAGE"); -TPM2B_STRING(XOR_KEY, "XOR"); -TPM2B_STRING(COMMIT_STRING, "ECDAA Commit"); -TPM2B_STRING(DUPLICATE_STRING, "DUPLICATE"); -TPM2B_STRING(IDENTITY_STRING, "IDENTITY"); -TPM2B_STRING(OBFUSCATE_STRING, "OBFUSCATE"); -# if SELF_TEST -TPM2B_STRING(OAEP_TEST_STRING, "OAEP Test Value"); -# endif // SELF_TEST +// TPM2B String constants used for KDFs. +// actual definition in global.c +extern const TPM2B* PRIMARY_OBJECT_CREATION; +extern const TPM2B* CFB_KEY; +extern const TPM2B* CONTEXT_KEY; +extern const TPM2B* INTEGRITY_KEY; +extern const TPM2B* SECRET_KEY; +extern const TPM2B* HIERARCHY_PROOF_SECRET_LABEL; +extern const TPM2B* HIERARCHY_SEED_SECRET_LABEL; +extern const TPM2B* HIERARCHY_FW_SECRET_LABEL; +extern const TPM2B* HIERARCHY_SVN_SECRET_LABEL; +extern const TPM2B* SESSION_KEY; +extern const TPM2B* STORAGE_KEY; +extern const TPM2B* XOR_KEY; +extern const TPM2B* COMMIT_STRING; +extern const TPM2B* DUPLICATE_STRING; +extern const TPM2B* IDENTITY_STRING; +extern const TPM2B* OBFUSCATE_STRING; +# if ENABLE_SELF_TESTS +extern const TPM2B* OAEP_TEST_STRING; +# endif // ENABLE_SELF_TESTS //***************************************************************************** //** From CryptTest.c @@ -1176,7 +1146,7 @@ EXTERN CRYPTO_SELF_TEST_STATE g_cryptoSelfTestState; //***************************************************************************** //** From Manufacture.c //***************************************************************************** -EXTERN BOOL g_manufactured INITIALIZER(FALSE); +extern BOOL g_manufactured; // This value indicates if a TPM2_Startup commands has been // receive since the power on event. This flag is maintained in power @@ -1306,24 +1276,7 @@ EXTERN OBJECT s_objects[MAX_LOADED_OBJECTS]; //*** From PCR.c //***************************************************************************** # if defined PCR_C || defined GLOBAL_C -// The following macro is used to define the per-implemented-hash space. This -// implementation reserves space for all implemented hashes. -# define PCR_ALL_HASH(HASH, Hash) BYTE Hash##Pcr[HASH##_DIGEST_SIZE]; - -typedef struct -{ - FOR_EACH_HASH(PCR_ALL_HASH) -} PCR; - -typedef struct -{ - unsigned int stateSave : 1; // if the PCR value should be - // saved in state save - unsigned int resetLocality : 5; // The locality that the PCR - // can be reset - unsigned int extendLocality : 5; // The locality that the PCR - // can be extend -} PCR_Attributes; +# include EXTERN PCR s_pcrs[IMPLEMENTATION_PCR]; @@ -1377,21 +1330,20 @@ EXTERN UINT32 s_actionIoAllocation; // number of UIN64 allocated for the // in which the failure occurred. This address value is not useful for anything // other than helping the vendor to know in which file the failure occurred. EXTERN BOOL g_inFailureMode; // Indicates that the TPM is in failure mode -# if SIMULATION +# if ALLOW_FORCE_FAILURE_MODE EXTERN BOOL g_forceFailureMode; // flag to force failure mode during test # endif -typedef void(FailFunction)(const char* function, int line, int code); - -# if defined TPM_FAIL_C || defined GLOBAL_C +# if FAIL_TRACE +// The name of the function that triggered failure mode. +EXTERN const char* s_failFunctionName; +# endif // FAIL_TRACE +// A numeric indicator of the function that triggered failure mode. EXTERN UINT32 s_failFunction; -EXTERN UINT32 s_failLine; // the line in the file at which - // the error was signaled -EXTERN UINT32 s_failCode; // the error code used - -EXTERN FailFunction* LibFailCallback; - -# endif // TPM_FAIL_C +// The line in the file at which the error was signaled. +EXTERN UINT32 s_failLine; +// the reason for the failure. +EXTERN UINT32 s_failCode; //***************************************************************************** //*** From ACT_spt.c diff --git a/TPMCmd/tpm/include/private/HandleProcess.h b/TPMCmd/tpm/include/private/HandleProcess.h new file mode 100644 index 00000000..fc10bf8d --- /dev/null +++ b/TPMCmd/tpm/include/private/HandleProcess.h @@ -0,0 +1,1458 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT +// clang-format off + +#if CC_Startup +case TPM_CC_Startup: + break; +#endif // CC_Startup +#if CC_Shutdown +case TPM_CC_Shutdown: + break; +#endif // CC_Shutdown +#if CC_SelfTest +case TPM_CC_SelfTest: + break; +#endif // CC_SelfTest +#if CC_IncrementalSelfTest +case TPM_CC_IncrementalSelfTest: + break; +#endif // CC_IncrementalSelfTest +#if CC_GetTestResult +case TPM_CC_GetTestResult: + break; +#endif // CC_GetTestResult +#if CC_StartAuthSession +case TPM_CC_StartAuthSession: + *handleCount = 2; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_ENTITY_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_StartAuthSession +#if CC_PolicyRestart +case TPM_CC_PolicyRestart: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyRestart +#if CC_Create +case TPM_CC_Create: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_Create +#if CC_Load +case TPM_CC_Load: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_Load +#if CC_LoadExternal +case TPM_CC_LoadExternal: + break; +#endif // CC_LoadExternal +#if CC_ReadPublic +case TPM_CC_ReadPublic: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ReadPublic +#if CC_ActivateCredential +case TPM_CC_ActivateCredential: + *handleCount = 2; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_ActivateCredential +#if CC_MakeCredential +case TPM_CC_MakeCredential: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_MakeCredential +#if CC_Unseal +case TPM_CC_Unseal: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_Unseal +#if CC_ObjectChangeAuth +case TPM_CC_ObjectChangeAuth: + *handleCount = 2; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_ObjectChangeAuth +#if CC_CreateLoaded +case TPM_CC_CreateLoaded: + *handleCount = 1; + result = TPMI_DH_PARENT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_CreateLoaded +#if CC_Duplicate +case TPM_CC_Duplicate: + *handleCount = 2; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_Duplicate +#if CC_Rewrap +case TPM_CC_Rewrap: + *handleCount = 2; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_Rewrap +#if CC_Import +case TPM_CC_Import: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_Import +#if CC_RSA_Encrypt +case TPM_CC_RSA_Encrypt: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_RSA_Encrypt +#if CC_RSA_Decrypt +case TPM_CC_RSA_Decrypt: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_RSA_Decrypt +#if CC_ECDH_KeyGen +case TPM_CC_ECDH_KeyGen: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ECDH_KeyGen +#if CC_ECDH_ZGen +case TPM_CC_ECDH_ZGen: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ECDH_ZGen +#if CC_ECC_Parameters +case TPM_CC_ECC_Parameters: + break; +#endif // CC_ECC_Parameters +#if CC_ZGen_2Phase +case TPM_CC_ZGen_2Phase: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ZGen_2Phase +#if CC_ECC_Encrypt +case TPM_CC_ECC_Encrypt: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ECC_Encrypt +#if CC_ECC_Decrypt +case TPM_CC_ECC_Decrypt: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ECC_Decrypt +#if CC_EncryptDecrypt +case TPM_CC_EncryptDecrypt: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_EncryptDecrypt +#if CC_EncryptDecrypt2 +case TPM_CC_EncryptDecrypt2: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_EncryptDecrypt2 +#if CC_Hash +case TPM_CC_Hash: + break; +#endif // CC_Hash +#if CC_HMAC +case TPM_CC_HMAC: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_HMAC +#if CC_MAC +case TPM_CC_MAC: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_MAC +#if CC_GetRandom +case TPM_CC_GetRandom: + break; +#endif // CC_GetRandom +#if CC_StirRandom +case TPM_CC_StirRandom: + break; +#endif // CC_StirRandom +#if CC_HMAC_Start +case TPM_CC_HMAC_Start: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_HMAC_Start +#if CC_MAC_Start +case TPM_CC_MAC_Start: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_MAC_Start +#if CC_HashSequenceStart +case TPM_CC_HashSequenceStart: + break; +#endif // CC_HashSequenceStart +#if CC_SequenceUpdate +case TPM_CC_SequenceUpdate: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_SequenceUpdate +#if CC_SequenceComplete +case TPM_CC_SequenceComplete: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_SequenceComplete +#if CC_EventSequenceComplete +case TPM_CC_EventSequenceComplete: + *handleCount = 2; + result = TPMI_DH_PCR_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_EventSequenceComplete +#if CC_Certify +case TPM_CC_Certify: + *handleCount = 2; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_Certify +#if CC_CertifyCreation +case TPM_CC_CertifyCreation: + *handleCount = 2; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_CertifyCreation +#if CC_Quote +case TPM_CC_Quote: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_Quote +#if CC_GetSessionAuditDigest +case TPM_CC_GetSessionAuditDigest: + *handleCount = 3; + result = TPMI_RH_ENDORSEMENT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + result = TPMI_SH_HMAC_Unmarshal(&handles[2], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_3; + } + break; +#endif // CC_GetSessionAuditDigest +#if CC_GetCommandAuditDigest +case TPM_CC_GetCommandAuditDigest: + *handleCount = 2; + result = TPMI_RH_ENDORSEMENT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_GetCommandAuditDigest +#if CC_GetTime +case TPM_CC_GetTime: + *handleCount = 2; + result = TPMI_RH_ENDORSEMENT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_GetTime +#if CC_CertifyX509 +case TPM_CC_CertifyX509: + *handleCount = 2; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_CertifyX509 +#if CC_Commit +case TPM_CC_Commit: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_Commit +#if CC_EC_Ephemeral +case TPM_CC_EC_Ephemeral: + break; +#endif // CC_EC_Ephemeral +#if CC_VerifySignature +case TPM_CC_VerifySignature: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_VerifySignature +#if CC_Sign +case TPM_CC_Sign: + *handleCount = 1; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_Sign +#if CC_SetCommandCodeAuditStatus +case TPM_CC_SetCommandCodeAuditStatus: + *handleCount = 1; + result = TPMI_RH_PROVISION_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_SetCommandCodeAuditStatus +#if CC_PCR_Extend +case TPM_CC_PCR_Extend: + *handleCount = 1; + result = TPMI_DH_PCR_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PCR_Extend +#if CC_PCR_Event +case TPM_CC_PCR_Event: + *handleCount = 1; + result = TPMI_DH_PCR_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PCR_Event +#if CC_PCR_Read +case TPM_CC_PCR_Read: + break; +#endif // CC_PCR_Read +#if CC_PCR_Allocate +case TPM_CC_PCR_Allocate: + *handleCount = 1; + result = TPMI_RH_PLATFORM_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PCR_Allocate +#if CC_PCR_SetAuthPolicy +case TPM_CC_PCR_SetAuthPolicy: + *handleCount = 1; + result = TPMI_RH_PLATFORM_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PCR_SetAuthPolicy +#if CC_PCR_SetAuthValue +case TPM_CC_PCR_SetAuthValue: + *handleCount = 1; + result = TPMI_DH_PCR_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PCR_SetAuthValue +#if CC_PCR_Reset +case TPM_CC_PCR_Reset: + *handleCount = 1; + result = TPMI_DH_PCR_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PCR_Reset +#if CC_PolicySigned +case TPM_CC_PolicySigned: + *handleCount = 2; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_SH_POLICY_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_PolicySigned +#if CC_PolicySecret +case TPM_CC_PolicySecret: + *handleCount = 2; + result = TPMI_DH_ENTITY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_SH_POLICY_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_PolicySecret +#if CC_PolicyTicket +case TPM_CC_PolicyTicket: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyTicket +#if CC_PolicyOR +case TPM_CC_PolicyOR: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyOR +#if CC_PolicyPCR +case TPM_CC_PolicyPCR: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyPCR +#if CC_PolicyLocality +case TPM_CC_PolicyLocality: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyLocality +#if CC_PolicyNV +case TPM_CC_PolicyNV: + *handleCount = 3; + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + result = TPMI_SH_POLICY_Unmarshal(&handles[2], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_3; + } + break; +#endif // CC_PolicyNV +#if CC_PolicyCounterTimer +case TPM_CC_PolicyCounterTimer: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyCounterTimer +#if CC_PolicyCommandCode +case TPM_CC_PolicyCommandCode: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyCommandCode +#if CC_PolicyPhysicalPresence +case TPM_CC_PolicyPhysicalPresence: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyPhysicalPresence +#if CC_PolicyCpHash +case TPM_CC_PolicyCpHash: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyCpHash +#if CC_PolicyNameHash +case TPM_CC_PolicyNameHash: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyNameHash +#if CC_PolicyDuplicationSelect +case TPM_CC_PolicyDuplicationSelect: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyDuplicationSelect +#if CC_PolicyAuthorize +case TPM_CC_PolicyAuthorize: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyAuthorize +#if CC_PolicyAuthValue +case TPM_CC_PolicyAuthValue: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyAuthValue +#if CC_PolicyPassword +case TPM_CC_PolicyPassword: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyPassword +#if CC_PolicyGetDigest +case TPM_CC_PolicyGetDigest: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyGetDigest +#if CC_PolicyNvWritten +case TPM_CC_PolicyNvWritten: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyNvWritten +#if CC_PolicyTemplate +case TPM_CC_PolicyTemplate: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyTemplate +#if CC_PolicyAuthorizeNV +case TPM_CC_PolicyAuthorizeNV: + *handleCount = 3; + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + result = TPMI_SH_POLICY_Unmarshal(&handles[2], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_3; + } + break; +#endif // CC_PolicyAuthorizeNV +#if CC_PolicyCapability +case TPM_CC_PolicyCapability: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyCapability +#if CC_PolicyParameters +case TPM_CC_PolicyParameters: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PolicyParameters +#if CC_CreatePrimary +case TPM_CC_CreatePrimary: + *handleCount = 1; + result = TPMI_RH_HIERARCHY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_CreatePrimary +#if CC_HierarchyControl +case TPM_CC_HierarchyControl: + *handleCount = 1; + result = TPMI_RH_BASE_HIERARCHY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_HierarchyControl +#if CC_SetPrimaryPolicy +case TPM_CC_SetPrimaryPolicy: + *handleCount = 1; + result = TPMI_RH_HIERARCHY_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_SetPrimaryPolicy +#if CC_ChangePPS +case TPM_CC_ChangePPS: + *handleCount = 1; + result = TPMI_RH_PLATFORM_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ChangePPS +#if CC_ChangeEPS +case TPM_CC_ChangeEPS: + *handleCount = 1; + result = TPMI_RH_PLATFORM_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ChangeEPS +#if CC_Clear +case TPM_CC_Clear: + *handleCount = 1; + result = TPMI_RH_CLEAR_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_Clear +#if CC_ClearControl +case TPM_CC_ClearControl: + *handleCount = 1; + result = TPMI_RH_CLEAR_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ClearControl +#if CC_HierarchyChangeAuth +case TPM_CC_HierarchyChangeAuth: + *handleCount = 1; + result = TPMI_RH_HIERARCHY_AUTH_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_HierarchyChangeAuth +#if CC_DictionaryAttackLockReset +case TPM_CC_DictionaryAttackLockReset: + *handleCount = 1; + result = TPMI_RH_LOCKOUT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_DictionaryAttackLockReset +#if CC_DictionaryAttackParameters +case TPM_CC_DictionaryAttackParameters: + *handleCount = 1; + result = TPMI_RH_LOCKOUT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_DictionaryAttackParameters +#if CC_PP_Commands +case TPM_CC_PP_Commands: + *handleCount = 1; + result = TPMI_RH_PLATFORM_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_PP_Commands +#if CC_SetAlgorithmSet +case TPM_CC_SetAlgorithmSet: + *handleCount = 1; + result = TPMI_RH_PLATFORM_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_SetAlgorithmSet +#if CC_FieldUpgradeStart +case TPM_CC_FieldUpgradeStart: + *handleCount = 2; + result = TPMI_RH_PLATFORM_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_FieldUpgradeStart +#if CC_FieldUpgradeData +case TPM_CC_FieldUpgradeData: + break; +#endif // CC_FieldUpgradeData +#if CC_FirmwareRead +case TPM_CC_FirmwareRead: + break; +#endif // CC_FirmwareRead +#if CC_ContextSave +case TPM_CC_ContextSave: + *handleCount = 1; + result = TPMI_DH_CONTEXT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ContextSave +#if CC_ContextLoad +case TPM_CC_ContextLoad: + break; +#endif // CC_ContextLoad +#if CC_FlushContext +case TPM_CC_FlushContext: + break; +#endif // CC_FlushContext +#if CC_EvictControl +case TPM_CC_EvictControl: + *handleCount = 2; + result = TPMI_RH_PROVISION_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_DH_OBJECT_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_EvictControl +#if CC_ReadClock +case TPM_CC_ReadClock: + break; +#endif // CC_ReadClock +#if CC_ClockSet +case TPM_CC_ClockSet: + *handleCount = 1; + result = TPMI_RH_PROVISION_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ClockSet +#if CC_ClockRateAdjust +case TPM_CC_ClockRateAdjust: + *handleCount = 1; + result = TPMI_RH_PROVISION_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ClockRateAdjust +#if CC_GetCapability +case TPM_CC_GetCapability: + break; +#endif // CC_GetCapability +#if CC_TestParms +case TPM_CC_TestParms: + break; +#endif // CC_TestParms +#if CC_NV_DefineSpace +case TPM_CC_NV_DefineSpace: + *handleCount = 1; + result = TPMI_RH_PROVISION_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_NV_DefineSpace +#if CC_NV_UndefineSpace +case TPM_CC_NV_UndefineSpace: + *handleCount = 2; + result = TPMI_RH_PROVISION_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_DEFINED_INDEX_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_NV_UndefineSpace +#if CC_NV_UndefineSpaceSpecial +case TPM_CC_NV_UndefineSpaceSpecial: + *handleCount = 2; + result = TPMI_RH_NV_DEFINED_INDEX_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_PLATFORM_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_NV_UndefineSpaceSpecial +#if CC_NV_ReadPublic +case TPM_CC_NV_ReadPublic: + *handleCount = 1; + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_NV_ReadPublic +#if CC_NV_Write +case TPM_CC_NV_Write: + *handleCount = 2; + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_NV_Write +#if CC_NV_Increment +case TPM_CC_NV_Increment: + *handleCount = 2; + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_NV_Increment +#if CC_NV_Extend +case TPM_CC_NV_Extend: + *handleCount = 2; + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_NV_Extend +#if CC_NV_SetBits +case TPM_CC_NV_SetBits: + *handleCount = 2; + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_NV_SetBits +#if CC_NV_WriteLock +case TPM_CC_NV_WriteLock: + *handleCount = 2; + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_NV_WriteLock +#if CC_NV_GlobalWriteLock +case TPM_CC_NV_GlobalWriteLock: + *handleCount = 1; + result = TPMI_RH_PROVISION_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_NV_GlobalWriteLock +#if CC_NV_Read +case TPM_CC_NV_Read: + *handleCount = 2; + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_NV_Read +#if CC_NV_ReadLock +case TPM_CC_NV_ReadLock: + *handleCount = 2; + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + break; +#endif // CC_NV_ReadLock +#if CC_NV_ChangeAuth +case TPM_CC_NV_ChangeAuth: + *handleCount = 1; + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_NV_ChangeAuth +#if CC_NV_Certify +case TPM_CC_NV_Certify: + *handleCount = 3; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[2], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_3; + } + break; +#endif // CC_NV_Certify +#if CC_NV_DefineSpace2 +case TPM_CC_NV_DefineSpace2: + *handleCount = 1; + result = TPMI_RH_PROVISION_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_NV_DefineSpace2 +#if CC_NV_ReadPublic2 +case TPM_CC_NV_ReadPublic2: + *handleCount = 1; + result = TPMI_RH_NV_INDEX_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_NV_ReadPublic2 +#if CC_SetCapability +case TPM_CC_SetCapability: + *handleCount = 1; + result = TPMI_RH_HIERARCHY_UNMARSHAL(&handles[0], handleBufferStart, + bufferRemainingSize, TRUE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_SetCapability +#if CC_AC_GetCapability +case TPM_CC_AC_GetCapability: + *handleCount = 1; + result = TPMI_RH_AC_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_AC_GetCapability +#if CC_AC_Send +case TPM_CC_AC_Send: + *handleCount = 3; + result = TPMI_DH_OBJECT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize, FALSE); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + result = TPMI_RH_NV_AUTH_Unmarshal(&handles[1], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_2; + } + result = TPMI_RH_AC_Unmarshal(&handles[2], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_3; + } + break; +#endif // CC_AC_Send +#if CC_Policy_AC_SendSelect +case TPM_CC_Policy_AC_SendSelect: + *handleCount = 1; + result = TPMI_SH_POLICY_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_Policy_AC_SendSelect +#if CC_ACT_SetTimeout +case TPM_CC_ACT_SetTimeout: + *handleCount = 1; + result = TPMI_RH_ACT_Unmarshal(&handles[0], handleBufferStart, + bufferRemainingSize); + if (TPM_RC_SUCCESS != result) + { + return result + TPM_RC_H + TPM_RC_1; + } + break; +#endif // CC_ACT_SetTimeout +#if CC_Vendor_TCG_Test +case TPM_CC_Vendor_TCG_Test: + break; +#endif // CC_Vendor_TCG_Test diff --git a/TPMCmd/tpm/include/private/HashTestData.h b/TPMCmd/tpm/include/private/HashTestData.h new file mode 100644 index 00000000..d9ec4a8e --- /dev/null +++ b/TPMCmd/tpm/include/private/HashTestData.h @@ -0,0 +1,94 @@ +// +// Hash Test Vectors +// + +TPM2B_TYPE(HASH_TEST_KEY, 128); // Twice the largest digest size +TPM2B_HASH_TEST_KEY c_hashTestKey = { + {128, + {0xa0, 0xed, 0x5c, 0x9a, 0xd2, 0x4a, 0x21, 0x40, 0x1a, 0xd0, 0x81, 0x47, 0x39, + 0x63, 0xf9, 0x50, 0xdc, 0x59, 0x47, 0x11, 0x40, 0x13, 0x99, 0x92, 0xc0, 0x72, + 0xa4, 0x0f, 0xe2, 0x33, 0xe4, 0x63, 0x9b, 0xb6, 0x76, 0xc3, 0x1e, 0x6f, 0x13, + 0xee, 0xcc, 0x99, 0x71, 0xa5, 0xc0, 0xcf, 0x9a, 0x40, 0xcf, 0xdb, 0x66, 0x70, + 0x05, 0x63, 0x54, 0x12, 0x25, 0xf4, 0xe0, 0x1b, 0x23, 0x35, 0xe3, 0x70, 0x7d, + 0x19, 0x5f, 0x00, 0xe4, 0xf1, 0x61, 0x73, 0x05, 0xd8, 0x58, 0x7f, 0x60, 0x61, + 0x84, 0x36, 0xec, 0xbe, 0x96, 0x1b, 0x69, 0x00, 0xf0, 0x9a, 0x6e, 0xe3, 0x26, + 0x73, 0x0d, 0x17, 0x5b, 0x33, 0x41, 0x44, 0x9d, 0x90, 0xab, 0xd9, 0x6b, 0x7d, + 0x48, 0x99, 0x25, 0x93, 0x29, 0x14, 0x2b, 0xce, 0x93, 0x8d, 0x8c, 0xaf, 0x31, + 0x0e, 0x9c, 0x57, 0xd8, 0x5b, 0x57, 0x20, 0x1b, 0x9f, 0x2d, 0xa5}}}; + +TPM2B_TYPE(HASH_TEST_DATA, 256); // Twice the largest block size +TPM2B_HASH_TEST_DATA c_hashTestData = { + {256, + {0x88, 0xac, 0xc3, 0xe5, 0x5f, 0x66, 0x9d, 0x18, 0x80, 0xc9, 0x7a, 0x9c, 0xa4, + 0x08, 0x90, 0x98, 0x0f, 0x3a, 0x53, 0x92, 0x4c, 0x67, 0x4e, 0xb7, 0x37, 0xec, + 0x67, 0x87, 0xb6, 0xbe, 0x10, 0xca, 0x11, 0x5b, 0x4a, 0x0b, 0x45, 0xc3, 0x32, + 0x68, 0x48, 0x69, 0xce, 0x25, 0x1b, 0xc8, 0xaf, 0x44, 0x79, 0x22, 0x83, 0xc8, + 0xfb, 0xe2, 0x63, 0x94, 0xa2, 0x3c, 0x59, 0x3e, 0x3e, 0xc6, 0x64, 0x2c, 0x1f, + 0x8c, 0x11, 0x93, 0x24, 0xa3, 0x17, 0xc5, 0x2f, 0x37, 0xcf, 0x95, 0x97, 0x8e, + 0x63, 0x39, 0x68, 0xd5, 0xca, 0xba, 0x18, 0x37, 0x69, 0x6e, 0x4f, 0x19, 0xfd, + 0x8a, 0xc0, 0x8d, 0x87, 0x3a, 0xbc, 0x31, 0x42, 0x04, 0x05, 0xef, 0xb5, 0x02, + 0xef, 0x1e, 0x92, 0x4b, 0xb7, 0x73, 0x2c, 0x8c, 0xeb, 0x23, 0x13, 0x81, 0x34, + 0xb9, 0xb5, 0xc1, 0x17, 0x37, 0x39, 0xf8, 0x3e, 0xe4, 0x4c, 0x06, 0xa8, 0x81, + 0x52, 0x2f, 0xef, 0xc9, 0x9c, 0x69, 0x89, 0xbc, 0x85, 0x9c, 0x30, 0x16, 0x02, + 0xca, 0xe3, 0x61, 0xd4, 0x0f, 0xed, 0x34, 0x1b, 0xca, 0xc1, 0x1b, 0xd1, 0xfa, + 0xc1, 0xa2, 0xe0, 0xdf, 0x52, 0x2f, 0x0b, 0x4b, 0x9f, 0x0e, 0x45, 0x54, 0xb9, + 0x17, 0xb6, 0xaf, 0xd6, 0xd5, 0xca, 0x90, 0x29, 0x57, 0x7b, 0x70, 0x50, 0x94, + 0x5c, 0x8e, 0xf6, 0x4e, 0x21, 0x8b, 0xc6, 0x8b, 0xa6, 0xbc, 0xb9, 0x64, 0xd4, + 0x4d, 0xf3, 0x68, 0xd8, 0xac, 0xde, 0xd8, 0xd8, 0xb5, 0x6d, 0xcd, 0x93, 0xeb, + 0x28, 0xa4, 0xe2, 0x5c, 0x44, 0xef, 0xf0, 0xe1, 0x6f, 0x38, 0x1a, 0x3c, 0xe6, + 0xef, 0xa2, 0x9d, 0xb9, 0xa8, 0x05, 0x2a, 0x95, 0xec, 0x5f, 0xdb, 0xb0, 0x25, + 0x67, 0x9c, 0x86, 0x7a, 0x8e, 0xea, 0x51, 0xcc, 0xc3, 0xd3, 0xff, 0x6e, 0xf0, + 0xed, 0xa3, 0xae, 0xf9, 0x5d, 0x33, 0x70, 0xf2, 0x11}}}; + +#if ALG_SHA1 == YES +TPM2B_TYPE(SHA1, 20); +TPM2B_SHA1 c_SHA1_digest = { + {20, {0xee, 0x2c, 0xef, 0x93, 0x76, 0xbd, 0xf8, 0x91, 0xbc, 0xe6, + 0xe5, 0x57, 0x53, 0x77, 0x01, 0xb5, 0x70, 0x95, 0xe5, 0x40}}}; +#endif + +#if ALG_SHA256 == YES +TPM2B_TYPE(SHA256, 32); +TPM2B_SHA256 c_SHA256_digest = { + {32, {0x64, 0xe8, 0xe0, 0xc3, 0xa9, 0xa4, 0x51, 0x49, 0x10, 0x55, 0x8d, + 0x31, 0x71, 0xe5, 0x2f, 0x69, 0x3a, 0xdc, 0xc7, 0x11, 0x32, 0x44, + 0x61, 0xbd, 0x34, 0x39, 0x57, 0xb0, 0xa8, 0x75, 0x86, 0x1b}}}; +#endif + +#if ALG_SHA384 == YES +TPM2B_TYPE(SHA384, 48); +TPM2B_SHA384 c_SHA384_digest = { + {48, {0x37, 0x75, 0x29, 0xb5, 0x20, 0x15, 0x6e, 0xa3, 0x7e, 0xa3, 0x0d, 0xcd, + 0x80, 0xa8, 0xa3, 0x3d, 0xeb, 0xe8, 0xad, 0x4e, 0x1c, 0x77, 0x94, 0x5a, + 0xaf, 0x6c, 0xd0, 0xc1, 0xfa, 0x43, 0x3f, 0xc7, 0xb8, 0xf1, 0x01, 0xc0, + 0x60, 0xbf, 0xf2, 0x87, 0xe8, 0x71, 0x9e, 0x51, 0x97, 0xa0, 0x09, 0x8d}}}; +#endif + +#if ALG_SHA512 == YES +TPM2B_TYPE(SHA512, 64); +TPM2B_SHA512 c_SHA512_digest = { + {64, + {0xe2, 0x7b, 0x10, 0x3d, 0x5e, 0x48, 0x58, 0x44, 0x67, 0xac, 0xa3, 0x81, 0x8c, + 0x1d, 0xc5, 0x71, 0x66, 0x92, 0x8a, 0x89, 0xaa, 0xd4, 0x35, 0x51, 0x60, 0x37, + 0x31, 0xd7, 0xba, 0xe7, 0x93, 0x0b, 0x16, 0x4d, 0xb3, 0xc8, 0x34, 0x98, 0x3c, + 0xd3, 0x53, 0xde, 0x5e, 0xe8, 0x0c, 0xbc, 0xaf, 0xc9, 0x24, 0x2c, 0xcc, 0xed, + 0xdb, 0xde, 0xba, 0x1f, 0x14, 0x14, 0x5a, 0x95, 0x80, 0xde, 0x66, 0xbd}}}; +#endif + +TPM2B_TYPE(EMPTY, 1); + +#if ALG_SM3_256 == YES +TPM2B_EMPTY c_SM3_256_digest = {{0, {0}}}; +#endif + +#if ALG_SHA3_256 == YES +TPM2B_EMPTY c_SHA3_256_digest = {{0, {0}}}; +#endif + +#if ALG_SHA3_384 == YES +TPM2B_EMPTY c_SHA3_384_digest = {{0, {0}}}; +#endif + +#if ALG_SHA3_512 == YES +TPM2B_EMPTY c_SHA3_512_digest = {{0, {0}}}; +#endif diff --git a/TPMCmd/tpm/include/private/InternalRoutines.h b/TPMCmd/tpm/include/private/InternalRoutines.h new file mode 100644 index 00000000..7e76ff52 --- /dev/null +++ b/TPMCmd/tpm/include/private/InternalRoutines.h @@ -0,0 +1,97 @@ +#ifndef INTERNAL_ROUTINES_H +#define INTERNAL_ROUTINES_H + +#if !defined _LIB_SUPPORT_H_ && !defined _TPM_H_ +# error "Should not be called" +#endif + +// DRTM functions +// TODO_RENAME_INC_FOLDER:platform_interface refers to the TPM_CoreLib platform interface +#include +#include +#include + +// Internal subsystem functions +#include "Object_fp.h" +#include "Context_spt_fp.h" +#include "Object_spt_fp.h" +#include "Entity_fp.h" +#include "Session_fp.h" +#include "Hierarchy_fp.h" +#include "NvReserved_fp.h" +#include "NvDynamic_fp.h" +#include "NV_spt_fp.h" +#include "ACT_spt_fp.h" +#include "PCR_fp.h" +#include "DA_fp.h" +// TODO_RENAME_INC_FOLDER: public refers to the TPM_CoreLib public headers +#include +#include "SessionProcess_fp.h" + +// Internal support functions +#include "CommandCodeAttributes_fp.h" +#include "Marshal.h" +#include "Time_fp.h" +#include "Locality_fp.h" +#include "PP_fp.h" +#include "CommandAudit_fp.h" +// TODO_RENAME_INC_FOLDER:platform_interface refers to the TPM_CoreLib platform interface +#include +#include "Handle_fp.h" +#include "Power_fp.h" +#include "Response_fp.h" +#include "CommandDispatcher_fp.h" + +#ifdef CC_AC_Send +# include "AC_spt_fp.h" +#endif // CC_AC_Send + +// Miscellaneous +#include "Bits_fp.h" +#include "AlgorithmCap_fp.h" +#include "PropertyCap_fp.h" +#include "IoBuffers_fp.h" +#include "Memory_fp.h" +#include "ResponseCodeProcessing_fp.h" + +// Asymmetric Support library Interface +// TODO_RENAME_INC_FOLDER: needs a component prefix +// Math interface must be included before other Crypt headers to define types +#include + +// Internal cryptographic functions +#include "Ticket_fp.h" +#include "CryptUtil_fp.h" +#include "CryptHash_fp.h" +#include "CryptSym_fp.h" +#include "CryptPrime_fp.h" +#include "CryptRand_fp.h" +#include "CryptSelfTest_fp.h" +#include "MathOnByteBuffers_fp.h" +#include "CryptSym_fp.h" +#include "AlgorithmTests_fp.h" + +#if ALG_RSA +# include "CryptRsa_fp.h" +# include "CryptPrimeSieve_fp.h" +#endif + +#if ALG_ECC +# include "CryptEccMain_fp.h" +# include "CryptEccSignature_fp.h" +# include "CryptEccKeyExchange_fp.h" +# include "CryptEccCrypt_fp.h" +#endif + +#if CC_MAC || CC_MAC_Start +# include "CryptSmac_fp.h" +# if ALG_CMAC +# include "CryptCmac_fp.h" +# endif +#endif + +// Linkage to platform functions +// TODO_RENAME_INC_FOLDER:platform_interface refers to the TPM_CoreLib platform interface +#include + +#endif diff --git a/TPMCmd/tpm/include/private/KdfTestData.h b/TPMCmd/tpm/include/private/KdfTestData.h new file mode 100644 index 00000000..775c2161 --- /dev/null +++ b/TPMCmd/tpm/include/private/KdfTestData.h @@ -0,0 +1,64 @@ + +// +// Hash Test Vectors +// + +#define TEST_KDF_KEY_SIZE 20 + +TPM2B_TYPE(KDF_TEST_KEY, TEST_KDF_KEY_SIZE); +TPM2B_KDF_TEST_KEY c_kdfTestKeyIn = { + {TEST_KDF_KEY_SIZE, + {0x27, 0x1F, 0xA0, 0x8B, 0xBD, 0xC5, 0x06, 0x0E, 0xC3, 0xDF, + 0xA9, 0x28, 0xFF, 0x9B, 0x73, 0x12, 0x3A, 0x12, 0xDA, 0x0C}}}; + +TPM2B_TYPE(KDF_TEST_LABEL, 17); +TPM2B_KDF_TEST_LABEL c_kdfTestLabel = {{17, + {0x4B, + 0x44, + 0x46, + 0x53, + 0x45, + 0x4C, + 0x46, + 0x54, + 0x45, + 0x53, + 0x54, + 0x4C, + 0x41, + 0x42, + 0x45, + 0x4C, + 0x00}}}; + +TPM2B_TYPE(KDF_TEST_CONTEXT, 8); +TPM2B_KDF_TEST_CONTEXT c_kdfTestContextU = { + {8, {0xCE, 0x24, 0x4F, 0x39, 0x5D, 0xCA, 0x73, 0x91}}}; + +TPM2B_KDF_TEST_CONTEXT c_kdfTestContextV = { + {8, {0xDA, 0x50, 0x40, 0x31, 0xDD, 0xF1, 0x2E, 0x83}}}; + +#if ALG_SHA512 == ALG_YES +TPM2B_KDF_TEST_KEY c_kdfTestKeyOut = { + {20, {0x8b, 0xe2, 0xc1, 0xb8, 0x5b, 0x78, 0x56, 0x9b, 0x9f, 0xa7, + 0x59, 0xf5, 0x85, 0x7c, 0x56, 0xd6, 0x84, 0x81, 0x0f, 0xd3}}}; +# define KDF_TEST_ALG TPM_ALG_SHA512 + +#elif ALG_SHA384 == ALG_YES +TPM2B_KDF_TEST_KEY c_kdfTestKeyOut = { + {20, {0x1d, 0xce, 0x70, 0xc9, 0x11, 0x3e, 0xb2, 0xdb, 0xa4, 0x7b, + 0xd9, 0xcf, 0xc7, 0x2b, 0xf4, 0x6f, 0x45, 0xb0, 0x93, 0x12}}}; +# define KDF_TEST_ALG TPM_ALG_SHA384 + +#elif ALG_SHA256 == ALG_YES +TPM2B_KDF_TEST_KEY c_kdfTestKeyOut = { + {20, {0xbb, 0x02, 0x59, 0xe1, 0xc8, 0xba, 0x60, 0x7e, 0x6a, 0x2c, + 0xd7, 0x04, 0xb6, 0x9a, 0x90, 0x2e, 0x9a, 0xde, 0x84, 0xc4}}}; +# define KDF_TEST_ALG TPM_ALG_SHA256 + +#elif ALG_SHA1 == ALG_YES +TPM2B_KDF_TEST_KEY c_kdfTestKeyOut = { + {20, {0x55, 0xb5, 0xa7, 0x18, 0x4a, 0xa0, 0x74, 0x23, 0xc4, 0x7d, + 0xae, 0x76, 0x6c, 0x26, 0xa2, 0x37, 0x7d, 0x7c, 0xf8, 0x51}}}; +# define KDF_TEST_ALG TPM_ALG_SHA1 +#endif diff --git a/TPMCmd/tpm/include/private/LibSupport.h b/TPMCmd/tpm/include/private/LibSupport.h new file mode 100644 index 00000000..ff40c64c --- /dev/null +++ b/TPMCmd/tpm/include/private/LibSupport.h @@ -0,0 +1,24 @@ +// This header file is used to select the library code that gets included in the +// TPM build. + +#ifndef _LIB_SUPPORT_H_ +#define _LIB_SUPPORT_H_ +// TODO_RENAME_INC_FOLDER: public refers to the TPM_CoreLib public headers +#include + +// Include the options for hashing and symmetric. Defer the load of the math package +// Until the bignum parameters are defined. +#ifndef SYM_LIB +# error SYM_LIB required +#endif +#ifndef HASH_LIB +# error HASH_LIB required +#endif + +#include LIB_INCLUDE(TpmTo, SYM_LIB, Sym) +#include LIB_INCLUDE(TpmTo, HASH_LIB, Hash) + +//TODO: was #undef MIN +//was #undef MAX + +#endif // _LIB_SUPPORT_H_ diff --git a/TPMCmd/tpm/include/private/Marshal.h b/TPMCmd/tpm/include/private/Marshal.h new file mode 100644 index 00000000..a785c5cb --- /dev/null +++ b/TPMCmd/tpm/include/private/Marshal.h @@ -0,0 +1,19 @@ + +//** Introduction +// This file is used to provide the things needed by a module that uses the marshaling +// functions. It handles the variations between the marshaling choices (procedural or +// table-driven). + +#if TABLE_DRIVEN_MARSHAL + +# include "TableMarshalTypes.h" + +# include "TableMarshalDefines.h" + +# include "TableDrivenMarshal_fp.h" + +#else + +# include "Marshal_fp.h" + +#endif diff --git a/TPMCmd/tpm/include/private/NV.h b/TPMCmd/tpm/include/private/NV.h new file mode 100644 index 00000000..3b71f076 --- /dev/null +++ b/TPMCmd/tpm/include/private/NV.h @@ -0,0 +1,116 @@ +//** Index Type Definitions + +// These definitions allow the same code to be used pre and post 1.21. The main +// action is to redefine the index type values from the bit values. +// Use TPM_NT_ORDINARY to indicate if the TPM_NT type is defined + +#ifndef _NV_H_ +#define _NV_H_ + +#ifdef TPM_NT_ORDINARY +// If TPM_NT_ORDINARY is defined, then the TPM_NT field is present in a TPMA_NV +# define GET_TPM_NT(attributes) GET_ATTRIBUTE(attributes, TPMA_NV, TPM_NT) +#else +// If TPM_NT_ORDINARY is not defined, then need to synthesize it from the +// attributes +# define GetNv_TPM_NV(attributes) \ + (IS_ATTRIBUTE(attributes, TPMA_NV, COUNTER) \ + + (IS_ATTRIBUTE(attributes, TPMA_NV, BITS) << 1) \ + + (IS_ATTRIBUTE(attributes, TPMA_NV, EXTEND) << 2)) +# define TPM_NT_ORDINARY (0) +# define TPM_NT_COUNTER (1) +# define TPM_NT_BITS (2) +# define TPM_NT_EXTEND (4) +#endif + +//** Attribute Macros +// These macros are used to isolate the differences in the way that the index type +// changed in version 1.21 of the specification +#define IsNvOrdinaryIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_ORDINARY) + +#define IsNvCounterIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_COUNTER) + +#define IsNvBitsIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_BITS) + +#define IsNvExtendIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_EXTEND) + +#ifdef TPM_NT_PIN_PASS +# define IsNvPinPassIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_PIN_PASS) +#endif + +#ifdef TPM_NT_PIN_FAIL +# define IsNvPinFailIndex(attributes) (GET_TPM_NT(attributes) == TPM_NT_PIN_FAIL) +#endif + +typedef struct +{ + UINT32 size; + TPM_HANDLE handle; +} NV_ENTRY_HEADER; + +#define NV_EVICT_OBJECT_SIZE (sizeof(UINT32) + sizeof(TPM_HANDLE) + sizeof(OBJECT)) + +#define NV_INDEX_COUNTER_SIZE (sizeof(UINT32) + sizeof(NV_INDEX) + sizeof(UINT64)) + +#define NV_RAM_INDEX_COUNTER_SIZE (sizeof(NV_RAM_HEADER) + sizeof(UINT64)) + +typedef struct +{ + UINT32 size; + TPM_HANDLE handle; + TPMA_NV attributes; +} NV_RAM_HEADER; + +// Defines the end-of-list marker for NV. The list terminator is +// a UINT32 of zero, followed by the current value of s_maxCounter which is a +// 64-bit value. The structure is defined as an array of 3 UINT32 values so that +// there is no padding between the UINT32 list end marker and the UINT64 maxCounter +// value. +typedef UINT32 NV_LIST_TERMINATOR[3]; + +//** Orderly RAM Values +// The following defines are for accessing orderly RAM values. + +// This is the initialize for the RAM reference iterator. +#define NV_RAM_REF_INIT 0 +// This is the starting address of the RAM space used for orderly data +#define RAM_ORDERLY_START (&s_indexOrderlyRam[0]) +// This is the offset within NV that is used to save the orderly data on an +// orderly shutdown. +#define NV_ORDERLY_START (NV_INDEX_RAM_DATA) +// This is the end of the orderly RAM space. It is actually the first byte after the +// last byte of orderly RAM data +#define RAM_ORDERLY_END (RAM_ORDERLY_START + sizeof(s_indexOrderlyRam)) +// This is the end of the orderly space in NV memory. As with RAM_ORDERLY_END, it is +// actually the offset of the first byte after the end of the NV orderly data. +#define NV_ORDERLY_END (NV_ORDERLY_START + sizeof(s_indexOrderlyRam)) + +// Macro to check that an orderly RAM address is with range. +#define ORDERLY_RAM_ADDRESS_OK(start, offset) \ + ((start >= RAM_ORDERLY_START) && ((start + offset - 1) < RAM_ORDERLY_END)) + +#define RETURN_IF_NV_IS_NOT_AVAILABLE \ + { \ + if(g_NvStatus != TPM_RC_SUCCESS) \ + return g_NvStatus; \ + } + +// Routinely have to clear the orderly flag and fail if the +// NV is not available so that it can be cleared. +#define RETURN_IF_ORDERLY \ + { \ + if(NvClearOrderly() != TPM_RC_SUCCESS) \ + return g_NvStatus; \ + } + +#define NV_IS_AVAILABLE (g_NvStatus == TPM_RC_SUCCESS) + +#define IS_ORDERLY(value) (value < SU_DA_USED_VALUE) + +#define NV_IS_ORDERLY (IS_ORDERLY(gp.orderlyState)) + +// Macro to set the NV UPDATE_TYPE. This deals with the fact that the update is +// possibly a combination of UT_NV and UT_ORDERLY. +#define SET_NV_UPDATE(type) g_updateNV |= (type) + +#endif // _NV_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/OIDs.h b/TPMCmd/tpm/include/private/OIDs.h new file mode 100644 index 00000000..072de17b --- /dev/null +++ b/TPMCmd/tpm/include/private/OIDs.h @@ -0,0 +1,253 @@ + +#ifndef _OIDS_H_ +#define _OIDS_H_ + +// All the OIDs in this file are defined as DER-encoded values with a leading tag +// 0x06 (ASN1_OBJECT_IDENTIFIER), followed by a single length byte. This allows the +// OID size to be determined by looking at octet[1] of the OID (total size is +// OID[1] + 2). + +// These macros allow OIDs to be defined (or not) depending on whether the associated +// hash algorithm is implemented. +// NOTE: When one of these macros is used, the NAME needs '_" on each side. The +// exception is when the macro is used for the hash OID when only a single '_' is +// used. +#ifndef ALG_SHA1 +# define ALG_SHA1 NO +#endif +#if ALG_SHA1 +# define SHA1_OID(NAME) MAKE_OID(NAME##SHA1) +#else +# define SHA1_OID(NAME) +#endif +#ifndef ALG_SHA256 +# define ALG_SHA256 NO +#endif +#if ALG_SHA256 +# define SHA256_OID(NAME) MAKE_OID(NAME##SHA256) +#else +# define SHA256_OID(NAME) +#endif +#ifndef ALG_SHA384 +# define ALG_SHA384 NO +#endif +#if ALG_SHA384 +# define SHA384_OID(NAME) MAKE_OID(NAME##SHA384) +#else +# define SHA384_OID(NAME) +#endif +#ifndef ALG_SHA512 +# define ALG_SHA512 NO +#endif +#if ALG_SHA512 +# define SHA512_OID(NAME) MAKE_OID(NAME##SHA512) +#else +# define SHA512_OID(NAME) +#endif +#ifndef ALG_SM3_256 +# define ALG_SM3_256 NO +#endif +#if ALG_SM3_256 +# define SM3_256_OID(NAME) MAKE_OID(NAME##SM3_256) +#else +# define SM3_256_OID(NAME) +#endif +#ifndef ALG_SHA3_256 +# define ALG_SHA3_256 NO +#endif +#if ALG_SHA3_256 +# define SHA3_256_OID(NAME) MAKE_OID(NAME##SHA3_256) +#else +# define SHA3_256_OID(NAME) +#endif +#ifndef ALG_SHA3_384 +# define ALG_SHA3_384 NO +#endif +#if ALG_SHA3_384 +# define SHA3_384_OID(NAME) MAKE_OID(NAME##SHA3_384) +#else +# define SHA3_384_OID(NAME) +#endif +#ifndef ALG_SHA3_512 +# define ALG_SHA3_512 NO +#endif +#if ALG_SHA3_512 +# define SHA3_512_OID(NAME) MAKE_OID(NAME##SHA3_512) +#else +# define SHA3_512_OID(NAME) +#endif + +// These are encoded to take one additional byte of algorithm selector +#define NIST_HASH 0x06, 0x09, 0x60, 0x86, 0x48, 1, 101, 3, 4, 2 +#define NIST_SIG 0x06, 0x09, 0x60, 0x86, 0x48, 1, 101, 3, 4, 3 + +// These hash OIDs used in a lot of places. +#define OID_SHA1_VALUE 0x06, 0x05, 0x2B, 0x0E, 0x03, 0x02, 0x1A +SHA1_OID(_); // Expands to: + // MAKE_OID(_SHA1) + // which expands to: + // EXTERN const BYTE OID_SHA1[] INITIALIZER({OID_SHA1_VALUE}) + // which, depending on the setting of EXTERN and + // INITIALIZER, expands to either: + // extern const BYTE OID_SHA1[] + // or + // const BYTE OID_SHA1[] = {OID_SHA1_VALUE} + // which is: + // const BYTE OID_SHA1[] = {0x06, 0x05, 0x2B, 0x0E, + // 0x03, 0x02, 0x1A} + +#define OID_SHA256_VALUE NIST_HASH, 1 +SHA256_OID(_); + +#define OID_SHA384_VALUE NIST_HASH, 2 +SHA384_OID(_); + +#define OID_SHA512_VALUE NIST_HASH, 3 +SHA512_OID(_); + +#define OID_SM3_256_VALUE 0x06, 0x08, 0x2A, 0x81, 0x1C, 0xCF, 0x55, 0x01, 0x83, 0x11 +SM3_256_OID(_); // (1.2.156.10197.1.401) + +#define OID_SHA3_256_VALUE NIST_HASH, 8 +SHA3_256_OID(_); + +#define OID_SHA3_384_VALUE NIST_HASH, 9 +SHA3_384_OID(_); + +#define OID_SHA3_512_VALUE NIST_HASH, 10 +SHA3_512_OID(_); + +// These are used for RSA-PSS +#if ALG_RSA + +# define OID_MGF1_VALUE \ + 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x08 +MAKE_OID(_MGF1); + +# define OID_RSAPSS_VALUE \ + 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x0A +MAKE_OID(_RSAPSS); + +// This is the OID to designate the public part of an RSA key. +# define OID_PKCS1_PUB_VALUE \ + 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x01 +MAKE_OID(_PKCS1_PUB); + +// These are used for RSA PKCS1 signature Algorithms +# define OID_PKCS1_SHA1_VALUE \ + 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x05 +SHA1_OID(_PKCS1_); // (1.2.840.113549.1.1.5) + +# define OID_PKCS1_SHA256_VALUE \ + 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x0B +SHA256_OID(_PKCS1_); // (1.2.840.113549.1.1.11) + +# define OID_PKCS1_SHA384_VALUE \ + 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x0C +SHA384_OID(_PKCS1_); // (1.2.840.113549.1.1.12) + +# define OID_PKCS1_SHA512_VALUE \ + 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x0D +SHA512_OID(_PKCS1_); //(1.2.840.113549.1.1.13) + +# define OID_PKCS1_SM3_256_VALUE \ + 0x06, 0x08, 0x2A, 0x81, 0x1C, 0xCF, 0x55, 0x01, 0x83, 0x78 +SM3_256_OID(_PKCS1_); // 1.2.156.10197.1.504 + +# define OID_PKCS1_SHA3_256_VALUE NIST_SIG, 14 +SHA3_256_OID(_PKCS1_); +# define OID_PKCS1_SHA3_384_VALUE NIST_SIG, 15 +SHA3_384_OID(_PKCS1_); +# define OID_PKCS1_SHA3_512_VALUE NIST_SIG, 16 +SHA3_512_OID(_PKCS1_); + +#endif // ALG_RSA + +#if ALG_ECDSA + +# define OID_ECDSA_SHA1_VALUE 0x06, 0x07, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x04, 0x01 +SHA1_OID(_ECDSA_); // (1.2.840.10045.4.1) SHA1 digest signed by an ECDSA key. + +# define OID_ECDSA_SHA256_VALUE \ + 0x06, 0x08, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x04, 0x03, 0x02 +SHA256_OID(_ECDSA_); // (1.2.840.10045.4.3.2) SHA256 digest signed by an ECDSA key. + +# define OID_ECDSA_SHA384_VALUE \ + 0x06, 0x08, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x04, 0x03, 0x03 +SHA384_OID(_ECDSA_); // (1.2.840.10045.4.3.3) SHA384 digest signed by an ECDSA key. + +# define OID_ECDSA_SHA512_VALUE \ + 0x06, 0x08, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x04, 0x03, 0x04 +SHA512_OID(_ECDSA_); // (1.2.840.10045.4.3.4) SHA512 digest signed by an ECDSA key. + +# define OID_ECDSA_SM3_256_VALUE \ + 0x06, 0x08, 0x2A, 0x81, 0x1C, 0xCF, 0x55, 0x01, 0x83, 0x75 +SM3_256_OID(_ECDSA_); // 1.2.156.10197.1.501 + +# define OID_ECDSA_SHA3_256_VALUE NIST_SIG, 10 +SHA3_256_OID(_ECDSA_); +# define OID_ECDSA_SHA3_384_VALUE NIST_SIG, 11 +SHA3_384_OID(_ECDSA_); +# define OID_ECDSA_SHA3_512_VALUE NIST_SIG, 12 +SHA3_512_OID(_ECDSA_); + +#endif // ALG_ECDSA + +#if ALG_ECC + +# define OID_ECC_PUBLIC_VALUE 0x06, 0x07, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x02, 0x01 +MAKE_OID(_ECC_PUBLIC); + +# define OID_ECC_NIST_P192_VALUE \ + 0x06, 0x08, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x03, 0x01, 0x01 +# if ECC_NIST_P192 +MAKE_OID(_ECC_NIST_P192); // (1.2.840.10045.3.1.1) 'nistP192' +# endif // ECC_NIST_P192 + +# define OID_ECC_NIST_P224_VALUE 0x06, 0x05, 0x2B, 0x81, 0x04, 0x00, 0x21 +# if ECC_NIST_P224 +MAKE_OID(_ECC_NIST_P224); // (1.3.132.0.33) 'nistP224' +# endif // ECC_NIST_P224 + +# define OID_ECC_NIST_P256_VALUE \ + 0x06, 0x08, 0x2A, 0x86, 0x48, 0xCE, 0x3D, 0x03, 0x01, 0x07 +# if ECC_NIST_P256 +MAKE_OID(_ECC_NIST_P256); // (1.2.840.10045.3.1.7) 'nistP256' +# endif // ECC_NIST_P256 + +# define OID_ECC_NIST_P384_VALUE 0x06, 0x05, 0x2B, 0x81, 0x04, 0x00, 0x22 +# if ECC_NIST_P384 +MAKE_OID(_ECC_NIST_P384); // (1.3.132.0.34) 'nistP384' +# endif // ECC_NIST_P384 + +# define OID_ECC_NIST_P521_VALUE 0x06, 0x05, 0x2B, 0x81, 0x04, 0x00, 0x23 +# if ECC_NIST_P521 +MAKE_OID(_ECC_NIST_P521); // (1.3.132.0.35) 'nistP521' +# endif // ECC_NIST_P521 + +// No OIDs defined for these anonymous curves +# define OID_ECC_BN_P256_VALUE 0x00 +# if ECC_BN_P256 +MAKE_OID(_ECC_BN_P256); +# endif // ECC_BN_P256 + +# define OID_ECC_BN_P638_VALUE 0x00 +# if ECC_BN_P638 +MAKE_OID(_ECC_BN_P638); +# endif // ECC_BN_P638 + +# define OID_ECC_SM2_P256_VALUE \ + 0x06, 0x08, 0x2A, 0x81, 0x1C, 0xCF, 0x55, 0x01, 0x82, 0x2D +# if ECC_SM2_P256 +MAKE_OID(_ECC_SM2_P256); // Don't know where I found this OID. It needs checking +# endif // ECC_SM2_P256 + +# if ECC_BN_P256 +# define OID_ECC_BN_P256 NULL +# endif // ECC_BN_P256 + +#endif // ALG_ECC + +#define OID_SIZE(OID) (OID[1] + 2) + +#endif // !_OIDS_H_ diff --git a/TPMCmd/tpm/include/private/PRNG_TestVectors.h b/TPMCmd/tpm/include/private/PRNG_TestVectors.h new file mode 100644 index 00000000..88730ed3 --- /dev/null +++ b/TPMCmd/tpm/include/private/PRNG_TestVectors.h @@ -0,0 +1,97 @@ +#ifndef _MSBN_DRBG_TEST_VECTORS_H +#define _MSBN_DRBG_TEST_VECTORS_H + +//#if DRBG_ALGORITHM == TPM_ALG_AES && DRBG_KEY_BITS == 256 +#if DRBG_KEY_SIZE_BITS == 256 + +/*(NIST test vector) +[AES-256 no df] +[PredictionResistance = False] +[EntropyInputLen = 384] +[NonceLen = 128] +[PersonalizationStringLen = 0] +[AdditionalInputLen = 0] + +COUNT = 0 +EntropyInput = 0d15aa80 b16c3a10 906cfedb 795dae0b 5b81041c 5c5bfacb + 373d4440 d9120f7e 3d6cf909 86cf52d8 5d3e947d 8c061f91 +Nonce = 06caef5f b538e08e 1f3b0452 03f8f4b2 +PersonalizationString = +AdditionalInput = + INTERMEDIATE Key = be5df629 34cc1230 166a6773 345bbd6b + 4c8869cf 8aec1c3b 1aa98bca 37cacf61 + INTERMEDIATE V = 3182dd1e 7638ec70 014e93bd 813e524c + INTERMEDIATE ReturnedBits = 28e0ebb8 21016650 8c8f65f2 207bd0a3 +EntropyInputReseed = 6ee793a3 3955d72a d12fd80a 8a3fcf95 ed3b4dac 5795fe25 + cf869f7c 27573bbc 56f1acae 13a65042 b340093c 464a7a22 +AdditionalInputReseed = +AdditionalInput = +ReturnedBits = 946f5182 d54510b9 461248f5 71ca06c9 +*/ + +// Entropy is the size of the state. The state is the size of the key +// plus the IV. The IV is a block. If Key = 256 and Block = 128 then State = 384 +# define DRBG_TEST_INITIATE_ENTROPY \ + 0x0d, 0x15, 0xaa, 0x80, 0xb1, 0x6c, 0x3a, 0x10, 0x90, 0x6c, 0xfe, 0xdb, 0x79, \ + 0x5d, 0xae, 0x0b, 0x5b, 0x81, 0x04, 0x1c, 0x5c, 0x5b, 0xfa, 0xcb, 0x37, \ + 0x3d, 0x44, 0x40, 0xd9, 0x12, 0x0f, 0x7e, 0x3d, 0x6c, 0xf9, 0x09, 0x86, \ + 0xcf, 0x52, 0xd8, 0x5d, 0x3e, 0x94, 0x7d, 0x8c, 0x06, 0x1f, 0x91 + +# define DRBG_TEST_RESEED_ENTROPY \ + 0x6e, 0xe7, 0x93, 0xa3, 0x39, 0x55, 0xd7, 0x2a, 0xd1, 0x2f, 0xd8, 0x0a, 0x8a, \ + 0x3f, 0xcf, 0x95, 0xed, 0x3b, 0x4d, 0xac, 0x57, 0x95, 0xfe, 0x25, 0xcf, \ + 0x86, 0x9f, 0x7c, 0x27, 0x57, 0x3b, 0xbc, 0x56, 0xf1, 0xac, 0xae, 0x13, \ + 0xa6, 0x50, 0x42, 0xb3, 0x40, 0x09, 0x3c, 0x46, 0x4a, 0x7a, 0x22 + +# define DRBG_TEST_GENERATED_INTERM \ + 0x28, 0xe0, 0xeb, 0xb8, 0x21, 0x01, 0x66, 0x50, 0x8c, 0x8f, 0x65, 0xf2, 0x20, \ + 0x7b, 0xd0, 0xa3 + +# define DRBG_TEST_GENERATED \ + 0x94, 0x6f, 0x51, 0x82, 0xd5, 0x45, 0x10, 0xb9, 0x46, 0x12, 0x48, 0xf5, 0x71, \ + 0xca, 0x06, 0xc9 +#elif DRBG_KEY_SIZE_BITS == 128 +/*(NIST test vector) +[AES-128 no df] +[PredictionResistance = False] +[EntropyInputLen = 256] +[NonceLen = 64] +[PersonalizationStringLen = 0] +[AdditionalInputLen = 0] + +COUNT = 0 +EntropyInput = 8fc11bdb5aabb7e093b61428e0907303cb459f3b600dad870955f22da80a44f8 +Nonce = be1f73885ddd15aa +PersonalizationString = +AdditionalInput = + INTERMEDIATE Key = b134ecc836df6dbd624900af118dd7e6 + INTERMEDIATE V = 01bb09e86dabd75c9f26dbf6f9531368 + INTERMEDIATE ReturnedBits = dc3cf6bf5bd341135f2c6811a1071c87 +EntropyInputReseed = + 0cd53cd5eccd5a10d7ea266111259b05574fc6ddd8bed8bd72378cf82f1dba2a +AdditionalInputReseed = +AdditionalInput = +ReturnedBits = b61850decfd7106d44769a8e6e8c1ad4 +*/ + +# define DRBG_TEST_INITIATE_ENTROPY \ + 0x8f, 0xc1, 0x1b, 0xdb, 0x5a, 0xab, 0xb7, 0xe0, 0x93, 0xb6, 0x14, 0x28, 0xe0, \ + 0x90, 0x73, 0x03, 0xcb, 0x45, 0x9f, 0x3b, 0x60, 0x0d, 0xad, 0x87, 0x09, \ + 0x55, 0xf2, 0x2d, 0xa8, 0x0a, 0x44, 0xf8 + +# define DRBG_TEST_RESEED_ENTROPY \ + 0x0c, 0xd5, 0x3c, 0xd5, 0xec, 0xcd, 0x5a, 0x10, 0xd7, 0xea, 0x26, 0x61, 0x11, \ + 0x25, 0x9b, 0x05, 0x57, 0x4f, 0xc6, 0xdd, 0xd8, 0xbe, 0xd8, 0xbd, 0x72, \ + 0x37, 0x8c, 0xf8, 0x2f, 0x1d, 0xba, 0x2a + +# define DRBG_TEST_GENERATED_INTERM \ + 0xdc, 0x3c, 0xf6, 0xbf, 0x5b, 0xd3, 0x41, 0x13, 0x5f, 0x2c, 0x68, 0x11, 0xa1, \ + 0x07, 0x1c, 0x87 + +# define DRBG_TEST_GENERATED \ + 0xb6, 0x18, 0x50, 0xde, 0xcf, 0xd7, 0x10, 0x6d, 0x44, 0x76, 0x9a, 0x8e, 0x6e, \ + 0x8c, 0x1a, 0xd4 + +#endif + +#endif // _MSBN_DRBG_TEST_VECTORS_H \ No newline at end of file diff --git a/TPMCmd/tpm/include/RsaTestData.h b/TPMCmd/tpm/include/private/RsaTestData.h similarity index 95% rename from TPMCmd/tpm/include/RsaTestData.h rename to TPMCmd/tpm/include/private/RsaTestData.h index 3dc6cd3c..2d2d1e71 100644 --- a/TPMCmd/tpm/include/RsaTestData.h +++ b/TPMCmd/tpm/include/private/RsaTestData.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ // // RSA Test Vectors diff --git a/TPMCmd/tpm/include/private/SelfTest.h b/TPMCmd/tpm/include/private/SelfTest.h new file mode 100644 index 00000000..9ba5427d --- /dev/null +++ b/TPMCmd/tpm/include/private/SelfTest.h @@ -0,0 +1,70 @@ +//** Introduction +// This file contains the structure definitions for the self-test. It also contains +// macros for use when the self-test is implemented. +#ifndef _SELF_TEST_H_ +#define _SELF_TEST_H_ + +//** Defines + +// Was typing this a lot +#define SELF_TEST_FAILURE FAIL(FATAL_ERROR_SELF_TEST) + +// Use the definition of key sizes to set algorithm values for key size. +#define AES_ENTRIES (AES_128 + AES_192 + AES_256) +#define SM4_ENTRIES (SM4_128) +#define CAMELLIA_ENTRIES (CAMELLIA_128 + CAMELLIA_192 + CAMELLIA_256) + +#define NUM_SYMS (AES_ENTRIES + SM4_ENTRIES + CAMELLIA_ENTRIES) + +typedef UINT32 SYM_INDEX; + +// These two defines deal with the fact that the TPM_ALG_ID table does not delimit +// the symmetric mode values with a SYM_MODE_FIRST and SYM_MODE_LAST +#define SYM_MODE_FIRST ALG_CTR_VALUE +#define SYM_MODE_LAST ALG_ECB_VALUE + +#define NUM_SYM_MODES (SYM_MODE_LAST - SYM_MODE_FIRST + 1) + +// Define a type to hold a bit vector for the modes. +#if NUM_SYM_MODES <= 0 +# error "No symmetric modes implemented" +#elif NUM_SYM_MODES <= 8 +typedef BYTE SYM_MODES; +#elif NUM_SYM_MODES <= 16 +typedef UINT16 SYM_MODES; +#elif NUM_SYM_MODES <= 32 +typedef UINT32 SYM_MODES; +#else +# error "Too many symmetric modes" +#endif + +typedef struct SYMMETRIC_TEST_VECTOR +{ + const TPM_ALG_ID alg; // the algorithm + const UINT16 keyBits; // bits in the key + const BYTE* key; // The test key + const UINT32 ivSize; // block size of the algorithm + const UINT32 dataInOutSize; // size to encrypt/decrypt + const BYTE* dataIn; // data to encrypt + const BYTE* dataOut[NUM_SYM_MODES]; // data to decrypt +} SYMMETRIC_TEST_VECTOR; + +#if ALG_SHA512 +# define DEFAULT_TEST_HASH ALG_SHA512_VALUE +# define DEFAULT_TEST_DIGEST_SIZE SHA512_DIGEST_SIZE +# define DEFAULT_TEST_HASH_BLOCK_SIZE SHA512_BLOCK_SIZE +#elif ALG_SHA384 +# define DEFAULT_TEST_HASH ALG_SHA384_VALUE +# define DEFAULT_TEST_DIGEST_SIZE SHA384_DIGEST_SIZE +# define DEFAULT_TEST_HASH_BLOCK_SIZE SHA384_BLOCK_SIZE +#elif ALG_SHA256 +# define DEFAULT_TEST_HASH ALG_SHA256_VALUE +# define DEFAULT_TEST_DIGEST_SIZE SHA256_DIGEST_SIZE +# define DEFAULT_TEST_HASH_BLOCK_SIZE SHA256_BLOCK_SIZE +#elif ALG_SHA1 +# define DEFAULT_TEST_HASH ALG_SHA1_VALUE +# define DEFAULT_TEST_DIGEST_SIZE SHA1_DIGEST_SIZE +# define DEFAULT_TEST_HASH_BLOCK_SIZE SHA1_BLOCK_SIZE +#endif + +#endif // _SELF_TEST_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/SymmetricTest.h b/TPMCmd/tpm/include/private/SymmetricTest.h new file mode 100644 index 00000000..cb474521 --- /dev/null +++ b/TPMCmd/tpm/include/private/SymmetricTest.h @@ -0,0 +1,73 @@ +//** Introduction + +// This file contains the structures and data definitions for the symmetric tests. +// This file references the header file that contains the actual test vectors. This +// organization was chosen so that the program that is used to generate the test +// vector values does not have to also re-generate this data. +#ifndef SELF_TEST_DATA +# error "This file may only be included in AlgorithmTests.c" +#endif + +#ifndef _SYMMETRIC_TEST_H +# define _SYMMETRIC_TEST_H +# include "SymmetricTestData.h" + +//** Symmetric Test Structures + +const SYMMETRIC_TEST_VECTOR c_symTestValues[NUM_SYMS + 1] = { +# if ALG_AES && AES_128 + {TPM_ALG_AES, + 128, + key_AES128, + 16, + sizeof(dataIn_AES128), + dataIn_AES128, + {dataOut_AES128_CTR, + dataOut_AES128_OFB, + dataOut_AES128_CBC, + dataOut_AES128_CFB, + dataOut_AES128_ECB}}, +# endif +# if ALG_AES && AES_192 + {TPM_ALG_AES, + 192, + key_AES192, + 16, + sizeof(dataIn_AES192), + dataIn_AES192, + {dataOut_AES192_CTR, + dataOut_AES192_OFB, + dataOut_AES192_CBC, + dataOut_AES192_CFB, + dataOut_AES192_ECB}}, +# endif +# if ALG_AES && AES_256 + {TPM_ALG_AES, + 256, + key_AES256, + 16, + sizeof(dataIn_AES256), + dataIn_AES256, + {dataOut_AES256_CTR, + dataOut_AES256_OFB, + dataOut_AES256_CBC, + dataOut_AES256_CFB, + dataOut_AES256_ECB}}, +# endif +// There are no SM4 test values yet so... +# if ALG_SM4 && SM4_128 && 0 + {TPM_ALG_SM4, + 128, + key_SM4128, + 16, + sizeof(dataIn_SM4128), + dataIn_SM4128, + {dataOut_SM4128_CTR, + dataOut_SM4128_OFB, + dataOut_SM4128_CBC, + dataOut_SM4128_CFB, + dataOut_AES128_ECB}}, +# endif + {0}}; + +#endif // _SYMMETRIC_TEST_H diff --git a/TPMCmd/tpm/include/SymmetricTestData.h b/TPMCmd/tpm/include/private/SymmetricTestData.h similarity index 81% rename from TPMCmd/tpm/include/SymmetricTestData.h rename to TPMCmd/tpm/include/private/SymmetricTestData.h index a419d422..848fece6 100644 --- a/TPMCmd/tpm/include/SymmetricTestData.h +++ b/TPMCmd/tpm/include/private/SymmetricTestData.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ // This is a vector for testing either encrypt or decrypt. The premise for decrypt // is that the IV for decryption is the same as the IV for encryption. However, // the ivOut value may be different for encryption and decryption. We will encrypt diff --git a/TPMCmd/tpm/include/TableMarshal.h b/TPMCmd/tpm/include/private/TableMarshal.h similarity index 81% rename from TPMCmd/tpm/include/TableMarshal.h rename to TPMCmd/tpm/include/private/TableMarshal.h index 76b06516..7e933062 100644 --- a/TPMCmd/tpm/include/TableMarshal.h +++ b/TPMCmd/tpm/include/private/TableMarshal.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #ifndef _TABLE_MARSHAL_H_ #define _TABLE_MARSHAL_H_ @@ -206,7 +172,7 @@ typedef struct listModifier // // The entry size/number is 6 bits (13:8). #define GET_ELEMENT_NUMBER(val) (((val) >> 8) & 0x3F) -#define SET_ELEMENT_NUMBER(val) (((val)&0x3F) << 8) +#define SET_ELEMENT_NUMBER(val) (((val) & 0x3F) << 8) #define GET_ELEMENT_SIZE(val) GET_ELEMENT_NUMBER(val) #define SET_ELEMENT_SIZE(val) SET_ELEMENT_NUMBER(val) // This determines if the null flag is propagated to this type. If generate, the @@ -227,7 +193,7 @@ typedef struct listModifier // 32-bits because it is implemented as part of the 'values' array in structures // that allow bit fields. #define IS_BIT_SET32(bit, bits) \ - ((((UINT32*)bits)[bit >> 5] & (1 << (bit & 0x1F))) != 0) + ((((UINT32*)bits)[bit >> 5] & (1 << (bit & 0x1F))) != 0) // For a COMPOSITE_MTYPE, the qualifiers byte has an element size and count. #define SET_ELEMENT_COUNT(count) ((count & 0x1F) << 3) diff --git a/TPMCmd/tpm/include/private/TableMarshalDefines.h b/TPMCmd/tpm/include/private/TableMarshalDefines.h new file mode 100644 index 00000000..26f6d970 --- /dev/null +++ b/TPMCmd/tpm/include/private/TableMarshalDefines.h @@ -0,0 +1,1508 @@ +#ifndef _TABLE_MARSHAL_DEFINES_H_ +#define _TABLE_MARSHAL_DEFINES_H_ + +#define NULL_SHIFT 15 +#define NULL_FLAG (1 << NULL_SHIFT) + +// The range macro processes a min, max value and produces a values that is used in +// the computation to see if something is within a range. The max value is (max-min). +// This lets the check for something ('val') within a range become: +// if((val - min) <= max) // passes if in range +// if((val - min) > max) // passes if not in range +// This works because all values are converted to UINT32 values before the compare. +// For (val - min), all values greater than or equal to val will become positive +// values with a value equal to 'min' being zero. This means that in an unsigned +// compare against 'max,' any value that is outside the range will appear to be a +// number greater than max. The benefit of this operation is that this will work even +// if the input value is a signed number as long as the input is sign extended. + +#define RANGE(_min_, _max_, _base_) (UINT32) _min_, (UINT32)((_base_)(_max_ - _min_)) + +// This macro is like the offsetof macro but, instead of computing the offset of +// a structure element, it computes the stride between elements that are in a +// structure array. This is used instead of sizeof() because the sizeof() operator on +// a structure can return an implementation dependent value. +#define STRIDE(s) ((UINT16)(size_t) & (((s*)0)[1])) + +#define MARSHAL_REF(TYPE) ((UINT16)(offsetof(MARSHAL_DATA, TYPE))) + +// This macro creates the entry in the array lookup table +#define ARRAY_MARSHAL_ENTRY(TYPE) \ + { \ + (marshalIndex_t) TYPE##_MARSHAL_REF, (UINT16)STRIDE(TYPE) \ + } + +// Defines for array lookup +#define UINT8_ARRAY_MARSHAL_INDEX 0 // 0x00 +#define TPM_CC_ARRAY_MARSHAL_INDEX 1 // 0x01 +#define TPMA_CC_ARRAY_MARSHAL_INDEX 2 // 0x02 +#define TPM_ALG_ID_ARRAY_MARSHAL_INDEX 3 // 0x03 +#define TPM_HANDLE_ARRAY_MARSHAL_INDEX 4 // 0x04 +#define TPM2B_DIGEST_ARRAY_MARSHAL_INDEX 5 // 0x05 +#define TPMT_HA_ARRAY_MARSHAL_INDEX 6 // 0x06 +#define TPMS_PCR_SELECTION_ARRAY_MARSHAL_INDEX 7 // 0x07 +#define TPMS_ALG_PROPERTY_ARRAY_MARSHAL_INDEX 8 // 0x08 +#define TPMS_TAGGED_PROPERTY_ARRAY_MARSHAL_INDEX 9 // 0x09 +#define TPMS_TAGGED_PCR_SELECT_ARRAY_MARSHAL_INDEX 10 // 0x0A +#define TPM_ECC_CURVE_ARRAY_MARSHAL_INDEX 11 // 0x0B +#define TPMS_TAGGED_POLICY_ARRAY_MARSHAL_INDEX 12 // 0x0C +#define TPMS_ACT_DATA_ARRAY_MARSHAL_INDEX 13 // 0x0D +#define TPMS_AC_OUTPUT_ARRAY_MARSHAL_INDEX 14 // 0x0E + +// Defines for referencing a type by offset +#define UINT8_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, UINT8_DATA))) +#define BYTE_MARSHAL_REF UINT8_MARSHAL_REF +#define TPM_HT_MARSHAL_REF UINT8_MARSHAL_REF +#define TPMA_LOCALITY_MARSHAL_REF UINT8_MARSHAL_REF +#define UINT16_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, UINT16_DATA))) +#define TPM_KEY_SIZE_MARSHAL_REF UINT16_MARSHAL_REF +#define TPM_KEY_BITS_MARSHAL_REF UINT16_MARSHAL_REF +#define TPM_ALG_ID_MARSHAL_REF UINT16_MARSHAL_REF +#define TPM_ST_MARSHAL_REF UINT16_MARSHAL_REF +#define UINT32_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, UINT32_DATA))) +#define TPM_ALGORITHM_ID_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_MODIFIER_INDICATOR_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_AUTHORIZATION_SIZE_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_PARAMETER_SIZE_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_SPEC_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_CONSTANTS32_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_CC_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_RC_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_PT_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_PT_PCR_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_PS_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_HANDLE_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_RH_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_HC_MARSHAL_REF UINT32_MARSHAL_REF +#define TPMA_PERMANENT_MARSHAL_REF UINT32_MARSHAL_REF +#define TPMA_STARTUP_CLEAR_MARSHAL_REF UINT32_MARSHAL_REF +#define TPMA_MEMORY_MARSHAL_REF UINT32_MARSHAL_REF +#define TPMA_CC_MARSHAL_REF UINT32_MARSHAL_REF +#define TPMA_MODES_MARSHAL_REF UINT32_MARSHAL_REF +#define TPMA_X509_KEY_USAGE_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_NV_INDEX_MARSHAL_REF UINT32_MARSHAL_REF +#define TPM_AE_MARSHAL_REF UINT32_MARSHAL_REF +#define UINT64_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, UINT64_DATA))) +#define INT8_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, INT8_DATA))) +#define INT16_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, INT16_DATA))) +#define INT32_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, INT32_DATA))) +#define INT64_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, INT64_DATA))) +#define UINT0_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, UINT0_DATA))) +#define TPM_ECC_CURVE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM_ECC_CURVE_DATA))) +#define TPM_CLOCK_ADJUST_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM_CLOCK_ADJUST_DATA))) +#define TPM_EO_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM_EO_DATA))) +#define TPM_SU_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM_SU_DATA))) +#define TPM_SE_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM_SE_DATA))) +#define TPM_CAP_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM_CAP_DATA))) +#define TPMA_ALGORITHM_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMA_ALGORITHM_DATA))) +#define TPMA_OBJECT_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMA_OBJECT_DATA))) +#define TPMA_SESSION_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMA_SESSION_DATA))) +#define TPMA_ACT_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMA_ACT_DATA))) +#define TPMI_YES_NO_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMI_YES_NO_DATA))) +#define TPMI_DH_OBJECT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_DH_OBJECT_DATA))) +#define TPMI_DH_PARENT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_DH_PARENT_DATA))) +#define TPMI_DH_PERSISTENT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_DH_PERSISTENT_DATA))) +#define TPMI_DH_ENTITY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_DH_ENTITY_DATA))) +#define TPMI_DH_PCR_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMI_DH_PCR_DATA))) +#define TPMI_SH_AUTH_SESSION_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_SH_AUTH_SESSION_DATA))) +#define TPMI_SH_HMAC_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_SH_HMAC_DATA))) +#define TPMI_SH_POLICY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_SH_POLICY_DATA))) +#define TPMI_DH_CONTEXT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_DH_CONTEXT_DATA))) +#define TPMI_DH_SAVED_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_DH_SAVED_DATA))) +#define TPMI_RH_HIERARCHY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_HIERARCHY_DATA))) +#define TPMI_RH_ENABLES_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_ENABLES_DATA))) +#define TPMI_RH_HIERARCHY_AUTH_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_HIERARCHY_AUTH_DATA))) +#define TPMI_RH_HIERARCHY_POLICY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_HIERARCHY_POLICY_DATA))) +#define TPMI_RH_BASE_HIERARCHY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_BASE_HIERARCHY_DATA))) +#define TPMI_RH_PLATFORM_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_PLATFORM_DATA))) +#define TPMI_RH_OWNER_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_OWNER_DATA))) +#define TPMI_RH_ENDORSEMENT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_ENDORSEMENT_DATA))) +#define TPMI_RH_PROVISION_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_PROVISION_DATA))) +#define TPMI_RH_CLEAR_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_CLEAR_DATA))) +#define TPMI_RH_NV_AUTH_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_NV_AUTH_DATA))) +#define TPMI_RH_LOCKOUT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_LOCKOUT_DATA))) +#define TPMI_RH_NV_INDEX_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_NV_INDEX_DATA))) +#define TPMI_RH_NV_DEFINED_INDEX_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_NV_DEFINED_INDEX_DATA))) +#define TPMI_RH_NV_LEGACY_INDEX_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_NV_LEGACY_INDEX_DATA))) +#define TPMI_RH_NV_EXP_INDEX_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RH_NV_EXP_INDEX_DATA))) +#define TPMI_RH_AC_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMI_RH_AC_DATA))) +#define TPMI_RH_ACT_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMI_RH_ACT_DATA))) +#define TPMI_ALG_HASH_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_HASH_DATA))) +#define TPMI_ALG_ASYM_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_ASYM_DATA))) +#define TPMI_ALG_SYM_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_SYM_DATA))) +#define TPMI_ALG_SYM_OBJECT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_SYM_OBJECT_DATA))) +#define TPMI_ALG_SYM_MODE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_SYM_MODE_DATA))) +#define TPMI_ALG_KDF_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_KDF_DATA))) +#define TPMI_ALG_SIG_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_SIG_SCHEME_DATA))) +#define TPMI_ECC_KEY_EXCHANGE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ECC_KEY_EXCHANGE_DATA))) +#define TPMI_ST_COMMAND_TAG_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ST_COMMAND_TAG_DATA))) +#define TPMI_ALG_MAC_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_MAC_SCHEME_DATA))) +#define TPMI_ALG_CIPHER_MODE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_CIPHER_MODE_DATA))) +#define TPMS_EMPTY_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMS_EMPTY_DATA))) +#define TPMS_ENC_SCHEME_RSAES_MARSHAL_REF TPMS_EMPTY_MARSHAL_REF +#define TPMS_ALGORITHM_DESCRIPTION_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_ALGORITHM_DESCRIPTION_DATA))) +#define TPMU_HA_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMU_HA_DATA))) +#define TPMT_HA_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMT_HA_DATA))) +#define TPM2B_DIGEST_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_DIGEST_DATA))) +#define TPM2B_NONCE_MARSHAL_REF TPM2B_DIGEST_MARSHAL_REF +#define TPM2B_AUTH_MARSHAL_REF TPM2B_DIGEST_MARSHAL_REF +#define TPM2B_OPERAND_MARSHAL_REF TPM2B_DIGEST_MARSHAL_REF +#define TPM2B_DATA_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM2B_DATA_DATA))) +#define TPM2B_EVENT_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM2B_EVENT_DATA))) +#define TPM2B_MAX_BUFFER_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_MAX_BUFFER_DATA))) +#define TPM2B_MAX_NV_BUFFER_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_MAX_NV_BUFFER_DATA))) +#define TPM2B_TIMEOUT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_TIMEOUT_DATA))) +#define TPM2B_IV_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM2B_IV_DATA))) +#define NULL_UNION_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, NULL_UNION_DATA))) +#define TPMU_NAME_MARSHAL_REF NULL_UNION_MARSHAL_REF +#define TPMU_SENSITIVE_CREATE_MARSHAL_REF NULL_UNION_MARSHAL_REF +#define TPM2B_NAME_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM2B_NAME_DATA))) +#define TPMS_PCR_SELECT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_PCR_SELECT_DATA))) +#define TPMS_PCR_SELECTION_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_PCR_SELECTION_DATA))) +#define TPMT_TK_CREATION_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_TK_CREATION_DATA))) +#define TPMT_TK_VERIFIED_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_TK_VERIFIED_DATA))) +#define TPMT_TK_AUTH_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_TK_AUTH_DATA))) +#define TPMT_TK_HASHCHECK_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_TK_HASHCHECK_DATA))) +#define TPMS_ALG_PROPERTY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_ALG_PROPERTY_DATA))) +#define TPMS_TAGGED_PROPERTY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_TAGGED_PROPERTY_DATA))) +#define TPMS_TAGGED_PCR_SELECT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_TAGGED_PCR_SELECT_DATA))) +#define TPMS_TAGGED_POLICY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_TAGGED_POLICY_DATA))) +#define TPMS_ACT_DATA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_ACT_DATA_DATA))) +#define TPML_CC_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPML_CC_DATA))) +#define TPML_CCA_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPML_CCA_DATA))) +#define TPML_ALG_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPML_ALG_DATA))) +#define TPML_HANDLE_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPML_HANDLE_DATA))) +#define TPML_DIGEST_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPML_DIGEST_DATA))) +#define TPML_DIGEST_VALUES_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPML_DIGEST_VALUES_DATA))) +#define TPML_PCR_SELECTION_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPML_PCR_SELECTION_DATA))) +#define TPML_ALG_PROPERTY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPML_ALG_PROPERTY_DATA))) +#define TPML_TAGGED_TPM_PROPERTY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPML_TAGGED_TPM_PROPERTY_DATA))) +#define TPML_TAGGED_PCR_PROPERTY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPML_TAGGED_PCR_PROPERTY_DATA))) +#define TPML_ECC_CURVE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPML_ECC_CURVE_DATA))) +#define TPML_TAGGED_POLICY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPML_TAGGED_POLICY_DATA))) +#define TPML_ACT_DATA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPML_ACT_DATA_DATA))) +#define TPMU_CAPABILITIES_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_CAPABILITIES_DATA))) +#define TPMS_CAPABILITY_DATA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_CAPABILITY_DATA_DATA))) +#define TPMU_SET_CAPABILITIES_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_SET_CAPABILITIES_DATA))) +#define TPMS_SET_CAPABILITY_DATA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_SET_CAPABILITY_DATA_DATA))) +#define TPM2B_SET_CAPABILITY_DATA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_SET_CAPABILITY_DATA_DATA))) +#define TPMS_CLOCK_INFO_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_CLOCK_INFO_DATA))) +#define TPMS_TIME_INFO_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_TIME_INFO_DATA))) +#define TPMS_TIME_ATTEST_INFO_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_TIME_ATTEST_INFO_DATA))) +#define TPMS_CERTIFY_INFO_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_CERTIFY_INFO_DATA))) +#define TPMS_QUOTE_INFO_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_QUOTE_INFO_DATA))) +#define TPMS_COMMAND_AUDIT_INFO_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_COMMAND_AUDIT_INFO_DATA))) +#define TPMS_SESSION_AUDIT_INFO_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_SESSION_AUDIT_INFO_DATA))) +#define TPMS_CREATION_INFO_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_CREATION_INFO_DATA))) +#define TPMS_NV_CERTIFY_INFO_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_NV_CERTIFY_INFO_DATA))) +#define TPMS_NV_DIGEST_CERTIFY_INFO_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_NV_DIGEST_CERTIFY_INFO_DATA))) +#define TPMI_ST_ATTEST_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ST_ATTEST_DATA))) +#define TPMU_ATTEST_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMU_ATTEST_DATA))) +#define TPMS_ATTEST_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMS_ATTEST_DATA))) +#define TPM2B_ATTEST_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_ATTEST_DATA))) +#define TPMS_AUTH_COMMAND_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_AUTH_COMMAND_DATA))) +#define TPMS_AUTH_RESPONSE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_AUTH_RESPONSE_DATA))) +#define TPMI_TDES_KEY_BITS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_TDES_KEY_BITS_DATA))) +#define TPMI_AES_KEY_BITS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_AES_KEY_BITS_DATA))) +#define TPMI_SM4_KEY_BITS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_SM4_KEY_BITS_DATA))) +#define TPMI_CAMELLIA_KEY_BITS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_CAMELLIA_KEY_BITS_DATA))) +#define TPMU_SYM_KEY_BITS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_SYM_KEY_BITS_DATA))) +#define TPMU_SYM_MODE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_SYM_MODE_DATA))) +#define TPMT_SYM_DEF_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_SYM_DEF_DATA))) +#define TPMT_SYM_DEF_OBJECT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_SYM_DEF_OBJECT_DATA))) +#define TPM2B_SYM_KEY_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_SYM_KEY_DATA))) +#define TPMS_SYMCIPHER_PARMS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_SYMCIPHER_PARMS_DATA))) +#define TPM2B_LABEL_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM2B_LABEL_DATA))) +#define TPMS_DERIVE_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMS_DERIVE_DATA))) +#define TPM2B_DERIVE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_DERIVE_DATA))) +#define TPM2B_SENSITIVE_DATA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_SENSITIVE_DATA_DATA))) +#define TPMS_SENSITIVE_CREATE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_SENSITIVE_CREATE_DATA))) +#define TPM2B_SENSITIVE_CREATE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_SENSITIVE_CREATE_DATA))) +#define TPMS_SCHEME_HASH_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_SCHEME_HASH_DATA))) +#define TPMS_SCHEME_HMAC_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_SIG_SCHEME_RSASSA_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_SIG_SCHEME_RSAPSS_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_SIG_SCHEME_ECDSA_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_SIG_SCHEME_SM2_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_SIG_SCHEME_ECSCHNORR_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_ENC_SCHEME_OAEP_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_KEY_SCHEME_ECDH_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_KEY_SCHEME_ECMQV_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_KDF_SCHEME_MGF1_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_KDF_SCHEME_KDF1_SP800_56A_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_KDF_SCHEME_KDF2_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_KDF_SCHEME_KDF1_SP800_108_MARSHAL_REF TPMS_SCHEME_HASH_MARSHAL_REF +#define TPMS_SCHEME_ECDAA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_SCHEME_ECDAA_DATA))) +#define TPMS_SIG_SCHEME_ECDAA_MARSHAL_REF TPMS_SCHEME_ECDAA_MARSHAL_REF +#define TPMI_ALG_KEYEDHASH_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_KEYEDHASH_SCHEME_DATA))) +#define TPMS_SCHEME_XOR_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_SCHEME_XOR_DATA))) +#define TPMU_SCHEME_KEYEDHASH_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_SCHEME_KEYEDHASH_DATA))) +#define TPMT_KEYEDHASH_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_KEYEDHASH_SCHEME_DATA))) +#define TPMU_SIG_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_SIG_SCHEME_DATA))) +#define TPMT_SIG_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_SIG_SCHEME_DATA))) +#define TPMU_KDF_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_KDF_SCHEME_DATA))) +#define TPMT_KDF_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_KDF_SCHEME_DATA))) +#define TPMI_ALG_ASYM_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_ASYM_SCHEME_DATA))) +#define TPMU_ASYM_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_ASYM_SCHEME_DATA))) +#define TPMI_ALG_RSA_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_RSA_SCHEME_DATA))) +#define TPMT_RSA_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_RSA_SCHEME_DATA))) +#define TPMI_ALG_RSA_DECRYPT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_RSA_DECRYPT_DATA))) +#define TPMT_RSA_DECRYPT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_RSA_DECRYPT_DATA))) +#define TPM2B_PUBLIC_KEY_RSA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_PUBLIC_KEY_RSA_DATA))) +#define TPMI_RSA_KEY_BITS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_RSA_KEY_BITS_DATA))) +#define TPM2B_PRIVATE_KEY_RSA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_PRIVATE_KEY_RSA_DATA))) +#define TPM2B_ECC_PARAMETER_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_ECC_PARAMETER_DATA))) +#define TPMS_ECC_POINT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_ECC_POINT_DATA))) +#define TPM2B_ECC_POINT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_ECC_POINT_DATA))) +#define TPMI_ALG_ECC_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_ECC_SCHEME_DATA))) +#define TPMI_ECC_CURVE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ECC_CURVE_DATA))) +#define TPMT_ECC_SCHEME_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_ECC_SCHEME_DATA))) +#define TPMS_ALGORITHM_DETAIL_ECC_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_ALGORITHM_DETAIL_ECC_DATA))) +#define TPMS_SIGNATURE_RSA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_SIGNATURE_RSA_DATA))) +#define TPMS_SIGNATURE_RSASSA_MARSHAL_REF TPMS_SIGNATURE_RSA_MARSHAL_REF +#define TPMS_SIGNATURE_RSAPSS_MARSHAL_REF TPMS_SIGNATURE_RSA_MARSHAL_REF +#define TPMS_SIGNATURE_ECC_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_SIGNATURE_ECC_DATA))) +#define TPMS_SIGNATURE_ECDAA_MARSHAL_REF TPMS_SIGNATURE_ECC_MARSHAL_REF +#define TPMS_SIGNATURE_ECDSA_MARSHAL_REF TPMS_SIGNATURE_ECC_MARSHAL_REF +#define TPMS_SIGNATURE_SM2_MARSHAL_REF TPMS_SIGNATURE_ECC_MARSHAL_REF +#define TPMS_SIGNATURE_ECSCHNORR_MARSHAL_REF TPMS_SIGNATURE_ECC_MARSHAL_REF +#define TPMU_SIGNATURE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_SIGNATURE_DATA))) +#define TPMT_SIGNATURE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_SIGNATURE_DATA))) +#define TPMU_ENCRYPTED_SECRET_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_ENCRYPTED_SECRET_DATA))) +#define TPM2B_ENCRYPTED_SECRET_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_ENCRYPTED_SECRET_DATA))) +#define TPMI_ALG_PUBLIC_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMI_ALG_PUBLIC_DATA))) +#define TPMU_PUBLIC_ID_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_PUBLIC_ID_DATA))) +#define TPMS_KEYEDHASH_PARMS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_KEYEDHASH_PARMS_DATA))) +#define TPMS_RSA_PARMS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_RSA_PARMS_DATA))) +#define TPMS_ECC_PARMS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_ECC_PARMS_DATA))) +#define TPMU_PUBLIC_PARMS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_PUBLIC_PARMS_DATA))) +#define TPMT_PUBLIC_PARMS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_PUBLIC_PARMS_DATA))) +#define TPMT_PUBLIC_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMT_PUBLIC_DATA))) +#define TPM2B_PUBLIC_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_PUBLIC_DATA))) +#define TPM2B_TEMPLATE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_TEMPLATE_DATA))) +#define TPM2B_PRIVATE_VENDOR_SPECIFIC_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_PRIVATE_VENDOR_SPECIFIC_DATA))) +#define TPMU_SENSITIVE_COMPOSITE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_SENSITIVE_COMPOSITE_DATA))) +#define TPMT_SENSITIVE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_SENSITIVE_DATA))) +#define TPM2B_SENSITIVE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_SENSITIVE_DATA))) +#define TPM2B_PRIVATE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_PRIVATE_DATA))) +#define TPM2B_ID_OBJECT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_ID_OBJECT_DATA))) +#define TPMS_NV_PIN_COUNTER_PARAMETERS_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_NV_PIN_COUNTER_PARAMETERS_DATA))) +#define TPMA_NV_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMA_NV_DATA))) +#define TPMA_NV_EXP_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPMA_NV_EXP_DATA))) +#define TPMS_NV_PUBLIC_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_NV_PUBLIC_DATA))) +#define TPM2B_NV_PUBLIC_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_NV_PUBLIC_DATA))) +#define TPMS_NV_PUBLIC_EXP_ATTR_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_NV_PUBLIC_EXP_ATTR_DATA))) +#define TPMU_NV_PUBLIC_2_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMU_NV_PUBLIC_2_DATA))) +#define TPMT_NV_PUBLIC_2_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMT_NV_PUBLIC_2_DATA))) +#define TPM2B_NV_PUBLIC_2_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_NV_PUBLIC_2_DATA))) +#define TPM2B_CONTEXT_SENSITIVE_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_CONTEXT_SENSITIVE_DATA))) +#define TPMS_CONTEXT_DATA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_CONTEXT_DATA_DATA))) +#define TPM2B_CONTEXT_DATA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_CONTEXT_DATA_DATA))) +#define TPMS_CONTEXT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_CONTEXT_DATA))) +#define TPMS_CREATION_DATA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_CREATION_DATA_DATA))) +#define TPM2B_CREATION_DATA_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPM2B_CREATION_DATA_DATA))) +#define TPM_AT_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, TPM_AT_DATA))) +#define TPMS_AC_OUTPUT_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPMS_AC_OUTPUT_DATA))) +#define TPML_AC_CAPABILITIES_MARSHAL_REF \ + ((UINT16)(offsetof(MarshalData_st, TPML_AC_CAPABILITIES_DATA))) +#define Type00_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type00_DATA))) +#define Type01_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type01_DATA))) +#define Type02_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type02_DATA))) +#define Type03_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type03_DATA))) +#define Type04_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type04_DATA))) +#define Type05_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type05_DATA))) +#define Type06_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type06_DATA))) +#define Type07_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type07_DATA))) +#define Type08_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type08_DATA))) +#define Type09_MARSHAL_REF Type08_MARSHAL_REF +#define Type14_MARSHAL_REF Type08_MARSHAL_REF +#define Type10_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type10_DATA))) +#define Type11_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type11_DATA))) +#define Type12_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type12_DATA))) +#define Type13_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type13_DATA))) +#define Type15_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type15_DATA))) +#define Type16_MARSHAL_REF Type15_MARSHAL_REF +#define Type17_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type17_DATA))) +#define Type18_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type18_DATA))) +#define Type19_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type19_DATA))) +#define Type20_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type20_DATA))) +#define Type21_MARSHAL_REF Type20_MARSHAL_REF +#define Type22_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type22_DATA))) +#define Type23_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type23_DATA))) +#define Type24_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type24_DATA))) +#define Type25_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type25_DATA))) +#define Type26_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type26_DATA))) +#define Type27_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type27_DATA))) +#define Type28_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type28_DATA))) +#define Type29_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type29_DATA))) +#define Type30_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type30_DATA))) +#define Type31_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type31_DATA))) +#define Type32_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type32_DATA))) +#define Type33_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type33_DATA))) +#define Type34_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type34_DATA))) +#define Type35_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type35_DATA))) +#define Type36_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type36_DATA))) +#define Type37_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type37_DATA))) +#define Type38_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type38_DATA))) +#define Type39_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type39_DATA))) +#define Type40_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type40_DATA))) +#define Type41_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type41_DATA))) +#define Type42_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type42_DATA))) +#define Type43_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type43_DATA))) +#define Type44_MARSHAL_REF ((UINT16)(offsetof(MarshalData_st, Type44_DATA))) + +//#defines to change calling sequence for code using marshaling +#define UINT8_Unmarshal(target, buffer, size) \ + Unmarshal(UINT8_MARSHAL_REF, (target), (buffer), (size)) +#define UINT8_Marshal(source, buffer, size) \ + Marshal(UINT8_MARSHAL_REF, (source), (buffer), (size)) +#define BYTE_Unmarshal(target, buffer, size) \ + Unmarshal(UINT8_MARSHAL_REF, (target), (buffer), (size)) +#define BYTE_Marshal(source, buffer, size) \ + Marshal(UINT8_MARSHAL_REF, (source), (buffer), (size)) +#define INT8_Unmarshal(target, buffer, size) \ + Unmarshal(INT8_MARSHAL_REF, (target), (buffer), (size)) +#define INT8_Marshal(source, buffer, size) \ + Marshal(INT8_MARSHAL_REF, (source), (buffer), (size)) +#define UINT16_Unmarshal(target, buffer, size) \ + Unmarshal(UINT16_MARSHAL_REF, (target), (buffer), (size)) +#define UINT16_Marshal(source, buffer, size) \ + Marshal(UINT16_MARSHAL_REF, (source), (buffer), (size)) +#define INT16_Unmarshal(target, buffer, size) \ + Unmarshal(INT16_MARSHAL_REF, (target), (buffer), (size)) +#define INT16_Marshal(source, buffer, size) \ + Marshal(INT16_MARSHAL_REF, (source), (buffer), (size)) +#define UINT32_Unmarshal(target, buffer, size) \ + Unmarshal(UINT32_MARSHAL_REF, (target), (buffer), (size)) +#define UINT32_Marshal(source, buffer, size) \ + Marshal(UINT32_MARSHAL_REF, (source), (buffer), (size)) +#define INT32_Unmarshal(target, buffer, size) \ + Unmarshal(INT32_MARSHAL_REF, (target), (buffer), (size)) +#define INT32_Marshal(source, buffer, size) \ + Marshal(INT32_MARSHAL_REF, (source), (buffer), (size)) +#define UINT64_Unmarshal(target, buffer, size) \ + Unmarshal(UINT64_MARSHAL_REF, (target), (buffer), (size)) +#define UINT64_Marshal(source, buffer, size) \ + Marshal(UINT64_MARSHAL_REF, (source), (buffer), (size)) +#define INT64_Unmarshal(target, buffer, size) \ + Unmarshal(INT64_MARSHAL_REF, (target), (buffer), (size)) +#define INT64_Marshal(source, buffer, size) \ + Marshal(INT64_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_ALGORITHM_ID_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_ALGORITHM_ID_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_ALGORITHM_ID_Marshal(source, buffer, size) \ + Marshal(TPM_ALGORITHM_ID_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_MODIFIER_INDICATOR_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_MODIFIER_INDICATOR_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_MODIFIER_INDICATOR_Marshal(source, buffer, size) \ + Marshal(TPM_MODIFIER_INDICATOR_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_AUTHORIZATION_SIZE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_AUTHORIZATION_SIZE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_AUTHORIZATION_SIZE_Marshal(source, buffer, size) \ + Marshal(TPM_AUTHORIZATION_SIZE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_PARAMETER_SIZE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_PARAMETER_SIZE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_PARAMETER_SIZE_Marshal(source, buffer, size) \ + Marshal(TPM_PARAMETER_SIZE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_KEY_SIZE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_KEY_SIZE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_KEY_SIZE_Marshal(source, buffer, size) \ + Marshal(TPM_KEY_SIZE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_KEY_BITS_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_KEY_BITS_Marshal(source, buffer, size) \ + Marshal(TPM_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_CONSTANTS32_Marshal(source, buffer, size) \ + Marshal(TPM_CONSTANTS32_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_ALG_ID_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_ALG_ID_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_ALG_ID_Marshal(source, buffer, size) \ + Marshal(TPM_ALG_ID_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_ECC_CURVE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_ECC_CURVE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_ECC_CURVE_Marshal(source, buffer, size) \ + Marshal(TPM_ECC_CURVE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_CC_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_CC_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_CC_Marshal(source, buffer, size) \ + Marshal(TPM_CC_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_RC_Marshal(source, buffer, size) \ + Marshal(TPM_RC_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_CLOCK_ADJUST_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_CLOCK_ADJUST_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_EO_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_EO_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_EO_Marshal(source, buffer, size) \ + Marshal(TPM_EO_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_ST_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_ST_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_ST_Marshal(source, buffer, size) \ + Marshal(TPM_ST_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_SU_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_SU_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_SE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_SE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_CAP_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_CAP_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_CAP_Marshal(source, buffer, size) \ + Marshal(TPM_CAP_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_PT_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_PT_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_PT_Marshal(source, buffer, size) \ + Marshal(TPM_PT_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_PT_PCR_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_PT_PCR_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_PT_PCR_Marshal(source, buffer, size) \ + Marshal(TPM_PT_PCR_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_PS_Marshal(source, buffer, size) \ + Marshal(TPM_PS_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_HANDLE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_HANDLE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_HANDLE_Marshal(source, buffer, size) \ + Marshal(TPM_HANDLE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_HT_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_HT_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_HT_Marshal(source, buffer, size) \ + Marshal(TPM_HT_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_RH_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_RH_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_RH_Marshal(source, buffer, size) \ + Marshal(TPM_RH_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_HC_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_HC_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_HC_Marshal(source, buffer, size) \ + Marshal(TPM_HC_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_ALGORITHM_Unmarshal(target, buffer, size) \ + Unmarshal(TPMA_ALGORITHM_MARSHAL_REF, (target), (buffer), (size)) +#define TPMA_ALGORITHM_Marshal(source, buffer, size) \ + Marshal(TPMA_ALGORITHM_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_OBJECT_Unmarshal(target, buffer, size) \ + Unmarshal(TPMA_OBJECT_MARSHAL_REF, (target), (buffer), (size)) +#define TPMA_OBJECT_Marshal(source, buffer, size) \ + Marshal(TPMA_OBJECT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_SESSION_Unmarshal(target, buffer, size) \ + Unmarshal(TPMA_SESSION_MARSHAL_REF, (target), (buffer), (size)) +#define TPMA_SESSION_Marshal(source, buffer, size) \ + Marshal(TPMA_SESSION_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_LOCALITY_Unmarshal(target, buffer, size) \ + Unmarshal(TPMA_LOCALITY_MARSHAL_REF, (target), (buffer), (size)) +#define TPMA_LOCALITY_Marshal(source, buffer, size) \ + Marshal(TPMA_LOCALITY_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_PERMANENT_Marshal(source, buffer, size) \ + Marshal(TPMA_PERMANENT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_STARTUP_CLEAR_Marshal(source, buffer, size) \ + Marshal(TPMA_STARTUP_CLEAR_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_MEMORY_Marshal(source, buffer, size) \ + Marshal(TPMA_MEMORY_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_CC_Marshal(source, buffer, size) \ + Marshal(TPMA_CC_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_MODES_Marshal(source, buffer, size) \ + Marshal(TPMA_MODES_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_X509_KEY_USAGE_Marshal(source, buffer, size) \ + Marshal(TPMA_X509_KEY_USAGE_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_ACT_Unmarshal(target, buffer, size) \ + Unmarshal(TPMA_ACT_MARSHAL_REF, (target), (buffer), (size)) +#define TPMA_ACT_Marshal(source, buffer, size) \ + Marshal(TPMA_ACT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_YES_NO_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_YES_NO_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_YES_NO_Marshal(source, buffer, size) \ + Marshal(TPMI_YES_NO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_DH_OBJECT_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_DH_OBJECT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_DH_OBJECT_Marshal(source, buffer, size) \ + Marshal(TPMI_DH_OBJECT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_DH_PARENT_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_DH_PARENT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_DH_PARENT_Marshal(source, buffer, size) \ + Marshal(TPMI_DH_PARENT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_DH_PERSISTENT_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_DH_PERSISTENT_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_DH_PERSISTENT_Marshal(source, buffer, size) \ + Marshal(TPMI_DH_PERSISTENT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_DH_ENTITY_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_DH_ENTITY_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_DH_PCR_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_DH_PCR_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_SH_AUTH_SESSION_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_SH_AUTH_SESSION_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_SH_AUTH_SESSION_Marshal(source, buffer, size) \ + Marshal(TPMI_SH_AUTH_SESSION_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_SH_HMAC_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_SH_HMAC_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_SH_HMAC_Marshal(source, buffer, size) \ + Marshal(TPMI_SH_HMAC_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_SH_POLICY_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_SH_POLICY_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_SH_POLICY_Marshal(source, buffer, size) \ + Marshal(TPMI_SH_POLICY_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_DH_CONTEXT_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_DH_CONTEXT_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_DH_CONTEXT_Marshal(source, buffer, size) \ + Marshal(TPMI_DH_CONTEXT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_DH_SAVED_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_DH_SAVED_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_DH_SAVED_Marshal(source, buffer, size) \ + Marshal(TPMI_DH_SAVED_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_RH_HIERARCHY_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_RH_HIERARCHY_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_RH_HIERARCHY_Marshal(source, buffer, size) \ + Marshal(TPMI_RH_HIERARCHY_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_RH_ENABLES_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_RH_ENABLES_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_RH_ENABLES_Marshal(source, buffer, size) \ + Marshal(TPMI_RH_ENABLES_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_RH_HIERARCHY_AUTH_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_HIERARCHY_AUTH_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_HIERARCHY_POLICY_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_HIERARCHY_POLICY_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_PLATFORM_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_PLATFORM_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_OWNER_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_RH_OWNER_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_RH_ENDORSEMENT_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_RH_ENDORSEMENT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_RH_PROVISION_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_PROVISION_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_CLEAR_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_CLEAR_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_NV_AUTH_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_NV_AUTH_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_LOCKOUT_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_LOCKOUT_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_NV_INDEX_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_NV_INDEX_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_NV_INDEX_Marshal(source, buffer, size) \ + Marshal(TPMI_RH_NV_INDEX_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_RH_NV_DEFINED_INDEX_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_NV_DEFINED_INDEX_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_NV_DEFINED_INDEX_Marshal(source, buffer, size) \ + Marshal(TPMI_RH_NV_DEFINED_INDEX_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_RH_NV_LEGACY_INDEX_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_NV_LEGACY_INDEX_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_NV_LEGACY_INDEX_Marshal(source, buffer, size) \ + Marshal(TPMI_RH_NV_LEGACY_INDEX_MARSHAL_REF, (source), (buffer), (size) +#define TPMI_RH_NV_EXP_INDEX_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_NV_DEFINED_INDEX_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_NV_EXP_INDEX_Marshal(source, buffer, size) \ + Marshal(TPMI_RH_NV_DEFINED_INDEX_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_RH_AC_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_AC_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_ACT_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RH_ACT_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RH_ACT_Marshal(source, buffer, size) \ + Marshal(TPMI_RH_ACT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_HASH_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_HASH_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_HASH_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_HASH_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_ASYM_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_ASYM_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_ASYM_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_ASYM_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_SYM_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_SYM_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_SYM_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_SYM_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_SYM_OBJECT_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_SYM_OBJECT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_SYM_OBJECT_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_SYM_OBJECT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_SYM_MODE_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_SYM_MODE_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_SYM_MODE_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_SYM_MODE_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_KDF_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_KDF_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_KDF_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_KDF_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_SIG_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_SIG_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_SIG_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_SIG_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ECC_KEY_EXCHANGE_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ECC_KEY_EXCHANGE_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ECC_KEY_EXCHANGE_Marshal(source, buffer, size) \ + Marshal(TPMI_ECC_KEY_EXCHANGE_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ST_COMMAND_TAG_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_ST_COMMAND_TAG_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_ST_COMMAND_TAG_Marshal(source, buffer, size) \ + Marshal(TPMI_ST_COMMAND_TAG_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_MAC_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_MAC_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_MAC_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_MAC_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_CIPHER_MODE_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_CIPHER_MODE_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_CIPHER_MODE_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_CIPHER_MODE_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_EMPTY_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_EMPTY_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_EMPTY_Marshal(source, buffer, size) \ + Marshal(TPMS_EMPTY_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_ALGORITHM_DESCRIPTION_Marshal(source, buffer, size) \ + Marshal(TPMS_ALGORITHM_DESCRIPTION_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_HA_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion(TPMU_HA_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_HA_Marshal(source, buffer, size, selector) \ + MarshalUnion(TPMU_HA_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMT_HA_Unmarshal(target, buffer, size, flag) \ + Unmarshal( \ + TPMT_HA_MARSHAL_REF | (flag ? NULL_FLAG : 0), (target), (buffer), (size)) +#define TPMT_HA_Marshal(source, buffer, size) \ + Marshal(TPMT_HA_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_DIGEST_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_DIGEST_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_DIGEST_Marshal(source, buffer, size) \ + Marshal(TPM2B_DIGEST_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_DATA_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_DATA_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_DATA_Marshal(source, buffer, size) \ + Marshal(TPM2B_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_NONCE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_NONCE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_NONCE_Marshal(source, buffer, size) \ + Marshal(TPM2B_NONCE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_AUTH_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_AUTH_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_AUTH_Marshal(source, buffer, size) \ + Marshal(TPM2B_AUTH_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_OPERAND_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_OPERAND_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_OPERAND_Marshal(source, buffer, size) \ + Marshal(TPM2B_OPERAND_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_EVENT_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_EVENT_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_EVENT_Marshal(source, buffer, size) \ + Marshal(TPM2B_EVENT_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_MAX_BUFFER_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_MAX_BUFFER_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_MAX_BUFFER_Marshal(source, buffer, size) \ + Marshal(TPM2B_MAX_BUFFER_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_MAX_NV_BUFFER_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_MAX_NV_BUFFER_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_MAX_NV_BUFFER_Marshal(source, buffer, size) \ + Marshal(TPM2B_MAX_NV_BUFFER_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_TIMEOUT_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_TIMEOUT_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_TIMEOUT_Marshal(source, buffer, size) \ + Marshal(TPM2B_TIMEOUT_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_IV_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_IV_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_IV_Marshal(source, buffer, size) \ + Marshal(TPM2B_IV_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_NAME_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_NAME_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_NAME_Marshal(source, buffer, size) \ + Marshal(TPM2B_NAME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_PCR_SELECT_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_PCR_SELECT_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_PCR_SELECT_Marshal(source, buffer, size) \ + Marshal(TPMS_PCR_SELECT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_PCR_SELECTION_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_PCR_SELECTION_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_PCR_SELECTION_Marshal(source, buffer, size) \ + Marshal(TPMS_PCR_SELECTION_MARSHAL_REF, (source), (buffer), (size)) +#define TPMT_TK_CREATION_Unmarshal(target, buffer, size) \ + Unmarshal(TPMT_TK_CREATION_MARSHAL_REF, (target), (buffer), (size)) +#define TPMT_TK_CREATION_Marshal(source, buffer, size) \ + Marshal(TPMT_TK_CREATION_MARSHAL_REF, (source), (buffer), (size)) +#define TPMT_TK_VERIFIED_Unmarshal(target, buffer, size) \ + Unmarshal(TPMT_TK_VERIFIED_MARSHAL_REF, (target), (buffer), (size)) +#define TPMT_TK_VERIFIED_Marshal(source, buffer, size) \ + Marshal(TPMT_TK_VERIFIED_MARSHAL_REF, (source), (buffer), (size)) +#define TPMT_TK_AUTH_Unmarshal(target, buffer, size) \ + Unmarshal(TPMT_TK_AUTH_MARSHAL_REF, (target), (buffer), (size)) +#define TPMT_TK_AUTH_Marshal(source, buffer, size) \ + Marshal(TPMT_TK_AUTH_MARSHAL_REF, (source), (buffer), (size)) +#define TPMT_TK_HASHCHECK_Unmarshal(target, buffer, size) \ + Unmarshal(TPMT_TK_HASHCHECK_MARSHAL_REF, (target), (buffer), (size)) +#define TPMT_TK_HASHCHECK_Marshal(source, buffer, size) \ + Marshal(TPMT_TK_HASHCHECK_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_ALG_PROPERTY_Marshal(source, buffer, size) \ + Marshal(TPMS_ALG_PROPERTY_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_TAGGED_PROPERTY_Marshal(source, buffer, size) \ + Marshal(TPMS_TAGGED_PROPERTY_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_TAGGED_PCR_SELECT_Marshal(source, buffer, size) \ + Marshal(TPMS_TAGGED_PCR_SELECT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_TAGGED_POLICY_Marshal(source, buffer, size) \ + Marshal(TPMS_TAGGED_POLICY_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_ACT_DATA_Marshal(source, buffer, size) \ + Marshal(TPMS_ACT_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_CC_Unmarshal(target, buffer, size) \ + Unmarshal(TPML_CC_MARSHAL_REF, (target), (buffer), (size)) +#define TPML_CC_Marshal(source, buffer, size) \ + Marshal(TPML_CC_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_CCA_Marshal(source, buffer, size) \ + Marshal(TPML_CCA_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_ALG_Unmarshal(target, buffer, size) \ + Unmarshal(TPML_ALG_MARSHAL_REF, (target), (buffer), (size)) +#define TPML_ALG_Marshal(source, buffer, size) \ + Marshal(TPML_ALG_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_HANDLE_Marshal(source, buffer, size) \ + Marshal(TPML_HANDLE_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_DIGEST_Unmarshal(target, buffer, size) \ + Unmarshal(TPML_DIGEST_MARSHAL_REF, (target), (buffer), (size)) +#define TPML_DIGEST_Marshal(source, buffer, size) \ + Marshal(TPML_DIGEST_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_DIGEST_VALUES_Unmarshal(target, buffer, size) \ + Unmarshal(TPML_DIGEST_VALUES_MARSHAL_REF, (target), (buffer), (size)) +#define TPML_DIGEST_VALUES_Marshal(source, buffer, size) \ + Marshal(TPML_DIGEST_VALUES_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_PCR_SELECTION_Unmarshal(target, buffer, size) \ + Unmarshal(TPML_PCR_SELECTION_MARSHAL_REF, (target), (buffer), (size)) +#define TPML_PCR_SELECTION_Marshal(source, buffer, size) \ + Marshal(TPML_PCR_SELECTION_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_ALG_PROPERTY_Marshal(source, buffer, size) \ + Marshal(TPML_ALG_PROPERTY_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_TAGGED_TPM_PROPERTY_Marshal(source, buffer, size) \ + Marshal(TPML_TAGGED_TPM_PROPERTY_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_TAGGED_PCR_PROPERTY_Marshal(source, buffer, size) \ + Marshal(TPML_TAGGED_PCR_PROPERTY_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_ECC_CURVE_Marshal(source, buffer, size) \ + Marshal(TPML_ECC_CURVE_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_TAGGED_POLICY_Marshal(source, buffer, size) \ + Marshal(TPML_TAGGED_POLICY_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_ACT_DATA_Marshal(source, buffer, size) \ + Marshal(TPML_ACT_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_CAPABILITIES_Marshal(source, buffer, size, selector) \ + MarshalUnion( \ + TPMU_CAPABILITIES_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMS_CAPABILITY_DATA_Marshal(source, buffer, size) \ + Marshal(TPMS_CAPABILITY_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_SET_CAPABILITIES_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion( \ + TPMU_SET_CAPABILITIES_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_SET_CAPABILITIES_Marshal(source, buffer, size, selector) \ + MarshalUnion( \ + TPMU_SET_CAPABILITIES_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMS_SET_CAPABILITY_DATA_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SET_CAPABILITY_DATA_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SET_CAPABILITY_DATA_Marshal(source, buffer, size) \ + Marshal(TPMS_SET_CAPABILITY_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_SET_CAPABILITY_DATA_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_SET_CAPABILITY_DATA_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_SET_CAPABILITY_DATA_Marshal(source, buffer, size) \ + Marshal(TPM2B_SET_CAPABILITY_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_CLOCK_INFO_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_CLOCK_INFO_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_CLOCK_INFO_Marshal(source, buffer, size) \ + Marshal(TPMS_CLOCK_INFO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_TIME_INFO_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_TIME_INFO_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_TIME_INFO_Marshal(source, buffer, size) \ + Marshal(TPMS_TIME_INFO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_TIME_ATTEST_INFO_Marshal(source, buffer, size) \ + Marshal(TPMS_TIME_ATTEST_INFO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_CERTIFY_INFO_Marshal(source, buffer, size) \ + Marshal(TPMS_CERTIFY_INFO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_QUOTE_INFO_Marshal(source, buffer, size) \ + Marshal(TPMS_QUOTE_INFO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_COMMAND_AUDIT_INFO_Marshal(source, buffer, size) \ + Marshal(TPMS_COMMAND_AUDIT_INFO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SESSION_AUDIT_INFO_Marshal(source, buffer, size) \ + Marshal(TPMS_SESSION_AUDIT_INFO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_CREATION_INFO_Marshal(source, buffer, size) \ + Marshal(TPMS_CREATION_INFO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_NV_CERTIFY_INFO_Marshal(source, buffer, size) \ + Marshal(TPMS_NV_CERTIFY_INFO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_NV_DIGEST_CERTIFY_INFO_Marshal(source, buffer, size) \ + Marshal(TPMS_NV_DIGEST_CERTIFY_INFO_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ST_ATTEST_Marshal(source, buffer, size) \ + Marshal(TPMI_ST_ATTEST_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_ATTEST_Marshal(source, buffer, size, selector) \ + MarshalUnion(TPMU_ATTEST_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMS_ATTEST_Marshal(source, buffer, size) \ + Marshal(TPMS_ATTEST_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_ATTEST_Marshal(source, buffer, size) \ + Marshal(TPM2B_ATTEST_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_AUTH_COMMAND_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_AUTH_COMMAND_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_AUTH_RESPONSE_Marshal(source, buffer, size) \ + Marshal(TPMS_AUTH_RESPONSE_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_TDES_KEY_BITS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_TDES_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_TDES_KEY_BITS_Marshal(source, buffer, size) \ + Marshal(TPMI_TDES_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_AES_KEY_BITS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_AES_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_AES_KEY_BITS_Marshal(source, buffer, size) \ + Marshal(TPMI_AES_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_SM4_KEY_BITS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_SM4_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_SM4_KEY_BITS_Marshal(source, buffer, size) \ + Marshal(TPMI_SM4_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_CAMELLIA_KEY_BITS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_CAMELLIA_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_CAMELLIA_KEY_BITS_Marshal(source, buffer, size) \ + Marshal(TPMI_CAMELLIA_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_SYM_KEY_BITS_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion( \ + TPMU_SYM_KEY_BITS_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_SYM_KEY_BITS_Marshal(source, buffer, size, selector) \ + MarshalUnion( \ + TPMU_SYM_KEY_BITS_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMU_SYM_MODE_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion(TPMU_SYM_MODE_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_SYM_MODE_Marshal(source, buffer, size, selector) \ + MarshalUnion(TPMU_SYM_MODE_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMT_SYM_DEF_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMT_SYM_DEF_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMT_SYM_DEF_Marshal(source, buffer, size) \ + Marshal(TPMT_SYM_DEF_MARSHAL_REF, (source), (buffer), (size)) +#define TPMT_SYM_DEF_OBJECT_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMT_SYM_DEF_OBJECT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMT_SYM_DEF_OBJECT_Marshal(source, buffer, size) \ + Marshal(TPMT_SYM_DEF_OBJECT_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_SYM_KEY_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_SYM_KEY_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_SYM_KEY_Marshal(source, buffer, size) \ + Marshal(TPM2B_SYM_KEY_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SYMCIPHER_PARMS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SYMCIPHER_PARMS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SYMCIPHER_PARMS_Marshal(source, buffer, size) \ + Marshal(TPMS_SYMCIPHER_PARMS_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_LABEL_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_LABEL_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_LABEL_Marshal(source, buffer, size) \ + Marshal(TPM2B_LABEL_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_DERIVE_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_DERIVE_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_DERIVE_Marshal(source, buffer, size) \ + Marshal(TPMS_DERIVE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_DERIVE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_DERIVE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_DERIVE_Marshal(source, buffer, size) \ + Marshal(TPM2B_DERIVE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_SENSITIVE_DATA_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_SENSITIVE_DATA_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_SENSITIVE_DATA_Marshal(source, buffer, size) \ + Marshal(TPM2B_SENSITIVE_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SENSITIVE_CREATE_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SENSITIVE_CREATE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_SENSITIVE_CREATE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_SENSITIVE_CREATE_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SCHEME_HASH_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SCHEME_HASH_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SCHEME_HASH_Marshal(source, buffer, size) \ + Marshal(TPMS_SCHEME_HASH_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SCHEME_ECDAA_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SCHEME_ECDAA_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SCHEME_ECDAA_Marshal(source, buffer, size) \ + Marshal(TPMS_SCHEME_ECDAA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_KEYEDHASH_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_KEYEDHASH_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_KEYEDHASH_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_KEYEDHASH_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SCHEME_HMAC_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SCHEME_HMAC_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SCHEME_HMAC_Marshal(source, buffer, size) \ + Marshal(TPMS_SCHEME_HMAC_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SCHEME_XOR_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SCHEME_XOR_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SCHEME_XOR_Marshal(source, buffer, size) \ + Marshal(TPMS_SCHEME_XOR_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_SCHEME_KEYEDHASH_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion( \ + TPMU_SCHEME_KEYEDHASH_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_SCHEME_KEYEDHASH_Marshal(source, buffer, size, selector) \ + MarshalUnion( \ + TPMU_SCHEME_KEYEDHASH_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMT_KEYEDHASH_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMT_KEYEDHASH_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMT_KEYEDHASH_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMT_KEYEDHASH_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIG_SCHEME_RSASSA_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIG_SCHEME_RSASSA_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIG_SCHEME_RSASSA_Marshal(source, buffer, size) \ + Marshal(TPMS_SIG_SCHEME_RSASSA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIG_SCHEME_RSAPSS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIG_SCHEME_RSAPSS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIG_SCHEME_RSAPSS_Marshal(source, buffer, size) \ + Marshal(TPMS_SIG_SCHEME_RSAPSS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIG_SCHEME_ECDSA_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIG_SCHEME_ECDSA_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIG_SCHEME_ECDSA_Marshal(source, buffer, size) \ + Marshal(TPMS_SIG_SCHEME_ECDSA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIG_SCHEME_SM2_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIG_SCHEME_SM2_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIG_SCHEME_SM2_Marshal(source, buffer, size) \ + Marshal(TPMS_SIG_SCHEME_SM2_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIG_SCHEME_ECSCHNORR_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIG_SCHEME_ECSCHNORR_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIG_SCHEME_ECSCHNORR_Marshal(source, buffer, size) \ + Marshal(TPMS_SIG_SCHEME_ECSCHNORR_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIG_SCHEME_ECDAA_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIG_SCHEME_ECDAA_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIG_SCHEME_ECDAA_Marshal(source, buffer, size) \ + Marshal(TPMS_SIG_SCHEME_ECDAA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_SIG_SCHEME_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion( \ + TPMU_SIG_SCHEME_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_SIG_SCHEME_Marshal(source, buffer, size, selector) \ + MarshalUnion(TPMU_SIG_SCHEME_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMT_SIG_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMT_SIG_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMT_SIG_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMT_SIG_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_ENC_SCHEME_OAEP_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_ENC_SCHEME_OAEP_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_ENC_SCHEME_OAEP_Marshal(source, buffer, size) \ + Marshal(TPMS_ENC_SCHEME_OAEP_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_ENC_SCHEME_RSAES_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_ENC_SCHEME_RSAES_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_ENC_SCHEME_RSAES_Marshal(source, buffer, size) \ + Marshal(TPMS_ENC_SCHEME_RSAES_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_KEY_SCHEME_ECDH_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_KEY_SCHEME_ECDH_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_KEY_SCHEME_ECDH_Marshal(source, buffer, size) \ + Marshal(TPMS_KEY_SCHEME_ECDH_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_KEY_SCHEME_ECMQV_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_KEY_SCHEME_ECMQV_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_KEY_SCHEME_ECMQV_Marshal(source, buffer, size) \ + Marshal(TPMS_KEY_SCHEME_ECMQV_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_KDF_SCHEME_MGF1_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_KDF_SCHEME_MGF1_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_KDF_SCHEME_MGF1_Marshal(source, buffer, size) \ + Marshal(TPMS_KDF_SCHEME_MGF1_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_KDF_SCHEME_KDF1_SP800_56A_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_KDF_SCHEME_KDF1_SP800_56A_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_KDF_SCHEME_KDF1_SP800_56A_Marshal(source, buffer, size) \ + Marshal(TPMS_KDF_SCHEME_KDF1_SP800_56A_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_KDF_SCHEME_KDF2_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_KDF_SCHEME_KDF2_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_KDF_SCHEME_KDF2_Marshal(source, buffer, size) \ + Marshal(TPMS_KDF_SCHEME_KDF2_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_KDF_SCHEME_KDF1_SP800_108_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_KDF_SCHEME_KDF1_SP800_108_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_KDF_SCHEME_KDF1_SP800_108_Marshal(source, buffer, size) \ + Marshal(TPMS_KDF_SCHEME_KDF1_SP800_108_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_KDF_SCHEME_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion( \ + TPMU_KDF_SCHEME_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_KDF_SCHEME_Marshal(source, buffer, size, selector) \ + MarshalUnion(TPMU_KDF_SCHEME_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMT_KDF_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMT_KDF_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMT_KDF_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMT_KDF_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_ASYM_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_ASYM_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_ASYM_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_ASYM_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_ASYM_SCHEME_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion( \ + TPMU_ASYM_SCHEME_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_ASYM_SCHEME_Marshal(source, buffer, size, selector) \ + MarshalUnion(TPMU_ASYM_SCHEME_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMI_ALG_RSA_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_RSA_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_RSA_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_RSA_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMT_RSA_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMT_RSA_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMT_RSA_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMT_RSA_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_RSA_DECRYPT_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_RSA_DECRYPT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_RSA_DECRYPT_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_RSA_DECRYPT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMT_RSA_DECRYPT_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMT_RSA_DECRYPT_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMT_RSA_DECRYPT_Marshal(source, buffer, size) \ + Marshal(TPMT_RSA_DECRYPT_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_PUBLIC_KEY_RSA_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_PUBLIC_KEY_RSA_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_PUBLIC_KEY_RSA_Marshal(source, buffer, size) \ + Marshal(TPM2B_PUBLIC_KEY_RSA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_RSA_KEY_BITS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_RSA_KEY_BITS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_RSA_KEY_BITS_Marshal(source, buffer, size) \ + Marshal(TPMI_RSA_KEY_BITS_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_PRIVATE_KEY_RSA_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_PRIVATE_KEY_RSA_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_PRIVATE_KEY_RSA_Marshal(source, buffer, size) \ + Marshal(TPM2B_PRIVATE_KEY_RSA_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_ECC_PARAMETER_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_ECC_PARAMETER_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_ECC_PARAMETER_Marshal(source, buffer, size) \ + Marshal(TPM2B_ECC_PARAMETER_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_ECC_POINT_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_ECC_POINT_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_ECC_POINT_Marshal(source, buffer, size) \ + Marshal(TPMS_ECC_POINT_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_ECC_POINT_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_ECC_POINT_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_ECC_POINT_Marshal(source, buffer, size) \ + Marshal(TPM2B_ECC_POINT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_ECC_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ALG_ECC_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ALG_ECC_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_ECC_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ECC_CURVE_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMI_ECC_CURVE_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMI_ECC_CURVE_Marshal(source, buffer, size) \ + Marshal(TPMI_ECC_CURVE_MARSHAL_REF, (source), (buffer), (size)) +#define TPMT_ECC_SCHEME_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMT_ECC_SCHEME_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMT_ECC_SCHEME_Marshal(source, buffer, size) \ + Marshal(TPMT_ECC_SCHEME_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_ALGORITHM_DETAIL_ECC_Marshal(source, buffer, size) \ + Marshal(TPMS_ALGORITHM_DETAIL_ECC_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIGNATURE_RSA_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIGNATURE_RSA_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIGNATURE_RSA_Marshal(source, buffer, size) \ + Marshal(TPMS_SIGNATURE_RSA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIGNATURE_RSASSA_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIGNATURE_RSASSA_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIGNATURE_RSASSA_Marshal(source, buffer, size) \ + Marshal(TPMS_SIGNATURE_RSASSA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIGNATURE_RSAPSS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIGNATURE_RSAPSS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIGNATURE_RSAPSS_Marshal(source, buffer, size) \ + Marshal(TPMS_SIGNATURE_RSAPSS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIGNATURE_ECC_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIGNATURE_ECC_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIGNATURE_ECC_Marshal(source, buffer, size) \ + Marshal(TPMS_SIGNATURE_ECC_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIGNATURE_ECDAA_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIGNATURE_ECDAA_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIGNATURE_ECDAA_Marshal(source, buffer, size) \ + Marshal(TPMS_SIGNATURE_ECDAA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIGNATURE_ECDSA_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIGNATURE_ECDSA_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIGNATURE_ECDSA_Marshal(source, buffer, size) \ + Marshal(TPMS_SIGNATURE_ECDSA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIGNATURE_SM2_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIGNATURE_SM2_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIGNATURE_SM2_Marshal(source, buffer, size) \ + Marshal(TPMS_SIGNATURE_SM2_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_SIGNATURE_ECSCHNORR_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_SIGNATURE_ECSCHNORR_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_SIGNATURE_ECSCHNORR_Marshal(source, buffer, size) \ + Marshal(TPMS_SIGNATURE_ECSCHNORR_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_SIGNATURE_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion(TPMU_SIGNATURE_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_SIGNATURE_Marshal(source, buffer, size, selector) \ + MarshalUnion(TPMU_SIGNATURE_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMT_SIGNATURE_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMT_SIGNATURE_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMT_SIGNATURE_Marshal(source, buffer, size) \ + Marshal(TPMT_SIGNATURE_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_ENCRYPTED_SECRET_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion( \ + TPMU_ENCRYPTED_SECRET_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_ENCRYPTED_SECRET_Marshal(source, buffer, size, selector) \ + MarshalUnion( \ + TPMU_ENCRYPTED_SECRET_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPM2B_ENCRYPTED_SECRET_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_ENCRYPTED_SECRET_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_ENCRYPTED_SECRET_Marshal(source, buffer, size) \ + Marshal(TPM2B_ENCRYPTED_SECRET_MARSHAL_REF, (source), (buffer), (size)) +#define TPMI_ALG_PUBLIC_Unmarshal(target, buffer, size) \ + Unmarshal(TPMI_ALG_PUBLIC_MARSHAL_REF, (target), (buffer), (size)) +#define TPMI_ALG_PUBLIC_Marshal(source, buffer, size) \ + Marshal(TPMI_ALG_PUBLIC_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_PUBLIC_ID_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion(TPMU_PUBLIC_ID_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_PUBLIC_ID_Marshal(source, buffer, size, selector) \ + MarshalUnion(TPMU_PUBLIC_ID_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMS_KEYEDHASH_PARMS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_KEYEDHASH_PARMS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_KEYEDHASH_PARMS_Marshal(source, buffer, size) \ + Marshal(TPMS_KEYEDHASH_PARMS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_RSA_PARMS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_RSA_PARMS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_RSA_PARMS_Marshal(source, buffer, size) \ + Marshal(TPMS_RSA_PARMS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_ECC_PARMS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_ECC_PARMS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_ECC_PARMS_Marshal(source, buffer, size) \ + Marshal(TPMS_ECC_PARMS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_PUBLIC_PARMS_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion( \ + TPMU_PUBLIC_PARMS_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_PUBLIC_PARMS_Marshal(source, buffer, size, selector) \ + MarshalUnion( \ + TPMU_PUBLIC_PARMS_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMT_PUBLIC_PARMS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMT_PUBLIC_PARMS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMT_PUBLIC_PARMS_Marshal(source, buffer, size) \ + Marshal(TPMT_PUBLIC_PARMS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMT_PUBLIC_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPMT_PUBLIC_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPMT_PUBLIC_Marshal(source, buffer, size) \ + Marshal(TPMT_PUBLIC_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_PUBLIC_Unmarshal(target, buffer, size, flag) \ + Unmarshal(TPM2B_PUBLIC_MARSHAL_REF | (flag ? NULL_FLAG : 0), \ + (target), \ + (buffer), \ + (size)) +#define TPM2B_PUBLIC_Marshal(source, buffer, size) \ + Marshal(TPM2B_PUBLIC_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_TEMPLATE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_TEMPLATE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_TEMPLATE_Marshal(source, buffer, size) \ + Marshal(TPM2B_TEMPLATE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_PRIVATE_VENDOR_SPECIFIC_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_PRIVATE_VENDOR_SPECIFIC_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_PRIVATE_VENDOR_SPECIFIC_Marshal(source, buffer, size) \ + Marshal(TPM2B_PRIVATE_VENDOR_SPECIFIC_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_SENSITIVE_COMPOSITE_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion(TPMU_SENSITIVE_COMPOSITE_MARSHAL_REF, \ + (target), \ + (buffer), \ + (size), \ + (selector)) +#define TPMU_SENSITIVE_COMPOSITE_Marshal(source, buffer, size, selector) \ + MarshalUnion(TPMU_SENSITIVE_COMPOSITE_MARSHAL_REF, \ + (source), \ + (buffer), \ + (size), \ + (selector)) +#define TPMT_SENSITIVE_Unmarshal(target, buffer, size) \ + Unmarshal(TPMT_SENSITIVE_MARSHAL_REF, (target), (buffer), (size)) +#define TPMT_SENSITIVE_Marshal(source, buffer, size) \ + Marshal(TPMT_SENSITIVE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_SENSITIVE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_SENSITIVE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_SENSITIVE_Marshal(source, buffer, size) \ + Marshal(TPM2B_SENSITIVE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_PRIVATE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_PRIVATE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_PRIVATE_Marshal(source, buffer, size) \ + Marshal(TPM2B_PRIVATE_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_ID_OBJECT_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_ID_OBJECT_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_ID_OBJECT_Marshal(source, buffer, size) \ + Marshal(TPM2B_ID_OBJECT_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_NV_INDEX_Marshal(source, buffer, size) \ + Marshal(TPM_NV_INDEX_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_NV_PIN_COUNTER_PARAMETERS_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_NV_PIN_COUNTER_PARAMETERS_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_NV_PIN_COUNTER_PARAMETERS_Marshal(source, buffer, size) \ + Marshal(TPMS_NV_PIN_COUNTER_PARAMETERS_MARSHAL_REF, (source), (buffer), (size)) +#define TPMA_NV_Unmarshal(target, buffer, size) \ + Unmarshal(TPMA_NV_MARSHAL_REF, (target), (buffer), (size)) +#define TPMA_NV_Marshal(source, buffer, size) \ + Marshal(TPMA_NV_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_NV_PUBLIC_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_NV_PUBLIC_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_NV_PUBLIC_Marshal(source, buffer, size) \ + Marshal(TPMS_NV_PUBLIC_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_NV_PUBLIC_EXP_ATTR_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_NV_PUBLIC_EXP_ATTR_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_NV_PUBLIC_EXP_ATTR_Marshal(source, buffer, size) \ + Marshal(TPMS_NV_PUBLIC_EXP_ATTR_MARSHAL_REF, (source), (buffer), (size)) +#define TPMU_NV_PUBLIC_2_Unmarshal(target, buffer, size, selector) \ + UnmarshalUnion( \ + TPMU_NV_PUBLIC_2_MARSHAL_REF, (target), (buffer), (size), (selector)) +#define TPMU_NV_PUBLIC_2_Marshal(source, buffer, size, selector) \ + MarshalUnion(TPMU_NV_PUBLIC_2_MARSHAL_REF, (source), (buffer), (size), (selector)) +#define TPMT_NV_PUBLIC_2_Unmarshal(target, buffer, size) \ + Unmarshal(TPMT_NV_PUBLIC_2_MARSHAL_REF, (target), (buffer), (size)) +#define TPMT_NV_PUBLIC_2_Marshal(source, buffer, size) \ + Marshal(TPMT_NV_PUBLIC_2_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_NV_PUBLIC_2_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_NV_PUBLIC_2_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_NV_PUBLIC_2_Marshal(source, buffer, size) \ + Marshal(TPM2B_NV_PUBLIC_2_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_NV_PUBLIC_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_NV_PUBLIC_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_NV_PUBLIC_Marshal(source, buffer, size) \ + Marshal(TPM2B_NV_PUBLIC_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_CONTEXT_SENSITIVE_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_CONTEXT_SENSITIVE_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_CONTEXT_SENSITIVE_Marshal(source, buffer, size) \ + Marshal(TPM2B_CONTEXT_SENSITIVE_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_CONTEXT_DATA_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_CONTEXT_DATA_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_CONTEXT_DATA_Marshal(source, buffer, size) \ + Marshal(TPMS_CONTEXT_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_CONTEXT_DATA_Unmarshal(target, buffer, size) \ + Unmarshal(TPM2B_CONTEXT_DATA_MARSHAL_REF, (target), (buffer), (size)) +#define TPM2B_CONTEXT_DATA_Marshal(source, buffer, size) \ + Marshal(TPM2B_CONTEXT_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_CONTEXT_Unmarshal(target, buffer, size) \ + Unmarshal(TPMS_CONTEXT_MARSHAL_REF, (target), (buffer), (size)) +#define TPMS_CONTEXT_Marshal(source, buffer, size) \ + Marshal(TPMS_CONTEXT_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_CREATION_DATA_Marshal(source, buffer, size) \ + Marshal(TPMS_CREATION_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPM2B_CREATION_DATA_Marshal(source, buffer, size) \ + Marshal(TPM2B_CREATION_DATA_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_AT_Unmarshal(target, buffer, size) \ + Unmarshal(TPM_AT_MARSHAL_REF, (target), (buffer), (size)) +#define TPM_AT_Marshal(source, buffer, size) \ + Marshal(TPM_AT_MARSHAL_REF, (source), (buffer), (size)) +#define TPM_AE_Marshal(source, buffer, size) \ + Marshal(TPM_AE_MARSHAL_REF, (source), (buffer), (size)) +#define TPMS_AC_OUTPUT_Marshal(source, buffer, size) \ + Marshal(TPMS_AC_OUTPUT_MARSHAL_REF, (source), (buffer), (size)) +#define TPML_AC_CAPABILITIES_Marshal(source, buffer, size) \ + Marshal(TPML_AC_CAPABILITIES_MARSHAL_REF, (source), (buffer), (size)) + +#endif // _TABLE_MARSHAL_DEFINES_H_ diff --git a/TPMCmd/tpm/include/TableMarshalTypes.h b/TPMCmd/tpm/include/private/TableMarshalTypes.h similarity index 93% rename from TPMCmd/tpm/include/TableMarshalTypes.h rename to TPMCmd/tpm/include/private/TableMarshalTypes.h index 27abc6e6..14772a66 100644 --- a/TPMCmd/tpm/include/TableMarshalTypes.h +++ b/TPMCmd/tpm/include/private/TableMarshalTypes.h @@ -1,42 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by NewMarshal; Version 1.4 Apr 7, 2019 - * Date: Mar 6, 2020 Time: 01:50:10PM - */ - #ifndef _TABLE_MARSHAL_TYPES_H_ #define _TABLE_MARSHAL_TYPES_H_ @@ -165,6 +126,13 @@ typedef const struct AttributesMarshal_mst UINT32 attributeMask; // the values that must be zero. } AttributesMarshal_mst; +typedef const struct Attributes64Marshal_mst +{ + UINT8 unmarashalType; // ATTRIBUTE_MTYPE + UINT8 modifiers; // size (ONE_BYTES, TWO_BYTES, or FOUR_BYTES + UINT64 attributeMask; // the values that must be zero. +} Attributes64Marshal_mst; + typedef const struct CompositeMarshal_mst { UINT8 unmashalType; // COMPOSITE_MTYPE @@ -250,7 +218,7 @@ typedef const struct TPMI_DH_PARENT_mst UINT8 errorCode; UINT8 ranges; UINT8 singles; - UINT32 values[8]; + UINT32 values[20]; } TPMI_DH_PARENT_mst; typedef const struct TPMI_DH_PERSISTENT_mst @@ -330,8 +298,9 @@ typedef const struct TPMI_RH_HIERARCHY_mst UINT8 marshalType; UINT8 modifiers; UINT8 errorCode; - UINT8 entries; - UINT32 values[4]; + UINT8 ranges; + UINT8 singles; + UINT32 values[16]; } TPMI_RH_HIERARCHY_mst; typedef const struct TPMI_RH_ENABLES_mst @@ -362,6 +331,15 @@ typedef const struct TPMI_RH_HIERARCHY_POLICY_mst UINT32 values[6]; } TPMI_RH_HIERARCHY_POLICY_mst; +typedef const struct TPMI_RH_BASE_HIERARCHY_mst +{ + UINT8 marshalType; + UINT8 modifiers; + UINT8 errorCode; + UINT8 entries; + UINT32 values[3]; +} TPMI_RH_BASE_HIERARCHY_mst; + typedef const struct TPMI_RH_PLATFORM_mst { UINT8 marshalType; @@ -431,9 +409,37 @@ typedef const struct TPMI_RH_NV_INDEX_mst UINT8 marshalType; UINT8 modifiers; UINT8 errorCode; - UINT32 values[2]; + UINT8 ranges; + UINT8 singles; + UINT32 values[6]; } TPMI_RH_NV_INDEX_mst; +typedef const struct TPMI_RH_NV_DEFINED_INDEX_mst +{ + UINT8 marshalType; + UINT8 modifiers; + UINT8 errorCode; + UINT8 ranges; + UINT8 singles; + UINT32 values[4]; +} TPMI_RH_NV_DEFINED_INDEX_mst; + +typedef const struct TPMI_RH_LEGACY_NV_INDEX_mst +{ + UINT8 marshalType; + UINT8 modifiers; + UINT8 errorCode; + UINT32 values[2]; +} TPMI_RH_LEGACY_NV_INDEX_mst; + +typedef const struct TPMI_RH_NV_EXP_INDEX_mst +{ + UINT8 marshalType; + UINT8 modifiers; + UINT8 errorCode; + UINT32 values[2]; +} TPMI_RH_NV_EXP_INDEX_mst; + typedef const struct TPMI_RH_AC_mst { UINT8 marshalType; @@ -662,6 +668,28 @@ typedef const struct TPMS_CAPABILITY_DATA_mst UINT16 values[6]; } TPMS_CAPABILITY_DATA_mst; +typedef const struct TPMU_SET_CAPABILITIES_mst +{ + BYTE countOfselectors; + BYTE modifiers; + UINT16 offsetOfUnmarshalTypes; + UINT32 selectors[0]; + UINT16 marshalingTypes[0]; +} TPMU_SET_CAPABILITIES_mst; + +typedef const struct TPMS_SET_CAPABILITY_DATA_mst +{ + UINT8 marshalType; + UINT8 elements; + UINT16 values[6]; +} TPMS_SET_CAPABILITY_DATA_mst; + +typedef const struct TPM2B_SET_CAPABILITY_DATA_mst +{ + UINT8 marshalType; + UINT16 sizeIndex; +} TPM2B_SET_CAPABILITY_DATA_mst; + typedef const struct TPMS_CLOCK_INFO_mst { UINT8 marshalType; @@ -772,15 +800,6 @@ typedef const struct TPMS_AUTH_RESPONSE_mst UINT16 values[9]; } TPMS_AUTH_RESPONSE_mst; -typedef const struct TPMI_TDES_KEY_BITS_mst -{ - UINT8 marshalType; - UINT8 modifiers; - UINT8 errorCode; - UINT8 entries; - UINT32 values[1]; -} TPMI_TDES_KEY_BITS_mst; - typedef const struct TPMI_AES_KEY_BITS_mst { UINT8 marshalType; @@ -1014,7 +1033,7 @@ typedef const struct TPMI_ECC_CURVE_mst UINT8 marshalType; UINT8 modifiers; UINT8 errorCode; - UINT32 values[3]; + UINT32 values[4]; } TPMI_ECC_CURVE_mst; typedef const struct TPMT_ECC_SCHEME_mst @@ -1161,6 +1180,29 @@ typedef const struct TPMS_NV_PUBLIC_mst UINT16 values[15]; } TPMS_NV_PUBLIC_mst; +typedef const struct TPMS_NV_PUBLIC_EXP_ATTR_mst +{ + UINT8 marshalType; + UINT8 elements; + UINT16 values[15]; +} TPMS_NV_PUBLIC_EXP_ATTR_mst; + +typedef struct TPMU_NV_PUBLIC_2_mst +{ + BYTE countOfselectors; + BYTE modifiers; + UINT16 offsetOfUnmarshalTypes; + UINT32 selectors[3]; + UINT16 marshalingTypes[3]; +} TPMU_NV_PUBLIC_2_mst; + +typedef const struct TPMT_NV_PUBLIC_2_mst +{ + UINT8 marshalType; + UINT8 elements; + UINT16 values[6]; +} TPMT_NV_PUBLIC_2_mst; + typedef const struct TPMS_CONTEXT_DATA_mst { UINT8 marshalType; @@ -1472,6 +1514,7 @@ typedef const struct MarshalData_st TPMI_RH_ENABLES_mst TPMI_RH_ENABLES_DATA; TPMI_RH_HIERARCHY_AUTH_mst TPMI_RH_HIERARCHY_AUTH_DATA; TPMI_RH_HIERARCHY_POLICY_mst TPMI_RH_HIERARCHY_POLICY_DATA; + TPMI_RH_BASE_HIERARCHY_mst TPMI_RH_BASE_HIERARCHY_DATA; TPMI_RH_PLATFORM_mst TPMI_RH_PLATFORM_DATA; TPMI_RH_OWNER_mst TPMI_RH_OWNER_DATA; TPMI_RH_ENDORSEMENT_mst TPMI_RH_ENDORSEMENT_DATA; @@ -1480,6 +1523,9 @@ typedef const struct MarshalData_st TPMI_RH_NV_AUTH_mst TPMI_RH_NV_AUTH_DATA; TPMI_RH_LOCKOUT_mst TPMI_RH_LOCKOUT_DATA; TPMI_RH_NV_INDEX_mst TPMI_RH_NV_INDEX_DATA; + TPMI_RH_NV_DEFINED_INDEX_mst TPMI_RH_NV_DEFINED_INDEX_DATA; + TPMI_RH_LEGACY_NV_INDEX_mst TPMI_RH_LEGACY_NV_INDEX_DATA; + TPMI_RH_NV_EXP_INDEX_mst TPMI_RH_NV_EXP_INDEX_DATA; TPMI_RH_AC_mst TPMI_RH_AC_DATA; TPMI_RH_ACT_mst TPMI_RH_ACT_DATA; TPMI_ALG_HASH_mst TPMI_ALG_HASH_DATA; @@ -1532,6 +1578,9 @@ typedef const struct MarshalData_st ListMarshal_mst TPML_ACT_DATA_DATA; TPMU_CAPABILITIES_mst TPMU_CAPABILITIES_DATA; TPMS_CAPABILITY_DATA_mst TPMS_CAPABILITY_DATA_DATA; + TPMU_SET_CAPABILITIES_mst TPMU_SET_CAPABILITIES_DATA; + TPMS_SET_CAPABILITY_DATA_mst TPMS_SET_CAPABILITY_DATA_DATA; + TPM2B_SET_CAPABILITY_DATA_mst TPM2B_SET_CAPABILITY_DATA_DATA; TPMS_CLOCK_INFO_mst TPMS_CLOCK_INFO_DATA; TPMS_TIME_INFO_mst TPMS_TIME_INFO_DATA; TPMS_TIME_ATTEST_INFO_mst TPMS_TIME_ATTEST_INFO_DATA; @@ -1548,7 +1597,6 @@ typedef const struct MarshalData_st Tpm2bMarshal_mst TPM2B_ATTEST_DATA; TPMS_AUTH_COMMAND_mst TPMS_AUTH_COMMAND_DATA; TPMS_AUTH_RESPONSE_mst TPMS_AUTH_RESPONSE_DATA; - TPMI_TDES_KEY_BITS_mst TPMI_TDES_KEY_BITS_DATA; TPMI_AES_KEY_BITS_mst TPMI_AES_KEY_BITS_DATA; TPMI_SM4_KEY_BITS_mst TPMI_SM4_KEY_BITS_DATA; TPMI_CAMELLIA_KEY_BITS_mst TPMI_CAMELLIA_KEY_BITS_DATA; @@ -1614,8 +1662,13 @@ typedef const struct MarshalData_st Tpm2bMarshal_mst TPM2B_ID_OBJECT_DATA; TPMS_NV_PIN_COUNTER_PARAMETERS_mst TPMS_NV_PIN_COUNTER_PARAMETERS_DATA; AttributesMarshal_mst TPMA_NV_DATA; + Attributes64Marshal_mst TPMA_NV_EXP_DATA; TPMS_NV_PUBLIC_mst TPMS_NV_PUBLIC_DATA; Tpm2bsMarshal_mst TPM2B_NV_PUBLIC_DATA; + TPMS_NV_PUBLIC_EXP_ATTR_mst TPMS_NV_PUBLIC_EXP_ATTR_DATA; + TPMU_NV_PUBLIC_2_mst TPMU_NV_PUBLIC_2_DATA; + TPMT_NV_PUBLIC_2_mst TPMT_NV_PUBLIC_2_DATA; + Tpm2bsMarshal_mst TPM2B_NV_PUBLIC_2_DATA; Tpm2bMarshal_mst TPM2B_CONTEXT_SENSITIVE_DATA; TPMS_CONTEXT_DATA_mst TPMS_CONTEXT_DATA_DATA; Tpm2bMarshal_mst TPM2B_CONTEXT_DATA_DATA; diff --git a/TPMCmd/tpm/include/private/Tpm.h b/TPMCmd/tpm/include/private/Tpm.h new file mode 100644 index 00000000..cb410f75 --- /dev/null +++ b/TPMCmd/tpm/include/private/Tpm.h @@ -0,0 +1,17 @@ +// Root header file for building any TPM.lib code + +#ifndef _TPM_H_ +#define _TPM_H_ +// TODO_RENAME_INC_FOLDER: public refers to the TPM_CoreLib public headers +#include + +#include "TpmAlgorithmDefines.h" +#include "LibSupport.h" // Types from the library. These need to come before + // Global.h because some of the structures in + // that file depend on the structures used by the + // cryptographic libraries. +#include "GpMacros.h" // Define additional macros +#include "Global.h" // Define other TPM types +#include "InternalRoutines.h" // Function prototypes + +#endif // _TPM_H_ diff --git a/TPMCmd/tpm/include/private/TpmASN1.h b/TPMCmd/tpm/include/private/TpmASN1.h new file mode 100644 index 00000000..0818ca0d --- /dev/null +++ b/TPMCmd/tpm/include/private/TpmASN1.h @@ -0,0 +1,96 @@ +//** Introduction +// This file contains the macro and structure definitions for the X509 commands and +// functions. + +#ifndef _TPMASN1_H_ +#define _TPMASN1_H_ + +//** Includes + +#include "Tpm.h" +#include "OIDs.h" + +//** Defined Constants +//*** ASN.1 Universal Types (Class 00b) +#define ASN1_EOC 0x00 +#define ASN1_BOOLEAN 0x01 +#define ASN1_INTEGER 0x02 +#define ASN1_BITSTRING 0x03 +#define ASN1_OCTET_STRING 0x04 +#define ASN1_NULL 0x05 +#define ASN1_OBJECT_IDENTIFIER 0x06 +#define ASN1_OBJECT_DESCRIPTOR 0x07 +#define ASN1_EXTERNAL 0x08 +#define ASN1_REAL 0x09 +#define ASN1_ENUMERATED 0x0A +#define ASN1_EMBEDDED 0x0B +#define ASN1_UTF8String 0x0C +#define ASN1_RELATIVE_OID 0x0D +#define ASN1_SEQUENCE 0x10 // Primitive + Constructed + 0x10 +#define ASN1_SET 0x11 // Primitive + Constructed + 0x11 +#define ASN1_NumericString 0x12 +#define ASN1_PrintableString 0x13 +#define ASN1_T61String 0x14 +#define ASN1_VideoString 0x15 +#define ASN1_IA5String 0x16 +#define ASN1_UTCTime 0x17 +#define ASN1_GeneralizeTime 0x18 +#define ASN1_VisibleString 0x1A +#define ASN1_GeneralString 0x1B +#define ASN1_UniversalString 0x1C +#define ASN1_CHARACTER STRING 0x1D +#define ASN1_BMPString 0x1E +#define ASN1_CONSTRUCTED 0x20 + +#define ASN1_APPLICAIION_SPECIFIC 0xA0 + +#define ASN1_CONSTRUCTED_SEQUENCE (ASN1_SEQUENCE + ASN1_CONSTRUCTED) + +#define MAX_DEPTH 10 // maximum push depth for marshaling context. + +//** Macros + +//*** Unmarshaling Macros +#ifndef GOTO_ERROR_UNLESS +# error missing GOTO_ERROR_UNLESS definition +#endif + +// Checks the validity of the size making sure that there is no wrap around +#define CHECK_SIZE(context, length) \ + GOTO_ERROR_UNLESS((((length) + (context)->offset) >= (context)->offset) \ + && (((length) + (context)->offset) <= (context)->size)) +#define NEXT_OCTET(context) ((context)->buffer[(context)->offset++]) +#define PEEK_NEXT(context) ((context)->buffer[(context)->offset]) + +//*** Marshaling Macros + +// Marshaling works in reverse order. The offset is set to the top of the buffer and, +// as the buffer is filled, 'offset' counts down to zero. When the full thing is +// encoded it can be moved to the top of the buffer. This happens when the last +// context is closed. + +#define CHECK_SPACE(context, length) GOTO_ERROR_UNLESS(context->offset > length) + +//** Structures + +typedef struct ASN1UnmarshalContext +{ + BYTE* buffer; // pointer to the buffer + INT16 size; // size of the buffer (a negative number indicates + // a parsing failure). + INT16 offset; // current offset into the buffer (a negative number + // indicates a parsing failure). Not used + BYTE tag; // The last unmarshaled tag +} ASN1UnmarshalContext; + +typedef struct ASN1MarshalContext +{ + BYTE* buffer; // pointer to the start of the buffer + INT16 offset; // place on the top where the last entry was added + // items are added from the bottom up. + INT16 end; // the end offset of the current value + INT16 depth; // how many pushed end values. + INT16 ends[MAX_DEPTH]; +} ASN1MarshalContext; + +#endif // _TPMASN1_H_ diff --git a/TPMCmd/tpm/include/private/X509.h b/TPMCmd/tpm/include/private/X509.h new file mode 100644 index 00000000..4168f1dc --- /dev/null +++ b/TPMCmd/tpm/include/private/X509.h @@ -0,0 +1,98 @@ +//** Introduction +// This file contains the macro and structure definitions for the X509 commands and +// functions. + +#ifndef _X509_H_ +#define _X509_H_ + +//** Includes + +#include "Tpm.h" +#include "TpmASN1.h" + +//** Defined Constants + +//*** X509 Application-specific types +#define X509_SELECTION 0xA0 +#define X509_ISSUER_UNIQUE_ID 0xA1 +#define X509_SUBJECT_UNIQUE_ID 0xA2 +#define X509_EXTENSIONS 0xA3 + +// These defines give the order in which values appear in the TBScertificate +// of an x.509 certificate. These values are used to index into an array of +// +#define ENCODED_SIZE_REF 0 +#define VERSION_REF (ENCODED_SIZE_REF + 1) +#define SERIAL_NUMBER_REF (VERSION_REF + 1) +#define SIGNATURE_REF (SERIAL_NUMBER_REF + 1) +#define ISSUER_REF (SIGNATURE_REF + 1) +#define VALIDITY_REF (ISSUER_REF + 1) +#define SUBJECT_KEY_REF (VALIDITY_REF + 1) +#define SUBJECT_PUBLIC_KEY_REF (SUBJECT_KEY_REF + 1) +#define EXTENSIONS_REF (SUBJECT_PUBLIC_KEY_REF + 1) +#define REF_COUNT (EXTENSIONS_REF + 1) + +//** Structures + +// Used to access the fields of a TBSsignature some of which are in the in_CertifyX509 +// structure and some of which are in the out_CertifyX509 structure. +typedef struct stringRef +{ + BYTE* buf; + INT16 len; +} stringRef; + +// This is defined to avoid bit by bit comparisons within a UINT32 +typedef union x509KeyUsageUnion +{ + TPMA_X509_KEY_USAGE x509; + UINT32 integer; +} x509KeyUsageUnion; + +//** Global X509 Constants +// These values are instanced by X509_spt.c and referenced by other X509-related +// files. + +// This is the DER-encoded value for the Key Usage OID (2.5.29.15). This is the +// full OID, not just the numeric value +#define OID_KEY_USAGE_EXTENSION_VALUE 0x06, 0x03, 0x55, 0x1D, 0x0F +MAKE_OID(_KEY_USAGE_EXTENSION); + +// This is the DER-encoded value for the TCG-defined TPMA_OBJECT OID +// (2.23.133.10.1.1.1) +#define OID_TCG_TPMA_OBJECT_VALUE 0x06, 0x07, 0x67, 0x81, 0x05, 0x0a, 0x01, 0x01, 0x01 +MAKE_OID(_TCG_TPMA_OBJECT); + +#ifdef _X509_SPT_ +// If a bit is SET in KEY_USAGE_SIGN is also SET in keyUsage then +// the associated key has to have 'sign' SET. +const x509KeyUsageUnion KEY_USAGE_SIGN = {TPMA_X509_KEY_USAGE_INITIALIZER( + /* bits_at_0 */ 0, + /* decipheronly */ 0, + /* encipheronly */ 0, + /* crlsign */ 1, + /* keycertsign */ 1, + /* keyagreement */ 0, + /* dataencipherment */ 0, + /* keyencipherment */ 0, + /* nonrepudiation */ 0, + /* digitalsignature */ 1)}; +// If a bit is SET in KEY_USAGE_DECRYPT is also SET in keyUsage then +// the associated key has to have 'decrypt' SET. +const x509KeyUsageUnion KEY_USAGE_DECRYPT = {TPMA_X509_KEY_USAGE_INITIALIZER( + /* bits_at_0 */ 0, + /* decipheronly */ 1, + /* encipheronly */ 1, + /* crlsign */ 0, + /* keycertsign */ 0, + /* keyagreement */ 1, + /* dataencipherment */ 1, + /* keyencipherment */ 1, + /* nonrepudiation */ 0, + /* digitalsignature */ 0)}; +#else +extern x509KeyUsageUnion KEY_USAGE_SIGN; +extern x509KeyUsageUnion KEY_USAGE_DECRYPT; +#endif + +#endif // _X509_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/ACT_SetTimeout_fp.h b/TPMCmd/tpm/include/private/prototypes/ACT_SetTimeout_fp.h new file mode 100644 index 00000000..4f9dcbb9 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ACT_SetTimeout_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ACT_SetTimeout // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_ACT_SETTIMEOUT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_ACT_SETTIMEOUT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_ACT actHandle; + UINT32 startTimeout; +} ACT_SetTimeout_In; + +// Response code modifiers +# define RC_ACT_SetTimeout_actHandle (TPM_RC_H + TPM_RC_1) +# define RC_ACT_SetTimeout_startTimeout (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ACT_SetTimeout(ACT_SetTimeout_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_ACT_SETTIMEOUT_FP_H_ +#endif // CC_ACT_SetTimeout diff --git a/TPMCmd/tpm/include/private/prototypes/ACT_spt_fp.h b/TPMCmd/tpm/include/private/prototypes/ACT_spt_fp.h new file mode 100644 index 00000000..25d981b9 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ACT_spt_fp.h @@ -0,0 +1,52 @@ +/*(Auto-generated) + * Created by TpmPrototypes 1.00 + * Date: Oct 24, 2019 Time: 10:38:43AM + */ + +#ifndef _ACT_SPT_FP_H_ +#define _ACT_SPT_FP_H_ + +//*** ActStartup() +// This function is called by TPM2_Startup() to initialize the ACT counter values. +BOOL ActStartup(STARTUP_TYPE type); + +//*** ActGetSignaled() +// This function returns the state of the signaled flag associated with an ACT. +BOOL ActGetSignaled(TPM_RH actHandle); + +//***ActShutdown() +// This function saves the current state of the counters +BOOL ActShutdown(TPM_SU state //IN: the type of the shutdown. +); + +//*** ActIsImplemented() +// This function determines if an ACT is implemented in both the TPM and the platform +// code. +BOOL ActIsImplemented(UINT32 act); + +//***ActCounterUpdate() +// This function updates the ACT counter. If the counter already has a pending update, +// it returns TPM_RC_RETRY so that the update can be tried again later. +TPM_RC +ActCounterUpdate(TPM_RH handle, //IN: the handle of the act + UINT32 newValue //IN: the value to set in the ACT +); + +//*** ActGetCapabilityData() +// This function returns the list of ACT data +// Return Type: TPMI_YES_NO +// YES if more ACT data is available +// NO if no more ACT data to +TPMI_YES_NO +ActGetCapabilityData(TPM_HANDLE actHandle, // IN: the handle for the starting ACT + UINT32 maxCount, // IN: maximum allowed return values + TPML_ACT_DATA* actList // OUT: ACT data list +); + +//*** ActGetOneCapability() +// This function returns an ACT's capability, if present. +BOOL ActGetOneCapability(TPM_HANDLE actHandle, // IN: the handle for the ACT + TPMS_ACT_DATA* actData // OUT: ACT data +); + +#endif // _ACT_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/AC_GetCapability_fp.h b/TPMCmd/tpm/include/private/prototypes/AC_GetCapability_fp.h new file mode 100644 index 00000000..5719fa12 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/AC_GetCapability_fp.h @@ -0,0 +1,34 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_AC_GetCapability // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_AC_GETCAPABILITY_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_AC_GETCAPABILITY_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_AC ac; + TPM_AT capability; + UINT32 count; +} AC_GetCapability_In; + +// Output structure definition +typedef struct +{ + TPMI_YES_NO moreData; + TPML_AC_CAPABILITIES capabilitiesData; +} AC_GetCapability_Out; + +// Response code modifiers +# define RC_AC_GetCapability_ac (TPM_RC_H + TPM_RC_1) +# define RC_AC_GetCapability_capability (TPM_RC_P + TPM_RC_1) +# define RC_AC_GetCapability_count (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_AC_GetCapability(AC_GetCapability_In* in, AC_GetCapability_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_AC_GETCAPABILITY_FP_H_ +#endif // CC_AC_GetCapability diff --git a/TPMCmd/tpm/include/private/prototypes/AC_Send_fp.h b/TPMCmd/tpm/include/private/prototypes/AC_Send_fp.h new file mode 100644 index 00000000..4f980510 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/AC_Send_fp.h @@ -0,0 +1,35 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_AC_Send // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_AC_SEND_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_AC_SEND_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT sendObject; + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_AC ac; + TPM2B_MAX_BUFFER acDataIn; +} AC_Send_In; + +// Output structure definition +typedef struct +{ + TPMS_AC_OUTPUT acDataOut; +} AC_Send_Out; + +// Response code modifiers +# define RC_AC_Send_sendObject (TPM_RC_H + TPM_RC_1) +# define RC_AC_Send_authHandle (TPM_RC_H + TPM_RC_2) +# define RC_AC_Send_ac (TPM_RC_H + TPM_RC_3) +# define RC_AC_Send_acDataIn (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_AC_Send(AC_Send_In* in, AC_Send_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_AC_SEND_FP_H_ +#endif // CC_AC_Send diff --git a/TPMCmd/tpm/include/private/prototypes/AC_spt_fp.h b/TPMCmd/tpm/include/private/prototypes/AC_spt_fp.h new file mode 100644 index 00000000..403be825 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/AC_spt_fp.h @@ -0,0 +1,40 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 4, 2020 Time: 02:36:44PM + */ + +#ifndef _AC_SPT_FP_H_ +#define _AC_SPT_FP_H_ + +//*** AcToCapabilities() +// This function returns a pointer to a list of AC capabilities. +TPML_AC_CAPABILITIES* AcToCapabilities(TPMI_RH_AC component // IN: component +); + +//*** AcIsAccessible() +// Function to determine if an AC handle references an actual AC +// Return Type: BOOL +BOOL AcIsAccessible(TPM_HANDLE acHandle); + +//*** AcCapabilitiesGet() +// This function returns a list of capabilities associated with an AC +// Return Type: TPMI_YES_NO +// YES if there are more handles available +// NO all the available handles has been returned +TPMI_YES_NO +AcCapabilitiesGet(TPMI_RH_AC component, // IN: the component + TPM_AT type, // IN: start capability type + UINT32 count, // IN: requested number + TPML_AC_CAPABILITIES* capabilityList // OUT: list of handle +); + +//*** AcSendObject() +// Stub to handle sending of an AC object +// Return Type: TPM_RC +TPM_RC +AcSendObject(TPM_HANDLE acHandle, // IN: Handle of AC receiving object + OBJECT* object, // IN: object structure to send + TPMS_AC_OUTPUT* acDataOut // OUT: results of operation +); + +#endif // _AC_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/ActivateCredential_fp.h b/TPMCmd/tpm/include/private/prototypes/ActivateCredential_fp.h new file mode 100644 index 00000000..8d256725 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ActivateCredential_fp.h @@ -0,0 +1,35 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ActivateCredential // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_ACTIVATECREDENTIAL_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_ACTIVATECREDENTIAL_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT activateHandle; + TPMI_DH_OBJECT keyHandle; + TPM2B_ID_OBJECT credentialBlob; + TPM2B_ENCRYPTED_SECRET secret; +} ActivateCredential_In; + +// Output structure definition +typedef struct +{ + TPM2B_DIGEST certInfo; +} ActivateCredential_Out; + +// Response code modifiers +# define RC_ActivateCredential_activateHandle (TPM_RC_H + TPM_RC_1) +# define RC_ActivateCredential_keyHandle (TPM_RC_H + TPM_RC_2) +# define RC_ActivateCredential_credentialBlob (TPM_RC_P + TPM_RC_1) +# define RC_ActivateCredential_secret (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_ActivateCredential(ActivateCredential_In* in, ActivateCredential_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_ACTIVATECREDENTIAL_FP_H_ +#endif // CC_ActivateCredential diff --git a/TPMCmd/tpm/include/private/prototypes/AlgorithmCap_fp.h b/TPMCmd/tpm/include/private/prototypes/AlgorithmCap_fp.h new file mode 100644 index 00000000..3df36120 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/AlgorithmCap_fp.h @@ -0,0 +1,37 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _ALGORITHM_CAP_FP_H_ +#define _ALGORITHM_CAP_FP_H_ + +//** AlgorithmCapGetImplemented() +// This function is used by TPM2_GetCapability() to return a list of the +// implemented algorithms. +// +// Return Type: TPMI_YES_NO +// YES more algorithms to report +// NO no more algorithms to report +TPMI_YES_NO +AlgorithmCapGetImplemented(TPM_ALG_ID algID, // IN: the starting algorithm ID + UINT32 count, // IN: count of returned algorithms + TPML_ALG_PROPERTY* algList // OUT: algorithm list +); + +//** AlgorithmCapGetOneImplemented() +// This function returns whether a single algorithm was implemented, along +// with its properties (if implemented). +BOOL AlgorithmCapGetOneImplemented( + TPM_ALG_ID algID, // IN: the algorithm ID + TPMS_ALG_PROPERTY* algProperty // OUT: algorithm properties +); + +//** AlgorithmGetImplementedVector() +// This function returns the bit vector of the implemented algorithms. +LIB_EXPORT +void AlgorithmGetImplementedVector( + ALGORITHM_VECTOR* implemented // OUT: the implemented bits are SET +); + +#endif // _ALGORITHM_CAP_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/AlgorithmTests_fp.h b/TPMCmd/tpm/include/private/prototypes/AlgorithmTests_fp.h new file mode 100644 index 00000000..0354a106 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/AlgorithmTests_fp.h @@ -0,0 +1,35 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 4, 2020 Time: 02:36:44PM + */ + +#ifndef _ALGORITHM_TESTS_FP_H_ +#define _ALGORITHM_TESTS_FP_H_ + +#if ENABLE_SELF_TESTS + +//*** TestAlgorithm() +// Dispatches to the correct test function for the algorithm or gets a list of +// testable algorithms. +// +// If 'toTest' is not NULL, then the test decisions are based on the algorithm +// selections in 'toTest'. Otherwise, 'g_toTest' is used. When bits are clear in +// 'g_toTest' they will also be cleared 'toTest'. +// +// If there doesn't happen to be a test for the algorithm, its associated bit is +// quietly cleared. +// +// If 'alg' is zero (TPM_ALG_ERROR), then the toTest vector is cleared of any bits +// for which there is no test (i.e. no tests are actually run but the vector is +// cleared). +// +// Note: 'toTest' will only ever have bits set for implemented algorithms but 'alg' +// can be anything. +// Return Type: TPM_RC +// TPM_RC_CANCELED test was canceled +LIB_EXPORT +TPM_RC +TestAlgorithm(TPM_ALG_ID alg, ALGORITHM_VECTOR* toTest); +#endif // ENABLE_SELF_TESTS + +#endif // _ALGORITHM_TESTS_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Attest_spt_fp.h b/TPMCmd/tpm/include/private/prototypes/Attest_spt_fp.h new file mode 100644 index 00000000..24a81ab0 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Attest_spt_fp.h @@ -0,0 +1,50 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:18PM + */ + +#ifndef _ATTEST_SPT_FP_H_ +#define _ATTEST_SPT_FP_H_ + +//***FillInAttestInfo() +// Fill in common fields of TPMS_ATTEST structure. +void FillInAttestInfo( + TPMI_DH_OBJECT signHandle, // IN: handle of signing object + TPMT_SIG_SCHEME* scheme, // IN/OUT: scheme to be used for signing + TPM2B_DATA* data, // IN: qualifying data + TPMS_ATTEST* attest // OUT: attest structure +); + +//***SignAttestInfo() +// Sign a TPMS_ATTEST structure. If signHandle is TPM_RH_NULL, a null signature +// is returned. +// +// Return Type: TPM_RC +// TPM_RC_ATTRIBUTES 'signHandle' references not a signing key +// TPM_RC_SCHEME 'scheme' is not compatible with 'signHandle' type +// TPM_RC_VALUE digest generated for the given 'scheme' is greater than +// the modulus of 'signHandle' (for an RSA key); +// invalid commit status or failed to generate "r" value +// (for an ECC key) +TPM_RC +SignAttestInfo(OBJECT* signKey, // IN: sign object + TPMT_SIG_SCHEME* scheme, // IN: sign scheme + TPMS_ATTEST* certifyInfo, // IN: the data to be signed + TPM2B_DATA* qualifyingData, // IN: extra data for the signing + // process + TPM2B_ATTEST* attest, // OUT: marshaled attest blob to be + // signed + TPMT_SIGNATURE* signature // OUT: signature +); + +//*** IsSigningObject() +// Checks to see if the object is OK for signing. This is here rather than in +// Object_spt.c because all the attestation commands use this file but not +// Object_spt.c. +// Return Type: BOOL +// TRUE(1) object may sign +// FALSE(0) object may not sign +BOOL IsSigningObject(OBJECT* object // IN: +); + +#endif // _ATTEST_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Bits_fp.h b/TPMCmd/tpm/include/private/prototypes/Bits_fp.h new file mode 100644 index 00000000..a4dffc6b --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Bits_fp.h @@ -0,0 +1,33 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _BITS_FP_H_ +#define _BITS_FP_H_ + +//*** TestBit() +// This function is used to check the setting of a bit in an array of bits. +// Return Type: BOOL +// TRUE(1) bit is set +// FALSE(0) bit is not set +BOOL TestBit(unsigned int bitNum, // IN: number of the bit in 'bArray' + BYTE* bArray, // IN: array containing the bits + unsigned int bytesInArray // IN: size in bytes of 'bArray' +); + +//*** SetBit() +// This function will set the indicated bit in 'bArray'. +void SetBit(unsigned int bitNum, // IN: number of the bit in 'bArray' + BYTE* bArray, // IN: array containing the bits + unsigned int bytesInArray // IN: size in bytes of 'bArray' +); + +//*** ClearBit() +// This function will clear the indicated bit in 'bArray'. +void ClearBit(unsigned int bitNum, // IN: number of the bit in 'bArray'. + BYTE* bArray, // IN: array containing the bits + unsigned int bytesInArray // IN: size in bytes of 'bArray' +); + +#endif // _BITS_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CertifyCreation_fp.h b/TPMCmd/tpm/include/private/prototypes/CertifyCreation_fp.h new file mode 100644 index 00000000..9b0149a1 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CertifyCreation_fp.h @@ -0,0 +1,40 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_CertifyCreation // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CERTIFYCREATION_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CERTIFYCREATION_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT signHandle; + TPMI_DH_OBJECT objectHandle; + TPM2B_DATA qualifyingData; + TPM2B_DIGEST creationHash; + TPMT_SIG_SCHEME inScheme; + TPMT_TK_CREATION creationTicket; +} CertifyCreation_In; + +// Output structure definition +typedef struct +{ + TPM2B_ATTEST certifyInfo; + TPMT_SIGNATURE signature; +} CertifyCreation_Out; + +// Response code modifiers +# define RC_CertifyCreation_signHandle (TPM_RC_H + TPM_RC_1) +# define RC_CertifyCreation_objectHandle (TPM_RC_H + TPM_RC_2) +# define RC_CertifyCreation_qualifyingData (TPM_RC_P + TPM_RC_1) +# define RC_CertifyCreation_creationHash (TPM_RC_P + TPM_RC_2) +# define RC_CertifyCreation_inScheme (TPM_RC_P + TPM_RC_3) +# define RC_CertifyCreation_creationTicket (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_CertifyCreation(CertifyCreation_In* in, CertifyCreation_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CERTIFYCREATION_FP_H_ +#endif // CC_CertifyCreation diff --git a/TPMCmd/tpm/include/private/prototypes/CertifyX509_fp.h b/TPMCmd/tpm/include/private/prototypes/CertifyX509_fp.h new file mode 100644 index 00000000..19c6577f --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CertifyX509_fp.h @@ -0,0 +1,39 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_CertifyX509 // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CERTIFYX509_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CERTIFYX509_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT objectHandle; + TPMI_DH_OBJECT signHandle; + TPM2B_DATA reserved; + TPMT_SIG_SCHEME inScheme; + TPM2B_MAX_BUFFER partialCertificate; +} CertifyX509_In; + +// Output structure definition +typedef struct +{ + TPM2B_MAX_BUFFER addedToCertificate; + TPM2B_DIGEST tbsDigest; + TPMT_SIGNATURE signature; +} CertifyX509_Out; + +// Response code modifiers +# define RC_CertifyX509_objectHandle (TPM_RC_H + TPM_RC_1) +# define RC_CertifyX509_signHandle (TPM_RC_H + TPM_RC_2) +# define RC_CertifyX509_reserved (TPM_RC_P + TPM_RC_1) +# define RC_CertifyX509_inScheme (TPM_RC_P + TPM_RC_2) +# define RC_CertifyX509_partialCertificate (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_CertifyX509(CertifyX509_In* in, CertifyX509_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CERTIFYX509_FP_H_ +#endif // CC_CertifyX509 diff --git a/TPMCmd/tpm/include/private/prototypes/Certify_fp.h b/TPMCmd/tpm/include/private/prototypes/Certify_fp.h new file mode 100644 index 00000000..f904a7f9 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Certify_fp.h @@ -0,0 +1,36 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Certify // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CERTIFY_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CERTIFY_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT objectHandle; + TPMI_DH_OBJECT signHandle; + TPM2B_DATA qualifyingData; + TPMT_SIG_SCHEME inScheme; +} Certify_In; + +// Output structure definition +typedef struct +{ + TPM2B_ATTEST certifyInfo; + TPMT_SIGNATURE signature; +} Certify_Out; + +// Response code modifiers +# define RC_Certify_objectHandle (TPM_RC_H + TPM_RC_1) +# define RC_Certify_signHandle (TPM_RC_H + TPM_RC_2) +# define RC_Certify_qualifyingData (TPM_RC_P + TPM_RC_1) +# define RC_Certify_inScheme (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_Certify(Certify_In* in, Certify_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CERTIFY_FP_H_ +#endif // CC_Certify diff --git a/TPMCmd/tpm/include/private/prototypes/ChangeEPS_fp.h b/TPMCmd/tpm/include/private/prototypes/ChangeEPS_fp.h new file mode 100644 index 00000000..23d90d54 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ChangeEPS_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ChangeEPS // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CHANGEEPS_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CHANGEEPS_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PLATFORM authHandle; +} ChangeEPS_In; + +// Response code modifiers +# define RC_ChangeEPS_authHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ChangeEPS(ChangeEPS_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CHANGEEPS_FP_H_ +#endif // CC_ChangeEPS diff --git a/TPMCmd/tpm/include/private/prototypes/ChangePPS_fp.h b/TPMCmd/tpm/include/private/prototypes/ChangePPS_fp.h new file mode 100644 index 00000000..9371d5e4 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ChangePPS_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ChangePPS // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CHANGEPPS_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CHANGEPPS_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PLATFORM authHandle; +} ChangePPS_In; + +// Response code modifiers +# define RC_ChangePPS_authHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ChangePPS(ChangePPS_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CHANGEPPS_FP_H_ +#endif // CC_ChangePPS diff --git a/TPMCmd/tpm/include/private/prototypes/ClearControl_fp.h b/TPMCmd/tpm/include/private/prototypes/ClearControl_fp.h new file mode 100644 index 00000000..b38aaed9 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ClearControl_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ClearControl // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLEARCONTROL_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLEARCONTROL_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_CLEAR auth; + TPMI_YES_NO disable; +} ClearControl_In; + +// Response code modifiers +# define RC_ClearControl_auth (TPM_RC_H + TPM_RC_1) +# define RC_ClearControl_disable (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ClearControl(ClearControl_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLEARCONTROL_FP_H_ +#endif // CC_ClearControl diff --git a/TPMCmd/tpm/include/private/prototypes/Clear_fp.h b/TPMCmd/tpm/include/private/prototypes/Clear_fp.h new file mode 100644 index 00000000..4808899f --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Clear_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Clear // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLEAR_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLEAR_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_CLEAR authHandle; +} Clear_In; + +// Response code modifiers +# define RC_Clear_authHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_Clear(Clear_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLEAR_FP_H_ +#endif // CC_Clear diff --git a/TPMCmd/tpm/include/private/prototypes/ClockRateAdjust_fp.h b/TPMCmd/tpm/include/private/prototypes/ClockRateAdjust_fp.h new file mode 100644 index 00000000..ef284f7e --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ClockRateAdjust_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ClockRateAdjust // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLOCKRATEADJUST_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLOCKRATEADJUST_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PROVISION auth; + TPM_CLOCK_ADJUST rateAdjust; +} ClockRateAdjust_In; + +// Response code modifiers +# define RC_ClockRateAdjust_auth (TPM_RC_H + TPM_RC_1) +# define RC_ClockRateAdjust_rateAdjust (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ClockRateAdjust(ClockRateAdjust_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLOCKRATEADJUST_FP_H_ +#endif // CC_ClockRateAdjust diff --git a/TPMCmd/tpm/include/private/prototypes/ClockSet_fp.h b/TPMCmd/tpm/include/private/prototypes/ClockSet_fp.h new file mode 100644 index 00000000..c4a34384 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ClockSet_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ClockSet // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLOCKSET_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLOCKSET_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PROVISION auth; + UINT64 newTime; +} ClockSet_In; + +// Response code modifiers +# define RC_ClockSet_auth (TPM_RC_H + TPM_RC_1) +# define RC_ClockSet_newTime (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ClockSet(ClockSet_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CLOCKSET_FP_H_ +#endif // CC_ClockSet diff --git a/TPMCmd/tpm/include/private/prototypes/CommandAudit_fp.h b/TPMCmd/tpm/include/private/prototypes/CommandAudit_fp.h new file mode 100644 index 00000000..ebfea220 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CommandAudit_fp.h @@ -0,0 +1,88 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 04:23:27PM + */ + +#ifndef _COMMAND_AUDIT_FP_H_ +#define _COMMAND_AUDIT_FP_H_ + +//*** CommandAuditPreInstall_Init() +// This function initializes the command audit list. This function simulates +// the behavior of manufacturing. A function is used instead of a structure +// definition because this is easier than figuring out the initialization value +// for a bit array. +// +// This function would not be implemented outside of a manufacturing or +// simulation environment. +void CommandAuditPreInstall_Init(void); + +//*** CommandAuditStartup() +// This function clears the command audit digest on a TPM Reset. +BOOL CommandAuditStartup(STARTUP_TYPE type // IN: start up type +); + +//*** CommandAuditSet() +// This function will SET the audit flag for a command. This function +// will not SET the audit flag for a command that is not implemented. This +// ensures that the audit status is not SET when TPM2_GetCapability() is +// used to read the list of audited commands. +// +// This function is only used by TPM2_SetCommandCodeAuditStatus(). +// +// The actions in TPM2_SetCommandCodeAuditStatus() are expected to cause the +// changes to be saved to NV after it is setting and clearing bits. +// Return Type: BOOL +// TRUE(1) command code audit status was changed +// FALSE(0) command code audit status was not changed +BOOL CommandAuditSet(TPM_CC commandCode // IN: command code +); + +//*** CommandAuditClear() +// This function will CLEAR the audit flag for a command. It will not CLEAR the +// audit flag for TPM_CC_SetCommandCodeAuditStatus(). +// +// This function is only used by TPM2_SetCommandCodeAuditStatus(). +// +// The actions in TPM2_SetCommandCodeAuditStatus() are expected to cause the +// changes to be saved to NV after it is setting and clearing bits. +// Return Type: BOOL +// TRUE(1) command code audit status was changed +// FALSE(0) command code audit status was not changed +BOOL CommandAuditClear(TPM_CC commandCode // IN: command code +); + +//*** CommandAuditIsRequired() +// This function indicates if the audit flag is SET for a command. +// Return Type: BOOL +// TRUE(1) command is audited +// FALSE(0) command is not audited +BOOL CommandAuditIsRequired(COMMAND_INDEX commandIndex // IN: command index +); + +//*** CommandAuditCapGetCCList() +// This function returns a list of commands that have their audit bit SET. +// +// The list starts at the input commandCode. +// Return Type: TPMI_YES_NO +// YES if there are more command code available +// NO all the available command code has been returned +TPMI_YES_NO +CommandAuditCapGetCCList(TPM_CC commandCode, // IN: start command code + UINT32 count, // IN: count of returned TPM_CC + TPML_CC* commandList // OUT: list of TPM_CC +); + +//*** CommandAuditCapGetOneCC() +// This function returns true if a command has its audit bit set. +BOOL CommandAuditCapGetOneCC(TPM_CC commandCode // IN: command code +); + +//*** CommandAuditGetDigest +// This command is used to create a digest of the commands being audited. The +// commands are processed in ascending numeric order with a list of TPM_CC being +// added to a hash. This operates as if all the audited command codes were +// concatenated and then hashed. +void CommandAuditGetDigest(TPM2B_DIGEST* digest // OUT: command digest +); + +#endif // _COMMAND_AUDIT_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CommandCodeAttributes_fp.h b/TPMCmd/tpm/include/private/prototypes/CommandCodeAttributes_fp.h new file mode 100644 index 00000000..1c661a7e --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CommandCodeAttributes_fp.h @@ -0,0 +1,134 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _COMMAND_CODE_ATTRIBUTES_FP_H_ +#define _COMMAND_CODE_ATTRIBUTES_FP_H_ + +//*** GetClosestCommandIndex() +// This function returns the command index for the command with a value that is +// equal to or greater than the input value +// Return Type: COMMAND_INDEX +// UNIMPLEMENTED_COMMAND_INDEX command is not implemented +// other index of a command +COMMAND_INDEX +GetClosestCommandIndex(TPM_CC commandCode // IN: the command code to start at +); + +//*** CommandCodeToComandIndex() +// This function returns the index in the various attributes arrays of the +// command. +// Return Type: COMMAND_INDEX +// UNIMPLEMENTED_COMMAND_INDEX command is not implemented +// other index of the command +COMMAND_INDEX +CommandCodeToCommandIndex(TPM_CC commandCode // IN: the command code to look up +); + +//*** GetNextCommandIndex() +// This function returns the index of the next implemented command. +// Return Type: COMMAND_INDEX +// UNIMPLEMENTED_COMMAND_INDEX no more implemented commands +// other the index of the next implemented command +COMMAND_INDEX +GetNextCommandIndex(COMMAND_INDEX commandIndex // IN: the starting index +); + +//*** GetCommandCode() +// This function returns the commandCode associated with the command index +TPM_CC +GetCommandCode(COMMAND_INDEX commandIndex // IN: the command index +); + +//*** CommandAuthRole() +// +// This function returns the authorization role required of a handle. +// +// Return Type: AUTH_ROLE +// AUTH_NONE no authorization is required +// AUTH_USER user role authorization is required +// AUTH_ADMIN admin role authorization is required +// AUTH_DUP duplication role authorization is required +AUTH_ROLE +CommandAuthRole(COMMAND_INDEX commandIndex, // IN: command index + UINT32 handleIndex // IN: handle index (zero based) +); + +//*** EncryptSize() +// This function returns the size of the decrypt size field. This function returns +// 0 if encryption is not allowed +// Return Type: int +// 0 encryption not allowed +// 2 size field is two bytes +// 4 size field is four bytes +int EncryptSize(COMMAND_INDEX commandIndex // IN: command index +); + +//*** DecryptSize() +// This function returns the size of the decrypt size field. This function returns +// 0 if decryption is not allowed +// Return Type: int +// 0 encryption not allowed +// 2 size field is two bytes +// 4 size field is four bytes +int DecryptSize(COMMAND_INDEX commandIndex // IN: command index +); + +//*** IsSessionAllowed() +// +// This function indicates if the command is allowed to have sessions. +// +// This function must not be called if the command is not known to be implemented. +// +// Return Type: BOOL +// TRUE(1) session is allowed with this command +// FALSE(0) session is not allowed with this command +BOOL IsSessionAllowed(COMMAND_INDEX commandIndex // IN: the command to be checked +); + +//*** IsHandleInResponse() +// This function determines if a command has a handle in the response +BOOL IsHandleInResponse(COMMAND_INDEX commandIndex); + +//*** IsWriteOperation() +// Checks to see if an operation will write to an NV Index and is subject to being +// blocked by read-lock +BOOL IsWriteOperation(COMMAND_INDEX commandIndex // IN: Command to check +); + +//*** IsReadOperation() +// Checks to see if an operation will write to an NV Index and is +// subject to being blocked by write-lock. +BOOL IsReadOperation(COMMAND_INDEX commandIndex // IN: Command to check +); + +//*** CommandCapGetCCList() +// This function returns a list of implemented commands and command attributes +// starting from the command in 'commandCode'. +// Return Type: TPMI_YES_NO +// YES more command attributes are available +// NO no more command attributes are available +TPMI_YES_NO +CommandCapGetCCList(TPM_CC commandCode, // IN: start command code + UINT32 count, // IN: maximum count for number of entries in + // 'commandList' + TPML_CCA* commandList // OUT: list of TPMA_CC +); + +//*** CommandCapGetOneCC() +// This function checks whether a command is implemented, and returns its +// attributes if so. +BOOL CommandCapGetOneCC(TPM_CC commandCode, // IN: command code + TPMA_CC* commandAttributes // OUT: Command attributes +); + +//*** IsVendorCommand() +// Function indicates if a command index references a vendor command. +// Return Type: BOOL +// TRUE(1) command is a vendor command +// FALSE(0) command is not a vendor command +BOOL IsVendorCommand(COMMAND_INDEX commandIndex // IN: command index to check +); + +#endif // _COMMAND_CODE_ATTRIBUTES_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CommandDispatcher_fp.h b/TPMCmd/tpm/include/private/prototypes/CommandDispatcher_fp.h new file mode 100644 index 00000000..34ad4e33 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CommandDispatcher_fp.h @@ -0,0 +1,20 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 7, 2020 Time: 07:06:44PM + */ + +#ifndef _COMMAND_DISPATCHER_FP_H_ +#define _COMMAND_DISPATCHER_FP_H_ + +//** ParseHandleBuffer() +// This is the table-driven version of the handle buffer unmarshaling code +TPM_RC +ParseHandleBuffer(COMMAND* command); + +//** CommandDispatcher() +// Function to unmarshal the command parameters, call the selected action code, and +// marshal the response parameters. +TPM_RC +CommandDispatcher(COMMAND* command); + +#endif // _COMMAND_DISPATCHER_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Commit_fp.h b/TPMCmd/tpm/include/private/prototypes/Commit_fp.h new file mode 100644 index 00000000..3491f48f --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Commit_fp.h @@ -0,0 +1,38 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Commit // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_COMMIT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_COMMIT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT signHandle; + TPM2B_ECC_POINT P1; + TPM2B_SENSITIVE_DATA s2; + TPM2B_ECC_PARAMETER y2; +} Commit_In; + +// Output structure definition +typedef struct +{ + TPM2B_ECC_POINT K; + TPM2B_ECC_POINT L; + TPM2B_ECC_POINT E; + UINT16 counter; +} Commit_Out; + +// Response code modifiers +# define RC_Commit_signHandle (TPM_RC_H + TPM_RC_1) +# define RC_Commit_P1 (TPM_RC_P + TPM_RC_1) +# define RC_Commit_s2 (TPM_RC_P + TPM_RC_2) +# define RC_Commit_y2 (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_Commit(Commit_In* in, Commit_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_COMMIT_FP_H_ +#endif // CC_Commit diff --git a/TPMCmd/tpm/include/private/prototypes/ContextLoad_fp.h b/TPMCmd/tpm/include/private/prototypes/ContextLoad_fp.h new file mode 100644 index 00000000..1ba971e9 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ContextLoad_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ContextLoad // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CONTEXTLOAD_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CONTEXTLOAD_FP_H_ + +// Input structure definition +typedef struct +{ + TPMS_CONTEXT context; +} ContextLoad_In; + +// Output structure definition +typedef struct +{ + TPMI_DH_CONTEXT loadedHandle; +} ContextLoad_Out; + +// Response code modifiers +# define RC_ContextLoad_context (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ContextLoad(ContextLoad_In* in, ContextLoad_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CONTEXTLOAD_FP_H_ +#endif // CC_ContextLoad diff --git a/TPMCmd/tpm/include/private/prototypes/ContextSave_fp.h b/TPMCmd/tpm/include/private/prototypes/ContextSave_fp.h new file mode 100644 index 00000000..10e05f0c --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ContextSave_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ContextSave // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CONTEXTSAVE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CONTEXTSAVE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_CONTEXT saveHandle; +} ContextSave_In; + +// Output structure definition +typedef struct +{ + TPMS_CONTEXT context; +} ContextSave_Out; + +// Response code modifiers +# define RC_ContextSave_saveHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ContextSave(ContextSave_In* in, ContextSave_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CONTEXTSAVE_FP_H_ +#endif // CC_ContextSave diff --git a/TPMCmd/tpm/include/private/prototypes/Context_spt_fp.h b/TPMCmd/tpm/include/private/prototypes/Context_spt_fp.h new file mode 100644 index 00000000..7e86c44d --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Context_spt_fp.h @@ -0,0 +1,70 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:18PM + */ + +#ifndef _CONTEXT_SPT_FP_H_ +#define _CONTEXT_SPT_FP_H_ + +//*** ComputeContextProtectionKey() +// This function retrieves the symmetric protection key for context encryption +// It is used by TPM2_ConextSave and TPM2_ContextLoad to create the symmetric +// encryption key and iv +// Return Type: TPM_RC +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects or the TPM failed +// to derive the Firmware Secret. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the TPM +// failed to derive the Firmware SVN Secret for the +// requested SVN. +TPM_RC ComputeContextProtectionKey(TPMS_CONTEXT* contextBlob, // IN: context blob + TPM2B_SYM_KEY* symKey, // OUT: the symmetric key + TPM2B_IV* iv // OUT: the IV. +); + +//*** ComputeContextIntegrity() +// Generate the integrity hash for a context +// It is used by TPM2_ContextSave to create an integrity hash +// and by TPM2_ContextLoad to compare an integrity hash +// Return Type: TPM_RC +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects or the TPM failed +// to derive the Firmware Secret. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the TPM +// failed to derive the Firmware SVN Secret for the +// requested SVN. +TPM_RC ComputeContextIntegrity(TPMS_CONTEXT* contextBlob, // IN: context blob + TPM2B_DIGEST* integrity // OUT: integrity +); + +//*** SequenceDataExport() +// This function is used scan through the sequence object and +// either modify the hash state data for export (contextSave) or to +// import it into the internal format (contextLoad). +// This function should only be called after the sequence object has been copied +// to the context buffer (contextSave) or from the context buffer into the sequence +// object. The presumption is that the context buffer version of the data is the +// same size as the internal representation so nothing outsize of the hash context +// area gets modified. +void SequenceDataExport( + HASH_OBJECT* object, // IN: an internal hash object + HASH_OBJECT_BUFFER* exportObject // OUT: a sequence context in a buffer +); + +//*** SequenceDataImport() +// This function is used scan through the sequence object and +// either modify the hash state data for export (contextSave) or to +// import it into the internal format (contextLoad). +// This function should only be called after the sequence object has been copied +// to the context buffer (contextSave) or from the context buffer into the sequence +// object. The presumption is that the context buffer version of the data is the +// same size as the internal representation so nothing outsize of the hash context +// area gets modified. +void SequenceDataImport( + HASH_OBJECT* object, // IN/OUT: an internal hash object + HASH_OBJECT_BUFFER* exportObject // IN/OUT: a sequence context in a buffer +); + +#endif // _CONTEXT_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CreateLoaded_fp.h b/TPMCmd/tpm/include/private/prototypes/CreateLoaded_fp.h new file mode 100644 index 00000000..e661d802 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CreateLoaded_fp.h @@ -0,0 +1,36 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_CreateLoaded // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CREATELOADED_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CREATELOADED_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_PARENT parentHandle; + TPM2B_SENSITIVE_CREATE inSensitive; + TPM2B_TEMPLATE inPublic; +} CreateLoaded_In; + +// Output structure definition +typedef struct +{ + TPM_HANDLE objectHandle; + TPM2B_PRIVATE outPrivate; + TPM2B_PUBLIC outPublic; + TPM2B_NAME name; +} CreateLoaded_Out; + +// Response code modifiers +# define RC_CreateLoaded_parentHandle (TPM_RC_H + TPM_RC_1) +# define RC_CreateLoaded_inSensitive (TPM_RC_P + TPM_RC_1) +# define RC_CreateLoaded_inPublic (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_CreateLoaded(CreateLoaded_In* in, CreateLoaded_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CREATELOADED_FP_H_ +#endif // CC_CreateLoaded diff --git a/TPMCmd/tpm/include/private/prototypes/CreatePrimary_fp.h b/TPMCmd/tpm/include/private/prototypes/CreatePrimary_fp.h new file mode 100644 index 00000000..e58113ac --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CreatePrimary_fp.h @@ -0,0 +1,42 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_CreatePrimary // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CREATEPRIMARY_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CREATEPRIMARY_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_HIERARCHY primaryHandle; + TPM2B_SENSITIVE_CREATE inSensitive; + TPM2B_PUBLIC inPublic; + TPM2B_DATA outsideInfo; + TPML_PCR_SELECTION creationPCR; +} CreatePrimary_In; + +// Output structure definition +typedef struct +{ + TPM_HANDLE objectHandle; + TPM2B_PUBLIC outPublic; + TPM2B_CREATION_DATA creationData; + TPM2B_DIGEST creationHash; + TPMT_TK_CREATION creationTicket; + TPM2B_NAME name; +} CreatePrimary_Out; + +// Response code modifiers +# define RC_CreatePrimary_primaryHandle (TPM_RC_H + TPM_RC_1) +# define RC_CreatePrimary_inSensitive (TPM_RC_P + TPM_RC_1) +# define RC_CreatePrimary_inPublic (TPM_RC_P + TPM_RC_2) +# define RC_CreatePrimary_outsideInfo (TPM_RC_P + TPM_RC_3) +# define RC_CreatePrimary_creationPCR (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_CreatePrimary(CreatePrimary_In* in, CreatePrimary_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CREATEPRIMARY_FP_H_ +#endif // CC_CreatePrimary diff --git a/TPMCmd/tpm/include/private/prototypes/Create_fp.h b/TPMCmd/tpm/include/private/prototypes/Create_fp.h new file mode 100644 index 00000000..2daf5629 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Create_fp.h @@ -0,0 +1,41 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Create // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_CREATE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_CREATE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT parentHandle; + TPM2B_SENSITIVE_CREATE inSensitive; + TPM2B_PUBLIC inPublic; + TPM2B_DATA outsideInfo; + TPML_PCR_SELECTION creationPCR; +} Create_In; + +// Output structure definition +typedef struct +{ + TPM2B_PRIVATE outPrivate; + TPM2B_PUBLIC outPublic; + TPM2B_CREATION_DATA creationData; + TPM2B_DIGEST creationHash; + TPMT_TK_CREATION creationTicket; +} Create_Out; + +// Response code modifiers +# define RC_Create_parentHandle (TPM_RC_H + TPM_RC_1) +# define RC_Create_inSensitive (TPM_RC_P + TPM_RC_1) +# define RC_Create_inPublic (TPM_RC_P + TPM_RC_2) +# define RC_Create_outsideInfo (TPM_RC_P + TPM_RC_3) +# define RC_Create_creationPCR (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_Create(Create_In* in, Create_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_CREATE_FP_H_ +#endif // CC_Create diff --git a/TPMCmd/tpm/include/private/prototypes/CryptCmac_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptCmac_fp.h new file mode 100644 index 00000000..ae27a5a8 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CryptCmac_fp.h @@ -0,0 +1,37 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:18PM + */ + +#ifndef _CRYPT_CMAC_FP_H_ +#define _CRYPT_CMAC_FP_H_ + +#if ALG_CMAC + +//*** CryptCmacStart() +// This is the function to start the CMAC sequence operation. It initializes the +// dispatch functions for the data and end operations for CMAC and initializes the +// parameters that are used for the processing of data, including the key, key size +// and block cipher algorithm. +UINT16 +CryptCmacStart( + SMAC_STATE* state, TPMU_PUBLIC_PARMS* keyParms, TPM_ALG_ID macAlg, TPM2B* key); + +//*** CryptCmacData() +// This function is used to add data to the CMAC sequence computation. The function +// will XOR new data into the IV. If the buffer is full, and there is additional +// input data, the data is encrypted into the IV buffer, the new data is then +// XOR into the IV. When the data runs out, the function returns without encrypting +// even if the buffer is full. The last data block of a sequence will not be +// encrypted until the call to CryptCmacEnd(). This is to allow the proper subkey +// to be computed and applied before the last block is encrypted. +void CryptCmacData(SMAC_STATES* state, UINT32 size, const BYTE* buffer); + +//*** CryptCmacEnd() +// This is the completion function for the CMAC. It does padding, if needed, and +// selects the subkey to be applied before the last block is encrypted. +UINT16 +CryptCmacEnd(SMAC_STATES* state, UINT32 outSize, BYTE* outBuffer); +#endif + +#endif // _CRYPT_CMAC_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CryptEccCrypt_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptEccCrypt_fp.h new file mode 100644 index 00000000..d0cc350b --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CryptEccCrypt_fp.h @@ -0,0 +1,60 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Feb 28, 2020 Time: 03:04:48PM + */ + +#ifndef _CRYPT_ECC_CRYPT_FP_H_ +#define _CRYPT_ECC_CRYPT_FP_H_ + +#if CC_ECC_Encrypt || CC_ECC_Encrypt + +//*** CryptEccSelectScheme() +// This function is used by TPM2_ECC_Decrypt and TPM2_ECC_Encrypt. It sets scheme +// either the input scheme or the key scheme. If they key scheme is not TPM_ALG_NULL +// then the input scheme must be TPM_ALG_NULL or the same as the key scheme. If +// not, then the function returns FALSE. +// Return Type: BOOL +// TRUE 'scheme' is set +// FALSE 'scheme' is not valid (it may have been changed). +BOOL CryptEccSelectScheme(OBJECT* key, //IN: key containing default scheme + TPMT_KDF_SCHEME* scheme // IN: a decrypt scheme +); + +//*** CryptEccEncrypt() +//This function performs ECC-based data obfuscation. The only scheme that is currently +// supported is MGF1 based. See Part 1, Annex D for details. +// Return Type: TPM_RC +// TPM_RC_CURVE unsupported curve +// TPM_RC_HASH hash not allowed +// TPM_RC_SCHEME 'scheme' is not supported +// TPM_RC_NO_RESULT internal error in big number processing +LIB_EXPORT TPM_RC CryptEccEncrypt( + OBJECT* key, // IN: public key of recipient + TPMT_KDF_SCHEME* scheme, // IN: scheme to use. + TPM2B_MAX_BUFFER* plainText, // IN: the text to obfuscate + TPMS_ECC_POINT* c1, // OUT: public ephemeral key + TPM2B_MAX_BUFFER* c2, // OUT: obfuscated text + TPM2B_DIGEST* c3 // OUT: digest of ephemeral key + // and plainText +); + +//*** CryptEccDecrypt() +// This function performs ECC decryption and integrity check of the input data. +// Return Type: TPM_RC +// TPM_RC_CURVE unsupported curve +// TPM_RC_HASH hash not allowed +// TPM_RC_SCHEME 'scheme' is not supported +// TPM_RC_NO_RESULT internal error in big number processing +// TPM_RC_VALUE C3 did not match hash of recovered data +LIB_EXPORT TPM_RC CryptEccDecrypt( + OBJECT* key, // IN: key used for data recovery + TPMT_KDF_SCHEME* scheme, // IN: scheme to use. + TPM2B_MAX_BUFFER* plainText, // OUT: the recovered text + TPMS_ECC_POINT* c1, // IN: public ephemeral key + TPM2B_MAX_BUFFER* c2, // IN: obfuscated text + TPM2B_DIGEST* c3 // IN: digest of ephemeral key + // and plainText +); +#endif // CC_ECC_Encrypt || CC_ECC_Encrypt + +#endif // _CRYPT_ECC_CRYPT_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CryptEccKeyExchange_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptEccKeyExchange_fp.h new file mode 100644 index 00000000..6fac3af5 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CryptEccKeyExchange_fp.h @@ -0,0 +1,52 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:18PM + */ + +#ifndef _CRYPT_ECC_KEY_EXCHANGE_FP_H_ +#define _CRYPT_ECC_KEY_EXCHANGE_FP_H_ + +#if CC_ZGen_2Phase == YES + +//*** CryptEcc2PhaseKeyExchange() +// This function is the dispatch routine for the EC key exchange functions that use +// two ephemeral and two static keys. +// Return Type: TPM_RC +// TPM_RC_SCHEME scheme is not defined +LIB_EXPORT TPM_RC CryptEcc2PhaseKeyExchange( + TPMS_ECC_POINT* outZ1, // OUT: a computed point + TPMS_ECC_POINT* outZ2, // OUT: and optional second point + TPM_ECC_CURVE curveId, // IN: the curve for the computations + TPM_ALG_ID scheme, // IN: the key exchange scheme + TPM2B_ECC_PARAMETER* dsA, // IN: static private TPM key + TPM2B_ECC_PARAMETER* deA, // IN: ephemeral private TPM key + TPMS_ECC_POINT* QsB, // IN: static public party B key + TPMS_ECC_POINT* QeB // IN: ephemeral public party B key +); +# if ALG_SM2 + +//*** SM2KeyExchange() +// This function performs the key exchange defined in SM2. +// The first step is to compute +// 'tA' = ('dsA' + 'deA' avf(Xe,A)) mod 'n' +// Then, compute the 'Z' value from +// 'outZ' = ('h' 'tA' mod 'n') ('QsA' + [avf('QeB.x')]('QeB')). +// The function will compute the ephemeral public key from the ephemeral +// private key. +// All points are required to be on the curve of 'inQsA'. The function will fail +// catastrophically if this is not the case +// Return Type: TPM_RC +// TPM_RC_NO_RESULT the value for dsA does not give a valid point on the +// curve +LIB_EXPORT TPM_RC SM2KeyExchange( + TPMS_ECC_POINT* outZ, // OUT: the computed point + TPM_ECC_CURVE curveId, // IN: the curve for the computations + TPM2B_ECC_PARAMETER* dsAIn, // IN: static private TPM key + TPM2B_ECC_PARAMETER* deAIn, // IN: ephemeral private TPM key + TPMS_ECC_POINT* QsBIn, // IN: static public party B key + TPMS_ECC_POINT* QeBIn // IN: ephemeral public party B key +); +# endif +#endif // CC_ZGen_2Phase + +#endif // _CRYPT_ECC_KEY_EXCHANGE_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CryptEccMain_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptEccMain_fp.h new file mode 100644 index 00000000..dacd3e7d --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CryptEccMain_fp.h @@ -0,0 +1,260 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 03:18:00PM + */ + +#ifndef _CRYPT_ECC_MAIN_FP_H_ +#define _CRYPT_ECC_MAIN_FP_H_ + +#if ALG_ECC + +//** Functions +# if SIMULATION +void EccSimulationEnd(void); +# endif // SIMULATION + +//*** CryptEccInit() +// This function is called at _TPM_Init +BOOL CryptEccInit(void); + +//*** CryptEccStartup() +// This function is called at TPM2_Startup(). +BOOL CryptEccStartup(void); + +//*** ClearPoint2B(generic) +// Initialize the size values of a TPMS_ECC_POINT structure. +void ClearPoint2B(TPMS_ECC_POINT* p // IN: the point +); + +//*** CryptEccGetParametersByCurveId() +// This function returns a pointer to the curve data that is associated with +// the indicated curveId. +// If there is no curve with the indicated ID, the function returns NULL. This +// function is in this module so that it can be called by GetCurve data. +// Return Type: const TPM_ECC_CURVE_METADATA +// NULL curve with the indicated TPM_ECC_CURVE is not implemented +// != NULL pointer to the curve data +LIB_EXPORT const TPM_ECC_CURVE_METADATA* CryptEccGetParametersByCurveId( + TPM_ECC_CURVE curveId // IN: the curveID +); + +//*** CryptEccGetKeySizeForCurve() +// This function returns the key size in bits of the indicated curve. +LIB_EXPORT UINT16 CryptEccGetKeySizeForCurve(TPM_ECC_CURVE curveId // IN: the curve +); + +//***CryptEccGetOID() +const BYTE* CryptEccGetOID(TPM_ECC_CURVE curveId); + +//*** CryptEccGetCurveByIndex() +// This function returns the number of the 'i'-th implemented curve. The normal +// use would be to call this function with 'i' starting at 0. When the 'i' is greater +// than or equal to the number of implemented curves, TPM_ECC_NONE is returned. +LIB_EXPORT TPM_ECC_CURVE CryptEccGetCurveByIndex(UINT16 i); + +//*** CryptCapGetECCCurve() +// This function returns the list of implemented ECC curves. +// Return Type: TPMI_YES_NO +// YES if no more ECC curve is available +// NO if there are more ECC curves not reported +TPMI_YES_NO +CryptCapGetECCCurve(TPM_ECC_CURVE curveID, // IN: the starting ECC curve + UINT32 maxCount, // IN: count of returned curves + TPML_ECC_CURVE* curveList // OUT: ECC curve list +); + +//*** CryptCapGetOneECCCurve() +// This function returns whether the ECC curve is implemented. +BOOL CryptCapGetOneECCCurve(TPM_ECC_CURVE curveID // IN: the ECC curve +); + +//*** CryptGetCurveSignScheme() +// This function will return a pointer to the scheme of the curve. +const TPMT_ECC_SCHEME* CryptGetCurveSignScheme( + TPM_ECC_CURVE curveId // IN: The curve selector +); + +//*** CryptGenerateR() +// This function computes the commit random value for a split signing scheme. +// +// If 'c' is NULL, it indicates that 'r' is being generated +// for TPM2_Commit. +// If 'c' is not NULL, the TPM will validate that the 'gr.commitArray' +// bit associated with the input value of 'c' is SET. If not, the TPM +// returns FALSE and no 'r' value is generated. +// Return Type: BOOL +// TRUE(1) r value computed +// FALSE(0) no r value computed +BOOL CryptGenerateR(TPM2B_ECC_PARAMETER* r, // OUT: the generated random value + UINT16* c, // IN/OUT: count value. + TPMI_ECC_CURVE curveID, // IN: the curve for the value + TPM2B_NAME* name // IN: optional name of a key to + // associate with 'r' +); + +//*** CryptCommit() +// This function is called when the count value is committed. The 'gr.commitArray' +// value associated with the current count value is SET and g_commitCounter is +// incremented. The low-order 16 bits of old value of the counter is returned. +UINT16 +CryptCommit(void); + +//*** CryptEndCommit() +// This function is called when the signing operation using the committed value +// is completed. It clears the gr.commitArray bit associated with the count +// value so that it can't be used again. +void CryptEndCommit(UINT16 c // IN: the counter value of the commitment +); + +//*** CryptEccGetParameters() +// This function returns the ECC parameter details of the given curve. +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) unsupported ECC curve ID +BOOL CryptEccGetParameters( + TPM_ECC_CURVE curveId, // IN: ECC curve ID + TPMS_ALGORITHM_DETAIL_ECC* parameters // OUT: ECC parameters +); + +//*** TpmEcc_IsValidPrivateEcc() +// Checks that 0 < 'x' < 'q' +BOOL TpmEcc_IsValidPrivateEcc(const Crypt_Int* x, // IN: private key to check + const Crypt_EccCurve* E // IN: the curve to check +); + +LIB_EXPORT BOOL CryptEccIsValidPrivateKey(TPM2B_ECC_PARAMETER* d, + TPM_ECC_CURVE curveId); + +//*** TpmEcc_PointMult() +// This function does a point multiply of the form 'R' = ['d']'S' + ['u']'Q' where the +// parameters are Crypt_Int* values. If 'S' is NULL and d is not NULL, then it computes +// 'R' = ['d']'G' + ['u']'Q' or just 'R' = ['d']'G' if 'u' and 'Q' are NULL. +// If 'skipChecks' is TRUE, then the function will not verify that the inputs are +// correct for the domain. This would be the case when the values were created by the +// CryptoEngine code. +// It will return TPM_RC_NO_RESULT if the resulting point is the point at infinity. +// Return Type: TPM_RC +// TPM_RC_NO_RESULT result of multiplication is a point at infinity +// TPM_RC_ECC_POINT 'S' or 'Q' is not on the curve +// TPM_RC_VALUE 'd' or 'u' is not < n +TPM_RC +TpmEcc_PointMult(Crypt_Point* R, // OUT: computed point + const Crypt_Point* S, // IN: optional point to multiply by 'd' + const Crypt_Int* d, // IN: scalar for [d]S or [d]G + const Crypt_Point* Q, // IN: optional second point + const Crypt_Int* u, // IN: optional second scalar + const Crypt_EccCurve* E // IN: curve parameters +); + +//***TpmEcc_GenPrivateScalar() +// This function gets random values that are the size of the key plus 64 bits. The +// value is reduced (mod ('q' - 1)) and incremented by 1 ('q' is the order of the +// curve. This produces a value ('d') such that 1 <= 'd' < 'q'. This is the method +// of FIPS 186-4 Section B.4.1 ""Key Pair Generation Using Extra Random Bits"". +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure generating private key +BOOL TpmEcc_GenPrivateScalar( + Crypt_Int* dOut, // OUT: the qualified random value + const Crypt_EccCurve* E, // IN: curve for which the private key + // needs to be appropriate + RAND_STATE* rand // IN: state for DRBG +); + +//*** TpmEcc_GenerateKeyPair() +// This function gets a private scalar from the source of random bits and does +// the point multiply to get the public key. +BOOL TpmEcc_GenerateKeyPair(Crypt_Int* bnD, // OUT: private scalar + Crypt_Point* ecQ, // OUT: public point + const Crypt_EccCurve* E, // IN: curve for the point + RAND_STATE* rand // IN: DRBG state to use +); + +//***CryptEccNewKeyPair(***) +// This function creates an ephemeral ECC. It is ephemeral in that +// is expected that the private part of the key will be discarded +LIB_EXPORT TPM_RC CryptEccNewKeyPair( + TPMS_ECC_POINT* Qout, // OUT: the public point + TPM2B_ECC_PARAMETER* dOut, // OUT: the private scalar + TPM_ECC_CURVE curveId // IN: the curve for the key +); + +//*** CryptEccPointMultiply() +// This function computes 'R' := ['dIn']'G' + ['uIn']'QIn'. Where 'dIn' and +// 'uIn' are scalars, 'G' and 'QIn' are points on the specified curve and 'G' is the +// default generator of the curve. +// +// The 'xOut' and 'yOut' parameters are optional and may be set to NULL if not +// used. +// +// It is not necessary to provide 'uIn' if 'QIn' is specified but one of 'uIn' and +// 'dIn' must be provided. If 'dIn' and 'QIn' are specified but 'uIn' is not +// provided, then 'R' = ['dIn']'QIn'. +// +// If the multiply produces the point at infinity, the TPM_RC_NO_RESULT is returned. +// +// The sizes of 'xOut' and yOut' will be set to be the size of the degree of +// the curve +// +// It is a fatal error if 'dIn' and 'uIn' are both unspecified (NULL) or if 'Qin' +// or 'Rout' is unspecified. +// +// Return Type: TPM_RC +// TPM_RC_ECC_POINT the point 'Pin' or 'Qin' is not on the curve +// TPM_RC_NO_RESULT the product point is at infinity +// TPM_RC_CURVE bad curve +// TPM_RC_VALUE 'dIn' or 'uIn' out of range +// +LIB_EXPORT TPM_RC CryptEccPointMultiply( + TPMS_ECC_POINT* Rout, // OUT: the product point R + TPM_ECC_CURVE curveId, // IN: the curve to use + TPMS_ECC_POINT* Pin, // IN: first point (can be null) + TPM2B_ECC_PARAMETER* dIn, // IN: scalar value for [dIn]Qin + // the Pin + TPMS_ECC_POINT* Qin, // IN: point Q + TPM2B_ECC_PARAMETER* uIn // IN: scalar value for the multiplier + // of Q +); + +//*** CryptEccIsPointOnCurve() +// This function is used to test if a point is on a defined curve. It does this +// by checking that 'y'^2 mod 'p' = 'x'^3 + 'a'*'x' + 'b' mod 'p'. +// +// It is a fatal error if 'Q' is not specified (is NULL). +// Return Type: BOOL +// TRUE(1) point is on curve +// FALSE(0) point is not on curve or curve is not supported +LIB_EXPORT BOOL CryptEccIsPointOnCurve( + TPM_ECC_CURVE curveId, // IN: the curve selector + TPMS_ECC_POINT* Qin // IN: the point. +); + +//*** CryptEccGenerateKey() +// This function generates an ECC key pair based on the input parameters. +// This routine uses KDFa to produce candidate numbers. The method is according +// to FIPS 186-3, section B.1.2 "Key Pair Generation by Testing Candidates." +// According to the method in FIPS 186-3, the resulting private value 'd' should be +// 1 <= 'd' < 'n' where 'n' is the order of the base point. +// +// It is a fatal error if 'Qout', 'dOut', is not provided (is NULL). +// +// If the curve is not supported +// If 'seed' is not provided, then a random number will be used for the key +// Return Type: TPM_RC +// TPM_RC_CURVE curve is not supported +// TPM_RC_NO_RESULT could not verify key with signature (FIPS only) +LIB_EXPORT TPM_RC CryptEccGenerateKey( + TPMT_PUBLIC* publicArea, // IN/OUT: The public area template for + // the new key. The public key + // area will be replaced computed + // ECC public key + TPMT_SENSITIVE* sensitive, // OUT: the sensitive area will be + // updated to contain the private + // ECC key and the symmetric + // encryption key + RAND_STATE* rand // IN: if not NULL, the deterministic + // RNG state +); +#endif // ALG_ECC + +#endif // _CRYPT_ECC_MAIN_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CryptEccSignature_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptEccSignature_fp.h new file mode 100644 index 00000000..9c80ce74 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CryptEccSignature_fp.h @@ -0,0 +1,69 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:18PM + */ + +#ifndef _CRYPT_ECC_SIGNATURE_FP_H_ +#define _CRYPT_ECC_SIGNATURE_FP_H_ + +#if ALG_ECC + +//*** CryptEccSign() +// This function is the dispatch function for the various ECC-based +// signing schemes. +// There is a bit of ugliness to the parameter passing. In order to test this, +// we sometime would like to use a deterministic RNG so that we can get the same +// signatures during testing. The easiest way to do this for most schemes is to +// pass in a deterministic RNG and let it return canned values during testing. +// There is a competing need for a canned parameter to use in ECDAA. To accommodate +// both needs with minimal fuss, a special type of RAND_STATE is defined to carry +// the address of the commit value. The setup and handling of this is not very +// different for the caller than what was in previous versions of the code. +// Return Type: TPM_RC +// TPM_RC_SCHEME 'scheme' is not supported +LIB_EXPORT TPM_RC CryptEccSign(TPMT_SIGNATURE* signature, // OUT: signature + OBJECT* signKey, // IN: ECC key to sign the hash + const TPM2B_DIGEST* digest, // IN: digest to sign + TPMT_ECC_SCHEME* scheme, // IN: signing scheme + RAND_STATE* rand); + +//*** CryptEccValidateSignature() +// This function validates an EcDsa or EcSchnorr signature. +// The point 'Qin' needs to have been validated to be on the curve of 'curveId'. +// Return Type: TPM_RC +// TPM_RC_SIGNATURE not a valid signature +LIB_EXPORT TPM_RC CryptEccValidateSignature( + TPMT_SIGNATURE* signature, // IN: signature to be verified + OBJECT* signKey, // IN: ECC key signed the hash + const TPM2B_DIGEST* digest // IN: digest that was signed +); + +//***CryptEccCommitCompute() +// This function performs the point multiply operations required by TPM2_Commit. +// +// If 'B' or 'M' is provided, they must be on the curve defined by 'curveId'. This +// routine does not check that they are on the curve and results are unpredictable +// if they are not. +// +// It is a fatal error if 'r' is NULL. If 'B' is not NULL, then it is a +// fatal error if 'd' is NULL or if 'K' and 'L' are both NULL. +// If 'M' is not NULL, then it is a fatal error if 'E' is NULL. +// +// Return Type: TPM_RC +// TPM_RC_NO_RESULT if 'K', 'L' or 'E' was computed to be the point +// at infinity +// TPM_RC_CANCELED a cancel indication was asserted during this +// function +LIB_EXPORT TPM_RC CryptEccCommitCompute( + TPMS_ECC_POINT* K, // OUT: [d]B or [r]Q + TPMS_ECC_POINT* L, // OUT: [r]B + TPMS_ECC_POINT* E, // OUT: [r]M + TPM_ECC_CURVE curveId, // IN: the curve for the computations + TPMS_ECC_POINT* M, // IN: M (optional) + TPMS_ECC_POINT* B, // IN: B (optional) + TPM2B_ECC_PARAMETER* d, // IN: d (optional) + TPM2B_ECC_PARAMETER* r // IN: the computed r value (required) +); +#endif // ALG_ECC + +#endif // _CRYPT_ECC_SIGNATURE_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptHash_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptHash_fp.h similarity index 89% rename from TPMCmd/tpm/include/prototypes/CryptHash_fp.h rename to TPMCmd/tpm/include/private/prototypes/CryptHash_fp.h index 9bd4c3fe..ebec12be 100644 --- a/TPMCmd/tpm/include/prototypes/CryptHash_fp.h +++ b/TPMCmd/tpm/include/private/prototypes/CryptHash_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Feb 28, 2020 Time: 03:04:48PM diff --git a/TPMCmd/tpm/include/private/prototypes/CryptPrimeSieve_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptPrimeSieve_fp.h new file mode 100644 index 00000000..3097d882 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CryptPrimeSieve_fp.h @@ -0,0 +1,103 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Aug 30, 2019 Time: 02:11:54PM + */ + +#ifndef _CRYPT_PRIME_SIEVE_FP_H_ +#define _CRYPT_PRIME_SIEVE_FP_H_ + +#if RSA_KEY_SIEVE + +//*** RsaAdjustPrimeLimit() +// This used during the sieve process. The iterator for getting the +// next prime (RsaNextPrime()) will return primes until it hits the +// limit (primeLimit) set up by this function. This causes the sieve +// process to stop when an appropriate number of primes have been +// sieved. +LIB_EXPORT void RsaAdjustPrimeLimit(uint32_t requestedPrimes); + +//*** RsaNextPrime() +// This the iterator used during the sieve process. The input is the +// last prime returned (or any starting point) and the output is the +// next higher prime. The function returns 0 when the primeLimit is +// reached. +LIB_EXPORT uint32_t RsaNextPrime(uint32_t lastPrime); + +//*** FindNthSetBit() +// This function finds the nth SET bit in a bit array. The 'n' parameter is +// between 1 and the number of bits in the array (always a multiple of 8). +// If called when the array does not have n bits set, it will return -1 +// Return Type: unsigned int +// <0 no bit is set or no bit with the requested number is set +// >=0 the number of the bit in the array that is the nth set +LIB_EXPORT int FindNthSetBit( + const UINT16 aSize, // IN: the size of the array to check + const BYTE* a, // IN: the array to check + const UINT32 n // IN, the number of the SET bit +); + +//*** PrimeSieve() +// This function does a prime sieve over the input 'field' which has as its +// starting address the value in bnN. Since this initializes the Sieve +// using a precomputed field with the bits associated with 3, 5 and 7 already +// turned off, the value of pnN may need to be adjusted by a few counts to allow +// the precomputed field to be used without modification. +// +// To get better performance, one could address the issue of developing the +// composite numbers. When the size of the prime gets large, the time for doing +// the divisions goes up, noticeably. It could be better to develop larger composite +// numbers even if they need to be Crypt_Int*'s themselves. The object would be to +// reduce the number of times that the large prime is divided into a few large +// divides and then use smaller divides to get to the final 16 bit (or smaller) +// remainders. +LIB_EXPORT UINT32 PrimeSieve(Crypt_Int* bnN, // IN/OUT: number to sieve + UINT32 fieldSize, // IN: size of the field area in bytes + BYTE* field // IN: field +); +# ifdef SIEVE_DEBUG + +//***SetFieldSize() +// Function to set the field size used for prime generation. Used for tuning. +LIB_EXPORT uint32_t SetFieldSize(uint32_t newFieldSize); +# endif // SIEVE_DEBUG + +//*** PrimeSelectWithSieve() +// This function will sieve the field around the input prime candidate. If the +// sieve field is not empty, one of the one bits in the field is chosen for testing +// with Miller-Rabin. If the value is prime, 'pnP' is updated with this value +// and the function returns success. If this value is not prime, another +// pseudo-random candidate is chosen and tested. This process repeats until +// all values in the field have been checked. If all bits in the field have +// been checked and none is prime, the function returns FALSE and a new random +// value needs to be chosen. +// Return Type: TPM_RC +// TPM_RC_FAILURE TPM in failure mode, probably due to entropy source +// TPM_RC_SUCCESS candidate is probably prime +// TPM_RC_NO_RESULT candidate is not prime and couldn't find and alternative +// in the field +LIB_EXPORT TPM_RC PrimeSelectWithSieve( + Crypt_Int* candidate, // IN/OUT: The candidate to filter + UINT32 e, // IN: the exponent + RAND_STATE* rand // IN: the random number generator state +); +# if RSA_INSTRUMENT + +//*** PrintTuple() +char* PrintTuple(UINT32* i); + +//*** RsaSimulationEnd() +void RsaSimulationEnd(void); + +//*** GetSieveStats() +LIB_EXPORT void GetSieveStats( + uint32_t* trials, uint32_t* emptyFields, uint32_t* averageBits); +# endif +#endif // RSA_KEY_SIEVE +#if !RSA_INSTRUMENT + +//*** RsaSimulationEnd() +// Stub for call when not doing instrumentation. +void RsaSimulationEnd(void); +#endif + +#endif // _CRYPT_PRIME_SIEVE_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CryptPrime_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptPrime_fp.h new file mode 100644 index 00000000..02ade1b7 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CryptPrime_fp.h @@ -0,0 +1,68 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Aug 30, 2019 Time: 02:11:54PM + */ + +#ifndef _CRYPT_PRIME_FP_H_ +#define _CRYPT_PRIME_FP_H_ + +//*** IsPrimeInt() +// This will do a test of a word of up to 32-bits in size. +BOOL IsPrimeInt(uint32_t n); + +//*** TpmMath_IsProbablyPrime() +// This function is used when the key sieve is not implemented. This function +// Will try to eliminate some of the obvious things before going on +// to perform MillerRabin as a final verification of primeness. +BOOL TpmMath_IsProbablyPrime(Crypt_Int* prime, // IN: + RAND_STATE* rand // IN: the random state just + // in case Miller-Rabin is required +); + +//*** MillerRabinRounds() +// Function returns the number of Miller-Rabin rounds necessary to give an +// error probability equal to the security strength of the prime. These values +// are from FIPS 186-3. +UINT32 +MillerRabinRounds(UINT32 bits // IN: Number of bits in the RSA prime +); + +//*** MillerRabin() +// This function performs a Miller-Rabin test from FIPS 186-3. It does +// 'iterations' trials on the number. In all likelihood, if the number +// is not prime, the first test fails. +// Return Type: BOOL +// TRUE(1) probably prime +// FALSE(0) composite +BOOL MillerRabin(Crypt_Int* bnW, RAND_STATE* rand); +#if ALG_RSA + +//*** RsaCheckPrime() +// This will check to see if a number is prime and appropriate for an +// RSA prime. +// +// This has different functionality based on whether we are using key +// sieving or not. If not, the number checked to see if it is divisible by +// the public exponent, then the number is adjusted either up or down +// in order to make it a better candidate. It is then checked for being +// probably prime. +// +// If sieving is used, the number is used to root a sieving process. +// +TPM_RC +RsaCheckPrime(Crypt_Int* prime, UINT32 exponent, RAND_STATE* rand); + +//*** TpmRsa_GeneratePrimeForRSA() +// Function to generate a prime of the desired size with the proper attributes +// for an RSA prime. +TPM_RC +TpmRsa_GeneratePrimeForRSA( + Crypt_Int* prime, // IN/OUT: points to the BN that will get the + // random value + UINT32 bits, // IN: number of bits to get + UINT32 exponent, // IN: the exponent + RAND_STATE* rand // IN: the random state +); +#endif // ALG_RSA + +#endif // _CRYPT_PRIME_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptRand_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptRand_fp.h similarity index 77% rename from TPMCmd/tpm/include/prototypes/CryptRand_fp.h rename to TPMCmd/tpm/include/private/prototypes/CryptRand_fp.h index 0bb61262..dc793ead 100644 --- a/TPMCmd/tpm/include/prototypes/CryptRand_fp.h +++ b/TPMCmd/tpm/include/private/prototypes/CryptRand_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Mar 4, 2020 Time: 02:36:44PM diff --git a/TPMCmd/tpm/include/prototypes/CryptRsa_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptRsa_fp.h similarity index 78% rename from TPMCmd/tpm/include/prototypes/CryptRsa_fp.h rename to TPMCmd/tpm/include/private/prototypes/CryptRsa_fp.h index 0f93330b..5478f54b 100644 --- a/TPMCmd/tpm/include/prototypes/CryptRsa_fp.h +++ b/TPMCmd/tpm/include/private/prototypes/CryptRsa_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Apr 2, 2019 Time: 03:18:00PM diff --git a/TPMCmd/tpm/include/private/prototypes/CryptSelfTest_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptSelfTest_fp.h new file mode 100644 index 00000000..c3f2b764 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CryptSelfTest_fp.h @@ -0,0 +1,66 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 4, 2020 Time: 02:36:44PM + */ + +#ifndef _CRYPT_SELF_TEST_FP_H_ +#define _CRYPT_SELF_TEST_FP_H_ + +//*** CryptSelfTest() +// This function is called to start/complete a full self-test. +// If 'fullTest' is NO, then only the untested algorithms will be run. If +// 'fullTest' is YES, then 'g_untestedDecryptionAlgorithms' is reinitialized and then +// all tests are run. +// This implementation of the reference design does not support processing outside +// the framework of a TPM command. As a consequence, this command does not +// complete until all tests are done. Since this can take a long time, the TPM +// will check after each test to see if the command is canceled. If so, then the +// TPM will returned TPM_RC_CANCELLED. To continue with the self-tests, call +// TPM2_SelfTest(fullTest == No) and the TPM will complete the testing. +// Return Type: TPM_RC +// TPM_RC_CANCELED if the command is canceled +LIB_EXPORT +TPM_RC +CryptSelfTest(TPMI_YES_NO fullTest // IN: if full test is required +); + +//*** CryptIncrementalSelfTest() +// This function is used to perform an incremental self-test. This implementation +// will perform the toTest values before returning. That is, it assumes that the +// TPM cannot perform background tasks between commands. +// +// This command may be canceled. If it is, then there is no return result. +// However, this command can be run again and the incremental progress will not +// be lost. +// Return Type: TPM_RC +// TPM_RC_CANCELED processing of this command was canceled +// TPM_RC_TESTING if toTest list is not empty +// TPM_RC_VALUE an algorithm in the toTest list is not implemented +TPM_RC +CryptIncrementalSelfTest(TPML_ALG* toTest, // IN: list of algorithms to be tested + TPML_ALG* toDoList // OUT: list of algorithms needing test +); + +//*** CryptInitializeToTest() +// This function will initialize the data structures for testing all the +// algorithms. This should not be called unless CryptAlgsSetImplemented() has +// been called +void CryptInitializeToTest(void); + +//*** CryptTestAlgorithm() +// Only point of contact with the actual self tests. If a self-test fails, there +// is no return and the TPM goes into failure mode. +// The call to TestAlgorithm uses an algorithm selector and a bit vector. When the +// test is run, the corresponding bit in 'toTest' and in 'g_toTest' is CLEAR. If +// 'toTest' is NULL, then only the bit in 'g_toTest' is CLEAR. +// There is a special case for the call to TestAlgorithm(). When 'alg' is +// ALG_ERROR, TestAlgorithm() will CLEAR any bit in 'toTest' for which it has +// no test. This allows the knowledge about which algorithms have test to be +// accessed through the interface that provides the test. +// Return Type: TPM_RC +// TPM_RC_CANCELED test was canceled +LIB_EXPORT +TPM_RC +CryptTestAlgorithm(TPM_ALG_ID alg, ALGORITHM_VECTOR* toTest); + +#endif // _CRYPT_SELF_TEST_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CryptSmac_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptSmac_fp.h new file mode 100644 index 00000000..01a0bbc0 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CryptSmac_fp.h @@ -0,0 +1,39 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _CRYPT_SMAC_FP_H_ +#define _CRYPT_SMAC_FP_H_ + +#if SMAC_IMPLEMENTED + +//*** CryptSmacStart() +// Function to start an SMAC. +UINT16 +CryptSmacStart(HASH_STATE* state, + TPMU_PUBLIC_PARMS* keyParameters, + TPM_ALG_ID macAlg, // IN: the type of MAC + TPM2B* key); + +//*** CryptMacStart() +// Function to start either an HMAC or an SMAC. Cannot reuse the CryptHmacStart +// function because of the difference in number of parameters. +UINT16 +CryptMacStart(HMAC_STATE* state, + TPMU_PUBLIC_PARMS* keyParameters, + TPM_ALG_ID macAlg, // IN: the type of MAC + TPM2B* key); + +//*** CryptMacEnd() +// Dispatch to the MAC end function using a size and buffer pointer. +UINT16 +CryptMacEnd(HMAC_STATE* state, UINT32 size, BYTE* buffer); + +//*** CryptMacEnd2B() +// Dispatch to the MAC end function using a 2B. +UINT16 +CryptMacEnd2B(HMAC_STATE* state, TPM2B* data); +#endif // SMAC_IMPLEMENTED + +#endif // _CRYPT_SMAC_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/CryptSym_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptSym_fp.h new file mode 100644 index 00000000..b1a9d258 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/CryptSym_fp.h @@ -0,0 +1,80 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 03:18:00PM + */ + +#ifndef _CRYPT_SYM_FP_H_ +#define _CRYPT_SYM_FP_H_ + +//** Initialization and Data Access Functions +// +//*** CryptSymInit() +// This function is called to do _TPM_Init processing +BOOL CryptSymInit(void); + +//*** CryptSymStartup() +// This function is called to do TPM2_Startup() processing +BOOL CryptSymStartup(void); + +//*** CryptGetSymmetricBlockSize() +// This function returns the block size of the algorithm. The table of bit sizes has +// an entry for each allowed key size. The entry for a key size is 0 if the TPM does +// not implement that key size. The key size table is delimited with a negative number +// (-1). After the delimiter is a list of block sizes with each entry corresponding +// to the key bit size. For most symmetric algorithms, the block size is the same +// regardless of the key size but this arrangement allows them to be different. +// Return Type: INT16 +// <= 0 cipher not supported +// > 0 the cipher block size in bytes +LIB_EXPORT INT16 CryptGetSymmetricBlockSize( + TPM_ALG_ID symmetricAlg, // IN: the symmetric algorithm + UINT16 keySizeInBits // IN: the key size +); + +//** Symmetric Encryption +// This function performs symmetric encryption based on the mode. +// Return Type: TPM_RC +// TPM_RC_SIZE 'dSize' is not a multiple of the block size for an +// algorithm that requires it +// TPM_RC_FAILURE Fatal error +LIB_EXPORT TPM_RC CryptSymmetricEncrypt( + BYTE* dOut, // OUT: + TPM_ALG_ID algorithm, // IN: the symmetric algorithm + UINT16 keySizeInBits, // IN: key size in bits + const BYTE* key, // IN: key buffer. The size of this buffer + // in bytes is (keySizeInBits + 7) / 8 + TPM2B_IV* ivInOut, // IN/OUT: IV for decryption. + TPM_ALG_ID mode, // IN: Mode to use + INT32 dSize, // IN: data size (may need to be a + // multiple of the blockSize) + const BYTE* dIn // IN: data buffer +); + +//*** CryptSymmetricDecrypt() +// This function performs symmetric decryption based on the mode. +// Return Type: TPM_RC +// TPM_RC_FAILURE A fatal error +// TPM_RCS_SIZE 'dSize' is not a multiple of the block size for an +// algorithm that requires it +LIB_EXPORT TPM_RC CryptSymmetricDecrypt( + BYTE* dOut, // OUT: decrypted data + TPM_ALG_ID algorithm, // IN: the symmetric algorithm + UINT16 keySizeInBits, // IN: key size in bits + const BYTE* key, // IN: key buffer. The size of this buffer + // in bytes is (keySizeInBits + 7) / 8 + TPM2B_IV* ivInOut, // IN/OUT: IV for decryption. + TPM_ALG_ID mode, // IN: Mode to use + INT32 dSize, // IN: data size (may need to be a + // multiple of the blockSize) + const BYTE* dIn // IN: data buffer +); + +//*** CryptSymKeyValidate() +// Validate that a provided symmetric key meets the requirements of the TPM +// Return Type: TPM_RC +// TPM_RC_KEY_SIZE Key size specifiers do not match +// TPM_RC_KEY Key is not allowed +TPM_RC +CryptSymKeyValidate(TPMT_SYM_DEF_OBJECT* symDef, TPM2B_SYM_KEY* key); + +#endif // _CRYPT_SYM_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptUtil_fp.h b/TPMCmd/tpm/include/private/prototypes/CryptUtil_fp.h similarity index 91% rename from TPMCmd/tpm/include/prototypes/CryptUtil_fp.h rename to TPMCmd/tpm/include/private/prototypes/CryptUtil_fp.h index 307f14b0..ef032542 100644 --- a/TPMCmd/tpm/include/prototypes/CryptUtil_fp.h +++ b/TPMCmd/tpm/include/private/prototypes/CryptUtil_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Aug 30, 2019 Time: 02:11:54PM diff --git a/TPMCmd/tpm/include/private/prototypes/DA_fp.h b/TPMCmd/tpm/include/private/prototypes/DA_fp.h new file mode 100644 index 00000000..4f827678 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/DA_fp.h @@ -0,0 +1,44 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 04:23:27PM + */ + +#ifndef _DA_FP_H_ +#define _DA_FP_H_ + +//*** DAPreInstall_Init() +// This function initializes the DA parameters to their manufacturer-default +// values. The default values are determined by a platform-specific specification. +// +// This function should not be called outside of a manufacturing or simulation +// environment. +// +// The DA parameters will be restored to these initial values by TPM2_Clear(). +void DAPreInstall_Init(void); + +//*** DAStartup() +// This function is called by TPM2_Startup() to initialize the DA parameters. +// In the case of Startup(CLEAR), use of lockoutAuth will be enabled if the +// lockout recovery time is 0. Otherwise, lockoutAuth will not be enabled until +// the TPM has been continuously powered for the lockoutRecovery time. +// +// This function requires that NV be available and not rate limiting. +BOOL DAStartup(STARTUP_TYPE type // IN: startup type +); + +//*** DARegisterFailure() +// This function is called when a authorization failure occurs on an entity +// that is subject to dictionary-attack protection. When a DA failure is +// triggered, register the failure by resetting the relevant self-healing +// timer to the current time. +void DARegisterFailure(TPM_HANDLE handle // IN: handle for failure +); + +//*** DASelfHeal() +// This function is called to check if sufficient time has passed to allow +// decrement of failedTries or to re-enable use of lockoutAuth. +// +// This function should be called when the time interval is updated. +void DASelfHeal(void); + +#endif // _DA_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/DictionaryAttackLockReset_fp.h b/TPMCmd/tpm/include/private/prototypes/DictionaryAttackLockReset_fp.h new file mode 100644 index 00000000..17092693 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/DictionaryAttackLockReset_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_DictionaryAttackLockReset // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_DICTIONARYATTACKLOCKRESET_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_DICTIONARYATTACKLOCKRESET_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_LOCKOUT lockHandle; +} DictionaryAttackLockReset_In; + +// Response code modifiers +# define RC_DictionaryAttackLockReset_lockHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_DictionaryAttackLockReset(DictionaryAttackLockReset_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_DICTIONARYATTACKLOCKRESET_FP_H_ +#endif // CC_DictionaryAttackLockReset diff --git a/TPMCmd/tpm/include/private/prototypes/DictionaryAttackParameters_fp.h b/TPMCmd/tpm/include/private/prototypes/DictionaryAttackParameters_fp.h new file mode 100644 index 00000000..5e1c21b0 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/DictionaryAttackParameters_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_DictionaryAttackParameters // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_DICTIONARYATTACKPARAMETERS_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_DICTIONARYATTACKPARAMETERS_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_LOCKOUT lockHandle; + UINT32 newMaxTries; + UINT32 newRecoveryTime; + UINT32 lockoutRecovery; +} DictionaryAttackParameters_In; + +// Response code modifiers +# define RC_DictionaryAttackParameters_lockHandle (TPM_RC_H + TPM_RC_1) +# define RC_DictionaryAttackParameters_newMaxTries (TPM_RC_P + TPM_RC_1) +# define RC_DictionaryAttackParameters_newRecoveryTime (TPM_RC_P + TPM_RC_2) +# define RC_DictionaryAttackParameters_lockoutRecovery (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_DictionaryAttackParameters(DictionaryAttackParameters_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_DICTIONARYATTACKPARAMETERS_FP_H_ +#endif // CC_DictionaryAttackParameters diff --git a/TPMCmd/tpm/include/private/prototypes/Duplicate_fp.h b/TPMCmd/tpm/include/private/prototypes/Duplicate_fp.h new file mode 100644 index 00000000..1f9d9746 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Duplicate_fp.h @@ -0,0 +1,37 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Duplicate // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_DUPLICATE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_DUPLICATE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT objectHandle; + TPMI_DH_OBJECT newParentHandle; + TPM2B_DATA encryptionKeyIn; + TPMT_SYM_DEF_OBJECT symmetricAlg; +} Duplicate_In; + +// Output structure definition +typedef struct +{ + TPM2B_DATA encryptionKeyOut; + TPM2B_PRIVATE duplicate; + TPM2B_ENCRYPTED_SECRET outSymSeed; +} Duplicate_Out; + +// Response code modifiers +# define RC_Duplicate_objectHandle (TPM_RC_H + TPM_RC_1) +# define RC_Duplicate_newParentHandle (TPM_RC_H + TPM_RC_2) +# define RC_Duplicate_encryptionKeyIn (TPM_RC_P + TPM_RC_1) +# define RC_Duplicate_symmetricAlg (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_Duplicate(Duplicate_In* in, Duplicate_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_DUPLICATE_FP_H_ +#endif // CC_Duplicate diff --git a/TPMCmd/tpm/include/private/prototypes/ECC_Decrypt_fp.h b/TPMCmd/tpm/include/private/prototypes/ECC_Decrypt_fp.h new file mode 100644 index 00000000..f363a7de --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ECC_Decrypt_fp.h @@ -0,0 +1,37 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ECC_Decrypt // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECC_DECRYPT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECC_DECRYPT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyHandle; + TPM2B_ECC_POINT C1; + TPM2B_MAX_BUFFER C2; + TPM2B_DIGEST C3; + TPMT_KDF_SCHEME inScheme; +} ECC_Decrypt_In; + +// Output structure definition +typedef struct +{ + TPM2B_MAX_BUFFER plainText; +} ECC_Decrypt_Out; + +// Response code modifiers +# define RC_ECC_Decrypt_keyHandle (TPM_RC_H + TPM_RC_1) +# define RC_ECC_Decrypt_C1 (TPM_RC_P + TPM_RC_1) +# define RC_ECC_Decrypt_C2 (TPM_RC_P + TPM_RC_2) +# define RC_ECC_Decrypt_C3 (TPM_RC_P + TPM_RC_3) +# define RC_ECC_Decrypt_inScheme (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_ECC_Decrypt(ECC_Decrypt_In* in, ECC_Decrypt_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECC_DECRYPT_FP_H_ +#endif // CC_ECC_Decrypt diff --git a/TPMCmd/tpm/include/private/prototypes/ECC_Encrypt_fp.h b/TPMCmd/tpm/include/private/prototypes/ECC_Encrypt_fp.h new file mode 100644 index 00000000..8a22ec69 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ECC_Encrypt_fp.h @@ -0,0 +1,35 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ECC_Encrypt // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECC_ENCRYPT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECC_ENCRYPT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyHandle; + TPM2B_MAX_BUFFER plainText; + TPMT_KDF_SCHEME inScheme; +} ECC_Encrypt_In; + +// Output structure definition +typedef struct +{ + TPM2B_ECC_POINT C1; + TPM2B_MAX_BUFFER C2; + TPM2B_DIGEST C3; +} ECC_Encrypt_Out; + +// Response code modifiers +# define RC_ECC_Encrypt_keyHandle (TPM_RC_H + TPM_RC_1) +# define RC_ECC_Encrypt_plainText (TPM_RC_P + TPM_RC_1) +# define RC_ECC_Encrypt_inScheme (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_ECC_Encrypt(ECC_Encrypt_In* in, ECC_Encrypt_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECC_ENCRYPT_FP_H_ +#endif // CC_ECC_Encrypt diff --git a/TPMCmd/tpm/include/private/prototypes/ECC_Parameters_fp.h b/TPMCmd/tpm/include/private/prototypes/ECC_Parameters_fp.h new file mode 100644 index 00000000..56bf5c26 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ECC_Parameters_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ECC_Parameters // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECC_PARAMETERS_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECC_PARAMETERS_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_ECC_CURVE curveID; +} ECC_Parameters_In; + +// Output structure definition +typedef struct +{ + TPMS_ALGORITHM_DETAIL_ECC parameters; +} ECC_Parameters_Out; + +// Response code modifiers +# define RC_ECC_Parameters_curveID (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ECC_Parameters(ECC_Parameters_In* in, ECC_Parameters_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECC_PARAMETERS_FP_H_ +#endif // CC_ECC_Parameters diff --git a/TPMCmd/tpm/include/private/prototypes/ECDH_KeyGen_fp.h b/TPMCmd/tpm/include/private/prototypes/ECDH_KeyGen_fp.h new file mode 100644 index 00000000..e52a37fd --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ECDH_KeyGen_fp.h @@ -0,0 +1,30 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ECDH_KeyGen // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECDH_KEYGEN_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECDH_KEYGEN_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyHandle; +} ECDH_KeyGen_In; + +// Output structure definition +typedef struct +{ + TPM2B_ECC_POINT zPoint; + TPM2B_ECC_POINT pubPoint; +} ECDH_KeyGen_Out; + +// Response code modifiers +# define RC_ECDH_KeyGen_keyHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ECDH_KeyGen(ECDH_KeyGen_In* in, ECDH_KeyGen_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECDH_KEYGEN_FP_H_ +#endif // CC_ECDH_KeyGen diff --git a/TPMCmd/tpm/include/private/prototypes/ECDH_ZGen_fp.h b/TPMCmd/tpm/include/private/prototypes/ECDH_ZGen_fp.h new file mode 100644 index 00000000..d043d1e4 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ECDH_ZGen_fp.h @@ -0,0 +1,31 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ECDH_ZGen // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECDH_ZGEN_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECDH_ZGEN_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyHandle; + TPM2B_ECC_POINT inPoint; +} ECDH_ZGen_In; + +// Output structure definition +typedef struct +{ + TPM2B_ECC_POINT outPoint; +} ECDH_ZGen_Out; + +// Response code modifiers +# define RC_ECDH_ZGen_keyHandle (TPM_RC_H + TPM_RC_1) +# define RC_ECDH_ZGen_inPoint (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ECDH_ZGen(ECDH_ZGen_In* in, ECDH_ZGen_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_ECDH_ZGEN_FP_H_ +#endif // CC_ECDH_ZGen diff --git a/TPMCmd/tpm/include/private/prototypes/EC_Ephemeral_fp.h b/TPMCmd/tpm/include/private/prototypes/EC_Ephemeral_fp.h new file mode 100644 index 00000000..4dc92089 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/EC_Ephemeral_fp.h @@ -0,0 +1,30 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_EC_Ephemeral // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_EC_EPHEMERAL_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_EC_EPHEMERAL_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_ECC_CURVE curveID; +} EC_Ephemeral_In; + +// Output structure definition +typedef struct +{ + TPM2B_ECC_POINT Q; + UINT16 counter; +} EC_Ephemeral_Out; + +// Response code modifiers +# define RC_EC_Ephemeral_curveID (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_EC_Ephemeral(EC_Ephemeral_In* in, EC_Ephemeral_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_EC_EPHEMERAL_FP_H_ +#endif // CC_EC_Ephemeral diff --git a/TPMCmd/tpm/include/private/prototypes/EncryptDecrypt2_fp.h b/TPMCmd/tpm/include/private/prototypes/EncryptDecrypt2_fp.h new file mode 100644 index 00000000..d9b09931 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/EncryptDecrypt2_fp.h @@ -0,0 +1,38 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_EncryptDecrypt2 // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_ENCRYPTDECRYPT2_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_ENCRYPTDECRYPT2_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyHandle; + TPM2B_MAX_BUFFER inData; + TPMI_YES_NO decrypt; + TPMI_ALG_CIPHER_MODE mode; + TPM2B_IV ivIn; +} EncryptDecrypt2_In; + +// Output structure definition +typedef struct +{ + TPM2B_MAX_BUFFER outData; + TPM2B_IV ivOut; +} EncryptDecrypt2_Out; + +// Response code modifiers +# define RC_EncryptDecrypt2_keyHandle (TPM_RC_H + TPM_RC_1) +# define RC_EncryptDecrypt2_inData (TPM_RC_P + TPM_RC_1) +# define RC_EncryptDecrypt2_decrypt (TPM_RC_P + TPM_RC_2) +# define RC_EncryptDecrypt2_mode (TPM_RC_P + TPM_RC_3) +# define RC_EncryptDecrypt2_ivIn (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_EncryptDecrypt2(EncryptDecrypt2_In* in, EncryptDecrypt2_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_ENCRYPTDECRYPT2_FP_H_ +#endif // CC_EncryptDecrypt2 diff --git a/TPMCmd/tpm/include/private/prototypes/EncryptDecrypt_fp.h b/TPMCmd/tpm/include/private/prototypes/EncryptDecrypt_fp.h new file mode 100644 index 00000000..53b62afe --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/EncryptDecrypt_fp.h @@ -0,0 +1,38 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_EncryptDecrypt // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_ENCRYPTDECRYPT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_ENCRYPTDECRYPT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyHandle; + TPMI_YES_NO decrypt; + TPMI_ALG_CIPHER_MODE mode; + TPM2B_IV ivIn; + TPM2B_MAX_BUFFER inData; +} EncryptDecrypt_In; + +// Output structure definition +typedef struct +{ + TPM2B_MAX_BUFFER outData; + TPM2B_IV ivOut; +} EncryptDecrypt_Out; + +// Response code modifiers +# define RC_EncryptDecrypt_keyHandle (TPM_RC_H + TPM_RC_1) +# define RC_EncryptDecrypt_decrypt (TPM_RC_P + TPM_RC_1) +# define RC_EncryptDecrypt_mode (TPM_RC_P + TPM_RC_2) +# define RC_EncryptDecrypt_ivIn (TPM_RC_P + TPM_RC_3) +# define RC_EncryptDecrypt_inData (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_EncryptDecrypt(EncryptDecrypt_In* in, EncryptDecrypt_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_ENCRYPTDECRYPT_FP_H_ +#endif // CC_EncryptDecrypt diff --git a/TPMCmd/tpm/include/private/prototypes/EncryptDecrypt_spt_fp.h b/TPMCmd/tpm/include/private/prototypes/EncryptDecrypt_spt_fp.h new file mode 100644 index 00000000..0a99ac2f --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/EncryptDecrypt_spt_fp.h @@ -0,0 +1,28 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:18PM + */ + +#ifndef _ENCRYPT_DECRYPT_SPT_FP_H_ +#define _ENCRYPT_DECRYPT_SPT_FP_H_ + +#if CC_EncryptDecrypt2 + +// Return Type: TPM_RC +// TPM_RC_KEY is not a symmetric decryption key with both +// public and private portions loaded +// TPM_RC_SIZE 'IvIn' size is incompatible with the block cipher mode; +// or 'inData' size is not an even multiple of the block +// size for CBC or ECB mode +// TPM_RC_VALUE 'keyHandle' is restricted and the argument 'mode' does +// not match the key's mode +TPM_RC +EncryptDecryptShared(TPMI_DH_OBJECT keyHandleIn, + TPMI_YES_NO decryptIn, + TPMI_ALG_SYM_MODE modeIn, + TPM2B_IV* ivIn, + TPM2B_MAX_BUFFER* inData, + EncryptDecrypt_Out* out); +#endif // CC_EncryptDecrypt + +#endif // _ENCRYPT_DECRYPT_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Entity_fp.h b/TPMCmd/tpm/include/private/prototypes/Entity_fp.h new file mode 100644 index 00000000..b7189a6b --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Entity_fp.h @@ -0,0 +1,68 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 7, 2020 Time: 07:19:36PM + */ + +#ifndef _ENTITY_FP_H_ +#define _ENTITY_FP_H_ + +//** Functions +//*** EntityGetLoadStatus() +// This function will check that all the handles access loaded entities. +// Return Type: TPM_RC +// TPM_RC_HANDLE handle type does not match +// TPM_RC_REFERENCE_Hx entity is not present +// TPM_RC_HIERARCHY entity belongs to a disabled hierarchy +// TPM_RC_OBJECT_MEMORY handle is an evict object but there is no +// space to load it to RAM +TPM_RC +EntityGetLoadStatus(COMMAND* command // IN/OUT: command parsing structure +); + +//*** EntityGetAuthValue() +// This function is used to access the 'authValue' associated with a handle. +// This function assumes that the handle references an entity that is accessible +// and the handle is not for a persistent objects. That is EntityGetLoadStatus() +// should have been called. Also, the accessibility of the authValue should have +// been verified by IsAuthValueAvailable(). +// +// This function copies the authorization value of the entity to 'auth'. +// Return Type: UINT16 +// count number of bytes in the authValue with 0's stripped +UINT16 +EntityGetAuthValue(TPMI_DH_ENTITY handle, // IN: handle of entity + TPM2B_AUTH* auth // OUT: authValue of the entity +); + +//*** EntityGetAuthPolicy() +// This function is used to access the 'authPolicy' associated with a handle. +// This function assumes that the handle references an entity that is accessible +// and the handle is not for a persistent objects. That is EntityGetLoadStatus() +// should have been called. Also, the accessibility of the authPolicy should have +// been verified by IsAuthPolicyAvailable(). +// +// This function copies the authorization policy of the entity to 'authPolicy'. +// +// The return value is the hash algorithm for the policy. +TPMI_ALG_HASH +EntityGetAuthPolicy(TPMI_DH_ENTITY handle, // IN: handle of entity + TPM2B_DIGEST* authPolicy // OUT: authPolicy of the entity +); + +//*** EntityGetName() +// This function returns the Name associated with a handle. +TPM2B_NAME* EntityGetName(TPMI_DH_ENTITY handle, // IN: handle of entity + TPM2B_NAME* name // OUT: name of entity +); + +//*** EntityGetHierarchy() +// This function returns the hierarchy handle associated with an entity. +// a) A handle that is a hierarchy handle is associated with itself. +// b) An NV index belongs to TPM_RH_PLATFORM if TPMA_NV_PLATFORMCREATE, +// is SET, otherwise it belongs to TPM_RH_OWNER +// c) An object handle belongs to its hierarchy. +TPMI_RH_HIERARCHY +EntityGetHierarchy(TPMI_DH_ENTITY handle // IN :handle of entity +); + +#endif // _ENTITY_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/EventSequenceComplete_fp.h b/TPMCmd/tpm/include/private/prototypes/EventSequenceComplete_fp.h new file mode 100644 index 00000000..8fe51a49 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/EventSequenceComplete_fp.h @@ -0,0 +1,34 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_EventSequenceComplete // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_EVENTSEQUENCECOMPLETE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_EVENTSEQUENCECOMPLETE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_PCR pcrHandle; + TPMI_DH_OBJECT sequenceHandle; + TPM2B_MAX_BUFFER buffer; +} EventSequenceComplete_In; + +// Output structure definition +typedef struct +{ + TPML_DIGEST_VALUES results; +} EventSequenceComplete_Out; + +// Response code modifiers +# define RC_EventSequenceComplete_pcrHandle (TPM_RC_H + TPM_RC_1) +# define RC_EventSequenceComplete_sequenceHandle (TPM_RC_H + TPM_RC_2) +# define RC_EventSequenceComplete_buffer (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_EventSequenceComplete(EventSequenceComplete_In* in, + EventSequenceComplete_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_EVENTSEQUENCECOMPLETE_FP_H_ +#endif // CC_EventSequenceComplete diff --git a/TPMCmd/tpm/include/private/prototypes/EvictControl_fp.h b/TPMCmd/tpm/include/private/prototypes/EvictControl_fp.h new file mode 100644 index 00000000..86855d80 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/EvictControl_fp.h @@ -0,0 +1,27 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_EvictControl // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_EVICTCONTROL_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_EVICTCONTROL_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PROVISION auth; + TPMI_DH_OBJECT objectHandle; + TPMI_DH_PERSISTENT persistentHandle; +} EvictControl_In; + +// Response code modifiers +# define RC_EvictControl_auth (TPM_RC_H + TPM_RC_1) +# define RC_EvictControl_objectHandle (TPM_RC_H + TPM_RC_2) +# define RC_EvictControl_persistentHandle (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_EvictControl(EvictControl_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_EVICTCONTROL_FP_H_ +#endif // CC_EvictControl diff --git a/TPMCmd/tpm/include/private/prototypes/FieldUpgradeData_fp.h b/TPMCmd/tpm/include/private/prototypes/FieldUpgradeData_fp.h new file mode 100644 index 00000000..5d919de8 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/FieldUpgradeData_fp.h @@ -0,0 +1,30 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_FieldUpgradeData // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_FIELDUPGRADEDATA_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_FIELDUPGRADEDATA_FP_H_ + +// Input structure definition +typedef struct +{ + TPM2B_MAX_BUFFER fuData; +} FieldUpgradeData_In; + +// Output structure definition +typedef struct +{ + TPMT_HA nextDigest; + TPMT_HA firstDigest; +} FieldUpgradeData_Out; + +// Response code modifiers +# define RC_FieldUpgradeData_fuData (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_FieldUpgradeData(FieldUpgradeData_In* in, FieldUpgradeData_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_FIELDUPGRADEDATA_FP_H_ +#endif // CC_FieldUpgradeData diff --git a/TPMCmd/tpm/include/private/prototypes/FieldUpgradeStart_fp.h b/TPMCmd/tpm/include/private/prototypes/FieldUpgradeStart_fp.h new file mode 100644 index 00000000..b3878f93 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/FieldUpgradeStart_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_FieldUpgradeStart // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_FIELDUPGRADESTART_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_FIELDUPGRADESTART_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PLATFORM authorization; + TPMI_DH_OBJECT keyHandle; + TPM2B_DIGEST fuDigest; + TPMT_SIGNATURE manifestSignature; +} FieldUpgradeStart_In; + +// Response code modifiers +# define RC_FieldUpgradeStart_authorization (TPM_RC_H + TPM_RC_1) +# define RC_FieldUpgradeStart_keyHandle (TPM_RC_H + TPM_RC_2) +# define RC_FieldUpgradeStart_fuDigest (TPM_RC_P + TPM_RC_1) +# define RC_FieldUpgradeStart_manifestSignature (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_FieldUpgradeStart(FieldUpgradeStart_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_FIELDUPGRADESTART_FP_H_ +#endif // CC_FieldUpgradeStart diff --git a/TPMCmd/tpm/include/private/prototypes/FirmwareRead_fp.h b/TPMCmd/tpm/include/private/prototypes/FirmwareRead_fp.h new file mode 100644 index 00000000..9fd4184f --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/FirmwareRead_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_FirmwareRead // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_FIRMWAREREAD_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_FIRMWAREREAD_FP_H_ + +// Input structure definition +typedef struct +{ + UINT32 sequenceNumber; +} FirmwareRead_In; + +// Output structure definition +typedef struct +{ + TPM2B_MAX_BUFFER fuData; +} FirmwareRead_Out; + +// Response code modifiers +# define RC_FirmwareRead_sequenceNumber (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_FirmwareRead(FirmwareRead_In* in, FirmwareRead_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_FIRMWAREREAD_FP_H_ +#endif // CC_FirmwareRead diff --git a/TPMCmd/tpm/include/private/prototypes/FlushContext_fp.h b/TPMCmd/tpm/include/private/prototypes/FlushContext_fp.h new file mode 100644 index 00000000..c550cf34 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/FlushContext_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_FlushContext // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_FLUSHCONTEXT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_FLUSHCONTEXT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_CONTEXT flushHandle; +} FlushContext_In; + +// Response code modifiers +# define RC_FlushContext_flushHandle (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_FlushContext(FlushContext_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_FLUSHCONTEXT_FP_H_ +#endif // CC_FlushContext diff --git a/TPMCmd/tpm/include/private/prototypes/GetCapability_fp.h b/TPMCmd/tpm/include/private/prototypes/GetCapability_fp.h new file mode 100644 index 00000000..d67cb60d --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/GetCapability_fp.h @@ -0,0 +1,34 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_GetCapability // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETCAPABILITY_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETCAPABILITY_FP_H_ + +// Input structure definition +typedef struct +{ + TPM_CAP capability; + UINT32 property; + UINT32 propertyCount; +} GetCapability_In; + +// Output structure definition +typedef struct +{ + TPMI_YES_NO moreData; + TPMS_CAPABILITY_DATA capabilityData; +} GetCapability_Out; + +// Response code modifiers +# define RC_GetCapability_capability (TPM_RC_P + TPM_RC_1) +# define RC_GetCapability_property (TPM_RC_P + TPM_RC_2) +# define RC_GetCapability_propertyCount (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_GetCapability(GetCapability_In* in, GetCapability_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETCAPABILITY_FP_H_ +#endif // CC_GetCapability diff --git a/TPMCmd/tpm/include/private/prototypes/GetCommandAuditDigest_fp.h b/TPMCmd/tpm/include/private/prototypes/GetCommandAuditDigest_fp.h new file mode 100644 index 00000000..87752f3e --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/GetCommandAuditDigest_fp.h @@ -0,0 +1,37 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_GetCommandAuditDigest // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETCOMMANDAUDITDIGEST_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETCOMMANDAUDITDIGEST_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_ENDORSEMENT privacyHandle; + TPMI_DH_OBJECT signHandle; + TPM2B_DATA qualifyingData; + TPMT_SIG_SCHEME inScheme; +} GetCommandAuditDigest_In; + +// Output structure definition +typedef struct +{ + TPM2B_ATTEST auditInfo; + TPMT_SIGNATURE signature; +} GetCommandAuditDigest_Out; + +// Response code modifiers +# define RC_GetCommandAuditDigest_privacyHandle (TPM_RC_H + TPM_RC_1) +# define RC_GetCommandAuditDigest_signHandle (TPM_RC_H + TPM_RC_2) +# define RC_GetCommandAuditDigest_qualifyingData (TPM_RC_P + TPM_RC_1) +# define RC_GetCommandAuditDigest_inScheme (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_GetCommandAuditDigest(GetCommandAuditDigest_In* in, + GetCommandAuditDigest_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETCOMMANDAUDITDIGEST_FP_H_ +#endif // CC_GetCommandAuditDigest diff --git a/TPMCmd/tpm/include/private/prototypes/GetRandom_fp.h b/TPMCmd/tpm/include/private/prototypes/GetRandom_fp.h new file mode 100644 index 00000000..f0360e31 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/GetRandom_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_GetRandom // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETRANDOM_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETRANDOM_FP_H_ + +// Input structure definition +typedef struct +{ + UINT16 bytesRequested; +} GetRandom_In; + +// Output structure definition +typedef struct +{ + TPM2B_DIGEST randomBytes; +} GetRandom_Out; + +// Response code modifiers +# define RC_GetRandom_bytesRequested (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_GetRandom(GetRandom_In* in, GetRandom_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETRANDOM_FP_H_ +#endif // CC_GetRandom diff --git a/TPMCmd/tpm/include/private/prototypes/GetSessionAuditDigest_fp.h b/TPMCmd/tpm/include/private/prototypes/GetSessionAuditDigest_fp.h new file mode 100644 index 00000000..d5a219e1 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/GetSessionAuditDigest_fp.h @@ -0,0 +1,39 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_GetSessionAuditDigest // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETSESSIONAUDITDIGEST_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETSESSIONAUDITDIGEST_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_ENDORSEMENT privacyAdminHandle; + TPMI_DH_OBJECT signHandle; + TPMI_SH_HMAC sessionHandle; + TPM2B_DATA qualifyingData; + TPMT_SIG_SCHEME inScheme; +} GetSessionAuditDigest_In; + +// Output structure definition +typedef struct +{ + TPM2B_ATTEST auditInfo; + TPMT_SIGNATURE signature; +} GetSessionAuditDigest_Out; + +// Response code modifiers +# define RC_GetSessionAuditDigest_privacyAdminHandle (TPM_RC_H + TPM_RC_1) +# define RC_GetSessionAuditDigest_signHandle (TPM_RC_H + TPM_RC_2) +# define RC_GetSessionAuditDigest_sessionHandle (TPM_RC_H + TPM_RC_3) +# define RC_GetSessionAuditDigest_qualifyingData (TPM_RC_P + TPM_RC_1) +# define RC_GetSessionAuditDigest_inScheme (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_GetSessionAuditDigest(GetSessionAuditDigest_In* in, + GetSessionAuditDigest_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETSESSIONAUDITDIGEST_FP_H_ +#endif // CC_GetSessionAuditDigest diff --git a/TPMCmd/tpm/include/private/prototypes/GetTestResult_fp.h b/TPMCmd/tpm/include/private/prototypes/GetTestResult_fp.h new file mode 100644 index 00000000..9a10afbc --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/GetTestResult_fp.h @@ -0,0 +1,21 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_GetTestResult // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETTESTRESULT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETTESTRESULT_FP_H_ + +// Output structure definition +typedef struct +{ + TPM2B_MAX_BUFFER outData; + TPM_RC testResult; +} GetTestResult_Out; + +// Function prototype +TPM_RC +TPM2_GetTestResult(GetTestResult_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETTESTRESULT_FP_H_ +#endif // CC_GetTestResult diff --git a/TPMCmd/tpm/include/private/prototypes/GetTime_fp.h b/TPMCmd/tpm/include/private/prototypes/GetTime_fp.h new file mode 100644 index 00000000..d0826dac --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/GetTime_fp.h @@ -0,0 +1,36 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_GetTime // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETTIME_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETTIME_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_ENDORSEMENT privacyAdminHandle; + TPMI_DH_OBJECT signHandle; + TPM2B_DATA qualifyingData; + TPMT_SIG_SCHEME inScheme; +} GetTime_In; + +// Output structure definition +typedef struct +{ + TPM2B_ATTEST timeInfo; + TPMT_SIGNATURE signature; +} GetTime_Out; + +// Response code modifiers +# define RC_GetTime_privacyAdminHandle (TPM_RC_H + TPM_RC_1) +# define RC_GetTime_signHandle (TPM_RC_H + TPM_RC_2) +# define RC_GetTime_qualifyingData (TPM_RC_P + TPM_RC_1) +# define RC_GetTime_inScheme (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_GetTime(GetTime_In* in, GetTime_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_GETTIME_FP_H_ +#endif // CC_GetTime diff --git a/TPMCmd/tpm/include/private/prototypes/HMAC_Start_fp.h b/TPMCmd/tpm/include/private/prototypes/HMAC_Start_fp.h new file mode 100644 index 00000000..e926d406 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/HMAC_Start_fp.h @@ -0,0 +1,33 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_HMAC_Start // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_HMAC_START_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_HMAC_START_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT handle; + TPM2B_AUTH auth; + TPMI_ALG_HASH hashAlg; +} HMAC_Start_In; + +// Output structure definition +typedef struct +{ + TPMI_DH_OBJECT sequenceHandle; +} HMAC_Start_Out; + +// Response code modifiers +# define RC_HMAC_Start_handle (TPM_RC_H + TPM_RC_1) +# define RC_HMAC_Start_auth (TPM_RC_P + TPM_RC_1) +# define RC_HMAC_Start_hashAlg (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_HMAC_Start(HMAC_Start_In* in, HMAC_Start_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_HMAC_START_FP_H_ +#endif // CC_HMAC_Start diff --git a/TPMCmd/tpm/include/private/prototypes/HMAC_fp.h b/TPMCmd/tpm/include/private/prototypes/HMAC_fp.h new file mode 100644 index 00000000..213f3c3f --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/HMAC_fp.h @@ -0,0 +1,33 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_HMAC // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_HMAC_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_HMAC_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT handle; + TPM2B_MAX_BUFFER buffer; + TPMI_ALG_HASH hashAlg; +} HMAC_In; + +// Output structure definition +typedef struct +{ + TPM2B_DIGEST outHMAC; +} HMAC_Out; + +// Response code modifiers +# define RC_HMAC_handle (TPM_RC_H + TPM_RC_1) +# define RC_HMAC_buffer (TPM_RC_P + TPM_RC_1) +# define RC_HMAC_hashAlg (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_HMAC(HMAC_In* in, HMAC_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_HMAC_FP_H_ +#endif // CC_HMAC diff --git a/TPMCmd/tpm/include/private/prototypes/Handle_fp.h b/TPMCmd/tpm/include/private/prototypes/Handle_fp.h new file mode 100644 index 00000000..daaeacca --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Handle_fp.h @@ -0,0 +1,60 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _HANDLE_FP_H_ +#define _HANDLE_FP_H_ + +//*** HandleGetType() +// This function returns the type of a handle which is the MSO of the handle. +TPM_HT +HandleGetType(TPM_HANDLE handle // IN: a handle to be checked +); + +//*** NextPermanentHandle() +// This function returns the permanent handle that is equal to the input value or +// is the next higher value. If there is no handle with the input value and there +// is no next higher value, it returns 0: +TPM_HANDLE +NextPermanentHandle(TPM_HANDLE inHandle // IN: the handle to check +); + +//*** PermanentCapGetHandles() +// This function returns a list of the permanent handles of PCR, started from +// 'handle'. If 'handle' is larger than the largest permanent handle, an empty list +// will be returned with 'more' set to NO. +// Return Type: TPMI_YES_NO +// YES if there are more handles available +// NO all the available handles has been returned +TPMI_YES_NO +PermanentCapGetHandles(TPM_HANDLE handle, // IN: start handle + UINT32 count, // IN: count of returned handles + TPML_HANDLE* handleList // OUT: list of handle +); + +//*** PermanentCapGetOneHandle() +// This function returns whether a permanent handle exists. +BOOL PermanentCapGetOneHandle(TPM_HANDLE handle // IN: handle +); + +//*** PermanentHandleGetPolicy() +// This function returns a list of the permanent handles of PCR, started from +// 'handle'. If 'handle' is larger than the largest permanent handle, an empty list +// will be returned with 'more' set to NO. +// Return Type: TPMI_YES_NO +// YES if there are more handles available +// NO all the available handles has been returned +TPMI_YES_NO +PermanentHandleGetPolicy(TPM_HANDLE handle, // IN: start handle + UINT32 count, // IN: max count of returned handles + TPML_TAGGED_POLICY* policyList // OUT: list of handle +); + +//*** PermanentHandleGetOnePolicy() +// This function returns a permanent handle's policy, if present. +BOOL PermanentHandleGetOnePolicy(TPM_HANDLE handle, // IN: handle + TPMS_TAGGED_POLICY* policy // OUT: tagged policy +); + +#endif // _HANDLE_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/HashSequenceStart_fp.h b/TPMCmd/tpm/include/private/prototypes/HashSequenceStart_fp.h new file mode 100644 index 00000000..35263a4a --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/HashSequenceStart_fp.h @@ -0,0 +1,31 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_HashSequenceStart // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_HASHSEQUENCESTART_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_HASHSEQUENCESTART_FP_H_ + +// Input structure definition +typedef struct +{ + TPM2B_AUTH auth; + TPMI_ALG_HASH hashAlg; +} HashSequenceStart_In; + +// Output structure definition +typedef struct +{ + TPMI_DH_OBJECT sequenceHandle; +} HashSequenceStart_Out; + +// Response code modifiers +# define RC_HashSequenceStart_auth (TPM_RC_P + TPM_RC_1) +# define RC_HashSequenceStart_hashAlg (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_HashSequenceStart(HashSequenceStart_In* in, HashSequenceStart_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_HASHSEQUENCESTART_FP_H_ +#endif // CC_HashSequenceStart diff --git a/TPMCmd/tpm/include/private/prototypes/Hash_fp.h b/TPMCmd/tpm/include/private/prototypes/Hash_fp.h new file mode 100644 index 00000000..d726e980 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Hash_fp.h @@ -0,0 +1,34 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Hash // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_HASH_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_HASH_FP_H_ + +// Input structure definition +typedef struct +{ + TPM2B_MAX_BUFFER data; + TPMI_ALG_HASH hashAlg; + TPMI_RH_HIERARCHY hierarchy; +} Hash_In; + +// Output structure definition +typedef struct +{ + TPM2B_DIGEST outHash; + TPMT_TK_HASHCHECK validation; +} Hash_Out; + +// Response code modifiers +# define RC_Hash_data (TPM_RC_P + TPM_RC_1) +# define RC_Hash_hashAlg (TPM_RC_P + TPM_RC_2) +# define RC_Hash_hierarchy (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_Hash(Hash_In* in, Hash_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_HASH_FP_H_ +#endif // CC_Hash diff --git a/TPMCmd/tpm/include/private/prototypes/HierarchyChangeAuth_fp.h b/TPMCmd/tpm/include/private/prototypes/HierarchyChangeAuth_fp.h new file mode 100644 index 00000000..caa6dbdb --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/HierarchyChangeAuth_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_HierarchyChangeAuth // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_HIERARCHYCHANGEAUTH_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_HIERARCHYCHANGEAUTH_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_HIERARCHY_AUTH authHandle; + TPM2B_AUTH newAuth; +} HierarchyChangeAuth_In; + +// Response code modifiers +# define RC_HierarchyChangeAuth_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_HierarchyChangeAuth_newAuth (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_HierarchyChangeAuth(HierarchyChangeAuth_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_HIERARCHYCHANGEAUTH_FP_H_ +#endif // CC_HierarchyChangeAuth diff --git a/TPMCmd/tpm/include/private/prototypes/HierarchyControl_fp.h b/TPMCmd/tpm/include/private/prototypes/HierarchyControl_fp.h new file mode 100644 index 00000000..b121e234 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/HierarchyControl_fp.h @@ -0,0 +1,27 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_HierarchyControl // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_HIERARCHYCONTROL_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_HIERARCHYCONTROL_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_BASE_HIERARCHY authHandle; + TPMI_RH_ENABLES enable; + TPMI_YES_NO state; +} HierarchyControl_In; + +// Response code modifiers +# define RC_HierarchyControl_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_HierarchyControl_enable (TPM_RC_P + TPM_RC_1) +# define RC_HierarchyControl_state (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_HierarchyControl(HierarchyControl_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_HIERARCHYCONTROL_FP_H_ +#endif // CC_HierarchyControl diff --git a/TPMCmd/tpm/include/private/prototypes/Hierarchy_fp.h b/TPMCmd/tpm/include/private/prototypes/Hierarchy_fp.h new file mode 100644 index 00000000..ba363975 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Hierarchy_fp.h @@ -0,0 +1,93 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 04:23:27PM + */ + +#ifndef _HIERARCHY_FP_H_ +#define _HIERARCHY_FP_H_ + +//*** HierarchyPreInstall() +// This function performs the initialization functions for the hierarchy +// when the TPM is simulated. This function should not be called if the +// TPM is not in a manufacturing mode at the manufacturer, or in a simulated +// environment. +void HierarchyPreInstall_Init(void); + +//*** HierarchyStartup() +// This function is called at TPM2_Startup() to initialize the hierarchy +// related values. +BOOL HierarchyStartup(STARTUP_TYPE type // IN: start up type +); + +//*** HierarchyGetProof() +// This function derives the proof value associated with a hierarchy. It returns a +// buffer containing the proof value. +// +// Return Type: TPM_RC +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects or the TPM failed +// to derive the Firmware Secret. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the TPM failed +// to derive the Firmware SVN Secret for the requested +// SVN. +TPM_RC HierarchyGetProof(TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant + TPM2B_PROOF* proof // OUT: proof buffer +); + +//*** HierarchyGetPrimarySeed() +// This function derives the primary seed of a hierarchy. +// +// Return Type: TPM_RC +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects or the TPM failed +// to derive the Firmware Secret. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the TPM failed +// to derive the Firmware SVN Secret for the requested +// SVN. +TPM_RC HierarchyGetPrimarySeed(TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy + TPM2B_SEED* seed // OUT: seed buffer +); + +//*** ValidateHierarchy() +// This function ensures a given hierarchy is valid and enabled. +// Return Type: TPM_RC +// TPM_RC_HIERARCHY Hierarchy is disabled +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the given SVN +// is greater than the TPM's current SVN. +// TPM_RC_VALUE Hierarchy is not valid +TPM_RC ValidateHierarchy(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy +); + +//*** HierarchyIsEnabled() +// This function checks to see if a hierarchy is enabled. +// NOTE: The TPM_RH_NULL hierarchy is always enabled. +// Return Type: BOOL +// TRUE(1) hierarchy is enabled +// FALSE(0) hierarchy is disabled +BOOL HierarchyIsEnabled(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy +); + +//*** HierarchyNormalizeHandle +// This function accepts a handle that may or may not be FW- or SVN-bound, +// and returns the base hierarchy to which the handle refers. +TPMI_RH_HIERARCHY HierarchyNormalizeHandle(TPMI_RH_HIERARCHY handle // IN +); + +//*** HierarchyIsFirmwareLimited +// This function accepts a hierarchy handle and returns whether it is firmware- +// limited. +BOOL HierarchyIsFirmwareLimited(TPMI_RH_HIERARCHY handle // IN +); + +//*** HierarchyIsSvnLimited +// This function accepts a hierarchy handle and returns whether it is SVN- +// limited. +BOOL HierarchyIsSvnLimited(TPMI_RH_HIERARCHY handle // IN +); + +#endif // _HIERARCHY_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Import_fp.h b/TPMCmd/tpm/include/private/prototypes/Import_fp.h new file mode 100644 index 00000000..22ef6f3f --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Import_fp.h @@ -0,0 +1,39 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Import // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_IMPORT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_IMPORT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT parentHandle; + TPM2B_DATA encryptionKey; + TPM2B_PUBLIC objectPublic; + TPM2B_PRIVATE duplicate; + TPM2B_ENCRYPTED_SECRET inSymSeed; + TPMT_SYM_DEF_OBJECT symmetricAlg; +} Import_In; + +// Output structure definition +typedef struct +{ + TPM2B_PRIVATE outPrivate; +} Import_Out; + +// Response code modifiers +# define RC_Import_parentHandle (TPM_RC_H + TPM_RC_1) +# define RC_Import_encryptionKey (TPM_RC_P + TPM_RC_1) +# define RC_Import_objectPublic (TPM_RC_P + TPM_RC_2) +# define RC_Import_duplicate (TPM_RC_P + TPM_RC_3) +# define RC_Import_inSymSeed (TPM_RC_P + TPM_RC_4) +# define RC_Import_symmetricAlg (TPM_RC_P + TPM_RC_5) + +// Function prototype +TPM_RC +TPM2_Import(Import_In* in, Import_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_IMPORT_FP_H_ +#endif // CC_Import diff --git a/TPMCmd/tpm/include/private/prototypes/IncrementalSelfTest_fp.h b/TPMCmd/tpm/include/private/prototypes/IncrementalSelfTest_fp.h new file mode 100644 index 00000000..9ecd65da --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/IncrementalSelfTest_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_IncrementalSelfTest // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_INCREMENTALSELFTEST_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_INCREMENTALSELFTEST_FP_H_ + +// Input structure definition +typedef struct +{ + TPML_ALG toTest; +} IncrementalSelfTest_In; + +// Output structure definition +typedef struct +{ + TPML_ALG toDoList; +} IncrementalSelfTest_Out; + +// Response code modifiers +# define RC_IncrementalSelfTest_toTest (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_IncrementalSelfTest(IncrementalSelfTest_In* in, IncrementalSelfTest_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_INCREMENTALSELFTEST_FP_H_ +#endif // CC_IncrementalSelfTest diff --git a/TPMCmd/tpm/include/private/prototypes/IoBuffers_fp.h b/TPMCmd/tpm/include/private/prototypes/IoBuffers_fp.h new file mode 100644 index 00000000..de42f88e --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/IoBuffers_fp.h @@ -0,0 +1,40 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _IO_BUFFERS_FP_H_ +#define _IO_BUFFERS_FP_H_ + +//*** MemoryIoBufferAllocationReset() +// This function is used to reset the allocation of buffers. +void MemoryIoBufferAllocationReset(void); + +//*** MemoryIoBufferZero() +// Function zeros the action I/O buffer at the end of a command. Calling this is +// not mandatory for proper functionality. +void MemoryIoBufferZero(void); + +//*** MemoryGetInBuffer() +// This function returns the address of the buffer into which the +// command parameters will be unmarshaled in preparation for calling +// the command actions. +BYTE* MemoryGetInBuffer(UINT32 size // Size, in bytes, required for the input + // unmarshaling +); + +//*** MemoryGetOutBuffer() +// This function returns the address of the buffer into which the command +// action code places its output values. +BYTE* MemoryGetOutBuffer(UINT32 size // required size of the buffer +); + +//*** IsLabelProperlyFormatted() +// This function checks that a label is a null-terminated string. +// NOTE: this function is here because there was no better place for it. +// Return Type: BOOL +// TRUE(1) string is null terminated +// FALSE(0) string is not null terminated +BOOL IsLabelProperlyFormatted(TPM2B* x); + +#endif // _IO_BUFFERS_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/LoadExternal_fp.h b/TPMCmd/tpm/include/private/prototypes/LoadExternal_fp.h new file mode 100644 index 00000000..c7b5b8f3 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/LoadExternal_fp.h @@ -0,0 +1,34 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_LoadExternal // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_LOADEXTERNAL_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_LOADEXTERNAL_FP_H_ + +// Input structure definition +typedef struct +{ + TPM2B_SENSITIVE inPrivate; + TPM2B_PUBLIC inPublic; + TPMI_RH_HIERARCHY hierarchy; +} LoadExternal_In; + +// Output structure definition +typedef struct +{ + TPM_HANDLE objectHandle; + TPM2B_NAME name; +} LoadExternal_Out; + +// Response code modifiers +# define RC_LoadExternal_inPrivate (TPM_RC_P + TPM_RC_1) +# define RC_LoadExternal_inPublic (TPM_RC_P + TPM_RC_2) +# define RC_LoadExternal_hierarchy (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_LoadExternal(LoadExternal_In* in, LoadExternal_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_LOADEXTERNAL_FP_H_ +#endif // CC_LoadExternal diff --git a/TPMCmd/tpm/include/private/prototypes/Load_fp.h b/TPMCmd/tpm/include/private/prototypes/Load_fp.h new file mode 100644 index 00000000..e12d9e23 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Load_fp.h @@ -0,0 +1,34 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Load // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_LOAD_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_LOAD_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT parentHandle; + TPM2B_PRIVATE inPrivate; + TPM2B_PUBLIC inPublic; +} Load_In; + +// Output structure definition +typedef struct +{ + TPM_HANDLE objectHandle; + TPM2B_NAME name; +} Load_Out; + +// Response code modifiers +# define RC_Load_parentHandle (TPM_RC_H + TPM_RC_1) +# define RC_Load_inPrivate (TPM_RC_P + TPM_RC_1) +# define RC_Load_inPublic (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_Load(Load_In* in, Load_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_LOAD_FP_H_ +#endif // CC_Load diff --git a/TPMCmd/tpm/include/private/prototypes/Locality_fp.h b/TPMCmd/tpm/include/private/prototypes/Locality_fp.h new file mode 100644 index 00000000..fee5f1b8 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Locality_fp.h @@ -0,0 +1,18 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _LOCALITY_FP_H_ +#define _LOCALITY_FP_H_ + +//** LocalityGetAttributes() +// This function will convert a locality expressed as an integer into +// TPMA_LOCALITY form. +// +// The function returns the locality attribute. +TPMA_LOCALITY +LocalityGetAttributes(UINT8 locality // IN: locality value +); + +#endif // _LOCALITY_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/MAC_Start_fp.h b/TPMCmd/tpm/include/private/prototypes/MAC_Start_fp.h new file mode 100644 index 00000000..afd934fb --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/MAC_Start_fp.h @@ -0,0 +1,33 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_MAC_Start // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_MAC_START_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_MAC_START_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT handle; + TPM2B_AUTH auth; + TPMI_ALG_MAC_SCHEME inScheme; +} MAC_Start_In; + +// Output structure definition +typedef struct +{ + TPMI_DH_OBJECT sequenceHandle; +} MAC_Start_Out; + +// Response code modifiers +# define RC_MAC_Start_handle (TPM_RC_H + TPM_RC_1) +# define RC_MAC_Start_auth (TPM_RC_P + TPM_RC_1) +# define RC_MAC_Start_inScheme (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_MAC_Start(MAC_Start_In* in, MAC_Start_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_MAC_START_FP_H_ +#endif // CC_MAC_Start diff --git a/TPMCmd/tpm/include/private/prototypes/MAC_fp.h b/TPMCmd/tpm/include/private/prototypes/MAC_fp.h new file mode 100644 index 00000000..8360220d --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/MAC_fp.h @@ -0,0 +1,33 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_MAC // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_MAC_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_MAC_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT handle; + TPM2B_MAX_BUFFER buffer; + TPMI_ALG_MAC_SCHEME inScheme; +} MAC_In; + +// Output structure definition +typedef struct +{ + TPM2B_DIGEST outMAC; +} MAC_Out; + +// Response code modifiers +# define RC_MAC_handle (TPM_RC_H + TPM_RC_1) +# define RC_MAC_buffer (TPM_RC_P + TPM_RC_1) +# define RC_MAC_inScheme (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_MAC(MAC_In* in, MAC_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_MAC_FP_H_ +#endif // CC_MAC diff --git a/TPMCmd/tpm/include/private/prototypes/MakeCredential_fp.h b/TPMCmd/tpm/include/private/prototypes/MakeCredential_fp.h new file mode 100644 index 00000000..25c8ca90 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/MakeCredential_fp.h @@ -0,0 +1,34 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_MakeCredential // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_MAKECREDENTIAL_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_MAKECREDENTIAL_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT handle; + TPM2B_DIGEST credential; + TPM2B_NAME objectName; +} MakeCredential_In; + +// Output structure definition +typedef struct +{ + TPM2B_ID_OBJECT credentialBlob; + TPM2B_ENCRYPTED_SECRET secret; +} MakeCredential_Out; + +// Response code modifiers +# define RC_MakeCredential_handle (TPM_RC_H + TPM_RC_1) +# define RC_MakeCredential_credential (TPM_RC_P + TPM_RC_1) +# define RC_MakeCredential_objectName (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_MakeCredential(MakeCredential_In* in, MakeCredential_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_MAKECREDENTIAL_FP_H_ +#endif // CC_MakeCredential diff --git a/TPMCmd/tpm/include/private/prototypes/Marshal_fp.h b/TPMCmd/tpm/include/private/prototypes/Marshal_fp.h new file mode 100644 index 00000000..595cc1e1 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Marshal_fp.h @@ -0,0 +1,2405 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#ifndef _MARSHAL_FP_H_ +#define _MARSHAL_FP_H_ + +// Table "Definition of Base Types" (Part 2: Structures) +// UINT8 definition +TPM_RC +UINT8_Unmarshal(UINT8* target, BYTE** buffer, INT32* size); +UINT16 +UINT8_Marshal(UINT8* source, BYTE** buffer, INT32* size); + +// BYTE definition +#if !USE_MARSHALING_DEFINES +TPM_RC +BYTE_Unmarshal(BYTE* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define BYTE_Unmarshal(target, buffer, size) \ + UINT8_Unmarshal((UINT8*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +BYTE_Marshal(BYTE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define BYTE_Marshal(source, buffer, size) \ + UINT8_Marshal((UINT8*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// INT8 definition +#if !USE_MARSHALING_DEFINES +TPM_RC +INT8_Unmarshal(INT8* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define INT8_Unmarshal(target, buffer, size) \ + UINT8_Unmarshal((UINT8*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +INT8_Marshal(INT8* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define INT8_Marshal(source, buffer, size) \ + UINT8_Marshal((UINT8*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// UINT16 definition +TPM_RC +UINT16_Unmarshal(UINT16* target, BYTE** buffer, INT32* size); +UINT16 +UINT16_Marshal(UINT16* source, BYTE** buffer, INT32* size); + +// INT16 definition +#if !USE_MARSHALING_DEFINES +TPM_RC +INT16_Unmarshal(INT16* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define INT16_Unmarshal(target, buffer, size) \ + UINT16_Unmarshal((UINT16*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +INT16_Marshal(INT16* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define INT16_Marshal(source, buffer, size) \ + UINT16_Marshal((UINT16*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// UINT32 definition +TPM_RC +UINT32_Unmarshal(UINT32* target, BYTE** buffer, INT32* size); +UINT16 +UINT32_Marshal(UINT32* source, BYTE** buffer, INT32* size); + +// INT32 definition +#if !USE_MARSHALING_DEFINES +TPM_RC +INT32_Unmarshal(INT32* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define INT32_Unmarshal(target, buffer, size) \ + UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +INT32_Marshal(INT32* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define INT32_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// UINT64 definition +TPM_RC +UINT64_Unmarshal(UINT64* target, BYTE** buffer, INT32* size); +UINT16 +UINT64_Marshal(UINT64* source, BYTE** buffer, INT32* size); + +// INT64 definition +#if !USE_MARSHALING_DEFINES +TPM_RC +INT64_Unmarshal(INT64* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define INT64_Unmarshal(target, buffer, size) \ + UINT64_Unmarshal((UINT64*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +INT64_Marshal(INT64* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define INT64_Marshal(source, buffer, size) \ + UINT64_Marshal((UINT64*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of Types for Documentation Clarity" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_ALGORITHM_ID_Unmarshal(TPM_ALGORITHM_ID* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_ALGORITHM_ID_Unmarshal(target, buffer, size) \ + UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_ALGORITHM_ID_Marshal(TPM_ALGORITHM_ID* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_ALGORITHM_ID_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_AUTHORIZATION_SIZE_Unmarshal( + TPM_AUTHORIZATION_SIZE* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_AUTHORIZATION_SIZE_Unmarshal(target, buffer, size) \ + UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_AUTHORIZATION_SIZE_Marshal( + TPM_AUTHORIZATION_SIZE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_AUTHORIZATION_SIZE_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_KEY_BITS_Unmarshal(TPM_KEY_BITS* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_KEY_BITS_Unmarshal(target, buffer, size) \ + UINT16_Unmarshal((UINT16*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_KEY_BITS_Marshal(TPM_KEY_BITS* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_KEY_BITS_Marshal(source, buffer, size) \ + UINT16_Marshal((UINT16*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_KEY_SIZE_Unmarshal(TPM_KEY_SIZE* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_KEY_SIZE_Unmarshal(target, buffer, size) \ + UINT16_Unmarshal((UINT16*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_KEY_SIZE_Marshal(TPM_KEY_SIZE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_KEY_SIZE_Marshal(source, buffer, size) \ + UINT16_Marshal((UINT16*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_MODIFIER_INDICATOR_Unmarshal( + TPM_MODIFIER_INDICATOR* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_MODIFIER_INDICATOR_Unmarshal(target, buffer, size) \ + UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_MODIFIER_INDICATOR_Marshal( + TPM_MODIFIER_INDICATOR* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_MODIFIER_INDICATOR_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_PARAMETER_SIZE_Unmarshal(TPM_PARAMETER_SIZE* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_PARAMETER_SIZE_Unmarshal(target, buffer, size) \ + UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_PARAMETER_SIZE_Marshal(TPM_PARAMETER_SIZE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_PARAMETER_SIZE_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_CONSTANTS32 Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_CONSTANTS32_Marshal(TPM_CONSTANTS32* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_CONSTANTS32_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_ALG_ID Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_ALG_ID_Unmarshal(TPM_ALG_ID* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_ALG_ID_Unmarshal(target, buffer, size) \ + UINT16_Unmarshal((UINT16*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_ALG_ID_Marshal(TPM_ALG_ID* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_ALG_ID_Marshal(source, buffer, size) \ + UINT16_Marshal((UINT16*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_ECC_CURVE Constants" (Part 2: Structures) +TPM_RC +TPM_ECC_CURVE_Unmarshal(TPM_ECC_CURVE* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_ECC_CURVE_Marshal(TPM_ECC_CURVE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_ECC_CURVE_Marshal(source, buffer, size) \ + UINT16_Marshal((UINT16*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_CC Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_CC_Unmarshal(TPM_CC* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_CC_Unmarshal(target, buffer, size) \ + UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_CC_Marshal(TPM_CC* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_CC_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_RC Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_RC_Marshal(TPM_RC* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_RC_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_CLOCK_ADJUST Constants" (Part 2: Structures) +TPM_RC +TPM_CLOCK_ADJUST_Unmarshal(TPM_CLOCK_ADJUST* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPM_EO Constants" (Part 2: Structures) +TPM_RC +TPM_EO_Unmarshal(TPM_EO* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_EO_Marshal(TPM_EO* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_EO_Marshal(source, buffer, size) \ + UINT16_Marshal((UINT16*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_ST Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_ST_Unmarshal(TPM_ST* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_ST_Unmarshal(target, buffer, size) \ + UINT16_Unmarshal((UINT16*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_ST_Marshal(TPM_ST* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_ST_Marshal(source, buffer, size) \ + UINT16_Marshal((UINT16*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_SU Constants" (Part 2: Structures) +TPM_RC +TPM_SU_Unmarshal(TPM_SU* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPM_SE Constants" (Part 2: Structures) +TPM_RC +TPM_SE_Unmarshal(TPM_SE* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPM_CAP Constants" (Part 2: Structures) +TPM_RC +TPM_CAP_Unmarshal(TPM_CAP* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_CAP_Marshal(TPM_CAP* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_CAP_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_PT Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_PT_Unmarshal(TPM_PT* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_PT_Unmarshal(target, buffer, size) \ + UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_PT_Marshal(TPM_PT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_PT_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_PT_PCR Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_PT_PCR_Unmarshal(TPM_PT_PCR* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_PT_PCR_Unmarshal(target, buffer, size) \ + UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_PT_PCR_Marshal(TPM_PT_PCR* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_PT_PCR_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_PS Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_PS_Marshal(TPM_PS* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_PS_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of Types for Handles" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_HANDLE_Unmarshal(TPM_HANDLE* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_HANDLE_Unmarshal(target, buffer, size) \ + UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_HANDLE_Marshal(TPM_HANDLE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_HANDLE_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_HT Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_HT_Unmarshal(TPM_HT* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_HT_Unmarshal(target, buffer, size) \ + UINT8_Unmarshal((UINT8*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_HT_Marshal(TPM_HT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_HT_Marshal(source, buffer, size) \ + UINT8_Marshal((UINT8*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_RH Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_RH_Unmarshal(TPM_RH* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_RH_Unmarshal(target, buffer, size) \ + TPM_HANDLE_Unmarshal((TPM_HANDLE*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_RH_Marshal(TPM_RH* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_RH_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_HC Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM_HC_Unmarshal(TPM_HC* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_HC_Unmarshal(target, buffer, size) \ + TPM_HANDLE_Unmarshal((TPM_HANDLE*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_HC_Marshal(TPM_HC* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_HC_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_ALGORITHM Bits" (Part 2: Structures) +TPM_RC +TPMA_ALGORITHM_Unmarshal(TPMA_ALGORITHM* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_ALGORITHM_Marshal(TPMA_ALGORITHM* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_ALGORITHM_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_OBJECT Bits" (Part 2: Structures) +TPM_RC +TPMA_OBJECT_Unmarshal(TPMA_OBJECT* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_OBJECT_Marshal(TPMA_OBJECT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_OBJECT_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_SESSION Bits" (Part 2: Structures) +TPM_RC +TPMA_SESSION_Unmarshal(TPMA_SESSION* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_SESSION_Marshal(TPMA_SESSION* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_SESSION_Marshal(source, buffer, size) \ + UINT8_Marshal((UINT8*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_LOCALITY Bits" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMA_LOCALITY_Unmarshal(TPMA_LOCALITY* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_LOCALITY_Unmarshal(target, buffer, size) \ + UINT8_Unmarshal((UINT8*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_LOCALITY_Marshal(TPMA_LOCALITY* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_LOCALITY_Marshal(source, buffer, size) \ + UINT8_Marshal((UINT8*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_PERMANENT Bits" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_PERMANENT_Marshal(TPMA_PERMANENT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_PERMANENT_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_STARTUP_CLEAR Bits" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_STARTUP_CLEAR_Marshal(TPMA_STARTUP_CLEAR* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_STARTUP_CLEAR_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_MEMORY Bits" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_MEMORY_Marshal(TPMA_MEMORY* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_MEMORY_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_CC Bits" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_CC_Marshal(TPMA_CC* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_CC_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_MODES Bits" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_MODES_Marshal(TPMA_MODES* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_MODES_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_ACT Bits" (Part 2: Structures) +TPM_RC +TPMA_ACT_Unmarshal(TPMA_ACT* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_ACT_Marshal(TPMA_ACT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_ACT_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_YES_NO Type" (Part 2: Structures) +TPM_RC +TPMI_YES_NO_Unmarshal(TPMI_YES_NO* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_YES_NO_Marshal(TPMI_YES_NO* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_YES_NO_Marshal(source, buffer, size) \ + BYTE_Marshal((BYTE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_DH_OBJECT Type" (Part 2: Structures) +TPM_RC +TPMI_DH_OBJECT_Unmarshal( + TPMI_DH_OBJECT* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_DH_OBJECT_Marshal(TPMI_DH_OBJECT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_DH_OBJECT_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_DH_PARENT Type" (Part 2: Structures) +TPM_RC +TPMI_DH_PARENT_Unmarshal(TPMI_DH_PARENT* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_DH_PARENT_Marshal(TPMI_DH_PARENT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_DH_PARENT_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_DH_PERSISTENT Type" (Part 2: Structures) +TPM_RC +TPMI_DH_PERSISTENT_Unmarshal(TPMI_DH_PERSISTENT* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_DH_PERSISTENT_Marshal(TPMI_DH_PERSISTENT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_DH_PERSISTENT_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_DH_ENTITY Type" (Part 2: Structures) +TPM_RC +TPMI_DH_ENTITY_Unmarshal( + TPMI_DH_ENTITY* target, BYTE** buffer, INT32* size, BOOL flag); + +// Table "Definition of TPMI_DH_PCR Type" (Part 2: Structures) +TPM_RC +TPMI_DH_PCR_Unmarshal(TPMI_DH_PCR* target, BYTE** buffer, INT32* size, BOOL flag); + +// Table "Definition of TPMI_SH_AUTH_SESSION Type" (Part 2: Structures) +TPM_RC +TPMI_SH_AUTH_SESSION_Unmarshal( + TPMI_SH_AUTH_SESSION* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_SH_AUTH_SESSION_Marshal( + TPMI_SH_AUTH_SESSION* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_SH_AUTH_SESSION_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_SH_HMAC Type" (Part 2: Structures) +TPM_RC +TPMI_SH_HMAC_Unmarshal(TPMI_SH_HMAC* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_SH_HMAC_Marshal(TPMI_SH_HMAC* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_SH_HMAC_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_SH_POLICY Type" (Part 2: Structures) +TPM_RC +TPMI_SH_POLICY_Unmarshal(TPMI_SH_POLICY* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_SH_POLICY_Marshal(TPMI_SH_POLICY* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_SH_POLICY_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_DH_CONTEXT Type" (Part 2: Structures) +TPM_RC +TPMI_DH_CONTEXT_Unmarshal(TPMI_DH_CONTEXT* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_DH_CONTEXT_Marshal(TPMI_DH_CONTEXT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_DH_CONTEXT_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_DH_SAVED Type" (Part 2: Structures) +TPM_RC +TPMI_DH_SAVED_Unmarshal(TPMI_DH_SAVED* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_DH_SAVED_Marshal(TPMI_DH_SAVED* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_DH_SAVED_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_RH_HIERARCHY Type" (Part 2: Structures) +TPM_RC +TPMI_RH_HIERARCHY_Unmarshal(TPMI_RH_HIERARCHY* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RH_HIERARCHY_Marshal(TPMI_RH_HIERARCHY* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_RH_HIERARCHY_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_RH_ENABLES Type" (Part 2: Structures) +TPM_RC +TPMI_RH_ENABLES_Unmarshal( + TPMI_RH_ENABLES* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RH_ENABLES_Marshal(TPMI_RH_ENABLES* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_RH_ENABLES_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_RH_HIERARCHY_AUTH Type" (Part 2: Structures) +TPM_RC +TPMI_RH_HIERARCHY_AUTH_Unmarshal( + TPMI_RH_HIERARCHY_AUTH* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_RH_HIERARCHY_POLICY Type" (Part 2: Structures) +TPM_RC +TPMI_RH_HIERARCHY_POLICY_Unmarshal( + TPMI_RH_HIERARCHY_POLICY* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_RH_BASE_HIERARCHY Type" (Part 2: Structures) +TPM_RC +TPMI_RH_BASE_HIERARCHY_Unmarshal( + TPMI_RH_BASE_HIERARCHY* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RH_BASE_HIERARCHY_Marshal( + TPMI_RH_BASE_HIERARCHY* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_RH_BASE_HIERARCHY_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_RH_PLATFORM Type" (Part 2: Structures) +TPM_RC +TPMI_RH_PLATFORM_Unmarshal(TPMI_RH_PLATFORM* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_RH_OWNER Type" (Part 2: Structures) +TPM_RC +TPMI_RH_OWNER_Unmarshal(TPMI_RH_OWNER* target, BYTE** buffer, INT32* size, BOOL flag); + +// Table "Definition of TPMI_RH_ENDORSEMENT Type" (Part 2: Structures) +TPM_RC +TPMI_RH_ENDORSEMENT_Unmarshal( + TPMI_RH_ENDORSEMENT* target, BYTE** buffer, INT32* size, BOOL flag); + +// Table "Definition of TPMI_RH_PROVISION Type" (Part 2: Structures) +TPM_RC +TPMI_RH_PROVISION_Unmarshal(TPMI_RH_PROVISION* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_RH_CLEAR Type" (Part 2: Structures) +TPM_RC +TPMI_RH_CLEAR_Unmarshal(TPMI_RH_CLEAR* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_RH_NV_AUTH Type" (Part 2: Structures) +TPM_RC +TPMI_RH_NV_AUTH_Unmarshal(TPMI_RH_NV_AUTH* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_RH_LOCKOUT Type" (Part 2: Structures) +TPM_RC +TPMI_RH_LOCKOUT_Unmarshal(TPMI_RH_LOCKOUT* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_RH_NV_INDEX Type" (Part 2: Structures) +TPM_RC +TPMI_RH_NV_INDEX_Unmarshal(TPMI_RH_NV_INDEX* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RH_NV_INDEX_Marshal(TPMI_RH_NV_INDEX* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_RH_NV_INDEX_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_RH_NV_DEFINED_INDEX Type" (Part 2: Structures) +TPM_RC +TPMI_RH_NV_DEFINED_INDEX_Unmarshal( + TPMI_RH_NV_DEFINED_INDEX* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_RH_NV_LEGACY_INDEX Type" (Part 2: Structures) +TPM_RC +TPMI_RH_NV_LEGACY_INDEX_Unmarshal( + TPMI_RH_NV_LEGACY_INDEX* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RH_NV_LEGACY_INDEX_Marshal( + TPMI_RH_NV_LEGACY_INDEX* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_RH_NV_LEGACY_INDEX_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_RH_NV_EXP_INDEX Type" (Part 2: Structures) +TPM_RC +TPMI_RH_NV_EXP_INDEX_Unmarshal( + TPMI_RH_NV_EXP_INDEX* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RH_NV_EXP_INDEX_Marshal( + TPMI_RH_NV_EXP_INDEX* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_RH_NV_EXP_INDEX_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_RH_AC Type" (Part 2: Structures) +TPM_RC +TPMI_RH_AC_Unmarshal(TPMI_RH_AC* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_RH_ACT Type" (Part 2: Structures) +TPM_RC +TPMI_RH_ACT_Unmarshal(TPMI_RH_ACT* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RH_ACT_Marshal(TPMI_RH_ACT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_RH_ACT_Marshal(source, buffer, size) \ + TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ALG_HASH Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_HASH_Unmarshal(TPMI_ALG_HASH* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_HASH_Marshal(TPMI_ALG_HASH* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_HASH_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ALG_ASYM Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_ASYM_Unmarshal(TPMI_ALG_ASYM* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_ASYM_Marshal(TPMI_ALG_ASYM* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_ASYM_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ALG_SYM Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_SYM_Unmarshal(TPMI_ALG_SYM* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_SYM_Marshal(TPMI_ALG_SYM* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_SYM_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ALG_SYM_OBJECT Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_SYM_OBJECT_Unmarshal( + TPMI_ALG_SYM_OBJECT* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_SYM_OBJECT_Marshal(TPMI_ALG_SYM_OBJECT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_SYM_OBJECT_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ALG_SYM_MODE Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_SYM_MODE_Unmarshal( + TPMI_ALG_SYM_MODE* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_SYM_MODE_Marshal(TPMI_ALG_SYM_MODE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_SYM_MODE_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ALG_KDF Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_KDF_Unmarshal(TPMI_ALG_KDF* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_KDF_Marshal(TPMI_ALG_KDF* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_KDF_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ALG_SIG_SCHEME Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_SIG_SCHEME_Unmarshal( + TPMI_ALG_SIG_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_SIG_SCHEME_Marshal(TPMI_ALG_SIG_SCHEME* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_SIG_SCHEME_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ECC_KEY_EXCHANGE Type" (Part 2: Structures) +TPM_RC +TPMI_ECC_KEY_EXCHANGE_Unmarshal( + TPMI_ECC_KEY_EXCHANGE* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ECC_KEY_EXCHANGE_Marshal( + TPMI_ECC_KEY_EXCHANGE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ECC_KEY_EXCHANGE_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ST_COMMAND_TAG Type" (Part 2: Structures) +TPM_RC +TPMI_ST_COMMAND_TAG_Unmarshal( + TPMI_ST_COMMAND_TAG* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ST_COMMAND_TAG_Marshal(TPMI_ST_COMMAND_TAG* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ST_COMMAND_TAG_Marshal(source, buffer, size) \ + TPM_ST_Marshal((TPM_ST*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ALG_MAC_SCHEME Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_MAC_SCHEME_Unmarshal( + TPMI_ALG_MAC_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_MAC_SCHEME_Marshal(TPMI_ALG_MAC_SCHEME* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_MAC_SCHEME_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ALG_CIPHER_MODE Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_CIPHER_MODE_Unmarshal( + TPMI_ALG_CIPHER_MODE* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_CIPHER_MODE_Marshal( + TPMI_ALG_CIPHER_MODE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_CIPHER_MODE_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMS_EMPTY Structure" (Part 2: Structures) +TPM_RC +TPMS_EMPTY_Unmarshal(TPMS_EMPTY* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_EMPTY_Marshal(TPMS_EMPTY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_ALGORITHM_DESCRIPTION Structure" (Part 2: Structures) +UINT16 +TPMS_ALGORITHM_DESCRIPTION_Marshal( + TPMS_ALGORITHM_DESCRIPTION* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMU_HA Union" (Part 2: Structures) +TPM_RC +TPMU_HA_Unmarshal(TPMU_HA* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_HA_Marshal(TPMU_HA* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMT_HA Structure" (Part 2: Structures) +TPM_RC +TPMT_HA_Unmarshal(TPMT_HA* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_HA_Marshal(TPMT_HA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_DIGEST Structure" (Part 2: Structures) +TPM_RC +TPM2B_DIGEST_Unmarshal(TPM2B_DIGEST* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_DIGEST_Marshal(TPM2B_DIGEST* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_DATA Structure" (Part 2: Structures) +TPM_RC +TPM2B_DATA_Unmarshal(TPM2B_DATA* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_DATA_Marshal(TPM2B_DATA* source, BYTE** buffer, INT32* size); + +// Table "Definition of Types for TPM2B_NONCE" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM2B_NONCE_Unmarshal(TPM2B_NONCE* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM2B_NONCE_Unmarshal(target, buffer, size) \ + TPM2B_DIGEST_Unmarshal((TPM2B_DIGEST*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM2B_NONCE_Marshal(TPM2B_NONCE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM2B_NONCE_Marshal(source, buffer, size) \ + TPM2B_DIGEST_Marshal((TPM2B_DIGEST*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of Types for TPM2B_AUTH" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM2B_AUTH_Unmarshal(TPM2B_AUTH* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM2B_AUTH_Unmarshal(target, buffer, size) \ + TPM2B_DIGEST_Unmarshal((TPM2B_DIGEST*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM2B_AUTH_Marshal(TPM2B_AUTH* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM2B_AUTH_Marshal(source, buffer, size) \ + TPM2B_DIGEST_Marshal((TPM2B_DIGEST*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of Types for TPM2B_OPERAND" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPM2B_OPERAND_Unmarshal(TPM2B_OPERAND* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM2B_OPERAND_Unmarshal(target, buffer, size) \ + TPM2B_DIGEST_Unmarshal((TPM2B_DIGEST*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPM2B_OPERAND_Marshal(TPM2B_OPERAND* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM2B_OPERAND_Marshal(source, buffer, size) \ + TPM2B_DIGEST_Marshal((TPM2B_DIGEST*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM2B_EVENT Structure" (Part 2: Structures) +TPM_RC +TPM2B_EVENT_Unmarshal(TPM2B_EVENT* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_EVENT_Marshal(TPM2B_EVENT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_MAX_BUFFER Structure" (Part 2: Structures) +TPM_RC +TPM2B_MAX_BUFFER_Unmarshal(TPM2B_MAX_BUFFER* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_MAX_BUFFER_Marshal(TPM2B_MAX_BUFFER* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_MAX_NV_BUFFER Structure" (Part 2: Structures) +TPM_RC +TPM2B_MAX_NV_BUFFER_Unmarshal( + TPM2B_MAX_NV_BUFFER* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_MAX_NV_BUFFER_Marshal(TPM2B_MAX_NV_BUFFER* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_TIMEOUT Structure" (Part 2: Structures) +TPM_RC +TPM2B_TIMEOUT_Unmarshal(TPM2B_TIMEOUT* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_TIMEOUT_Marshal(TPM2B_TIMEOUT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_IV Structure" (Part 2: Structures) +TPM_RC +TPM2B_IV_Unmarshal(TPM2B_IV* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_IV_Marshal(TPM2B_IV* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_VENDOR_PROPERTY Structure" (Part 2: Structures) +TPM_RC +TPM2B_VENDOR_PROPERTY_Unmarshal( + TPM2B_VENDOR_PROPERTY* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_VENDOR_PROPERTY_Marshal( + TPM2B_VENDOR_PROPERTY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_NAME Structure" (Part 2: Structures) +TPM_RC +TPM2B_NAME_Unmarshal(TPM2B_NAME* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_NAME_Marshal(TPM2B_NAME* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_PCR_SELECT Structure" (Part 2: Structures) +TPM_RC +TPMS_PCR_SELECT_Unmarshal(TPMS_PCR_SELECT* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_PCR_SELECT_Marshal(TPMS_PCR_SELECT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_PCR_SELECTION Structure" (Part 2: Structures) +TPM_RC +TPMS_PCR_SELECTION_Unmarshal(TPMS_PCR_SELECTION* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_PCR_SELECTION_Marshal(TPMS_PCR_SELECTION* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMT_TK_CREATION Structure" (Part 2: Structures) +TPM_RC +TPMT_TK_CREATION_Unmarshal(TPMT_TK_CREATION* target, BYTE** buffer, INT32* size); +UINT16 +TPMT_TK_CREATION_Marshal(TPMT_TK_CREATION* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMT_TK_VERIFIED Structure" (Part 2: Structures) +TPM_RC +TPMT_TK_VERIFIED_Unmarshal(TPMT_TK_VERIFIED* target, BYTE** buffer, INT32* size); +UINT16 +TPMT_TK_VERIFIED_Marshal(TPMT_TK_VERIFIED* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMT_TK_AUTH Structure" (Part 2: Structures) +TPM_RC +TPMT_TK_AUTH_Unmarshal(TPMT_TK_AUTH* target, BYTE** buffer, INT32* size); +UINT16 +TPMT_TK_AUTH_Marshal(TPMT_TK_AUTH* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMT_TK_HASHCHECK Structure" (Part 2: Structures) +TPM_RC +TPMT_TK_HASHCHECK_Unmarshal(TPMT_TK_HASHCHECK* target, BYTE** buffer, INT32* size); +UINT16 +TPMT_TK_HASHCHECK_Marshal(TPMT_TK_HASHCHECK* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_ALG_PROPERTY Structure" (Part 2: Structures) +UINT16 +TPMS_ALG_PROPERTY_Marshal(TPMS_ALG_PROPERTY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_TAGGED_PROPERTY Structure" (Part 2: Structures) +UINT16 +TPMS_TAGGED_PROPERTY_Marshal( + TPMS_TAGGED_PROPERTY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_TAGGED_PCR_SELECT Structure" (Part 2: Structures) +UINT16 +TPMS_TAGGED_PCR_SELECT_Marshal( + TPMS_TAGGED_PCR_SELECT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_TAGGED_POLICY Structure" (Part 2: Structures) +UINT16 +TPMS_TAGGED_POLICY_Marshal(TPMS_TAGGED_POLICY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_ACT_DATA Structure" (Part 2: Structures) +UINT16 +TPMS_ACT_DATA_Marshal(TPMS_ACT_DATA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_CC Structure" (Part 2: Structures) +TPM_RC +TPML_CC_Unmarshal(TPML_CC* target, BYTE** buffer, INT32* size); +UINT16 +TPML_CC_Marshal(TPML_CC* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_CCA Structure" (Part 2: Structures) +UINT16 +TPML_CCA_Marshal(TPML_CCA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_ALG Structure" (Part 2: Structures) +TPM_RC +TPML_ALG_Unmarshal(TPML_ALG* target, BYTE** buffer, INT32* size); +UINT16 +TPML_ALG_Marshal(TPML_ALG* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_HANDLE Structure" (Part 2: Structures) +UINT16 +TPML_HANDLE_Marshal(TPML_HANDLE* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_DIGEST Structure" (Part 2: Structures) +TPM_RC +TPML_DIGEST_Unmarshal(TPML_DIGEST* target, BYTE** buffer, INT32* size); +UINT16 +TPML_DIGEST_Marshal(TPML_DIGEST* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_DIGEST_VALUES Structure" (Part 2: Structures) +TPM_RC +TPML_DIGEST_VALUES_Unmarshal(TPML_DIGEST_VALUES* target, BYTE** buffer, INT32* size); +UINT16 +TPML_DIGEST_VALUES_Marshal(TPML_DIGEST_VALUES* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_PCR_SELECTION Structure" (Part 2: Structures) +TPM_RC +TPML_PCR_SELECTION_Unmarshal(TPML_PCR_SELECTION* target, BYTE** buffer, INT32* size); +UINT16 +TPML_PCR_SELECTION_Marshal(TPML_PCR_SELECTION* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_ALG_PROPERTY Structure" (Part 2: Structures) +UINT16 +TPML_ALG_PROPERTY_Marshal(TPML_ALG_PROPERTY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_TAGGED_TPM_PROPERTY Structure" (Part 2: Structures) +UINT16 +TPML_TAGGED_TPM_PROPERTY_Marshal( + TPML_TAGGED_TPM_PROPERTY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_TAGGED_PCR_PROPERTY Structure" (Part 2: Structures) +UINT16 +TPML_TAGGED_PCR_PROPERTY_Marshal( + TPML_TAGGED_PCR_PROPERTY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_ECC_CURVE Structure" (Part 2: Structures) +#if ALG_ECC +UINT16 +TPML_ECC_CURVE_Marshal(TPML_ECC_CURVE* source, BYTE** buffer, INT32* size); +#else // ALG_ECC +# define TPML_ECC_CURVE_Marshal UNIMPLEMENTED_Marshal +#endif // ALG_ECC + +// Table "Definition of TPML_TAGGED_POLICY Structure" (Part 2: Structures) +UINT16 +TPML_TAGGED_POLICY_Marshal(TPML_TAGGED_POLICY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_ACT_DATA Structure" (Part 2: Structures) +UINT16 +TPML_ACT_DATA_Marshal(TPML_ACT_DATA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_VENDOR_PROPERTY Structure" (Part 2: Structures) +TPM_RC +TPML_VENDOR_PROPERTY_Unmarshal( + TPML_VENDOR_PROPERTY* target, BYTE** buffer, INT32* size); +UINT16 +TPML_VENDOR_PROPERTY_Marshal( + TPML_VENDOR_PROPERTY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMU_CAPABILITIES Union" (Part 2: Structures) +UINT16 +TPMU_CAPABILITIES_Marshal( + TPMU_CAPABILITIES* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMS_CAPABILITY_DATA Structure" (Part 2: Structures) +UINT16 +TPMS_CAPABILITY_DATA_Marshal( + TPMS_CAPABILITY_DATA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMU_SET_CAPABILITIES Structure" (Part 2: Structures) +TPM_RC +TPMU_SET_CAPABILITIES_Unmarshal( + TPMU_SET_CAPABILITIES* target, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMS_SET_CAPABILITY_DATA Structure" (Part 2: Structures) +TPM_RC +TPMS_SET_CAPABILITY_DATA_Unmarshal( + TPMS_SET_CAPABILITY_DATA* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_SET_CAPABILITY_DATA Structure" (Part 2: Structures) +TPM_RC +TPM2B_SET_CAPABILITY_DATA_Unmarshal( + TPM2B_SET_CAPABILITY_DATA* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_CLOCK_INFO Structure" (Part 2: Structures) +TPM_RC +TPMS_CLOCK_INFO_Unmarshal(TPMS_CLOCK_INFO* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_CLOCK_INFO_Marshal(TPMS_CLOCK_INFO* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_TIME_INFO Structure" (Part 2: Structures) +TPM_RC +TPMS_TIME_INFO_Unmarshal(TPMS_TIME_INFO* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_TIME_INFO_Marshal(TPMS_TIME_INFO* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_TIME_ATTEST_INFO Structure" (Part 2: Structures) +UINT16 +TPMS_TIME_ATTEST_INFO_Marshal( + TPMS_TIME_ATTEST_INFO* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_CERTIFY_INFO Structure" (Part 2: Structures) +UINT16 +TPMS_CERTIFY_INFO_Marshal(TPMS_CERTIFY_INFO* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_QUOTE_INFO Structure" (Part 2: Structures) +UINT16 +TPMS_QUOTE_INFO_Marshal(TPMS_QUOTE_INFO* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_COMMAND_AUDIT_INFO Structure" (Part 2: Structures) +UINT16 +TPMS_COMMAND_AUDIT_INFO_Marshal( + TPMS_COMMAND_AUDIT_INFO* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_SESSION_AUDIT_INFO Structure" (Part 2: Structures) +UINT16 +TPMS_SESSION_AUDIT_INFO_Marshal( + TPMS_SESSION_AUDIT_INFO* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_CREATION_INFO Structure" (Part 2: Structures) +UINT16 +TPMS_CREATION_INFO_Marshal(TPMS_CREATION_INFO* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_NV_CERTIFY_INFO Structure" (Part 2: Structures) +UINT16 +TPMS_NV_CERTIFY_INFO_Marshal( + TPMS_NV_CERTIFY_INFO* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_NV_DIGEST_CERTIFY_INFO Structure" (Part 2: Structures) +UINT16 +TPMS_NV_DIGEST_CERTIFY_INFO_Marshal( + TPMS_NV_DIGEST_CERTIFY_INFO* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_ST_ATTEST Type" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ST_ATTEST_Marshal(TPMI_ST_ATTEST* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ST_ATTEST_Marshal(source, buffer, size) \ + TPM_ST_Marshal((TPM_ST*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMU_ATTEST Union" (Part 2: Structures) +UINT16 +TPMU_ATTEST_Marshal(TPMU_ATTEST* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMS_ATTEST Structure" (Part 2: Structures) +UINT16 +TPMS_ATTEST_Marshal(TPMS_ATTEST* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_ATTEST Structure" (Part 2: Structures) +UINT16 +TPM2B_ATTEST_Marshal(TPM2B_ATTEST* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_AUTH_COMMAND Structure" (Part 2: Structures) +TPM_RC +TPMS_AUTH_COMMAND_Unmarshal(TPMS_AUTH_COMMAND* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_AUTH_RESPONSE Structure" (Part 2: Structures) +UINT16 +TPMS_AUTH_RESPONSE_Marshal(TPMS_AUTH_RESPONSE* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_AES_KEY_BITS Type" (Part 2: Structures) +TPM_RC +TPMI_AES_KEY_BITS_Unmarshal(TPMI_AES_KEY_BITS* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_AES_KEY_BITS_Marshal(TPMI_AES_KEY_BITS* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_AES_KEY_BITS_Marshal(source, buffer, size) \ + TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +// Table "Definition of TPMI_SM4_KEY_BITS Type" (Part 2: Structures) +TPM_RC +TPMI_SM4_KEY_BITS_Unmarshal(TPMI_SM4_KEY_BITS* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_SM4_KEY_BITS_Marshal(TPMI_SM4_KEY_BITS* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_SM4_KEY_BITS_Marshal(source, buffer, size) \ + TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_CAMELLIA_KEY_BITS Type" (Part 2: Structures) +TPM_RC +TPMI_CAMELLIA_KEY_BITS_Unmarshal( + TPMI_CAMELLIA_KEY_BITS* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_CAMELLIA_KEY_BITS_Marshal( + TPMI_CAMELLIA_KEY_BITS* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_CAMELLIA_KEY_BITS_Marshal(source, buffer, size) \ + TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMU_SYM_KEY_BITS Union" (Part 2: Structures) +TPM_RC +TPMU_SYM_KEY_BITS_Unmarshal( + TPMU_SYM_KEY_BITS* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_SYM_KEY_BITS_Marshal( + TPMU_SYM_KEY_BITS* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMU_SYM_MODE Union" (Part 2: Structures) +TPM_RC +TPMU_SYM_MODE_Unmarshal( + TPMU_SYM_MODE* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_SYM_MODE_Marshal( + TPMU_SYM_MODE* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMT_SYM_DEF Structure" (Part 2: Structures) +TPM_RC +TPMT_SYM_DEF_Unmarshal(TPMT_SYM_DEF* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_SYM_DEF_Marshal(TPMT_SYM_DEF* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMT_SYM_DEF_OBJECT Structure" (Part 2: Structures) +TPM_RC +TPMT_SYM_DEF_OBJECT_Unmarshal( + TPMT_SYM_DEF_OBJECT* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_SYM_DEF_OBJECT_Marshal(TPMT_SYM_DEF_OBJECT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_SYM_KEY Structure" (Part 2: Structures) +TPM_RC +TPM2B_SYM_KEY_Unmarshal(TPM2B_SYM_KEY* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_SYM_KEY_Marshal(TPM2B_SYM_KEY* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_SYMCIPHER_PARMS Structure" (Part 2: Structures) +TPM_RC +TPMS_SYMCIPHER_PARMS_Unmarshal( + TPMS_SYMCIPHER_PARMS* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_SYMCIPHER_PARMS_Marshal( + TPMS_SYMCIPHER_PARMS* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_LABEL Structure" (Part 2: Structures) +TPM_RC +TPM2B_LABEL_Unmarshal(TPM2B_LABEL* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_LABEL_Marshal(TPM2B_LABEL* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_DERIVE Structure" (Part 2: Structures) +TPM_RC +TPMS_DERIVE_Unmarshal(TPMS_DERIVE* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_DERIVE_Marshal(TPMS_DERIVE* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_DERIVE Structure" (Part 2: Structures) +TPM_RC +TPM2B_DERIVE_Unmarshal(TPM2B_DERIVE* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_DERIVE_Marshal(TPM2B_DERIVE* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_SENSITIVE_DATA Structure" (Part 2: Structures) +TPM_RC +TPM2B_SENSITIVE_DATA_Unmarshal( + TPM2B_SENSITIVE_DATA* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_SENSITIVE_DATA_Marshal( + TPM2B_SENSITIVE_DATA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_SENSITIVE_CREATE Structure" (Part 2: Structures) +TPM_RC +TPMS_SENSITIVE_CREATE_Unmarshal( + TPMS_SENSITIVE_CREATE* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_SENSITIVE_CREATE Structure" (Part 2: Structures) +TPM_RC +TPM2B_SENSITIVE_CREATE_Unmarshal( + TPM2B_SENSITIVE_CREATE* target, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_SCHEME_HASH Structure" (Part 2: Structures) +TPM_RC +TPMS_SCHEME_HASH_Unmarshal(TPMS_SCHEME_HASH* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_SCHEME_HASH_Marshal(TPMS_SCHEME_HASH* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_SCHEME_ECDAA Structure" (Part 2: Structures) +TPM_RC +TPMS_SCHEME_ECDAA_Unmarshal(TPMS_SCHEME_ECDAA* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_SCHEME_ECDAA_Marshal(TPMS_SCHEME_ECDAA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_ALG_KEYEDHASH_SCHEME Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_KEYEDHASH_SCHEME_Unmarshal( + TPMI_ALG_KEYEDHASH_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_KEYEDHASH_SCHEME_Marshal( + TPMI_ALG_KEYEDHASH_SCHEME* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_KEYEDHASH_SCHEME_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of Types for HMAC_SIG_SCHEME" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SCHEME_HMAC_Unmarshal(TPMS_SCHEME_HMAC* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SCHEME_HMAC_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SCHEME_HMAC_Marshal(TPMS_SCHEME_HMAC* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SCHEME_HMAC_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMS_SCHEME_XOR Structure" (Part 2: Structures) +TPM_RC +TPMS_SCHEME_XOR_Unmarshal(TPMS_SCHEME_XOR* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_SCHEME_XOR_Marshal(TPMS_SCHEME_XOR* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMU_SCHEME_KEYEDHASH Union" (Part 2: Structures) +TPM_RC +TPMU_SCHEME_KEYEDHASH_Unmarshal( + TPMU_SCHEME_KEYEDHASH* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_SCHEME_KEYEDHASH_Marshal( + TPMU_SCHEME_KEYEDHASH* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMT_KEYEDHASH_SCHEME Structure" (Part 2: Structures) +TPM_RC +TPMT_KEYEDHASH_SCHEME_Unmarshal( + TPMT_KEYEDHASH_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_KEYEDHASH_SCHEME_Marshal( + TPMT_KEYEDHASH_SCHEME* source, BYTE** buffer, INT32* size); + +// Table "Definition of Types for RSA Signature Schemes" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIG_SCHEME_RSASSA_Unmarshal( + TPMS_SIG_SCHEME_RSASSA* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_RSASSA_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIG_SCHEME_RSASSA_Marshal( + TPMS_SIG_SCHEME_RSASSA* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_RSASSA_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIG_SCHEME_RSAPSS_Unmarshal( + TPMS_SIG_SCHEME_RSAPSS* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_RSAPSS_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIG_SCHEME_RSAPSS_Marshal( + TPMS_SIG_SCHEME_RSAPSS* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_RSAPSS_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of Types for ECC Signature Schemes" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIG_SCHEME_ECDSA_Unmarshal( + TPMS_SIG_SCHEME_ECDSA* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_ECDSA_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIG_SCHEME_ECDSA_Marshal( + TPMS_SIG_SCHEME_ECDSA* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_ECDSA_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIG_SCHEME_ECDAA_Unmarshal( + TPMS_SIG_SCHEME_ECDAA* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_ECDAA_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_ECDAA_Unmarshal((TPMS_SCHEME_ECDAA*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIG_SCHEME_ECDAA_Marshal( + TPMS_SIG_SCHEME_ECDAA* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_ECDAA_Marshal(source, buffer, size) \ + TPMS_SCHEME_ECDAA_Marshal((TPMS_SCHEME_ECDAA*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIG_SCHEME_SM2_Unmarshal( + TPMS_SIG_SCHEME_SM2* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_SM2_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIG_SCHEME_SM2_Marshal(TPMS_SIG_SCHEME_SM2* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_SM2_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIG_SCHEME_ECSCHNORR_Unmarshal( + TPMS_SIG_SCHEME_ECSCHNORR* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_ECSCHNORR_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIG_SCHEME_ECSCHNORR_Marshal( + TPMS_SIG_SCHEME_ECSCHNORR* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_ECSCHNORR_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIG_SCHEME_EDDSA_Unmarshal( + TPMS_SIG_SCHEME_EDDSA* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_EDDSA_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIG_SCHEME_EDDSA_Marshal( + TPMS_SIG_SCHEME_EDDSA* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_EDDSA_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIG_SCHEME_EDDSA_PH_Unmarshal( + TPMS_SIG_SCHEME_EDDSA_PH* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_EDDSA_PH_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIG_SCHEME_EDDSA_PH_Marshal( + TPMS_SIG_SCHEME_EDDSA_PH* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIG_SCHEME_EDDSA_PH_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMU_SIG_SCHEME Union" (Part 2: Structures) +TPM_RC +TPMU_SIG_SCHEME_Unmarshal( + TPMU_SIG_SCHEME* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_SIG_SCHEME_Marshal( + TPMU_SIG_SCHEME* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMT_SIG_SCHEME Structure" (Part 2: Structures) +TPM_RC +TPMT_SIG_SCHEME_Unmarshal( + TPMT_SIG_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_SIG_SCHEME_Marshal(TPMT_SIG_SCHEME* source, BYTE** buffer, INT32* size); + +// Table "Definition of Types for Encryption Schemes" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_ENC_SCHEME_RSAES_Unmarshal( + TPMS_ENC_SCHEME_RSAES* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_ENC_SCHEME_RSAES_Unmarshal(target, buffer, size) \ + TPMS_EMPTY_Unmarshal((TPMS_EMPTY*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_ENC_SCHEME_RSAES_Marshal( + TPMS_ENC_SCHEME_RSAES* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_ENC_SCHEME_RSAES_Marshal(source, buffer, size) \ + TPMS_EMPTY_Marshal((TPMS_EMPTY*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_ENC_SCHEME_OAEP_Unmarshal( + TPMS_ENC_SCHEME_OAEP* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_ENC_SCHEME_OAEP_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_ENC_SCHEME_OAEP_Marshal( + TPMS_ENC_SCHEME_OAEP* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_ENC_SCHEME_OAEP_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of Types for ECC Key Exchange" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_KEY_SCHEME_ECDH_Unmarshal( + TPMS_KEY_SCHEME_ECDH* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KEY_SCHEME_ECDH_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_KEY_SCHEME_ECDH_Marshal( + TPMS_KEY_SCHEME_ECDH* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KEY_SCHEME_ECDH_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_KEY_SCHEME_SM2_Unmarshal( + TPMS_KEY_SCHEME_SM2* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KEY_SCHEME_SM2_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_KEY_SCHEME_SM2_Marshal(TPMS_KEY_SCHEME_SM2* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KEY_SCHEME_SM2_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_KEY_SCHEME_ECMQV_Unmarshal( + TPMS_KEY_SCHEME_ECMQV* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KEY_SCHEME_ECMQV_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_KEY_SCHEME_ECMQV_Marshal( + TPMS_KEY_SCHEME_ECMQV* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KEY_SCHEME_ECMQV_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of Types for KDF Schemes" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_KDF_SCHEME_MGF1_Unmarshal( + TPMS_KDF_SCHEME_MGF1* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KDF_SCHEME_MGF1_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_KDF_SCHEME_MGF1_Marshal( + TPMS_KDF_SCHEME_MGF1* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KDF_SCHEME_MGF1_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_KDF_SCHEME_KDF1_SP800_56A_Unmarshal( + TPMS_KDF_SCHEME_KDF1_SP800_56A* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KDF_SCHEME_KDF1_SP800_56A_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_KDF_SCHEME_KDF1_SP800_56A_Marshal( + TPMS_KDF_SCHEME_KDF1_SP800_56A* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KDF_SCHEME_KDF1_SP800_56A_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_KDF_SCHEME_KDF2_Unmarshal( + TPMS_KDF_SCHEME_KDF2* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KDF_SCHEME_KDF2_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_KDF_SCHEME_KDF2_Marshal( + TPMS_KDF_SCHEME_KDF2* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KDF_SCHEME_KDF2_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_KDF_SCHEME_KDF1_SP800_108_Unmarshal( + TPMS_KDF_SCHEME_KDF1_SP800_108* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KDF_SCHEME_KDF1_SP800_108_Unmarshal(target, buffer, size) \ + TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_KDF_SCHEME_KDF1_SP800_108_Marshal( + TPMS_KDF_SCHEME_KDF1_SP800_108* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_KDF_SCHEME_KDF1_SP800_108_Marshal(source, buffer, size) \ + TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMU_KDF_SCHEME Union" (Part 2: Structures) +TPM_RC +TPMU_KDF_SCHEME_Unmarshal( + TPMU_KDF_SCHEME* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_KDF_SCHEME_Marshal( + TPMU_KDF_SCHEME* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMT_KDF_SCHEME Structure" (Part 2: Structures) +TPM_RC +TPMT_KDF_SCHEME_Unmarshal( + TPMT_KDF_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_KDF_SCHEME_Marshal(TPMT_KDF_SCHEME* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_ALG_ASYM_SCHEME Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_ASYM_SCHEME_Unmarshal( + TPMI_ALG_ASYM_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_ASYM_SCHEME_Marshal( + TPMI_ALG_ASYM_SCHEME* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_ASYM_SCHEME_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMU_ASYM_SCHEME Union" (Part 2: Structures) +TPM_RC +TPMU_ASYM_SCHEME_Unmarshal( + TPMU_ASYM_SCHEME* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_ASYM_SCHEME_Marshal( + TPMU_ASYM_SCHEME* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMI_ALG_RSA_SCHEME Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_RSA_SCHEME_Unmarshal( + TPMI_ALG_RSA_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_RSA_SCHEME_Marshal(TPMI_ALG_RSA_SCHEME* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_RSA_SCHEME_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMT_RSA_SCHEME Structure" (Part 2: Structures) +TPM_RC +TPMT_RSA_SCHEME_Unmarshal( + TPMT_RSA_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_RSA_SCHEME_Marshal(TPMT_RSA_SCHEME* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_ALG_RSA_DECRYPT Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_RSA_DECRYPT_Unmarshal( + TPMI_ALG_RSA_DECRYPT* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_RSA_DECRYPT_Marshal( + TPMI_ALG_RSA_DECRYPT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_RSA_DECRYPT_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMT_RSA_DECRYPT Structure" (Part 2: Structures) +TPM_RC +TPMT_RSA_DECRYPT_Unmarshal( + TPMT_RSA_DECRYPT* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_RSA_DECRYPT_Marshal(TPMT_RSA_DECRYPT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_PUBLIC_KEY_RSA Structure" (Part 2: Structures) +TPM_RC +TPM2B_PUBLIC_KEY_RSA_Unmarshal( + TPM2B_PUBLIC_KEY_RSA* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_PUBLIC_KEY_RSA_Marshal( + TPM2B_PUBLIC_KEY_RSA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_RSA_KEY_BITS Type" (Part 2: Structures) +TPM_RC +TPMI_RSA_KEY_BITS_Unmarshal(TPMI_RSA_KEY_BITS* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RSA_KEY_BITS_Marshal(TPMI_RSA_KEY_BITS* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_RSA_KEY_BITS_Marshal(source, buffer, size) \ + TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM2B_PRIVATE_KEY_RSA Structure" (Part 2: Structures) +TPM_RC +TPM2B_PRIVATE_KEY_RSA_Unmarshal( + TPM2B_PRIVATE_KEY_RSA* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_PRIVATE_KEY_RSA_Marshal( + TPM2B_PRIVATE_KEY_RSA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_ECC_PARAMETER Structure" (Part 2: Structures) +TPM_RC +TPM2B_ECC_PARAMETER_Unmarshal( + TPM2B_ECC_PARAMETER* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_ECC_PARAMETER_Marshal(TPM2B_ECC_PARAMETER* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_ECC_POINT Structure" (Part 2: Structures) +TPM_RC +TPMS_ECC_POINT_Unmarshal(TPMS_ECC_POINT* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_ECC_POINT_Marshal(TPMS_ECC_POINT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_ECC_POINT Structure" (Part 2: Structures) +TPM_RC +TPM2B_ECC_POINT_Unmarshal(TPM2B_ECC_POINT* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_ECC_POINT_Marshal(TPM2B_ECC_POINT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_ALG_ECC_SCHEME Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_ECC_SCHEME_Unmarshal( + TPMI_ALG_ECC_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_ECC_SCHEME_Marshal(TPMI_ALG_ECC_SCHEME* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_ECC_SCHEME_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_ECC_CURVE Type" (Part 2: Structures) +TPM_RC +TPMI_ECC_CURVE_Unmarshal( + TPMI_ECC_CURVE* target, BYTE** buffer, INT32* size, BOOL flag); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ECC_CURVE_Marshal(TPMI_ECC_CURVE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ECC_CURVE_Marshal(source, buffer, size) \ + TPM_ECC_CURVE_Marshal((TPM_ECC_CURVE*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMT_ECC_SCHEME Structure" (Part 2: Structures) +TPM_RC +TPMT_ECC_SCHEME_Unmarshal( + TPMT_ECC_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_ECC_SCHEME_Marshal(TPMT_ECC_SCHEME* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_ALGORITHM_DETAIL_ECC Structure" (Part 2: Structures) +UINT16 +TPMS_ALGORITHM_DETAIL_ECC_Marshal( + TPMS_ALGORITHM_DETAIL_ECC* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_SIGNATURE_RSA Structure" (Part 2: Structures) +TPM_RC +TPMS_SIGNATURE_RSA_Unmarshal(TPMS_SIGNATURE_RSA* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_SIGNATURE_RSA_Marshal(TPMS_SIGNATURE_RSA* source, BYTE** buffer, INT32* size); + +// Table "Definition of Types for Signature" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIGNATURE_RSASSA_Unmarshal( + TPMS_SIGNATURE_RSASSA* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_RSASSA_Unmarshal(target, buffer, size) \ + TPMS_SIGNATURE_RSA_Unmarshal((TPMS_SIGNATURE_RSA*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIGNATURE_RSASSA_Marshal( + TPMS_SIGNATURE_RSASSA* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_RSASSA_Marshal(source, buffer, size) \ + TPMS_SIGNATURE_RSA_Marshal((TPMS_SIGNATURE_RSA*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIGNATURE_RSAPSS_Unmarshal( + TPMS_SIGNATURE_RSAPSS* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_RSAPSS_Unmarshal(target, buffer, size) \ + TPMS_SIGNATURE_RSA_Unmarshal((TPMS_SIGNATURE_RSA*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIGNATURE_RSAPSS_Marshal( + TPMS_SIGNATURE_RSAPSS* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_RSAPSS_Marshal(source, buffer, size) \ + TPMS_SIGNATURE_RSA_Marshal((TPMS_SIGNATURE_RSA*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMS_SIGNATURE_ECC Structure" (Part 2: Structures) +TPM_RC +TPMS_SIGNATURE_ECC_Unmarshal(TPMS_SIGNATURE_ECC* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_SIGNATURE_ECC_Marshal(TPMS_SIGNATURE_ECC* source, BYTE** buffer, INT32* size); + +// Table "Definition of Types for TPMS_SIGNATURE_ECC" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIGNATURE_ECDSA_Unmarshal( + TPMS_SIGNATURE_ECDSA* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_ECDSA_Unmarshal(target, buffer, size) \ + TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIGNATURE_ECDSA_Marshal( + TPMS_SIGNATURE_ECDSA* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_ECDSA_Marshal(source, buffer, size) \ + TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIGNATURE_ECDAA_Unmarshal( + TPMS_SIGNATURE_ECDAA* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_ECDAA_Unmarshal(target, buffer, size) \ + TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIGNATURE_ECDAA_Marshal( + TPMS_SIGNATURE_ECDAA* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_ECDAA_Marshal(source, buffer, size) \ + TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIGNATURE_SM2_Unmarshal(TPMS_SIGNATURE_SM2* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_SM2_Unmarshal(target, buffer, size) \ + TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIGNATURE_SM2_Marshal(TPMS_SIGNATURE_SM2* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_SM2_Marshal(source, buffer, size) \ + TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIGNATURE_ECSCHNORR_Unmarshal( + TPMS_SIGNATURE_ECSCHNORR* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_ECSCHNORR_Unmarshal(target, buffer, size) \ + TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIGNATURE_ECSCHNORR_Marshal( + TPMS_SIGNATURE_ECSCHNORR* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_ECSCHNORR_Marshal(source, buffer, size) \ + TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIGNATURE_EDDSA_Unmarshal( + TPMS_SIGNATURE_EDDSA* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_EDDSA_Unmarshal(target, buffer, size) \ + TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIGNATURE_EDDSA_Marshal( + TPMS_SIGNATURE_EDDSA* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_EDDSA_Marshal(source, buffer, size) \ + TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_SIGNATURE_EDDSA_PH_Unmarshal( + TPMS_SIGNATURE_EDDSA_PH* target, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_EDDSA_PH_Unmarshal(target, buffer, size) \ + TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)(target), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES +#if !USE_MARSHALING_DEFINES +UINT16 +TPMS_SIGNATURE_EDDSA_PH_Marshal( + TPMS_SIGNATURE_EDDSA_PH* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMS_SIGNATURE_EDDSA_PH_Marshal(source, buffer, size) \ + TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMU_SIGNATURE Union" (Part 2: Structures) +TPM_RC +TPMU_SIGNATURE_Unmarshal( + TPMU_SIGNATURE* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_SIGNATURE_Marshal( + TPMU_SIGNATURE* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMT_SIGNATURE Structure" (Part 2: Structures) +TPM_RC +TPMT_SIGNATURE_Unmarshal( + TPMT_SIGNATURE* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_SIGNATURE_Marshal(TPMT_SIGNATURE* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMU_ENCRYPTED_SECRET Union" (Part 2: Structures) +TPM_RC +TPMU_ENCRYPTED_SECRET_Unmarshal( + TPMU_ENCRYPTED_SECRET* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_ENCRYPTED_SECRET_Marshal( + TPMU_ENCRYPTED_SECRET* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPM2B_ENCRYPTED_SECRET Structure" (Part 2: Structures) +TPM_RC +TPM2B_ENCRYPTED_SECRET_Unmarshal( + TPM2B_ENCRYPTED_SECRET* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_ENCRYPTED_SECRET_Marshal( + TPM2B_ENCRYPTED_SECRET* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMI_ALG_PUBLIC Type" (Part 2: Structures) +TPM_RC +TPMI_ALG_PUBLIC_Unmarshal(TPMI_ALG_PUBLIC* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMI_ALG_PUBLIC_Marshal(TPMI_ALG_PUBLIC* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMI_ALG_PUBLIC_Marshal(source, buffer, size) \ + TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMU_PUBLIC_ID Union" (Part 2: Structures) +TPM_RC +TPMU_PUBLIC_ID_Unmarshal( + TPMU_PUBLIC_ID* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_PUBLIC_ID_Marshal( + TPMU_PUBLIC_ID* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMS_KEYEDHASH_PARMS Structure" (Part 2: Structures) +TPM_RC +TPMS_KEYEDHASH_PARMS_Unmarshal( + TPMS_KEYEDHASH_PARMS* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_KEYEDHASH_PARMS_Marshal( + TPMS_KEYEDHASH_PARMS* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_RSA_PARMS Structure" (Part 2: Structures) +TPM_RC +TPMS_RSA_PARMS_Unmarshal(TPMS_RSA_PARMS* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_RSA_PARMS_Marshal(TPMS_RSA_PARMS* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_ECC_PARMS Structure" (Part 2: Structures) +TPM_RC +TPMS_ECC_PARMS_Unmarshal(TPMS_ECC_PARMS* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_ECC_PARMS_Marshal(TPMS_ECC_PARMS* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMU_PUBLIC_PARMS Union" (Part 2: Structures) +TPM_RC +TPMU_PUBLIC_PARMS_Unmarshal( + TPMU_PUBLIC_PARMS* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_PUBLIC_PARMS_Marshal( + TPMU_PUBLIC_PARMS* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMT_PUBLIC_PARMS Structure" (Part 2: Structures) +TPM_RC +TPMT_PUBLIC_PARMS_Unmarshal(TPMT_PUBLIC_PARMS* target, BYTE** buffer, INT32* size); +UINT16 +TPMT_PUBLIC_PARMS_Marshal(TPMT_PUBLIC_PARMS* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMT_PUBLIC Structure" (Part 2: Structures) +TPM_RC +TPMT_PUBLIC_Unmarshal(TPMT_PUBLIC* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPMT_PUBLIC_Marshal(TPMT_PUBLIC* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_PUBLIC Structure" (Part 2: Structures) +TPM_RC +TPM2B_PUBLIC_Unmarshal(TPM2B_PUBLIC* target, BYTE** buffer, INT32* size, BOOL flag); +UINT16 +TPM2B_PUBLIC_Marshal(TPM2B_PUBLIC* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_TEMPLATE Structure" (Part 2: Structures) +TPM_RC +TPM2B_TEMPLATE_Unmarshal(TPM2B_TEMPLATE* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_TEMPLATE_Marshal(TPM2B_TEMPLATE* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_PRIVATE_VENDOR_SPECIFIC Structure" (Part 2: Structures) +TPM_RC +TPM2B_PRIVATE_VENDOR_SPECIFIC_Unmarshal( + TPM2B_PRIVATE_VENDOR_SPECIFIC* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_PRIVATE_VENDOR_SPECIFIC_Marshal( + TPM2B_PRIVATE_VENDOR_SPECIFIC* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMU_SENSITIVE_COMPOSITE Union" (Part 2: Structures) +TPM_RC +TPMU_SENSITIVE_COMPOSITE_Unmarshal( + TPMU_SENSITIVE_COMPOSITE* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_SENSITIVE_COMPOSITE_Marshal( + TPMU_SENSITIVE_COMPOSITE* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMT_SENSITIVE Structure" (Part 2: Structures) +TPM_RC +TPMT_SENSITIVE_Unmarshal(TPMT_SENSITIVE* target, BYTE** buffer, INT32* size); +UINT16 +TPMT_SENSITIVE_Marshal(TPMT_SENSITIVE* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_SENSITIVE Structure" (Part 2: Structures) +TPM_RC +TPM2B_SENSITIVE_Unmarshal(TPM2B_SENSITIVE* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_SENSITIVE_Marshal(TPM2B_SENSITIVE* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_PRIVATE Structure" (Part 2: Structures) +TPM_RC +TPM2B_PRIVATE_Unmarshal(TPM2B_PRIVATE* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_PRIVATE_Marshal(TPM2B_PRIVATE* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_ID_OBJECT Structure" (Part 2: Structures) +TPM_RC +TPM2B_ID_OBJECT_Unmarshal(TPM2B_ID_OBJECT* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_ID_OBJECT_Marshal(TPM2B_ID_OBJECT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_NV_PIN_COUNTER_PARAMETERS Structure" (Part 2: Structures) +TPM_RC +TPMS_NV_PIN_COUNTER_PARAMETERS_Unmarshal( + TPMS_NV_PIN_COUNTER_PARAMETERS* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_NV_PIN_COUNTER_PARAMETERS_Marshal( + TPMS_NV_PIN_COUNTER_PARAMETERS* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMA_NV Bits" (Part 2: Structures) +TPM_RC +TPMA_NV_Unmarshal(TPMA_NV* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_NV_Marshal(TPMA_NV* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_NV_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMA_NV_EXP Bits" (Part 2: Structures) +TPM_RC +TPMA_NV_EXP_Unmarshal(TPMA_NV_EXP* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPMA_NV_EXP_Marshal(TPMA_NV_EXP* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPMA_NV_EXP_Marshal(source, buffer, size) \ + UINT64_Marshal((UINT64*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMS_NV_PUBLIC Structure" (Part 2: Structures) +TPM_RC +TPMS_NV_PUBLIC_Unmarshal(TPMS_NV_PUBLIC* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_NV_PUBLIC_Marshal(TPMS_NV_PUBLIC* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_NV_PUBLIC Structure" (Part 2: Structures) +TPM_RC +TPM2B_NV_PUBLIC_Unmarshal(TPM2B_NV_PUBLIC* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_NV_PUBLIC_Marshal(TPM2B_NV_PUBLIC* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_NV_PUBLIC_EXP_ATTR Structure" (Part 2: Structures) +TPM_RC +TPMS_NV_PUBLIC_EXP_ATTR_Unmarshal( + TPMS_NV_PUBLIC_EXP_ATTR* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_NV_PUBLIC_EXP_ATTR_Marshal( + TPMS_NV_PUBLIC_EXP_ATTR* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMU_NV_PUBLIC_2 Union" (Part 2: Structures) +TPM_RC +TPMU_NV_PUBLIC_2_Unmarshal( + TPMU_NV_PUBLIC_2* target, BYTE** buffer, INT32* size, UINT32 selector); +UINT16 +TPMU_NV_PUBLIC_2_Marshal( + TPMU_NV_PUBLIC_2* source, BYTE** buffer, INT32* size, UINT32 selector); + +// Table "Definition of TPMT_NV_PUBLIC_2 Structure" (Part 2: Structures) +TPM_RC +TPMT_NV_PUBLIC_2_Unmarshal(TPMT_NV_PUBLIC_2* target, BYTE** buffer, INT32* size); +UINT16 +TPMT_NV_PUBLIC_2_Marshal(TPMT_NV_PUBLIC_2* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_NV_PUBLIC_2 Structure" (Part 2: Structures) +TPM_RC +TPM2B_NV_PUBLIC_2_Unmarshal(TPM2B_NV_PUBLIC_2* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_NV_PUBLIC_2_Marshal(TPM2B_NV_PUBLIC_2* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_CONTEXT_SENSITIVE Structure" (Part 2: Structures) +TPM_RC +TPM2B_CONTEXT_SENSITIVE_Unmarshal( + TPM2B_CONTEXT_SENSITIVE* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_CONTEXT_SENSITIVE_Marshal( + TPM2B_CONTEXT_SENSITIVE* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_CONTEXT_DATA Structure" (Part 2: Structures) +TPM_RC +TPMS_CONTEXT_DATA_Unmarshal(TPMS_CONTEXT_DATA* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_CONTEXT_DATA_Marshal(TPMS_CONTEXT_DATA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_CONTEXT_DATA Structure" (Part 2: Structures) +TPM_RC +TPM2B_CONTEXT_DATA_Unmarshal(TPM2B_CONTEXT_DATA* target, BYTE** buffer, INT32* size); +UINT16 +TPM2B_CONTEXT_DATA_Marshal(TPM2B_CONTEXT_DATA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_CONTEXT Structure" (Part 2: Structures) +TPM_RC +TPMS_CONTEXT_Unmarshal(TPMS_CONTEXT* target, BYTE** buffer, INT32* size); +UINT16 +TPMS_CONTEXT_Marshal(TPMS_CONTEXT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPMS_CREATION_DATA Structure" (Part 2: Structures) +UINT16 +TPMS_CREATION_DATA_Marshal(TPMS_CREATION_DATA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM2B_CREATION_DATA Structure" (Part 2: Structures) +UINT16 +TPM2B_CREATION_DATA_Marshal(TPM2B_CREATION_DATA* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPM_AT Constants" (Part 2: Structures) +TPM_RC +TPM_AT_Unmarshal(TPM_AT* target, BYTE** buffer, INT32* size); +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_AT_Marshal(TPM_AT* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_AT_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPM_AE Constants" (Part 2: Structures) +#if !USE_MARSHALING_DEFINES +UINT16 +TPM_AE_Marshal(TPM_AE* source, BYTE** buffer, INT32* size); +#else // !USE_MARSHALING_DEFINES +# define TPM_AE_Marshal(source, buffer, size) \ + UINT32_Marshal((UINT32*)(source), (buffer), (size)) +#endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMS_AC_OUTPUT Structure" (Part 2: Structures) +UINT16 +TPMS_AC_OUTPUT_Marshal(TPMS_AC_OUTPUT* source, BYTE** buffer, INT32* size); + +// Table "Definition of TPML_AC_CAPABILITIES Structure" (Part 2: Structures) +UINT16 +TPML_AC_CAPABILITIES_Marshal( + TPML_AC_CAPABILITIES* source, BYTE** buffer, INT32* size); + +// For structures that unmarshals/marshals an array, the code calls an +// un/marshaling function to process the array of the defined type. +// This section contains the functions that perform that operation +// Array Unmarshal/Marshal for BYTE +TPM_RC +BYTE_Array_Unmarshal(BYTE* target, BYTE** buffer, INT32* size, INT32 count); +UINT16 +BYTE_Array_Marshal(BYTE* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Unmarshal and Marshal for TPM_ALG_ID +TPM_RC +TPM_ALG_ID_Array_Unmarshal( + TPM_ALG_ID* target, BYTE** buffer, INT32* size, INT32 count); +UINT16 +TPM_ALG_ID_Array_Marshal(TPM_ALG_ID* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Unmarshal and Marshal for TPM_CC +TPM_RC +TPM_CC_Array_Unmarshal(TPM_CC* target, BYTE** buffer, INT32* size, INT32 count); +UINT16 +TPM_CC_Array_Marshal(TPM_CC* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Marshal for TPM_ECC_CURVE +#if ALG_ECC +UINT16 +TPM_ECC_CURVE_Array_Marshal( + TPM_ECC_CURVE* source, BYTE** buffer, INT32* size, INT32 count); +#else // ALG_ECC +# define TPM_ECC_CURVE_Array_Marshal UNIMPLEMENTED_Marshal +#endif // ALG_ECC + +// Array Marshal for TPM_HANDLE +UINT16 +TPM_HANDLE_Array_Marshal(TPM_HANDLE* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Unmarshal and Marshal for TPM2B_DIGEST +TPM_RC +TPM2B_DIGEST_Array_Unmarshal( + TPM2B_DIGEST* target, BYTE** buffer, INT32* size, INT32 count); +UINT16 +TPM2B_DIGEST_Array_Marshal( + TPM2B_DIGEST* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Unmarshal and Marshal for TPM2B_VENDOR_PROPERTY +TPM_RC +TPM2B_VENDOR_PROPERTY_Array_Unmarshal( + TPM2B_VENDOR_PROPERTY* target, BYTE** buffer, INT32* size, INT32 count); +UINT16 +TPM2B_VENDOR_PROPERTY_Array_Marshal( + TPM2B_VENDOR_PROPERTY* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Marshal for TPMA_CC +UINT16 +TPMA_CC_Array_Marshal(TPMA_CC* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Marshal for TPMS_AC_OUTPUT +UINT16 +TPMS_AC_OUTPUT_Array_Marshal( + TPMS_AC_OUTPUT* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Marshal for TPMS_ACT_DATA +UINT16 +TPMS_ACT_DATA_Array_Marshal( + TPMS_ACT_DATA* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Marshal for TPMS_ALG_PROPERTY +UINT16 +TPMS_ALG_PROPERTY_Array_Marshal( + TPMS_ALG_PROPERTY* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Unmarshal and Marshal for TPMS_PCR_SELECTION +TPM_RC +TPMS_PCR_SELECTION_Array_Unmarshal( + TPMS_PCR_SELECTION* target, BYTE** buffer, INT32* size, INT32 count); +UINT16 +TPMS_PCR_SELECTION_Array_Marshal( + TPMS_PCR_SELECTION* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Marshal for TPMS_TAGGED_PCR_SELECT +UINT16 +TPMS_TAGGED_PCR_SELECT_Array_Marshal( + TPMS_TAGGED_PCR_SELECT* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Marshal for TPMS_TAGGED_POLICY +UINT16 +TPMS_TAGGED_POLICY_Array_Marshal( + TPMS_TAGGED_POLICY* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Marshal for TPMS_TAGGED_PROPERTY +UINT16 +TPMS_TAGGED_PROPERTY_Array_Marshal( + TPMS_TAGGED_PROPERTY* source, BYTE** buffer, INT32* size, INT32 count); + +// Array Unmarshal and Marshal for TPMT_HA +TPM_RC +TPMT_HA_Array_Unmarshal( + TPMT_HA* target, BYTE** buffer, INT32* size, BOOL flag, INT32 count); +UINT16 +TPMT_HA_Array_Marshal(TPMT_HA* source, BYTE** buffer, INT32* size, INT32 count); +#endif // _MARSHAL_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/MathOnByteBuffers_fp.h b/TPMCmd/tpm/include/private/prototypes/MathOnByteBuffers_fp.h new file mode 100644 index 00000000..1142bafd --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/MathOnByteBuffers_fp.h @@ -0,0 +1,94 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _MATH_ON_BYTE_BUFFERS_FP_H_ +#define _MATH_ON_BYTE_BUFFERS_FP_H_ + +//*** UnsignedCmpB +// This function compare two unsigned values. The values are byte-aligned, +// big-endian numbers (e.g, a hash). +// Return Type: int +// 1 if (a > b) +// 0 if (a = b) +// -1 if (a < b) +LIB_EXPORT int UnsignedCompareB(UINT32 aSize, // IN: size of a + const BYTE* a, // IN: a + UINT32 bSize, // IN: size of b + const BYTE* b // IN: b +); + +//***SignedCompareB() +// Compare two signed integers: +// Return Type: int +// 1 if a > b +// 0 if a = b +// -1 if a < b +int SignedCompareB(const UINT32 aSize, // IN: size of a + const BYTE* a, // IN: a buffer + const UINT32 bSize, // IN: size of b + const BYTE* b // IN: b buffer +); + +//*** ModExpB +// This function is used to do modular exponentiation in support of RSA. +// The most typical uses are: 'c' = 'm'^'e' mod 'n' (RSA encrypt) and +// 'm' = 'c'^'d' mod 'n' (RSA decrypt). When doing decryption, the 'e' parameter +// of the function will contain the private exponent 'd' instead of the public +// exponent 'e'. +// +// If the results will not fit in the provided buffer, +// an error is returned (CRYPT_ERROR_UNDERFLOW). If the results is smaller +// than the buffer, the results is de-normalized. +// +// This version is intended for use with RSA and requires that 'm' be +// less than 'n'. +// +// Return Type: TPM_RC +// TPM_RC_SIZE number to exponentiate is larger than the modulus +// TPM_RC_NO_RESULT result will not fit into the provided buffer +// +TPM_RC +ModExpB(UINT32 cSize, // IN: the size of the output buffer. It will + // need to be the same size as the modulus + BYTE* c, // OUT: the buffer to receive the results + // (c->size must be set to the maximum size + // for the returned value) + const UINT32 mSize, + const BYTE* m, // IN: number to exponentiate + const UINT32 eSize, + const BYTE* e, // IN: power + const UINT32 nSize, + const BYTE* n // IN: modulus +); + +//*** DivideB() +// Divide an integer ('n') by an integer ('d') producing a quotient ('q') and +// a remainder ('r'). If 'q' or 'r' is not needed, then the pointer to them +// may be set to NULL. +// +// Return Type: TPM_RC +// TPM_RC_NO_RESULT 'q' or 'r' is too small to receive the result +// +LIB_EXPORT TPM_RC DivideB(const TPM2B* n, // IN: numerator + const TPM2B* d, // IN: denominator + TPM2B* q, // OUT: quotient + TPM2B* r // OUT: remainder +); + +//*** AdjustNumberB() +// Remove/add leading zeros from a number in a TPM2B. Will try to make the number +// by adding or removing leading zeros. If the number is larger than the requested +// size, it will make the number as small as possible. Setting 'requestedSize' to +// zero is equivalent to requesting that the number be normalized. +UINT16 +AdjustNumberB(TPM2B* num, UINT16 requestedSize); + +//*** ShiftLeft() +// This function shifts a byte buffer (a TPM2B) one byte to the left. That is, +// the most significant bit of the most significant byte is lost. +TPM2B* ShiftLeft(TPM2B* value // IN/OUT: value to shift and shifted value out +); + +#endif // _MATH_ON_BYTE_BUFFERS_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Memory_fp.h b/TPMCmd/tpm/include/private/prototypes/Memory_fp.h new file mode 100644 index 00000000..0b92fd61 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Memory_fp.h @@ -0,0 +1,104 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 7, 2019 Time: 06:58:58PM + */ + +#ifndef _MEMORY_FP_H_ +#define _MEMORY_FP_H_ + +//*** MemoryCopy() +// This is an alias for memmove. This is used in place of memcpy because +// some of the moves may overlap and rather than try to make sure that +// memmove is used when necessary, it is always used. +void MemoryCopy(void* dest, const void* src, int sSize); + +//*** MemoryEqual() +// This function indicates if two buffers have the same values in the indicated +// number of bytes. +// Return Type: BOOL +// TRUE(1) all octets are the same +// FALSE(0) all octets are not the same +BOOL MemoryEqual(const void* buffer1, // IN: compare buffer1 + const void* buffer2, // IN: compare buffer2 + unsigned int size // IN: size of bytes being compared +); + +//*** MemoryCopy2B() +// This function copies a TPM2B. This can be used when the TPM2B types are +// the same or different. +// +// This function returns the number of octets in the data buffer of the TPM2B. +LIB_EXPORT INT16 MemoryCopy2B(TPM2B* dest, // OUT: receiving TPM2B + const TPM2B* source, // IN: source TPM2B + unsigned int dSize // IN: size of the receiving buffer +); + +//*** MemoryConcat2B() +// This function will concatenate the buffer contents of a TPM2B to an +// the buffer contents of another TPM2B and adjust the size accordingly +// ('a' := ('a' | 'b')). +void MemoryConcat2B( + TPM2B* aInOut, // IN/OUT: destination 2B + TPM2B* bIn, // IN: second 2B + unsigned int aMaxSize // IN: The size of aInOut.buffer (max values for + // aInOut.size) +); + +//*** MemoryEqual2B() +// This function will compare two TPM2B structures. To be equal, they +// need to be the same size and the buffer contexts need to be the same +// in all octets. +// Return Type: BOOL +// TRUE(1) size and buffer contents are the same +// FALSE(0) size or buffer contents are not the same +BOOL MemoryEqual2B(const TPM2B* aIn, // IN: compare value + const TPM2B* bIn // IN: compare value +); + +//*** MemorySet() +// This function will set all the octets in the specified memory range to +// the specified octet value. +// Note: A previous version had an additional parameter (dSize) that was +// intended to make sure that the destination would not be overrun. The +// problem is that, in use, all that was happening was that the value of +// size was used for dSize so there was no benefit in the extra parameter. +void MemorySet(void* dest, int value, size_t size); + +//*** MemoryPad2B() +// Function to pad a TPM2B with zeros and adjust the size. +void MemoryPad2B(TPM2B* b, UINT16 newSize); + +//*** Uint16ToByteArray() +// Function to write an integer to a byte array +void Uint16ToByteArray(UINT16 i, BYTE* a); + +//*** Uint32ToByteArray() +// Function to write an integer to a byte array +void Uint32ToByteArray(UINT32 i, BYTE* a); + +//*** Uint64ToByteArray() +// Function to write an integer to a byte array +void Uint64ToByteArray(UINT64 i, BYTE* a); + +//*** ByteArrayToUint8() +// Function to write a UINT8 to a byte array. This is included for completeness +// and to allow certain macro expansions +UINT8 +ByteArrayToUint8(BYTE* a); + +//*** ByteArrayToUint16() +// Function to write an integer to a byte array +UINT16 +ByteArrayToUint16(BYTE* a); + +//*** ByteArrayToUint32() +// Function to write an integer to a byte array +UINT32 +ByteArrayToUint32(BYTE* a); + +//*** ByteArrayToUint64() +// Function to write an integer to a byte array +UINT64 +ByteArrayToUint64(BYTE* a); + +#endif // _MEMORY_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/NV_Certify_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_Certify_fp.h new file mode 100644 index 00000000..f739b7c3 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_Certify_fp.h @@ -0,0 +1,42 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_Certify // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_CERTIFY_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_CERTIFY_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT signHandle; + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_NV_INDEX nvIndex; + TPM2B_DATA qualifyingData; + TPMT_SIG_SCHEME inScheme; + UINT16 size; + UINT16 offset; +} NV_Certify_In; + +// Output structure definition +typedef struct +{ + TPM2B_ATTEST certifyInfo; + TPMT_SIGNATURE signature; +} NV_Certify_Out; + +// Response code modifiers +# define RC_NV_Certify_signHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_Certify_authHandle (TPM_RC_H + TPM_RC_2) +# define RC_NV_Certify_nvIndex (TPM_RC_H + TPM_RC_3) +# define RC_NV_Certify_qualifyingData (TPM_RC_P + TPM_RC_1) +# define RC_NV_Certify_inScheme (TPM_RC_P + TPM_RC_2) +# define RC_NV_Certify_size (TPM_RC_P + TPM_RC_3) +# define RC_NV_Certify_offset (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_NV_Certify(NV_Certify_In* in, NV_Certify_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_CERTIFY_FP_H_ +#endif // CC_NV_Certify diff --git a/TPMCmd/tpm/include/private/prototypes/NV_ChangeAuth_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_ChangeAuth_fp.h new file mode 100644 index 00000000..f5f68229 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_ChangeAuth_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_ChangeAuth // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_CHANGEAUTH_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_CHANGEAUTH_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_INDEX nvIndex; + TPM2B_AUTH newAuth; +} NV_ChangeAuth_In; + +// Response code modifiers +# define RC_NV_ChangeAuth_nvIndex (TPM_RC_H + TPM_RC_1) +# define RC_NV_ChangeAuth_newAuth (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_NV_ChangeAuth(NV_ChangeAuth_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_CHANGEAUTH_FP_H_ +#endif // CC_NV_ChangeAuth diff --git a/TPMCmd/tpm/include/private/prototypes/NV_DefineSpace2_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_DefineSpace2_fp.h new file mode 100644 index 00000000..3f6c2101 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_DefineSpace2_fp.h @@ -0,0 +1,27 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_DefineSpace2 // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_DEFINESPACE2_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_DEFINESPACE2_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PROVISION authHandle; + TPM2B_AUTH auth; + TPM2B_NV_PUBLIC_2 publicInfo; +} NV_DefineSpace2_In; + +// Response code modifiers +# define RC_NV_DefineSpace2_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_DefineSpace2_auth (TPM_RC_P + TPM_RC_1) +# define RC_NV_DefineSpace2_publicInfo (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_NV_DefineSpace2(NV_DefineSpace2_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_DEFINESPACE2_FP_H_ +#endif // CC_NV_DefineSpace2 diff --git a/TPMCmd/tpm/include/private/prototypes/NV_DefineSpace_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_DefineSpace_fp.h new file mode 100644 index 00000000..a401d23e --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_DefineSpace_fp.h @@ -0,0 +1,27 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_DefineSpace // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_DEFINESPACE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_DEFINESPACE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PROVISION authHandle; + TPM2B_AUTH auth; + TPM2B_NV_PUBLIC publicInfo; +} NV_DefineSpace_In; + +// Response code modifiers +# define RC_NV_DefineSpace_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_DefineSpace_auth (TPM_RC_P + TPM_RC_1) +# define RC_NV_DefineSpace_publicInfo (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_NV_DefineSpace(NV_DefineSpace_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_DEFINESPACE_FP_H_ +#endif // CC_NV_DefineSpace diff --git a/TPMCmd/tpm/include/private/prototypes/NV_Extend_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_Extend_fp.h new file mode 100644 index 00000000..27c04389 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_Extend_fp.h @@ -0,0 +1,27 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_Extend // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_EXTEND_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_EXTEND_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_NV_INDEX nvIndex; + TPM2B_MAX_NV_BUFFER data; +} NV_Extend_In; + +// Response code modifiers +# define RC_NV_Extend_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_Extend_nvIndex (TPM_RC_H + TPM_RC_2) +# define RC_NV_Extend_data (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_NV_Extend(NV_Extend_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_EXTEND_FP_H_ +#endif // CC_NV_Extend diff --git a/TPMCmd/tpm/include/private/prototypes/NV_GlobalWriteLock_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_GlobalWriteLock_fp.h new file mode 100644 index 00000000..79fdcc31 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_GlobalWriteLock_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_GlobalWriteLock // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_GLOBALWRITELOCK_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_GLOBALWRITELOCK_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PROVISION authHandle; +} NV_GlobalWriteLock_In; + +// Response code modifiers +# define RC_NV_GlobalWriteLock_authHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_NV_GlobalWriteLock(NV_GlobalWriteLock_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_GLOBALWRITELOCK_FP_H_ +#endif // CC_NV_GlobalWriteLock diff --git a/TPMCmd/tpm/include/private/prototypes/NV_Increment_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_Increment_fp.h new file mode 100644 index 00000000..df2d0561 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_Increment_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_Increment // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_INCREMENT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_INCREMENT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_NV_INDEX nvIndex; +} NV_Increment_In; + +// Response code modifiers +# define RC_NV_Increment_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_Increment_nvIndex (TPM_RC_H + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_NV_Increment(NV_Increment_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_INCREMENT_FP_H_ +#endif // CC_NV_Increment diff --git a/TPMCmd/tpm/include/private/prototypes/NV_ReadLock_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_ReadLock_fp.h new file mode 100644 index 00000000..5d86615b --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_ReadLock_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_ReadLock // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READLOCK_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READLOCK_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_NV_INDEX nvIndex; +} NV_ReadLock_In; + +// Response code modifiers +# define RC_NV_ReadLock_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_ReadLock_nvIndex (TPM_RC_H + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_NV_ReadLock(NV_ReadLock_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READLOCK_FP_H_ +#endif // CC_NV_ReadLock diff --git a/TPMCmd/tpm/include/private/prototypes/NV_ReadPublic2_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_ReadPublic2_fp.h new file mode 100644 index 00000000..88ca7d5d --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_ReadPublic2_fp.h @@ -0,0 +1,30 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_ReadPublic2 // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READPUBLIC2_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READPUBLIC2_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_INDEX nvIndex; +} NV_ReadPublic2_In; + +// Output structure definition +typedef struct +{ + TPM2B_NV_PUBLIC_2 nvPublic; + TPM2B_NAME nvName; +} NV_ReadPublic2_Out; + +// Response code modifiers +# define RC_NV_ReadPublic2_nvIndex (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_NV_ReadPublic2(NV_ReadPublic2_In* in, NV_ReadPublic2_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READPUBLIC2_FP_H_ +#endif // CC_NV_ReadPublic2 diff --git a/TPMCmd/tpm/include/private/prototypes/NV_ReadPublic_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_ReadPublic_fp.h new file mode 100644 index 00000000..469a509d --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_ReadPublic_fp.h @@ -0,0 +1,30 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_ReadPublic // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READPUBLIC_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READPUBLIC_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_INDEX nvIndex; +} NV_ReadPublic_In; + +// Output structure definition +typedef struct +{ + TPM2B_NV_PUBLIC nvPublic; + TPM2B_NAME nvName; +} NV_ReadPublic_Out; + +// Response code modifiers +# define RC_NV_ReadPublic_nvIndex (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_NV_ReadPublic(NV_ReadPublic_In* in, NV_ReadPublic_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READPUBLIC_FP_H_ +#endif // CC_NV_ReadPublic diff --git a/TPMCmd/tpm/include/private/prototypes/NV_Read_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_Read_fp.h new file mode 100644 index 00000000..c73c8653 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_Read_fp.h @@ -0,0 +1,35 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_Read // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READ_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READ_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_NV_INDEX nvIndex; + UINT16 size; + UINT16 offset; +} NV_Read_In; + +// Output structure definition +typedef struct +{ + TPM2B_MAX_NV_BUFFER data; +} NV_Read_Out; + +// Response code modifiers +# define RC_NV_Read_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_Read_nvIndex (TPM_RC_H + TPM_RC_2) +# define RC_NV_Read_size (TPM_RC_P + TPM_RC_1) +# define RC_NV_Read_offset (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_NV_Read(NV_Read_In* in, NV_Read_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_READ_FP_H_ +#endif // CC_NV_Read diff --git a/TPMCmd/tpm/include/private/prototypes/NV_SetBits_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_SetBits_fp.h new file mode 100644 index 00000000..2c2178f6 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_SetBits_fp.h @@ -0,0 +1,27 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_SetBits // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_SETBITS_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_SETBITS_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_NV_INDEX nvIndex; + UINT64 bits; +} NV_SetBits_In; + +// Response code modifiers +# define RC_NV_SetBits_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_SetBits_nvIndex (TPM_RC_H + TPM_RC_2) +# define RC_NV_SetBits_bits (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_NV_SetBits(NV_SetBits_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_SETBITS_FP_H_ +#endif // CC_NV_SetBits diff --git a/TPMCmd/tpm/include/private/prototypes/NV_UndefineSpaceSpecial_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_UndefineSpaceSpecial_fp.h new file mode 100644 index 00000000..7a2151a3 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_UndefineSpaceSpecial_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_UndefineSpaceSpecial // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_UNDEFINESPACESPECIAL_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_UNDEFINESPACESPECIAL_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_DEFINED_INDEX nvIndex; + TPMI_RH_PLATFORM platform; +} NV_UndefineSpaceSpecial_In; + +// Response code modifiers +# define RC_NV_UndefineSpaceSpecial_nvIndex (TPM_RC_H + TPM_RC_1) +# define RC_NV_UndefineSpaceSpecial_platform (TPM_RC_H + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_NV_UndefineSpaceSpecial(NV_UndefineSpaceSpecial_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_UNDEFINESPACESPECIAL_FP_H_ +#endif // CC_NV_UndefineSpaceSpecial diff --git a/TPMCmd/tpm/include/private/prototypes/NV_UndefineSpace_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_UndefineSpace_fp.h new file mode 100644 index 00000000..12948099 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_UndefineSpace_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_UndefineSpace // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_UNDEFINESPACE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_UNDEFINESPACE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PROVISION authHandle; + TPMI_RH_NV_DEFINED_INDEX nvIndex; +} NV_UndefineSpace_In; + +// Response code modifiers +# define RC_NV_UndefineSpace_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_UndefineSpace_nvIndex (TPM_RC_H + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_NV_UndefineSpace(NV_UndefineSpace_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_UNDEFINESPACE_FP_H_ +#endif // CC_NV_UndefineSpace diff --git a/TPMCmd/tpm/include/private/prototypes/NV_WriteLock_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_WriteLock_fp.h new file mode 100644 index 00000000..43e3df72 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_WriteLock_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_WriteLock // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_WRITELOCK_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_WRITELOCK_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_NV_INDEX nvIndex; +} NV_WriteLock_In; + +// Response code modifiers +# define RC_NV_WriteLock_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_WriteLock_nvIndex (TPM_RC_H + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_NV_WriteLock(NV_WriteLock_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_WRITELOCK_FP_H_ +#endif // CC_NV_WriteLock diff --git a/TPMCmd/tpm/include/private/prototypes/NV_Write_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_Write_fp.h new file mode 100644 index 00000000..9f1266db --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_Write_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_NV_Write // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_WRITE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_WRITE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_NV_INDEX nvIndex; + TPM2B_MAX_NV_BUFFER data; + UINT16 offset; +} NV_Write_In; + +// Response code modifiers +# define RC_NV_Write_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_NV_Write_nvIndex (TPM_RC_H + TPM_RC_2) +# define RC_NV_Write_data (TPM_RC_P + TPM_RC_1) +# define RC_NV_Write_offset (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_NV_Write(NV_Write_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_NV_WRITE_FP_H_ +#endif // CC_NV_Write diff --git a/TPMCmd/tpm/include/private/prototypes/NV_spt_fp.h b/TPMCmd/tpm/include/private/prototypes/NV_spt_fp.h new file mode 100644 index 00000000..c25b4df2 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NV_spt_fp.h @@ -0,0 +1,94 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:18PM + */ + +#ifndef _NV_SPT_FP_H_ +#define _NV_SPT_FP_H_ + +//*** NvReadAccessChecks() +// Common routine for validating a read +// Used by TPM2_NV_Read, TPM2_NV_ReadLock and TPM2_PolicyNV +// Return Type: TPM_RC +// TPM_RC_NV_AUTHORIZATION autHandle is not allowed to authorize read +// of the index +// TPM_RC_NV_LOCKED Read locked +// TPM_RC_NV_UNINITIALIZED Try to read an uninitialized index +// +TPM_RC +NvReadAccessChecks(TPM_HANDLE authHandle, // IN: the handle that provided the + // authorization + TPM_HANDLE nvHandle, // IN: the handle of the NV index to be read + TPMA_NV attributes // IN: the attributes of 'nvHandle' +); + +//*** NvWriteAccessChecks() +// Common routine for validating a write +// Used by TPM2_NV_Write, TPM2_NV_Increment, TPM2_SetBits, and TPM2_NV_WriteLock +// Return Type: TPM_RC +// TPM_RC_NV_AUTHORIZATION Authorization fails +// TPM_RC_NV_LOCKED Write locked +// +TPM_RC +NvWriteAccessChecks( + TPM_HANDLE authHandle, // IN: the handle that provided the + // authorization + TPM_HANDLE nvHandle, // IN: the handle of the NV index to be written + TPMA_NV attributes // IN: the attributes of 'nvHandle' +); + +//*** NvClearOrderly() +// This function is used to cause gp.orderlyState to be cleared to the +// non-orderly state. +TPM_RC +NvClearOrderly(void); + +//*** NvIsPinPassIndex() +// Function to check to see if an NV index is a PIN Pass Index +// Return Type: BOOL +// TRUE(1) is pin pass +// FALSE(0) is not pin pass +BOOL NvIsPinPassIndex(TPM_HANDLE index // IN: Handle to check +); + +//*** NvGetIndexName() +// This function computes the Name of an index +// The 'name' buffer receives the bytes of the Name and the return value +// is the number of octets in the Name. +// +// This function requires that the NV Index is defined. +TPM2B_NAME* NvGetIndexName( + NV_INDEX* nvIndex, // IN: the index over which the name is to be + // computed + TPM2B_NAME* name // OUT: name of the index +); + +//*** NvPublic2FromNvPublic() +// This function converts a legacy-form NV public (TPMS_NV_PUBLIC) into the +// generalized TPMT_NV_PUBLIC_2 tagged-union representation. +TPM_RC NvPublic2FromNvPublic( + TPMS_NV_PUBLIC* nvPublic, // IN: the source S-form NV public area + TPMT_NV_PUBLIC_2* nvPublic2 // OUT: the T-form NV public area to populate +); + +//*** NvPublicFromNvPublic2() +// This function converts a tagged-union NV public (TPMT_NV_PUBLIC_2) into the +// legacy TPMS_NV_PUBLIC representation. This is a lossy conversion: any +// bits in the extended area of the attributes are lost, and the Name cannot be +// computed based on it. +TPM_RC NvPublicFromNvPublic2( + TPMT_NV_PUBLIC_2* nvPublic2, // IN: the source T-form NV public area + TPMS_NV_PUBLIC* nvPublic // OUT: the S-form NV public area to populate +); + +//*** NvDefineSpace() +// This function combines the common functionality of TPM2_NV_DefineSpace and +// TPM2_NV_DefineSpace2. +TPM_RC NvDefineSpace(TPMI_RH_PROVISION authHandle, + TPM2B_AUTH* auth, + TPMS_NV_PUBLIC* publicInfo, + TPM_RC blameAuthHandle, + TPM_RC blameAuth, + TPM_RC blamePublic); + +#endif // _NV_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/NvDynamic_fp.h b/TPMCmd/tpm/include/private/prototypes/NvDynamic_fp.h similarity index 86% rename from TPMCmd/tpm/include/prototypes/NvDynamic_fp.h rename to TPMCmd/tpm/include/private/prototypes/NvDynamic_fp.h index 0d145db2..c6100ceb 100644 --- a/TPMCmd/tpm/include/prototypes/NvDynamic_fp.h +++ b/TPMCmd/tpm/include/private/prototypes/NvDynamic_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Mar 7, 2020 Time: 07:15:54PM @@ -229,18 +195,6 @@ NvWriteUINT64Data(NV_INDEX* nvIndex, // IN: the description of the index UINT64 intValue // IN: the value to write ); -//*** NvGetIndexName() -// This function computes the Name of an index -// The 'name' buffer receives the bytes of the Name and the return value -// is the number of octets in the Name. -// -// This function requires that the NV Index is defined. -TPM2B_NAME* NvGetIndexName( - NV_INDEX* nvIndex, // IN: the index over which the name is to be - // computed - TPM2B_NAME* name // OUT: name of the index -); - //*** NvGetNameByIndexHandle() // This function is used to compute the Name of an NV Index referenced by handle. // @@ -323,6 +277,13 @@ NvCapGetPersistent(TPMI_DH_OBJECT handle, // IN: start handle TPML_HANDLE* handleList // OUT: list of handle ); +//*** NvCapGetOnePersistent() +// This function returns whether a given persistent handle exists. +// +// 'Handle' must be in valid persistent object handle range. +BOOL NvCapGetOnePersistent(TPMI_DH_OBJECT handle // IN: handle +); + //*** NvCapGetIndex() // This function returns a list of handles of NV indexes, starting from 'handle'. // 'Handle' must be in the range of NV indexes, but does not have to reference @@ -336,6 +297,10 @@ NvCapGetIndex(TPMI_DH_OBJECT handle, // IN: start handle TPML_HANDLE* handleList // OUT: list of handle ); +//*** NvCapGetOneIndex() +// This function whether an NV index exists. +BOOL NvCapGetOneIndex(TPMI_DH_OBJECT handle); // IN: start handle + //*** NvCapGetIndexNumber() // This function returns the count of NV Indexes currently defined. UINT32 diff --git a/TPMCmd/tpm/include/private/prototypes/NvReserved_fp.h b/TPMCmd/tpm/include/private/prototypes/NvReserved_fp.h new file mode 100644 index 00000000..9a741538 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/NvReserved_fp.h @@ -0,0 +1,74 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 04:23:27PM + */ + +#ifndef _NV_RESERVED_FP_H_ +#define _NV_RESERVED_FP_H_ + +//*** NvCheckState() +// Function to check the NV state by accessing the platform-specific function +// to get the NV state. The result state is registered in s_NvIsAvailable +// that will be reported by NvIsAvailable. +// +// This function is called at the beginning of ExecuteCommand before any potential +// check of g_NvStatus. +void NvCheckState(void); + +//*** NvCommit +// This is a wrapper for the platform function to commit pending NV writes. +BOOL NvCommit(void); + +//*** NvPowerOn() +// This function is called at _TPM_Init to initialize the NV environment. +// Return Type: BOOL +// TRUE(1) all NV was initialized +// FALSE(0) the NV containing saved state had an error and +// TPM2_Startup(CLEAR) is required +BOOL NvPowerOn(void); + +//*** NvManufacture() +// This function initializes the NV system at pre-install time. +// +// This function should only be called in a manufacturing environment or in a +// simulation. +// +// The layout of NV memory space is an implementation choice. +void NvManufacture(void); + +//*** NvRead() +// This function is used to move reserved data from NV memory to RAM. +void NvRead(void* outBuffer, // OUT: buffer to receive data + UINT32 nvOffset, // IN: offset in NV of value + UINT32 size // IN: size of the value to read +); + +//*** NvWrite() +// This function is used to post reserved data for writing to NV memory. Before +// the TPM completes the operation, the value will be written. +BOOL NvWrite(UINT32 nvOffset, // IN: location in NV to receive data + UINT32 size, // IN: size of the data to move + void* inBuffer // IN: location containing data to write +); + +//*** NvUpdatePersistent() +// This function is used to update a value in the PERSISTENT_DATA structure and +// commits the value to NV. +void NvUpdatePersistent( + UINT32 offset, // IN: location in PERMANENT_DATA to be updated + UINT32 size, // IN: size of the value + void* buffer // IN: the new data +); + +//*** NvClearPersistent() +// This function is used to clear a persistent data entry and commit it to NV +void NvClearPersistent(UINT32 offset, // IN: the offset in the PERMANENT_DATA + // structure to be cleared (zeroed) + UINT32 size // IN: number of bytes to clear +); + +//*** NvReadPersistent() +// This function reads persistent data to the RAM copy of the 'gp' structure. +void NvReadPersistent(void); + +#endif // _NV_RESERVED_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/ObjectChangeAuth_fp.h b/TPMCmd/tpm/include/private/prototypes/ObjectChangeAuth_fp.h new file mode 100644 index 00000000..80e22346 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ObjectChangeAuth_fp.h @@ -0,0 +1,33 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ObjectChangeAuth // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_OBJECTCHANGEAUTH_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_OBJECTCHANGEAUTH_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT objectHandle; + TPMI_DH_OBJECT parentHandle; + TPM2B_AUTH newAuth; +} ObjectChangeAuth_In; + +// Output structure definition +typedef struct +{ + TPM2B_PRIVATE outPrivate; +} ObjectChangeAuth_Out; + +// Response code modifiers +# define RC_ObjectChangeAuth_objectHandle (TPM_RC_H + TPM_RC_1) +# define RC_ObjectChangeAuth_parentHandle (TPM_RC_H + TPM_RC_2) +# define RC_ObjectChangeAuth_newAuth (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ObjectChangeAuth(ObjectChangeAuth_In* in, ObjectChangeAuth_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_OBJECTCHANGEAUTH_FP_H_ +#endif // CC_ObjectChangeAuth diff --git a/TPMCmd/tpm/include/prototypes/Object_fp.h b/TPMCmd/tpm/include/private/prototypes/Object_fp.h similarity index 83% rename from TPMCmd/tpm/include/prototypes/Object_fp.h rename to TPMCmd/tpm/include/private/prototypes/Object_fp.h index 76277bbc..ba755091 100644 --- a/TPMCmd/tpm/include/prototypes/Object_fp.h +++ b/TPMCmd/tpm/include/private/prototypes/Object_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Mar 4, 2020 Time: 02:36:44PM @@ -103,16 +69,8 @@ void GetQualifiedName(TPMI_DH_OBJECT handle, // IN: handle of the object TPM2B_NAME* qualifiedName // OUT: qualified name of the object ); -//*** ObjectGetHierarchy() -// This function returns the handle for the hierarchy of an object. -TPMI_RH_HIERARCHY -ObjectGetHierarchy(OBJECT* object // IN :object -); - //*** GetHierarchy() // This function returns the handle of the hierarchy to which a handle belongs. -// This function is similar to ObjectGetHierarchy() but this routine takes -// a handle but ObjectGetHierarchy() takes an pointer to an object. // // This function requires that 'handle' references a loaded object. TPMI_RH_HIERARCHY @@ -143,7 +101,8 @@ void ObjectSetLoadedAttributes(OBJECT* object, // IN: object attributes to fina ); //*** ObjectLoad() -// Common function to load an object. A loaded object has its public area validated +// Common function to load a non-primary object (i.e., either an Ordinary Object, +// or an External Object). A loaded object has its public area validated // (unless its 'nameAlg' is TPM_ALG_NULL). If a sensitive part is loaded, it is // verified to be correct and if both public and sensitive parts are loaded, then // the cryptographic binding between the objects is validated. This function does @@ -273,7 +232,7 @@ BOOL ObjectIsStorage(TPMI_DH_OBJECT handle // IN: object handle ); //*** ObjectCapGetLoaded() -// This function returns a a list of handles of loaded object, starting from +// This function returns a list of handles of loaded object, starting from // 'handle'. 'Handle' must be in the range of valid transient object handles, // but does not have to be the handle of a loaded transient object. // Return Type: TPMI_YES_NO @@ -285,6 +244,11 @@ ObjectCapGetLoaded(TPMI_DH_OBJECT handle, // IN: start handle TPML_HANDLE* handleList // OUT: list of handle ); +//*** ObjectCapGetOneLoaded() +// This function returns whether a handle is loaded. +BOOL ObjectCapGetOneLoaded(TPMI_DH_OBJECT handle // IN: handle +); + //*** ObjectCapGetTransientAvail() // This function returns an estimate of the number of additional transient // objects that could be loaded into the TPM. diff --git a/TPMCmd/tpm/include/prototypes/Object_spt_fp.h b/TPMCmd/tpm/include/private/prototypes/Object_spt_fp.h similarity index 89% rename from TPMCmd/tpm/include/prototypes/Object_spt_fp.h rename to TPMCmd/tpm/include/private/prototypes/Object_spt_fp.h index 7ee3d761..0eeb1761 100644 --- a/TPMCmd/tpm/include/prototypes/Object_spt_fp.h +++ b/TPMCmd/tpm/include/private/prototypes/Object_spt_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Mar 7, 2020 Time: 07:06:44PM @@ -61,12 +27,21 @@ BOOL ObjectIsParent(OBJECT* parentObject // IN: parent handle //*** CreateChecks() // Attribute checks that are unique to creation. +// If parentObject is not NULL, then this function checks the object's +// attributes as an Ordinary or Derived Object with the given parent. +// If parentObject is NULL, and primaryHandle is not 0, then this function +// checks the object's attributes as a Primary Object in the given hierarchy. +// If parentObject is NULL, and primaryHandle is 0, then this function checks +// the object's attributes as an External Object. // Return Type: TPM_RC // TPM_RC_ATTRIBUTES sensitiveDataOrigin is not consistent with the // object type // other returns from PublicAttributesValidation() TPM_RC -CreateChecks(OBJECT* parentObject, TPMT_PUBLIC* publicArea, UINT16 sensitiveDataSize); +CreateChecks(OBJECT* parentObject, + TPMI_RH_HIERARCHY primaryHierarchy, + TPMT_PUBLIC* publicArea, + UINT16 sensitiveDataSize); //*** SchemeChecks // This function is called by TPM2_LoadExternal() and PublicAttributesValidation(). @@ -92,7 +67,8 @@ SchemeChecks(OBJECT* parentObject, // IN: parent (null if primary seed) // This function is used in the processing of TPM2_Create, TPM2_CreatePrimary, // TPM2_CreateLoaded(), TPM2_Load(), TPM2_Import(), and TPM2_LoadExternal(). // For TPM2_Import() this is only used if the new parent has fixedTPM SET. For -// TPM2_LoadExternal(), this is not used for a public-only key +// TPM2_LoadExternal(), this is not used for a public-only key. +// If parentObject is not NULL, then primaryHandle is not used. // Return Type: TPM_RC // TPM_RC_ATTRIBUTES 'fixedTPM', 'fixedParent', or 'encryptedDuplication' // attributes are inconsistent between themselves or with @@ -107,9 +83,13 @@ SchemeChecks(OBJECT* parentObject, // IN: parent (null if primary seed) // algorithm in 'publicArea' // other returns from SchemeChecks() TPM_RC -PublicAttributesValidation(OBJECT* parentObject, // IN: input parent object - TPMT_PUBLIC* publicArea // IN: public area of the object -); +PublicAttributesValidation( + // IN: input parent object (if ordinary or derived object; NULL otherwise) + OBJECT* parentObject, + // IN: hierarchy (if primary object; 0 otherwise) + TPMI_RH_HIERARCHY primaryHierarchy, + // IN: public area of the object + TPMT_PUBLIC* publicArea); //*** FillInCreationData() // Fill in creation data for an object. diff --git a/TPMCmd/tpm/include/private/prototypes/PCR_Allocate_fp.h b/TPMCmd/tpm/include/private/prototypes/PCR_Allocate_fp.h new file mode 100644 index 00000000..46d87704 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PCR_Allocate_fp.h @@ -0,0 +1,34 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PCR_Allocate // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_ALLOCATE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_ALLOCATE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PLATFORM authHandle; + TPML_PCR_SELECTION pcrAllocation; +} PCR_Allocate_In; + +// Output structure definition +typedef struct +{ + TPMI_YES_NO allocationSuccess; + UINT32 maxPCR; + UINT32 sizeNeeded; + UINT32 sizeAvailable; +} PCR_Allocate_Out; + +// Response code modifiers +# define RC_PCR_Allocate_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_PCR_Allocate_pcrAllocation (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PCR_Allocate(PCR_Allocate_In* in, PCR_Allocate_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_ALLOCATE_FP_H_ +#endif // CC_PCR_Allocate diff --git a/TPMCmd/tpm/include/private/prototypes/PCR_Event_fp.h b/TPMCmd/tpm/include/private/prototypes/PCR_Event_fp.h new file mode 100644 index 00000000..28743df7 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PCR_Event_fp.h @@ -0,0 +1,31 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PCR_Event // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_EVENT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_EVENT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_PCR pcrHandle; + TPM2B_EVENT eventData; +} PCR_Event_In; + +// Output structure definition +typedef struct +{ + TPML_DIGEST_VALUES digests; +} PCR_Event_Out; + +// Response code modifiers +# define RC_PCR_Event_pcrHandle (TPM_RC_H + TPM_RC_1) +# define RC_PCR_Event_eventData (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PCR_Event(PCR_Event_In* in, PCR_Event_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_EVENT_FP_H_ +#endif // CC_PCR_Event diff --git a/TPMCmd/tpm/include/private/prototypes/PCR_Extend_fp.h b/TPMCmd/tpm/include/private/prototypes/PCR_Extend_fp.h new file mode 100644 index 00000000..090d8e77 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PCR_Extend_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PCR_Extend // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_EXTEND_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_EXTEND_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_PCR pcrHandle; + TPML_DIGEST_VALUES digests; +} PCR_Extend_In; + +// Response code modifiers +# define RC_PCR_Extend_pcrHandle (TPM_RC_H + TPM_RC_1) +# define RC_PCR_Extend_digests (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PCR_Extend(PCR_Extend_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_EXTEND_FP_H_ +#endif // CC_PCR_Extend diff --git a/TPMCmd/tpm/include/private/prototypes/PCR_Read_fp.h b/TPMCmd/tpm/include/private/prototypes/PCR_Read_fp.h new file mode 100644 index 00000000..2d458807 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PCR_Read_fp.h @@ -0,0 +1,31 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PCR_Read // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_READ_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_READ_FP_H_ + +// Input structure definition +typedef struct +{ + TPML_PCR_SELECTION pcrSelectionIn; +} PCR_Read_In; + +// Output structure definition +typedef struct +{ + UINT32 pcrUpdateCounter; + TPML_PCR_SELECTION pcrSelectionOut; + TPML_DIGEST pcrValues; +} PCR_Read_Out; + +// Response code modifiers +# define RC_PCR_Read_pcrSelectionIn (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PCR_Read(PCR_Read_In* in, PCR_Read_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_READ_FP_H_ +#endif // CC_PCR_Read diff --git a/TPMCmd/tpm/include/private/prototypes/PCR_Reset_fp.h b/TPMCmd/tpm/include/private/prototypes/PCR_Reset_fp.h new file mode 100644 index 00000000..a00a0523 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PCR_Reset_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PCR_Reset // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_RESET_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_RESET_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_PCR pcrHandle; +} PCR_Reset_In; + +// Response code modifiers +# define RC_PCR_Reset_pcrHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PCR_Reset(PCR_Reset_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_RESET_FP_H_ +#endif // CC_PCR_Reset diff --git a/TPMCmd/tpm/include/private/prototypes/PCR_SetAuthPolicy_fp.h b/TPMCmd/tpm/include/private/prototypes/PCR_SetAuthPolicy_fp.h new file mode 100644 index 00000000..1d0f5109 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PCR_SetAuthPolicy_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PCR_SetAuthPolicy // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_SETAUTHPOLICY_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_SETAUTHPOLICY_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PLATFORM authHandle; + TPM2B_DIGEST authPolicy; + TPMI_ALG_HASH hashAlg; + TPMI_DH_PCR pcrNum; +} PCR_SetAuthPolicy_In; + +// Response code modifiers +# define RC_PCR_SetAuthPolicy_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_PCR_SetAuthPolicy_authPolicy (TPM_RC_P + TPM_RC_1) +# define RC_PCR_SetAuthPolicy_hashAlg (TPM_RC_P + TPM_RC_2) +# define RC_PCR_SetAuthPolicy_pcrNum (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_PCR_SetAuthPolicy(PCR_SetAuthPolicy_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_SETAUTHPOLICY_FP_H_ +#endif // CC_PCR_SetAuthPolicy diff --git a/TPMCmd/tpm/include/private/prototypes/PCR_SetAuthValue_fp.h b/TPMCmd/tpm/include/private/prototypes/PCR_SetAuthValue_fp.h new file mode 100644 index 00000000..9eb798b8 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PCR_SetAuthValue_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PCR_SetAuthValue // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_SETAUTHVALUE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_SETAUTHVALUE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_PCR pcrHandle; + TPM2B_DIGEST auth; +} PCR_SetAuthValue_In; + +// Response code modifiers +# define RC_PCR_SetAuthValue_pcrHandle (TPM_RC_H + TPM_RC_1) +# define RC_PCR_SetAuthValue_auth (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PCR_SetAuthValue(PCR_SetAuthValue_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_PCR_SETAUTHVALUE_FP_H_ +#endif // CC_PCR_SetAuthValue diff --git a/TPMCmd/tpm/include/prototypes/PCR_fp.h b/TPMCmd/tpm/include/private/prototypes/PCR_fp.h similarity index 84% rename from TPMCmd/tpm/include/prototypes/PCR_fp.h rename to TPMCmd/tpm/include/private/prototypes/PCR_fp.h index f0f9d388..bceeb512 100644 --- a/TPMCmd/tpm/include/prototypes/PCR_fp.h +++ b/TPMCmd/tpm/include/private/prototypes/PCR_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Mar 4, 2020 Time: 02:36:44PM @@ -97,11 +63,11 @@ PCRGetAuthPolicy(TPMI_DH_PCR handle, // IN: PCR handle TPM2B_DIGEST* policy // OUT: policy of PCR ); -//*** PCRSimStart() +//*** PCRManufacture() // This function is used to initialize the policies when a TPM is manufactured. // This function would only be called in a manufacturing environment or in // a TPM simulator. -void PCRSimStart(void); +void PCRManufacture(void); //*** PcrIsAllocated() // This function indicates if a PCR number for the particular hash algorithm @@ -251,6 +217,13 @@ PCRCapGetProperties(TPM_PT_PCR property, // IN: the starting PCR property TPML_TAGGED_PCR_PROPERTY* select // OUT: PCR select ); +//*** PCRGetProperty() +// This function returns the selected PCR property. +// Return Type: BOOL +// TRUE(1) the property type is implemented +// FALSE(0) the property type is not implemented +BOOL PCRGetProperty(TPM_PT_PCR property, TPMS_TAGGED_PCR_SELECT* select); + //*** PCRCapGetHandles() // This function is used to get a list of handles of PCR, started from 'handle'. // If 'handle' exceeds the maximum PCR handle range, an empty list will be @@ -264,4 +237,9 @@ PCRCapGetHandles(TPMI_DH_PCR handle, // IN: start handle TPML_HANDLE* handleList // OUT: list of handle ); +//*** PCRCapGetOneHandle() +// This function is used to check whether a PCR handle exists. +BOOL PCRCapGetOneHandle(TPMI_DH_PCR handle // IN: handle +); + #endif // _PCR_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/PP_Commands_fp.h b/TPMCmd/tpm/include/private/prototypes/PP_Commands_fp.h new file mode 100644 index 00000000..d0302177 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PP_Commands_fp.h @@ -0,0 +1,27 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PP_Commands // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_PP_COMMANDS_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_PP_COMMANDS_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PLATFORM auth; + TPML_CC setList; + TPML_CC clearList; +} PP_Commands_In; + +// Response code modifiers +# define RC_PP_Commands_auth (TPM_RC_H + TPM_RC_1) +# define RC_PP_Commands_setList (TPM_RC_P + TPM_RC_1) +# define RC_PP_Commands_clearList (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_PP_Commands(PP_Commands_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_PP_COMMANDS_FP_H_ +#endif // CC_PP_Commands diff --git a/TPMCmd/tpm/include/private/prototypes/PP_fp.h b/TPMCmd/tpm/include/private/prototypes/PP_fp.h new file mode 100644 index 00000000..3569e89c --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PP_fp.h @@ -0,0 +1,59 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _PP_FP_H_ +#define _PP_FP_H_ + +//*** PhysicalPresencePreInstall_Init() +// This function is used to initialize the array of commands that always require +// confirmation with physical presence. The array is an array of bits that +// has a correspondence with the command code. +// +// This command should only ever be executable in a manufacturing setting or in +// a simulation. +// +// When set, these cannot be cleared. +// +void PhysicalPresencePreInstall_Init(void); + +//*** PhysicalPresenceCommandSet() +// This function is used to set the indicator that a command requires +// PP confirmation. +void PhysicalPresenceCommandSet(TPM_CC commandCode // IN: command code +); + +//*** PhysicalPresenceCommandClear() +// This function is used to clear the indicator that a command requires PP +// confirmation. +void PhysicalPresenceCommandClear(TPM_CC commandCode // IN: command code +); + +//*** PhysicalPresenceIsRequired() +// This function indicates if PP confirmation is required for a command. +// Return Type: BOOL +// TRUE(1) physical presence is required +// FALSE(0) physical presence is not required +BOOL PhysicalPresenceIsRequired(COMMAND_INDEX commandIndex // IN: command index +); + +//*** PhysicalPresenceCapGetCCList() +// This function returns a list of commands that require PP confirmation. The +// list starts from the first implemented command that has a command code that +// the same or greater than 'commandCode'. +// Return Type: TPMI_YES_NO +// YES if there are more command codes available +// NO all the available command codes have been returned +TPMI_YES_NO +PhysicalPresenceCapGetCCList(TPM_CC commandCode, // IN: start command code + UINT32 count, // IN: count of returned TPM_CC + TPML_CC* commandList // OUT: list of TPM_CC +); + +//*** PhysicalPresenceCapGetOneCC() +// This function returns true if the command requires Physical Presence. +BOOL PhysicalPresenceCapGetOneCC(TPM_CC commandCode // IN: command code +); + +#endif // _PP_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyAuthValue_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyAuthValue_fp.h new file mode 100644 index 00000000..a8c8b46a --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyAuthValue_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyAuthValue // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYAUTHVALUE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYAUTHVALUE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; +} PolicyAuthValue_In; + +// Response code modifiers +# define RC_PolicyAuthValue_policySession (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyAuthValue(PolicyAuthValue_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYAUTHVALUE_FP_H_ +#endif // CC_PolicyAuthValue diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyAuthorizeNV_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyAuthorizeNV_fp.h new file mode 100644 index 00000000..470d8532 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyAuthorizeNV_fp.h @@ -0,0 +1,27 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyAuthorizeNV // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYAUTHORIZENV_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYAUTHORIZENV_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_NV_INDEX nvIndex; + TPMI_SH_POLICY policySession; +} PolicyAuthorizeNV_In; + +// Response code modifiers +# define RC_PolicyAuthorizeNV_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_PolicyAuthorizeNV_nvIndex (TPM_RC_H + TPM_RC_2) +# define RC_PolicyAuthorizeNV_policySession (TPM_RC_H + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_PolicyAuthorizeNV(PolicyAuthorizeNV_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYAUTHORIZENV_FP_H_ +#endif // CC_PolicyAuthorizeNV diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyAuthorize_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyAuthorize_fp.h new file mode 100644 index 00000000..938071f1 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyAuthorize_fp.h @@ -0,0 +1,31 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyAuthorize // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYAUTHORIZE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYAUTHORIZE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_DIGEST approvedPolicy; + TPM2B_NONCE policyRef; + TPM2B_NAME keySign; + TPMT_TK_VERIFIED checkTicket; +} PolicyAuthorize_In; + +// Response code modifiers +# define RC_PolicyAuthorize_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyAuthorize_approvedPolicy (TPM_RC_P + TPM_RC_1) +# define RC_PolicyAuthorize_policyRef (TPM_RC_P + TPM_RC_2) +# define RC_PolicyAuthorize_keySign (TPM_RC_P + TPM_RC_3) +# define RC_PolicyAuthorize_checkTicket (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_PolicyAuthorize(PolicyAuthorize_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYAUTHORIZE_FP_H_ +#endif // CC_PolicyAuthorize diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyCapability_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyCapability_fp.h new file mode 100644 index 00000000..63e0b94e --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyCapability_fp.h @@ -0,0 +1,33 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyCapability // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCAPABILITY_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCAPABILITY_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_OPERAND operandB; + UINT16 offset; + TPM_EO operation; + TPM_CAP capability; + UINT32 property; +} PolicyCapability_In; + +// Response code modifiers +# define RC_PolicyCapability_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyCapability_operandB (TPM_RC_P + TPM_RC_1) +# define RC_PolicyCapability_offset (TPM_RC_P + TPM_RC_2) +# define RC_PolicyCapability_operation (TPM_RC_P + TPM_RC_3) +# define RC_PolicyCapability_capability (TPM_RC_P + TPM_RC_4) +# define RC_PolicyCapability_property (TPM_RC_P + TPM_RC_5) + +// Function prototype +TPM_RC +TPM2_PolicyCapability(PolicyCapability_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCAPABILITY_FP_H_ +#endif // CC_PolicyCapability diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyCommandCode_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyCommandCode_fp.h new file mode 100644 index 00000000..6d85dc4b --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyCommandCode_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyCommandCode // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCOMMANDCODE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCOMMANDCODE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM_CC code; +} PolicyCommandCode_In; + +// Response code modifiers +# define RC_PolicyCommandCode_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyCommandCode_code (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyCommandCode(PolicyCommandCode_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCOMMANDCODE_FP_H_ +#endif // CC_PolicyCommandCode diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyCounterTimer_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyCounterTimer_fp.h new file mode 100644 index 00000000..6f43b12a --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyCounterTimer_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyCounterTimer // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCOUNTERTIMER_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCOUNTERTIMER_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_OPERAND operandB; + UINT16 offset; + TPM_EO operation; +} PolicyCounterTimer_In; + +// Response code modifiers +# define RC_PolicyCounterTimer_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyCounterTimer_operandB (TPM_RC_P + TPM_RC_1) +# define RC_PolicyCounterTimer_offset (TPM_RC_P + TPM_RC_2) +# define RC_PolicyCounterTimer_operation (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_PolicyCounterTimer(PolicyCounterTimer_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCOUNTERTIMER_FP_H_ +#endif // CC_PolicyCounterTimer diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyCpHash_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyCpHash_fp.h new file mode 100644 index 00000000..4ff489e1 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyCpHash_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyCpHash // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCPHASH_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCPHASH_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_DIGEST cpHashA; +} PolicyCpHash_In; + +// Response code modifiers +# define RC_PolicyCpHash_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyCpHash_cpHashA (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyCpHash(PolicyCpHash_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYCPHASH_FP_H_ +#endif // CC_PolicyCpHash diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyDuplicationSelect_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyDuplicationSelect_fp.h new file mode 100644 index 00000000..d88d2420 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyDuplicationSelect_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyDuplicationSelect // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYDUPLICATIONSELECT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYDUPLICATIONSELECT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_NAME objectName; + TPM2B_NAME newParentName; + TPMI_YES_NO includeObject; +} PolicyDuplicationSelect_In; + +// Response code modifiers +# define RC_PolicyDuplicationSelect_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyDuplicationSelect_objectName (TPM_RC_P + TPM_RC_1) +# define RC_PolicyDuplicationSelect_newParentName (TPM_RC_P + TPM_RC_2) +# define RC_PolicyDuplicationSelect_includeObject (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_PolicyDuplicationSelect(PolicyDuplicationSelect_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYDUPLICATIONSELECT_FP_H_ +#endif // CC_PolicyDuplicationSelect diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyGetDigest_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyGetDigest_fp.h new file mode 100644 index 00000000..5a0a14d3 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyGetDigest_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyGetDigest // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYGETDIGEST_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYGETDIGEST_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; +} PolicyGetDigest_In; + +// Output structure definition +typedef struct +{ + TPM2B_DIGEST policyDigest; +} PolicyGetDigest_Out; + +// Response code modifiers +# define RC_PolicyGetDigest_policySession (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyGetDigest(PolicyGetDigest_In* in, PolicyGetDigest_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYGETDIGEST_FP_H_ +#endif // CC_PolicyGetDigest diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyLocality_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyLocality_fp.h new file mode 100644 index 00000000..aa7b8988 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyLocality_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyLocality // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYLOCALITY_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYLOCALITY_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPMA_LOCALITY locality; +} PolicyLocality_In; + +// Response code modifiers +# define RC_PolicyLocality_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyLocality_locality (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyLocality(PolicyLocality_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYLOCALITY_FP_H_ +#endif // CC_PolicyLocality diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyNV_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyNV_fp.h new file mode 100644 index 00000000..dc77959c --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyNV_fp.h @@ -0,0 +1,33 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyNV // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYNV_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYNV_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_NV_AUTH authHandle; + TPMI_RH_NV_INDEX nvIndex; + TPMI_SH_POLICY policySession; + TPM2B_OPERAND operandB; + UINT16 offset; + TPM_EO operation; +} PolicyNV_In; + +// Response code modifiers +# define RC_PolicyNV_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_PolicyNV_nvIndex (TPM_RC_H + TPM_RC_2) +# define RC_PolicyNV_policySession (TPM_RC_H + TPM_RC_3) +# define RC_PolicyNV_operandB (TPM_RC_P + TPM_RC_1) +# define RC_PolicyNV_offset (TPM_RC_P + TPM_RC_2) +# define RC_PolicyNV_operation (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_PolicyNV(PolicyNV_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYNV_FP_H_ +#endif // CC_PolicyNV diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyNameHash_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyNameHash_fp.h new file mode 100644 index 00000000..8169a5df --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyNameHash_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyNameHash // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYNAMEHASH_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYNAMEHASH_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_DIGEST nameHash; +} PolicyNameHash_In; + +// Response code modifiers +# define RC_PolicyNameHash_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyNameHash_nameHash (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyNameHash(PolicyNameHash_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYNAMEHASH_FP_H_ +#endif // CC_PolicyNameHash diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyNvWritten_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyNvWritten_fp.h new file mode 100644 index 00000000..717ccc0e --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyNvWritten_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyNvWritten // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYNVWRITTEN_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYNVWRITTEN_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPMI_YES_NO writtenSet; +} PolicyNvWritten_In; + +// Response code modifiers +# define RC_PolicyNvWritten_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyNvWritten_writtenSet (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyNvWritten(PolicyNvWritten_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYNVWRITTEN_FP_H_ +#endif // CC_PolicyNvWritten diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyOR_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyOR_fp.h new file mode 100644 index 00000000..713a0e37 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyOR_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyOR // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYOR_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYOR_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPML_DIGEST pHashList; +} PolicyOR_In; + +// Response code modifiers +# define RC_PolicyOR_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyOR_pHashList (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyOR(PolicyOR_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYOR_FP_H_ +#endif // CC_PolicyOR diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyPCR_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyPCR_fp.h new file mode 100644 index 00000000..40e9b0eb --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyPCR_fp.h @@ -0,0 +1,27 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyPCR // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPCR_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPCR_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_DIGEST pcrDigest; + TPML_PCR_SELECTION pcrs; +} PolicyPCR_In; + +// Response code modifiers +# define RC_PolicyPCR_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyPCR_pcrDigest (TPM_RC_P + TPM_RC_1) +# define RC_PolicyPCR_pcrs (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_PolicyPCR(PolicyPCR_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPCR_FP_H_ +#endif // CC_PolicyPCR diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyParameters_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyParameters_fp.h new file mode 100644 index 00000000..043b823d --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyParameters_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyParameters // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPARAMETERS_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPARAMETERS_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_DIGEST pHash; +} PolicyParameters_In; + +// Response code modifiers +# define RC_PolicyParameters_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyParameters_pHash (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyParameters(PolicyParameters_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPARAMETERS_FP_H_ +#endif // CC_PolicyParameters diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyPassword_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyPassword_fp.h new file mode 100644 index 00000000..d719ac5f --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyPassword_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyPassword // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPASSWORD_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPASSWORD_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; +} PolicyPassword_In; + +// Response code modifiers +# define RC_PolicyPassword_policySession (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyPassword(PolicyPassword_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPASSWORD_FP_H_ +#endif // CC_PolicyPassword diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyPhysicalPresence_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyPhysicalPresence_fp.h new file mode 100644 index 00000000..e6f12b8a --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyPhysicalPresence_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyPhysicalPresence // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPHYSICALPRESENCE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPHYSICALPRESENCE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; +} PolicyPhysicalPresence_In; + +// Response code modifiers +# define RC_PolicyPhysicalPresence_policySession (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyPhysicalPresence(PolicyPhysicalPresence_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYPHYSICALPRESENCE_FP_H_ +#endif // CC_PolicyPhysicalPresence diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyRestart_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyRestart_fp.h new file mode 100644 index 00000000..e9d3a5bc --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyRestart_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyRestart // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYRESTART_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYRESTART_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY sessionHandle; +} PolicyRestart_In; + +// Response code modifiers +# define RC_PolicyRestart_sessionHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyRestart(PolicyRestart_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYRESTART_FP_H_ +#endif // CC_PolicyRestart diff --git a/TPMCmd/tpm/include/private/prototypes/PolicySecret_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicySecret_fp.h new file mode 100644 index 00000000..4ffeaaa5 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicySecret_fp.h @@ -0,0 +1,40 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicySecret // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYSECRET_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYSECRET_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_ENTITY authHandle; + TPMI_SH_POLICY policySession; + TPM2B_NONCE nonceTPM; + TPM2B_DIGEST cpHashA; + TPM2B_NONCE policyRef; + INT32 expiration; +} PolicySecret_In; + +// Output structure definition +typedef struct +{ + TPM2B_TIMEOUT timeout; + TPMT_TK_AUTH policyTicket; +} PolicySecret_Out; + +// Response code modifiers +# define RC_PolicySecret_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_PolicySecret_policySession (TPM_RC_H + TPM_RC_2) +# define RC_PolicySecret_nonceTPM (TPM_RC_P + TPM_RC_1) +# define RC_PolicySecret_cpHashA (TPM_RC_P + TPM_RC_2) +# define RC_PolicySecret_policyRef (TPM_RC_P + TPM_RC_3) +# define RC_PolicySecret_expiration (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_PolicySecret(PolicySecret_In* in, PolicySecret_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYSECRET_FP_H_ +#endif // CC_PolicySecret diff --git a/TPMCmd/tpm/include/private/prototypes/PolicySigned_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicySigned_fp.h new file mode 100644 index 00000000..98b051dc --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicySigned_fp.h @@ -0,0 +1,42 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicySigned // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYSIGNED_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYSIGNED_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT authObject; + TPMI_SH_POLICY policySession; + TPM2B_NONCE nonceTPM; + TPM2B_DIGEST cpHashA; + TPM2B_NONCE policyRef; + INT32 expiration; + TPMT_SIGNATURE auth; +} PolicySigned_In; + +// Output structure definition +typedef struct +{ + TPM2B_TIMEOUT timeout; + TPMT_TK_AUTH policyTicket; +} PolicySigned_Out; + +// Response code modifiers +# define RC_PolicySigned_authObject (TPM_RC_H + TPM_RC_1) +# define RC_PolicySigned_policySession (TPM_RC_H + TPM_RC_2) +# define RC_PolicySigned_nonceTPM (TPM_RC_P + TPM_RC_1) +# define RC_PolicySigned_cpHashA (TPM_RC_P + TPM_RC_2) +# define RC_PolicySigned_policyRef (TPM_RC_P + TPM_RC_3) +# define RC_PolicySigned_expiration (TPM_RC_P + TPM_RC_4) +# define RC_PolicySigned_auth (TPM_RC_P + TPM_RC_5) + +// Function prototype +TPM_RC +TPM2_PolicySigned(PolicySigned_In* in, PolicySigned_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYSIGNED_FP_H_ +#endif // CC_PolicySigned diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyTemplate_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyTemplate_fp.h new file mode 100644 index 00000000..7056acbb --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyTemplate_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyTemplate // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYTEMPLATE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYTEMPLATE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_DIGEST templateHash; +} PolicyTemplate_In; + +// Response code modifiers +# define RC_PolicyTemplate_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyTemplate_templateHash (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_PolicyTemplate(PolicyTemplate_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYTEMPLATE_FP_H_ +#endif // CC_PolicyTemplate diff --git a/TPMCmd/tpm/include/private/prototypes/PolicyTicket_fp.h b/TPMCmd/tpm/include/private/prototypes/PolicyTicket_fp.h new file mode 100644 index 00000000..314a5b6b --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PolicyTicket_fp.h @@ -0,0 +1,33 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_PolicyTicket // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYTICKET_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYTICKET_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_TIMEOUT timeout; + TPM2B_DIGEST cpHashA; + TPM2B_NONCE policyRef; + TPM2B_NAME authName; + TPMT_TK_AUTH ticket; +} PolicyTicket_In; + +// Response code modifiers +# define RC_PolicyTicket_policySession (TPM_RC_H + TPM_RC_1) +# define RC_PolicyTicket_timeout (TPM_RC_P + TPM_RC_1) +# define RC_PolicyTicket_cpHashA (TPM_RC_P + TPM_RC_2) +# define RC_PolicyTicket_policyRef (TPM_RC_P + TPM_RC_3) +# define RC_PolicyTicket_authName (TPM_RC_P + TPM_RC_4) +# define RC_PolicyTicket_ticket (TPM_RC_P + TPM_RC_5) + +// Function prototype +TPM_RC +TPM2_PolicyTicket(PolicyTicket_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICYTICKET_FP_H_ +#endif // CC_PolicyTicket diff --git a/TPMCmd/tpm/include/private/prototypes/Policy_AC_SendSelect_fp.h b/TPMCmd/tpm/include/private/prototypes/Policy_AC_SendSelect_fp.h new file mode 100644 index 00000000..50167520 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Policy_AC_SendSelect_fp.h @@ -0,0 +1,31 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Policy_AC_SendSelect // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICY_AC_SENDSELECT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICY_AC_SENDSELECT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_SH_POLICY policySession; + TPM2B_NAME objectName; + TPM2B_NAME authHandleName; + TPM2B_NAME acName; + TPMI_YES_NO includeObject; +} Policy_AC_SendSelect_In; + +// Response code modifiers +# define RC_Policy_AC_SendSelect_policySession (TPM_RC_H + TPM_RC_1) +# define RC_Policy_AC_SendSelect_objectName (TPM_RC_P + TPM_RC_1) +# define RC_Policy_AC_SendSelect_authHandleName (TPM_RC_P + TPM_RC_2) +# define RC_Policy_AC_SendSelect_acName (TPM_RC_P + TPM_RC_3) +# define RC_Policy_AC_SendSelect_includeObject (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_Policy_AC_SendSelect(Policy_AC_SendSelect_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_POLICY_AC_SENDSELECT_FP_H_ +#endif // CC_Policy_AC_SendSelect diff --git a/TPMCmd/tpm/include/private/prototypes/Policy_spt_fp.h b/TPMCmd/tpm/include/private/prototypes/Policy_spt_fp.h new file mode 100644 index 00000000..cc9f1561 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Policy_spt_fp.h @@ -0,0 +1,58 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 4, 2020 Time: 02:36:44PM + */ + +#ifndef _POLICY_SPT_FP_H_ +#define _POLICY_SPT_FP_H_ + +//** Functions +//*** PolicyParameterChecks() +// This function validates the common parameters of TPM2_PolicySiged() +// and TPM2_PolicySecret(). The common parameters are 'nonceTPM', +// 'expiration', and 'cpHashA'. +TPM_RC +PolicyParameterChecks(SESSION* session, + UINT64 authTimeout, + TPM2B_DIGEST* cpHashA, + TPM2B_NONCE* nonce, + TPM_RC blameNonce, + TPM_RC blameCpHash, + TPM_RC blameExpiration); + +//*** PolicyContextUpdate() +// Update policy hash +// Update the policyDigest in policy session by extending policyRef and +// objectName to it. This will also update the cpHash if it is present. +// +// Return Type: void +void PolicyContextUpdate( + TPM_CC commandCode, // IN: command code + TPM2B_NAME* name, // IN: name of entity + TPM2B_NONCE* ref, // IN: the reference data + TPM2B_DIGEST* cpHash, // IN: the cpHash (optional) + UINT64 policyTimeout, // IN: the timeout value for the policy + SESSION* session // IN/OUT: policy session to be updated +); + +//*** ComputeAuthTimeout() +// This function is used to determine what the authorization timeout value for +// the session should be. +UINT64 +ComputeAuthTimeout(SESSION* session, // IN: the session containing the time + // values + INT32 expiration, // IN: either the number of seconds from + // the start of the session or the + // time in g_timer; + TPM2B_NONCE* nonce // IN: indicator of the time base +); + +//*** PolicyDigestClear() +// Function to reset the policyDigest of a session +void PolicyDigestClear(SESSION* session); + +//*** PolicySptCheckCondition() +// Checks to see if the condition in the policy is satisfied. +BOOL PolicySptCheckCondition(TPM_EO operation, BYTE* opA, BYTE* opB, UINT16 size); + +#endif // _POLICY_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Power_fp.h b/TPMCmd/tpm/include/private/prototypes/Power_fp.h new file mode 100644 index 00000000..6513ed49 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Power_fp.h @@ -0,0 +1,26 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 11:00:49AM + */ + +#ifndef _POWER_FP_H_ +#define _POWER_FP_H_ + +//*** TPMInit() +// This function is used to process a power on event. +void TPMInit(void); + +//*** TPMRegisterStartup() +// This function registers the fact that the TPM has been initialized +// (a TPM2_Startup() has completed successfully). +BOOL TPMRegisterStartup(void); + +//*** TPMIsStarted() +// Indicates if the TPM has been initialized (a TPM2_Startup() has completed +// successfully after a _TPM_Init). +// Return Type: BOOL +// TRUE(1) TPM has been initialized +// FALSE(0) TPM has not been initialized +BOOL TPMIsStarted(void); + +#endif // _POWER_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/PropertyCap_fp.h b/TPMCmd/tpm/include/private/prototypes/PropertyCap_fp.h new file mode 100644 index 00000000..876fc438 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/PropertyCap_fp.h @@ -0,0 +1,30 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _PROPERTY_CAP_FP_H_ +#define _PROPERTY_CAP_FP_H_ + +//*** TPMCapGetProperties() +// This function is used to get the TPM_PT values. The search of properties will +// start at 'property' and continue until 'propertyList' has as many values as +// will fit, or the last property has been reported, or the list has as many +// values as requested in 'count'. +// Return Type: TPMI_YES_NO +// YES more properties are available +// NO no more properties to be reported +TPMI_YES_NO +TPMCapGetProperties(TPM_PT property, // IN: the starting TPM property + UINT32 count, // IN: maximum number of returned + // properties + TPML_TAGGED_TPM_PROPERTY* propertyList // OUT: property list +); + +//*** TPMCapGetOneProperty() +// This function returns a single TPM property, if present. +BOOL TPMCapGetOneProperty(TPM_PT pt, // IN: the TPM property + TPMS_TAGGED_PROPERTY* property // OUT: tagged property +); + +#endif // _PROPERTY_CAP_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Quote_fp.h b/TPMCmd/tpm/include/private/prototypes/Quote_fp.h new file mode 100644 index 00000000..180f5f64 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Quote_fp.h @@ -0,0 +1,36 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Quote // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_QUOTE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_QUOTE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT signHandle; + TPM2B_DATA qualifyingData; + TPMT_SIG_SCHEME inScheme; + TPML_PCR_SELECTION PCRselect; +} Quote_In; + +// Output structure definition +typedef struct +{ + TPM2B_ATTEST quoted; + TPMT_SIGNATURE signature; +} Quote_Out; + +// Response code modifiers +# define RC_Quote_signHandle (TPM_RC_H + TPM_RC_1) +# define RC_Quote_qualifyingData (TPM_RC_P + TPM_RC_1) +# define RC_Quote_inScheme (TPM_RC_P + TPM_RC_2) +# define RC_Quote_PCRselect (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_Quote(Quote_In* in, Quote_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_QUOTE_FP_H_ +#endif // CC_Quote diff --git a/TPMCmd/tpm/include/private/prototypes/RSA_Decrypt_fp.h b/TPMCmd/tpm/include/private/prototypes/RSA_Decrypt_fp.h new file mode 100644 index 00000000..1699a5f7 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/RSA_Decrypt_fp.h @@ -0,0 +1,35 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_RSA_Decrypt // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_RSA_DECRYPT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_RSA_DECRYPT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyHandle; + TPM2B_PUBLIC_KEY_RSA cipherText; + TPMT_RSA_DECRYPT inScheme; + TPM2B_DATA label; +} RSA_Decrypt_In; + +// Output structure definition +typedef struct +{ + TPM2B_PUBLIC_KEY_RSA message; +} RSA_Decrypt_Out; + +// Response code modifiers +# define RC_RSA_Decrypt_keyHandle (TPM_RC_H + TPM_RC_1) +# define RC_RSA_Decrypt_cipherText (TPM_RC_P + TPM_RC_1) +# define RC_RSA_Decrypt_inScheme (TPM_RC_P + TPM_RC_2) +# define RC_RSA_Decrypt_label (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_RSA_Decrypt(RSA_Decrypt_In* in, RSA_Decrypt_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_RSA_DECRYPT_FP_H_ +#endif // CC_RSA_Decrypt diff --git a/TPMCmd/tpm/include/private/prototypes/RSA_Encrypt_fp.h b/TPMCmd/tpm/include/private/prototypes/RSA_Encrypt_fp.h new file mode 100644 index 00000000..6f682c8d --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/RSA_Encrypt_fp.h @@ -0,0 +1,35 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_RSA_Encrypt // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_RSA_ENCRYPT_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_RSA_ENCRYPT_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyHandle; + TPM2B_PUBLIC_KEY_RSA message; + TPMT_RSA_DECRYPT inScheme; + TPM2B_DATA label; +} RSA_Encrypt_In; + +// Output structure definition +typedef struct +{ + TPM2B_PUBLIC_KEY_RSA outData; +} RSA_Encrypt_Out; + +// Response code modifiers +# define RC_RSA_Encrypt_keyHandle (TPM_RC_H + TPM_RC_1) +# define RC_RSA_Encrypt_message (TPM_RC_P + TPM_RC_1) +# define RC_RSA_Encrypt_inScheme (TPM_RC_P + TPM_RC_2) +# define RC_RSA_Encrypt_label (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_RSA_Encrypt(RSA_Encrypt_In* in, RSA_Encrypt_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_RSA_ENCRYPT_FP_H_ +#endif // CC_RSA_Encrypt diff --git a/TPMCmd/tpm/include/private/prototypes/ReadClock_fp.h b/TPMCmd/tpm/include/private/prototypes/ReadClock_fp.h new file mode 100644 index 00000000..51036c8e --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ReadClock_fp.h @@ -0,0 +1,20 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ReadClock // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_READCLOCK_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_READCLOCK_FP_H_ + +// Output structure definition +typedef struct +{ + TPMS_TIME_INFO currentTime; +} ReadClock_Out; + +// Function prototype +TPM_RC +TPM2_ReadClock(ReadClock_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_READCLOCK_FP_H_ +#endif // CC_ReadClock diff --git a/TPMCmd/tpm/include/private/prototypes/ReadPublic_fp.h b/TPMCmd/tpm/include/private/prototypes/ReadPublic_fp.h new file mode 100644 index 00000000..91e430ab --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ReadPublic_fp.h @@ -0,0 +1,31 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ReadPublic // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_READPUBLIC_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_READPUBLIC_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT objectHandle; +} ReadPublic_In; + +// Output structure definition +typedef struct +{ + TPM2B_PUBLIC outPublic; + TPM2B_NAME name; + TPM2B_NAME qualifiedName; +} ReadPublic_Out; + +// Response code modifiers +# define RC_ReadPublic_objectHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_ReadPublic(ReadPublic_In* in, ReadPublic_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_READPUBLIC_FP_H_ +#endif // CC_ReadPublic diff --git a/TPMCmd/tpm/include/private/prototypes/ResponseCodeProcessing_fp.h b/TPMCmd/tpm/include/private/prototypes/ResponseCodeProcessing_fp.h new file mode 100644 index 00000000..e2ba1bbe --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ResponseCodeProcessing_fp.h @@ -0,0 +1,15 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _RESPONSE_CODE_PROCESSING_FP_H_ +#define _RESPONSE_CODE_PROCESSING_FP_H_ + +//** RcSafeAddToResult() +// Adds a modifier to a response code as long as the response code allows a modifier +// and no modifier has already been added. +TPM_RC +RcSafeAddToResult(TPM_RC responseCode, TPM_RC modifier); + +#endif // _RESPONSE_CODE_PROCESSING_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Response_fp.h b/TPMCmd/tpm/include/private/prototypes/Response_fp.h new file mode 100644 index 00000000..ea8fd4dc --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Response_fp.h @@ -0,0 +1,17 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _RESPONSE_FP_H_ +#define _RESPONSE_FP_H_ + +//** BuildResponseHeader() +// Adds the response header to the response. It will update command->parameterSize +// to indicate the total size of the response. +void BuildResponseHeader(COMMAND* command, // IN: main control structure + BYTE* buffer, // OUT: the output buffer + TPM_RC result // IN: the response code +); + +#endif // _RESPONSE_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Rewrap_fp.h b/TPMCmd/tpm/include/private/prototypes/Rewrap_fp.h new file mode 100644 index 00000000..365e9b15 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Rewrap_fp.h @@ -0,0 +1,38 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Rewrap // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_REWRAP_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_REWRAP_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT oldParent; + TPMI_DH_OBJECT newParent; + TPM2B_PRIVATE inDuplicate; + TPM2B_NAME name; + TPM2B_ENCRYPTED_SECRET inSymSeed; +} Rewrap_In; + +// Output structure definition +typedef struct +{ + TPM2B_PRIVATE outDuplicate; + TPM2B_ENCRYPTED_SECRET outSymSeed; +} Rewrap_Out; + +// Response code modifiers +# define RC_Rewrap_oldParent (TPM_RC_H + TPM_RC_1) +# define RC_Rewrap_newParent (TPM_RC_H + TPM_RC_2) +# define RC_Rewrap_inDuplicate (TPM_RC_P + TPM_RC_1) +# define RC_Rewrap_name (TPM_RC_P + TPM_RC_2) +# define RC_Rewrap_inSymSeed (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_Rewrap(Rewrap_In* in, Rewrap_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_REWRAP_FP_H_ +#endif // CC_Rewrap diff --git a/TPMCmd/tpm/include/private/prototypes/RsaKeyCache_fp.h b/TPMCmd/tpm/include/private/prototypes/RsaKeyCache_fp.h new file mode 100644 index 00000000..f9d52ddc --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/RsaKeyCache_fp.h @@ -0,0 +1,26 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _RSA_KEY_CACHE_FP_H_ +#define _RSA_KEY_CACHE_FP_H_ + +#if USE_RSA_KEY_CACHE + +//*** RsaKeyCacheControl() +// Used to enable and disable the RSA key cache. +LIB_EXPORT void RsaKeyCacheControl(int state); + +//*** GetCachedRsaKey() +// Return Type: BOOL +// TRUE(1) key loaded +// FALSE(0) key not loaded +BOOL GetCachedRsaKey(TPMT_PUBLIC* publicArea, + TPMT_SENSITIVE* sensitive, + RAND_STATE* rand // IN: if not NULL, the deterministic + // RNG state +); +#endif // defined SIMULATION && defined USE_RSA_KEY_CACHE + +#endif // _RSA_KEY_CACHE_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/SelfTest_fp.h b/TPMCmd/tpm/include/private/prototypes/SelfTest_fp.h new file mode 100644 index 00000000..0eebbf7a --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/SelfTest_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_SelfTest // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_SELFTEST_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_SELFTEST_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_YES_NO fullTest; +} SelfTest_In; + +// Response code modifiers +# define RC_SelfTest_fullTest (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_SelfTest(SelfTest_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_SELFTEST_FP_H_ +#endif // CC_SelfTest diff --git a/TPMCmd/tpm/include/private/prototypes/SequenceComplete_fp.h b/TPMCmd/tpm/include/private/prototypes/SequenceComplete_fp.h new file mode 100644 index 00000000..66023093 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/SequenceComplete_fp.h @@ -0,0 +1,34 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_SequenceComplete // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_SEQUENCECOMPLETE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_SEQUENCECOMPLETE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT sequenceHandle; + TPM2B_MAX_BUFFER buffer; + TPMI_RH_HIERARCHY hierarchy; +} SequenceComplete_In; + +// Output structure definition +typedef struct +{ + TPM2B_DIGEST result; + TPMT_TK_HASHCHECK validation; +} SequenceComplete_Out; + +// Response code modifiers +# define RC_SequenceComplete_sequenceHandle (TPM_RC_H + TPM_RC_1) +# define RC_SequenceComplete_buffer (TPM_RC_P + TPM_RC_1) +# define RC_SequenceComplete_hierarchy (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_SequenceComplete(SequenceComplete_In* in, SequenceComplete_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_SEQUENCECOMPLETE_FP_H_ +#endif // CC_SequenceComplete diff --git a/TPMCmd/tpm/include/private/prototypes/SequenceUpdate_fp.h b/TPMCmd/tpm/include/private/prototypes/SequenceUpdate_fp.h new file mode 100644 index 00000000..689f33d4 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/SequenceUpdate_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_SequenceUpdate // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_SEQUENCEUPDATE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_SEQUENCEUPDATE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT sequenceHandle; + TPM2B_MAX_BUFFER buffer; +} SequenceUpdate_In; + +// Response code modifiers +# define RC_SequenceUpdate_sequenceHandle (TPM_RC_H + TPM_RC_1) +# define RC_SequenceUpdate_buffer (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_SequenceUpdate(SequenceUpdate_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_SEQUENCEUPDATE_FP_H_ +#endif // CC_SequenceUpdate diff --git a/TPMCmd/tpm/include/private/prototypes/SessionProcess_fp.h b/TPMCmd/tpm/include/private/prototypes/SessionProcess_fp.h new file mode 100644 index 00000000..8f9376a9 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/SessionProcess_fp.h @@ -0,0 +1,83 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 7, 2020 Time: 07:17:48PM + */ + +#ifndef _SESSION_PROCESS_FP_H_ +#define _SESSION_PROCESS_FP_H_ + +//*** IsDAExempted() +// This function indicates if a handle is exempted from DA logic. +// A handle is exempted if it is: +// a) a primary seed handle; +// b) an object with noDA bit SET; +// c) an NV Index with TPMA_NV_NO_DA bit SET; or +// d) a PCR handle. +// +// Return Type: BOOL +// TRUE(1) handle is exempted from DA logic +// FALSE(0) handle is not exempted from DA logic +BOOL IsDAExempted(TPM_HANDLE handle // IN: entity handle +); + +//*** ClearCpRpHashes() +void ClearCpRpHashes(COMMAND* command); + +//*** CompareNameHash() +// This function computes the name hash and compares it to the nameHash in the +// session data, returning true if they are equal. +BOOL CompareNameHash(COMMAND* command, // IN: main parsing structure + SESSION* session // IN: session structure with nameHash +); + +//*** CompareParametersHash() +// This function computes the parameters hash and compares it to the pHash in +// the session data, returning true if they are equal. +BOOL CompareParametersHash(COMMAND* command, // IN: main parsing structure + SESSION* session // IN: session structure with pHash +); + +//*** ParseSessionBuffer() +// This function is the entry function for command session processing. +// It iterates sessions in session area and reports if the required authorization +// has been properly provided. It also processes audit session and passes the +// information of encryption sessions to parameter encryption module. +// +// Return Type: TPM_RC +// various parsing failure or authorization failure +// +TPM_RC +ParseSessionBuffer(COMMAND* command // IN: the structure that contains +); + +//*** CheckAuthNoSession() +// Function to process a command with no session associated. +// The function makes sure all the handles in the command require no authorization. +// +// Return Type: TPM_RC +// TPM_RC_AUTH_MISSING failure - one or more handles require +// authorization +TPM_RC +CheckAuthNoSession(COMMAND* command // IN: command parsing structure +); + +//*** BuildResponseSession() +// Function to build Session buffer in a response. The authorization data is added +// to the end of command->responseBuffer. The size of the authorization area is +// accumulated in command->authSize. +// When this is called, command->responseBuffer is pointing at the next location +// in the response buffer to be filled. This is where the authorization sessions +// will go, if any. command->parameterSize is the number of bytes that have been +// marshaled as parameters in the output buffer. +TPM_RC +BuildResponseSession(COMMAND* command // IN: structure that has relevant command + // information +); + +//*** SessionRemoveAssociationToHandle() +// This function deals with the case where an entity associated with an authorization +// is deleted during command processing. The primary use of this is to support +// UndefineSpaceSpecial(). +void SessionRemoveAssociationToHandle(TPM_HANDLE handle); + +#endif // _SESSION_PROCESS_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Session_fp.h b/TPMCmd/tpm/include/private/prototypes/Session_fp.h similarity index 83% rename from TPMCmd/tpm/include/prototypes/Session_fp.h rename to TPMCmd/tpm/include/private/prototypes/Session_fp.h index 02381ada..f4215e1f 100644 --- a/TPMCmd/tpm/include/prototypes/Session_fp.h +++ b/TPMCmd/tpm/include/private/prototypes/Session_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Mar 4, 2020 Time: 02:36:44PM @@ -147,7 +113,7 @@ SessionContextSave(TPM_HANDLE handle, // IN: session handle // // If the gap is at a maximum, then the only session that can be loaded is // the oldest session, otherwise TPM_RC_CONTEXT_GAP is returned. -/// +// // This function requires that 'handle' references a valid saved session. // // Return Type: TPM_RC @@ -207,6 +173,11 @@ SessionCapGetLoaded(TPMI_SH_POLICY handle, // IN: start handle TPML_HANDLE* handleList // OUT: list of handle ); +//*** SessionCapGetOneLoaded() +// This function returns whether a session handle exists and is loaded. +BOOL SessionCapGetOneLoaded(TPMI_SH_POLICY handle // IN: handle +); + //*** SessionCapGetSaved() // This function returns a list of handles for saved session, starting at // 'handle'. @@ -223,6 +194,11 @@ SessionCapGetSaved(TPMI_SH_HMAC handle, // IN: start handle TPML_HANDLE* handleList // OUT: list of handle ); +//*** SessionCapGetOneSaved() +// This function returns whether a session handle exists and is saved. +BOOL SessionCapGetOneSaved(TPMI_SH_HMAC handle // IN: handle +); + //*** SessionCapGetLoadedNumber() // This function return the number of authorization sessions currently // loaded into TPM RAM. diff --git a/TPMCmd/tpm/include/private/prototypes/SetAlgorithmSet_fp.h b/TPMCmd/tpm/include/private/prototypes/SetAlgorithmSet_fp.h new file mode 100644 index 00000000..fde33e3f --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/SetAlgorithmSet_fp.h @@ -0,0 +1,25 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_SetAlgorithmSet // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETALGORITHMSET_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETALGORITHMSET_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PLATFORM authHandle; + UINT32 algorithmSet; +} SetAlgorithmSet_In; + +// Response code modifiers +# define RC_SetAlgorithmSet_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_SetAlgorithmSet_algorithmSet (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_SetAlgorithmSet(SetAlgorithmSet_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETALGORITHMSET_FP_H_ +#endif // CC_SetAlgorithmSet diff --git a/TPMCmd/tpm/include/private/prototypes/SetCapability_fp.h b/TPMCmd/tpm/include/private/prototypes/SetCapability_fp.h new file mode 100644 index 00000000..510ea2d5 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/SetCapability_fp.h @@ -0,0 +1,22 @@ + +#if CC_SetCapability // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETCAPABILITY_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETCAPABILITY_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_HIERARCHY authHandle; + TPM2B_SET_CAPABILITY_DATA setCapabilityData; +} SetCapability_In; + +// Response code modifiers +# define SetCapability_authHandle (TPM_RC_H + TPM_RC_1) +# define SetCapability_setCapabilityData (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC TPM2_SetCapability(SetCapability_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETCAPABILITY_FP_H_ +#endif // CC_SetCapability diff --git a/TPMCmd/tpm/include/private/prototypes/SetCommandCodeAuditStatus_fp.h b/TPMCmd/tpm/include/private/prototypes/SetCommandCodeAuditStatus_fp.h new file mode 100644 index 00000000..312bef2e --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/SetCommandCodeAuditStatus_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_SetCommandCodeAuditStatus // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETCOMMANDCODEAUDITSTATUS_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETCOMMANDCODEAUDITSTATUS_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_PROVISION auth; + TPMI_ALG_HASH auditAlg; + TPML_CC setList; + TPML_CC clearList; +} SetCommandCodeAuditStatus_In; + +// Response code modifiers +# define RC_SetCommandCodeAuditStatus_auth (TPM_RC_H + TPM_RC_1) +# define RC_SetCommandCodeAuditStatus_auditAlg (TPM_RC_P + TPM_RC_1) +# define RC_SetCommandCodeAuditStatus_setList (TPM_RC_P + TPM_RC_2) +# define RC_SetCommandCodeAuditStatus_clearList (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_SetCommandCodeAuditStatus(SetCommandCodeAuditStatus_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETCOMMANDCODEAUDITSTATUS_FP_H_ +#endif // CC_SetCommandCodeAuditStatus diff --git a/TPMCmd/tpm/include/private/prototypes/SetPrimaryPolicy_fp.h b/TPMCmd/tpm/include/private/prototypes/SetPrimaryPolicy_fp.h new file mode 100644 index 00000000..3334a2ae --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/SetPrimaryPolicy_fp.h @@ -0,0 +1,27 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_SetPrimaryPolicy // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETPRIMARYPOLICY_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETPRIMARYPOLICY_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_RH_HIERARCHY_POLICY authHandle; + TPM2B_DIGEST authPolicy; + TPMI_ALG_HASH hashAlg; +} SetPrimaryPolicy_In; + +// Response code modifiers +# define RC_SetPrimaryPolicy_authHandle (TPM_RC_H + TPM_RC_1) +# define RC_SetPrimaryPolicy_authPolicy (TPM_RC_P + TPM_RC_1) +# define RC_SetPrimaryPolicy_hashAlg (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_SetPrimaryPolicy(SetPrimaryPolicy_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_SETPRIMARYPOLICY_FP_H_ +#endif // CC_SetPrimaryPolicy diff --git a/TPMCmd/tpm/include/private/prototypes/Shutdown_fp.h b/TPMCmd/tpm/include/private/prototypes/Shutdown_fp.h new file mode 100644 index 00000000..ad2baa9b --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Shutdown_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Shutdown // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_SHUTDOWN_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_SHUTDOWN_FP_H_ + +// Input structure definition +typedef struct +{ + TPM_SU shutdownType; +} Shutdown_In; + +// Response code modifiers +# define RC_Shutdown_shutdownType (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_Shutdown(Shutdown_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_SHUTDOWN_FP_H_ +#endif // CC_Shutdown diff --git a/TPMCmd/tpm/include/private/prototypes/Sign_fp.h b/TPMCmd/tpm/include/private/prototypes/Sign_fp.h new file mode 100644 index 00000000..f0243516 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Sign_fp.h @@ -0,0 +1,35 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Sign // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_SIGN_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_SIGN_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyHandle; + TPM2B_DIGEST digest; + TPMT_SIG_SCHEME inScheme; + TPMT_TK_HASHCHECK validation; +} Sign_In; + +// Output structure definition +typedef struct +{ + TPMT_SIGNATURE signature; +} Sign_Out; + +// Response code modifiers +# define RC_Sign_keyHandle (TPM_RC_H + TPM_RC_1) +# define RC_Sign_digest (TPM_RC_P + TPM_RC_1) +# define RC_Sign_inScheme (TPM_RC_P + TPM_RC_2) +# define RC_Sign_validation (TPM_RC_P + TPM_RC_3) + +// Function prototype +TPM_RC +TPM2_Sign(Sign_In* in, Sign_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_SIGN_FP_H_ +#endif // CC_Sign diff --git a/TPMCmd/tpm/include/private/prototypes/StartAuthSession_fp.h b/TPMCmd/tpm/include/private/prototypes/StartAuthSession_fp.h new file mode 100644 index 00000000..5409c772 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/StartAuthSession_fp.h @@ -0,0 +1,42 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_StartAuthSession // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_STARTAUTHSESSION_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_STARTAUTHSESSION_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT tpmKey; + TPMI_DH_ENTITY bind; + TPM2B_NONCE nonceCaller; + TPM2B_ENCRYPTED_SECRET encryptedSalt; + TPM_SE sessionType; + TPMT_SYM_DEF symmetric; + TPMI_ALG_HASH authHash; +} StartAuthSession_In; + +// Output structure definition +typedef struct +{ + TPMI_SH_AUTH_SESSION sessionHandle; + TPM2B_NONCE nonceTPM; +} StartAuthSession_Out; + +// Response code modifiers +# define RC_StartAuthSession_tpmKey (TPM_RC_H + TPM_RC_1) +# define RC_StartAuthSession_bind (TPM_RC_H + TPM_RC_2) +# define RC_StartAuthSession_nonceCaller (TPM_RC_P + TPM_RC_1) +# define RC_StartAuthSession_encryptedSalt (TPM_RC_P + TPM_RC_2) +# define RC_StartAuthSession_sessionType (TPM_RC_P + TPM_RC_3) +# define RC_StartAuthSession_symmetric (TPM_RC_P + TPM_RC_4) +# define RC_StartAuthSession_authHash (TPM_RC_P + TPM_RC_5) + +// Function prototype +TPM_RC +TPM2_StartAuthSession(StartAuthSession_In* in, StartAuthSession_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_STARTAUTHSESSION_FP_H_ +#endif // CC_StartAuthSession diff --git a/TPMCmd/tpm/include/private/prototypes/Startup_fp.h b/TPMCmd/tpm/include/private/prototypes/Startup_fp.h new file mode 100644 index 00000000..254021f5 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Startup_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Startup // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_STARTUP_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_STARTUP_FP_H_ + +// Input structure definition +typedef struct +{ + TPM_SU startupType; +} Startup_In; + +// Response code modifiers +# define RC_Startup_startupType (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_Startup(Startup_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_STARTUP_FP_H_ +#endif // CC_Startup diff --git a/TPMCmd/tpm/include/private/prototypes/StirRandom_fp.h b/TPMCmd/tpm/include/private/prototypes/StirRandom_fp.h new file mode 100644 index 00000000..f22b83d4 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/StirRandom_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_StirRandom // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_STIRRANDOM_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_STIRRANDOM_FP_H_ + +// Input structure definition +typedef struct +{ + TPM2B_SENSITIVE_DATA inData; +} StirRandom_In; + +// Response code modifiers +# define RC_StirRandom_inData (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_StirRandom(StirRandom_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_STIRRANDOM_FP_H_ +#endif // CC_StirRandom diff --git a/TPMCmd/tpm/include/private/prototypes/TableDrivenMarshal_fp.h b/TPMCmd/tpm/include/private/prototypes/TableDrivenMarshal_fp.h new file mode 100644 index 00000000..9563ce13 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TableDrivenMarshal_fp.h @@ -0,0 +1,58 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 4, 2020 Time: 02:36:44PM + */ + +#ifndef _TABLE_DRIVEN_MARSHAL_FP_H_ +#define _TABLE_DRIVEN_MARSHAL_FP_H_ + +#if TABLE_DRIVEN_MARSHAL + +//***UnmarshalUnion() +TPM_RC +UnmarshalUnion(UINT16 typeIndex, // IN: the thing to unmarshal + void* target, // IN: were the data goes to + UINT8** buffer, // IN/OUT: the data source buffer + INT32* size, // IN/OUT: the remaining size + UINT32 selector); + +//*** MarshalUnion() +UINT16 +MarshalUnion(UINT16 typeIndex, // IN: the thing to marshal + void* source, // IN: were the data comes from + UINT8** buffer, // IN/OUT: the data source buffer + INT32* size, // IN/OUT: the remaining size + UINT32 selector // IN: the union selector +); + +TPM_RC +UnmarshalInteger(int iSize, // IN: Number of bytes in the integer + void* target, // OUT: receives the integer + UINT8** buffer, // IN/OUT: source of the data + INT32* size, // IN/OUT: amount of data available + UINT32* value // OUT: optional copy of 'target' +); + +//*** Unmarshal() +// This is the function that performs unmarshaling of different numbered types. Each +// TPM type has a number. The number is used to lookup the address of the data +// structure that describes how to unmarshal that data type. +// +TPM_RC +Unmarshal(UINT16 typeIndex, // IN: the thing to marshal + void* target, // IN: were the data goes from + UINT8** buffer, // IN/OUT: the data source buffer + INT32* size // IN/OUT: the remaining size +); + +//*** Marshal() +// This is the function that drives marshaling of output. Because there is no +// validation of the output, there is a lot less code. +UINT16 Marshal(UINT16 typeIndex, // IN: the thing to marshal + void* source, // IN: were the data comes from + UINT8** buffer, // IN/OUT: the data source buffer + INT32* size // IN/OUT: the remaining size +); +#endif // TABLE_DRIVEN_MARSHAL + +#endif // _TABLE_DRIVEN_MARSHAL_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/TestParms_fp.h b/TPMCmd/tpm/include/private/prototypes/TestParms_fp.h new file mode 100644 index 00000000..ddc0f2bc --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TestParms_fp.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_TestParms // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_TESTPARMS_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_TESTPARMS_FP_H_ + +// Input structure definition +typedef struct +{ + TPMT_PUBLIC_PARMS parameters; +} TestParms_In; + +// Response code modifiers +# define RC_TestParms_parameters (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_TestParms(TestParms_In* in); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_TESTPARMS_FP_H_ +#endif // CC_TestParms diff --git a/TPMCmd/tpm/include/private/prototypes/Ticket_fp.h b/TPMCmd/tpm/include/private/prototypes/Ticket_fp.h new file mode 100644 index 00000000..b358e6b4 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Ticket_fp.h @@ -0,0 +1,59 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Mar 28, 2019 Time: 08:25:19PM + */ + +#ifndef _TICKET_FP_H_ +#define _TICKET_FP_H_ + +//*** TicketIsSafe() +// This function indicates if producing a ticket is safe. +// It checks if the leading bytes of an input buffer is TPM_GENERATED_VALUE +// or its substring of canonical form. If so, it is not safe to produce ticket +// for an input buffer claiming to be TPM generated buffer +// Return Type: BOOL +// TRUE(1) safe to produce ticket +// FALSE(0) not safe to produce ticket +BOOL TicketIsSafe(TPM2B* buffer); + +//*** TicketComputeVerified() +// This function creates a TPMT_TK_VERIFIED ticket. +TPM_RC TicketComputeVerified( + TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant for ticket + TPM2B_DIGEST* digest, // IN: digest + TPM2B_NAME* keyName, // IN: name of key that signed the values + TPMT_TK_VERIFIED* ticket // OUT: verified ticket +); + +//*** TicketComputeAuth() +// This function creates a TPMT_TK_AUTH ticket. +TPM_RC TicketComputeAuth( + TPM_ST type, // IN: the type of ticket. + TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant for ticket + UINT64 timeout, // IN: timeout + BOOL expiresOnReset, // IN: flag to indicate if ticket expires on + // TPM Reset + TPM2B_DIGEST* cpHashA, // IN: input cpHashA + TPM2B_NONCE* policyRef, // IN: input policyRef + TPM2B_NAME* entityName, // IN: name of entity + TPMT_TK_AUTH* ticket // OUT: Created ticket +); + +//*** TicketComputeHashCheck() +// This function creates a TPMT_TK_HASHCHECK ticket. +TPM_RC TicketComputeHashCheck( + TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant for ticket + TPM_ALG_ID hashAlg, // IN: the hash algorithm for 'digest' + TPM2B_DIGEST* digest, // IN: input digest + TPMT_TK_HASHCHECK* ticket // OUT: Created ticket +); + +//*** TicketComputeCreation() +// This function creates a TPMT_TK_CREATION ticket. +TPM_RC TicketComputeCreation(TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy for ticket + TPM2B_NAME* name, // IN: object name + TPM2B_DIGEST* creation, // IN: creation hash + TPMT_TK_CREATION* ticket // OUT: created ticket +); + +#endif // _TICKET_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Time_fp.h b/TPMCmd/tpm/include/private/prototypes/Time_fp.h new file mode 100644 index 00000000..23a40143 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Time_fp.h @@ -0,0 +1,86 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 04:23:27PM + */ + +#ifndef _TIME_FP_H_ +#define _TIME_FP_H_ + +//*** TimePowerOn() +// This function initialize time info at _TPM_Init(). +// +// This function is called at _TPM_Init() so that the TPM time can start counting +// as soon as the TPM comes out of reset and doesn't have to wait until +// TPM2_Startup() in order to begin the new time epoch. This could be significant +// for systems that could get powered up but not run any TPM commands for some +// period of time. +// +void TimePowerOn(void); + +//*** TimeStartup() +// This function updates the resetCount and restartCount components of +// TPMS_CLOCK_INFO structure at TPM2_Startup(). +// +// This function will deal with the deferred creation of a new epoch. +// TimeUpdateToCurrent() will not start a new epoch even if one is due when +// TPM_Startup() has not been run. This is because the state of NV is not known +// until startup completes. When Startup is done, then it will create the epoch +// nonce to complete the initializations by calling this function. +BOOL TimeStartup(STARTUP_TYPE type // IN: start up type +); + +//*** TimeClockUpdate() +// This function updates go.clock. If 'newTime' requires an update of NV, then +// NV is checked for availability. If it is not available or is rate limiting, then +// go.clock is not updated and the function returns an error. If 'newTime' would +// not cause an NV write, then go.clock is updated. If an NV write occurs, then +// go.safe is SET. +void TimeClockUpdate(UINT64 newTime // IN: New time value in mS. +); + +//*** TimeUpdate() +// This function is used to update the time and clock values. If the TPM +// has run TPM2_Startup(), this function is called at the start of each command. +// If the TPM has not run TPM2_Startup(), this is called from TPM2_Startup() to +// get the clock values initialized. It is not called on command entry because, in +// this implementation, the go structure is not read from NV until TPM2_Startup(). +// The reason for this is that the initialization code (_TPM_Init()) may run before +// NV is accessible. +void TimeUpdate(void); + +//*** TimeUpdateToCurrent() +// This function updates the 'Time' and 'Clock' in the global +// TPMS_TIME_INFO structure. +// +// In this implementation, 'Time' and 'Clock' are updated at the beginning +// of each command and the values are unchanged for the duration of the +// command. +// +// Because 'Clock' updates may require a write to NV memory, 'Time' and 'Clock' +// are not allowed to advance if NV is not available. When clock is not advancing, +// any function that uses 'Clock' will fail and return TPM_RC_NV_UNAVAILABLE or +// TPM_RC_NV_RATE. +// +// This implementation does not do rate limiting. If the implementation does do +// rate limiting, then the 'Clock' update should not be inhibited even when doing +// rate limiting. +void TimeUpdateToCurrent(void); + +//*** TimeSetAdjustRate() +// This function is used to perform rate adjustment on 'Time' and 'Clock'. +void TimeSetAdjustRate(TPM_CLOCK_ADJUST adjust // IN: adjust constant +); + +//*** TimeGetMarshaled() +// This function is used to access TPMS_TIME_INFO in canonical form. +// The function collects the time information and marshals it into 'dataBuffer' +// and returns the marshaled size +UINT16 +TimeGetMarshaled(TIME_INFO* dataBuffer // OUT: result buffer +); + +//*** TimeFillInfo +// This function gathers information to fill in a TPMS_CLOCK_INFO structure. +void TimeFillInfo(TPMS_CLOCK_INFO* clockInfo); + +#endif // _TIME_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmASN1_fp.h b/TPMCmd/tpm/include/private/prototypes/TpmASN1_fp.h similarity index 75% rename from TPMCmd/tpm/include/prototypes/TpmASN1_fp.h rename to TPMCmd/tpm/include/private/prototypes/TpmASN1_fp.h index ea3f15dd..b62d2678 100644 --- a/TPMCmd/tpm/include/prototypes/TpmASN1_fp.h +++ b/TPMCmd/tpm/include/private/prototypes/TpmASN1_fp.h @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmPrototypes; Version 3.0 July 18, 2017 * Date: Aug 30, 2019 Time: 02:11:54PM diff --git a/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_ECDAA_fp.h b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_ECDAA_fp.h new file mode 100644 index 00000000..cccbf3eb --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_ECDAA_fp.h @@ -0,0 +1,33 @@ +#ifndef _TPMECC_SIGNATURE_ECDAA_FP_H_ +#define _TPMECC_SIGNATURE_ECDAA_FP_H_ +#if ALG_ECC && ALG_ECDAA + +//*** TpmEcc_SignEcdaa() +// +// This function performs 's' = 'r' + 'T' * 'd' mod 'q' where +// 1) 'r' is a random, or pseudo-random value created in the commit phase +// 2) 'nonceK' is a TPM-generated, random value 0 < 'nonceK' < 'n' +// 3) 'T' is mod 'q' of "Hash"('nonceK' || 'digest'), and +// 4) 'd' is a private key. +// +// The signature is the tuple ('nonceK', 's') +// +// Regrettably, the parameters in this function kind of collide with the parameter +// names used in ECSCHNORR making for a lot of confusion. +// Return Type: TPM_RC +// TPM_RC_SCHEME unsupported hash algorithm +// TPM_RC_NO_RESULT cannot get values from random number generator +TPM_RC TpmEcc_SignEcdaa( + TPM2B_ECC_PARAMETER* nonceK, // OUT: 'nonce' component of the signature + Crypt_Int* bnS, // OUT: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in signing + Crypt_Int* bnD, // IN: the private key + const TPM2B_DIGEST* digest, // IN: the value to sign (mod 'q') + TPMT_ECC_SCHEME* scheme, // IN: signing scheme (contains the + // commit count value). + OBJECT* eccKey, // IN: The signing key + RAND_STATE* rand // IN: a random number state +); + +#endif // ALG_ECC && ALG_ECDAA +#endif // _TPMECC_SIGNATURE_ECDAA_FP_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_ECDSA_fp.h b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_ECDSA_fp.h new file mode 100644 index 00000000..fdbd67b4 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_ECDSA_fp.h @@ -0,0 +1,34 @@ +#ifndef _TPMECC_SIGNATURE_ECDSA_FP_H_ +#define _TPMECC_SIGNATURE_ECDSA_FP_H_ +#if ALG_ECC && ALG_ECDSA + +//*** TpmEcc_SignEcdsa() +// This function implements the ECDSA signing algorithm. The method is described +// in the comments below. +TPM_RC +TpmEcc_SignEcdsa(Crypt_Int* bnR, // OUT: 'r' component of the signature + Crypt_Int* bnS, // OUT: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in the signature + // process + Crypt_Int* bnD, // IN: private signing key + const TPM2B_DIGEST* digest, // IN: the digest to sign + RAND_STATE* rand // IN: used in debug of signing +); + +//*** TpmEcc_ValidateSignatureEcdsa() +// This function validates an ECDSA signature. rIn and sIn should have been checked +// to make sure that they are in the range 0 < 'v' < 'n' +// Return Type: TPM_RC +// TPM_RC_SIGNATURE signature not valid +TPM_RC +TpmEcc_ValidateSignatureEcdsa( + Crypt_Int* bnR, // IN: 'r' component of the signature + Crypt_Int* bnS, // IN: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in the signature + // process + const Crypt_Point* ecQ, // IN: the public point of the key + const TPM2B_DIGEST* digest // IN: the digest that was signed +); + +#endif // ALG_ECC && ALG_ECDSA +#endif // _TPMECC_SIGNATURE_ECDSA_FP_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_SM2_fp.h b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_SM2_fp.h new file mode 100644 index 00000000..41437da3 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_SM2_fp.h @@ -0,0 +1,35 @@ +#ifndef _TPMECC_SIGNATURE_SM2_FP_H_ +#define _TPMECC_SIGNATURE_SM2_FP_H_ + +#if ALG_ECC && ALG_SM2 +//*** TpmEcc_SignEcSm2() +// This function signs a digest using the method defined in SM2 Part 2. The method +// in the standard will add a header to the message to be signed that is a hash of +// the values that define the key. This then hashed with the message to produce a +// digest ('e'). This function signs 'e'. +// Return Type: TPM_RC +// TPM_RC_VALUE bad curve +TPM_RC TpmEcc_SignEcSm2(Crypt_Int* bnR, // OUT: 'r' component of the signature + Crypt_Int* bnS, // OUT: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in signing + Crypt_Int* bnD, // IN: the private key + const TPM2B_DIGEST* digest, // IN: the digest to sign + RAND_STATE* rand // IN: random number generator (mostly for + // debug) +); + +//*** TpmEcc_ValidateSignatureEcSm2() +// This function is used to validate an SM2 signature. +// Return Type: TPM_RC +// TPM_RC_SIGNATURE signature not valid +TPM_RC TpmEcc_ValidateSignatureEcSm2( + Crypt_Int* bnR, // IN: 'r' component of the signature + Crypt_Int* bnS, // IN: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in the signature + // process + Crypt_Point* ecQ, // IN: the public point of the key + const TPM2B_DIGEST* digest // IN: the digest that was signed +); + +#endif // ALG_ECC && ALG_SM2 +#endif // _TPMECC_SIGNATURE_SM2_FP_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_Schnorr_fp.h b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_Schnorr_fp.h new file mode 100644 index 00000000..782e8459 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_Schnorr_fp.h @@ -0,0 +1,30 @@ +#ifndef _TPMECC_SIGNATURE_SCHNORR_FP_H_ +#define _TPMECC_SIGNATURE_SCHNORR_FP_H_ + +#if ALG_ECC && ALG_ECSCHNORR +TPM_RC TpmEcc_SignEcSchnorr( + Crypt_Int* bnR, // OUT: 'r' component of the signature + Crypt_Int* bnS, // OUT: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in signing + Crypt_Int* bnD, // IN: the signing key + const TPM2B_DIGEST* digest, // IN: the digest to sign + TPM_ALG_ID hashAlg, // IN: signing scheme (contains a hash) + RAND_STATE* rand // IN: non-NULL when testing +); + +//*** TpmEcc_ValidateSignatureEcSchnorr() +// This function is used to validate an EC Schnorr signature. +// Return Type: TPM_RC +// TPM_RC_SIGNATURE signature not valid +TPM_RC TpmEcc_ValidateSignatureEcSchnorr( + Crypt_Int* bnR, // IN: 'r' component of the signature + Crypt_Int* bnS, // IN: 's' component of the signature + TPM_ALG_ID hashAlg, // IN: hash algorithm of the signature + const Crypt_EccCurve* E, // IN: the curve used in the signature + // process + Crypt_Point* ecQ, // IN: the public point of the key + const TPM2B_DIGEST* digest // IN: the digest that was signed +); + +#endif // ALG_ECC && ALG_ECSCHNORR +#endif // _TPMECC_SIGNATURE_SCHNORR_FP_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_Util_fp.h b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_Util_fp.h new file mode 100644 index 00000000..bc93e55c --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Signature_Util_fp.h @@ -0,0 +1,27 @@ +// functions shared by multiple signature algorithms +#ifndef _TPMECC_SIGNATURE_UTIL_FP_H_ +#define _TPMECC_SIGNATURE_UTIL_FP_H_ + +#if ALG_ECC +//*** TpmEcc_SchnorrCalculateS() +// This contains the Schnorr signature (S) computation. It is used by both ECDSA and +// Schnorr signing. The result is computed as: ['s' = 'k' + 'r' * 'd' (mod 'n')] +// where +// 1) 's' is the signature +// 2) 'k' is a random value +// 3) 'r' is the value to sign +// 4) 'd' is the private EC key +// 5) 'n' is the order of the curve +// Return Type: TPM_RC +// TPM_RC_NO_RESULT the result of the operation was zero or 'r' (mod 'n') +// is zero +TPM_RC TpmEcc_SchnorrCalculateS( + Crypt_Int* bnS, // OUT: 's' component of the signature + const Crypt_Int* bnK, // IN: a random value + Crypt_Int* bnR, // IN: the signature 'r' value + const Crypt_Int* bnD, // IN: the private key + const Crypt_Int* bnN // IN: the order of the curve +); + +#endif // ALG_ECC +#endif // _TPMECC_SIGNATURE_UTIL_FP_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/prototypes/TpmEcc_Util_fp.h b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Util_fp.h new file mode 100644 index 00000000..d82f1810 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TpmEcc_Util_fp.h @@ -0,0 +1,29 @@ +#ifndef _TPMECC_UTIL_FP_H_ +#define _TPMECC_UTIL_FP_H_ + +#if ALG_ECC + +//*** TpmEcc_PointFrom2B() +// Function to create a Crypt_Point structure from a 2B point. +// This function doesn't take an Crypt_EccCurve for legacy reasons - +// this should probably be changed. +// returns NULL if the input value is invalid or doesn't fit. +LIB_EXPORT Crypt_Point* TpmEcc_PointFrom2B( + Crypt_Point* ecP, // OUT: the preallocated point structure + TPMS_ECC_POINT* p // IN: the number to convert +); + +//*** TpmEcc_PointTo2B() +// This function converts a Crypt_Point into a TPMS_ECC_POINT. A TPMS_ECC_POINT +// contains two TPM2B_ECC_PARAMETER values. The maximum size of the parameters +// is dependent on the maximum EC key size used in an implementation. +// The presumption is that the TPMS_ECC_POINT is large enough to hold 2 TPM2B +// values, each as large as a MAX_ECC_PARAMETER_BYTES +LIB_EXPORT BOOL TpmEcc_PointTo2B( + TPMS_ECC_POINT* p, // OUT: the converted 2B structure + const Crypt_Point* ecP, // IN: the values to be converted + const Crypt_EccCurve* E // IN: curve descriptor for the point +); + +#endif // ALG_ECC +#endif // _TPMECC_UTIL_FP_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/prototypes/TpmMath_Debug_fp.h b/TPMCmd/tpm/include/private/prototypes/TpmMath_Debug_fp.h new file mode 100644 index 00000000..0d60b097 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TpmMath_Debug_fp.h @@ -0,0 +1,26 @@ +// +// debug and test utilities. Not expected to be compiled into final products +#ifndef _TPMMATH_DEBUG_FP_H_ +#define _TPMMATH_DEBUG_FP_H_ + +#if ALG_ECC || ALG_RSA + +//*** TpmEccDebug_HexEqual() +// This function compares a bignum value to a hex string. +// using TpmEcc namespace because code assumes the max size +// is correct for ECC. +// Return Type: BOOL +// TRUE(1) values equal +// FALSE(0) values not equal +BOOL TpmMath_Debug_HexEqual(const Crypt_Int* bn, //IN: big number value + const char* c //IN: character string number +); + +LIB_EXPORT Crypt_Int* TpmMath_Debug_FromHex( + Crypt_Int* bn, // OUT: + const unsigned char* hex, // IN: + size_t maxsizeHex // IN: maximum size of hex +); + +#endif // ALG_ECC or ALG_RSA +#endif //_TPMMATH_DEBUG_FP_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/prototypes/TpmMath_Util_fp.h b/TPMCmd/tpm/include/private/prototypes/TpmMath_Util_fp.h new file mode 100644 index 00000000..2eda00ae --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TpmMath_Util_fp.h @@ -0,0 +1,71 @@ +#ifndef _TPM_MATH_FP_H_ +#define _TPM_MATH_FP_H_ + +//*** TpmMath_IntFrom2B() +// Convert an TPM2B to a Crypt_Int. +// If the input value does not exist, or the output does not exist, or the input +// will not fit into the output the function returns NULL +LIB_EXPORT Crypt_Int* TpmMath_IntFrom2B(Crypt_Int* value, // OUT: + const TPM2B* a2B // IN: number to convert +); + +//*** TpmMath_IntTo2B() +// +// Function to convert a Crypt_Int to TPM2B. The TPM2B bytes are +// always in big-endian ordering (most significant byte first). If 'size' is +// non-zero and less than required by `value` then an error is returned. If +// `size` is non-zero and larger than `value`, the result buffer is padded +// with zeros. If `size` is zero, then the TPM2B is assumed to be large enough +// for the data and a2b->size will be adjusted accordingly. +LIB_EXPORT BOOL TpmMath_IntTo2B( + const Crypt_Int* value, // IN: value to convert + TPM2B* a2B, // OUT: buffer for output + NUMBYTES size // IN: Size of output buffer - see comments. +); + +//*** TpmMath_GetRandomBits() +// This function gets random bits for use in various places. +// +// One consequence of the generation scheme is that, if the number of bits requested +// is not a multiple of 8, then the high-order bits are set to zero. This would come +// into play when generating a 521-bit ECC key. A 66-byte (528-bit) value is +// generated and the high order 7 bits are masked off (CLEAR). +// In this situation, the highest order byte is the first byte (big-endian/TPM2B format) +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure +LIB_EXPORT BOOL TpmMath_GetRandomBits( + BYTE* pBuffer, // OUT: buffer to set + size_t bits, // IN: number of bits to generate (see remarks) + RAND_STATE* rand // IN: random engine +); + +//*** TpmMath_GetRandomInteger +// This function generates a random integer with the requested number of bits. +// Except for size, no range checking is performed. +// The maximum size that can be created is LARGEST_NUMBER + 64 bits. +// if either more bits, or the Crypt_Int* is too small to contain the requested bits +// the TPM enters failure mode and this function returns FALSE. +LIB_EXPORT BOOL TpmMath_GetRandomInteger(Crypt_Int* bn, // OUT: integer buffer to set + size_t bits, // IN: size of output, + RAND_STATE* rand // IN: random engine +); + +//*** TpmMath_GetRandomInRange() +// This function is used to generate a random number r in the range 1 <= r < limit. +// The function gets a random number of bits that is the size of limit. There is some +// some probability that the returned number is going to be greater than or equal +// to the limit. If it is, try again. There is no more than 50% chance that the +// next number is also greater, so try again. We keep trying until we get a +// value that meets the criteria. Since limit is very often a number with a LOT of +// high order ones, this rarely would need a second try. +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure ('limit' is too small) +LIB_EXPORT BOOL TpmMath_GetRandomInRange( + Crypt_Int* dest, // OUT: integer buffer to set + const Crypt_Int* limit, // IN: limit (see remarks) + RAND_STATE* rand // IN: random engine +); + +#endif //_TPM_MATH_FP_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/private/prototypes/TpmSizeChecks_fp.h b/TPMCmd/tpm/include/private/prototypes/TpmSizeChecks_fp.h new file mode 100644 index 00000000..05196540 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/TpmSizeChecks_fp.h @@ -0,0 +1,19 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Oct 24, 2019 Time: 11:37:07AM + */ + +#ifndef _TPM_SIZE_CHECKS_FP_H_ +#define _TPM_SIZE_CHECKS_FP_H_ + +#if RUNTIME_SIZE_CHECKS + +//** TpmSizeChecks() +// This function is used during the development process to make sure that the +// vendor-specific values result in a consistent implementation. When possible, +// the code contains "#if" to do compile-time checks. However, in some cases, the +// values require the use of "sizeof()" and that can't be used in an #if. +BOOL TpmSizeChecks(void); +#endif // RUNTIME_SIZE_CHECKS + +#endif // _TPM_SIZE_CHECKS_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/Unseal_fp.h b/TPMCmd/tpm/include/private/prototypes/Unseal_fp.h new file mode 100644 index 00000000..fba596cc --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Unseal_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Unseal // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_UNSEAL_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_UNSEAL_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT itemHandle; +} Unseal_In; + +// Output structure definition +typedef struct +{ + TPM2B_SENSITIVE_DATA outData; +} Unseal_Out; + +// Response code modifiers +# define RC_Unseal_itemHandle (TPM_RC_H + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_Unseal(Unseal_In* in, Unseal_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_UNSEAL_FP_H_ +#endif // CC_Unseal diff --git a/TPMCmd/tpm/include/private/prototypes/Vendor_TCG_Test_fp.h b/TPMCmd/tpm/include/private/prototypes/Vendor_TCG_Test_fp.h new file mode 100644 index 00000000..52920ff0 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/Vendor_TCG_Test_fp.h @@ -0,0 +1,29 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_Vendor_TCG_Test // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_VENDOR_TCG_TEST_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_VENDOR_TCG_TEST_FP_H_ + +// Input structure definition +typedef struct +{ + TPM2B_DATA inputData; +} Vendor_TCG_Test_In; + +// Output structure definition +typedef struct +{ + TPM2B_DATA outputData; +} Vendor_TCG_Test_Out; + +// Response code modifiers +# define RC_Vendor_TCG_Test_inputData (TPM_RC_P + TPM_RC_1) + +// Function prototype +TPM_RC +TPM2_Vendor_TCG_Test(Vendor_TCG_Test_In* in, Vendor_TCG_Test_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_VENDOR_TCG_TEST_FP_H_ +#endif // CC_Vendor_TCG_Test diff --git a/TPMCmd/tpm/include/private/prototypes/VerifySignature_fp.h b/TPMCmd/tpm/include/private/prototypes/VerifySignature_fp.h new file mode 100644 index 00000000..35466c56 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/VerifySignature_fp.h @@ -0,0 +1,33 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_VerifySignature // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_VERIFYSIGNATURE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_VERIFYSIGNATURE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyHandle; + TPM2B_DIGEST digest; + TPMT_SIGNATURE signature; +} VerifySignature_In; + +// Output structure definition +typedef struct +{ + TPMT_TK_VERIFIED validation; +} VerifySignature_Out; + +// Response code modifiers +# define RC_VerifySignature_keyHandle (TPM_RC_H + TPM_RC_1) +# define RC_VerifySignature_digest (TPM_RC_P + TPM_RC_1) +# define RC_VerifySignature_signature (TPM_RC_P + TPM_RC_2) + +// Function prototype +TPM_RC +TPM2_VerifySignature(VerifySignature_In* in, VerifySignature_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_VERIFYSIGNATURE_FP_H_ +#endif // CC_VerifySignature diff --git a/TPMCmd/tpm/include/private/prototypes/X509_ECC_fp.h b/TPMCmd/tpm/include/private/prototypes/X509_ECC_fp.h new file mode 100644 index 00000000..875369c9 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/X509_ECC_fp.h @@ -0,0 +1,36 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 11:00:49AM + */ + +#ifndef _X509_ECC_FP_H_ +#define _X509_ECC_FP_H_ + +//*** X509PushPoint() +// This seems like it might be used more than once so... +// Return Type: INT16 +// > 0 number of bytes added +// == 0 failure +INT16 +X509PushPoint(ASN1MarshalContext* ctx, TPMS_ECC_POINT* p); + +//*** X509AddSigningAlgorithmECC() +// This creates the singing algorithm data. +// Return Type: INT16 +// > 0 number of bytes added +// == 0 failure +INT16 +X509AddSigningAlgorithmECC( + OBJECT* signKey, TPMT_SIG_SCHEME* scheme, ASN1MarshalContext* ctx); + +//*** X509AddPublicECC() +// This function will add the publicKey description to the DER data. If ctx is +// NULL, then no data is transferred and this function will indicate if the TPM +// has the values for DER-encoding of the public key. +// Return Type: INT16 +// > 0 number of bytes added +// == 0 failure +INT16 +X509AddPublicECC(OBJECT* object, ASN1MarshalContext* ctx); + +#endif // _X509_ECC_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/X509_RSA_fp.h b/TPMCmd/tpm/include/private/prototypes/X509_RSA_fp.h new file mode 100644 index 00000000..7c85fbcd --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/X509_RSA_fp.h @@ -0,0 +1,31 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 11:00:49AM + */ + +#ifndef _X509_RSA_FP_H_ +#define _X509_RSA_FP_H_ + +#if ALG_RSA + +//*** X509AddSigningAlgorithmRSA() +// This creates the singing algorithm data. +// Return Type: INT16 +// > 0 number of bytes added +// == 0 failure +INT16 +X509AddSigningAlgorithmRSA( + OBJECT* signKey, TPMT_SIG_SCHEME* scheme, ASN1MarshalContext* ctx); + +//*** X509AddPublicRSA() +// This function will add the publicKey description to the DER data. If fillPtr is +// NULL, then no data is transferred and this function will indicate if the TPM +// has the values for DER-encoding of the public key. +// Return Type: INT16 +// > 0 number of bytes added +// == 0 failure +INT16 +X509AddPublicRSA(OBJECT* object, ASN1MarshalContext* ctx); +#endif // ALG_RSA + +#endif // _X509_RSA_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/X509_spt_fp.h b/TPMCmd/tpm/include/private/prototypes/X509_spt_fp.h new file mode 100644 index 00000000..cc015129 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/X509_spt_fp.h @@ -0,0 +1,71 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Nov 14, 2019 Time: 05:57:02PM + */ + +#ifndef _X509_SPT_FP_H_ +#define _X509_SPT_FP_H_ + +//*** X509FindExtensionByOID() +// This will search a list of X509 extensions to find an extension with the +// requested OID. If the extension is found, the output context ('ctx') is set up +// to point to the OID in the extension. +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure (could be catastrophic) +BOOL X509FindExtensionByOID(ASN1UnmarshalContext* ctxIn, // IN: the context to search + ASN1UnmarshalContext* ctx, // OUT: the extension context + const BYTE* OID // IN: oid to search for +); + +//*** X509GetExtensionBits() +// This function will extract a bit field from an extension. If the extension doesn't +// contain a bit string, it will fail. +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure +UINT32 +X509GetExtensionBits(ASN1UnmarshalContext* ctx, UINT32* value); + +//***X509ProcessExtensions() +// This function is used to process the TPMA_OBJECT and KeyUsage extensions. It is not +// in the CertifyX509.c code because it makes the code harder to follow. +// Return Type: TPM_RC +// TPM_RCS_ATTRIBUTES the attributes of object are not consistent with +// the extension setting +// TPM_RC_VALUE problem parsing the extensions +TPM_RC +X509ProcessExtensions( + OBJECT* object, // IN: The object with the attributes to + // check + stringRef* extension // IN: The start and length of the extensions +); + +//*** X509AddSigningAlgorithm() +// This creates the singing algorithm data. +// Return Type: INT16 +// > 0 number of octets added +// <= 0 failure +INT16 +X509AddSigningAlgorithm( + ASN1MarshalContext* ctx, OBJECT* signKey, TPMT_SIG_SCHEME* scheme); + +//*** X509AddPublicKey() +// This function will add the publicKey description to the DER data. If fillPtr is +// NULL, then no data is transferred and this function will indicate if the TPM +// has the values for DER-encoding of the public key. +// Return Type: INT16 +// > 0 number of octets added +// == 0 failure +INT16 +X509AddPublicKey(ASN1MarshalContext* ctx, OBJECT* object); + +//*** X509PushAlgorithmIdentifierSequence() +// The function adds the algorithm identifier sequence. +// Return Type: INT16 +// > 0 number of bytes added +// == 0 failure +INT16 +X509PushAlgorithmIdentifierSequence(ASN1MarshalContext* ctx, const BYTE* OID); + +#endif // _X509_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/private/prototypes/ZGen_2Phase_fp.h b/TPMCmd/tpm/include/private/prototypes/ZGen_2Phase_fp.h new file mode 100644 index 00000000..ff4f35b4 --- /dev/null +++ b/TPMCmd/tpm/include/private/prototypes/ZGen_2Phase_fp.h @@ -0,0 +1,38 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#if CC_ZGen_2Phase // Command must be enabled + +# ifndef _TPM_INCLUDE_PRIVATE_PROTOTYPES_ZGEN_2PHASE_FP_H_ +# define _TPM_INCLUDE_PRIVATE_PROTOTYPES_ZGEN_2PHASE_FP_H_ + +// Input structure definition +typedef struct +{ + TPMI_DH_OBJECT keyA; + TPM2B_ECC_POINT inQsB; + TPM2B_ECC_POINT inQeB; + TPMI_ECC_KEY_EXCHANGE inScheme; + UINT16 counter; +} ZGen_2Phase_In; + +// Output structure definition +typedef struct +{ + TPM2B_ECC_POINT outZ1; + TPM2B_ECC_POINT outZ2; +} ZGen_2Phase_Out; + +// Response code modifiers +# define RC_ZGen_2Phase_keyA (TPM_RC_H + TPM_RC_1) +# define RC_ZGen_2Phase_inQsB (TPM_RC_P + TPM_RC_1) +# define RC_ZGen_2Phase_inQeB (TPM_RC_P + TPM_RC_2) +# define RC_ZGen_2Phase_inScheme (TPM_RC_P + TPM_RC_3) +# define RC_ZGen_2Phase_counter (TPM_RC_P + TPM_RC_4) + +// Function prototype +TPM_RC +TPM2_ZGen_2Phase(ZGen_2Phase_In* in, ZGen_2Phase_Out* out); + +# endif // _TPM_INCLUDE_PRIVATE_PROTOTYPES_ZGEN_2PHASE_FP_H_ +#endif // CC_ZGen_2Phase diff --git a/TPMCmd/tpm/include/prototypes/ACT_SetTimeout_fp.h b/TPMCmd/tpm/include/prototypes/ACT_SetTimeout_fp.h deleted file mode 100644 index 3a001478..00000000 --- a/TPMCmd/tpm/include/prototypes/ACT_SetTimeout_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Oct 2, 2019 Time: 07:41:19PM - */ - -#if CC_ACT_SetTimeout // Command must be enabled - -# ifndef _ACT_SETTIMEOUT_FP_H_ -# define _ACT_SETTIMEOUT_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_ACT actHandle; - UINT32 startTimeout; -} ACT_SetTimeout_In; - -// Response code modifiers -# define RC_ACT_SetTimeout_actHandle (TPM_RC_H + TPM_RC_1) -# define RC_ACT_SetTimeout_startTimeout (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ACT_SetTimeout(ACT_SetTimeout_In* in); - -# endif // _ACT_SETTIMEOUT_FP_H_ -#endif // CC_ACT_SetTimeout diff --git a/TPMCmd/tpm/include/prototypes/ACT_spt_fp.h b/TPMCmd/tpm/include/prototypes/ACT_spt_fp.h deleted file mode 100644 index 3629c694..00000000 --- a/TPMCmd/tpm/include/prototypes/ACT_spt_fp.h +++ /dev/null @@ -1,80 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes 1.00 - * Date: Oct 24, 2019 Time: 10:38:43AM - */ - -#ifndef _ACT_SPT_FP_H_ -#define _ACT_SPT_FP_H_ - -//*** ActStartup() -// This function is called by TPM2_Startup() to initialize the ACT counter values. -BOOL ActStartup(STARTUP_TYPE type); - -//*** ActGetSignaled() -// This function returns the state of the signaled flag associated with an ACT. -BOOL ActGetSignaled(TPM_RH actHandle); - -//***ActShutdown() -// This function saves the current state of the counters -BOOL ActShutdown(TPM_SU state //IN: the type of the shutdown. -); - -//*** ActIsImplemented() -// This function determines if an ACT is implemented in both the TPM and the platform -// code. -BOOL ActIsImplemented(UINT32 act); - -//***ActCounterUpdate() -// This function updates the ACT counter. If the counter already has a pending update, -// it returns TPM_RC_RETRY so that the update can be tried again later. -TPM_RC -ActCounterUpdate(TPM_RH handle, //IN: the handle of the act - UINT32 newValue //IN: the value to set in the ACT -); - -//*** ActGetCapabilityData() -// This function returns the list of ACT data -// Return Type: TPMI_YES_NO -// YES if more ACT data is available -// NO if no more ACT data to -TPMI_YES_NO -ActGetCapabilityData(TPM_HANDLE actHandle, // IN: the handle for the starting ACT - UINT32 maxCount, // IN: maximum allowed return values - TPML_ACT_DATA* actList // OUT: ACT data list -); - -#endif // _ACT_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/AC_GetCapability_fp.h b/TPMCmd/tpm/include/prototypes/AC_GetCapability_fp.h deleted file mode 100644 index ae5d8c17..00000000 --- a/TPMCmd/tpm/include/prototypes/AC_GetCapability_fp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_AC_GetCapability // Command must be enabled - -# ifndef _AC_Get_Capability_FP_H_ -# define _AC_Get_Capability_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_AC ac; - TPM_AT capability; - UINT32 count; -} AC_GetCapability_In; - -// Output structure definition -typedef struct -{ - TPMI_YES_NO moreData; - TPML_AC_CAPABILITIES capabilitiesData; -} AC_GetCapability_Out; - -// Response code modifiers -# define RC_AC_GetCapability_ac (TPM_RC_H + TPM_RC_1) -# define RC_AC_GetCapability_capability (TPM_RC_P + TPM_RC_1) -# define RC_AC_GetCapability_count (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_AC_GetCapability(AC_GetCapability_In* in, AC_GetCapability_Out* out); - -# endif // _AC_Get_Capability_FP_H_ -#endif // CC_AC_GetCapability diff --git a/TPMCmd/tpm/include/prototypes/AC_Send_fp.h b/TPMCmd/tpm/include/prototypes/AC_Send_fp.h deleted file mode 100644 index 8080664c..00000000 --- a/TPMCmd/tpm/include/prototypes/AC_Send_fp.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_AC_Send // Command must be enabled - -# ifndef _AC_Send_FP_H_ -# define _AC_Send_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT sendObject; - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_AC ac; - TPM2B_MAX_BUFFER acDataIn; -} AC_Send_In; - -// Output structure definition -typedef struct -{ - TPMS_AC_OUTPUT acDataOut; -} AC_Send_Out; - -// Response code modifiers -# define RC_AC_Send_sendObject (TPM_RC_H + TPM_RC_1) -# define RC_AC_Send_authHandle (TPM_RC_H + TPM_RC_2) -# define RC_AC_Send_ac (TPM_RC_H + TPM_RC_3) -# define RC_AC_Send_acDataIn (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_AC_Send(AC_Send_In* in, AC_Send_Out* out); - -# endif // _AC_Send_FP_H_ -#endif // CC_AC_Send diff --git a/TPMCmd/tpm/include/prototypes/AC_spt_fp.h b/TPMCmd/tpm/include/prototypes/AC_spt_fp.h deleted file mode 100644 index 25573493..00000000 --- a/TPMCmd/tpm/include/prototypes/AC_spt_fp.h +++ /dev/null @@ -1,74 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 4, 2020 Time: 02:36:44PM - */ - -#ifndef _AC_SPT_FP_H_ -#define _AC_SPT_FP_H_ - -//*** AcToCapabilities() -// This function returns a pointer to a list of AC capabilities. -TPML_AC_CAPABILITIES* AcToCapabilities(TPMI_RH_AC component // IN: component -); - -//*** AcIsAccessible() -// Function to determine if an AC handle references an actual AC -// Return Type: BOOL -BOOL AcIsAccessible(TPM_HANDLE acHandle); - -//*** AcCapabilitiesGet() -// This function returns a list of capabilities associated with an AC -// Return Type: TPMI_YES_NO -// YES if there are more handles available -// NO all the available handles has been returned -TPMI_YES_NO -AcCapabilitiesGet(TPMI_RH_AC component, // IN: the component - TPM_AT type, // IN: start capability type - UINT32 count, // IN: requested number - TPML_AC_CAPABILITIES* capabilityList // OUT: list of handle -); - -//*** AcSendObject() -// Stub to handle sending of an AC object -// Return Type: TPM_RC -TPM_RC -AcSendObject(TPM_HANDLE acHandle, // IN: Handle of AC receiving object - OBJECT* object, // IN: object structure to send - TPMS_AC_OUTPUT* acDataOut // OUT: results of operation -); - -#endif // _AC_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/ActivateCredential_fp.h b/TPMCmd/tpm/include/prototypes/ActivateCredential_fp.h deleted file mode 100644 index 5d942e56..00000000 --- a/TPMCmd/tpm/include/prototypes/ActivateCredential_fp.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ActivateCredential // Command must be enabled - -# ifndef _Activate_Credential_FP_H_ -# define _Activate_Credential_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT activateHandle; - TPMI_DH_OBJECT keyHandle; - TPM2B_ID_OBJECT credentialBlob; - TPM2B_ENCRYPTED_SECRET secret; -} ActivateCredential_In; - -// Output structure definition -typedef struct -{ - TPM2B_DIGEST certInfo; -} ActivateCredential_Out; - -// Response code modifiers -# define RC_ActivateCredential_activateHandle (TPM_RC_H + TPM_RC_1) -# define RC_ActivateCredential_keyHandle (TPM_RC_H + TPM_RC_2) -# define RC_ActivateCredential_credentialBlob (TPM_RC_P + TPM_RC_1) -# define RC_ActivateCredential_secret (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_ActivateCredential(ActivateCredential_In* in, ActivateCredential_Out* out); - -# endif // _Activate_Credential_FP_H_ -#endif // CC_ActivateCredential diff --git a/TPMCmd/tpm/include/prototypes/AlgorithmCap_fp.h b/TPMCmd/tpm/include/prototypes/AlgorithmCap_fp.h deleted file mode 100644 index 9290c9f8..00000000 --- a/TPMCmd/tpm/include/prototypes/AlgorithmCap_fp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _ALGORITHM_CAP_FP_H_ -#define _ALGORITHM_CAP_FP_H_ - -//** AlgorithmCapGetImplemented() -// This function is used by TPM2_GetCapability() to return a list of the -// implemented algorithms. -// -// Return Type: TPMI_YES_NO -// YES more algorithms to report -// NO no more algorithms to report -TPMI_YES_NO -AlgorithmCapGetImplemented(TPM_ALG_ID algID, // IN: the starting algorithm ID - UINT32 count, // IN: count of returned algorithms - TPML_ALG_PROPERTY* algList // OUT: algorithm list -); - -//** AlgorithmGetImplementedVector() -// This function returns the bit vector of the implemented algorithms. -LIB_EXPORT -void AlgorithmGetImplementedVector( - ALGORITHM_VECTOR* implemented // OUT: the implemented bits are SET -); - -#endif // _ALGORITHM_CAP_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/AlgorithmTests_fp.h b/TPMCmd/tpm/include/prototypes/AlgorithmTests_fp.h deleted file mode 100644 index 98d080b7..00000000 --- a/TPMCmd/tpm/include/prototypes/AlgorithmTests_fp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 4, 2020 Time: 02:36:44PM - */ - -#ifndef _ALGORITHM_TESTS_FP_H_ -#define _ALGORITHM_TESTS_FP_H_ - -#if SELF_TEST - -//*** TestAlgorithm() -// Dispatches to the correct test function for the algorithm or gets a list of -// testable algorithms. -// -// If 'toTest' is not NULL, then the test decisions are based on the algorithm -// selections in 'toTest'. Otherwise, 'g_toTest' is used. When bits are clear in -// 'g_toTest' they will also be cleared 'toTest'. -// -// If there doesn't happen to be a test for the algorithm, its associated bit is -// quietly cleared. -// -// If 'alg' is zero (TPM_ALG_ERROR), then the toTest vector is cleared of any bits -// for which there is no test (i.e. no tests are actually run but the vector is -// cleared). -// -// Note: 'toTest' will only ever have bits set for implemented algorithms but 'alg' -// can be anything. -// Return Type: TPM_RC -// TPM_RC_CANCELED test was canceled -LIB_EXPORT -TPM_RC -TestAlgorithm(TPM_ALG_ID alg, ALGORITHM_VECTOR* toTest); -#endif // SELF_TESTS - -#endif // _ALGORITHM_TESTS_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Attest_spt_fp.h b/TPMCmd/tpm/include/prototypes/Attest_spt_fp.h deleted file mode 100644 index 81da0cee..00000000 --- a/TPMCmd/tpm/include/prototypes/Attest_spt_fp.h +++ /dev/null @@ -1,84 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:18PM - */ - -#ifndef _ATTEST_SPT_FP_H_ -#define _ATTEST_SPT_FP_H_ - -//***FillInAttestInfo() -// Fill in common fields of TPMS_ATTEST structure. -void FillInAttestInfo( - TPMI_DH_OBJECT signHandle, // IN: handle of signing object - TPMT_SIG_SCHEME* scheme, // IN/OUT: scheme to be used for signing - TPM2B_DATA* data, // IN: qualifying data - TPMS_ATTEST* attest // OUT: attest structure -); - -//***SignAttestInfo() -// Sign a TPMS_ATTEST structure. If signHandle is TPM_RH_NULL, a null signature -// is returned. -// -// Return Type: TPM_RC -// TPM_RC_ATTRIBUTES 'signHandle' references not a signing key -// TPM_RC_SCHEME 'scheme' is not compatible with 'signHandle' type -// TPM_RC_VALUE digest generated for the given 'scheme' is greater than -// the modulus of 'signHandle' (for an RSA key); -// invalid commit status or failed to generate "r" value -// (for an ECC key) -TPM_RC -SignAttestInfo(OBJECT* signKey, // IN: sign object - TPMT_SIG_SCHEME* scheme, // IN: sign scheme - TPMS_ATTEST* certifyInfo, // IN: the data to be signed - TPM2B_DATA* qualifyingData, // IN: extra data for the signing - // process - TPM2B_ATTEST* attest, // OUT: marshaled attest blob to be - // signed - TPMT_SIGNATURE* signature // OUT: signature -); - -//*** IsSigningObject() -// Checks to see if the object is OK for signing. This is here rather than in -// Object_spt.c because all the attestation commands use this file but not -// Object_spt.c. -// Return Type: BOOL -// TRUE(1) object may sign -// FALSE(0) object may not sign -BOOL IsSigningObject(OBJECT* object // IN: -); - -#endif // _ATTEST_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Bits_fp.h b/TPMCmd/tpm/include/prototypes/Bits_fp.h deleted file mode 100644 index 52a21f07..00000000 --- a/TPMCmd/tpm/include/prototypes/Bits_fp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _BITS_FP_H_ -#define _BITS_FP_H_ - -//*** TestBit() -// This function is used to check the setting of a bit in an array of bits. -// Return Type: BOOL -// TRUE(1) bit is set -// FALSE(0) bit is not set -BOOL TestBit(unsigned int bitNum, // IN: number of the bit in 'bArray' - BYTE* bArray, // IN: array containing the bits - unsigned int bytesInArray // IN: size in bytes of 'bArray' -); - -//*** SetBit() -// This function will set the indicated bit in 'bArray'. -void SetBit(unsigned int bitNum, // IN: number of the bit in 'bArray' - BYTE* bArray, // IN: array containing the bits - unsigned int bytesInArray // IN: size in bytes of 'bArray' -); - -//*** ClearBit() -// This function will clear the indicated bit in 'bArray'. -void ClearBit(unsigned int bitNum, // IN: number of the bit in 'bArray'. - BYTE* bArray, // IN: array containing the bits - unsigned int bytesInArray // IN: size in bytes of 'bArray' -); - -#endif // _BITS_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/BnConvert_fp.h b/TPMCmd/tpm/include/prototypes/BnConvert_fp.h deleted file mode 100644 index 346e6a7f..00000000 --- a/TPMCmd/tpm/include/prototypes/BnConvert_fp.h +++ /dev/null @@ -1,114 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:18PM - */ - -#ifndef _BN_CONVERT_FP_H_ -#define _BN_CONVERT_FP_H_ - -//*** BnFromBytes() -// This function will convert a big-endian byte array to the internal number -// format. If bn is NULL, then the output is NULL. If bytes is null or the -// required size is 0, then the output is set to zero -LIB_EXPORT bigNum BnFromBytes(bigNum bn, const BYTE* bytes, NUMBYTES nBytes); - -//*** BnFrom2B() -// Convert an TPM2B to a BIG_NUM. -// If the input value does not exist, or the output does not exist, or the input -// will not fit into the output the function returns NULL -LIB_EXPORT bigNum BnFrom2B(bigNum bn, // OUT: - const TPM2B* a2B // IN: number to convert -); - -//*** BnFromHex() -// Convert a hex string into a bigNum. This is primarily used in debugging. -LIB_EXPORT bigNum BnFromHex(bigNum bn, // OUT: - const char* hex // IN: -); - -//*** BnToBytes() -// This function converts a BIG_NUM to a byte array. It converts the bigNum to a -// big-endian byte string and sets 'size' to the normalized value. If 'size' is an -// input 0, then the receiving buffer is guaranteed to be large enough for the result -// and the size will be set to the size required for bigNum (leading zeros -// suppressed). -// -// The conversion for a little-endian machine simply requires that all significant -// bytes of the bigNum be reversed. For a big-endian machine, rather than -// unpack each word individually, the bigNum is converted to little-endian words, -// copied, and then converted back to big-endian. -LIB_EXPORT BOOL BnToBytes(bigConst bn, - BYTE* buffer, - NUMBYTES* size // This the number of bytes that are - // available in the buffer. The result - // should be this big. -); - -//*** BnTo2B() -// Function to convert a BIG_NUM to TPM2B. -// The TPM2B size is set to the requested 'size' which may require padding. -// If 'size' is non-zero and less than required by the value in 'bn' then an error -// is returned. If 'size' is zero, then the TPM2B is assumed to be large enough -// for the data and a2b->size will be adjusted accordingly. -LIB_EXPORT BOOL BnTo2B(bigConst bn, // IN: - TPM2B* a2B, // OUT: - NUMBYTES size // IN: the desired size -); -#if ALG_ECC - -//*** BnPointFrom2B() -// Function to create a BIG_POINT structure from a 2B point. -// A point is going to be two ECC values in the same buffer. The values are going -// to be the size of the modulus. They are in modular form. -LIB_EXPORT bn_point_t* BnPointFrom2B( - bigPoint ecP, // OUT: the preallocated point structure - TPMS_ECC_POINT* p // IN: the number to convert -); - -//*** BnPointTo2B() -// This function converts a BIG_POINT into a TPMS_ECC_POINT. A TPMS_ECC_POINT -// contains two TPM2B_ECC_PARAMETER values. The maximum size of the parameters -// is dependent on the maximum EC key size used in an implementation. -// The presumption is that the TPMS_ECC_POINT is large enough to hold 2 TPM2B -// values, each as large as a MAX_ECC_PARAMETER_BYTES -LIB_EXPORT BOOL BnPointTo2B(TPMS_ECC_POINT* p, // OUT: the converted 2B structure - bigPoint ecP, // IN: the values to be converted - bigCurve E // IN: curve descriptor for the point -); -#endif // ALG_ECC - -#endif // _BN_CONVERT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/BnMath_fp.h b/TPMCmd/tpm/include/prototypes/BnMath_fp.h deleted file mode 100644 index c7d280a7..00000000 --- a/TPMCmd/tpm/include/prototypes/BnMath_fp.h +++ /dev/null @@ -1,173 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Aug 30, 2019 Time: 02:11:54PM - */ - -#ifndef _BN_MATH_FP_H_ -#define _BN_MATH_FP_H_ - -//*** BnAdd() -// This function adds two bigNum values. This function always returns TRUE. -LIB_EXPORT BOOL BnAdd(bigNum result, bigConst op1, bigConst op2); - -//*** BnAddWord() -// This function adds a word value to a bigNum. This function always returns TRUE. -LIB_EXPORT BOOL BnAddWord(bigNum result, bigConst op, crypt_uword_t word); - -//*** BnSub() -// This function does subtraction of two bigNum values and returns result = op1 - op2 -// when op1 is greater than op2. If op2 is greater than op1, then a fault is -// generated. This function always returns TRUE. -LIB_EXPORT BOOL BnSub(bigNum result, bigConst op1, bigConst op2); - -//*** BnSubWord() -// This function subtracts a word value from a bigNum. This function always -// returns TRUE. -LIB_EXPORT BOOL BnSubWord(bigNum result, bigConst op, crypt_uword_t word); - -//*** BnUnsignedCmp() -// This function performs a comparison of op1 to op2. The compare is approximately -// constant time if the size of the values used in the compare is consistent -// across calls (from the same line in the calling code). -// Return Type: int -// < 0 op1 is less than op2 -// 0 op1 is equal to op2 -// > 0 op1 is greater than op2 -LIB_EXPORT int BnUnsignedCmp(bigConst op1, bigConst op2); - -//*** BnUnsignedCmpWord() -// Compare a bigNum to a crypt_uword_t. -// Return Type: int -// -1 op1 is less that word -// 0 op1 is equal to word -// 1 op1 is greater than word -LIB_EXPORT int BnUnsignedCmpWord(bigConst op1, crypt_uword_t word); - -//*** BnModWord() -// This function does modular division of a big number when the modulus is a -// word value. -LIB_EXPORT crypt_word_t BnModWord(bigConst numerator, crypt_word_t modulus); - -//*** Msb() -// This function returns the bit number of the most significant bit of a -// crypt_uword_t. The number for the least significant bit of any bigNum value is 0. -// The maximum return value is RADIX_BITS - 1, -// Return Type: int -// -1 the word was zero -// n the bit number of the most significant bit in the word -LIB_EXPORT int Msb(crypt_uword_t word); - -//*** BnMsb() -// This function returns the number of the MSb of a bigNum value. -// Return Type: int -// -1 the word was zero or 'bn' was NULL -// n the bit number of the most significant bit in the word -LIB_EXPORT int BnMsb(bigConst bn); - -//*** BnSizeInBits() -// This function returns the number of bits required to hold a number. It is one -// greater than the Msb. -// -LIB_EXPORT unsigned BnSizeInBits(bigConst n); - -//*** BnSetWord() -// Change the value of a bignum_t to a word value. -LIB_EXPORT bigNum BnSetWord(bigNum n, crypt_uword_t w); - -//*** BnSetBit() -// This function will SET a bit in a bigNum. Bit 0 is the least-significant bit in -// the 0th digit_t. The function always return TRUE -LIB_EXPORT BOOL BnSetBit(bigNum bn, // IN/OUT: big number to modify - unsigned int bitNum // IN: Bit number to SET -); - -//*** BnTestBit() -// This function is used to check to see if a bit is SET in a bignum_t. The 0th bit -// is the LSb of d[0]. -// Return Type: BOOL -// TRUE(1) the bit is set -// FALSE(0) the bit is not set or the number is out of range -LIB_EXPORT BOOL BnTestBit(bigNum bn, // IN: number to check - unsigned int bitNum // IN: bit to test -); - -//***BnMaskBits() -// This function is used to mask off high order bits of a big number. -// The returned value will have no more than 'maskBit' bits -// set. -// Note: There is a requirement that unused words of a bignum_t are set to zero. -// Return Type: BOOL -// TRUE(1) result masked -// FALSE(0) the input was not as large as the mask -LIB_EXPORT BOOL BnMaskBits(bigNum bn, // IN/OUT: number to mask - crypt_uword_t maskBit // IN: the bit number for the mask. -); - -//*** BnShiftRight() -// This function will shift a bigNum to the right by the shiftAmount. -// This function always returns TRUE. -LIB_EXPORT BOOL BnShiftRight(bigNum result, bigConst toShift, uint32_t shiftAmount); - -//*** BnGetRandomBits() -// This function gets random bits for use in various places. To make sure that the -// number is generated in a portable format, it is created as a TPM2B and then -// converted to the internal format. -// -// One consequence of the generation scheme is that, if the number of bits requested -// is not a multiple of 8, then the high-order bits are set to zero. This would come -// into play when generating a 521-bit ECC key. A 66-byte (528-bit) value is -// generated an the high order 7 bits are masked off (CLEAR). -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure -LIB_EXPORT BOOL BnGetRandomBits(bigNum n, size_t bits, RAND_STATE* rand); - -//*** BnGenerateRandomInRange() -// This function is used to generate a random number r in the range 1 <= r < limit. -// The function gets a random number of bits that is the size of limit. There is some -// some probability that the returned number is going to be greater than or equal -// to the limit. If it is, try again. There is no more than 50% chance that the -// next number is also greater, so try again. We keep trying until we get a -// value that meets the criteria. Since limit is very often a number with a LOT of -// high order ones, this rarely would need a second try. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure ('limit' is too small) -LIB_EXPORT BOOL BnGenerateRandomInRange( - bigNum dest, bigConst limit, RAND_STATE* rand); - -#endif // _BN_MATH_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/BnMemory_fp.h b/TPMCmd/tpm/include/prototypes/BnMemory_fp.h deleted file mode 100644 index 90e91679..00000000 --- a/TPMCmd/tpm/include/prototypes/BnMemory_fp.h +++ /dev/null @@ -1,90 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:18PM - */ - -#ifndef _BN_MEMORY_FP_H_ -#define _BN_MEMORY_FP_H_ - -//*** BnSetTop() -// This function is used when the size of a bignum_t is changed. It -// makes sure that the unused words are set to zero and that any significant -// words of zeros are eliminated from the used size indicator. -LIB_EXPORT bigNum BnSetTop(bigNum bn, // IN/OUT: number to clean - crypt_uword_t top // IN: the new top -); - -//*** BnClearTop() -// This function will make sure that all unused words are zero. -LIB_EXPORT bigNum BnClearTop(bigNum bn); - -//*** BnInitializeWord() -// This function is used to initialize an allocated bigNum with a word value. The -// bigNum does not have to be allocated with a single word. -LIB_EXPORT bigNum BnInitializeWord(bigNum bn, // IN: - crypt_uword_t allocated, // IN: - crypt_uword_t word // IN: -); - -//*** BnInit() -// This function initializes a stack allocated bignum_t. It initializes -// 'allocated' and 'size' and zeros the words of 'd'. -LIB_EXPORT bigNum BnInit(bigNum bn, crypt_uword_t allocated); - -//*** BnCopy() -// Function to copy a bignum_t. If the output is NULL, then -// nothing happens. If the input is NULL, the output is set -// to zero. -LIB_EXPORT BOOL BnCopy(bigNum out, bigConst in); -#if ALG_ECC - -//*** BnPointCopy() -// Function to copy a bn point. -LIB_EXPORT BOOL BnPointCopy(bigPoint pOut, pointConst pIn); - -//*** BnInitializePoint() -// This function is used to initialize a point structure with the addresses -// of the coordinates. -LIB_EXPORT bn_point_t* BnInitializePoint( - bigPoint p, // OUT: structure to receive pointers - bigNum x, // IN: x coordinate - bigNum y, // IN: y coordinate - bigNum z // IN: x coordinate -); -#endif // ALG_ECC - -#endif // _BN_MEMORY_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CertifyCreation_fp.h b/TPMCmd/tpm/include/prototypes/CertifyCreation_fp.h deleted file mode 100644 index b460f3ba..00000000 --- a/TPMCmd/tpm/include/prototypes/CertifyCreation_fp.h +++ /dev/null @@ -1,76 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_CertifyCreation // Command must be enabled - -# ifndef _Certify_Creation_FP_H_ -# define _Certify_Creation_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT signHandle; - TPMI_DH_OBJECT objectHandle; - TPM2B_DATA qualifyingData; - TPM2B_DIGEST creationHash; - TPMT_SIG_SCHEME inScheme; - TPMT_TK_CREATION creationTicket; -} CertifyCreation_In; - -// Output structure definition -typedef struct -{ - TPM2B_ATTEST certifyInfo; - TPMT_SIGNATURE signature; -} CertifyCreation_Out; - -// Response code modifiers -# define RC_CertifyCreation_signHandle (TPM_RC_H + TPM_RC_1) -# define RC_CertifyCreation_objectHandle (TPM_RC_H + TPM_RC_2) -# define RC_CertifyCreation_qualifyingData (TPM_RC_P + TPM_RC_1) -# define RC_CertifyCreation_creationHash (TPM_RC_P + TPM_RC_2) -# define RC_CertifyCreation_inScheme (TPM_RC_P + TPM_RC_3) -# define RC_CertifyCreation_creationTicket (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_CertifyCreation(CertifyCreation_In* in, CertifyCreation_Out* out); - -# endif // _Certify_Creation_FP_H_ -#endif // CC_CertifyCreation diff --git a/TPMCmd/tpm/include/prototypes/CertifyX509_fp.h b/TPMCmd/tpm/include/prototypes/CertifyX509_fp.h deleted file mode 100644 index 062ae5ee..00000000 --- a/TPMCmd/tpm/include/prototypes/CertifyX509_fp.h +++ /dev/null @@ -1,75 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Sep 5, 2019 Time: 06:45:31PM - */ - -#if CC_CertifyX509 // Command must be enabled - -# ifndef _CERTIFYX509_FP_H_ -# define _CERTIFYX509_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT objectHandle; - TPMI_DH_OBJECT signHandle; - TPM2B_DATA reserved; - TPMT_SIG_SCHEME inScheme; - TPM2B_MAX_BUFFER partialCertificate; -} CertifyX509_In; - -// Output structure definition -typedef struct -{ - TPM2B_MAX_BUFFER addedToCertificate; - TPM2B_DIGEST tbsDigest; - TPMT_SIGNATURE signature; -} CertifyX509_Out; - -// Response code modifiers -# define RC_CertifyX509_objectHandle (TPM_RC_H + TPM_RC_1) -# define RC_CertifyX509_signHandle (TPM_RC_H + TPM_RC_2) -# define RC_CertifyX509_reserved (TPM_RC_P + TPM_RC_1) -# define RC_CertifyX509_inScheme (TPM_RC_P + TPM_RC_2) -# define RC_CertifyX509_partialCertificate (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_CertifyX509(CertifyX509_In* in, CertifyX509_Out* out); - -# endif // _CERTIFYX509_FP_H_ -#endif // CC_CertifyX509 diff --git a/TPMCmd/tpm/include/prototypes/Certify_fp.h b/TPMCmd/tpm/include/prototypes/Certify_fp.h deleted file mode 100644 index b6234d43..00000000 --- a/TPMCmd/tpm/include/prototypes/Certify_fp.h +++ /dev/null @@ -1,72 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Certify // Command must be enabled - -# ifndef _Certify_FP_H_ -# define _Certify_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT objectHandle; - TPMI_DH_OBJECT signHandle; - TPM2B_DATA qualifyingData; - TPMT_SIG_SCHEME inScheme; -} Certify_In; - -// Output structure definition -typedef struct -{ - TPM2B_ATTEST certifyInfo; - TPMT_SIGNATURE signature; -} Certify_Out; - -// Response code modifiers -# define RC_Certify_objectHandle (TPM_RC_H + TPM_RC_1) -# define RC_Certify_signHandle (TPM_RC_H + TPM_RC_2) -# define RC_Certify_qualifyingData (TPM_RC_P + TPM_RC_1) -# define RC_Certify_inScheme (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_Certify(Certify_In* in, Certify_Out* out); - -# endif // _Certify_FP_H_ -#endif // CC_Certify diff --git a/TPMCmd/tpm/include/prototypes/ChangeEPS_fp.h b/TPMCmd/tpm/include/prototypes/ChangeEPS_fp.h deleted file mode 100644 index 320ca835..00000000 --- a/TPMCmd/tpm/include/prototypes/ChangeEPS_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ChangeEPS // Command must be enabled - -# ifndef _Change_EPS_FP_H_ -# define _Change_EPS_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PLATFORM authHandle; -} ChangeEPS_In; - -// Response code modifiers -# define RC_ChangeEPS_authHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ChangeEPS(ChangeEPS_In* in); - -# endif // _Change_EPS_FP_H_ -#endif // CC_ChangeEPS diff --git a/TPMCmd/tpm/include/prototypes/ChangePPS_fp.h b/TPMCmd/tpm/include/prototypes/ChangePPS_fp.h deleted file mode 100644 index 7ed0e5bf..00000000 --- a/TPMCmd/tpm/include/prototypes/ChangePPS_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ChangePPS // Command must be enabled - -# ifndef _Change_PPS_FP_H_ -# define _Change_PPS_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PLATFORM authHandle; -} ChangePPS_In; - -// Response code modifiers -# define RC_ChangePPS_authHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ChangePPS(ChangePPS_In* in); - -# endif // _Change_PPS_FP_H_ -#endif // CC_ChangePPS diff --git a/TPMCmd/tpm/include/prototypes/ClearControl_fp.h b/TPMCmd/tpm/include/prototypes/ClearControl_fp.h deleted file mode 100644 index 978d4bdb..00000000 --- a/TPMCmd/tpm/include/prototypes/ClearControl_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ClearControl // Command must be enabled - -# ifndef _Clear_Control_FP_H_ -# define _Clear_Control_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_CLEAR auth; - TPMI_YES_NO disable; -} ClearControl_In; - -// Response code modifiers -# define RC_ClearControl_auth (TPM_RC_H + TPM_RC_1) -# define RC_ClearControl_disable (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ClearControl(ClearControl_In* in); - -# endif // _Clear_Control_FP_H_ -#endif // CC_ClearControl diff --git a/TPMCmd/tpm/include/prototypes/Clear_fp.h b/TPMCmd/tpm/include/prototypes/Clear_fp.h deleted file mode 100644 index 610546c6..00000000 --- a/TPMCmd/tpm/include/prototypes/Clear_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Clear // Command must be enabled - -# ifndef _Clear_FP_H_ -# define _Clear_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_CLEAR authHandle; -} Clear_In; - -// Response code modifiers -# define RC_Clear_authHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_Clear(Clear_In* in); - -# endif // _Clear_FP_H_ -#endif // CC_Clear diff --git a/TPMCmd/tpm/include/prototypes/ClockRateAdjust_fp.h b/TPMCmd/tpm/include/prototypes/ClockRateAdjust_fp.h deleted file mode 100644 index cd7bc868..00000000 --- a/TPMCmd/tpm/include/prototypes/ClockRateAdjust_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ClockRateAdjust // Command must be enabled - -# ifndef _Clock_Rate_Adjust_FP_H_ -# define _Clock_Rate_Adjust_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PROVISION auth; - TPM_CLOCK_ADJUST rateAdjust; -} ClockRateAdjust_In; - -// Response code modifiers -# define RC_ClockRateAdjust_auth (TPM_RC_H + TPM_RC_1) -# define RC_ClockRateAdjust_rateAdjust (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ClockRateAdjust(ClockRateAdjust_In* in); - -# endif // _Clock_Rate_Adjust_FP_H_ -#endif // CC_ClockRateAdjust diff --git a/TPMCmd/tpm/include/prototypes/ClockSet_fp.h b/TPMCmd/tpm/include/prototypes/ClockSet_fp.h deleted file mode 100644 index 6b5b1d2f..00000000 --- a/TPMCmd/tpm/include/prototypes/ClockSet_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ClockSet // Command must be enabled - -# ifndef _Clock_Set_FP_H_ -# define _Clock_Set_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PROVISION auth; - UINT64 newTime; -} ClockSet_In; - -// Response code modifiers -# define RC_ClockSet_auth (TPM_RC_H + TPM_RC_1) -# define RC_ClockSet_newTime (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ClockSet(ClockSet_In* in); - -# endif // _Clock_Set_FP_H_ -#endif // CC_ClockSet diff --git a/TPMCmd/tpm/include/prototypes/CommandAudit_fp.h b/TPMCmd/tpm/include/prototypes/CommandAudit_fp.h deleted file mode 100644 index 00dc358a..00000000 --- a/TPMCmd/tpm/include/prototypes/CommandAudit_fp.h +++ /dev/null @@ -1,117 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 04:23:27PM - */ - -#ifndef _COMMAND_AUDIT_FP_H_ -#define _COMMAND_AUDIT_FP_H_ - -//*** CommandAuditPreInstall_Init() -// This function initializes the command audit list. This function simulates -// the behavior of manufacturing. A function is used instead of a structure -// definition because this is easier than figuring out the initialization value -// for a bit array. -// -// This function would not be implemented outside of a manufacturing or -// simulation environment. -void CommandAuditPreInstall_Init(void); - -//*** CommandAuditStartup() -// This function clears the command audit digest on a TPM Reset. -BOOL CommandAuditStartup(STARTUP_TYPE type // IN: start up type -); - -//*** CommandAuditSet() -// This function will SET the audit flag for a command. This function -// will not SET the audit flag for a command that is not implemented. This -// ensures that the audit status is not SET when TPM2_GetCapability() is -// used to read the list of audited commands. -// -// This function is only used by TPM2_SetCommandCodeAuditStatus(). -// -// The actions in TPM2_SetCommandCodeAuditStatus() are expected to cause the -// changes to be saved to NV after it is setting and clearing bits. -// Return Type: BOOL -// TRUE(1) command code audit status was changed -// FALSE(0) command code audit status was not changed -BOOL CommandAuditSet(TPM_CC commandCode // IN: command code -); - -//*** CommandAuditClear() -// This function will CLEAR the audit flag for a command. It will not CLEAR the -// audit flag for TPM_CC_SetCommandCodeAuditStatus(). -// -// This function is only used by TPM2_SetCommandCodeAuditStatus(). -// -// The actions in TPM2_SetCommandCodeAuditStatus() are expected to cause the -// changes to be saved to NV after it is setting and clearing bits. -// Return Type: BOOL -// TRUE(1) command code audit status was changed -// FALSE(0) command code audit status was not changed -BOOL CommandAuditClear(TPM_CC commandCode // IN: command code -); - -//*** CommandAuditIsRequired() -// This function indicates if the audit flag is SET for a command. -// Return Type: BOOL -// TRUE(1) command is audited -// FALSE(0) command is not audited -BOOL CommandAuditIsRequired(COMMAND_INDEX commandIndex // IN: command index -); - -//*** CommandAuditCapGetCCList() -// This function returns a list of commands that have their audit bit SET. -// -// The list starts at the input commandCode. -// Return Type: TPMI_YES_NO -// YES if there are more command code available -// NO all the available command code has been returned -TPMI_YES_NO -CommandAuditCapGetCCList(TPM_CC commandCode, // IN: start command code - UINT32 count, // IN: count of returned TPM_CC - TPML_CC* commandList // OUT: list of TPM_CC -); - -//*** CommandAuditGetDigest -// This command is used to create a digest of the commands being audited. The -// commands are processed in ascending numeric order with a list of TPM_CC being -// added to a hash. This operates as if all the audited command codes were -// concatenated and then hashed. -void CommandAuditGetDigest(TPM2B_DIGEST* digest // OUT: command digest -); - -#endif // _COMMAND_AUDIT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CommandCodeAttributes_fp.h b/TPMCmd/tpm/include/prototypes/CommandCodeAttributes_fp.h deleted file mode 100644 index 8b1a1095..00000000 --- a/TPMCmd/tpm/include/prototypes/CommandCodeAttributes_fp.h +++ /dev/null @@ -1,161 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _COMMAND_CODE_ATTRIBUTES_FP_H_ -#define _COMMAND_CODE_ATTRIBUTES_FP_H_ - -//*** GetClosestCommandIndex() -// This function returns the command index for the command with a value that is -// equal to or greater than the input value -// Return Type: COMMAND_INDEX -// UNIMPLEMENTED_COMMAND_INDEX command is not implemented -// other index of a command -COMMAND_INDEX -GetClosestCommandIndex(TPM_CC commandCode // IN: the command code to start at -); - -//*** CommandCodeToComandIndex() -// This function returns the index in the various attributes arrays of the -// command. -// Return Type: COMMAND_INDEX -// UNIMPLEMENTED_COMMAND_INDEX command is not implemented -// other index of the command -COMMAND_INDEX -CommandCodeToCommandIndex(TPM_CC commandCode // IN: the command code to look up -); - -//*** GetNextCommandIndex() -// This function returns the index of the next implemented command. -// Return Type: COMMAND_INDEX -// UNIMPLEMENTED_COMMAND_INDEX no more implemented commands -// other the index of the next implemented command -COMMAND_INDEX -GetNextCommandIndex(COMMAND_INDEX commandIndex // IN: the starting index -); - -//*** GetCommandCode() -// This function returns the commandCode associated with the command index -TPM_CC -GetCommandCode(COMMAND_INDEX commandIndex // IN: the command index -); - -//*** CommandAuthRole() -// -// This function returns the authorization role required of a handle. -// -// Return Type: AUTH_ROLE -// AUTH_NONE no authorization is required -// AUTH_USER user role authorization is required -// AUTH_ADMIN admin role authorization is required -// AUTH_DUP duplication role authorization is required -AUTH_ROLE -CommandAuthRole(COMMAND_INDEX commandIndex, // IN: command index - UINT32 handleIndex // IN: handle index (zero based) -); - -//*** EncryptSize() -// This function returns the size of the decrypt size field. This function returns -// 0 if encryption is not allowed -// Return Type: int -// 0 encryption not allowed -// 2 size field is two bytes -// 4 size field is four bytes -int EncryptSize(COMMAND_INDEX commandIndex // IN: command index -); - -//*** DecryptSize() -// This function returns the size of the decrypt size field. This function returns -// 0 if decryption is not allowed -// Return Type: int -// 0 encryption not allowed -// 2 size field is two bytes -// 4 size field is four bytes -int DecryptSize(COMMAND_INDEX commandIndex // IN: command index -); - -//*** IsSessionAllowed() -// -// This function indicates if the command is allowed to have sessions. -// -// This function must not be called if the command is not known to be implemented. -// -// Return Type: BOOL -// TRUE(1) session is allowed with this command -// FALSE(0) session is not allowed with this command -BOOL IsSessionAllowed(COMMAND_INDEX commandIndex // IN: the command to be checked -); - -//*** IsHandleInResponse() -// This function determines if a command has a handle in the response -BOOL IsHandleInResponse(COMMAND_INDEX commandIndex); - -//*** IsWriteOperation() -// Checks to see if an operation will write to an NV Index and is subject to being -// blocked by read-lock -BOOL IsWriteOperation(COMMAND_INDEX commandIndex // IN: Command to check -); - -//*** IsReadOperation() -// Checks to see if an operation will write to an NV Index and is -// subject to being blocked by write-lock. -BOOL IsReadOperation(COMMAND_INDEX commandIndex // IN: Command to check -); - -//*** CommandCapGetCCList() -// This function returns a list of implemented commands and command attributes -// starting from the command in 'commandCode'. -// Return Type: TPMI_YES_NO -// YES more command attributes are available -// NO no more command attributes are available -TPMI_YES_NO -CommandCapGetCCList(TPM_CC commandCode, // IN: start command code - UINT32 count, // IN: maximum count for number of entries in - // 'commandList' - TPML_CCA* commandList // OUT: list of TPMA_CC -); - -//*** IsVendorCommand() -// Function indicates if a command index references a vendor command. -// Return Type: BOOL -// TRUE(1) command is a vendor command -// FALSE(0) command is not a vendor command -BOOL IsVendorCommand(COMMAND_INDEX commandIndex // IN: command index to check -); - -#endif // _COMMAND_CODE_ATTRIBUTES_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CommandDispatcher_fp.h b/TPMCmd/tpm/include/prototypes/CommandDispatcher_fp.h deleted file mode 100644 index f906c4d1..00000000 --- a/TPMCmd/tpm/include/prototypes/CommandDispatcher_fp.h +++ /dev/null @@ -1,54 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 7, 2020 Time: 07:06:44PM - */ - -#ifndef _COMMAND_DISPATCHER_FP_H_ -#define _COMMAND_DISPATCHER_FP_H_ - -//** ParseHandleBuffer() -// This is the table-driven version of the handle buffer unmarshaling code -TPM_RC -ParseHandleBuffer(COMMAND* command); - -//** CommandDispatcher() -// Function to unmarshal the command parameters, call the selected action code, and -// marshal the response parameters. -TPM_RC -CommandDispatcher(COMMAND* command); - -#endif // _COMMAND_DISPATCHER_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Commit_fp.h b/TPMCmd/tpm/include/prototypes/Commit_fp.h deleted file mode 100644 index dca15738..00000000 --- a/TPMCmd/tpm/include/prototypes/Commit_fp.h +++ /dev/null @@ -1,74 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Commit // Command must be enabled - -# ifndef _Commit_FP_H_ -# define _Commit_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT signHandle; - TPM2B_ECC_POINT P1; - TPM2B_SENSITIVE_DATA s2; - TPM2B_ECC_PARAMETER y2; -} Commit_In; - -// Output structure definition -typedef struct -{ - TPM2B_ECC_POINT K; - TPM2B_ECC_POINT L; - TPM2B_ECC_POINT E; - UINT16 counter; -} Commit_Out; - -// Response code modifiers -# define RC_Commit_signHandle (TPM_RC_H + TPM_RC_1) -# define RC_Commit_P1 (TPM_RC_P + TPM_RC_1) -# define RC_Commit_s2 (TPM_RC_P + TPM_RC_2) -# define RC_Commit_y2 (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_Commit(Commit_In* in, Commit_Out* out); - -# endif // _Commit_FP_H_ -#endif // CC_Commit diff --git a/TPMCmd/tpm/include/prototypes/ContextLoad_fp.h b/TPMCmd/tpm/include/prototypes/ContextLoad_fp.h deleted file mode 100644 index 515174a0..00000000 --- a/TPMCmd/tpm/include/prototypes/ContextLoad_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ContextLoad // Command must be enabled - -# ifndef _Context_Load_FP_H_ -# define _Context_Load_FP_H_ - -// Input structure definition -typedef struct -{ - TPMS_CONTEXT context; -} ContextLoad_In; - -// Output structure definition -typedef struct -{ - TPMI_DH_CONTEXT loadedHandle; -} ContextLoad_Out; - -// Response code modifiers -# define RC_ContextLoad_context (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ContextLoad(ContextLoad_In* in, ContextLoad_Out* out); - -# endif // _Context_Load_FP_H_ -#endif // CC_ContextLoad diff --git a/TPMCmd/tpm/include/prototypes/ContextSave_fp.h b/TPMCmd/tpm/include/prototypes/ContextSave_fp.h deleted file mode 100644 index de3aa80a..00000000 --- a/TPMCmd/tpm/include/prototypes/ContextSave_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ContextSave // Command must be enabled - -# ifndef _Context_Save_FP_H_ -# define _Context_Save_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_CONTEXT saveHandle; -} ContextSave_In; - -// Output structure definition -typedef struct -{ - TPMS_CONTEXT context; -} ContextSave_Out; - -// Response code modifiers -# define RC_ContextSave_saveHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ContextSave(ContextSave_In* in, ContextSave_Out* out); - -# endif // _Context_Save_FP_H_ -#endif // CC_ContextSave diff --git a/TPMCmd/tpm/include/prototypes/Context_spt_fp.h b/TPMCmd/tpm/include/prototypes/Context_spt_fp.h deleted file mode 100644 index a5a94f44..00000000 --- a/TPMCmd/tpm/include/prototypes/Context_spt_fp.h +++ /dev/null @@ -1,90 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:18PM - */ - -#ifndef _CONTEXT_SPT_FP_H_ -#define _CONTEXT_SPT_FP_H_ - -//*** ComputeContextProtectionKey() -// This function retrieves the symmetric protection key for context encryption -// It is used by TPM2_ConextSave and TPM2_ContextLoad to create the symmetric -// encryption key and iv -// Return Type: void -void ComputeContextProtectionKey(TPMS_CONTEXT* contextBlob, // IN: context blob - TPM2B_SYM_KEY* symKey, // OUT: the symmetric key - TPM2B_IV* iv // OUT: the IV. -); - -//*** ComputeContextIntegrity() -// Generate the integrity hash for a context -// It is used by TPM2_ContextSave to create an integrity hash -// and by TPM2_ContextLoad to compare an integrity hash -// Return Type: void -void ComputeContextIntegrity(TPMS_CONTEXT* contextBlob, // IN: context blob - TPM2B_DIGEST* integrity // OUT: integrity -); - -//*** SequenceDataExport() -// This function is used scan through the sequence object and -// either modify the hash state data for export (contextSave) or to -// import it into the internal format (contextLoad). -// This function should only be called after the sequence object has been copied -// to the context buffer (contextSave) or from the context buffer into the sequence -// object. The presumption is that the context buffer version of the data is the -// same size as the internal representation so nothing outsize of the hash context -// area gets modified. -void SequenceDataExport( - HASH_OBJECT* object, // IN: an internal hash object - HASH_OBJECT_BUFFER* exportObject // OUT: a sequence context in a buffer -); - -//*** SequenceDataImport() -// This function is used scan through the sequence object and -// either modify the hash state data for export (contextSave) or to -// import it into the internal format (contextLoad). -// This function should only be called after the sequence object has been copied -// to the context buffer (contextSave) or from the context buffer into the sequence -// object. The presumption is that the context buffer version of the data is the -// same size as the internal representation so nothing outsize of the hash context -// area gets modified. -void SequenceDataImport( - HASH_OBJECT* object, // IN/OUT: an internal hash object - HASH_OBJECT_BUFFER* exportObject // IN/OUT: a sequence context in a buffer -); - -#endif // _CONTEXT_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CreateLoaded_fp.h b/TPMCmd/tpm/include/prototypes/CreateLoaded_fp.h deleted file mode 100644 index 0180183d..00000000 --- a/TPMCmd/tpm/include/prototypes/CreateLoaded_fp.h +++ /dev/null @@ -1,72 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_CreateLoaded // Command must be enabled - -# ifndef _Create_Loaded_FP_H_ -# define _Create_Loaded_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_PARENT parentHandle; - TPM2B_SENSITIVE_CREATE inSensitive; - TPM2B_TEMPLATE inPublic; -} CreateLoaded_In; - -// Output structure definition -typedef struct -{ - TPM_HANDLE objectHandle; - TPM2B_PRIVATE outPrivate; - TPM2B_PUBLIC outPublic; - TPM2B_NAME name; -} CreateLoaded_Out; - -// Response code modifiers -# define RC_CreateLoaded_parentHandle (TPM_RC_H + TPM_RC_1) -# define RC_CreateLoaded_inSensitive (TPM_RC_P + TPM_RC_1) -# define RC_CreateLoaded_inPublic (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_CreateLoaded(CreateLoaded_In* in, CreateLoaded_Out* out); - -# endif // _Create_Loaded_FP_H_ -#endif // CC_CreateLoaded diff --git a/TPMCmd/tpm/include/prototypes/CreatePrimary_fp.h b/TPMCmd/tpm/include/prototypes/CreatePrimary_fp.h deleted file mode 100644 index b058dbf9..00000000 --- a/TPMCmd/tpm/include/prototypes/CreatePrimary_fp.h +++ /dev/null @@ -1,78 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_CreatePrimary // Command must be enabled - -# ifndef _Create_Primary_FP_H_ -# define _Create_Primary_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_HIERARCHY primaryHandle; - TPM2B_SENSITIVE_CREATE inSensitive; - TPM2B_PUBLIC inPublic; - TPM2B_DATA outsideInfo; - TPML_PCR_SELECTION creationPCR; -} CreatePrimary_In; - -// Output structure definition -typedef struct -{ - TPM_HANDLE objectHandle; - TPM2B_PUBLIC outPublic; - TPM2B_CREATION_DATA creationData; - TPM2B_DIGEST creationHash; - TPMT_TK_CREATION creationTicket; - TPM2B_NAME name; -} CreatePrimary_Out; - -// Response code modifiers -# define RC_CreatePrimary_primaryHandle (TPM_RC_H + TPM_RC_1) -# define RC_CreatePrimary_inSensitive (TPM_RC_P + TPM_RC_1) -# define RC_CreatePrimary_inPublic (TPM_RC_P + TPM_RC_2) -# define RC_CreatePrimary_outsideInfo (TPM_RC_P + TPM_RC_3) -# define RC_CreatePrimary_creationPCR (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_CreatePrimary(CreatePrimary_In* in, CreatePrimary_Out* out); - -# endif // _Create_Primary_FP_H_ -#endif // CC_CreatePrimary diff --git a/TPMCmd/tpm/include/prototypes/Create_fp.h b/TPMCmd/tpm/include/prototypes/Create_fp.h deleted file mode 100644 index 50987a22..00000000 --- a/TPMCmd/tpm/include/prototypes/Create_fp.h +++ /dev/null @@ -1,77 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Create // Command must be enabled - -# ifndef _Create_FP_H_ -# define _Create_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT parentHandle; - TPM2B_SENSITIVE_CREATE inSensitive; - TPM2B_PUBLIC inPublic; - TPM2B_DATA outsideInfo; - TPML_PCR_SELECTION creationPCR; -} Create_In; - -// Output structure definition -typedef struct -{ - TPM2B_PRIVATE outPrivate; - TPM2B_PUBLIC outPublic; - TPM2B_CREATION_DATA creationData; - TPM2B_DIGEST creationHash; - TPMT_TK_CREATION creationTicket; -} Create_Out; - -// Response code modifiers -# define RC_Create_parentHandle (TPM_RC_H + TPM_RC_1) -# define RC_Create_inSensitive (TPM_RC_P + TPM_RC_1) -# define RC_Create_inPublic (TPM_RC_P + TPM_RC_2) -# define RC_Create_outsideInfo (TPM_RC_P + TPM_RC_3) -# define RC_Create_creationPCR (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_Create(Create_In* in, Create_Out* out); - -# endif // _Create_FP_H_ -#endif // CC_Create diff --git a/TPMCmd/tpm/include/prototypes/CryptCmac_fp.h b/TPMCmd/tpm/include/prototypes/CryptCmac_fp.h deleted file mode 100644 index 4c7d7264..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptCmac_fp.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:18PM - */ - -#ifndef _CRYPT_CMAC_FP_H_ -#define _CRYPT_CMAC_FP_H_ - -#if ALG_CMAC - -//*** CryptCmacStart() -// This is the function to start the CMAC sequence operation. It initializes the -// dispatch functions for the data and end operations for CMAC and initializes the -// parameters that are used for the processing of data, including the key, key size -// and block cipher algorithm. -UINT16 -CryptCmacStart( - SMAC_STATE* state, TPMU_PUBLIC_PARMS* keyParms, TPM_ALG_ID macAlg, TPM2B* key); - -//*** CryptCmacData() -// This function is used to add data to the CMAC sequence computation. The function -// will XOR new data into the IV. If the buffer is full, and there is additional -// input data, the data is encrypted into the IV buffer, the new data is then -// XOR into the IV. When the data runs out, the function returns without encrypting -// even if the buffer is full. The last data block of a sequence will not be -// encrypted until the call to CryptCmacEnd(). This is to allow the proper subkey -// to be computed and applied before the last block is encrypted. -void CryptCmacData(SMAC_STATES* state, UINT32 size, const BYTE* buffer); - -//*** CryptCmacEnd() -// This is the completion function for the CMAC. It does padding, if needed, and -// selects the subkey to be applied before the last block is encrypted. -UINT16 -CryptCmacEnd(SMAC_STATES* state, UINT32 outSize, BYTE* outBuffer); -#endif - -#endif // _CRYPT_CMAC_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptDes_fp.h b/TPMCmd/tpm/include/prototypes/CryptDes_fp.h deleted file mode 100644 index d797682f..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptDes_fp.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:18PM - */ - -#ifndef _CRYPT_DES_FP_H_ -#define _CRYPT_DES_FP_H_ - -#if ALG_TDES - -//*** CryptSetOddByteParity() -// This function sets the per byte parity of a 64-bit value. The least-significant -// bit is of each byte is replaced with the odd parity of the other 7 bits in the -// byte. With odd parity, no byte will ever be 0x00. -UINT64 -CryptSetOddByteParity(UINT64 k); - -//*** CryptDesValidateKey() -// Function to check to see if the input key is a valid DES key where the definition -// of valid is that none of the elements are on the list of weak, semi-weak, or -// possibly weak keys; and that for two keys, K1!=K2, and for three keys that -// K1!=K2 and K2!=K3. -BOOL CryptDesValidateKey(TPM2B_SYM_KEY* desKey // IN: key to validate -); - -//*** CryptGenerateKeyDes() -// This function is used to create a DES key of the appropriate size. The key will -// have odd parity in the bytes. -TPM_RC -CryptGenerateKeyDes(TPMT_PUBLIC* publicArea, // IN/OUT: The public area template - // for the new key. - TPMT_SENSITIVE* sensitive, // OUT: sensitive area - RAND_STATE* rand // IN: the "entropy" source for -); -#endif - -#endif // _CRYPT_DES_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptEccCrypt_fp.h b/TPMCmd/tpm/include/prototypes/CryptEccCrypt_fp.h deleted file mode 100644 index 75705983..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptEccCrypt_fp.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Feb 28, 2020 Time: 03:04:48PM - */ - -#ifndef _CRYPT_ECC_CRYPT_FP_H_ -#define _CRYPT_ECC_CRYPT_FP_H_ - -#if CC_ECC_Encrypt || CC_ECC_Encrypt - -//*** CryptEccSelectScheme() -// This function is used by TPM2_ECC_Decrypt and TPM2_ECC_Encrypt. It sets scheme -// either the input scheme or the key scheme. If they key scheme is not TPM_ALG_NULL -// then the input scheme must be TPM_ALG_NULL or the same as the key scheme. If -// not, then the function returns FALSE. -// Return Type: BOOL -// TRUE 'scheme' is set -// FALSE 'scheme' is not valid (it may have been changed). -BOOL CryptEccSelectScheme(OBJECT* key, //IN: key containing default scheme - TPMT_KDF_SCHEME* scheme // IN: a decrypt scheme -); - -//*** CryptEccEncrypt() -//This function performs ECC-based data obfuscation. The only scheme that is currently -// supported is MGF1 based. See Part 1, Annex D for details. -// Return Type: TPM_RC -// TPM_RC_CURVE unsupported curve -// TPM_RC_HASH hash not allowed -// TPM_RC_SCHEME 'scheme' is not supported -// TPM_RC_NO_RESULT internal error in big number processing -LIB_EXPORT TPM_RC CryptEccEncrypt( - OBJECT* key, // IN: public key of recipient - TPMT_KDF_SCHEME* scheme, // IN: scheme to use. - TPM2B_MAX_BUFFER* plainText, // IN: the text to obfuscate - TPMS_ECC_POINT* c1, // OUT: public ephemeral key - TPM2B_MAX_BUFFER* c2, // OUT: obfuscated text - TPM2B_DIGEST* c3 // OUT: digest of ephemeral key - // and plainText -); - -//*** CryptEccDecrypt() -// This function performs ECC decryption and integrity check of the input data. -// Return Type: TPM_RC -// TPM_RC_CURVE unsupported curve -// TPM_RC_HASH hash not allowed -// TPM_RC_SCHEME 'scheme' is not supported -// TPM_RC_NO_RESULT internal error in big number processing -// TPM_RC_VALUE C3 did not match hash of recovered data -LIB_EXPORT TPM_RC CryptEccDecrypt( - OBJECT* key, // IN: key used for data recovery - TPMT_KDF_SCHEME* scheme, // IN: scheme to use. - TPM2B_MAX_BUFFER* plainText, // OUT: the recovered text - TPMS_ECC_POINT* c1, // IN: public ephemeral key - TPM2B_MAX_BUFFER* c2, // IN: obfuscated text - TPM2B_DIGEST* c3 // IN: digest of ephemeral key - // and plainText -); -#endif // CC_ECC_Encrypt || CC_ECC_Encrypt - -#endif // _CRYPT_ECC_CRYPT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptEccKeyExchange_fp.h b/TPMCmd/tpm/include/prototypes/CryptEccKeyExchange_fp.h deleted file mode 100644 index 28d1f602..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptEccKeyExchange_fp.h +++ /dev/null @@ -1,86 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:18PM - */ - -#ifndef _CRYPT_ECC_KEY_EXCHANGE_FP_H_ -#define _CRYPT_ECC_KEY_EXCHANGE_FP_H_ - -#if CC_ZGen_2Phase == YES - -//*** CryptEcc2PhaseKeyExchange() -// This function is the dispatch routine for the EC key exchange functions that use -// two ephemeral and two static keys. -// Return Type: TPM_RC -// TPM_RC_SCHEME scheme is not defined -LIB_EXPORT TPM_RC CryptEcc2PhaseKeyExchange( - TPMS_ECC_POINT* outZ1, // OUT: a computed point - TPMS_ECC_POINT* outZ2, // OUT: and optional second point - TPM_ECC_CURVE curveId, // IN: the curve for the computations - TPM_ALG_ID scheme, // IN: the key exchange scheme - TPM2B_ECC_PARAMETER* dsA, // IN: static private TPM key - TPM2B_ECC_PARAMETER* deA, // IN: ephemeral private TPM key - TPMS_ECC_POINT* QsB, // IN: static public party B key - TPMS_ECC_POINT* QeB // IN: ephemeral public party B key -); -# if ALG_SM2 - -//*** SM2KeyExchange() -// This function performs the key exchange defined in SM2. -// The first step is to compute -// 'tA' = ('dsA' + 'deA' avf(Xe,A)) mod 'n' -// Then, compute the 'Z' value from -// 'outZ' = ('h' 'tA' mod 'n') ('QsA' + [avf('QeB.x')]('QeB')). -// The function will compute the ephemeral public key from the ephemeral -// private key. -// All points are required to be on the curve of 'inQsA'. The function will fail -// catastrophically if this is not the case -// Return Type: TPM_RC -// TPM_RC_NO_RESULT the value for dsA does not give a valid point on the -// curve -LIB_EXPORT TPM_RC SM2KeyExchange( - TPMS_ECC_POINT* outZ, // OUT: the computed point - TPM_ECC_CURVE curveId, // IN: the curve for the computations - TPM2B_ECC_PARAMETER* dsAIn, // IN: static private TPM key - TPM2B_ECC_PARAMETER* deAIn, // IN: ephemeral private TPM key - TPMS_ECC_POINT* QsBIn, // IN: static public party B key - TPMS_ECC_POINT* QeBIn // IN: ephemeral public party B key -); -# endif -#endif // CC_ZGen_2Phase - -#endif // _CRYPT_ECC_KEY_EXCHANGE_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptEccMain_fp.h b/TPMCmd/tpm/include/prototypes/CryptEccMain_fp.h deleted file mode 100644 index 1ec37366..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptEccMain_fp.h +++ /dev/null @@ -1,318 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 03:18:00PM - */ - -#ifndef _CRYPT_ECC_MAIN_FP_H_ -#define _CRYPT_ECC_MAIN_FP_H_ - -#if ALG_ECC - -//** Functions -# if SIMULATION -void EccSimulationEnd(void); -# endif // SIMULATION - -//*** CryptEccInit() -// This function is called at _TPM_Init -BOOL CryptEccInit(void); - -//*** CryptEccStartup() -// This function is called at TPM2_Startup(). -BOOL CryptEccStartup(void); - -//*** ClearPoint2B(generic) -// Initialize the size values of a TPMS_ECC_POINT structure. -void ClearPoint2B(TPMS_ECC_POINT* p // IN: the point -); - -//*** CryptEccGetParametersByCurveId() -// This function returns a pointer to the curve data that is associated with -// the indicated curveId. -// If there is no curve with the indicated ID, the function returns NULL. This -// function is in this module so that it can be called by GetCurve data. -// Return Type: const ECC_CURVE_DATA -// NULL curve with the indicated TPM_ECC_CURVE is not implemented -// != NULL pointer to the curve data -LIB_EXPORT const ECC_CURVE* CryptEccGetParametersByCurveId( - TPM_ECC_CURVE curveId // IN: the curveID -); - -//*** CryptEccGetKeySizeForCurve() -// This function returns the key size in bits of the indicated curve. -LIB_EXPORT UINT16 CryptEccGetKeySizeForCurve(TPM_ECC_CURVE curveId // IN: the curve -); - -//*** GetCurveData() -// This function returns the a pointer for the parameter data -// associated with a curve. -const ECC_CURVE_DATA* GetCurveData(TPM_ECC_CURVE curveId // IN: the curveID -); - -//***CryptEccGetOID() -const BYTE* CryptEccGetOID(TPM_ECC_CURVE curveId); - -//*** CryptEccGetCurveByIndex() -// This function returns the number of the 'i'-th implemented curve. The normal -// use would be to call this function with 'i' starting at 0. When the 'i' is greater -// than or equal to the number of implemented curves, TPM_ECC_NONE is returned. -LIB_EXPORT TPM_ECC_CURVE CryptEccGetCurveByIndex(UINT16 i); - -//*** CryptEccGetParameter() -// This function returns an ECC curve parameter. The parameter is -// selected by a single character designator from the set of ""PNABXYH"". -// Return Type: BOOL -// TRUE(1) curve exists and parameter returned -// FALSE(0) curve does not exist or parameter selector -LIB_EXPORT BOOL CryptEccGetParameter( - TPM2B_ECC_PARAMETER* out, // OUT: place to put parameter - char p, // IN: the parameter selector - TPM_ECC_CURVE curveId // IN: the curve id -); - -//*** CryptCapGetECCCurve() -// This function returns the list of implemented ECC curves. -// Return Type: TPMI_YES_NO -// YES if no more ECC curve is available -// NO if there are more ECC curves not reported -TPMI_YES_NO -CryptCapGetECCCurve(TPM_ECC_CURVE curveID, // IN: the starting ECC curve - UINT32 maxCount, // IN: count of returned curves - TPML_ECC_CURVE* curveList // OUT: ECC curve list -); - -//*** CryptGetCurveSignScheme() -// This function will return a pointer to the scheme of the curve. -const TPMT_ECC_SCHEME* CryptGetCurveSignScheme( - TPM_ECC_CURVE curveId // IN: The curve selector -); - -//*** CryptGenerateR() -// This function computes the commit random value for a split signing scheme. -// -// If 'c' is NULL, it indicates that 'r' is being generated -// for TPM2_Commit. -// If 'c' is not NULL, the TPM will validate that the 'gr.commitArray' -// bit associated with the input value of 'c' is SET. If not, the TPM -// returns FALSE and no 'r' value is generated. -// Return Type: BOOL -// TRUE(1) r value computed -// FALSE(0) no r value computed -BOOL CryptGenerateR(TPM2B_ECC_PARAMETER* r, // OUT: the generated random value - UINT16* c, // IN/OUT: count value. - TPMI_ECC_CURVE curveID, // IN: the curve for the value - TPM2B_NAME* name // IN: optional name of a key to - // associate with 'r' -); - -//*** CryptCommit() -// This function is called when the count value is committed. The 'gr.commitArray' -// value associated with the current count value is SET and g_commitCounter is -// incremented. The low-order 16 bits of old value of the counter is returned. -UINT16 -CryptCommit(void); - -//*** CryptEndCommit() -// This function is called when the signing operation using the committed value -// is completed. It clears the gr.commitArray bit associated with the count -// value so that it can't be used again. -void CryptEndCommit(UINT16 c // IN: the counter value of the commitment -); - -//*** CryptEccGetParameters() -// This function returns the ECC parameter details of the given curve. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) unsupported ECC curve ID -BOOL CryptEccGetParameters( - TPM_ECC_CURVE curveId, // IN: ECC curve ID - TPMS_ALGORITHM_DETAIL_ECC* parameters // OUT: ECC parameters -); - -//*** BnGetCurvePrime() -// This function is used to get just the prime modulus associated with a curve. -const bignum_t* BnGetCurvePrime(TPM_ECC_CURVE curveId); - -//*** BnGetCurveOrder() -// This function is used to get just the curve order -const bignum_t* BnGetCurveOrder(TPM_ECC_CURVE curveId); - -//*** BnIsOnCurve() -// This function checks if a point is on the curve. -BOOL BnIsOnCurve(pointConst Q, const ECC_CURVE_DATA* C); - -//*** BnIsValidPrivateEcc() -// Checks that 0 < 'x' < 'q' -BOOL BnIsValidPrivateEcc(bigConst x, // IN: private key to check - bigCurve E // IN: the curve to check - ); - -LIB_EXPORT BOOL CryptEccIsValidPrivateKey(TPM2B_ECC_PARAMETER* d, - TPM_ECC_CURVE curveId); - -//*** BnPointMul() -// This function does a point multiply of the form 'R' = ['d']'S' + ['u']'Q' where the -// parameters are bigNum values. If 'S' is NULL and d is not NULL, then it computes -// 'R' = ['d']'G' + ['u']'Q' or just 'R' = ['d']'G' if 'u' and 'Q' are NULL. -// If 'skipChecks' is TRUE, then the function will not verify that the inputs are -// correct for the domain. This would be the case when the values were created by the -// CryptoEngine code. -// It will return TPM_RC_NO_RESULT if the resulting point is the point at infinity. -// Return Type: TPM_RC -// TPM_RC_NO_RESULT result of multiplication is a point at infinity -// TPM_RC_ECC_POINT 'S' or 'Q' is not on the curve -// TPM_RC_VALUE 'd' or 'u' is not < n -TPM_RC -BnPointMult(bigPoint R, // OUT: computed point - pointConst S, // IN: optional point to multiply by 'd' - bigConst d, // IN: scalar for [d]S or [d]G - pointConst Q, // IN: optional second point - bigConst u, // IN: optional second scalar - bigCurve E // IN: curve parameters -); - -//***BnEccGetPrivate() -// This function gets random values that are the size of the key plus 64 bits. The -// value is reduced (mod ('q' - 1)) and incremented by 1 ('q' is the order of the -// curve. This produces a value ('d') such that 1 <= 'd' < 'q'. This is the method -// of FIPS 186-4 Section B.4.1 ""Key Pair Generation Using Extra Random Bits"". -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure generating private key -BOOL BnEccGetPrivate(bigNum dOut, // OUT: the qualified random value - const ECC_CURVE_DATA* C, // IN: curve for which the private key - // needs to be appropriate - RAND_STATE* rand // IN: state for DRBG -); - -//*** BnEccGenerateKeyPair() -// This function gets a private scalar from the source of random bits and does -// the point multiply to get the public key. -BOOL BnEccGenerateKeyPair(bigNum bnD, // OUT: private scalar - bn_point_t* ecQ, // OUT: public point - bigCurve E, // IN: curve for the point - RAND_STATE* rand // IN: DRBG state to use -); - -//***CryptEccNewKeyPair(***) -// This function creates an ephemeral ECC. It is ephemeral in that -// is expected that the private part of the key will be discarded -LIB_EXPORT TPM_RC CryptEccNewKeyPair( - TPMS_ECC_POINT* Qout, // OUT: the public point - TPM2B_ECC_PARAMETER* dOut, // OUT: the private scalar - TPM_ECC_CURVE curveId // IN: the curve for the key -); - -//*** CryptEccPointMultiply() -// This function computes 'R' := ['dIn']'G' + ['uIn']'QIn'. Where 'dIn' and -// 'uIn' are scalars, 'G' and 'QIn' are points on the specified curve and 'G' is the -// default generator of the curve. -// -// The 'xOut' and 'yOut' parameters are optional and may be set to NULL if not -// used. -// -// It is not necessary to provide 'uIn' if 'QIn' is specified but one of 'uIn' and -// 'dIn' must be provided. If 'dIn' and 'QIn' are specified but 'uIn' is not -// provided, then 'R' = ['dIn']'QIn'. -// -// If the multiply produces the point at infinity, the TPM_RC_NO_RESULT is returned. -// -// The sizes of 'xOut' and yOut' will be set to be the size of the degree of -// the curve -// -// It is a fatal error if 'dIn' and 'uIn' are both unspecified (NULL) or if 'Qin' -// or 'Rout' is unspecified. -// -// Return Type: TPM_RC -// TPM_RC_ECC_POINT the point 'Pin' or 'Qin' is not on the curve -// TPM_RC_NO_RESULT the product point is at infinity -// TPM_RC_CURVE bad curve -// TPM_RC_VALUE 'dIn' or 'uIn' out of range -// -LIB_EXPORT TPM_RC CryptEccPointMultiply( - TPMS_ECC_POINT* Rout, // OUT: the product point R - TPM_ECC_CURVE curveId, // IN: the curve to use - TPMS_ECC_POINT* Pin, // IN: first point (can be null) - TPM2B_ECC_PARAMETER* dIn, // IN: scalar value for [dIn]Qin - // the Pin - TPMS_ECC_POINT* Qin, // IN: point Q - TPM2B_ECC_PARAMETER* uIn // IN: scalar value for the multiplier - // of Q -); - -//*** CryptEccIsPointOnCurve() -// This function is used to test if a point is on a defined curve. It does this -// by checking that 'y'^2 mod 'p' = 'x'^3 + 'a'*'x' + 'b' mod 'p'. -// -// It is a fatal error if 'Q' is not specified (is NULL). -// Return Type: BOOL -// TRUE(1) point is on curve -// FALSE(0) point is not on curve or curve is not supported -LIB_EXPORT BOOL CryptEccIsPointOnCurve( - TPM_ECC_CURVE curveId, // IN: the curve selector - TPMS_ECC_POINT* Qin // IN: the point. -); - -//*** CryptEccGenerateKey() -// This function generates an ECC key pair based on the input parameters. -// This routine uses KDFa to produce candidate numbers. The method is according -// to FIPS 186-3, section B.1.2 "Key Pair Generation by Testing Candidates." -// According to the method in FIPS 186-3, the resulting private value 'd' should be -// 1 <= 'd' < 'n' where 'n' is the order of the base point. -// -// It is a fatal error if 'Qout', 'dOut', is not provided (is NULL). -// -// If the curve is not supported -// If 'seed' is not provided, then a random number will be used for the key -// Return Type: TPM_RC -// TPM_RC_CURVE curve is not supported -// TPM_RC_NO_RESULT could not verify key with signature (FIPS only) -LIB_EXPORT TPM_RC CryptEccGenerateKey( - TPMT_PUBLIC* publicArea, // IN/OUT: The public area template for - // the new key. The public key - // area will be replaced computed - // ECC public key - TPMT_SENSITIVE* sensitive, // OUT: the sensitive area will be - // updated to contain the private - // ECC key and the symmetric - // encryption key - RAND_STATE* rand // IN: if not NULL, the deterministic - // RNG state -); -#endif // ALG_ECC - -#endif // _CRYPT_ECC_MAIN_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptEccSignature_fp.h b/TPMCmd/tpm/include/prototypes/CryptEccSignature_fp.h deleted file mode 100644 index e784b773..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptEccSignature_fp.h +++ /dev/null @@ -1,132 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:18PM - */ - -#ifndef _CRYPT_ECC_SIGNATURE_FP_H_ -#define _CRYPT_ECC_SIGNATURE_FP_H_ - -#if ALG_ECC - -//*** BnSignEcdsa() -// This function implements the ECDSA signing algorithm. The method is described -// in the comments below. -TPM_RC -BnSignEcdsa(bigNum bnR, // OUT: 'r' component of the signature - bigNum bnS, // OUT: 's' component of the signature - bigCurve E, // IN: the curve used in the signature - // process - bigNum bnD, // IN: private signing key - const TPM2B_DIGEST* digest, // IN: the digest to sign - RAND_STATE* rand // IN: used in debug of signing -); - -//*** CryptEccSign() -// This function is the dispatch function for the various ECC-based -// signing schemes. -// There is a bit of ugliness to the parameter passing. In order to test this, -// we sometime would like to use a deterministic RNG so that we can get the same -// signatures during testing. The easiest way to do this for most schemes is to -// pass in a deterministic RNG and let it return canned values during testing. -// There is a competing need for a canned parameter to use in ECDAA. To accommodate -// both needs with minimal fuss, a special type of RAND_STATE is defined to carry -// the address of the commit value. The setup and handling of this is not very -// different for the caller than what was in previous versions of the code. -// Return Type: TPM_RC -// TPM_RC_SCHEME 'scheme' is not supported -LIB_EXPORT TPM_RC CryptEccSign(TPMT_SIGNATURE* signature, // OUT: signature - OBJECT* signKey, // IN: ECC key to sign the hash - const TPM2B_DIGEST* digest, // IN: digest to sign - TPMT_ECC_SCHEME* scheme, // IN: signing scheme - RAND_STATE* rand); -# if ALG_ECDSA - -//*** BnValidateSignatureEcdsa() -// This function validates an ECDSA signature. rIn and sIn should have been checked -// to make sure that they are in the range 0 < 'v' < 'n' -// Return Type: TPM_RC -// TPM_RC_SIGNATURE signature not valid -TPM_RC -BnValidateSignatureEcdsa(bigNum bnR, // IN: 'r' component of the signature - bigNum bnS, // IN: 's' component of the signature - bigCurve E, // IN: the curve used in the signature - // process - bn_point_t* ecQ, // IN: the public point of the key - const TPM2B_DIGEST* digest // IN: the digest that was signed -); -# endif // ALG_ECDSA - -//*** CryptEccValidateSignature() -// This function validates an EcDsa or EcSchnorr signature. -// The point 'Qin' needs to have been validated to be on the curve of 'curveId'. -// Return Type: TPM_RC -// TPM_RC_SIGNATURE not a valid signature -LIB_EXPORT TPM_RC CryptEccValidateSignature( - TPMT_SIGNATURE* signature, // IN: signature to be verified - OBJECT* signKey, // IN: ECC key signed the hash - const TPM2B_DIGEST* digest // IN: digest that was signed -); - -//***CryptEccCommitCompute() -// This function performs the point multiply operations required by TPM2_Commit. -// -// If 'B' or 'M' is provided, they must be on the curve defined by 'curveId'. This -// routine does not check that they are on the curve and results are unpredictable -// if they are not. -// -// It is a fatal error if 'r' is NULL. If 'B' is not NULL, then it is a -// fatal error if 'd' is NULL or if 'K' and 'L' are both NULL. -// If 'M' is not NULL, then it is a fatal error if 'E' is NULL. -// -// Return Type: TPM_RC -// TPM_RC_NO_RESULT if 'K', 'L' or 'E' was computed to be the point -// at infinity -// TPM_RC_CANCELED a cancel indication was asserted during this -// function -LIB_EXPORT TPM_RC CryptEccCommitCompute( - TPMS_ECC_POINT* K, // OUT: [d]B or [r]Q - TPMS_ECC_POINT* L, // OUT: [r]B - TPMS_ECC_POINT* E, // OUT: [r]M - TPM_ECC_CURVE curveId, // IN: the curve for the computations - TPMS_ECC_POINT* M, // IN: M (optional) - TPMS_ECC_POINT* B, // IN: B (optional) - TPM2B_ECC_PARAMETER* d, // IN: d (optional) - TPM2B_ECC_PARAMETER* r // IN: the computed r value (required) -); -#endif // ALG_ECC - -#endif // _CRYPT_ECC_SIGNATURE_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptPrimeSieve_fp.h b/TPMCmd/tpm/include/prototypes/CryptPrimeSieve_fp.h deleted file mode 100644 index 2fd4c5f4..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptPrimeSieve_fp.h +++ /dev/null @@ -1,137 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Aug 30, 2019 Time: 02:11:54PM - */ - -#ifndef _CRYPT_PRIME_SIEVE_FP_H_ -#define _CRYPT_PRIME_SIEVE_FP_H_ - -#if RSA_KEY_SIEVE - -//*** RsaAdjustPrimeLimit() -// This used during the sieve process. The iterator for getting the -// next prime (RsaNextPrime()) will return primes until it hits the -// limit (primeLimit) set up by this function. This causes the sieve -// process to stop when an appropriate number of primes have been -// sieved. -LIB_EXPORT void RsaAdjustPrimeLimit(uint32_t requestedPrimes); - -//*** RsaNextPrime() -// This the iterator used during the sieve process. The input is the -// last prime returned (or any starting point) and the output is the -// next higher prime. The function returns 0 when the primeLimit is -// reached. -LIB_EXPORT uint32_t RsaNextPrime(uint32_t lastPrime); - -//*** FindNthSetBit() -// This function finds the nth SET bit in a bit array. The 'n' parameter is -// between 1 and the number of bits in the array (always a multiple of 8). -// If called when the array does not have n bits set, it will return -1 -// Return Type: unsigned int -// <0 no bit is set or no bit with the requested number is set -// >=0 the number of the bit in the array that is the nth set -LIB_EXPORT int FindNthSetBit( - const UINT16 aSize, // IN: the size of the array to check - const BYTE* a, // IN: the array to check - const UINT32 n // IN, the number of the SET bit -); - -//*** PrimeSieve() -// This function does a prime sieve over the input 'field' which has as its -// starting address the value in bnN. Since this initializes the Sieve -// using a precomputed field with the bits associated with 3, 5 and 7 already -// turned off, the value of pnN may need to be adjusted by a few counts to allow -// the precomputed field to be used without modification. -// -// To get better performance, one could address the issue of developing the -// composite numbers. When the size of the prime gets large, the time for doing -// the divisions goes up, noticeably. It could be better to develop larger composite -// numbers even if they need to be bigNum's themselves. The object would be to -// reduce the number of times that the large prime is divided into a few large -// divides and then use smaller divides to get to the final 16 bit (or smaller) -// remainders. -LIB_EXPORT UINT32 PrimeSieve(bigNum bnN, // IN/OUT: number to sieve - UINT32 fieldSize, // IN: size of the field area in bytes - BYTE* field // IN: field -); -# ifdef SIEVE_DEBUG - -//***SetFieldSize() -// Function to set the field size used for prime generation. Used for tuning. -LIB_EXPORT uint32_t SetFieldSize(uint32_t newFieldSize); -# endif // SIEVE_DEBUG - -//*** PrimeSelectWithSieve() -// This function will sieve the field around the input prime candidate. If the -// sieve field is not empty, one of the one bits in the field is chosen for testing -// with Miller-Rabin. If the value is prime, 'pnP' is updated with this value -// and the function returns success. If this value is not prime, another -// pseudo-random candidate is chosen and tested. This process repeats until -// all values in the field have been checked. If all bits in the field have -// been checked and none is prime, the function returns FALSE and a new random -// value needs to be chosen. -// Return Type: TPM_RC -// TPM_RC_FAILURE TPM in failure mode, probably due to entropy source -// TPM_RC_SUCCESS candidate is probably prime -// TPM_RC_NO_RESULT candidate is not prime and couldn't find and alternative -// in the field -LIB_EXPORT TPM_RC PrimeSelectWithSieve( - bigNum candidate, // IN/OUT: The candidate to filter - UINT32 e, // IN: the exponent - RAND_STATE* rand // IN: the random number generator state -); -# if RSA_INSTRUMENT - -//*** PrintTuple() -char* PrintTuple(UINT32* i); - -//*** RsaSimulationEnd() -void RsaSimulationEnd(void); - -//*** GetSieveStats() -LIB_EXPORT void GetSieveStats( - uint32_t* trials, uint32_t* emptyFields, uint32_t* averageBits); -# endif -#endif // RSA_KEY_SIEVE -#if !RSA_INSTRUMENT - -//*** RsaSimulationEnd() -// Stub for call when not doing instrumentation. -void RsaSimulationEnd(void); -#endif - -#endif // _CRYPT_PRIME_SIEVE_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptPrime_fp.h b/TPMCmd/tpm/include/prototypes/CryptPrime_fp.h deleted file mode 100644 index 5bb1fcd2..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptPrime_fp.h +++ /dev/null @@ -1,130 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Aug 30, 2019 Time: 02:11:54PM - */ - -#ifndef _CRYPT_PRIME_FP_H_ -#define _CRYPT_PRIME_FP_H_ - -//*** IsPrimeInt() -// This will do a test of a word of up to 32-bits in size. -BOOL IsPrimeInt(uint32_t n); - -//*** BnIsProbablyPrime() -// This function is used when the key sieve is not implemented. This function -// Will try to eliminate some of the obvious things before going on -// to perform MillerRabin as a final verification of primeness. -BOOL BnIsProbablyPrime(bigNum prime, // IN: - RAND_STATE* rand // IN: the random state just - // in case Miller-Rabin is required -); - -//*** MillerRabinRounds() -// Function returns the number of Miller-Rabin rounds necessary to give an -// error probability equal to the security strength of the prime. These values -// are from FIPS 186-3. -UINT32 -MillerRabinRounds(UINT32 bits // IN: Number of bits in the RSA prime -); - -//*** MillerRabin() -// This function performs a Miller-Rabin test from FIPS 186-3. It does -// 'iterations' trials on the number. In all likelihood, if the number -// is not prime, the first test fails. -// Return Type: BOOL -// TRUE(1) probably prime -// FALSE(0) composite -BOOL MillerRabin(bigNum bnW, RAND_STATE* rand); -#if ALG_RSA - -//*** RsaCheckPrime() -// This will check to see if a number is prime and appropriate for an -// RSA prime. -// -// This has different functionality based on whether we are using key -// sieving or not. If not, the number checked to see if it is divisible by -// the public exponent, then the number is adjusted either up or down -// in order to make it a better candidate. It is then checked for being -// probably prime. -// -// If sieving is used, the number is used to root a sieving process. -// -TPM_RC -RsaCheckPrime(bigNum prime, UINT32 exponent, RAND_STATE* rand); - -//*** RsaAdjustPrimeCandiate() -// For this math, we assume that the RSA numbers are fixed-point numbers with -// the decimal point to the "left" of the most significant bit. This approach helps -// make it clear what is happening with the MSb of the values. -// The two RSA primes have to be large enough so that their product will be a number -// with the necessary number of significant bits. For example, we want to be able -// to multiply two 1024-bit numbers to produce a number with 2028 significant bits. If -// we accept any 1024-bit prime that has its MSb set, then it is possible to produce a -// product that does not have the MSb SET. For example, if we use tiny keys of 16 bits -// and have two 8-bit 'primes' of 0x80, then the public key would be 0x4000 which is -// only 15-bits. So, what we need to do is made sure that each of the primes is large -// enough so that the product of the primes is twice as large as each prime. A little -// arithmetic will show that the only way to do this is to make sure that each of the -// primes is no less than root(2)/2. That's what this functions does. -// This function adjusts the candidate prime so that it is odd and >= root(2)/2. -// This allows the product of these two numbers to be .5, which, in fixed point -// notation means that the most significant bit is 1. -// For this routine, the root(2)/2 (0.7071067811865475) approximated with 0xB505 -// which is, in fixed point, 0.7071075439453125 or an error of 0.000108%. Just setting -// the upper two bits would give a value > 0.75 which is an error of > 6%. Given the -// amount of time all the other computations take, reducing the error is not much of -// a cost, but it isn't totally required either. -// -// This function can be replaced with a function that just sets the two most -// significant bits of each prime candidate without introducing any computational -// issues. -// -LIB_EXPORT void RsaAdjustPrimeCandidate(bigNum prime); - -//***BnGeneratePrimeForRSA() -// Function to generate a prime of the desired size with the proper attributes -// for an RSA prime. -TPM_RC -BnGeneratePrimeForRSA(bigNum prime, // IN/OUT: points to the BN that will get the - // random value - UINT32 bits, // IN: number of bits to get - UINT32 exponent, // IN: the exponent - RAND_STATE* rand // IN: the random state -); -#endif // ALG_RSA - -#endif // _CRYPT_PRIME_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptSelfTest_fp.h b/TPMCmd/tpm/include/prototypes/CryptSelfTest_fp.h deleted file mode 100644 index ec7c9c89..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptSelfTest_fp.h +++ /dev/null @@ -1,100 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 4, 2020 Time: 02:36:44PM - */ - -#ifndef _CRYPT_SELF_TEST_FP_H_ -#define _CRYPT_SELF_TEST_FP_H_ - -//*** CryptSelfTest() -// This function is called to start/complete a full self-test. -// If 'fullTest' is NO, then only the untested algorithms will be run. If -// 'fullTest' is YES, then 'g_untestedDecryptionAlgorithms' is reinitialized and then -// all tests are run. -// This implementation of the reference design does not support processing outside -// the framework of a TPM command. As a consequence, this command does not -// complete until all tests are done. Since this can take a long time, the TPM -// will check after each test to see if the command is canceled. If so, then the -// TPM will returned TPM_RC_CANCELLED. To continue with the self-tests, call -// TPM2_SelfTest(fullTest == No) and the TPM will complete the testing. -// Return Type: TPM_RC -// TPM_RC_CANCELED if the command is canceled -LIB_EXPORT -TPM_RC -CryptSelfTest(TPMI_YES_NO fullTest // IN: if full test is required -); - -//*** CryptIncrementalSelfTest() -// This function is used to perform an incremental self-test. This implementation -// will perform the toTest values before returning. That is, it assumes that the -// TPM cannot perform background tasks between commands. -// -// This command may be canceled. If it is, then there is no return result. -// However, this command can be run again and the incremental progress will not -// be lost. -// Return Type: TPM_RC -// TPM_RC_CANCELED processing of this command was canceled -// TPM_RC_TESTING if toTest list is not empty -// TPM_RC_VALUE an algorithm in the toTest list is not implemented -TPM_RC -CryptIncrementalSelfTest(TPML_ALG* toTest, // IN: list of algorithms to be tested - TPML_ALG* toDoList // OUT: list of algorithms needing test -); - -//*** CryptInitializeToTest() -// This function will initialize the data structures for testing all the -// algorithms. This should not be called unless CryptAlgsSetImplemented() has -// been called -void CryptInitializeToTest(void); - -//*** CryptTestAlgorithm() -// Only point of contact with the actual self tests. If a self-test fails, there -// is no return and the TPM goes into failure mode. -// The call to TestAlgorithm uses an algorithm selector and a bit vector. When the -// test is run, the corresponding bit in 'toTest' and in 'g_toTest' is CLEAR. If -// 'toTest' is NULL, then only the bit in 'g_toTest' is CLEAR. -// There is a special case for the call to TestAlgorithm(). When 'alg' is -// ALG_ERROR, TestAlgorithm() will CLEAR any bit in 'toTest' for which it has -// no test. This allows the knowledge about which algorithms have test to be -// accessed through the interface that provides the test. -// Return Type: TPM_RC -// TPM_RC_CANCELED test was canceled -LIB_EXPORT -TPM_RC -CryptTestAlgorithm(TPM_ALG_ID alg, ALGORITHM_VECTOR* toTest); - -#endif // _CRYPT_SELF_TEST_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptSmac_fp.h b/TPMCmd/tpm/include/prototypes/CryptSmac_fp.h deleted file mode 100644 index e2d3dccf..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptSmac_fp.h +++ /dev/null @@ -1,73 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _CRYPT_SMAC_FP_H_ -#define _CRYPT_SMAC_FP_H_ - -#if SMAC_IMPLEMENTED - -//*** CryptSmacStart() -// Function to start an SMAC. -UINT16 -CryptSmacStart(HASH_STATE* state, - TPMU_PUBLIC_PARMS* keyParameters, - TPM_ALG_ID macAlg, // IN: the type of MAC - TPM2B* key); - -//*** CryptMacStart() -// Function to start either an HMAC or an SMAC. Cannot reuse the CryptHmacStart -// function because of the difference in number of parameters. -UINT16 -CryptMacStart(HMAC_STATE* state, - TPMU_PUBLIC_PARMS* keyParameters, - TPM_ALG_ID macAlg, // IN: the type of MAC - TPM2B* key); - -//*** CryptMacEnd() -// Dispatch to the MAC end function using a size and buffer pointer. -UINT16 -CryptMacEnd(HMAC_STATE* state, UINT32 size, BYTE* buffer); - -//*** CryptMacEnd2B() -// Dispatch to the MAC end function using a 2B. -UINT16 -CryptMacEnd2B(HMAC_STATE* state, TPM2B* data); -#endif // SMAC_IMPLEMENTED - -#endif // _CRYPT_SMAC_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/CryptSym_fp.h b/TPMCmd/tpm/include/prototypes/CryptSym_fp.h deleted file mode 100644 index cac60c54..00000000 --- a/TPMCmd/tpm/include/prototypes/CryptSym_fp.h +++ /dev/null @@ -1,114 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 03:18:00PM - */ - -#ifndef _CRYPT_SYM_FP_H_ -#define _CRYPT_SYM_FP_H_ - -//** Initialization and Data Access Functions -// -//*** CryptSymInit() -// This function is called to do _TPM_Init processing -BOOL CryptSymInit(void); - -//*** CryptSymStartup() -// This function is called to do TPM2_Startup() processing -BOOL CryptSymStartup(void); - -//*** CryptGetSymmetricBlockSize() -// This function returns the block size of the algorithm. The table of bit sizes has -// an entry for each allowed key size. The entry for a key size is 0 if the TPM does -// not implement that key size. The key size table is delimited with a negative number -// (-1). After the delimiter is a list of block sizes with each entry corresponding -// to the key bit size. For most symmetric algorithms, the block size is the same -// regardless of the key size but this arrangement allows them to be different. -// Return Type: INT16 -// <= 0 cipher not supported -// > 0 the cipher block size in bytes -LIB_EXPORT INT16 CryptGetSymmetricBlockSize( - TPM_ALG_ID symmetricAlg, // IN: the symmetric algorithm - UINT16 keySizeInBits // IN: the key size -); - -//** Symmetric Encryption -// This function performs symmetric encryption based on the mode. -// Return Type: TPM_RC -// TPM_RC_SIZE 'dSize' is not a multiple of the block size for an -// algorithm that requires it -// TPM_RC_FAILURE Fatal error -LIB_EXPORT TPM_RC CryptSymmetricEncrypt( - BYTE* dOut, // OUT: - TPM_ALG_ID algorithm, // IN: the symmetric algorithm - UINT16 keySizeInBits, // IN: key size in bits - const BYTE* key, // IN: key buffer. The size of this buffer - // in bytes is (keySizeInBits + 7) / 8 - TPM2B_IV* ivInOut, // IN/OUT: IV for decryption. - TPM_ALG_ID mode, // IN: Mode to use - INT32 dSize, // IN: data size (may need to be a - // multiple of the blockSize) - const BYTE* dIn // IN: data buffer -); - -//*** CryptSymmetricDecrypt() -// This function performs symmetric decryption based on the mode. -// Return Type: TPM_RC -// TPM_RC_FAILURE A fatal error -// TPM_RCS_SIZE 'dSize' is not a multiple of the block size for an -// algorithm that requires it -LIB_EXPORT TPM_RC CryptSymmetricDecrypt( - BYTE* dOut, // OUT: decrypted data - TPM_ALG_ID algorithm, // IN: the symmetric algorithm - UINT16 keySizeInBits, // IN: key size in bits - const BYTE* key, // IN: key buffer. The size of this buffer - // in bytes is (keySizeInBits + 7) / 8 - TPM2B_IV* ivInOut, // IN/OUT: IV for decryption. - TPM_ALG_ID mode, // IN: Mode to use - INT32 dSize, // IN: data size (may need to be a - // multiple of the blockSize) - const BYTE* dIn // IN: data buffer -); - -//*** CryptSymKeyValidate() -// Validate that a provided symmetric key meets the requirements of the TPM -// Return Type: TPM_RC -// TPM_RC_KEY_SIZE Key size specifiers do not match -// TPM_RC_KEY Key is not allowed -TPM_RC -CryptSymKeyValidate(TPMT_SYM_DEF_OBJECT* symDef, TPM2B_SYM_KEY* key); - -#endif // _CRYPT_SYM_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/DA_fp.h b/TPMCmd/tpm/include/prototypes/DA_fp.h deleted file mode 100644 index 291ef0ea..00000000 --- a/TPMCmd/tpm/include/prototypes/DA_fp.h +++ /dev/null @@ -1,78 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 04:23:27PM - */ - -#ifndef _DA_FP_H_ -#define _DA_FP_H_ - -//*** DAPreInstall_Init() -// This function initializes the DA parameters to their manufacturer-default -// values. The default values are determined by a platform-specific specification. -// -// This function should not be called outside of a manufacturing or simulation -// environment. -// -// The DA parameters will be restored to these initial values by TPM2_Clear(). -void DAPreInstall_Init(void); - -//*** DAStartup() -// This function is called by TPM2_Startup() to initialize the DA parameters. -// In the case of Startup(CLEAR), use of lockoutAuth will be enabled if the -// lockout recovery time is 0. Otherwise, lockoutAuth will not be enabled until -// the TPM has been continuously powered for the lockoutRecovery time. -// -// This function requires that NV be available and not rate limiting. -BOOL DAStartup(STARTUP_TYPE type // IN: startup type -); - -//*** DARegisterFailure() -// This function is called when a authorization failure occurs on an entity -// that is subject to dictionary-attack protection. When a DA failure is -// triggered, register the failure by resetting the relevant self-healing -// timer to the current time. -void DARegisterFailure(TPM_HANDLE handle // IN: handle for failure -); - -//*** DASelfHeal() -// This function is called to check if sufficient time has passed to allow -// decrement of failedTries or to re-enable use of lockoutAuth. -// -// This function should be called when the time interval is updated. -void DASelfHeal(void); - -#endif // _DA_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/DictionaryAttackLockReset_fp.h b/TPMCmd/tpm/include/prototypes/DictionaryAttackLockReset_fp.h deleted file mode 100644 index eaf88438..00000000 --- a/TPMCmd/tpm/include/prototypes/DictionaryAttackLockReset_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_DictionaryAttackLockReset // Command must be enabled - -# ifndef _Dictionary_Attack_Lock_Reset_FP_H_ -# define _Dictionary_Attack_Lock_Reset_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_LOCKOUT lockHandle; -} DictionaryAttackLockReset_In; - -// Response code modifiers -# define RC_DictionaryAttackLockReset_lockHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_DictionaryAttackLockReset(DictionaryAttackLockReset_In* in); - -# endif // _Dictionary_Attack_Lock_Reset_FP_H_ -#endif // CC_DictionaryAttackLockReset diff --git a/TPMCmd/tpm/include/prototypes/DictionaryAttackParameters_fp.h b/TPMCmd/tpm/include/prototypes/DictionaryAttackParameters_fp.h deleted file mode 100644 index 6e3b399a..00000000 --- a/TPMCmd/tpm/include/prototypes/DictionaryAttackParameters_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_DictionaryAttackParameters // Command must be enabled - -# ifndef _Dictionary_Attack_Parameters_FP_H_ -# define _Dictionary_Attack_Parameters_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_LOCKOUT lockHandle; - UINT32 newMaxTries; - UINT32 newRecoveryTime; - UINT32 lockoutRecovery; -} DictionaryAttackParameters_In; - -// Response code modifiers -# define RC_DictionaryAttackParameters_lockHandle (TPM_RC_H + TPM_RC_1) -# define RC_DictionaryAttackParameters_newMaxTries (TPM_RC_P + TPM_RC_1) -# define RC_DictionaryAttackParameters_newRecoveryTime (TPM_RC_P + TPM_RC_2) -# define RC_DictionaryAttackParameters_lockoutRecovery (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_DictionaryAttackParameters(DictionaryAttackParameters_In* in); - -# endif // _Dictionary_Attack_Parameters_FP_H_ -#endif // CC_DictionaryAttackParameters diff --git a/TPMCmd/tpm/include/prototypes/Duplicate_fp.h b/TPMCmd/tpm/include/prototypes/Duplicate_fp.h deleted file mode 100644 index cdbd2e99..00000000 --- a/TPMCmd/tpm/include/prototypes/Duplicate_fp.h +++ /dev/null @@ -1,73 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Duplicate // Command must be enabled - -# ifndef _Duplicate_FP_H_ -# define _Duplicate_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT objectHandle; - TPMI_DH_OBJECT newParentHandle; - TPM2B_DATA encryptionKeyIn; - TPMT_SYM_DEF_OBJECT symmetricAlg; -} Duplicate_In; - -// Output structure definition -typedef struct -{ - TPM2B_DATA encryptionKeyOut; - TPM2B_PRIVATE duplicate; - TPM2B_ENCRYPTED_SECRET outSymSeed; -} Duplicate_Out; - -// Response code modifiers -# define RC_Duplicate_objectHandle (TPM_RC_H + TPM_RC_1) -# define RC_Duplicate_newParentHandle (TPM_RC_H + TPM_RC_2) -# define RC_Duplicate_encryptionKeyIn (TPM_RC_P + TPM_RC_1) -# define RC_Duplicate_symmetricAlg (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_Duplicate(Duplicate_In* in, Duplicate_Out* out); - -# endif // _Duplicate_FP_H_ -#endif // CC_Duplicate diff --git a/TPMCmd/tpm/include/prototypes/ECC_Decrypt_fp.h b/TPMCmd/tpm/include/prototypes/ECC_Decrypt_fp.h deleted file mode 100644 index ca7e22f1..00000000 --- a/TPMCmd/tpm/include/prototypes/ECC_Decrypt_fp.h +++ /dev/null @@ -1,73 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Feb 28, 2020 Time: 03:04:47PM - */ - -#if CC_ECC_Decrypt // Command must be enabled - -# ifndef _ECC_DECRYPT_FP_H_ -# define _ECC_DECRYPT_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyHandle; - TPM2B_ECC_POINT C1; - TPM2B_MAX_BUFFER C2; - TPM2B_DIGEST C3; - TPMT_KDF_SCHEME inScheme; -} ECC_Decrypt_In; - -// Output structure definition -typedef struct -{ - TPM2B_MAX_BUFFER plainText; -} ECC_Decrypt_Out; - -// Response code modifiers -# define RC_ECC_Decrypt_keyHandle (TPM_RC_H + TPM_RC_1) -# define RC_ECC_Decrypt_C1 (TPM_RC_P + TPM_RC_1) -# define RC_ECC_Decrypt_C2 (TPM_RC_P + TPM_RC_2) -# define RC_ECC_Decrypt_C3 (TPM_RC_P + TPM_RC_3) -# define RC_ECC_Decrypt_inScheme (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_ECC_Decrypt(ECC_Decrypt_In* in, ECC_Decrypt_Out* out); - -# endif // _ECC_DECRYPT_FP_H_ -#endif // CC_ECC_Decrypt diff --git a/TPMCmd/tpm/include/prototypes/ECC_Encrypt_fp.h b/TPMCmd/tpm/include/prototypes/ECC_Encrypt_fp.h deleted file mode 100644 index 2dfed388..00000000 --- a/TPMCmd/tpm/include/prototypes/ECC_Encrypt_fp.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Feb 28, 2020 Time: 03:04:47PM - */ - -#if CC_ECC_Encrypt // Command must be enabled - -# ifndef _ECC_ENCRYPT_FP_H_ -# define _ECC_ENCRYPT_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyHandle; - TPM2B_MAX_BUFFER plainText; - TPMT_KDF_SCHEME inScheme; -} ECC_Encrypt_In; - -// Output structure definition -typedef struct -{ - TPM2B_ECC_POINT C1; - TPM2B_MAX_BUFFER C2; - TPM2B_DIGEST C3; -} ECC_Encrypt_Out; - -// Response code modifiers -# define RC_ECC_Encrypt_keyHandle (TPM_RC_H + TPM_RC_1) -# define RC_ECC_Encrypt_plainText (TPM_RC_P + TPM_RC_1) -# define RC_ECC_Encrypt_inScheme (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_ECC_Encrypt(ECC_Encrypt_In* in, ECC_Encrypt_Out* out); - -# endif // _ECC_ENCRYPT_FP_H_ -#endif // CC_ECC_Encrypt diff --git a/TPMCmd/tpm/include/prototypes/ECC_Parameters_fp.h b/TPMCmd/tpm/include/prototypes/ECC_Parameters_fp.h deleted file mode 100644 index 94c39182..00000000 --- a/TPMCmd/tpm/include/prototypes/ECC_Parameters_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ECC_Parameters // Command must be enabled - -# ifndef _ECC_Parameters_FP_H_ -# define _ECC_Parameters_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_ECC_CURVE curveID; -} ECC_Parameters_In; - -// Output structure definition -typedef struct -{ - TPMS_ALGORITHM_DETAIL_ECC parameters; -} ECC_Parameters_Out; - -// Response code modifiers -# define RC_ECC_Parameters_curveID (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ECC_Parameters(ECC_Parameters_In* in, ECC_Parameters_Out* out); - -# endif // _ECC_Parameters_FP_H_ -#endif // CC_ECC_Parameters diff --git a/TPMCmd/tpm/include/prototypes/ECDH_KeyGen_fp.h b/TPMCmd/tpm/include/prototypes/ECDH_KeyGen_fp.h deleted file mode 100644 index 71309f5d..00000000 --- a/TPMCmd/tpm/include/prototypes/ECDH_KeyGen_fp.h +++ /dev/null @@ -1,66 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ECDH_KeyGen // Command must be enabled - -# ifndef _ECDH_Key_Gen_FP_H_ -# define _ECDH_Key_Gen_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyHandle; -} ECDH_KeyGen_In; - -// Output structure definition -typedef struct -{ - TPM2B_ECC_POINT zPoint; - TPM2B_ECC_POINT pubPoint; -} ECDH_KeyGen_Out; - -// Response code modifiers -# define RC_ECDH_KeyGen_keyHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ECDH_KeyGen(ECDH_KeyGen_In* in, ECDH_KeyGen_Out* out); - -# endif // _ECDH_Key_Gen_FP_H_ -#endif // CC_ECDH_KeyGen diff --git a/TPMCmd/tpm/include/prototypes/ECDH_ZGen_fp.h b/TPMCmd/tpm/include/prototypes/ECDH_ZGen_fp.h deleted file mode 100644 index 4abba618..00000000 --- a/TPMCmd/tpm/include/prototypes/ECDH_ZGen_fp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ECDH_ZGen // Command must be enabled - -# ifndef _ECDH_ZGen_FP_H_ -# define _ECDH_ZGen_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyHandle; - TPM2B_ECC_POINT inPoint; -} ECDH_ZGen_In; - -// Output structure definition -typedef struct -{ - TPM2B_ECC_POINT outPoint; -} ECDH_ZGen_Out; - -// Response code modifiers -# define RC_ECDH_ZGen_keyHandle (TPM_RC_H + TPM_RC_1) -# define RC_ECDH_ZGen_inPoint (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ECDH_ZGen(ECDH_ZGen_In* in, ECDH_ZGen_Out* out); - -# endif // _ECDH_ZGen_FP_H_ -#endif // CC_ECDH_ZGen diff --git a/TPMCmd/tpm/include/prototypes/EC_Ephemeral_fp.h b/TPMCmd/tpm/include/prototypes/EC_Ephemeral_fp.h deleted file mode 100644 index 718b90b2..00000000 --- a/TPMCmd/tpm/include/prototypes/EC_Ephemeral_fp.h +++ /dev/null @@ -1,66 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_EC_Ephemeral // Command must be enabled - -# ifndef _EC_Ephemeral_FP_H_ -# define _EC_Ephemeral_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_ECC_CURVE curveID; -} EC_Ephemeral_In; - -// Output structure definition -typedef struct -{ - TPM2B_ECC_POINT Q; - UINT16 counter; -} EC_Ephemeral_Out; - -// Response code modifiers -# define RC_EC_Ephemeral_curveID (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_EC_Ephemeral(EC_Ephemeral_In* in, EC_Ephemeral_Out* out); - -# endif // _EC_Ephemeral_FP_H_ -#endif // CC_EC_Ephemeral diff --git a/TPMCmd/tpm/include/prototypes/EncryptDecrypt2_fp.h b/TPMCmd/tpm/include/prototypes/EncryptDecrypt2_fp.h deleted file mode 100644 index 831f808e..00000000 --- a/TPMCmd/tpm/include/prototypes/EncryptDecrypt2_fp.h +++ /dev/null @@ -1,74 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_EncryptDecrypt2 // Command must be enabled - -# ifndef _Encrypt_Decrypt2_FP_H_ -# define _Encrypt_Decrypt2_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyHandle; - TPM2B_MAX_BUFFER inData; - TPMI_YES_NO decrypt; - TPMI_ALG_CIPHER_MODE mode; - TPM2B_IV ivIn; -} EncryptDecrypt2_In; - -// Output structure definition -typedef struct -{ - TPM2B_MAX_BUFFER outData; - TPM2B_IV ivOut; -} EncryptDecrypt2_Out; - -// Response code modifiers -# define RC_EncryptDecrypt2_keyHandle (TPM_RC_H + TPM_RC_1) -# define RC_EncryptDecrypt2_inData (TPM_RC_P + TPM_RC_1) -# define RC_EncryptDecrypt2_decrypt (TPM_RC_P + TPM_RC_2) -# define RC_EncryptDecrypt2_mode (TPM_RC_P + TPM_RC_3) -# define RC_EncryptDecrypt2_ivIn (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_EncryptDecrypt2(EncryptDecrypt2_In* in, EncryptDecrypt2_Out* out); - -# endif // _Encrypt_Decrypt2_FP_H_ -#endif // CC_EncryptDecrypt2 diff --git a/TPMCmd/tpm/include/prototypes/EncryptDecrypt_fp.h b/TPMCmd/tpm/include/prototypes/EncryptDecrypt_fp.h deleted file mode 100644 index b8046e97..00000000 --- a/TPMCmd/tpm/include/prototypes/EncryptDecrypt_fp.h +++ /dev/null @@ -1,74 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_EncryptDecrypt // Command must be enabled - -# ifndef _Encrypt_Decrypt_FP_H_ -# define _Encrypt_Decrypt_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyHandle; - TPMI_YES_NO decrypt; - TPMI_ALG_CIPHER_MODE mode; - TPM2B_IV ivIn; - TPM2B_MAX_BUFFER inData; -} EncryptDecrypt_In; - -// Output structure definition -typedef struct -{ - TPM2B_MAX_BUFFER outData; - TPM2B_IV ivOut; -} EncryptDecrypt_Out; - -// Response code modifiers -# define RC_EncryptDecrypt_keyHandle (TPM_RC_H + TPM_RC_1) -# define RC_EncryptDecrypt_decrypt (TPM_RC_P + TPM_RC_1) -# define RC_EncryptDecrypt_mode (TPM_RC_P + TPM_RC_2) -# define RC_EncryptDecrypt_ivIn (TPM_RC_P + TPM_RC_3) -# define RC_EncryptDecrypt_inData (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_EncryptDecrypt(EncryptDecrypt_In* in, EncryptDecrypt_Out* out); - -# endif // _Encrypt_Decrypt_FP_H_ -#endif // CC_EncryptDecrypt diff --git a/TPMCmd/tpm/include/prototypes/EncryptDecrypt_spt_fp.h b/TPMCmd/tpm/include/prototypes/EncryptDecrypt_spt_fp.h deleted file mode 100644 index e015c3ed..00000000 --- a/TPMCmd/tpm/include/prototypes/EncryptDecrypt_spt_fp.h +++ /dev/null @@ -1,62 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:18PM - */ - -#ifndef _ENCRYPT_DECRYPT_SPT_FP_H_ -#define _ENCRYPT_DECRYPT_SPT_FP_H_ - -#if CC_EncryptDecrypt2 - -// Return Type: TPM_RC -// TPM_RC_KEY is not a symmetric decryption key with both -// public and private portions loaded -// TPM_RC_SIZE 'IvIn' size is incompatible with the block cipher mode; -// or 'inData' size is not an even multiple of the block -// size for CBC or ECB mode -// TPM_RC_VALUE 'keyHandle' is restricted and the argument 'mode' does -// not match the key's mode -TPM_RC -EncryptDecryptShared(TPMI_DH_OBJECT keyHandleIn, - TPMI_YES_NO decryptIn, - TPMI_ALG_SYM_MODE modeIn, - TPM2B_IV* ivIn, - TPM2B_MAX_BUFFER* inData, - EncryptDecrypt_Out* out); -#endif // CC_EncryptDecrypt - -#endif // _ENCRYPT_DECRYPT_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Entity_fp.h b/TPMCmd/tpm/include/prototypes/Entity_fp.h deleted file mode 100644 index f9489164..00000000 --- a/TPMCmd/tpm/include/prototypes/Entity_fp.h +++ /dev/null @@ -1,102 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 7, 2020 Time: 07:19:36PM - */ - -#ifndef _ENTITY_FP_H_ -#define _ENTITY_FP_H_ - -//** Functions -//*** EntityGetLoadStatus() -// This function will check that all the handles access loaded entities. -// Return Type: TPM_RC -// TPM_RC_HANDLE handle type does not match -// TPM_RC_REFERENCE_Hx entity is not present -// TPM_RC_HIERARCHY entity belongs to a disabled hierarchy -// TPM_RC_OBJECT_MEMORY handle is an evict object but there is no -// space to load it to RAM -TPM_RC -EntityGetLoadStatus(COMMAND* command // IN/OUT: command parsing structure -); - -//*** EntityGetAuthValue() -// This function is used to access the 'authValue' associated with a handle. -// This function assumes that the handle references an entity that is accessible -// and the handle is not for a persistent objects. That is EntityGetLoadStatus() -// should have been called. Also, the accessibility of the authValue should have -// been verified by IsAuthValueAvailable(). -// -// This function copies the authorization value of the entity to 'auth'. -// Return Type: UINT16 -// count number of bytes in the authValue with 0's stripped -UINT16 -EntityGetAuthValue(TPMI_DH_ENTITY handle, // IN: handle of entity - TPM2B_AUTH* auth // OUT: authValue of the entity -); - -//*** EntityGetAuthPolicy() -// This function is used to access the 'authPolicy' associated with a handle. -// This function assumes that the handle references an entity that is accessible -// and the handle is not for a persistent objects. That is EntityGetLoadStatus() -// should have been called. Also, the accessibility of the authPolicy should have -// been verified by IsAuthPolicyAvailable(). -// -// This function copies the authorization policy of the entity to 'authPolicy'. -// -// The return value is the hash algorithm for the policy. -TPMI_ALG_HASH -EntityGetAuthPolicy(TPMI_DH_ENTITY handle, // IN: handle of entity - TPM2B_DIGEST* authPolicy // OUT: authPolicy of the entity -); - -//*** EntityGetName() -// This function returns the Name associated with a handle. -TPM2B_NAME* EntityGetName(TPMI_DH_ENTITY handle, // IN: handle of entity - TPM2B_NAME* name // OUT: name of entity -); - -//*** EntityGetHierarchy() -// This function returns the hierarchy handle associated with an entity. -// a) A handle that is a hierarchy handle is associated with itself. -// b) An NV index belongs to TPM_RH_PLATFORM if TPMA_NV_PLATFORMCREATE, -// is SET, otherwise it belongs to TPM_RH_OWNER -// c) An object handle belongs to its hierarchy. -TPMI_RH_HIERARCHY -EntityGetHierarchy(TPMI_DH_ENTITY handle // IN :handle of entity -); - -#endif // _ENTITY_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/EventSequenceComplete_fp.h b/TPMCmd/tpm/include/prototypes/EventSequenceComplete_fp.h deleted file mode 100644 index 31bf37c8..00000000 --- a/TPMCmd/tpm/include/prototypes/EventSequenceComplete_fp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_EventSequenceComplete // Command must be enabled - -# ifndef _Event_Sequence_Complete_FP_H_ -# define _Event_Sequence_Complete_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_PCR pcrHandle; - TPMI_DH_OBJECT sequenceHandle; - TPM2B_MAX_BUFFER buffer; -} EventSequenceComplete_In; - -// Output structure definition -typedef struct -{ - TPML_DIGEST_VALUES results; -} EventSequenceComplete_Out; - -// Response code modifiers -# define RC_EventSequenceComplete_pcrHandle (TPM_RC_H + TPM_RC_1) -# define RC_EventSequenceComplete_sequenceHandle (TPM_RC_H + TPM_RC_2) -# define RC_EventSequenceComplete_buffer (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_EventSequenceComplete(EventSequenceComplete_In* in, - EventSequenceComplete_Out* out); - -# endif // _Event_Sequence_Complete_FP_H_ -#endif // CC_EventSequenceComplete diff --git a/TPMCmd/tpm/include/prototypes/EvictControl_fp.h b/TPMCmd/tpm/include/prototypes/EvictControl_fp.h deleted file mode 100644 index 1bdfbd56..00000000 --- a/TPMCmd/tpm/include/prototypes/EvictControl_fp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_EvictControl // Command must be enabled - -# ifndef _Evict_Control_FP_H_ -# define _Evict_Control_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PROVISION auth; - TPMI_DH_OBJECT objectHandle; - TPMI_DH_PERSISTENT persistentHandle; -} EvictControl_In; - -// Response code modifiers -# define RC_EvictControl_auth (TPM_RC_H + TPM_RC_1) -# define RC_EvictControl_objectHandle (TPM_RC_H + TPM_RC_2) -# define RC_EvictControl_persistentHandle (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_EvictControl(EvictControl_In* in); - -# endif // _Evict_Control_FP_H_ -#endif // CC_EvictControl diff --git a/TPMCmd/tpm/include/prototypes/ExecCommand_fp.h b/TPMCmd/tpm/include/prototypes/ExecCommand_fp.h deleted file mode 100644 index f438eb5a..00000000 --- a/TPMCmd/tpm/include/prototypes/ExecCommand_fp.h +++ /dev/null @@ -1,87 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _EXEC_COMMAND_FP_H_ -#define _EXEC_COMMAND_FP_H_ - -//** ExecuteCommand() -// -// The function performs the following steps. -// -// a) Parses the command header from input buffer. -// b) Calls ParseHandleBuffer() to parse the handle area of the command. -// c) Validates that each of the handles references a loaded entity. -// d) Calls ParseSessionBuffer () to: -// 1) unmarshal and parse the session area; -// 2) check the authorizations; and -// 3) when necessary, decrypt a parameter. -// e) Calls CommandDispatcher() to: -// 1) unmarshal the command parameters from the command buffer; -// 2) call the routine that performs the command actions; and -// 3) marshal the responses into the response buffer. -// f) If any error occurs in any of the steps above create the error response -// and return. -// g) Calls BuildResponseSession() to: -// 1) when necessary, encrypt a parameter -// 2) build the response authorization sessions -// 3) update the audit sessions and nonces -// h) Calls BuildResponseHeader() to complete the construction of the response. -// -// 'responseSize' is set by the caller to the maximum number of bytes available in -// the output buffer. ExecuteCommand will adjust the value and return the number -// of bytes placed in the buffer. -// -// 'response' is also set by the caller to indicate the buffer into which -// ExecuteCommand is to place the response. -// -// 'request' and 'response' may point to the same buffer -// -// Note: As of February, 2016, the failure processing has been moved to the -// platform-specific code. When the TPM code encounters an unrecoverable failure, it -// will SET g_inFailureMode and call _plat__Fail(). That function should not return -// but may call ExecuteCommand(). -// -LIB_EXPORT void ExecuteCommand( - uint32_t requestSize, // IN: command buffer size - unsigned char* request, // IN: command buffer - uint32_t* responseSize, // IN/OUT: response buffer size - unsigned char** response // IN/OUT: response buffer -); - -#endif // _EXEC_COMMAND_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/FieldUpgradeData_fp.h b/TPMCmd/tpm/include/prototypes/FieldUpgradeData_fp.h deleted file mode 100644 index 2f3a2d19..00000000 --- a/TPMCmd/tpm/include/prototypes/FieldUpgradeData_fp.h +++ /dev/null @@ -1,66 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_FieldUpgradeData // Command must be enabled - -# ifndef _Field_Upgrade_Data_FP_H_ -# define _Field_Upgrade_Data_FP_H_ - -// Input structure definition -typedef struct -{ - TPM2B_MAX_BUFFER fuData; -} FieldUpgradeData_In; - -// Output structure definition -typedef struct -{ - TPMT_HA nextDigest; - TPMT_HA firstDigest; -} FieldUpgradeData_Out; - -// Response code modifiers -# define RC_FieldUpgradeData_fuData (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_FieldUpgradeData(FieldUpgradeData_In* in, FieldUpgradeData_Out* out); - -# endif // _Field_Upgrade_Data_FP_H_ -#endif // CC_FieldUpgradeData diff --git a/TPMCmd/tpm/include/prototypes/FieldUpgradeStart_fp.h b/TPMCmd/tpm/include/prototypes/FieldUpgradeStart_fp.h deleted file mode 100644 index 536d4ee0..00000000 --- a/TPMCmd/tpm/include/prototypes/FieldUpgradeStart_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_FieldUpgradeStart // Command must be enabled - -# ifndef _Field_Upgrade_Start_FP_H_ -# define _Field_Upgrade_Start_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PLATFORM authorization; - TPMI_DH_OBJECT keyHandle; - TPM2B_DIGEST fuDigest; - TPMT_SIGNATURE manifestSignature; -} FieldUpgradeStart_In; - -// Response code modifiers -# define RC_FieldUpgradeStart_authorization (TPM_RC_H + TPM_RC_1) -# define RC_FieldUpgradeStart_keyHandle (TPM_RC_H + TPM_RC_2) -# define RC_FieldUpgradeStart_fuDigest (TPM_RC_P + TPM_RC_1) -# define RC_FieldUpgradeStart_manifestSignature (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_FieldUpgradeStart(FieldUpgradeStart_In* in); - -# endif // _Field_Upgrade_Start_FP_H_ -#endif // CC_FieldUpgradeStart diff --git a/TPMCmd/tpm/include/prototypes/FirmwareRead_fp.h b/TPMCmd/tpm/include/prototypes/FirmwareRead_fp.h deleted file mode 100644 index 189c9849..00000000 --- a/TPMCmd/tpm/include/prototypes/FirmwareRead_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_FirmwareRead // Command must be enabled - -# ifndef _Firmware_Read_FP_H_ -# define _Firmware_Read_FP_H_ - -// Input structure definition -typedef struct -{ - UINT32 sequenceNumber; -} FirmwareRead_In; - -// Output structure definition -typedef struct -{ - TPM2B_MAX_BUFFER fuData; -} FirmwareRead_Out; - -// Response code modifiers -# define RC_FirmwareRead_sequenceNumber (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_FirmwareRead(FirmwareRead_In* in, FirmwareRead_Out* out); - -# endif // _Firmware_Read_FP_H_ -#endif // CC_FirmwareRead diff --git a/TPMCmd/tpm/include/prototypes/FlushContext_fp.h b/TPMCmd/tpm/include/prototypes/FlushContext_fp.h deleted file mode 100644 index b93f47ba..00000000 --- a/TPMCmd/tpm/include/prototypes/FlushContext_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_FlushContext // Command must be enabled - -# ifndef _Flush_Context_FP_H_ -# define _Flush_Context_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_CONTEXT flushHandle; -} FlushContext_In; - -// Response code modifiers -# define RC_FlushContext_flushHandle (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_FlushContext(FlushContext_In* in); - -# endif // _Flush_Context_FP_H_ -#endif // CC_FlushContext diff --git a/TPMCmd/tpm/include/prototypes/GetCapability_fp.h b/TPMCmd/tpm/include/prototypes/GetCapability_fp.h deleted file mode 100644 index 60148d54..00000000 --- a/TPMCmd/tpm/include/prototypes/GetCapability_fp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_GetCapability // Command must be enabled - -# ifndef _Get_Capability_FP_H_ -# define _Get_Capability_FP_H_ - -// Input structure definition -typedef struct -{ - TPM_CAP capability; - UINT32 property; - UINT32 propertyCount; -} GetCapability_In; - -// Output structure definition -typedef struct -{ - TPMI_YES_NO moreData; - TPMS_CAPABILITY_DATA capabilityData; -} GetCapability_Out; - -// Response code modifiers -# define RC_GetCapability_capability (TPM_RC_P + TPM_RC_1) -# define RC_GetCapability_property (TPM_RC_P + TPM_RC_2) -# define RC_GetCapability_propertyCount (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_GetCapability(GetCapability_In* in, GetCapability_Out* out); - -# endif // _Get_Capability_FP_H_ -#endif // CC_GetCapability diff --git a/TPMCmd/tpm/include/prototypes/GetCommandAuditDigest_fp.h b/TPMCmd/tpm/include/prototypes/GetCommandAuditDigest_fp.h deleted file mode 100644 index 880c07a5..00000000 --- a/TPMCmd/tpm/include/prototypes/GetCommandAuditDigest_fp.h +++ /dev/null @@ -1,73 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_GetCommandAuditDigest // Command must be enabled - -# ifndef _Get_Command_Audit_Digest_FP_H_ -# define _Get_Command_Audit_Digest_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_ENDORSEMENT privacyHandle; - TPMI_DH_OBJECT signHandle; - TPM2B_DATA qualifyingData; - TPMT_SIG_SCHEME inScheme; -} GetCommandAuditDigest_In; - -// Output structure definition -typedef struct -{ - TPM2B_ATTEST auditInfo; - TPMT_SIGNATURE signature; -} GetCommandAuditDigest_Out; - -// Response code modifiers -# define RC_GetCommandAuditDigest_privacyHandle (TPM_RC_H + TPM_RC_1) -# define RC_GetCommandAuditDigest_signHandle (TPM_RC_H + TPM_RC_2) -# define RC_GetCommandAuditDigest_qualifyingData (TPM_RC_P + TPM_RC_1) -# define RC_GetCommandAuditDigest_inScheme (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_GetCommandAuditDigest(GetCommandAuditDigest_In* in, - GetCommandAuditDigest_Out* out); - -# endif // _Get_Command_Audit_Digest_FP_H_ -#endif // CC_GetCommandAuditDigest diff --git a/TPMCmd/tpm/include/prototypes/GetRandom_fp.h b/TPMCmd/tpm/include/prototypes/GetRandom_fp.h deleted file mode 100644 index 8a6e3ce9..00000000 --- a/TPMCmd/tpm/include/prototypes/GetRandom_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_GetRandom // Command must be enabled - -# ifndef _Get_Random_FP_H_ -# define _Get_Random_FP_H_ - -// Input structure definition -typedef struct -{ - UINT16 bytesRequested; -} GetRandom_In; - -// Output structure definition -typedef struct -{ - TPM2B_DIGEST randomBytes; -} GetRandom_Out; - -// Response code modifiers -# define RC_GetRandom_bytesRequested (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_GetRandom(GetRandom_In* in, GetRandom_Out* out); - -# endif // _Get_Random_FP_H_ -#endif // CC_GetRandom diff --git a/TPMCmd/tpm/include/prototypes/GetSessionAuditDigest_fp.h b/TPMCmd/tpm/include/prototypes/GetSessionAuditDigest_fp.h deleted file mode 100644 index f79e09d8..00000000 --- a/TPMCmd/tpm/include/prototypes/GetSessionAuditDigest_fp.h +++ /dev/null @@ -1,75 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_GetSessionAuditDigest // Command must be enabled - -# ifndef _Get_Session_Audit_Digest_FP_H_ -# define _Get_Session_Audit_Digest_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_ENDORSEMENT privacyAdminHandle; - TPMI_DH_OBJECT signHandle; - TPMI_SH_HMAC sessionHandle; - TPM2B_DATA qualifyingData; - TPMT_SIG_SCHEME inScheme; -} GetSessionAuditDigest_In; - -// Output structure definition -typedef struct -{ - TPM2B_ATTEST auditInfo; - TPMT_SIGNATURE signature; -} GetSessionAuditDigest_Out; - -// Response code modifiers -# define RC_GetSessionAuditDigest_privacyAdminHandle (TPM_RC_H + TPM_RC_1) -# define RC_GetSessionAuditDigest_signHandle (TPM_RC_H + TPM_RC_2) -# define RC_GetSessionAuditDigest_sessionHandle (TPM_RC_H + TPM_RC_3) -# define RC_GetSessionAuditDigest_qualifyingData (TPM_RC_P + TPM_RC_1) -# define RC_GetSessionAuditDigest_inScheme (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_GetSessionAuditDigest(GetSessionAuditDigest_In* in, - GetSessionAuditDigest_Out* out); - -# endif // _Get_Session_Audit_Digest_FP_H_ -#endif // CC_GetSessionAuditDigest diff --git a/TPMCmd/tpm/include/prototypes/GetTestResult_fp.h b/TPMCmd/tpm/include/prototypes/GetTestResult_fp.h deleted file mode 100644 index 9df305ae..00000000 --- a/TPMCmd/tpm/include/prototypes/GetTestResult_fp.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_GetTestResult // Command must be enabled - -# ifndef _Get_Test_Result_FP_H_ -# define _Get_Test_Result_FP_H_ - -// Output structure definition -typedef struct -{ - TPM2B_MAX_BUFFER outData; - TPM_RC testResult; -} GetTestResult_Out; - -// Function prototype -TPM_RC -TPM2_GetTestResult(GetTestResult_Out* out); - -# endif // _Get_Test_Result_FP_H_ -#endif // CC_GetTestResult diff --git a/TPMCmd/tpm/include/prototypes/GetTime_fp.h b/TPMCmd/tpm/include/prototypes/GetTime_fp.h deleted file mode 100644 index 2d5a33f5..00000000 --- a/TPMCmd/tpm/include/prototypes/GetTime_fp.h +++ /dev/null @@ -1,72 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_GetTime // Command must be enabled - -# ifndef _Get_Time_FP_H_ -# define _Get_Time_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_ENDORSEMENT privacyAdminHandle; - TPMI_DH_OBJECT signHandle; - TPM2B_DATA qualifyingData; - TPMT_SIG_SCHEME inScheme; -} GetTime_In; - -// Output structure definition -typedef struct -{ - TPM2B_ATTEST timeInfo; - TPMT_SIGNATURE signature; -} GetTime_Out; - -// Response code modifiers -# define RC_GetTime_privacyAdminHandle (TPM_RC_H + TPM_RC_1) -# define RC_GetTime_signHandle (TPM_RC_H + TPM_RC_2) -# define RC_GetTime_qualifyingData (TPM_RC_P + TPM_RC_1) -# define RC_GetTime_inScheme (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_GetTime(GetTime_In* in, GetTime_Out* out); - -# endif // _Get_Time_FP_H_ -#endif // CC_GetTime diff --git a/TPMCmd/tpm/include/prototypes/HMAC_Start_fp.h b/TPMCmd/tpm/include/prototypes/HMAC_Start_fp.h deleted file mode 100644 index 6bbde6e7..00000000 --- a/TPMCmd/tpm/include/prototypes/HMAC_Start_fp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_HMAC_Start // Command must be enabled - -# ifndef _HMAC_Start_FP_H_ -# define _HMAC_Start_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT handle; - TPM2B_AUTH auth; - TPMI_ALG_HASH hashAlg; -} HMAC_Start_In; - -// Output structure definition -typedef struct -{ - TPMI_DH_OBJECT sequenceHandle; -} HMAC_Start_Out; - -// Response code modifiers -# define RC_HMAC_Start_handle (TPM_RC_H + TPM_RC_1) -# define RC_HMAC_Start_auth (TPM_RC_P + TPM_RC_1) -# define RC_HMAC_Start_hashAlg (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_HMAC_Start(HMAC_Start_In* in, HMAC_Start_Out* out); - -# endif // _HMAC_Start_FP_H_ -#endif // CC_HMAC_Start diff --git a/TPMCmd/tpm/include/prototypes/HMAC_fp.h b/TPMCmd/tpm/include/prototypes/HMAC_fp.h deleted file mode 100644 index 3da7057e..00000000 --- a/TPMCmd/tpm/include/prototypes/HMAC_fp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_HMAC // Command must be enabled - -# ifndef _HMAC_FP_H_ -# define _HMAC_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT handle; - TPM2B_MAX_BUFFER buffer; - TPMI_ALG_HASH hashAlg; -} HMAC_In; - -// Output structure definition -typedef struct -{ - TPM2B_DIGEST outHMAC; -} HMAC_Out; - -// Response code modifiers -# define RC_HMAC_handle (TPM_RC_H + TPM_RC_1) -# define RC_HMAC_buffer (TPM_RC_P + TPM_RC_1) -# define RC_HMAC_hashAlg (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_HMAC(HMAC_In* in, HMAC_Out* out); - -# endif // _HMAC_FP_H_ -#endif // CC_HMAC diff --git a/TPMCmd/tpm/include/prototypes/Handle_fp.h b/TPMCmd/tpm/include/prototypes/Handle_fp.h deleted file mode 100644 index 420be74d..00000000 --- a/TPMCmd/tpm/include/prototypes/Handle_fp.h +++ /dev/null @@ -1,83 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _HANDLE_FP_H_ -#define _HANDLE_FP_H_ - -//*** HandleGetType() -// This function returns the type of a handle which is the MSO of the handle. -TPM_HT -HandleGetType(TPM_HANDLE handle // IN: a handle to be checked -); - -//*** NextPermanentHandle() -// This function returns the permanent handle that is equal to the input value or -// is the next higher value. If there is no handle with the input value and there -// is no next higher value, it returns 0: -TPM_HANDLE -NextPermanentHandle(TPM_HANDLE inHandle // IN: the handle to check -); - -//*** PermanentCapGetHandles() -// This function returns a list of the permanent handles of PCR, started from -// 'handle'. If 'handle' is larger than the largest permanent handle, an empty list -// will be returned with 'more' set to NO. -// Return Type: TPMI_YES_NO -// YES if there are more handles available -// NO all the available handles has been returned -TPMI_YES_NO -PermanentCapGetHandles(TPM_HANDLE handle, // IN: start handle - UINT32 count, // IN: count of returned handles - TPML_HANDLE* handleList // OUT: list of handle -); - -//*** PermanentHandleGetPolicy() -// This function returns a list of the permanent handles of PCR, started from -// 'handle'. If 'handle' is larger than the largest permanent handle, an empty list -// will be returned with 'more' set to NO. -// Return Type: TPMI_YES_NO -// YES if there are more handles available -// NO all the available handles has been returned -TPMI_YES_NO -PermanentHandleGetPolicy(TPM_HANDLE handle, // IN: start handle - UINT32 count, // IN: max count of returned handles - TPML_TAGGED_POLICY* policyList // OUT: list of handle -); - -#endif // _HANDLE_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/HashSequenceStart_fp.h b/TPMCmd/tpm/include/prototypes/HashSequenceStart_fp.h deleted file mode 100644 index 2687cf21..00000000 --- a/TPMCmd/tpm/include/prototypes/HashSequenceStart_fp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_HashSequenceStart // Command must be enabled - -# ifndef _Hash_Sequence_Start_FP_H_ -# define _Hash_Sequence_Start_FP_H_ - -// Input structure definition -typedef struct -{ - TPM2B_AUTH auth; - TPMI_ALG_HASH hashAlg; -} HashSequenceStart_In; - -// Output structure definition -typedef struct -{ - TPMI_DH_OBJECT sequenceHandle; -} HashSequenceStart_Out; - -// Response code modifiers -# define RC_HashSequenceStart_auth (TPM_RC_P + TPM_RC_1) -# define RC_HashSequenceStart_hashAlg (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_HashSequenceStart(HashSequenceStart_In* in, HashSequenceStart_Out* out); - -# endif // _Hash_Sequence_Start_FP_H_ -#endif // CC_HashSequenceStart diff --git a/TPMCmd/tpm/include/prototypes/Hash_fp.h b/TPMCmd/tpm/include/prototypes/Hash_fp.h deleted file mode 100644 index f3979906..00000000 --- a/TPMCmd/tpm/include/prototypes/Hash_fp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Hash // Command must be enabled - -# ifndef _Hash_FP_H_ -# define _Hash_FP_H_ - -// Input structure definition -typedef struct -{ - TPM2B_MAX_BUFFER data; - TPMI_ALG_HASH hashAlg; - TPMI_RH_HIERARCHY hierarchy; -} Hash_In; - -// Output structure definition -typedef struct -{ - TPM2B_DIGEST outHash; - TPMT_TK_HASHCHECK validation; -} Hash_Out; - -// Response code modifiers -# define RC_Hash_data (TPM_RC_P + TPM_RC_1) -# define RC_Hash_hashAlg (TPM_RC_P + TPM_RC_2) -# define RC_Hash_hierarchy (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_Hash(Hash_In* in, Hash_Out* out); - -# endif // _Hash_FP_H_ -#endif // CC_Hash diff --git a/TPMCmd/tpm/include/prototypes/HierarchyChangeAuth_fp.h b/TPMCmd/tpm/include/prototypes/HierarchyChangeAuth_fp.h deleted file mode 100644 index a6651750..00000000 --- a/TPMCmd/tpm/include/prototypes/HierarchyChangeAuth_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_HierarchyChangeAuth // Command must be enabled - -# ifndef _Hierarchy_Change_Auth_FP_H_ -# define _Hierarchy_Change_Auth_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_HIERARCHY_AUTH authHandle; - TPM2B_AUTH newAuth; -} HierarchyChangeAuth_In; - -// Response code modifiers -# define RC_HierarchyChangeAuth_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_HierarchyChangeAuth_newAuth (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_HierarchyChangeAuth(HierarchyChangeAuth_In* in); - -# endif // _Hierarchy_Change_Auth_FP_H_ -#endif // CC_HierarchyChangeAuth diff --git a/TPMCmd/tpm/include/prototypes/HierarchyControl_fp.h b/TPMCmd/tpm/include/prototypes/HierarchyControl_fp.h deleted file mode 100644 index a2f2df11..00000000 --- a/TPMCmd/tpm/include/prototypes/HierarchyControl_fp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_HierarchyControl // Command must be enabled - -# ifndef _Hierarchy_Control_FP_H_ -# define _Hierarchy_Control_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_HIERARCHY authHandle; - TPMI_RH_ENABLES enable; - TPMI_YES_NO state; -} HierarchyControl_In; - -// Response code modifiers -# define RC_HierarchyControl_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_HierarchyControl_enable (TPM_RC_P + TPM_RC_1) -# define RC_HierarchyControl_state (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_HierarchyControl(HierarchyControl_In* in); - -# endif // _Hierarchy_Control_FP_H_ -#endif // CC_HierarchyControl diff --git a/TPMCmd/tpm/include/prototypes/Hierarchy_fp.h b/TPMCmd/tpm/include/prototypes/Hierarchy_fp.h deleted file mode 100644 index 032a165d..00000000 --- a/TPMCmd/tpm/include/prototypes/Hierarchy_fp.h +++ /dev/null @@ -1,76 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 04:23:27PM - */ - -#ifndef _HIERARCHY_FP_H_ -#define _HIERARCHY_FP_H_ - -//*** HierarchyPreInstall() -// This function performs the initialization functions for the hierarchy -// when the TPM is simulated. This function should not be called if the -// TPM is not in a manufacturing mode at the manufacturer, or in a simulated -// environment. -void HierarchyPreInstall_Init(void); - -//*** HierarchyStartup() -// This function is called at TPM2_Startup() to initialize the hierarchy -// related values. -BOOL HierarchyStartup(STARTUP_TYPE type // IN: start up type -); - -//*** HierarchyGetProof() -// This function finds the proof value associated with a hierarchy.It returns a -// pointer to the proof value. -TPM2B_PROOF* HierarchyGetProof(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy constant -); - -//*** HierarchyGetPrimarySeed() -// This function returns the primary seed of a hierarchy. -TPM2B_SEED* HierarchyGetPrimarySeed(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy -); - -//*** HierarchyIsEnabled() -// This function checks to see if a hierarchy is enabled. -// NOTE: The TPM_RH_NULL hierarchy is always enabled. -// Return Type: BOOL -// TRUE(1) hierarchy is enabled -// FALSE(0) hierarchy is disabled -BOOL HierarchyIsEnabled(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy -); - -#endif // _HIERARCHY_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Import_fp.h b/TPMCmd/tpm/include/prototypes/Import_fp.h deleted file mode 100644 index c9e2475f..00000000 --- a/TPMCmd/tpm/include/prototypes/Import_fp.h +++ /dev/null @@ -1,75 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Import // Command must be enabled - -# ifndef _Import_FP_H_ -# define _Import_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT parentHandle; - TPM2B_DATA encryptionKey; - TPM2B_PUBLIC objectPublic; - TPM2B_PRIVATE duplicate; - TPM2B_ENCRYPTED_SECRET inSymSeed; - TPMT_SYM_DEF_OBJECT symmetricAlg; -} Import_In; - -// Output structure definition -typedef struct -{ - TPM2B_PRIVATE outPrivate; -} Import_Out; - -// Response code modifiers -# define RC_Import_parentHandle (TPM_RC_H + TPM_RC_1) -# define RC_Import_encryptionKey (TPM_RC_P + TPM_RC_1) -# define RC_Import_objectPublic (TPM_RC_P + TPM_RC_2) -# define RC_Import_duplicate (TPM_RC_P + TPM_RC_3) -# define RC_Import_inSymSeed (TPM_RC_P + TPM_RC_4) -# define RC_Import_symmetricAlg (TPM_RC_P + TPM_RC_5) - -// Function prototype -TPM_RC -TPM2_Import(Import_In* in, Import_Out* out); - -# endif // _Import_FP_H_ -#endif // CC_Import diff --git a/TPMCmd/tpm/include/prototypes/IncrementalSelfTest_fp.h b/TPMCmd/tpm/include/prototypes/IncrementalSelfTest_fp.h deleted file mode 100644 index 23352ed3..00000000 --- a/TPMCmd/tpm/include/prototypes/IncrementalSelfTest_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_IncrementalSelfTest // Command must be enabled - -# ifndef _Incremental_Self_Test_FP_H_ -# define _Incremental_Self_Test_FP_H_ - -// Input structure definition -typedef struct -{ - TPML_ALG toTest; -} IncrementalSelfTest_In; - -// Output structure definition -typedef struct -{ - TPML_ALG toDoList; -} IncrementalSelfTest_Out; - -// Response code modifiers -# define RC_IncrementalSelfTest_toTest (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_IncrementalSelfTest(IncrementalSelfTest_In* in, IncrementalSelfTest_Out* out); - -# endif // _Incremental_Self_Test_FP_H_ -#endif // CC_IncrementalSelfTest diff --git a/TPMCmd/tpm/include/prototypes/IoBuffers_fp.h b/TPMCmd/tpm/include/prototypes/IoBuffers_fp.h deleted file mode 100644 index d2d79636..00000000 --- a/TPMCmd/tpm/include/prototypes/IoBuffers_fp.h +++ /dev/null @@ -1,74 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _IO_BUFFERS_FP_H_ -#define _IO_BUFFERS_FP_H_ - -//*** MemoryIoBufferAllocationReset() -// This function is used to reset the allocation of buffers. -void MemoryIoBufferAllocationReset(void); - -//*** MemoryIoBufferZero() -// Function zeros the action I/O buffer at the end of a command. Calling this is -// not mandatory for proper functionality. -void MemoryIoBufferZero(void); - -//*** MemoryGetInBuffer() -// This function returns the address of the buffer into which the -// command parameters will be unmarshaled in preparation for calling -// the command actions. -BYTE* MemoryGetInBuffer(UINT32 size // Size, in bytes, required for the input - // unmarshaling -); - -//*** MemoryGetOutBuffer() -// This function returns the address of the buffer into which the command -// action code places its output values. -BYTE* MemoryGetOutBuffer(UINT32 size // required size of the buffer -); - -//*** IsLabelProperlyFormatted() -// This function checks that a label is a null-terminated string. -// NOTE: this function is here because there was no better place for it. -// Return Type: BOOL -// TRUE(1) string is null terminated -// FALSE(0) string is not null terminated -BOOL IsLabelProperlyFormatted(TPM2B* x); - -#endif // _IO_BUFFERS_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/LoadExternal_fp.h b/TPMCmd/tpm/include/prototypes/LoadExternal_fp.h deleted file mode 100644 index 377ff8d2..00000000 --- a/TPMCmd/tpm/include/prototypes/LoadExternal_fp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_LoadExternal // Command must be enabled - -# ifndef _Load_External_FP_H_ -# define _Load_External_FP_H_ - -// Input structure definition -typedef struct -{ - TPM2B_SENSITIVE inPrivate; - TPM2B_PUBLIC inPublic; - TPMI_RH_HIERARCHY hierarchy; -} LoadExternal_In; - -// Output structure definition -typedef struct -{ - TPM_HANDLE objectHandle; - TPM2B_NAME name; -} LoadExternal_Out; - -// Response code modifiers -# define RC_LoadExternal_inPrivate (TPM_RC_P + TPM_RC_1) -# define RC_LoadExternal_inPublic (TPM_RC_P + TPM_RC_2) -# define RC_LoadExternal_hierarchy (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_LoadExternal(LoadExternal_In* in, LoadExternal_Out* out); - -# endif // _Load_External_FP_H_ -#endif // CC_LoadExternal diff --git a/TPMCmd/tpm/include/prototypes/Load_fp.h b/TPMCmd/tpm/include/prototypes/Load_fp.h deleted file mode 100644 index babd2531..00000000 --- a/TPMCmd/tpm/include/prototypes/Load_fp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Load // Command must be enabled - -# ifndef _Load_FP_H_ -# define _Load_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT parentHandle; - TPM2B_PRIVATE inPrivate; - TPM2B_PUBLIC inPublic; -} Load_In; - -// Output structure definition -typedef struct -{ - TPM_HANDLE objectHandle; - TPM2B_NAME name; -} Load_Out; - -// Response code modifiers -# define RC_Load_parentHandle (TPM_RC_H + TPM_RC_1) -# define RC_Load_inPrivate (TPM_RC_P + TPM_RC_1) -# define RC_Load_inPublic (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_Load(Load_In* in, Load_Out* out); - -# endif // _Load_FP_H_ -#endif // CC_Load diff --git a/TPMCmd/tpm/include/prototypes/Locality_fp.h b/TPMCmd/tpm/include/prototypes/Locality_fp.h deleted file mode 100644 index 5843a39d..00000000 --- a/TPMCmd/tpm/include/prototypes/Locality_fp.h +++ /dev/null @@ -1,52 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _LOCALITY_FP_H_ -#define _LOCALITY_FP_H_ - -//** LocalityGetAttributes() -// This function will convert a locality expressed as an integer into -// TPMA_LOCALITY form. -// -// The function returns the locality attribute. -TPMA_LOCALITY -LocalityGetAttributes(UINT8 locality // IN: locality value -); - -#endif // _LOCALITY_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/MAC_Start_fp.h b/TPMCmd/tpm/include/prototypes/MAC_Start_fp.h deleted file mode 100644 index 80a58a4e..00000000 --- a/TPMCmd/tpm/include/prototypes/MAC_Start_fp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_MAC_Start // Command must be enabled - -# ifndef _MAC_Start_FP_H_ -# define _MAC_Start_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT handle; - TPM2B_AUTH auth; - TPMI_ALG_MAC_SCHEME inScheme; -} MAC_Start_In; - -// Output structure definition -typedef struct -{ - TPMI_DH_OBJECT sequenceHandle; -} MAC_Start_Out; - -// Response code modifiers -# define RC_MAC_Start_handle (TPM_RC_H + TPM_RC_1) -# define RC_MAC_Start_auth (TPM_RC_P + TPM_RC_1) -# define RC_MAC_Start_inScheme (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_MAC_Start(MAC_Start_In* in, MAC_Start_Out* out); - -# endif // _MAC_Start_FP_H_ -#endif // CC_MAC_Start diff --git a/TPMCmd/tpm/include/prototypes/MAC_fp.h b/TPMCmd/tpm/include/prototypes/MAC_fp.h deleted file mode 100644 index 07e2785a..00000000 --- a/TPMCmd/tpm/include/prototypes/MAC_fp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_MAC // Command must be enabled - -# ifndef _MAC_FP_H_ -# define _MAC_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT handle; - TPM2B_MAX_BUFFER buffer; - TPMI_ALG_MAC_SCHEME inScheme; -} MAC_In; - -// Output structure definition -typedef struct -{ - TPM2B_DIGEST outMAC; -} MAC_Out; - -// Response code modifiers -# define RC_MAC_handle (TPM_RC_H + TPM_RC_1) -# define RC_MAC_buffer (TPM_RC_P + TPM_RC_1) -# define RC_MAC_inScheme (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_MAC(MAC_In* in, MAC_Out* out); - -# endif // _MAC_FP_H_ -#endif // CC_MAC diff --git a/TPMCmd/tpm/include/prototypes/MakeCredential_fp.h b/TPMCmd/tpm/include/prototypes/MakeCredential_fp.h deleted file mode 100644 index cbec15c0..00000000 --- a/TPMCmd/tpm/include/prototypes/MakeCredential_fp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_MakeCredential // Command must be enabled - -# ifndef _Make_Credential_FP_H_ -# define _Make_Credential_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT handle; - TPM2B_DIGEST credential; - TPM2B_NAME objectName; -} MakeCredential_In; - -// Output structure definition -typedef struct -{ - TPM2B_ID_OBJECT credentialBlob; - TPM2B_ENCRYPTED_SECRET secret; -} MakeCredential_Out; - -// Response code modifiers -# define RC_MakeCredential_handle (TPM_RC_H + TPM_RC_1) -# define RC_MakeCredential_credential (TPM_RC_P + TPM_RC_1) -# define RC_MakeCredential_objectName (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_MakeCredential(MakeCredential_In* in, MakeCredential_Out* out); - -# endif // _Make_Credential_FP_H_ -#endif // CC_MakeCredential diff --git a/TPMCmd/tpm/include/prototypes/Manufacture_fp.h b/TPMCmd/tpm/include/prototypes/Manufacture_fp.h deleted file mode 100644 index 328e87b3..00000000 --- a/TPMCmd/tpm/include/prototypes/Manufacture_fp.h +++ /dev/null @@ -1,73 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 4, 2020 Time: 02:36:44PM - */ - -#ifndef _MANUFACTURE_FP_H_ -#define _MANUFACTURE_FP_H_ - -//*** TPM_Manufacture() -// This function initializes the TPM values in preparation for the TPM's first -// use. This function will fail if previously called. The TPM can be re-manufactured -// by calling TPM_Teardown() first and then calling this function again. -// Return Type: int -// -1 failure -// 0 success -// 1 manufacturing process previously performed -LIB_EXPORT int TPM_Manufacture( - int firstTime // IN: indicates if this is the first call from - // main() -); - -//*** TPM_TearDown() -// This function prepares the TPM for re-manufacture. It should not be implemented -// in anything other than a simulated TPM. -// -// In this implementation, all that is needs is to stop the cryptographic units -// and set a flag to indicate that the TPM can be re-manufactured. This should -// be all that is necessary to start the manufacturing process again. -// Return Type: int -// 0 success -// 1 TPM not previously manufactured -LIB_EXPORT int TPM_TearDown(void); - -//*** TpmEndSimulation() -// This function is called at the end of the simulation run. It is used to provoke -// printing of any statistics that might be needed. -LIB_EXPORT void TpmEndSimulation(void); - -#endif // _MANUFACTURE_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Marshal_fp.h b/TPMCmd/tpm/include/prototypes/Marshal_fp.h deleted file mode 100644 index 81bed003..00000000 --- a/TPMCmd/tpm/include/prototypes/Marshal_fp.h +++ /dev/null @@ -1,2345 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmMarshal; Version 4.1 Dec 10, 2018 - * Date: Mar 6, 2020 Time: 01:50:10PM - */ - -#ifndef _MARSHAL_FP_H_ -#define _MARSHAL_FP_H_ - -// Table 2:3 - Definition of Base Types -// UINT8 definition from table 2:3 -TPM_RC -UINT8_Unmarshal(UINT8* target, BYTE** buffer, INT32* size); -UINT16 -UINT8_Marshal(UINT8* source, BYTE** buffer, INT32* size); - -// BYTE definition from table 2:3 -#if !USE_MARSHALING_DEFINES -TPM_RC -BYTE_Unmarshal(BYTE* target, BYTE** buffer, INT32* size); -#else -# define BYTE_Unmarshal(target, buffer, size) \ - UINT8_Unmarshal((UINT8*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -BYTE_Marshal(BYTE* source, BYTE** buffer, INT32* size); -#else -# define BYTE_Marshal(source, buffer, size) \ - UINT8_Marshal((UINT8*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// INT8 definition from table 2:3 -#if !USE_MARSHALING_DEFINES -TPM_RC -INT8_Unmarshal(INT8* target, BYTE** buffer, INT32* size); -#else -# define INT8_Unmarshal(target, buffer, size) \ - UINT8_Unmarshal((UINT8*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -INT8_Marshal(INT8* source, BYTE** buffer, INT32* size); -#else -# define INT8_Marshal(source, buffer, size) \ - UINT8_Marshal((UINT8*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// UINT16 definition from table 2:3 -TPM_RC -UINT16_Unmarshal(UINT16* target, BYTE** buffer, INT32* size); -UINT16 -UINT16_Marshal(UINT16* source, BYTE** buffer, INT32* size); - -// INT16 definition from table 2:3 -#if !USE_MARSHALING_DEFINES -TPM_RC -INT16_Unmarshal(INT16* target, BYTE** buffer, INT32* size); -#else -# define INT16_Unmarshal(target, buffer, size) \ - UINT16_Unmarshal((UINT16*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -INT16_Marshal(INT16* source, BYTE** buffer, INT32* size); -#else -# define INT16_Marshal(source, buffer, size) \ - UINT16_Marshal((UINT16*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// UINT32 definition from table 2:3 -TPM_RC -UINT32_Unmarshal(UINT32* target, BYTE** buffer, INT32* size); -UINT16 -UINT32_Marshal(UINT32* source, BYTE** buffer, INT32* size); - -// INT32 definition from table 2:3 -#if !USE_MARSHALING_DEFINES -TPM_RC -INT32_Unmarshal(INT32* target, BYTE** buffer, INT32* size); -#else -# define INT32_Unmarshal(target, buffer, size) \ - UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -INT32_Marshal(INT32* source, BYTE** buffer, INT32* size); -#else -# define INT32_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// UINT64 definition from table 2:3 -TPM_RC -UINT64_Unmarshal(UINT64* target, BYTE** buffer, INT32* size); -UINT16 -UINT64_Marshal(UINT64* source, BYTE** buffer, INT32* size); - -// INT64 definition from table 2:3 -#if !USE_MARSHALING_DEFINES -TPM_RC -INT64_Unmarshal(INT64* target, BYTE** buffer, INT32* size); -#else -# define INT64_Unmarshal(target, buffer, size) \ - UINT64_Unmarshal((UINT64*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -INT64_Marshal(INT64* source, BYTE** buffer, INT32* size); -#else -# define INT64_Marshal(source, buffer, size) \ - UINT64_Marshal((UINT64*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:4 - Defines for Logic Values -// Table 2:5 - Definition of Types for Documentation Clarity -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_ALGORITHM_ID_Unmarshal(TPM_ALGORITHM_ID* target, BYTE** buffer, INT32* size); -#else -# define TPM_ALGORITHM_ID_Unmarshal(target, buffer, size) \ - UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_ALGORITHM_ID_Marshal(TPM_ALGORITHM_ID* source, BYTE** buffer, INT32* size); -#else -# define TPM_ALGORITHM_ID_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_MODIFIER_INDICATOR_Unmarshal( - TPM_MODIFIER_INDICATOR* target, BYTE** buffer, INT32* size); -#else -# define TPM_MODIFIER_INDICATOR_Unmarshal(target, buffer, size) \ - UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_MODIFIER_INDICATOR_Marshal( - TPM_MODIFIER_INDICATOR* source, BYTE** buffer, INT32* size); -#else -# define TPM_MODIFIER_INDICATOR_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_AUTHORIZATION_SIZE_Unmarshal( - TPM_AUTHORIZATION_SIZE* target, BYTE** buffer, INT32* size); -#else -# define TPM_AUTHORIZATION_SIZE_Unmarshal(target, buffer, size) \ - UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_AUTHORIZATION_SIZE_Marshal( - TPM_AUTHORIZATION_SIZE* source, BYTE** buffer, INT32* size); -#else -# define TPM_AUTHORIZATION_SIZE_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_PARAMETER_SIZE_Unmarshal(TPM_PARAMETER_SIZE* target, BYTE** buffer, INT32* size); -#else -# define TPM_PARAMETER_SIZE_Unmarshal(target, buffer, size) \ - UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_PARAMETER_SIZE_Marshal(TPM_PARAMETER_SIZE* source, BYTE** buffer, INT32* size); -#else -# define TPM_PARAMETER_SIZE_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_KEY_SIZE_Unmarshal(TPM_KEY_SIZE* target, BYTE** buffer, INT32* size); -#else -# define TPM_KEY_SIZE_Unmarshal(target, buffer, size) \ - UINT16_Unmarshal((UINT16*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_KEY_SIZE_Marshal(TPM_KEY_SIZE* source, BYTE** buffer, INT32* size); -#else -# define TPM_KEY_SIZE_Marshal(source, buffer, size) \ - UINT16_Marshal((UINT16*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_KEY_BITS_Unmarshal(TPM_KEY_BITS* target, BYTE** buffer, INT32* size); -#else -# define TPM_KEY_BITS_Unmarshal(target, buffer, size) \ - UINT16_Unmarshal((UINT16*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_KEY_BITS_Marshal(TPM_KEY_BITS* source, BYTE** buffer, INT32* size); -#else -# define TPM_KEY_BITS_Marshal(source, buffer, size) \ - UINT16_Marshal((UINT16*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:6 - Definition of TPM_SPEC Constants -// Table 2:7 - Definition of TPM_CONSTANTS32 Constants -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_CONSTANTS32_Marshal(TPM_CONSTANTS32* source, BYTE** buffer, INT32* size); -#else -# define TPM_CONSTANTS32_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:9 - Definition of TPM_ALG_ID Constants -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_ALG_ID_Unmarshal(TPM_ALG_ID* target, BYTE** buffer, INT32* size); -#else -# define TPM_ALG_ID_Unmarshal(target, buffer, size) \ - UINT16_Unmarshal((UINT16*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_ALG_ID_Marshal(TPM_ALG_ID* source, BYTE** buffer, INT32* size); -#else -# define TPM_ALG_ID_Marshal(source, buffer, size) \ - UINT16_Marshal((UINT16*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:10 - Definition of TPM_ECC_CURVE Constants -#if ALG_ECC -TPM_RC -TPM_ECC_CURVE_Unmarshal(TPM_ECC_CURVE* target, BYTE** buffer, INT32* size); -# if !USE_MARSHALING_DEFINES -UINT16 -TPM_ECC_CURVE_Marshal(TPM_ECC_CURVE* source, BYTE** buffer, INT32* size); -# else -# define TPM_ECC_CURVE_Marshal(source, buffer, size) \ - UINT16_Marshal((UINT16*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_ECC - -// Table 2:12 - Definition of TPM_CC Constants -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_CC_Unmarshal(TPM_CC* target, BYTE** buffer, INT32* size); -#else -# define TPM_CC_Unmarshal(target, buffer, size) \ - UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_CC_Marshal(TPM_CC* source, BYTE** buffer, INT32* size); -#else -# define TPM_CC_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:16 - Definition of TPM_RC Constants -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_RC_Marshal(TPM_RC* source, BYTE** buffer, INT32* size); -#else -# define TPM_RC_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:17 - Definition of TPM_CLOCK_ADJUST Constants -TPM_RC -TPM_CLOCK_ADJUST_Unmarshal(TPM_CLOCK_ADJUST* target, BYTE** buffer, INT32* size); - -// Table 2:18 - Definition of TPM_EO Constants -TPM_RC -TPM_EO_Unmarshal(TPM_EO* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_EO_Marshal(TPM_EO* source, BYTE** buffer, INT32* size); -#else -# define TPM_EO_Marshal(source, buffer, size) \ - UINT16_Marshal((UINT16*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:19 - Definition of TPM_ST Constants -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_ST_Unmarshal(TPM_ST* target, BYTE** buffer, INT32* size); -#else -# define TPM_ST_Unmarshal(target, buffer, size) \ - UINT16_Unmarshal((UINT16*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_ST_Marshal(TPM_ST* source, BYTE** buffer, INT32* size); -#else -# define TPM_ST_Marshal(source, buffer, size) \ - UINT16_Marshal((UINT16*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:20 - Definition of TPM_SU Constants -TPM_RC -TPM_SU_Unmarshal(TPM_SU* target, BYTE** buffer, INT32* size); - -// Table 2:21 - Definition of TPM_SE Constants -TPM_RC -TPM_SE_Unmarshal(TPM_SE* target, BYTE** buffer, INT32* size); - -// Table 2:22 - Definition of TPM_CAP Constants -TPM_RC -TPM_CAP_Unmarshal(TPM_CAP* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_CAP_Marshal(TPM_CAP* source, BYTE** buffer, INT32* size); -#else -# define TPM_CAP_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:23 - Definition of TPM_PT Constants -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_PT_Unmarshal(TPM_PT* target, BYTE** buffer, INT32* size); -#else -# define TPM_PT_Unmarshal(target, buffer, size) \ - UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_PT_Marshal(TPM_PT* source, BYTE** buffer, INT32* size); -#else -# define TPM_PT_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:24 - Definition of TPM_PT_PCR Constants -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_PT_PCR_Unmarshal(TPM_PT_PCR* target, BYTE** buffer, INT32* size); -#else -# define TPM_PT_PCR_Unmarshal(target, buffer, size) \ - UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_PT_PCR_Marshal(TPM_PT_PCR* source, BYTE** buffer, INT32* size); -#else -# define TPM_PT_PCR_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:25 - Definition of TPM_PS Constants -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_PS_Marshal(TPM_PS* source, BYTE** buffer, INT32* size); -#else -# define TPM_PS_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:26 - Definition of Types for Handles -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_HANDLE_Unmarshal(TPM_HANDLE* target, BYTE** buffer, INT32* size); -#else -# define TPM_HANDLE_Unmarshal(target, buffer, size) \ - UINT32_Unmarshal((UINT32*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_HANDLE_Marshal(TPM_HANDLE* source, BYTE** buffer, INT32* size); -#else -# define TPM_HANDLE_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:27 - Definition of TPM_HT Constants -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_HT_Unmarshal(TPM_HT* target, BYTE** buffer, INT32* size); -#else -# define TPM_HT_Unmarshal(target, buffer, size) \ - UINT8_Unmarshal((UINT8*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_HT_Marshal(TPM_HT* source, BYTE** buffer, INT32* size); -#else -# define TPM_HT_Marshal(source, buffer, size) \ - UINT8_Marshal((UINT8*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:28 - Definition of TPM_RH Constants -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_RH_Unmarshal(TPM_RH* target, BYTE** buffer, INT32* size); -#else -# define TPM_RH_Unmarshal(target, buffer, size) \ - TPM_HANDLE_Unmarshal((TPM_HANDLE*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_RH_Marshal(TPM_RH* source, BYTE** buffer, INT32* size); -#else -# define TPM_RH_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:29 - Definition of TPM_HC Constants -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM_HC_Unmarshal(TPM_HC* target, BYTE** buffer, INT32* size); -#else -# define TPM_HC_Unmarshal(target, buffer, size) \ - TPM_HANDLE_Unmarshal((TPM_HANDLE*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_HC_Marshal(TPM_HC* source, BYTE** buffer, INT32* size); -#else -# define TPM_HC_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:30 - Definition of TPMA_ALGORITHM Bits -TPM_RC -TPMA_ALGORITHM_Unmarshal(TPMA_ALGORITHM* target, BYTE** buffer, INT32* size); - -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_ALGORITHM_Marshal(TPMA_ALGORITHM* source, BYTE** buffer, INT32* size); -#else -# define TPMA_ALGORITHM_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:31 - Definition of TPMA_OBJECT Bits -TPM_RC -TPMA_OBJECT_Unmarshal(TPMA_OBJECT* target, BYTE** buffer, INT32* size); - -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_OBJECT_Marshal(TPMA_OBJECT* source, BYTE** buffer, INT32* size); -#else -# define TPMA_OBJECT_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:32 - Definition of TPMA_SESSION Bits -TPM_RC -TPMA_SESSION_Unmarshal(TPMA_SESSION* target, BYTE** buffer, INT32* size); - -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_SESSION_Marshal(TPMA_SESSION* source, BYTE** buffer, INT32* size); -#else -# define TPMA_SESSION_Marshal(source, buffer, size) \ - UINT8_Marshal((UINT8*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:33 - Definition of TPMA_LOCALITY Bits -#if !USE_MARSHALING_DEFINES -TPM_RC -TPMA_LOCALITY_Unmarshal(TPMA_LOCALITY* target, BYTE** buffer, INT32* size); -#else -# define TPMA_LOCALITY_Unmarshal(target, buffer, size) \ - UINT8_Unmarshal((UINT8*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_LOCALITY_Marshal(TPMA_LOCALITY* source, BYTE** buffer, INT32* size); -#else -# define TPMA_LOCALITY_Marshal(source, buffer, size) \ - UINT8_Marshal((UINT8*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:34 - Definition of TPMA_PERMANENT Bits -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_PERMANENT_Marshal(TPMA_PERMANENT* source, BYTE** buffer, INT32* size); -#else -# define TPMA_PERMANENT_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:35 - Definition of TPMA_STARTUP_CLEAR Bits -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_STARTUP_CLEAR_Marshal(TPMA_STARTUP_CLEAR* source, BYTE** buffer, INT32* size); -#else -# define TPMA_STARTUP_CLEAR_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:36 - Definition of TPMA_MEMORY Bits -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_MEMORY_Marshal(TPMA_MEMORY* source, BYTE** buffer, INT32* size); -#else -# define TPMA_MEMORY_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:37 - Definition of TPMA_CC Bits -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_CC_Marshal(TPMA_CC* source, BYTE** buffer, INT32* size); -#else -# define TPMA_CC_Marshal(source, buffer, size) \ - TPM_CC_Marshal((TPM_CC*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:38 - Definition of TPMA_MODES Bits -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_MODES_Marshal(TPMA_MODES* source, BYTE** buffer, INT32* size); -#else -# define TPMA_MODES_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:39 - Definition of TPMA_X509_KEY_USAGE Bits -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_X509_KEY_USAGE_Marshal(TPMA_X509_KEY_USAGE* source, BYTE** buffer, INT32* size); -#else -# define TPMA_X509_KEY_USAGE_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:40 - Definition of TPMA_ACT Bits -TPM_RC -TPMA_ACT_Unmarshal(TPMA_ACT* target, BYTE** buffer, INT32* size); - -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_ACT_Marshal(TPMA_ACT* source, BYTE** buffer, INT32* size); -#else -# define TPMA_ACT_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:41 - Definition of TPMI_YES_NO Type -TPM_RC -TPMI_YES_NO_Unmarshal(TPMI_YES_NO* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_YES_NO_Marshal(TPMI_YES_NO* source, BYTE** buffer, INT32* size); -#else -# define TPMI_YES_NO_Marshal(source, buffer, size) \ - BYTE_Marshal((BYTE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:42 - Definition of TPMI_DH_OBJECT Type -TPM_RC -TPMI_DH_OBJECT_Unmarshal( - TPMI_DH_OBJECT* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_DH_OBJECT_Marshal(TPMI_DH_OBJECT* source, BYTE** buffer, INT32* size); -#else -# define TPMI_DH_OBJECT_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:43 - Definition of TPMI_DH_PARENT Type -TPM_RC -TPMI_DH_PARENT_Unmarshal( - TPMI_DH_PARENT* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_DH_PARENT_Marshal(TPMI_DH_PARENT* source, BYTE** buffer, INT32* size); -#else -# define TPMI_DH_PARENT_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:44 - Definition of TPMI_DH_PERSISTENT Type -TPM_RC -TPMI_DH_PERSISTENT_Unmarshal(TPMI_DH_PERSISTENT* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_DH_PERSISTENT_Marshal(TPMI_DH_PERSISTENT* source, BYTE** buffer, INT32* size); -#else -# define TPMI_DH_PERSISTENT_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:45 - Definition of TPMI_DH_ENTITY Type -TPM_RC -TPMI_DH_ENTITY_Unmarshal( - TPMI_DH_ENTITY* target, BYTE** buffer, INT32* size, BOOL flag); - -// Table 2:46 - Definition of TPMI_DH_PCR Type -TPM_RC -TPMI_DH_PCR_Unmarshal(TPMI_DH_PCR* target, BYTE** buffer, INT32* size, BOOL flag); - -// Table 2:47 - Definition of TPMI_SH_AUTH_SESSION Type -TPM_RC -TPMI_SH_AUTH_SESSION_Unmarshal( - TPMI_SH_AUTH_SESSION* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_SH_AUTH_SESSION_Marshal( - TPMI_SH_AUTH_SESSION* source, BYTE** buffer, INT32* size); -#else -# define TPMI_SH_AUTH_SESSION_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:48 - Definition of TPMI_SH_HMAC Type -TPM_RC -TPMI_SH_HMAC_Unmarshal(TPMI_SH_HMAC* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_SH_HMAC_Marshal(TPMI_SH_HMAC* source, BYTE** buffer, INT32* size); -#else -# define TPMI_SH_HMAC_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:49 - Definition of TPMI_SH_POLICY Type -TPM_RC -TPMI_SH_POLICY_Unmarshal(TPMI_SH_POLICY* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_SH_POLICY_Marshal(TPMI_SH_POLICY* source, BYTE** buffer, INT32* size); -#else -# define TPMI_SH_POLICY_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:50 - Definition of TPMI_DH_CONTEXT Type -TPM_RC -TPMI_DH_CONTEXT_Unmarshal(TPMI_DH_CONTEXT* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_DH_CONTEXT_Marshal(TPMI_DH_CONTEXT* source, BYTE** buffer, INT32* size); -#else -# define TPMI_DH_CONTEXT_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:51 - Definition of TPMI_DH_SAVED Type -TPM_RC -TPMI_DH_SAVED_Unmarshal(TPMI_DH_SAVED* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_DH_SAVED_Marshal(TPMI_DH_SAVED* source, BYTE** buffer, INT32* size); -#else -# define TPMI_DH_SAVED_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:52 - Definition of TPMI_RH_HIERARCHY Type -TPM_RC -TPMI_RH_HIERARCHY_Unmarshal( - TPMI_RH_HIERARCHY* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_RH_HIERARCHY_Marshal(TPMI_RH_HIERARCHY* source, BYTE** buffer, INT32* size); -#else -# define TPMI_RH_HIERARCHY_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:53 - Definition of TPMI_RH_ENABLES Type -TPM_RC -TPMI_RH_ENABLES_Unmarshal( - TPMI_RH_ENABLES* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_RH_ENABLES_Marshal(TPMI_RH_ENABLES* source, BYTE** buffer, INT32* size); -#else -# define TPMI_RH_ENABLES_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:54 - Definition of TPMI_RH_HIERARCHY_AUTH Type -TPM_RC -TPMI_RH_HIERARCHY_AUTH_Unmarshal( - TPMI_RH_HIERARCHY_AUTH* target, BYTE** buffer, INT32* size); - -// Table 2:55 - Definition of TPMI_RH_HIERARCHY_POLICY Type -TPM_RC -TPMI_RH_HIERARCHY_POLICY_Unmarshal( - TPMI_RH_HIERARCHY_POLICY* target, BYTE** buffer, INT32* size); - -// Table 2:56 - Definition of TPMI_RH_PLATFORM Type -TPM_RC -TPMI_RH_PLATFORM_Unmarshal(TPMI_RH_PLATFORM* target, BYTE** buffer, INT32* size); - -// Table 2:57 - Definition of TPMI_RH_OWNER Type -TPM_RC -TPMI_RH_OWNER_Unmarshal(TPMI_RH_OWNER* target, BYTE** buffer, INT32* size, BOOL flag); - -// Table 2:58 - Definition of TPMI_RH_ENDORSEMENT Type -TPM_RC -TPMI_RH_ENDORSEMENT_Unmarshal( - TPMI_RH_ENDORSEMENT* target, BYTE** buffer, INT32* size, BOOL flag); - -// Table 2:59 - Definition of TPMI_RH_PROVISION Type -TPM_RC -TPMI_RH_PROVISION_Unmarshal(TPMI_RH_PROVISION* target, BYTE** buffer, INT32* size); - -// Table 2:60 - Definition of TPMI_RH_CLEAR Type -TPM_RC -TPMI_RH_CLEAR_Unmarshal(TPMI_RH_CLEAR* target, BYTE** buffer, INT32* size); - -// Table 2:61 - Definition of TPMI_RH_NV_AUTH Type -TPM_RC -TPMI_RH_NV_AUTH_Unmarshal(TPMI_RH_NV_AUTH* target, BYTE** buffer, INT32* size); - -// Table 2:62 - Definition of TPMI_RH_LOCKOUT Type -TPM_RC -TPMI_RH_LOCKOUT_Unmarshal(TPMI_RH_LOCKOUT* target, BYTE** buffer, INT32* size); - -// Table 2:63 - Definition of TPMI_RH_NV_INDEX Type -TPM_RC -TPMI_RH_NV_INDEX_Unmarshal(TPMI_RH_NV_INDEX* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_RH_NV_INDEX_Marshal(TPMI_RH_NV_INDEX* source, BYTE** buffer, INT32* size); -#else -# define TPMI_RH_NV_INDEX_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:64 - Definition of TPMI_RH_AC Type -TPM_RC -TPMI_RH_AC_Unmarshal(TPMI_RH_AC* target, BYTE** buffer, INT32* size); - -// Table 2:65 - Definition of TPMI_RH_ACT Type -TPM_RC -TPMI_RH_ACT_Unmarshal(TPMI_RH_ACT* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_RH_ACT_Marshal(TPMI_RH_ACT* source, BYTE** buffer, INT32* size); -#else -# define TPMI_RH_ACT_Marshal(source, buffer, size) \ - TPM_HANDLE_Marshal((TPM_HANDLE*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:66 - Definition of TPMI_ALG_HASH Type -TPM_RC -TPMI_ALG_HASH_Unmarshal(TPMI_ALG_HASH* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_HASH_Marshal(TPMI_ALG_HASH* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_HASH_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:67 - Definition of TPMI_ALG_ASYM Type -TPM_RC -TPMI_ALG_ASYM_Unmarshal(TPMI_ALG_ASYM* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_ASYM_Marshal(TPMI_ALG_ASYM* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_ASYM_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:68 - Definition of TPMI_ALG_SYM Type -TPM_RC -TPMI_ALG_SYM_Unmarshal(TPMI_ALG_SYM* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_SYM_Marshal(TPMI_ALG_SYM* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_SYM_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:69 - Definition of TPMI_ALG_SYM_OBJECT Type -TPM_RC -TPMI_ALG_SYM_OBJECT_Unmarshal( - TPMI_ALG_SYM_OBJECT* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_SYM_OBJECT_Marshal(TPMI_ALG_SYM_OBJECT* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_SYM_OBJECT_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:70 - Definition of TPMI_ALG_SYM_MODE Type -TPM_RC -TPMI_ALG_SYM_MODE_Unmarshal( - TPMI_ALG_SYM_MODE* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_SYM_MODE_Marshal(TPMI_ALG_SYM_MODE* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_SYM_MODE_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:71 - Definition of TPMI_ALG_KDF Type -TPM_RC -TPMI_ALG_KDF_Unmarshal(TPMI_ALG_KDF* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_KDF_Marshal(TPMI_ALG_KDF* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_KDF_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:72 - Definition of TPMI_ALG_SIG_SCHEME Type -TPM_RC -TPMI_ALG_SIG_SCHEME_Unmarshal( - TPMI_ALG_SIG_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_SIG_SCHEME_Marshal(TPMI_ALG_SIG_SCHEME* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_SIG_SCHEME_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:73 - Definition of TPMI_ECC_KEY_EXCHANGE Type -#if ALG_ECC -TPM_RC -TPMI_ECC_KEY_EXCHANGE_Unmarshal( - TPMI_ECC_KEY_EXCHANGE* target, BYTE** buffer, INT32* size, BOOL flag); -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ECC_KEY_EXCHANGE_Marshal( - TPMI_ECC_KEY_EXCHANGE* source, BYTE** buffer, INT32* size); -# else -# define TPMI_ECC_KEY_EXCHANGE_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_ECC - -// Table 2:74 - Definition of TPMI_ST_COMMAND_TAG Type -TPM_RC -TPMI_ST_COMMAND_TAG_Unmarshal( - TPMI_ST_COMMAND_TAG* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ST_COMMAND_TAG_Marshal(TPMI_ST_COMMAND_TAG* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ST_COMMAND_TAG_Marshal(source, buffer, size) \ - TPM_ST_Marshal((TPM_ST*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:75 - Definition of TPMI_ALG_MAC_SCHEME Type -TPM_RC -TPMI_ALG_MAC_SCHEME_Unmarshal( - TPMI_ALG_MAC_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_MAC_SCHEME_Marshal(TPMI_ALG_MAC_SCHEME* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_MAC_SCHEME_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:76 - Definition of TPMI_ALG_CIPHER_MODE Type -TPM_RC -TPMI_ALG_CIPHER_MODE_Unmarshal( - TPMI_ALG_CIPHER_MODE* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_CIPHER_MODE_Marshal( - TPMI_ALG_CIPHER_MODE* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_CIPHER_MODE_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:77 - Definition of TPMS_EMPTY Structure -TPM_RC -TPMS_EMPTY_Unmarshal(TPMS_EMPTY* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_EMPTY_Marshal(TPMS_EMPTY* source, BYTE** buffer, INT32* size); - -// Table 2:78 - Definition of TPMS_ALGORITHM_DESCRIPTION Structure -UINT16 -TPMS_ALGORITHM_DESCRIPTION_Marshal( - TPMS_ALGORITHM_DESCRIPTION* source, BYTE** buffer, INT32* size); - -// Table 2:79 - Definition of TPMU_HA Union -TPM_RC -TPMU_HA_Unmarshal(TPMU_HA* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_HA_Marshal(TPMU_HA* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:80 - Definition of TPMT_HA Structure -TPM_RC -TPMT_HA_Unmarshal(TPMT_HA* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_HA_Marshal(TPMT_HA* source, BYTE** buffer, INT32* size); - -// Table 2:81 - Definition of TPM2B_DIGEST Structure -TPM_RC -TPM2B_DIGEST_Unmarshal(TPM2B_DIGEST* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_DIGEST_Marshal(TPM2B_DIGEST* source, BYTE** buffer, INT32* size); - -// Table 2:82 - Definition of TPM2B_DATA Structure -TPM_RC -TPM2B_DATA_Unmarshal(TPM2B_DATA* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_DATA_Marshal(TPM2B_DATA* source, BYTE** buffer, INT32* size); - -// Table 2:83 - Definition of Types for TPM2B_NONCE -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM2B_NONCE_Unmarshal(TPM2B_NONCE* target, BYTE** buffer, INT32* size); -#else -# define TPM2B_NONCE_Unmarshal(target, buffer, size) \ - TPM2B_DIGEST_Unmarshal((TPM2B_DIGEST*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM2B_NONCE_Marshal(TPM2B_NONCE* source, BYTE** buffer, INT32* size); -#else -# define TPM2B_NONCE_Marshal(source, buffer, size) \ - TPM2B_DIGEST_Marshal((TPM2B_DIGEST*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:84 - Definition of Types for TPM2B_AUTH -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM2B_AUTH_Unmarshal(TPM2B_AUTH* target, BYTE** buffer, INT32* size); -#else -# define TPM2B_AUTH_Unmarshal(target, buffer, size) \ - TPM2B_DIGEST_Unmarshal((TPM2B_DIGEST*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM2B_AUTH_Marshal(TPM2B_AUTH* source, BYTE** buffer, INT32* size); -#else -# define TPM2B_AUTH_Marshal(source, buffer, size) \ - TPM2B_DIGEST_Marshal((TPM2B_DIGEST*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:85 - Definition of Types for TPM2B_OPERAND -#if !USE_MARSHALING_DEFINES -TPM_RC -TPM2B_OPERAND_Unmarshal(TPM2B_OPERAND* target, BYTE** buffer, INT32* size); -#else -# define TPM2B_OPERAND_Unmarshal(target, buffer, size) \ - TPM2B_DIGEST_Unmarshal((TPM2B_DIGEST*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPM2B_OPERAND_Marshal(TPM2B_OPERAND* source, BYTE** buffer, INT32* size); -#else -# define TPM2B_OPERAND_Marshal(source, buffer, size) \ - TPM2B_DIGEST_Marshal((TPM2B_DIGEST*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:86 - Definition of TPM2B_EVENT Structure -TPM_RC -TPM2B_EVENT_Unmarshal(TPM2B_EVENT* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_EVENT_Marshal(TPM2B_EVENT* source, BYTE** buffer, INT32* size); - -// Table 2:87 - Definition of TPM2B_MAX_BUFFER Structure -TPM_RC -TPM2B_MAX_BUFFER_Unmarshal(TPM2B_MAX_BUFFER* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_MAX_BUFFER_Marshal(TPM2B_MAX_BUFFER* source, BYTE** buffer, INT32* size); - -// Table 2:88 - Definition of TPM2B_MAX_NV_BUFFER Structure -TPM_RC -TPM2B_MAX_NV_BUFFER_Unmarshal( - TPM2B_MAX_NV_BUFFER* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_MAX_NV_BUFFER_Marshal(TPM2B_MAX_NV_BUFFER* source, BYTE** buffer, INT32* size); - -// Table 2:89 - Definition of TPM2B_TIMEOUT Structure -TPM_RC -TPM2B_TIMEOUT_Unmarshal(TPM2B_TIMEOUT* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_TIMEOUT_Marshal(TPM2B_TIMEOUT* source, BYTE** buffer, INT32* size); - -// Table 2:90 - Definition of TPM2B_IV Structure -TPM_RC -TPM2B_IV_Unmarshal(TPM2B_IV* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_IV_Marshal(TPM2B_IV* source, BYTE** buffer, INT32* size); - -// Table 2:91 - Definition of TPMU_NAME Union -// Table 2:92 - Definition of TPM2B_NAME Structure -TPM_RC -TPM2B_NAME_Unmarshal(TPM2B_NAME* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_NAME_Marshal(TPM2B_NAME* source, BYTE** buffer, INT32* size); - -// Table 2:93 - Definition of TPMS_PCR_SELECT Structure -TPM_RC -TPMS_PCR_SELECT_Unmarshal(TPMS_PCR_SELECT* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_PCR_SELECT_Marshal(TPMS_PCR_SELECT* source, BYTE** buffer, INT32* size); - -// Table 2:94 - Definition of TPMS_PCR_SELECTION Structure -TPM_RC -TPMS_PCR_SELECTION_Unmarshal(TPMS_PCR_SELECTION* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_PCR_SELECTION_Marshal(TPMS_PCR_SELECTION* source, BYTE** buffer, INT32* size); - -// Table 2:97 - Definition of TPMT_TK_CREATION Structure -TPM_RC -TPMT_TK_CREATION_Unmarshal(TPMT_TK_CREATION* target, BYTE** buffer, INT32* size); -UINT16 -TPMT_TK_CREATION_Marshal(TPMT_TK_CREATION* source, BYTE** buffer, INT32* size); - -// Table 2:98 - Definition of TPMT_TK_VERIFIED Structure -TPM_RC -TPMT_TK_VERIFIED_Unmarshal(TPMT_TK_VERIFIED* target, BYTE** buffer, INT32* size); -UINT16 -TPMT_TK_VERIFIED_Marshal(TPMT_TK_VERIFIED* source, BYTE** buffer, INT32* size); - -// Table 2:99 - Definition of TPMT_TK_AUTH Structure -TPM_RC -TPMT_TK_AUTH_Unmarshal(TPMT_TK_AUTH* target, BYTE** buffer, INT32* size); -UINT16 -TPMT_TK_AUTH_Marshal(TPMT_TK_AUTH* source, BYTE** buffer, INT32* size); - -// Table 2:100 - Definition of TPMT_TK_HASHCHECK Structure -TPM_RC -TPMT_TK_HASHCHECK_Unmarshal(TPMT_TK_HASHCHECK* target, BYTE** buffer, INT32* size); -UINT16 -TPMT_TK_HASHCHECK_Marshal(TPMT_TK_HASHCHECK* source, BYTE** buffer, INT32* size); - -// Table 2:101 - Definition of TPMS_ALG_PROPERTY Structure -UINT16 -TPMS_ALG_PROPERTY_Marshal(TPMS_ALG_PROPERTY* source, BYTE** buffer, INT32* size); - -// Table 2:102 - Definition of TPMS_TAGGED_PROPERTY Structure -UINT16 -TPMS_TAGGED_PROPERTY_Marshal( - TPMS_TAGGED_PROPERTY* source, BYTE** buffer, INT32* size); - -// Table 2:103 - Definition of TPMS_TAGGED_PCR_SELECT Structure -UINT16 -TPMS_TAGGED_PCR_SELECT_Marshal( - TPMS_TAGGED_PCR_SELECT* source, BYTE** buffer, INT32* size); - -// Table 2:104 - Definition of TPMS_TAGGED_POLICY Structure -UINT16 -TPMS_TAGGED_POLICY_Marshal(TPMS_TAGGED_POLICY* source, BYTE** buffer, INT32* size); - -// Table 2:105 - Definition of TPMS_ACT_DATA Structure -UINT16 -TPMS_ACT_DATA_Marshal(TPMS_ACT_DATA* source, BYTE** buffer, INT32* size); - -// Table 2:106 - Definition of TPML_CC Structure -TPM_RC -TPML_CC_Unmarshal(TPML_CC* target, BYTE** buffer, INT32* size); -UINT16 -TPML_CC_Marshal(TPML_CC* source, BYTE** buffer, INT32* size); - -// Table 2:107 - Definition of TPML_CCA Structure -UINT16 -TPML_CCA_Marshal(TPML_CCA* source, BYTE** buffer, INT32* size); - -// Table 2:108 - Definition of TPML_ALG Structure -TPM_RC -TPML_ALG_Unmarshal(TPML_ALG* target, BYTE** buffer, INT32* size); -UINT16 -TPML_ALG_Marshal(TPML_ALG* source, BYTE** buffer, INT32* size); - -// Table 2:109 - Definition of TPML_HANDLE Structure -UINT16 -TPML_HANDLE_Marshal(TPML_HANDLE* source, BYTE** buffer, INT32* size); - -// Table 2:110 - Definition of TPML_DIGEST Structure -TPM_RC -TPML_DIGEST_Unmarshal(TPML_DIGEST* target, BYTE** buffer, INT32* size); -UINT16 -TPML_DIGEST_Marshal(TPML_DIGEST* source, BYTE** buffer, INT32* size); - -// Table 2:111 - Definition of TPML_DIGEST_VALUES Structure -TPM_RC -TPML_DIGEST_VALUES_Unmarshal(TPML_DIGEST_VALUES* target, BYTE** buffer, INT32* size); -UINT16 -TPML_DIGEST_VALUES_Marshal(TPML_DIGEST_VALUES* source, BYTE** buffer, INT32* size); - -// Table 2:112 - Definition of TPML_PCR_SELECTION Structure -TPM_RC -TPML_PCR_SELECTION_Unmarshal(TPML_PCR_SELECTION* target, BYTE** buffer, INT32* size); -UINT16 -TPML_PCR_SELECTION_Marshal(TPML_PCR_SELECTION* source, BYTE** buffer, INT32* size); - -// Table 2:113 - Definition of TPML_ALG_PROPERTY Structure -UINT16 -TPML_ALG_PROPERTY_Marshal(TPML_ALG_PROPERTY* source, BYTE** buffer, INT32* size); - -// Table 2:114 - Definition of TPML_TAGGED_TPM_PROPERTY Structure -UINT16 -TPML_TAGGED_TPM_PROPERTY_Marshal( - TPML_TAGGED_TPM_PROPERTY* source, BYTE** buffer, INT32* size); - -// Table 2:115 - Definition of TPML_TAGGED_PCR_PROPERTY Structure -UINT16 -TPML_TAGGED_PCR_PROPERTY_Marshal( - TPML_TAGGED_PCR_PROPERTY* source, BYTE** buffer, INT32* size); - -// Table 2:116 - Definition of TPML_ECC_CURVE Structure -#if ALG_ECC -UINT16 -TPML_ECC_CURVE_Marshal(TPML_ECC_CURVE* source, BYTE** buffer, INT32* size); -#endif // ALG_ECC - -// Table 2:117 - Definition of TPML_TAGGED_POLICY Structure -UINT16 -TPML_TAGGED_POLICY_Marshal(TPML_TAGGED_POLICY* source, BYTE** buffer, INT32* size); - -// Table 2:118 - Definition of TPML_ACT_DATA Structure -UINT16 -TPML_ACT_DATA_Marshal(TPML_ACT_DATA* source, BYTE** buffer, INT32* size); - -// Table 2:119 - Definition of TPMU_CAPABILITIES Union -UINT16 -TPMU_CAPABILITIES_Marshal( - TPMU_CAPABILITIES* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:120 - Definition of TPMS_CAPABILITY_DATA Structure -UINT16 -TPMS_CAPABILITY_DATA_Marshal( - TPMS_CAPABILITY_DATA* source, BYTE** buffer, INT32* size); - -// Table 2:121 - Definition of TPMS_CLOCK_INFO Structure -TPM_RC -TPMS_CLOCK_INFO_Unmarshal(TPMS_CLOCK_INFO* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_CLOCK_INFO_Marshal(TPMS_CLOCK_INFO* source, BYTE** buffer, INT32* size); - -// Table 2:122 - Definition of TPMS_TIME_INFO Structure -TPM_RC -TPMS_TIME_INFO_Unmarshal(TPMS_TIME_INFO* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_TIME_INFO_Marshal(TPMS_TIME_INFO* source, BYTE** buffer, INT32* size); - -// Table 2:123 - Definition of TPMS_TIME_ATTEST_INFO Structure -UINT16 -TPMS_TIME_ATTEST_INFO_Marshal( - TPMS_TIME_ATTEST_INFO* source, BYTE** buffer, INT32* size); - -// Table 2:124 - Definition of TPMS_CERTIFY_INFO Structure -UINT16 -TPMS_CERTIFY_INFO_Marshal(TPMS_CERTIFY_INFO* source, BYTE** buffer, INT32* size); - -// Table 2:125 - Definition of TPMS_QUOTE_INFO Structure -UINT16 -TPMS_QUOTE_INFO_Marshal(TPMS_QUOTE_INFO* source, BYTE** buffer, INT32* size); - -// Table 2:126 - Definition of TPMS_COMMAND_AUDIT_INFO Structure -UINT16 -TPMS_COMMAND_AUDIT_INFO_Marshal( - TPMS_COMMAND_AUDIT_INFO* source, BYTE** buffer, INT32* size); - -// Table 2:127 - Definition of TPMS_SESSION_AUDIT_INFO Structure -UINT16 -TPMS_SESSION_AUDIT_INFO_Marshal( - TPMS_SESSION_AUDIT_INFO* source, BYTE** buffer, INT32* size); - -// Table 2:128 - Definition of TPMS_CREATION_INFO Structure -UINT16 -TPMS_CREATION_INFO_Marshal(TPMS_CREATION_INFO* source, BYTE** buffer, INT32* size); - -// Table 2:129 - Definition of TPMS_NV_CERTIFY_INFO Structure -UINT16 -TPMS_NV_CERTIFY_INFO_Marshal( - TPMS_NV_CERTIFY_INFO* source, BYTE** buffer, INT32* size); - -// Table 2:130 - Definition of TPMS_NV_DIGEST_CERTIFY_INFO Structure -UINT16 -TPMS_NV_DIGEST_CERTIFY_INFO_Marshal( - TPMS_NV_DIGEST_CERTIFY_INFO* source, BYTE** buffer, INT32* size); - -// Table 2:131 - Definition of TPMI_ST_ATTEST Type -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ST_ATTEST_Marshal(TPMI_ST_ATTEST* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ST_ATTEST_Marshal(source, buffer, size) \ - TPM_ST_Marshal((TPM_ST*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:132 - Definition of TPMU_ATTEST Union -UINT16 -TPMU_ATTEST_Marshal(TPMU_ATTEST* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:133 - Definition of TPMS_ATTEST Structure -UINT16 -TPMS_ATTEST_Marshal(TPMS_ATTEST* source, BYTE** buffer, INT32* size); - -// Table 2:134 - Definition of TPM2B_ATTEST Structure -UINT16 -TPM2B_ATTEST_Marshal(TPM2B_ATTEST* source, BYTE** buffer, INT32* size); - -// Table 2:135 - Definition of TPMS_AUTH_COMMAND Structure -TPM_RC -TPMS_AUTH_COMMAND_Unmarshal(TPMS_AUTH_COMMAND* target, BYTE** buffer, INT32* size); - -// Table 2:136 - Definition of TPMS_AUTH_RESPONSE Structure -UINT16 -TPMS_AUTH_RESPONSE_Marshal(TPMS_AUTH_RESPONSE* source, BYTE** buffer, INT32* size); - -// Table 2:137 - Definition of TPMI_TDES_KEY_BITS Type -#if ALG_TDES -TPM_RC -TPMI_TDES_KEY_BITS_Unmarshal(TPMI_TDES_KEY_BITS* target, BYTE** buffer, INT32* size); -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_TDES_KEY_BITS_Marshal(TPMI_TDES_KEY_BITS* source, BYTE** buffer, INT32* size); -# else -# define TPMI_TDES_KEY_BITS_Marshal(source, buffer, size) \ - TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_TDES - -// Table 2:137 - Definition of TPMI_AES_KEY_BITS Type -#if ALG_AES -TPM_RC -TPMI_AES_KEY_BITS_Unmarshal(TPMI_AES_KEY_BITS* target, BYTE** buffer, INT32* size); -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_AES_KEY_BITS_Marshal(TPMI_AES_KEY_BITS* source, BYTE** buffer, INT32* size); -# else -# define TPMI_AES_KEY_BITS_Marshal(source, buffer, size) \ - TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_AES - -// Table 2:137 - Definition of TPMI_SM4_KEY_BITS Type -#if ALG_SM4 -TPM_RC -TPMI_SM4_KEY_BITS_Unmarshal(TPMI_SM4_KEY_BITS* target, BYTE** buffer, INT32* size); -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_SM4_KEY_BITS_Marshal(TPMI_SM4_KEY_BITS* source, BYTE** buffer, INT32* size); -# else -# define TPMI_SM4_KEY_BITS_Marshal(source, buffer, size) \ - TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_SM4 - -// Table 2:137 - Definition of TPMI_CAMELLIA_KEY_BITS Type -#if ALG_CAMELLIA -TPM_RC -TPMI_CAMELLIA_KEY_BITS_Unmarshal( - TPMI_CAMELLIA_KEY_BITS* target, BYTE** buffer, INT32* size); -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_CAMELLIA_KEY_BITS_Marshal( - TPMI_CAMELLIA_KEY_BITS* source, BYTE** buffer, INT32* size); -# else -# define TPMI_CAMELLIA_KEY_BITS_Marshal(source, buffer, size) \ - TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_CAMELLIA - -// Table 2:138 - Definition of TPMU_SYM_KEY_BITS Union -TPM_RC -TPMU_SYM_KEY_BITS_Unmarshal( - TPMU_SYM_KEY_BITS* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_SYM_KEY_BITS_Marshal( - TPMU_SYM_KEY_BITS* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:139 - Definition of TPMU_SYM_MODE Union -TPM_RC -TPMU_SYM_MODE_Unmarshal( - TPMU_SYM_MODE* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_SYM_MODE_Marshal( - TPMU_SYM_MODE* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:141 - Definition of TPMT_SYM_DEF Structure -TPM_RC -TPMT_SYM_DEF_Unmarshal(TPMT_SYM_DEF* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_SYM_DEF_Marshal(TPMT_SYM_DEF* source, BYTE** buffer, INT32* size); - -// Table 2:142 - Definition of TPMT_SYM_DEF_OBJECT Structure -TPM_RC -TPMT_SYM_DEF_OBJECT_Unmarshal( - TPMT_SYM_DEF_OBJECT* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_SYM_DEF_OBJECT_Marshal(TPMT_SYM_DEF_OBJECT* source, BYTE** buffer, INT32* size); - -// Table 2:143 - Definition of TPM2B_SYM_KEY Structure -TPM_RC -TPM2B_SYM_KEY_Unmarshal(TPM2B_SYM_KEY* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_SYM_KEY_Marshal(TPM2B_SYM_KEY* source, BYTE** buffer, INT32* size); - -// Table 2:144 - Definition of TPMS_SYMCIPHER_PARMS Structure -TPM_RC -TPMS_SYMCIPHER_PARMS_Unmarshal( - TPMS_SYMCIPHER_PARMS* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_SYMCIPHER_PARMS_Marshal( - TPMS_SYMCIPHER_PARMS* source, BYTE** buffer, INT32* size); - -// Table 2:145 - Definition of TPM2B_LABEL Structure -TPM_RC -TPM2B_LABEL_Unmarshal(TPM2B_LABEL* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_LABEL_Marshal(TPM2B_LABEL* source, BYTE** buffer, INT32* size); - -// Table 2:146 - Definition of TPMS_DERIVE Structure -TPM_RC -TPMS_DERIVE_Unmarshal(TPMS_DERIVE* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_DERIVE_Marshal(TPMS_DERIVE* source, BYTE** buffer, INT32* size); - -// Table 2:147 - Definition of TPM2B_DERIVE Structure -TPM_RC -TPM2B_DERIVE_Unmarshal(TPM2B_DERIVE* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_DERIVE_Marshal(TPM2B_DERIVE* source, BYTE** buffer, INT32* size); - -// Table 2:148 - Definition of TPMU_SENSITIVE_CREATE Union -// Table 2:149 - Definition of TPM2B_SENSITIVE_DATA Structure -TPM_RC -TPM2B_SENSITIVE_DATA_Unmarshal( - TPM2B_SENSITIVE_DATA* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_SENSITIVE_DATA_Marshal( - TPM2B_SENSITIVE_DATA* source, BYTE** buffer, INT32* size); - -// Table 2:150 - Definition of TPMS_SENSITIVE_CREATE Structure -TPM_RC -TPMS_SENSITIVE_CREATE_Unmarshal( - TPMS_SENSITIVE_CREATE* target, BYTE** buffer, INT32* size); - -// Table 2:151 - Definition of TPM2B_SENSITIVE_CREATE Structure -TPM_RC -TPM2B_SENSITIVE_CREATE_Unmarshal( - TPM2B_SENSITIVE_CREATE* target, BYTE** buffer, INT32* size); - -// Table 2:152 - Definition of TPMS_SCHEME_HASH Structure -TPM_RC -TPMS_SCHEME_HASH_Unmarshal(TPMS_SCHEME_HASH* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_SCHEME_HASH_Marshal(TPMS_SCHEME_HASH* source, BYTE** buffer, INT32* size); - -// Table 2:153 - Definition of TPMS_SCHEME_ECDAA Structure -#if ALG_ECC -TPM_RC -TPMS_SCHEME_ECDAA_Unmarshal(TPMS_SCHEME_ECDAA* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_SCHEME_ECDAA_Marshal(TPMS_SCHEME_ECDAA* source, BYTE** buffer, INT32* size); -#endif // ALG_ECC - -// Table 2:154 - Definition of TPMI_ALG_KEYEDHASH_SCHEME Type -TPM_RC -TPMI_ALG_KEYEDHASH_SCHEME_Unmarshal( - TPMI_ALG_KEYEDHASH_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_KEYEDHASH_SCHEME_Marshal( - TPMI_ALG_KEYEDHASH_SCHEME* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_KEYEDHASH_SCHEME_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:155 - Definition of Types for HMAC_SIG_SCHEME -#if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SCHEME_HMAC_Unmarshal(TPMS_SCHEME_HMAC* target, BYTE** buffer, INT32* size); -#else -# define TPMS_SCHEME_HMAC_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SCHEME_HMAC_Marshal(TPMS_SCHEME_HMAC* source, BYTE** buffer, INT32* size); -#else -# define TPMS_SCHEME_HMAC_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:156 - Definition of TPMS_SCHEME_XOR Structure -TPM_RC -TPMS_SCHEME_XOR_Unmarshal(TPMS_SCHEME_XOR* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_SCHEME_XOR_Marshal(TPMS_SCHEME_XOR* source, BYTE** buffer, INT32* size); - -// Table 2:157 - Definition of TPMU_SCHEME_KEYEDHASH Union -TPM_RC -TPMU_SCHEME_KEYEDHASH_Unmarshal( - TPMU_SCHEME_KEYEDHASH* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_SCHEME_KEYEDHASH_Marshal( - TPMU_SCHEME_KEYEDHASH* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:158 - Definition of TPMT_KEYEDHASH_SCHEME Structure -TPM_RC -TPMT_KEYEDHASH_SCHEME_Unmarshal( - TPMT_KEYEDHASH_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_KEYEDHASH_SCHEME_Marshal( - TPMT_KEYEDHASH_SCHEME* source, BYTE** buffer, INT32* size); - -// Table 2:159 - Definition of Types for RSA Signature Schemes -#if ALG_RSA -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIG_SCHEME_RSASSA_Unmarshal( - TPMS_SIG_SCHEME_RSASSA* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_RSASSA_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIG_SCHEME_RSASSA_Marshal( - TPMS_SIG_SCHEME_RSASSA* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_RSASSA_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIG_SCHEME_RSAPSS_Unmarshal( - TPMS_SIG_SCHEME_RSAPSS* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_RSAPSS_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIG_SCHEME_RSAPSS_Marshal( - TPMS_SIG_SCHEME_RSAPSS* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_RSAPSS_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_RSA - -// Table 2:160 - Definition of Types for ECC Signature Schemes -#if ALG_ECC -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIG_SCHEME_ECDSA_Unmarshal( - TPMS_SIG_SCHEME_ECDSA* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_ECDSA_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIG_SCHEME_ECDSA_Marshal( - TPMS_SIG_SCHEME_ECDSA* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_ECDSA_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIG_SCHEME_SM2_Unmarshal( - TPMS_SIG_SCHEME_SM2* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_SM2_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIG_SCHEME_SM2_Marshal(TPMS_SIG_SCHEME_SM2* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_SM2_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIG_SCHEME_ECSCHNORR_Unmarshal( - TPMS_SIG_SCHEME_ECSCHNORR* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_ECSCHNORR_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIG_SCHEME_ECSCHNORR_Marshal( - TPMS_SIG_SCHEME_ECSCHNORR* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_ECSCHNORR_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIG_SCHEME_ECDAA_Unmarshal( - TPMS_SIG_SCHEME_ECDAA* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_ECDAA_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_ECDAA_Unmarshal((TPMS_SCHEME_ECDAA*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIG_SCHEME_ECDAA_Marshal( - TPMS_SIG_SCHEME_ECDAA* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIG_SCHEME_ECDAA_Marshal(source, buffer, size) \ - TPMS_SCHEME_ECDAA_Marshal((TPMS_SCHEME_ECDAA*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_ECC - -// Table 2:161 - Definition of TPMU_SIG_SCHEME Union -TPM_RC -TPMU_SIG_SCHEME_Unmarshal( - TPMU_SIG_SCHEME* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_SIG_SCHEME_Marshal( - TPMU_SIG_SCHEME* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:162 - Definition of TPMT_SIG_SCHEME Structure -TPM_RC -TPMT_SIG_SCHEME_Unmarshal( - TPMT_SIG_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_SIG_SCHEME_Marshal(TPMT_SIG_SCHEME* source, BYTE** buffer, INT32* size); - -// Table 2:163 - Definition of Types for Encryption Schemes -#if ALG_RSA -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_ENC_SCHEME_OAEP_Unmarshal( - TPMS_ENC_SCHEME_OAEP* target, BYTE** buffer, INT32* size); -# else -# define TPMS_ENC_SCHEME_OAEP_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_ENC_SCHEME_OAEP_Marshal( - TPMS_ENC_SCHEME_OAEP* source, BYTE** buffer, INT32* size); -# else -# define TPMS_ENC_SCHEME_OAEP_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_ENC_SCHEME_RSAES_Unmarshal( - TPMS_ENC_SCHEME_RSAES* target, BYTE** buffer, INT32* size); -# else -# define TPMS_ENC_SCHEME_RSAES_Unmarshal(target, buffer, size) \ - TPMS_EMPTY_Unmarshal((TPMS_EMPTY*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_ENC_SCHEME_RSAES_Marshal( - TPMS_ENC_SCHEME_RSAES* source, BYTE** buffer, INT32* size); -# else -# define TPMS_ENC_SCHEME_RSAES_Marshal(source, buffer, size) \ - TPMS_EMPTY_Marshal((TPMS_EMPTY*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_RSA - -// Table 2:164 - Definition of Types for ECC Key Exchange -#if ALG_ECC -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_KEY_SCHEME_ECDH_Unmarshal( - TPMS_KEY_SCHEME_ECDH* target, BYTE** buffer, INT32* size); -# else -# define TPMS_KEY_SCHEME_ECDH_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_KEY_SCHEME_ECDH_Marshal( - TPMS_KEY_SCHEME_ECDH* source, BYTE** buffer, INT32* size); -# else -# define TPMS_KEY_SCHEME_ECDH_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_KEY_SCHEME_ECMQV_Unmarshal( - TPMS_KEY_SCHEME_ECMQV* target, BYTE** buffer, INT32* size); -# else -# define TPMS_KEY_SCHEME_ECMQV_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_KEY_SCHEME_ECMQV_Marshal( - TPMS_KEY_SCHEME_ECMQV* source, BYTE** buffer, INT32* size); -# else -# define TPMS_KEY_SCHEME_ECMQV_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_ECC - -// Table 2:165 - Definition of Types for KDF Schemes -#if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_KDF_SCHEME_MGF1_Unmarshal( - TPMS_KDF_SCHEME_MGF1* target, BYTE** buffer, INT32* size); -#else -# define TPMS_KDF_SCHEME_MGF1_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPMS_KDF_SCHEME_MGF1_Marshal( - TPMS_KDF_SCHEME_MGF1* source, BYTE** buffer, INT32* size); -#else -# define TPMS_KDF_SCHEME_MGF1_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_KDF_SCHEME_KDF1_SP800_56A_Unmarshal( - TPMS_KDF_SCHEME_KDF1_SP800_56A* target, BYTE** buffer, INT32* size); -#else -# define TPMS_KDF_SCHEME_KDF1_SP800_56A_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPMS_KDF_SCHEME_KDF1_SP800_56A_Marshal( - TPMS_KDF_SCHEME_KDF1_SP800_56A* source, BYTE** buffer, INT32* size); -#else -# define TPMS_KDF_SCHEME_KDF1_SP800_56A_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_KDF_SCHEME_KDF2_Unmarshal( - TPMS_KDF_SCHEME_KDF2* target, BYTE** buffer, INT32* size); -#else -# define TPMS_KDF_SCHEME_KDF2_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPMS_KDF_SCHEME_KDF2_Marshal( - TPMS_KDF_SCHEME_KDF2* source, BYTE** buffer, INT32* size); -#else -# define TPMS_KDF_SCHEME_KDF2_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_KDF_SCHEME_KDF1_SP800_108_Unmarshal( - TPMS_KDF_SCHEME_KDF1_SP800_108* target, BYTE** buffer, INT32* size); -#else -# define TPMS_KDF_SCHEME_KDF1_SP800_108_Unmarshal(target, buffer, size) \ - TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)(target), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES -#if !USE_MARSHALING_DEFINES -UINT16 -TPMS_KDF_SCHEME_KDF1_SP800_108_Marshal( - TPMS_KDF_SCHEME_KDF1_SP800_108* source, BYTE** buffer, INT32* size); -#else -# define TPMS_KDF_SCHEME_KDF1_SP800_108_Marshal(source, buffer, size) \ - TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:166 - Definition of TPMU_KDF_SCHEME Union -TPM_RC -TPMU_KDF_SCHEME_Unmarshal( - TPMU_KDF_SCHEME* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_KDF_SCHEME_Marshal( - TPMU_KDF_SCHEME* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:167 - Definition of TPMT_KDF_SCHEME Structure -TPM_RC -TPMT_KDF_SCHEME_Unmarshal( - TPMT_KDF_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_KDF_SCHEME_Marshal(TPMT_KDF_SCHEME* source, BYTE** buffer, INT32* size); - -// Table 2:168 - Definition of TPMI_ALG_ASYM_SCHEME Type -TPM_RC -TPMI_ALG_ASYM_SCHEME_Unmarshal( - TPMI_ALG_ASYM_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_ASYM_SCHEME_Marshal( - TPMI_ALG_ASYM_SCHEME* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_ASYM_SCHEME_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:169 - Definition of TPMU_ASYM_SCHEME Union -TPM_RC -TPMU_ASYM_SCHEME_Unmarshal( - TPMU_ASYM_SCHEME* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_ASYM_SCHEME_Marshal( - TPMU_ASYM_SCHEME* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:170 - Definition of TPMT_ASYM_SCHEME Structure -// Table 2:171 - Definition of TPMI_ALG_RSA_SCHEME Type -#if ALG_RSA -TPM_RC -TPMI_ALG_RSA_SCHEME_Unmarshal( - TPMI_ALG_RSA_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_RSA_SCHEME_Marshal(TPMI_ALG_RSA_SCHEME* source, BYTE** buffer, INT32* size); -# else -# define TPMI_ALG_RSA_SCHEME_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_RSA - -// Table 2:172 - Definition of TPMT_RSA_SCHEME Structure -#if ALG_RSA -TPM_RC -TPMT_RSA_SCHEME_Unmarshal( - TPMT_RSA_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_RSA_SCHEME_Marshal(TPMT_RSA_SCHEME* source, BYTE** buffer, INT32* size); -#endif // ALG_RSA - -// Table 2:173 - Definition of TPMI_ALG_RSA_DECRYPT Type -#if ALG_RSA -TPM_RC -TPMI_ALG_RSA_DECRYPT_Unmarshal( - TPMI_ALG_RSA_DECRYPT* target, BYTE** buffer, INT32* size, BOOL flag); -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_RSA_DECRYPT_Marshal( - TPMI_ALG_RSA_DECRYPT* source, BYTE** buffer, INT32* size); -# else -# define TPMI_ALG_RSA_DECRYPT_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_RSA - -// Table 2:174 - Definition of TPMT_RSA_DECRYPT Structure -#if ALG_RSA -TPM_RC -TPMT_RSA_DECRYPT_Unmarshal( - TPMT_RSA_DECRYPT* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_RSA_DECRYPT_Marshal(TPMT_RSA_DECRYPT* source, BYTE** buffer, INT32* size); -#endif // ALG_RSA - -// Table 2:175 - Definition of TPM2B_PUBLIC_KEY_RSA Structure -#if ALG_RSA -TPM_RC -TPM2B_PUBLIC_KEY_RSA_Unmarshal( - TPM2B_PUBLIC_KEY_RSA* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_PUBLIC_KEY_RSA_Marshal( - TPM2B_PUBLIC_KEY_RSA* source, BYTE** buffer, INT32* size); -#endif // ALG_RSA - -// Table 2:176 - Definition of TPMI_RSA_KEY_BITS Type -#if ALG_RSA -TPM_RC -TPMI_RSA_KEY_BITS_Unmarshal(TPMI_RSA_KEY_BITS* target, BYTE** buffer, INT32* size); -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_RSA_KEY_BITS_Marshal(TPMI_RSA_KEY_BITS* source, BYTE** buffer, INT32* size); -# else -# define TPMI_RSA_KEY_BITS_Marshal(source, buffer, size) \ - TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_RSA - -// Table 2:177 - Definition of TPM2B_PRIVATE_KEY_RSA Structure -#if ALG_RSA -TPM_RC -TPM2B_PRIVATE_KEY_RSA_Unmarshal( - TPM2B_PRIVATE_KEY_RSA* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_PRIVATE_KEY_RSA_Marshal( - TPM2B_PRIVATE_KEY_RSA* source, BYTE** buffer, INT32* size); -#endif // ALG_RSA - -// Table 2:178 - Definition of TPM2B_ECC_PARAMETER Structure -TPM_RC -TPM2B_ECC_PARAMETER_Unmarshal( - TPM2B_ECC_PARAMETER* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_ECC_PARAMETER_Marshal(TPM2B_ECC_PARAMETER* source, BYTE** buffer, INT32* size); - -// Table 2:179 - Definition of TPMS_ECC_POINT Structure -#if ALG_ECC -TPM_RC -TPMS_ECC_POINT_Unmarshal(TPMS_ECC_POINT* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_ECC_POINT_Marshal(TPMS_ECC_POINT* source, BYTE** buffer, INT32* size); -#endif // ALG_ECC - -// Table 2:180 - Definition of TPM2B_ECC_POINT Structure -#if ALG_ECC -TPM_RC -TPM2B_ECC_POINT_Unmarshal(TPM2B_ECC_POINT* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_ECC_POINT_Marshal(TPM2B_ECC_POINT* source, BYTE** buffer, INT32* size); -#endif // ALG_ECC - -// Table 2:181 - Definition of TPMI_ALG_ECC_SCHEME Type -#if ALG_ECC -TPM_RC -TPMI_ALG_ECC_SCHEME_Unmarshal( - TPMI_ALG_ECC_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_ECC_SCHEME_Marshal(TPMI_ALG_ECC_SCHEME* source, BYTE** buffer, INT32* size); -# else -# define TPMI_ALG_ECC_SCHEME_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_ECC - -// Table 2:182 - Definition of TPMI_ECC_CURVE Type -#if ALG_ECC -TPM_RC -TPMI_ECC_CURVE_Unmarshal(TPMI_ECC_CURVE* target, BYTE** buffer, INT32* size); -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ECC_CURVE_Marshal(TPMI_ECC_CURVE* source, BYTE** buffer, INT32* size); -# else -# define TPMI_ECC_CURVE_Marshal(source, buffer, size) \ - TPM_ECC_CURVE_Marshal((TPM_ECC_CURVE*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_ECC - -// Table 2:183 - Definition of TPMT_ECC_SCHEME Structure -#if ALG_ECC -TPM_RC -TPMT_ECC_SCHEME_Unmarshal( - TPMT_ECC_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_ECC_SCHEME_Marshal(TPMT_ECC_SCHEME* source, BYTE** buffer, INT32* size); -#endif // ALG_ECC - -// Table 2:184 - Definition of TPMS_ALGORITHM_DETAIL_ECC Structure -#if ALG_ECC -UINT16 -TPMS_ALGORITHM_DETAIL_ECC_Marshal( - TPMS_ALGORITHM_DETAIL_ECC* source, BYTE** buffer, INT32* size); -#endif // ALG_ECC - -// Table 2:185 - Definition of TPMS_SIGNATURE_RSA Structure -#if ALG_RSA -TPM_RC -TPMS_SIGNATURE_RSA_Unmarshal(TPMS_SIGNATURE_RSA* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_SIGNATURE_RSA_Marshal(TPMS_SIGNATURE_RSA* source, BYTE** buffer, INT32* size); -#endif // ALG_RSA - -// Table 2:186 - Definition of Types for Signature -#if ALG_RSA -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIGNATURE_RSASSA_Unmarshal( - TPMS_SIGNATURE_RSASSA* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_RSASSA_Unmarshal(target, buffer, size) \ - TPMS_SIGNATURE_RSA_Unmarshal((TPMS_SIGNATURE_RSA*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIGNATURE_RSASSA_Marshal( - TPMS_SIGNATURE_RSASSA* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_RSASSA_Marshal(source, buffer, size) \ - TPMS_SIGNATURE_RSA_Marshal((TPMS_SIGNATURE_RSA*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIGNATURE_RSAPSS_Unmarshal( - TPMS_SIGNATURE_RSAPSS* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_RSAPSS_Unmarshal(target, buffer, size) \ - TPMS_SIGNATURE_RSA_Unmarshal((TPMS_SIGNATURE_RSA*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIGNATURE_RSAPSS_Marshal( - TPMS_SIGNATURE_RSAPSS* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_RSAPSS_Marshal(source, buffer, size) \ - TPMS_SIGNATURE_RSA_Marshal((TPMS_SIGNATURE_RSA*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_RSA - -// Table 2:187 - Definition of TPMS_SIGNATURE_ECC Structure -#if ALG_ECC -TPM_RC -TPMS_SIGNATURE_ECC_Unmarshal(TPMS_SIGNATURE_ECC* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_SIGNATURE_ECC_Marshal(TPMS_SIGNATURE_ECC* source, BYTE** buffer, INT32* size); -#endif // ALG_ECC - -// Table 2:188 - Definition of Types for TPMS_SIGNATURE_ECC -#if ALG_ECC -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIGNATURE_ECDAA_Unmarshal( - TPMS_SIGNATURE_ECDAA* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_ECDAA_Unmarshal(target, buffer, size) \ - TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIGNATURE_ECDAA_Marshal( - TPMS_SIGNATURE_ECDAA* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_ECDAA_Marshal(source, buffer, size) \ - TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIGNATURE_ECDSA_Unmarshal( - TPMS_SIGNATURE_ECDSA* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_ECDSA_Unmarshal(target, buffer, size) \ - TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIGNATURE_ECDSA_Marshal( - TPMS_SIGNATURE_ECDSA* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_ECDSA_Marshal(source, buffer, size) \ - TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIGNATURE_SM2_Unmarshal(TPMS_SIGNATURE_SM2* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_SM2_Unmarshal(target, buffer, size) \ - TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIGNATURE_SM2_Marshal(TPMS_SIGNATURE_SM2* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_SM2_Marshal(source, buffer, size) \ - TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -TPM_RC -TPMS_SIGNATURE_ECSCHNORR_Unmarshal( - TPMS_SIGNATURE_ECSCHNORR* target, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_ECSCHNORR_Unmarshal(target, buffer, size) \ - TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)(target), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -# if !USE_MARSHALING_DEFINES -UINT16 -TPMS_SIGNATURE_ECSCHNORR_Marshal( - TPMS_SIGNATURE_ECSCHNORR* source, BYTE** buffer, INT32* size); -# else -# define TPMS_SIGNATURE_ECSCHNORR_Marshal(source, buffer, size) \ - TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)(source), (buffer), (size)) -# endif // !USE_MARSHALING_DEFINES -#endif // ALG_ECC - -// Table 2:189 - Definition of TPMU_SIGNATURE Union -TPM_RC -TPMU_SIGNATURE_Unmarshal( - TPMU_SIGNATURE* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_SIGNATURE_Marshal( - TPMU_SIGNATURE* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:190 - Definition of TPMT_SIGNATURE Structure -TPM_RC -TPMT_SIGNATURE_Unmarshal( - TPMT_SIGNATURE* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_SIGNATURE_Marshal(TPMT_SIGNATURE* source, BYTE** buffer, INT32* size); - -// Table 2:191 - Definition of TPMU_ENCRYPTED_SECRET Union -TPM_RC -TPMU_ENCRYPTED_SECRET_Unmarshal( - TPMU_ENCRYPTED_SECRET* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_ENCRYPTED_SECRET_Marshal( - TPMU_ENCRYPTED_SECRET* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:192 - Definition of TPM2B_ENCRYPTED_SECRET Structure -TPM_RC -TPM2B_ENCRYPTED_SECRET_Unmarshal( - TPM2B_ENCRYPTED_SECRET* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_ENCRYPTED_SECRET_Marshal( - TPM2B_ENCRYPTED_SECRET* source, BYTE** buffer, INT32* size); - -// Table 2:193 - Definition of TPMI_ALG_PUBLIC Type -TPM_RC -TPMI_ALG_PUBLIC_Unmarshal(TPMI_ALG_PUBLIC* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPMI_ALG_PUBLIC_Marshal(TPMI_ALG_PUBLIC* source, BYTE** buffer, INT32* size); -#else -# define TPMI_ALG_PUBLIC_Marshal(source, buffer, size) \ - TPM_ALG_ID_Marshal((TPM_ALG_ID*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:194 - Definition of TPMU_PUBLIC_ID Union -TPM_RC -TPMU_PUBLIC_ID_Unmarshal( - TPMU_PUBLIC_ID* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_PUBLIC_ID_Marshal( - TPMU_PUBLIC_ID* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:195 - Definition of TPMS_KEYEDHASH_PARMS Structure -TPM_RC -TPMS_KEYEDHASH_PARMS_Unmarshal( - TPMS_KEYEDHASH_PARMS* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_KEYEDHASH_PARMS_Marshal( - TPMS_KEYEDHASH_PARMS* source, BYTE** buffer, INT32* size); - -// Table 2:196 - Definition of TPMS_ASYM_PARMS Structure -// Table 2:197 - Definition of TPMS_RSA_PARMS Structure -#if ALG_RSA -TPM_RC -TPMS_RSA_PARMS_Unmarshal(TPMS_RSA_PARMS* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_RSA_PARMS_Marshal(TPMS_RSA_PARMS* source, BYTE** buffer, INT32* size); -#endif // ALG_RSA - -// Table 2:198 - Definition of TPMS_ECC_PARMS Structure -#if ALG_ECC -TPM_RC -TPMS_ECC_PARMS_Unmarshal(TPMS_ECC_PARMS* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_ECC_PARMS_Marshal(TPMS_ECC_PARMS* source, BYTE** buffer, INT32* size); -#endif // ALG_ECC - -// Table 2:199 - Definition of TPMU_PUBLIC_PARMS Union -TPM_RC -TPMU_PUBLIC_PARMS_Unmarshal( - TPMU_PUBLIC_PARMS* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_PUBLIC_PARMS_Marshal( - TPMU_PUBLIC_PARMS* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:200 - Definition of TPMT_PUBLIC_PARMS Structure -TPM_RC -TPMT_PUBLIC_PARMS_Unmarshal(TPMT_PUBLIC_PARMS* target, BYTE** buffer, INT32* size); -UINT16 -TPMT_PUBLIC_PARMS_Marshal(TPMT_PUBLIC_PARMS* source, BYTE** buffer, INT32* size); - -// Table 2:201 - Definition of TPMT_PUBLIC Structure -TPM_RC -TPMT_PUBLIC_Unmarshal(TPMT_PUBLIC* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPMT_PUBLIC_Marshal(TPMT_PUBLIC* source, BYTE** buffer, INT32* size); - -// Table 2:202 - Definition of TPM2B_PUBLIC Structure -TPM_RC -TPM2B_PUBLIC_Unmarshal(TPM2B_PUBLIC* target, BYTE** buffer, INT32* size, BOOL flag); -UINT16 -TPM2B_PUBLIC_Marshal(TPM2B_PUBLIC* source, BYTE** buffer, INT32* size); - -// Table 2:203 - Definition of TPM2B_TEMPLATE Structure -TPM_RC -TPM2B_TEMPLATE_Unmarshal(TPM2B_TEMPLATE* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_TEMPLATE_Marshal(TPM2B_TEMPLATE* source, BYTE** buffer, INT32* size); - -// Table 2:204 - Definition of TPM2B_PRIVATE_VENDOR_SPECIFIC Structure -TPM_RC -TPM2B_PRIVATE_VENDOR_SPECIFIC_Unmarshal( - TPM2B_PRIVATE_VENDOR_SPECIFIC* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_PRIVATE_VENDOR_SPECIFIC_Marshal( - TPM2B_PRIVATE_VENDOR_SPECIFIC* source, BYTE** buffer, INT32* size); - -// Table 2:205 - Definition of TPMU_SENSITIVE_COMPOSITE Union -TPM_RC -TPMU_SENSITIVE_COMPOSITE_Unmarshal( - TPMU_SENSITIVE_COMPOSITE* target, BYTE** buffer, INT32* size, UINT32 selector); -UINT16 -TPMU_SENSITIVE_COMPOSITE_Marshal( - TPMU_SENSITIVE_COMPOSITE* source, BYTE** buffer, INT32* size, UINT32 selector); - -// Table 2:206 - Definition of TPMT_SENSITIVE Structure -TPM_RC -TPMT_SENSITIVE_Unmarshal(TPMT_SENSITIVE* target, BYTE** buffer, INT32* size); -UINT16 -TPMT_SENSITIVE_Marshal(TPMT_SENSITIVE* source, BYTE** buffer, INT32* size); - -// Table 2:207 - Definition of TPM2B_SENSITIVE Structure -TPM_RC -TPM2B_SENSITIVE_Unmarshal(TPM2B_SENSITIVE* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_SENSITIVE_Marshal(TPM2B_SENSITIVE* source, BYTE** buffer, INT32* size); - -// Table 2:208 - Definition of _PRIVATE Structure -// Table 2:209 - Definition of TPM2B_PRIVATE Structure -TPM_RC -TPM2B_PRIVATE_Unmarshal(TPM2B_PRIVATE* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_PRIVATE_Marshal(TPM2B_PRIVATE* source, BYTE** buffer, INT32* size); - -// Table 2:210 - Definition of TPMS_ID_OBJECT Structure -// Table 2:211 - Definition of TPM2B_ID_OBJECT Structure -TPM_RC -TPM2B_ID_OBJECT_Unmarshal(TPM2B_ID_OBJECT* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_ID_OBJECT_Marshal(TPM2B_ID_OBJECT* source, BYTE** buffer, INT32* size); - -// Table 2:212 - Definition of TPM_NV_INDEX Bits -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_NV_INDEX_Marshal(TPM_NV_INDEX* source, BYTE** buffer, INT32* size); -#else -# define TPM_NV_INDEX_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:213 - Definition of TPM_NT Constants -// Table 2:214 - Definition of TPMS_NV_PIN_COUNTER_PARAMETERS Structure -TPM_RC -TPMS_NV_PIN_COUNTER_PARAMETERS_Unmarshal( - TPMS_NV_PIN_COUNTER_PARAMETERS* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_NV_PIN_COUNTER_PARAMETERS_Marshal( - TPMS_NV_PIN_COUNTER_PARAMETERS* source, BYTE** buffer, INT32* size); - -// Table 2:215 - Definition of TPMA_NV Bits -TPM_RC -TPMA_NV_Unmarshal(TPMA_NV* target, BYTE** buffer, INT32* size); - -#if !USE_MARSHALING_DEFINES -UINT16 -TPMA_NV_Marshal(TPMA_NV* source, BYTE** buffer, INT32* size); -#else -# define TPMA_NV_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:216 - Definition of TPMS_NV_PUBLIC Structure -TPM_RC -TPMS_NV_PUBLIC_Unmarshal(TPMS_NV_PUBLIC* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_NV_PUBLIC_Marshal(TPMS_NV_PUBLIC* source, BYTE** buffer, INT32* size); - -// Table 2:217 - Definition of TPM2B_NV_PUBLIC Structure -TPM_RC -TPM2B_NV_PUBLIC_Unmarshal(TPM2B_NV_PUBLIC* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_NV_PUBLIC_Marshal(TPM2B_NV_PUBLIC* source, BYTE** buffer, INT32* size); - -// Table 2:218 - Definition of TPM2B_CONTEXT_SENSITIVE Structure -TPM_RC -TPM2B_CONTEXT_SENSITIVE_Unmarshal( - TPM2B_CONTEXT_SENSITIVE* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_CONTEXT_SENSITIVE_Marshal( - TPM2B_CONTEXT_SENSITIVE* source, BYTE** buffer, INT32* size); - -// Table 2:219 - Definition of TPMS_CONTEXT_DATA Structure -TPM_RC -TPMS_CONTEXT_DATA_Unmarshal(TPMS_CONTEXT_DATA* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_CONTEXT_DATA_Marshal(TPMS_CONTEXT_DATA* source, BYTE** buffer, INT32* size); - -// Table 2:220 - Definition of TPM2B_CONTEXT_DATA Structure -TPM_RC -TPM2B_CONTEXT_DATA_Unmarshal(TPM2B_CONTEXT_DATA* target, BYTE** buffer, INT32* size); -UINT16 -TPM2B_CONTEXT_DATA_Marshal(TPM2B_CONTEXT_DATA* source, BYTE** buffer, INT32* size); - -// Table 2:221 - Definition of TPMS_CONTEXT Structure -TPM_RC -TPMS_CONTEXT_Unmarshal(TPMS_CONTEXT* target, BYTE** buffer, INT32* size); -UINT16 -TPMS_CONTEXT_Marshal(TPMS_CONTEXT* source, BYTE** buffer, INT32* size); - -// Table 2:223 - Definition of TPMS_CREATION_DATA Structure -UINT16 -TPMS_CREATION_DATA_Marshal(TPMS_CREATION_DATA* source, BYTE** buffer, INT32* size); - -// Table 2:224 - Definition of TPM2B_CREATION_DATA Structure -UINT16 -TPM2B_CREATION_DATA_Marshal(TPM2B_CREATION_DATA* source, BYTE** buffer, INT32* size); - -// Table 2:225 - Definition of TPM_AT Constants -TPM_RC -TPM_AT_Unmarshal(TPM_AT* target, BYTE** buffer, INT32* size); -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_AT_Marshal(TPM_AT* source, BYTE** buffer, INT32* size); -#else -# define TPM_AT_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:226 - Definition of TPM_AE Constants -#if !USE_MARSHALING_DEFINES -UINT16 -TPM_AE_Marshal(TPM_AE* source, BYTE** buffer, INT32* size); -#else -# define TPM_AE_Marshal(source, buffer, size) \ - UINT32_Marshal((UINT32*)(source), (buffer), (size)) -#endif // !USE_MARSHALING_DEFINES - -// Table 2:227 - Definition of TPMS_AC_OUTPUT Structure -UINT16 -TPMS_AC_OUTPUT_Marshal(TPMS_AC_OUTPUT* source, BYTE** buffer, INT32* size); - -// Table 2:228 - Definition of TPML_AC_CAPABILITIES Structure -UINT16 -TPML_AC_CAPABILITIES_Marshal( - TPML_AC_CAPABILITIES* source, BYTE** buffer, INT32* size); - -// Array Marshal/Unmarshal for BYTE -TPM_RC -BYTE_Array_Unmarshal(BYTE* target, BYTE** buffer, INT32* size, INT32 count); -UINT16 -BYTE_Array_Marshal(BYTE* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal/Unmarshal for TPM2B_DIGEST -TPM_RC -TPM2B_DIGEST_Array_Unmarshal( - TPM2B_DIGEST* target, BYTE** buffer, INT32* size, INT32 count); -UINT16 -TPM2B_DIGEST_Array_Marshal( - TPM2B_DIGEST* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal for TPMA_CC -UINT16 -TPMA_CC_Array_Marshal(TPMA_CC* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal for TPMS_ACT_DATA -UINT16 -TPMS_ACT_DATA_Array_Marshal( - TPMS_ACT_DATA* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal for TPMS_AC_OUTPUT -UINT16 -TPMS_AC_OUTPUT_Array_Marshal( - TPMS_AC_OUTPUT* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal for TPMS_ALG_PROPERTY -UINT16 -TPMS_ALG_PROPERTY_Array_Marshal( - TPMS_ALG_PROPERTY* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal/Unmarshal for TPMS_PCR_SELECTION -TPM_RC -TPMS_PCR_SELECTION_Array_Unmarshal( - TPMS_PCR_SELECTION* target, BYTE** buffer, INT32* size, INT32 count); -UINT16 -TPMS_PCR_SELECTION_Array_Marshal( - TPMS_PCR_SELECTION* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal for TPMS_TAGGED_PCR_SELECT -UINT16 -TPMS_TAGGED_PCR_SELECT_Array_Marshal( - TPMS_TAGGED_PCR_SELECT* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal for TPMS_TAGGED_POLICY -UINT16 -TPMS_TAGGED_POLICY_Array_Marshal( - TPMS_TAGGED_POLICY* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal for TPMS_TAGGED_PROPERTY -UINT16 -TPMS_TAGGED_PROPERTY_Array_Marshal( - TPMS_TAGGED_PROPERTY* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal/Unmarshal for TPMT_HA -TPM_RC -TPMT_HA_Array_Unmarshal( - TPMT_HA* target, BYTE** buffer, INT32* size, BOOL flag, INT32 count); -UINT16 -TPMT_HA_Array_Marshal(TPMT_HA* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal/Unmarshal for TPM_ALG_ID -TPM_RC -TPM_ALG_ID_Array_Unmarshal( - TPM_ALG_ID* target, BYTE** buffer, INT32* size, INT32 count); -UINT16 -TPM_ALG_ID_Array_Marshal(TPM_ALG_ID* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal/Unmarshal for TPM_CC -TPM_RC -TPM_CC_Array_Unmarshal(TPM_CC* target, BYTE** buffer, INT32* size, INT32 count); -UINT16 -TPM_CC_Array_Marshal(TPM_CC* source, BYTE** buffer, INT32* size, INT32 count); - -// Array Marshal/Unmarshal for TPM_ECC_CURVE -#if ALG_ECC -TPM_RC -TPM_ECC_CURVE_Array_Unmarshal( - TPM_ECC_CURVE* target, BYTE** buffer, INT32* size, INT32 count); -UINT16 -TPM_ECC_CURVE_Array_Marshal( - TPM_ECC_CURVE* source, BYTE** buffer, INT32* size, INT32 count); -#endif // ALG_ECC - -// Array Marshal/Unmarshal for TPM_HANDLE -TPM_RC -TPM_HANDLE_Array_Unmarshal( - TPM_HANDLE* target, BYTE** buffer, INT32* size, INT32 count); -UINT16 -TPM_HANDLE_Array_Marshal(TPM_HANDLE* source, BYTE** buffer, INT32* size, INT32 count); -#endif // _MARSHAL_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/MathOnByteBuffers_fp.h b/TPMCmd/tpm/include/prototypes/MathOnByteBuffers_fp.h deleted file mode 100644 index cfb602e8..00000000 --- a/TPMCmd/tpm/include/prototypes/MathOnByteBuffers_fp.h +++ /dev/null @@ -1,128 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _MATH_ON_BYTE_BUFFERS_FP_H_ -#define _MATH_ON_BYTE_BUFFERS_FP_H_ - -//*** UnsignedCmpB -// This function compare two unsigned values. The values are byte-aligned, -// big-endian numbers (e.g, a hash). -// Return Type: int -// 1 if (a > b) -// 0 if (a = b) -// -1 if (a < b) -LIB_EXPORT int UnsignedCompareB(UINT32 aSize, // IN: size of a - const BYTE* a, // IN: a - UINT32 bSize, // IN: size of b - const BYTE* b // IN: b -); - -//***SignedCompareB() -// Compare two signed integers: -// Return Type: int -// 1 if a > b -// 0 if a = b -// -1 if a < b -int SignedCompareB(const UINT32 aSize, // IN: size of a - const BYTE* a, // IN: a buffer - const UINT32 bSize, // IN: size of b - const BYTE* b // IN: b buffer -); - -//*** ModExpB -// This function is used to do modular exponentiation in support of RSA. -// The most typical uses are: 'c' = 'm'^'e' mod 'n' (RSA encrypt) and -// 'm' = 'c'^'d' mod 'n' (RSA decrypt). When doing decryption, the 'e' parameter -// of the function will contain the private exponent 'd' instead of the public -// exponent 'e'. -// -// If the results will not fit in the provided buffer, -// an error is returned (CRYPT_ERROR_UNDERFLOW). If the results is smaller -// than the buffer, the results is de-normalized. -// -// This version is intended for use with RSA and requires that 'm' be -// less than 'n'. -// -// Return Type: TPM_RC -// TPM_RC_SIZE number to exponentiate is larger than the modulus -// TPM_RC_NO_RESULT result will not fit into the provided buffer -// -TPM_RC -ModExpB(UINT32 cSize, // IN: the size of the output buffer. It will - // need to be the same size as the modulus - BYTE* c, // OUT: the buffer to receive the results - // (c->size must be set to the maximum size - // for the returned value) - const UINT32 mSize, - const BYTE* m, // IN: number to exponentiate - const UINT32 eSize, - const BYTE* e, // IN: power - const UINT32 nSize, - const BYTE* n // IN: modulus -); - -//*** DivideB() -// Divide an integer ('n') by an integer ('d') producing a quotient ('q') and -// a remainder ('r'). If 'q' or 'r' is not needed, then the pointer to them -// may be set to NULL. -// -// Return Type: TPM_RC -// TPM_RC_NO_RESULT 'q' or 'r' is too small to receive the result -// -LIB_EXPORT TPM_RC DivideB(const TPM2B* n, // IN: numerator - const TPM2B* d, // IN: denominator - TPM2B* q, // OUT: quotient - TPM2B* r // OUT: remainder -); - -//*** AdjustNumberB() -// Remove/add leading zeros from a number in a TPM2B. Will try to make the number -// by adding or removing leading zeros. If the number is larger than the requested -// size, it will make the number as small as possible. Setting 'requestedSize' to -// zero is equivalent to requesting that the number be normalized. -UINT16 -AdjustNumberB(TPM2B* num, UINT16 requestedSize); - -//*** ShiftLeft() -// This function shifts a byte buffer (a TPM2B) one byte to the left. That is, -// the most significant bit of the most significant byte is lost. -TPM2B* ShiftLeft(TPM2B* value // IN/OUT: value to shift and shifted value out -); - -#endif // _MATH_ON_BYTE_BUFFERS_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Memory_fp.h b/TPMCmd/tpm/include/prototypes/Memory_fp.h deleted file mode 100644 index 2e94a073..00000000 --- a/TPMCmd/tpm/include/prototypes/Memory_fp.h +++ /dev/null @@ -1,138 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 7, 2019 Time: 06:58:58PM - */ - -#ifndef _MEMORY_FP_H_ -#define _MEMORY_FP_H_ - -//*** MemoryCopy() -// This is an alias for memmove. This is used in place of memcpy because -// some of the moves may overlap and rather than try to make sure that -// memmove is used when necessary, it is always used. -void MemoryCopy(void* dest, const void* src, int sSize); - -//*** MemoryEqual() -// This function indicates if two buffers have the same values in the indicated -// number of bytes. -// Return Type: BOOL -// TRUE(1) all octets are the same -// FALSE(0) all octets are not the same -BOOL MemoryEqual(const void* buffer1, // IN: compare buffer1 - const void* buffer2, // IN: compare buffer2 - unsigned int size // IN: size of bytes being compared -); - -//*** MemoryCopy2B() -// This function copies a TPM2B. This can be used when the TPM2B types are -// the same or different. -// -// This function returns the number of octets in the data buffer of the TPM2B. -LIB_EXPORT INT16 MemoryCopy2B(TPM2B* dest, // OUT: receiving TPM2B - const TPM2B* source, // IN: source TPM2B - unsigned int dSize // IN: size of the receiving buffer -); - -//*** MemoryConcat2B() -// This function will concatenate the buffer contents of a TPM2B to an -// the buffer contents of another TPM2B and adjust the size accordingly -// ('a' := ('a' | 'b')). -void MemoryConcat2B( - TPM2B* aInOut, // IN/OUT: destination 2B - TPM2B* bIn, // IN: second 2B - unsigned int aMaxSize // IN: The size of aInOut.buffer (max values for - // aInOut.size) -); - -//*** MemoryEqual2B() -// This function will compare two TPM2B structures. To be equal, they -// need to be the same size and the buffer contexts need to be the same -// in all octets. -// Return Type: BOOL -// TRUE(1) size and buffer contents are the same -// FALSE(0) size or buffer contents are not the same -BOOL MemoryEqual2B(const TPM2B* aIn, // IN: compare value - const TPM2B* bIn // IN: compare value -); - -//*** MemorySet() -// This function will set all the octets in the specified memory range to -// the specified octet value. -// Note: A previous version had an additional parameter (dSize) that was -// intended to make sure that the destination would not be overrun. The -// problem is that, in use, all that was happening was that the value of -// size was used for dSize so there was no benefit in the extra parameter. -void MemorySet(void* dest, int value, size_t size); - -//*** MemoryPad2B() -// Function to pad a TPM2B with zeros and adjust the size. -void MemoryPad2B(TPM2B* b, UINT16 newSize); - -//*** Uint16ToByteArray() -// Function to write an integer to a byte array -void Uint16ToByteArray(UINT16 i, BYTE* a); - -//*** Uint32ToByteArray() -// Function to write an integer to a byte array -void Uint32ToByteArray(UINT32 i, BYTE* a); - -//*** Uint64ToByteArray() -// Function to write an integer to a byte array -void Uint64ToByteArray(UINT64 i, BYTE* a); - -//*** ByteArrayToUint8() -// Function to write a UINT8 to a byte array. This is included for completeness -// and to allow certain macro expansions -UINT8 -ByteArrayToUint8(BYTE* a); - -//*** ByteArrayToUint16() -// Function to write an integer to a byte array -UINT16 -ByteArrayToUint16(BYTE* a); - -//*** ByteArrayToUint32() -// Function to write an integer to a byte array -UINT32 -ByteArrayToUint32(BYTE* a); - -//*** ByteArrayToUint64() -// Function to write an integer to a byte array -UINT64 -ByteArrayToUint64(BYTE* a); - -#endif // _MEMORY_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/NV_Certify_fp.h b/TPMCmd/tpm/include/prototypes/NV_Certify_fp.h deleted file mode 100644 index aa63fca3..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_Certify_fp.h +++ /dev/null @@ -1,78 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_Certify // Command must be enabled - -# ifndef _NV_Certify_FP_H_ -# define _NV_Certify_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT signHandle; - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_NV_INDEX nvIndex; - TPM2B_DATA qualifyingData; - TPMT_SIG_SCHEME inScheme; - UINT16 size; - UINT16 offset; -} NV_Certify_In; - -// Output structure definition -typedef struct -{ - TPM2B_ATTEST certifyInfo; - TPMT_SIGNATURE signature; -} NV_Certify_Out; - -// Response code modifiers -# define RC_NV_Certify_signHandle (TPM_RC_H + TPM_RC_1) -# define RC_NV_Certify_authHandle (TPM_RC_H + TPM_RC_2) -# define RC_NV_Certify_nvIndex (TPM_RC_H + TPM_RC_3) -# define RC_NV_Certify_qualifyingData (TPM_RC_P + TPM_RC_1) -# define RC_NV_Certify_inScheme (TPM_RC_P + TPM_RC_2) -# define RC_NV_Certify_size (TPM_RC_P + TPM_RC_3) -# define RC_NV_Certify_offset (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_NV_Certify(NV_Certify_In* in, NV_Certify_Out* out); - -# endif // _NV_Certify_FP_H_ -#endif // CC_NV_Certify diff --git a/TPMCmd/tpm/include/prototypes/NV_ChangeAuth_fp.h b/TPMCmd/tpm/include/prototypes/NV_ChangeAuth_fp.h deleted file mode 100644 index d9df4371..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_ChangeAuth_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_ChangeAuth // Command must be enabled - -# ifndef _NV_Change_Auth_FP_H_ -# define _NV_Change_Auth_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_INDEX nvIndex; - TPM2B_AUTH newAuth; -} NV_ChangeAuth_In; - -// Response code modifiers -# define RC_NV_ChangeAuth_nvIndex (TPM_RC_H + TPM_RC_1) -# define RC_NV_ChangeAuth_newAuth (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_NV_ChangeAuth(NV_ChangeAuth_In* in); - -# endif // _NV_Change_Auth_FP_H_ -#endif // CC_NV_ChangeAuth diff --git a/TPMCmd/tpm/include/prototypes/NV_DefineSpace_fp.h b/TPMCmd/tpm/include/prototypes/NV_DefineSpace_fp.h deleted file mode 100644 index b446afb3..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_DefineSpace_fp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_DefineSpace // Command must be enabled - -# ifndef _NV_Define_Space_FP_H_ -# define _NV_Define_Space_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PROVISION authHandle; - TPM2B_AUTH auth; - TPM2B_NV_PUBLIC publicInfo; -} NV_DefineSpace_In; - -// Response code modifiers -# define RC_NV_DefineSpace_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_NV_DefineSpace_auth (TPM_RC_P + TPM_RC_1) -# define RC_NV_DefineSpace_publicInfo (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_NV_DefineSpace(NV_DefineSpace_In* in); - -# endif // _NV_Define_Space_FP_H_ -#endif // CC_NV_DefineSpace diff --git a/TPMCmd/tpm/include/prototypes/NV_Extend_fp.h b/TPMCmd/tpm/include/prototypes/NV_Extend_fp.h deleted file mode 100644 index 2fd6d209..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_Extend_fp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_Extend // Command must be enabled - -# ifndef _NV_Extend_FP_H_ -# define _NV_Extend_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_NV_INDEX nvIndex; - TPM2B_MAX_NV_BUFFER data; -} NV_Extend_In; - -// Response code modifiers -# define RC_NV_Extend_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_NV_Extend_nvIndex (TPM_RC_H + TPM_RC_2) -# define RC_NV_Extend_data (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_NV_Extend(NV_Extend_In* in); - -# endif // _NV_Extend_FP_H_ -#endif // CC_NV_Extend diff --git a/TPMCmd/tpm/include/prototypes/NV_GlobalWriteLock_fp.h b/TPMCmd/tpm/include/prototypes/NV_GlobalWriteLock_fp.h deleted file mode 100644 index 26a1f74e..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_GlobalWriteLock_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_GlobalWriteLock // Command must be enabled - -# ifndef _NV_Global_Write_Lock_FP_H_ -# define _NV_Global_Write_Lock_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PROVISION authHandle; -} NV_GlobalWriteLock_In; - -// Response code modifiers -# define RC_NV_GlobalWriteLock_authHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_NV_GlobalWriteLock(NV_GlobalWriteLock_In* in); - -# endif // _NV_Global_Write_Lock_FP_H_ -#endif // CC_NV_GlobalWriteLock diff --git a/TPMCmd/tpm/include/prototypes/NV_Increment_fp.h b/TPMCmd/tpm/include/prototypes/NV_Increment_fp.h deleted file mode 100644 index a0dc73b7..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_Increment_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_Increment // Command must be enabled - -# ifndef _NV_Increment_FP_H_ -# define _NV_Increment_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_NV_INDEX nvIndex; -} NV_Increment_In; - -// Response code modifiers -# define RC_NV_Increment_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_NV_Increment_nvIndex (TPM_RC_H + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_NV_Increment(NV_Increment_In* in); - -# endif // _NV_Increment_FP_H_ -#endif // CC_NV_Increment diff --git a/TPMCmd/tpm/include/prototypes/NV_ReadLock_fp.h b/TPMCmd/tpm/include/prototypes/NV_ReadLock_fp.h deleted file mode 100644 index f97296a2..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_ReadLock_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_ReadLock // Command must be enabled - -# ifndef _NV_Read_Lock_FP_H_ -# define _NV_Read_Lock_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_NV_INDEX nvIndex; -} NV_ReadLock_In; - -// Response code modifiers -# define RC_NV_ReadLock_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_NV_ReadLock_nvIndex (TPM_RC_H + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_NV_ReadLock(NV_ReadLock_In* in); - -# endif // _NV_Read_Lock_FP_H_ -#endif // CC_NV_ReadLock diff --git a/TPMCmd/tpm/include/prototypes/NV_ReadPublic_fp.h b/TPMCmd/tpm/include/prototypes/NV_ReadPublic_fp.h deleted file mode 100644 index 2a6d3f39..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_ReadPublic_fp.h +++ /dev/null @@ -1,66 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_ReadPublic // Command must be enabled - -# ifndef _NV_Read_Public_FP_H_ -# define _NV_Read_Public_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_INDEX nvIndex; -} NV_ReadPublic_In; - -// Output structure definition -typedef struct -{ - TPM2B_NV_PUBLIC nvPublic; - TPM2B_NAME nvName; -} NV_ReadPublic_Out; - -// Response code modifiers -# define RC_NV_ReadPublic_nvIndex (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_NV_ReadPublic(NV_ReadPublic_In* in, NV_ReadPublic_Out* out); - -# endif // _NV_Read_Public_FP_H_ -#endif // CC_NV_ReadPublic diff --git a/TPMCmd/tpm/include/prototypes/NV_Read_fp.h b/TPMCmd/tpm/include/prototypes/NV_Read_fp.h deleted file mode 100644 index f542333c..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_Read_fp.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_Read // Command must be enabled - -# ifndef _NV_Read_FP_H_ -# define _NV_Read_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_NV_INDEX nvIndex; - UINT16 size; - UINT16 offset; -} NV_Read_In; - -// Output structure definition -typedef struct -{ - TPM2B_MAX_NV_BUFFER data; -} NV_Read_Out; - -// Response code modifiers -# define RC_NV_Read_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_NV_Read_nvIndex (TPM_RC_H + TPM_RC_2) -# define RC_NV_Read_size (TPM_RC_P + TPM_RC_1) -# define RC_NV_Read_offset (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_NV_Read(NV_Read_In* in, NV_Read_Out* out); - -# endif // _NV_Read_FP_H_ -#endif // CC_NV_Read diff --git a/TPMCmd/tpm/include/prototypes/NV_SetBits_fp.h b/TPMCmd/tpm/include/prototypes/NV_SetBits_fp.h deleted file mode 100644 index 71b9dddd..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_SetBits_fp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_SetBits // Command must be enabled - -# ifndef _NV_Set_Bits_FP_H_ -# define _NV_Set_Bits_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_NV_INDEX nvIndex; - UINT64 bits; -} NV_SetBits_In; - -// Response code modifiers -# define RC_NV_SetBits_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_NV_SetBits_nvIndex (TPM_RC_H + TPM_RC_2) -# define RC_NV_SetBits_bits (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_NV_SetBits(NV_SetBits_In* in); - -# endif // _NV_Set_Bits_FP_H_ -#endif // CC_NV_SetBits diff --git a/TPMCmd/tpm/include/prototypes/NV_UndefineSpaceSpecial_fp.h b/TPMCmd/tpm/include/prototypes/NV_UndefineSpaceSpecial_fp.h deleted file mode 100644 index 52abfaf7..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_UndefineSpaceSpecial_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_UndefineSpaceSpecial // Command must be enabled - -# ifndef _NV_Undefine_Space_Special_FP_H_ -# define _NV_Undefine_Space_Special_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_INDEX nvIndex; - TPMI_RH_PLATFORM platform; -} NV_UndefineSpaceSpecial_In; - -// Response code modifiers -# define RC_NV_UndefineSpaceSpecial_nvIndex (TPM_RC_H + TPM_RC_1) -# define RC_NV_UndefineSpaceSpecial_platform (TPM_RC_H + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_NV_UndefineSpaceSpecial(NV_UndefineSpaceSpecial_In* in); - -# endif // _NV_Undefine_Space_Special_FP_H_ -#endif // CC_NV_UndefineSpaceSpecial diff --git a/TPMCmd/tpm/include/prototypes/NV_UndefineSpace_fp.h b/TPMCmd/tpm/include/prototypes/NV_UndefineSpace_fp.h deleted file mode 100644 index 5c54714c..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_UndefineSpace_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_UndefineSpace // Command must be enabled - -# ifndef _NV_Undefine_Space_FP_H_ -# define _NV_Undefine_Space_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PROVISION authHandle; - TPMI_RH_NV_INDEX nvIndex; -} NV_UndefineSpace_In; - -// Response code modifiers -# define RC_NV_UndefineSpace_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_NV_UndefineSpace_nvIndex (TPM_RC_H + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_NV_UndefineSpace(NV_UndefineSpace_In* in); - -# endif // _NV_Undefine_Space_FP_H_ -#endif // CC_NV_UndefineSpace diff --git a/TPMCmd/tpm/include/prototypes/NV_WriteLock_fp.h b/TPMCmd/tpm/include/prototypes/NV_WriteLock_fp.h deleted file mode 100644 index 1441a5c0..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_WriteLock_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_WriteLock // Command must be enabled - -# ifndef _NV_Write_Lock_FP_H_ -# define _NV_Write_Lock_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_NV_INDEX nvIndex; -} NV_WriteLock_In; - -// Response code modifiers -# define RC_NV_WriteLock_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_NV_WriteLock_nvIndex (TPM_RC_H + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_NV_WriteLock(NV_WriteLock_In* in); - -# endif // _NV_Write_Lock_FP_H_ -#endif // CC_NV_WriteLock diff --git a/TPMCmd/tpm/include/prototypes/NV_Write_fp.h b/TPMCmd/tpm/include/prototypes/NV_Write_fp.h deleted file mode 100644 index 7a83d2b9..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_Write_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_NV_Write // Command must be enabled - -# ifndef _NV_Write_FP_H_ -# define _NV_Write_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_NV_INDEX nvIndex; - TPM2B_MAX_NV_BUFFER data; - UINT16 offset; -} NV_Write_In; - -// Response code modifiers -# define RC_NV_Write_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_NV_Write_nvIndex (TPM_RC_H + TPM_RC_2) -# define RC_NV_Write_data (TPM_RC_P + TPM_RC_1) -# define RC_NV_Write_offset (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_NV_Write(NV_Write_In* in); - -# endif // _NV_Write_FP_H_ -#endif // CC_NV_Write diff --git a/TPMCmd/tpm/include/prototypes/NV_spt_fp.h b/TPMCmd/tpm/include/prototypes/NV_spt_fp.h deleted file mode 100644 index dee8e8e7..00000000 --- a/TPMCmd/tpm/include/prototypes/NV_spt_fp.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:18PM - */ - -#ifndef _NV_SPT_FP_H_ -#define _NV_SPT_FP_H_ - -//*** NvReadAccessChecks() -// Common routine for validating a read -// Used by TPM2_NV_Read, TPM2_NV_ReadLock and TPM2_PolicyNV -// Return Type: TPM_RC -// TPM_RC_NV_AUTHORIZATION autHandle is not allowed to authorize read -// of the index -// TPM_RC_NV_LOCKED Read locked -// TPM_RC_NV_UNINITIALIZED Try to read an uninitialized index -// -TPM_RC -NvReadAccessChecks(TPM_HANDLE authHandle, // IN: the handle that provided the - // authorization - TPM_HANDLE nvHandle, // IN: the handle of the NV index to be read - TPMA_NV attributes // IN: the attributes of 'nvHandle' -); - -//*** NvWriteAccessChecks() -// Common routine for validating a write -// Used by TPM2_NV_Write, TPM2_NV_Increment, TPM2_SetBits, and TPM2_NV_WriteLock -// Return Type: TPM_RC -// TPM_RC_NV_AUTHORIZATION Authorization fails -// TPM_RC_NV_LOCKED Write locked -// -TPM_RC -NvWriteAccessChecks( - TPM_HANDLE authHandle, // IN: the handle that provided the - // authorization - TPM_HANDLE nvHandle, // IN: the handle of the NV index to be written - TPMA_NV attributes // IN: the attributes of 'nvHandle' -); - -//*** NvClearOrderly() -// This function is used to cause gp.orderlyState to be cleared to the -// non-orderly state. -TPM_RC -NvClearOrderly(void); - -//*** NvIsPinPassIndex() -// Function to check to see if an NV index is a PIN Pass Index -// Return Type: BOOL -// TRUE(1) is pin pass -// FALSE(0) is not pin pass -BOOL NvIsPinPassIndex(TPM_HANDLE index // IN: Handle to check -); - -#endif // _NV_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/NvReserved_fp.h b/TPMCmd/tpm/include/prototypes/NvReserved_fp.h deleted file mode 100644 index a583ef5d..00000000 --- a/TPMCmd/tpm/include/prototypes/NvReserved_fp.h +++ /dev/null @@ -1,108 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 04:23:27PM - */ - -#ifndef _NV_RESERVED_FP_H_ -#define _NV_RESERVED_FP_H_ - -//*** NvCheckState() -// Function to check the NV state by accessing the platform-specific function -// to get the NV state. The result state is registered in s_NvIsAvailable -// that will be reported by NvIsAvailable. -// -// This function is called at the beginning of ExecuteCommand before any potential -// check of g_NvStatus. -void NvCheckState(void); - -//*** NvCommit -// This is a wrapper for the platform function to commit pending NV writes. -BOOL NvCommit(void); - -//*** NvPowerOn() -// This function is called at _TPM_Init to initialize the NV environment. -// Return Type: BOOL -// TRUE(1) all NV was initialized -// FALSE(0) the NV containing saved state had an error and -// TPM2_Startup(CLEAR) is required -BOOL NvPowerOn(void); - -//*** NvManufacture() -// This function initializes the NV system at pre-install time. -// -// This function should only be called in a manufacturing environment or in a -// simulation. -// -// The layout of NV memory space is an implementation choice. -void NvManufacture(void); - -//*** NvRead() -// This function is used to move reserved data from NV memory to RAM. -void NvRead(void* outBuffer, // OUT: buffer to receive data - UINT32 nvOffset, // IN: offset in NV of value - UINT32 size // IN: size of the value to read -); - -//*** NvWrite() -// This function is used to post reserved data for writing to NV memory. Before -// the TPM completes the operation, the value will be written. -BOOL NvWrite(UINT32 nvOffset, // IN: location in NV to receive data - UINT32 size, // IN: size of the data to move - void* inBuffer // IN: location containing data to write -); - -//*** NvUpdatePersistent() -// This function is used to update a value in the PERSISTENT_DATA structure and -// commits the value to NV. -void NvUpdatePersistent( - UINT32 offset, // IN: location in PERMANENT_DATA to be updated - UINT32 size, // IN: size of the value - void* buffer // IN: the new data -); - -//*** NvClearPersistent() -// This function is used to clear a persistent data entry and commit it to NV -void NvClearPersistent(UINT32 offset, // IN: the offset in the PERMANENT_DATA - // structure to be cleared (zeroed) - UINT32 size // IN: number of bytes to clear -); - -//*** NvReadPersistent() -// This function reads persistent data to the RAM copy of the 'gp' structure. -void NvReadPersistent(void); - -#endif // _NV_RESERVED_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/ObjectChangeAuth_fp.h b/TPMCmd/tpm/include/prototypes/ObjectChangeAuth_fp.h deleted file mode 100644 index cc2205fd..00000000 --- a/TPMCmd/tpm/include/prototypes/ObjectChangeAuth_fp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ObjectChangeAuth // Command must be enabled - -# ifndef _Object_Change_Auth_FP_H_ -# define _Object_Change_Auth_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT objectHandle; - TPMI_DH_OBJECT parentHandle; - TPM2B_AUTH newAuth; -} ObjectChangeAuth_In; - -// Output structure definition -typedef struct -{ - TPM2B_PRIVATE outPrivate; -} ObjectChangeAuth_Out; - -// Response code modifiers -# define RC_ObjectChangeAuth_objectHandle (TPM_RC_H + TPM_RC_1) -# define RC_ObjectChangeAuth_parentHandle (TPM_RC_H + TPM_RC_2) -# define RC_ObjectChangeAuth_newAuth (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ObjectChangeAuth(ObjectChangeAuth_In* in, ObjectChangeAuth_Out* out); - -# endif // _Object_Change_Auth_FP_H_ -#endif // CC_ObjectChangeAuth diff --git a/TPMCmd/tpm/include/prototypes/PCR_Allocate_fp.h b/TPMCmd/tpm/include/prototypes/PCR_Allocate_fp.h deleted file mode 100644 index d30ece0c..00000000 --- a/TPMCmd/tpm/include/prototypes/PCR_Allocate_fp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PCR_Allocate // Command must be enabled - -# ifndef _PCR_Allocate_FP_H_ -# define _PCR_Allocate_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PLATFORM authHandle; - TPML_PCR_SELECTION pcrAllocation; -} PCR_Allocate_In; - -// Output structure definition -typedef struct -{ - TPMI_YES_NO allocationSuccess; - UINT32 maxPCR; - UINT32 sizeNeeded; - UINT32 sizeAvailable; -} PCR_Allocate_Out; - -// Response code modifiers -# define RC_PCR_Allocate_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_PCR_Allocate_pcrAllocation (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PCR_Allocate(PCR_Allocate_In* in, PCR_Allocate_Out* out); - -# endif // _PCR_Allocate_FP_H_ -#endif // CC_PCR_Allocate diff --git a/TPMCmd/tpm/include/prototypes/PCR_Event_fp.h b/TPMCmd/tpm/include/prototypes/PCR_Event_fp.h deleted file mode 100644 index 7883722d..00000000 --- a/TPMCmd/tpm/include/prototypes/PCR_Event_fp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PCR_Event // Command must be enabled - -# ifndef _PCR_Event_FP_H_ -# define _PCR_Event_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_PCR pcrHandle; - TPM2B_EVENT eventData; -} PCR_Event_In; - -// Output structure definition -typedef struct -{ - TPML_DIGEST_VALUES digests; -} PCR_Event_Out; - -// Response code modifiers -# define RC_PCR_Event_pcrHandle (TPM_RC_H + TPM_RC_1) -# define RC_PCR_Event_eventData (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PCR_Event(PCR_Event_In* in, PCR_Event_Out* out); - -# endif // _PCR_Event_FP_H_ -#endif // CC_PCR_Event diff --git a/TPMCmd/tpm/include/prototypes/PCR_Extend_fp.h b/TPMCmd/tpm/include/prototypes/PCR_Extend_fp.h deleted file mode 100644 index 52059bfe..00000000 --- a/TPMCmd/tpm/include/prototypes/PCR_Extend_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PCR_Extend // Command must be enabled - -# ifndef _PCR_Extend_FP_H_ -# define _PCR_Extend_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_PCR pcrHandle; - TPML_DIGEST_VALUES digests; -} PCR_Extend_In; - -// Response code modifiers -# define RC_PCR_Extend_pcrHandle (TPM_RC_H + TPM_RC_1) -# define RC_PCR_Extend_digests (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PCR_Extend(PCR_Extend_In* in); - -# endif // _PCR_Extend_FP_H_ -#endif // CC_PCR_Extend diff --git a/TPMCmd/tpm/include/prototypes/PCR_Read_fp.h b/TPMCmd/tpm/include/prototypes/PCR_Read_fp.h deleted file mode 100644 index b9592f7f..00000000 --- a/TPMCmd/tpm/include/prototypes/PCR_Read_fp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PCR_Read // Command must be enabled - -# ifndef _PCR_Read_FP_H_ -# define _PCR_Read_FP_H_ - -// Input structure definition -typedef struct -{ - TPML_PCR_SELECTION pcrSelectionIn; -} PCR_Read_In; - -// Output structure definition -typedef struct -{ - UINT32 pcrUpdateCounter; - TPML_PCR_SELECTION pcrSelectionOut; - TPML_DIGEST pcrValues; -} PCR_Read_Out; - -// Response code modifiers -# define RC_PCR_Read_pcrSelectionIn (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PCR_Read(PCR_Read_In* in, PCR_Read_Out* out); - -# endif // _PCR_Read_FP_H_ -#endif // CC_PCR_Read diff --git a/TPMCmd/tpm/include/prototypes/PCR_Reset_fp.h b/TPMCmd/tpm/include/prototypes/PCR_Reset_fp.h deleted file mode 100644 index c9b1860a..00000000 --- a/TPMCmd/tpm/include/prototypes/PCR_Reset_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PCR_Reset // Command must be enabled - -# ifndef _PCR_Reset_FP_H_ -# define _PCR_Reset_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_PCR pcrHandle; -} PCR_Reset_In; - -// Response code modifiers -# define RC_PCR_Reset_pcrHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PCR_Reset(PCR_Reset_In* in); - -# endif // _PCR_Reset_FP_H_ -#endif // CC_PCR_Reset diff --git a/TPMCmd/tpm/include/prototypes/PCR_SetAuthPolicy_fp.h b/TPMCmd/tpm/include/prototypes/PCR_SetAuthPolicy_fp.h deleted file mode 100644 index 893835a2..00000000 --- a/TPMCmd/tpm/include/prototypes/PCR_SetAuthPolicy_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PCR_SetAuthPolicy // Command must be enabled - -# ifndef _PCR_Set_Auth_Policy_FP_H_ -# define _PCR_Set_Auth_Policy_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PLATFORM authHandle; - TPM2B_DIGEST authPolicy; - TPMI_ALG_HASH hashAlg; - TPMI_DH_PCR pcrNum; -} PCR_SetAuthPolicy_In; - -// Response code modifiers -# define RC_PCR_SetAuthPolicy_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_PCR_SetAuthPolicy_authPolicy (TPM_RC_P + TPM_RC_1) -# define RC_PCR_SetAuthPolicy_hashAlg (TPM_RC_P + TPM_RC_2) -# define RC_PCR_SetAuthPolicy_pcrNum (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_PCR_SetAuthPolicy(PCR_SetAuthPolicy_In* in); - -# endif // _PCR_Set_Auth_Policy_FP_H_ -#endif // CC_PCR_SetAuthPolicy diff --git a/TPMCmd/tpm/include/prototypes/PCR_SetAuthValue_fp.h b/TPMCmd/tpm/include/prototypes/PCR_SetAuthValue_fp.h deleted file mode 100644 index 6f6507a7..00000000 --- a/TPMCmd/tpm/include/prototypes/PCR_SetAuthValue_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PCR_SetAuthValue // Command must be enabled - -# ifndef _PCR_Set_Auth_Value_FP_H_ -# define _PCR_Set_Auth_Value_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_PCR pcrHandle; - TPM2B_DIGEST auth; -} PCR_SetAuthValue_In; - -// Response code modifiers -# define RC_PCR_SetAuthValue_pcrHandle (TPM_RC_H + TPM_RC_1) -# define RC_PCR_SetAuthValue_auth (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PCR_SetAuthValue(PCR_SetAuthValue_In* in); - -# endif // _PCR_Set_Auth_Value_FP_H_ -#endif // CC_PCR_SetAuthValue diff --git a/TPMCmd/tpm/include/prototypes/PP_Commands_fp.h b/TPMCmd/tpm/include/prototypes/PP_Commands_fp.h deleted file mode 100644 index 17fb085a..00000000 --- a/TPMCmd/tpm/include/prototypes/PP_Commands_fp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PP_Commands // Command must be enabled - -# ifndef _PP_Commands_FP_H_ -# define _PP_Commands_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PLATFORM auth; - TPML_CC setList; - TPML_CC clearList; -} PP_Commands_In; - -// Response code modifiers -# define RC_PP_Commands_auth (TPM_RC_H + TPM_RC_1) -# define RC_PP_Commands_setList (TPM_RC_P + TPM_RC_1) -# define RC_PP_Commands_clearList (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_PP_Commands(PP_Commands_In* in); - -# endif // _PP_Commands_FP_H_ -#endif // CC_PP_Commands diff --git a/TPMCmd/tpm/include/prototypes/PP_fp.h b/TPMCmd/tpm/include/prototypes/PP_fp.h deleted file mode 100644 index bdb93eb3..00000000 --- a/TPMCmd/tpm/include/prototypes/PP_fp.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _PP_FP_H_ -#define _PP_FP_H_ - -//*** PhysicalPresencePreInstall_Init() -// This function is used to initialize the array of commands that always require -// confirmation with physical presence. The array is an array of bits that -// has a correspondence with the command code. -// -// This command should only ever be executable in a manufacturing setting or in -// a simulation. -// -// When set, these cannot be cleared. -// -void PhysicalPresencePreInstall_Init(void); - -//*** PhysicalPresenceCommandSet() -// This function is used to set the indicator that a command requires -// PP confirmation. -void PhysicalPresenceCommandSet(TPM_CC commandCode // IN: command code -); - -//*** PhysicalPresenceCommandClear() -// This function is used to clear the indicator that a command requires PP -// confirmation. -void PhysicalPresenceCommandClear(TPM_CC commandCode // IN: command code -); - -//*** PhysicalPresenceIsRequired() -// This function indicates if PP confirmation is required for a command. -// Return Type: BOOL -// TRUE(1) physical presence is required -// FALSE(0) physical presence is not required -BOOL PhysicalPresenceIsRequired(COMMAND_INDEX commandIndex // IN: command index -); - -//*** PhysicalPresenceCapGetCCList() -// This function returns a list of commands that require PP confirmation. The -// list starts from the first implemented command that has a command code that -// the same or greater than 'commandCode'. -// Return Type: TPMI_YES_NO -// YES if there are more command codes available -// NO all the available command codes have been returned -TPMI_YES_NO -PhysicalPresenceCapGetCCList(TPM_CC commandCode, // IN: start command code - UINT32 count, // IN: count of returned TPM_CC - TPML_CC* commandList // OUT: list of TPM_CC -); - -#endif // _PP_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/PolicyAuthValue_fp.h b/TPMCmd/tpm/include/prototypes/PolicyAuthValue_fp.h deleted file mode 100644 index 01de032b..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyAuthValue_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyAuthValue // Command must be enabled - -# ifndef _Policy_Auth_Value_FP_H_ -# define _Policy_Auth_Value_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; -} PolicyAuthValue_In; - -// Response code modifiers -# define RC_PolicyAuthValue_policySession (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyAuthValue(PolicyAuthValue_In* in); - -# endif // _Policy_Auth_Value_FP_H_ -#endif // CC_PolicyAuthValue diff --git a/TPMCmd/tpm/include/prototypes/PolicyAuthorizeNV_fp.h b/TPMCmd/tpm/include/prototypes/PolicyAuthorizeNV_fp.h deleted file mode 100644 index 9f70e9d6..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyAuthorizeNV_fp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyAuthorizeNV // Command must be enabled - -# ifndef _Policy_Authorize_NV_FP_H_ -# define _Policy_Authorize_NV_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_NV_INDEX nvIndex; - TPMI_SH_POLICY policySession; -} PolicyAuthorizeNV_In; - -// Response code modifiers -# define RC_PolicyAuthorizeNV_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_PolicyAuthorizeNV_nvIndex (TPM_RC_H + TPM_RC_2) -# define RC_PolicyAuthorizeNV_policySession (TPM_RC_H + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_PolicyAuthorizeNV(PolicyAuthorizeNV_In* in); - -# endif // _Policy_Authorize_NV_FP_H_ -#endif // CC_PolicyAuthorizeNV diff --git a/TPMCmd/tpm/include/prototypes/PolicyAuthorize_fp.h b/TPMCmd/tpm/include/prototypes/PolicyAuthorize_fp.h deleted file mode 100644 index fddf5342..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyAuthorize_fp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyAuthorize // Command must be enabled - -# ifndef _Policy_Authorize_FP_H_ -# define _Policy_Authorize_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPM2B_DIGEST approvedPolicy; - TPM2B_NONCE policyRef; - TPM2B_NAME keySign; - TPMT_TK_VERIFIED checkTicket; -} PolicyAuthorize_In; - -// Response code modifiers -# define RC_PolicyAuthorize_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyAuthorize_approvedPolicy (TPM_RC_P + TPM_RC_1) -# define RC_PolicyAuthorize_policyRef (TPM_RC_P + TPM_RC_2) -# define RC_PolicyAuthorize_keySign (TPM_RC_P + TPM_RC_3) -# define RC_PolicyAuthorize_checkTicket (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_PolicyAuthorize(PolicyAuthorize_In* in); - -# endif // _Policy_Authorize_FP_H_ -#endif // CC_PolicyAuthorize diff --git a/TPMCmd/tpm/include/prototypes/PolicyCommandCode_fp.h b/TPMCmd/tpm/include/prototypes/PolicyCommandCode_fp.h deleted file mode 100644 index 9643b073..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyCommandCode_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyCommandCode // Command must be enabled - -# ifndef _Policy_Command_Code_FP_H_ -# define _Policy_Command_Code_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPM_CC code; -} PolicyCommandCode_In; - -// Response code modifiers -# define RC_PolicyCommandCode_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyCommandCode_code (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyCommandCode(PolicyCommandCode_In* in); - -# endif // _Policy_Command_Code_FP_H_ -#endif // CC_PolicyCommandCode diff --git a/TPMCmd/tpm/include/prototypes/PolicyCounterTimer_fp.h b/TPMCmd/tpm/include/prototypes/PolicyCounterTimer_fp.h deleted file mode 100644 index 91b5f528..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyCounterTimer_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyCounterTimer // Command must be enabled - -# ifndef _Policy_Counter_Timer_FP_H_ -# define _Policy_Counter_Timer_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPM2B_OPERAND operandB; - UINT16 offset; - TPM_EO operation; -} PolicyCounterTimer_In; - -// Response code modifiers -# define RC_PolicyCounterTimer_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyCounterTimer_operandB (TPM_RC_P + TPM_RC_1) -# define RC_PolicyCounterTimer_offset (TPM_RC_P + TPM_RC_2) -# define RC_PolicyCounterTimer_operation (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_PolicyCounterTimer(PolicyCounterTimer_In* in); - -# endif // _Policy_Counter_Timer_FP_H_ -#endif // CC_PolicyCounterTimer diff --git a/TPMCmd/tpm/include/prototypes/PolicyCpHash_fp.h b/TPMCmd/tpm/include/prototypes/PolicyCpHash_fp.h deleted file mode 100644 index 6faebed6..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyCpHash_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyCpHash // Command must be enabled - -# ifndef _Policy_Cp_Hash_FP_H_ -# define _Policy_Cp_Hash_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPM2B_DIGEST cpHashA; -} PolicyCpHash_In; - -// Response code modifiers -# define RC_PolicyCpHash_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyCpHash_cpHashA (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyCpHash(PolicyCpHash_In* in); - -# endif // _Policy_Cp_Hash_FP_H_ -#endif // CC_PolicyCpHash diff --git a/TPMCmd/tpm/include/prototypes/PolicyDuplicationSelect_fp.h b/TPMCmd/tpm/include/prototypes/PolicyDuplicationSelect_fp.h deleted file mode 100644 index dab07495..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyDuplicationSelect_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyDuplicationSelect // Command must be enabled - -# ifndef _Policy_Duplication_Select_FP_H_ -# define _Policy_Duplication_Select_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPM2B_NAME objectName; - TPM2B_NAME newParentName; - TPMI_YES_NO includeObject; -} PolicyDuplicationSelect_In; - -// Response code modifiers -# define RC_PolicyDuplicationSelect_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyDuplicationSelect_objectName (TPM_RC_P + TPM_RC_1) -# define RC_PolicyDuplicationSelect_newParentName (TPM_RC_P + TPM_RC_2) -# define RC_PolicyDuplicationSelect_includeObject (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_PolicyDuplicationSelect(PolicyDuplicationSelect_In* in); - -# endif // _Policy_Duplication_Select_FP_H_ -#endif // CC_PolicyDuplicationSelect diff --git a/TPMCmd/tpm/include/prototypes/PolicyGetDigest_fp.h b/TPMCmd/tpm/include/prototypes/PolicyGetDigest_fp.h deleted file mode 100644 index 7451c84b..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyGetDigest_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyGetDigest // Command must be enabled - -# ifndef _Policy_Get_Digest_FP_H_ -# define _Policy_Get_Digest_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; -} PolicyGetDigest_In; - -// Output structure definition -typedef struct -{ - TPM2B_DIGEST policyDigest; -} PolicyGetDigest_Out; - -// Response code modifiers -# define RC_PolicyGetDigest_policySession (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyGetDigest(PolicyGetDigest_In* in, PolicyGetDigest_Out* out); - -# endif // _Policy_Get_Digest_FP_H_ -#endif // CC_PolicyGetDigest diff --git a/TPMCmd/tpm/include/prototypes/PolicyLocality_fp.h b/TPMCmd/tpm/include/prototypes/PolicyLocality_fp.h deleted file mode 100644 index 44ad3f90..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyLocality_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyLocality // Command must be enabled - -# ifndef _Policy_Locality_FP_H_ -# define _Policy_Locality_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPMA_LOCALITY locality; -} PolicyLocality_In; - -// Response code modifiers -# define RC_PolicyLocality_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyLocality_locality (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyLocality(PolicyLocality_In* in); - -# endif // _Policy_Locality_FP_H_ -#endif // CC_PolicyLocality diff --git a/TPMCmd/tpm/include/prototypes/PolicyNV_fp.h b/TPMCmd/tpm/include/prototypes/PolicyNV_fp.h deleted file mode 100644 index 21cdb862..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyNV_fp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyNV // Command must be enabled - -# ifndef _Policy_NV_FP_H_ -# define _Policy_NV_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_NV_AUTH authHandle; - TPMI_RH_NV_INDEX nvIndex; - TPMI_SH_POLICY policySession; - TPM2B_OPERAND operandB; - UINT16 offset; - TPM_EO operation; -} PolicyNV_In; - -// Response code modifiers -# define RC_PolicyNV_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_PolicyNV_nvIndex (TPM_RC_H + TPM_RC_2) -# define RC_PolicyNV_policySession (TPM_RC_H + TPM_RC_3) -# define RC_PolicyNV_operandB (TPM_RC_P + TPM_RC_1) -# define RC_PolicyNV_offset (TPM_RC_P + TPM_RC_2) -# define RC_PolicyNV_operation (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_PolicyNV(PolicyNV_In* in); - -# endif // _Policy_NV_FP_H_ -#endif // CC_PolicyNV diff --git a/TPMCmd/tpm/include/prototypes/PolicyNameHash_fp.h b/TPMCmd/tpm/include/prototypes/PolicyNameHash_fp.h deleted file mode 100644 index eb4d8f8c..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyNameHash_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyNameHash // Command must be enabled - -# ifndef _Policy_Name_Hash_FP_H_ -# define _Policy_Name_Hash_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPM2B_DIGEST nameHash; -} PolicyNameHash_In; - -// Response code modifiers -# define RC_PolicyNameHash_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyNameHash_nameHash (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyNameHash(PolicyNameHash_In* in); - -# endif // _Policy_Name_Hash_FP_H_ -#endif // CC_PolicyNameHash diff --git a/TPMCmd/tpm/include/prototypes/PolicyNvWritten_fp.h b/TPMCmd/tpm/include/prototypes/PolicyNvWritten_fp.h deleted file mode 100644 index 1257978f..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyNvWritten_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyNvWritten // Command must be enabled - -# ifndef _Policy_Nv_Written_FP_H_ -# define _Policy_Nv_Written_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPMI_YES_NO writtenSet; -} PolicyNvWritten_In; - -// Response code modifiers -# define RC_PolicyNvWritten_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyNvWritten_writtenSet (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyNvWritten(PolicyNvWritten_In* in); - -# endif // _Policy_Nv_Written_FP_H_ -#endif // CC_PolicyNvWritten diff --git a/TPMCmd/tpm/include/prototypes/PolicyOR_fp.h b/TPMCmd/tpm/include/prototypes/PolicyOR_fp.h deleted file mode 100644 index f53c3b3e..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyOR_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyOR // Command must be enabled - -# ifndef _Policy_OR_FP_H_ -# define _Policy_OR_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPML_DIGEST pHashList; -} PolicyOR_In; - -// Response code modifiers -# define RC_PolicyOR_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyOR_pHashList (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyOR(PolicyOR_In* in); - -# endif // _Policy_OR_FP_H_ -#endif // CC_PolicyOR diff --git a/TPMCmd/tpm/include/prototypes/PolicyPCR_fp.h b/TPMCmd/tpm/include/prototypes/PolicyPCR_fp.h deleted file mode 100644 index 4998b8b7..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyPCR_fp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyPCR // Command must be enabled - -# ifndef _Policy_PCR_FP_H_ -# define _Policy_PCR_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPM2B_DIGEST pcrDigest; - TPML_PCR_SELECTION pcrs; -} PolicyPCR_In; - -// Response code modifiers -# define RC_PolicyPCR_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyPCR_pcrDigest (TPM_RC_P + TPM_RC_1) -# define RC_PolicyPCR_pcrs (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_PolicyPCR(PolicyPCR_In* in); - -# endif // _Policy_PCR_FP_H_ -#endif // CC_PolicyPCR diff --git a/TPMCmd/tpm/include/prototypes/PolicyPassword_fp.h b/TPMCmd/tpm/include/prototypes/PolicyPassword_fp.h deleted file mode 100644 index 72abc40f..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyPassword_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyPassword // Command must be enabled - -# ifndef _Policy_Password_FP_H_ -# define _Policy_Password_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; -} PolicyPassword_In; - -// Response code modifiers -# define RC_PolicyPassword_policySession (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyPassword(PolicyPassword_In* in); - -# endif // _Policy_Password_FP_H_ -#endif // CC_PolicyPassword diff --git a/TPMCmd/tpm/include/prototypes/PolicyPhysicalPresence_fp.h b/TPMCmd/tpm/include/prototypes/PolicyPhysicalPresence_fp.h deleted file mode 100644 index 7974d3ce..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyPhysicalPresence_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyPhysicalPresence // Command must be enabled - -# ifndef _Policy_Physical_Presence_FP_H_ -# define _Policy_Physical_Presence_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; -} PolicyPhysicalPresence_In; - -// Response code modifiers -# define RC_PolicyPhysicalPresence_policySession (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyPhysicalPresence(PolicyPhysicalPresence_In* in); - -# endif // _Policy_Physical_Presence_FP_H_ -#endif // CC_PolicyPhysicalPresence diff --git a/TPMCmd/tpm/include/prototypes/PolicyRestart_fp.h b/TPMCmd/tpm/include/prototypes/PolicyRestart_fp.h deleted file mode 100644 index 613ce563..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyRestart_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyRestart // Command must be enabled - -# ifndef _Policy_Restart_FP_H_ -# define _Policy_Restart_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY sessionHandle; -} PolicyRestart_In; - -// Response code modifiers -# define RC_PolicyRestart_sessionHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyRestart(PolicyRestart_In* in); - -# endif // _Policy_Restart_FP_H_ -#endif // CC_PolicyRestart diff --git a/TPMCmd/tpm/include/prototypes/PolicySecret_fp.h b/TPMCmd/tpm/include/prototypes/PolicySecret_fp.h deleted file mode 100644 index 2aaedd17..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicySecret_fp.h +++ /dev/null @@ -1,76 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicySecret // Command must be enabled - -# ifndef _Policy_Secret_FP_H_ -# define _Policy_Secret_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_ENTITY authHandle; - TPMI_SH_POLICY policySession; - TPM2B_NONCE nonceTPM; - TPM2B_DIGEST cpHashA; - TPM2B_NONCE policyRef; - INT32 expiration; -} PolicySecret_In; - -// Output structure definition -typedef struct -{ - TPM2B_TIMEOUT timeout; - TPMT_TK_AUTH policyTicket; -} PolicySecret_Out; - -// Response code modifiers -# define RC_PolicySecret_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_PolicySecret_policySession (TPM_RC_H + TPM_RC_2) -# define RC_PolicySecret_nonceTPM (TPM_RC_P + TPM_RC_1) -# define RC_PolicySecret_cpHashA (TPM_RC_P + TPM_RC_2) -# define RC_PolicySecret_policyRef (TPM_RC_P + TPM_RC_3) -# define RC_PolicySecret_expiration (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_PolicySecret(PolicySecret_In* in, PolicySecret_Out* out); - -# endif // _Policy_Secret_FP_H_ -#endif // CC_PolicySecret diff --git a/TPMCmd/tpm/include/prototypes/PolicySigned_fp.h b/TPMCmd/tpm/include/prototypes/PolicySigned_fp.h deleted file mode 100644 index 6f8d8dfe..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicySigned_fp.h +++ /dev/null @@ -1,78 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicySigned // Command must be enabled - -# ifndef _Policy_Signed_FP_H_ -# define _Policy_Signed_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT authObject; - TPMI_SH_POLICY policySession; - TPM2B_NONCE nonceTPM; - TPM2B_DIGEST cpHashA; - TPM2B_NONCE policyRef; - INT32 expiration; - TPMT_SIGNATURE auth; -} PolicySigned_In; - -// Output structure definition -typedef struct -{ - TPM2B_TIMEOUT timeout; - TPMT_TK_AUTH policyTicket; -} PolicySigned_Out; - -// Response code modifiers -# define RC_PolicySigned_authObject (TPM_RC_H + TPM_RC_1) -# define RC_PolicySigned_policySession (TPM_RC_H + TPM_RC_2) -# define RC_PolicySigned_nonceTPM (TPM_RC_P + TPM_RC_1) -# define RC_PolicySigned_cpHashA (TPM_RC_P + TPM_RC_2) -# define RC_PolicySigned_policyRef (TPM_RC_P + TPM_RC_3) -# define RC_PolicySigned_expiration (TPM_RC_P + TPM_RC_4) -# define RC_PolicySigned_auth (TPM_RC_P + TPM_RC_5) - -// Function prototype -TPM_RC -TPM2_PolicySigned(PolicySigned_In* in, PolicySigned_Out* out); - -# endif // _Policy_Signed_FP_H_ -#endif // CC_PolicySigned diff --git a/TPMCmd/tpm/include/prototypes/PolicyTemplate_fp.h b/TPMCmd/tpm/include/prototypes/PolicyTemplate_fp.h deleted file mode 100644 index f2b075c8..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyTemplate_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyTemplate // Command must be enabled - -# ifndef _Policy_Template_FP_H_ -# define _Policy_Template_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPM2B_DIGEST templateHash; -} PolicyTemplate_In; - -// Response code modifiers -# define RC_PolicyTemplate_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyTemplate_templateHash (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_PolicyTemplate(PolicyTemplate_In* in); - -# endif // _Policy_Template_FP_H_ -#endif // CC_PolicyTemplate diff --git a/TPMCmd/tpm/include/prototypes/PolicyTicket_fp.h b/TPMCmd/tpm/include/prototypes/PolicyTicket_fp.h deleted file mode 100644 index cc7e60fb..00000000 --- a/TPMCmd/tpm/include/prototypes/PolicyTicket_fp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_PolicyTicket // Command must be enabled - -# ifndef _Policy_Ticket_FP_H_ -# define _Policy_Ticket_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPM2B_TIMEOUT timeout; - TPM2B_DIGEST cpHashA; - TPM2B_NONCE policyRef; - TPM2B_NAME authName; - TPMT_TK_AUTH ticket; -} PolicyTicket_In; - -// Response code modifiers -# define RC_PolicyTicket_policySession (TPM_RC_H + TPM_RC_1) -# define RC_PolicyTicket_timeout (TPM_RC_P + TPM_RC_1) -# define RC_PolicyTicket_cpHashA (TPM_RC_P + TPM_RC_2) -# define RC_PolicyTicket_policyRef (TPM_RC_P + TPM_RC_3) -# define RC_PolicyTicket_authName (TPM_RC_P + TPM_RC_4) -# define RC_PolicyTicket_ticket (TPM_RC_P + TPM_RC_5) - -// Function prototype -TPM_RC -TPM2_PolicyTicket(PolicyTicket_In* in); - -# endif // _Policy_Ticket_FP_H_ -#endif // CC_PolicyTicket diff --git a/TPMCmd/tpm/include/prototypes/Policy_AC_SendSelect_fp.h b/TPMCmd/tpm/include/prototypes/Policy_AC_SendSelect_fp.h deleted file mode 100644 index 8b5c14e8..00000000 --- a/TPMCmd/tpm/include/prototypes/Policy_AC_SendSelect_fp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Policy_AC_SendSelect // Command must be enabled - -# ifndef _Policy_AC_Send_Select_FP_H_ -# define _Policy_AC_Send_Select_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_SH_POLICY policySession; - TPM2B_NAME objectName; - TPM2B_NAME authHandleName; - TPM2B_NAME acName; - TPMI_YES_NO includeObject; -} Policy_AC_SendSelect_In; - -// Response code modifiers -# define RC_Policy_AC_SendSelect_policySession (TPM_RC_H + TPM_RC_1) -# define RC_Policy_AC_SendSelect_objectName (TPM_RC_P + TPM_RC_1) -# define RC_Policy_AC_SendSelect_authHandleName (TPM_RC_P + TPM_RC_2) -# define RC_Policy_AC_SendSelect_acName (TPM_RC_P + TPM_RC_3) -# define RC_Policy_AC_SendSelect_includeObject (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_Policy_AC_SendSelect(Policy_AC_SendSelect_In* in); - -# endif // _Policy_AC_Send_Select_FP_H_ -#endif // CC_Policy_AC_SendSelect diff --git a/TPMCmd/tpm/include/prototypes/Policy_spt_fp.h b/TPMCmd/tpm/include/prototypes/Policy_spt_fp.h deleted file mode 100644 index 1f0cf408..00000000 --- a/TPMCmd/tpm/include/prototypes/Policy_spt_fp.h +++ /dev/null @@ -1,92 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 4, 2020 Time: 02:36:44PM - */ - -#ifndef _POLICY_SPT_FP_H_ -#define _POLICY_SPT_FP_H_ - -//** Functions -//*** PolicyParameterChecks() -// This function validates the common parameters of TPM2_PolicySiged() -// and TPM2_PolicySecret(). The common parameters are 'nonceTPM', -// 'expiration', and 'cpHashA'. -TPM_RC -PolicyParameterChecks(SESSION* session, - UINT64 authTimeout, - TPM2B_DIGEST* cpHashA, - TPM2B_NONCE* nonce, - TPM_RC blameNonce, - TPM_RC blameCpHash, - TPM_RC blameExpiration); - -//*** PolicyContextUpdate() -// Update policy hash -// Update the policyDigest in policy session by extending policyRef and -// objectName to it. This will also update the cpHash if it is present. -// -// Return Type: void -void PolicyContextUpdate( - TPM_CC commandCode, // IN: command code - TPM2B_NAME* name, // IN: name of entity - TPM2B_NONCE* ref, // IN: the reference data - TPM2B_DIGEST* cpHash, // IN: the cpHash (optional) - UINT64 policyTimeout, // IN: the timeout value for the policy - SESSION* session // IN/OUT: policy session to be updated -); - -//*** ComputeAuthTimeout() -// This function is used to determine what the authorization timeout value for -// the session should be. -UINT64 -ComputeAuthTimeout(SESSION* session, // IN: the session containing the time - // values - INT32 expiration, // IN: either the number of seconds from - // the start of the session or the - // time in g_timer; - TPM2B_NONCE* nonce // IN: indicator of the time base -); - -//*** PolicyDigestClear() -// Function to reset the policyDigest of a session -void PolicyDigestClear(SESSION* session); - -//*** PolicySptCheckCondition() -// Checks to see if the condition in the policy is satisfied. -BOOL PolicySptCheckCondition(TPM_EO operation, BYTE* opA, BYTE* opB, UINT16 size); - -#endif // _POLICY_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Power_fp.h b/TPMCmd/tpm/include/prototypes/Power_fp.h deleted file mode 100644 index 6c61c369..00000000 --- a/TPMCmd/tpm/include/prototypes/Power_fp.h +++ /dev/null @@ -1,60 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 11:00:49AM - */ - -#ifndef _POWER_FP_H_ -#define _POWER_FP_H_ - -//*** TPMInit() -// This function is used to process a power on event. -void TPMInit(void); - -//*** TPMRegisterStartup() -// This function registers the fact that the TPM has been initialized -// (a TPM2_Startup() has completed successfully). -BOOL TPMRegisterStartup(void); - -//*** TPMIsStarted() -// Indicates if the TPM has been initialized (a TPM2_Startup() has completed -// successfully after a _TPM_Init). -// Return Type: BOOL -// TRUE(1) TPM has been initialized -// FALSE(0) TPM has not been initialized -BOOL TPMIsStarted(void); - -#endif // _POWER_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/PropertyCap_fp.h b/TPMCmd/tpm/include/prototypes/PropertyCap_fp.h deleted file mode 100644 index ea4d7c4d..00000000 --- a/TPMCmd/tpm/include/prototypes/PropertyCap_fp.h +++ /dev/null @@ -1,58 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _PROPERTY_CAP_FP_H_ -#define _PROPERTY_CAP_FP_H_ - -//*** TPMCapGetProperties() -// This function is used to get the TPM_PT values. The search of properties will -// start at 'property' and continue until 'propertyList' has as many values as -// will fit, or the last property has been reported, or the list has as many -// values as requested in 'count'. -// Return Type: TPMI_YES_NO -// YES more properties are available -// NO no more properties to be reported -TPMI_YES_NO -TPMCapGetProperties(TPM_PT property, // IN: the starting TPM property - UINT32 count, // IN: maximum number of returned - // properties - TPML_TAGGED_TPM_PROPERTY* propertyList // OUT: property list -); - -#endif // _PROPERTY_CAP_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Quote_fp.h b/TPMCmd/tpm/include/prototypes/Quote_fp.h deleted file mode 100644 index d02ef64c..00000000 --- a/TPMCmd/tpm/include/prototypes/Quote_fp.h +++ /dev/null @@ -1,72 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Quote // Command must be enabled - -# ifndef _Quote_FP_H_ -# define _Quote_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT signHandle; - TPM2B_DATA qualifyingData; - TPMT_SIG_SCHEME inScheme; - TPML_PCR_SELECTION PCRselect; -} Quote_In; - -// Output structure definition -typedef struct -{ - TPM2B_ATTEST quoted; - TPMT_SIGNATURE signature; -} Quote_Out; - -// Response code modifiers -# define RC_Quote_signHandle (TPM_RC_H + TPM_RC_1) -# define RC_Quote_qualifyingData (TPM_RC_P + TPM_RC_1) -# define RC_Quote_inScheme (TPM_RC_P + TPM_RC_2) -# define RC_Quote_PCRselect (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_Quote(Quote_In* in, Quote_Out* out); - -# endif // _Quote_FP_H_ -#endif // CC_Quote diff --git a/TPMCmd/tpm/include/prototypes/RSA_Decrypt_fp.h b/TPMCmd/tpm/include/prototypes/RSA_Decrypt_fp.h deleted file mode 100644 index a35d4008..00000000 --- a/TPMCmd/tpm/include/prototypes/RSA_Decrypt_fp.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_RSA_Decrypt // Command must be enabled - -# ifndef _RSA_Decrypt_FP_H_ -# define _RSA_Decrypt_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyHandle; - TPM2B_PUBLIC_KEY_RSA cipherText; - TPMT_RSA_DECRYPT inScheme; - TPM2B_DATA label; -} RSA_Decrypt_In; - -// Output structure definition -typedef struct -{ - TPM2B_PUBLIC_KEY_RSA message; -} RSA_Decrypt_Out; - -// Response code modifiers -# define RC_RSA_Decrypt_keyHandle (TPM_RC_H + TPM_RC_1) -# define RC_RSA_Decrypt_cipherText (TPM_RC_P + TPM_RC_1) -# define RC_RSA_Decrypt_inScheme (TPM_RC_P + TPM_RC_2) -# define RC_RSA_Decrypt_label (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_RSA_Decrypt(RSA_Decrypt_In* in, RSA_Decrypt_Out* out); - -# endif // _RSA_Decrypt_FP_H_ -#endif // CC_RSA_Decrypt diff --git a/TPMCmd/tpm/include/prototypes/RSA_Encrypt_fp.h b/TPMCmd/tpm/include/prototypes/RSA_Encrypt_fp.h deleted file mode 100644 index dccf30b9..00000000 --- a/TPMCmd/tpm/include/prototypes/RSA_Encrypt_fp.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_RSA_Encrypt // Command must be enabled - -# ifndef _RSA_Encrypt_FP_H_ -# define _RSA_Encrypt_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyHandle; - TPM2B_PUBLIC_KEY_RSA message; - TPMT_RSA_DECRYPT inScheme; - TPM2B_DATA label; -} RSA_Encrypt_In; - -// Output structure definition -typedef struct -{ - TPM2B_PUBLIC_KEY_RSA outData; -} RSA_Encrypt_Out; - -// Response code modifiers -# define RC_RSA_Encrypt_keyHandle (TPM_RC_H + TPM_RC_1) -# define RC_RSA_Encrypt_message (TPM_RC_P + TPM_RC_1) -# define RC_RSA_Encrypt_inScheme (TPM_RC_P + TPM_RC_2) -# define RC_RSA_Encrypt_label (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_RSA_Encrypt(RSA_Encrypt_In* in, RSA_Encrypt_Out* out); - -# endif // _RSA_Encrypt_FP_H_ -#endif // CC_RSA_Encrypt diff --git a/TPMCmd/tpm/include/prototypes/ReadClock_fp.h b/TPMCmd/tpm/include/prototypes/ReadClock_fp.h deleted file mode 100644 index ef301f7b..00000000 --- a/TPMCmd/tpm/include/prototypes/ReadClock_fp.h +++ /dev/null @@ -1,56 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ReadClock // Command must be enabled - -# ifndef _Read_Clock_FP_H_ -# define _Read_Clock_FP_H_ - -// Output structure definition -typedef struct -{ - TPMS_TIME_INFO currentTime; -} ReadClock_Out; - -// Function prototype -TPM_RC -TPM2_ReadClock(ReadClock_Out* out); - -# endif // _Read_Clock_FP_H_ -#endif // CC_ReadClock diff --git a/TPMCmd/tpm/include/prototypes/ReadPublic_fp.h b/TPMCmd/tpm/include/prototypes/ReadPublic_fp.h deleted file mode 100644 index 099676e2..00000000 --- a/TPMCmd/tpm/include/prototypes/ReadPublic_fp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ReadPublic // Command must be enabled - -# ifndef _Read_Public_FP_H_ -# define _Read_Public_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT objectHandle; -} ReadPublic_In; - -// Output structure definition -typedef struct -{ - TPM2B_PUBLIC outPublic; - TPM2B_NAME name; - TPM2B_NAME qualifiedName; -} ReadPublic_Out; - -// Response code modifiers -# define RC_ReadPublic_objectHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_ReadPublic(ReadPublic_In* in, ReadPublic_Out* out); - -# endif // _Read_Public_FP_H_ -#endif // CC_ReadPublic diff --git a/TPMCmd/tpm/include/prototypes/ResponseCodeProcessing_fp.h b/TPMCmd/tpm/include/prototypes/ResponseCodeProcessing_fp.h deleted file mode 100644 index ec4b83a2..00000000 --- a/TPMCmd/tpm/include/prototypes/ResponseCodeProcessing_fp.h +++ /dev/null @@ -1,49 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _RESPONSE_CODE_PROCESSING_FP_H_ -#define _RESPONSE_CODE_PROCESSING_FP_H_ - -//** RcSafeAddToResult() -// Adds a modifier to a response code as long as the response code allows a modifier -// and no modifier has already been added. -TPM_RC -RcSafeAddToResult(TPM_RC responseCode, TPM_RC modifier); - -#endif // _RESPONSE_CODE_PROCESSING_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Response_fp.h b/TPMCmd/tpm/include/prototypes/Response_fp.h deleted file mode 100644 index d054742f..00000000 --- a/TPMCmd/tpm/include/prototypes/Response_fp.h +++ /dev/null @@ -1,51 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _RESPONSE_FP_H_ -#define _RESPONSE_FP_H_ - -//** BuildResponseHeader() -// Adds the response header to the response. It will update command->parameterSize -// to indicate the total size of the response. -void BuildResponseHeader(COMMAND* command, // IN: main control structure - BYTE* buffer, // OUT: the output buffer - TPM_RC result // IN: the response code -); - -#endif // _RESPONSE_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Rewrap_fp.h b/TPMCmd/tpm/include/prototypes/Rewrap_fp.h deleted file mode 100644 index 4e208552..00000000 --- a/TPMCmd/tpm/include/prototypes/Rewrap_fp.h +++ /dev/null @@ -1,74 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Rewrap // Command must be enabled - -# ifndef _Rewrap_FP_H_ -# define _Rewrap_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT oldParent; - TPMI_DH_OBJECT newParent; - TPM2B_PRIVATE inDuplicate; - TPM2B_NAME name; - TPM2B_ENCRYPTED_SECRET inSymSeed; -} Rewrap_In; - -// Output structure definition -typedef struct -{ - TPM2B_PRIVATE outDuplicate; - TPM2B_ENCRYPTED_SECRET outSymSeed; -} Rewrap_Out; - -// Response code modifiers -# define RC_Rewrap_oldParent (TPM_RC_H + TPM_RC_1) -# define RC_Rewrap_newParent (TPM_RC_H + TPM_RC_2) -# define RC_Rewrap_inDuplicate (TPM_RC_P + TPM_RC_1) -# define RC_Rewrap_name (TPM_RC_P + TPM_RC_2) -# define RC_Rewrap_inSymSeed (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_Rewrap(Rewrap_In* in, Rewrap_Out* out); - -# endif // _Rewrap_FP_H_ -#endif // CC_Rewrap diff --git a/TPMCmd/tpm/include/prototypes/RsaKeyCache_fp.h b/TPMCmd/tpm/include/prototypes/RsaKeyCache_fp.h deleted file mode 100644 index 030ecd8e..00000000 --- a/TPMCmd/tpm/include/prototypes/RsaKeyCache_fp.h +++ /dev/null @@ -1,60 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _RSA_KEY_CACHE_FP_H_ -#define _RSA_KEY_CACHE_FP_H_ - -#if USE_RSA_KEY_CACHE - -//*** RsaKeyCacheControl() -// Used to enable and disable the RSA key cache. -LIB_EXPORT void RsaKeyCacheControl(int state); - -//*** GetCachedRsaKey() -// Return Type: BOOL -// TRUE(1) key loaded -// FALSE(0) key not loaded -BOOL GetCachedRsaKey(TPMT_PUBLIC* publicArea, - TPMT_SENSITIVE* sensitive, - RAND_STATE* rand // IN: if not NULL, the deterministic - // RNG state -); -#endif // defined SIMULATION && defined USE_RSA_KEY_CACHE - -#endif // _RSA_KEY_CACHE_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/SelfTest_fp.h b/TPMCmd/tpm/include/prototypes/SelfTest_fp.h deleted file mode 100644 index a4277c6d..00000000 --- a/TPMCmd/tpm/include/prototypes/SelfTest_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_SelfTest // Command must be enabled - -# ifndef _Self_Test_FP_H_ -# define _Self_Test_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_YES_NO fullTest; -} SelfTest_In; - -// Response code modifiers -# define RC_SelfTest_fullTest (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_SelfTest(SelfTest_In* in); - -# endif // _Self_Test_FP_H_ -#endif // CC_SelfTest diff --git a/TPMCmd/tpm/include/prototypes/SequenceComplete_fp.h b/TPMCmd/tpm/include/prototypes/SequenceComplete_fp.h deleted file mode 100644 index f2be48b4..00000000 --- a/TPMCmd/tpm/include/prototypes/SequenceComplete_fp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_SequenceComplete // Command must be enabled - -# ifndef _Sequence_Complete_FP_H_ -# define _Sequence_Complete_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT sequenceHandle; - TPM2B_MAX_BUFFER buffer; - TPMI_RH_HIERARCHY hierarchy; -} SequenceComplete_In; - -// Output structure definition -typedef struct -{ - TPM2B_DIGEST result; - TPMT_TK_HASHCHECK validation; -} SequenceComplete_Out; - -// Response code modifiers -# define RC_SequenceComplete_sequenceHandle (TPM_RC_H + TPM_RC_1) -# define RC_SequenceComplete_buffer (TPM_RC_P + TPM_RC_1) -# define RC_SequenceComplete_hierarchy (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_SequenceComplete(SequenceComplete_In* in, SequenceComplete_Out* out); - -# endif // _Sequence_Complete_FP_H_ -#endif // CC_SequenceComplete diff --git a/TPMCmd/tpm/include/prototypes/SequenceUpdate_fp.h b/TPMCmd/tpm/include/prototypes/SequenceUpdate_fp.h deleted file mode 100644 index 8f258d3a..00000000 --- a/TPMCmd/tpm/include/prototypes/SequenceUpdate_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_SequenceUpdate // Command must be enabled - -# ifndef _Sequence_Update_FP_H_ -# define _Sequence_Update_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT sequenceHandle; - TPM2B_MAX_BUFFER buffer; -} SequenceUpdate_In; - -// Response code modifiers -# define RC_SequenceUpdate_sequenceHandle (TPM_RC_H + TPM_RC_1) -# define RC_SequenceUpdate_buffer (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_SequenceUpdate(SequenceUpdate_In* in); - -# endif // _Sequence_Update_FP_H_ -#endif // CC_SequenceUpdate diff --git a/TPMCmd/tpm/include/prototypes/SessionProcess_fp.h b/TPMCmd/tpm/include/prototypes/SessionProcess_fp.h deleted file mode 100644 index bdf007b8..00000000 --- a/TPMCmd/tpm/include/prototypes/SessionProcess_fp.h +++ /dev/null @@ -1,110 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 7, 2020 Time: 07:17:48PM - */ - -#ifndef _SESSION_PROCESS_FP_H_ -#define _SESSION_PROCESS_FP_H_ - -//*** IsDAExempted() -// This function indicates if a handle is exempted from DA logic. -// A handle is exempted if it is: -// a) a primary seed handle; -// b) an object with noDA bit SET; -// c) an NV Index with TPMA_NV_NO_DA bit SET; or -// d) a PCR handle. -// -// Return Type: BOOL -// TRUE(1) handle is exempted from DA logic -// FALSE(0) handle is not exempted from DA logic -BOOL IsDAExempted(TPM_HANDLE handle // IN: entity handle -); - -//*** ClearCpRpHashes() -void ClearCpRpHashes(COMMAND* command); - -//*** CompareNameHash() -// This function computes the name hash and compares it to the nameHash in the -// session data. -BOOL CompareNameHash(COMMAND* command, // IN: main parsing structure - SESSION* session // IN: session structure with nameHash -); - -//*** ParseSessionBuffer() -// This function is the entry function for command session processing. -// It iterates sessions in session area and reports if the required authorization -// has been properly provided. It also processes audit session and passes the -// information of encryption sessions to parameter encryption module. -// -// Return Type: TPM_RC -// various parsing failure or authorization failure -// -TPM_RC -ParseSessionBuffer(COMMAND* command // IN: the structure that contains -); - -//*** CheckAuthNoSession() -// Function to process a command with no session associated. -// The function makes sure all the handles in the command require no authorization. -// -// Return Type: TPM_RC -// TPM_RC_AUTH_MISSING failure - one or more handles require -// authorization -TPM_RC -CheckAuthNoSession(COMMAND* command // IN: command parsing structure -); - -//*** BuildResponseSession() -// Function to build Session buffer in a response. The authorization data is added -// to the end of command->responseBuffer. The size of the authorization area is -// accumulated in command->authSize. -// When this is called, command->responseBuffer is pointing at the next location -// in the response buffer to be filled. This is where the authorization sessions -// will go, if any. command->parameterSize is the number of bytes that have been -// marshaled as parameters in the output buffer. -TPM_RC -BuildResponseSession(COMMAND* command // IN: structure that has relevant command - // information -); - -//*** SessionRemoveAssociationToHandle() -// This function deals with the case where an entity associated with an authorization -// is deleted during command processing. The primary use of this is to support -// UndefineSpaceSpecial(). -void SessionRemoveAssociationToHandle(TPM_HANDLE handle); - -#endif // _SESSION_PROCESS_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/SetAlgorithmSet_fp.h b/TPMCmd/tpm/include/prototypes/SetAlgorithmSet_fp.h deleted file mode 100644 index 8136ee10..00000000 --- a/TPMCmd/tpm/include/prototypes/SetAlgorithmSet_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_SetAlgorithmSet // Command must be enabled - -# ifndef _Set_Algorithm_Set_FP_H_ -# define _Set_Algorithm_Set_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PLATFORM authHandle; - UINT32 algorithmSet; -} SetAlgorithmSet_In; - -// Response code modifiers -# define RC_SetAlgorithmSet_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_SetAlgorithmSet_algorithmSet (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_SetAlgorithmSet(SetAlgorithmSet_In* in); - -# endif // _Set_Algorithm_Set_FP_H_ -#endif // CC_SetAlgorithmSet diff --git a/TPMCmd/tpm/include/prototypes/SetCommandCodeAuditStatus_fp.h b/TPMCmd/tpm/include/prototypes/SetCommandCodeAuditStatus_fp.h deleted file mode 100644 index 30013c50..00000000 --- a/TPMCmd/tpm/include/prototypes/SetCommandCodeAuditStatus_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_SetCommandCodeAuditStatus // Command must be enabled - -# ifndef _Set_Command_Code_Audit_Status_FP_H_ -# define _Set_Command_Code_Audit_Status_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_PROVISION auth; - TPMI_ALG_HASH auditAlg; - TPML_CC setList; - TPML_CC clearList; -} SetCommandCodeAuditStatus_In; - -// Response code modifiers -# define RC_SetCommandCodeAuditStatus_auth (TPM_RC_H + TPM_RC_1) -# define RC_SetCommandCodeAuditStatus_auditAlg (TPM_RC_P + TPM_RC_1) -# define RC_SetCommandCodeAuditStatus_setList (TPM_RC_P + TPM_RC_2) -# define RC_SetCommandCodeAuditStatus_clearList (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_SetCommandCodeAuditStatus(SetCommandCodeAuditStatus_In* in); - -# endif // _Set_Command_Code_Audit_Status_FP_H_ -#endif // CC_SetCommandCodeAuditStatus diff --git a/TPMCmd/tpm/include/prototypes/SetPrimaryPolicy_fp.h b/TPMCmd/tpm/include/prototypes/SetPrimaryPolicy_fp.h deleted file mode 100644 index 352eadf5..00000000 --- a/TPMCmd/tpm/include/prototypes/SetPrimaryPolicy_fp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Oct 2, 2019 Time: 07:41:19PM - */ - -#if CC_SetPrimaryPolicy // Command must be enabled - -# ifndef _SETPRIMARYPOLICY_FP_H_ -# define _SETPRIMARYPOLICY_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_RH_HIERARCHY_POLICY authHandle; - TPM2B_DIGEST authPolicy; - TPMI_ALG_HASH hashAlg; -} SetPrimaryPolicy_In; - -// Response code modifiers -# define RC_SetPrimaryPolicy_authHandle (TPM_RC_H + TPM_RC_1) -# define RC_SetPrimaryPolicy_authPolicy (TPM_RC_P + TPM_RC_1) -# define RC_SetPrimaryPolicy_hashAlg (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_SetPrimaryPolicy(SetPrimaryPolicy_In* in); - -# endif // _SETPRIMARYPOLICY_FP_H_ -#endif // CC_SetPrimaryPolicy diff --git a/TPMCmd/tpm/include/prototypes/Shutdown_fp.h b/TPMCmd/tpm/include/prototypes/Shutdown_fp.h deleted file mode 100644 index 41c28e7b..00000000 --- a/TPMCmd/tpm/include/prototypes/Shutdown_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Shutdown // Command must be enabled - -# ifndef _Shutdown_FP_H_ -# define _Shutdown_FP_H_ - -// Input structure definition -typedef struct -{ - TPM_SU shutdownType; -} Shutdown_In; - -// Response code modifiers -# define RC_Shutdown_shutdownType (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_Shutdown(Shutdown_In* in); - -# endif // _Shutdown_FP_H_ -#endif // CC_Shutdown diff --git a/TPMCmd/tpm/include/prototypes/Sign_fp.h b/TPMCmd/tpm/include/prototypes/Sign_fp.h deleted file mode 100644 index f3a873eb..00000000 --- a/TPMCmd/tpm/include/prototypes/Sign_fp.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Sign // Command must be enabled - -# ifndef _Sign_FP_H_ -# define _Sign_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyHandle; - TPM2B_DIGEST digest; - TPMT_SIG_SCHEME inScheme; - TPMT_TK_HASHCHECK validation; -} Sign_In; - -// Output structure definition -typedef struct -{ - TPMT_SIGNATURE signature; -} Sign_Out; - -// Response code modifiers -# define RC_Sign_keyHandle (TPM_RC_H + TPM_RC_1) -# define RC_Sign_digest (TPM_RC_P + TPM_RC_1) -# define RC_Sign_inScheme (TPM_RC_P + TPM_RC_2) -# define RC_Sign_validation (TPM_RC_P + TPM_RC_3) - -// Function prototype -TPM_RC -TPM2_Sign(Sign_In* in, Sign_Out* out); - -# endif // _Sign_FP_H_ -#endif // CC_Sign diff --git a/TPMCmd/tpm/include/prototypes/StartAuthSession_fp.h b/TPMCmd/tpm/include/prototypes/StartAuthSession_fp.h deleted file mode 100644 index 294ce5a8..00000000 --- a/TPMCmd/tpm/include/prototypes/StartAuthSession_fp.h +++ /dev/null @@ -1,78 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_StartAuthSession // Command must be enabled - -# ifndef _Start_Auth_Session_FP_H_ -# define _Start_Auth_Session_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT tpmKey; - TPMI_DH_ENTITY bind; - TPM2B_NONCE nonceCaller; - TPM2B_ENCRYPTED_SECRET encryptedSalt; - TPM_SE sessionType; - TPMT_SYM_DEF symmetric; - TPMI_ALG_HASH authHash; -} StartAuthSession_In; - -// Output structure definition -typedef struct -{ - TPMI_SH_AUTH_SESSION sessionHandle; - TPM2B_NONCE nonceTPM; -} StartAuthSession_Out; - -// Response code modifiers -# define RC_StartAuthSession_tpmKey (TPM_RC_H + TPM_RC_1) -# define RC_StartAuthSession_bind (TPM_RC_H + TPM_RC_2) -# define RC_StartAuthSession_nonceCaller (TPM_RC_P + TPM_RC_1) -# define RC_StartAuthSession_encryptedSalt (TPM_RC_P + TPM_RC_2) -# define RC_StartAuthSession_sessionType (TPM_RC_P + TPM_RC_3) -# define RC_StartAuthSession_symmetric (TPM_RC_P + TPM_RC_4) -# define RC_StartAuthSession_authHash (TPM_RC_P + TPM_RC_5) - -// Function prototype -TPM_RC -TPM2_StartAuthSession(StartAuthSession_In* in, StartAuthSession_Out* out); - -# endif // _Start_Auth_Session_FP_H_ -#endif // CC_StartAuthSession diff --git a/TPMCmd/tpm/include/prototypes/Startup_fp.h b/TPMCmd/tpm/include/prototypes/Startup_fp.h deleted file mode 100644 index 5e4b1e3d..00000000 --- a/TPMCmd/tpm/include/prototypes/Startup_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Startup // Command must be enabled - -# ifndef _Startup_FP_H_ -# define _Startup_FP_H_ - -// Input structure definition -typedef struct -{ - TPM_SU startupType; -} Startup_In; - -// Response code modifiers -# define RC_Startup_startupType (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_Startup(Startup_In* in); - -# endif // _Startup_FP_H_ -#endif // CC_Startup diff --git a/TPMCmd/tpm/include/prototypes/StirRandom_fp.h b/TPMCmd/tpm/include/prototypes/StirRandom_fp.h deleted file mode 100644 index aa013b1a..00000000 --- a/TPMCmd/tpm/include/prototypes/StirRandom_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_StirRandom // Command must be enabled - -# ifndef _Stir_Random_FP_H_ -# define _Stir_Random_FP_H_ - -// Input structure definition -typedef struct -{ - TPM2B_SENSITIVE_DATA inData; -} StirRandom_In; - -// Response code modifiers -# define RC_StirRandom_inData (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_StirRandom(StirRandom_In* in); - -# endif // _Stir_Random_FP_H_ -#endif // CC_StirRandom diff --git a/TPMCmd/tpm/include/prototypes/TableDrivenMarshal_fp.h b/TPMCmd/tpm/include/prototypes/TableDrivenMarshal_fp.h deleted file mode 100644 index 4b053fb8..00000000 --- a/TPMCmd/tpm/include/prototypes/TableDrivenMarshal_fp.h +++ /dev/null @@ -1,92 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 4, 2020 Time: 02:36:44PM - */ - -#ifndef _TABLE_DRIVEN_MARSHAL_FP_H_ -#define _TABLE_DRIVEN_MARSHAL_FP_H_ - -#if TABLE_DRIVEN_MARSHAL - -//***UnmarshalUnion() -TPM_RC -UnmarshalUnion(UINT16 typeIndex, // IN: the thing to unmarshal - void* target, // IN: were the data goes to - UINT8** buffer, // IN/OUT: the data source buffer - INT32* size, // IN/OUT: the remaining size - UINT32 selector); - -//*** MarshalUnion() -UINT16 -MarshalUnion(UINT16 typeIndex, // IN: the thing to marshal - void* source, // IN: were the data comes from - UINT8** buffer, // IN/OUT: the data source buffer - INT32* size, // IN/OUT: the remaining size - UINT32 selector // IN: the union selector -); - -TPM_RC -UnmarshalInteger(int iSize, // IN: Number of bytes in the integer - void* target, // OUT: receives the integer - UINT8** buffer, // IN/OUT: source of the data - INT32* size, // IN/OUT: amount of data available - UINT32* value // OUT: optional copy of 'target' -); - -//*** Unmarshal() -// This is the function that performs unmarshaling of different numbered types. Each -// TPM type has a number. The number is used to lookup the address of the data -// structure that describes how to unmarshal that data type. -// -TPM_RC -Unmarshal(UINT16 typeIndex, // IN: the thing to marshal - void* target, // IN: were the data goes from - UINT8** buffer, // IN/OUT: the data source buffer - INT32* size // IN/OUT: the remaining size -); - -//*** Marshal() -// This is the function that drives marshaling of output. Because there is no -// validation of the output, there is a lot less code. -UINT16 Marshal(UINT16 typeIndex, // IN: the thing to marshal - void* source, // IN: were the data comes from - UINT8** buffer, // IN/OUT: the data source buffer - INT32* size // IN/OUT: the remaining size -); -#endif // TABLE_DRIVEN_MARSHAL - -#endif // _TABLE_DRIVEN_MARSHAL_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TestParms_fp.h b/TPMCmd/tpm/include/prototypes/TestParms_fp.h deleted file mode 100644 index 7a291965..00000000 --- a/TPMCmd/tpm/include/prototypes/TestParms_fp.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_TestParms // Command must be enabled - -# ifndef _Test_Parms_FP_H_ -# define _Test_Parms_FP_H_ - -// Input structure definition -typedef struct -{ - TPMT_PUBLIC_PARMS parameters; -} TestParms_In; - -// Response code modifiers -# define RC_TestParms_parameters (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_TestParms(TestParms_In* in); - -# endif // _Test_Parms_FP_H_ -#endif // CC_TestParms diff --git a/TPMCmd/tpm/include/prototypes/Ticket_fp.h b/TPMCmd/tpm/include/prototypes/Ticket_fp.h deleted file mode 100644 index 48a3a84e..00000000 --- a/TPMCmd/tpm/include/prototypes/Ticket_fp.h +++ /dev/null @@ -1,93 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _TICKET_FP_H_ -#define _TICKET_FP_H_ - -//*** TicketIsSafe() -// This function indicates if producing a ticket is safe. -// It checks if the leading bytes of an input buffer is TPM_GENERATED_VALUE -// or its substring of canonical form. If so, it is not safe to produce ticket -// for an input buffer claiming to be TPM generated buffer -// Return Type: BOOL -// TRUE(1) safe to produce ticket -// FALSE(0) not safe to produce ticket -BOOL TicketIsSafe(TPM2B* buffer); - -//*** TicketComputeVerified() -// This function creates a TPMT_TK_VERIFIED ticket. -void TicketComputeVerified( - TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant for ticket - TPM2B_DIGEST* digest, // IN: digest - TPM2B_NAME* keyName, // IN: name of key that signed the values - TPMT_TK_VERIFIED* ticket // OUT: verified ticket -); - -//*** TicketComputeAuth() -// This function creates a TPMT_TK_AUTH ticket. -void TicketComputeAuth( - TPM_ST type, // IN: the type of ticket. - TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant for ticket - UINT64 timeout, // IN: timeout - BOOL expiresOnReset, // IN: flag to indicate if ticket expires on - // TPM Reset - TPM2B_DIGEST* cpHashA, // IN: input cpHashA - TPM2B_NONCE* policyRef, // IN: input policyRef - TPM2B_NAME* entityName, // IN: name of entity - TPMT_TK_AUTH* ticket // OUT: Created ticket -); - -//*** TicketComputeHashCheck() -// This function creates a TPMT_TK_HASHCHECK ticket. -void TicketComputeHashCheck( - TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant for ticket - TPM_ALG_ID hashAlg, // IN: the hash algorithm for 'digest' - TPM2B_DIGEST* digest, // IN: input digest - TPMT_TK_HASHCHECK* ticket // OUT: Created ticket -); - -//*** TicketComputeCreation() -// This function creates a TPMT_TK_CREATION ticket. -void TicketComputeCreation(TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy for ticket - TPM2B_NAME* name, // IN: object name - TPM2B_DIGEST* creation, // IN: creation hash - TPMT_TK_CREATION* ticket // OUT: created ticket -); - -#endif // _TICKET_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Time_fp.h b/TPMCmd/tpm/include/prototypes/Time_fp.h deleted file mode 100644 index 329c6b23..00000000 --- a/TPMCmd/tpm/include/prototypes/Time_fp.h +++ /dev/null @@ -1,120 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 04:23:27PM - */ - -#ifndef _TIME_FP_H_ -#define _TIME_FP_H_ - -//*** TimePowerOn() -// This function initialize time info at _TPM_Init(). -// -// This function is called at _TPM_Init() so that the TPM time can start counting -// as soon as the TPM comes out of reset and doesn't have to wait until -// TPM2_Startup() in order to begin the new time epoch. This could be significant -// for systems that could get powered up but not run any TPM commands for some -// period of time. -// -void TimePowerOn(void); - -//*** TimeStartup() -// This function updates the resetCount and restartCount components of -// TPMS_CLOCK_INFO structure at TPM2_Startup(). -// -// This function will deal with the deferred creation of a new epoch. -// TimeUpdateToCurrent() will not start a new epoch even if one is due when -// TPM_Startup() has not been run. This is because the state of NV is not known -// until startup completes. When Startup is done, then it will create the epoch -// nonce to complete the initializations by calling this function. -BOOL TimeStartup(STARTUP_TYPE type // IN: start up type -); - -//*** TimeClockUpdate() -// This function updates go.clock. If 'newTime' requires an update of NV, then -// NV is checked for availability. If it is not available or is rate limiting, then -// go.clock is not updated and the function returns an error. If 'newTime' would -// not cause an NV write, then go.clock is updated. If an NV write occurs, then -// go.safe is SET. -void TimeClockUpdate(UINT64 newTime // IN: New time value in mS. -); - -//*** TimeUpdate() -// This function is used to update the time and clock values. If the TPM -// has run TPM2_Startup(), this function is called at the start of each command. -// If the TPM has not run TPM2_Startup(), this is called from TPM2_Startup() to -// get the clock values initialized. It is not called on command entry because, in -// this implementation, the go structure is not read from NV until TPM2_Startup(). -// The reason for this is that the initialization code (_TPM_Init()) may run before -// NV is accessible. -void TimeUpdate(void); - -//*** TimeUpdateToCurrent() -// This function updates the 'Time' and 'Clock' in the global -// TPMS_TIME_INFO structure. -// -// In this implementation, 'Time' and 'Clock' are updated at the beginning -// of each command and the values are unchanged for the duration of the -// command. -// -// Because 'Clock' updates may require a write to NV memory, 'Time' and 'Clock' -// are not allowed to advance if NV is not available. When clock is not advancing, -// any function that uses 'Clock' will fail and return TPM_RC_NV_UNAVAILABLE or -// TPM_RC_NV_RATE. -// -// This implementation does not do rate limiting. If the implementation does do -// rate limiting, then the 'Clock' update should not be inhibited even when doing -// rate limiting. -void TimeUpdateToCurrent(void); - -//*** TimeSetAdjustRate() -// This function is used to perform rate adjustment on 'Time' and 'Clock'. -void TimeSetAdjustRate(TPM_CLOCK_ADJUST adjust // IN: adjust constant -); - -//*** TimeGetMarshaled() -// This function is used to access TPMS_TIME_INFO in canonical form. -// The function collects the time information and marshals it into 'dataBuffer' -// and returns the marshaled size -UINT16 -TimeGetMarshaled(TIME_INFO* dataBuffer // OUT: result buffer -); - -//*** TimeFillInfo -// This function gathers information to fill in a TPMS_CLOCK_INFO structure. -void TimeFillInfo(TPMS_CLOCK_INFO* clockInfo); - -#endif // _TIME_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmFail_fp.h b/TPMCmd/tpm/include/prototypes/TpmFail_fp.h deleted file mode 100644 index e4754ed5..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmFail_fp.h +++ /dev/null @@ -1,84 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 03:18:00PM - */ - -#ifndef _TPM_FAIL_FP_H_ -#define _TPM_FAIL_FP_H_ - -//*** SetForceFailureMode() -// This function is called by the simulator to enable failure mode testing. -#if SIMULATION -LIB_EXPORT void SetForceFailureMode(void); -#endif - -//*** TpmLogFailure() -// This function saves the failure values when the code will continue to operate. It -// if similar to TpmFail() but returns to the caller. The assumption is that the -// caller will propagate a failure back up the stack. -void TpmLogFailure( -#if FAIL_TRACE - const char* function, - int line, -#endif - int code); - -//*** TpmFail() -// This function is called by TPM.lib when a failure occurs. It will set up the -// failure values to be returned on TPM2_GetTestResult(). -NORETURN void TpmFail( -#if FAIL_TRACE - const char* function, - int line, -#endif - int code); - -//*** TpmFailureMode( -// This function is called by the interface code when the platform is in failure -// mode. -void TpmFailureMode(unsigned int inRequestSize, // IN: command buffer size - unsigned char* inRequest, // IN: command buffer - unsigned int* outResponseSize, // OUT: response buffer size - unsigned char** outResponse // OUT: response buffer -); - -//*** UnmarshalFail() -// This is a stub that is used to catch an attempt to unmarshal an entry -// that is not defined. Don't ever expect this to be called but... -void UnmarshalFail(void* type, BYTE** buffer, INT32* size); - -#endif // _TPM_FAIL_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmSizeChecks_fp.h b/TPMCmd/tpm/include/prototypes/TpmSizeChecks_fp.h deleted file mode 100644 index f999ca6a..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmSizeChecks_fp.h +++ /dev/null @@ -1,53 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Oct 24, 2019 Time: 11:37:07AM - */ - -#ifndef _TPM_SIZE_CHECKS_FP_H_ -#define _TPM_SIZE_CHECKS_FP_H_ - -#if RUNTIME_SIZE_CHECKS - -//** TpmSizeChecks() -// This function is used during the development process to make sure that the -// vendor-specific values result in a consistent implementation. When possible, -// the code contains "#if" to do compile-time checks. However, in some cases, the -// values require the use of "sizeof()" and that can't be used in an #if. -BOOL TpmSizeChecks(void); -#endif // RUNTIME_SIZE_CHECKS - -#endif // _TPM_SIZE_CHECKS_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmToLtcDesSupport_fp.h b/TPMCmd/tpm/include/prototypes/TpmToLtcDesSupport_fp.h deleted file mode 100644 index ede96166..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmToLtcDesSupport_fp.h +++ /dev/null @@ -1,53 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Aug 30, 2019 Time: 02:11:54PM - */ - -#ifndef _TPM_TO_LTC_DES_SUPPORT_FP_H_ -#define _TPM_TO_LTC_DES_SUPPORT_FP_H_ - -#if(defined SYM_LIB_LTC) && ALG_TDES - -//** TDES_setup -// This function calls the LTC function to generate a TDES key schedule. If the -// key is one DES key (8 bytes), then it is replicated two more times to create a -// 24-byte TDES key. If the key is two key (16 bytes), then the first DES key is -// replicated to the third key position. -void TDES_setup(const BYTE* key, UINT32 keyBits, symmetric_key* skey); -#endif // MATH_LIB_LTC && ALG_TDES - -#endif // _TPM_TO_LTC_DES_SUPPORT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmToLtcMath_fp.h b/TPMCmd/tpm/include/prototypes/TpmToLtcMath_fp.h deleted file mode 100644 index 805b377b..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmToLtcMath_fp.h +++ /dev/null @@ -1,118 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Aug 30, 2019 Time: 02:11:54PM - */ - -#ifndef _TPM_TO_LTC_MATH_FP_H_ -#define _TPM_TO_LTC_MATH_FP_H_ - -#ifdef MATH_LIB_LTC - -//*** BnModMult() -// Does multiply and divide returning the remainder of the divide. -LIB_EXPORT BOOL BnModMult( - bigNum result, bigConst op1, bigConst op2, bigConst modulus); - -//*** BnMult() -// Multiplies two numbers -LIB_EXPORT BOOL BnMult(bigNum result, bigConst multiplicand, bigConst multiplier); - -//*** BnDiv() -// This function divides two BIGNUM values. The function always returns TRUE. -LIB_EXPORT BOOL BnDiv( - bigNum quotient, bigNum remainder, bigConst dividend, bigConst divisor); - -# ifdef TPM_ALG_RSA -//*** BnGcd() -// Get the greatest common divisor of two numbers -LIB_EXPORT BOOL BnGcd(bigNum gcd, // OUT: the common divisor - bigConst number1, // IN: - bigConst number2 // IN: -); - -//***BnModExp() -// Do modular exponentiation using BIGNUM values. The conversion from a bignum_t -// to a BIGNUM is trivial as they are based on the same structure -LIB_EXPORT BOOL BnModExp(bigNum result, // OUT: the result - bigConst number, // IN: number to exponentiate - bigConst exponent, // IN: - bigConst modulus // IN: -); - -//*** BnModInverse() -// Modular multiplicative inverse -LIB_EXPORT BOOL BnModInverse(bigNum result, bigConst number, bigConst modulus); -# endif // TPM_ALG_RSA -# ifdef TPM_ALG_ECC - -//*** BnEccModMult() -// This function does a point multiply of the form R = [d]S -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' - bigConst d, // IN: scalar for [d]S - bigCurve E); - -//*** BnEccModMult2() -// This function does a point multiply of the form R = [d]S + [u]Q -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult2(bigPoint R, // OUT: computed point - pointConst S, // IN: first point (optional) - bigConst d, // IN: scalar for [d]S or [d]G - pointConst Q, // IN: second point - bigConst u, // IN: second scalar - bigCurve E // IN: curve -); - -//*** BnEccAdd() -// This function does addition of two points. Since this is not implemented -// in LibTomCrypt() will try to trick it by doing multiply with scalar of 1. -// I have no idea if this will work and it's not needed unless MQV or the SM2 -// variant is enabled. -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccAdd(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' - pointConst Q, // IN: second point - bigCurve E // IN: curve -); -# endif // TPM_ALG_ECC -#endif // MATH_LIB_LTC - -#endif // _TPM_TO_LTC_MATH_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmToLtcSupport_fp.h b/TPMCmd/tpm/include/prototypes/TpmToLtcSupport_fp.h deleted file mode 100644 index 4037a607..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmToLtcSupport_fp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Aug 30, 2019 Time: 02:11:54PM - */ - -#ifndef _TPM_TO_LTC_SUPPORT_FP_H_ -#define _TPM_TO_LTC_SUPPORT_FP_H_ - -#if defined(HASH_LIB_LTC) || defined(MATH_LIB_LTC) || defined(SYM_LIB_LTC) - -//*** LtcRand() -// This is a stub function that is called from the LibTomCrypt or libmpa code -// to get a random number. In turn, this will call the random RandGenerate -// function that was passed in LibraryInit(). This function will pass the pointer -// to the current rand state along with the random byte request. -uint32_t LtcRand(void* buf, size_t blen); - -//*** SupportLibInit() -// This does any initialization required by the support library. -LIB_EXPORT int SupportLibInit(void); - -//*** LtcPoolInit() -// Function to initialize a pool. **** -LIB_EXPORT mpa_scratch_mem LtcPoolInit(mpa_word_t* poolAddress, int vars, int bits); -#endif // HASH_LIB_LTC || MATH_LIB_LTC || SYM_LIB_LTC - -#endif // _TPM_TO_LTC_SUPPORT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmToOsslDesSupport_fp.h b/TPMCmd/tpm/include/prototypes/TpmToOsslDesSupport_fp.h deleted file mode 100644 index 1ebcb40b..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmToOsslDesSupport_fp.h +++ /dev/null @@ -1,66 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 03:18:00PM - */ - -#ifndef _TPM_TO_OSSL_DES_SUPPORT_FP_H_ -#define _TPM_TO_OSSL_DES_SUPPORT_FP_H_ - -#if(defined SYM_LIB_OSSL) && ALG_TDES - -//**Functions -//*** TDES_set_encyrpt_key() -// This function makes creation of a TDES key look like the creation of a key for -// any of the other OpenSSL block ciphers. It will create three key schedules, -// one for each of the DES keys. If there are only two keys, then the third schedule -// is a copy of the first. -void TDES_set_encrypt_key( - const BYTE* key, UINT16 keySizeInBits, tpmKeyScheduleTDES* keySchedule); - -//*** TDES_encyrpt() -// The TPM code uses one key schedule. For TDES, the schedule contains three -// schedules. OpenSSL wants the schedules referenced separately. This function -// does that. -void TDES_encrypt(const BYTE* in, BYTE* out, tpmKeyScheduleTDES* ks); - -//*** TDES_decrypt() -// As with TDES_encypt() this function bridges between the TPM single schedule -// model and the OpenSSL three schedule model. -void TDES_decrypt(const BYTE* in, BYTE* out, tpmKeyScheduleTDES* ks); -#endif // SYM_LIB_OSSL - -#endif // _TPM_TO_OSSL_DES_SUPPORT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmToOsslMath_fp.h b/TPMCmd/tpm/include/prototypes/TpmToOsslMath_fp.h deleted file mode 100644 index daedf561..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmToOsslMath_fp.h +++ /dev/null @@ -1,177 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Oct 24, 2019 Time: 11:37:07AM - */ - -#ifndef _TPM_TO_OSSL_MATH_FP_H_ -#define _TPM_TO_OSSL_MATH_FP_H_ - -#ifdef MATH_LIB_OSSL - -//*** OsslToTpmBn() -// This function converts an OpenSSL BIGNUM to a TPM bignum. In this implementation -// it is assumed that OpenSSL uses a different control structure but the same data -// layout -- an array of native-endian words in little-endian order. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure because value will not fit or OpenSSL variable doesn't -// exist -BOOL OsslToTpmBn(bigNum bn, BIGNUM* osslBn); - -//*** BigInitialized() -// This function initializes an OSSL BIGNUM from a TPM bigConst. Do not use this for -// values that are passed to OpenSLL when they are not declared as const in the -// function prototype. Instead, use BnNewVariable(). -BIGNUM* BigInitialized(BIGNUM* toInit, bigConst initializer); -# if LIBRARY_COMPATIBILITY_CHECK - -//*** MathLibraryCompatibilityCheck() -BOOL MathLibraryCompatibilityCheck(void); -# endif - -//*** BnModMult() -// This function does a modular multiply. It first does a multiply and then a divide -// and returns the remainder of the divide. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnModMult( - bigNum result, bigConst op1, bigConst op2, bigConst modulus); - -//*** BnMult() -// Multiplies two numbers -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnMult(bigNum result, bigConst multiplicand, bigConst multiplier); - -//*** BnDiv() -// This function divides two bigNum values. The function returns FALSE if -// there is an error in the operation. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnDiv( - bigNum quotient, bigNum remainder, bigConst dividend, bigConst divisor); - -# if ALG_RSA -//*** BnGcd() -// Get the greatest common divisor of two numbers -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnGcd(bigNum gcd, // OUT: the common divisor - bigConst number1, // IN: - bigConst number2 // IN: -); - -//***BnModExp() -// Do modular exponentiation using bigNum values. The conversion from a bignum_t to -// a bigNum is trivial as they are based on the same structure -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnModExp(bigNum result, // OUT: the result - bigConst number, // IN: number to exponentiate - bigConst exponent, // IN: - bigConst modulus // IN: -); - -//*** BnModInverse() -// Modular multiplicative inverse -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnModInverse(bigNum result, bigConst number, bigConst modulus); -# endif // ALG_RSA -# if ALG_ECC - -//*** BnCurveInitialize() -// This function initializes the OpenSSL curve information structure. This -// structure points to the TPM-defined values for the curve, to the context for the -// number values in the frame, and to the OpenSSL-defined group values. -// Return Type: bigCurve * -// NULL the TPM_ECC_CURVE is not valid or there was a problem in -// in initializing the curve data -// non-NULL points to 'E' -LIB_EXPORT bigCurve BnCurveInitialize( - bigCurve E, // IN: curve structure to initialize - TPM_ECC_CURVE curveId // IN: curve identifier -); - -//*** BnCurveFree() -// This function will free the allocated components of the curve and end the -// frame in which the curve data exists -LIB_EXPORT void BnCurveFree(bigCurve E); - -//*** BnEccModMult() -// This function does a point multiply of the form R = [d]S -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' (optional) - bigConst d, // IN: scalar for [d]S - bigCurve E); - -//*** BnEccModMult2() -// This function does a point multiply of the form R = [d]G + [u]Q -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult2(bigPoint R, // OUT: computed point - pointConst S, // IN: optional point - bigConst d, // IN: scalar for [d]S or [d]G - pointConst Q, // IN: second point - bigConst u, // IN: second scalar - bigCurve E // IN: curve -); - -//** BnEccAdd() -// This function does addition of two points. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccAdd(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' - pointConst Q, // IN: second point - bigCurve E // IN: curve -); -# endif // ALG_ECC -#endif // MATHLIB OSSL - -#endif // _TPM_TO_OSSL_MATH_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmToOsslSupport_fp.h b/TPMCmd/tpm/include/prototypes/TpmToOsslSupport_fp.h deleted file mode 100644 index 109cd0b8..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmToOsslSupport_fp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef _TPM_TO_OSSL_SUPPORT_FP_H_ -#define _TPM_TO_OSSL_SUPPORT_FP_H_ - -#if defined(HASH_LIB_OSSL) || defined(MATH_LIB_OSSL) || defined(SYM_LIB_OSSL) - -//*** SupportLibInit() -// This does any initialization required by the support library. -LIB_EXPORT int SupportLibInit(void); - -//*** OsslContextEnter() -// This function is used to initialize an OpenSSL context at the start of a function -// that will call to an OpenSSL math function. -BN_CTX* OsslContextEnter(void); - -//*** OsslContextLeave() -// This is the companion function to OsslContextEnter(). -void OsslContextLeave(BN_CTX* CTX); - -//*** OsslPushContext() -// This function is used to create a frame in a context. All values allocated within -// this context after the frame is started will be automatically freed when the -// context (OsslPopContext() -BN_CTX* OsslPushContext(BN_CTX* CTX); - -//*** OsslPopContext() -// This is the companion function to OsslPushContext(). -void OsslPopContext(BN_CTX* CTX); -#endif // HASH_LIB_OSSL || MATH_LIB_OSSL || SYM_LIB_OSSL - -#endif // _TPM_TO_OSSL_SUPPORT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmToWolfDesSupport_fp.h b/TPMCmd/tpm/include/prototypes/TpmToWolfDesSupport_fp.h deleted file mode 100644 index 7d6d862e..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmToWolfDesSupport_fp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Aug 30, 2019 Time: 02:11:54PM - */ - -#ifndef _TPM_TO_WOLF_DES_SUPPORT_FP_H_ -#define _TPM_TO_WOLF_DES_SUPPORT_FP_H_ - -#if(defined SYM_LIB_WOLF) && ALG_TDES - -//**Functions -//** TDES_setup -// This function calls the wolfcrypt function to generate a TDES key schedule. If the -// If the key is two key (16 bytes), then the first DES key is replicated to the third -// key position. -int TDES_setup(const BYTE* key, UINT32 keyBits, tpmKeyScheduleTDES* skey, int dir); - -//** TDES_setup_encrypt_key -// This function calls into TDES_setup(), specifically for an encryption key. -int TDES_setup_encrypt_key(const BYTE* key, UINT32 keyBits, tpmKeyScheduleTDES* skey); - -//** TDES_setup_decrypt_key -// This function calls into TDES_setup(), specifically for an decryption key. -int TDES_setup_decrypt_key(const BYTE* key, UINT32 keyBits, tpmKeyScheduleTDES* skey); - -//*** TDES_encyrpt() -void TDES_encrypt(const BYTE* in, BYTE* out, tpmKeyScheduleTDES* ks); - -//*** TDES_decrypt() -void TDES_decrypt(const BYTE* in, BYTE* out, tpmKeyScheduleTDES* ks); -#endif // MATH_LIB_WOLF && ALG_TDES - -#endif // _TPM_TO_WOLF_DES_SUPPORT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmToWolfMath_fp.h b/TPMCmd/tpm/include/prototypes/TpmToWolfMath_fp.h deleted file mode 100644 index 262dd7c6..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmToWolfMath_fp.h +++ /dev/null @@ -1,150 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Aug 30, 2019 Time: 02:11:54PM - */ - -#ifndef _TPM_TO_WOLF_MATH_FP_H_ -#define _TPM_TO_WOLF_MATH_FP_H_ - -#ifdef MATH_LIB_WOLF - -//*** BnFromWolf() -// This function converts a wolfcrypt mp_int to a TPM bignum. In this implementation -// it is assumed that wolfcrypt used the same format for a big number as does the -// TPM -- an array of native-endian words in little-endian order. -void BnFromWolf(bigNum bn, mp_int* wolfBn); - -//*** BnToWolf() -// This function converts a TPM bignum to a wolfcrypt mp_init, and has the same -// assumptions as made by BnFromWolf() -void BnToWolf(mp_int* toInit, bigConst initializer); - -//*** MpInitialize() -// This function initializes an wolfcrypt mp_int. -mp_int* MpInitialize(mp_int* toInit); - -# if LIBRARY_COMPATIBILITY_CHECK -//** MathLibraryCompatibililtyCheck() -// This function is only used during development to make sure that the library -// that is being referenced is using the same size of data structures as the TPM. -BOOL MathLibraryCompatibilityCheck(void); -# endif - -//*** BnModMult() -// Does multiply and divide returning the remainder of the divide. -LIB_EXPORT BOOL BnModMult( - bigNum result, bigConst op1, bigConst op2, bigConst modulus); - -//*** BnMult() -// Multiplies two numbers -LIB_EXPORT BOOL BnMult(bigNum result, bigConst multiplicand, bigConst multiplier); - -//*** BnDiv() -// This function divides two bigNum values. The function returns FALSE if -// there is an error in the operation. -LIB_EXPORT BOOL BnDiv( - bigNum quotient, bigNum remainder, bigConst dividend, bigConst divisor); - -# if ALG_RSA -//*** BnGcd() -// Get the greatest common divisor of two numbers -LIB_EXPORT BOOL BnGcd(bigNum gcd, // OUT: the common divisor - bigConst number1, // IN: - bigConst number2 // IN: -); - -//***BnModExp() -// Do modular exponentiation using bigNum values. The conversion from a mp_int to -// a bigNum is trivial as they are based on the same structure -LIB_EXPORT BOOL BnModExp(bigNum result, // OUT: the result - bigConst number, // IN: number to exponentiate - bigConst exponent, // IN: - bigConst modulus // IN: -); - -//*** BnModInverse() -// Modular multiplicative inverse -LIB_EXPORT BOOL BnModInverse(bigNum result, bigConst number, bigConst modulus); -# endif // TPM_ALG_RSA -# if ALG_ECC - -//*** PointFromWolf() -// Function to copy the point result from a wolf ecc_point to a bigNum -void PointFromWolf(bigPoint pOut, // OUT: resulting point - ecc_point* pIn // IN: the point to return -); - -//*** PointToWolf() -// Function to copy the point result from a bigNum to a wolf ecc_point -void PointToWolf(ecc_point* pOut, // OUT: resulting point - pointConst pIn // IN: the point to return -); - -//*** BnEccModMult() -// This function does a point multiply of the form R = [d]S -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' (optional) - bigConst d, // IN: scalar for [d]S - bigCurve E); - -//*** BnEccModMult2() -// This function does a point multiply of the form R = [d]G + [u]Q -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult2(bigPoint R, // OUT: computed point - pointConst S, // IN: optional point - bigConst d, // IN: scalar for [d]S or [d]G - pointConst Q, // IN: second point - bigConst u, // IN: second scalar - bigCurve E // IN: curve -); - -//** BnEccAdd() -// This function does addition of two points. -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccAdd(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' - pointConst Q, // IN: second point - bigCurve E // IN: curve -); -# endif // TPM_ALG_ECC -#endif // MATH_LIB_WOLF - -#endif // _TPM_TO_WOLF_MATH_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/TpmToWolfSupport_fp.h b/TPMCmd/tpm/include/prototypes/TpmToWolfSupport_fp.h deleted file mode 100644 index 4df9c492..00000000 --- a/TPMCmd/tpm/include/prototypes/TpmToWolfSupport_fp.h +++ /dev/null @@ -1,50 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Aug 30, 2019 Time: 02:11:54PM - */ - -#ifndef _TPM_TO_WOLF_SUPPORT_FP_H_ -#define _TPM_TO_WOLF_SUPPORT_FP_H_ - -#if defined(HASH_LIB_WOLF) || defined(MATH_LIB_WOLF) || defined(SYM_LIB_WOLF) - -//*** SupportLibInit() -// This does any initialization required by the support library. -LIB_EXPORT int SupportLibInit(void); -#endif // HASH_LIB_WOLF || MATH_LIB_WOLF || SYM_LIB_WOLF - -#endif // _TPM_TO_WOLF_SUPPORT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/Unseal_fp.h b/TPMCmd/tpm/include/prototypes/Unseal_fp.h deleted file mode 100644 index d5b1a953..00000000 --- a/TPMCmd/tpm/include/prototypes/Unseal_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Unseal // Command must be enabled - -# ifndef _Unseal_FP_H_ -# define _Unseal_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT itemHandle; -} Unseal_In; - -// Output structure definition -typedef struct -{ - TPM2B_SENSITIVE_DATA outData; -} Unseal_Out; - -// Response code modifiers -# define RC_Unseal_itemHandle (TPM_RC_H + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_Unseal(Unseal_In* in, Unseal_Out* out); - -# endif // _Unseal_FP_H_ -#endif // CC_Unseal diff --git a/TPMCmd/tpm/include/prototypes/Vendor_TCG_Test_fp.h b/TPMCmd/tpm/include/prototypes/Vendor_TCG_Test_fp.h deleted file mode 100644 index 04d2c4a5..00000000 --- a/TPMCmd/tpm/include/prototypes/Vendor_TCG_Test_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_Vendor_TCG_Test // Command must be enabled - -# ifndef _Vendor_TCG_Test_FP_H_ -# define _Vendor_TCG_Test_FP_H_ - -// Input structure definition -typedef struct -{ - TPM2B_DATA inputData; -} Vendor_TCG_Test_In; - -// Output structure definition -typedef struct -{ - TPM2B_DATA outputData; -} Vendor_TCG_Test_Out; - -// Response code modifiers -# define RC_Vendor_TCG_Test_inputData (TPM_RC_P + TPM_RC_1) - -// Function prototype -TPM_RC -TPM2_Vendor_TCG_Test(Vendor_TCG_Test_In* in, Vendor_TCG_Test_Out* out); - -# endif // _Vendor_TCG_Test_FP_H_ -#endif // CC_Vendor_TCG_Test diff --git a/TPMCmd/tpm/include/prototypes/VerifySignature_fp.h b/TPMCmd/tpm/include/prototypes/VerifySignature_fp.h deleted file mode 100644 index b0ae5801..00000000 --- a/TPMCmd/tpm/include/prototypes/VerifySignature_fp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_VerifySignature // Command must be enabled - -# ifndef _Verify_Signature_FP_H_ -# define _Verify_Signature_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyHandle; - TPM2B_DIGEST digest; - TPMT_SIGNATURE signature; -} VerifySignature_In; - -// Output structure definition -typedef struct -{ - TPMT_TK_VERIFIED validation; -} VerifySignature_Out; - -// Response code modifiers -# define RC_VerifySignature_keyHandle (TPM_RC_H + TPM_RC_1) -# define RC_VerifySignature_digest (TPM_RC_P + TPM_RC_1) -# define RC_VerifySignature_signature (TPM_RC_P + TPM_RC_2) - -// Function prototype -TPM_RC -TPM2_VerifySignature(VerifySignature_In* in, VerifySignature_Out* out); - -# endif // _Verify_Signature_FP_H_ -#endif // CC_VerifySignature diff --git a/TPMCmd/tpm/include/prototypes/X509_ECC_fp.h b/TPMCmd/tpm/include/prototypes/X509_ECC_fp.h deleted file mode 100644 index 1e56459b..00000000 --- a/TPMCmd/tpm/include/prototypes/X509_ECC_fp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 11:00:49AM - */ - -#ifndef _X509_ECC_FP_H_ -#define _X509_ECC_FP_H_ - -//*** X509PushPoint() -// This seems like it might be used more than once so... -// Return Type: INT16 -// > 0 number of bytes added -// == 0 failure -INT16 -X509PushPoint(ASN1MarshalContext* ctx, TPMS_ECC_POINT* p); - -//*** X509AddSigningAlgorithmECC() -// This creates the singing algorithm data. -// Return Type: INT16 -// > 0 number of bytes added -// == 0 failure -INT16 -X509AddSigningAlgorithmECC( - OBJECT* signKey, TPMT_SIG_SCHEME* scheme, ASN1MarshalContext* ctx); - -//*** X509AddPublicECC() -// This function will add the publicKey description to the DER data. If ctx is -// NULL, then no data is transferred and this function will indicate if the TPM -// has the values for DER-encoding of the public key. -// Return Type: INT16 -// > 0 number of bytes added -// == 0 failure -INT16 -X509AddPublicECC(OBJECT* object, ASN1MarshalContext* ctx); - -#endif // _X509_ECC_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/X509_RSA_fp.h b/TPMCmd/tpm/include/prototypes/X509_RSA_fp.h deleted file mode 100644 index 9a856ec6..00000000 --- a/TPMCmd/tpm/include/prototypes/X509_RSA_fp.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Apr 2, 2019 Time: 11:00:49AM - */ - -#ifndef _X509_RSA_FP_H_ -#define _X509_RSA_FP_H_ - -#if ALG_RSA - -//*** X509AddSigningAlgorithmRSA() -// This creates the singing algorithm data. -// Return Type: INT16 -// > 0 number of bytes added -// == 0 failure -INT16 -X509AddSigningAlgorithmRSA( - OBJECT* signKey, TPMT_SIG_SCHEME* scheme, ASN1MarshalContext* ctx); - -//*** X509AddPublicRSA() -// This function will add the publicKey description to the DER data. If fillPtr is -// NULL, then no data is transferred and this function will indicate if the TPM -// has the values for DER-encoding of the public key. -// Return Type: INT16 -// > 0 number of bytes added -// == 0 failure -INT16 -X509AddPublicRSA(OBJECT* object, ASN1MarshalContext* ctx); -#endif // ALG_RSA - -#endif // _X509_RSA_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/X509_spt_fp.h b/TPMCmd/tpm/include/prototypes/X509_spt_fp.h deleted file mode 100644 index f09cf23d..00000000 --- a/TPMCmd/tpm/include/prototypes/X509_spt_fp.h +++ /dev/null @@ -1,105 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Nov 14, 2019 Time: 05:57:02PM - */ - -#ifndef _X509_SPT_FP_H_ -#define _X509_SPT_FP_H_ - -//*** X509FindExtensionByOID() -// This will search a list of X509 extensions to find an extension with the -// requested OID. If the extension is found, the output context ('ctx') is set up -// to point to the OID in the extension. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure (could be catastrophic) -BOOL X509FindExtensionByOID(ASN1UnmarshalContext* ctxIn, // IN: the context to search - ASN1UnmarshalContext* ctx, // OUT: the extension context - const BYTE* OID // IN: oid to search for -); - -//*** X509GetExtensionBits() -// This function will extract a bit field from an extension. If the extension doesn't -// contain a bit string, it will fail. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure -UINT32 -X509GetExtensionBits(ASN1UnmarshalContext* ctx, UINT32* value); - -//***X509ProcessExtensions() -// This function is used to process the TPMA_OBJECT and KeyUsage extensions. It is not -// in the CertifyX509.c code because it makes the code harder to follow. -// Return Type: TPM_RC -// TPM_RCS_ATTRIBUTES the attributes of object are not consistent with -// the extension setting -// TPM_RC_VALUE problem parsing the extensions -TPM_RC -X509ProcessExtensions( - OBJECT* object, // IN: The object with the attributes to - // check - stringRef* extension // IN: The start and length of the extensions -); - -//*** X509AddSigningAlgorithm() -// This creates the singing algorithm data. -// Return Type: INT16 -// > 0 number of octets added -// <= 0 failure -INT16 -X509AddSigningAlgorithm( - ASN1MarshalContext* ctx, OBJECT* signKey, TPMT_SIG_SCHEME* scheme); - -//*** X509AddPublicKey() -// This function will add the publicKey description to the DER data. If fillPtr is -// NULL, then no data is transferred and this function will indicate if the TPM -// has the values for DER-encoding of the public key. -// Return Type: INT16 -// > 0 number of octets added -// == 0 failure -INT16 -X509AddPublicKey(ASN1MarshalContext* ctx, OBJECT* object); - -//*** X509PushAlgorithmIdentifierSequence() -// The function adds the algorithm identifier sequence. -// Return Type: INT16 -// > 0 number of bytes added -// == 0 failure -INT16 -X509PushAlgorithmIdentifierSequence(ASN1MarshalContext* ctx, const BYTE* OID); - -#endif // _X509_SPT_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/ZGen_2Phase_fp.h b/TPMCmd/tpm/include/prototypes/ZGen_2Phase_fp.h deleted file mode 100644 index e4c8eba1..00000000 --- a/TPMCmd/tpm/include/prototypes/ZGen_2Phase_fp.h +++ /dev/null @@ -1,74 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmStructures; Version 4.4 Mar 26, 2019 - * Date: Mar 28, 2019 Time: 08:25:17PM - */ - -#if CC_ZGen_2Phase // Command must be enabled - -# ifndef _ZGen_2Phase_FP_H_ -# define _ZGen_2Phase_FP_H_ - -// Input structure definition -typedef struct -{ - TPMI_DH_OBJECT keyA; - TPM2B_ECC_POINT inQsB; - TPM2B_ECC_POINT inQeB; - TPMI_ECC_KEY_EXCHANGE inScheme; - UINT16 counter; -} ZGen_2Phase_In; - -// Output structure definition -typedef struct -{ - TPM2B_ECC_POINT outZ1; - TPM2B_ECC_POINT outZ2; -} ZGen_2Phase_Out; - -// Response code modifiers -# define RC_ZGen_2Phase_keyA (TPM_RC_H + TPM_RC_1) -# define RC_ZGen_2Phase_inQsB (TPM_RC_P + TPM_RC_1) -# define RC_ZGen_2Phase_inQeB (TPM_RC_P + TPM_RC_2) -# define RC_ZGen_2Phase_inScheme (TPM_RC_P + TPM_RC_3) -# define RC_ZGen_2Phase_counter (TPM_RC_P + TPM_RC_4) - -// Function prototype -TPM_RC -TPM2_ZGen_2Phase(ZGen_2Phase_In* in, ZGen_2Phase_Out* out); - -# endif // _ZGen_2Phase_FP_H_ -#endif // CC_ZGen_2Phase diff --git a/TPMCmd/tpm/include/prototypes/_TPM_Hash_Data_fp.h b/TPMCmd/tpm/include/prototypes/_TPM_Hash_Data_fp.h deleted file mode 100644 index 3723f823..00000000 --- a/TPMCmd/tpm/include/prototypes/_TPM_Hash_Data_fp.h +++ /dev/null @@ -1,48 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef __TPM_HASH_DATA_FP_H_ -#define __TPM_HASH_DATA_FP_H_ - -// This function is called to process a _TPM_Hash_Data indication. -LIB_EXPORT void _TPM_Hash_Data(uint32_t dataSize, // IN: size of data to be extend - unsigned char* data // IN: data buffer -); - -#endif // __TPM_HASH_DATA_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/_TPM_Hash_End_fp.h b/TPMCmd/tpm/include/prototypes/_TPM_Hash_End_fp.h deleted file mode 100644 index 0a9c72a5..00000000 --- a/TPMCmd/tpm/include/prototypes/_TPM_Hash_End_fp.h +++ /dev/null @@ -1,46 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef __TPM_HASH_END_FP_H_ -#define __TPM_HASH_END_FP_H_ - -// This function is called to process a _TPM_Hash_End indication. -LIB_EXPORT void _TPM_Hash_End(void); - -#endif // __TPM_HASH_END_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/_TPM_Hash_Start_fp.h b/TPMCmd/tpm/include/prototypes/_TPM_Hash_Start_fp.h deleted file mode 100644 index d67b015e..00000000 --- a/TPMCmd/tpm/include/prototypes/_TPM_Hash_Start_fp.h +++ /dev/null @@ -1,46 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef __TPM_HASH_START_FP_H_ -#define __TPM_HASH_START_FP_H_ - -// This function is called to process a _TPM_Hash_Start indication. -LIB_EXPORT void _TPM_Hash_Start(void); - -#endif // __TPM_HASH_START_FP_H_ diff --git a/TPMCmd/tpm/include/prototypes/_TPM_Init_fp.h b/TPMCmd/tpm/include/prototypes/_TPM_Init_fp.h deleted file mode 100644 index 42fbba22..00000000 --- a/TPMCmd/tpm/include/prototypes/_TPM_Init_fp.h +++ /dev/null @@ -1,46 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmPrototypes; Version 3.0 July 18, 2017 - * Date: Mar 28, 2019 Time: 08:25:19PM - */ - -#ifndef __TPM_INIT_FP_H_ -#define __TPM_INIT_FP_H_ - -// This function is used to process a _TPM_Init indication. -LIB_EXPORT void _TPM_Init(void); - -#endif // __TPM_INIT_FP_H_ diff --git a/TPMCmd/tpm/include/public/ACT.h b/TPMCmd/tpm/include/public/ACT.h new file mode 100644 index 00000000..699824e6 --- /dev/null +++ b/TPMCmd/tpm/include/public/ACT.h @@ -0,0 +1,208 @@ +#ifndef _ACT_H_ +#define _ACT_H_ + +#include + +#if ACT_SUPPORT \ + != (RH_ACT_0 | RH_ACT_1 | RH_ACT_2 | RH_ACT_3 | RH_ACT_4 | RH_ACT_5 | RH_ACT_6 \ + | RH_ACT_7 | RH_ACT_8 | RH_ACT_9 | RH_ACT_A | RH_ACT_B | RH_ACT_C | RH_ACT_D \ + | RH_ACT_E | RH_ACT_F) +# error "If ACT_SUPPORT == NO, no ACTs can be enabled" +#endif // (ACT_SUPPORT != ...) + +#if !(defined RH_ACT_0) || (RH_ACT_0 != YES) +# undef RH_ACT_0 +# define RH_ACT_0 NO +# define IF_ACT_0_IMPLEMENTED(op) +#else +# define IF_ACT_0_IMPLEMENTED(op) op(0) +#endif +#if !(defined RH_ACT_1) || (RH_ACT_1 != YES) +# undef RH_ACT_1 +# define RH_ACT_1 NO +# define IF_ACT_1_IMPLEMENTED(op) +#else +# define IF_ACT_1_IMPLEMENTED(op) op(1) +#endif +#if !(defined RH_ACT_2) || (RH_ACT_2 != YES) +# undef RH_ACT_2 +# define RH_ACT_2 NO +# define IF_ACT_2_IMPLEMENTED(op) +#else +# define IF_ACT_2_IMPLEMENTED(op) op(2) +#endif +#if !(defined RH_ACT_3) || (RH_ACT_3 != YES) +# undef RH_ACT_3 +# define RH_ACT_3 NO +# define IF_ACT_3_IMPLEMENTED(op) +#else +# define IF_ACT_3_IMPLEMENTED(op) op(3) +#endif +#if !(defined RH_ACT_4) || (RH_ACT_4 != YES) +# undef RH_ACT_4 +# define RH_ACT_4 NO +# define IF_ACT_4_IMPLEMENTED(op) +#else +# define IF_ACT_4_IMPLEMENTED(op) op(4) +#endif +#if !(defined RH_ACT_5) || (RH_ACT_5 != YES) +# undef RH_ACT_5 +# define RH_ACT_5 NO +# define IF_ACT_5_IMPLEMENTED(op) +#else +# define IF_ACT_5_IMPLEMENTED(op) op(5) +#endif +#if !(defined RH_ACT_6) || (RH_ACT_6 != YES) +# undef RH_ACT_6 +# define RH_ACT_6 NO +# define IF_ACT_6_IMPLEMENTED(op) +#else +# define IF_ACT_6_IMPLEMENTED(op) op(6) +#endif +#if !(defined RH_ACT_7) || (RH_ACT_7 != YES) +# undef RH_ACT_7 +# define RH_ACT_7 NO +# define IF_ACT_7_IMPLEMENTED(op) +#else +# define IF_ACT_7_IMPLEMENTED(op) op(7) +#endif +#if !(defined RH_ACT_8) || (RH_ACT_8 != YES) +# undef RH_ACT_8 +# define RH_ACT_8 NO +# define IF_ACT_8_IMPLEMENTED(op) +#else +# define IF_ACT_8_IMPLEMENTED(op) op(8) +#endif +#if !(defined RH_ACT_9) || (RH_ACT_9 != YES) +# undef RH_ACT_9 +# define RH_ACT_9 NO +# define IF_ACT_9_IMPLEMENTED(op) +#else +# define IF_ACT_9_IMPLEMENTED(op) op(9) +#endif +#if !(defined RH_ACT_A) || (RH_ACT_A != YES) +# undef RH_ACT_A +# define RH_ACT_A NO +# define IF_ACT_A_IMPLEMENTED(op) +#else +# define IF_ACT_A_IMPLEMENTED(op) op(A) +#endif +#if !(defined RH_ACT_B) || (RH_ACT_B != YES) +# undef RH_ACT_B +# define RH_ACT_B NO +# define IF_ACT_B_IMPLEMENTED(op) +#else +# define IF_ACT_B_IMPLEMENTED(op) op(B) +#endif +#if !(defined RH_ACT_C) || (RH_ACT_C != YES) +# undef RH_ACT_C +# define RH_ACT_C NO +# define IF_ACT_C_IMPLEMENTED(op) +#else +# define IF_ACT_C_IMPLEMENTED(op) op(C) +#endif +#if !(defined RH_ACT_D) || (RH_ACT_D != YES) +# undef RH_ACT_D +# define RH_ACT_D NO +# define IF_ACT_D_IMPLEMENTED(op) +#else +# define IF_ACT_D_IMPLEMENTED(op) op(D) +#endif +#if !(defined RH_ACT_E) || (RH_ACT_E != YES) +# undef RH_ACT_E +# define RH_ACT_E NO +# define IF_ACT_E_IMPLEMENTED(op) +#else +# define IF_ACT_E_IMPLEMENTED(op) op(E) +#endif +#if !(defined RH_ACT_F) || (RH_ACT_F != YES) +# undef RH_ACT_F +# define RH_ACT_F NO +# define IF_ACT_F_IMPLEMENTED(op) +#else +# define IF_ACT_F_IMPLEMENTED(op) op(F) +#endif + +#ifndef TPM_RH_ACT_0 +# error Need numeric definition for TPM_RH_ACT_0 +#endif + +#ifndef TPM_RH_ACT_1 +# define TPM_RH_ACT_1 (TPM_RH_ACT_0 + 1) +#endif +#ifndef TPM_RH_ACT_2 +# define TPM_RH_ACT_2 (TPM_RH_ACT_0 + 2) +#endif +#ifndef TPM_RH_ACT_3 +# define TPM_RH_ACT_3 (TPM_RH_ACT_0 + 3) +#endif +#ifndef TPM_RH_ACT_4 +# define TPM_RH_ACT_4 (TPM_RH_ACT_0 + 4) +#endif +#ifndef TPM_RH_ACT_5 +# define TPM_RH_ACT_5 (TPM_RH_ACT_0 + 5) +#endif +#ifndef TPM_RH_ACT_6 +# define TPM_RH_ACT_6 (TPM_RH_ACT_0 + 6) +#endif +#ifndef TPM_RH_ACT_7 +# define TPM_RH_ACT_7 (TPM_RH_ACT_0 + 7) +#endif +#ifndef TPM_RH_ACT_8 +# define TPM_RH_ACT_8 (TPM_RH_ACT_0 + 8) +#endif +#ifndef TPM_RH_ACT_9 +# define TPM_RH_ACT_9 (TPM_RH_ACT_0 + 9) +#endif +#ifndef TPM_RH_ACT_A +# define TPM_RH_ACT_A (TPM_RH_ACT_0 + 0xA) +#endif +#ifndef TPM_RH_ACT_B +# define TPM_RH_ACT_B (TPM_RH_ACT_0 + 0xB) +#endif +#ifndef TPM_RH_ACT_C +# define TPM_RH_ACT_C (TPM_RH_ACT_0 + 0xC) +#endif +#ifndef TPM_RH_ACT_D +# define TPM_RH_ACT_D (TPM_RH_ACT_0 + 0xD) +#endif +#ifndef TPM_RH_ACT_E +# define TPM_RH_ACT_E (TPM_RH_ACT_0 + 0xE) +#endif +#ifndef TPM_RH_ACT_F +# define TPM_RH_ACT_F (TPM_RH_ACT_0 + 0xF) +#endif + +#define FOR_EACH_ACT(op) \ + IF_ACT_0_IMPLEMENTED(op) \ + IF_ACT_1_IMPLEMENTED(op) \ + IF_ACT_2_IMPLEMENTED(op) \ + IF_ACT_3_IMPLEMENTED(op) \ + IF_ACT_4_IMPLEMENTED(op) \ + IF_ACT_5_IMPLEMENTED(op) \ + IF_ACT_6_IMPLEMENTED(op) \ + IF_ACT_7_IMPLEMENTED(op) \ + IF_ACT_8_IMPLEMENTED(op) \ + IF_ACT_9_IMPLEMENTED(op) \ + IF_ACT_A_IMPLEMENTED(op) \ + IF_ACT_B_IMPLEMENTED(op) \ + IF_ACT_C_IMPLEMENTED(op) \ + IF_ACT_D_IMPLEMENTED(op) \ + IF_ACT_E_IMPLEMENTED(op) \ + IF_ACT_F_IMPLEMENTED(op) + +// This is the mask for ACT that are implemented +//#define ACT_MASK(N) | (1 << 0x##N) +//#define ACT_IMPLEMENTED_MASK (0 FOR_EACH_ACT(ACT_MASK)) + +#define CASE_ACT_HANDLE(N) case TPM_RH_ACT_##N: +#define CASE_ACT_NUMBER(N) case 0x##N: + +typedef struct ACT_STATE +{ + UINT32 remaining; + TPM_ALG_ID hashAlg; + TPM2B_DIGEST authPolicy; +} ACT_STATE, *P_ACT_STATE; + +#endif // _ACT_H_ diff --git a/TPMCmd/tpm/include/public/BaseTypes.h b/TPMCmd/tpm/include/public/BaseTypes.h new file mode 100644 index 00000000..0535c664 --- /dev/null +++ b/TPMCmd/tpm/include/public/BaseTypes.h @@ -0,0 +1,23 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#ifndef _TPM_INCLUDE_PUBLIC_BASETYPES_H_ +#define _TPM_INCLUDE_PUBLIC_BASETYPES_H_ + +// NULL definition +#ifndef NULL +# define NULL (0) +#endif // NULL + +typedef uint8_t UINT8; +typedef uint8_t BYTE; +typedef int8_t INT8; +typedef int BOOL; +typedef uint16_t UINT16; +typedef int16_t INT16; +typedef uint32_t UINT32; +typedef int32_t INT32; +typedef uint64_t UINT64; +typedef int64_t INT64; + +#endif // _TPM_INCLUDE_PUBLIC_BASETYPES_H_ diff --git a/TPMCmd/tpm/include/public/CMakeLists.txt b/TPMCmd/tpm/include/public/CMakeLists.txt new file mode 100644 index 00000000..f3ef04ff --- /dev/null +++ b/TPMCmd/tpm/include/public/CMakeLists.txt @@ -0,0 +1,50 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +project(Tpm_Public_Headers VERSION 1.0) +print_project_info() +add_library(Tpm_Public_Headers INTERFACE) +# add the same alias a config package would create, allowing this to be used via +# add subdirectory. +add_library(Tpm_Public_Headers::Tpm_Public_Headers ALIAS Tpm_Public_Headers) +target_link_libraries(Tpm_Public_Headers INTERFACE TpmConfiguration) + +target_include_directories(${PROJECT_NAME} + INTERFACE + "$" + "$" +) + +# create install and export information for downstream projects to use +install_and_export_config_targets(${PROJECT_NAME}) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## + +install(FILES + ${CMAKE_CURRENT_SOURCE_DIR}/ACT.h + ${CMAKE_CURRENT_SOURCE_DIR}/BaseTypes.h + ${CMAKE_CURRENT_SOURCE_DIR}/Capabilities.h + ${CMAKE_CURRENT_SOURCE_DIR}/CompilerDependencies_gcc.h + ${CMAKE_CURRENT_SOURCE_DIR}/CompilerDependencies_msvc.h + ${CMAKE_CURRENT_SOURCE_DIR}/CompilerDependencies.h + ${CMAKE_CURRENT_SOURCE_DIR}/endian_swap.h + ${CMAKE_CURRENT_SOURCE_DIR}/GpMacros.h + ${CMAKE_CURRENT_SOURCE_DIR}/MinMax.h + ${CMAKE_CURRENT_SOURCE_DIR}/tpm_public.h + ${CMAKE_CURRENT_SOURCE_DIR}/tpm_radix.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmAlgorithmDefines.h + ${CMAKE_CURRENT_SOURCE_DIR}/TPMB.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmCalculatedAttributes.h + ${CMAKE_CURRENT_SOURCE_DIR}/TpmTypes.h + ${CMAKE_CURRENT_SOURCE_DIR}/VerifyConfiguration.h + DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/Tpm_Public_Headers/public) + +install(FILES + ${CMAKE_CURRENT_SOURCE_DIR}/prototypes/TpmFail_fp.h + DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/Tpm_Public_Headers/public/prototypes) +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(${PROJECT_NAME}) diff --git a/TPMCmd/tpm/include/public/Capabilities.h b/TPMCmd/tpm/include/public/Capabilities.h new file mode 100644 index 00000000..5ac3c6a8 --- /dev/null +++ b/TPMCmd/tpm/include/public/Capabilities.h @@ -0,0 +1,15 @@ +#ifndef _CAPABILITIES_H +#define _CAPABILITIES_H + +#define MAX_CAP_DATA (MAX_CAP_BUFFER - sizeof(TPM_CAP) - sizeof(UINT32)) +#define MAX_CAP_ALGS (MAX_CAP_DATA / sizeof(TPMS_ALG_PROPERTY)) +#define MAX_CAP_HANDLES (MAX_CAP_DATA / sizeof(TPM_HANDLE)) +#define MAX_CAP_CC (MAX_CAP_DATA / sizeof(TPM_CC)) +#define MAX_TPM_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PROPERTY)) +#define MAX_PCR_PROPERTIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_PCR_SELECT)) +#define MAX_ECC_CURVES (MAX_CAP_DATA / sizeof(TPM_ECC_CURVE)) +#define MAX_TAGGED_POLICIES (MAX_CAP_DATA / sizeof(TPMS_TAGGED_POLICY)) +#define MAX_ACT_DATA (MAX_CAP_DATA / sizeof(TPMS_ACT_DATA)) +#define MAX_AC_CAPABILITIES (MAX_CAP_DATA / sizeof(TPMS_AC_OUTPUT)) + +#endif diff --git a/TPMCmd/tpm/include/public/CompilerDependencies.h b/TPMCmd/tpm/include/public/CompilerDependencies.h new file mode 100644 index 00000000..71ed9232 --- /dev/null +++ b/TPMCmd/tpm/include/public/CompilerDependencies.h @@ -0,0 +1,54 @@ +// This file contains the build switches. This contains switches for multiple +// versions of the crypto-library so some may not apply to your environment. +// + +#ifndef _COMPILER_DEPENDENCIES_H_ +#define _COMPILER_DEPENDENCIES_H_ + +#if defined(__GNUC__) +# include +#elif defined(_MSC_VER) +# include +#else +# error unexpected +#endif + +#include + +// Things that are not defined should be defined as NULL + +#ifndef NORETURN +# define NORETURN +#endif +#ifndef LIB_EXPORT +# define LIB_EXPORT +#endif +#ifndef LIB_IMPORT +# define LIB_IMPORT +#endif +#ifndef _REDUCE_WARNING_LEVEL_ +# define _REDUCE_WARNING_LEVEL_(n) +#endif +#ifndef _NORMAL_WARNING_LEVEL_ +# define _NORMAL_WARNING_LEVEL_ +#endif +#ifndef NOT_REFERENCED +# define NOT_REFERENCED(x) (x = x) +#endif + +#ifdef _POSIX_ +typedef int SOCKET; +#endif + +#if !defined(TPM_STATIC_ASSERT) || !defined(COMPILER_CHECKS) +# error Expect definitions of COMPILER_CHECKS and TPM_STATIC_ASSERT +#elif COMPILER_CHECKS +// pre static_assert static_assert +# define MUST_BE(e) TPM_STATIC_ASSERT(e) + +#else +// intentionally disabled, fine. +# define MUST_BE(e) +#endif + +#endif // _COMPILER_DEPENDENCIES_H_ diff --git a/TPMCmd/tpm/include/public/CompilerDependencies_gcc.h b/TPMCmd/tpm/include/public/CompilerDependencies_gcc.h new file mode 100644 index 00000000..96a7aade --- /dev/null +++ b/TPMCmd/tpm/include/public/CompilerDependencies_gcc.h @@ -0,0 +1,35 @@ +// This file contains compiler specific switches. +// These definitions are for the GCC compiler +// + +#ifndef _COMPILER_DEPENDENCIES_GCC_H_ +#define _COMPILER_DEPENDENCIES_GCC_H_ + +#if !defined(__GNUC__) +# error CompilerDependencies_gcc.h included for wrong compiler +#endif + +// don't warn on unused local typedefs, they are used as a +// cross-compiler static_assert +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-local-typedefs" +#pragma GCC diagnostic pop + +#undef _MSC_VER +#undef WIN32 + +#ifndef WINAPI +# define WINAPI +#endif +#ifndef __pragma +# define __pragma(x) +#endif +#define REVERSE_ENDIAN_16(_Number) __builtin_bswap16(_Number) +#define REVERSE_ENDIAN_32(_Number) __builtin_bswap32(_Number) +#define REVERSE_ENDIAN_64(_Number) __builtin_bswap64(_Number) + +#define NORETURN __attribute__((noreturn)) + +#define TPM_INLINE inline __attribute__((always_inline)) +#define TPM_STATIC_ASSERT(e) _Static_assert(e, "static assert") +#endif // _COMPILER_DEPENDENCIES_H_ diff --git a/TPMCmd/tpm/include/public/CompilerDependencies_msvc.h b/TPMCmd/tpm/include/public/CompilerDependencies_msvc.h new file mode 100644 index 00000000..87ac9bf7 --- /dev/null +++ b/TPMCmd/tpm/include/public/CompilerDependencies_msvc.h @@ -0,0 +1,65 @@ +// This file contains compiler specific switches. +// These definitions are for the Microsoft compiler +// + +#ifndef _COMPILER_DEPENDENCIES_MSVC_H_ +#define _COMPILER_DEPENDENCIES_MSVC_H_ + +#if !defined(_MSC_VER) +# error CompilerDependencies_msvc.h included for wrong compiler +#endif + +// Endian conversion for aligned structures +#define REVERSE_ENDIAN_16(_Number) _byteswap_ushort(_Number) +#define REVERSE_ENDIAN_32(_Number) _byteswap_ulong(_Number) +#define REVERSE_ENDIAN_64(_Number) _byteswap_uint64(_Number) + +// Avoid compiler warning for in line of stdio (or not) +//#define _NO_CRT_STDIO_INLINE + +// This macro is used to handle LIB_EXPORT of function and variable names in lieu +// of a .def file. Visual Studio requires that functions be explicitly exported and +// imported. +#ifdef TPM_AS_DLL +# define LIB_EXPORT __declspec(dllexport) // VS compatible version +# define LIB_IMPORT __declspec(dllimport) +#else +// building static libraries +# define LIB_EXPORT +# define LIB_IMPORT +#endif + +#define TPM_INLINE inline + +// This is defined to indicate a function that does not return. Microsoft compilers +// do not support the _Noretrun function parameter. +#define NORETURN __declspec(noreturn) +#if _MSC_VER >= 1400 // SAL processing when needed +# include +#endif + +// # ifdef _WIN64 +// # define _INTPTR 2 +// # else +// # define _INTPTR 1 +// # endif + +#define NOT_REFERENCED(x) (x) + +// Lower the compiler error warning for system include +// files. They tend not to be that clean and there is no +// reason to sort through all the spurious errors that they +// generate when the normal error level is set to /Wall +#define _REDUCE_WARNING_LEVEL_(n) __pragma(warning(push, n)) +// Restore the compiler warning level +#define _NORMAL_WARNING_LEVEL_ __pragma(warning(pop)) +#include + +#ifdef TPM_STATIC_ASSERT +# error TPM_STATIC_ASSERT already defined +#endif + +// MSVC: failure results in error C2118: negative subscript error +#define TPM_STATIC_ASSERT(e) typedef char __C_ASSERT__[(e) ? 1 : -1] + +#endif // _COMPILER_DEPENDENCIES_MSVC_H_ diff --git a/TPMCmd/tpm/include/public/GpMacros.h b/TPMCmd/tpm/include/public/GpMacros.h new file mode 100644 index 00000000..1296656b --- /dev/null +++ b/TPMCmd/tpm/include/public/GpMacros.h @@ -0,0 +1,440 @@ +//** Introduction +// This file is a collection of miscellaneous macros. + +#ifndef GP_MACROS_H +#define GP_MACROS_H + +#ifndef NULL +# define NULL 0 +#endif + +#include "endian_swap.h" +#include + +//** For Self-test +// These macros are used in CryptUtil to invoke the incremental self test. +#if ENABLE_SELF_TESTS +# define TPM_DO_SELF_TEST(alg) \ + do \ + { \ + if(TEST_BIT(alg, g_toTest)) \ + CryptTestAlgorithm(alg, NULL); \ + } while(0) +#else +# define TPM_DO_SELF_TEST(alg) +#endif // ENABLE_SELF_TESTS + +//** For Failures +#if defined _POSIX_ +# define FUNCTION_NAME 0 +#else +# define FUNCTION_NAME __FUNCTION__ +#endif + +#if defined(FAIL_TRACE) && FAIL_TRACE != 0 +# define CODELOCATOR() FUNCTION_NAME, __LINE__ +#else // !FAIL_TRACE +// if provided, use the definition of CODELOCATOR from TpmConfiguration so +// implementor can customize this. +# ifndef CODELOCATOR +# define CODELOCATOR() 0 +# endif +#endif // FAIL_TRACE + +// SETFAILED calls TpmFail. It may or may not return based on the NO_LONGJMP flag. +// CODELOCATOR is a macro that expands to either one 64-bit value that encodes the +// location, or two parameters: Function Name and Line Number. +#define SETFAILED(errorCode) (TpmFail(CODELOCATOR(), errorCode)) + +// If implementation is using longjmp, then calls to TpmFail() will never +// return. However, without longjmp facility, TpmFail will return while most of +// the code currently expects FAIL() calls to immediately abort the current +// command. If they don't, some commands return success instead of failure. The +// family of macros below are provided to allow the code to be modified to +// correctly propagate errors correctly, based on the context. +// +// * Some functions, particularly the ECC crypto have state cleanup at the end +// of the function and need to use the goto Exit pattern. +// * Other functions return TPM_RC values, which should return TPM_RC_FAILURE +// * Still other functions return an isOK boolean and need to return FALSE. +// +// if longjmp is available, all these macros just call SETFAILED and immediately +// abort. Note any of these approaches could leak memory if the crypto adapter +// libraries are using dynamic memory. +// +// FAIL vs. FAIL_NORET +// =================== +// Be cautious with these macros. FAIL_NORET is intended as an affirmation +// that the upstream code calling the function using this macro has been +// investigated to confirm that upstream functions correctly handle this +// function putting the TPM into failure mode without returning an error. +// +// The TPM library was originally written with a lot of error checking omitted, +// which means code occurring after a FAIL macro may not expect to be called +// when the TPM is in failure mode. When NO_LONGJMP is false (the system has a +// longjmp API), then none of that code is executed because the sample platform +// sets up longjmp before calling ExecuteCommand. However, in the NO_LONGJMP +// case, code following a FAIL or FAIL_NORET macro will get run. The +// conservative assumption is that code is untested and may be unsafe in such a +// situation. FAIL_NORET can replace FAIL when the code has been reviewed to +// ensure the post-FAIL code is safe. Of course, this is a point-in-time +// assertion that is only true when the FAIL_NORET macro is first inserted; +// hence it is better to use one of the early-exit macros to immediately return. +// However, the necessary return-code plumbing may be large and FAIL/FAIL_NORET +// are provided to support gradual improvement over time. + +#ifndef NO_LONGJMP +// has longjmp +// necesary to reference Exit, even though the code is no-return +# define TPM_FAIL_RETURN NORETURN void + +// see discussion above about FAIL/FAIL_NORET +# define FAIL(failCode) SETFAILED(failCode) +# define FAIL_NORET(failCode) SETFAILED(failCode) +# define FAIL_IMMEDIATE(failCode, retval) SETFAILED(failCode) +# define FAIL_BOOL(failCode) SETFAILED(failCode) +# define FAIL_RC(failCode) SETFAILED(failCode) +# define FAIL_VOID(failCode) SETFAILED(failCode) +# define FAIL_NULL(failCode) SETFAILED(failCode) +# define FAIL_EXIT(failCode, returnVar, returnCode) \ + do \ + { \ + SETFAILED(failCode); \ + goto Exit; \ + } while(0) + +#else // NO_LONGJMP +// no longjmp service is available +# define TPM_FAIL_RETURN void + +// This macro is provided for existing code and should not be used in new code. +// see discussion above. +# define FAIL(failCode) FAIL_NORET(failCode) + +// Be cautious with this macro, see discussion above. +# define FAIL_NORET(failCode) SETFAILED(failCode) + +// fail and immediately return void +# define FAIL_VOID(failCode) \ + do \ + { \ + SETFAILED(failCode); \ + return; \ + } while(0) + +// fail and immediately return a value +# define FAIL_IMMEDIATE(failCode, retval) \ + do \ + { \ + SETFAILED(failCode); \ + return retval; \ + } while(0) + +// fail and return FALSE +# define FAIL_BOOL(failCode) FAIL_IMMEDIATE(failCode, FALSE) + +// fail and return TPM_RC_FAILURE +# define FAIL_RC(failCode) FAIL_IMMEDIATE(failCode, TPM_RC_FAILURE) + +// fail and return NULL +# define FAIL_NULL(failCode) FAIL_IMMEDIATE(failCode, NULL) + +// fail and return using the goto exit pattern +# define FAIL_EXIT(failCode, returnVar, returnCode) \ + do \ + { \ + SETFAILED(failCode); \ + returnVar = returnCode; \ + goto Exit; \ + } while(0) + +#endif + +// This macro tests that a condition is TRUE and puts the TPM into failure mode +// if it is not. If longjmp is being used, then the macro makes a call from +// which there is no return. Otherwise, the function will return the given +// return code. +#define VERIFY(condition, failCode, returnCode) \ + do \ + { \ + if(!(condition)) \ + { \ + FAIL_IMMEDIATE(failCode, returnCode); \ + } \ + } while(0) + +// this function also verifies a condition and enters failure mode, but sets a +// return value and jumps to Exit on failure - allowing for cleanup. +#define VERIFY_OR_EXIT(condition, failCode, returnVar, returnCode) \ + do \ + { \ + if(!(condition)) \ + { \ + FAIL_EXIT(failCode, returnVar, returnCode); \ + } \ + } while(0) + +// verify the given TPM_RC is success and we are not in +// failure mode. Otherwise, return immediately with TPM_RC_FAILURE. +// note that failure mode is checked first so that an existing FATAL_* error code +// is not overwritten with the default from this macro. +#define VERIFY_RC(rc) \ + do \ + { \ + if(g_inFailureMode) \ + { \ + return TPM_RC_FAILURE; \ + } \ + if(rc != TPM_RC_SUCCESS) \ + { \ + FAIL_IMMEDIATE(FATAL_ERROR_ASSERT, TPM_RC_FAILURE); \ + } \ + } while(0) + +// verify the TPM is not in failure mode or return failure +#define VERIFY_NOT_FAILED() \ + do \ + { \ + if(g_inFailureMode) \ + { \ + return TPM_RC_FAILURE; \ + } \ + } while(0) + +// Enter failure mode if the given TPM_RC is not success, return void. +#define VERIFY_RC_VOID(rc) \ + do \ + { \ + if(g_inFailureMode) \ + { \ + return; \ + } \ + if(rc != TPM_RC_SUCCESS) \ + { \ + FAIL_VOID(FATAL_ERROR_ASSERT); \ + } \ + } while(0) + +// These VERIFY_CRYPTO macros all set failure mode to FATAL_ERROR_CRYPTO +// and immediately return. The general way to parse the names is: +// VERIFY_CRYPTO_[conditionType]_[OR_EXIT]_[retValType] +// if conditionType is omitted, it is taken as BOOL. +// Without OR_EXIT, implies an immediate return. Thus VERIFY_CRYPTO_BOOL: +// 1. check fn against TRUE +// 2. if false, set failure mode to FATAL_ERROR_CRYPTO +// 3. immediately return FALSE. +// and, VERIFY_CRYPTO_OR_EXIT_RC translates to: +// 1. Check a BOOL +// 2. If false, set failure mode with FATAL_ERROR_CRYPTO, +// 3. assume retVal is type TPM_RC, set it to TPM_RC_FAILURE +// 4. Goto Exit +// while VERIFY_CRYPTO_RC_OR_EXIT translates to: +// 1. Check fn result against TPM_RC_SUCCESS +// 2. if not equal, set failure mode to FATAL_ERROR_CRYPTO +// 3. assume retVal is type TPM_RC, set it to TPM_RC_FAILURE +// 4. Goto Exit. +#define VERIFY_CRYPTO(fn) VERIFY((fn), FATAL_ERROR_CRYPTO, TPM_RC_FAILURE) + +#define VERIFY_CRYPTO_BOOL(fn) VERIFY((fn), FATAL_ERROR_CRYPTO, FALSE) + +#define VERIFY_CRYPTO_OR_NULL(fn) VERIFY((fn), FATAL_ERROR_CRYPTO, NULL) + +// these VERIFY_CRYPTO macros all set a result value and goto Exit +#define VERIFY_CRYPTO_OR_EXIT(fn, returnVar, returnCode) \ + VERIFY_OR_EXIT(fn, FATAL_ERROR_CRYPTO, returnVar, returnCode); + +// these VERIFY_CRYPTO_OR_EXIT functions assume the return value variable is +// named retVal +#define VERIFY_CRYPTO_OR_EXIT_RC(fn) \ + VERIFY_CRYPTO_OR_EXIT_GENERIC(fn, retVal, TPM_RC_FAILURE) + +#define VERIFY_CRYPTO_OR_EXIT_FALSE(fn) \ + VERIFY_CRYPTO_OR_EXIT_GENERIC(fn, retVal, FALSE) + +#define VERIFY_CRYPTO_RC_OR_EXIT(fn) \ + do \ + { \ + TPM_RC rc = fn; \ + if(rc != TPM_RC_SUCCESS) \ + { \ + FAIL_EXIT(FATAL_ERROR_CRYPTO, retVal, rc); \ + } \ + } while(0) + +#if(defined EMPTY_ASSERT) && (EMPTY_ASSERT != NO) +# define pAssert(a) ((void)0) +#else +# define pAssert(a) \ + do \ + { \ + if(!(a)) \ + FAIL(FATAL_ERROR_PARAMETER); \ + } while(0) + +# define pAssert_ZERO(a) \ + do \ + { \ + if(!(a)) \ + FAIL_IMMEDIATE(FATAL_ERROR_ASSERT, 0); \ + } while(0); + +# define pAssert_RC(a) \ + do \ + { \ + if(!(a)) \ + FAIL_RC(FATAL_ERROR_ASSERT); \ + } while(0); + +# define pAssert_BOOL(a) \ + do \ + { \ + if(!(a)) \ + FAIL_BOOL(FATAL_ERROR_ASSERT); \ + } while(0); + +# define pAssert_NULL(a) \ + do \ + { \ + if(!(a)) \ + FAIL_NULL(FATAL_ERROR_ASSERT); \ + } while(0); + +// using FAIL_NORET isn't optimium but is available in limited cases that +// result in wrong calculated values, and can be checked later +// but should have no vulnerability implications. +# define pAssert_NORET(a) \ + { \ + if(!(a)) \ + FAIL_NORET(FATAL_ERROR_ASSERT); \ + } + +// this macro is used where a calling code has been verified to function correctly +// when the failing assert immediately returns without an error code. +// this can be because either the caller checks the fatal error flag, or +// the state is safe and a higher-level check will catch it. +# define pAssert_VOID_OK(a) \ + { \ + if(!(a)) \ + FAIL_VOID(FATAL_ERROR_ASSERT); \ + } + +#endif + +// These macros are commonly used in the "Crypt" code as a way to keep listings from +// getting too long. This is not to save paper but to allow one to see more +// useful stuff on the screen at any given time. Neither macro sets failure mode. +#define ERROR_EXIT(returnCode) \ + do \ + { \ + retVal = returnCode; \ + goto Exit; \ + } while(0) + +// braces are necessary for this usage: +// if (y) +// GOTO_ERROR_UNLESS(x) +// else ... +// without braces the else would attach to the GOTO macro instead of the +// outer if statement; given the amount of TPM code that doesn't use braces on +// if statements, this is a live risk. +#define GOTO_ERROR_UNLESS(_X) \ + do \ + { \ + if(!(_X)) \ + goto Error; \ + } while(0) + +#include "public/MinMax.h" + +#ifndef IsOdd +# define IsOdd(a) (((a) & 1) != 0) +#endif + +#ifndef BITS_TO_BYTES +# define BITS_TO_BYTES(bits) (((bits) + 7) >> 3) +#endif + +// These are defined for use when the size of the vector being checked is known +// at compile time. +#define TEST_BIT(bit, vector) TestBit((bit), (BYTE*)&(vector), sizeof(vector)) +#define SET_BIT(bit, vector) SetBit((bit), (BYTE*)&(vector), sizeof(vector)) +#define CLEAR_BIT(bit, vector) ClearBit((bit), (BYTE*)&(vector), sizeof(vector)) + +// The following definitions are used if they have not already been defined. The +// defaults for these settings are compatible with ISO/IEC 9899:2011 (E) +#ifndef LIB_EXPORT +# define LIB_EXPORT +# define LIB_IMPORT +#endif +#ifndef NORETURN +# define NORETURN _Noreturn +#endif +#ifndef NOT_REFERENCED +# define NOT_REFERENCED(x = x) ((void)(x)) +#endif + +#define STD_RESPONSE_HEADER (sizeof(TPM_ST) + sizeof(UINT32) + sizeof(TPM_RC)) + +// This bit is used to indicate that an authorization ticket expires on TPM Reset +// and TPM Restart. It is added to the timeout value returned by TPM2_PoliySigned() +// and TPM2_PolicySecret() and used by TPM2_PolicyTicket(). The timeout value is +// relative to Time (g_time). Time is reset whenever the TPM loses power and cannot +// be moved forward by the user (as can Clock). 'g_time' is a 64-bit value expressing +// time in ms. Stealing the MSb for a flag means that the TPM needs to be reset +// at least once every 292,471,208 years rather than once every 584,942,417 years. +#define EXPIRATION_BIT ((UINT64)1 << 63) + +// Check for consistency of the bit ordering of bit fields +#if BIG_ENDIAN_TPM && MOST_SIGNIFICANT_BIT_0 && USE_BIT_FIELD_STRUCTURES +# error "Settings not consistent" +#endif + +// These macros are used to handle the variation in handling of bit fields. If +#if USE_BIT_FIELD_STRUCTURES // The default, old version, with bit fields +# define IS_ATTRIBUTE(a, type, b) ((a.b) != 0) +# define SET_ATTRIBUTE(a, type, b) (a.b = SET) +# define CLEAR_ATTRIBUTE(a, type, b) (a.b = CLEAR) +# define GET_ATTRIBUTE(a, type, b) (a.b) +# define TPMA_ZERO_INITIALIZER() \ + { \ + 0 \ + } +#else +# define IS_ATTRIBUTE(a, type, b) ((a & type##_##b) != 0) +# define SET_ATTRIBUTE(a, type, b) (a |= type##_##b) +# define CLEAR_ATTRIBUTE(a, type, b) (a &= ~type##_##b) +# define GET_ATTRIBUTE(a, type, b) (type)((a & type##_##b) >> type##_##b##_SHIFT) +# define TPMA_ZERO_INITIALIZER() (0) +#endif + +// These macros determine if the values in this file are referenced or instanced. +// Global.c defines GLOBAL_C so all the values in this file will be instanced in +// Global.obj. For all other files that include this file, the values will simply +// be external references. For constants, there can be an initializer. +#ifndef EXTERN +# ifdef GLOBAL_C +# define EXTERN +# else +# define EXTERN extern +# endif +#endif // EXTERN + +#ifdef GLOBAL_C +# define INITIALIZER(_value_) = _value_ +#else +# define INITIALIZER(_value_) +#endif + +// This macro will create an OID. All OIDs are in DER form with a first octet of +// 0x06 indicating an OID fallowed by an octet indicating the number of octets in the +// rest of the OID. This allows a user of this OID to know how much/little to copy. +#define MAKE_OID(NAME) EXTERN const BYTE OID##NAME[] INITIALIZER({OID##NAME##_VALUE}) + +// This definition is moved from TpmProfile.h because it is not actually vendor- +// specific. It has to be the same size as the 'sequence' parameter of a TPMS_CONTEXT +// and that is a UINT64. So, this is an invariant value +#define CONTEXT_COUNTER UINT64 + +#include "public/TpmCalculatedAttributes.h" + +#endif // GP_MACROS_H \ No newline at end of file diff --git a/TPMCmd/tpm/include/public/MinMax.h b/TPMCmd/tpm/include/public/MinMax.h new file mode 100644 index 00000000..af506b0c --- /dev/null +++ b/TPMCmd/tpm/include/public/MinMax.h @@ -0,0 +1,16 @@ + +#ifndef _MIN_MAX_H_ +#define _MIN_MAX_H_ + +#ifndef MAX +# define MAX(a, b) ((a) > (b) ? (a) : (b)) +#endif +#ifndef MIN +# define MIN(a, b) ((a) < (b) ? (a) : (b)) +#endif + +#ifndef SIZEOF_MEMBER +# define SIZEOF_MEMBER(type, member) sizeof(((type*)0)->member) +#endif + +#endif // _MIN_MAX_H_ diff --git a/TPMCmd/tpm/include/public/TPMB.h b/TPMCmd/tpm/include/public/TPMB.h new file mode 100644 index 00000000..dc2910e2 --- /dev/null +++ b/TPMCmd/tpm/include/public/TPMB.h @@ -0,0 +1,46 @@ +// +// This file contains extra TPM2B structures +// + +#ifndef _TPMB_H +#define _TPMB_H + +//*** Size Types +// These types are used to differentiate the two different size values used. +// +// NUMBYTES is used when a size is a number of bytes (usually a TPM2B) +typedef UINT16 NUMBYTES; + +// TPM2B Types +typedef struct +{ + NUMBYTES size; + BYTE buffer[1]; +} TPM2B, *P2B; +typedef const TPM2B* PC2B; + +// This macro helps avoid having to type in the structure in order to create +// a new TPM2B type that is used in a function. +#define TPM2B_TYPE(name, bytes) \ + typedef union \ + { \ + struct \ + { \ + NUMBYTES size; \ + BYTE buffer[(bytes)]; \ + } t; \ + TPM2B b; \ + } TPM2B_##name + +// This macro defines a TPM2B with a constant character value. This macro +// sets the size of the string to the size minus the terminating zero byte. +// This lets the user of the label add their terminating 0. This method +// is chosen so that existing code that provides a label will continue +// to work correctly. + +// Macro to instance and initialize a TPM2B value +#define TPM2B_INIT(TYPE, name) TPM2B_##TYPE name = {sizeof(name.t.buffer), {0}} + +#define TPM2B_BYTE_VALUE(bytes) TPM2B_TYPE(bytes##_BYTE_VALUE, bytes) + +#endif diff --git a/TPMCmd/tpm/include/public/TpmAlgorithmDefines.h b/TPMCmd/tpm/include/public/TpmAlgorithmDefines.h new file mode 100644 index 00000000..b675f5e5 --- /dev/null +++ b/TPMCmd/tpm/include/public/TpmAlgorithmDefines.h @@ -0,0 +1,261 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#ifndef _TPM_INCLUDE_PRIVATE_TPMALGORITHMDEFINES_H_ +#define _TPM_INCLUDE_PRIVATE_TPMALGORITHMDEFINES_H_ + +#include +#include "public/MinMax.h" +#include "public/TPMB.h" + +#if ALG_ECC +// Table "Defines for NIST_P192 ECC Values" (TCG Algorithm Registry) +# define NIST_P192_ID TPM_ECC_NIST_P192 +# define NIST_P192_KEY_SIZE 192 + +// Table "Defines for NIST_P224 ECC Values" (TCG Algorithm Registry) +# define NIST_P224_ID TPM_ECC_NIST_P224 +# define NIST_P224_KEY_SIZE 224 + +// Table "Defines for NIST_P256 ECC Values" (TCG Algorithm Registry) +# define NIST_P256_ID TPM_ECC_NIST_P256 +# define NIST_P256_KEY_SIZE 256 + +// Table "Defines for NIST_P384 ECC Values" (TCG Algorithm Registry) +# define NIST_P384_ID TPM_ECC_NIST_P384 +# define NIST_P384_KEY_SIZE 384 + +// Table "Defines for NIST_P521 ECC Values" (TCG Algorithm Registry) +# define NIST_P521_ID TPM_ECC_NIST_P521 +# define NIST_P521_KEY_SIZE 521 + +// Table "Defines for BN_P256 ECC Values" (TCG Algorithm Registry) +# define BN_P256_ID TPM_ECC_BN_P256 +# define BN_P256_KEY_SIZE 256 + +// Table "Defines for BN_P638 ECC Values" (TCG Algorithm Registry) +# define BN_P638_ID TPM_ECC_BN_P638 +# define BN_P638_KEY_SIZE 638 + +// Table "Defines for SM2_P256 ECC Values" (TCG Algorithm Registry) +# define SM2_P256_ID TPM_ECC_SM2_P256 +# define SM2_P256_KEY_SIZE 256 + +// Table "Defines for BP_P256_R1 ECC Values" (TCG Algorithm Registry) +# define BP_P256_R1_ID TPM_ECC_BP_P256_R1 +# define BP_P256_R1_KEY_SIZE 256 + +// Table "Defines for BP_P384_R1 ECC Values" (TCG Algorithm Registry) +# define BP_P384_R1_ID TPM_ECC_BP_P384_R1 +# define BP_P384_R1_KEY_SIZE 384 + +// Table "Defines for BP_P512_R1 ECC Values" (TCG Algorithm Registry) +# define BP_P512_R1_ID TPM_ECC_BP_P512_R1 +# define BP_P512_R1_KEY_SIZE 512 + +// Table "Defines for CURVE_25519 ECC Values" (TCG Algorithm Registry) +# define CURVE_25519_ID TPM_ECC_CURVE_25519 +# define CURVE_25519_KEY_SIZE 256 + +// Table "Defines for CURVE_448 ECC Values" (TCG Algorithm Registry) +# define CURVE_448_ID TPM_ECC_CURVE_448 +# define CURVE_448_KEY_SIZE 448 + +// Derived ECC Value +# define ECC_CURVES \ + { \ + TPM_ECC_NIST_P192, TPM_ECC_NIST_P224, TPM_ECC_NIST_P256, \ + TPM_ECC_NIST_P384, TPM_ECC_NIST_P521, TPM_ECC_BN_P256, \ + TPM_ECC_BN_P638, TPM_ECC_SM2_P256, TPM_ECC_BP_P256_R1, \ + TPM_ECC_BP_P384_R1, TPM_ECC_BP_P512_R1, TPM_ECC_CURVE_25519, \ + TPM_ECC_CURVE_448 \ + } + +# define ECC_CURVE_COUNT \ + (ECC_NIST_P192 + ECC_NIST_P224 + ECC_NIST_P256 + ECC_NIST_P384 + ECC_NIST_P521 \ + + ECC_BN_P256 + ECC_BN_P638 + ECC_SM2_P256 + ECC_BP_P256_R1 + ECC_BP_P384_R1 \ + + ECC_BP_P512_R1 + ECC_CURVE_25519 + ECC_CURVE_448) + +// Avoid expanding MAX_ECC_KEY_BITS into a long expression, the compiler slows down +// and on some compilers runs out of heap space. + +// 638 +# if ECC_BN_P638 +# define MAX_ECC_KEY_BITS BN_P638_KEY_SIZE +// 521 +# elif ECC_NIST_P521 +# define MAX_ECC_KEY_BITS NIST_P521_KEY_SIZE +# elif ECC_BP_P512_R1 +# define MAX_ECC_KEY_BITS BP_P512_R1_KEY_SIZE +// 448 +# elif ECC_CURVE_448 +# define MAX_ECC_KEY_BITS CURVE_448_KEY_SIZE +// 384 +# elif ECC_NIST_P384 +# define MAX_ECC_KEY_BITS NIST_P384_KEY_SIZE +# elif ECC_BP_P384_R1 +# define MAX_ECC_KEY_BITS BP_P384_R1_KEY_SIZE +// 256 +# elif ECC_NIST_P256 +# define MAX_ECC_KEY_BITS NIST_P256_KEY_SIZE +# elif TPM_ECC_BN_P256 +# define MAX_ECC_KEY_BITS BN_P256_KEY_SIZE +# elif TPM_ECC_SM2_P256 +# define MAX_ECC_KEY_BITS SM2_P256_KEY_SIZE +# elif TPM_ECC_CURVE_25519 +# define MAX_ECC_KEY_BITS CURVE_25519_KEY_SIZE +# elif TPM_ECC_BP_P256_R1 +# define MAX_ECC_KEY_BITS BP_P256_R1_KEY_SIZE +// 224 +# elif ECC_NIST_P224 +# define MAX_ECC_KEY_BITS NIST_P224_KEY_SIZE +// 192 +# elif ECC_NIST_P192 +# define MAX_ECC_KEY_BITS NIST_P192_KEY_SIZE +# else +# error ALG_ECC enabled, but no ECC Curves Enabled +# endif + +# define MAX_ECC_KEY_BYTES ((MAX_ECC_KEY_BITS + 7) / 8) + +#endif // ALG_ECC + +#if ALG_RSA +// Table "Defines for RSA Asymmetric Cipher Algorithm Constants" (TCG Algorithm Registry) +# define RSA_KEY_SIZES_BITS \ + (RSA_1024 * 1024), (RSA_2048 * 2048), (RSA_3072 * 3072), (RSA_4096 * 4096), \ + (RSA_16384 * 16384) + +# if RSA_16384 +# define RSA_MAX_KEY_SIZE_BITS 16384 +# elif RSA_4096 +# define RSA_MAX_KEY_SIZE_BITS 4096 +# elif RSA_3072 +# define RSA_MAX_KEY_SIZE_BITS 3072 +# elif RSA_2048 +# define RSA_MAX_KEY_SIZE_BITS 2048 +# elif RSA_1024 +# define RSA_MAX_KEY_SIZE_BITS 1024 +# else +# error RSA Enabled, but no RSA key sizes enabled. +# endif + +# define MAX_RSA_KEY_BITS RSA_MAX_KEY_SIZE_BITS +# define MAX_RSA_KEY_BYTES BITS_TO_BYTES(RSA_MAX_KEY_SIZE_BITS) +#endif // ALG_RSA + +// Table "Defines for AES Symmetric Cipher Algorithm Constants" (TCG Algorithm Registry) +#define AES_KEY_SIZES_BITS (AES_128 * 128), (AES_192 * 192), (AES_256 * 256) +#define AES_MAX_KEY_SIZE_BITS \ + MAX((AES_256 * 256), MAX((AES_192 * 192), (AES_128 * 128))) +#define MAX_AES_KEY_BITS AES_MAX_KEY_SIZE_BITS +#define MAX_AES_KEY_BYTES BITS_TO_BYTES(MAX_AES_KEY_BITS) +#define AES_BLOCK_SIZES (AES_128 * 128 / 8), (AES_192 * 128 / 8), (AES_256 * 128 / 8) +#define MAX_AES_BLOCK_SIZE_BYTES \ + MAX((AES_256 * 128 / 8), MAX((AES_192 * 128 / 8), (AES_128 * 128 / 8))) +#define AES_MAX_BLOCK_SIZE MAX_AES_BLOCK_SIZE_BYTES + +// Table "Defines for SM4 Symmetric Cipher Algorithm Constants" (TCG Algorithm Registry) +#define SM4_KEY_SIZES_BITS (SM4_128 * 128) +#define SM4_MAX_KEY_SIZE_BITS (SM4_128 * 128) +#define MAX_SM4_KEY_BITS SM4_MAX_KEY_SIZE_BITS +#define MAX_SM4_KEY_BYTES BITS_TO_BYTES(MAX_SM4_KEY_BITS) +#define SM4_BLOCK_SIZES (SM4_128 * 128 / 8) +#define MAX_SM4_BLOCK_SIZE_BYTES (SM4_128 * 128 / 8) +#define SM4_MAX_BLOCK_SIZE MAX_SM4_BLOCK_SIZE_BYTES + +// Table "Defines for CAMELLIA Symmetric Cipher Algorithm Constants" (TCG Algorithm Registry) +#define CAMELLIA_KEY_SIZES_BITS \ + (CAMELLIA_128 * 128), (CAMELLIA_192 * 192), (CAMELLIA_256 * 256) +#define CAMELLIA_MAX_KEY_SIZE_BITS \ + MAX((CAMELLIA_256 * 256), MAX((CAMELLIA_192 * 192), (CAMELLIA_128 * 128))) +#define MAX_CAMELLIA_KEY_BITS CAMELLIA_MAX_KEY_SIZE_BITS +#define MAX_CAMELLIA_KEY_BYTES BITS_TO_BYTES(MAX_CAMELLIA_KEY_BITS) +#define CAMELLIA_BLOCK_SIZES \ + (CAMELLIA_128 * 128 / 8), (CAMELLIA_192 * 128 / 8), (CAMELLIA_256 * 128 / 8) +#define MAX_CAMELLIA_BLOCK_SIZE_BYTES \ + MAX((CAMELLIA_256 * 128 / 8), \ + MAX((CAMELLIA_192 * 128 / 8), (CAMELLIA_128 * 128 / 8))) +#define CAMELLIA_MAX_BLOCK_SIZE MAX_CAMELLIA_BLOCK_SIZE_BYTES + +// Derived Symmetric Values +#define SYM_COUNT ALG_AES + ALG_SM4 + ALG_CAMELLIA +#define MAX_SYM_BLOCK_SIZE \ + MAX(CAMELLIA_MAX_BLOCK_SIZE, MAX(SM4_MAX_BLOCK_SIZE, AES_MAX_BLOCK_SIZE)) +#define MAX_SYM_KEY_BITS \ + MAX(CAMELLIA_MAX_KEY_SIZE_BITS, MAX(SM4_MAX_KEY_SIZE_BITS, AES_MAX_KEY_SIZE_BITS)) +#define MAX_SYM_KEY_BYTES ((MAX_SYM_KEY_BITS + 7) / 8) + +// Table "Defines for SHA1 Hash Values" (TCG Algorithm Registry) +#define SHA1_DIGEST_SIZE 20 +#define SHA1_BLOCK_SIZE 64 + +// Table "Defines for SHA256 Hash Values" (TCG Algorithm Registry) +#define SHA256_DIGEST_SIZE 32 +#define SHA256_BLOCK_SIZE 64 + +// Table "Defines for SHA384 Hash Values" (TCG Algorithm Registry) +#define SHA384_DIGEST_SIZE 48 +#define SHA384_BLOCK_SIZE 128 + +// Table "Defines for SHA512 Hash Values" (TCG Algorithm Registry) +#define SHA512_DIGEST_SIZE 64 +#define SHA512_BLOCK_SIZE 128 + +// Table "Defines for SM3_256 Hash Values" (TCG Algorithm Registry) +#define SM3_256_DIGEST_SIZE 32 +#define SM3_256_BLOCK_SIZE 64 + +// Table "Defines for SHA3_256 Hash Values" (TCG Algorithm Registry) +#define SHA3_256_DIGEST_SIZE 32 +#define SHA3_256_BLOCK_SIZE 136 + +// Table "Defines for SHA3_384 Hash Values" (TCG Algorithm Registry) +#define SHA3_384_DIGEST_SIZE 48 +#define SHA3_384_BLOCK_SIZE 104 + +// Table "Defines for SHA3_512 Hash Values" (TCG Algorithm Registry) +#define SHA3_512_DIGEST_SIZE 64 +#define SHA3_512_BLOCK_SIZE 72 + +// Derived Hash Values +#define HASH_COUNT \ + (ALG_SHA1 + ALG_SHA256 + ALG_SHA384 + ALG_SHA512 + ALG_SM3_256 + ALG_SHA3_256 \ + + ALG_SHA3_384 + ALG_SHA3_512) + +// Leaving these as MAX-based calculations because (a) they don't slow down the +// build noticably, and (b) hash block and digest sizes vary, so the #if +// cascades for these are significantly more error prone to maintain. +#define MAX_HASH_BLOCK_SIZE \ + MAX((ALG_SHA3_512 * SHA3_512_BLOCK_SIZE), \ + MAX((ALG_SHA3_384 * SHA3_384_BLOCK_SIZE), \ + MAX((ALG_SHA3_256 * SHA3_256_BLOCK_SIZE), \ + MAX((ALG_SM3_256 * SM3_256_BLOCK_SIZE), \ + MAX((ALG_SHA512 * SHA512_BLOCK_SIZE), \ + MAX((ALG_SHA384 * SHA384_BLOCK_SIZE), \ + MAX((ALG_SHA256 * SHA256_BLOCK_SIZE), \ + (ALG_SHA1 * SHA1_BLOCK_SIZE)))))))) + +#define MAX_HASH_DIGEST_SIZE \ + MAX((ALG_SHA3_512 * SHA3_512_DIGEST_SIZE), \ + MAX((ALG_SHA3_384 * SHA3_384_DIGEST_SIZE), \ + MAX((ALG_SHA3_256 * SHA3_256_DIGEST_SIZE), \ + MAX((ALG_SM3_256 * SM3_256_DIGEST_SIZE), \ + MAX((ALG_SHA512 * SHA512_DIGEST_SIZE), \ + MAX((ALG_SHA384 * SHA384_DIGEST_SIZE), \ + MAX((ALG_SHA256 * SHA256_DIGEST_SIZE), \ + (ALG_SHA1 * SHA1_DIGEST_SIZE)))))))) + +#define MAX_DIGEST_SIZE MAX_HASH_DIGEST_SIZE + +#if MAX_HASH_DIGEST_SIZE == 0 || MAX_HASH_BLOCK_SIZE == 0 +# error "Hash data not valid" +#endif + +// Define the 2B structure that would hold any hash block +TPM2B_TYPE(MAX_HASH_BLOCK, MAX_HASH_BLOCK_SIZE); + +// Following typedef is for some old code +typedef TPM2B_MAX_HASH_BLOCK TPM2B_HASH_BLOCK; + +#endif // _TPM_INCLUDE_PRIVATE_TPMALGORITHMDEFINES_H_ diff --git a/TPMCmd/tpm/include/public/TpmCalculatedAttributes.h b/TPMCmd/tpm/include/public/TpmCalculatedAttributes.h new file mode 100644 index 00000000..c29fa836 --- /dev/null +++ b/TPMCmd/tpm/include/public/TpmCalculatedAttributes.h @@ -0,0 +1,156 @@ +#ifndef _TPM_CALCULATED_ATTRIBUTES_H_ +#define _TPM_CALCULATED_ATTRIBUTES_H_ + +#include "public/TpmAlgorithmDefines.h" +#include "public/GpMacros.h" + +#define JOIN(x, y) x##y +#define JOIN3(x, y, z) x##y##z +#define CONCAT(x, y) JOIN(x, y) +#define CONCAT3(x, y, z) JOIN3(x, y, z) + +//** Derived from Vendor-specific values +// Values derived from vendor specific settings in TpmProfile.h +#define PCR_SELECT_MIN ((PLATFORM_PCR + 7) / 8) +#define PCR_SELECT_MAX ((IMPLEMENTATION_PCR + 7) / 8) +#define MAX_ORDERLY_COUNT ((1 << ORDERLY_BITS) - 1) +#define RSA_MAX_PRIME (MAX_RSA_KEY_BYTES / 2) +#define RSA_PRIVATE_SIZE (RSA_MAX_PRIME * 5) + +// If CONTEXT_INTEGRITY_HASH_ALG is defined, then the vendor is using the old style +// table. Otherwise, pick the "strongest" implemented hash algorithm as the context +// hash. +#ifndef CONTEXT_HASH_ALGORITHM +# if defined ALG_SHA3_512 && ALG_SHA3_512 == YES +# define CONTEXT_HASH_ALGORITHM SHA3_512 +# elif defined ALG_SHA512 && ALG_SHA512 == YES +# define CONTEXT_HASH_ALGORITHM SHA512 +# elif defined ALG_SHA3_384 && ALG_SHA3_384 == YES +# define CONTEXT_HASH_ALGORITHM SHA3_384 +# elif defined ALG_SHA384 && ALG_SHA384 == YES +# define CONTEXT_HASH_ALGORITHM SHA384 +# elif defined ALG_SHA3_256 && ALG_SHA3_256 == YES +# define CONTEXT_HASH_ALGORITHM SHA3_256 +# elif defined ALG_SHA256 && ALG_SHA256 == YES +# define CONTEXT_HASH_ALGORITHM SHA256 +# elif defined ALG_SM3_256 && ALG_SM3_256 == YES +# define CONTEXT_HASH_ALGORITHM SM3_256 +# elif defined ALG_SHA1 && ALG_SHA1 == YES +# define CONTEXT_HASH_ALGORITHM SHA1 +# endif +# define CONTEXT_INTEGRITY_HASH_ALG CONCAT(TPM_ALG_, CONTEXT_HASH_ALGORITHM) +#endif + +#ifndef CONTEXT_INTEGRITY_HASH_SIZE +# define CONTEXT_INTEGRITY_HASH_SIZE CONCAT(CONTEXT_HASH_ALGORITHM, _DIGEST_SIZE) +#endif + +#if ALG_RSA +// This table taken from SP800-57 part 1, Table 2. +// for other key lengths, https://csrc.nist.gov/csrc/media/projects/cryptographic-module-validation-program/documents/fips140-2/fips1402ig.pdf +// provides the following formula for RSA for a key of modulus length L. +// $$x = \frac{1.923 * \sqrt[3]{L * \ln(2)} * \sqrt[3]{(\ln(L*\ln(2)))^2} - 4.69}{\ln(2)}$$ +# define RSA_SECURITY_STRENGTH \ + (MAX_RSA_KEY_BITS >= 15360 \ + ? 256 \ + : (MAX_RSA_KEY_BITS >= 7680 \ + ? 192 \ + : (MAX_RSA_KEY_BITS >= 3072 \ + ? 128 \ + : (MAX_RSA_KEY_BITS >= 2048 \ + ? 112 \ + : (MAX_RSA_KEY_BITS >= 1024 ? 80 : 0))))) +#else +# define RSA_SECURITY_STRENGTH 0 +#endif // ALG_RSA + +#if ALG_ECC +# define ECC_SECURITY_STRENGTH \ + (MAX_ECC_KEY_BITS >= 521 \ + ? 256 \ + : (MAX_ECC_KEY_BITS >= 384 ? 192 : (MAX_ECC_KEY_BITS >= 256 ? 128 : 0))) +#else +# define ECC_SECURITY_STRENGTH 0 +#endif // ALG_ECC + +#define MAX_ASYM_SECURITY_STRENGTH MAX(RSA_SECURITY_STRENGTH, ECC_SECURITY_STRENGTH) + +#define MAX_HASH_SECURITY_STRENGTH ((CONTEXT_INTEGRITY_HASH_SIZE * 8) / 2) + +// Unless some algorithm is broken... +#define MAX_SYM_SECURITY_STRENGTH MAX_SYM_KEY_BITS + +#define MAX_SECURITY_STRENGTH_BITS \ + MAX(MAX_ASYM_SECURITY_STRENGTH, \ + MAX(MAX_SYM_SECURITY_STRENGTH, MAX_HASH_SECURITY_STRENGTH)) + +// This is the size that was used before the 1.38 errata requiring that P1.14.4 be +// followed +#define PROOF_SIZE CONTEXT_INTEGRITY_HASH_SIZE + +// As required by P1.14.4 +#define COMPLIANT_PROOF_SIZE \ + (MAX(CONTEXT_INTEGRITY_HASH_SIZE, (2 * MAX_SYM_KEY_BYTES))) + +// As required by P1.14.3.1 +#define COMPLIANT_PRIMARY_SEED_SIZE BITS_TO_BYTES(MAX_SECURITY_STRENGTH_BITS * 2) + +// This is the pre-errata version +#ifndef PRIMARY_SEED_SIZE +# define PRIMARY_SEED_SIZE PROOF_SIZE +#endif + +#if USE_SPEC_COMPLIANT_PROOFS +# undef PROOF_SIZE +# define PROOF_SIZE COMPLIANT_PROOF_SIZE +# undef PRIMARY_SEED_SIZE +# define PRIMARY_SEED_SIZE COMPLIANT_PRIMARY_SEED_SIZE +#endif // USE_SPEC_COMPLIANT_PROOFS + +#if !SKIP_PROOF_ERRORS +# if PROOF_SIZE < COMPLIANT_PROOF_SIZE +# error "PROOF_SIZE is not compliant with TPM specification" +# endif +# if PRIMARY_SEED_SIZE < COMPLIANT_PRIMARY_SEED_SIZE +# error Non-compliant PRIMARY_SEED_SIZE +# endif +#endif // !SKIP_PROOF_ERRORS + +// If CONTEXT_ENCRYPT_ALG is defined, then the vendor is using the old style table +#if defined CONTEXT_ENCRYPT_ALG +# undef CONTEXT_ENCRYPT_ALGORITHM +# if CONTEXT_ENCRYPT_ALG == ALG_AES_VALUE +# define CONTEXT_ENCRYPT_ALGORITHM AES +# elif CONTEXT_ENCRYPT_ALG == ALG_SM4_VALUE +# define CONTEXT_ENCRYPT_ALGORITHM SM4 +# elif CONTEXT_ENCRYPT_ALG == ALG_CAMELLIA_VALUE +# define CONTEXT_ENCRYPT_ALGORITHM CAMELLIA +# else +# error Unknown value for CONTEXT_ENCRYPT_ALG +# endif // CONTEXT_ENCRYPT_ALG == ALG_AES_VALUE +#else +# define CONTEXT_ENCRYPT_ALG CONCAT3(ALG_, CONTEXT_ENCRYPT_ALGORITHM, _VALUE) +#endif // CONTEXT_ENCRYPT_ALG +#define CONTEXT_ENCRYPT_KEY_BITS CONCAT(CONTEXT_ENCRYPT_ALGORITHM, _MAX_KEY_SIZE_BITS) +#define CONTEXT_ENCRYPT_KEY_BYTES ((CONTEXT_ENCRYPT_KEY_BITS + 7) / 8) + +// This is updated to follow the requirement of P2 that the label not be larger +// than 32 bytes. +#ifndef LABEL_MAX_BUFFER +# define LABEL_MAX_BUFFER MIN(32, MAX(MAX_ECC_KEY_BYTES, MAX_DIGEST_SIZE)) +#endif + +// This bit is used to indicate that an authorization ticket expires on TPM Reset +// and TPM Restart. It is added to the timeout value returned by TPM2_PoliySigned() +// and TPM2_PolicySecret() and used by TPM2_PolicyTicket(). The timeout value is +// relative to Time (g_time). Time is reset whenever the TPM loses power and cannot +// be moved forward by the user (as can Clock). 'g_time' is a 64-bit value expressing +// time in ms. Stealing the MSb for a flag means that the TPM needs to be reset +// at least once every 292,471,208 years rather than once every 584,942,417 years. +#define EXPIRATION_BIT ((UINT64)1 << 63) + +// This definition is moved from TpmProfile.h because it is not actually vendor- +// specific. It has to be the same size as the 'sequence' parameter of a TPMS_CONTEXT +// and that is a UINT64. So, this is an invariant value +#define CONTEXT_COUNTER UINT64 +#endif // _TPM_CALCULATED_ATTRIBUTES_H_ \ No newline at end of file diff --git a/TPMCmd/tpm/include/public/TpmTypes.h b/TPMCmd/tpm/include/public/TpmTypes.h new file mode 100644 index 00000000..e1d524c6 --- /dev/null +++ b/TPMCmd/tpm/include/public/TpmTypes.h @@ -0,0 +1,3182 @@ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT + +#ifndef _TPM_INCLUDE_PRIVATE_TPMTYPES_H_ +#define _TPM_INCLUDE_PRIVATE_TPMTYPES_H_ + +#ifndef MAX_CAP_BUFFER +# error MAX_CAP_BUFFER must be defined before this file so it can calculate maximum capability sizes +#endif +#include "public/Capabilities.h" +#include "public/TpmAlgorithmDefines.h" +#include "public/TpmCalculatedAttributes.h" +#include "public/GpMacros.h" + +// Table "Definition of Types for Documentation Clarity" (Part 2: Structures) +typedef UINT32 TPM_ALGORITHM_ID; +#define TYPE_OF_TPM_ALGORITHM_ID UINT32 +typedef UINT32 TPM_MODIFIER_INDICATOR; +#define TYPE_OF_TPM_MODIFIER_INDICATOR UINT32 +typedef UINT32 TPM_AUTHORIZATION_SIZE; +#define TYPE_OF_TPM_AUTHORIZATION_SIZE UINT32 +typedef UINT32 TPM_PARAMETER_SIZE; +#define TYPE_OF_TPM_PARAMETER_SIZE UINT32 +typedef UINT16 TPM_KEY_SIZE; +#define TYPE_OF_TPM_KEY_SIZE UINT16 +typedef UINT16 TPM_KEY_BITS; +#define TYPE_OF_TPM_KEY_BITS UINT16 + +// Table "Definition of TPM_CONSTANTS32 Constants" (Part 2: Structures) +typedef UINT32 TPM_CONSTANTS32; +#define TYPE_OF_TPM_CONSTANTS32 UINT32 +#define TPM_GENERATED_VALUE (TPM_CONSTANTS32)(0xFF544347) +#define TPM_MAX_DERIVATION_BITS (TPM_CONSTANTS32)(8192) + +// Table "Definition of TPM_ALG_ID Constants" (Part 2: Structures) +typedef UINT16 TPM_ALG_ID; +#define TYPE_OF_TPM_ALG_ID UINT16 +#define ALG_ERROR_VALUE 0x0000 +#define TPM_ALG_ERROR (TPM_ALG_ID)(ALG_ERROR_VALUE) +#define ALG_RSA_VALUE 0x0001 +#define TPM_ALG_RSA (TPM_ALG_ID)(ALG_RSA_VALUE) +#define ALG_TDES_VALUE 0x0003 +#define TPM_ALG_TDES (TPM_ALG_ID)(ALG_TDES_VALUE) +#define ALG_SHA1_VALUE 0x0004 +#define TPM_ALG_SHA1 (TPM_ALG_ID)(ALG_SHA1_VALUE) +#define ALG_HMAC_VALUE 0x0005 +#define TPM_ALG_HMAC (TPM_ALG_ID)(ALG_HMAC_VALUE) +#define ALG_AES_VALUE 0x0006 +#define TPM_ALG_AES (TPM_ALG_ID)(ALG_AES_VALUE) +#define ALG_MGF1_VALUE 0x0007 +#define TPM_ALG_MGF1 (TPM_ALG_ID)(ALG_MGF1_VALUE) +#define ALG_KEYEDHASH_VALUE 0x0008 +#define TPM_ALG_KEYEDHASH (TPM_ALG_ID)(ALG_KEYEDHASH_VALUE) +#define ALG_XOR_VALUE 0x000A +#define TPM_ALG_XOR (TPM_ALG_ID)(ALG_XOR_VALUE) +#define ALG_SHA256_VALUE 0x000B +#define TPM_ALG_SHA256 (TPM_ALG_ID)(ALG_SHA256_VALUE) +#define ALG_SHA384_VALUE 0x000C +#define TPM_ALG_SHA384 (TPM_ALG_ID)(ALG_SHA384_VALUE) +#define ALG_SHA512_VALUE 0x000D +#define TPM_ALG_SHA512 (TPM_ALG_ID)(ALG_SHA512_VALUE) +#define ALG_SHA256_192_VALUE 0x000E +#define TPM_ALG_SHA256_192 (TPM_ALG_ID)(ALG_SHA256_192_VALUE) +#define ALG_NULL_VALUE 0x0010 +#define TPM_ALG_NULL (TPM_ALG_ID)(ALG_NULL_VALUE) +#define ALG_SM3_256_VALUE 0x0012 +#define TPM_ALG_SM3_256 (TPM_ALG_ID)(ALG_SM3_256_VALUE) +#define ALG_SM4_VALUE 0x0013 +#define TPM_ALG_SM4 (TPM_ALG_ID)(ALG_SM4_VALUE) +#define ALG_RSASSA_VALUE 0x0014 +#define TPM_ALG_RSASSA (TPM_ALG_ID)(ALG_RSASSA_VALUE) +#define ALG_RSAES_VALUE 0x0015 +#define TPM_ALG_RSAES (TPM_ALG_ID)(ALG_RSAES_VALUE) +#define ALG_RSAPSS_VALUE 0x0016 +#define TPM_ALG_RSAPSS (TPM_ALG_ID)(ALG_RSAPSS_VALUE) +#define ALG_OAEP_VALUE 0x0017 +#define TPM_ALG_OAEP (TPM_ALG_ID)(ALG_OAEP_VALUE) +#define ALG_ECDSA_VALUE 0x0018 +#define TPM_ALG_ECDSA (TPM_ALG_ID)(ALG_ECDSA_VALUE) +#define ALG_ECDH_VALUE 0x0019 +#define TPM_ALG_ECDH (TPM_ALG_ID)(ALG_ECDH_VALUE) +#define ALG_ECDAA_VALUE 0x001A +#define TPM_ALG_ECDAA (TPM_ALG_ID)(ALG_ECDAA_VALUE) +#define ALG_SM2_VALUE 0x001B +#define TPM_ALG_SM2 (TPM_ALG_ID)(ALG_SM2_VALUE) +#define ALG_ECSCHNORR_VALUE 0x001C +#define TPM_ALG_ECSCHNORR (TPM_ALG_ID)(ALG_ECSCHNORR_VALUE) +#define ALG_ECMQV_VALUE 0x001D +#define TPM_ALG_ECMQV (TPM_ALG_ID)(ALG_ECMQV_VALUE) +#define ALG_KDF1_SP800_56A_VALUE 0x0020 +#define TPM_ALG_KDF1_SP800_56A (TPM_ALG_ID)(ALG_KDF1_SP800_56A_VALUE) +#define ALG_KDF2_VALUE 0x0021 +#define TPM_ALG_KDF2 (TPM_ALG_ID)(ALG_KDF2_VALUE) +#define ALG_KDF1_SP800_108_VALUE 0x0022 +#define TPM_ALG_KDF1_SP800_108 (TPM_ALG_ID)(ALG_KDF1_SP800_108_VALUE) +#define ALG_ECC_VALUE 0x0023 +#define TPM_ALG_ECC (TPM_ALG_ID)(ALG_ECC_VALUE) +#define ALG_SYMCIPHER_VALUE 0x0025 +#define TPM_ALG_SYMCIPHER (TPM_ALG_ID)(ALG_SYMCIPHER_VALUE) +#define ALG_CAMELLIA_VALUE 0x0026 +#define TPM_ALG_CAMELLIA (TPM_ALG_ID)(ALG_CAMELLIA_VALUE) +#define ALG_SHA3_256_VALUE 0x0027 +#define TPM_ALG_SHA3_256 (TPM_ALG_ID)(ALG_SHA3_256_VALUE) +#define ALG_SHA3_384_VALUE 0x0028 +#define TPM_ALG_SHA3_384 (TPM_ALG_ID)(ALG_SHA3_384_VALUE) +#define ALG_SHA3_512_VALUE 0x0029 +#define TPM_ALG_SHA3_512 (TPM_ALG_ID)(ALG_SHA3_512_VALUE) +#define ALG_SHAKE128_VALUE 0x002A +#define TPM_ALG_SHAKE128 (TPM_ALG_ID)(ALG_SHAKE128_VALUE) +#define ALG_SHAKE256_VALUE 0x002B +#define TPM_ALG_SHAKE256 (TPM_ALG_ID)(ALG_SHAKE256_VALUE) +#define ALG_SHAKE256_192_VALUE 0x002C +#define TPM_ALG_SHAKE256_192 (TPM_ALG_ID)(ALG_SHAKE256_192_VALUE) +#define ALG_SHAKE256_256_VALUE 0x002D +#define TPM_ALG_SHAKE256_256 (TPM_ALG_ID)(ALG_SHAKE256_256_VALUE) +#define ALG_SHAKE256_512_VALUE 0x002E +#define TPM_ALG_SHAKE256_512 (TPM_ALG_ID)(ALG_SHAKE256_512_VALUE) +#define ALG_CMAC_VALUE 0x003F +#define TPM_ALG_CMAC (TPM_ALG_ID)(ALG_CMAC_VALUE) +#define ALG_CTR_VALUE 0x0040 +#define TPM_ALG_CTR (TPM_ALG_ID)(ALG_CTR_VALUE) +#define ALG_OFB_VALUE 0x0041 +#define TPM_ALG_OFB (TPM_ALG_ID)(ALG_OFB_VALUE) +#define ALG_CBC_VALUE 0x0042 +#define TPM_ALG_CBC (TPM_ALG_ID)(ALG_CBC_VALUE) +#define ALG_CFB_VALUE 0x0043 +#define TPM_ALG_CFB (TPM_ALG_ID)(ALG_CFB_VALUE) +#define ALG_ECB_VALUE 0x0044 +#define TPM_ALG_ECB (TPM_ALG_ID)(ALG_ECB_VALUE) +#define ALG_CCM_VALUE 0x0050 +#define TPM_ALG_CCM (TPM_ALG_ID)(ALG_CCM_VALUE) +#define ALG_GCM_VALUE 0x0051 +#define TPM_ALG_GCM (TPM_ALG_ID)(ALG_GCM_VALUE) +#define ALG_KW_VALUE 0x0052 +#define TPM_ALG_KW (TPM_ALG_ID)(ALG_KW_VALUE) +#define ALG_KWP_VALUE 0x0053 +#define TPM_ALG_KWP (TPM_ALG_ID)(ALG_KWP_VALUE) +#define ALG_EAX_VALUE 0x0054 +#define TPM_ALG_EAX (TPM_ALG_ID)(ALG_EAX_VALUE) +#define ALG_EDDSA_VALUE 0x0060 +#define TPM_ALG_EDDSA (TPM_ALG_ID)(ALG_EDDSA_VALUE) +#define ALG_EDDSA_PH_VALUE 0x0061 +#define TPM_ALG_EDDSA_PH (TPM_ALG_ID)(ALG_EDDSA_PH_VALUE) +#define ALG_LMS_VALUE 0x0070 +#define TPM_ALG_LMS (TPM_ALG_ID)(ALG_LMS_VALUE) +#define ALG_XMSS_VALUE 0x0071 +#define TPM_ALG_XMSS (TPM_ALG_ID)(ALG_XMSS_VALUE) +// Values derived from Table "Definition of TPM_ALG_ID Constants" (Part 2: Structures) +#define ALG_FIRST_VALUE 0x0001 +#define TPM_ALG_FIRST (TPM_ALG_ID)(ALG_FIRST_VALUE) +#define ALG_LAST_VALUE 0x0071 +#define TPM_ALG_LAST (TPM_ALG_ID)(ALG_LAST_VALUE) + +// Table "Definition of TPM_ECC_CURVE Constants" (Part 2: Structures) +typedef UINT16 TPM_ECC_CURVE; + +#define TYPE_OF_TPM_ECC_CURVE UINT16 +#define TPM_ECC_NONE (TPM_ECC_CURVE)(0x0000) +#define TPM_ECC_NIST_P192 (TPM_ECC_CURVE)(0x0001) +#define TPM_ECC_NIST_P224 (TPM_ECC_CURVE)(0x0002) +#define TPM_ECC_NIST_P256 (TPM_ECC_CURVE)(0x0003) +#define TPM_ECC_NIST_P384 (TPM_ECC_CURVE)(0x0004) +#define TPM_ECC_NIST_P521 (TPM_ECC_CURVE)(0x0005) +#define TPM_ECC_BN_P256 (TPM_ECC_CURVE)(0x0010) +#define TPM_ECC_BN_P638 (TPM_ECC_CURVE)(0x0011) +#define TPM_ECC_SM2_P256 (TPM_ECC_CURVE)(0x0020) +#define TPM_ECC_BP_P256_R1 (TPM_ECC_CURVE)(0x0030) +#define TPM_ECC_BP_P384_R1 (TPM_ECC_CURVE)(0x0031) +#define TPM_ECC_BP_P512_R1 (TPM_ECC_CURVE)(0x0032) +#define TPM_ECC_CURVE_25519 (TPM_ECC_CURVE)(0x0040) +#define TPM_ECC_CURVE_448 (TPM_ECC_CURVE)(0x0041) + +// Table "Definition of TPM_CC Constants" (Part 2: Structures) +typedef UINT32 TPM_CC; + +#define TYPE_OF_TPM_CC UINT32 +#define TPM_CC_FIRST (TPM_CC)(0x0000011F) +#define TPM_CC_NV_UndefineSpaceSpecial (TPM_CC)(0x0000011F) +#define TPM_CC_EvictControl (TPM_CC)(0x00000120) +#define TPM_CC_HierarchyControl (TPM_CC)(0x00000121) +#define TPM_CC_NV_UndefineSpace (TPM_CC)(0x00000122) +#define TPM_CC_ChangeEPS (TPM_CC)(0x00000124) +#define TPM_CC_ChangePPS (TPM_CC)(0x00000125) +#define TPM_CC_Clear (TPM_CC)(0x00000126) +#define TPM_CC_ClearControl (TPM_CC)(0x00000127) +#define TPM_CC_ClockSet (TPM_CC)(0x00000128) +#define TPM_CC_HierarchyChangeAuth (TPM_CC)(0x00000129) +#define TPM_CC_NV_DefineSpace (TPM_CC)(0x0000012A) +#define TPM_CC_PCR_Allocate (TPM_CC)(0x0000012B) +#define TPM_CC_PCR_SetAuthPolicy (TPM_CC)(0x0000012C) +#define TPM_CC_PP_Commands (TPM_CC)(0x0000012D) +#define TPM_CC_SetPrimaryPolicy (TPM_CC)(0x0000012E) +#define TPM_CC_FieldUpgradeStart (TPM_CC)(0x0000012F) +#define TPM_CC_ClockRateAdjust (TPM_CC)(0x00000130) +#define TPM_CC_CreatePrimary (TPM_CC)(0x00000131) +#define TPM_CC_NV_GlobalWriteLock (TPM_CC)(0x00000132) +#define TPM_CC_GetCommandAuditDigest (TPM_CC)(0x00000133) +#define TPM_CC_NV_Increment (TPM_CC)(0x00000134) +#define TPM_CC_NV_SetBits (TPM_CC)(0x00000135) +#define TPM_CC_NV_Extend (TPM_CC)(0x00000136) +#define TPM_CC_NV_Write (TPM_CC)(0x00000137) +#define TPM_CC_NV_WriteLock (TPM_CC)(0x00000138) +#define TPM_CC_DictionaryAttackLockReset (TPM_CC)(0x00000139) +#define TPM_CC_DictionaryAttackParameters (TPM_CC)(0x0000013A) +#define TPM_CC_NV_ChangeAuth (TPM_CC)(0x0000013B) +#define TPM_CC_PCR_Event (TPM_CC)(0x0000013C) +#define TPM_CC_PCR_Reset (TPM_CC)(0x0000013D) +#define TPM_CC_SequenceComplete (TPM_CC)(0x0000013E) +#define TPM_CC_SetAlgorithmSet (TPM_CC)(0x0000013F) +#define TPM_CC_SetCommandCodeAuditStatus (TPM_CC)(0x00000140) +#define TPM_CC_FieldUpgradeData (TPM_CC)(0x00000141) +#define TPM_CC_IncrementalSelfTest (TPM_CC)(0x00000142) +#define TPM_CC_SelfTest (TPM_CC)(0x00000143) +#define TPM_CC_Startup (TPM_CC)(0x00000144) +#define TPM_CC_Shutdown (TPM_CC)(0x00000145) +#define TPM_CC_StirRandom (TPM_CC)(0x00000146) +#define TPM_CC_ActivateCredential (TPM_CC)(0x00000147) +#define TPM_CC_Certify (TPM_CC)(0x00000148) +#define TPM_CC_PolicyNV (TPM_CC)(0x00000149) +#define TPM_CC_CertifyCreation (TPM_CC)(0x0000014A) +#define TPM_CC_Duplicate (TPM_CC)(0x0000014B) +#define TPM_CC_GetTime (TPM_CC)(0x0000014C) +#define TPM_CC_GetSessionAuditDigest (TPM_CC)(0x0000014D) +#define TPM_CC_NV_Read (TPM_CC)(0x0000014E) +#define TPM_CC_NV_ReadLock (TPM_CC)(0x0000014F) +#define TPM_CC_ObjectChangeAuth (TPM_CC)(0x00000150) +#define TPM_CC_PolicySecret (TPM_CC)(0x00000151) +#define TPM_CC_Rewrap (TPM_CC)(0x00000152) +#define TPM_CC_Create (TPM_CC)(0x00000153) +#define TPM_CC_ECDH_ZGen (TPM_CC)(0x00000154) +#define TPM_CC_HMAC (TPM_CC)(0x00000155) +#define TPM_CC_MAC (TPM_CC)(0x00000155) +#define TPM_CC_Import (TPM_CC)(0x00000156) +#define TPM_CC_Load (TPM_CC)(0x00000157) +#define TPM_CC_Quote (TPM_CC)(0x00000158) +#define TPM_CC_RSA_Decrypt (TPM_CC)(0x00000159) +#define TPM_CC_HMAC_Start (TPM_CC)(0x0000015B) +#define TPM_CC_MAC_Start (TPM_CC)(0x0000015B) +#define TPM_CC_SequenceUpdate (TPM_CC)(0x0000015C) +#define TPM_CC_Sign (TPM_CC)(0x0000015D) +#define TPM_CC_Unseal (TPM_CC)(0x0000015E) +#define TPM_CC_PolicySigned (TPM_CC)(0x00000160) +#define TPM_CC_ContextLoad (TPM_CC)(0x00000161) +#define TPM_CC_ContextSave (TPM_CC)(0x00000162) +#define TPM_CC_ECDH_KeyGen (TPM_CC)(0x00000163) +#define TPM_CC_EncryptDecrypt (TPM_CC)(0x00000164) +#define TPM_CC_FlushContext (TPM_CC)(0x00000165) +#define TPM_CC_LoadExternal (TPM_CC)(0x00000167) +#define TPM_CC_MakeCredential (TPM_CC)(0x00000168) +#define TPM_CC_NV_ReadPublic (TPM_CC)(0x00000169) +#define TPM_CC_PolicyAuthorize (TPM_CC)(0x0000016A) +#define TPM_CC_PolicyAuthValue (TPM_CC)(0x0000016B) +#define TPM_CC_PolicyCommandCode (TPM_CC)(0x0000016C) +#define TPM_CC_PolicyCounterTimer (TPM_CC)(0x0000016D) +#define TPM_CC_PolicyCpHash (TPM_CC)(0x0000016E) +#define TPM_CC_PolicyLocality (TPM_CC)(0x0000016F) +#define TPM_CC_PolicyNameHash (TPM_CC)(0x00000170) +#define TPM_CC_PolicyOR (TPM_CC)(0x00000171) +#define TPM_CC_PolicyTicket (TPM_CC)(0x00000172) +#define TPM_CC_ReadPublic (TPM_CC)(0x00000173) +#define TPM_CC_RSA_Encrypt (TPM_CC)(0x00000174) +#define TPM_CC_StartAuthSession (TPM_CC)(0x00000176) +#define TPM_CC_VerifySignature (TPM_CC)(0x00000177) +#define TPM_CC_ECC_Parameters (TPM_CC)(0x00000178) +#define TPM_CC_FirmwareRead (TPM_CC)(0x00000179) +#define TPM_CC_GetCapability (TPM_CC)(0x0000017A) +#define TPM_CC_GetRandom (TPM_CC)(0x0000017B) +#define TPM_CC_GetTestResult (TPM_CC)(0x0000017C) +#define TPM_CC_Hash (TPM_CC)(0x0000017D) +#define TPM_CC_PCR_Read (TPM_CC)(0x0000017E) +#define TPM_CC_PolicyPCR (TPM_CC)(0x0000017F) +#define TPM_CC_PolicyRestart (TPM_CC)(0x00000180) +#define TPM_CC_ReadClock (TPM_CC)(0x00000181) +#define TPM_CC_PCR_Extend (TPM_CC)(0x00000182) +#define TPM_CC_PCR_SetAuthValue (TPM_CC)(0x00000183) +#define TPM_CC_NV_Certify (TPM_CC)(0x00000184) +#define TPM_CC_EventSequenceComplete (TPM_CC)(0x00000185) +#define TPM_CC_HashSequenceStart (TPM_CC)(0x00000186) +#define TPM_CC_PolicyPhysicalPresence (TPM_CC)(0x00000187) +#define TPM_CC_PolicyDuplicationSelect (TPM_CC)(0x00000188) +#define TPM_CC_PolicyGetDigest (TPM_CC)(0x00000189) +#define TPM_CC_TestParms (TPM_CC)(0x0000018A) +#define TPM_CC_Commit (TPM_CC)(0x0000018B) +#define TPM_CC_PolicyPassword (TPM_CC)(0x0000018C) +#define TPM_CC_ZGen_2Phase (TPM_CC)(0x0000018D) +#define TPM_CC_EC_Ephemeral (TPM_CC)(0x0000018E) +#define TPM_CC_PolicyNvWritten (TPM_CC)(0x0000018F) +#define TPM_CC_PolicyTemplate (TPM_CC)(0x00000190) +#define TPM_CC_CreateLoaded (TPM_CC)(0x00000191) +#define TPM_CC_PolicyAuthorizeNV (TPM_CC)(0x00000192) +#define TPM_CC_EncryptDecrypt2 (TPM_CC)(0x00000193) +#define TPM_CC_AC_GetCapability (TPM_CC)(0x00000194) +#define TPM_CC_AC_Send (TPM_CC)(0x00000195) +#define TPM_CC_Policy_AC_SendSelect (TPM_CC)(0x00000196) +#define TPM_CC_CertifyX509 (TPM_CC)(0x00000197) +#define TPM_CC_ACT_SetTimeout (TPM_CC)(0x00000198) +#define TPM_CC_ECC_Encrypt (TPM_CC)(0x00000199) +#define TPM_CC_ECC_Decrypt (TPM_CC)(0x0000019A) +#define TPM_CC_PolicyCapability (TPM_CC)(0x0000019B) +#define TPM_CC_PolicyParameters (TPM_CC)(0x0000019C) +#define TPM_CC_NV_DefineSpace2 (TPM_CC)(0x0000019D) +#define TPM_CC_NV_ReadPublic2 (TPM_CC)(0x0000019E) +#define TPM_CC_SetCapability (TPM_CC)(0x0000019F) +#define TPM_CC_LAST (TPM_CC)(0x0000019F) +#define CC_VEND (TPM_CC)(0x20000000) +#define TPM_CC_Vendor_TCG_Test (TPM_CC)(0x20000000) + +// This large macro is needed to determine the maximum commandIndex. This value +// is needed in order to size typdef'ed structures. As a consequence, the +// computation cannot be deferred until the command array is instanced and +// so that the number of entires can be determine by +// sizeof(array)/sizeof(entry). +// +// Size the array of library commands based on whether or not the array is +// packed (only defined commands) or dense +// (having entries for unimplemented commands). This overly large macro +// computes the size of the array and sets some global constants +#if COMPRESSED_LISTS +# define ADD_FILL 0 +#else +# define ADD_FILL 1 +#endif +#define LIBRARY_COMMAND_ARRAY_SIZE \ + (0 + (ADD_FILL || CC_NV_UndefineSpaceSpecial) /* 0x0000011F */ \ + + (ADD_FILL || CC_EvictControl) /* 0x00000120 */ \ + + (ADD_FILL || CC_HierarchyControl) /* 0x00000121 */ \ + + (ADD_FILL || CC_NV_UndefineSpace) /* 0x00000122 */ \ + + ADD_FILL /* 0x00000123 */ \ + + (ADD_FILL || CC_ChangeEPS) /* 0x00000124 */ \ + + (ADD_FILL || CC_ChangePPS) /* 0x00000125 */ \ + + (ADD_FILL || CC_Clear) /* 0x00000126 */ \ + + (ADD_FILL || CC_ClearControl) /* 0x00000127 */ \ + + (ADD_FILL || CC_ClockSet) /* 0x00000128 */ \ + + (ADD_FILL || CC_HierarchyChangeAuth) /* 0x00000129 */ \ + + (ADD_FILL || CC_NV_DefineSpace) /* 0x0000012A */ \ + + (ADD_FILL || CC_PCR_Allocate) /* 0x0000012B */ \ + + (ADD_FILL || CC_PCR_SetAuthPolicy) /* 0x0000012C */ \ + + (ADD_FILL || CC_PP_Commands) /* 0x0000012D */ \ + + (ADD_FILL || CC_SetPrimaryPolicy) /* 0x0000012E */ \ + + (ADD_FILL || CC_FieldUpgradeStart) /* 0x0000012F */ \ + + (ADD_FILL || CC_ClockRateAdjust) /* 0x00000130 */ \ + + (ADD_FILL || CC_CreatePrimary) /* 0x00000131 */ \ + + (ADD_FILL || CC_NV_GlobalWriteLock) /* 0x00000132 */ \ + + (ADD_FILL || CC_GetCommandAuditDigest) /* 0x00000133 */ \ + + (ADD_FILL || CC_NV_Increment) /* 0x00000134 */ \ + + (ADD_FILL || CC_NV_SetBits) /* 0x00000135 */ \ + + (ADD_FILL || CC_NV_Extend) /* 0x00000136 */ \ + + (ADD_FILL || CC_NV_Write) /* 0x00000137 */ \ + + (ADD_FILL || CC_NV_WriteLock) /* 0x00000138 */ \ + + (ADD_FILL || CC_DictionaryAttackLockReset) /* 0x00000139 */ \ + + (ADD_FILL || CC_DictionaryAttackParameters) /* 0x0000013A */ \ + + (ADD_FILL || CC_NV_ChangeAuth) /* 0x0000013B */ \ + + (ADD_FILL || CC_PCR_Event) /* 0x0000013C */ \ + + (ADD_FILL || CC_PCR_Reset) /* 0x0000013D */ \ + + (ADD_FILL || CC_SequenceComplete) /* 0x0000013E */ \ + + (ADD_FILL || CC_SetAlgorithmSet) /* 0x0000013F */ \ + + (ADD_FILL || CC_SetCommandCodeAuditStatus) /* 0x00000140 */ \ + + (ADD_FILL || CC_FieldUpgradeData) /* 0x00000141 */ \ + + (ADD_FILL || CC_IncrementalSelfTest) /* 0x00000142 */ \ + + (ADD_FILL || CC_SelfTest) /* 0x00000143 */ \ + + (ADD_FILL || CC_Startup) /* 0x00000144 */ \ + + (ADD_FILL || CC_Shutdown) /* 0x00000145 */ \ + + (ADD_FILL || CC_StirRandom) /* 0x00000146 */ \ + + (ADD_FILL || CC_ActivateCredential) /* 0x00000147 */ \ + + (ADD_FILL || CC_Certify) /* 0x00000148 */ \ + + (ADD_FILL || CC_PolicyNV) /* 0x00000149 */ \ + + (ADD_FILL || CC_CertifyCreation) /* 0x0000014A */ \ + + (ADD_FILL || CC_Duplicate) /* 0x0000014B */ \ + + (ADD_FILL || CC_GetTime) /* 0x0000014C */ \ + + (ADD_FILL || CC_GetSessionAuditDigest) /* 0x0000014D */ \ + + (ADD_FILL || CC_NV_Read) /* 0x0000014E */ \ + + (ADD_FILL || CC_NV_ReadLock) /* 0x0000014F */ \ + + (ADD_FILL || CC_ObjectChangeAuth) /* 0x00000150 */ \ + + (ADD_FILL || CC_PolicySecret) /* 0x00000151 */ \ + + (ADD_FILL || CC_Rewrap) /* 0x00000152 */ \ + + (ADD_FILL || CC_Create) /* 0x00000153 */ \ + + (ADD_FILL || CC_ECDH_ZGen) /* 0x00000154 */ \ + + (ADD_FILL || (CC_HMAC || CC_MAC)) /* 0x00000155 */ \ + + (ADD_FILL || CC_Import) /* 0x00000156 */ \ + + (ADD_FILL || CC_Load) /* 0x00000157 */ \ + + (ADD_FILL || CC_Quote) /* 0x00000158 */ \ + + (ADD_FILL || CC_RSA_Decrypt) /* 0x00000159 */ \ + + ADD_FILL /* 0x0000015A */ \ + + (ADD_FILL || (CC_HMAC_Start || CC_MAC_Start)) /* 0x0000015B */ \ + + (ADD_FILL || CC_SequenceUpdate) /* 0x0000015C */ \ + + (ADD_FILL || CC_Sign) /* 0x0000015D */ \ + + (ADD_FILL || CC_Unseal) /* 0x0000015E */ \ + + ADD_FILL /* 0x0000015F */ \ + + (ADD_FILL || CC_PolicySigned) /* 0x00000160 */ \ + + (ADD_FILL || CC_ContextLoad) /* 0x00000161 */ \ + + (ADD_FILL || CC_ContextSave) /* 0x00000162 */ \ + + (ADD_FILL || CC_ECDH_KeyGen) /* 0x00000163 */ \ + + (ADD_FILL || CC_EncryptDecrypt) /* 0x00000164 */ \ + + (ADD_FILL || CC_FlushContext) /* 0x00000165 */ \ + + ADD_FILL /* 0x00000166 */ \ + + (ADD_FILL || CC_LoadExternal) /* 0x00000167 */ \ + + (ADD_FILL || CC_MakeCredential) /* 0x00000168 */ \ + + (ADD_FILL || CC_NV_ReadPublic) /* 0x00000169 */ \ + + (ADD_FILL || CC_PolicyAuthorize) /* 0x0000016A */ \ + + (ADD_FILL || CC_PolicyAuthValue) /* 0x0000016B */ \ + + (ADD_FILL || CC_PolicyCommandCode) /* 0x0000016C */ \ + + (ADD_FILL || CC_PolicyCounterTimer) /* 0x0000016D */ \ + + (ADD_FILL || CC_PolicyCpHash) /* 0x0000016E */ \ + + (ADD_FILL || CC_PolicyLocality) /* 0x0000016F */ \ + + (ADD_FILL || CC_PolicyNameHash) /* 0x00000170 */ \ + + (ADD_FILL || CC_PolicyOR) /* 0x00000171 */ \ + + (ADD_FILL || CC_PolicyTicket) /* 0x00000172 */ \ + + (ADD_FILL || CC_ReadPublic) /* 0x00000173 */ \ + + (ADD_FILL || CC_RSA_Encrypt) /* 0x00000174 */ \ + + ADD_FILL /* 0x00000175 */ \ + + (ADD_FILL || CC_StartAuthSession) /* 0x00000176 */ \ + + (ADD_FILL || CC_VerifySignature) /* 0x00000177 */ \ + + (ADD_FILL || CC_ECC_Parameters) /* 0x00000178 */ \ + + (ADD_FILL || CC_FirmwareRead) /* 0x00000179 */ \ + + (ADD_FILL || CC_GetCapability) /* 0x0000017A */ \ + + (ADD_FILL || CC_GetRandom) /* 0x0000017B */ \ + + (ADD_FILL || CC_GetTestResult) /* 0x0000017C */ \ + + (ADD_FILL || CC_Hash) /* 0x0000017D */ \ + + (ADD_FILL || CC_PCR_Read) /* 0x0000017E */ \ + + (ADD_FILL || CC_PolicyPCR) /* 0x0000017F */ \ + + (ADD_FILL || CC_PolicyRestart) /* 0x00000180 */ \ + + (ADD_FILL || CC_ReadClock) /* 0x00000181 */ \ + + (ADD_FILL || CC_PCR_Extend) /* 0x00000182 */ \ + + (ADD_FILL || CC_PCR_SetAuthValue) /* 0x00000183 */ \ + + (ADD_FILL || CC_NV_Certify) /* 0x00000184 */ \ + + (ADD_FILL || CC_EventSequenceComplete) /* 0x00000185 */ \ + + (ADD_FILL || CC_HashSequenceStart) /* 0x00000186 */ \ + + (ADD_FILL || CC_PolicyPhysicalPresence) /* 0x00000187 */ \ + + (ADD_FILL || CC_PolicyDuplicationSelect) /* 0x00000188 */ \ + + (ADD_FILL || CC_PolicyGetDigest) /* 0x00000189 */ \ + + (ADD_FILL || CC_TestParms) /* 0x0000018A */ \ + + (ADD_FILL || CC_Commit) /* 0x0000018B */ \ + + (ADD_FILL || CC_PolicyPassword) /* 0x0000018C */ \ + + (ADD_FILL || CC_ZGen_2Phase) /* 0x0000018D */ \ + + (ADD_FILL || CC_EC_Ephemeral) /* 0x0000018E */ \ + + (ADD_FILL || CC_PolicyNvWritten) /* 0x0000018F */ \ + + (ADD_FILL || CC_PolicyTemplate) /* 0x00000190 */ \ + + (ADD_FILL || CC_CreateLoaded) /* 0x00000191 */ \ + + (ADD_FILL || CC_PolicyAuthorizeNV) /* 0x00000192 */ \ + + (ADD_FILL || CC_EncryptDecrypt2) /* 0x00000193 */ \ + + (ADD_FILL || CC_AC_GetCapability) /* 0x00000194 */ \ + + (ADD_FILL || CC_AC_Send) /* 0x00000195 */ \ + + (ADD_FILL || CC_Policy_AC_SendSelect) /* 0x00000196 */ \ + + (ADD_FILL || CC_CertifyX509) /* 0x00000197 */ \ + + (ADD_FILL || CC_ACT_SetTimeout) /* 0x00000198 */ \ + + (ADD_FILL || CC_ECC_Encrypt) /* 0x00000199 */ \ + + (ADD_FILL || CC_ECC_Decrypt) /* 0x0000019A */ \ + + (ADD_FILL || CC_PolicyCapability) /* 0x0000019B */ \ + + (ADD_FILL || CC_PolicyParameters) /* 0x0000019C */ \ + + (ADD_FILL || CC_NV_DefineSpace2) /* 0x0000019D */ \ + + (ADD_FILL || CC_NV_ReadPublic2) /* 0x0000019E */ \ + + (ADD_FILL || CC_SetCapability) /* 0x0000019F */ \ + ) +#define VENDOR_COMMAND_ARRAY_SIZE (CC_Vendor_TCG_Test) +#define COMMAND_COUNT (LIBRARY_COMMAND_ARRAY_SIZE + VENDOR_COMMAND_ARRAY_SIZE) + +// Table "Definition of TPM_RC Constants" (Part 2: Structures) +typedef UINT32 TPM_RC; +#define TYPE_OF_TPM_RC UINT32 +#define TPM_RC_SUCCESS (TPM_RC)(0x000) +#define TPM_RC_BAD_TAG (TPM_RC)(0x01E) +#define RC_VER1 (TPM_RC)(0x100) +#define TPM_RC_INITIALIZE (TPM_RC)(RC_VER1 + 0x000) +#define TPM_RC_FAILURE (TPM_RC)(RC_VER1 + 0x001) +#define TPM_RC_SEQUENCE (TPM_RC)(RC_VER1 + 0x003) +#define TPM_RC_PRIVATE (TPM_RC)(RC_VER1 + 0x00B) +#define TPM_RC_HMAC (TPM_RC)(RC_VER1 + 0x019) +#define TPM_RC_DISABLED (TPM_RC)(RC_VER1 + 0x020) +#define TPM_RC_EXCLUSIVE (TPM_RC)(RC_VER1 + 0x021) +#define TPM_RC_AUTH_TYPE (TPM_RC)(RC_VER1 + 0x024) +#define TPM_RC_AUTH_MISSING (TPM_RC)(RC_VER1 + 0x025) +#define TPM_RC_POLICY (TPM_RC)(RC_VER1 + 0x026) +#define TPM_RC_PCR (TPM_RC)(RC_VER1 + 0x027) +#define TPM_RC_PCR_CHANGED (TPM_RC)(RC_VER1 + 0x028) +#define TPM_RC_UPGRADE (TPM_RC)(RC_VER1 + 0x02D) +#define TPM_RC_TOO_MANY_CONTEXTS (TPM_RC)(RC_VER1 + 0x02E) +#define TPM_RC_AUTH_UNAVAILABLE (TPM_RC)(RC_VER1 + 0x02F) +#define TPM_RC_REBOOT (TPM_RC)(RC_VER1 + 0x030) +#define TPM_RC_UNBALANCED (TPM_RC)(RC_VER1 + 0x031) +#define TPM_RC_COMMAND_SIZE (TPM_RC)(RC_VER1 + 0x042) +#define TPM_RC_COMMAND_CODE (TPM_RC)(RC_VER1 + 0x043) +#define TPM_RC_AUTHSIZE (TPM_RC)(RC_VER1 + 0x044) +#define TPM_RC_AUTH_CONTEXT (TPM_RC)(RC_VER1 + 0x045) +#define TPM_RC_NV_RANGE (TPM_RC)(RC_VER1 + 0x046) +#define TPM_RC_NV_SIZE (TPM_RC)(RC_VER1 + 0x047) +#define TPM_RC_NV_LOCKED (TPM_RC)(RC_VER1 + 0x048) +#define TPM_RC_NV_AUTHORIZATION (TPM_RC)(RC_VER1 + 0x049) +#define TPM_RC_NV_UNINITIALIZED (TPM_RC)(RC_VER1 + 0x04A) +#define TPM_RC_NV_SPACE (TPM_RC)(RC_VER1 + 0x04B) +#define TPM_RC_NV_DEFINED (TPM_RC)(RC_VER1 + 0x04C) +#define TPM_RC_BAD_CONTEXT (TPM_RC)(RC_VER1 + 0x050) +#define TPM_RC_CPHASH (TPM_RC)(RC_VER1 + 0x051) +#define TPM_RC_PARENT (TPM_RC)(RC_VER1 + 0x052) +#define TPM_RC_NEEDS_TEST (TPM_RC)(RC_VER1 + 0x053) +#define TPM_RC_NO_RESULT (TPM_RC)(RC_VER1 + 0x054) +#define TPM_RC_SENSITIVE (TPM_RC)(RC_VER1 + 0x055) +#define RC_MAX_FM0 (TPM_RC)(RC_VER1 + 0x07F) +#define RC_FMT1 (TPM_RC)(0x080) +#define TPM_RC_ASYMMETRIC (TPM_RC)(RC_FMT1 + 0x001) +#define TPM_RCS_ASYMMETRIC (TPM_RC)(RC_FMT1 + 0x001) +#define TPM_RC_ATTRIBUTES (TPM_RC)(RC_FMT1 + 0x002) +#define TPM_RCS_ATTRIBUTES (TPM_RC)(RC_FMT1 + 0x002) +#define TPM_RC_HASH (TPM_RC)(RC_FMT1 + 0x003) +#define TPM_RCS_HASH (TPM_RC)(RC_FMT1 + 0x003) +#define TPM_RC_VALUE (TPM_RC)(RC_FMT1 + 0x004) +#define TPM_RCS_VALUE (TPM_RC)(RC_FMT1 + 0x004) +#define TPM_RC_HIERARCHY (TPM_RC)(RC_FMT1 + 0x005) +#define TPM_RCS_HIERARCHY (TPM_RC)(RC_FMT1 + 0x005) +#define TPM_RC_KEY_SIZE (TPM_RC)(RC_FMT1 + 0x007) +#define TPM_RCS_KEY_SIZE (TPM_RC)(RC_FMT1 + 0x007) +#define TPM_RC_MGF (TPM_RC)(RC_FMT1 + 0x008) +#define TPM_RCS_MGF (TPM_RC)(RC_FMT1 + 0x008) +#define TPM_RC_MODE (TPM_RC)(RC_FMT1 + 0x009) +#define TPM_RCS_MODE (TPM_RC)(RC_FMT1 + 0x009) +#define TPM_RC_TYPE (TPM_RC)(RC_FMT1 + 0x00A) +#define TPM_RCS_TYPE (TPM_RC)(RC_FMT1 + 0x00A) +#define TPM_RC_HANDLE (TPM_RC)(RC_FMT1 + 0x00B) +#define TPM_RCS_HANDLE (TPM_RC)(RC_FMT1 + 0x00B) +#define TPM_RC_KDF (TPM_RC)(RC_FMT1 + 0x00C) +#define TPM_RCS_KDF (TPM_RC)(RC_FMT1 + 0x00C) +#define TPM_RC_RANGE (TPM_RC)(RC_FMT1 + 0x00D) +#define TPM_RCS_RANGE (TPM_RC)(RC_FMT1 + 0x00D) +#define TPM_RC_AUTH_FAIL (TPM_RC)(RC_FMT1 + 0x00E) +#define TPM_RCS_AUTH_FAIL (TPM_RC)(RC_FMT1 + 0x00E) +#define TPM_RC_NONCE (TPM_RC)(RC_FMT1 + 0x00F) +#define TPM_RCS_NONCE (TPM_RC)(RC_FMT1 + 0x00F) +#define TPM_RC_PP (TPM_RC)(RC_FMT1 + 0x010) +#define TPM_RCS_PP (TPM_RC)(RC_FMT1 + 0x010) +#define TPM_RC_SCHEME (TPM_RC)(RC_FMT1 + 0x012) +#define TPM_RCS_SCHEME (TPM_RC)(RC_FMT1 + 0x012) +#define TPM_RC_SIZE (TPM_RC)(RC_FMT1 + 0x015) +#define TPM_RCS_SIZE (TPM_RC)(RC_FMT1 + 0x015) +#define TPM_RC_SYMMETRIC (TPM_RC)(RC_FMT1 + 0x016) +#define TPM_RCS_SYMMETRIC (TPM_RC)(RC_FMT1 + 0x016) +#define TPM_RC_TAG (TPM_RC)(RC_FMT1 + 0x017) +#define TPM_RCS_TAG (TPM_RC)(RC_FMT1 + 0x017) +#define TPM_RC_SELECTOR (TPM_RC)(RC_FMT1 + 0x018) +#define TPM_RCS_SELECTOR (TPM_RC)(RC_FMT1 + 0x018) +#define TPM_RC_INSUFFICIENT (TPM_RC)(RC_FMT1 + 0x01A) +#define TPM_RCS_INSUFFICIENT (TPM_RC)(RC_FMT1 + 0x01A) +#define TPM_RC_SIGNATURE (TPM_RC)(RC_FMT1 + 0x01B) +#define TPM_RCS_SIGNATURE (TPM_RC)(RC_FMT1 + 0x01B) +#define TPM_RC_KEY (TPM_RC)(RC_FMT1 + 0x01C) +#define TPM_RCS_KEY (TPM_RC)(RC_FMT1 + 0x01C) +#define TPM_RC_POLICY_FAIL (TPM_RC)(RC_FMT1 + 0x01D) +#define TPM_RCS_POLICY_FAIL (TPM_RC)(RC_FMT1 + 0x01D) +#define TPM_RC_INTEGRITY (TPM_RC)(RC_FMT1 + 0x01F) +#define TPM_RCS_INTEGRITY (TPM_RC)(RC_FMT1 + 0x01F) +#define TPM_RC_TICKET (TPM_RC)(RC_FMT1 + 0x020) +#define TPM_RCS_TICKET (TPM_RC)(RC_FMT1 + 0x020) +#define TPM_RC_RESERVED_BITS (TPM_RC)(RC_FMT1 + 0x021) +#define TPM_RCS_RESERVED_BITS (TPM_RC)(RC_FMT1 + 0x021) +#define TPM_RC_BAD_AUTH (TPM_RC)(RC_FMT1 + 0x022) +#define TPM_RCS_BAD_AUTH (TPM_RC)(RC_FMT1 + 0x022) +#define TPM_RC_EXPIRED (TPM_RC)(RC_FMT1 + 0x023) +#define TPM_RCS_EXPIRED (TPM_RC)(RC_FMT1 + 0x023) +#define TPM_RC_POLICY_CC (TPM_RC)(RC_FMT1 + 0x024) +#define TPM_RCS_POLICY_CC (TPM_RC)(RC_FMT1 + 0x024) +#define TPM_RC_BINDING (TPM_RC)(RC_FMT1 + 0x025) +#define TPM_RCS_BINDING (TPM_RC)(RC_FMT1 + 0x025) +#define TPM_RC_CURVE (TPM_RC)(RC_FMT1 + 0x026) +#define TPM_RCS_CURVE (TPM_RC)(RC_FMT1 + 0x026) +#define TPM_RC_ECC_POINT (TPM_RC)(RC_FMT1 + 0x027) +#define TPM_RCS_ECC_POINT (TPM_RC)(RC_FMT1 + 0x027) +#define TPM_RC_FW_LIMITED (TPM_RC)(RC_FMT1 + 0x028) +#define TPM_RC_SVN_LIMITED (TPM_RC)(RC_FMT1 + 0x029) +#define RC_WARN (TPM_RC)(0x900) +#define TPM_RC_CONTEXT_GAP (TPM_RC)(RC_WARN + 0x001) +#define TPM_RC_OBJECT_MEMORY (TPM_RC)(RC_WARN + 0x002) +#define TPM_RC_SESSION_MEMORY (TPM_RC)(RC_WARN + 0x003) +#define TPM_RC_MEMORY (TPM_RC)(RC_WARN + 0x004) +#define TPM_RC_SESSION_HANDLES (TPM_RC)(RC_WARN + 0x005) +#define TPM_RC_OBJECT_HANDLES (TPM_RC)(RC_WARN + 0x006) +#define TPM_RC_LOCALITY (TPM_RC)(RC_WARN + 0x007) +#define TPM_RC_YIELDED (TPM_RC)(RC_WARN + 0x008) +#define TPM_RC_CANCELED (TPM_RC)(RC_WARN + 0x009) +#define TPM_RC_TESTING (TPM_RC)(RC_WARN + 0x00A) +#define TPM_RC_REFERENCE_H0 (TPM_RC)(RC_WARN + 0x010) +#define TPM_RC_REFERENCE_H1 (TPM_RC)(RC_WARN + 0x011) +#define TPM_RC_REFERENCE_H2 (TPM_RC)(RC_WARN + 0x012) +#define TPM_RC_REFERENCE_H3 (TPM_RC)(RC_WARN + 0x013) +#define TPM_RC_REFERENCE_H4 (TPM_RC)(RC_WARN + 0x014) +#define TPM_RC_REFERENCE_H5 (TPM_RC)(RC_WARN + 0x015) +#define TPM_RC_REFERENCE_H6 (TPM_RC)(RC_WARN + 0x016) +#define TPM_RC_REFERENCE_S0 (TPM_RC)(RC_WARN + 0x018) +#define TPM_RC_REFERENCE_S1 (TPM_RC)(RC_WARN + 0x019) +#define TPM_RC_REFERENCE_S2 (TPM_RC)(RC_WARN + 0x01A) +#define TPM_RC_REFERENCE_S3 (TPM_RC)(RC_WARN + 0x01B) +#define TPM_RC_REFERENCE_S4 (TPM_RC)(RC_WARN + 0x01C) +#define TPM_RC_REFERENCE_S5 (TPM_RC)(RC_WARN + 0x01D) +#define TPM_RC_REFERENCE_S6 (TPM_RC)(RC_WARN + 0x01E) +#define TPM_RC_NV_RATE (TPM_RC)(RC_WARN + 0x020) +#define TPM_RC_LOCKOUT (TPM_RC)(RC_WARN + 0x021) +#define TPM_RC_RETRY (TPM_RC)(RC_WARN + 0x022) +#define TPM_RC_NV_UNAVAILABLE (TPM_RC)(RC_WARN + 0x023) +#define TPM_RC_NOT_USED (TPM_RC)(RC_WARN + 0x7F) +#define TPM_RC_H (TPM_RC)(0x000) +#define TPM_RC_P (TPM_RC)(0x040) +#define TPM_RC_S (TPM_RC)(0x800) +#define TPM_RC_1 (TPM_RC)(0x100) +#define TPM_RC_2 (TPM_RC)(0x200) +#define TPM_RC_3 (TPM_RC)(0x300) +#define TPM_RC_4 (TPM_RC)(0x400) +#define TPM_RC_5 (TPM_RC)(0x500) +#define TPM_RC_6 (TPM_RC)(0x600) +#define TPM_RC_7 (TPM_RC)(0x700) +#define TPM_RC_8 (TPM_RC)(0x800) +#define TPM_RC_9 (TPM_RC)(0x900) +#define TPM_RC_A (TPM_RC)(0xA00) +#define TPM_RC_B (TPM_RC)(0xB00) +#define TPM_RC_C (TPM_RC)(0xC00) +#define TPM_RC_D (TPM_RC)(0xD00) +#define TPM_RC_E (TPM_RC)(0xE00) +#define TPM_RC_F (TPM_RC)(0xF00) +#define TPM_RC_N_MASK (TPM_RC)(0xF00) + +// Table "Definition of TPM_CLOCK_ADJUST Constants" (Part 2: Structures) +typedef INT8 TPM_CLOCK_ADJUST; +#define TYPE_OF_TPM_CLOCK_ADJUST INT8 +#define TPM_CLOCK_COARSE_SLOWER (TPM_CLOCK_ADJUST)(-3) +#define TPM_CLOCK_MEDIUM_SLOWER (TPM_CLOCK_ADJUST)(-2) +#define TPM_CLOCK_FINE_SLOWER (TPM_CLOCK_ADJUST)(-1) +#define TPM_CLOCK_NO_CHANGE (TPM_CLOCK_ADJUST)(0) +#define TPM_CLOCK_FINE_FASTER (TPM_CLOCK_ADJUST)(1) +#define TPM_CLOCK_MEDIUM_FASTER (TPM_CLOCK_ADJUST)(2) +#define TPM_CLOCK_COARSE_FASTER (TPM_CLOCK_ADJUST)(3) + +// Table "Definition of TPM_EO Constants" (Part 2: Structures) +typedef UINT16 TPM_EO; +#define TYPE_OF_TPM_EO UINT16 +#define TPM_EO_EQ (TPM_EO)(0x0000) +#define TPM_EO_NEQ (TPM_EO)(0x0001) +#define TPM_EO_SIGNED_GT (TPM_EO)(0x0002) +#define TPM_EO_UNSIGNED_GT (TPM_EO)(0x0003) +#define TPM_EO_SIGNED_LT (TPM_EO)(0x0004) +#define TPM_EO_UNSIGNED_LT (TPM_EO)(0x0005) +#define TPM_EO_SIGNED_GE (TPM_EO)(0x0006) +#define TPM_EO_UNSIGNED_GE (TPM_EO)(0x0007) +#define TPM_EO_SIGNED_LE (TPM_EO)(0x0008) +#define TPM_EO_UNSIGNED_LE (TPM_EO)(0x0009) +#define TPM_EO_BITSET (TPM_EO)(0x000A) +#define TPM_EO_BITCLEAR (TPM_EO)(0x000B) + +// Table "Definition of TPM_ST Constants" (Part 2: Structures) +typedef UINT16 TPM_ST; +#define TYPE_OF_TPM_ST UINT16 +#define TPM_ST_RSP_COMMAND (TPM_ST)(0x00C4) +#define TPM_ST_NULL (TPM_ST)(0x8000) +#define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001) +#define TPM_ST_SESSIONS (TPM_ST)(0x8002) +#define TPM_ST_ATTEST_NV (TPM_ST)(0x8014) +#define TPM_ST_ATTEST_COMMAND_AUDIT (TPM_ST)(0x8015) +#define TPM_ST_ATTEST_SESSION_AUDIT (TPM_ST)(0x8016) +#define TPM_ST_ATTEST_CERTIFY (TPM_ST)(0x8017) +#define TPM_ST_ATTEST_QUOTE (TPM_ST)(0x8018) +#define TPM_ST_ATTEST_TIME (TPM_ST)(0x8019) +#define TPM_ST_ATTEST_CREATION (TPM_ST)(0x801A) +#define TPM_ST_ATTEST_NV_DIGEST (TPM_ST)(0x801C) +#define TPM_ST_CREATION (TPM_ST)(0x8021) +#define TPM_ST_VERIFIED (TPM_ST)(0x8022) +#define TPM_ST_AUTH_SECRET (TPM_ST)(0x8023) +#define TPM_ST_HASHCHECK (TPM_ST)(0x8024) +#define TPM_ST_AUTH_SIGNED (TPM_ST)(0x8025) +#define TPM_ST_FU_MANIFEST (TPM_ST)(0x8029) + +// Table "Definition of TPM_SU Constants" (Part 2: Structures) +typedef UINT16 TPM_SU; +#define TYPE_OF_TPM_SU UINT16 +#define TPM_SU_CLEAR (TPM_SU)(0x0000) +#define TPM_SU_STATE (TPM_SU)(0x0001) + +// Table "Definition of TPM_SE Constants" (Part 2: Structures) +typedef UINT8 TPM_SE; +#define TYPE_OF_TPM_SE UINT8 +#define TPM_SE_HMAC (TPM_SE)(0x00) +#define TPM_SE_POLICY (TPM_SE)(0x01) +#define TPM_SE_TRIAL (TPM_SE)(0x03) + +// Table "Definition of TPM_CAP Constants" (Part 2: Structures) +typedef UINT32 TPM_CAP; +#define TYPE_OF_TPM_CAP UINT32 +#define TPM_CAP_FIRST (TPM_CAP)(0x00000000) +#define TPM_CAP_ALGS (TPM_CAP)(0x00000000) +#define TPM_CAP_HANDLES (TPM_CAP)(0x00000001) +#define TPM_CAP_COMMANDS (TPM_CAP)(0x00000002) +#define TPM_CAP_PP_COMMANDS (TPM_CAP)(0x00000003) +#define TPM_CAP_AUDIT_COMMANDS (TPM_CAP)(0x00000004) +#define TPM_CAP_PCRS (TPM_CAP)(0x00000005) +#define TPM_CAP_TPM_PROPERTIES (TPM_CAP)(0x00000006) +#define TPM_CAP_PCR_PROPERTIES (TPM_CAP)(0x00000007) +#define TPM_CAP_ECC_CURVES (TPM_CAP)(0x00000008) +#define TPM_CAP_AUTH_POLICIES (TPM_CAP)(0x00000009) +#define TPM_CAP_ACT (TPM_CAP)(0x0000000A) +#define TPM_CAP_LAST (TPM_CAP)(0x0000000A) +#define TPM_CAP_VENDOR_PROPERTY (TPM_CAP)(0x00000100) + +// Table "Definition of TPM_PT Constants" (Part 2: Structures) +typedef UINT32 TPM_PT; +#define TYPE_OF_TPM_PT UINT32 +#define TPM_PT_NONE (TPM_PT)(0x00000000) +#define PT_GROUP (TPM_PT)(0x00000100) +#define PT_FIXED (TPM_PT)(PT_GROUP * 1) +#define TPM_PT_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 0) +#define TPM_PT_LEVEL (TPM_PT)(PT_FIXED + 1) +#define TPM_PT_REVISION (TPM_PT)(PT_FIXED + 2) +#define TPM_PT_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 3) +#define TPM_PT_YEAR (TPM_PT)(PT_FIXED + 4) +#define TPM_PT_MANUFACTURER (TPM_PT)(PT_FIXED + 5) +#define TPM_PT_VENDOR_STRING_1 (TPM_PT)(PT_FIXED + 6) +#define TPM_PT_VENDOR_STRING_2 (TPM_PT)(PT_FIXED + 7) +#define TPM_PT_VENDOR_STRING_3 (TPM_PT)(PT_FIXED + 8) +#define TPM_PT_VENDOR_STRING_4 (TPM_PT)(PT_FIXED + 9) +#define TPM_PT_VENDOR_TPM_TYPE (TPM_PT)(PT_FIXED + 10) +#define TPM_PT_FIRMWARE_VERSION_1 (TPM_PT)(PT_FIXED + 11) +#define TPM_PT_FIRMWARE_VERSION_2 (TPM_PT)(PT_FIXED + 12) +#define TPM_PT_INPUT_BUFFER (TPM_PT)(PT_FIXED + 13) +#define TPM_PT_HR_TRANSIENT_MIN (TPM_PT)(PT_FIXED + 14) +#define TPM_PT_HR_PERSISTENT_MIN (TPM_PT)(PT_FIXED + 15) +#define TPM_PT_HR_LOADED_MIN (TPM_PT)(PT_FIXED + 16) +#define TPM_PT_ACTIVE_SESSIONS_MAX (TPM_PT)(PT_FIXED + 17) +#define TPM_PT_PCR_COUNT (TPM_PT)(PT_FIXED + 18) +#define TPM_PT_PCR_SELECT_MIN (TPM_PT)(PT_FIXED + 19) +#define TPM_PT_CONTEXT_GAP_MAX (TPM_PT)(PT_FIXED + 20) +#define TPM_PT_NV_COUNTERS_MAX (TPM_PT)(PT_FIXED + 22) +#define TPM_PT_NV_INDEX_MAX (TPM_PT)(PT_FIXED + 23) +#define TPM_PT_MEMORY (TPM_PT)(PT_FIXED + 24) +#define TPM_PT_CLOCK_UPDATE (TPM_PT)(PT_FIXED + 25) +#define TPM_PT_CONTEXT_HASH (TPM_PT)(PT_FIXED + 26) +#define TPM_PT_CONTEXT_SYM (TPM_PT)(PT_FIXED + 27) +#define TPM_PT_CONTEXT_SYM_SIZE (TPM_PT)(PT_FIXED + 28) +#define TPM_PT_ORDERLY_COUNT (TPM_PT)(PT_FIXED + 29) +#define TPM_PT_MAX_COMMAND_SIZE (TPM_PT)(PT_FIXED + 30) +#define TPM_PT_MAX_RESPONSE_SIZE (TPM_PT)(PT_FIXED + 31) +#define TPM_PT_MAX_DIGEST (TPM_PT)(PT_FIXED + 32) +#define TPM_PT_MAX_OBJECT_CONTEXT (TPM_PT)(PT_FIXED + 33) +#define TPM_PT_MAX_SESSION_CONTEXT (TPM_PT)(PT_FIXED + 34) +#define TPM_PT_PS_FAMILY_INDICATOR (TPM_PT)(PT_FIXED + 35) +#define TPM_PT_PS_LEVEL (TPM_PT)(PT_FIXED + 36) +#define TPM_PT_PS_REVISION (TPM_PT)(PT_FIXED + 37) +#define TPM_PT_PS_DAY_OF_YEAR (TPM_PT)(PT_FIXED + 38) +#define TPM_PT_PS_YEAR (TPM_PT)(PT_FIXED + 39) +#define TPM_PT_SPLIT_MAX (TPM_PT)(PT_FIXED + 40) +#define TPM_PT_TOTAL_COMMANDS (TPM_PT)(PT_FIXED + 41) +#define TPM_PT_LIBRARY_COMMANDS (TPM_PT)(PT_FIXED + 42) +#define TPM_PT_VENDOR_COMMANDS (TPM_PT)(PT_FIXED + 43) +#define TPM_PT_NV_BUFFER_MAX (TPM_PT)(PT_FIXED + 44) +#define TPM_PT_MODES (TPM_PT)(PT_FIXED + 45) +#define TPM_PT_MAX_CAP_BUFFER (TPM_PT)(PT_FIXED + 46) +#define TPM_PT_FIRMWARE_SVN (TPM_PT)(PT_FIXED + 47) +#define TPM_PT_FIRMWARE_MAX_SVN (TPM_PT)(PT_FIXED + 48) +#define PT_VAR (TPM_PT)(PT_GROUP * 2) +#define TPM_PT_PERMANENT (TPM_PT)(PT_VAR + 0) +#define TPM_PT_STARTUP_CLEAR (TPM_PT)(PT_VAR + 1) +#define TPM_PT_HR_NV_INDEX (TPM_PT)(PT_VAR + 2) +#define TPM_PT_HR_LOADED (TPM_PT)(PT_VAR + 3) +#define TPM_PT_HR_LOADED_AVAIL (TPM_PT)(PT_VAR + 4) +#define TPM_PT_HR_ACTIVE (TPM_PT)(PT_VAR + 5) +#define TPM_PT_HR_ACTIVE_AVAIL (TPM_PT)(PT_VAR + 6) +#define TPM_PT_HR_TRANSIENT_AVAIL (TPM_PT)(PT_VAR + 7) +#define TPM_PT_HR_PERSISTENT (TPM_PT)(PT_VAR + 8) +#define TPM_PT_HR_PERSISTENT_AVAIL (TPM_PT)(PT_VAR + 9) +#define TPM_PT_NV_COUNTERS (TPM_PT)(PT_VAR + 10) +#define TPM_PT_NV_COUNTERS_AVAIL (TPM_PT)(PT_VAR + 11) +#define TPM_PT_ALGORITHM_SET (TPM_PT)(PT_VAR + 12) +#define TPM_PT_LOADED_CURVES (TPM_PT)(PT_VAR + 13) +#define TPM_PT_LOCKOUT_COUNTER (TPM_PT)(PT_VAR + 14) +#define TPM_PT_MAX_AUTH_FAIL (TPM_PT)(PT_VAR + 15) +#define TPM_PT_LOCKOUT_INTERVAL (TPM_PT)(PT_VAR + 16) +#define TPM_PT_LOCKOUT_RECOVERY (TPM_PT)(PT_VAR + 17) +#define TPM_PT_NV_WRITE_RECOVERY (TPM_PT)(PT_VAR + 18) +#define TPM_PT_AUDIT_COUNTER_0 (TPM_PT)(PT_VAR + 19) +#define TPM_PT_AUDIT_COUNTER_1 (TPM_PT)(PT_VAR + 20) + +// Table "Definition of TPM_PT_PCR Constants" (Part 2: Structures) +typedef UINT32 TPM_PT_PCR; +#define TYPE_OF_TPM_PT_PCR UINT32 +#define TPM_PT_PCR_FIRST (TPM_PT_PCR)(0x00000000) +#define TPM_PT_PCR_SAVE (TPM_PT_PCR)(0x00000000) +#define TPM_PT_PCR_EXTEND_L0 (TPM_PT_PCR)(0x00000001) +#define TPM_PT_PCR_RESET_L0 (TPM_PT_PCR)(0x00000002) +#define TPM_PT_PCR_EXTEND_L1 (TPM_PT_PCR)(0x00000003) +#define TPM_PT_PCR_RESET_L1 (TPM_PT_PCR)(0x00000004) +#define TPM_PT_PCR_EXTEND_L2 (TPM_PT_PCR)(0x00000005) +#define TPM_PT_PCR_RESET_L2 (TPM_PT_PCR)(0x00000006) +#define TPM_PT_PCR_EXTEND_L3 (TPM_PT_PCR)(0x00000007) +#define TPM_PT_PCR_RESET_L3 (TPM_PT_PCR)(0x00000008) +#define TPM_PT_PCR_EXTEND_L4 (TPM_PT_PCR)(0x00000009) +#define TPM_PT_PCR_RESET_L4 (TPM_PT_PCR)(0x0000000A) +#define TPM_PT_PCR_NO_INCREMENT (TPM_PT_PCR)(0x00000011) +#define TPM_PT_PCR_DRTM_RESET (TPM_PT_PCR)(0x00000012) +#define TPM_PT_PCR_POLICY (TPM_PT_PCR)(0x00000013) +#define TPM_PT_PCR_AUTH (TPM_PT_PCR)(0x00000014) +#define TPM_PT_PCR_LAST (TPM_PT_PCR)(0x00000014) + +// Table "Definition of TPM_PS Constants" (Part 2: Structures) +typedef UINT32 TPM_PS; +#define TYPE_OF_TPM_PS UINT32 +#define TPM_PS_MAIN (TPM_PS)(0x00000000) +#define TPM_PS_PC (TPM_PS)(0x00000001) +#define TPM_PS_PDA (TPM_PS)(0x00000002) +#define TPM_PS_CELL_PHONE (TPM_PS)(0x00000003) +#define TPM_PS_SERVER (TPM_PS)(0x00000004) +#define TPM_PS_PERIPHERAL (TPM_PS)(0x00000005) +#define TPM_PS_TSS (TPM_PS)(0x00000006) +#define TPM_PS_STORAGE (TPM_PS)(0x00000007) +#define TPM_PS_AUTHENTICATION (TPM_PS)(0x00000008) +#define TPM_PS_EMBEDDED (TPM_PS)(0x00000009) +#define TPM_PS_HARDCOPY (TPM_PS)(0x0000000A) +#define TPM_PS_INFRASTRUCTURE (TPM_PS)(0x0000000B) +#define TPM_PS_VIRTUALIZATION (TPM_PS)(0x0000000C) +#define TPM_PS_TNC (TPM_PS)(0x0000000D) +#define TPM_PS_MULTI_TENANT (TPM_PS)(0x0000000E) +#define TPM_PS_TC (TPM_PS)(0x0000000F) + +// Table "Definition of Types for Handles" (Part 2: Structures) +typedef UINT32 TPM_HANDLE; +#define TYPE_OF_TPM_HANDLE UINT32 + +// Table "Definition of TPM_HT Constants" (Part 2: Structures) +typedef UINT8 TPM_HT; +#define TYPE_OF_TPM_HT UINT8 +#define TPM_HT_PCR (TPM_HT)(0x00) +#define TPM_HT_NV_INDEX (TPM_HT)(0x01) +#define TPM_HT_HMAC_SESSION (TPM_HT)(0x02) +#define TPM_HT_LOADED_SESSION (TPM_HT)(0x02) +#define TPM_HT_POLICY_SESSION (TPM_HT)(0x03) +#define TPM_HT_SAVED_SESSION (TPM_HT)(0x03) +#define TPM_HT_EXTERNAL_NV (TPM_HT)(0x11) +#define TPM_HT_PERMANENT_NV (TPM_HT)(0x12) +#define TPM_HT_PERMANENT (TPM_HT)(0x40) +#define TPM_HT_TRANSIENT (TPM_HT)(0x80) +#define TPM_HT_PERSISTENT (TPM_HT)(0x81) +#define TPM_HT_AC (TPM_HT)(0x90) + +// Table "Definition of TPM_RH Constants" (Part 2: Structures) +typedef TPM_HANDLE TPM_RH; +#define TYPE_OF_TPM_RH TPM_HANDLE +#define TPM_RH_FIRST (TPM_RH)(0x40000000) +#define TPM_RH_SRK (TPM_RH)(0x40000000) +#define TPM_RH_OWNER (TPM_RH)(0x40000001) +#define TPM_RH_REVOKE (TPM_RH)(0x40000002) +#define TPM_RH_TRANSPORT (TPM_RH)(0x40000003) +#define TPM_RH_OPERATOR (TPM_RH)(0x40000004) +#define TPM_RH_ADMIN (TPM_RH)(0x40000005) +#define TPM_RH_EK (TPM_RH)(0x40000006) +#define TPM_RH_NULL (TPM_RH)(0x40000007) +#define TPM_RH_UNASSIGNED (TPM_RH)(0x40000008) +#define TPM_RS_PW (TPM_RH)(0x40000009) +#define TPM_RH_LOCKOUT (TPM_RH)(0x4000000A) +#define TPM_RH_ENDORSEMENT (TPM_RH)(0x4000000B) +#define TPM_RH_PLATFORM (TPM_RH)(0x4000000C) +#define TPM_RH_PLATFORM_NV (TPM_RH)(0x4000000D) +#define TPM_RH_AUTH_00 (TPM_RH)(0x40000010) +#define TPM_RH_AUTH_FF (TPM_RH)(0x4000010F) +#define TPM_RH_ACT_0 (TPM_RH)(0x40000110) +#define TPM_RH_ACT_F (TPM_RH)(0x4000011F) +#define TPM_RH_FW_OWNER (TPM_RH)(0x40000140) +#define TPM_RH_FW_ENDORSEMENT (TPM_RH)(0x40000141) +#define TPM_RH_FW_PLATFORM (TPM_RH)(0x40000142) +#define TPM_RH_FW_NULL (TPM_RH)(0x40000143) +#define TPM_RH_SVN_OWNER_BASE (TPM_RH)(0x40010000) +#define TPM_RH_SVN_ENDORSEMENT_BASE (TPM_RH)(0x40020000) +#define TPM_RH_SVN_PLATFORM_BASE (TPM_RH)(0x40030000) +#define TPM_RH_SVN_NULL_BASE (TPM_RH)(0x40040000) +#define TPM_RH_LAST (TPM_RH)(0x4004FFFF) +// Note: 0x40010001-0x4001FFFF, 0x40020001-0x4002FFFF, +// 0x40030001-0x4003FFFF, and 0x40040001-0x4004FFFF are +// valid reserved handles, but are not returned from +// TPM2_GetCapability(). + +// Table "Definition of TPM_HC Constants" (Part 2: Structures) +typedef TPM_HANDLE TPM_HC; +#define TYPE_OF_TPM_HC TPM_HANDLE +#define HR_HANDLE_MASK (TPM_HC)(0x00FFFFFF) +#define HR_RANGE_MASK (TPM_HC)(0xFF000000) +#define HR_SHIFT (TPM_HC)(24) +#define HR_PCR (TPM_HC)((TPM_HT_PCR << HR_SHIFT)) +#define HR_HMAC_SESSION (TPM_HC)((TPM_HT_HMAC_SESSION << HR_SHIFT)) +#define HR_POLICY_SESSION (TPM_HC)((TPM_HT_POLICY_SESSION << HR_SHIFT)) +#define HR_TRANSIENT (TPM_HC)((TPM_HT_TRANSIENT << HR_SHIFT)) +#define HR_PERSISTENT (TPM_HC)((TPM_HT_PERSISTENT << HR_SHIFT)) +#define HR_NV_INDEX (TPM_HC)((TPM_HT_NV_INDEX << HR_SHIFT)) +#define HR_EXTERNAL_NV (TPM_HC)((TPM_HT_EXTERNAL_NV << HR_SHIFT)) +#define HR_PERMANENT_NV (TPM_HC)((TPM_HT_PERMANENT_NV << HR_SHIFT)) +#define HR_PERMANENT (TPM_HC)((TPM_HT_PERMANENT << HR_SHIFT)) +#define PCR_FIRST (TPM_HC)((HR_PCR + 0)) +#define PCR_LAST (TPM_HC)((PCR_FIRST + IMPLEMENTATION_PCR - 1)) +#define HMAC_SESSION_FIRST (TPM_HC)((HR_HMAC_SESSION + 0)) +#define HMAC_SESSION_LAST (TPM_HC)((HMAC_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)) +#define LOADED_SESSION_FIRST (TPM_HC)(HMAC_SESSION_FIRST) +#define LOADED_SESSION_LAST (TPM_HC)(HMAC_SESSION_LAST) +#define POLICY_SESSION_FIRST (TPM_HC)((HR_POLICY_SESSION + 0)) +#define POLICY_SESSION_LAST (TPM_HC)((POLICY_SESSION_FIRST + MAX_ACTIVE_SESSIONS - 1)) +#define TRANSIENT_FIRST (TPM_HC)((HR_TRANSIENT + 0)) +#define ACTIVE_SESSION_FIRST (TPM_HC)(POLICY_SESSION_FIRST) +#define ACTIVE_SESSION_LAST (TPM_HC)(POLICY_SESSION_LAST) +#define TRANSIENT_LAST (TPM_HC)((TRANSIENT_FIRST + MAX_LOADED_OBJECTS - 1)) +#define PERSISTENT_FIRST (TPM_HC)((HR_PERSISTENT + 0)) +#define PERSISTENT_LAST (TPM_HC)((PERSISTENT_FIRST + 0x00FFFFFF)) +#define SVN_OWNER_FIRST (TPM_HC)((TPM_RH_SVN_OWNER_BASE + 0x0000)) +#define SVN_OWNER_LAST (TPM_HC)((TPM_RH_SVN_OWNER_BASE + 0xFFFF)) +#define SVN_ENDORSEMENT_FIRST (TPM_HC)((TPM_RH_SVN_ENDORSEMENT_BASE + 0x0000)) +#define SVN_ENDORSEMENT_LAST (TPM_HC)((TPM_RH_SVN_ENDORSEMENT_BASE + 0xFFFF)) +#define SVN_PLATFORM_FIRST (TPM_HC)((TPM_RH_SVN_PLATFORM_BASE + 0x0000)) +#define SVN_PLATFORM_LAST (TPM_HC)((TPM_RH_SVN_PLATFORM_BASE + 0xFFFF)) +#define SVN_NULL_FIRST (TPM_HC)((TPM_RH_SVN_NULL_BASE + 0x0000)) +#define SVN_NULL_LAST (TPM_HC)((TPM_RH_SVN_NULL_BASE + 0xFFFF)) +#define PLATFORM_PERSISTENT (TPM_HC)((PERSISTENT_FIRST + 0x00800000)) +#define NV_INDEX_FIRST (TPM_HC)((HR_NV_INDEX + 0)) +#define NV_INDEX_LAST (TPM_HC)((NV_INDEX_FIRST + 0x00FFFFFF)) +#define EXTERNAL_NV_FIRST (TPM_HC)((HR_EXTERNAL_NV + 0)) +#define EXTERNAL_NV_LAST (TPM_HC)((EXTERNAL_NV_FIRST + 0x00FFFFFF)) +#define PERMANENT_NV_FIRST (TPM_HC)((HR_PERMANENT_NV + 0)) +#define PERMANENT_NV_LAST (TPM_HC)((PERMANENT_NV_FIRST + 0x00FFFFFF)) +#define PERMANENT_FIRST (TPM_HC)(TPM_RH_FIRST) +#define PERMANENT_LAST (TPM_HC)(TPM_RH_LAST) +#define HR_NV_AC (TPM_HC)(((TPM_HT_NV_INDEX << HR_SHIFT) + 0xD00000)) +#define NV_AC_FIRST (TPM_HC)((HR_NV_AC + 0)) +#define NV_AC_LAST (TPM_HC)((HR_NV_AC + 0x0000FFFF)) +#define HR_AC (TPM_HC)((TPM_HT_AC << HR_SHIFT)) +#define AC_FIRST (TPM_HC)((HR_AC + 0)) +#define AC_LAST (TPM_HC)((HR_AC + 0x0000FFFF)) + +// Table "Definition of TPMA_ALGORITHM Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_ALGORITHM UINT32 +#define TPMA_ALGORITHM_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPMA_ALGORITHM(a) (*((TPMA_ALGORITHM*)&(a))) +#define TPMA_ALGORITHM_TO_BYTE_ARRAY(i, a) \ + UINT32_TO_BYTE_ARRAY((TPMA_ALGORITHM_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_ALGORITHM(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPMA_ALGORITHM(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned asymmetric : 1; + unsigned symmetric : 1; + unsigned hash : 1; + unsigned object : 1; + unsigned Reserved_bits_at_4 : 4; + unsigned signing : 1; + unsigned encrypting : 1; + unsigned method : 1; + unsigned Reserved_bits_at_11 : 21; +} TPMA_ALGORITHM; + +// Initializer for the bit-field structure +# define TPMA_ALGORITHM_INITIALIZER(asymmetric, \ + symmetric, \ + hash, \ + object, \ + bits_at_4, \ + signing, \ + encrypting, \ + method, \ + bits_at_11) \ + { \ + asymmetric, symmetric, hash, object, bits_at_4, signing, encrypting, \ + method, bits_at_11 \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_ALGORITHM Bits" (Part 2: Structures) using bit masking +typedef UINT32 TPMA_ALGORITHM; +# define TPMA_ALGORITHM_asymmetric (TPMA_ALGORITHM)(1 << 0) +# define TPMA_ALGORITHM_symmetric (TPMA_ALGORITHM)(1 << 1) +# define TPMA_ALGORITHM_hash (TPMA_ALGORITHM)(1 << 2) +# define TPMA_ALGORITHM_object (TPMA_ALGORITHM)(1 << 3) +# define TPMA_ALGORITHM_signing (TPMA_ALGORITHM)(1 << 8) +# define TPMA_ALGORITHM_encrypting (TPMA_ALGORITHM)(1 << 9) +# define TPMA_ALGORITHM_method (TPMA_ALGORITHM)(1 << 10) + +// This is the initializer for a TPMA_ALGORITHM bit array. +# define TPMA_ALGORITHM_INITIALIZER(asymmetric, \ + symmetric, \ + hash, \ + object, \ + bits_at_4, \ + signing, \ + encrypting, \ + method, \ + bits_at_11) \ + (TPMA_ALGORITHM)((asymmetric << 0) + (symmetric << 1) + (hash << 2) \ + + (object << 3) + (signing << 8) + (encrypting << 9) \ + + (method << 10)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_OBJECT Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_OBJECT UINT32 +#define TPMA_OBJECT_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPMA_OBJECT(a) (*((TPMA_OBJECT*)&(a))) +#define TPMA_OBJECT_TO_BYTE_ARRAY(i, a) \ + UINT32_TO_BYTE_ARRAY((TPMA_OBJECT_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_OBJECT(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPMA_OBJECT(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned Reserved_bit_at_0 : 1; + unsigned fixedTPM : 1; + unsigned stClear : 1; + unsigned fixedFirmware : 1; + unsigned fixedParent : 1; + unsigned sensitiveDataOrigin : 1; + unsigned userWithAuth : 1; + unsigned adminWithPolicy : 1; + unsigned firmwareLimited : 1; + unsigned svnLimited : 1; + unsigned noDA : 1; + unsigned encryptedDuplication : 1; + unsigned Reserved_bits_at_12 : 4; + unsigned restricted : 1; + unsigned decrypt : 1; + unsigned sign : 1; + unsigned x509sign : 1; + unsigned Reserved_bits_at_20 : 12; +} TPMA_OBJECT; + +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_OBJECT Bits" (Part 2: Structures) using bit masking +typedef UINT32 TPMA_OBJECT; +# define TPMA_OBJECT_fixedTPM (TPMA_OBJECT)(1 << 1) +# define TPMA_OBJECT_stClear (TPMA_OBJECT)(1 << 2) +# define TPMA_OBJECT_fixedFirmware (TPMA_OBJECT)(1 << 3) +# define TPMA_OBJECT_fixedParent (TPMA_OBJECT)(1 << 4) +# define TPMA_OBJECT_sensitiveDataOrigin (TPMA_OBJECT)(1 << 5) +# define TPMA_OBJECT_userWithAuth (TPMA_OBJECT)(1 << 6) +# define TPMA_OBJECT_adminWithPolicy (TPMA_OBJECT)(1 << 7) +# define TPMA_OBJECT_firmwareLimited (TPMA_OBJECT)(1 << 8) +# define TPMA_OBJECT_svnLimited (TPMA_OBJECT)(1 << 9) +# define TPMA_OBJECT_noDA (TPMA_OBJECT)(1 << 10) +# define TPMA_OBJECT_encryptedDuplication (TPMA_OBJECT)(1 << 11) +# define TPMA_OBJECT_restricted (TPMA_OBJECT)(1 << 16) +# define TPMA_OBJECT_decrypt (TPMA_OBJECT)(1 << 17) +# define TPMA_OBJECT_sign (TPMA_OBJECT)(1 << 18) +# define TPMA_OBJECT_x509sign (TPMA_OBJECT)(1 << 19) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_SESSION Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_SESSION UINT8 +#define TPMA_SESSION_TO_UINT8(a) (*((UINT8*)&(a))) +#define UINT8_TO_TPMA_SESSION(a) (*((TPMA_SESSION*)&(a))) +#define TPMA_SESSION_TO_BYTE_ARRAY(i, a) \ + UINT8_TO_BYTE_ARRAY((TPMA_SESSION_TO_UINT8(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_SESSION(i, a) \ + { \ + UINT8 x = BYTE_ARRAY_TO_UINT8(a); \ + i = UINT8_TO_TPMA_SESSION(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned continueSession : 1; + unsigned auditExclusive : 1; + unsigned auditReset : 1; + unsigned Reserved_bits_at_3 : 2; + unsigned decrypt : 1; + unsigned encrypt : 1; + unsigned audit : 1; +} TPMA_SESSION; + +// Initializer for the bit-field structure +# define TPMA_SESSION_INITIALIZER(continuesession, \ + auditexclusive, \ + auditreset, \ + bits_at_3, \ + decrypt, \ + encrypt, \ + audit) \ + { \ + continuesession, auditexclusive, auditreset, bits_at_3, decrypt, encrypt, \ + audit \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_SESSION Bits" (Part 2: Structures) using bit masking +typedef UINT8 TPMA_SESSION; +# define TPMA_SESSION_continueSession (TPMA_SESSION)(1 << 0) +# define TPMA_SESSION_auditExclusive (TPMA_SESSION)(1 << 1) +# define TPMA_SESSION_auditReset (TPMA_SESSION)(1 << 2) +# define TPMA_SESSION_decrypt (TPMA_SESSION)(1 << 5) +# define TPMA_SESSION_encrypt (TPMA_SESSION)(1 << 6) +# define TPMA_SESSION_audit (TPMA_SESSION)(1 << 7) + +// This is the initializer for a TPMA_SESSION bit array. +# define TPMA_SESSION_INITIALIZER(continuesession, \ + auditexclusive, \ + auditreset, \ + bits_at_3, \ + decrypt, \ + encrypt, \ + audit) \ + (TPMA_SESSION)((continuesession << 0) + (auditexclusive << 1) \ + + (auditreset << 2) + (decrypt << 5) + (encrypt << 6) \ + + (audit << 7)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_LOCALITY Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_LOCALITY UINT8 +#define TPMA_LOCALITY_TO_UINT8(a) (*((UINT8*)&(a))) +#define UINT8_TO_TPMA_LOCALITY(a) (*((TPMA_LOCALITY*)&(a))) +#define TPMA_LOCALITY_TO_BYTE_ARRAY(i, a) \ + UINT8_TO_BYTE_ARRAY((TPMA_LOCALITY_TO_UINT8(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_LOCALITY(i, a) \ + { \ + UINT8 x = BYTE_ARRAY_TO_UINT8(a); \ + i = UINT8_TO_TPMA_LOCALITY(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned TPM_LOC_ZERO : 1; + unsigned TPM_LOC_ONE : 1; + unsigned TPM_LOC_TWO : 1; + unsigned TPM_LOC_THREE : 1; + unsigned TPM_LOC_FOUR : 1; + unsigned Extended : 3; +} TPMA_LOCALITY; + +// Initializer for the bit-field structure +# define TPMA_LOCALITY_INITIALIZER( \ + tpm_loc_zero, tpm_loc_one, tpm_loc_two, tpm_loc_three, tpm_loc_four, extended) \ + { \ + tpm_loc_zero, tpm_loc_one, tpm_loc_two, tpm_loc_three, tpm_loc_four, \ + extended \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_LOCALITY Bits" (Part 2: Structures) using bit masking +typedef UINT8 TPMA_LOCALITY; +# define TPMA_LOCALITY_TPM_LOC_ZERO (TPMA_LOCALITY)(1 << 0) +# define TPMA_LOCALITY_TPM_LOC_ONE (TPMA_LOCALITY)(1 << 1) +# define TPMA_LOCALITY_TPM_LOC_TWO (TPMA_LOCALITY)(1 << 2) +# define TPMA_LOCALITY_TPM_LOC_THREE (TPMA_LOCALITY)(1 << 3) +# define TPMA_LOCALITY_TPM_LOC_FOUR (TPMA_LOCALITY)(1 << 4) +# define TPMA_LOCALITY_Extended (TPMA_LOCALITY)(7 << 5) +# define TPMA_LOCALITY_Extended_SHIFT 5 + +// This is the initializer for a TPMA_LOCALITY bit array. +# define TPMA_LOCALITY_INITIALIZER( \ + tpm_loc_zero, tpm_loc_one, tpm_loc_two, tpm_loc_three, tpm_loc_four, extended) \ + (TPMA_LOCALITY)((tpm_loc_zero << 0) + (tpm_loc_one << 1) + (tpm_loc_two << 2) \ + + (tpm_loc_three << 3) + (tpm_loc_four << 4) \ + + (extended << 5)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_PERMANENT Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_PERMANENT UINT32 +#define TPMA_PERMANENT_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPMA_PERMANENT(a) (*((TPMA_PERMANENT*)&(a))) +#define TPMA_PERMANENT_TO_BYTE_ARRAY(i, a) \ + UINT32_TO_BYTE_ARRAY((TPMA_PERMANENT_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_PERMANENT(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPMA_PERMANENT(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned ownerAuthSet : 1; + unsigned endorsementAuthSet : 1; + unsigned lockoutAuthSet : 1; + unsigned Reserved_bits_at_3 : 5; + unsigned disableClear : 1; + unsigned inLockout : 1; + unsigned tpmGeneratedEPS : 1; + unsigned Reserved_bits_at_11 : 21; +} TPMA_PERMANENT; + +// Initializer for the bit-field structure +# define TPMA_PERMANENT_INITIALIZER(ownerauthset, \ + endorsementauthset, \ + lockoutauthset, \ + bits_at_3, \ + disableclear, \ + inlockout, \ + tpmgeneratedeps, \ + bits_at_11) \ + { \ + ownerauthset, endorsementauthset, lockoutauthset, bits_at_3, disableclear, \ + inlockout, tpmgeneratedeps, bits_at_11 \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_PERMANENT Bits" (Part 2: Structures) using bit masking +typedef UINT32 TPMA_PERMANENT; +# define TPMA_PERMANENT_ownerAuthSet (TPMA_PERMANENT)(1 << 0) +# define TPMA_PERMANENT_endorsementAuthSet (TPMA_PERMANENT)(1 << 1) +# define TPMA_PERMANENT_lockoutAuthSet (TPMA_PERMANENT)(1 << 2) +# define TPMA_PERMANENT_disableClear (TPMA_PERMANENT)(1 << 8) +# define TPMA_PERMANENT_inLockout (TPMA_PERMANENT)(1 << 9) +# define TPMA_PERMANENT_tpmGeneratedEPS (TPMA_PERMANENT)(1 << 10) + +// This is the initializer for a TPMA_PERMANENT bit array. +# define TPMA_PERMANENT_INITIALIZER(ownerauthset, \ + endorsementauthset, \ + lockoutauthset, \ + bits_at_3, \ + disableclear, \ + inlockout, \ + tpmgeneratedeps, \ + bits_at_11) \ + (TPMA_PERMANENT)((ownerauthset << 0) + (endorsementauthset << 1) \ + + (lockoutauthset << 2) + (disableclear << 8) \ + + (inlockout << 9) + (tpmgeneratedeps << 10)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_STARTUP_CLEAR Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_STARTUP_CLEAR UINT32 +#define TPMA_STARTUP_CLEAR_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPMA_STARTUP_CLEAR(a) (*((TPMA_STARTUP_CLEAR*)&(a))) +#define TPMA_STARTUP_CLEAR_TO_BYTE_ARRAY(i, a) \ + UINT32_TO_BYTE_ARRAY((TPMA_STARTUP_CLEAR_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_STARTUP_CLEAR(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPMA_STARTUP_CLEAR(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned phEnable : 1; + unsigned shEnable : 1; + unsigned ehEnable : 1; + unsigned phEnableNV : 1; + unsigned Reserved_bits_at_4 : 27; + unsigned orderly : 1; +} TPMA_STARTUP_CLEAR; + +// Initializer for the bit-field structure +# define TPMA_STARTUP_CLEAR_INITIALIZER( \ + phenable, shenable, ehenable, phenablenv, bits_at_4, orderly) \ + { \ + phenable, shenable, ehenable, phenablenv, bits_at_4, orderly \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_STARTUP_CLEAR Bits" (Part 2: Structures) using bit masking +typedef UINT32 TPMA_STARTUP_CLEAR; +# define TPMA_STARTUP_CLEAR_phEnable (TPMA_STARTUP_CLEAR)(1 << 0) +# define TPMA_STARTUP_CLEAR_shEnable (TPMA_STARTUP_CLEAR)(1 << 1) +# define TPMA_STARTUP_CLEAR_ehEnable (TPMA_STARTUP_CLEAR)(1 << 2) +# define TPMA_STARTUP_CLEAR_phEnableNV (TPMA_STARTUP_CLEAR)(1 << 3) +# define TPMA_STARTUP_CLEAR_orderly (TPMA_STARTUP_CLEAR)(1 << 31) + +// This is the initializer for a TPMA_STARTUP_CLEAR bit array. +# define TPMA_STARTUP_CLEAR_INITIALIZER( \ + phenable, shenable, ehenable, phenablenv, bits_at_4, orderly) \ + (TPMA_STARTUP_CLEAR)((phenable << 0) + (shenable << 1) + (ehenable << 2) \ + + (phenablenv << 3) + (orderly << 31)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_MEMORY Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_MEMORY UINT32 +#define TPMA_MEMORY_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPMA_MEMORY(a) (*((TPMA_MEMORY*)&(a))) +#define TPMA_MEMORY_TO_BYTE_ARRAY(i, a) \ + UINT32_TO_BYTE_ARRAY((TPMA_MEMORY_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_MEMORY(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPMA_MEMORY(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned sharedRAM : 1; + unsigned sharedNV : 1; + unsigned objectCopiedToRam : 1; + unsigned Reserved_bits_at_3 : 29; +} TPMA_MEMORY; + +// Initializer for the bit-field structure +# define TPMA_MEMORY_INITIALIZER(sharedram, sharednv, objectcopiedtoram, bits_at_3) \ + { \ + sharedram, sharednv, objectcopiedtoram, bits_at_3 \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_MEMORY Bits" (Part 2: Structures) using bit masking +typedef UINT32 TPMA_MEMORY; +# define TPMA_MEMORY_sharedRAM (TPMA_MEMORY)(1 << 0) +# define TPMA_MEMORY_sharedNV (TPMA_MEMORY)(1 << 1) +# define TPMA_MEMORY_objectCopiedToRam (TPMA_MEMORY)(1 << 2) + +// This is the initializer for a TPMA_MEMORY bit array. +# define TPMA_MEMORY_INITIALIZER(sharedram, sharednv, objectcopiedtoram, bits_at_3) \ + (TPMA_MEMORY)((sharedram << 0) + (sharednv << 1) + (objectcopiedtoram << 2)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_CC Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_CC UINT32 +#define TPMA_CC_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPMA_CC(a) (*((TPMA_CC*)&(a))) +#define TPMA_CC_TO_BYTE_ARRAY(i, a) UINT32_TO_BYTE_ARRAY((TPMA_CC_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_CC(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPMA_CC(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned commandIndex : 16; + unsigned Reserved_bits_at_16 : 6; + unsigned nv : 1; + unsigned extensive : 1; + unsigned flushed : 1; + unsigned cHandles : 3; + unsigned rHandle : 1; + unsigned V : 1; + unsigned Reserved_bits_at_30 : 2; +} TPMA_CC; + +// Initializer for the bit-field structure +# define TPMA_CC_INITIALIZER(commandindex, \ + bits_at_16, \ + nv, \ + extensive, \ + flushed, \ + chandles, \ + rhandle, \ + v, \ + bits_at_30) \ + { \ + commandindex, bits_at_16, nv, extensive, flushed, chandles, rhandle, v, \ + bits_at_30 \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_CC Bits" (Part 2: Structures) using bit masking +typedef TPM_CC TPMA_CC; +# define TPMA_CC_commandIndex (TPMA_CC)(0xFFFF << 0) +# define TPMA_CC_commandIndex_SHIFT 0 +# define TPMA_CC_nv (TPMA_CC)(1 << 22) +# define TPMA_CC_extensive (TPMA_CC)(1 << 23) +# define TPMA_CC_flushed (TPMA_CC)(1 << 24) +# define TPMA_CC_cHandles (TPMA_CC)(7 << 25) +# define TPMA_CC_cHandles_SHIFT 25 +# define TPMA_CC_rHandle (TPMA_CC)(1 << 28) +# define TPMA_CC_V (TPMA_CC)(1 << 29) + +// This is the initializer for a TPMA_CC bit array. +# define TPMA_CC_INITIALIZER(commandindex, \ + bits_at_16, \ + nv, \ + extensive, \ + flushed, \ + chandles, \ + rhandle, \ + v, \ + bits_at_30) \ + (TPMA_CC)((commandindex << 0) + (nv << 22) + (extensive << 23) \ + + (flushed << 24) + (chandles << 25) + (rhandle << 28) + (v << 29)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_MODES Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_MODES UINT32 +#define TPMA_MODES_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPMA_MODES(a) (*((TPMA_MODES*)&(a))) +#define TPMA_MODES_TO_BYTE_ARRAY(i, a) \ + UINT32_TO_BYTE_ARRAY((TPMA_MODES_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_MODES(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPMA_MODES(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned FIPS_140_2 : 1; + unsigned FIPS_140_3 : 1; + unsigned FIPS_140_3_INDICATOR : 2; + unsigned Reserved_bits_at_4 : 28; +} TPMA_MODES; + +// Initializer for the bit-field structure +# define TPMA_MODES_INITIALIZER( \ + fips_140_2, fips_140_3, fips_140_3_indicator, bits_at_4) \ + { \ + fips_140_2, fips_140_3, fips_140_3_indicator, bits_at_4 \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_MODES Bits" (Part 2: Structures) using bit masking +typedef UINT32 TPMA_MODES; +# define TPMA_MODES_FIPS_140_2 (TPMA_MODES)(1 << 0) +# define TPMA_MODES_FIPS_140_3 (TPMA_MODES)(1 << 1) +# define TPMA_MODES_FIPS_140_3_INDICATOR (TPMA_MODES)(3 << 2) +# define TPMA_MODES_FIPS_140_3_INDICATOR_SHIFT 2 + +// This is the initializer for a TPMA_MODES bit array. +# define TPMA_MODES_INITIALIZER( \ + fips_140_2, fips_140_3, fips_140_3_indicator, bits_at_4) \ + (TPMA_MODES)( \ + (fips_140_2 << 0) + (fips_140_3 << 1) + (fips_140_3_indicator << 2)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_X509_KEY_USAGE Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_X509_KEY_USAGE UINT32 +#define TPMA_X509_KEY_USAGE_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPMA_X509_KEY_USAGE(a) (*((TPMA_X509_KEY_USAGE*)&(a))) +#define TPMA_X509_KEY_USAGE_TO_BYTE_ARRAY(i, a) \ + UINT32_TO_BYTE_ARRAY((TPMA_X509_KEY_USAGE_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_X509_KEY_USAGE(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPMA_X509_KEY_USAGE(x); \ + } +#define TPMA_X509_KEY_USAGE_ALLOWED_BITS (0xff800000) +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned Reserved_bits_at_0 : 23; + unsigned decipherOnly : 1; + unsigned encipherOnly : 1; + unsigned cRLSign : 1; + unsigned keyCertSign : 1; + unsigned keyAgreement : 1; + unsigned dataEncipherment : 1; + unsigned keyEncipherment : 1; + unsigned nonrepudiation : 1; + unsigned digitalSignature : 1; +} TPMA_X509_KEY_USAGE; + +// Initializer for the bit-field structure +# define TPMA_X509_KEY_USAGE_INITIALIZER(bits_at_0, \ + decipheronly, \ + encipheronly, \ + crlsign, \ + keycertsign, \ + keyagreement, \ + dataencipherment, \ + keyencipherment, \ + nonrepudiation, \ + digitalsignature) \ + { \ + bits_at_0, decipheronly, encipheronly, crlsign, keycertsign, keyagreement, \ + dataencipherment, keyencipherment, nonrepudiation, digitalsignature \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_X509_KEY_USAGE Bits" (Part 2: Structures) using bit masking +typedef UINT32 TPMA_X509_KEY_USAGE; +# define TPMA_X509_KEY_USAGE_decipherOnly (TPMA_X509_KEY_USAGE)(1 << 23) +# define TPMA_X509_KEY_USAGE_encipherOnly (TPMA_X509_KEY_USAGE)(1 << 24) +# define TPMA_X509_KEY_USAGE_cRLSign (TPMA_X509_KEY_USAGE)(1 << 25) +# define TPMA_X509_KEY_USAGE_keyCertSign (TPMA_X509_KEY_USAGE)(1 << 26) +# define TPMA_X509_KEY_USAGE_keyAgreement (TPMA_X509_KEY_USAGE)(1 << 27) +# define TPMA_X509_KEY_USAGE_dataEncipherment (TPMA_X509_KEY_USAGE)(1 << 28) +# define TPMA_X509_KEY_USAGE_keyEncipherment (TPMA_X509_KEY_USAGE)(1 << 29) +# define TPMA_X509_KEY_USAGE_nonrepudiation (TPMA_X509_KEY_USAGE)(1 << 30) +# define TPMA_X509_KEY_USAGE_digitalSignature (TPMA_X509_KEY_USAGE)(1 << 31) + +// This is the initializer for a TPMA_X509_KEY_USAGE bit array. +# define TPMA_X509_KEY_USAGE_INITIALIZER(bits_at_0, \ + decipheronly, \ + encipheronly, \ + crlsign, \ + keycertsign, \ + keyagreement, \ + dataencipherment, \ + keyencipherment, \ + nonrepudiation, \ + digitalsignature) \ + (TPMA_X509_KEY_USAGE)((decipheronly << 23) + (encipheronly << 24) \ + + (crlsign << 25) + (keycertsign << 26) \ + + (keyagreement << 27) + (dataencipherment << 28) \ + + (keyencipherment << 29) + (nonrepudiation << 30) \ + + (digitalsignature << 31)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_ACT Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_ACT UINT32 +#define TPMA_ACT_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPMA_ACT(a) (*((TPMA_ACT*)&(a))) +#define TPMA_ACT_TO_BYTE_ARRAY(i, a) \ + UINT32_TO_BYTE_ARRAY((TPMA_ACT_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_ACT(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPMA_ACT(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned signaled : 1; + unsigned preserveSignaled : 1; + unsigned Reserved_bits_at_2 : 30; +} TPMA_ACT; + +// Initializer for the bit-field structure +# define TPMA_ACT_INITIALIZER(signaled, preservesignaled, bits_at_2) \ + { \ + signaled, preservesignaled, bits_at_2 \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_ACT Bits" (Part 2: Structures) using bit masking +typedef UINT32 TPMA_ACT; +# define TPMA_ACT_signaled (TPMA_ACT)(1 << 0) +# define TPMA_ACT_preserveSignaled (TPMA_ACT)(1 << 1) + +// This is the initializer for a TPMA_ACT bit array. +# define TPMA_ACT_INITIALIZER(signaled, preservesignaled, bits_at_2) \ + (TPMA_ACT)((signaled << 0) + (preservesignaled << 1)) + +#endif // USE_BIT_FIELD_STRUCTURES + +typedef BYTE TPMI_YES_NO; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_DH_OBJECT; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_DH_PARENT; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_DH_PERSISTENT; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_DH_ENTITY; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_DH_PCR; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_SH_AUTH_SESSION; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_SH_HMAC; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_SH_POLICY; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_DH_CONTEXT; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_DH_SAVED; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_HIERARCHY; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_ENABLES; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_HIERARCHY_AUTH; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_HIERARCHY_POLICY; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_BASE_HIERARCHY; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_PLATFORM; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_OWNER; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_ENDORSEMENT; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_PROVISION; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_CLEAR; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_NV_AUTH; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_LOCKOUT; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_NV_INDEX; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_NV_DEFINED_INDEX; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_NV_LEGACY_INDEX; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_NV_EXP_INDEX; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_AC; // (Part 2: Structures) +typedef TPM_HANDLE TPMI_RH_ACT; // (Part 2: Structures) +typedef TPM_ALG_ID TPMI_ALG_HASH; // (Part 2: Structures) +typedef TPM_ALG_ID TPMI_ALG_ASYM; // (Part 2: Structures) +typedef TPM_ALG_ID TPMI_ALG_SYM; // (Part 2: Structures) +typedef TPM_ALG_ID TPMI_ALG_SYM_OBJECT; // (Part 2: Structures) +typedef TPM_ALG_ID TPMI_ALG_SYM_MODE; // (Part 2: Structures) +typedef TPM_ALG_ID TPMI_ALG_KDF; // (Part 2: Structures) +typedef TPM_ALG_ID TPMI_ALG_SIG_SCHEME; // (Part 2: Structures) +typedef TPM_ALG_ID TPMI_ECC_KEY_EXCHANGE; // (Part 2: Structures) +typedef TPM_ST TPMI_ST_COMMAND_TAG; // (Part 2: Structures) +typedef TPM_ALG_ID TPMI_ALG_MAC_SCHEME; // (Part 2: Structures) +typedef TPM_ALG_ID TPMI_ALG_CIPHER_MODE; // (Part 2: Structures) +typedef BYTE TPMS_EMPTY; // (Part 2: Structures) + +typedef struct +{ // (Part 2: Structures) + TPM_ALG_ID alg; + TPMA_ALGORITHM attributes; +} TPMS_ALGORITHM_DESCRIPTION; + +typedef union +{ // (Part 2: Structures) +#if ALG_SHA1 + BYTE sha1[SHA1_DIGEST_SIZE]; +#endif // ALG_SHA1 +#if ALG_SHA256 + BYTE sha256[SHA256_DIGEST_SIZE]; +#endif // ALG_SHA256 +#if ALG_SHA256_192 + BYTE sha256_192[SHA256_192_DIGEST_SIZE]; +#endif // ALG_SHA256_192 +#if ALG_SHA3_256 + BYTE sha3_256[SHA3_256_DIGEST_SIZE]; +#endif // ALG_SHA3_256 +#if ALG_SHA3_384 + BYTE sha3_384[SHA3_384_DIGEST_SIZE]; +#endif // ALG_SHA3_384 +#if ALG_SHA3_512 + BYTE sha3_512[SHA3_512_DIGEST_SIZE]; +#endif // ALG_SHA3_512 +#if ALG_SHA384 + BYTE sha384[SHA384_DIGEST_SIZE]; +#endif // ALG_SHA384 +#if ALG_SHA512 + BYTE sha512[SHA512_DIGEST_SIZE]; +#endif // ALG_SHA512 +#if ALG_SHAKE256_192 + BYTE shake256_192[SHAKE256_192_DIGEST_SIZE]; +#endif // ALG_SHAKE256_192 +#if ALG_SHAKE256_256 + BYTE shake256_256[SHAKE256_256_DIGEST_SIZE]; +#endif // ALG_SHAKE256_256 +#if ALG_SHAKE256_512 + BYTE shake256_512[SHAKE256_512_DIGEST_SIZE]; +#endif // ALG_SHAKE256_512 +#if ALG_SM3_256 + BYTE sm3_256[SM3_256_DIGEST_SIZE]; +#endif // ALG_SM3_256 +} TPMU_HA; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_HASH hashAlg; + TPMU_HA digest; +} TPMT_HA; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[sizeof(TPMU_HA)]; + } t; + TPM2B b; +} TPM2B_DIGEST; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[sizeof(TPMT_HA)]; + } t; + TPM2B b; +} TPM2B_DATA; + +// Table "Definition of Types for TPM2B_NONCE" (Part 2: Structures) +typedef TPM2B_DIGEST TPM2B_NONCE; +#define TYPE_OF_TPM2B_NONCE TPM2B_DIGEST + +// Table "Definition of Types for TPM2B_AUTH" (Part 2: Structures) +typedef TPM2B_DIGEST TPM2B_AUTH; +#define TYPE_OF_TPM2B_AUTH TPM2B_DIGEST + +// Table "Definition of Types for TPM2B_OPERAND" (Part 2: Structures) +typedef TPM2B_DIGEST TPM2B_OPERAND; +#define TYPE_OF_TPM2B_OPERAND TPM2B_DIGEST + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[1024]; + } t; + TPM2B b; +} TPM2B_EVENT; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[MAX_DIGEST_BUFFER]; + } t; + TPM2B b; +} TPM2B_MAX_BUFFER; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[MAX_NV_BUFFER_SIZE]; + } t; + TPM2B b; +} TPM2B_MAX_NV_BUFFER; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[sizeof(UINT64)]; + } t; + TPM2B b; +} TPM2B_TIMEOUT; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[MAX_SYM_BLOCK_SIZE]; + } t; + TPM2B b; +} TPM2B_IV; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[512]; + } t; + TPM2B b; +} TPM2B_VENDOR_PROPERTY; + +typedef union +{ // (Part 2: Structures) + TPMT_HA digest; + TPM_HANDLE handle; +} TPMU_NAME; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE name[sizeof(TPMU_NAME)]; + } t; + TPM2B b; +} TPM2B_NAME; + +typedef struct +{ // (Part 2: Structures) + UINT8 sizeofSelect; + BYTE pcrSelect[PCR_SELECT_MAX]; +} TPMS_PCR_SELECT; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_HASH hash; + UINT8 sizeofSelect; + BYTE pcrSelect[PCR_SELECT_MAX]; +} TPMS_PCR_SELECTION; + +typedef struct +{ // (Part 2: Structures) + TPM_ST tag; + TPMI_RH_HIERARCHY hierarchy; + TPM2B_DIGEST digest; +} TPMT_TK_CREATION; + +typedef struct +{ // (Part 2: Structures) + TPM_ST tag; + TPMI_RH_HIERARCHY hierarchy; + TPM2B_DIGEST digest; +} TPMT_TK_VERIFIED; + +typedef struct +{ // (Part 2: Structures) + TPM_ST tag; + TPMI_RH_HIERARCHY hierarchy; + TPM2B_DIGEST digest; +} TPMT_TK_AUTH; + +typedef struct +{ // (Part 2: Structures) + TPM_ST tag; + TPMI_RH_HIERARCHY hierarchy; + TPM2B_DIGEST digest; +} TPMT_TK_HASHCHECK; + +typedef struct +{ // (Part 2: Structures) + TPM_ALG_ID alg; + TPMA_ALGORITHM algProperties; +} TPMS_ALG_PROPERTY; + +typedef struct +{ // (Part 2: Structures) + TPM_PT property; + UINT32 value; +} TPMS_TAGGED_PROPERTY; + +typedef struct +{ // (Part 2: Structures) + TPM_PT_PCR tag; + UINT8 sizeofSelect; + BYTE pcrSelect[PCR_SELECT_MAX]; +} TPMS_TAGGED_PCR_SELECT; + +typedef struct +{ // (Part 2: Structures) + TPM_HANDLE handle; + TPMT_HA policyHash; +} TPMS_TAGGED_POLICY; + +typedef struct +{ // (Part 2: Structures) + TPM_HANDLE handle; + UINT32 timeout; + TPMA_ACT attributes; +} TPMS_ACT_DATA; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPM_CC commandCodes[MAX_CAP_CC]; +} TPML_CC; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPMA_CC commandAttributes[MAX_CAP_CC]; +} TPML_CCA; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPM_ALG_ID algorithms[MAX_ALG_LIST_SIZE]; +} TPML_ALG; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPM_HANDLE handle[MAX_CAP_HANDLES]; +} TPML_HANDLE; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPM2B_DIGEST digests[8]; +} TPML_DIGEST; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPMT_HA digests[HASH_COUNT]; +} TPML_DIGEST_VALUES; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPMS_PCR_SELECTION pcrSelections[HASH_COUNT]; +} TPML_PCR_SELECTION; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPMS_ALG_PROPERTY algProperties[MAX_CAP_ALGS]; +} TPML_ALG_PROPERTY; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPMS_TAGGED_PROPERTY tpmProperty[MAX_TPM_PROPERTIES]; +} TPML_TAGGED_TPM_PROPERTY; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPMS_TAGGED_PCR_SELECT pcrProperty[MAX_PCR_PROPERTIES]; +} TPML_TAGGED_PCR_PROPERTY; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPM_ECC_CURVE eccCurves[MAX_ECC_CURVES]; +} TPML_ECC_CURVE; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPMS_TAGGED_POLICY policies[MAX_TAGGED_POLICIES]; +} TPML_TAGGED_POLICY; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPMS_ACT_DATA actData[MAX_ACT_DATA]; +} TPML_ACT_DATA; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPM2B_VENDOR_PROPERTY vendorData[MAX_VENDOR_PROPERTY]; +} TPML_VENDOR_PROPERTY; + +typedef union +{ // (Part 2: Structures) + TPML_ALG_PROPERTY algorithms; + TPML_HANDLE handles; + TPML_CCA command; + TPML_CC ppCommands; + TPML_CC auditCommands; + TPML_PCR_SELECTION assignedPCR; + TPML_TAGGED_TPM_PROPERTY tpmProperties; + TPML_TAGGED_PCR_PROPERTY pcrProperties; +#if ALG_ECC + TPML_ECC_CURVE eccCurves; +#endif // ALG_ECC + TPML_TAGGED_POLICY authPolicies; + TPML_ACT_DATA actData; +} TPMU_CAPABILITIES; + +typedef struct +{ // (Part 2: Structures) + TPM_CAP capability; + TPMU_CAPABILITIES data; +} TPMS_CAPABILITY_DATA; + +typedef union +{ // (Part 2: Structures) + // NOTE: No settable capabilities are implemented in this reference code. + UINT32 reserved; // some compilers don't support empty unions in C +} TPMU_SET_CAPABILITIES; + +typedef struct +{ // (Part 2: Structures) + TPM_CAP setCapability; + TPMU_SET_CAPABILITIES data; +} TPMS_SET_CAPABILITY_DATA; + +typedef struct +{ // (Part 2: Structures) + UINT16 size; + TPMS_SET_CAPABILITY_DATA setCapabilityData; +} TPM2B_SET_CAPABILITY_DATA; + +typedef struct +{ // (Part 2: Structures) + UINT64 clock; + UINT32 resetCount; + UINT32 restartCount; + TPMI_YES_NO safe; +} TPMS_CLOCK_INFO; + +typedef struct +{ // (Part 2: Structures) + UINT64 time; + TPMS_CLOCK_INFO clockInfo; +} TPMS_TIME_INFO; + +typedef struct +{ // (Part 2: Structures) + TPMS_TIME_INFO time; + UINT64 firmwareVersion; +} TPMS_TIME_ATTEST_INFO; + +typedef struct +{ // (Part 2: Structures) + TPM2B_NAME name; + TPM2B_NAME qualifiedName; +} TPMS_CERTIFY_INFO; + +typedef struct +{ // (Part 2: Structures) + TPML_PCR_SELECTION pcrSelect; + TPM2B_DIGEST pcrDigest; +} TPMS_QUOTE_INFO; + +typedef struct +{ // (Part 2: Structures) + UINT64 auditCounter; + TPM_ALG_ID digestAlg; + TPM2B_DIGEST auditDigest; + TPM2B_DIGEST commandDigest; +} TPMS_COMMAND_AUDIT_INFO; + +typedef struct +{ // (Part 2: Structures) + TPMI_YES_NO exclusiveSession; + TPM2B_DIGEST sessionDigest; +} TPMS_SESSION_AUDIT_INFO; + +typedef struct +{ // (Part 2: Structures) + TPM2B_NAME objectName; + TPM2B_DIGEST creationHash; +} TPMS_CREATION_INFO; + +typedef struct +{ // (Part 2: Structures) + TPM2B_NAME indexName; + UINT16 offset; + TPM2B_MAX_NV_BUFFER nvContents; +} TPMS_NV_CERTIFY_INFO; + +typedef struct +{ // (Part 2: Structures) + TPM2B_NAME indexName; + TPM2B_DIGEST nvDigest; +} TPMS_NV_DIGEST_CERTIFY_INFO; + +typedef TPM_ST TPMI_ST_ATTEST; // (Part 2: Structures) +typedef union +{ // (Part 2: Structures) + TPMS_CERTIFY_INFO certify; + TPMS_CREATION_INFO creation; + TPMS_QUOTE_INFO quote; + TPMS_COMMAND_AUDIT_INFO commandAudit; + TPMS_SESSION_AUDIT_INFO sessionAudit; + TPMS_TIME_ATTEST_INFO time; + TPMS_NV_CERTIFY_INFO nv; + TPMS_NV_DIGEST_CERTIFY_INFO nvDigest; +} TPMU_ATTEST; + +typedef struct +{ // (Part 2: Structures) + TPM_CONSTANTS32 magic; + TPMI_ST_ATTEST type; + TPM2B_NAME qualifiedSigner; + TPM2B_DATA extraData; + TPMS_CLOCK_INFO clockInfo; + UINT64 firmwareVersion; + TPMU_ATTEST attested; +} TPMS_ATTEST; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE attestationData[sizeof(TPMS_ATTEST)]; + } t; + TPM2B b; +} TPM2B_ATTEST; + +typedef struct +{ // (Part 2: Structures) + TPMI_SH_AUTH_SESSION sessionHandle; + TPM2B_NONCE nonce; + TPMA_SESSION sessionAttributes; + TPM2B_AUTH hmac; +} TPMS_AUTH_COMMAND; + +typedef struct +{ // (Part 2: Structures) + TPM2B_NONCE nonce; + TPMA_SESSION sessionAttributes; + TPM2B_AUTH hmac; +} TPMS_AUTH_RESPONSE; + +typedef TPM_KEY_BITS TPMI_AES_KEY_BITS; // (Part 2: Structures) +typedef TPM_KEY_BITS TPMI_SM4_KEY_BITS; // (Part 2: Structures) +typedef TPM_KEY_BITS TPMI_CAMELLIA_KEY_BITS; // (Part 2: Structures) +typedef union +{ // (Part 2: Structures) +#if ALG_AES + TPMI_AES_KEY_BITS aes; +#endif // ALG_AES +#if ALG_SM4 + TPMI_SM4_KEY_BITS sm4; +#endif // ALG_SM4 +#if ALG_CAMELLIA + TPMI_CAMELLIA_KEY_BITS camellia; +#endif // ALG_CAMELLIA + TPM_KEY_BITS sym; +#if ALG_XOR + TPMI_ALG_HASH xor ; +#endif // ALG_XOR +} TPMU_SYM_KEY_BITS; + +typedef union +{ // (Part 2: Structures) +#if ALG_AES + TPMI_ALG_SYM_MODE aes; +#endif // ALG_AES +#if ALG_SM4 + TPMI_ALG_SYM_MODE sm4; +#endif // ALG_SM4 +#if ALG_CAMELLIA + TPMI_ALG_SYM_MODE camellia; +#endif // ALG_CAMELLIA + TPMI_ALG_SYM_MODE sym; +} TPMU_SYM_MODE; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_SYM algorithm; + TPMU_SYM_KEY_BITS keyBits; + TPMU_SYM_MODE mode; +} TPMT_SYM_DEF; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_SYM_OBJECT algorithm; + TPMU_SYM_KEY_BITS keyBits; + TPMU_SYM_MODE mode; +} TPMT_SYM_DEF_OBJECT; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[MAX_SYM_KEY_BYTES]; + } t; + TPM2B b; +} TPM2B_SYM_KEY; + +typedef struct +{ // (Part 2: Structures) + TPMT_SYM_DEF_OBJECT sym; +} TPMS_SYMCIPHER_PARMS; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[LABEL_MAX_BUFFER]; + } t; + TPM2B b; +} TPM2B_LABEL; + +typedef struct +{ // (Part 2: Structures) + TPM2B_LABEL label; + TPM2B_LABEL context; +} TPMS_DERIVE; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[sizeof(TPMS_DERIVE)]; + } t; + TPM2B b; +} TPM2B_DERIVE; + +typedef union +{ // (Part 2: Structures) + BYTE create[MAX_SYM_DATA]; + TPMS_DERIVE derive; +} TPMU_SENSITIVE_CREATE; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[sizeof(TPMU_SENSITIVE_CREATE)]; + } t; + TPM2B b; +} TPM2B_SENSITIVE_DATA; + +typedef struct +{ // (Part 2: Structures) + TPM2B_AUTH userAuth; + TPM2B_SENSITIVE_DATA data; +} TPMS_SENSITIVE_CREATE; + +typedef struct +{ // (Part 2: Structures) + UINT16 size; + TPMS_SENSITIVE_CREATE sensitive; +} TPM2B_SENSITIVE_CREATE; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_HASH hashAlg; +} TPMS_SCHEME_HASH; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_HASH hashAlg; + UINT16 count; +} TPMS_SCHEME_ECDAA; + +typedef TPM_ALG_ID TPMI_ALG_KEYEDHASH_SCHEME; // (Part 2: Structures) + +// Table "Definition of Types for HMAC_SIG_SCHEME" (Part 2: Structures) +typedef TPMS_SCHEME_HASH TPMS_SCHEME_HMAC; +#define TYPE_OF_TPMS_SCHEME_HMAC TPMS_SCHEME_HASH + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_HASH hashAlg; + TPMI_ALG_KDF kdf; +} TPMS_SCHEME_XOR; + +typedef union +{ // (Part 2: Structures) +#if ALG_HMAC + TPMS_SCHEME_HMAC hmac; +#endif // ALG_HMAC +#if ALG_XOR + TPMS_SCHEME_XOR xor ; +#endif // ALG_XOR +} TPMU_SCHEME_KEYEDHASH; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_KEYEDHASH_SCHEME scheme; + TPMU_SCHEME_KEYEDHASH details; +} TPMT_KEYEDHASH_SCHEME; + +// Table "Definition of Types for RSA Signature Schemes" (Part 2: Structures) +typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_RSAPSS; +#define TYPE_OF_TPMS_SIG_SCHEME_RSAPSS TPMS_SCHEME_HASH +typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_RSASSA; +#define TYPE_OF_TPMS_SIG_SCHEME_RSASSA TPMS_SCHEME_HASH + +// Table "Definition of Types for ECC Signature Schemes" (Part 2: Structures) +typedef TPMS_SCHEME_ECDAA TPMS_SIG_SCHEME_ECDAA; +#define TYPE_OF_TPMS_SIG_SCHEME_ECDAA TPMS_SCHEME_ECDAA +typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_ECDSA; +#define TYPE_OF_TPMS_SIG_SCHEME_ECDSA TPMS_SCHEME_HASH +typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_ECSCHNORR; +#define TYPE_OF_TPMS_SIG_SCHEME_ECSCHNORR TPMS_SCHEME_HASH +typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_EDDSA; +#define TYPE_OF_TPMS_SIG_SCHEME_EDDSA TPMS_SCHEME_HASH +typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_EDDSA_PH; +#define TYPE_OF_TPMS_SIG_SCHEME_EDDSA_PH TPMS_SCHEME_HASH +typedef TPMS_SCHEME_HASH TPMS_SIG_SCHEME_SM2; +#define TYPE_OF_TPMS_SIG_SCHEME_SM2 TPMS_SCHEME_HASH + +typedef union +{ // (Part 2: Structures) +#if ALG_HMAC + TPMS_SCHEME_HMAC hmac; +#endif // ALG_HMAC +#if ALG_RSASSA + TPMS_SIG_SCHEME_RSASSA rsassa; +#endif // ALG_RSASSA +#if ALG_RSAPSS + TPMS_SIG_SCHEME_RSAPSS rsapss; +#endif // ALG_RSAPSS +#if ALG_ECDSA + TPMS_SIG_SCHEME_ECDSA ecdsa; +#endif // ALG_ECDSA +#if ALG_ECDAA + TPMS_SIG_SCHEME_ECDAA ecdaa; +#endif // ALG_ECDAA +#if ALG_SM2 + TPMS_SIG_SCHEME_SM2 sm2; +#endif // ALG_SM2 +#if ALG_ECSCHNORR + TPMS_SIG_SCHEME_ECSCHNORR ecschnorr; +#endif // ALG_ECSCHNORR +#if ALG_EDDSA + TPMS_SIG_SCHEME_EDDSA eddsa; +#endif // ALG_EDDSA +#if ALG_EDDSA_PH + TPMS_SIG_SCHEME_EDDSA_PH eddsa_ph; +#endif // ALG_EDDSA_PH +#if ALG_LMS + TPMS_SIG_SCHEME_LMS lms; +#endif // ALG_LMS +#if ALG_XMSS + TPMS_SIG_SCHEME_XMSS xmss; +#endif // ALG_XMSS + TPMS_SCHEME_HASH any; +} TPMU_SIG_SCHEME; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_SIG_SCHEME scheme; + TPMU_SIG_SCHEME details; +} TPMT_SIG_SCHEME; + +// Table "Definition of Types for Encryption Schemes" (Part 2: Structures) +typedef TPMS_EMPTY TPMS_ENC_SCHEME_RSAES; +#define TYPE_OF_TPMS_ENC_SCHEME_RSAES TPMS_EMPTY +typedef TPMS_SCHEME_HASH TPMS_ENC_SCHEME_OAEP; +#define TYPE_OF_TPMS_ENC_SCHEME_OAEP TPMS_SCHEME_HASH + +// Table "Definition of Types for ECC Key Exchange" (Part 2: Structures) +typedef TPMS_SCHEME_HASH TPMS_KEY_SCHEME_ECDH; +#define TYPE_OF_TPMS_KEY_SCHEME_ECDH TPMS_SCHEME_HASH +typedef TPMS_SCHEME_HASH TPMS_KEY_SCHEME_ECMQV; +#define TYPE_OF_TPMS_KEY_SCHEME_ECMQV TPMS_SCHEME_HASH +typedef TPMS_SCHEME_HASH TPMS_KEY_SCHEME_SM2; +#define TYPE_OF_TPMS_KEY_SCHEME_SM2 TPMS_SCHEME_HASH + +// Table "Definition of Types for KDF Schemes" (Part 2: Structures) +typedef TPMS_SCHEME_HASH TPMS_KDF_SCHEME_KDF1_SP800_108; +#define TYPE_OF_TPMS_KDF_SCHEME_KDF1_SP800_108 TPMS_SCHEME_HASH +typedef TPMS_SCHEME_HASH TPMS_KDF_SCHEME_KDF1_SP800_56A; +#define TYPE_OF_TPMS_KDF_SCHEME_KDF1_SP800_56A TPMS_SCHEME_HASH +typedef TPMS_SCHEME_HASH TPMS_KDF_SCHEME_KDF2; +#define TYPE_OF_TPMS_KDF_SCHEME_KDF2 TPMS_SCHEME_HASH +typedef TPMS_SCHEME_HASH TPMS_KDF_SCHEME_MGF1; +#define TYPE_OF_TPMS_KDF_SCHEME_MGF1 TPMS_SCHEME_HASH + +typedef union +{ // (Part 2: Structures) + TPMS_SCHEME_HASH anyKdf; +#if ALG_MGF1 + TPMS_KDF_SCHEME_MGF1 mgf1; +#endif // ALG_MGF1 +#if ALG_KDF1_SP800_56A + TPMS_KDF_SCHEME_KDF1_SP800_56A kdf1_sp800_56a; +#endif // ALG_KDF1_SP800_56A +#if ALG_KDF2 + TPMS_KDF_SCHEME_KDF2 kdf2; +#endif // ALG_KDF2 +#if ALG_KDF1_SP800_108 + TPMS_KDF_SCHEME_KDF1_SP800_108 kdf1_sp800_108; +#endif // ALG_KDF1_SP800_108 +} TPMU_KDF_SCHEME; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_KDF scheme; + TPMU_KDF_SCHEME details; +} TPMT_KDF_SCHEME; + +typedef TPM_ALG_ID TPMI_ALG_ASYM_SCHEME; // (Part 2: Structures) +typedef union +{ // (Part 2: Structures) + TPMS_SCHEME_HASH anySig; +#if ALG_RSASSA + TPMS_SIG_SCHEME_RSASSA rsassa; +#endif // ALG_RSASSA +#if ALG_RSAES + TPMS_ENC_SCHEME_RSAES rsaes; +#endif // ALG_RSAES +#if ALG_RSAPSS + TPMS_SIG_SCHEME_RSAPSS rsapss; +#endif // ALG_RSAPSS +#if ALG_OAEP + TPMS_ENC_SCHEME_OAEP oaep; +#endif // ALG_OAEP +#if ALG_ECDSA + TPMS_SIG_SCHEME_ECDSA ecdsa; +#endif // ALG_ECDSA +#if ALG_ECDH + TPMS_KEY_SCHEME_ECDH ecdh; +#endif // ALG_ECDH +#if ALG_ECDAA + TPMS_SIG_SCHEME_ECDAA ecdaa; +#endif // ALG_ECDAA +#if ALG_SM2 + TPMS_KEY_SCHEME_SM2 sm2; +#endif // ALG_SM2 +#if ALG_ECSCHNORR + TPMS_SIG_SCHEME_ECSCHNORR ecschnorr; +#endif // ALG_ECSCHNORR +#if ALG_ECMQV + TPMS_KEY_SCHEME_ECMQV ecmqv; +#endif // ALG_ECMQV +#if ALG_EDDSA + TPMS_SIG_SCHEME_EDDSA eddsa; +#endif // ALG_EDDSA +#if ALG_EDDSA_PH + TPMS_SIG_SCHEME_EDDSA_PH eddsa_ph; +#endif // ALG_EDDSA_PH +#if ALG_LMS + TPMS_SIG_SCHEME_LMS lms; +#endif // ALG_LMS +#if ALG_XMSS + TPMS_SIG_SCHEME_XMSS xmss; +#endif // ALG_XMSS +} TPMU_ASYM_SCHEME; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_ASYM_SCHEME scheme; + TPMU_ASYM_SCHEME details; +} TPMT_ASYM_SCHEME; + +typedef TPM_ALG_ID TPMI_ALG_RSA_SCHEME; // (Part 2: Structures) +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_RSA_SCHEME scheme; + TPMU_ASYM_SCHEME details; +} TPMT_RSA_SCHEME; + +typedef TPM_ALG_ID TPMI_ALG_RSA_DECRYPT; // (Part 2: Structures) +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_RSA_DECRYPT scheme; + TPMU_ASYM_SCHEME details; +} TPMT_RSA_DECRYPT; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[MAX_RSA_KEY_BYTES]; + } t; + TPM2B b; +} TPM2B_PUBLIC_KEY_RSA; + +typedef TPM_KEY_BITS TPMI_RSA_KEY_BITS; // (Part 2: Structures) +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[RSA_PRIVATE_SIZE]; + } t; + TPM2B b; +} TPM2B_PRIVATE_KEY_RSA; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[MAX_ECC_KEY_BYTES]; + } t; + TPM2B b; +} TPM2B_ECC_PARAMETER; + +typedef struct +{ // (Part 2: Structures) + TPM2B_ECC_PARAMETER x; + TPM2B_ECC_PARAMETER y; +} TPMS_ECC_POINT; + +typedef struct +{ // (Part 2: Structures) + UINT16 size; + TPMS_ECC_POINT point; +} TPM2B_ECC_POINT; + +typedef TPM_ALG_ID TPMI_ALG_ECC_SCHEME; // (Part 2: Structures) +typedef TPM_ECC_CURVE TPMI_ECC_CURVE; // (Part 2: Structures) +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_ECC_SCHEME scheme; + TPMU_ASYM_SCHEME details; +} TPMT_ECC_SCHEME; + +typedef struct +{ // (Part 2: Structures) + TPM_ECC_CURVE curveID; + UINT16 keySize; + TPMT_KDF_SCHEME kdf; + TPMT_ECC_SCHEME sign; + TPM2B_ECC_PARAMETER p; + TPM2B_ECC_PARAMETER a; + TPM2B_ECC_PARAMETER b; + TPM2B_ECC_PARAMETER gX; + TPM2B_ECC_PARAMETER gY; + TPM2B_ECC_PARAMETER n; + TPM2B_ECC_PARAMETER h; +} TPMS_ALGORITHM_DETAIL_ECC; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_HASH hash; + TPM2B_PUBLIC_KEY_RSA sig; +} TPMS_SIGNATURE_RSA; + +// Table "Definition of Types for Signature" (Part 2: Structures) +typedef TPMS_SIGNATURE_RSA TPMS_SIGNATURE_RSAPSS; +#define TYPE_OF_TPMS_SIGNATURE_RSAPSS TPMS_SIGNATURE_RSA +typedef TPMS_SIGNATURE_RSA TPMS_SIGNATURE_RSASSA; +#define TYPE_OF_TPMS_SIGNATURE_RSASSA TPMS_SIGNATURE_RSA + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_HASH hash; + TPM2B_ECC_PARAMETER signatureR; + TPM2B_ECC_PARAMETER signatureS; +} TPMS_SIGNATURE_ECC; + +// Table "Definition of Types for TPMS_SIGNATURE_ECC" (Part 2: Structures) +typedef TPMS_SIGNATURE_ECC TPMS_SIGNATURE_ECDAA; +#define TYPE_OF_TPMS_SIGNATURE_ECDAA TPMS_SIGNATURE_ECC +typedef TPMS_SIGNATURE_ECC TPMS_SIGNATURE_ECDSA; +#define TYPE_OF_TPMS_SIGNATURE_ECDSA TPMS_SIGNATURE_ECC +typedef TPMS_SIGNATURE_ECC TPMS_SIGNATURE_ECSCHNORR; +#define TYPE_OF_TPMS_SIGNATURE_ECSCHNORR TPMS_SIGNATURE_ECC +typedef TPMS_SIGNATURE_ECC TPMS_SIGNATURE_EDDSA; +#define TYPE_OF_TPMS_SIGNATURE_EDDSA TPMS_SIGNATURE_ECC +typedef TPMS_SIGNATURE_ECC TPMS_SIGNATURE_EDDSA_PH; +#define TYPE_OF_TPMS_SIGNATURE_EDDSA_PH TPMS_SIGNATURE_ECC +typedef TPMS_SIGNATURE_ECC TPMS_SIGNATURE_SM2; +#define TYPE_OF_TPMS_SIGNATURE_SM2 TPMS_SIGNATURE_ECC + +typedef union +{ // (Part 2: Structures) +#if ALG_HMAC + TPMT_HA hmac; +#endif // ALG_HMAC +#if ALG_RSASSA + TPMS_SIGNATURE_RSASSA rsassa; +#endif // ALG_RSASSA +#if ALG_RSAPSS + TPMS_SIGNATURE_RSAPSS rsapss; +#endif // ALG_RSAPSS +#if ALG_ECDSA + TPMS_SIGNATURE_ECDSA ecdsa; +#endif // ALG_ECDSA +#if ALG_ECDAA + TPMS_SIGNATURE_ECDAA ecdaa; +#endif // ALG_ECDAA +#if ALG_SM2 + TPMS_SIGNATURE_SM2 sm2; +#endif // ALG_SM2 +#if ALG_ECSCHNORR + TPMS_SIGNATURE_ECSCHNORR ecschnorr; +#endif // ALG_ECSCHNORR +#if ALG_EDDSA + TPMS_SIGNATURE_EDDSA eddsa; +#endif // ALG_EDDSA +#if ALG_EDDSA_PH + TPMS_SIGNATURE_EDDSA_PH eddsa_ph; +#endif // ALG_EDDSA_PH +#if ALG_LMS + TPMS_SIGNATURE_LMS lms; +#endif // ALG_LMS +#if ALG_XMSS + TPMS_SIGNATURE_XMSS xmss; +#endif // ALG_XMSS + TPMS_SCHEME_HASH any; +} TPMU_SIGNATURE; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_SIG_SCHEME sigAlg; + TPMU_SIGNATURE signature; +} TPMT_SIGNATURE; + +typedef union +{ // (Part 2: Structures) +#if ALG_ECC + BYTE ecc[sizeof(TPMS_ECC_POINT)]; +#endif // ALG_ECC +#if ALG_RSA + BYTE rsa[MAX_RSA_KEY_BYTES]; +#endif // ALG_RSA +#if ALG_SYMCIPHER + BYTE symmetric[sizeof(TPM2B_DIGEST)]; +#endif // ALG_SYMCIPHER +#if ALG_KEYEDHASH + BYTE keyedHash[sizeof(TPM2B_DIGEST)]; +#endif // ALG_KEYEDHASH +} TPMU_ENCRYPTED_SECRET; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE secret[sizeof(TPMU_ENCRYPTED_SECRET)]; + } t; + TPM2B b; +} TPM2B_ENCRYPTED_SECRET; + +typedef TPM_ALG_ID TPMI_ALG_PUBLIC; // (Part 2: Structures) +typedef union +{ // (Part 2: Structures) +#if ALG_KEYEDHASH + TPM2B_DIGEST keyedHash; +#endif // ALG_KEYEDHASH +#if ALG_SYMCIPHER + TPM2B_DIGEST sym; +#endif // ALG_SYMCIPHER +#if ALG_RSA + TPM2B_PUBLIC_KEY_RSA rsa; +#endif // ALG_RSA +#if ALG_ECC + TPMS_ECC_POINT ecc; +#endif // ALG_ECC + TPMS_DERIVE derive; +} TPMU_PUBLIC_ID; + +typedef struct +{ // (Part 2: Structures) + TPMT_KEYEDHASH_SCHEME scheme; +} TPMS_KEYEDHASH_PARMS; + +typedef struct +{ // (Part 2: Structures) + TPMT_SYM_DEF_OBJECT symmetric; + TPMT_ASYM_SCHEME scheme; +} TPMS_ASYM_PARMS; + +typedef struct +{ // (Part 2: Structures) + TPMT_SYM_DEF_OBJECT symmetric; + TPMT_RSA_SCHEME scheme; + TPMI_RSA_KEY_BITS keyBits; + UINT32 exponent; +} TPMS_RSA_PARMS; + +typedef struct +{ // (Part 2: Structures) + TPMT_SYM_DEF_OBJECT symmetric; + TPMT_ECC_SCHEME scheme; + TPMI_ECC_CURVE curveID; + TPMT_KDF_SCHEME kdf; +} TPMS_ECC_PARMS; + +typedef union +{ // (Part 2: Structures) +#if ALG_KEYEDHASH + TPMS_KEYEDHASH_PARMS keyedHashDetail; +#endif // ALG_KEYEDHASH +#if ALG_SYMCIPHER + TPMS_SYMCIPHER_PARMS symDetail; +#endif // ALG_SYMCIPHER +#if ALG_RSA + TPMS_RSA_PARMS rsaDetail; +#endif // ALG_RSA +#if ALG_ECC + TPMS_ECC_PARMS eccDetail; +#endif // ALG_ECC + TPMS_ASYM_PARMS asymDetail; +} TPMU_PUBLIC_PARMS; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_PUBLIC type; + TPMU_PUBLIC_PARMS parameters; +} TPMT_PUBLIC_PARMS; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_PUBLIC type; + TPMI_ALG_HASH nameAlg; + TPMA_OBJECT objectAttributes; + TPM2B_DIGEST authPolicy; + TPMU_PUBLIC_PARMS parameters; + TPMU_PUBLIC_ID unique; +} TPMT_PUBLIC; + +typedef struct +{ // (Part 2: Structures) + UINT16 size; + TPMT_PUBLIC publicArea; +} TPM2B_PUBLIC; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[sizeof(TPMT_PUBLIC)]; + } t; + TPM2B b; +} TPM2B_TEMPLATE; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[PRIVATE_VENDOR_SPECIFIC_BYTES]; + } t; + TPM2B b; +} TPM2B_PRIVATE_VENDOR_SPECIFIC; + +typedef union +{ // (Part 2: Structures) +#if ALG_RSA + TPM2B_PRIVATE_KEY_RSA rsa; +#endif // ALG_RSA +#if ALG_ECC + TPM2B_ECC_PARAMETER ecc; +#endif // ALG_ECC +#if ALG_KEYEDHASH + TPM2B_SENSITIVE_DATA bits; +#endif // ALG_KEYEDHASH +#if ALG_SYMCIPHER + TPM2B_SYM_KEY sym; +#endif // ALG_SYMCIPHER + TPM2B_PRIVATE_VENDOR_SPECIFIC any; +} TPMU_SENSITIVE_COMPOSITE; + +typedef struct +{ // (Part 2: Structures) + TPMI_ALG_PUBLIC sensitiveType; + TPM2B_AUTH authValue; + TPM2B_DIGEST seedValue; + TPMU_SENSITIVE_COMPOSITE sensitive; +} TPMT_SENSITIVE; + +typedef struct +{ // (Part 2: Structures) + UINT16 size; + TPMT_SENSITIVE sensitiveArea; +} TPM2B_SENSITIVE; + +typedef struct +{ // (Part 2: Structures) + TPM2B_DIGEST integrityOuter; + TPM2B_DIGEST integrityInner; + TPM2B_SENSITIVE sensitive; +} _PRIVATE; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[sizeof(_PRIVATE)]; + } t; + TPM2B b; +} TPM2B_PRIVATE; + +typedef struct +{ // (Part 2: Structures) + TPM2B_DIGEST integrityHMAC; + TPM2B_DIGEST encIdentity; +} TPMS_ID_OBJECT; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE credential[sizeof(TPMS_ID_OBJECT)]; + } t; + TPM2B b; +} TPM2B_ID_OBJECT; + +// Table "Definition of TPM_NV_INDEX Bits" (Part 2: Structures) +#define TYPE_OF_TPM_NV_INDEX UINT32 +#define TPM_NV_INDEX_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPM_NV_INDEX(a) (*((TPM_NV_INDEX*)&(a))) +#define TPM_NV_INDEX_TO_BYTE_ARRAY(i, a) \ + UINT32_TO_BYTE_ARRAY((TPM_NV_INDEX_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPM_NV_INDEX(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPM_NV_INDEX(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned index : 24; + unsigned RH_NV : 8; +} TPM_NV_INDEX; + +// Initializer for the bit-field structure +# define TPM_NV_INDEX_INITIALIZER(index, rh_nv) \ + { \ + index, rh_nv \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPM_NV_INDEX Bits" (Part 2: Structures) using bit masking +typedef UINT32 TPM_NV_INDEX; +# define TPM_NV_INDEX_index (TPM_NV_INDEX)(0xFFFFFF << 0) +# define TPM_NV_INDEX_index_SHIFT 0 +# define TPM_NV_INDEX_RH_NV (TPM_NV_INDEX)(0xFF << 24) +# define TPM_NV_INDEX_RH_NV_SHIFT 24 + +// This is the initializer for a TPM_NV_INDEX bit array. +# define TPM_NV_INDEX_INITIALIZER(index, rh_nv) \ + (TPM_NV_INDEX)((index << 0) + (rh_nv << 24)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPM_NT Constants" (Part 2: Structures) +typedef UINT32 TPM_NT; +#define TYPE_OF_TPM_NT UINT32 +#define TPM_NT_ORDINARY (TPM_NT)(0x0) +#define TPM_NT_COUNTER (TPM_NT)(0x1) +#define TPM_NT_BITS (TPM_NT)(0x2) +#define TPM_NT_EXTEND (TPM_NT)(0x4) +#define TPM_NT_PIN_FAIL (TPM_NT)(0x8) +#define TPM_NT_PIN_PASS (TPM_NT)(0x9) + +typedef struct +{ // (Part 2: Structures) + UINT32 pinCount; + UINT32 pinLimit; +} TPMS_NV_PIN_COUNTER_PARAMETERS; + +// Table "Definition of TPMA_NV Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_NV UINT32 +#define TPMA_NV_TO_UINT32(a) (*((UINT32*)&(a))) +#define UINT32_TO_TPMA_NV(a) (*((TPMA_NV*)&(a))) +#define TPMA_NV_TO_BYTE_ARRAY(i, a) UINT32_TO_BYTE_ARRAY((TPMA_NV_TO_UINT32(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_NV(i, a) \ + { \ + UINT32 x = BYTE_ARRAY_TO_UINT32(a); \ + i = UINT32_TO_TPMA_NV(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned PPWRITE : 1; + unsigned OWNERWRITE : 1; + unsigned AUTHWRITE : 1; + unsigned POLICYWRITE : 1; + unsigned TPM_NT : 4; + unsigned Reserved_bits_at_8 : 2; + unsigned POLICY_DELETE : 1; + unsigned WRITELOCKED : 1; + unsigned WRITEALL : 1; + unsigned WRITEDEFINE : 1; + unsigned WRITE_STCLEAR : 1; + unsigned GLOBALLOCK : 1; + unsigned PPREAD : 1; + unsigned OWNERREAD : 1; + unsigned AUTHREAD : 1; + unsigned POLICYREAD : 1; + unsigned Reserved_bits_at_20 : 5; + unsigned NO_DA : 1; + unsigned ORDERLY : 1; + unsigned CLEAR_STCLEAR : 1; + unsigned READLOCKED : 1; + unsigned WRITTEN : 1; + unsigned PLATFORMCREATE : 1; + unsigned READ_STCLEAR : 1; +} TPMA_NV; + +// Initializer for the bit-field structure +# define TPMA_NV_INITIALIZER(ppwrite, \ + ownerwrite, \ + authwrite, \ + policywrite, \ + tpm_nt, \ + bits_at_8, \ + policy_delete, \ + writelocked, \ + writeall, \ + writedefine, \ + write_stclear, \ + globallock, \ + ppread, \ + ownerread, \ + authread, \ + policyread, \ + bits_at_20, \ + no_da, \ + orderly, \ + clear_stclear, \ + readlocked, \ + written, \ + platformcreate, \ + read_stclear) \ + { \ + ppwrite, ownerwrite, authwrite, policywrite, tpm_nt, bits_at_8, \ + policy_delete, writelocked, writeall, writedefine, write_stclear, \ + globallock, ppread, ownerread, authread, policyread, bits_at_20, \ + no_da, orderly, clear_stclear, readlocked, written, platformcreate, \ + read_stclear \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_NV Bits" (Part 2: Structures) using bit masking +typedef UINT32 TPMA_NV; +# define TPMA_NV_PPWRITE (TPMA_NV)(1 << 0) +# define TPMA_NV_OWNERWRITE (TPMA_NV)(1 << 1) +# define TPMA_NV_AUTHWRITE (TPMA_NV)(1 << 2) +# define TPMA_NV_POLICYWRITE (TPMA_NV)(1 << 3) +# define TPMA_NV_TPM_NT (TPMA_NV)(0xF << 4) +# define TPMA_NV_TPM_NT_SHIFT 4 +# define TPMA_NV_POLICY_DELETE (TPMA_NV)(1 << 10) +# define TPMA_NV_WRITELOCKED (TPMA_NV)(1 << 11) +# define TPMA_NV_WRITEALL (TPMA_NV)(1 << 12) +# define TPMA_NV_WRITEDEFINE (TPMA_NV)(1 << 13) +# define TPMA_NV_WRITE_STCLEAR (TPMA_NV)(1 << 14) +# define TPMA_NV_GLOBALLOCK (TPMA_NV)(1 << 15) +# define TPMA_NV_PPREAD (TPMA_NV)(1 << 16) +# define TPMA_NV_OWNERREAD (TPMA_NV)(1 << 17) +# define TPMA_NV_AUTHREAD (TPMA_NV)(1 << 18) +# define TPMA_NV_POLICYREAD (TPMA_NV)(1 << 19) +# define TPMA_NV_NO_DA (TPMA_NV)(1 << 25) +# define TPMA_NV_ORDERLY (TPMA_NV)(1 << 26) +# define TPMA_NV_CLEAR_STCLEAR (TPMA_NV)(1 << 27) +# define TPMA_NV_READLOCKED (TPMA_NV)(1 << 28) +# define TPMA_NV_WRITTEN (TPMA_NV)(1 << 29) +# define TPMA_NV_PLATFORMCREATE (TPMA_NV)(1 << 30) +# define TPMA_NV_READ_STCLEAR (TPMA_NV)(1 << 31) + +// This is the initializer for a TPMA_NV bit array. +# define TPMA_NV_INITIALIZER(ppwrite, \ + ownerwrite, \ + authwrite, \ + policywrite, \ + tpm_nt, \ + bits_at_8, \ + policy_delete, \ + writelocked, \ + writeall, \ + writedefine, \ + write_stclear, \ + globallock, \ + ppread, \ + ownerread, \ + authread, \ + policyread, \ + bits_at_20, \ + no_da, \ + orderly, \ + clear_stclear, \ + readlocked, \ + written, \ + platformcreate, \ + read_stclear) \ + (TPMA_NV)((ppwrite << 0) + (ownerwrite << 1) + (authwrite << 2) \ + + (policywrite << 3) + (tpm_nt << 4) + (policy_delete << 10) \ + + (writelocked << 11) + (writeall << 12) + (writedefine << 13) \ + + (write_stclear << 14) + (globallock << 15) + (ppread << 16) \ + + (ownerread << 17) + (authread << 18) + (policyread << 19) \ + + (no_da << 25) + (orderly << 26) + (clear_stclear << 27) \ + + (readlocked << 28) + (written << 29) + (platformcreate << 30) \ + + (read_stclear << 31)) + +#endif // USE_BIT_FIELD_STRUCTURES + +// Table "Definition of TPMA_NV_EXP Bits" (Part 2: Structures) +#define TYPE_OF_TPMA_NV_EXP UINT64 +#define TPMA_NV_EXP_TO_UINT64(a) (*((UINT64*)&(a))) +#define UINT64_TO_TPMA_NV_EXP(a) (*((TPMA_NV_EXP*)&(a))) +#define TPMA_NV_EXP_TO_BYTE_ARRAY(i, a) \ + UINT64_TO_BYTE_ARRAY((TPMA_NV_EXP_TO_UINT64(i)), (a)) +#define BYTE_ARRAY_TO_TPMA_NV_EXP(i, a) \ + { \ + UINT64 x = BYTE_ARRAY_TO_UINT64(a); \ + i = UINT64_TO_TPMA_NV_EXP(x); \ + } +#if USE_BIT_FIELD_STRUCTURES +typedef struct +{ + unsigned TPMA_NV_PPWRITE : 1; + unsigned TPMA_NV_OWNERWRITE : 1; + unsigned TPMA_NV_AUTHWRITE : 1; + unsigned TPMA_NV_POLICYWRITE : 1; + unsigned TPM_NT : 4; + unsigned Reserved_bits_at_8 : 2; + unsigned TPMA_NV_POLICY_DELETE : 1; + unsigned TPMA_NV_WRITELOCKED : 1; + unsigned TPMA_NV_WRITEALL : 1; + unsigned TPMA_NV_WRITEDEFINE : 1; + unsigned TPMA_NV_WRITE_STCLEAR : 1; + unsigned TPMA_NV_GLOBALLOCK : 1; + unsigned TPMA_NV_PPREAD : 1; + unsigned TPMA_NV_OWNERREAD : 1; + unsigned TPMA_NV_AUTHREAD : 1; + unsigned TPMA_NV_POLICYREAD : 1; + unsigned Reserved_bits_at_20 : 5; + unsigned TPMA_NV_NO_DA : 1; + unsigned TPMA_NV_ORDERLY : 1; + unsigned TPMA_NV_CLEAR_STCLEAR : 1; + unsigned TPMA_NV_READLOCKED : 1; + unsigned TPMA_NV_WRITTEN : 1; + unsigned TPMA_NV_PLATFORMCREATE : 1; + unsigned TPMA_NV_READ_STCLEAR : 1; + unsigned TPMA_EXTERNAL_NV_ENCRYPTION : 1; + unsigned TPMA_EXTERNAL_NV_INTEGRITY : 1; + unsigned TPMA_EXTERNAL_NV_ANTIROLLBACK : 1; + unsigned Reserved_bits_at_35 : 29; +} TPMA_NV_EXP; + +// Initializer for the bit-field structure +# define TPMA_NV_EXP_INITIALIZER(tpma_nv_ppwrite, \ + tpma_nv_ownerwrite, \ + tpma_nv_authwrite, \ + tpma_nv_policywrite, \ + tpm_nt, \ + bits_at_8, \ + tpma_nv_policy_delete, \ + tpma_nv_writelocked, \ + tpma_nv_writeall, \ + tpma_nv_writedefine, \ + tpma_nv_write_stclear, \ + tpma_nv_globallock, \ + tpma_nv_ppread, \ + tpma_nv_ownerread, \ + tpma_nv_authread, \ + tpma_nv_policyread, \ + bits_at_20, \ + tpma_nv_no_da, \ + tpma_nv_orderly, \ + tpma_nv_clear_stclear, \ + tpma_nv_readlocked, \ + tpma_nv_written, \ + tpma_nv_platformcreate, \ + tpma_nv_read_stclear, \ + tpma_external_nv_encryption, \ + tpma_external_nv_integrity, \ + tpma_external_nv_antirollback, \ + bits_at_35) \ + { \ + tpma_nv_ppwrite, tpma_nv_ownerwrite, tpma_nv_authwrite, \ + tpma_nv_policywrite, tpm_nt, bits_at_8, tpma_nv_policy_delete, \ + tpma_nv_writelocked, tpma_nv_writeall, tpma_nv_writedefine, \ + tpma_nv_write_stclear, tpma_nv_globallock, tpma_nv_ppread, \ + tpma_nv_ownerread, tpma_nv_authread, tpma_nv_policyread, bits_at_20, \ + tpma_nv_no_da, tpma_nv_orderly, tpma_nv_clear_stclear, \ + tpma_nv_readlocked, tpma_nv_written, tpma_nv_platformcreate, \ + tpma_nv_read_stclear, tpma_external_nv_encryption, \ + tpma_external_nv_integrity, tpma_external_nv_antirollback, bits_at_35 \ + } +#else // USE_BIT_FIELD_STRUCTURES + +// This implements Table "Definition of TPMA_NV_EXP Bits" (Part 2: Structures) using bit masking +typedef UINT64 TPMA_NV_EXP; +# define TPMA_NV_EXP_TPMA_NV_PPWRITE (TPMA_NV_EXP)(1 << 0) +# define TPMA_NV_EXP_TPMA_NV_OWNERWRITE (TPMA_NV_EXP)(1 << 1) +# define TPMA_NV_EXP_TPMA_NV_AUTHWRITE (TPMA_NV_EXP)(1 << 2) +# define TPMA_NV_EXP_TPMA_NV_POLICYWRITE (TPMA_NV_EXP)(1 << 3) +# define TPMA_NV_EXP_TPM_NT (TPMA_NV_EXP)(0xF << 4) +# define TPMA_NV_EXP_TPM_NT_SHIFT 4 +# define TPMA_NV_EXP_TPMA_NV_POLICY_DELETE (TPMA_NV_EXP)(1 << 10) +# define TPMA_NV_EXP_TPMA_NV_WRITELOCKED (TPMA_NV_EXP)(1 << 11) +# define TPMA_NV_EXP_TPMA_NV_WRITEALL (TPMA_NV_EXP)(1 << 12) +# define TPMA_NV_EXP_TPMA_NV_WRITEDEFINE (TPMA_NV_EXP)(1 << 13) +# define TPMA_NV_EXP_TPMA_NV_WRITE_STCLEAR (TPMA_NV_EXP)(1 << 14) +# define TPMA_NV_EXP_TPMA_NV_GLOBALLOCK (TPMA_NV_EXP)(1 << 15) +# define TPMA_NV_EXP_TPMA_NV_PPREAD (TPMA_NV_EXP)(1 << 16) +# define TPMA_NV_EXP_TPMA_NV_OWNERREAD (TPMA_NV_EXP)(1 << 17) +# define TPMA_NV_EXP_TPMA_NV_AUTHREAD (TPMA_NV_EXP)(1 << 18) +# define TPMA_NV_EXP_TPMA_NV_POLICYREAD (TPMA_NV_EXP)(1 << 19) +# define TPMA_NV_EXP_TPMA_NV_NO_DA (TPMA_NV_EXP)(1 << 25) +# define TPMA_NV_EXP_TPMA_NV_ORDERLY (TPMA_NV_EXP)(1 << 26) +# define TPMA_NV_EXP_TPMA_NV_CLEAR_STCLEAR (TPMA_NV_EXP)(1 << 27) +# define TPMA_NV_EXP_TPMA_NV_READLOCKED (TPMA_NV_EXP)(1 << 28) +# define TPMA_NV_EXP_TPMA_NV_WRITTEN (TPMA_NV_EXP)(1 << 29) +# define TPMA_NV_EXP_TPMA_NV_PLATFORMCREATE (TPMA_NV_EXP)(1 << 30) +# define TPMA_NV_EXP_TPMA_NV_READ_STCLEAR (TPMA_NV_EXP)(1 << 31) +# define TPMA_NV_EXP_TPMA_EXTERNAL_NV_ENCRYPTION (TPMA_NV_EXP)(1 << 32) +# define TPMA_NV_EXP_TPMA_EXTERNAL_NV_INTEGRITY (TPMA_NV_EXP)(1 << 33) +# define TPMA_NV_EXP_TPMA_EXTERNAL_NV_ANTIROLLBACK (TPMA_NV_EXP)(1 << 34) + +// This is the initializer for a TPMA_NV_EXP bit array. +# define TPMA_NV_EXP_INITIALIZER(tpma_nv_ppwrite, \ + tpma_nv_ownerwrite, \ + tpma_nv_authwrite, \ + tpma_nv_policywrite, \ + tpm_nt, \ + bits_at_8, \ + tpma_nv_policy_delete, \ + tpma_nv_writelocked, \ + tpma_nv_writeall, \ + tpma_nv_writedefine, \ + tpma_nv_write_stclear, \ + tpma_nv_globallock, \ + tpma_nv_ppread, \ + tpma_nv_ownerread, \ + tpma_nv_authread, \ + tpma_nv_policyread, \ + bits_at_20, \ + tpma_nv_no_da, \ + tpma_nv_orderly, \ + tpma_nv_clear_stclear, \ + tpma_nv_readlocked, \ + tpma_nv_written, \ + tpma_nv_platformcreate, \ + tpma_nv_read_stclear, \ + tpma_external_nv_encryption, \ + tpma_external_nv_integrity, \ + tpma_external_nv_antirollback, \ + bits_at_35) \ + (TPMA_NV_EXP)((tpma_nv_ppwrite << 0) + (tpma_nv_ownerwrite << 1) \ + + (tpma_nv_authwrite << 2) + (tpma_nv_policywrite << 3) \ + + (tpm_nt << 4) + (tpma_nv_policy_delete << 10) \ + + (tpma_nv_writelocked << 11) + (tpma_nv_writeall << 12) \ + + (tpma_nv_writedefine << 13) + (tpma_nv_write_stclear << 14) \ + + (tpma_nv_globallock << 15) + (tpma_nv_ppread << 16) \ + + (tpma_nv_ownerread << 17) + (tpma_nv_authread << 18) \ + + (tpma_nv_policyread << 19) + (tpma_nv_no_da << 25) \ + + (tpma_nv_orderly << 26) + (tpma_nv_clear_stclear << 27) \ + + (tpma_nv_readlocked << 28) + (tpma_nv_written << 29) \ + + (tpma_nv_platformcreate << 30) + (tpma_nv_read_stclear << 31) \ + + (tpma_external_nv_encryption << 32) \ + + (tpma_external_nv_integrity << 33) \ + + (tpma_external_nv_antirollback << 34)) + +#endif // USE_BIT_FIELD_STRUCTURES + +typedef struct +{ // (Part 2: Structures) + TPMI_RH_NV_LEGACY_INDEX nvIndex; + TPMI_ALG_HASH nameAlg; + TPMA_NV attributes; + TPM2B_DIGEST authPolicy; + UINT16 dataSize; +} TPMS_NV_PUBLIC; + +typedef struct +{ // (Part 2: Structures) + UINT16 size; + TPMS_NV_PUBLIC nvPublic; +} TPM2B_NV_PUBLIC; + +typedef struct +{ // (Part 2: Structures) + TPMI_RH_NV_EXP_INDEX nvIndex; + TPMI_ALG_HASH nameAlg; + TPMA_NV_EXP attributes; + TPM2B_DIGEST authPolicy; + UINT16 dataSize; +} TPMS_NV_PUBLIC_EXP_ATTR; + +typedef union +{ // (Part 2: Structures) + TPMS_NV_PUBLIC nvIndex; + TPMS_NV_PUBLIC_EXP_ATTR externalNV; + TPMS_NV_PUBLIC permanentNV; +} TPMU_NV_PUBLIC_2; + +typedef struct +{ // (Part 2: Structures) + TPM_HT handleType; + TPMU_NV_PUBLIC_2 nvPublic2; +} TPMT_NV_PUBLIC_2; + +typedef struct +{ // (Part 2: Structures) + UINT16 size; + TPMT_NV_PUBLIC_2 nvPublic2; +} TPM2B_NV_PUBLIC_2; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[MAX_CONTEXT_SIZE]; + } t; + TPM2B b; +} TPM2B_CONTEXT_SENSITIVE; + +typedef struct +{ // (Part 2: Structures) + TPM2B_DIGEST integrity; + TPM2B_CONTEXT_SENSITIVE encrypted; +} TPMS_CONTEXT_DATA; + +typedef union +{ // (Part 2: Structures) + struct + { + UINT16 size; + BYTE buffer[sizeof(TPMS_CONTEXT_DATA)]; + } t; + TPM2B b; +} TPM2B_CONTEXT_DATA; + +typedef struct +{ // (Part 2: Structures) + UINT64 sequence; + TPMI_DH_SAVED savedHandle; + TPMI_RH_HIERARCHY hierarchy; + TPM2B_CONTEXT_DATA contextBlob; +} TPMS_CONTEXT; + +typedef struct +{ // (Part 2: Structures) + TPML_PCR_SELECTION pcrSelect; + TPM2B_DIGEST pcrDigest; + TPMA_LOCALITY locality; + TPM_ALG_ID parentNameAlg; + TPM2B_NAME parentName; + TPM2B_NAME parentQualifiedName; + TPM2B_DATA outsideInfo; +} TPMS_CREATION_DATA; + +typedef struct +{ // (Part 2: Structures) + UINT16 size; + TPMS_CREATION_DATA creationData; +} TPM2B_CREATION_DATA; + +// Table "Definition of TPM_AT Constants" (Part 2: Structures) +typedef UINT32 TPM_AT; +#define TYPE_OF_TPM_AT UINT32 +#define TPM_AT_ANY (TPM_AT)(0x00000000) +#define TPM_AT_ERROR (TPM_AT)(0x00000001) +#define TPM_AT_PV1 (TPM_AT)(0x00000002) +#define TPM_AT_VEND (TPM_AT)(0x80000000) + +// Table "Definition of TPM_AE Constants" (Part 2: Structures) +typedef UINT32 TPM_AE; +#define TYPE_OF_TPM_AE UINT32 +#define TPM_AE_NONE (TPM_AE)(0x00000000) + +typedef struct +{ // (Part 2: Structures) + TPM_AT tag; + UINT32 data; +} TPMS_AC_OUTPUT; + +typedef struct +{ // (Part 2: Structures) + UINT32 count; + TPMS_AC_OUTPUT acCapabilities[MAX_AC_CAPABILITIES]; +} TPML_AC_CAPABILITIES; + +#endif // _TPM_INCLUDE_PRIVATE_TPMTYPES_H_ diff --git a/TPMCmd/tpm/include/public/VerifyConfiguration.h b/TPMCmd/tpm/include/public/VerifyConfiguration.h new file mode 100644 index 00000000..df1404e1 --- /dev/null +++ b/TPMCmd/tpm/include/public/VerifyConfiguration.h @@ -0,0 +1,92 @@ +// +// This verifies that information expected from the consumer's TpmConfiguration is +// set properly and consistently. +// +#ifndef _VERIFY_CONFIGURATION_H +#define _VERIFY_CONFIGURATION_H + +// verify these defines are either YES or NO. +#define MUST_BE_0_OR_1(x) MUST_BE(((x) == 0) || ((x) == 1)) + +// Debug Options +MUST_BE_0_OR_1(DEBUG); +MUST_BE_0_OR_1(SIMULATION); +MUST_BE_0_OR_1(DRBG_DEBUG_PRINT); +MUST_BE_0_OR_1(CERTIFYX509_DEBUG); +MUST_BE_0_OR_1(USE_DEBUG_RNG); + +// RSA Debug Options +MUST_BE_0_OR_1(RSA_INSTRUMENT); +MUST_BE_0_OR_1(USE_RSA_KEY_CACHE); +MUST_BE_0_OR_1(USE_KEY_CACHE_FILE); + +// Test Options +MUST_BE_0_OR_1(ALLOW_FORCE_FAILURE_MODE); + +// Internal checks +MUST_BE_0_OR_1(LIBRARY_COMPATIBILITY_CHECK); +MUST_BE_0_OR_1(COMPILER_CHECKS); +MUST_BE_0_OR_1(RUNTIME_SIZE_CHECKS); + +// Compliance options +MUST_BE_0_OR_1(FIPS_COMPLIANT); +MUST_BE_0_OR_1(USE_SPEC_COMPLIANT_PROOFS); +MUST_BE_0_OR_1(SKIP_PROOF_ERRORS); + +// Implementation alternatives - should not change external behavior +MUST_BE_0_OR_1(TABLE_DRIVEN_DISPATCH); +MUST_BE_0_OR_1(TABLE_DRIVEN_MARSHAL); +MUST_BE_0_OR_1(USE_MARSHALING_DEFINES); +MUST_BE_0_OR_1(COMPRESSED_LISTS); +MUST_BE_0_OR_1(USE_BIT_FIELD_STRUCTURES); +MUST_BE_0_OR_1(RSA_KEY_SIEVE); + +// Implementation alternatives - changes external behavior +MUST_BE_0_OR_1(_DRBG_STATE_SAVE); +MUST_BE_0_OR_1(USE_DA_USED); +MUST_BE_0_OR_1(ENABLE_SELF_TESTS); +MUST_BE_0_OR_1(CLOCK_STOPS); +MUST_BE_0_OR_1(ACCUMULATE_SELF_HEAL_TIMER); +MUST_BE_0_OR_1(FAIL_TRACE); + +// Vendor alternatives +// Check VENDOR_PERMANENT_AUTH_ENABLED & VENDOR_PERMANENT_AUTH_HANDLE are consistent +MUST_BE_0_OR_1(VENDOR_PERMANENT_AUTH_ENABLED); + +#if VENDOR_PERMANENT_AUTH_ENABLED == YES +# if !defined(VENDOR_PERMANENT_AUTH_HANDLE) \ + || VENDOR_PERMANENT_AUTH_HANDLE < TPM_RH_AUTH_00 \ + || VENDOR_PERMANENT_AUTH_HANDLE > TPM_RH_AUTH_FF +# error VENDOR_PERMANENT_AUTH_ENABLED requires a valid definition for VENDOR_PERMANENT_AUTH_HANDLE, see Part2 +# endif +#else +# if defined(VENDOR_PERMANENT_AUTH_HANDLE) +# error VENDOR_PERMANENT_AUTH_HANDLE requires VENDOR_PERMANENT_AUTH_ENABLED to be YES +# endif +#endif + +// now check for inconsistent combinations of options +#if USE_KEY_CACHE_FILE && !USE_RSA_KEY_CACHE +# error cannot use USE_KEY_CACHE_FILE if not using USE_RSA_KEY_CACHE +#endif + +#if !DEBUG +# if USE_KEY_CACHE_FILE || USE_RSA_KEY_CACHE || DRBG_DEBUG_PRINT \ + || CERTIFYX509_DEBUG || USE_DEBUG_RNG +# error using insecure options not in DEBUG mode. +# endif +#endif + +#if !SIMULATION +# if USE_KEY_CACHE_FILE +# error USE_KEY_CACHE_FILE requires SIMULATION +# endif +# if RSA_INSTRUMENT +# error RSA_INSTRUMENT requires SIMULATION +# endif +# if USE_DEBUG_RNG +# error USE_DEBUG_RNG requires SIMULATION +# endif +#endif + +#endif // _VERIFY_CONFIGURATION_H diff --git a/TPMCmd/tpm/include/public/endian_swap.h b/TPMCmd/tpm/include/public/endian_swap.h new file mode 100644 index 00000000..c4eefa53 --- /dev/null +++ b/TPMCmd/tpm/include/public/endian_swap.h @@ -0,0 +1,95 @@ +#ifndef _SWAP_H +#define _SWAP_H + +#if LITTLE_ENDIAN_TPM +# define TO_BIG_ENDIAN_UINT16(i) REVERSE_ENDIAN_16(i) +# define FROM_BIG_ENDIAN_UINT16(i) REVERSE_ENDIAN_16(i) +# define TO_BIG_ENDIAN_UINT32(i) REVERSE_ENDIAN_32(i) +# define FROM_BIG_ENDIAN_UINT32(i) REVERSE_ENDIAN_32(i) +# define TO_BIG_ENDIAN_UINT64(i) REVERSE_ENDIAN_64(i) +# define FROM_BIG_ENDIAN_UINT64(i) REVERSE_ENDIAN_64(i) +#else +# define TO_BIG_ENDIAN_UINT16(i) (i) +# define FROM_BIG_ENDIAN_UINT16(i) (i) +# define TO_BIG_ENDIAN_UINT32(i) (i) +# define FROM_BIG_ENDIAN_UINT32(i) (i) +# define TO_BIG_ENDIAN_UINT64(i) (i) +# define FROM_BIG_ENDIAN_UINT64(i) (i) +#endif + +#if AUTO_ALIGN == NO + +// The aggregation macros for machines that do not allow unaligned access or for +// little-endian machines. + +// Aggregate bytes into an UINT + +# define BYTE_ARRAY_TO_UINT8(b) (uint8_t)((b)[0]) +# define BYTE_ARRAY_TO_UINT16(b) ByteArrayToUint16((BYTE*)(b)) +# define BYTE_ARRAY_TO_UINT32(b) ByteArrayToUint32((BYTE*)(b)) +# define BYTE_ARRAY_TO_UINT64(b) ByteArrayToUint64((BYTE*)(b)) +# define UINT8_TO_BYTE_ARRAY(i, b) ((b)[0] = (uint8_t)(i)) +# define UINT16_TO_BYTE_ARRAY(i, b) Uint16ToByteArray((i), (BYTE*)(b)) +# define UINT32_TO_BYTE_ARRAY(i, b) Uint32ToByteArray((i), (BYTE*)(b)) +# define UINT64_TO_BYTE_ARRAY(i, b) Uint64ToByteArray((i), (BYTE*)(b)) + +#else // AUTO_ALIGN + +# if BIG_ENDIAN_TPM +// the big-endian macros for machines that allow unaligned memory access +// Aggregate a byte array into a UINT +# define BYTE_ARRAY_TO_UINT8(b) *((uint8_t*)(b)) +# define BYTE_ARRAY_TO_UINT16(b) *((uint16_t*)(b)) +# define BYTE_ARRAY_TO_UINT32(b) *((uint32_t*)(b)) +# define BYTE_ARRAY_TO_UINT64(b) *((uint64_t*)(b)) + +// Disaggregate a UINT into a byte array + +# define UINT8_TO_BYTE_ARRAY(i, b) \ + { \ + *((uint8_t*)(b)) = (i); \ + } +# define UINT16_TO_BYTE_ARRAY(i, b) \ + { \ + *((uint16_t*)(b)) = (i); \ + } +# define UINT32_TO_BYTE_ARRAY(i, b) \ + { \ + *((uint32_t*)(b)) = (i); \ + } +# define UINT64_TO_BYTE_ARRAY(i, b) \ + { \ + *((uint64_t*)(b)) = (i); \ + } +# else +// the little endian macros for machines that allow unaligned memory access +// the big-endian macros for machines that allow unaligned memory access +// Aggregate a byte array into a UINT +# define BYTE_ARRAY_TO_UINT8(b) *((uint8_t*)(b)) +# define BYTE_ARRAY_TO_UINT16(b) REVERSE_ENDIAN_16(*((uint16_t*)(b))) +# define BYTE_ARRAY_TO_UINT32(b) REVERSE_ENDIAN_32(*((uint32_t*)(b))) +# define BYTE_ARRAY_TO_UINT64(b) REVERSE_ENDIAN_64(*((uint64_t*)(b))) + +// Disaggregate a UINT into a byte array + +# define UINT8_TO_BYTE_ARRAY(i, b) \ + { \ + *((uint8_t*)(b)) = (i); \ + } +# define UINT16_TO_BYTE_ARRAY(i, b) \ + { \ + *((uint16_t*)(b)) = REVERSE_ENDIAN_16(i); \ + } +# define UINT32_TO_BYTE_ARRAY(i, b) \ + { \ + *((uint32_t*)(b)) = REVERSE_ENDIAN_32(i); \ + } +# define UINT64_TO_BYTE_ARRAY(i, b) \ + { \ + *((uint64_t*)(b)) = REVERSE_ENDIAN_64(i); \ + } +# endif // BIG_ENDIAN_TPM + +#endif // AUTO_ALIGN == NO + +#endif // _SWAP_H diff --git a/TPMCmd/tpm/include/public/prototypes/TpmFail_fp.h b/TPMCmd/tpm/include/public/prototypes/TpmFail_fp.h new file mode 100644 index 00000000..c21bdbf0 --- /dev/null +++ b/TPMCmd/tpm/include/public/prototypes/TpmFail_fp.h @@ -0,0 +1,41 @@ +/*(Auto-generated) + * Created by TpmPrototypes; Version 3.0 July 18, 2017 + * Date: Apr 2, 2019 Time: 03:18:00PM + */ + +#ifndef _TPM_FAIL_FP_H_ +#define _TPM_FAIL_FP_H_ + +//*** SetForceFailureMode() +// This function is called by the simulator to enable failure mode testing. +#if SIMULATION +LIB_EXPORT void SetForceFailureMode(void); +#endif + +//*** TpmFail() +// This function is called by TPM.lib when a failure occurs. It will set up the +// failure values to be returned on TPM2_GetTestResult(). +NORETURN void TpmFail( +#if FAIL_TRACE + const char* function, + int line, +#else + uint64_t locationCode, +#endif + int failureCode); + +//*** TpmFailureMode( +// This function is called by the interface code when the platform is in failure +// mode. +void TpmFailureMode(uint32_t inRequestSize, // IN: command buffer size + unsigned char* inRequest, // IN: command buffer + uint32_t* outResponseSize, // OUT: response buffer size + unsigned char** outResponse // OUT: response buffer +); + +//*** UnmarshalFail() +// This is a stub that is used to catch an attempt to unmarshal an entry +// that is not defined. Don't ever expect this to be called but... +void UnmarshalFail(void* type, BYTE** buffer, INT32* size); + +#endif // _TPM_FAIL_FP_H_ diff --git a/TPMCmd/tpm/include/public/tpm_public.h b/TPMCmd/tpm/include/public/tpm_public.h new file mode 100644 index 00000000..9c15c145 --- /dev/null +++ b/TPMCmd/tpm/include/public/tpm_public.h @@ -0,0 +1,9 @@ +#include +#include + +#include +#include +#include +#include +#include +#include \ No newline at end of file diff --git a/TPMCmd/tpm/include/public/tpm_radix.h b/TPMCmd/tpm/include/public/tpm_radix.h new file mode 100644 index 00000000..8ffac2cd --- /dev/null +++ b/TPMCmd/tpm/include/public/tpm_radix.h @@ -0,0 +1,87 @@ +//** Introduction +// Common defines for supporting large numbers and cryptographic buffer sizing. +//********************* +#ifndef RADIX_BITS +# if defined(__x86_64__) || defined(__x86_64) || defined(__amd64__) \ + || defined(__amd64) || defined(_WIN64) || defined(_M_X64) || defined(_M_ARM64) \ + || defined(__aarch64__) || defined(__PPC64__) || defined(__s390x__) \ + || defined(__powerpc64__) || defined(__ppc64__) +# define RADIX_BITS 64 +# elif defined(__i386__) || defined(__i386) || defined(i386) || defined(_WIN32) \ + || defined(_M_IX86) +# define RADIX_BITS 32 +# elif defined(_M_ARM) || defined(__arm__) || defined(__thumb__) +# define RADIX_BITS 32 +# elif defined(__riscv) +// __riscv and __riscv_xlen are standardized by the RISC-V community and should be available +// on any compliant compiler. +// +// https://github.com/riscv-non-isa/riscv-toolchain-conventions +# define RADIX_BITS __riscv_xlen +# else +# error Unable to determine RADIX_BITS from compiler environment +# endif +#endif // RADIX_BITS + +#if RADIX_BITS == 64 +# define RADIX_BYTES 8 +# define RADIX_LOG2 6 +#elif RADIX_BITS == 32 +# define RADIX_BYTES 4 +# define RADIX_LOG2 5 +#else +# error "RADIX_BITS must either be 32 or 64" +#endif + +#define HASH_ALIGNMENT RADIX_BYTES +#define SYMMETRIC_ALIGNMENT RADIX_BYTES + +#define RADIX_MOD(x) ((x) & ((1 << RADIX_LOG2) - 1)) +#define RADIX_DIV(x) ((x) >> RADIX_LOG2) +#define RADIX_MASK ((((crypt_uword_t)1) << RADIX_LOG2) - 1) + +#define BITS_TO_CRYPT_WORDS(bits) RADIX_DIV((bits) + (RADIX_BITS - 1)) +#define BYTES_TO_CRYPT_WORDS(bytes) BITS_TO_CRYPT_WORDS(bytes * 8) +#define SIZE_IN_CRYPT_WORDS(thing) BYTES_TO_CRYPT_WORDS(sizeof(thing)) + +#if RADIX_BITS == 64 +# define SWAP_CRYPT_WORD(x) REVERSE_ENDIAN_64(x) +typedef uint64_t crypt_uword_t; +typedef int64_t crypt_word_t; +# define TO_CRYPT_WORD_64 BIG_ENDIAN_BYTES_TO_UINT64 +# define TO_CRYPT_WORD_32(a, b, c, d) TO_CRYPT_WORD_64(0, 0, 0, 0, a, b, c, d) +#elif RADIX_BITS == 32 +# define SWAP_CRYPT_WORD(x) REVERSE_ENDIAN_32((x)) +typedef uint32_t crypt_uword_t; +typedef int32_t crypt_word_t; +# define TO_CRYPT_WORD_64(a, b, c, d, e, f, g, h) \ + BIG_ENDIAN_BYTES_TO_UINT32(e, f, g, h), BIG_ENDIAN_BYTES_TO_UINT32(a, b, c, d) +#endif + +#define MAX_CRYPT_UWORD (~((crypt_uword_t)0)) +#define MAX_CRYPT_WORD ((crypt_word_t)(MAX_CRYPT_UWORD >> 1)) +#define MIN_CRYPT_WORD (~MAX_CRYPT_WORD) + +// Avoid expanding LARGEST_NUMBER into a long expression that inlines 3 other long expressions. +// TODO: Decrease the size of each of the MAX_* expressions with improvements to the code generator. +#if ALG_RSA == ALG_YES +// The smallest supported RSA key (1024 bits) is larger than +// the largest supported ECC curve (628 bits) +// or the largest supported digest (512 bits) +# define LARGEST_NUMBER MAX_RSA_KEY_BYTES +#elif ALG_ECC == ALG_YES +# define LARGEST_NUMBER MAX(MAX_ECC_KEY_BYTES, MAX_DIGEST_SIZE) +#else +# define LARGEST_NUMBER MAX_DIGEST_SIZE +#endif // ALG_RSA == YES + +#define LARGEST_NUMBER_BITS (LARGEST_NUMBER * 8) + +#define MAX_ECC_PARAMETER_BYTES (MAX_ECC_KEY_BYTES * ALG_ECC) + +// These macros use the selected libraries to get the proper include files. +// clang-format off +#define LIB_QUOTE(_STRING_) #_STRING_ +#define LIB_INCLUDE2(_PREFIX_, _LIB_, _TYPE_) LIB_QUOTE(_LIB_/_PREFIX_##_LIB_##_TYPE_.h) +#define LIB_INCLUDE(_PREFIX_, _LIB_, _TYPE_) LIB_INCLUDE2(_PREFIX_,_LIB_, _TYPE_) +// clang-format on diff --git a/TPMCmd/tpm/include/swap.h b/TPMCmd/tpm/include/swap.h deleted file mode 100644 index 6b3a3e47..00000000 --- a/TPMCmd/tpm/include/swap.h +++ /dev/null @@ -1,129 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef _SWAP_H -#define _SWAP_H - -#if LITTLE_ENDIAN_TPM -# define TO_BIG_ENDIAN_UINT16(i) REVERSE_ENDIAN_16(i) -# define FROM_BIG_ENDIAN_UINT16(i) REVERSE_ENDIAN_16(i) -# define TO_BIG_ENDIAN_UINT32(i) REVERSE_ENDIAN_32(i) -# define FROM_BIG_ENDIAN_UINT32(i) REVERSE_ENDIAN_32(i) -# define TO_BIG_ENDIAN_UINT64(i) REVERSE_ENDIAN_64(i) -# define FROM_BIG_ENDIAN_UINT64(i) REVERSE_ENDIAN_64(i) -#else -# define TO_BIG_ENDIAN_UINT16(i) (i) -# define FROM_BIG_ENDIAN_UINT16(i) (i) -# define TO_BIG_ENDIAN_UINT32(i) (i) -# define FROM_BIG_ENDIAN_UINT32(i) (i) -# define TO_BIG_ENDIAN_UINT64(i) (i) -# define FROM_BIG_ENDIAN_UINT64(i) (i) -#endif - -#if AUTO_ALIGN == NO - -// The aggregation macros for machines that do not allow unaligned access or for -// little-endian machines. - -// Aggregate bytes into an UINT - -# define BYTE_ARRAY_TO_UINT8(b) (uint8_t)((b)[0]) -# define BYTE_ARRAY_TO_UINT16(b) ByteArrayToUint16((BYTE*)(b)) -# define BYTE_ARRAY_TO_UINT32(b) ByteArrayToUint32((BYTE*)(b)) -# define BYTE_ARRAY_TO_UINT64(b) ByteArrayToUint64((BYTE*)(b)) -# define UINT8_TO_BYTE_ARRAY(i, b) ((b)[0] = (uint8_t)(i)) -# define UINT16_TO_BYTE_ARRAY(i, b) Uint16ToByteArray((i), (BYTE*)(b)) -# define UINT32_TO_BYTE_ARRAY(i, b) Uint32ToByteArray((i), (BYTE*)(b)) -# define UINT64_TO_BYTE_ARRAY(i, b) Uint64ToByteArray((i), (BYTE*)(b)) - -#else // AUTO_ALIGN - -# if BIG_ENDIAN_TPM -// the big-endian macros for machines that allow unaligned memory access -// Aggregate a byte array into a UINT -# define BYTE_ARRAY_TO_UINT8(b) *((uint8_t*)(b)) -# define BYTE_ARRAY_TO_UINT16(b) *((uint16_t*)(b)) -# define BYTE_ARRAY_TO_UINT32(b) *((uint32_t*)(b)) -# define BYTE_ARRAY_TO_UINT64(b) *((uint64_t*)(b)) - -// Disaggregate a UINT into a byte array - -# define UINT8_TO_BYTE_ARRAY(i, b) \ - { \ - *((uint8_t*)(b)) = (i); \ - } -# define UINT16_TO_BYTE_ARRAY(i, b) \ - { \ - *((uint16_t*)(b)) = (i); \ - } -# define UINT32_TO_BYTE_ARRAY(i, b) \ - { \ - *((uint32_t*)(b)) = (i); \ - } -# define UINT64_TO_BYTE_ARRAY(i, b) \ - { \ - *((uint64_t*)(b)) = (i); \ - } -# else -// the little endian macros for machines that allow unaligned memory access -// the big-endian macros for machines that allow unaligned memory access -// Aggregate a byte array into a UINT -# define BYTE_ARRAY_TO_UINT8(b) *((uint8_t*)(b)) -# define BYTE_ARRAY_TO_UINT16(b) REVERSE_ENDIAN_16(*((uint16_t*)(b))) -# define BYTE_ARRAY_TO_UINT32(b) REVERSE_ENDIAN_32(*((uint32_t*)(b))) -# define BYTE_ARRAY_TO_UINT64(b) REVERSE_ENDIAN_64(*((uint64_t*)(b))) - -// Disaggregate a UINT into a byte array - -# define UINT8_TO_BYTE_ARRAY(i, b) \ - { \ - *((uint8_t*)(b)) = (i); \ - } -# define UINT16_TO_BYTE_ARRAY(i, b) \ - { \ - *((uint16_t*)(b)) = REVERSE_ENDIAN_16(i); \ - } -# define UINT32_TO_BYTE_ARRAY(i, b) \ - { \ - *((uint32_t*)(b)) = REVERSE_ENDIAN_32(i); \ - } -# define UINT64_TO_BYTE_ARRAY(i, b) \ - { \ - *((uint64_t*)(b)) = REVERSE_ENDIAN_64(i); \ - } -# endif // BIG_ENDIAN_TPM - -#endif // AUTO_ALIGN == NO - -#endif // _SWAP_H diff --git a/TPMCmd/tpm/src/CMakeLists.txt b/TPMCmd/tpm/src/CMakeLists.txt new file mode 100644 index 00000000..971f8bf4 --- /dev/null +++ b/TPMCmd/tpm/src/CMakeLists.txt @@ -0,0 +1,278 @@ +# Microsoft Reference Implementation for TPM 2.0 +# Copyright (c) Microsoft Corporation +# This software is being made available under certain license terms, as detailed at +# https://github.com/microsoft/ms-tpm-20-ref/blob/main/LICENSE +# +#################################################### +# Project +#################################################### + +cmake_minimum_required(VERSION 3.16.3) +project(Tpm_CoreLib VERSION 1.62.0 LANGUAGES C) +print_project_info() +set(CMAKE_EXPORT_COMPILE_COMMANDS ON) + +# this project builds the static TPM Corelibrary +add_library(Tpm_CoreLib STATIC) +add_library(Tpm_CoreLib::Tpm_CoreLib ALIAS Tpm_CoreLib) +target_link_libraries(Tpm_CoreLib PRIVATE + TpmConfiguration + Tpm_Public_Headers + Tpm_Platform_Interface + Tpm_CryptoLib_TpmBigNum +) +target_link_libraries(Tpm_CoreLib PRIVATE + Tpm_CryptoLib_Hash_${cryptoLib_Hash} + Tpm_CryptoLib_Symmetric_${cryptoLib_Symmetric} + Tpm_CryptoLib_Math_${cryptoLib_BnMath} +) + +# allow lazy references into header folders for TpmCoreLib to +# maintain compat +target_include_directories(Tpm_CoreLib PRIVATE + ../include + ../include/private + ../include/private/prototypes + ../include/public/include/Tpm_Public_Headers + ../include/platform_interface/Tpm_Platform_Interface + ../include/platform_interface/Tpm_Platform_Interface/prototypes +) +#################################################### +# Library +#################################################### + +# use this smaller build when working on cmake files +# will result in unresolved externals at final +# simulator link step, but saves a lot of build time +# when working on includes, packages, and the like +# function(test_generate_tpm_sources) +# target_sources(Tpm_CoreLib PRIVATE +# "command/Asymmetric/EC_Ephemeral.c" +# "command/Asymmetric/ECC_Decrypt.c" +# ) +# endfunction() + +function(full_generate_tpm_sources) + target_sources(Tpm_CoreLib PRIVATE + "command/Asymmetric/EC_Ephemeral.c" + "command/Asymmetric/ECC_Decrypt.c" + "command/Asymmetric/ECC_Encrypt.c" + "command/Asymmetric/ECC_Parameters.c" + "command/Asymmetric/ECDH_KeyGen.c" + "command/Asymmetric/ECDH_ZGen.c" + "command/Asymmetric/RSA_Decrypt.c" + "command/Asymmetric/RSA_Encrypt.c" + "command/Asymmetric/ZGen_2Phase.c" + "command/AttachedComponent/AC_GetCapability.c" + "command/AttachedComponent/AC_Send.c" + "command/AttachedComponent/AC_spt.c" + "command/AttachedComponent/Policy_AC_SendSelect.c" + "command/Attestation/Attest_spt.c" + "command/Attestation/Certify.c" + "command/Attestation/CertifyCreation.c" + "command/Attestation/CertifyX509.c" + "command/Attestation/GetCommandAuditDigest.c" + "command/Attestation/GetSessionAuditDigest.c" + "command/Attestation/GetTime.c" + "command/Attestation/Quote.c" + "command/Capability/GetCapability.c" + "command/Capability/SetCapability.c" + "command/Capability/TestParms.c" + "command/ClockTimer/ACT_SetTimeout.c" + "command/ClockTimer/ACT_spt.c" + "command/ClockTimer/ClockRateAdjust.c" + "command/ClockTimer/ClockSet.c" + "command/ClockTimer/ReadClock.c" + "command/CommandAudit/SetCommandCodeAuditStatus.c" + "command/Context/Context_spt.c" + "command/Context/ContextLoad.c" + "command/Context/ContextSave.c" + "command/Context/EvictControl.c" + "command/Context/FlushContext.c" + "command/DA/DictionaryAttackLockReset.c" + "command/DA/DictionaryAttackParameters.c" + "command/Duplication/Duplicate.c" + "command/Duplication/Import.c" + "command/Duplication/Rewrap.c" + "command/EA/Policy_spt.c" + "command/EA/PolicyAuthorize.c" + "command/EA/PolicyAuthorizeNV.c" + "command/EA/PolicyAuthValue.c" + "command/EA/PolicyCapability.c" + "command/EA/PolicyCommandCode.c" + "command/EA/PolicyCounterTimer.c" + "command/EA/PolicyCpHash.c" + "command/EA/PolicyDuplicationSelect.c" + "command/EA/PolicyGetDigest.c" + "command/EA/PolicyLocality.c" + "command/EA/PolicyNameHash.c" + "command/EA/PolicyNV.c" + "command/EA/PolicyNvWritten.c" + "command/EA/PolicyOR.c" + "command/EA/PolicyParameters.c" + "command/EA/PolicyPassword.c" + "command/EA/PolicyPCR.c" + "command/EA/PolicyPhysicalPresence.c" + "command/EA/PolicySecret.c" + "command/EA/PolicySigned.c" + "command/EA/PolicyTemplate.c" + "command/EA/PolicyTicket.c" + "command/Ecdaa/Commit.c" + "command/FieldUpgrade/FieldUpgradeData.c" + "command/FieldUpgrade/FieldUpgradeStart.c" + "command/FieldUpgrade/FirmwareRead.c" + "command/HashHMAC/EventSequenceComplete.c" + "command/HashHMAC/HashSequenceStart.c" + "command/HashHMAC/HMAC_Start.c" + "command/HashHMAC/MAC_Start.c" + "command/HashHMAC/SequenceComplete.c" + "command/HashHMAC/SequenceUpdate.c" + "command/Hierarchy/ChangeEPS.c" + "command/Hierarchy/ChangePPS.c" + "command/Hierarchy/Clear.c" + "command/Hierarchy/ClearControl.c" + "command/Hierarchy/CreatePrimary.c" + "command/Hierarchy/HierarchyChangeAuth.c" + "command/Hierarchy/HierarchyControl.c" + "command/Hierarchy/SetPrimaryPolicy.c" + "command/Misc/PP_Commands.c" + "command/Misc/SetAlgorithmSet.c" + "command/NVStorage/NV_Certify.c" + "command/NVStorage/NV_ChangeAuth.c" + "command/NVStorage/NV_DefineSpace.c" + "command/NVStorage/NV_DefineSpace2.c" + "command/NVStorage/NV_Extend.c" + "command/NVStorage/NV_GlobalWriteLock.c" + "command/NVStorage/NV_Increment.c" + "command/NVStorage/NV_Read.c" + "command/NVStorage/NV_ReadLock.c" + "command/NVStorage/NV_ReadPublic.c" + "command/NVStorage/NV_ReadPublic2.c" + "command/NVStorage/NV_SetBits.c" + "command/NVStorage/NV_spt.c" + "command/NVStorage/NV_UndefineSpace.c" + "command/NVStorage/NV_UndefineSpaceSpecial.c" + "command/NVStorage/NV_Write.c" + "command/NVStorage/NV_WriteLock.c" + "command/Object/ActivateCredential.c" + "command/Object/Create.c" + "command/Object/CreateLoaded.c" + "command/Object/Load.c" + "command/Object/LoadExternal.c" + "command/Object/MakeCredential.c" + "command/Object/Object_spt.c" + "command/Object/ObjectChangeAuth.c" + "command/Object/ReadPublic.c" + "command/Object/Unseal.c" + "command/PCR/PCR_Allocate.c" + "command/PCR/PCR_Event.c" + "command/PCR/PCR_Extend.c" + "command/PCR/PCR_Read.c" + "command/PCR/PCR_Reset.c" + "command/PCR/PCR_SetAuthPolicy.c" + "command/PCR/PCR_SetAuthValue.c" + "command/Random/GetRandom.c" + "command/Random/StirRandom.c" + "command/Session/PolicyRestart.c" + "command/Session/StartAuthSession.c" + "command/Signature/Sign.c" + "command/Signature/VerifySignature.c" + "command/Startup/Shutdown.c" + "command/Startup/Startup.c" + "command/Symmetric/EncryptDecrypt.c" + "command/Symmetric/EncryptDecrypt_spt.c" + "command/Symmetric/EncryptDecrypt2.c" + "command/Symmetric/Hash.c" + "command/Symmetric/HMAC.c" + "command/Symmetric/MAC.c" + "command/Testing/GetTestResult.c" + "command/Testing/IncrementalSelfTest.c" + "command/Testing/SelfTest.c" + "command/Vendor/Vendor_TCG_Test.c" + "crypt/AlgorithmTests.c" + "crypt/CryptCmac.c" + "crypt/CryptEccCrypt.c" + "crypt/CryptEccData.c" + "crypt/CryptEccKeyExchange.c" + "crypt/CryptEccMain.c" + "crypt/CryptEccSignature.c" + "crypt/CryptHash.c" + "crypt/CryptPrime.c" + "crypt/CryptPrimeSieve.c" + "crypt/CryptRand.c" + "crypt/CryptRsa.c" + "crypt/CryptSelfTest.c" + "crypt/CryptSmac.c" + "crypt/CryptSym.c" + "crypt/CryptUtil.c" + "crypt/PrimeData.c" + "crypt/RsaKeyCache.c" + "crypt/Ticket.c" + + "crypt/ecc/TpmEcc_Signature_ECDAA.c" + "crypt/ecc/TpmEcc_Signature_ECDSA.c" + "crypt/ecc/TpmEcc_Signature_Schnorr.c" + "crypt/ecc/TpmEcc_Signature_SM2.c" + "crypt/ecc/TpmEcc_Signature_Util.c" + "crypt/ecc/TpmEcc_Util.c" + + "crypt/math/TpmMath_Debug.c" + "crypt/math/TpmMath_Util.c" + + "events/_TPM_Hash_Data.c" + "events/_TPM_Hash_End.c" + "events/_TPM_Hash_Start.c" + "events/_TPM_Init.c" + "main/CommandDispatcher.c" + "main/ExecCommand.c" + "main/SessionProcess.c" + "subsystem/CommandAudit.c" + "subsystem/DA.c" + "subsystem/Hierarchy.c" + "subsystem/NvDynamic.c" + "subsystem/NvReserved.c" + "subsystem/Object.c" + "subsystem/PCR.c" + "subsystem/PP.c" + "subsystem/Session.c" + "subsystem/Time.c" + "support/AlgorithmCap.c" + "support/Bits.c" + "support/CommandCodeAttributes.c" + "support/Entity.c" + "support/Global.c" + "support/Handle.c" + "support/IoBuffers.c" + "support/Locality.c" + "support/Manufacture.c" + "support/Marshal.c" + "support/MathOnByteBuffers.c" + "support/Memory.c" + "support/Power.c" + "support/PropertyCap.c" + "support/Response.c" + "support/ResponseCodeProcessing.c" + "support/TableDrivenMarshal.c" + "support/TableMarshalData.c" + "support/TpmFail.c" + "support/TpmSizeChecks.c" + "X509/TpmASN1.c" + "X509/X509_ECC.c" + "X509/X509_RSA.c" + "X509/X509_spt.c" + ) +endfunction() + +#test_generate_tpm_sources() +full_generate_tpm_sources() + +# create install and export information for downstream projects to use +install_and_export_config_targets(${PROJECT_NAME}) + +############################################################## +# BEGIN --- install the header files provided by this project. +############################################################## +# nothing to do, headers provided by other INTERFACE libraries + +# LAST: create the targets.cmake file for this package +export_targets_cmake_file(${PROJECT_NAME}) diff --git a/TPMCmd/tpm/src/X509/TpmASN1.c b/TPMCmd/tpm/src/X509/TpmASN1.c index f8914426..e2a3611e 100644 --- a/TPMCmd/tpm/src/X509/TpmASN1.c +++ b/TPMCmd/tpm/src/X509/TpmASN1.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Tpm.h" #define _OIDS_ @@ -39,6 +5,8 @@ #include "TpmASN1.h" #include "TpmASN1_fp.h" +#if CC_CertifyX509 + //** Unmarshaling Functions //*** ASN1UnmarshalContextInitialize() @@ -49,8 +17,8 @@ BOOL ASN1UnmarshalContextInitialize( ASN1UnmarshalContext* ctx, INT16 size, BYTE* buffer) { - VERIFY(buffer != NULL); - VERIFY(size > 0); + GOTO_ERROR_UNLESS(buffer != NULL); + GOTO_ERROR_UNLESS(size > 0); ctx->buffer = buffer; ctx->size = size; ctx->offset = 0; @@ -71,7 +39,7 @@ ASN1DecodeLength(ASN1UnmarshalContext* ctx) BYTE first; // Next octet in buffer INT16 value; // - VERIFY(ctx->offset < ctx->size); + GOTO_ERROR_UNLESS(ctx->offset < ctx->size); first = NEXT_OCTET(ctx); // If the number of octets of the entity is larger than 127, then the first octet // is the number of octets in the length specifier. @@ -86,7 +54,7 @@ ASN1DecodeLength(ASN1UnmarshalContext* ctx) // get the next value value = (INT16)NEXT_OCTET(ctx); // Make sure that the result will fit in an INT16 - VERIFY(value < 0x0080); + GOTO_ERROR_UNLESS(value < 0x0080); // Shift up and add next octet value = (value << 8) + NEXT_OCTET(ctx); } @@ -118,11 +86,11 @@ INT16 ASN1NextTag(ASN1UnmarshalContext* ctx) { // A tag to get? - VERIFY(ctx->offset < ctx->size); + GOTO_ERROR_UNLESS(ctx->offset < ctx->size); // Get it ctx->tag = NEXT_OCTET(ctx); // Make sure that it is not an extended tag - VERIFY((ctx->tag & 0x1F) != 0x1F); + GOTO_ERROR_UNLESS((ctx->tag & 0x1F) != 0x1F); // Get the length field and return that return ASN1DecodeLength(ctx); @@ -149,21 +117,21 @@ BOOL ASN1GetBitStringValue(ASN1UnmarshalContext* ctx, UINT32* val) int inputBits; // length = ASN1NextTag(ctx); - VERIFY(length >= 1); - VERIFY(ctx->tag == ASN1_BITSTRING); + GOTO_ERROR_UNLESS(length >= 1); + GOTO_ERROR_UNLESS(ctx->tag == ASN1_BITSTRING); // Get the shift value for the bit field (how many bits to lop off of the end) shift = NEXT_OCTET(ctx); length--; // Get the number of bits in the input inputBits = (8 * length) - shift; // the shift count has to make sense - VERIFY((shift < 8) && ((length > 0) || (shift == 0))); + GOTO_ERROR_UNLESS((shift < 8) && ((length > 0) || (shift == 0))); // if there are any bytes left for(; length > 1; length--) { // for all but the last octet, just shift and add the new octet - VERIFY((value & 0xFF000000) == 0); // can't loose significant bits + GOTO_ERROR_UNLESS((value & 0xFF000000) == 0); // can't loose significant bits value = (value << 8) + NEXT_OCTET(ctx); } if(length == 1) @@ -171,7 +139,7 @@ BOOL ASN1GetBitStringValue(ASN1UnmarshalContext* ctx, UINT32* val) // for the last octet, just shift the accumulated value enough to // accept the significant bits in the last octet and shift the last // octet down - VERIFY(((value & (0xFF000000 << (8 - shift)))) == 0); + GOTO_ERROR_UNLESS(((value & (0xFF000000 << (8 - shift)))) == 0); value = (value << (8 - shift)) + (NEXT_OCTET(ctx) >> shift); } // 'Left justify' the result @@ -265,10 +233,6 @@ ASN1EndMarshalContext(ASN1MarshalContext* ctx) pAssert(ctx->depth >= 0); length = ctx->end - ctx->offset; ctx->end = ctx->ends[ctx->depth--]; - if((ctx->depth == -1) && (ctx->buffer)) - { - MemoryCopy(ctx->buffer, ctx->buffer + ctx->offset, ctx->end - ctx->offset); - } return length; } @@ -314,11 +278,11 @@ ASN1PushBytes(ASN1MarshalContext* ctx, INT16 count, const BYTE* buffer) { // make sure that count is not negative which would mess up the math; and that // if there is a count, there is a buffer - VERIFY((count >= 0) && ((buffer != NULL) || (count == 0))); + GOTO_ERROR_UNLESS((count >= 0) && ((buffer != NULL) || (count == 0))); // back up the offset to determine where the new octets will get pushed ctx->offset -= count; // can't go negative - VERIFY(ctx->offset >= 0); + GOTO_ERROR_UNLESS(ctx->offset >= 0); // if there are buffers, move the data, otherwise, assume that this is just a // test. if(count && buffer && ctx->buffer) @@ -350,7 +314,7 @@ INT16 ASN1PushLength(ASN1MarshalContext* ctx, INT16 len) { UINT16 start = ctx->offset; - VERIFY(len >= 0); + GOTO_ERROR_UNLESS(len >= 0); if(len <= 127) ASN1PushByte(ctx, (BYTE)len); else @@ -435,7 +399,7 @@ ASN1PushInteger(ASN1MarshalContext* ctx, // IN/OUT: buffer context // if needed, add a leading byte of 0 to make the number positive if(*integer & 0x80) iLen += (INT16)ASN1PushByte(ctx, 0); - // PushTagAndLength just tells how many octets it added so the total size of this + // PushTagAndLenght just tells how many octets it added so the total size of this // element is the sum of those octets and the adjusted input size. iLen += ASN1PushTagAndLength(ctx, ASN1_INTEGER, iLen); return iLen; @@ -458,3 +422,5 @@ ASN1PushOID(ASN1MarshalContext* ctx, const BYTE* OID) ctx->offset = -1; return 0; } + +#endif // CC_CertifyX509 diff --git a/TPMCmd/tpm/src/X509/X509_ECC.c b/TPMCmd/tpm/src/X509/X509_ECC.c index 336e148a..0eaf798d 100644 --- a/TPMCmd/tpm/src/X509/X509_ECC.c +++ b/TPMCmd/tpm/src/X509/X509_ECC.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Tpm.h" #include "X509.h" diff --git a/TPMCmd/tpm/src/X509/X509_RSA.c b/TPMCmd/tpm/src/X509/X509_RSA.c index 15d3369b..42337c78 100644 --- a/TPMCmd/tpm/src/X509/X509_RSA.c +++ b/TPMCmd/tpm/src/X509/X509_RSA.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Tpm.h" #include "X509.h" diff --git a/TPMCmd/tpm/src/X509/X509_spt.c b/TPMCmd/tpm/src/X509/X509_spt.c index 7594b6b7..ba1dd39d 100644 --- a/TPMCmd/tpm/src/X509/X509_spt.c +++ b/TPMCmd/tpm/src/X509/X509_spt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Tpm.h" #include "TpmASN1.h" @@ -49,6 +15,8 @@ //# include "X509_SM2_fp.h" #endif // ALG_RSA +#if CC_CertifyX509 + //** Unmarshaling Functions //*** X509FindExtensionByOID() @@ -77,10 +45,10 @@ BOOL X509FindExtensionByOID(ASN1UnmarshalContext* ctxIn, // IN: the context to // Now, search in the extension context for(; ctx->size > ctx->offset; ctx->offset += length) { - VERIFY((length = ASN1NextTag(ctx)) >= 0); + GOTO_ERROR_UNLESS((length = ASN1NextTag(ctx)) >= 0); // If this is not a constructed sequence, then it doesn't belong // in the extensions. - VERIFY(ctx->tag == ASN1_CONSTRUCTED_SEQUENCE); + GOTO_ERROR_UNLESS(ctx->tag == ASN1_CONSTRUCTED_SEQUENCE); // Make sure that this entry could hold the OID if(length >= OID_SIZE(OID)) { @@ -96,7 +64,7 @@ BOOL X509FindExtensionByOID(ASN1UnmarshalContext* ctxIn, // IN: the context to } } } - VERIFY(ctx->offset == ctx->size); + GOTO_ERROR_UNLESS(ctx->offset == ctx->size); return FALSE; Error: ctxIn->size = -1; @@ -134,7 +102,7 @@ X509GetExtensionBits(ASN1UnmarshalContext* ctx, UINT32* value) // Return Type: TPM_RC // TPM_RCS_ATTRIBUTES the attributes of object are not consistent with // the extension setting -// TPM_RCS_VALUE problem parsing the extensions +// TPM_RC_VALUE problem parsing the extensions TPM_RC X509ProcessExtensions( OBJECT* object, // IN: The object with the attributes to @@ -181,6 +149,11 @@ X509ProcessExtensions( // keyUsage.integer = value; + + // see if any reserved bits are set + if(keyUsage.integer & ~(TPMA_X509_KEY_USAGE_ALLOWED_BITS)) + return TPM_RCS_RESERVED_BITS; + // For KeyUsage: // 1) 'sign' is SET if Key Usage includes signing badSign = ((KEY_USAGE_SIGN.integer & keyUsage.integer) != 0) @@ -191,9 +164,10 @@ X509ProcessExtensions( // 3) 'fixedTPM' is SET if Key Usage is non-repudiation badFixedTPM = IS_ATTRIBUTE(keyUsage.x509, TPMA_X509_KEY_USAGE, nonrepudiation) && !IS_ATTRIBUTE(attributes, TPMA_OBJECT, fixedTPM); - // 4)'restricted' is SET if Key Usage is for key agreement. - badRestricted = IS_ATTRIBUTE(keyUsage.x509, TPMA_X509_KEY_USAGE, keyAgreement) - && !IS_ATTRIBUTE(attributes, TPMA_OBJECT, restricted); + // 4)'restricted' is SET if Key Usage is for key encipherment. + badRestricted = + IS_ATTRIBUTE(keyUsage.x509, TPMA_X509_KEY_USAGE, keyEncipherment) + && !IS_ATTRIBUTE(attributes, TPMA_OBJECT, restricted); if(badSign || badDecrypt || badFixedTPM || badRestricted) return TPM_RCS_VALUE; } @@ -217,19 +191,19 @@ X509AddSigningAlgorithm( { switch(signKey->publicArea.type) { -#if ALG_RSA +# if ALG_RSA case TPM_ALG_RSA: return X509AddSigningAlgorithmRSA(signKey, scheme, ctx); -#endif // ALG_RSA -#if ALG_ECC +# endif // ALG_RSA +# if ALG_ECC case TPM_ALG_ECC: return X509AddSigningAlgorithmECC(signKey, scheme, ctx); -#endif // ALG_ECC -#if ALG_SM2 +# endif // ALG_ECC +# if ALG_SM2 case TPM_ALG_SM2: break; // no signing algorithm for SM2 yet // return X509AddSigningAlgorithmSM2(signKey, scheme, ctx); -#endif // ALG_SM2 +# endif // ALG_SM2 default: break; } @@ -248,18 +222,18 @@ X509AddPublicKey(ASN1MarshalContext* ctx, OBJECT* object) { switch(object->publicArea.type) { -#if ALG_RSA +# if ALG_RSA case TPM_ALG_RSA: return X509AddPublicRSA(object, ctx); -#endif -#if ALG_ECC +# endif +# if ALG_ECC case TPM_ALG_ECC: return X509AddPublicECC(object, ctx); -#endif -#if ALG_SM2 +# endif +# if ALG_SM2 case TPM_ALG_SM2: break; -#endif +# endif default: break; } @@ -283,3 +257,5 @@ X509PushAlgorithmIdentifierSequence(ASN1MarshalContext* ctx, const BYTE* OID) ASN1PushOID(ctx, OID); return ASN1EndEncapsulation(ctx, ASN1_CONSTRUCTED_SEQUENCE); } + +#endif // CC_CertifyX509 diff --git a/TPMCmd/tpm/src/command/Asymmetric/ECC_Decrypt.c b/TPMCmd/tpm/src/command/Asymmetric/ECC_Decrypt.c index b62638a6..602600fd 100644 --- a/TPMCmd/tpm/src/command/Asymmetric/ECC_Decrypt.c +++ b/TPMCmd/tpm/src/command/Asymmetric/ECC_Decrypt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ECC_Decrypt_fp.h" #include "CryptEccCrypt_fp.h" diff --git a/TPMCmd/tpm/src/command/Asymmetric/ECC_Encrypt.c b/TPMCmd/tpm/src/command/Asymmetric/ECC_Encrypt.c index 914f9eb4..6952eb29 100644 --- a/TPMCmd/tpm/src/command/Asymmetric/ECC_Encrypt.c +++ b/TPMCmd/tpm/src/command/Asymmetric/ECC_Encrypt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ECC_Encrypt_fp.h" diff --git a/TPMCmd/tpm/src/command/Asymmetric/ECC_Parameters.c b/TPMCmd/tpm/src/command/Asymmetric/ECC_Parameters.c index 42ea0b4a..d233cd2d 100644 --- a/TPMCmd/tpm/src/command/Asymmetric/ECC_Parameters.c +++ b/TPMCmd/tpm/src/command/Asymmetric/ECC_Parameters.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ECC_Parameters_fp.h" diff --git a/TPMCmd/tpm/src/command/Asymmetric/ECDH_KeyGen.c b/TPMCmd/tpm/src/command/Asymmetric/ECDH_KeyGen.c index 927c1a79..64797091 100644 --- a/TPMCmd/tpm/src/command/Asymmetric/ECDH_KeyGen.c +++ b/TPMCmd/tpm/src/command/Asymmetric/ECDH_KeyGen.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ECDH_KeyGen_fp.h" diff --git a/TPMCmd/tpm/src/command/Asymmetric/ECDH_ZGen.c b/TPMCmd/tpm/src/command/Asymmetric/ECDH_ZGen.c index db79e7e4..5be893a8 100644 --- a/TPMCmd/tpm/src/command/Asymmetric/ECDH_ZGen.c +++ b/TPMCmd/tpm/src/command/Asymmetric/ECDH_ZGen.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ECDH_ZGen_fp.h" diff --git a/TPMCmd/tpm/src/command/Asymmetric/EC_Ephemeral.c b/TPMCmd/tpm/src/command/Asymmetric/EC_Ephemeral.c index 46dda0ff..5ff22450 100644 --- a/TPMCmd/tpm/src/command/Asymmetric/EC_Ephemeral.c +++ b/TPMCmd/tpm/src/command/Asymmetric/EC_Ephemeral.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "EC_Ephemeral_fp.h" diff --git a/TPMCmd/tpm/src/command/Asymmetric/RSA_Decrypt.c b/TPMCmd/tpm/src/command/Asymmetric/RSA_Decrypt.c index 06af24a9..16214842 100644 --- a/TPMCmd/tpm/src/command/Asymmetric/RSA_Decrypt.c +++ b/TPMCmd/tpm/src/command/Asymmetric/RSA_Decrypt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "RSA_Decrypt_fp.h" diff --git a/TPMCmd/tpm/src/command/Asymmetric/RSA_Encrypt.c b/TPMCmd/tpm/src/command/Asymmetric/RSA_Encrypt.c index ec88b7fa..c73bc07a 100644 --- a/TPMCmd/tpm/src/command/Asymmetric/RSA_Encrypt.c +++ b/TPMCmd/tpm/src/command/Asymmetric/RSA_Encrypt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "RSA_Encrypt_fp.h" diff --git a/TPMCmd/tpm/src/command/Asymmetric/ZGen_2Phase.c b/TPMCmd/tpm/src/command/Asymmetric/ZGen_2Phase.c index 994427a5..a4d40a0e 100644 --- a/TPMCmd/tpm/src/command/Asymmetric/ZGen_2Phase.c +++ b/TPMCmd/tpm/src/command/Asymmetric/ZGen_2Phase.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ZGen_2Phase_fp.h" diff --git a/TPMCmd/tpm/src/command/AttachedComponent/AC_GetCapability.c b/TPMCmd/tpm/src/command/AttachedComponent/AC_GetCapability.c index 4fc3c78c..eb45640a 100644 --- a/TPMCmd/tpm/src/command/AttachedComponent/AC_GetCapability.c +++ b/TPMCmd/tpm/src/command/AttachedComponent/AC_GetCapability.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "AC_GetCapability_fp.h" #include "AC_spt_fp.h" diff --git a/TPMCmd/tpm/src/command/AttachedComponent/AC_Send.c b/TPMCmd/tpm/src/command/AttachedComponent/AC_Send.c index e8883563..f3bd736c 100644 --- a/TPMCmd/tpm/src/command/AttachedComponent/AC_Send.c +++ b/TPMCmd/tpm/src/command/AttachedComponent/AC_Send.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "AC_Send_fp.h" #include "AC_spt_fp.h" diff --git a/TPMCmd/tpm/src/command/AttachedComponent/AC_spt.c b/TPMCmd/tpm/src/command/AttachedComponent/AC_spt.c index a0cf59ec..dc9314b1 100644 --- a/TPMCmd/tpm/src/command/AttachedComponent/AC_spt.c +++ b/TPMCmd/tpm/src/command/AttachedComponent/AC_spt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This code in this clause is provided for testing of the TPM's command interface. // The implementation of Attached Components is not expected to be as shown in this @@ -41,8 +7,7 @@ #include "Tpm.h" #include "AC_spt_fp.h" -// This is the simulated AC data. This should be present in an actual -// implementation. +// This is the simulated AC data. This should be present in an actual implementation. #if 1 typedef struct diff --git a/TPMCmd/tpm/src/command/AttachedComponent/Policy_AC_SendSelect.c b/TPMCmd/tpm/src/command/AttachedComponent/Policy_AC_SendSelect.c index fab698d9..b7f18094 100644 --- a/TPMCmd/tpm/src/command/AttachedComponent/Policy_AC_SendSelect.c +++ b/TPMCmd/tpm/src/command/AttachedComponent/Policy_AC_SendSelect.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Policy_AC_SendSelect_fp.h" diff --git a/TPMCmd/tpm/src/command/Attestation/Attest_spt.c b/TPMCmd/tpm/src/command/Attestation/Attest_spt.c index 4aff6aa5..da0efa44 100644 --- a/TPMCmd/tpm/src/command/Attestation/Attest_spt.c +++ b/TPMCmd/tpm/src/command/Attestation/Attest_spt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Tpm.h" #include "Attest_spt_fp.h" diff --git a/TPMCmd/tpm/src/command/Attestation/Certify.c b/TPMCmd/tpm/src/command/Attestation/Certify.c index 39aa663a..244017d9 100644 --- a/TPMCmd/tpm/src/command/Attestation/Certify.c +++ b/TPMCmd/tpm/src/command/Attestation/Certify.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Attest_spt_fp.h" #include "Certify_fp.h" diff --git a/TPMCmd/tpm/src/command/Attestation/CertifyCreation.c b/TPMCmd/tpm/src/command/Attestation/CertifyCreation.c index ad2ef132..b800dda0 100644 --- a/TPMCmd/tpm/src/command/Attestation/CertifyCreation.c +++ b/TPMCmd/tpm/src/command/Attestation/CertifyCreation.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Attest_spt_fp.h" #include "CertifyCreation_fp.h" @@ -54,6 +20,7 @@ TPM2_CertifyCreation(CertifyCreation_In* in, // IN: input parameter list CertifyCreation_Out* out // OUT: output parameter list ) { + TPM_RC result = TPM_RC_SUCCESS; TPMT_TK_CREATION ticket; TPMS_ATTEST certifyInfo; OBJECT* certified = HandleToObject(in->objectHandle); @@ -66,8 +33,11 @@ TPM2_CertifyCreation(CertifyCreation_In* in, // IN: input parameter list // CertifyCreation specific input validation // Re-compute ticket - TicketComputeCreation( + result = TicketComputeCreation( in->creationTicket.hierarchy, &certified->name, &in->creationHash, &ticket); + if(result != TPM_RC_SUCCESS) + return result; + // Compare ticket if(!MemoryEqual2B(&ticket.digest.b, &in->creationTicket.digest.b)) return TPM_RCS_TICKET + RC_CertifyCreation_creationTicket; diff --git a/TPMCmd/tpm/src/command/Attestation/CertifyX509.c b/TPMCmd/tpm/src/command/Attestation/CertifyX509.c index a109c793..f23b4a2f 100644 --- a/TPMCmd/tpm/src/command/Attestation/CertifyX509.c +++ b/TPMCmd/tpm/src/command/Attestation/CertifyX509.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "CertifyX509_fp.h" #include "X509.h" @@ -39,7 +5,8 @@ #include "X509_spt_fp.h" #include "Attest_spt_fp.h" #if CERTIFYX509_DEBUG -# include "Platform_fp.h" +// TODO_RENAME_INC_FOLDER:platform_interface refers to the TPM_CoreLib platform interface +# include #endif #if CC_CertifyX509 // Conditional expansion of this file @@ -127,10 +94,14 @@ TPM2_CertifyX509(CertifyX509_In* in, // IN: input parameter list break; if(ctx.tag == ASN1_CONSTRUCTED_SEQUENCE) { - partial[countOfSequences].buf = &ctx.buffer[startOfElement]; - ctx.offset += length; - partial[countOfSequences].len = (INT16)ctx.offset - startOfElement; - if(++countOfSequences > ALLOWED_SEQUENCES) + if(countOfSequences < ALLOWED_SEQUENCES) + { + partial[countOfSequences].buf = &ctx.buffer[startOfElement]; + ctx.offset += length; + partial[countOfSequences].len = (INT16)ctx.offset - startOfElement; + } + countOfSequences++; + if(countOfSequences > ALLOWED_SEQUENCES) break; } else if(ctx.tag == X509_EXTENSIONS) diff --git a/TPMCmd/tpm/src/command/Attestation/GetCommandAuditDigest.c b/TPMCmd/tpm/src/command/Attestation/GetCommandAuditDigest.c index 6abac730..5bfb0982 100644 --- a/TPMCmd/tpm/src/command/Attestation/GetCommandAuditDigest.c +++ b/TPMCmd/tpm/src/command/Attestation/GetCommandAuditDigest.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Attest_spt_fp.h" #include "GetCommandAuditDigest_fp.h" diff --git a/TPMCmd/tpm/src/command/Attestation/GetSessionAuditDigest.c b/TPMCmd/tpm/src/command/Attestation/GetSessionAuditDigest.c index f23264ff..3f5b462d 100644 --- a/TPMCmd/tpm/src/command/Attestation/GetSessionAuditDigest.c +++ b/TPMCmd/tpm/src/command/Attestation/GetSessionAuditDigest.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Attest_spt_fp.h" #include "GetSessionAuditDigest_fp.h" diff --git a/TPMCmd/tpm/src/command/Attestation/GetTime.c b/TPMCmd/tpm/src/command/Attestation/GetTime.c index 1f570c34..d0feeaea 100644 --- a/TPMCmd/tpm/src/command/Attestation/GetTime.c +++ b/TPMCmd/tpm/src/command/Attestation/GetTime.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Attest_spt_fp.h" #include "GetTime_fp.h" diff --git a/TPMCmd/tpm/src/command/Attestation/Quote.c b/TPMCmd/tpm/src/command/Attestation/Quote.c index f69a4fe9..8e4ec566 100644 --- a/TPMCmd/tpm/src/command/Attestation/Quote.c +++ b/TPMCmd/tpm/src/command/Attestation/Quote.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Attest_spt_fp.h" #include "Quote_fp.h" diff --git a/TPMCmd/tpm/src/command/Capability/GetCapability.c b/TPMCmd/tpm/src/command/Capability/GetCapability.c index a630fda5..3f9bc595 100644 --- a/TPMCmd/tpm/src/command/Capability/GetCapability.c +++ b/TPMCmd/tpm/src/command/Capability/GetCapability.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "GetCapability_fp.h" @@ -86,11 +52,7 @@ TPM2_GetCapability(GetCapability_In* in, // IN: input parameter list out->moreData = SessionCapGetLoaded( (TPM_HANDLE)in->property, in->propertyCount, &data->handles); break; -# ifdef TPM_HT_SAVED_SESSION case TPM_HT_SAVED_SESSION: -# else - case TPM_HT_ACTIVE_SESSION: -# endif // Get list of handles of out->moreData = SessionCapGetSaved( (TPM_HANDLE)in->property, in->propertyCount, &data->handles); @@ -151,12 +113,16 @@ TPM2_GetCapability(GetCapability_In* in, // IN: input parameter list (TPM_HANDLE)in->property, in->propertyCount, &data->authPolicies); break; case TPM_CAP_ACT: +# if ACT_SUPPORT if(((TPM_RH)in->property < TPM_RH_ACT_0) || ((TPM_RH)in->property > TPM_RH_ACT_F)) return TPM_RCS_VALUE + RC_GetCapability_property; out->moreData = ActGetCapabilityData( (TPM_HANDLE)in->property, in->propertyCount, &data->actData); break; +# else + return TPM_RCS_VALUE + RC_GetCapability_property; +# endif // ACT_SUPPORT case TPM_CAP_VENDOR_PROPERTY: // vendor property is not implemented default: diff --git a/TPMCmd/tpm/src/command/Capability/SetCapability.c b/TPMCmd/tpm/src/command/Capability/SetCapability.c new file mode 100644 index 00000000..14ddbc45 --- /dev/null +++ b/TPMCmd/tpm/src/command/Capability/SetCapability.c @@ -0,0 +1,21 @@ +#include "Tpm.h" +#include "SetCapability_fp.h" + +#if CC_SetCapability // Conditional expansion of this file + +/*(See part 3 specification) +// This command allows configuration of the TPM's capabilities. +*/ +// Return Type: TPM_RC +// TPM_RC_HANDLE value of 'property' is in an unsupported handle range +// for the TPM_CAP_HANDLES 'capability' value +// TPM_RC_VALUE invalid 'capability' +TPM_RC +TPM2_SetCapability(SetCapability_In* in // IN: input parameter list +) +{ + // This reference implementation does not implement any settable capabilities. + return TPM_RCS_VALUE + SetCapability_setCapabilityData; +} + +#endif // CC_SetCapability \ No newline at end of file diff --git a/TPMCmd/tpm/src/command/Capability/TestParms.c b/TPMCmd/tpm/src/command/Capability/TestParms.c index 44ca754b..285fecb9 100644 --- a/TPMCmd/tpm/src/command/Capability/TestParms.c +++ b/TPMCmd/tpm/src/command/Capability/TestParms.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "TestParms_fp.h" diff --git a/TPMCmd/tpm/src/command/ClockTimer/ACT_SetTimeout.c b/TPMCmd/tpm/src/command/ClockTimer/ACT_SetTimeout.c index 36171911..690f5073 100644 --- a/TPMCmd/tpm/src/command/ClockTimer/ACT_SetTimeout.c +++ b/TPMCmd/tpm/src/command/ClockTimer/ACT_SetTimeout.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ACT_SetTimeout_fp.h" @@ -52,9 +18,14 @@ TPM2_ACT_SetTimeout(ACT_SetTimeout_In* in // IN: input parameter list // If 'startTimeout' is UINT32_MAX, then this is an attempt to disable the ACT // and turn off the signaling for the ACT. This is only valid if the ACT // is signaling. +# if ACT_SUPPORT if((in->startTimeout == UINT32_MAX) && !ActGetSignaled(in->actHandle)) return TPM_RC_VALUE + RC_ACT_SetTimeout_startTimeout; return ActCounterUpdate(in->actHandle, in->startTimeout); +# else // ACT_SUPPORT + NOT_REFERENCED(in); + return TPM_RC_VALUE + RC_ACT_SetTimeout_startTimeout; +# endif // ACT_SUPPORT } #endif // CC_ACT_SetTimeout \ No newline at end of file diff --git a/TPMCmd/tpm/src/command/ClockTimer/ACT_spt.c b/TPMCmd/tpm/src/command/ClockTimer/ACT_spt.c index 6ac37c3c..9b2ad8d6 100644 --- a/TPMCmd/tpm/src/command/ClockTimer/ACT_spt.c +++ b/TPMCmd/tpm/src/command/ClockTimer/ACT_spt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This code implements the ACT update code. It does not use a mutex. This code uses // a platform service (_plat__ACT_UpdateCounter()) that returns 'false' if the update @@ -44,10 +10,13 @@ //** Includes #include "Tpm.h" #include "ACT_spt_fp.h" -#include "Platform_fp.h" +// TODO_RENAME_INC_FOLDER:platform_interface refers to the TPM_CoreLib platform interface +#include //** Functions +#if ACT_SUPPORT + //*** _ActResume() // This function does the resume processing for an ACT. It updates the saved count // and turns signaling back on if necessary. @@ -82,15 +51,15 @@ BOOL ActStartup(STARTUP_TYPE type) if(type != SU_RESUME) { go.signaledACT = 0; -#define CLEAR_ACT_POLICY(N) \ - go.ACT_##N.hashAlg = TPM_ALG_NULL; \ - go.ACT_##N.authPolicy.b.size = 0; +# define CLEAR_ACT_POLICY(N) \ + go.ACT_##N.hashAlg = TPM_ALG_NULL; \ + go.ACT_##N.authPolicy.b.size = 0; FOR_EACH_ACT(CLEAR_ACT_POLICY) } else { // Resume each of the implemented ACT -#define RESUME_ACT(N) _ActResume(0x##N, &go.ACT_##N); +# define RESUME_ACT(N) _ActResume(0x##N, &go.ACT_##N); FOR_EACH_ACT(RESUME_ACT) } @@ -143,7 +112,7 @@ BOOL ActShutdown(TPM_SU state //IN: the type of the shutdown. // This will be populated as each of the ACT is queried go.signaledACT = 0; // Get the current count and the signaled state -#define SAVE_ACT_STATE(N) _ActSaveState(0x##N, &go.ACT_##N); +# define SAVE_ACT_STATE(N) _ActSaveState(0x##N, &go.ACT_##N); FOR_EACH_ACT(SAVE_ACT_STATE); } @@ -262,3 +231,29 @@ ActGetCapabilityData(TPM_HANDLE actHandle, // IN: the handle for the starti // was filled and there are no more ACT values to return return NO; } + +//*** ActGetOneCapability() +// This function returns an ACT's capability, if present. +BOOL ActGetOneCapability(TPM_HANDLE actHandle, // IN: the handle for the ACT + TPMS_ACT_DATA* actData // OUT: ACT data +) +{ + UINT32 act = actHandle - TPM_RH_ACT_0; + + if(ActIsImplemented(actHandle - TPM_RH_ACT_0)) + { + memset(&actData->attributes, 0, sizeof(actData->attributes)); + actData->handle = actHandle; + actData->timeout = _plat__ACT_GetRemaining(act); + if(_plat__ACT_GetSignaled(act)) + SET_ATTRIBUTE(actData->attributes, TPMA_ACT, signaled); + else + CLEAR_ATTRIBUTE(actData->attributes, TPMA_ACT, signaled); + if(go.preservedSignaled & (1 << act)) + SET_ATTRIBUTE(actData->attributes, TPMA_ACT, preserveSignaled); + return TRUE; + } + return FALSE; +} + +#endif // ACT_SUPPORT diff --git a/TPMCmd/tpm/src/command/ClockTimer/ClockRateAdjust.c b/TPMCmd/tpm/src/command/ClockTimer/ClockRateAdjust.c index 71561420..f9eca780 100644 --- a/TPMCmd/tpm/src/command/ClockTimer/ClockRateAdjust.c +++ b/TPMCmd/tpm/src/command/ClockTimer/ClockRateAdjust.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ClockRateAdjust_fp.h" diff --git a/TPMCmd/tpm/src/command/ClockTimer/ClockSet.c b/TPMCmd/tpm/src/command/ClockTimer/ClockSet.c index 10a88303..cbef7df6 100644 --- a/TPMCmd/tpm/src/command/ClockTimer/ClockSet.c +++ b/TPMCmd/tpm/src/command/ClockTimer/ClockSet.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ClockSet_fp.h" diff --git a/TPMCmd/tpm/src/command/ClockTimer/ReadClock.c b/TPMCmd/tpm/src/command/ClockTimer/ReadClock.c index d588a291..a2308d2b 100644 --- a/TPMCmd/tpm/src/command/ClockTimer/ReadClock.c +++ b/TPMCmd/tpm/src/command/ClockTimer/ReadClock.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ReadClock_fp.h" diff --git a/TPMCmd/tpm/src/command/CommandAudit/SetCommandCodeAuditStatus.c b/TPMCmd/tpm/src/command/CommandAudit/SetCommandCodeAuditStatus.c index 34139b5b..2b323c8f 100644 --- a/TPMCmd/tpm/src/command/CommandAudit/SetCommandCodeAuditStatus.c +++ b/TPMCmd/tpm/src/command/CommandAudit/SetCommandCodeAuditStatus.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "SetCommandCodeAuditStatus_fp.h" diff --git a/TPMCmd/tpm/src/command/Context/ContextLoad.c b/TPMCmd/tpm/src/command/Context/ContextLoad.c index 76163bf4..d945a30e 100644 --- a/TPMCmd/tpm/src/command/Context/ContextLoad.c +++ b/TPMCmd/tpm/src/command/Context/ContextLoad.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #if CC_ContextLoad // Conditional expansion of this file @@ -101,13 +67,17 @@ TPM2_ContextLoad(ContextLoad_In* in, // IN: input parameter list // of integrity protected and encrypted bytes. // Compute context integrity - ComputeContextIntegrity(&in->context, &integrityToCompare); + result = ComputeContextIntegrity(&in->context, &integrityToCompare); + if(result != TPM_RC_SUCCESS) + return result; // Compare integrity if(!MemoryEqual2B(&integrity.b, &integrityToCompare.b)) return TPM_RCS_INTEGRITY + RC_ContextLoad_context; // Compute context encryption key - ComputeContextProtectionKey(&in->context, &symKey, &iv); + result = ComputeContextProtectionKey(&in->context, &symKey, &iv); + if(result != TPM_RC_SUCCESS) + return result; // Decrypt context data in place CryptSymmetricDecrypt(buffer, diff --git a/TPMCmd/tpm/src/command/Context/ContextSave.c b/TPMCmd/tpm/src/command/Context/ContextSave.c index 352e52f2..370be13d 100644 --- a/TPMCmd/tpm/src/command/Context/ContextSave.c +++ b/TPMCmd/tpm/src/command/Context/ContextSave.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #if CC_ContextSave // Conditional expansion of this file @@ -145,7 +111,7 @@ TPM2_ContextSave(ContextSave_In* in, // IN: input parameter list out->context.savedHandle = (object->attributes.stClear == SET) ? 0x80000002 : 0x80000000; // Get object hierarchy - out->context.hierarchy = ObjectGetHierarchy(object); + out->context.hierarchy = object->hierarchy; break; } @@ -207,7 +173,9 @@ TPM2_ContextSave(ContextSave_In* in, // IN: input parameter list sizeof(out->context.sequence)); // Compute context encryption key - ComputeContextProtectionKey(&out->context, &symKey, &iv); + result = ComputeContextProtectionKey(&out->context, &symKey, &iv); + if(result != TPM_RC_SUCCESS) + return result; // Encrypt context blob CryptSymmetricEncrypt(out->context.contextBlob.t.buffer + integritySize, @@ -222,7 +190,9 @@ TPM2_ContextSave(ContextSave_In* in, // IN: input parameter list // Compute integrity hash for the object // In this implementation, the same routine is used for both sessions // and objects. - ComputeContextIntegrity(&out->context, &integrity); + result = ComputeContextIntegrity(&out->context, &integrity); + if(result != TPM_RC_SUCCESS) + return result; // add integrity at the beginning of context blob buffer = out->context.contextBlob.t.buffer; diff --git a/TPMCmd/tpm/src/command/Context/Context_spt.c b/TPMCmd/tpm/src/command/Context/Context_spt.c index abd98e6c..0a85fc0f 100644 --- a/TPMCmd/tpm/src/command/Context/Context_spt.c +++ b/TPMCmd/tpm/src/command/Context/Context_spt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Tpm.h" @@ -57,33 +23,36 @@ bits the number of bits needed for a symmetric key and IV for the context encryption */ -// Return Type: void -void ComputeContextProtectionKey(TPMS_CONTEXT* contextBlob, // IN: context blob - TPM2B_SYM_KEY* symKey, // OUT: the symmetric key - TPM2B_IV* iv // OUT: the IV. +// Return Type: TPM_RC +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects or the TPM failed +// to derive the Firmware Secret. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the TPM +// failed to derive the Firmware SVN Secret for the +// requested SVN. +TPM_RC ComputeContextProtectionKey(TPMS_CONTEXT* contextBlob, // IN: context blob + TPM2B_SYM_KEY* symKey, // OUT: the symmetric key + TPM2B_IV* iv // OUT: the IV. ) { - UINT16 symKeyBits; // number of bits in the parent's - // symmetric key - TPM2B_PROOF* proof = NULL; // the proof value to use. Is null for - // everything but a primary object in - // the Endorsement Hierarchy + TPM_RC result = TPM_RC_SUCCESS; + UINT16 symKeyBits; // number of bits in the parent's + // symmetric key + TPM2B_PROOF proof; // the proof value to use - BYTE kdfResult[sizeof(TPMU_HA) * 2]; // Value produced by the KDF + BYTE kdfResult[sizeof(TPMU_HA) * 2]; // Value produced by the KDF - TPM2B_DATA sequence2B, handle2B; - - // Get proof value - proof = HierarchyGetProof(contextBlob->hierarchy); + TPM2B_DATA sequence2B, handle2B; // Get sequence value in 2B format sequence2B.t.size = sizeof(contextBlob->sequence); - cAssert(sequence2B.t.size <= sizeof(sequence2B.t.buffer)); + MUST_BE(sizeof(contextBlob->sequence) <= sizeof(sequence2B.t.buffer)); MemoryCopy(sequence2B.t.buffer, &contextBlob->sequence, sequence2B.t.size); // Get handle value in 2B format handle2B.t.size = sizeof(contextBlob->savedHandle); - cAssert(handle2B.t.size <= sizeof(handle2B.t.buffer)); + MUST_BE(sizeof(contextBlob->savedHandle) <= sizeof(handle2B.t.buffer)); MemoryCopy(handle2B.t.buffer, &contextBlob->savedHandle, handle2B.t.size); // Get the symmetric encryption key size @@ -92,9 +61,14 @@ void ComputeContextProtectionKey(TPMS_CONTEXT* contextBlob, // IN: context blo // Get the size of the IV for the algorithm iv->t.size = CryptGetSymmetricBlockSize(CONTEXT_ENCRYPT_ALG, symKeyBits); + // Get proof value + result = HierarchyGetProof(contextBlob->hierarchy, &proof); + if(result != TPM_RC_SUCCESS) + return result; + // KDFa to generate symmetric key and IV value CryptKDFa(CONTEXT_INTEGRITY_HASH_ALG, - &proof->b, + &proof.b, CONTEXT_KEY, &sequence2B.b, &handle2B.b, @@ -103,6 +77,8 @@ void ComputeContextProtectionKey(TPMS_CONTEXT* contextBlob, // IN: context blo NULL, FALSE); + MemorySet(proof.b.buffer, 0, proof.b.size); + // Copy part of the returned value as the key pAssert(symKey->t.size <= sizeof(symKey->t.buffer)); MemoryCopy(symKey->t.buffer, kdfResult, symKey->t.size); @@ -111,7 +87,7 @@ void ComputeContextProtectionKey(TPMS_CONTEXT* contextBlob, // IN: context blo pAssert(iv->t.size <= sizeof(iv->t.buffer)); MemoryCopy(iv->t.buffer, &kdfResult[symKey->t.size], iv->t.size); - return; + return TPM_RC_SUCCESS; } //*** ComputeContextIntegrity() @@ -137,21 +113,33 @@ void ComputeContextProtectionKey(TPMS_CONTEXT* contextBlob, // IN: context blo handle the handle parameter of the TPMS_CONTEXT encContext the encrypted context blob */ -// Return Type: void -void ComputeContextIntegrity(TPMS_CONTEXT* contextBlob, // IN: context blob - TPM2B_DIGEST* integrity // OUT: integrity +// Return Type: TPM_RC +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects or the TPM failed +// to derive the Firmware Secret. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the TPM +// failed to derive the Firmware SVN Secret for the +// requested SVN. +TPM_RC ComputeContextIntegrity(TPMS_CONTEXT* contextBlob, // IN: context blob + TPM2B_DIGEST* integrity // OUT: integrity ) { - HMAC_STATE hmacState; - TPM2B_PROOF* proof; - UINT16 integritySize; + TPM_RC result = TPM_RC_SUCCESS; + HMAC_STATE hmacState; + TPM2B_PROOF proof; + UINT16 integritySize; // Get proof value - proof = HierarchyGetProof(contextBlob->hierarchy); + result = HierarchyGetProof(contextBlob->hierarchy, &proof); + if(result != TPM_RC_SUCCESS) + return result; // Start HMAC integrity->t.size = - CryptHmacStart2B(&hmacState, CONTEXT_INTEGRITY_HASH_ALG, &proof->b); + CryptHmacStart2B(&hmacState, CONTEXT_INTEGRITY_HASH_ALG, &proof.b); + + MemorySet(proof.b.buffer, 0, proof.b.size); // Compute integrity size at the beginning of context blob integritySize = sizeof(integrity->t.size) + integrity->t.size; @@ -185,7 +173,7 @@ void ComputeContextIntegrity(TPMS_CONTEXT* contextBlob, // IN: context blob // Complete HMAC CryptHmacEnd2B(&hmacState, &integrity->b); - return; + return TPM_RC_SUCCESS; } //*** SequenceDataExport(); diff --git a/TPMCmd/tpm/src/command/Context/EvictControl.c b/TPMCmd/tpm/src/command/Context/EvictControl.c index 3cb26aaa..39830b20 100644 --- a/TPMCmd/tpm/src/command/Context/EvictControl.c +++ b/TPMCmd/tpm/src/command/Context/EvictControl.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "EvictControl_fp.h" @@ -44,7 +10,9 @@ // TPM_RC_ATTRIBUTES an object with 'temporary', 'stClear' or 'publicOnly' // attribute SET cannot be made persistent // TPM_RC_HIERARCHY 'auth' cannot authorize the operation in the hierarchy -// of 'evictObject' +// of 'evictObject'; +// an object in a firmware-bound or SVN-bound hierarchy +// cannot be made persistent. // TPM_RC_HANDLE 'evictHandle' of the persistent object to be evicted is // not the same as the 'persistentHandle' argument // TPM_RC_NV_HANDLE 'persistentHandle' is unavailable @@ -63,6 +31,12 @@ TPM2_EvictControl(EvictControl_In* in // IN: input parameter list // Get internal object pointer evictObject = HandleToObject(in->objectHandle); + // Objects in a firmware-limited or SVN-limited hierarchy cannot be made + // persistent. + if(HierarchyIsFirmwareLimited(evictObject->hierarchy) + || HierarchyIsSvnLimited(evictObject->hierarchy)) + return TPM_RCS_HIERARCHY + RC_EvictControl_objectHandle; + // Temporary, stClear or public only objects can not be made persistent if(evictObject->attributes.temporary == SET || evictObject->attributes.stClear == SET diff --git a/TPMCmd/tpm/src/command/Context/FlushContext.c b/TPMCmd/tpm/src/command/Context/FlushContext.c index b968d6fd..e8e09cc2 100644 --- a/TPMCmd/tpm/src/command/Context/FlushContext.c +++ b/TPMCmd/tpm/src/command/Context/FlushContext.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "FlushContext_fp.h" diff --git a/TPMCmd/tpm/src/command/DA/DictionaryAttackLockReset.c b/TPMCmd/tpm/src/command/DA/DictionaryAttackLockReset.c index 3a8c18fe..170a2f8a 100644 --- a/TPMCmd/tpm/src/command/DA/DictionaryAttackLockReset.c +++ b/TPMCmd/tpm/src/command/DA/DictionaryAttackLockReset.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "DictionaryAttackLockReset_fp.h" diff --git a/TPMCmd/tpm/src/command/DA/DictionaryAttackParameters.c b/TPMCmd/tpm/src/command/DA/DictionaryAttackParameters.c index ab1e17b0..1a3c46ce 100644 --- a/TPMCmd/tpm/src/command/DA/DictionaryAttackParameters.c +++ b/TPMCmd/tpm/src/command/DA/DictionaryAttackParameters.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "DictionaryAttackParameters_fp.h" @@ -55,7 +21,8 @@ TPM2_DictionaryAttackParameters( gp.recoveryTime = in->newRecoveryTime; gp.lockoutRecovery = in->lockoutRecovery; -# if 0 // Errata eliminates this code +# if 0 + // Errata eliminates this code // This functionality has been disabled. The preferred implementation is now // to leave failedTries unchanged when the parameters are changed. This could // have the effect of putting the TPM into DA lockout if in->newMaxTries is diff --git a/TPMCmd/tpm/src/command/Duplication/Duplicate.c b/TPMCmd/tpm/src/command/Duplication/Duplicate.c index 38111f01..27690c8b 100644 --- a/TPMCmd/tpm/src/command/Duplication/Duplicate.c +++ b/TPMCmd/tpm/src/command/Duplication/Duplicate.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Duplicate_fp.h" diff --git a/TPMCmd/tpm/src/command/Duplication/Import.c b/TPMCmd/tpm/src/command/Duplication/Import.c index 690fc8b9..8c15685e 100644 --- a/TPMCmd/tpm/src/command/Duplication/Import.c +++ b/TPMCmd/tpm/src/command/Duplication/Import.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Import_fp.h" diff --git a/TPMCmd/tpm/src/command/Duplication/Rewrap.c b/TPMCmd/tpm/src/command/Duplication/Rewrap.c index c76a1ecf..e7b75d61 100644 --- a/TPMCmd/tpm/src/command/Duplication/Rewrap.c +++ b/TPMCmd/tpm/src/command/Duplication/Rewrap.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Rewrap_fp.h" diff --git a/TPMCmd/tpm/src/command/EA/PolicyAuthValue.c b/TPMCmd/tpm/src/command/EA/PolicyAuthValue.c index 42bff9a6..724f1fd7 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyAuthValue.c +++ b/TPMCmd/tpm/src/command/EA/PolicyAuthValue.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyAuthValue_fp.h" diff --git a/TPMCmd/tpm/src/command/EA/PolicyAuthorize.c b/TPMCmd/tpm/src/command/EA/PolicyAuthorize.c index 0486836b..c14f75e9 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyAuthorize.c +++ b/TPMCmd/tpm/src/command/EA/PolicyAuthorize.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyAuthorize_fp.h" @@ -52,6 +18,7 @@ TPM_RC TPM2_PolicyAuthorize(PolicyAuthorize_In* in // IN: input parameter list ) { + TPM_RC result = TPM_RC_SUCCESS; SESSION* session; TPM2B_DIGEST authHash; HASH_STATE hashState; @@ -105,8 +72,10 @@ TPM2_PolicyAuthorize(PolicyAuthorize_In* in // IN: input parameter list CryptHashEnd2B(&hashState, &authHash.b); // re-compute TPMT_TK_VERIFIED - TicketComputeVerified( + result = TicketComputeVerified( in->checkTicket.hierarchy, &authHash, &in->keySign, &ticket); + if(result != TPM_RC_SUCCESS) + return result; // Compare ticket digest. If not match, return error if(!MemoryEqual2B(&in->checkTicket.digest.b, &ticket.digest.b)) diff --git a/TPMCmd/tpm/src/command/EA/PolicyAuthorizeNV.c b/TPMCmd/tpm/src/command/EA/PolicyAuthorizeNV.c index 40395803..80625ccd 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyAuthorizeNV.c +++ b/TPMCmd/tpm/src/command/EA/PolicyAuthorizeNV.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #if CC_PolicyAuthorizeNV // Conditional expansion of this file diff --git a/TPMCmd/tpm/src/command/EA/PolicyCapability.c b/TPMCmd/tpm/src/command/EA/PolicyCapability.c new file mode 100644 index 00000000..5f72bf1d --- /dev/null +++ b/TPMCmd/tpm/src/command/EA/PolicyCapability.c @@ -0,0 +1,272 @@ +#include "Tpm.h" +#include "PolicyCapability_fp.h" +#include "Policy_spt_fp.h" +#include "ACT_spt_fp.h" +#include "AlgorithmCap_fp.h" +#include "CommandAudit_fp.h" +#include "CommandCodeAttributes_fp.h" +#include "CryptEccMain_fp.h" +#include "Handle_fp.h" +#include "NvDynamic_fp.h" +#include "Object_fp.h" +#include "PCR_fp.h" +#include "PP_fp.h" +#include "PropertyCap_fp.h" +#include "Session_fp.h" + +#if CC_PolicyCapability // Conditional expansion of this file + +/*(See part 3 specification) +// This command performs an immediate policy assertion against the current +// value of a TPM Capability. +*/ +// Return Type: TPM_RC +// TPM_RC_HANDLE value of 'property' is in an unsupported handle range +// for the TPM_CAP_HANDLES 'capability' value +// TPM_RC_VALUE invalid 'capability'; or 'property' is not 0 for the +// TPM_CAP_PCRS 'capability' value +// TPM_RC_SIZE 'operandB' is larger than the size of the capability +// data minus 'offset'. +TPM_RC +TPM2_PolicyCapability(PolicyCapability_In* in // IN: input parameter list +) +{ + union + { + TPMS_ALG_PROPERTY alg; + TPM_HANDLE handle; + TPMA_CC commandAttributes; + TPM_CC command; + TPMS_TAGGED_PCR_SELECT pcrSelect; + TPMS_TAGGED_PROPERTY tpmProperty; +# if ALG_ECC + TPM_ECC_CURVE curve; +# endif // ALG_ECC + TPMS_TAGGED_POLICY policy; +# if ACT_SUPPORT + TPMS_ACT_DATA act; +# endif // ACT_SUPPORT + } propertyUnion; + + SESSION* session; + BYTE propertyData[sizeof(propertyUnion)]; + UINT16 propertySize = 0; + BYTE* buffer = propertyData; + INT32 bufferSize = sizeof(propertyData); + TPM_CC commandCode = TPM_CC_PolicyCapability; + HASH_STATE hashState; + TPM2B_DIGEST argHash; + + // Get pointer to the session structure + session = SessionGet(in->policySession); + + if(session->attributes.isTrialPolicy == CLEAR) + { + switch(in->capability) + { + case TPM_CAP_ALGS: + if(AlgorithmCapGetOneImplemented((TPM_ALG_ID)in->property, + &propertyUnion.alg)) + { + propertySize = TPMS_ALG_PROPERTY_Marshal( + &propertyUnion.alg, &buffer, &bufferSize); + } + break; + case TPM_CAP_HANDLES: + { + BOOL foundHandle = FALSE; + switch(HandleGetType((TPM_HANDLE)in->property)) + { + case TPM_HT_TRANSIENT: + foundHandle = ObjectCapGetOneLoaded((TPM_HANDLE)in->property); + break; + case TPM_HT_PERSISTENT: + foundHandle = NvCapGetOnePersistent((TPM_HANDLE)in->property); + break; + case TPM_HT_NV_INDEX: + foundHandle = NvCapGetOneIndex((TPM_HANDLE)in->property); + break; + case TPM_HT_LOADED_SESSION: + foundHandle = + SessionCapGetOneLoaded((TPM_HANDLE)in->property); + break; + case TPM_HT_SAVED_SESSION: + foundHandle = SessionCapGetOneSaved((TPM_HANDLE)in->property); + break; + case TPM_HT_PCR: + foundHandle = PCRCapGetOneHandle((TPM_HANDLE)in->property); + break; + case TPM_HT_PERMANENT: + foundHandle = + PermanentCapGetOneHandle((TPM_HANDLE)in->property); + break; + default: + // Unsupported input handle type + return TPM_RCS_HANDLE + RC_PolicyCapability_property; + break; + } + if(foundHandle) + { + TPM_HANDLE handle = (TPM_HANDLE)in->property; + propertySize = TPM_HANDLE_Marshal(&handle, &buffer, &bufferSize); + } + break; + } + case TPM_CAP_COMMANDS: + if(CommandCapGetOneCC((TPM_CC)in->property, + &propertyUnion.commandAttributes)) + { + propertySize = TPMA_CC_Marshal( + &propertyUnion.commandAttributes, &buffer, &bufferSize); + } + break; + case TPM_CAP_PP_COMMANDS: + if(PhysicalPresenceCapGetOneCC((TPM_CC)in->property)) + { + TPM_CC cc = (TPM_CC)in->property; + propertySize = TPM_CC_Marshal(&cc, &buffer, &bufferSize); + } + break; + case TPM_CAP_AUDIT_COMMANDS: + if(CommandAuditCapGetOneCC((TPM_CC)in->property)) + { + TPM_CC cc = (TPM_CC)in->property; + propertySize = TPM_CC_Marshal(&cc, &buffer, &bufferSize); + } + break; + // NOTE: TPM_CAP_PCRS can't work for PolicyCapability since CAP_PCRS + // requires property to be 0 and always returns all the PCR banks. + case TPM_CAP_PCR_PROPERTIES: + if(PCRGetProperty((TPM_PT_PCR)in->property, &propertyUnion.pcrSelect)) + { + propertySize = TPMS_TAGGED_PCR_SELECT_Marshal( + &propertyUnion.pcrSelect, &buffer, &bufferSize); + } + break; + case TPM_CAP_TPM_PROPERTIES: + if(TPMCapGetOneProperty((TPM_PT)in->property, + &propertyUnion.tpmProperty)) + { + propertySize = TPMS_TAGGED_PROPERTY_Marshal( + &propertyUnion.tpmProperty, &buffer, &bufferSize); + } + break; +# if ALG_ECC + case TPM_CAP_ECC_CURVES: + { + TPM_ECC_CURVE curve = (TPM_ECC_CURVE)in->property; + if(CryptCapGetOneECCCurve(curve)) + { + propertySize = + TPM_ECC_CURVE_Marshal(&curve, &buffer, &bufferSize); + } + break; + } +# endif // ALG_ECC + case TPM_CAP_AUTH_POLICIES: + if(HandleGetType((TPM_HANDLE)in->property) != TPM_HT_PERMANENT) + return TPM_RCS_VALUE + RC_PolicyCapability_property; + if(PermanentHandleGetOnePolicy((TPM_HANDLE)in->property, + &propertyUnion.policy)) + { + propertySize = TPMS_TAGGED_POLICY_Marshal( + &propertyUnion.policy, &buffer, &bufferSize); + } + break; +# if ACT_SUPPORT + case TPM_CAP_ACT: + if(((TPM_RH)in->property < TPM_RH_ACT_0) + || ((TPM_RH)in->property > TPM_RH_ACT_F)) + return TPM_RCS_VALUE + RC_PolicyCapability_property; + if(ActGetOneCapability((TPM_HANDLE)in->property, &propertyUnion.act)) + { + propertySize = TPMS_ACT_DATA_Marshal( + &propertyUnion.act, &buffer, &bufferSize); + } + break; +# endif // ACT_SUPPORT + case TPM_CAP_VENDOR_PROPERTY: + // vendor property is not implemented + default: + // Unsupported TPM_CAP value + return TPM_RCS_VALUE + RC_PolicyCapability_capability; + break; + } + + if(propertySize == 0) + { + // A property that doesn't exist trivially satisfies NEQ, and + // trivially can't satisfy any other operation. + if(in->operation != TPM_EO_NEQ) + { + return TPM_RC_POLICY; + } + } + else + { + // The property was found, so we need to perform the comparison. + + // Make sure that offset is within range + if(in->offset > propertySize) + { + return TPM_RCS_VALUE + RC_PolicyCapability_offset; + } + + // Property data size should not be smaller than input operandB size + if((propertySize - in->offset) < in->operandB.t.size) + { + return TPM_RCS_SIZE + RC_PolicyCapability_operandB; + } + + if(!PolicySptCheckCondition(in->operation, + propertyData + in->offset, + in->operandB.t.buffer, + in->operandB.t.size)) + { + return TPM_RC_POLICY; + } + } + } + // Internal Data Update + + // Start argument hash + argHash.t.size = CryptHashStart(&hashState, session->authHashAlg); + + // add operandB + CryptDigestUpdate2B(&hashState, &in->operandB.b); + + // add offset + CryptDigestUpdateInt(&hashState, sizeof(UINT16), in->offset); + + // add operation + CryptDigestUpdateInt(&hashState, sizeof(TPM_EO), in->operation); + + // add capability + CryptDigestUpdateInt(&hashState, sizeof(TPM_CAP), in->capability); + + // add property + CryptDigestUpdateInt(&hashState, sizeof(UINT32), in->property); + + // complete argument digest + CryptHashEnd2B(&hashState, &argHash.b); + + // Update policyDigest + // Start digest + CryptHashStart(&hashState, session->authHashAlg); + + // add old digest + CryptDigestUpdate2B(&hashState, &session->u2.policyDigest.b); + + // add commandCode + CryptDigestUpdateInt(&hashState, sizeof(TPM_CC), commandCode); + + // add argument digest + CryptDigestUpdate2B(&hashState, &argHash.b); + + // complete the digest + CryptHashEnd2B(&hashState, &session->u2.policyDigest.b); + + return TPM_RC_SUCCESS; +} + +#endif // CC_PolicyCapability \ No newline at end of file diff --git a/TPMCmd/tpm/src/command/EA/PolicyCommandCode.c b/TPMCmd/tpm/src/command/EA/PolicyCommandCode.c index 5a49be28..9604d251 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyCommandCode.c +++ b/TPMCmd/tpm/src/command/EA/PolicyCommandCode.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyCommandCode_fp.h" diff --git a/TPMCmd/tpm/src/command/EA/PolicyCounterTimer.c b/TPMCmd/tpm/src/command/EA/PolicyCounterTimer.c index 065ea439..44b8f1ef 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyCounterTimer.c +++ b/TPMCmd/tpm/src/command/EA/PolicyCounterTimer.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyCounterTimer_fp.h" diff --git a/TPMCmd/tpm/src/command/EA/PolicyCpHash.c b/TPMCmd/tpm/src/command/EA/PolicyCpHash.c index 32bf665b..a0d11aa7 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyCpHash.c +++ b/TPMCmd/tpm/src/command/EA/PolicyCpHash.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyCpHash_fp.h" @@ -67,7 +33,7 @@ TPM2_PolicyCpHash(PolicyCpHash_In* in // IN: input parameter list // error if the cpHash in session context is not empty and is not the same // as the input or is not a cpHash - if((session->u1.cpHash.t.size != 0) + if((IsCpHashUnionOccupied(session->attributes)) && (!session->attributes.isCpHashDefined || !MemoryEqual2B(&in->cpHashA.b, &session->u1.cpHash.b))) return TPM_RC_CPHASH; diff --git a/TPMCmd/tpm/src/command/EA/PolicyDuplicationSelect.c b/TPMCmd/tpm/src/command/EA/PolicyDuplicationSelect.c index c96135db..e2bd5681 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyDuplicationSelect.c +++ b/TPMCmd/tpm/src/command/EA/PolicyDuplicationSelect.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyDuplicationSelect_fp.h" @@ -43,7 +9,7 @@ */ // Return Type: TPM_RC // TPM_RC_COMMAND_CODE 'commandCode' of 'policySession' is not empty -// TPM_RC_CPHASH 'cpHash' of 'policySession' is not empty +// TPM_RC_CPHASH 'nameHash' of 'policySession' is not empty TPM_RC TPM2_PolicyDuplicationSelect( PolicyDuplicationSelect_In* in // IN: input parameter list @@ -58,8 +24,8 @@ TPM2_PolicyDuplicationSelect( // Get pointer to the session structure session = SessionGet(in->policySession); - // cpHash in session context must be empty - if(session->u1.cpHash.t.size != 0) + // nameHash in session context must be empty + if(session->u1.nameHash.t.size != 0) return TPM_RC_CPHASH; // commandCode in session context must be empty @@ -69,7 +35,7 @@ TPM2_PolicyDuplicationSelect( // Internal Data Update // Update name hash - session->u1.cpHash.t.size = CryptHashStart(&hashState, session->authHashAlg); + session->u1.nameHash.t.size = CryptHashStart(&hashState, session->authHashAlg); // add objectName CryptDigestUpdate2B(&hashState, &in->objectName.b); @@ -78,7 +44,8 @@ TPM2_PolicyDuplicationSelect( CryptDigestUpdate2B(&hashState, &in->newParentName.b); // complete hash - CryptHashEnd2B(&hashState, &session->u1.cpHash.b); + CryptHashEnd2B(&hashState, &session->u1.nameHash.b); + session->attributes.isNameHashDefined = SET; // update policy hash // Old policyDigest size should be the same as the new policyDigest size since diff --git a/TPMCmd/tpm/src/command/EA/PolicyGetDigest.c b/TPMCmd/tpm/src/command/EA/PolicyGetDigest.c index 7e217372..5e700fc2 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyGetDigest.c +++ b/TPMCmd/tpm/src/command/EA/PolicyGetDigest.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyGetDigest_fp.h" diff --git a/TPMCmd/tpm/src/command/EA/PolicyLocality.c b/TPMCmd/tpm/src/command/EA/PolicyLocality.c index 1fb08785..8e4ebd9b 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyLocality.c +++ b/TPMCmd/tpm/src/command/EA/PolicyLocality.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyLocality_fp.h" #include "Marshal.h" diff --git a/TPMCmd/tpm/src/command/EA/PolicyNV.c b/TPMCmd/tpm/src/command/EA/PolicyNV.c index 8d8943d6..d53047a1 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyNV.c +++ b/TPMCmd/tpm/src/command/EA/PolicyNV.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyNV_fp.h" @@ -82,7 +48,7 @@ TPM2_PolicyNV(PolicyNV_In* in // IN: input parameter list if(result != TPM_RC_SUCCESS) return result; - // Make sure that offset is withing range + // Make sure that offset is within range if(in->offset > nvIndex->publicArea.dataSize) return TPM_RCS_VALUE + RC_PolicyNV_offset; diff --git a/TPMCmd/tpm/src/command/EA/PolicyNameHash.c b/TPMCmd/tpm/src/command/EA/PolicyNameHash.c index ba6cab5d..f1c67d5e 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyNameHash.c +++ b/TPMCmd/tpm/src/command/EA/PolicyNameHash.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyNameHash_fp.h" @@ -63,9 +29,8 @@ TPM2_PolicyNameHash(PolicyNameHash_In* in // IN: input parameter list if(in->nameHash.t.size != CryptHashGetDigestSize(session->authHashAlg)) return TPM_RCS_SIZE + RC_PolicyNameHash_nameHash; - // u1 in the policy session context cannot otherwise be occupied - if(session->u1.cpHash.b.size != 0 || session->attributes.isBound - || session->attributes.isCpHashDefined || session->attributes.isTemplateSet) + // error if the nameHash in session context is not empty + if(IsCpHashUnionOccupied(session->attributes)) return TPM_RC_CPHASH; // Internal Data Update @@ -88,7 +53,8 @@ TPM2_PolicyNameHash(PolicyNameHash_In* in // IN: input parameter list CryptHashEnd2B(&hashState, &session->u2.policyDigest.b); // update nameHash in session context - session->u1.cpHash = in->nameHash; + session->u1.nameHash = in->nameHash; + session->attributes.isNameHashDefined = SET; return TPM_RC_SUCCESS; } diff --git a/TPMCmd/tpm/src/command/EA/PolicyNvWritten.c b/TPMCmd/tpm/src/command/EA/PolicyNvWritten.c index 17e01aba..ab4aa22b 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyNvWritten.c +++ b/TPMCmd/tpm/src/command/EA/PolicyNvWritten.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyNvWritten_fp.h" diff --git a/TPMCmd/tpm/src/command/EA/PolicyOR.c b/TPMCmd/tpm/src/command/EA/PolicyOR.c index 26ee1f0e..023e0d3c 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyOR.c +++ b/TPMCmd/tpm/src/command/EA/PolicyOR.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyOR_fp.h" diff --git a/TPMCmd/tpm/src/command/EA/PolicyPCR.c b/TPMCmd/tpm/src/command/EA/PolicyPCR.c index 444b8304..9a2ba02e 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyPCR.c +++ b/TPMCmd/tpm/src/command/EA/PolicyPCR.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #if CC_PolicyPCR // Conditional expansion of this file diff --git a/TPMCmd/tpm/src/command/EA/PolicyParameters.c b/TPMCmd/tpm/src/command/EA/PolicyParameters.c new file mode 100644 index 00000000..bad01d17 --- /dev/null +++ b/TPMCmd/tpm/src/command/EA/PolicyParameters.c @@ -0,0 +1,63 @@ +#include "Tpm.h" +#include "PolicyParameters_fp.h" + +#if CC_PolicyParameters // Conditional expansion of this file + +/*(See part 3 specification) +// Add a parameters restriction to the policyDigest +*/ +// Return Type: TPM_RC +// TPM_RC_CPHASH cpHash of 'policySession' has previously been set +// to a different value +// TPM_RC_SIZE 'pHash' is not the size of the digest produced by the +// hash algorithm associated with 'policySession' +TPM_RC +TPM2_PolicyParameters(PolicyParameters_In* in // IN: input parameter list +) +{ + SESSION* session; + TPM_CC commandCode = TPM_CC_PolicyParameters; + HASH_STATE hashState; + + // Input Validation + + // Get pointer to the session structure + session = SessionGet(in->policySession); + + // A valid pHash must have the same size as session hash digest + // Since the authHashAlg for a session cannot be TPM_ALG_NULL, the digest size + // is always non-zero. + if(in->pHash.t.size != CryptHashGetDigestSize(session->authHashAlg)) + return TPM_RCS_SIZE + RC_PolicyParameters_pHash; + + // error if the pHash in session context is not empty + if(IsCpHashUnionOccupied(session->attributes)) + return TPM_RC_CPHASH; + + // Internal Data Update + + // Update policy hash + // policyDigestnew = hash(policyDigestold || TPM_CC_PolicyParameters || pHash) + // Start hash + CryptHashStart(&hashState, session->authHashAlg); + + // add old digest + CryptDigestUpdate2B(&hashState, &session->u2.policyDigest.b); + + // add commandCode + CryptDigestUpdateInt(&hashState, sizeof(TPM_CC), commandCode); + + // add pHash + CryptDigestUpdate2B(&hashState, &in->pHash.b); + + // complete the digest + CryptHashEnd2B(&hashState, &session->u2.policyDigest.b); + + // update pHash in session context + session->u1.pHash = in->pHash; + session->attributes.isParametersHashDefined = SET; + + return TPM_RC_SUCCESS; +} + +#endif // CC_PolicyParameters diff --git a/TPMCmd/tpm/src/command/EA/PolicyPassword.c b/TPMCmd/tpm/src/command/EA/PolicyPassword.c index 9f9baa68..74990f74 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyPassword.c +++ b/TPMCmd/tpm/src/command/EA/PolicyPassword.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyPassword_fp.h" diff --git a/TPMCmd/tpm/src/command/EA/PolicyPhysicalPresence.c b/TPMCmd/tpm/src/command/EA/PolicyPhysicalPresence.c index 6a2aa8a3..570b6fd4 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyPhysicalPresence.c +++ b/TPMCmd/tpm/src/command/EA/PolicyPhysicalPresence.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyPhysicalPresence_fp.h" diff --git a/TPMCmd/tpm/src/command/EA/PolicySecret.c b/TPMCmd/tpm/src/command/EA/PolicySecret.c index 3294d04e..3cecb0a3 100644 --- a/TPMCmd/tpm/src/command/EA/PolicySecret.c +++ b/TPMCmd/tpm/src/command/EA/PolicySecret.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicySecret_fp.h" @@ -99,14 +65,17 @@ TPM2_PolicySecret(PolicySecret_In* in, // IN: input parameter list BOOL expiresOnReset = (in->nonceTPM.t.size == 0); // Compute policy ticket authTimeout &= ~EXPIRATION_BIT; - TicketComputeAuth(TPM_ST_AUTH_SECRET, - EntityGetHierarchy(in->authHandle), - authTimeout, - expiresOnReset, - &in->cpHashA, - &in->policyRef, - &entityName, - &out->policyTicket); + result = TicketComputeAuth(TPM_ST_AUTH_SECRET, + EntityGetHierarchy(in->authHandle), + authTimeout, + expiresOnReset, + &in->cpHashA, + &in->policyRef, + &entityName, + &out->policyTicket); + if(result != TPM_RC_SUCCESS) + return result; + // Generate timeout buffer. The format of output timeout buffer is // TPM-specific. // Note: In this implementation, the timeout buffer value is computed after diff --git a/TPMCmd/tpm/src/command/EA/PolicySigned.c b/TPMCmd/tpm/src/command/EA/PolicySigned.c index d4c30231..b5e590e7 100644 --- a/TPMCmd/tpm/src/command/EA/PolicySigned.c +++ b/TPMCmd/tpm/src/command/EA/PolicySigned.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Policy_spt_fp.h" #include "PolicySigned_fp.h" @@ -148,14 +114,17 @@ TPM2_PolicySigned(PolicySigned_In* in, // IN: input parameter list // Compute policy ticket authTimeout &= ~EXPIRATION_BIT; - TicketComputeAuth(TPM_ST_AUTH_SIGNED, - EntityGetHierarchy(in->authObject), - authTimeout, - expiresOnReset, - &in->cpHashA, - &in->policyRef, - &entityName, - &out->policyTicket); + result = TicketComputeAuth(TPM_ST_AUTH_SIGNED, + EntityGetHierarchy(in->authObject), + authTimeout, + expiresOnReset, + &in->cpHashA, + &in->policyRef, + &entityName, + &out->policyTicket); + if(result != TPM_RC_SUCCESS) + return result; + // Generate timeout buffer. The format of output timeout buffer is // TPM-specific. // Note: In this implementation, the timeout buffer value is computed after diff --git a/TPMCmd/tpm/src/command/EA/PolicyTemplate.c b/TPMCmd/tpm/src/command/EA/PolicyTemplate.c index f5d44668..2a96cfdb 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyTemplate.c +++ b/TPMCmd/tpm/src/command/EA/PolicyTemplate.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyTemplate_fp.h" @@ -59,14 +25,11 @@ TPM2_PolicyTemplate(PolicyTemplate_In* in // IN: input parameter list // Get pointer to the session structure session = SessionGet(in->policySession); - // If the template is set, make sure that it is the same as the input value - if(session->attributes.isTemplateSet) - { - if(!MemoryEqual2B(&in->templateHash.b, &session->u1.cpHash.b)) - return TPM_RCS_VALUE + RC_PolicyTemplate_templateHash; - } - // error if cpHash contains something that is not a template - else if(session->u1.templateHash.t.size != 0) + // error if the templateHash in session context is not empty and is not the + // same as the input or is not a template + if((IsCpHashUnionOccupied(session->attributes)) + && (!session->attributes.isTemplateHashDefined + || !MemoryEqual2B(&in->templateHash.b, &session->u1.templateHash.b))) return TPM_RC_CPHASH; // A valid templateHash must have the same size as session hash digest @@ -92,9 +55,9 @@ TPM2_PolicyTemplate(PolicyTemplate_In* in // IN: input parameter list // complete the digest and get the results CryptHashEnd2B(&hashState, &session->u2.policyDigest.b); - // update cpHash in session context - session->u1.templateHash = in->templateHash; - session->attributes.isTemplateSet = SET; + // update templateHash in session context + session->u1.templateHash = in->templateHash; + session->attributes.isTemplateHashDefined = SET; return TPM_RC_SUCCESS; } diff --git a/TPMCmd/tpm/src/command/EA/PolicyTicket.c b/TPMCmd/tpm/src/command/EA/PolicyTicket.c index c3b9ae2f..816c42fb 100644 --- a/TPMCmd/tpm/src/command/EA/PolicyTicket.c +++ b/TPMCmd/tpm/src/command/EA/PolicyTicket.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyTicket_fp.h" @@ -98,14 +64,17 @@ TPM2_PolicyTicket(PolicyTicket_In* in // IN: input parameter list return result; // Validate Ticket // Re-generate policy ticket by input parameters - TicketComputeAuth(in->ticket.tag, - in->ticket.hierarchy, - authTimeout, - expiresOnReset, - &in->cpHashA, - &in->policyRef, - &in->authName, - &ticketToCompare); + result = TicketComputeAuth(in->ticket.tag, + in->ticket.hierarchy, + authTimeout, + expiresOnReset, + &in->cpHashA, + &in->policyRef, + &in->authName, + &ticketToCompare); + if(result != TPM_RC_SUCCESS) + return result; + // Compare generated digest with input ticket digest if(!MemoryEqual2B(&in->ticket.digest.b, &ticketToCompare.digest.b)) return TPM_RCS_TICKET + RC_PolicyTicket_ticket; diff --git a/TPMCmd/tpm/src/command/EA/Policy_spt.c b/TPMCmd/tpm/src/command/EA/Policy_spt.c index e6378d30..24d105a4 100644 --- a/TPMCmd/tpm/src/command/EA/Policy_spt.c +++ b/TPMCmd/tpm/src/command/EA/Policy_spt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Tpm.h" #include "Policy_spt_fp.h" diff --git a/TPMCmd/tpm/src/command/Ecdaa/Commit.c b/TPMCmd/tpm/src/command/Ecdaa/Commit.c index dbbd2408..c5a6ea71 100644 --- a/TPMCmd/tpm/src/command/Ecdaa/Commit.c +++ b/TPMCmd/tpm/src/command/Ecdaa/Commit.c @@ -1,39 +1,6 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Commit_fp.h" +#include "TpmMath_Util_fp.h" #if CC_Commit // Conditional expansion of this file @@ -90,7 +57,7 @@ TPM2_Commit(Commit_In* in, // IN: input parameter list // Get prime modulus for the curve. This is needed later but getting this now // allows confirmation that the curve exists. - if(!CryptEccGetParameter(&p, 'p', parms->curveID)) + if(!TpmMath_IntTo2B(ExtEcc_CurveGetPrime(parms->curveID), &p.b, 0)) return TPM_RCS_KEY + RC_Commit_signHandle; // Get the random value that will be used in the point multiplications diff --git a/TPMCmd/tpm/src/command/FieldUpgrade/FieldUpgradeData.c b/TPMCmd/tpm/src/command/FieldUpgrade/FieldUpgradeData.c index 16a2e444..7bdb35a4 100644 --- a/TPMCmd/tpm/src/command/FieldUpgrade/FieldUpgradeData.c +++ b/TPMCmd/tpm/src/command/FieldUpgrade/FieldUpgradeData.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "FieldUpgradeData_fp.h" #if CC_FieldUpgradeData // Conditional expansion of this file diff --git a/TPMCmd/tpm/src/command/FieldUpgrade/FieldUpgradeStart.c b/TPMCmd/tpm/src/command/FieldUpgrade/FieldUpgradeStart.c index 6e8b1c66..3aa28396 100644 --- a/TPMCmd/tpm/src/command/FieldUpgrade/FieldUpgradeStart.c +++ b/TPMCmd/tpm/src/command/FieldUpgrade/FieldUpgradeStart.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "FieldUpgradeStart_fp.h" #if CC_FieldUpgradeStart // Conditional expansion of this file diff --git a/TPMCmd/tpm/src/command/FieldUpgrade/FirmwareRead.c b/TPMCmd/tpm/src/command/FieldUpgrade/FirmwareRead.c index 79092c83..d9e182fc 100644 --- a/TPMCmd/tpm/src/command/FieldUpgrade/FirmwareRead.c +++ b/TPMCmd/tpm/src/command/FieldUpgrade/FirmwareRead.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "FirmwareRead_fp.h" diff --git a/TPMCmd/tpm/src/command/HashHMAC/EventSequenceComplete.c b/TPMCmd/tpm/src/command/HashHMAC/EventSequenceComplete.c index b0da0d6c..bf0c582e 100644 --- a/TPMCmd/tpm/src/command/HashHMAC/EventSequenceComplete.c +++ b/TPMCmd/tpm/src/command/HashHMAC/EventSequenceComplete.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "EventSequenceComplete_fp.h" diff --git a/TPMCmd/tpm/src/command/HashHMAC/HMAC_Start.c b/TPMCmd/tpm/src/command/HashHMAC/HMAC_Start.c index 2c4150c0..369b73f0 100644 --- a/TPMCmd/tpm/src/command/HashHMAC/HMAC_Start.c +++ b/TPMCmd/tpm/src/command/HashHMAC/HMAC_Start.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "HMAC_Start_fp.h" diff --git a/TPMCmd/tpm/src/command/HashHMAC/HashSequenceStart.c b/TPMCmd/tpm/src/command/HashHMAC/HashSequenceStart.c index d78cfd37..2b32c893 100644 --- a/TPMCmd/tpm/src/command/HashHMAC/HashSequenceStart.c +++ b/TPMCmd/tpm/src/command/HashHMAC/HashSequenceStart.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "HashSequenceStart_fp.h" diff --git a/TPMCmd/tpm/src/command/HashHMAC/MAC_Start.c b/TPMCmd/tpm/src/command/HashHMAC/MAC_Start.c index 14c667c7..9488a55b 100644 --- a/TPMCmd/tpm/src/command/HashHMAC/MAC_Start.c +++ b/TPMCmd/tpm/src/command/HashHMAC/MAC_Start.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "MAC_Start_fp.h" diff --git a/TPMCmd/tpm/src/command/HashHMAC/SequenceComplete.c b/TPMCmd/tpm/src/command/HashHMAC/SequenceComplete.c index 19aa3286..6bae78e9 100644 --- a/TPMCmd/tpm/src/command/HashHMAC/SequenceComplete.c +++ b/TPMCmd/tpm/src/command/HashHMAC/SequenceComplete.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "SequenceComplete_fp.h" @@ -95,9 +61,12 @@ TPM2_SequenceComplete(SequenceComplete_In* in, // IN: input parameter list } else { + TPM_RC result; // Compute ticket - TicketComputeHashCheck( + result = TicketComputeHashCheck( out->validation.hierarchy, hashAlg, &out->result, &out->validation); + if(result != TPM_RC_SUCCESS) + return result; } } else diff --git a/TPMCmd/tpm/src/command/HashHMAC/SequenceUpdate.c b/TPMCmd/tpm/src/command/HashHMAC/SequenceUpdate.c index 938c01b8..e88bdb39 100644 --- a/TPMCmd/tpm/src/command/HashHMAC/SequenceUpdate.c +++ b/TPMCmd/tpm/src/command/HashHMAC/SequenceUpdate.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "SequenceUpdate_fp.h" diff --git a/TPMCmd/tpm/src/command/Hierarchy/ChangeEPS.c b/TPMCmd/tpm/src/command/Hierarchy/ChangeEPS.c index bf3bfc1c..4c8a572f 100644 --- a/TPMCmd/tpm/src/command/Hierarchy/ChangeEPS.c +++ b/TPMCmd/tpm/src/command/Hierarchy/ChangeEPS.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ChangeEPS_fp.h" diff --git a/TPMCmd/tpm/src/command/Hierarchy/ChangePPS.c b/TPMCmd/tpm/src/command/Hierarchy/ChangePPS.c index d9359d94..16cc877d 100644 --- a/TPMCmd/tpm/src/command/Hierarchy/ChangePPS.c +++ b/TPMCmd/tpm/src/command/Hierarchy/ChangePPS.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ChangePPS_fp.h" diff --git a/TPMCmd/tpm/src/command/Hierarchy/Clear.c b/TPMCmd/tpm/src/command/Hierarchy/Clear.c index ee489695..a09e6b9a 100644 --- a/TPMCmd/tpm/src/command/Hierarchy/Clear.c +++ b/TPMCmd/tpm/src/command/Hierarchy/Clear.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Clear_fp.h" diff --git a/TPMCmd/tpm/src/command/Hierarchy/ClearControl.c b/TPMCmd/tpm/src/command/Hierarchy/ClearControl.c index cb18ca0d..f30247b3 100644 --- a/TPMCmd/tpm/src/command/Hierarchy/ClearControl.c +++ b/TPMCmd/tpm/src/command/Hierarchy/ClearControl.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ClearControl_fp.h" diff --git a/TPMCmd/tpm/src/command/Hierarchy/CreatePrimary.c b/TPMCmd/tpm/src/command/Hierarchy/CreatePrimary.c index a9ab1cbf..daaca204 100644 --- a/TPMCmd/tpm/src/command/Hierarchy/CreatePrimary.c +++ b/TPMCmd/tpm/src/command/Hierarchy/CreatePrimary.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "CreatePrimary_fp.h" @@ -42,13 +8,20 @@ */ // Return Type: TPM_RC // TPM_RC_ATTRIBUTES sensitiveDataOrigin is CLEAR when sensitive.data is an -// Empty Buffer 'fixedTPM', 'fixedParent', or +// Empty Buffer; 'fixedTPM', 'fixedParent', or // 'encryptedDuplication' attributes are inconsistent // between themselves or with those of the parent object; -// inconsistent 'restricted', 'decrypt' and 'sign' -// attributes +// inconsistent 'restricted', 'decrypt', 'sign', +// 'firmwareLimited', or 'svnLimited' attributes; // attempt to inject sensitive data for an asymmetric // key; +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects or the TPM failed +// to derive the Firmware Secret. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the TPM failed +// to derive the Firmware SVN Secret for the requested +// SVN. // TPM_RC_KDF incorrect KDF specified for decrypting keyed hash // object // TPM_RC_KEY a provided symmetric key value is not allowed @@ -74,6 +47,7 @@ TPM2_CreatePrimary(CreatePrimary_In* in, // IN: input parameter list DRBG_STATE rand; OBJECT* newObject; TPM2B_NAME name; + TPM2B_SEED primary_seed; // Input Validation // Will need a place to put the result @@ -89,7 +63,8 @@ TPM2_CreatePrimary(CreatePrimary_In* in, // IN: input parameter list // Check attributes in input public area. CreateChecks() checks the things that // are unique to creation and then validates the attributes and values that are // common to create and load. - result = CreateChecks(NULL, publicArea, in->inSensitive.sensitive.data.t.size); + result = CreateChecks( + NULL, in->primaryHandle, publicArea, in->inSensitive.sensitive.data.t.size); if(result != TPM_RC_SUCCESS) return RcSafeAddToResult(result, RC_CreatePrimary_inPublic); // Validate the sensitive area values @@ -101,21 +76,29 @@ TPM2_CreatePrimary(CreatePrimary_In* in, // IN: input parameter list // used as a random number generator during the object creation. // The caller does not know the seed values so the actual name does not have // to be over the input, it can be over the unmarshaled structure. + + result = HierarchyGetPrimarySeed(in->primaryHandle, &primary_seed); + if(result != TPM_RC_SUCCESS) + return result; + result = DRBG_InstantiateSeeded(&rand, - &HierarchyGetPrimarySeed(in->primaryHandle)->b, + &primary_seed.b, PRIMARY_OBJECT_CREATION, (TPM2B*)PublicMarshalAndComputeName(publicArea, &name), &in->inSensitive.sensitive.data.b); + MemorySet(primary_seed.b.buffer, 0, primary_seed.b.size); + if(result == TPM_RC_SUCCESS) { newObject->attributes.primary = SET; - if(in->primaryHandle == TPM_RH_ENDORSEMENT) + if(HierarchyNormalizeHandle(in->primaryHandle) == TPM_RH_ENDORSEMENT) newObject->attributes.epsHierarchy = SET; // Create the primary object. result = CryptCreateObject( newObject, &in->inSensitive.sensitive, (RAND_STATE*)&rand); + DRBG_Uninstantiate(&rand); } if(result != TPM_RC_SUCCESS) return result; @@ -133,10 +116,12 @@ TPM2_CreatePrimary(CreatePrimary_In* in, // IN: input parameter list &out->creationHash); // Compute creation ticket - TicketComputeCreation(EntityGetHierarchy(in->primaryHandle), - &out->name, - &out->creationHash, - &out->creationTicket); + result = TicketComputeCreation(EntityGetHierarchy(in->primaryHandle), + &out->name, + &out->creationHash, + &out->creationTicket); + if(result != TPM_RC_SUCCESS) + return result; // Set the remaining attributes for a loaded object ObjectSetLoadedAttributes(newObject, in->primaryHandle); diff --git a/TPMCmd/tpm/src/command/Hierarchy/HierarchyChangeAuth.c b/TPMCmd/tpm/src/command/Hierarchy/HierarchyChangeAuth.c index 8b4a65c8..112845fb 100644 --- a/TPMCmd/tpm/src/command/Hierarchy/HierarchyChangeAuth.c +++ b/TPMCmd/tpm/src/command/Hierarchy/HierarchyChangeAuth.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "HierarchyChangeAuth_fp.h" diff --git a/TPMCmd/tpm/src/command/Hierarchy/HierarchyControl.c b/TPMCmd/tpm/src/command/Hierarchy/HierarchyControl.c index 73ddb6fb..54c1188f 100644 --- a/TPMCmd/tpm/src/command/Hierarchy/HierarchyControl.c +++ b/TPMCmd/tpm/src/command/Hierarchy/HierarchyControl.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "HierarchyControl_fp.h" diff --git a/TPMCmd/tpm/src/command/Hierarchy/SetPrimaryPolicy.c b/TPMCmd/tpm/src/command/Hierarchy/SetPrimaryPolicy.c index e75275dc..b7935f8f 100644 --- a/TPMCmd/tpm/src/command/Hierarchy/SetPrimaryPolicy.c +++ b/TPMCmd/tpm/src/command/Hierarchy/SetPrimaryPolicy.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "SetPrimaryPolicy_fp.h" @@ -90,14 +56,16 @@ TPM2_SetPrimaryPolicy(SetPrimaryPolicy_In* in // IN: input parameter list NV_SYNC_PERSISTENT(lockoutPolicy); break; -# define SET_ACT_POLICY(N) \ - case TPM_RH_ACT_##N: \ - go.ACT_##N.hashAlg = in->hashAlg; \ - go.ACT_##N.authPolicy = in->authPolicy; \ - g_clearOrderly = TRUE; \ - break; +# if ACT_SUPPORT +# define SET_ACT_POLICY(N) \ + case TPM_RH_ACT_##N: \ + go.ACT_##N.hashAlg = in->hashAlg; \ + go.ACT_##N.authPolicy = in->authPolicy; \ + g_clearOrderly = TRUE; \ + break; FOR_EACH_ACT(SET_ACT_POLICY) +# endif // ACT_SUPPORT default: FAIL(FATAL_ERROR_INTERNAL); diff --git a/TPMCmd/tpm/src/command/Misc/PP_Commands.c b/TPMCmd/tpm/src/command/Misc/PP_Commands.c index 052dab35..ecf98c6e 100644 --- a/TPMCmd/tpm/src/command/Misc/PP_Commands.c +++ b/TPMCmd/tpm/src/command/Misc/PP_Commands.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PP_Commands_fp.h" diff --git a/TPMCmd/tpm/src/command/Misc/SetAlgorithmSet.c b/TPMCmd/tpm/src/command/Misc/SetAlgorithmSet.c index 56de3093..17dba444 100644 --- a/TPMCmd/tpm/src/command/Misc/SetAlgorithmSet.c +++ b/TPMCmd/tpm/src/command/Misc/SetAlgorithmSet.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "SetAlgorithmSet_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_Certify.c b/TPMCmd/tpm/src/command/NVStorage/NV_Certify.c index f499f285..ac7d93dd 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_Certify.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_Certify.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Attest_spt_fp.h" #include "NV_Certify_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_ChangeAuth.c b/TPMCmd/tpm/src/command/NVStorage/NV_ChangeAuth.c index eceaca76..472b6a2f 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_ChangeAuth.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_ChangeAuth.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_ChangeAuth_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_DefineSpace.c b/TPMCmd/tpm/src/command/NVStorage/NV_DefineSpace.c index 5fa0b53e..202f1c77 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_DefineSpace.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_DefineSpace.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_DefineSpace_fp.h" @@ -58,168 +24,18 @@ TPM_RC TPM2_NV_DefineSpace(NV_DefineSpace_In* in // IN: input parameter list ) { - TPMA_NV attributes = in->publicInfo.nvPublic.attributes; - UINT16 nameSize; - - nameSize = CryptHashGetDigestSize(in->publicInfo.nvPublic.nameAlg); - - // Input Validation - - // Checks not specific to type - - // If the UndefineSpaceSpecial command is not implemented, then can't have - // an index that can only be deleted with policy -# if CC_NV_UndefineSpaceSpecial == NO - if(IS_ATTRIBUTE(attributes, TPMA_NV, POLICY_DELETE)) - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_publicInfo; -# endif - - // check that the authPolicy consistent with hash algorithm - - if(in->publicInfo.nvPublic.authPolicy.t.size != 0 - && in->publicInfo.nvPublic.authPolicy.t.size != nameSize) - return TPM_RCS_SIZE + RC_NV_DefineSpace_publicInfo; - - // make sure that the authValue is not too large - if(MemoryRemoveTrailingZeros(&in->auth) - > CryptHashGetDigestSize(in->publicInfo.nvPublic.nameAlg)) - return TPM_RCS_SIZE + RC_NV_DefineSpace_auth; - - // If an index is being created by the owner and shEnable is - // clear, then we would not reach this point because ownerAuth - // can't be given when shEnable is CLEAR. However, if phEnable - // is SET but phEnableNV is CLEAR, we have to check here - if(in->authHandle == TPM_RH_PLATFORM && gc.phEnableNV == CLEAR) - return TPM_RCS_HIERARCHY + RC_NV_DefineSpace_authHandle; - - // Attribute checks - // Eliminate the unsupported types - switch(GET_TPM_NT(attributes)) - { -# if CC_NV_Increment == YES - case TPM_NT_COUNTER: -# endif -# if CC_NV_SetBits == YES - case TPM_NT_BITS: -# endif -# if CC_NV_Extend == YES - case TPM_NT_EXTEND: -# endif -# if CC_PolicySecret == YES && defined TPM_NT_PIN_PASS - case TPM_NT_PIN_PASS: - case TPM_NT_PIN_FAIL: -# endif - case TPM_NT_ORDINARY: - break; - default: - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_publicInfo; - break; - } - // Check that the sizes are OK based on the type - switch(GET_TPM_NT(attributes)) + // This command only supports TPM_HT_NV_INDEX-typed NV indices. + if(HandleGetType(in->publicInfo.nvPublic.nvIndex) != TPM_HT_NV_INDEX) { - case TPM_NT_ORDINARY: - // Can't exceed the allowed size for the implementation - if(in->publicInfo.nvPublic.dataSize > MAX_NV_INDEX_SIZE) - return TPM_RCS_SIZE + RC_NV_DefineSpace_publicInfo; - break; - case TPM_NT_EXTEND: - if(in->publicInfo.nvPublic.dataSize != nameSize) - return TPM_RCS_SIZE + RC_NV_DefineSpace_publicInfo; - break; - default: - // Everything else needs a size of 8 - if(in->publicInfo.nvPublic.dataSize != 8) - return TPM_RCS_SIZE + RC_NV_DefineSpace_publicInfo; - break; + return TPM_RCS_HANDLE + RC_NV_DefineSpace_publicInfo; } - // Handle other specifics - switch(GET_TPM_NT(attributes)) - { - case TPM_NT_COUNTER: - // Counter can't have TPMA_NV_CLEAR_STCLEAR SET (don't clear counters) - if(IS_ATTRIBUTE(attributes, TPMA_NV, CLEAR_STCLEAR)) - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_publicInfo; - break; -# ifdef TPM_NT_PIN_FAIL - case TPM_NT_PIN_FAIL: - // NV_NO_DA must be SET and AUTHWRITE must be CLEAR - // NOTE: As with a PIN_PASS index, the authValue of the index is not - // available until the index is written. If AUTHWRITE is the only way to - // write then index, it could never be written. Rather than go through - // all of the other possible ways to write the Index, it is simply - // prohibited to write the index with the authValue. Other checks - // below will insure that there seems to be a way to write the index - // (i.e., with platform authorization , owner authorization, - // or with policyAuth.) - // It is not allowed to create a PIN Index that can't be modified. - if(!IS_ATTRIBUTE(attributes, TPMA_NV, NO_DA)) - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_publicInfo; -# endif -# ifdef TPM_NT_PIN_PASS - case TPM_NT_PIN_PASS: - // AUTHWRITE must be CLEAR (see note above to TPM_NT_PIN_FAIL) - if(IS_ATTRIBUTE(attributes, TPMA_NV, AUTHWRITE) - || IS_ATTRIBUTE(attributes, TPMA_NV, GLOBALLOCK) - || IS_ATTRIBUTE(attributes, TPMA_NV, WRITEDEFINE)) - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_publicInfo; -# endif // this comes before break because PIN_FAIL falls through - break; - default: - break; - } - - // Locks may not be SET and written cannot be SET - if(IS_ATTRIBUTE(attributes, TPMA_NV, WRITTEN) - || IS_ATTRIBUTE(attributes, TPMA_NV, WRITELOCKED) - || IS_ATTRIBUTE(attributes, TPMA_NV, READLOCKED)) - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_publicInfo; - - // There must be a way to read the index. - if(!IS_ATTRIBUTE(attributes, TPMA_NV, OWNERREAD) - && !IS_ATTRIBUTE(attributes, TPMA_NV, PPREAD) - && !IS_ATTRIBUTE(attributes, TPMA_NV, AUTHREAD) - && !IS_ATTRIBUTE(attributes, TPMA_NV, POLICYREAD)) - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_publicInfo; - - // There must be a way to write the index - if(!IS_ATTRIBUTE(attributes, TPMA_NV, OWNERWRITE) - && !IS_ATTRIBUTE(attributes, TPMA_NV, PPWRITE) - && !IS_ATTRIBUTE(attributes, TPMA_NV, AUTHWRITE) - && !IS_ATTRIBUTE(attributes, TPMA_NV, POLICYWRITE)) - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_publicInfo; - - // An index with TPMA_NV_CLEAR_STCLEAR can't have TPMA_NV_WRITEDEFINE SET - if(IS_ATTRIBUTE(attributes, TPMA_NV, CLEAR_STCLEAR) - && IS_ATTRIBUTE(attributes, TPMA_NV, WRITEDEFINE)) - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_publicInfo; - - // Make sure that the creator of the index can delete the index - if((IS_ATTRIBUTE(attributes, TPMA_NV, PLATFORMCREATE) - && in->authHandle == TPM_RH_OWNER) - || (!IS_ATTRIBUTE(attributes, TPMA_NV, PLATFORMCREATE) - && in->authHandle == TPM_RH_PLATFORM)) - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_authHandle; - - // If TPMA_NV_POLICY_DELETE is SET, then the index must be defined by - // the platform - if(IS_ATTRIBUTE(attributes, TPMA_NV, POLICY_DELETE) - && TPM_RH_PLATFORM != in->authHandle) - return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace_publicInfo; - - // Make sure that the TPMA_NV_WRITEALL is not set if the index size is larger - // than the allowed NV buffer size. - if(in->publicInfo.nvPublic.dataSize > MAX_NV_BUFFER_SIZE - && IS_ATTRIBUTE(attributes, TPMA_NV, WRITEALL)) - return TPM_RCS_SIZE + RC_NV_DefineSpace_publicInfo; - - // And finally, see if the index is already defined. - if(NvIndexIsDefined(in->publicInfo.nvPublic.nvIndex)) - return TPM_RC_NV_DEFINED; - // Internal Data Update - // define the space. A TPM_RC_NV_SPACE error may be returned at this point - return NvDefineIndex(&in->publicInfo.nvPublic, &in->auth); + return NvDefineSpace(in->authHandle, + &in->auth, + &in->publicInfo.nvPublic, + RC_NV_DefineSpace_authHandle, + RC_NV_DefineSpace_auth, + RC_NV_DefineSpace_publicInfo); } #endif // CC_NV_DefineSpace \ No newline at end of file diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_DefineSpace2.c b/TPMCmd/tpm/src/command/NVStorage/NV_DefineSpace2.c new file mode 100644 index 00000000..74c73140 --- /dev/null +++ b/TPMCmd/tpm/src/command/NVStorage/NV_DefineSpace2.c @@ -0,0 +1,69 @@ +#include "Tpm.h" +#include "NV_DefineSpace2_fp.h" + +#if CC_NV_DefineSpace2 // Conditional expansion of this file + +/*(See part 3 specification) +// Define a NV index space +*/ +// Return Type: TPM_RC +// TPM_RC_HIERARCHY for authorizations using TPM_RH_PLATFORM +// phEnable_NV is clear preventing access to NV +// data in the platform hierarchy. +// TPM_RC_ATTRIBUTES attributes of the index are not consistent +// TPM_RC_NV_DEFINED index already exists +// TPM_RC_NV_SPACE insufficient space for the index +// TPM_RC_SIZE 'auth->size' or 'publicInfo->authPolicy.size' is +// larger than the digest size of +// 'publicInfo->nameAlg'; or 'publicInfo->dataSize' +// is not consistent with 'publicInfo->attributes' +// (this includes the case when the index is +// larger than a MAX_NV_BUFFER_SIZE but the +// TPMA_NV_WRITEALL attribute is SET) +TPM_RC +TPM2_NV_DefineSpace2(NV_DefineSpace2_In* in // IN: input parameter list +) +{ + TPM_RC result; + TPMS_NV_PUBLIC legacyPublic; + + // Input Validation + + // Validate the handle type and the (handle-type-specific) attributes. + switch(in->publicInfo.nvPublic2.handleType) + { + case TPM_HT_NV_INDEX: + break; +# if EXTERNAL_NV + case TPM_HT_EXTERNAL_NV: + // The reference implementation may let you define an "external" NV + // index, but it doesn't currently support setting any of the extended + // bits for customizing the behavior of external NV. + if((TPMA_NV_EXP_TO_UINT64( + in->publicInfo.nvPublic2.nvPublic2.externalNV.attributes) + & 0xffffffff00000000) + != 0) + { + return TPM_RCS_ATTRIBUTES + RC_NV_DefineSpace2_publicInfo; + } + break; +# endif + default: + return TPM_RCS_HANDLE + RC_NV_DefineSpace2_publicInfo; + } + + result = NvPublicFromNvPublic2(&in->publicInfo.nvPublic2, &legacyPublic); + if(result != TPM_RC_SUCCESS) + { + return RcSafeAddToResult(result, RC_NV_DefineSpace2_publicInfo); + } + + return NvDefineSpace(in->authHandle, + &in->auth, + &legacyPublic, + RC_NV_DefineSpace2_authHandle, + RC_NV_DefineSpace2_auth, + RC_NV_DefineSpace2_publicInfo); +} + +#endif // CC_NV_DefineSpace \ No newline at end of file diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_Extend.c b/TPMCmd/tpm/src/command/NVStorage/NV_Extend.c index ee8910f0..badea505 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_Extend.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_Extend.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_Extend_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_GlobalWriteLock.c b/TPMCmd/tpm/src/command/NVStorage/NV_GlobalWriteLock.c index 7b03a417..0da06dd9 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_GlobalWriteLock.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_GlobalWriteLock.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_GlobalWriteLock_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_Increment.c b/TPMCmd/tpm/src/command/NVStorage/NV_Increment.c index ddf64e43..69a4d218 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_Increment.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_Increment.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_Increment_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_Read.c b/TPMCmd/tpm/src/command/NVStorage/NV_Read.c index f5a4e22f..e54bc52e 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_Read.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_Read.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_Read_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_ReadLock.c b/TPMCmd/tpm/src/command/NVStorage/NV_ReadLock.c index f550e60c..3bd6e386 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_ReadLock.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_ReadLock.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_ReadLock_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_ReadPublic.c b/TPMCmd/tpm/src/command/NVStorage/NV_ReadPublic.c index 09e9786b..4daf771a 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_ReadPublic.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_ReadPublic.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_ReadPublic_fp.h" @@ -45,7 +11,15 @@ TPM2_NV_ReadPublic(NV_ReadPublic_In* in, // IN: input parameter list NV_ReadPublic_Out* out // OUT: output parameter list ) { - NV_INDEX* nvIndex = NvGetIndexInfo(in->nvIndex, NULL); + NV_INDEX* nvIndex; + + // This command only supports TPM_HT_NV_INDEX-typed NV indices. + if(HandleGetType(in->nvIndex) != TPM_HT_NV_INDEX) + { + return TPM_RCS_HANDLE + RC_NV_ReadPublic_nvIndex; + } + + nvIndex = NvGetIndexInfo(in->nvIndex, NULL); // Command Output diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_ReadPublic2.c b/TPMCmd/tpm/src/command/NVStorage/NV_ReadPublic2.c new file mode 100644 index 00000000..f745913c --- /dev/null +++ b/TPMCmd/tpm/src/command/NVStorage/NV_ReadPublic2.c @@ -0,0 +1,36 @@ +#include "Tpm.h" +#include "NV_ReadPublic2_fp.h" + +#if CC_NV_ReadPublic2 // Conditional expansion of this file + +/*(See part 3 specification) +// Read the public information of a NV index +*/ +TPM_RC +TPM2_NV_ReadPublic2(NV_ReadPublic2_In* in, // IN: input parameter list + NV_ReadPublic2_Out* out // OUT: output parameter list +) +{ + TPM_RC result; + NV_INDEX* nvIndex; + + nvIndex = NvGetIndexInfo(in->nvIndex, NULL); + + // Command Output + + // The reference code stores its NV indices in the legacy form, because + // it doesn't support any extended attributes. + // Translate the legacy form to the general form. + result = NvPublic2FromNvPublic(&nvIndex->publicArea, &out->nvPublic.nvPublic2); + if(result != TPM_RC_SUCCESS) + { + return RcSafeAddToResult(result, RC_NV_ReadPublic2_nvIndex); + } + + // Compute NV name + NvGetIndexName(nvIndex, &out->nvName); + + return TPM_RC_SUCCESS; +} + +#endif // CC_NV_ReadPublic2 \ No newline at end of file diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_SetBits.c b/TPMCmd/tpm/src/command/NVStorage/NV_SetBits.c index 5dfb8b76..4ca3a495 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_SetBits.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_SetBits.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_SetBits_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_UndefineSpace.c b/TPMCmd/tpm/src/command/NVStorage/NV_UndefineSpace.c index 71da9a8b..a8747ccf 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_UndefineSpace.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_UndefineSpace.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_UndefineSpace_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_UndefineSpaceSpecial.c b/TPMCmd/tpm/src/command/NVStorage/NV_UndefineSpaceSpecial.c index 1340b78a..99ca6c4b 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_UndefineSpaceSpecial.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_UndefineSpaceSpecial.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_UndefineSpaceSpecial_fp.h" #include "SessionProcess_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_Write.c b/TPMCmd/tpm/src/command/NVStorage/NV_Write.c index 72f2bf07..4c27ba01 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_Write.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_Write.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_Write_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_WriteLock.c b/TPMCmd/tpm/src/command/NVStorage/NV_WriteLock.c index 3974f16f..b4f3c5e8 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_WriteLock.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_WriteLock.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "NV_WriteLock_fp.h" diff --git a/TPMCmd/tpm/src/command/NVStorage/NV_spt.c b/TPMCmd/tpm/src/command/NVStorage/NV_spt.c index afd2ba29..0c58575d 100644 --- a/TPMCmd/tpm/src/command/NVStorage/NV_spt.c +++ b/TPMCmd/tpm/src/command/NVStorage/NV_spt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Tpm.h" #include "NV_spt_fp.h" @@ -156,3 +122,325 @@ BOOL NvIsPinPassIndex(TPM_HANDLE index // IN: Handle to check } return FALSE; } + +//*** NvGetIndexName() +// This function computes the Name of an index +// The 'name' buffer receives the bytes of the Name and the return value +// is the number of octets in the Name. +// +// This function requires that the NV Index is defined. +TPM2B_NAME* NvGetIndexName( + NV_INDEX* nvIndex, // IN: the index over which the name is to be + // computed + TPM2B_NAME* name // OUT: name of the index +) +{ + UINT16 dataSize, digestSize; + BYTE marshalBuffer[sizeof(TPMU_NV_PUBLIC_2)]; + BYTE* buffer; + INT32 bufferSize = sizeof(marshalBuffer); + HASH_STATE hashState; + TPMT_NV_PUBLIC_2 public2; + + // Convert the legacy representation into the tagged-union representation. + NvPublic2FromNvPublic(&nvIndex->publicArea, &public2); + + // Marshal the whole public area, but not the TPM_HT selector: + // This is safe, because the TPM_HT is the first byte of the handle value, + // which is already in every element of TPMT_NV_PUBLIC_2. + // This allows the Name of an NV index calculated based on the + // TPMT_NV_PUBLIC_2 to be consistent with the Name of the same index if it + // has a TPMS_NV_PUBLIC representation. + buffer = marshalBuffer; + dataSize = + TPMU_NV_PUBLIC_2_Marshal(&public2.nvPublic2, + &buffer, + &bufferSize, + (UINT32)HandleGetType(nvIndex->publicArea.nvIndex)); + + // hash public area + digestSize = CryptHashStart(&hashState, nvIndex->publicArea.nameAlg); + CryptDigestUpdate(&hashState, dataSize, marshalBuffer); + + // Complete digest leaving room for the nameAlg + CryptHashEnd(&hashState, digestSize, &name->b.buffer[2]); + + // Include the nameAlg + UINT16_TO_BYTE_ARRAY(nvIndex->publicArea.nameAlg, name->b.buffer); + name->t.size = digestSize + 2; + return name; +} + +// NOTE: This is a lossy conversion: any expanded attributes are lost here. +// Calling code should return an error to the user, instead of dropping their +// data, if any of the expanded attributes are SET. +static TPMA_NV LegacyAttributesFromExpanded(TPMA_NV_EXP attributes) +{ + UINT64 attributes64; + UINT32 attributes32; + + attributes64 = TPMA_NV_EXP_TO_UINT64(attributes); + attributes32 = (UINT32)attributes64; + + return UINT32_TO_TPMA_NV(attributes32); +} + +static TPMA_NV_EXP ExpandedAttributesFromLegacy(TPMA_NV attributes) +{ + UINT32 attributes32; + UINT64 attributes64; + + attributes32 = TPMA_NV_TO_UINT32(attributes); + attributes64 = (UINT64)attributes32; + + return UINT64_TO_TPMA_NV_EXP(attributes64); +} + +//*** NvPublic2FromNvPublic() +// This function converts a legacy-form NV public (TPMS_NV_PUBLIC) into the +// generalized TPMT_NV_PUBLIC_2 tagged-union representation. +TPM_RC NvPublic2FromNvPublic( + TPMS_NV_PUBLIC* nvPublic, // IN: the source S-form NV public area + TPMT_NV_PUBLIC_2* nvPublic2 // OUT: the T-form NV public area to populate +) +{ + TPM_HT handleType = HandleGetType(nvPublic->nvIndex); + + switch(handleType) + { + case TPM_HT_NV_INDEX: + nvPublic2->nvPublic2.nvIndex = *nvPublic; + break; + case TPM_HT_PERMANENT_NV: + nvPublic2->nvPublic2.permanentNV = *nvPublic; + break; +#if EXTERNAL_NV + case TPM_HT_EXTERNAL_NV: + { + TPMS_NV_PUBLIC_EXP_ATTR* pub = &nvPublic2->nvPublic2.externalNV; + + pub->attributes = ExpandedAttributesFromLegacy(nvPublic->attributes); + pub->authPolicy = nvPublic->authPolicy; + pub->dataSize = nvPublic->dataSize; + pub->nameAlg = nvPublic->nameAlg; + pub->nvIndex = nvPublic->nvIndex; + break; + } +#endif + default: + return TPM_RCS_HANDLE; + } + + nvPublic2->handleType = handleType; + return TPM_RC_SUCCESS; +} + +//*** NvPublicFromNvPublic2() +// This function converts a tagged-union NV public (TPMT_NV_PUBLIC_2) into the +// legacy TPMS_NV_PUBLIC representation. This is a lossy conversion: any +// bits in the extended area of the attributes are lost, and the Name cannot be +// computed based on it. +TPM_RC NvPublicFromNvPublic2( + TPMT_NV_PUBLIC_2* nvPublic2, // IN: the source T-form NV public area + TPMS_NV_PUBLIC* nvPublic // OUT: the S-form NV public area to populate +) +{ + switch(nvPublic2->handleType) + { + case TPM_HT_NV_INDEX: + *nvPublic = nvPublic2->nvPublic2.nvIndex; + break; + case TPM_HT_PERMANENT_NV: + *nvPublic = nvPublic2->nvPublic2.permanentNV; + break; +#if EXTERNAL_NV + case TPM_HT_EXTERNAL_NV: + { + TPMS_NV_PUBLIC_EXP_ATTR* pub = &nvPublic2->nvPublic2.externalNV; + + nvPublic->attributes = LegacyAttributesFromExpanded(pub->attributes); + nvPublic->authPolicy = pub->authPolicy; + nvPublic->dataSize = pub->dataSize; + nvPublic->nameAlg = pub->nameAlg; + break; + } +#endif + default: + return TPM_RCS_HANDLE; + } + + return TPM_RC_SUCCESS; +} + +//*** NvDefineSpace() +// This function combines the common functionality of TPM2_NV_DefineSpace and +// TPM2_NV_DefineSpace2. +TPM_RC NvDefineSpace(TPMI_RH_PROVISION authHandle, + TPM2B_AUTH* auth, + TPMS_NV_PUBLIC* publicInfo, + TPM_RC blameAuthHandle, + TPM_RC blameAuth, + TPM_RC blamePublic) +{ + TPMA_NV attributes = publicInfo->attributes; + UINT16 nameSize; + + nameSize = CryptHashGetDigestSize(publicInfo->nameAlg); + + // Input Validation + + // Checks not specific to type + + // If the UndefineSpaceSpecial command is not implemented, then can't have + // an index that can only be deleted with policy +#if CC_NV_UndefineSpaceSpecial == NO + if(IS_ATTRIBUTE(attributes, TPMA_NV, POLICY_DELETE)) + return TPM_RCS_ATTRIBUTES + blamePublic; +#endif + + // check that the authPolicy consistent with hash algorithm + + if(publicInfo->authPolicy.t.size != 0 + && publicInfo->authPolicy.t.size != nameSize) + return TPM_RCS_SIZE + blamePublic; + + // make sure that the authValue is not too large + if(MemoryRemoveTrailingZeros(auth) > CryptHashGetDigestSize(publicInfo->nameAlg)) + return TPM_RCS_SIZE + blameAuth; + + // If an index is being created by the owner and shEnable is + // clear, then we would not reach this point because ownerAuth + // can't be given when shEnable is CLEAR. However, if phEnable + // is SET but phEnableNV is CLEAR, we have to check here + if(authHandle == TPM_RH_PLATFORM && gc.phEnableNV == CLEAR) + return TPM_RCS_HIERARCHY + blameAuthHandle; + + // Attribute checks + // Eliminate the unsupported types + switch(GET_TPM_NT(attributes)) + { +#if CC_NV_Increment == YES + case TPM_NT_COUNTER: +#endif +#if CC_NV_SetBits == YES + case TPM_NT_BITS: +#endif +#if CC_NV_Extend == YES + case TPM_NT_EXTEND: +#endif +#if CC_PolicySecret == YES && defined TPM_NT_PIN_PASS + case TPM_NT_PIN_PASS: + case TPM_NT_PIN_FAIL: +#endif + case TPM_NT_ORDINARY: + break; + default: + return TPM_RCS_ATTRIBUTES + blamePublic; + break; + } + // Check that the sizes are OK based on the type + switch(GET_TPM_NT(attributes)) + { + case TPM_NT_ORDINARY: + // Can't exceed the allowed size for the implementation + if(publicInfo->dataSize > MAX_NV_INDEX_SIZE) + return TPM_RCS_SIZE + blamePublic; + break; + case TPM_NT_EXTEND: + if(publicInfo->dataSize != nameSize) + return TPM_RCS_SIZE + blamePublic; + break; + default: + // Everything else needs a size of 8 + if(publicInfo->dataSize != 8) + return TPM_RCS_SIZE + blamePublic; + break; + } + // Handle other specifics + switch(GET_TPM_NT(attributes)) + { + case TPM_NT_COUNTER: + // Counter can't have TPMA_NV_CLEAR_STCLEAR SET (don't clear counters) + if(IS_ATTRIBUTE(attributes, TPMA_NV, CLEAR_STCLEAR)) + return TPM_RCS_ATTRIBUTES + blamePublic; + break; +#ifdef TPM_NT_PIN_FAIL + case TPM_NT_PIN_FAIL: + // NV_NO_DA must be SET and AUTHWRITE must be CLEAR + // NOTE: As with a PIN_PASS index, the authValue of the index is not + // available until the index is written. If AUTHWRITE is the only way to + // write then index, it could never be written. Rather than go through + // all of the other possible ways to write the Index, it is simply + // prohibited to write the index with the authValue. Other checks + // below will insure that there seems to be a way to write the index + // (i.e., with platform authorization , owner authorization, + // or with policyAuth.) + // It is not allowed to create a PIN Index that can't be modified. + if(!IS_ATTRIBUTE(attributes, TPMA_NV, NO_DA)) + return TPM_RCS_ATTRIBUTES + blamePublic; +#endif +#ifdef TPM_NT_PIN_PASS + case TPM_NT_PIN_PASS: + // AUTHWRITE must be CLEAR (see note above to TPM_NT_PIN_FAIL) + if(IS_ATTRIBUTE(attributes, TPMA_NV, AUTHWRITE) + || IS_ATTRIBUTE(attributes, TPMA_NV, GLOBALLOCK) + || IS_ATTRIBUTE(attributes, TPMA_NV, WRITEDEFINE)) + return TPM_RCS_ATTRIBUTES + blamePublic; +#endif // this comes before break because PIN_FAIL falls through + break; + default: + break; + } + + // Locks may not be SET and written cannot be SET + if(IS_ATTRIBUTE(attributes, TPMA_NV, WRITTEN) + || IS_ATTRIBUTE(attributes, TPMA_NV, WRITELOCKED) + || IS_ATTRIBUTE(attributes, TPMA_NV, READLOCKED)) + return TPM_RCS_ATTRIBUTES + blamePublic; + + // There must be a way to read the index. + if(!IS_ATTRIBUTE(attributes, TPMA_NV, OWNERREAD) + && !IS_ATTRIBUTE(attributes, TPMA_NV, PPREAD) + && !IS_ATTRIBUTE(attributes, TPMA_NV, AUTHREAD) + && !IS_ATTRIBUTE(attributes, TPMA_NV, POLICYREAD)) + return TPM_RCS_ATTRIBUTES + blamePublic; + + // There must be a way to write the index + if(!IS_ATTRIBUTE(attributes, TPMA_NV, OWNERWRITE) + && !IS_ATTRIBUTE(attributes, TPMA_NV, PPWRITE) + && !IS_ATTRIBUTE(attributes, TPMA_NV, AUTHWRITE) + && !IS_ATTRIBUTE(attributes, TPMA_NV, POLICYWRITE)) + return TPM_RCS_ATTRIBUTES + blamePublic; + + // An index with TPMA_NV_CLEAR_STCLEAR can't have TPMA_NV_WRITEDEFINE SET + if(IS_ATTRIBUTE(attributes, TPMA_NV, CLEAR_STCLEAR) + && IS_ATTRIBUTE(attributes, TPMA_NV, WRITEDEFINE)) + return TPM_RCS_ATTRIBUTES + blamePublic; + + // Make sure that the creator of the index can delete the index + if((IS_ATTRIBUTE(attributes, TPMA_NV, PLATFORMCREATE) + && authHandle == TPM_RH_OWNER) + || (!IS_ATTRIBUTE(attributes, TPMA_NV, PLATFORMCREATE) + && authHandle == TPM_RH_PLATFORM)) + return TPM_RCS_ATTRIBUTES + blameAuthHandle; + + // If TPMA_NV_POLICY_DELETE is SET, then the index must be defined by + // the platform + if(IS_ATTRIBUTE(attributes, TPMA_NV, POLICY_DELETE) + && TPM_RH_PLATFORM != authHandle) + return TPM_RCS_ATTRIBUTES + blamePublic; + + // Make sure that the TPMA_NV_WRITEALL is not set if the index size is larger + // than the allowed NV buffer size. + if(publicInfo->dataSize > MAX_NV_BUFFER_SIZE + && IS_ATTRIBUTE(attributes, TPMA_NV, WRITEALL)) + return TPM_RCS_SIZE + blamePublic; + + // And finally, see if the index is already defined. + if(NvIndexIsDefined(publicInfo->nvIndex)) + return TPM_RC_NV_DEFINED; + + // Internal Data Update + // define the space. A TPM_RC_NV_SPACE error may be returned at this point + return NvDefineIndex(publicInfo, auth); +} \ No newline at end of file diff --git a/TPMCmd/tpm/src/command/Object/ActivateCredential.c b/TPMCmd/tpm/src/command/Object/ActivateCredential.c index 3d4e529b..e22743cb 100644 --- a/TPMCmd/tpm/src/command/Object/ActivateCredential.c +++ b/TPMCmd/tpm/src/command/Object/ActivateCredential.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ActivateCredential_fp.h" diff --git a/TPMCmd/tpm/src/command/Object/Create.c b/TPMCmd/tpm/src/command/Object/Create.c index 07722a10..903a9f3e 100644 --- a/TPMCmd/tpm/src/command/Object/Create.c +++ b/TPMCmd/tpm/src/command/Object/Create.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Object_spt_fp.h" #include "Create_fp.h" @@ -118,8 +84,10 @@ TPM2_Create(Create_In* in, // IN: input parameter list // Check attributes in input public area. CreateChecks() checks the things that // are unique to creation and then validates the attributes and values that are // common to create and load. - result = - CreateChecks(parentObject, publicArea, in->inSensitive.sensitive.data.t.size); + result = CreateChecks(parentObject, + /* primaryHierarchy = */ 0, + publicArea, + in->inSensitive.sensitive.data.t.size); if(result != TPM_RC_SUCCESS) return RcSafeAddToResult(result, RC_Create_inPublic); // Clean up the authValue if necessary @@ -140,10 +108,12 @@ TPM2_Create(Create_In* in, // IN: input parameter list &out->creationHash); // Compute creation ticket - TicketComputeCreation(EntityGetHierarchy(in->parentHandle), - &newObject->name, - &out->creationHash, - &out->creationTicket); + result = TicketComputeCreation(EntityGetHierarchy(in->parentHandle), + &newObject->name, + &out->creationHash, + &out->creationTicket); + if(result != TPM_RC_SUCCESS) + return result; // Prepare output private data from sensitive SensitiveToPrivate(&newObject->sensitive, @@ -152,6 +122,8 @@ TPM2_Create(Create_In* in, // IN: input parameter list publicArea->nameAlg, &out->outPrivate); + newObject->hierarchy = parentObject->hierarchy; + // Finish by copying the remaining return values out->outPublic.publicArea = newObject->publicArea; diff --git a/TPMCmd/tpm/src/command/Object/CreateLoaded.c b/TPMCmd/tpm/src/command/Object/CreateLoaded.c index b1d001ce..be076dd8 100644 --- a/TPMCmd/tpm/src/command/Object/CreateLoaded.c +++ b/TPMCmd/tpm/src/command/Object/CreateLoaded.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "CreateLoaded_fp.h" @@ -56,6 +22,13 @@ // key; // attempt to create a symmetric cipher key that is not // a decryption key +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects or the TPM failed +// to derive the Firmware Secret. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the TPM failed +// to derive the Firmware SVN Secret for the requested +// SVN. // TPM_RC_KDF incorrect KDF specified for decrypting keyed hash // object // TPM_RC_KEY the value of a provided symmetric key is not allowed @@ -139,8 +112,8 @@ TPM2_CreateLoaded(CreateLoaded_In* in, // IN: input parameter list if(IS_ATTRIBUTE( publicArea->objectAttributes, TPMA_OBJECT, sensitiveDataOrigin)) return TPM_RCS_ATTRIBUTES; - // Check the reset of the attributes - result = PublicAttributesValidation(parent, publicArea); + // Check the rest of the attributes + result = PublicAttributesValidation(parent, 0, publicArea); if(result != TPM_RC_SUCCESS) return RcSafeAddToResult(result, RC_CreateLoaded_inPublic); // Process the template and sensitive areas to get the actual 'label' and @@ -165,25 +138,37 @@ TPM2_CreateLoaded(CreateLoaded_In* in, // IN: input parameter list // Check attributes in input public area. CreateChecks() checks the things // that are unique to creation and then validates the attributes and values // that are common to create and load. - result = - CreateChecks(parent, publicArea, in->inSensitive.sensitive.data.t.size); + result = CreateChecks(parent, + (parent == NULL) ? in->parentHandle : 0, + publicArea, + in->inSensitive.sensitive.data.t.size); + if(result != TPM_RC_SUCCESS) return RcSafeAddToResult(result, RC_CreateLoaded_inPublic); // Creating a primary object if(parent == NULL) { TPM2B_NAME name; + TPM2B_SEED primary_seed; + newObject->attributes.primary = SET; - if(in->parentHandle == TPM_RH_ENDORSEMENT) + if(HierarchyNormalizeHandle(in->parentHandle) == TPM_RH_ENDORSEMENT) newObject->attributes.epsHierarchy = SET; + + result = HierarchyGetPrimarySeed(in->parentHandle, &primary_seed); + if(result != TPM_RC_SUCCESS) + return result; + // If so, use the primary seed and the digest of the template // to seed the DRBG result = DRBG_InstantiateSeeded( (DRBG_STATE*)rand, - &HierarchyGetPrimarySeed(in->parentHandle)->b, + &primary_seed.b, PRIMARY_OBJECT_CREATION, (TPM2B*)PublicMarshalAndComputeName(publicArea, &name), &in->inSensitive.sensitive.data.b); + MemorySet(primary_seed.b.buffer, 0, primary_seed.b.size); + if(result != TPM_RC_SUCCESS) return result; } @@ -196,6 +181,7 @@ TPM2_CreateLoaded(CreateLoaded_In* in, // IN: input parameter list // Internal data update // Create the object result = CryptCreateObject(newObject, &in->inSensitive.sensitive, rand); + DRBG_Uninstantiate((DRBG_STATE*)rand); if(result != TPM_RC_SUCCESS) return result; // if this is not a Primary key and not a derived key, then return the sensitive diff --git a/TPMCmd/tpm/src/command/Object/Load.c b/TPMCmd/tpm/src/command/Object/Load.c index 1ee7e5e8..c451762d 100644 --- a/TPMCmd/tpm/src/command/Object/Load.c +++ b/TPMCmd/tpm/src/command/Object/Load.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Load_fp.h" @@ -48,7 +14,7 @@ // TPM_RC_BINDING 'inPrivate' and 'inPublic' are not // cryptographically bound // TPM_RC_HASH incorrect hash selection for signing key or -// the 'nameAlg' for 'inPubic' is not valid +// the 'nameAlg' for 'inPublic' is not valid // TPM_RC_INTEGRITY HMAC on 'inPrivate' was not valid // TPM_RC_KDF KDF selection not allowed // TPM_RC_KEY the size of the object's 'unique' field is not diff --git a/TPMCmd/tpm/src/command/Object/LoadExternal.c b/TPMCmd/tpm/src/command/Object/LoadExternal.c index cab95855..c5c0fcd8 100644 --- a/TPMCmd/tpm/src/command/Object/LoadExternal.c +++ b/TPMCmd/tpm/src/command/Object/LoadExternal.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "LoadExternal_fp.h" diff --git a/TPMCmd/tpm/src/command/Object/MakeCredential.c b/TPMCmd/tpm/src/command/Object/MakeCredential.c index 85962b03..4e82dd6f 100644 --- a/TPMCmd/tpm/src/command/Object/MakeCredential.c +++ b/TPMCmd/tpm/src/command/Object/MakeCredential.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "MakeCredential_fp.h" diff --git a/TPMCmd/tpm/src/command/Object/ObjectChangeAuth.c b/TPMCmd/tpm/src/command/Object/ObjectChangeAuth.c index fbb25ba5..87febcaa 100644 --- a/TPMCmd/tpm/src/command/Object/ObjectChangeAuth.c +++ b/TPMCmd/tpm/src/command/Object/ObjectChangeAuth.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ObjectChangeAuth_fp.h" diff --git a/TPMCmd/tpm/src/command/Object/Object_spt.c b/TPMCmd/tpm/src/command/Object/Object_spt.c index 5399c4cb..6fc8f7cc 100644 --- a/TPMCmd/tpm/src/command/Object/Object_spt.c +++ b/TPMCmd/tpm/src/command/Object/Object_spt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Tpm.h" #include "Object_spt_fp.h" @@ -358,12 +324,21 @@ BOOL ObjectIsParent(OBJECT* parentObject // IN: parent handle //*** CreateChecks() // Attribute checks that are unique to creation. +// If parentObject is not NULL, then this function checks the object's +// attributes as an Ordinary or Derived Object with the given parent. +// If parentObject is NULL, and primaryHandle is not 0, then this function +// checks the object's attributes as a Primary Object in the given hierarchy. +// If parentObject is NULL, and primaryHandle is 0, then this function checks +// the object's attributes as an External Object. // Return Type: TPM_RC // TPM_RC_ATTRIBUTES sensitiveDataOrigin is not consistent with the // object type // other returns from PublicAttributesValidation() TPM_RC -CreateChecks(OBJECT* parentObject, TPMT_PUBLIC* publicArea, UINT16 sensitiveDataSize) +CreateChecks(OBJECT* parentObject, + TPMI_RH_HIERARCHY primaryHierarchy, + TPMT_PUBLIC* publicArea, + UINT16 sensitiveDataSize) { TPMA_OBJECT attributes = publicArea->objectAttributes; TPM_RC result = TPM_RC_SUCCESS; @@ -408,10 +383,12 @@ CreateChecks(OBJECT* parentObject, TPMT_PUBLIC* publicArea, UINT16 sensitiveData } if(TPM_RC_SUCCESS == result) { - result = PublicAttributesValidation(parentObject, publicArea); + result = + PublicAttributesValidation(parentObject, primaryHierarchy, publicArea); } return result; } + //*** SchemeChecks // This function is called by TPM2_LoadExternal() and PublicAttributesValidation(). // This function validates the schemes in the public area of an object. @@ -624,13 +601,17 @@ SchemeChecks(OBJECT* parentObject, // IN: parent (null if primary seed) // algorithm in 'publicArea' // other returns from SchemeChecks() TPM_RC -PublicAttributesValidation(OBJECT* parentObject, // IN: input parent object - TPMT_PUBLIC* publicArea // IN: public area of the object -) +PublicAttributesValidation( + // IN: input parent object (if ordinary or derived object; NULL otherwise) + OBJECT* parentObject, + // IN: hierarchy (if primary object; 0 otherwise) + TPMI_RH_HIERARCHY primaryHierarchy, + // IN: public area of the object + TPMT_PUBLIC* publicArea) { TPMA_OBJECT attributes = publicArea->objectAttributes; TPMA_OBJECT parentAttributes = TPMA_ZERO_INITIALIZER(); - // + if(parentObject != NULL) parentAttributes = parentObject->publicArea.objectAttributes; if(publicArea->nameAlg == TPM_ALG_NULL) @@ -682,6 +663,59 @@ PublicAttributesValidation(OBJECT* parentObject, // IN: input parent objec != IS_ATTRIBUTE(parentAttributes, TPMA_OBJECT, encryptedDuplication)) return TPM_RCS_ATTRIBUTES; } + // firmwareLimited/svnLimited can only be set if fixedTPM is also set. + if((IS_ATTRIBUTE(attributes, TPMA_OBJECT, firmwareLimited) + || IS_ATTRIBUTE(attributes, TPMA_OBJECT, svnLimited)) + && !IS_ATTRIBUTE(attributes, TPMA_OBJECT, fixedTPM)) + { + return TPM_RCS_ATTRIBUTES; + } + + // firmwareLimited/svnLimited also impose requirements on the parent key or + // primary handle. + if(IS_ATTRIBUTE(attributes, TPMA_OBJECT, firmwareLimited)) + { + if(parentObject != NULL) + { + // For an ordinary object, firmwareLimited can only be set if its + // parent is also firmwareLimited. + if(!IS_ATTRIBUTE(parentAttributes, TPMA_OBJECT, firmwareLimited)) + return TPM_RCS_ATTRIBUTES; + } + else if(primaryHierarchy != 0) + { + // For a primary object, firmwareLimited can only be set if its + // hierarchy is a firmware-limited hierarchy. + if(!HierarchyIsFirmwareLimited(primaryHierarchy)) + return TPM_RCS_ATTRIBUTES; + } + else + { + return TPM_RCS_ATTRIBUTES; + } + } + if(IS_ATTRIBUTE(attributes, TPMA_OBJECT, svnLimited)) + { + if(parentObject != NULL) + { + // For an ordinary object, svnLimited can only be set if its + // parent is also svnLimited. + if(!IS_ATTRIBUTE(parentAttributes, TPMA_OBJECT, svnLimited)) + return TPM_RCS_ATTRIBUTES; + } + else if(primaryHierarchy != 0) + { + // For a primary object, svnLimited can only be set if its + // hierarchy is an svn-limited hierarchy. + if(!HierarchyIsSvnLimited(primaryHierarchy)) + return TPM_RCS_ATTRIBUTES; + } + else + { + return TPM_RCS_ATTRIBUTES; + } + } + // Special checks for derived objects if((parentObject != NULL) && (parentObject->attributes.derivation == SET)) { diff --git a/TPMCmd/tpm/src/command/Object/ReadPublic.c b/TPMCmd/tpm/src/command/Object/ReadPublic.c index f22af378..024cea3d 100644 --- a/TPMCmd/tpm/src/command/Object/ReadPublic.c +++ b/TPMCmd/tpm/src/command/Object/ReadPublic.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "ReadPublic_fp.h" diff --git a/TPMCmd/tpm/src/command/Object/Unseal.c b/TPMCmd/tpm/src/command/Object/Unseal.c index 802c83e5..92eb9d03 100644 --- a/TPMCmd/tpm/src/command/Object/Unseal.c +++ b/TPMCmd/tpm/src/command/Object/Unseal.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Unseal_fp.h" diff --git a/TPMCmd/tpm/src/command/PCR/PCR_Allocate.c b/TPMCmd/tpm/src/command/PCR/PCR_Allocate.c index aaec83de..61383c8c 100644 --- a/TPMCmd/tpm/src/command/PCR/PCR_Allocate.c +++ b/TPMCmd/tpm/src/command/PCR/PCR_Allocate.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PCR_Allocate_fp.h" diff --git a/TPMCmd/tpm/src/command/PCR/PCR_Event.c b/TPMCmd/tpm/src/command/PCR/PCR_Event.c index 0af4de72..ce059b73 100644 --- a/TPMCmd/tpm/src/command/PCR/PCR_Event.c +++ b/TPMCmd/tpm/src/command/PCR/PCR_Event.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PCR_Event_fp.h" diff --git a/TPMCmd/tpm/src/command/PCR/PCR_Extend.c b/TPMCmd/tpm/src/command/PCR/PCR_Extend.c index c2bf1721..2b53286a 100644 --- a/TPMCmd/tpm/src/command/PCR/PCR_Extend.c +++ b/TPMCmd/tpm/src/command/PCR/PCR_Extend.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PCR_Extend_fp.h" diff --git a/TPMCmd/tpm/src/command/PCR/PCR_Read.c b/TPMCmd/tpm/src/command/PCR/PCR_Read.c index 5ff742b3..55d4e140 100644 --- a/TPMCmd/tpm/src/command/PCR/PCR_Read.c +++ b/TPMCmd/tpm/src/command/PCR/PCR_Read.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PCR_Read_fp.h" diff --git a/TPMCmd/tpm/src/command/PCR/PCR_Reset.c b/TPMCmd/tpm/src/command/PCR/PCR_Reset.c index 910adadd..fee01336 100644 --- a/TPMCmd/tpm/src/command/PCR/PCR_Reset.c +++ b/TPMCmd/tpm/src/command/PCR/PCR_Reset.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PCR_Reset_fp.h" diff --git a/TPMCmd/tpm/src/command/PCR/PCR_SetAuthPolicy.c b/TPMCmd/tpm/src/command/PCR/PCR_SetAuthPolicy.c index 1a0b94aa..97b25ce1 100644 --- a/TPMCmd/tpm/src/command/PCR/PCR_SetAuthPolicy.c +++ b/TPMCmd/tpm/src/command/PCR/PCR_SetAuthPolicy.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PCR_SetAuthPolicy_fp.h" diff --git a/TPMCmd/tpm/src/command/PCR/PCR_SetAuthValue.c b/TPMCmd/tpm/src/command/PCR/PCR_SetAuthValue.c index 4f8b7cb7..bd8d013a 100644 --- a/TPMCmd/tpm/src/command/PCR/PCR_SetAuthValue.c +++ b/TPMCmd/tpm/src/command/PCR/PCR_SetAuthValue.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PCR_SetAuthValue_fp.h" diff --git a/TPMCmd/tpm/src/command/Random/GetRandom.c b/TPMCmd/tpm/src/command/Random/GetRandom.c index ef88807e..02b3deb4 100644 --- a/TPMCmd/tpm/src/command/Random/GetRandom.c +++ b/TPMCmd/tpm/src/command/Random/GetRandom.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "GetRandom_fp.h" diff --git a/TPMCmd/tpm/src/command/Random/StirRandom.c b/TPMCmd/tpm/src/command/Random/StirRandom.c index b53573fe..19069996 100644 --- a/TPMCmd/tpm/src/command/Random/StirRandom.c +++ b/TPMCmd/tpm/src/command/Random/StirRandom.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "StirRandom_fp.h" diff --git a/TPMCmd/tpm/src/command/Session/PolicyRestart.c b/TPMCmd/tpm/src/command/Session/PolicyRestart.c index 87f51782..105f1c24 100644 --- a/TPMCmd/tpm/src/command/Session/PolicyRestart.c +++ b/TPMCmd/tpm/src/command/Session/PolicyRestart.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "PolicyRestart_fp.h" diff --git a/TPMCmd/tpm/src/command/Session/StartAuthSession.c b/TPMCmd/tpm/src/command/Session/StartAuthSession.c index 71a3d721..82ccf7de 100644 --- a/TPMCmd/tpm/src/command/Session/StartAuthSession.c +++ b/TPMCmd/tpm/src/command/Session/StartAuthSession.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "StartAuthSession_fp.h" diff --git a/TPMCmd/tpm/src/command/Signature/Sign.c b/TPMCmd/tpm/src/command/Signature/Sign.c index 560bcd34..5a8113bb 100644 --- a/TPMCmd/tpm/src/command/Signature/Sign.c +++ b/TPMCmd/tpm/src/command/Signature/Sign.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Sign_fp.h" @@ -82,10 +48,12 @@ TPM2_Sign(Sign_In* in, // IN: input parameter list signObject->publicArea.objectAttributes, TPMA_OBJECT, restricted)) { // Compute and compare ticket - TicketComputeHashCheck(in->validation.hierarchy, - in->inScheme.details.any.hashAlg, - &in->digest, - &ticket); + result = TicketComputeHashCheck(in->validation.hierarchy, + in->inScheme.details.any.hashAlg, + &in->digest, + &ticket); + if(result != TPM_RC_SUCCESS) + return result; if(!MemoryEqual2B(&in->validation.digest.b, &ticket.digest.b)) return TPM_RCS_TICKET + RC_Sign_validation; diff --git a/TPMCmd/tpm/src/command/Signature/VerifySignature.c b/TPMCmd/tpm/src/command/Signature/VerifySignature.c index f2bd4dc7..0f0e3e62 100644 --- a/TPMCmd/tpm/src/command/Signature/VerifySignature.c +++ b/TPMCmd/tpm/src/command/Signature/VerifySignature.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "VerifySignature_fp.h" @@ -81,8 +47,10 @@ TPM2_VerifySignature(VerifySignature_In* in, // IN: input parameter list else { // Compute ticket - TicketComputeVerified( + result = TicketComputeVerified( hierarchy, &in->digest, &signObject->name, &out->validation); + if(result != TPM_RC_SUCCESS) + return result; } return TPM_RC_SUCCESS; diff --git a/TPMCmd/tpm/src/command/Startup/Shutdown.c b/TPMCmd/tpm/src/command/Startup/Shutdown.c index eb652c20..990db38e 100644 --- a/TPMCmd/tpm/src/command/Startup/Shutdown.c +++ b/TPMCmd/tpm/src/command/Startup/Shutdown.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Shutdown_fp.h" @@ -72,8 +38,10 @@ TPM2_Shutdown(Shutdown_In* in // IN: input parameter list // PCR private date state save PCRStateSave(in->shutdownType); +# if ACT_SUPPORT // Save the ACT state ActShutdown(in->shutdownType); +# endif // Save RAM backed NV index data NvUpdateIndexOrderlyData(); diff --git a/TPMCmd/tpm/src/command/Startup/Startup.c b/TPMCmd/tpm/src/command/Startup/Startup.c index 285b5fb2..94ea593b 100644 --- a/TPMCmd/tpm/src/command/Startup/Startup.c +++ b/TPMCmd/tpm/src/command/Startup/Startup.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Startup_fp.h" @@ -146,12 +112,12 @@ TPM2_Startup(Startup_In* in // IN: input parameter list // command has been received. OK = OK && TPMRegisterStartup(); - // Read the platform unique value that is used as VENDOR_PERMANENT +# if VENDOR_PERMANENT_AUTH_ENABLED == YES + // Read the platform unique value that is used as VENDOR_PERMANENT_AUTH_HANDLE // authorization value - g_platformUniqueDetails.t.size = - (UINT16)_plat__GetUnique(1, - sizeof(g_platformUniqueDetails.t.buffer), - g_platformUniqueDetails.t.buffer); + g_platformUniqueAuth.t.size = (UINT16)_plat__GetUniqueAuth( + 1, sizeof(g_platformUniqueAuth.t.buffer), g_platformUniqueAuth.t.buffer); +# endif // Start up subsystems // Start set the safe flag @@ -170,9 +136,11 @@ TPM2_Startup(Startup_In* in // IN: input parameter list OK = OK && CommandAuditStartup(startup); // Restore the ACT +# if ACT_SUPPORT OK = OK && ActStartup(startup); +# endif - //// The following code was moved from Time.c where it made no sense + // The following code was moved from Time.c where it made no sense if(OK) { switch(startup) diff --git a/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt.c b/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt.c index ad0a539a..60885f24 100644 --- a/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt.c +++ b/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "EncryptDecrypt_fp.h" #if CC_EncryptDecrypt2 diff --git a/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt2.c b/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt2.c index f4e9832c..e0c28003 100644 --- a/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt2.c +++ b/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt2.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "EncryptDecrypt2_fp.h" #include "EncryptDecrypt_fp.h" diff --git a/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt_spt.c b/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt_spt.c index 16f1dafe..df6abd3b 100644 --- a/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt_spt.c +++ b/TPMCmd/tpm/src/command/Symmetric/EncryptDecrypt_spt.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "EncryptDecrypt_fp.h" #include "EncryptDecrypt_spt_fp.h" diff --git a/TPMCmd/tpm/src/command/Symmetric/HMAC.c b/TPMCmd/tpm/src/command/Symmetric/HMAC.c index 4463f1a6..f3c96661 100644 --- a/TPMCmd/tpm/src/command/Symmetric/HMAC.c +++ b/TPMCmd/tpm/src/command/Symmetric/HMAC.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "HMAC_fp.h" diff --git a/TPMCmd/tpm/src/command/Symmetric/Hash.c b/TPMCmd/tpm/src/command/Symmetric/Hash.c index fca68adf..023d318a 100644 --- a/TPMCmd/tpm/src/command/Symmetric/Hash.c +++ b/TPMCmd/tpm/src/command/Symmetric/Hash.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "Hash_fp.h" @@ -76,9 +42,12 @@ TPM2_Hash(Hash_In* in, // IN: input parameter list } else { + TPM_RC result; // Compute ticket - TicketComputeHashCheck( + result = TicketComputeHashCheck( in->hierarchy, in->hashAlg, &out->outHash, &out->validation); + if(result != TPM_RC_SUCCESS) + return result; } return TPM_RC_SUCCESS; diff --git a/TPMCmd/tpm/src/command/Symmetric/MAC.c b/TPMCmd/tpm/src/command/Symmetric/MAC.c index a4638098..b5fe7062 100644 --- a/TPMCmd/tpm/src/command/Symmetric/MAC.c +++ b/TPMCmd/tpm/src/command/Symmetric/MAC.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "MAC_fp.h" diff --git a/TPMCmd/tpm/src/command/Testing/GetTestResult.c b/TPMCmd/tpm/src/command/Testing/GetTestResult.c index dce7e975..8bc7e994 100644 --- a/TPMCmd/tpm/src/command/Testing/GetTestResult.c +++ b/TPMCmd/tpm/src/command/Testing/GetTestResult.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "GetTestResult_fp.h" diff --git a/TPMCmd/tpm/src/command/Testing/IncrementalSelfTest.c b/TPMCmd/tpm/src/command/Testing/IncrementalSelfTest.c index a359bc82..e87c4823 100644 --- a/TPMCmd/tpm/src/command/Testing/IncrementalSelfTest.c +++ b/TPMCmd/tpm/src/command/Testing/IncrementalSelfTest.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "IncrementalSelfTest_fp.h" diff --git a/TPMCmd/tpm/src/command/Testing/SelfTest.c b/TPMCmd/tpm/src/command/Testing/SelfTest.c index 97c776ed..f83c393d 100644 --- a/TPMCmd/tpm/src/command/Testing/SelfTest.c +++ b/TPMCmd/tpm/src/command/Testing/SelfTest.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #include "SelfTest_fp.h" diff --git a/TPMCmd/tpm/src/command/Vendor/Vendor_TCG_Test.c b/TPMCmd/tpm/src/command/Vendor/Vendor_TCG_Test.c index d38d4f1a..87aa4404 100644 --- a/TPMCmd/tpm/src/command/Vendor/Vendor_TCG_Test.c +++ b/TPMCmd/tpm/src/command/Vendor/Vendor_TCG_Test.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" #if CC_Vendor_TCG_Test // Conditional expansion of this file diff --git a/TPMCmd/tpm/src/crypt/AlgorithmTests.c b/TPMCmd/tpm/src/crypt/AlgorithmTests.c index 60574713..ca6127a5 100644 --- a/TPMCmd/tpm/src/crypt/AlgorithmTests.c +++ b/TPMCmd/tpm/src/crypt/AlgorithmTests.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the code to perform the various self-test functions. // @@ -43,7 +9,7 @@ #define SELF_TEST_DATA -#if SELF_TEST +#if ENABLE_SELF_TESTS // These includes pull in the data structures. They contain data definitions for the // various tests. @@ -54,33 +20,33 @@ # include "HashTestData.h" # include "KdfTestData.h" -# define TEST_DEFAULT_TEST_HASH(vector) \ - if(TEST_BIT(DEFAULT_TEST_HASH, g_toTest)) \ - TestHash(DEFAULT_TEST_HASH, vector); +# define TEST_DEFAULT_TEST_HASH(vector) \ + if(TEST_BIT(DEFAULT_TEST_HASH, g_toTest)) \ + TestHash(DEFAULT_TEST_HASH, vector); // Make sure that the algorithm has been tested -# define CLEAR_BOTH(alg) \ - { \ - CLEAR_BIT(alg, *toTest); \ - if(toTest != &g_toTest) \ - CLEAR_BIT(alg, g_toTest); \ - } - -# define SET_BOTH(alg) \ - { \ - SET_BIT(alg, *toTest); \ - if(toTest != &g_toTest) \ - SET_BIT(alg, g_toTest); \ - } - -# define TEST_BOTH(alg) \ - ((toTest != &g_toTest) ? TEST_BIT(alg, *toTest) || TEST_BIT(alg, g_toTest) \ - : TEST_BIT(alg, *toTest)) +# define CLEAR_BOTH(alg) \ + { \ + CLEAR_BIT(alg, *toTest); \ + if(toTest != &g_toTest) \ + CLEAR_BIT(alg, g_toTest); \ + } + +# define SET_BOTH(alg) \ + { \ + SET_BIT(alg, *toTest); \ + if(toTest != &g_toTest) \ + SET_BIT(alg, g_toTest); \ + } + +# define TEST_BOTH(alg) \ + ((toTest != &g_toTest) ? TEST_BIT(alg, *toTest) || TEST_BIT(alg, g_toTest) \ + : TEST_BIT(alg, *toTest)) // Can only cancel if doing a list. -# define CHECK_CANCELED \ - if(_plat__IsCanceled() && toTest != &g_toTest) \ - return TPM_RC_CANCELED; +# define CHECK_CANCELED \ + if(_plat__IsCanceled() && toTest != &g_toTest) \ + return TPM_RC_CANCELED; //** Hash Tests @@ -98,10 +64,10 @@ static TPM_RC TestHash(TPM_ALG_ID hashAlg, ALGORITHM_VECTOR* toTest) // TPM2B_TYPE(HMAC_BLOCK, DEFAULT_TEST_HASH_BLOCK_SIZE); pAssert(hashAlg != TPM_ALG_NULL); -# define HASH_CASE_FOR_TEST(HASH, hash) \ - case ALG_##HASH##_VALUE: \ - testDigest = &c_##HASH##_digest.b; \ - break; +# define HASH_CASE_FOR_TEST(HASH, hash) \ + case ALG_##HASH##_VALUE: \ + testDigest = &c_##HASH##_digest.b; \ + break; switch(hashAlg) { FOR_EACH_HASH(HASH_CASE_FOR_TEST) diff --git a/TPMCmd/tpm/src/crypt/BnConvert.c b/TPMCmd/tpm/src/crypt/BnConvert.c deleted file mode 100644 index d682cc87..00000000 --- a/TPMCmd/tpm/src/crypt/BnConvert.c +++ /dev/null @@ -1,278 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This file contains the basic conversion functions that will convert TPM2B -// to/from the internal format. The internal format is a bigNum, -// - -//** Includes - -#include "Tpm.h" - -//** Functions - -//*** BnFromBytes() -// This function will convert a big-endian byte array to the internal number -// format. If bn is NULL, then the output is NULL. If bytes is null or the -// required size is 0, then the output is set to zero -LIB_EXPORT bigNum BnFromBytes(bigNum bn, const BYTE* bytes, NUMBYTES nBytes) -{ - const BYTE* pFrom; // 'p' points to the least significant bytes of source - BYTE* pTo; // points to least significant bytes of destination - crypt_uword_t size; - // - - size = (bytes != NULL) ? BYTES_TO_CRYPT_WORDS(nBytes) : 0; - - // If nothing in, nothing out - if(bn == NULL) - return NULL; - - // make sure things fit - pAssert(BnGetAllocated(bn) >= size); - - if(size > 0) - { - // Clear the topmost word in case it is not filled with data - bn->d[size - 1] = 0; - // Moving the input bytes from the end of the list (LSB) end - pFrom = bytes + nBytes - 1; - // To the LS0 of the LSW of the bigNum. - pTo = (BYTE*)bn->d; - for(; nBytes != 0; nBytes--) - *pTo++ = *pFrom--; - // For a little-endian machine, the conversion is a straight byte - // reversal. For a big-endian machine, we have to put the words in - // big-endian byte order -#if BIG_ENDIAN_TPM - { - crypt_word_t t; - for(t = (crypt_word_t)size - 1; t >= 0; t--) - bn->d[t] = SWAP_CRYPT_WORD(bn->d[t]); - } -#endif - } - BnSetTop(bn, size); - return bn; -} - -//*** BnFrom2B() -// Convert an TPM2B to a BIG_NUM. -// If the input value does not exist, or the output does not exist, or the input -// will not fit into the output the function returns NULL -LIB_EXPORT bigNum BnFrom2B(bigNum bn, // OUT: - const TPM2B* a2B // IN: number to convert -) -{ - if(a2B != NULL) - return BnFromBytes(bn, a2B->buffer, a2B->size); - // Make sure that the number has an initialized value rather than whatever - // was there before - BnSetTop(bn, 0); // Function accepts NULL - return NULL; -} - -//*** BnFromHex() -// Convert a hex string into a bigNum. This is primarily used in debugging. -LIB_EXPORT bigNum BnFromHex(bigNum bn, // OUT: - const char* hex // IN: -) -{ -#define FromHex(a) ((a) - (((a) > 'a') ? ('a' + 10) : ((a) > 'A') ? ('A' - 10) : '0')) - unsigned i; - unsigned wordCount; - const char* p; - BYTE* d = (BYTE*)&(bn->d[0]); - // - pAssert(bn && hex); - i = (unsigned)strlen(hex); - wordCount = BYTES_TO_CRYPT_WORDS((i + 1) / 2); - if((i == 0) || (wordCount >= BnGetAllocated(bn))) - BnSetWord(bn, 0); - else - { - bn->d[wordCount - 1] = 0; - p = hex + i - 1; - for(; i > 1; i -= 2) - { - BYTE a; - a = FromHex(*p); - p--; - *d++ = a + (FromHex(*p) << 4); - p--; - } - if(i == 1) - *d = FromHex(*p); - } -#if !BIG_ENDIAN_TPM - for(i = 0; i < wordCount; i++) - bn->d[i] = SWAP_CRYPT_WORD(bn->d[i]); -#endif // BIG_ENDIAN_TPM - BnSetTop(bn, wordCount); - return bn; -} - -//*** BnToBytes() -// This function converts a BIG_NUM to a byte array. It converts the bigNum to a -// big-endian byte string and sets 'size' to the normalized value. If 'size' is an -// input 0, then the receiving buffer is guaranteed to be large enough for the result -// and the size will be set to the size required for bigNum (leading zeros -// suppressed). -// -// The conversion for a little-endian machine simply requires that all significant -// bytes of the bigNum be reversed. For a big-endian machine, rather than -// unpack each word individually, the bigNum is converted to little-endian words, -// copied, and then converted back to big-endian. -LIB_EXPORT BOOL BnToBytes(bigConst bn, - BYTE* buffer, - NUMBYTES* size // This the number of bytes that are - // available in the buffer. The result - // should be this big. -) -{ - crypt_uword_t requiredSize; - BYTE* pFrom; - BYTE* pTo; - crypt_uword_t count; - // - // validate inputs - pAssert(bn && buffer && size); - - requiredSize = (BnSizeInBits(bn) + 7) / 8; - if(requiredSize == 0) - { - // If the input value is 0, return a byte of zero - *size = 1; - *buffer = 0; - } - else - { -#if BIG_ENDIAN_TPM - // Copy the constant input value into a modifiable value - BN_VAR(bnL, LARGEST_NUMBER_BITS * 2); - BnCopy(bnL, bn); - // byte swap the words in the local value to make them little-endian - for(count = 0; count < bnL->size; count++) - bnL->d[count] = SWAP_CRYPT_WORD(bnL->d[count]); - bn = (bigConst)bnL; -#endif - if(*size == 0) - *size = (NUMBYTES)requiredSize; - pAssert(requiredSize <= *size); - // Byte swap the number (not words but the whole value) - count = *size; - // Start from the least significant word and offset to the most significant - // byte which is in some high word - pFrom = (BYTE*)(&bn->d[0]) + requiredSize - 1; - pTo = buffer; - - // If the number of output bytes is larger than the number bytes required - // for the input number, pad with zeros - for(count = *size; count > requiredSize; count--) - *pTo++ = 0; - // Move the most significant byte at the end of the BigNum to the next most - // significant byte position of the 2B and repeat for all significant bytes. - for(; requiredSize > 0; requiredSize--) - *pTo++ = *pFrom--; - } - return TRUE; -} - -//*** BnTo2B() -// Function to convert a BIG_NUM to TPM2B. -// The TPM2B size is set to the requested 'size' which may require padding. -// If 'size' is non-zero and less than required by the value in 'bn' then an error -// is returned. If 'size' is zero, then the TPM2B is assumed to be large enough -// for the data and a2b->size will be adjusted accordingly. -LIB_EXPORT BOOL BnTo2B(bigConst bn, // IN: - TPM2B* a2B, // OUT: - NUMBYTES size // IN: the desired size -) -{ - // Set the output size - if(bn && a2B) - { - a2B->size = size; - return BnToBytes(bn, a2B->buffer, &a2B->size); - } - return FALSE; -} - -#if ALG_ECC - -//*** BnPointFrom2B() -// Function to create a BIG_POINT structure from a 2B point. -// A point is going to be two ECC values in the same buffer. The values are going -// to be the size of the modulus. They are in modular form. -LIB_EXPORT bn_point_t* BnPointFrom2B( - bigPoint ecP, // OUT: the preallocated point structure - TPMS_ECC_POINT* p // IN: the number to convert -) -{ - if(p == NULL) - return NULL; - - if(NULL != ecP) - { - BnFrom2B(ecP->x, &p->x.b); - BnFrom2B(ecP->y, &p->y.b); - BnSetWord(ecP->z, 1); - } - return ecP; -} - -//*** BnPointTo2B() -// This function converts a BIG_POINT into a TPMS_ECC_POINT. A TPMS_ECC_POINT -// contains two TPM2B_ECC_PARAMETER values. The maximum size of the parameters -// is dependent on the maximum EC key size used in an implementation. -// The presumption is that the TPMS_ECC_POINT is large enough to hold 2 TPM2B -// values, each as large as a MAX_ECC_PARAMETER_BYTES -LIB_EXPORT BOOL BnPointTo2B(TPMS_ECC_POINT* p, // OUT: the converted 2B structure - bigPoint ecP, // IN: the values to be converted - bigCurve E // IN: curve descriptor for the point -) -{ - UINT16 size; - // - pAssert(p && ecP && E); - pAssert(BnEqualWord(ecP->z, 1)); - // BnMsb is the bit number of the MSB. This is one less than the number of bits - size = (UINT16)BITS_TO_BYTES(BnSizeInBits(CurveGetOrder(AccessCurveData(E)))); - BnTo2B(ecP->x, &p->x.b, size); - BnTo2B(ecP->y, &p->y.b, size); - return TRUE; -} - -#endif // ALG_ECC \ No newline at end of file diff --git a/TPMCmd/tpm/src/crypt/BnMemory.c b/TPMCmd/tpm/src/crypt/BnMemory.c deleted file mode 100644 index 3b9e9044..00000000 --- a/TPMCmd/tpm/src/crypt/BnMemory.c +++ /dev/null @@ -1,166 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// This file contains the memory setup functions used by the bigNum functions -// in CryptoEngine - -//** Includes -#include "Tpm.h" - -//** Functions - -//*** BnSetTop() -// This function is used when the size of a bignum_t is changed. It -// makes sure that the unused words are set to zero and that any significant -// words of zeros are eliminated from the used size indicator. -LIB_EXPORT bigNum BnSetTop(bigNum bn, // IN/OUT: number to clean - crypt_uword_t top // IN: the new top -) -{ - if(bn != NULL) - { - pAssert(top <= bn->allocated); - // If forcing the size to be decreased, make sure that the words being - // discarded are being set to 0 - while(bn->size > top) - bn->d[--bn->size] = 0; - bn->size = top; - // Now make sure that the words that are left are 'normalized' (no high-order - // words of zero. - while((bn->size > 0) && (bn->d[bn->size - 1] == 0)) - bn->size -= 1; - } - return bn; -} - -//*** BnClearTop() -// This function will make sure that all unused words are zero. -LIB_EXPORT bigNum BnClearTop(bigNum bn) -{ - crypt_uword_t i; - // - if(bn != NULL) - { - for(i = bn->size; i < bn->allocated; i++) - bn->d[i] = 0; - while((bn->size > 0) && (bn->d[bn->size] == 0)) - bn->size -= 1; - } - return bn; -} - -//*** BnInitializeWord() -// This function is used to initialize an allocated bigNum with a word value. The -// bigNum does not have to be allocated with a single word. -LIB_EXPORT bigNum BnInitializeWord(bigNum bn, // IN: - crypt_uword_t allocated, // IN: - crypt_uword_t word // IN: -) -{ - bn->allocated = allocated; - bn->size = (word != 0); - bn->d[0] = word; - while(allocated > 1) - bn->d[--allocated] = 0; - return bn; -} - -//*** BnInit() -// This function initializes a stack allocated bignum_t. It initializes -// 'allocated' and 'size' and zeros the words of 'd'. -LIB_EXPORT bigNum BnInit(bigNum bn, crypt_uword_t allocated) -{ - if(bn != NULL) - { - bn->allocated = allocated; - bn->size = 0; - while(allocated != 0) - bn->d[--allocated] = 0; - } - return bn; -} - -//*** BnCopy() -// Function to copy a bignum_t. If the output is NULL, then -// nothing happens. If the input is NULL, the output is set -// to zero. -LIB_EXPORT BOOL BnCopy(bigNum out, bigConst in) -{ - if(in == out) - BnSetTop(out, BnGetSize(out)); - else if(out != NULL) - { - if(in != NULL) - { - unsigned int i; - pAssert(BnGetAllocated(out) >= BnGetSize(in)); - for(i = 0; i < BnGetSize(in); i++) - out->d[i] = in->d[i]; - BnSetTop(out, BnGetSize(in)); - } - else - BnSetTop(out, 0); - } - return TRUE; -} - -#if ALG_ECC - -//*** BnPointCopy() -// Function to copy a bn point. -LIB_EXPORT BOOL BnPointCopy(bigPoint pOut, pointConst pIn) -{ - return BnCopy(pOut->x, pIn->x) && BnCopy(pOut->y, pIn->y) - && BnCopy(pOut->z, pIn->z); -} - -//*** BnInitializePoint() -// This function is used to initialize a point structure with the addresses -// of the coordinates. -LIB_EXPORT bn_point_t* BnInitializePoint( - bigPoint p, // OUT: structure to receive pointers - bigNum x, // IN: x coordinate - bigNum y, // IN: y coordinate - bigNum z // IN: x coordinate -) -{ - p->x = x; - p->y = y; - p->z = z; - BnSetWord(z, 1); - return p; -} - -#endif // ALG_ECC \ No newline at end of file diff --git a/TPMCmd/tpm/src/crypt/CryptCmac.c b/TPMCmd/tpm/src/crypt/CryptCmac.c index b33c3daf..2d51a3eb 100644 --- a/TPMCmd/tpm/src/crypt/CryptCmac.c +++ b/TPMCmd/tpm/src/crypt/CryptCmac.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // // This file contains the implementation of the message authentication codes based diff --git a/TPMCmd/tpm/src/crypt/CryptDes.c b/TPMCmd/tpm/src/crypt/CryptDes.c deleted file mode 100644 index f0ec62ef..00000000 --- a/TPMCmd/tpm/src/crypt/CryptDes.c +++ /dev/null @@ -1,174 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// -// This file contains the extra functions required for TDES. - -//** Includes, Defines, and Typedefs -#include "Tpm.h" - -#if ALG_TDES - -# define DES_NUM_WEAK 64 -const UINT64 DesWeakKeys[DES_NUM_WEAK] = - {0x0101010101010101ULL, 0xFEFEFEFEFEFEFEFEULL, 0xE0E0E0E0F1F1F1F1ULL, - 0x1F1F1F1F0E0E0E0EULL, 0x011F011F010E010EULL, 0x1F011F010E010E01ULL, - 0x01E001E001F101F1ULL, 0xE001E001F101F101ULL, 0x01FE01FE01FE01FEULL, - 0xFE01FE01FE01FE01ULL, 0x1FE01FE00EF10EF1ULL, 0xE01FE01FF10EF10EULL, - 0x1FFE1FFE0EFE0EFEULL, 0xFE1FFE1FFE0EFE0EULL, 0xE0FEE0FEF1FEF1FEULL, - 0xFEE0FEE0FEF1FEF1ULL, 0x01011F1F01010E0EULL, 0x1F1F01010E0E0101ULL, - 0xE0E01F1FF1F10E0EULL, 0x0101E0E00101F1F1ULL, 0x1F1FE0E00E0EF1F1ULL, - 0xE0E0FEFEF1F1FEFEULL, 0x0101FEFE0101FEFEULL, 0x1F1FFEFE0E0EFEFEULL, - 0xE0FE011FF1FE010EULL, 0x011F1F01010E0E01ULL, 0x1FE001FE0EF101FEULL, - 0xE0FE1F01F1FE0E01ULL, 0x011FE0FE010EF1FEULL, 0x1FE0E01F0EF1F10EULL, - 0xE0FEFEE0F1FEFEF1ULL, 0x011FFEE0010EFEF1ULL, 0x1FE0FE010EF1FE01ULL, - 0xFE0101FEFE0101FEULL, 0x01E01FFE01F10EFEULL, 0x1FFE01E00EFE01F1ULL, - 0xFE011FE0FE010EF1ULL, 0xFE01E01FFE01F10EULL, 0x1FFEE0010EFEF101ULL, - 0xFE1F01E0FE0E01F1ULL, 0x01E0E00101F1F101ULL, 0x1FFEFE1F0EFEFE0EULL, - 0xFE1FE001FE0EF101ULL, 0x01E0FE1F01F1FE0EULL, 0xE00101E0F10101F1ULL, - 0xFE1F1FFEFE0E0EFEULL, 0x01FE1FE001FE0EF1ULL, 0xE0011FFEF1010EFEULL, - 0xFEE0011FFEF1010EULL, 0x01FEE01F01FEF10EULL, 0xE001FE1FF101FE0EULL, - 0xFEE01F01FEF10E01ULL, 0x01FEFE0101FEFE01ULL, 0xE01F01FEF10E01FEULL, - 0xFEE0E0FEFEF1F1FEULL, 0x1F01011F0E01010EULL, 0xE01F1FE0F10E0EF1ULL, - 0xFEFE0101FEFE0101ULL, 0x1F01E0FE0E01F1FEULL, 0xE01FFE01F10EFE01ULL, - 0xFEFE1F1FFEFE0E0EULL, 0x1F01FEE00E01FEF1ULL, 0xE0E00101F1F10101ULL, - 0xFEFEE0E0FEFEF1F1ULL}; - -//*** CryptSetOddByteParity() -// This function sets the per byte parity of a 64-bit value. The least-significant -// bit is of each byte is replaced with the odd parity of the other 7 bits in the -// byte. With odd parity, no byte will ever be 0x00. -UINT64 -CryptSetOddByteParity(UINT64 k) -{ -# define PMASK 0x0101010101010101ULL - UINT64 out; - k |= PMASK; // set the parity bit - out = k; - k ^= k >> 4; - k ^= k >> 2; - k ^= k >> 1; - k &= PMASK; // odd parity extracted - out ^= k; // out is now even parity because parity bit was already set - out ^= PMASK; // out is now even parity - return out; -} - -//*** CryptDesIsWeakKey() -// Check to see if a DES key is on the list of weak, semi-weak, or possibly weak -// keys. -// Return Type: BOOL -// TRUE(1) DES key is weak -// FALSE(0) DES key is not weak -static BOOL CryptDesIsWeakKey(UINT64 k) -{ - int i; - // - for(i = 0; i < DES_NUM_WEAK; i++) - { - if(k == DesWeakKeys[i]) - return TRUE; - } - return FALSE; -} - -//*** CryptDesValidateKey() -// Function to check to see if the input key is a valid DES key where the definition -// of valid is that none of the elements are on the list of weak, semi-weak, or -// possibly weak keys; and that for two keys, K1!=K2, and for three keys that -// K1!=K2 and K2!=K3. -BOOL CryptDesValidateKey(TPM2B_SYM_KEY* desKey // IN: key to validate -) -{ - UINT64 k[3]; - int i; - int keys = (desKey->t.size + 7) / 8; - BYTE* pk = desKey->t.buffer; - BOOL ok; - // - // Note: 'keys' is the number of keys, not the maximum index for 'k' - ok = ((keys == 2) || (keys == 3)) && ((desKey->t.size % 8) == 0); - for(i = 0; ok && i < keys; pk += 8, i++) - { - k[i] = CryptSetOddByteParity(BYTE_ARRAY_TO_UINT64(pk)); - ok = !CryptDesIsWeakKey(k[i]); - } - ok = ok && k[0] != k[1]; - if(keys == 3) - ok = ok && k[1] != k[2]; - return ok; -} - -//*** CryptGenerateKeyDes() -// This function is used to create a DES key of the appropriate size. The key will -// have odd parity in the bytes. -TPM_RC -CryptGenerateKeyDes(TPMT_PUBLIC* publicArea, // IN/OUT: The public area template - // for the new key. - TPMT_SENSITIVE* sensitive, // OUT: sensitive area - RAND_STATE* rand // IN: the "entropy" source for -) -{ - // Assume that the publicArea key size has been validated and is a supported - // number of bits. - sensitive->sensitive.sym.t.size = - BITS_TO_BYTES(publicArea->parameters.symDetail.sym.keyBits.sym); - - // Because we use BYTE_ARRAY_TO_UINT64 below, require the requested DES key - // to be a multiple of 8 bytes in size. - if((sensitive->sensitive.sym.t.size % 8) != 0) - { - return TPM_RC_SYMMETRIC; - } - - do - { - BYTE* pK = sensitive->sensitive.sym.t.buffer; - int i = (sensitive->sensitive.sym.t.size + 7) / 8; - // Use the random number generator to generate the required number of bits - if(DRBG_Generate(rand, pK, sensitive->sensitive.sym.t.size) == 0) - return TPM_RC_NO_RESULT; - for(; i > 0; pK += 8, i--) - { - UINT64 k = BYTE_ARRAY_TO_UINT64(pK); - k = CryptSetOddByteParity(k); - UINT64_TO_BYTE_ARRAY(k, pK); - } - } while(!CryptDesValidateKey(&sensitive->sensitive.sym)); - return TPM_RC_SUCCESS; -} - -#endif -//*** diff --git a/TPMCmd/tpm/src/crypt/CryptEccCrypt.c b/TPMCmd/tpm/src/crypt/CryptEccCrypt.c index 619b0bdd..3ac66787 100644 --- a/TPMCmd/tpm/src/crypt/CryptEccCrypt.c +++ b/TPMCmd/tpm/src/crypt/CryptEccCrypt.c @@ -1,39 +1,7 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes and Defines #include "Tpm.h" +#include "TpmMath_Util_fp.h" +#include "TpmEcc_Util_fp.h" #if CC_ECC_Encrypt || CC_ECC_Encrypt @@ -82,11 +50,11 @@ LIB_EXPORT TPM_RC CryptEccEncrypt( // and plainText ) { - CURVE_INITIALIZED(E, key->publicArea.parameters.eccDetail.curveID); - POINT_INITIALIZED(PB, &key->publicArea.unique.ecc); - POINT_VAR(Px, MAX_ECC_KEY_BITS); + CRYPT_CURVE_INITIALIZED(E, key->publicArea.parameters.eccDetail.curveID); + CRYPT_POINT_INITIALIZED(PB, &key->publicArea.unique.ecc); + CRYPT_POINT_VAR(Px); TPMS_ECC_POINT p2; - ECC_NUM(D); + CRYPT_ECC_NUM(D); TPM2B_TYPE(2ECC, MAX_ECC_KEY_BYTES * 2); TPM2B_2ECC z; int i; @@ -107,21 +75,21 @@ LIB_EXPORT TPM_RC CryptEccEncrypt( # define RANDOM NULL # endif if(E == NULL) - ERROR_RETURN(TPM_RC_CURVE); + ERROR_EXIT(TPM_RC_CURVE); if(TPM_ALG_KDF2 != scheme->scheme) - ERROR_RETURN(TPM_RC_SCHEME); + ERROR_EXIT(TPM_RC_SCHEME); // generate an ephemeral key from a random k - if(!BnEccGenerateKeyPair(D, Px, E, RANDOM) + if(!TpmEcc_GenerateKeyPair(D, Px, E, RANDOM) // C1 is the public part of the ephemeral key - || !BnPointTo2B(c1, Px, E) + || !TpmEcc_PointTo2B(c1, Px, E) // Compute P2 - || (BnPointMult(Px, PB, D, NULL, NULL, E) != TPM_RC_SUCCESS) - || !BnPointTo2B(&p2, Px, E)) - ERROR_RETURN(TPM_RC_NO_RESULT); + || (TpmEcc_PointMult(Px, PB, D, NULL, NULL, E) != TPM_RC_SUCCESS) + || !TpmEcc_PointTo2B(&p2, Px, E)) + ERROR_EXIT(TPM_RC_NO_RESULT); //Compute the C3 value hash(x2 || M || y2) if(0 == CryptHashStart(&hashState, scheme->details.mgf1.hashAlg)) - ERROR_RETURN(TPM_RC_HASH); + ERROR_EXIT(TPM_RC_HASH); CryptDigestUpdate2B(&hashState, &p2.x.b); CryptDigestUpdate2B(&hashState, &plainText->b); CryptDigestUpdate2B(&hashState, &p2.y.b); @@ -140,7 +108,7 @@ LIB_EXPORT TPM_RC CryptEccEncrypt( for(i = 0; i < plainText->t.size; i++) c2->t.buffer[i] ^= plainText->t.buffer[i]; Exit: - CURVE_FREE(E); + CRYPT_CURVE_FREE(E); return retVal; } @@ -162,9 +130,9 @@ LIB_EXPORT TPM_RC CryptEccDecrypt( // and plainText ) { - CURVE_INITIALIZED(E, key->publicArea.parameters.eccDetail.curveID); - ECC_INITIALIZED(D, &key->sensitive.sensitive.ecc.b); - POINT_INITIALIZED(C1, c1); + CRYPT_CURVE_INITIALIZED(E, key->publicArea.parameters.eccDetail.curveID); + CRYPT_ECC_INITIALIZED(D, &key->sensitive.sensitive.ecc.b); + CRYPT_POINT_INITIALIZED(C1, c1); TPMS_ECC_POINT p2; TPM2B_TYPE(2ECC, MAX_ECC_KEY_BYTES * 2); TPM2B_DIGEST check; @@ -174,16 +142,16 @@ LIB_EXPORT TPM_RC CryptEccDecrypt( TPM_RC retVal = TPM_RC_SUCCESS; // if(E == NULL) - ERROR_RETURN(TPM_RC_CURVE); + ERROR_EXIT(TPM_RC_CURVE); if(TPM_ALG_KDF2 != scheme->scheme) - ERROR_RETURN(TPM_RC_SCHEME); + ERROR_EXIT(TPM_RC_SCHEME); // Generate the Z value - BnPointMult(C1, C1, D, NULL, NULL, E); - BnPointTo2B(&p2, C1, E); + TpmEcc_PointMult(C1, C1, D, NULL, NULL, E); + TpmEcc_PointTo2B(&p2, C1, E); // Start the hash to check the algorithm if(0 == CryptHashStart(&hashState, scheme->details.mgf1.hashAlg)) - ERROR_RETURN(TPM_RC_HASH); + ERROR_EXIT(TPM_RC_HASH); CryptDigestUpdate2B(&hashState, &p2.x.b); MemoryCopy2B(&z.b, &p2.x.b, sizeof(z.t.buffer)); @@ -205,9 +173,9 @@ LIB_EXPORT TPM_RC CryptEccDecrypt( CryptDigestUpdate2B(&hashState, &p2.y.b); check.t.size = CryptHashEnd(&hashState, sizeof(check.t.buffer), check.t.buffer); if(!MemoryEqual2B(&check.b, &c3->b)) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); Exit: - CURVE_FREE(E); + CRYPT_CURVE_FREE(E); return retVal; } diff --git a/TPMCmd/tpm/src/crypt/CryptEccData.c b/TPMCmd/tpm/src/crypt/CryptEccData.c index 3646f6f5..dd212fc0 100644 --- a/TPMCmd/tpm/src/crypt/CryptEccData.c +++ b/TPMCmd/tpm/src/crypt/CryptEccData.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ /*(Auto-generated) * Created by TpmStructures; Version 4.4 Mar 26, 2019 * Date: Aug 30, 2019 Time: 02:11:52PM @@ -40,619 +6,22 @@ #include "Tpm.h" #include "OIDs.h" -// This file contains the ECC curve data. The format of the data depends on the -// setting of USE_BN_ECC_DATA. If it is defined, then the TPM's BigNum format is -// used. Otherwise, it is kept in TPM2B format. The purpose of having the data in -// BigNum format is so that it does not have to be reformatted before being used -// by the crypto library. - #if ALG_ECC -# if USE_BN_ECC_DATA -# define TO_ECC_64 TO_CRYPT_WORD_64 -# define TO_ECC_56(a, b, c, d, e, f, g) TO_ECC_64(0, a, b, c, d, e, f, g) -# define TO_ECC_48(a, b, c, d, e, f) TO_ECC_64(0, 0, a, b, c, d, e, f) -# define TO_ECC_40(a, b, c, d, e) TO_ECC_64(0, 0, 0, a, b, c, d, e) -# if RADIX_BITS > 32 -# define TO_ECC_32(a, b, c, d) TO_ECC_64(0, 0, 0, 0, a, b, c, d) -# define TO_ECC_24(a, b, c) TO_ECC_64(0, 0, 0, 0, 0, a, b, c) -# define TO_ECC_16(a, b) TO_ECC_64(0, 0, 0, 0, 0, 0, a, b) -# define TO_ECC_8(a) TO_ECC_64(0, 0, 0, 0, 0, 0, 0, a) -# else // RADIX_BITS == 32 -# define TO_ECC_32 BIG_ENDIAN_BYTES_TO_UINT32 -# define TO_ECC_24(a, b, c) TO_ECC_32(0, a, b, c) -# define TO_ECC_16(a, b) TO_ECC_32(0, 0, a, b) -# define TO_ECC_8(a) TO_ECC_32(0, 0, 0, a) -# endif -# else // TPM2B_ -# define TO_ECC_64(a, b, c, d, e, f, g, h) a, b, c, d, e, f, g, h -# define TO_ECC_56(a, b, c, d, e, f, g) a, b, c, d, e, f, g -# define TO_ECC_48(a, b, c, d, e, f) a, b, c, d, e, f -# define TO_ECC_40(a, b, c, d, e) a, b, c, d, e -# define TO_ECC_32(a, b, c, d) a, b, c, d -# define TO_ECC_24(a, b, c) a, b, c -# define TO_ECC_16(a, b) a, b -# define TO_ECC_8(a) a -# endif - -# if USE_BN_ECC_DATA -# define BN_MIN_ALLOC(bytes) \ - (BYTES_TO_CRYPT_WORDS(bytes) == 0) ? 1 : BYTES_TO_CRYPT_WORDS(bytes) -# define ECC_CONST(NAME, bytes, initializer) \ - const struct \ - { \ - crypt_uword_t allocate, size, d[BN_MIN_ALLOC(bytes)]; \ - } NAME = {BN_MIN_ALLOC(bytes), BYTES_TO_CRYPT_WORDS(bytes), {initializer}} - -ECC_CONST(ECC_ZERO, 0, 0); - -# else -# define ECC_CONST(NAME, bytes, initializer) \ - const TPM2B_##bytes##_BYTE_VALUE NAME = {bytes, {initializer}} - -// Have to special case ECC_ZERO -TPM2B_BYTE_VALUE(1); -TPM2B_1_BYTE_VALUE ECC_ZERO = {1, {0}}; - -# endif - -ECC_CONST(ECC_ONE, 1, 1); - -# if !USE_BN_ECC_DATA -TPM2B_BYTE_VALUE(24); -# define TO_ECC_192(a, b, c) a, b, c -TPM2B_BYTE_VALUE(28); -# define TO_ECC_224(a, b, c, d) a, b, c, d -TPM2B_BYTE_VALUE(32); -# define TO_ECC_256(a, b, c, d) a, b, c, d -TPM2B_BYTE_VALUE(48); -# define TO_ECC_384(a, b, c, d, e, f) a, b, c, d, e, f -TPM2B_BYTE_VALUE(66); -# define TO_ECC_528(a, b, c, d, e, f, g, h, i) a, b, c, d, e, f, g, h, i -TPM2B_BYTE_VALUE(80); -# define TO_ECC_640(a, b, c, d, e, f, g, h, i, j) a, b, c, d, e, f, g, h, i, j -# else -# define TO_ECC_192(a, b, c) c, b, a -# define TO_ECC_224(a, b, c, d) d, c, b, a -# define TO_ECC_256(a, b, c, d) d, c, b, a -# define TO_ECC_384(a, b, c, d, e, f) f, e, d, c, b, a -# define TO_ECC_528(a, b, c, d, e, f, g, h, i) i, h, g, f, e, d, c, b, a -# define TO_ECC_640(a, b, c, d, e, f, g, h, i, j) j, i, h, g, f, e, d, c, b, a -# endif // !USE_BN_ECC_DATA - -# if ECC_NIST_P192 -ECC_CONST(NIST_P192_p, - 24, - TO_ECC_192(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF))); -ECC_CONST(NIST_P192_a, - 24, - TO_ECC_192(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC))); -ECC_CONST(NIST_P192_b, - 24, - TO_ECC_192(TO_ECC_64(0x64, 0x21, 0x05, 0x19, 0xE5, 0x9C, 0x80, 0xE7), - TO_ECC_64(0x0F, 0xA7, 0xE9, 0xAB, 0x72, 0x24, 0x30, 0x49), - TO_ECC_64(0xFE, 0xB8, 0xDE, 0xEC, 0xC1, 0x46, 0xB9, 0xB1))); -ECC_CONST(NIST_P192_gX, - 24, - TO_ECC_192(TO_ECC_64(0x18, 0x8D, 0xA8, 0x0E, 0xB0, 0x30, 0x90, 0xF6), - TO_ECC_64(0x7C, 0xBF, 0x20, 0xEB, 0x43, 0xA1, 0x88, 0x00), - TO_ECC_64(0xF4, 0xFF, 0x0A, 0xFD, 0x82, 0xFF, 0x10, 0x12))); -ECC_CONST(NIST_P192_gY, - 24, - TO_ECC_192(TO_ECC_64(0x07, 0x19, 0x2B, 0x95, 0xFF, 0xC8, 0xDA, 0x78), - TO_ECC_64(0x63, 0x10, 0x11, 0xED, 0x6B, 0x24, 0xCD, 0xD5), - TO_ECC_64(0x73, 0xF9, 0x77, 0xA1, 0x1E, 0x79, 0x48, 0x11))); -ECC_CONST(NIST_P192_n, - 24, - TO_ECC_192(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x99, 0xDE, 0xF8, 0x36), - TO_ECC_64(0x14, 0x6B, 0xC9, 0xB1, 0xB4, 0xD2, 0x28, 0x31))); -# define NIST_P192_h ECC_ONE -# define NIST_P192_gZ ECC_ONE - -# if USE_BN_ECC_DATA -const ECC_CURVE_DATA NIST_P192 = {(bigNum)&NIST_P192_p, - (bigNum)&NIST_P192_n, - (bigNum)&NIST_P192_h, - (bigNum)&NIST_P192_a, - (bigNum)&NIST_P192_b, - {(bigNum)&NIST_P192_gX, - (bigNum)&NIST_P192_gY, - (bigNum)&NIST_P192_gZ}}; - -# else -const ECC_CURVE_DATA NIST_P192 = {&NIST_P192_p.b, - &NIST_P192_n.b, - &NIST_P192_h.b, - &NIST_P192_a.b, - &NIST_P192_b.b, - {&NIST_P192_gX.b, - &NIST_P192_gY.b, - &NIST_P192_gZ.b}}; - -# endif // USE_BN_ECC_DATA - -# endif // ECC_NIST_P192 - -# if ECC_NIST_P224 -ECC_CONST(NIST_P224_p, - 28, - TO_ECC_224(TO_ECC_32(0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), - TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01))); -ECC_CONST(NIST_P224_a, - 28, - TO_ECC_224(TO_ECC_32(0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE))); -ECC_CONST(NIST_P224_b, - 28, - TO_ECC_224(TO_ECC_32(0xB4, 0x05, 0x0A, 0x85), - TO_ECC_64(0x0C, 0x04, 0xB3, 0xAB, 0xF5, 0x41, 0x32, 0x56), - TO_ECC_64(0x50, 0x44, 0xB0, 0xB7, 0xD7, 0xBF, 0xD8, 0xBA), - TO_ECC_64(0x27, 0x0B, 0x39, 0x43, 0x23, 0x55, 0xFF, 0xB4))); -ECC_CONST(NIST_P224_gX, - 28, - TO_ECC_224(TO_ECC_32(0xB7, 0x0E, 0x0C, 0xBD), - TO_ECC_64(0x6B, 0xB4, 0xBF, 0x7F, 0x32, 0x13, 0x90, 0xB9), - TO_ECC_64(0x4A, 0x03, 0xC1, 0xD3, 0x56, 0xC2, 0x11, 0x22), - TO_ECC_64(0x34, 0x32, 0x80, 0xD6, 0x11, 0x5C, 0x1D, 0x21))); -ECC_CONST(NIST_P224_gY, - 28, - TO_ECC_224(TO_ECC_32(0xBD, 0x37, 0x63, 0x88), - TO_ECC_64(0xB5, 0xF7, 0x23, 0xFB, 0x4C, 0x22, 0xDF, 0xE6), - TO_ECC_64(0xCD, 0x43, 0x75, 0xA0, 0x5A, 0x07, 0x47, 0x64), - TO_ECC_64(0x44, 0xD5, 0x81, 0x99, 0x85, 0x00, 0x7E, 0x34))); -ECC_CONST(NIST_P224_n, - 28, - TO_ECC_224(TO_ECC_32(0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0x16, 0xA2, 0xE0, 0xB8, 0xF0, 0x3E), - TO_ECC_64(0x13, 0xDD, 0x29, 0x45, 0x5C, 0x5C, 0x2A, 0x3D))); -# define NIST_P224_h ECC_ONE -# define NIST_P224_gZ ECC_ONE - -# if USE_BN_ECC_DATA -const ECC_CURVE_DATA NIST_P224 = {(bigNum)&NIST_P224_p, - (bigNum)&NIST_P224_n, - (bigNum)&NIST_P224_h, - (bigNum)&NIST_P224_a, - (bigNum)&NIST_P224_b, - {(bigNum)&NIST_P224_gX, - (bigNum)&NIST_P224_gY, - (bigNum)&NIST_P224_gZ}}; - -# else -const ECC_CURVE_DATA NIST_P224 = {&NIST_P224_p.b, - &NIST_P224_n.b, - &NIST_P224_h.b, - &NIST_P224_a.b, - &NIST_P224_b.b, - {&NIST_P224_gX.b, - &NIST_P224_gY.b, - &NIST_P224_gZ.b}}; - -# endif // USE_BN_ECC_DATA - -# endif // ECC_NIST_P224 - -# if ECC_NIST_P256 -ECC_CONST(NIST_P256_p, - 32, - TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x01), - TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), - TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF))); -ECC_CONST(NIST_P256_a, - 32, - TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x01), - TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), - TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC))); -ECC_CONST(NIST_P256_b, - 32, - TO_ECC_256(TO_ECC_64(0x5A, 0xC6, 0x35, 0xD8, 0xAA, 0x3A, 0x93, 0xE7), - TO_ECC_64(0xB3, 0xEB, 0xBD, 0x55, 0x76, 0x98, 0x86, 0xBC), - TO_ECC_64(0x65, 0x1D, 0x06, 0xB0, 0xCC, 0x53, 0xB0, 0xF6), - TO_ECC_64(0x3B, 0xCE, 0x3C, 0x3E, 0x27, 0xD2, 0x60, 0x4B))); -ECC_CONST(NIST_P256_gX, - 32, - TO_ECC_256(TO_ECC_64(0x6B, 0x17, 0xD1, 0xF2, 0xE1, 0x2C, 0x42, 0x47), - TO_ECC_64(0xF8, 0xBC, 0xE6, 0xE5, 0x63, 0xA4, 0x40, 0xF2), - TO_ECC_64(0x77, 0x03, 0x7D, 0x81, 0x2D, 0xEB, 0x33, 0xA0), - TO_ECC_64(0xF4, 0xA1, 0x39, 0x45, 0xD8, 0x98, 0xC2, 0x96))); -ECC_CONST(NIST_P256_gY, - 32, - TO_ECC_256(TO_ECC_64(0x4F, 0xE3, 0x42, 0xE2, 0xFE, 0x1A, 0x7F, 0x9B), - TO_ECC_64(0x8E, 0xE7, 0xEB, 0x4A, 0x7C, 0x0F, 0x9E, 0x16), - TO_ECC_64(0x2B, 0xCE, 0x33, 0x57, 0x6B, 0x31, 0x5E, 0xCE), - TO_ECC_64(0xCB, 0xB6, 0x40, 0x68, 0x37, 0xBF, 0x51, 0xF5))); -ECC_CONST(NIST_P256_n, - 32, - TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xBC, 0xE6, 0xFA, 0xAD, 0xA7, 0x17, 0x9E, 0x84), - TO_ECC_64(0xF3, 0xB9, 0xCA, 0xC2, 0xFC, 0x63, 0x25, 0x51))); -# define NIST_P256_h ECC_ONE -# define NIST_P256_gZ ECC_ONE - -# if USE_BN_ECC_DATA -const ECC_CURVE_DATA NIST_P256 = {(bigNum)&NIST_P256_p, - (bigNum)&NIST_P256_n, - (bigNum)&NIST_P256_h, - (bigNum)&NIST_P256_a, - (bigNum)&NIST_P256_b, - {(bigNum)&NIST_P256_gX, - (bigNum)&NIST_P256_gY, - (bigNum)&NIST_P256_gZ}}; - -# else -const ECC_CURVE_DATA NIST_P256 = {&NIST_P256_p.b, - &NIST_P256_n.b, - &NIST_P256_h.b, - &NIST_P256_a.b, - &NIST_P256_b.b, - {&NIST_P256_gX.b, - &NIST_P256_gY.b, - &NIST_P256_gZ.b}}; - -# endif // USE_BN_ECC_DATA - -# endif // ECC_NIST_P256 - -# if ECC_NIST_P384 -ECC_CONST(NIST_P384_p, - 48, - TO_ECC_384(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), - TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF))); -ECC_CONST(NIST_P384_a, - 48, - TO_ECC_384(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), - TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFC))); -ECC_CONST(NIST_P384_b, - 48, - TO_ECC_384(TO_ECC_64(0xB3, 0x31, 0x2F, 0xA7, 0xE2, 0x3E, 0xE7, 0xE4), - TO_ECC_64(0x98, 0x8E, 0x05, 0x6B, 0xE3, 0xF8, 0x2D, 0x19), - TO_ECC_64(0x18, 0x1D, 0x9C, 0x6E, 0xFE, 0x81, 0x41, 0x12), - TO_ECC_64(0x03, 0x14, 0x08, 0x8F, 0x50, 0x13, 0x87, 0x5A), - TO_ECC_64(0xC6, 0x56, 0x39, 0x8D, 0x8A, 0x2E, 0xD1, 0x9D), - TO_ECC_64(0x2A, 0x85, 0xC8, 0xED, 0xD3, 0xEC, 0x2A, 0xEF))); -ECC_CONST(NIST_P384_gX, - 48, - TO_ECC_384(TO_ECC_64(0xAA, 0x87, 0xCA, 0x22, 0xBE, 0x8B, 0x05, 0x37), - TO_ECC_64(0x8E, 0xB1, 0xC7, 0x1E, 0xF3, 0x20, 0xAD, 0x74), - TO_ECC_64(0x6E, 0x1D, 0x3B, 0x62, 0x8B, 0xA7, 0x9B, 0x98), - TO_ECC_64(0x59, 0xF7, 0x41, 0xE0, 0x82, 0x54, 0x2A, 0x38), - TO_ECC_64(0x55, 0x02, 0xF2, 0x5D, 0xBF, 0x55, 0x29, 0x6C), - TO_ECC_64(0x3A, 0x54, 0x5E, 0x38, 0x72, 0x76, 0x0A, 0xB7))); -ECC_CONST(NIST_P384_gY, - 48, - TO_ECC_384(TO_ECC_64(0x36, 0x17, 0xDE, 0x4A, 0x96, 0x26, 0x2C, 0x6F), - TO_ECC_64(0x5D, 0x9E, 0x98, 0xBF, 0x92, 0x92, 0xDC, 0x29), - TO_ECC_64(0xF8, 0xF4, 0x1D, 0xBD, 0x28, 0x9A, 0x14, 0x7C), - TO_ECC_64(0xE9, 0xDA, 0x31, 0x13, 0xB5, 0xF0, 0xB8, 0xC0), - TO_ECC_64(0x0A, 0x60, 0xB1, 0xCE, 0x1D, 0x7E, 0x81, 0x9D), - TO_ECC_64(0x7A, 0x43, 0x1D, 0x7C, 0x90, 0xEA, 0x0E, 0x5F))); -ECC_CONST(NIST_P384_n, - 48, - TO_ECC_384(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xC7, 0x63, 0x4D, 0x81, 0xF4, 0x37, 0x2D, 0xDF), - TO_ECC_64(0x58, 0x1A, 0x0D, 0xB2, 0x48, 0xB0, 0xA7, 0x7A), - TO_ECC_64(0xEC, 0xEC, 0x19, 0x6A, 0xCC, 0xC5, 0x29, 0x73))); -# define NIST_P384_h ECC_ONE -# define NIST_P384_gZ ECC_ONE - -# if USE_BN_ECC_DATA -const ECC_CURVE_DATA NIST_P384 = {(bigNum)&NIST_P384_p, - (bigNum)&NIST_P384_n, - (bigNum)&NIST_P384_h, - (bigNum)&NIST_P384_a, - (bigNum)&NIST_P384_b, - {(bigNum)&NIST_P384_gX, - (bigNum)&NIST_P384_gY, - (bigNum)&NIST_P384_gZ}}; - -# else -const ECC_CURVE_DATA NIST_P384 = {&NIST_P384_p.b, - &NIST_P384_n.b, - &NIST_P384_h.b, - &NIST_P384_a.b, - &NIST_P384_b.b, - {&NIST_P384_gX.b, - &NIST_P384_gY.b, - &NIST_P384_gZ.b}}; - -# endif // USE_BN_ECC_DATA - -# endif // ECC_NIST_P384 - -# if ECC_NIST_P521 -ECC_CONST(NIST_P521_p, - 66, - TO_ECC_528(TO_ECC_16(0x01, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF))); -ECC_CONST(NIST_P521_a, - 66, - TO_ECC_528(TO_ECC_16(0x01, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC))); -ECC_CONST(NIST_P521_b, - 66, - TO_ECC_528(TO_ECC_16(0x00, 0x51), - TO_ECC_64(0x95, 0x3E, 0xB9, 0x61, 0x8E, 0x1C, 0x9A, 0x1F), - TO_ECC_64(0x92, 0x9A, 0x21, 0xA0, 0xB6, 0x85, 0x40, 0xEE), - TO_ECC_64(0xA2, 0xDA, 0x72, 0x5B, 0x99, 0xB3, 0x15, 0xF3), - TO_ECC_64(0xB8, 0xB4, 0x89, 0x91, 0x8E, 0xF1, 0x09, 0xE1), - TO_ECC_64(0x56, 0x19, 0x39, 0x51, 0xEC, 0x7E, 0x93, 0x7B), - TO_ECC_64(0x16, 0x52, 0xC0, 0xBD, 0x3B, 0xB1, 0xBF, 0x07), - TO_ECC_64(0x35, 0x73, 0xDF, 0x88, 0x3D, 0x2C, 0x34, 0xF1), - TO_ECC_64(0xEF, 0x45, 0x1F, 0xD4, 0x6B, 0x50, 0x3F, 0x00))); -ECC_CONST(NIST_P521_gX, - 66, - TO_ECC_528(TO_ECC_16(0x00, 0xC6), - TO_ECC_64(0x85, 0x8E, 0x06, 0xB7, 0x04, 0x04, 0xE9, 0xCD), - TO_ECC_64(0x9E, 0x3E, 0xCB, 0x66, 0x23, 0x95, 0xB4, 0x42), - TO_ECC_64(0x9C, 0x64, 0x81, 0x39, 0x05, 0x3F, 0xB5, 0x21), - TO_ECC_64(0xF8, 0x28, 0xAF, 0x60, 0x6B, 0x4D, 0x3D, 0xBA), - TO_ECC_64(0xA1, 0x4B, 0x5E, 0x77, 0xEF, 0xE7, 0x59, 0x28), - TO_ECC_64(0xFE, 0x1D, 0xC1, 0x27, 0xA2, 0xFF, 0xA8, 0xDE), - TO_ECC_64(0x33, 0x48, 0xB3, 0xC1, 0x85, 0x6A, 0x42, 0x9B), - TO_ECC_64(0xF9, 0x7E, 0x7E, 0x31, 0xC2, 0xE5, 0xBD, 0x66))); -ECC_CONST(NIST_P521_gY, - 66, - TO_ECC_528(TO_ECC_16(0x01, 0x18), - TO_ECC_64(0x39, 0x29, 0x6A, 0x78, 0x9A, 0x3B, 0xC0, 0x04), - TO_ECC_64(0x5C, 0x8A, 0x5F, 0xB4, 0x2C, 0x7D, 0x1B, 0xD9), - TO_ECC_64(0x98, 0xF5, 0x44, 0x49, 0x57, 0x9B, 0x44, 0x68), - TO_ECC_64(0x17, 0xAF, 0xBD, 0x17, 0x27, 0x3E, 0x66, 0x2C), - TO_ECC_64(0x97, 0xEE, 0x72, 0x99, 0x5E, 0xF4, 0x26, 0x40), - TO_ECC_64(0xC5, 0x50, 0xB9, 0x01, 0x3F, 0xAD, 0x07, 0x61), - TO_ECC_64(0x35, 0x3C, 0x70, 0x86, 0xA2, 0x72, 0xC2, 0x40), - TO_ECC_64(0x88, 0xBE, 0x94, 0x76, 0x9F, 0xD1, 0x66, 0x50))); -ECC_CONST(NIST_P521_n, - 66, - TO_ECC_528(TO_ECC_16(0x01, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFA), - TO_ECC_64(0x51, 0x86, 0x87, 0x83, 0xBF, 0x2F, 0x96, 0x6B), - TO_ECC_64(0x7F, 0xCC, 0x01, 0x48, 0xF7, 0x09, 0xA5, 0xD0), - TO_ECC_64(0x3B, 0xB5, 0xC9, 0xB8, 0x89, 0x9C, 0x47, 0xAE), - TO_ECC_64(0xBB, 0x6F, 0xB7, 0x1E, 0x91, 0x38, 0x64, 0x09))); -# define NIST_P521_h ECC_ONE -# define NIST_P521_gZ ECC_ONE - -# if USE_BN_ECC_DATA -const ECC_CURVE_DATA NIST_P521 = {(bigNum)&NIST_P521_p, - (bigNum)&NIST_P521_n, - (bigNum)&NIST_P521_h, - (bigNum)&NIST_P521_a, - (bigNum)&NIST_P521_b, - {(bigNum)&NIST_P521_gX, - (bigNum)&NIST_P521_gY, - (bigNum)&NIST_P521_gZ}}; - -# else -const ECC_CURVE_DATA NIST_P521 = {&NIST_P521_p.b, - &NIST_P521_n.b, - &NIST_P521_h.b, - &NIST_P521_a.b, - &NIST_P521_b.b, - {&NIST_P521_gX.b, - &NIST_P521_gY.b, - &NIST_P521_gZ.b}}; - -# endif // USE_BN_ECC_DATA - -# endif // ECC_NIST_P521 - -# if ECC_BN_P256 -ECC_CONST(BN_P256_p, - 32, - TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xF0, 0xCD), - TO_ECC_64(0x46, 0xE5, 0xF2, 0x5E, 0xEE, 0x71, 0xA4, 0x9F), - TO_ECC_64(0x0C, 0xDC, 0x65, 0xFB, 0x12, 0x98, 0x0A, 0x82), - TO_ECC_64(0xD3, 0x29, 0x2D, 0xDB, 0xAE, 0xD3, 0x30, 0x13))); -# define BN_P256_a ECC_ZERO -ECC_CONST(BN_P256_b, 1, TO_ECC_8(3)); -# define BN_P256_gX ECC_ONE -ECC_CONST(BN_P256_gY, 1, TO_ECC_8(2)); -ECC_CONST(BN_P256_n, - 32, - TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xF0, 0xCD), - TO_ECC_64(0x46, 0xE5, 0xF2, 0x5E, 0xEE, 0x71, 0xA4, 0x9E), - TO_ECC_64(0x0C, 0xDC, 0x65, 0xFB, 0x12, 0x99, 0x92, 0x1A), - TO_ECC_64(0xF6, 0x2D, 0x53, 0x6C, 0xD1, 0x0B, 0x50, 0x0D))); -# define BN_P256_h ECC_ONE -# define BN_P256_gZ ECC_ONE - -# if USE_BN_ECC_DATA -const ECC_CURVE_DATA BN_P256 = {(bigNum)&BN_P256_p, - (bigNum)&BN_P256_n, - (bigNum)&BN_P256_h, - (bigNum)&BN_P256_a, - (bigNum)&BN_P256_b, - {(bigNum)&BN_P256_gX, - (bigNum)&BN_P256_gY, - (bigNum)&BN_P256_gZ}}; - -# else -const ECC_CURVE_DATA BN_P256 = {&BN_P256_p.b, - &BN_P256_n.b, - &BN_P256_h.b, - &BN_P256_a.b, - &BN_P256_b.b, - {&BN_P256_gX.b, &BN_P256_gY.b, &BN_P256_gZ.b}}; - -# endif // USE_BN_ECC_DATA - -# endif // ECC_BN_P256 - -# if ECC_BN_P638 -ECC_CONST(BN_P638_p, - 80, - TO_ECC_640(TO_ECC_64(0x23, 0xFF, 0xFF, 0xFD, 0xC0, 0x00, 0x00, 0x0D), - TO_ECC_64(0x7F, 0xFF, 0xFF, 0xB8, 0x00, 0x00, 0x01, 0xD3), - TO_ECC_64(0xFF, 0xFF, 0xF9, 0x42, 0xD0, 0x00, 0x16, 0x5E), - TO_ECC_64(0x3F, 0xFF, 0x94, 0x87, 0x00, 0x00, 0xD5, 0x2F), - TO_ECC_64(0xFF, 0xFD, 0xD0, 0xE0, 0x00, 0x08, 0xDE, 0x55), - TO_ECC_64(0xC0, 0x00, 0x86, 0x52, 0x00, 0x21, 0xE5, 0x5B), - TO_ECC_64(0xFF, 0xFF, 0xF5, 0x1F, 0xFF, 0xF4, 0xEB, 0x80), - TO_ECC_64(0x00, 0x00, 0x00, 0x4C, 0x80, 0x01, 0x5A, 0xCD), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xE0), - TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x67))); -# define BN_P638_a ECC_ZERO -ECC_CONST(BN_P638_b, 2, TO_ECC_16(0x01, 0x01)); -ECC_CONST(BN_P638_gX, - 80, - TO_ECC_640(TO_ECC_64(0x23, 0xFF, 0xFF, 0xFD, 0xC0, 0x00, 0x00, 0x0D), - TO_ECC_64(0x7F, 0xFF, 0xFF, 0xB8, 0x00, 0x00, 0x01, 0xD3), - TO_ECC_64(0xFF, 0xFF, 0xF9, 0x42, 0xD0, 0x00, 0x16, 0x5E), - TO_ECC_64(0x3F, 0xFF, 0x94, 0x87, 0x00, 0x00, 0xD5, 0x2F), - TO_ECC_64(0xFF, 0xFD, 0xD0, 0xE0, 0x00, 0x08, 0xDE, 0x55), - TO_ECC_64(0xC0, 0x00, 0x86, 0x52, 0x00, 0x21, 0xE5, 0x5B), - TO_ECC_64(0xFF, 0xFF, 0xF5, 0x1F, 0xFF, 0xF4, 0xEB, 0x80), - TO_ECC_64(0x00, 0x00, 0x00, 0x4C, 0x80, 0x01, 0x5A, 0xCD), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xE0), - TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66))); -ECC_CONST(BN_P638_gY, 1, TO_ECC_8(0x10)); -ECC_CONST(BN_P638_n, - 80, - TO_ECC_640(TO_ECC_64(0x23, 0xFF, 0xFF, 0xFD, 0xC0, 0x00, 0x00, 0x0D), - TO_ECC_64(0x7F, 0xFF, 0xFF, 0xB8, 0x00, 0x00, 0x01, 0xD3), - TO_ECC_64(0xFF, 0xFF, 0xF9, 0x42, 0xD0, 0x00, 0x16, 0x5E), - TO_ECC_64(0x3F, 0xFF, 0x94, 0x87, 0x00, 0x00, 0xD5, 0x2F), - TO_ECC_64(0xFF, 0xFD, 0xD0, 0xE0, 0x00, 0x08, 0xDE, 0x55), - TO_ECC_64(0x60, 0x00, 0x86, 0x55, 0x00, 0x21, 0xE5, 0x55), - TO_ECC_64(0xFF, 0xFF, 0xF5, 0x4F, 0xFF, 0xF4, 0xEA, 0xC0), - TO_ECC_64(0x00, 0x00, 0x00, 0x49, 0x80, 0x01, 0x54, 0xD9), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xED, 0xA0), - TO_ECC_64(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x61))); -# define BN_P638_h ECC_ONE -# define BN_P638_gZ ECC_ONE - -# if USE_BN_ECC_DATA -const ECC_CURVE_DATA BN_P638 = {(bigNum)&BN_P638_p, - (bigNum)&BN_P638_n, - (bigNum)&BN_P638_h, - (bigNum)&BN_P638_a, - (bigNum)&BN_P638_b, - {(bigNum)&BN_P638_gX, - (bigNum)&BN_P638_gY, - (bigNum)&BN_P638_gZ}}; - -# else -const ECC_CURVE_DATA BN_P638 = {&BN_P638_p.b, - &BN_P638_n.b, - &BN_P638_h.b, - &BN_P638_a.b, - &BN_P638_b.b, - {&BN_P638_gX.b, &BN_P638_gY.b, &BN_P638_gZ.b}}; - -# endif // USE_BN_ECC_DATA - -# endif // ECC_BN_P638 - -# if ECC_SM2_P256 -ECC_CONST(SM2_P256_p, - 32, - TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF))); -ECC_CONST(SM2_P256_a, - 32, - TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC))); -ECC_CONST(SM2_P256_b, - 32, - TO_ECC_256(TO_ECC_64(0x28, 0xE9, 0xFA, 0x9E, 0x9D, 0x9F, 0x5E, 0x34), - TO_ECC_64(0x4D, 0x5A, 0x9E, 0x4B, 0xCF, 0x65, 0x09, 0xA7), - TO_ECC_64(0xF3, 0x97, 0x89, 0xF5, 0x15, 0xAB, 0x8F, 0x92), - TO_ECC_64(0xDD, 0xBC, 0xBD, 0x41, 0x4D, 0x94, 0x0E, 0x93))); -ECC_CONST(SM2_P256_gX, - 32, - TO_ECC_256(TO_ECC_64(0x32, 0xC4, 0xAE, 0x2C, 0x1F, 0x19, 0x81, 0x19), - TO_ECC_64(0x5F, 0x99, 0x04, 0x46, 0x6A, 0x39, 0xC9, 0x94), - TO_ECC_64(0x8F, 0xE3, 0x0B, 0xBF, 0xF2, 0x66, 0x0B, 0xE1), - TO_ECC_64(0x71, 0x5A, 0x45, 0x89, 0x33, 0x4C, 0x74, 0xC7))); -ECC_CONST(SM2_P256_gY, - 32, - TO_ECC_256(TO_ECC_64(0xBC, 0x37, 0x36, 0xA2, 0xF4, 0xF6, 0x77, 0x9C), - TO_ECC_64(0x59, 0xBD, 0xCE, 0xE3, 0x6B, 0x69, 0x21, 0x53), - TO_ECC_64(0xD0, 0xA9, 0x87, 0x7C, 0xC6, 0x2A, 0x47, 0x40), - TO_ECC_64(0x02, 0xDF, 0x32, 0xE5, 0x21, 0x39, 0xF0, 0xA0))); -ECC_CONST(SM2_P256_n, - 32, - TO_ECC_256(TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF), - TO_ECC_64(0x72, 0x03, 0xDF, 0x6B, 0x21, 0xC6, 0x05, 0x2B), - TO_ECC_64(0x53, 0xBB, 0xF4, 0x09, 0x39, 0xD5, 0x41, 0x23))); -# define SM2_P256_h ECC_ONE -# define SM2_P256_gZ ECC_ONE - -# if USE_BN_ECC_DATA -const ECC_CURVE_DATA SM2_P256 = {(bigNum)&SM2_P256_p, - (bigNum)&SM2_P256_n, - (bigNum)&SM2_P256_h, - (bigNum)&SM2_P256_a, - (bigNum)&SM2_P256_b, - {(bigNum)&SM2_P256_gX, - (bigNum)&SM2_P256_gY, - (bigNum)&SM2_P256_gZ}}; - -# else -const ECC_CURVE_DATA SM2_P256 = {&SM2_P256_p.b, - &SM2_P256_n.b, - &SM2_P256_h.b, - &SM2_P256_a.b, - &SM2_P256_b.b, - {&SM2_P256_gX.b, &SM2_P256_gY.b, &SM2_P256_gZ.b}}; - -# endif // USE_BN_ECC_DATA - -# endif // ECC_SM2_P256 +// This file contains the TPM Specific ECC curve metadata and pointers to the ecc-lib specific +// constant structure. +// The CURVE_NAME macro is used to remove the name string from normal builds, but leaves the +// string available in the initialization lists for potenial use during debugging by changing this +// macro (and the structure declaration) +# define CURVE_NAME(N) # define comma -const ECC_CURVE eccCurves[] = { +const TPM_ECC_CURVE_METADATA eccCurves[] = { # if ECC_NIST_P192 comma{TPM_ECC_NIST_P192, 192, {TPM_ALG_KDF1_SP800_56A, {{TPM_ALG_SHA256}}}, {TPM_ALG_NULL, {{TPM_ALG_NULL}}}, - &NIST_P192, OID_ECC_NIST_P192 CURVE_NAME("NIST_P192")} # undef comma # define comma , @@ -662,7 +31,6 @@ const ECC_CURVE eccCurves[] = { 224, {TPM_ALG_KDF1_SP800_56A, {{TPM_ALG_SHA256}}}, {TPM_ALG_NULL, {{TPM_ALG_NULL}}}, - &NIST_P224, OID_ECC_NIST_P224 CURVE_NAME("NIST_P224")} # undef comma # define comma , @@ -672,7 +40,6 @@ const ECC_CURVE eccCurves[] = { 256, {TPM_ALG_KDF1_SP800_56A, {{TPM_ALG_SHA256}}}, {TPM_ALG_NULL, {{TPM_ALG_NULL}}}, - &NIST_P256, OID_ECC_NIST_P256 CURVE_NAME("NIST_P256")} # undef comma # define comma , @@ -682,7 +49,6 @@ const ECC_CURVE eccCurves[] = { 384, {TPM_ALG_KDF1_SP800_56A, {{TPM_ALG_SHA384}}}, {TPM_ALG_NULL, {{TPM_ALG_NULL}}}, - &NIST_P384, OID_ECC_NIST_P384 CURVE_NAME("NIST_P384")} # undef comma # define comma , @@ -692,7 +58,6 @@ const ECC_CURVE eccCurves[] = { 521, {TPM_ALG_KDF1_SP800_56A, {{TPM_ALG_SHA512}}}, {TPM_ALG_NULL, {{TPM_ALG_NULL}}}, - &NIST_P521, OID_ECC_NIST_P521 CURVE_NAME("NIST_P521")} # undef comma # define comma , @@ -702,7 +67,6 @@ const ECC_CURVE eccCurves[] = { 256, {TPM_ALG_NULL, {{TPM_ALG_NULL}}}, {TPM_ALG_NULL, {{TPM_ALG_NULL}}}, - &BN_P256, OID_ECC_BN_P256 CURVE_NAME("BN_P256")} # undef comma # define comma , @@ -712,7 +76,6 @@ const ECC_CURVE eccCurves[] = { 638, {TPM_ALG_NULL, {{TPM_ALG_NULL}}}, {TPM_ALG_NULL, {{TPM_ALG_NULL}}}, - &BN_P638, OID_ECC_BN_P638 CURVE_NAME("BN_P638")} # undef comma # define comma , @@ -722,10 +85,10 @@ const ECC_CURVE eccCurves[] = { 256, {TPM_ALG_KDF1_SP800_56A, {{TPM_ALG_SM3_256}}}, {TPM_ALG_NULL, {{TPM_ALG_NULL}}}, - &SM2_P256, OID_ECC_SM2_P256 CURVE_NAME("SM2_P256")} # undef comma # define comma , # endif // ECC_SM2_P256 }; + #endif // TPM_ALG_ECC diff --git a/TPMCmd/tpm/src/crypt/CryptEccKeyExchange.c b/TPMCmd/tpm/src/crypt/CryptEccKeyExchange.c index 0db97291..d6214cd0 100644 --- a/TPMCmd/tpm/src/crypt/CryptEccKeyExchange.c +++ b/TPMCmd/tpm/src/crypt/CryptEccKeyExchange.c @@ -1,42 +1,10 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the functions that are used for the two-phase, ECC, // key-exchange protocols #include "Tpm.h" +#include "TpmMath_Util_fp.h" +#include "TpmEcc_Util_fp.h" #if CC_ZGen_2Phase == YES @@ -54,16 +22,19 @@ // 3. Calculate the associate value function // avf(Q) = xqm + 2ceil(f / 2) // Always returns TRUE(1). -static BOOL avf1(bigNum bnX, // IN/OUT: the reduced value - bigNum bnN // IN: the order of the curve +static BOOL avf1(Crypt_Int* bnX, // IN/OUT: the reduced value + Crypt_Int* bnN // IN: the order of the curve ) { // compute f = 2^(ceil(ceil(log2(n)) / 2)) - int f = (BnSizeInBits(bnN) + 1) / 2; + int f = (ExtMath_SizeInBits(bnN) + 1) / 2; // x' = 2^f + (x mod 2^f) - BnMaskBits(bnX, f); // This is mod 2*2^f but it doesn't matter because - // the next operation will SET the extra bit anyway - BnSetBit(bnX, f); + ExtMath_MaskBits(bnX, f); // This is mod 2*2^f but it doesn't matter because + // the next operation will SET the extra bit anyway + if(!ExtMath_SetBit(bnX, f)) + { + FAIL(FATAL_ERROR_CRYPTO); + } return TRUE; } @@ -87,24 +58,22 @@ static TPM_RC C_2_2_MQV(TPMS_ECC_POINT* outZ, // OUT: the computed point TPMS_ECC_POINT* QeB // IN: ephemeral public party B key ) { - CURVE_INITIALIZED(E, curveId); - const ECC_CURVE_DATA* C; - POINT(pQeA); - POINT_INITIALIZED(pQeB, QeB); - POINT_INITIALIZED(pQsB, QsB); - ECC_NUM(bnTa); - ECC_INITIALIZED(bnDeA, deA); - ECC_INITIALIZED(bnDsA, dsA); - ECC_NUM(bnN); - ECC_NUM(bnXeB); + CRYPT_CURVE_INITIALIZED(E, curveId); + CRYPT_POINT_VAR(pQeA); + CRYPT_POINT_INITIALIZED(pQeB, QeB); + CRYPT_POINT_INITIALIZED(pQsB, QsB); + CRYPT_ECC_NUM(bnTa); + CRYPT_ECC_INITIALIZED(bnDeA, deA); + CRYPT_ECC_INITIALIZED(bnDsA, dsA); + CRYPT_ECC_NUM(bnN); + CRYPT_ECC_NUM(bnXeB); TPM_RC retVal; // // Parameter checks if(E == NULL) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); pAssert( outZ != NULL && pQeB != NULL && pQsB != NULL && deA != NULL && dsA != NULL); - C = AccessCurveData(E); // Process: // 1. implicitsigA = (de,A + avf(Qe,A)ds,A ) mod n. // 2. P = h(implicitsigA)(Qe,B + avf(Qe,B)Qs,B). @@ -112,7 +81,8 @@ static TPM_RC C_2_2_MQV(TPMS_ECC_POINT* outZ, // OUT: the computed point // 4. Z=xP, where xP is the x-coordinate of P. // Compute the public ephemeral key pQeA = [de,A]G - if((retVal = BnPointMult(pQeA, CurveGetG(C), bnDeA, NULL, NULL, E)) + if((retVal = + TpmEcc_PointMult(pQeA, ExtEcc_CurveGetG(curveId), bnDeA, NULL, NULL, E)) != TPM_RC_SUCCESS) goto Exit; @@ -120,20 +90,23 @@ static TPM_RC C_2_2_MQV(TPMS_ECC_POINT* outZ, // OUT: the computed point // tA := (ds,A + de,A avf(Xe,A)) mod n (3) // Compute 'tA' = ('deA' + 'dsA' avf('XeA')) mod n // Ta = avf(XeA); - BnCopy(bnTa, pQeA->x); + ExtMath_Copy(bnTa, ExtEcc_PointX(pQeA)); avf1(bnTa, bnN); // do Ta = ds,A * Ta mod n = dsA * avf(XeA) mod n - BnModMult(bnTa, bnDsA, bnTa, bnN); + ExtMath_ModMult(bnTa, bnDsA, bnTa, bnN); // now Ta = deA + Ta mod n = deA + dsA * avf(XeA) mod n - BnAdd(bnTa, bnTa, bnDeA); - BnMod(bnTa, bnN); + ExtMath_Add(bnTa, bnTa, bnDeA); + ExtMath_Mod(bnTa, bnN); // 2. P = h(implicitsigA)(Qe,B + avf(Qe,B)Qs,B). // Put this in because almost every case of h is == 1 so skip the call when // not necessary. - if(!BnEqualWord(CurveGetCofactor(C), 1)) + if(!ExtMath_IsEqualWord(ExtEcc_CurveGetCofactor(curveId), 1)) // Cofactor is not 1 so compute Ta := Ta * h mod n - BnModMult(bnTa, bnTa, CurveGetCofactor(C), CurveGetOrder(C)); + ExtMath_ModMult(bnTa, + bnTa, + ExtEcc_CurveGetCofactor(curveId), + ExtEcc_CurveGetOrder(curveId)); // Now that 'tA' is (h * 'tA' mod n) // 'outZ' = (tA)(Qe,B + avf(Qe,B)Qs,B). @@ -142,19 +115,19 @@ static TPM_RC C_2_2_MQV(TPMS_ECC_POINT* outZ, // OUT: the computed point avf1(bnXeB, bnN); // QsB := [XeB]QsB - BnPointMult(pQsB, pQsB, bnXeB, NULL, NULL, E); - BnEccAdd(pQeB, pQeB, pQsB, E); + TpmEcc_PointMult(pQsB, pQsB, bnXeB, NULL, NULL, E); + ExtEcc_PointAdd(pQeB, pQeB, pQsB, E); // QeB := [tA]QeB = [tA](QsB + [Xe,B]QeB) and check for at infinity // If the result is not the point at infinity, return QeB - BnPointMult(pQeB, pQeB, bnTa, NULL, NULL, E); - if(BnEqualZero(pQeB->z)) - ERROR_RETURN(TPM_RC_NO_RESULT); - // Convert BIGNUM E to TPM2B E - BnPointTo2B(outZ, pQeB, E); + TpmEcc_PointMult(pQeB, pQeB, bnTa, NULL, NULL, E); + if(ExtEcc_IsInfinityPoint(pQeB)) + ERROR_EXIT(TPM_RC_NO_RESULT); + // Convert Crypt_Int* E to TPM2B E + TpmEcc_PointTo2B(outZ, pQeB, E); Exit: - CURVE_FREE(E); + CRYPT_CURVE_FREE(E); return retVal; } @@ -173,33 +146,33 @@ static TPM_RC C_2_2_ECDH(TPMS_ECC_POINT* outZs, // OUT: Zs TPMS_ECC_POINT* QeB // IN: ephemeral public party B key ) { - CURVE_INITIALIZED(E, curveId); - ECC_INITIALIZED(bnAs, dsA); - ECC_INITIALIZED(bnAe, deA); - POINT_INITIALIZED(ecBs, QsB); - POINT_INITIALIZED(ecBe, QeB); - POINT(ecZ); + CRYPT_CURVE_INITIALIZED(E, curveId); + CRYPT_ECC_INITIALIZED(bnAs, dsA); + CRYPT_ECC_INITIALIZED(bnAe, deA); + CRYPT_POINT_INITIALIZED(ecBs, QsB); + CRYPT_POINT_INITIALIZED(ecBe, QeB); + CRYPT_POINT_VAR(ecZ); TPM_RC retVal; // // Parameter checks if(E == NULL) - ERROR_RETURN(TPM_RC_CURVE); + ERROR_EXIT(TPM_RC_CURVE); pAssert( outZs != NULL && dsA != NULL && deA != NULL && QsB != NULL && QeB != NULL); // Do the point multiply for the Zs value ([dsA]QsB) - retVal = BnPointMult(ecZ, ecBs, bnAs, NULL, NULL, E); + retVal = TpmEcc_PointMult(ecZ, ecBs, bnAs, NULL, NULL, E); if(retVal == TPM_RC_SUCCESS) { // Convert the Zs value. - BnPointTo2B(outZs, ecZ, E); + TpmEcc_PointTo2B(outZs, ecZ, E); // Do the point multiply for the Ze value ([deA]QeB) - retVal = BnPointMult(ecZ, ecBe, bnAe, NULL, NULL, E); + retVal = TpmEcc_PointMult(ecZ, ecBe, bnAe, NULL, NULL, E); if(retVal == TPM_RC_SUCCESS) - BnPointTo2B(outZe, ecZ, E); + TpmEcc_PointTo2B(outZe, ecZ, E); } Exit: - CURVE_FREE(E); + CRYPT_CURVE_FREE(E); return retVal; } @@ -255,10 +228,10 @@ LIB_EXPORT TPM_RC CryptEcc2PhaseKeyExchange( //*** ComputeWForSM2() // Compute the value for w used by SM2 -static UINT32 ComputeWForSM2(bigCurve E) +static UINT32 ComputeWForSM2(TPM_ECC_CURVE curveId) { // w := ceil(ceil(log2(n)) / 2) - 1 - return (BnMsb(CurveGetOrder(AccessCurveData(E))) / 2 - 1); + return (ExtMath_MostSigBitNum(ExtEcc_CurveGetOrder(curveId)) / 2 - 1); } //*** avfSm2() @@ -268,18 +241,21 @@ static UINT32 ComputeWForSM2(bigCurve E) // standard avf(). For example, if 'n' is 15, 'Ws' ('w' in the standard) is 2 but // the 'W' here is 1. This means that an input value of 14 (1110b) would return a // value of 110b with the standard but 10b with the scheme in SM2. -static bigNum avfSm2(bigNum bn, // IN/OUT: the reduced value - UINT32 w // IN: the value of w +static Crypt_Int* avfSm2(Crypt_Int* bn, // IN/OUT: the reduced value + UINT32 w // IN: the value of w ) { // a) set w := ceil(ceil(log2(n)) / 2) - 1 // b) set x' := 2^w + ( x & (2^w - 1)) // This is just like the avf for MQV where x' = 2^w + (x mod 2^w) - BnMaskBits(bn, w); // as with avf1, this is too big by a factor of 2 but - // it doesn't matter because we SET the extra bit - // anyway - BnSetBit(bn, w); + ExtMath_MaskBits(bn, w); // as with avf1, this is too big by a factor of 2 but + // it doesn't matter because we SET the extra bit + // anyway + if(!ExtMath_SetBit(bn, w)) + { + FAIL(FATAL_ERROR_CRYPTO); + } return bn; } @@ -305,61 +281,62 @@ LIB_EXPORT TPM_RC SM2KeyExchange( TPMS_ECC_POINT* QeBIn // IN: ephemeral public party B key ) { - CURVE_INITIALIZED(E, curveId); - const ECC_CURVE_DATA* C; - ECC_INITIALIZED(dsA, dsAIn); - ECC_INITIALIZED(deA, deAIn); - POINT_INITIALIZED(QsB, QsBIn); - POINT_INITIALIZED(QeB, QeBIn); - BN_WORD_INITIALIZED(One, 1); - POINT(QeA); - ECC_NUM(XeB); - POINT(Z); - ECC_NUM(Ta); + CRYPT_CURVE_INITIALIZED(E, curveId); + CRYPT_ECC_INITIALIZED(dsA, dsAIn); + CRYPT_ECC_INITIALIZED(deA, deAIn); + CRYPT_POINT_INITIALIZED(QsB, QsBIn); + CRYPT_POINT_INITIALIZED(QeB, QeBIn); + CRYPT_INT_WORD_INITIALIZED(One, 1); + CRYPT_POINT_VAR(QeA); + CRYPT_ECC_NUM(XeB); + CRYPT_POINT_VAR(Z); + CRYPT_ECC_NUM(Ta); + CRYPT_ECC_NUM(QeA_X); UINT32 w; TPM_RC retVal = TPM_RC_NO_RESULT; // // Parameter checks if(E == NULL) - ERROR_RETURN(TPM_RC_CURVE); - C = AccessCurveData(E); + ERROR_EXIT(TPM_RC_CURVE); pAssert(outZ != NULL && dsA != NULL && deA != NULL && QsB != NULL && QeB != NULL); // Compute the value for w - w = ComputeWForSM2(E); + w = ComputeWForSM2(curveId); // Compute the public ephemeral key pQeA = [de,A]G - if(!BnEccModMult(QeA, CurveGetG(C), deA, E)) + if(!ExtEcc_PointMultiply(QeA, ExtEcc_CurveGetG(curveId), deA, E)) goto Exit; // tA := (ds,A + de,A avf(Xe,A)) mod n (3) // Compute 'tA' = ('dsA' + 'deA' avf('XeA')) mod n // Ta = avf(XeA); // do Ta = de,A * Ta = deA * avf(XeA) - BnMult(Ta, deA, avfSm2(QeA->x, w)); + ExtMath_Copy(QeA_X, ExtEcc_PointX(QeA)); // create mutable copy + ExtMath_Multiply(Ta, deA, avfSm2(QeA_X, w)); // now Ta = dsA + Ta = dsA + deA * avf(XeA) - BnAdd(Ta, dsA, Ta); - BnMod(Ta, CurveGetOrder(C)); + ExtMath_Add(Ta, dsA, Ta); + ExtMath_Mod(Ta, ExtEcc_CurveGetOrder(curveId)); // outZ = [h tA mod n] (Qs,B + [avf(Xe,B)](Qe,B)) (4) // Put this in because almost every case of h is == 1 so skip the call when // not necessary. - if(!BnEqualWord(CurveGetCofactor(C), 1)) + if(!ExtMath_IsEqualWord(ExtEcc_CurveGetCofactor(curveId), 1)) // Cofactor is not 1 so compute Ta := Ta * h mod n - BnModMult(Ta, Ta, CurveGetCofactor(C), CurveGetOrder(C)); + ExtMath_ModMult( + Ta, Ta, ExtEcc_CurveGetCofactor(curveId), ExtEcc_CurveGetOrder(curveId)); // Now that 'tA' is (h * 'tA' mod n) // 'outZ' = ['tA'](QsB + [avf(QeB.x)](QeB)). - BnCopy(XeB, QeB->x); - if(!BnEccModMult2(Z, QsB, One, QeB, avfSm2(XeB, w), E)) + ExtMath_Copy(XeB, ExtEcc_PointX(QeB)); + if(!ExtEcc_PointMultiplyAndAdd(Z, QsB, One, QeB, avfSm2(XeB, w), E)) goto Exit; // QeB := [tA]QeB = [tA](QsB + [Xe,B]QeB) and check for at infinity - if(!BnEccModMult(Z, Z, Ta, E)) + if(!ExtEcc_PointMultiply(Z, Z, Ta, E)) goto Exit; - // Convert BIGNUM E to TPM2B E - BnPointTo2B(outZ, Z, E); + // Convert Crypt_Int* E to TPM2B E + TpmEcc_PointTo2B(outZ, Z, E); retVal = TPM_RC_SUCCESS; Exit: - CURVE_FREE(E); + CRYPT_CURVE_FREE(E); return retVal; } # endif diff --git a/TPMCmd/tpm/src/crypt/CryptEccMain.c b/TPMCmd/tpm/src/crypt/CryptEccMain.c index 57bd783b..13433ab7 100644 --- a/TPMCmd/tpm/src/crypt/CryptEccMain.c +++ b/TPMCmd/tpm/src/crypt/CryptEccMain.c @@ -1,47 +1,9 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes and Defines #include "Tpm.h" - +#include "TpmMath_Util_fp.h" +#include "TpmEcc_Util_fp.h" +#include "TpmEcc_Signature_ECDSA_fp.h" // required for pairwise test in key generation #if ALG_ECC - -// This version requires that the new format for ECC data be used -# if !USE_BN_ECC_DATA -# error "Need to SET USE_BN_ECC_DATA to YES in Implementaion.h" -# endif - //** Functions # if SIMULATION @@ -84,10 +46,10 @@ void ClearPoint2B(TPMS_ECC_POINT* p // IN: the point // the indicated curveId. // If there is no curve with the indicated ID, the function returns NULL. This // function is in this module so that it can be called by GetCurve data. -// Return Type: const ECC_CURVE_DATA +// Return Type: const TPM_ECC_CURVE_METADATA // NULL curve with the indicated TPM_ECC_CURVE is not implemented // != NULL pointer to the curve data -LIB_EXPORT const ECC_CURVE* CryptEccGetParametersByCurveId( +LIB_EXPORT const TPM_ECC_CURVE_METADATA* CryptEccGetParametersByCurveId( TPM_ECC_CURVE curveId // IN: the curveID ) { @@ -105,27 +67,17 @@ LIB_EXPORT const ECC_CURVE* CryptEccGetParametersByCurveId( LIB_EXPORT UINT16 CryptEccGetKeySizeForCurve(TPM_ECC_CURVE curveId // IN: the curve ) { - const ECC_CURVE* curve = CryptEccGetParametersByCurveId(curveId); - UINT16 keySizeInBits; + const TPM_ECC_CURVE_METADATA* curve = CryptEccGetParametersByCurveId(curveId); + UINT16 keySizeInBits; // keySizeInBits = (curve != NULL) ? curve->keySizeBits : 0; return keySizeInBits; } -//*** GetCurveData() -// This function returns the a pointer for the parameter data -// associated with a curve. -const ECC_CURVE_DATA* GetCurveData(TPM_ECC_CURVE curveId // IN: the curveID -) -{ - const ECC_CURVE* curve = CryptEccGetParametersByCurveId(curveId); - return (curve != NULL) ? curve->curveData : NULL; -} - //***CryptEccGetOID() const BYTE* CryptEccGetOID(TPM_ECC_CURVE curveId) { - const ECC_CURVE* curve = CryptEccGetParametersByCurveId(curveId); + const TPM_ECC_CURVE_METADATA* curve = CryptEccGetParametersByCurveId(curveId); return (curve != NULL) ? curve->OID : NULL; } @@ -140,56 +92,6 @@ LIB_EXPORT TPM_ECC_CURVE CryptEccGetCurveByIndex(UINT16 i) return eccCurves[i].curveId; } -//*** CryptEccGetParameter() -// This function returns an ECC curve parameter. The parameter is -// selected by a single character designator from the set of ""PNABXYH"". -// Return Type: BOOL -// TRUE(1) curve exists and parameter returned -// FALSE(0) curve does not exist or parameter selector -LIB_EXPORT BOOL CryptEccGetParameter( - TPM2B_ECC_PARAMETER* out, // OUT: place to put parameter - char p, // IN: the parameter selector - TPM_ECC_CURVE curveId // IN: the curve id -) -{ - const ECC_CURVE_DATA* curve = GetCurveData(curveId); - bigConst parameter = NULL; - - if(curve != NULL) - { - switch(p) - { - case 'p': - parameter = CurveGetPrime(curve); - break; - case 'n': - parameter = CurveGetOrder(curve); - break; - case 'a': - parameter = CurveGet_a(curve); - break; - case 'b': - parameter = CurveGet_b(curve); - break; - case 'x': - parameter = CurveGetGx(curve); - break; - case 'y': - parameter = CurveGetGy(curve); - break; - case 'h': - parameter = CurveGetCofactor(curve); - break; - default: - FAIL(FATAL_ERROR_INTERNAL); - break; - } - } - // If not debugging and we get here with parameter still NULL, had better - // not try to convert so just return FALSE instead. - return (parameter != NULL) ? BnTo2B(parameter, &out->b, 0) : 0; -} - //*** CryptCapGetECCCurve() // This function returns the list of implemented ECC curves. // Return Type: TPMI_YES_NO @@ -238,13 +140,31 @@ CryptCapGetECCCurve(TPM_ECC_CURVE curveID, // IN: the starting ECC curve return more; } +//*** CryptCapGetOneECCCurve() +// This function returns whether the ECC curve is implemented. +BOOL CryptCapGetOneECCCurve(TPM_ECC_CURVE curveID // IN: the ECC curve +) +{ + UINT16 i; + + // Scan the eccCurveValues array + for(i = 0; i < ECC_CURVE_COUNT; i++) + { + if(CryptEccGetCurveByIndex(i) == curveID) + { + return TRUE; + } + } + return FALSE; +} + //*** CryptGetCurveSignScheme() // This function will return a pointer to the scheme of the curve. const TPMT_ECC_SCHEME* CryptGetCurveSignScheme( TPM_ECC_CURVE curveId // IN: The curve selector ) { - const ECC_CURVE* curve = CryptEccGetParametersByCurveId(curveId); + const TPM_ECC_CURVE_METADATA* curve = CryptEccGetParametersByCurveId(curveId); if(curve != NULL) return &(curve->sign); @@ -278,7 +198,7 @@ BOOL CryptGenerateR(TPM2B_ECC_PARAMETER* r, // OUT: the generated random UINT64 currentCount = gr.commitCounter; UINT16 t1; // - if(!CryptEccGetParameter(&n, 'n', curveID)) + if(!TpmMath_IntTo2B(ExtEcc_CurveGetOrder(curveID), (TPM2B*)&n, 0)) return FALSE; // If this is the commit phase, use the current value of the commit counter @@ -379,103 +299,75 @@ BOOL CryptEccGetParameters( TPMS_ALGORITHM_DETAIL_ECC* parameters // OUT: ECC parameters ) { - const ECC_CURVE* curve = CryptEccGetParametersByCurveId(curveId); - const ECC_CURVE_DATA* data; - BOOL found = curve != NULL; + const TPM_ECC_CURVE_METADATA* curve = CryptEccGetParametersByCurveId(curveId); + BOOL found = curve != NULL; if(found) { - data = curve->curveData; parameters->curveID = curve->curveId; parameters->keySize = curve->keySizeBits; parameters->kdf = curve->kdf; parameters->sign = curve->sign; // BnTo2B(data->prime, ¶meters->p.b, 0); - BnTo2B(data->prime, ¶meters->p.b, parameters->p.t.size); - BnTo2B(data->a, ¶meters->a.b, 0); - BnTo2B(data->b, ¶meters->b.b, 0); - BnTo2B(data->base.x, ¶meters->gX.b, parameters->p.t.size); - BnTo2B(data->base.y, ¶meters->gY.b, parameters->p.t.size); + found = found + && TpmMath_IntTo2B(ExtEcc_CurveGetPrime(curveId), + ¶meters->p.b, + parameters->p.t.size); + found = found + && TpmMath_IntTo2B(ExtEcc_CurveGet_a(curveId), ¶meters->a.b, 0); + found = found + && TpmMath_IntTo2B(ExtEcc_CurveGet_b(curveId), ¶meters->b.b, 0); + found = found + && TpmMath_IntTo2B(ExtEcc_CurveGetGx(curveId), + ¶meters->gX.b, + parameters->p.t.size); + found = found + && TpmMath_IntTo2B(ExtEcc_CurveGetGy(curveId), + ¶meters->gY.b, + parameters->p.t.size); // BnTo2B(data->base.x, ¶meters->gX.b, 0); // BnTo2B(data->base.y, ¶meters->gY.b, 0); - BnTo2B(data->order, ¶meters->n.b, 0); - BnTo2B(data->h, ¶meters->h.b, 0); + found = + found + && TpmMath_IntTo2B(ExtEcc_CurveGetOrder(curveId), ¶meters->n.b, 0); + found = + found + && TpmMath_IntTo2B(ExtEcc_CurveGetCofactor(curveId), ¶meters->h.b, 0); + // if we got into this IF but failed to get a parameter from the external + // library, our crypto systems are broken; enter failure mode. + if(!found) + { + FAIL(FATAL_ERROR_MATHLIBRARY); + } } return found; } -//*** BnGetCurvePrime() -// This function is used to get just the prime modulus associated with a curve. -const bignum_t* BnGetCurvePrime(TPM_ECC_CURVE curveId) -{ - const ECC_CURVE_DATA* C = GetCurveData(curveId); - return (C != NULL) ? CurveGetPrime(C) : NULL; -} - -//*** BnGetCurveOrder() -// This function is used to get just the curve order -const bignum_t* BnGetCurveOrder(TPM_ECC_CURVE curveId) -{ - const ECC_CURVE_DATA* C = GetCurveData(curveId); - return (C != NULL) ? CurveGetOrder(C) : NULL; -} - -//*** BnIsOnCurve() -// This function checks if a point is on the curve. -BOOL BnIsOnCurve(pointConst Q, const ECC_CURVE_DATA* C) -{ - BN_VAR(right, (MAX_ECC_KEY_BITS * 3)); - BN_VAR(left, (MAX_ECC_KEY_BITS * 2)); - bigConst prime = CurveGetPrime(C); - // - // Show that point is on the curve y^2 = x^3 + ax + b; - // Or y^2 = x(x^2 + a) + b - // y^2 - BnMult(left, Q->y, Q->y); - - BnMod(left, prime); - // x^2 - BnMult(right, Q->x, Q->x); - - // x^2 + a - BnAdd(right, right, CurveGet_a(C)); - - // BnMod(right, CurveGetPrime(C)); - // x(x^2 + a) - BnMult(right, right, Q->x); - - // x(x^2 + a) + b - BnAdd(right, right, CurveGet_b(C)); - - BnMod(right, prime); - if(BnUnsignedCmp(left, right) == 0) - return TRUE; - else - return FALSE; -} - -//*** BnIsValidPrivateEcc() +//*** TpmEcc_IsValidPrivateEcc() // Checks that 0 < 'x' < 'q' -BOOL BnIsValidPrivateEcc(bigConst x, // IN: private key to check - bigCurve E // IN: the curve to check +BOOL TpmEcc_IsValidPrivateEcc(const Crypt_Int* x, // IN: private key to check + const Crypt_EccCurve* E // IN: the curve to check ) { BOOL retVal; - retVal = (!BnEqualZero(x) - && (BnUnsignedCmp(x, CurveGetOrder(AccessCurveData(E))) < 0)); + retVal = + (!ExtMath_IsZero(x) + && (ExtMath_UnsignedCmp(x, ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E))) + < 0)); return retVal; } LIB_EXPORT BOOL CryptEccIsValidPrivateKey(TPM2B_ECC_PARAMETER* d, TPM_ECC_CURVE curveId) { - BN_INITIALIZED(bnD, MAX_ECC_PARAMETER_BYTES * 8, d); - return !BnEqualZero(bnD) && (BnUnsignedCmp(bnD, BnGetCurveOrder(curveId)) < 0); + CRYPT_INT_INITIALIZED(bnD, MAX_ECC_PARAMETER_BYTES * 8, d); + return !ExtMath_IsZero(bnD) + && (ExtMath_UnsignedCmp(bnD, ExtEcc_CurveGetOrder(curveId)) < 0); } -//*** BnPointMul() +//*** TpmEcc_PointMult() // This function does a point multiply of the form 'R' = ['d']'S' + ['u']'Q' where the -// parameters are bigNum values. If 'S' is NULL and d is not NULL, then it computes +// parameters are Crypt_Int* values. If 'S' is NULL and d is not NULL, then it computes // 'R' = ['d']'G' + ['u']'Q' or just 'R' = ['d']'G' if 'u' and 'Q' are NULL. // If 'skipChecks' is TRUE, then the function will not verify that the inputs are // correct for the domain. This would be the case when the values were created by the @@ -486,17 +378,17 @@ LIB_EXPORT BOOL CryptEccIsValidPrivateKey(TPM2B_ECC_PARAMETER* d, // TPM_RC_ECC_POINT 'S' or 'Q' is not on the curve // TPM_RC_VALUE 'd' or 'u' is not < n TPM_RC -BnPointMult(bigPoint R, // OUT: computed point - pointConst S, // IN: optional point to multiply by 'd' - bigConst d, // IN: scalar for [d]S or [d]G - pointConst Q, // IN: optional second point - bigConst u, // IN: optional second scalar - bigCurve E // IN: curve parameters +TpmEcc_PointMult(Crypt_Point* R, // OUT: computed point + const Crypt_Point* S, // IN: optional point to multiply by 'd' + const Crypt_Int* d, // IN: scalar for [d]S or [d]G + const Crypt_Point* Q, // IN: optional second point + const Crypt_Int* u, // IN: optional second scalar + const Crypt_EccCurve* E // IN: curve parameters ) { BOOL OK; // - TEST(TPM_ALG_ECDH); + TPM_DO_SELF_TEST(TPM_ALG_ECDH); // Need one scalar OK = (d != NULL || u != NULL); @@ -513,29 +405,29 @@ BnPointMult(bigPoint R, // OUT: computed point if(!OK) return TPM_RC_VALUE; - OK = (S == NULL) || BnIsOnCurve(S, AccessCurveData(E)); - OK = OK && ((Q == NULL) || BnIsOnCurve(Q, AccessCurveData(E))); + OK = (S == NULL) || ExtEcc_IsPointOnCurve(S, E); + OK = OK && ((Q == NULL) || ExtEcc_IsPointOnCurve(Q, E)); if(!OK) return TPM_RC_ECC_POINT; if((d != NULL) && (S == NULL)) - S = CurveGetG(AccessCurveData(E)); + S = ExtEcc_CurveGetG(ExtEcc_CurveGetCurveId(E)); // If only one scalar, don't need Shamir's trick if((d == NULL) || (u == NULL)) { if(d == NULL) - OK = BnEccModMult(R, Q, u, E); + OK = ExtEcc_PointMultiply(R, Q, u, E); else - OK = BnEccModMult(R, S, d, E); + OK = ExtEcc_PointMultiply(R, S, d, E); } else { - OK = BnEccModMult2(R, S, d, Q, u, E); + OK = ExtEcc_PointMultiplyAndAdd(R, S, d, Q, u, E); } return (OK ? TPM_RC_SUCCESS : TPM_RC_NO_RESULT); } -//***BnEccGetPrivate() +//***TpmEcc_GenPrivateScalar() // This function gets random values that are the size of the key plus 64 bits. The // value is reduced (mod ('q' - 1)) and incremented by 1 ('q' is the order of the // curve. This produces a value ('d') such that 1 <= 'd' < 'q'. This is the method @@ -543,45 +435,43 @@ BnPointMult(bigPoint R, // OUT: computed point // Return Type: BOOL // TRUE(1) success // FALSE(0) failure generating private key -BOOL BnEccGetPrivate(bigNum dOut, // OUT: the qualified random value - const ECC_CURVE_DATA* C, // IN: curve for which the private key - // needs to be appropriate - RAND_STATE* rand // IN: state for DRBG +BOOL TpmEcc_GenPrivateScalar( + Crypt_Int* dOut, // OUT: the qualified random value + const Crypt_EccCurve* E, // IN: curve for which the private key + // needs to be appropriate + RAND_STATE* rand // IN: state for DRBG ) { - bigConst order = CurveGetOrder(C); - BOOL OK; - UINT32 orderBits = BnSizeInBits(order); - UINT32 orderBytes = BITS_TO_BYTES(orderBits); - BN_VAR(bnExtraBits, MAX_ECC_KEY_BITS + 64); - BN_VAR(nMinus1, MAX_ECC_KEY_BITS); + TPM_ECC_CURVE curveId = ExtEcc_CurveGetCurveId(E); + const Crypt_Int* order = ExtEcc_CurveGetOrder(curveId); + BOOL OK; + UINT32 orderBits = ExtMath_SizeInBits(order); + UINT32 orderBytes = BITS_TO_BYTES(orderBits); + CRYPT_INT_VAR(bnExtraBits, MAX_ECC_KEY_BITS + 64); + CRYPT_INT_VAR(nMinus1, MAX_ECC_KEY_BITS); // - OK = BnGetRandomBits(bnExtraBits, (orderBytes * 8) + 64, rand); - OK = OK && BnSubWord(nMinus1, order, 1); - OK = OK && BnMod(bnExtraBits, nMinus1); - OK = OK && BnAddWord(dOut, bnExtraBits, 1); + OK = TpmMath_GetRandomInteger(bnExtraBits, (orderBytes * 8) + 64, rand); + OK = OK && ExtMath_SubtractWord(nMinus1, order, 1); + OK = OK && ExtMath_Mod(bnExtraBits, nMinus1); + OK = OK && ExtMath_AddWord(dOut, bnExtraBits, 1); return OK && !g_inFailureMode; } -//*** BnEccGenerateKeyPair() +//*** TpmEcc_GenerateKeyPair() // This function gets a private scalar from the source of random bits and does // the point multiply to get the public key. -BOOL BnEccGenerateKeyPair(bigNum bnD, // OUT: private scalar - bn_point_t* ecQ, // OUT: public point - bigCurve E, // IN: curve for the point - RAND_STATE* rand // IN: DRBG state to use +BOOL TpmEcc_GenerateKeyPair(Crypt_Int* bnD, // OUT: private scalar + Crypt_Point* ecQ, // OUT: public point + const Crypt_EccCurve* E, // IN: curve for the point + RAND_STATE* rand // IN: DRBG state to use ) { BOOL OK = FALSE; // Get a private scalar - OK = BnEccGetPrivate(bnD, AccessCurveData(E), rand); + OK = TpmEcc_GenPrivateScalar(bnD, E, rand); // Do a point multiply - OK = OK && BnEccModMult(ecQ, NULL, bnD, E); - if(!OK) - BnSetWord(ecQ->z, 0); - else - BnSetWord(ecQ->z, 1); + OK = OK && ExtEcc_PointMultiply(ecQ, NULL, bnD, E); return OK; } @@ -594,26 +484,26 @@ LIB_EXPORT TPM_RC CryptEccNewKeyPair( TPM_ECC_CURVE curveId // IN: the curve for the key ) { - CURVE_INITIALIZED(E, curveId); - POINT(ecQ); - ECC_NUM(bnD); + CRYPT_CURVE_INITIALIZED(E, curveId); + CRYPT_POINT_VAR(ecQ); + CRYPT_ECC_NUM(bnD); BOOL OK; if(E == NULL) return TPM_RC_CURVE; - TEST(TPM_ALG_ECDH); - OK = BnEccGenerateKeyPair(bnD, ecQ, E, NULL); + TPM_DO_SELF_TEST(TPM_ALG_ECDH); + OK = TpmEcc_GenerateKeyPair(bnD, ecQ, E, NULL); if(OK) { - BnPointTo2B(Qout, ecQ, E); - BnTo2B(bnD, &dOut->b, Qout->x.t.size); + TpmEcc_PointTo2B(Qout, ecQ, E); + TpmMath_IntTo2B(bnD, &dOut->b, Qout->x.t.size); } else { Qout->x.t.size = Qout->y.t.size = dOut->t.size = 0; } - CURVE_FREE(E); + CRYPT_CURVE_FREE(E); return OK ? TPM_RC_SUCCESS : TPM_RC_NO_RESULT; } @@ -654,21 +544,21 @@ LIB_EXPORT TPM_RC CryptEccPointMultiply( // of Q ) { - CURVE_INITIALIZED(E, curveId); - POINT_INITIALIZED(ecP, Pin); - ECC_INITIALIZED(bnD, dIn); // If dIn is null, then bnD is null - ECC_INITIALIZED(bnU, uIn); - POINT_INITIALIZED(ecQ, Qin); - POINT(ecR); + CRYPT_CURVE_INITIALIZED(E, curveId); + CRYPT_POINT_INITIALIZED(ecP, Pin); + CRYPT_ECC_INITIALIZED(bnD, dIn); // If dIn is null, then bnD is null + CRYPT_ECC_INITIALIZED(bnU, uIn); + CRYPT_POINT_INITIALIZED(ecQ, Qin); + CRYPT_POINT_VAR(ecR); TPM_RC retVal; // - retVal = BnPointMult(ecR, ecP, bnD, ecQ, bnU, E); + retVal = TpmEcc_PointMult(ecR, ecP, bnD, ecQ, bnU, E); if(retVal == TPM_RC_SUCCESS) - BnPointTo2B(Rout, ecR, E); + TpmEcc_PointTo2B(Rout, ecR, E); else ClearPoint2B(Rout); - CURVE_FREE(E); + CRYPT_CURVE_FREE(E); return retVal; } @@ -685,12 +575,12 @@ LIB_EXPORT BOOL CryptEccIsPointOnCurve( TPMS_ECC_POINT* Qin // IN: the point. ) { - const ECC_CURVE_DATA* C = GetCurveData(curveId); - POINT_INITIALIZED(ecQ, Qin); + CRYPT_CURVE_INITIALIZED(E, curveId); + CRYPT_POINT_INITIALIZED(ecQ, Qin); BOOL OK; // pAssert(Qin != NULL); - OK = (C != NULL && (BnIsOnCurve(ecQ, C))); + OK = (E != NULL && (ExtEcc_IsPointOnCurve(ecQ, E))); return OK; } @@ -721,50 +611,52 @@ LIB_EXPORT TPM_RC CryptEccGenerateKey( // RNG state ) { - CURVE_INITIALIZED(E, publicArea->parameters.eccDetail.curveID); - ECC_NUM(bnD); - POINT(ecQ); + CRYPT_CURVE_INITIALIZED(E, publicArea->parameters.eccDetail.curveID); + CRYPT_ECC_NUM(bnD); + CRYPT_POINT_VAR(ecQ); BOOL OK; TPM_RC retVal; // - TEST(TPM_ALG_ECDSA); // ECDSA is used to verify each key + TPM_DO_SELF_TEST(TPM_ALG_ECDSA); // ECDSA is used to verify each key // Validate parameters if(E == NULL) - ERROR_RETURN(TPM_RC_CURVE); + ERROR_EXIT(TPM_RC_CURVE); publicArea->unique.ecc.x.t.size = 0; publicArea->unique.ecc.y.t.size = 0; sensitive->sensitive.ecc.t.size = 0; - OK = BnEccGenerateKeyPair(bnD, ecQ, E, rand); + OK = TpmEcc_GenerateKeyPair(bnD, ecQ, E, rand); if(OK) { - BnPointTo2B(&publicArea->unique.ecc, ecQ, E); - BnTo2B(bnD, &sensitive->sensitive.ecc.b, publicArea->unique.ecc.x.t.size); + TpmEcc_PointTo2B(&publicArea->unique.ecc, ecQ, E); + TpmMath_IntTo2B( + bnD, &sensitive->sensitive.ecc.b, publicArea->unique.ecc.x.t.size); } # if FIPS_COMPLIANT // See if PWCT is required if(OK && IS_ATTRIBUTE(publicArea->objectAttributes, TPMA_OBJECT, sign)) { - ECC_NUM(bnT); - ECC_NUM(bnS); + CRYPT_ECC_NUM(bnT); + CRYPT_ECC_NUM(bnS); TPM2B_DIGEST digest; // - TEST(TPM_ALG_ECDSA); + TPM_DO_SELF_TEST(TPM_ALG_ECDSA); digest.t.size = MIN(sensitive->sensitive.ecc.t.size, sizeof(digest.t.buffer)); // Get a random value to sign using the built in DRBG state DRBG_Generate(NULL, digest.t.buffer, digest.t.size); if(g_inFailureMode) return TPM_RC_FAILURE; - BnSignEcdsa(bnT, bnS, E, bnD, &digest, NULL); + TpmEcc_SignEcdsa(bnT, bnS, E, bnD, &digest, NULL); // and make sure that we can validate the signature - OK = BnValidateSignatureEcdsa(bnT, bnS, E, ecQ, &digest) == TPM_RC_SUCCESS; + OK = TpmEcc_ValidateSignatureEcdsa(bnT, bnS, E, ecQ, &digest) + == TPM_RC_SUCCESS; } # endif retVal = (OK) ? TPM_RC_SUCCESS : TPM_RC_NO_RESULT; Exit: - CURVE_FREE(E); + CRYPT_CURVE_FREE(E); return retVal; } diff --git a/TPMCmd/tpm/src/crypt/CryptEccSignature.c b/TPMCmd/tpm/src/crypt/CryptEccSignature.c index 75c2e5ec..d8342c1c 100644 --- a/TPMCmd/tpm/src/crypt/CryptEccSignature.c +++ b/TPMCmd/tpm/src/crypt/CryptEccSignature.c @@ -1,485 +1,19 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes and Defines #include "Tpm.h" +#include "TpmEcc_Signature_ECDSA_fp.h" +#include "TpmEcc_Signature_ECDAA_fp.h" +#include "TpmEcc_Signature_Schnorr_fp.h" +#include "TpmEcc_Signature_SM2_fp.h" +#include "TpmEcc_Util_fp.h" +#include "TpmMath_Util_fp.h" #include "CryptEccSignature_fp.h" #if ALG_ECC //** Utility Functions -//*** EcdsaDigest() -// Function to adjust the digest so that it is no larger than the order of the -// curve. This is used for ECDSA sign and verification. -static bigNum EcdsaDigest(bigNum bnD, // OUT: the adjusted digest - const TPM2B_DIGEST* digest, // IN: digest to adjust - bigConst max // IN: value that indicates the maximum - // number of bits in the results -) -{ - int bitsInMax = BnSizeInBits(max); - int shift; - // - if(digest == NULL) - BnSetWord(bnD, 0); - else - { - BnFromBytes(bnD, - digest->t.buffer, - (NUMBYTES)MIN(digest->t.size, BITS_TO_BYTES(bitsInMax))); - shift = BnSizeInBits(bnD) - bitsInMax; - if(shift > 0) - BnShiftRight(bnD, bnD, shift); - } - return bnD; -} - -//*** BnSchnorrSign() -// This contains the Schnorr signature computation. It is used by both ECDSA and -// Schnorr signing. The result is computed as: ['s' = 'k' + 'r' * 'd' (mod 'n')] -// where -// 1) 's' is the signature -// 2) 'k' is a random value -// 3) 'r' is the value to sign -// 4) 'd' is the private EC key -// 5) 'n' is the order of the curve -// Return Type: TPM_RC -// TPM_RC_NO_RESULT the result of the operation was zero or 'r' (mod 'n') -// is zero -static TPM_RC BnSchnorrSign(bigNum bnS, // OUT: 's' component of the signature - bigConst bnK, // IN: a random value - bigNum bnR, // IN: the signature 'r' value - bigConst bnD, // IN: the private key - bigConst bnN // IN: the order of the curve -) -{ - // Need a local temp value to store the intermediate computation because product - // size can be larger than will fit in bnS. - BN_VAR(bnT1, MAX_ECC_PARAMETER_BYTES * 2 * 8); - // - // Reduce bnR without changing the input value - BnDiv(NULL, bnT1, bnR, bnN); - if(BnEqualZero(bnT1)) - return TPM_RC_NO_RESULT; - // compute s = (k + r * d)(mod n) - // r * d - BnMult(bnT1, bnT1, bnD); - // k * r * d - BnAdd(bnT1, bnT1, bnK); - // k + r * d (mod n) - BnDiv(NULL, bnS, bnT1, bnN); - return (BnEqualZero(bnS)) ? TPM_RC_NO_RESULT : TPM_RC_SUCCESS; -} - //** Signing Functions -//*** BnSignEcdsa() -// This function implements the ECDSA signing algorithm. The method is described -// in the comments below. -TPM_RC -BnSignEcdsa(bigNum bnR, // OUT: 'r' component of the signature - bigNum bnS, // OUT: 's' component of the signature - bigCurve E, // IN: the curve used in the signature - // process - bigNum bnD, // IN: private signing key - const TPM2B_DIGEST* digest, // IN: the digest to sign - RAND_STATE* rand // IN: used in debug of signing -) -{ - ECC_NUM(bnK); - ECC_NUM(bnIk); - BN_VAR(bnE, MAX(MAX_ECC_KEY_BYTES, MAX_DIGEST_SIZE) * 8); - POINT(ecR); - bigConst order = CurveGetOrder(AccessCurveData(E)); - TPM_RC retVal = TPM_RC_SUCCESS; - INT32 tries = 10; - BOOL OK = FALSE; - // - pAssert(digest != NULL); - // The algorithm as described in "Suite B Implementer's Guide to FIPS - // 186-3(ECDSA)" - // 1. Use one of the routines in Appendix A.2 to generate (k, k^-1), a - // per-message secret number and its inverse modulo n. Since n is prime, - // the output will be invalid only if there is a failure in the RBG. - // 2. Compute the elliptic curve point R = [k]G = (xR, yR) using EC scalar - // multiplication (see [Routines]), where G is the base point included in - // the set of domain parameters. - // 3. Compute r = xR mod n. If r = 0, then return to Step 1. 1. - // 4. Use the selected hash function to compute H = Hash(M). - // 5. Convert the bit string H to an integer e as described in Appendix B.2. - // 6. Compute s = (k^-1 * (e + d * r)) mod q. If s = 0, return to Step 1.2. - // 7. Return (r, s). - // In the code below, q is n (that it, the order of the curve is p) - - do // This implements the loop at step 6. If s is zero, start over. - { - for(; tries > 0; tries--) - { - // Step 1 and 2 -- generate an ephemeral key and the modular inverse - // of the private key. - if(!BnEccGenerateKeyPair(bnK, ecR, E, rand)) - continue; - // x coordinate is mod p. Make it mod q - BnMod(ecR->x, order); - // Make sure that it is not zero; - if(BnEqualZero(ecR->x)) - continue; - // write the modular reduced version of r as part of the signature - BnCopy(bnR, ecR->x); - // Make sure that a modular inverse exists and try again if not - OK = (BnModInverse(bnIk, bnK, order)); - if(OK) - break; - } - if(!OK) - goto Exit; - - EcdsaDigest(bnE, digest, order); - - // now have inverse of K (bnIk), e (bnE), r (bnR), d (bnD) and - // CurveGetOrder(E) - // Compute s = k^-1 (e + r*d)(mod q) - // first do s = r*d mod q - BnModMult(bnS, bnR, bnD, order); - // s = e + s = e + r * d - BnAdd(bnS, bnE, bnS); - // s = k^(-1)s (mod n) = k^(-1)(e + r * d)(mod n) - BnModMult(bnS, bnIk, bnS, order); - - // If S is zero, try again - } while(BnEqualZero(bnS)); -Exit: - return retVal; -} - -# if ALG_ECDAA - -//*** BnSignEcdaa() -// -// This function performs 's' = 'r' + 'T' * 'd' mod 'q' where -// 1) 'r' is a random, or pseudo-random value created in the commit phase -// 2) 'nonceK' is a TPM-generated, random value 0 < 'nonceK' < 'n' -// 3) 'T' is mod 'q' of "Hash"('nonceK' || 'digest'), and -// 4) 'd' is a private key. -// -// The signature is the tuple ('nonceK', 's') -// -// Regrettably, the parameters in this function kind of collide with the parameter -// names used in ECSCHNORR making for a lot of confusion. -// Return Type: TPM_RC -// TPM_RC_SCHEME unsupported hash algorithm -// TPM_RC_NO_RESULT cannot get values from random number generator -static TPM_RC BnSignEcdaa( - TPM2B_ECC_PARAMETER* nonceK, // OUT: 'nonce' component of the signature - bigNum bnS, // OUT: 's' component of the signature - bigCurve E, // IN: the curve used in signing - bigNum bnD, // IN: the private key - const TPM2B_DIGEST* digest, // IN: the value to sign (mod 'q') - TPMT_ECC_SCHEME* scheme, // IN: signing scheme (contains the - // commit count value). - OBJECT* eccKey, // IN: The signing key - RAND_STATE* rand // IN: a random number state -) -{ - TPM_RC retVal; - TPM2B_ECC_PARAMETER r; - HASH_STATE state; - TPM2B_DIGEST T; - BN_MAX(bnT); - // - NOT_REFERENCED(rand); - if(!CryptGenerateR(&r, - &scheme->details.ecdaa.count, - eccKey->publicArea.parameters.eccDetail.curveID, - &eccKey->name)) - retVal = TPM_RC_VALUE; - else - { - // This allocation is here because 'r' doesn't have a value until - // CrypGenerateR() is done. - ECC_INITIALIZED(bnR, &r); - do - { - // generate nonceK such that 0 < nonceK < n - // use bnT as a temp. - if(!BnEccGetPrivate(bnT, AccessCurveData(E), rand)) - { - retVal = TPM_RC_NO_RESULT; - break; - } - BnTo2B(bnT, &nonceK->b, 0); - - T.t.size = CryptHashStart(&state, scheme->details.ecdaa.hashAlg); - if(T.t.size == 0) - { - retVal = TPM_RC_SCHEME; - } - else - { - CryptDigestUpdate2B(&state, &nonceK->b); - CryptDigestUpdate2B(&state, &digest->b); - CryptHashEnd2B(&state, &T.b); - BnFrom2B(bnT, &T.b); - // Watch out for the name collisions in this call!! - retVal = BnSchnorrSign(bnS, bnR, bnT, bnD, AccessCurveData(E)->order); - } - } while(retVal == TPM_RC_NO_RESULT); - // Because the rule is that internal state is not modified if the command - // fails, only end the commit if the command succeeds. - // NOTE that if the result of the Schnorr computation was zero - // it will probably not be worthwhile to run the same command again because - // the result will still be zero. This means that the Commit command will - // need to be run again to get a new commit value for the signature. - if(retVal == TPM_RC_SUCCESS) - CryptEndCommit(scheme->details.ecdaa.count); - } - return retVal; -} -# endif // ALG_ECDAA - -# if ALG_ECSCHNORR - -//*** SchnorrReduce() -// Function to reduce a hash result if it's magnitude is too large. The size of -// 'number' is set so that it has no more bytes of significance than 'reference' -// value. If the resulting number can have more bits of significance than -// 'reference'. -static void SchnorrReduce(TPM2B* number, // IN/OUT: Value to reduce - bigConst reference // IN: the reference value -) -{ - UINT16 maxBytes = (UINT16)BITS_TO_BYTES(BnSizeInBits(reference)); - if(number->size > maxBytes) - number->size = maxBytes; -} - -//*** SchnorrEcc() -// This function is used to perform a modified Schnorr signature. -// -// This function will generate a random value 'k' and compute -// a) ('xR', 'yR') = ['k']'G' -// b) 'r' = "Hash"('xR' || 'P')(mod 'q') -// c) 'rT' = truncated 'r' -// d) 's'= 'k' + 'rT' * 'ds' (mod 'q') -// e) return the tuple 'rT', 's' -// -// Return Type: TPM_RC -// TPM_RC_NO_RESULT failure in the Schnorr sign process -// TPM_RC_SCHEME hashAlg can't produce zero-length digest -static TPM_RC BnSignEcSchnorr( - bigNum bnR, // OUT: 'r' component of the signature - bigNum bnS, // OUT: 's' component of the signature - bigCurve E, // IN: the curve used in signing - bigNum bnD, // IN: the signing key - const TPM2B_DIGEST* digest, // IN: the digest to sign - TPM_ALG_ID hashAlg, // IN: signing scheme (contains a hash) - RAND_STATE* rand // IN: non-NULL when testing -) -{ - HASH_STATE hashState; - UINT16 digestSize = CryptHashGetDigestSize(hashAlg); - TPM2B_TYPE(T, MAX(MAX_DIGEST_SIZE, MAX_ECC_KEY_BYTES)); - TPM2B_T T2b; - TPM2B* e = &T2b.b; - TPM_RC retVal = TPM_RC_NO_RESULT; - const ECC_CURVE_DATA* C; - bigConst order; - bigConst prime; - ECC_NUM(bnK); - POINT(ecR); - // - // Parameter checks - if(E == NULL) - ERROR_RETURN(TPM_RC_VALUE); - C = AccessCurveData(E); - order = CurveGetOrder(C); - prime = CurveGetOrder(C); - - // If the digest does not produce a hash, then null the signature and return - // a failure. - if(digestSize == 0) - { - BnSetWord(bnR, 0); - BnSetWord(bnS, 0); - ERROR_RETURN(TPM_RC_SCHEME); - } - do - { - // Generate a random key pair - if(!BnEccGenerateKeyPair(bnK, ecR, E, rand)) - break; - // Convert R.x to a string - BnTo2B(ecR->x, e, (NUMBYTES)BITS_TO_BYTES(BnSizeInBits(prime))); - - // f) compute r = Hash(e || P) (mod n) - CryptHashStart(&hashState, hashAlg); - CryptDigestUpdate2B(&hashState, e); - CryptDigestUpdate2B(&hashState, &digest->b); - e->size = CryptHashEnd(&hashState, digestSize, e->buffer); - // Reduce the hash size if it is larger than the curve order - SchnorrReduce(e, order); - // Convert hash to number - BnFrom2B(bnR, e); - // Do the Schnorr computation - retVal = BnSchnorrSign(bnS, bnK, bnR, bnD, CurveGetOrder(C)); - } while(retVal == TPM_RC_NO_RESULT); -Exit: - return retVal; -} - -# endif // ALG_ECSCHNORR - -# if ALG_SM2 -# ifdef _SM2_SIGN_DEBUG - -//*** BnHexEqual() -// This function compares a bignum value to a hex string. -// Return Type: BOOL -// TRUE(1) values equal -// FALSE(0) values not equal -static BOOL BnHexEqual(bigNum bn, //IN: big number value - const char* c //IN: character string number -) -{ - ECC_NUM(bnC); - BnFromHex(bnC, c); - return (BnUnsignedCmp(bn, bnC) == 0); -} -# endif // _SM2_SIGN_DEBUG - -//*** BnSignEcSm2() -// This function signs a digest using the method defined in SM2 Part 2. The method -// in the standard will add a header to the message to be signed that is a hash of -// the values that define the key. This then hashed with the message to produce a -// digest ('e'). This function signs 'e'. -// Return Type: TPM_RC -// TPM_RC_VALUE bad curve -static TPM_RC BnSignEcSm2(bigNum bnR, // OUT: 'r' component of the signature - bigNum bnS, // OUT: 's' component of the signature - bigCurve E, // IN: the curve used in signing - bigNum bnD, // IN: the private key - const TPM2B_DIGEST* digest, // IN: the digest to sign - RAND_STATE* rand // IN: random number generator (mostly for - // debug) -) -{ - BN_MAX_INITIALIZED(bnE, digest); // Don't know how big digest might be - ECC_NUM(bnN); - ECC_NUM(bnK); - ECC_NUM(bnT); // temp - POINT(Q1); - bigConst order = (E != NULL) ? CurveGetOrder(AccessCurveData(E)) : NULL; -// -# ifdef _SM2_SIGN_DEBUG - BnFromHex(bnE, - "B524F552CD82B8B028476E005C377FB1" - "9A87E6FC682D48BB5D42E3D9B9EFFE76"); - BnFromHex(bnD, - "128B2FA8BD433C6C068C8D803DFF7979" - "2A519A55171B1B650C23661D15897263"); -# endif - // A3: Use random number generator to generate random number 1 <= k <= n-1; - // NOTE: Ax: numbers are from the SM2 standard -loop: -{ - // Get a random number 0 < k < n - BnGenerateRandomInRange(bnK, order, rand); -# ifdef _SM2_SIGN_DEBUG - BnFromHex(bnK, - "6CB28D99385C175C94F94E934817663F" - "C176D925DD72B727260DBAAE1FB2F96F"); -# endif - // A4: Figure out the point of elliptic curve (x1, y1)=[k]G, and according - // to details specified in 4.2.7 in Part 1 of this document, transform the - // data type of x1 into an integer; - if(!BnEccModMult(Q1, NULL, bnK, E)) - goto loop; - // A5: Figure out 'r' = ('e' + 'x1') mod 'n', - BnAdd(bnR, bnE, Q1->x); - BnMod(bnR, order); -# ifdef _SM2_SIGN_DEBUG - pAssert(BnHexEqual(bnR, - "40F1EC59F793D9F49E09DCEF49130D41" - "94F79FB1EED2CAA55BACDB49C4E755D1")); -# endif - // if r=0 or r+k=n, return to A3; - if(BnEqualZero(bnR)) - goto loop; - BnAdd(bnT, bnK, bnR); - if(BnUnsignedCmp(bnT, bnN) == 0) - goto loop; - // A6: Figure out s = ((1 + dA)^-1 (k - r dA)) mod n, - // if s=0, return to A3; - // compute t = (1+dA)^-1 - BnAddWord(bnT, bnD, 1); - BnModInverse(bnT, bnT, order); -# ifdef _SM2_SIGN_DEBUG - pAssert(BnHexEqual(bnT, - "79BFCF3052C80DA7B939E0C6914A18CB" - "B2D96D8555256E83122743A7D4F5F956")); -# endif - // compute s = t * (k - r * dA) mod n - BnModMult(bnS, bnR, bnD, order); - // k - r * dA mod n = k + n - ((r * dA) mod n) - BnSub(bnS, order, bnS); - BnAdd(bnS, bnK, bnS); - BnModMult(bnS, bnS, bnT, order); -# ifdef _SM2_SIGN_DEBUG - pAssert(BnHexEqual(bnS, - "6FC6DAC32C5D5CF10C77DFB20F7C2EB6" - "67A457872FB09EC56327A67EC7DEEBE7")); -# endif - if(BnEqualZero(bnS)) - goto loop; -} -// A7: According to details specified in 4.2.1 in Part 1 of this document, -// transform the data type of r, s into bit strings, signature of message M -// is (r, s). -// This is handled by the common return code -# ifdef _SM2_SIGN_DEBUG - pAssert(BnHexEqual(bnR, - "40F1EC59F793D9F49E09DCEF49130D41" - "94F79FB1EED2CAA55BACDB49C4E755D1")); - pAssert(BnHexEqual(bnS, - "6FC6DAC32C5D5CF10C77DFB20F7C2EB6" - "67A457872FB09EC56327A67EC7DEEBE7")); -# endif - return TPM_RC_SUCCESS; -} -# endif // ALG_SM2 - //*** CryptEccSign() // This function is the dispatch function for the various ECC-based // signing schemes. @@ -499,49 +33,47 @@ LIB_EXPORT TPM_RC CryptEccSign(TPMT_SIGNATURE* signature, // OUT: signature TPMT_ECC_SCHEME* scheme, // IN: signing scheme RAND_STATE* rand) { - CURVE_INITIALIZED(E, signKey->publicArea.parameters.eccDetail.curveID); - ECC_INITIALIZED(bnD, &signKey->sensitive.sensitive.ecc.b); - ECC_NUM(bnR); - ECC_NUM(bnS); - const ECC_CURVE_DATA* C; - TPM_RC retVal = TPM_RC_SCHEME; + CRYPT_CURVE_INITIALIZED(E, signKey->publicArea.parameters.eccDetail.curveID); + CRYPT_ECC_INITIALIZED(bnD, &signKey->sensitive.sensitive.ecc.b); + CRYPT_ECC_NUM(bnR); + CRYPT_ECC_NUM(bnS); + TPM_RC retVal = TPM_RC_SCHEME; // NOT_REFERENCED(scheme); if(E == NULL) - ERROR_RETURN(TPM_RC_VALUE); - C = AccessCurveData(E); + ERROR_EXIT(TPM_RC_VALUE); signature->signature.ecdaa.signatureR.t.size = sizeof(signature->signature.ecdaa.signatureR.t.buffer); signature->signature.ecdaa.signatureS.t.size = sizeof(signature->signature.ecdaa.signatureS.t.buffer); - TEST(signature->sigAlg); + TPM_DO_SELF_TEST(signature->sigAlg); switch(signature->sigAlg) { case TPM_ALG_ECDSA: - retVal = BnSignEcdsa(bnR, bnS, E, bnD, digest, rand); + retVal = TpmEcc_SignEcdsa(bnR, bnS, E, bnD, digest, rand); break; # if ALG_ECDAA case TPM_ALG_ECDAA: - retVal = BnSignEcdaa(&signature->signature.ecdaa.signatureR, - bnS, - E, - bnD, - digest, - scheme, - signKey, - rand); + retVal = TpmEcc_SignEcdaa(&signature->signature.ecdaa.signatureR, + bnS, + E, + bnD, + digest, + scheme, + signKey, + rand); bnR = NULL; break; # endif # if ALG_ECSCHNORR case TPM_ALG_ECSCHNORR: - retVal = BnSignEcSchnorr( + retVal = TpmEcc_SignEcSchnorr( bnR, bnS, E, bnD, digest, signature->signature.ecschnorr.hash, rand); break; # endif # if ALG_SM2 case TPM_ALG_SM2: - retVal = BnSignEcSm2(bnR, bnS, E, bnD, digest, rand); + retVal = TpmEcc_SignEcSm2(bnR, bnS, E, bnD, digest, rand); break; # endif default: @@ -550,200 +82,22 @@ LIB_EXPORT TPM_RC CryptEccSign(TPMT_SIGNATURE* signature, // OUT: signature // If signature generation worked, convert the results. if(retVal == TPM_RC_SUCCESS) { - NUMBYTES orderBytes = (NUMBYTES)BITS_TO_BYTES(BnSizeInBits(CurveGetOrder(C))); + NUMBYTES orderBytes = (NUMBYTES)BITS_TO_BYTES( + ExtMath_SizeInBits(ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E)))); if(bnR != NULL) - BnTo2B(bnR, &signature->signature.ecdaa.signatureR.b, orderBytes); + TpmMath_IntTo2B( + bnR, &signature->signature.ecdaa.signatureR.b, orderBytes); if(bnS != NULL) - BnTo2B(bnS, &signature->signature.ecdaa.signatureS.b, orderBytes); + TpmMath_IntTo2B( + bnS, &signature->signature.ecdaa.signatureS.b, orderBytes); } Exit: - CURVE_FREE(E); + CRYPT_CURVE_FREE(E); return retVal; } //********************* Signature Validation ******************** -# if ALG_ECDSA - -//*** BnValidateSignatureEcdsa() -// This function validates an ECDSA signature. rIn and sIn should have been checked -// to make sure that they are in the range 0 < 'v' < 'n' -// Return Type: TPM_RC -// TPM_RC_SIGNATURE signature not valid -TPM_RC -BnValidateSignatureEcdsa(bigNum bnR, // IN: 'r' component of the signature - bigNum bnS, // IN: 's' component of the signature - bigCurve E, // IN: the curve used in the signature - // process - bn_point_t* ecQ, // IN: the public point of the key - const TPM2B_DIGEST* digest // IN: the digest that was signed -) -{ - // Make sure that the allocation for the digest is big enough for a maximum - // digest - BN_VAR(bnE, MAX(MAX_ECC_KEY_BYTES, MAX_DIGEST_SIZE) * 8); - POINT(ecR); - ECC_NUM(bnU1); - ECC_NUM(bnU2); - ECC_NUM(bnW); - bigConst order = CurveGetOrder(AccessCurveData(E)); - TPM_RC retVal = TPM_RC_SIGNATURE; - // - // Get adjusted digest - EcdsaDigest(bnE, digest, order); - // 1. If r and s are not both integers in the interval [1, n - 1], output - // INVALID. - // bnR and bnS were validated by the caller - // 2. Use the selected hash function to compute H0 = Hash(M0). - // This is an input parameter - // 3. Convert the bit string H0 to an integer e as described in Appendix B.2. - // Done at entry - // 4. Compute w = (s')^-1 mod n, using the routine in Appendix B.1. - if(!BnModInverse(bnW, bnS, order)) - goto Exit; - // 5. Compute u1 = (e' * w) mod n, and compute u2 = (r' * w) mod n. - BnModMult(bnU1, bnE, bnW, order); - BnModMult(bnU2, bnR, bnW, order); - // 6. Compute the elliptic curve point R = (xR, yR) = u1G+u2Q, using EC - // scalar multiplication and EC addition (see [Routines]). If R is equal to - // the point at infinity O, output INVALID. - if(BnPointMult(ecR, CurveGetG(AccessCurveData(E)), bnU1, ecQ, bnU2, E) - != TPM_RC_SUCCESS) - goto Exit; - // 7. Compute v = Rx mod n. - BnMod(ecR->x, order); - // 8. Compare v and r0. If v = r0, output VALID; otherwise, output INVALID - if(BnUnsignedCmp(ecR->x, bnR) != 0) - goto Exit; - - retVal = TPM_RC_SUCCESS; -Exit: - return retVal; -} - -# endif // ALG_ECDSA - -# if ALG_SM2 - -//*** BnValidateSignatureEcSm2() -// This function is used to validate an SM2 signature. -// Return Type: TPM_RC -// TPM_RC_SIGNATURE signature not valid -static TPM_RC BnValidateSignatureEcSm2( - bigNum bnR, // IN: 'r' component of the signature - bigNum bnS, // IN: 's' component of the signature - bigCurve E, // IN: the curve used in the signature - // process - bigPoint ecQ, // IN: the public point of the key - const TPM2B_DIGEST* digest // IN: the digest that was signed -) -{ - POINT(P); - ECC_NUM(bnRp); - ECC_NUM(bnT); - BN_MAX_INITIALIZED(bnE, digest); - BOOL OK; - bigConst order = CurveGetOrder(AccessCurveData(E)); - -# ifdef _SM2_SIGN_DEBUG - // Make sure that the input signature is the test signature - pAssert(BnHexEqual(bnR, - "40F1EC59F793D9F49E09DCEF49130D41" - "94F79FB1EED2CAA55BACDB49C4E755D1")); - pAssert(BnHexEqual(bnS, - "6FC6DAC32C5D5CF10C77DFB20F7C2EB6" - "67A457872FB09EC56327A67EC7DEEBE7")); -# endif - // b) compute t := (r + s) mod n - BnAdd(bnT, bnR, bnS); - BnMod(bnT, order); -# ifdef _SM2_SIGN_DEBUG - pAssert(BnHexEqual(bnT, - "2B75F07ED7ECE7CCC1C8986B991F441A" - "D324D6D619FE06DD63ED32E0C997C801")); -# endif - // c) verify that t > 0 - OK = !BnEqualZero(bnT); - if(!OK) - // set T to a value that should allow rest of the computations to run - // without trouble - BnCopy(bnT, bnS); - // d) compute (x, y) := [s]G + [t]Q - OK = BnEccModMult2(P, NULL, bnS, ecQ, bnT, E); -# ifdef _SM2_SIGN_DEBUG - pAssert(OK - && BnHexEqual(P->x, - "110FCDA57615705D5E7B9324AC4B856D" - "23E6D9188B2AE47759514657CE25D112")); -# endif - // e) compute r' := (e + x) mod n (the x coordinate is in bnT) - OK = OK && BnAdd(bnRp, bnE, P->x); - OK = OK && BnMod(bnRp, order); - - // f) verify that r' = r - OK = OK && (BnUnsignedCmp(bnR, bnRp) == 0); - - if(!OK) - return TPM_RC_SIGNATURE; - else - return TPM_RC_SUCCESS; -} - -# endif // ALG_SM2 - -# if ALG_ECSCHNORR - -//*** BnValidateSignatureEcSchnorr() -// This function is used to validate an EC Schnorr signature. -// Return Type: TPM_RC -// TPM_RC_SIGNATURE signature not valid -static TPM_RC BnValidateSignatureEcSchnorr( - bigNum bnR, // IN: 'r' component of the signature - bigNum bnS, // IN: 's' component of the signature - TPM_ALG_ID hashAlg, // IN: hash algorithm of the signature - bigCurve E, // IN: the curve used in the signature - // process - bigPoint ecQ, // IN: the public point of the key - const TPM2B_DIGEST* digest // IN: the digest that was signed -) -{ - BN_MAX(bnRn); - POINT(ecE); - BN_MAX(bnEx); - const ECC_CURVE_DATA* C = AccessCurveData(E); - bigConst order = CurveGetOrder(C); - UINT16 digestSize = CryptHashGetDigestSize(hashAlg); - HASH_STATE hashState; - TPM2B_TYPE(BUFFER, MAX(MAX_ECC_PARAMETER_BYTES, MAX_DIGEST_SIZE)); - TPM2B_BUFFER Ex2 = {{sizeof(Ex2.t.buffer), {0}}}; - BOOL OK; - // - // E = [s]G - [r]Q - BnMod(bnR, order); - // Make -r = n - r - BnSub(bnRn, order, bnR); - // E = [s]G + [-r]Q - OK = BnPointMult(ecE, CurveGetG(C), bnS, ecQ, bnRn, E) == TPM_RC_SUCCESS; - // // reduce the x portion of E mod q - // OK = OK && BnMod(ecE->x, order); - // Convert to byte string - OK = OK && BnTo2B(ecE->x, &Ex2.b, (NUMBYTES)(BITS_TO_BYTES(BnSizeInBits(order)))); - if(OK) - { - // Ex = h(pE.x || digest) - CryptHashStart(&hashState, hashAlg); - CryptDigestUpdate(&hashState, Ex2.t.size, Ex2.t.buffer); - CryptDigestUpdate(&hashState, digest->t.size, digest->t.buffer); - Ex2.t.size = CryptHashEnd(&hashState, digestSize, Ex2.t.buffer); - SchnorrReduce(&Ex2.b, order); - BnFrom2B(bnEx, &Ex2.b); - // see if Ex matches R - OK = BnUnsignedCmp(bnEx, bnR) == 0; - } - return (OK) ? TPM_RC_SUCCESS : TPM_RC_SIGNATURE; -} -# endif // ALG_ECSCHNORR - //*** CryptEccValidateSignature() // This function validates an EcDsa or EcSchnorr signature. // The point 'Qin' needs to have been validated to be on the curve of 'curveId'. @@ -755,17 +109,17 @@ LIB_EXPORT TPM_RC CryptEccValidateSignature( const TPM2B_DIGEST* digest // IN: digest that was signed ) { - CURVE_INITIALIZED(E, signKey->publicArea.parameters.eccDetail.curveID); - ECC_NUM(bnR); - ECC_NUM(bnS); - POINT_INITIALIZED(ecQ, &signKey->publicArea.unique.ecc); - bigConst order; - TPM_RC retVal; + CRYPT_CURVE_INITIALIZED(E, signKey->publicArea.parameters.eccDetail.curveID); + CRYPT_ECC_NUM(bnR); + CRYPT_ECC_NUM(bnS); + CRYPT_POINT_INITIALIZED(ecQ, &signKey->publicArea.unique.ecc); + const Crypt_Int* order; + TPM_RC retVal; if(E == NULL) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); - order = CurveGetOrder(AccessCurveData(E)); + order = ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E)); // // Make sure that the scheme is valid switch(signature->sigAlg) @@ -779,43 +133,44 @@ LIB_EXPORT TPM_RC CryptEccValidateSignature( # endif break; default: - ERROR_RETURN(TPM_RC_SCHEME); + ERROR_EXIT(TPM_RC_SCHEME); break; } // Can convert r and s after determining that the scheme is an ECC scheme. If // this conversion doesn't work, it means that the unmarshaling code for // an ECC signature is broken. - BnFrom2B(bnR, &signature->signature.ecdsa.signatureR.b); - BnFrom2B(bnS, &signature->signature.ecdsa.signatureS.b); + TpmMath_IntFrom2B(bnR, &signature->signature.ecdsa.signatureR.b); + TpmMath_IntFrom2B(bnS, &signature->signature.ecdsa.signatureS.b); // r and s have to be greater than 0 but less than the curve order - if(BnEqualZero(bnR) || BnEqualZero(bnS)) - ERROR_RETURN(TPM_RC_SIGNATURE); - if((BnUnsignedCmp(bnS, order) >= 0) || (BnUnsignedCmp(bnR, order) >= 0)) - ERROR_RETURN(TPM_RC_SIGNATURE); + if(ExtMath_IsZero(bnR) || ExtMath_IsZero(bnS)) + ERROR_EXIT(TPM_RC_SIGNATURE); + if((ExtMath_UnsignedCmp(bnS, order) >= 0) + || (ExtMath_UnsignedCmp(bnR, order) >= 0)) + ERROR_EXIT(TPM_RC_SIGNATURE); switch(signature->sigAlg) { case TPM_ALG_ECDSA: - retVal = BnValidateSignatureEcdsa(bnR, bnS, E, ecQ, digest); + retVal = TpmEcc_ValidateSignatureEcdsa(bnR, bnS, E, ecQ, digest); break; # if ALG_ECSCHNORR case TPM_ALG_ECSCHNORR: - retVal = BnValidateSignatureEcSchnorr( + retVal = TpmEcc_ValidateSignatureEcSchnorr( bnR, bnS, signature->signature.any.hashAlg, E, ecQ, digest); break; # endif # if ALG_SM2 case TPM_ALG_SM2: - retVal = BnValidateSignatureEcSm2(bnR, bnS, E, ecQ, digest); + retVal = TpmEcc_ValidateSignatureEcSm2(bnR, bnS, E, ecQ, digest); break; # endif default: FAIL(FATAL_ERROR_INTERNAL); } Exit: - CURVE_FREE(E); + CRYPT_CURVE_FREE(E); return retVal; } @@ -846,9 +201,10 @@ LIB_EXPORT TPM_RC CryptEccCommitCompute( TPM2B_ECC_PARAMETER* r // IN: the computed r value (required) ) { - CURVE_INITIALIZED(curve, curveId); // Normally initialize E as the curve, but - // E means something else in this function - ECC_INITIALIZED(bnR, r); + // Normally initialize E as the curve, but + // E means something else in this function + CRYPT_CURVE_INITIALIZED(curve, curveId); + CRYPT_ECC_INITIALIZED(bnR, r); TPM_RC retVal = TPM_RC_SUCCESS; // // Validate that the required parameters are provided. @@ -867,53 +223,56 @@ LIB_EXPORT TPM_RC CryptEccCommitCompute( // If B is provided, compute K=[d]B and L=[r]B if(B != NULL) { - ECC_INITIALIZED(bnD, d); - POINT_INITIALIZED(pB, B); - POINT(pK); - POINT(pL); + CRYPT_ECC_INITIALIZED(bnD, d); + CRYPT_POINT_INITIALIZED(pB, B); + CRYPT_POINT_VAR(pK); + CRYPT_POINT_VAR(pL); // pAssert(d != NULL && K != NULL && L != NULL); - if(!BnIsOnCurve(pB, AccessCurveData(curve))) - ERROR_RETURN(TPM_RC_VALUE); + if(!ExtEcc_IsPointOnCurve(pB, curve)) + ERROR_EXIT(TPM_RC_VALUE); // do the math for K = [d]B - if((retVal = BnPointMult(pK, pB, bnD, NULL, NULL, curve)) != TPM_RC_SUCCESS) + if((retVal = TpmEcc_PointMult(pK, pB, bnD, NULL, NULL, curve)) + != TPM_RC_SUCCESS) goto Exit; // Convert BN K to TPM2B K - BnPointTo2B(K, pK, curve); + TpmEcc_PointTo2B(K, pK, curve); // compute L= [r]B after checking for cancel if(_plat__IsCanceled()) - ERROR_RETURN(TPM_RC_CANCELED); + ERROR_EXIT(TPM_RC_CANCELED); // compute L = [r]B - if(!BnIsValidPrivateEcc(bnR, curve)) - ERROR_RETURN(TPM_RC_VALUE); - if((retVal = BnPointMult(pL, pB, bnR, NULL, NULL, curve)) != TPM_RC_SUCCESS) + if(!TpmEcc_IsValidPrivateEcc(bnR, curve)) + ERROR_EXIT(TPM_RC_VALUE); + if((retVal = TpmEcc_PointMult(pL, pB, bnR, NULL, NULL, curve)) + != TPM_RC_SUCCESS) goto Exit; // Convert BN L to TPM2B L - BnPointTo2B(L, pL, curve); + TpmEcc_PointTo2B(L, pL, curve); } if((M != NULL) || (B == NULL)) { - POINT_INITIALIZED(pM, M); - POINT(pE); + CRYPT_POINT_INITIALIZED(pM, M); + CRYPT_POINT_VAR(pE); // // Make sure that a place was provided for the result pAssert(E != NULL); // if this is the third point multiply, check for cancel first if((B != NULL) && _plat__IsCanceled()) - ERROR_RETURN(TPM_RC_CANCELED); + ERROR_EXIT(TPM_RC_CANCELED); // If M provided, then pM will not be NULL and will compute E = [r]M. // However, if M was not provided, then pM will be NULL and E = [r]G // will be computed - if((retVal = BnPointMult(pE, pM, bnR, NULL, NULL, curve)) != TPM_RC_SUCCESS) + if((retVal = TpmEcc_PointMult(pE, pM, bnR, NULL, NULL, curve)) + != TPM_RC_SUCCESS) goto Exit; // Convert E to 2B format - BnPointTo2B(E, pE, curve); + TpmEcc_PointTo2B(E, pE, curve); } Exit: - CURVE_FREE(curve); + CRYPT_CURVE_FREE(curve); return retVal; } diff --git a/TPMCmd/tpm/src/crypt/CryptHash.c b/TPMCmd/tpm/src/crypt/CryptHash.c index e713785f..54b96afb 100644 --- a/TPMCmd/tpm/src/crypt/CryptHash.c +++ b/TPMCmd/tpm/src/crypt/CryptHash.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // // This file contains implementation of cryptographic functions for hashing. @@ -87,9 +53,9 @@ BOOL CryptHashStartup(void) PHASH_DEF CryptGetHashDef(TPM_ALG_ID hashAlg) { -#define GET_DEF(HASH, Hash) \ - case ALG_##HASH##_VALUE: \ - return &Hash##_Def; +#define GET_DEF(HASH, Hash) \ + case ALG_##HASH##_VALUE: \ + return &Hash##_Def; switch(hashAlg) { FOR_EACH_HASH(GET_DEF) @@ -216,13 +182,13 @@ void CryptHashExportState( { BYTE* outBuf = (BYTE*)externalFmt; // - cAssert(sizeof(HASH_STATE) <= sizeof(EXPORT_HASH_STATE)); + MUST_BE(sizeof(HASH_STATE) <= sizeof(EXPORT_HASH_STATE)); // the following #define is used to move data from an aligned internal data // structure to a byte buffer (external format data. -#define CopyToOffset(value) \ - memcpy(&outBuf[offsetof(HASH_STATE, value)], \ - &internalFmt->value, \ - sizeof(internalFmt->value)) +#define CopyToOffset(value) \ + memcpy(&outBuf[offsetof(HASH_STATE, value)], \ + &internalFmt->value, \ + sizeof(internalFmt->value)) // Copy the hashAlg CopyToOffset(hashAlg); CopyToOffset(type); @@ -256,10 +222,10 @@ void CryptHashImportState( { BYTE* inBuf = (BYTE*)externalFmt; // -#define CopyFromOffset(value) \ - memcpy(&internalFmt->value, \ - &inBuf[offsetof(HASH_STATE, value)], \ - sizeof(internalFmt->value)) +#define CopyFromOffset(value) \ + memcpy(&internalFmt->value, \ + &inBuf[offsetof(HASH_STATE, value)], \ + sizeof(internalFmt->value)) // Copy the hashAlg of the byte-aligned input structure to the structure-aligned // internal structure. @@ -338,7 +304,7 @@ LIB_EXPORT UINT16 CryptHashStart( { UINT16 retVal; - TEST(hashAlg); + TPM_DO_SELF_TEST(hashAlg); hashState->hashAlg = hashAlg; if(hashAlg == TPM_ALG_NULL) @@ -701,7 +667,7 @@ LIB_EXPORT UINT16 CryptKDFa( pAssert(key != NULL && keyStream != NULL); - TEST(TPM_ALG_KDF1_SP800_108); + TPM_DO_SELF_TEST(TPM_ALG_KDF1_SP800_108); if(digestSize == 0) return 0; @@ -828,14 +794,13 @@ LIB_EXPORT UINT16 CryptKDFe(TPM_ALG_ID hashAlg, // IN: hash algorithm used in // Add label if(label != NULL) CryptDigestUpdate2B(&hashState, label); - // Add a null. SP108 is not very clear about when the 0 is needed but to - // make this like the previous version that did not add an 0x00 after - // a null-terminated string, this version will only add a null byte - // if the label parameter did not end in a null byte, or if no label - // is present. - if((label == NULL) || (label->size == 0) - || (label->buffer[label->size - 1] != 0)) - CryptDigestUpdateInt(&hashState, 1, 0); + + // NIST.SP.800-56Cr2.pdf section 4.1 states that no NULL + // character is required here. + // Note, this is different from KDFa which is specified in + // NIST.SP.800-108r1.pdf section 4 (a NULL character is required + // for that case). + // Add PartyUInfo if(partyUInfo != NULL) CryptDigestUpdate2B(&hashState, partyUInfo); diff --git a/TPMCmd/tpm/src/crypt/CryptPrime.c b/TPMCmd/tpm/src/crypt/CryptPrime.c index 46f994a2..625a0bc0 100644 --- a/TPMCmd/tpm/src/crypt/CryptPrime.c +++ b/TPMCmd/tpm/src/crypt/CryptPrime.c @@ -1,42 +1,9 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the code for prime validation. #include "Tpm.h" #include "CryptPrime_fp.h" +#include "TpmMath_Util_fp.h" //#define CPRI_PRIME //#include "PrimeTable.h" @@ -47,7 +14,7 @@ extern const uint32_t s_LastPrimeInTable; extern const uint32_t s_PrimeTableSize; extern const uint32_t s_PrimesInTable; extern const unsigned char s_PrimeTable[]; -extern bigConst s_CompositeOfSmallPrimes; +extern const Crypt_Int* s_CompositeOfSmallPrimes; //** Functions @@ -106,33 +73,39 @@ BOOL IsPrimeInt(uint32_t n) return TRUE; } -//*** BnIsProbablyPrime() +//*** TpmMath_IsProbablyPrime() // This function is used when the key sieve is not implemented. This function // Will try to eliminate some of the obvious things before going on // to perform MillerRabin as a final verification of primeness. -BOOL BnIsProbablyPrime(bigNum prime, // IN: - RAND_STATE* rand // IN: the random state just - // in case Miller-Rabin is required +BOOL TpmMath_IsProbablyPrime(Crypt_Int* prime, // IN: + RAND_STATE* rand // IN: the random state just + // in case Miller-Rabin is required ) { -#if RADIX_BITS > 32 - if(BnUnsignedCmpWord(prime, UINT32_MAX) <= 0) -#else - if(BnGetSize(prime) == 1) -#endif - return IsPrimeInt((uint32_t)prime->d[0]); - - if(BnIsEven(prime)) + uint32_t leastSignificant32 = ExtMath_GetLeastSignificant32bits(prime); + // is even? + if((leastSignificant32 & 0x1) == 0) return FALSE; - if(BnUnsignedCmpWord(prime, s_LastPrimeInTable) <= 0) - { - crypt_uword_t temp = prime->d[0] >> 1; - return ((s_PrimeTable[temp >> 3] >> (temp & 7)) & 1); - } + + if(ExtMath_SizeInBits(prime) <= 32) + return IsPrimeInt(leastSignificant32); + + // this s_LastPrimeInTable check guarantees that the full prime table check + // is incorporated in IsPrimeInt. If this fails then something like this + // old code needs to be added back. + // if(ExtMath_UnsignedCmpWord(prime, s_LastPrimeInTable) <= 0) + // { + // // check fast prime table before doing slower checks + // crypt_uword_t temp = prime->d[0] >> 1; + // return ((s_PrimeTable[temp >> 3] >> (temp & 7)) & 1); + // } + MUST_BE(sizeof(s_LastPrimeInTable) <= 4); + + // check using GCD before doing a full Miller Rabin. { - BN_VAR(n, LARGEST_NUMBER_BITS); - BnGcd(n, prime, s_CompositeOfSmallPrimes); - if(!BnEqualWord(n, 1)) + CRYPT_INT_VAR(gcd, LARGEST_NUMBER_BITS); + ExtMath_GCD(gcd, prime, s_CompositeOfSmallPrimes); + if(!ExtMath_IsEqualWord(gcd, 1)) return FALSE; } return MillerRabin(prime, rand); @@ -160,24 +133,24 @@ MillerRabinRounds(UINT32 bits // IN: Number of bits in the RSA prime // Return Type: BOOL // TRUE(1) probably prime // FALSE(0) composite -BOOL MillerRabin(bigNum bnW, RAND_STATE* rand) +BOOL MillerRabin(Crypt_Int* bnW, RAND_STATE* rand) { - BN_MAX(bnWm1); - BN_PRIME(bnM); - BN_PRIME(bnB); - BN_PRIME(bnZ); + CRYPT_INT_MAX(bnWm1); + CRYPT_PRIME_VAR(bnM); + CRYPT_PRIME_VAR(bnB); + CRYPT_PRIME_VAR(bnZ); BOOL ret = FALSE; // Assumed composite for easy exit unsigned int a; unsigned int j; int wLen; int i; - int iterations = MillerRabinRounds(BnSizeInBits(bnW)); + int iterations = MillerRabinRounds(ExtMath_SizeInBits(bnW)); // INSTRUMENT_INC(MillerRabinTrials[PrimeIndex]); pAssert(bnW->size > 1); // Let a be the largest integer such that 2^a divides w1. - BnSubWord(bnWm1, bnW, 1); + ExtMath_SubtractWord(bnWm1, bnW, 1); pAssert(bnWm1->size != 0); // Since w is odd (w-1) is even so start at bit number 1 rather than 0 @@ -185,21 +158,23 @@ BOOL MillerRabin(bigNum bnW, RAND_STATE* rand) // on each iteration. i = (int)(bnWm1->size * RADIX_BITS); // Now find the largest power of 2 that divides w1 - for(a = 1; (a < (bnWm1->size * RADIX_BITS)) && (BnTestBit(bnWm1, a) == 0); a++) - ; + for(a = 1; (a < (bnWm1->size * RADIX_BITS)) && (ExtMath_TestBit(bnWm1, a) == 0); + a++) + { + } // 2. m = (w1) / 2^a - BnShiftRight(bnM, bnWm1, a); + ExtMath_ShiftRight(bnM, bnWm1, a); // 3. wlen = len (w). - wLen = BnSizeInBits(bnW); + wLen = ExtMath_SizeInBits(bnW); // 4. For i = 1 to iterations do for(i = 0; i < iterations; i++) { // 4.1 Obtain a string b of wlen bits from an RBG. // Ensure that 1 < b < w1. // 4.2 If ((b <= 1) or (b >= w1)), then go to step 4.1. - while( - BnGetRandomBits(bnB, wLen, rand) - && ((BnUnsignedCmpWord(bnB, 1) <= 0) || (BnUnsignedCmp(bnB, bnWm1) >= 0))) + while(TpmMath_GetRandomInteger(bnB, wLen, rand) + && ((ExtMath_UnsignedCmpWord(bnB, 1) <= 0) + || (ExtMath_UnsignedCmp(bnB, bnWm1) >= 0))) ; if(g_inFailureMode) return FALSE; @@ -207,21 +182,22 @@ BOOL MillerRabin(bigNum bnW, RAND_STATE* rand) // 4.3 z = b^m mod w. // if ModExp fails, then say this is not // prime and bail out. - BnModExp(bnZ, bnB, bnM, bnW); + ExtMath_ModExp(bnZ, bnB, bnM, bnW); // 4.4 If ((z == 1) or (z = w == 1)), then go to step 4.7. - if((BnUnsignedCmpWord(bnZ, 1) == 0) || (BnUnsignedCmp(bnZ, bnWm1) == 0)) + if((ExtMath_UnsignedCmpWord(bnZ, 1) == 0) + || (ExtMath_UnsignedCmp(bnZ, bnWm1) == 0)) goto step4point7; // 4.5 For j = 1 to a 1 do. for(j = 1; j < a; j++) { // 4.5.1 z = z^2 mod w. - BnModMult(bnZ, bnZ, bnZ, bnW); + ExtMath_ModMult(bnZ, bnZ, bnZ, bnW); // 4.5.2 If (z = w1), then go to step 4.7. - if(BnUnsignedCmp(bnZ, bnWm1) == 0) + if(ExtMath_UnsignedCmp(bnZ, bnWm1) == 0) goto step4point7; // 4.5.3 If (z = 1), then go to step 4.6. - if(BnEqualWord(bnZ, 1)) + if(ExtMath_IsEqualWord(bnZ, 1)) goto step4point6; } // 4.6 Return COMPOSITE. @@ -253,26 +229,26 @@ BOOL MillerRabin(bigNum bnW, RAND_STATE* rand) // If sieving is used, the number is used to root a sieving process. // TPM_RC -RsaCheckPrime(bigNum prime, UINT32 exponent, RAND_STATE* rand) +RsaCheckPrime(Crypt_Int* prime, UINT32 exponent, RAND_STATE* rand) { # if !RSA_KEY_SIEVE TPM_RC retVal = TPM_RC_SUCCESS; - UINT32 modE = BnModWord(prime, exponent); + UINT32 modE = ExtMath_ModWord(prime, exponent); NOT_REFERENCED(rand); if(modE == 0) // evenly divisible so add two keeping the number odd - BnAddWord(prime, prime, 2); + ExtMath_AddWord(prime, prime, 2); // want 0 != (p - 1) mod e // which is 1 != p mod e else if(modE == 1) // subtract 2 keeping number odd and insuring that // 0 != (p - 1) mod e - BnSubWord(prime, prime, 2); + ExtMath_SubtractWord(prime, prime, 2); - if(BnIsProbablyPrime(prime, rand) == 0) - ERROR_RETURN(g_inFailureMode ? TPM_RC_FAILURE : TPM_RC_VALUE); + if(TpmMath_IsProbablyPrime(prime, rand) == 0) + ERROR_EXIT(g_inFailureMode ? TPM_RC_FAILURE : TPM_RC_VALUE); Exit: return retVal; # else @@ -281,6 +257,7 @@ RsaCheckPrime(bigNum prime, UINT32 exponent, RAND_STATE* rand) } //*** RsaAdjustPrimeCandiate() +// // For this math, we assume that the RSA numbers are fixed-point numbers with // the decimal point to the "left" of the most significant bit. This approach helps // make it clear what is happening with the MSb of the values. @@ -307,61 +284,67 @@ RsaCheckPrime(bigNum prime, UINT32 exponent, RAND_STATE* rand) // significant bits of each prime candidate without introducing any computational // issues. // -LIB_EXPORT void RsaAdjustPrimeCandidate(bigNum prime) +static void RsaAdjustPrimeCandidate(BYTE* bigNumberBuffer, size_t bufSize) { - UINT32 msw; - UINT32 adjusted; + // first, ensure the last byte is odd, making the entire value odd + bigNumberBuffer[bufSize - 1] |= 1; + + // second, get the most significant 32 bits. + uint32_t msw = (bigNumberBuffer[0] << 24) | (bigNumberBuffer[1] << 16) + | (bigNumberBuffer[2] << 8) | (bigNumberBuffer[3] << 0); - // If the radix is 32, the compiler should turn this into a simple assignment - msw = prime->d[prime->size - 1] >> ((RADIX_BITS == 64) ? 32 : 0); // Multiplying 0xff...f by 0x4AFB gives 0xff..f - 0xB5050...0 - adjusted = (msw >> 16) * 0x4AFB; + uint32_t adjusted = (msw >> 16) * 0x4AFB; adjusted += ((msw & 0xFFFF) * 0x4AFB) >> 16; adjusted += 0xB5050000UL; -# if RADIX_BITS == 64 - // Save the low-order 32 bits - prime->d[prime->size - 1] &= 0xFFFFFFFFUL; - // replace the upper 32-bits - prime->d[prime->size - 1] |= ((crypt_uword_t)adjusted << 32); -# else - prime->d[prime->size - 1] = (crypt_uword_t)adjusted; -# endif - // make sure the number is odd - prime->d[0] |= 1; + + // put the value back + bigNumberBuffer[0] = (uint8_t)(adjusted >> 24); + bigNumberBuffer[1] = (uint8_t)(adjusted >> 16); + bigNumberBuffer[2] = (uint8_t)(adjusted >> 8); + bigNumberBuffer[3] = (uint8_t)(adjusted >> 0); } -//***BnGeneratePrimeForRSA() +//***TpmRsa_GeneratePrimeForRSA() // Function to generate a prime of the desired size with the proper attributes // for an RSA prime. -TPM_RC -BnGeneratePrimeForRSA(bigNum prime, // IN/OUT: points to the BN that will get the - // random value - UINT32 bits, // IN: number of bits to get - UINT32 exponent, // IN: the exponent - RAND_STATE* rand // IN: the random state +// succeeds, or enters failure mode. +TPM_RC TpmRsa_GeneratePrimeForRSA( + Crypt_Int* prime, // IN/OUT: points to the BN that will get the + // random value + UINT32 bits, // IN: number of bits to get + UINT32 exponent, // IN: the exponent + RAND_STATE* rand // IN: the random state ) { - BOOL found = FALSE; - // - // Make sure that the prime is large enough - pAssert(prime->allocated >= BITS_TO_CRYPT_WORDS(bits)); - // Only try to handle specific sizes of keys in order to save overhead + // Only try to handle specific sizes of keys. + // this is necessary so the RsaAdjustPrimeCandidate function works correctly. pAssert((bits % 32) == 0); - prime->size = BITS_TO_CRYPT_WORDS(bits); + // create buffer large enough for the largest key + TPM2B_TYPE(LARGEST, LARGEST_NUMBER); + TPM2B_LARGEST large; - while(!found) + NUMBYTES bytes = (NUMBYTES)BITS_TO_BYTES(bits); + BOOL OK = (bytes <= sizeof(large.t.buffer)); + BOOL found = FALSE; + while(OK && !found) { - // The change below is to make sure that all keys that are generated from the same - // seed value will be the same regardless of the endianess or word size of the CPU. - // DRBG_Generate(rand, (BYTE *)prime->d, (UINT16)BITS_TO_BYTES(bits));// old - // if(g_inFailureMode) // old - if(!BnGetRandomBits(prime, bits, rand)) // new - return TPM_RC_FAILURE; - RsaAdjustPrimeCandidate(prime); - found = RsaCheckPrime(prime, exponent, rand) == TPM_RC_SUCCESS; + OK = TpmMath_GetRandomBits(large.t.buffer, bits, rand); // new + large.t.size = bytes; + RsaAdjustPrimeCandidate(large.t.buffer, bytes); + // convert from 2B to Integer for prime checks + OK = OK + && (ExtMath_IntFromBytes(prime, large.t.buffer, large.t.size) != NULL); + found = OK && (RsaCheckPrime(prime, exponent, rand) == TPM_RC_SUCCESS); } - return TPM_RC_SUCCESS; + + if(!OK) + { + FAIL(FATAL_ERROR_CRYPTO); + } + + return (OK && found) ? TPM_RC_SUCCESS : TPM_RC_FAILURE; } #endif // ALG_RSA \ No newline at end of file diff --git a/TPMCmd/tpm/src/crypt/CryptPrimeSieve.c b/TPMCmd/tpm/src/crypt/CryptPrimeSieve.c index a7d71df5..0b93e586 100644 --- a/TPMCmd/tpm/src/crypt/CryptPrimeSieve.c +++ b/TPMCmd/tpm/src/crypt/CryptPrimeSieve.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes and defines #include "Tpm.h" @@ -156,9 +122,9 @@ const BYTE bitsInNibble[16] = {0x00, 0x03, 0x03, 0x04}; -# define BitsInByte(x) \ - (bitsInNibble[(unsigned char)(x)&0xf] \ - + bitsInNibble[((unsigned char)(x) >> 4) & 0xf]) +# define BitsInByte(x) \ + (bitsInNibble[(unsigned char)(x) & 0xf] \ + + bitsInNibble[((unsigned char)(x) >> 4) & 0xf]) # endif //*** BitsInArry() @@ -209,15 +175,20 @@ LIB_EXPORT int FindNthSetBit( typedef struct { - UINT16 prime; + UINT32 prime; UINT16 count; } SIEVE_MARKS; -const SIEVE_MARKS sieveMarks[5] = {{31, 7}, +// clang-format off +const SIEVE_MARKS sieveMarks[6] = {{31, 7}, {73, 5}, {241, 4}, {1621, 3}, - {UINT16_MAX, 2}}; + {UINT16_MAX, 2}, + {UINT32_MAX, 1}}; + +const size_t MAX_SIEVE_MARKS = (sizeof(sieveMarks) / sizeof(sieveMarks[0])); +// clang-format on //*** PrimeSieve() // This function does a prime sieve over the input 'field' which has as its @@ -229,11 +200,11 @@ const SIEVE_MARKS sieveMarks[5] = {{31, 7}, // To get better performance, one could address the issue of developing the // composite numbers. When the size of the prime gets large, the time for doing // the divisions goes up, noticeably. It could be better to develop larger composite -// numbers even if they need to be bigNum's themselves. The object would be to +// numbers even if they need to be Crypt_Int*'s themselves. The object would be to // reduce the number of times that the large prime is divided into a few large // divides and then use smaller divides to get to the final 16 bit (or smaller) // remainders. -LIB_EXPORT UINT32 PrimeSieve(bigNum bnN, // IN/OUT: number to sieve +LIB_EXPORT UINT32 PrimeSieve(Crypt_Int* bnN, // IN/OUT: number to sieve UINT32 fieldSize, // IN: size of the field area in bytes BYTE* field // IN: field ) @@ -257,14 +228,14 @@ LIB_EXPORT UINT32 PrimeSieve(bigNum bnN, // IN/OUT: number to sieve // If the remainder is odd, then subtracting the value will give an even number, // but we want an odd number, so subtract the 105+rem. Otherwise, just subtract // the even remainder. - adjust = (UINT32)BnModWord(bnN, 105); + adjust = (UINT32)ExtMath_ModWord(bnN, 105); if(adjust & 1) adjust += 105; // Adjust the input number so that it points to the first number in a // aligned field. - BnSubWord(bnN, bnN, adjust); - // pAssert(BnModWord(bnN, 105) == 0); + ExtMath_SubtractWord(bnN, bnN, adjust); + // pAssert(ExtMath_ModWord(bnN, 105) == 0); pField = field; for(i = fieldSize; i >= sizeof(seedValues); pField += sizeof(seedValues), i -= sizeof(seedValues)) @@ -294,7 +265,7 @@ LIB_EXPORT UINT32 PrimeSieve(bigNum bnN, // IN/OUT: number to sieve } // Get the remainder when dividing the base field address // by the composite - composite = (UINT32)BnModWord(bnN, composite); + composite = (UINT32)ExtMath_ModWord(bnN, composite); // 'composite' is divisible by the composite components. for each of the // composite components, divide 'composite'. That remainder (r) is used to // pick a starting point for clearing the array. The stride is equal to the @@ -345,13 +316,20 @@ LIB_EXPORT UINT32 PrimeSieve(bigNum bnN, // IN/OUT: number to sieve if(next >= stop) { mark++; + if(mark >= MAX_SIEVE_MARKS) + { + // prime iteration should have broken out of the loop before this. + FAIL_EXIT(FATAL_ERROR_INTERNAL, i, 0); + } count = sieveMarks[mark].count; stop = sieveMarks[mark].prime; } } done: - INSTRUMENT_INC(totalFieldsSieved[PrimeIndex]); i = BitsInArray(field, fieldSize); + +Exit: + INSTRUMENT_INC(totalFieldsSieved[PrimeIndex]); INSTRUMENT_ADD(bitsInFieldAfterSieve[PrimeIndex], i); INSTRUMENT_ADD(emptyFieldsSieved[PrimeIndex], (i == 0)); return i; @@ -387,16 +365,15 @@ LIB_EXPORT uint32_t SetFieldSize(uint32_t newFieldSize) // TPM_RC_NO_RESULT candidate is not prime and couldn't find and alternative // in the field LIB_EXPORT TPM_RC PrimeSelectWithSieve( - bigNum candidate, // IN/OUT: The candidate to filter + Crypt_Int* candidate, // IN/OUT: The candidate to filter UINT32 e, // IN: the exponent RAND_STATE* rand // IN: the random number generator state ) { BYTE field[MAX_FIELD_SIZE]; - UINT32 first; UINT32 ones; INT32 chosen; - BN_PRIME(test); + CRYPT_PRIME_VAR(test); UINT32 modE; # ifndef SIEVE_DEBUG UINT32 fieldSize = MAX_FIELD_SIZE; @@ -409,7 +386,7 @@ LIB_EXPORT TPM_RC PrimeSelectWithSieve( // of the prime is large, the cost of Miller-Rabin is fairly high, as is the // cost of the sieving. However, the time for Miller-Rabin goes up considerably // faster than the cost of dividing by a number of primes. - primeSize = BnSizeInBits(candidate); + primeSize = ExtMath_SizeInBits(candidate); if(primeSize <= 512) { @@ -426,36 +403,42 @@ LIB_EXPORT TPM_RC PrimeSelectWithSieve( // Save the low-order word to use as a search generator and make sure that // it has some interesting range to it - first = (UINT32)(candidate->d[0] | 0x80000000); + uint32_t first = ExtMath_GetLeastSignificant32bits(candidate); + first |= 0x80000000; // Sieve the field ones = PrimeSieve(candidate, fieldSize, field); - pAssert(ones > 0 && ones < (fieldSize * 8)); - for(; ones > 0; ones--) - { - // Decide which bit to look at and find its offset - chosen = FindNthSetBit((UINT16)fieldSize, field, ((first % ones) + 1)); - - if((chosen < 0) || (chosen >= (INT32)(fieldSize * 8))) - FAIL(FATAL_ERROR_INTERNAL); - // Set this as the trial prime - BnAddWord(test, candidate, (crypt_uword_t)(chosen * 2)); - - // The exponent might not have been one of the tested primes so - // make sure that it isn't divisible and make sure that 0 != (p-1) mod e - // Note: This is the same as 1 != p mod e - modE = (UINT32)BnModWord(test, e); - if((modE != 0) && (modE != 1) && MillerRabin(test, rand)) + // PrimeSieve shouldn't fail, but does call functions that may. + if(!g_inFailureMode) + { + pAssert(ones > 0 && ones < (fieldSize * 8)); + for(; ones > 0; ones--) { - BnCopy(candidate, test); - return TPM_RC_SUCCESS; + // Decide which bit to look at and find its offset + chosen = FindNthSetBit((UINT16)fieldSize, field, ((first % ones) + 1)); + + if((chosen < 0) || (chosen >= (INT32)(fieldSize * 8))) + FAIL(FATAL_ERROR_INTERNAL); + + // Set this as the trial prime + ExtMath_AddWord(test, candidate, (crypt_uword_t)(chosen * 2)); + + // The exponent might not have been one of the tested primes so + // make sure that it isn't divisible and make sure that 0 != (p-1) mod e + // Note: This is the same as 1 != p mod e + modE = (UINT32)ExtMath_ModWord(test, e); + if((modE != 0) && (modE != 1) && MillerRabin(test, rand)) + { + ExtMath_Copy(candidate, test); + return TPM_RC_SUCCESS; + } + // Clear the bit just tested + ClearBit(chosen, field, fieldSize); } - // Clear the bit just tested - ClearBit(chosen, field, fieldSize); + // Ran out of bits and couldn't find a prime in this field + INSTRUMENT_INC(noPrimeFields[PrimeIndex]); } - // Ran out of bits and couldn't find a prime in this field - INSTRUMENT_INC(noPrimeFields[PrimeIndex]); return (g_inFailureMode ? TPM_RC_FAILURE : TPM_RC_NO_RESULT); } diff --git a/TPMCmd/tpm/src/crypt/CryptRand.c b/TPMCmd/tpm/src/crypt/CryptRand.c index b3638d33..a8b85725 100644 --- a/TPMCmd/tpm/src/crypt/CryptRand.c +++ b/TPMCmd/tpm/src/crypt/CryptRand.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file implements a DRBG with a behavior according to SP800-90A using // a block cypher. This is also compliant to ISO/IEC 18031:2011(E) C.3.2. @@ -98,6 +64,8 @@ const BYTE DRBG_NistTestVector_Generated[] = {DRBG_TEST_GENERATED}; # error "CryptRand.c only written for AES with 128- or 256-bit keys." #endif +typedef tpmKeyScheduleAES DRBG_KEY_SCHEDULE; + typedef struct { DRBG_KEY_SCHEDULE keySchedule; @@ -353,8 +321,7 @@ static BOOL EncryptDRBG(BYTE* dOut, if((lastValue[0] == temp[0]) && (lastValue[1] == temp[1]) && (lastValue[2] == temp[2]) && (lastValue[3] == temp[3])) { - LOG_FAILURE(FATAL_ERROR_ENTROPY); - return FALSE; + FAIL_BOOL(FATAL_ERROR_ENTROPY); } lastValue[0] = temp[0]; lastValue[1] = temp[1]; @@ -420,8 +387,7 @@ static BOOL DRBG_Update( { if(DRBG_ENCRYPT_SETUP((BYTE*)key, DRBG_KEY_SIZE_BITS, &localKeySchedule) != 0) { - LOG_FAILURE(FATAL_ERROR_INTERNAL); - return FALSE; + FAIL_BOOL(FATAL_ERROR_INTERNAL); } keySchedule = &localKeySchedule; } @@ -667,8 +633,7 @@ LIB_EXPORT TPM_RC DRBG_InstantiateSeeded( // DRBG should have been tested, but... if(!IsDrbgTested() && !DRBG_SelfTest()) { - LOG_FAILURE(FATAL_ERROR_SELF_TEST); - return TPM_RC_FAILURE; + FAIL_RC(FATAL_ERROR_SELF_TEST); } // Initialize the DRBG state memset(drbgState, 0, sizeof(DRBG_STATE)); @@ -852,8 +817,7 @@ LIB_EXPORT UINT16 DRBG_Generate( { // If this is a PRNG then the only way to get // here is if the SW has run away. - LOG_FAILURE(FATAL_ERROR_INTERNAL); - return 0; + FAIL_IMMEDIATE(FATAL_ERROR_INTERNAL, 0); } } // if the allowed number of bytes in a request is larger than the @@ -867,8 +831,7 @@ LIB_EXPORT UINT16 DRBG_Generate( (BYTE*)pDRBG_KEY(seed), DRBG_KEY_SIZE_BITS, &keySchedule) != 0) { - LOG_FAILURE(FATAL_ERROR_INTERNAL); - return 0; + FAIL_IMMEDIATE(FATAL_ERROR_INTERNAL, 0); } // Generate the random data EncryptDRBG( @@ -881,8 +844,8 @@ LIB_EXPORT UINT16 DRBG_Generate( } else { - LOG_FAILURE(FATAL_ERROR_INTERNAL); - return FALSE; + // invalid DRBG state structure + FAIL_IMMEDIATE(FATAL_ERROR_INTERNAL, 0); } return randomSize; } diff --git a/TPMCmd/tpm/src/crypt/CryptRsa.c b/TPMCmd/tpm/src/crypt/CryptRsa.c index 63b62271..5c4e465e 100644 --- a/TPMCmd/tpm/src/crypt/CryptRsa.c +++ b/TPMCmd/tpm/src/crypt/CryptRsa.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // // This file contains implementation of cryptographic primitives for RSA. @@ -42,6 +8,7 @@ // Need this define to get the 'private' defines for this function #define CRYPT_RSA_C #include "Tpm.h" +#include "TpmMath_Util_fp.h" #if ALG_RSA @@ -67,15 +34,20 @@ BOOL CryptRsaStartup(void) // This function initializes the bignum data structure that holds the private // exponent. This function returns the pointer to the private exponent value so that // it can be used in an initializer for a data declaration. + static privateExponent* RsaInitializeExponent(privateExponent* Z) { - bigNum* bn = (bigNum*)&Z->P; - int i; + // verify privateExponent packing matches the usage of the bn pointer as an + // array in below function + MUST_BE(offsetof(privateExponent, Q) == SIZEOF_MEMBER(privateExponent, P)); + + Crypt_Int** bn = (Crypt_Int**)&Z->P; + int i; // for(i = 0; i < 5; i++) { - bn[i] = (bigNum)&Z->entries[i]; - BnInit(bn[i], BYTES_TO_CRYPT_WORDS(sizeof(Z->entries[0].d))); + bn[i] = (Crypt_Int*)&(Z->entries[i]); + ExtMath_Initialize_Int(bn[i], MAX_RSA_KEY_BITS / 2); } return Z; } @@ -84,11 +56,11 @@ static privateExponent* RsaInitializeExponent(privateExponent* Z) // This function swaps the pointers for P and Q if Q happens to be larger than Q. static void MakePgreaterThanQ(privateExponent* Z) { - if(BnUnsignedCmp(Z->P, Z->Q) < 0) + if(ExtMath_UnsignedCmp(Z->P, Z->Q) < 0) { - bigNum bnT = Z->P; - Z->P = Z->Q; - Z->Q = bnT; + Crypt_Int* bnT = Z->P; + Z->P = Z->Q; + Z->Q = bnT; } } @@ -107,13 +79,14 @@ static void MakePgreaterThanQ(privateExponent* Z) static BOOL PackExponent(TPM2B_PRIVATE_KEY_RSA* packed, privateExponent* Z) { int i; - UINT16 primeSize = (UINT16)BITS_TO_BYTES(BnMsb(Z->P)); + UINT16 primeSize = (UINT16)BITS_TO_BYTES(ExtMath_MostSigBitNum(Z->P)); UINT16 pS = primeSize; // pAssert((primeSize * 5) <= sizeof(packed->t.buffer)); packed->t.size = (primeSize * 5) + RSA_prime_flag; for(i = 0; i < 5; i++) - if(!BnToBytes((bigNum)&Z->entries[i], &packed->t.buffer[primeSize * i], &pS)) + if(!ExtMath_IntToBytes( + (Crypt_Int*)&Z->entries[i], &packed->t.buffer[primeSize * i], &pS)) return FALSE; if(pS != primeSize) return FALSE; @@ -128,16 +101,18 @@ static BOOL PackExponent(TPM2B_PRIVATE_KEY_RSA* packed, privateExponent* Z) // FALSE(0) TPM2B is not the correct size static BOOL UnpackExponent(TPM2B_PRIVATE_KEY_RSA* b, privateExponent* Z) { - UINT16 primeSize = b->t.size & ~RSA_prime_flag; - int i; - bigNum* bn = &Z->P; + UINT16 primeSize = b->t.size & ~RSA_prime_flag; + int i; + Crypt_Int** bn = &Z->P; // - VERIFY(b->t.size & RSA_prime_flag); + GOTO_ERROR_UNLESS(b->t.size & RSA_prime_flag); RsaInitializeExponent(Z); - VERIFY((primeSize % 5) == 0); + GOTO_ERROR_UNLESS((primeSize % 5) == 0); primeSize /= 5; for(i = 0; i < 5; i++) - VERIFY(BnFromBytes(bn[i], &b->t.buffer[primeSize * i], primeSize) != NULL); + GOTO_ERROR_UNLESS( + ExtMath_IntFromBytes(bn[i], &b->t.buffer[primeSize * i], primeSize) + != NULL); MakePgreaterThanQ(Z); return TRUE; Error: @@ -150,31 +125,31 @@ static BOOL UnpackExponent(TPM2B_PRIVATE_KEY_RSA* b, privateExponent* Z) // TRUE(1) success // FALSE(0) failure static BOOL ComputePrivateExponent( - bigNum pubExp, // IN: the public exponent + Crypt_Int* pubExp, // IN: the public exponent privateExponent* Z // IN/OUT: on input, has primes P and Q. On // output, has P, Q, dP, dQ, and pInv ) { BOOL pOK; BOOL qOK; - BN_PRIME(pT); + CRYPT_PRIME_VAR(pT); // // make p the larger value so that m2 is always less than p MakePgreaterThanQ(Z); //dP = (1/e) mod (p-1) - pOK = BnSubWord(pT, Z->P, 1); - pOK = pOK && BnModInverse(Z->dP, pubExp, pT); + pOK = ExtMath_SubtractWord(pT, Z->P, 1); + pOK = pOK && ExtMath_ModInverse(Z->dP, pubExp, pT); //dQ = (1/e) mod (q-1) - qOK = BnSubWord(pT, Z->Q, 1); - qOK = qOK && BnModInverse(Z->dQ, pubExp, pT); + qOK = ExtMath_SubtractWord(pT, Z->Q, 1); + qOK = qOK && ExtMath_ModInverse(Z->dQ, pubExp, pT); // qInv = (1/q) mod p if(pOK && qOK) - pOK = qOK = BnModInverse(Z->qInv, Z->Q, Z->P); + pOK = qOK = ExtMath_ModInverse(Z->qInv, Z->Q, Z->P); if(!pOK) - BnSetWord(Z->P, 0); + ExtMath_SetWord(Z->P, 0); if(!qOK) - BnSetWord(Z->Q, 0); + ExtMath_SetWord(Z->Q, 0); return pOK && qOK; } @@ -185,27 +160,27 @@ static BOOL ComputePrivateExponent( // Return Type: BOOL // TRUE(1) success // FALSE(0) failure -static BOOL RsaPrivateKeyOp(bigNum inOut, // IN/OUT: number to be exponentiated +static BOOL RsaPrivateKeyOp(Crypt_Int* inOut, // IN/OUT: number to be exponentiated privateExponent* Z) { - BN_RSA(M1); - BN_RSA(M2); - BN_RSA(M); - BN_RSA(H); + CRYPT_RSA_VAR(M1); + CRYPT_RSA_VAR(M2); + CRYPT_RSA_VAR(M); + CRYPT_RSA_VAR(H); // MakePgreaterThanQ(Z); // m1 = cdP mod p - VERIFY(BnModExp(M1, inOut, Z->dP, Z->P)); + GOTO_ERROR_UNLESS(ExtMath_ModExp(M1, inOut, Z->dP, Z->P)); // m2 = cdQ mod q - VERIFY(BnModExp(M2, inOut, Z->dQ, Z->Q)); + GOTO_ERROR_UNLESS(ExtMath_ModExp(M2, inOut, Z->dQ, Z->Q)); // h = qInv * (m1 - m2) mod p = qInv * (m1 + P - m2) mod P because Q < P // so m2 < P - VERIFY(BnSub(H, Z->P, M2)); - VERIFY(BnAdd(H, H, M1)); - VERIFY(BnModMult(H, H, Z->qInv, Z->P)); + GOTO_ERROR_UNLESS(ExtMath_Subtract(H, Z->P, M2)); + GOTO_ERROR_UNLESS(ExtMath_Add(H, H, M1)); + GOTO_ERROR_UNLESS(ExtMath_ModMult(H, H, Z->qInv, Z->P)); // m = m2 + h * q - VERIFY(BnMult(M, H, Z->Q)); - VERIFY(BnAdd(inOut, M2, M)); + GOTO_ERROR_UNLESS(ExtMath_Multiply(M, H, Z->Q)); + GOTO_ERROR_UNLESS(ExtMath_Add(inOut, M2, M)); return TRUE; Error: return FALSE; @@ -261,7 +236,7 @@ static TPM_RC RSADP(TPM2B* inOut, // IN/OUT: the value to encrypt OBJECT* key // IN: the key ) { - BN_RSA_INITIALIZED(bnM, inOut); + CRYPT_RSA_INITIALIZED(bnM, inOut); NEW_PRIVATE_EXPONENT(Z); if(UnsignedCompareB(inOut->size, inOut->buffer, @@ -279,9 +254,9 @@ static TPM_RC RSADP(TPM2B* inOut, // IN/OUT: the value to encrypt != TPM_RC_SUCCESS) return TPM_RC_BINDING; } - VERIFY(UnpackExponent(&key->sensitive.sensitive.rsa, Z)); - VERIFY(RsaPrivateKeyOp(bnM, Z)); - VERIFY(BnTo2B(bnM, inOut, inOut->size)); + GOTO_ERROR_UNLESS(UnpackExponent(&key->sensitive.sensitive.rsa, Z)); + GOTO_ERROR_UNLESS(RsaPrivateKeyOp(bnM, Z)); + GOTO_ERROR_UNLESS(TpmMath_IntTo2B(bnM, inOut, inOut->size)); return TPM_RC_SUCCESS; Error: return TPM_RC_FAILURE; @@ -323,17 +298,17 @@ static TPM_RC OaepEncode( // Basic size checks // make sure digest isn't too big for key size if(padded->size < (2 * hLen) + 2) - ERROR_RETURN(TPM_RC_HASH); + ERROR_EXIT(TPM_RC_HASH); // and that message will fit messageSize <= k - 2hLen - 2 if(message->size > (padded->size - (2 * hLen) - 2)) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); // Hash L even if it is null // Offset into padded leaving room for masked seed and byte of zero pp = &padded->buffer[hLen + 1]; if(CryptHashBlock(hashAlg, label->size, (BYTE*)label->buffer, hLen, pp) != hLen) - ERROR_RETURN(TPM_RC_FAILURE); + ERROR_EXIT(TPM_RC_FAILURE); // concatenate PS of k mLen 2hLen 2 padLen = padded->size - message->size - (2 * hLen) - 2; @@ -345,12 +320,9 @@ static TPM_RC OaepEncode( // The total size of db = hLen + pad + mSize; dbSize = hLen + padLen + message->size; - // If testing, then use the provided seed. Otherwise, use values - // from the RNG - CryptRandomGenerate(hLen, mySeed); DRBG_Generate(rand, mySeed, (UINT16)hLen); if(g_inFailureMode) - ERROR_RETURN(TPM_RC_FAILURE); + ERROR_EXIT(TPM_RC_FAILURE); // mask = MGF1 (seed, nSize hLen 1) CryptMGF_KDF(dbSize, mask, hashAlg, hLen, seed, 0); @@ -363,7 +335,7 @@ static TPM_RC OaepEncode( // Run the masked data through MGF1 if(CryptMGF_KDF(hLen, &padded->buffer[1], hashAlg, dbSize, pp, 0) != (unsigned)hLen) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); // Now XOR the seed to create masked seed pp = &padded->buffer[1]; pm = seed; @@ -411,7 +383,7 @@ static TPM_RC OaepDecode( // Strange size (anything smaller can't be an OAEP padded block) // Also check for no leading 0 if((padded->size < (unsigned)((2 * hLen) + 2)) || (padded->buffer[0] != 0)) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); // Use the hash size to determine what to put through MGF1 in order // to recover the seedMask CryptMGF_KDF(hLen, @@ -443,7 +415,7 @@ static TPM_RC OaepDecode( != hLen) FAIL(FATAL_ERROR_INTERNAL); if(memcmp(seedMask, mask, hLen) != 0) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); // find the start of the data pm = &mask[hLen]; @@ -454,7 +426,7 @@ static TPM_RC OaepDecode( } // If we ran out of data or didn't end with 0x01, then return an error if(i == 0 || pm[-1] != 0x01) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); // pm should be pointing at the first part of the data // and i is one greater than the number of bytes to move @@ -674,7 +646,7 @@ static TPM_RC PssDecode( // check the hash scheme if(hLen == 0) - ERROR_RETURN(TPM_RC_SCHEME); + ERROR_EXIT(TPM_RC_SCHEME); // most significant bit must be zero fail = pe[0] & 0x80; @@ -767,10 +739,10 @@ MakeDerTag(TPM_ALG_ID hashAlg, INT16 sizeOfBuffer, BYTE* buffer) HASH_DEF* info = CryptGetHashDef(hashAlg); INT16 oidSize; // If no OID, can't do encode - VERIFY(info != NULL); + GOTO_ERROR_UNLESS(info != NULL); oidSize = 2 + (info->OID)[1]; // make sure this fits in the buffer - VERIFY(sizeOfBuffer >= (oidSize + 8)); + GOTO_ERROR_UNLESS(sizeOfBuffer >= (oidSize + 8)); *buffer++ = 0x30; // 1st SEQUENCE // Size of the 1st SEQUENCE is 6 bytes + size of the hash OID + size of the // digest size @@ -812,18 +784,18 @@ static TPM_RC RSASSA_Encode(TPM2B* pOut, // IN:OUT on in, the size of the publi // Can't use this scheme if the algorithm doesn't have a DER string defined. if(derSize == 0) - ERROR_RETURN(TPM_RC_SCHEME); + ERROR_EXIT(TPM_RC_SCHEME); // If the digest size of 'hashAl' doesn't match the input digest size, then // the DER will misidentify the digest so return an error if(CryptHashGetDigestSize(hashAlg) != hIn->size) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); fillSize = pOut->size - derSize - hIn->size - 3; eOut = pOut->buffer; // Make sure that this combination will fit in the provided space if(fillSize < 8) - ERROR_RETURN(TPM_RC_SIZE); + ERROR_EXIT(TPM_RC_SIZE); // Start filling *eOut++ = 0; // initial byte of zero @@ -870,7 +842,7 @@ static TPM_RC RSASSA_Decode( // Can't use this scheme if the algorithm doesn't have a DER string // defined or if the provided hash isn't the right size if(derSize == 0 || (unsigned)hashSize != hIn->size) - ERROR_RETURN(TPM_RC_SCHEME); + ERROR_EXIT(TPM_RC_SCHEME); // Make sure that this combination will fit in the provided space // Since no data movement takes place, can just walk though this @@ -962,33 +934,34 @@ CryptRsaLoadPrivateExponent(TPMT_PUBLIC* publicArea, TPMT_SENSITIVE* sensitive) if((sensitive->sensitive.rsa.t.size * 2) == publicArea->unique.rsa.t.size) { NEW_PRIVATE_EXPONENT(Z); - BN_RSA_INITIALIZED(bnN, &publicArea->unique.rsa); - BN_RSA(bnQr); - BN_VAR(bnE, RADIX_BITS); + CRYPT_RSA_INITIALIZED(bnN, &publicArea->unique.rsa); + CRYPT_RSA_VAR(bnQr); + CRYPT_INT_VAR(bnE, RADIX_BITS); - TEST(TPM_ALG_NULL); + TPM_DO_SELF_TEST(TPM_ALG_NULL); - VERIFY((sensitive->sensitive.rsa.t.size * 2) - == publicArea->unique.rsa.t.size); + GOTO_ERROR_UNLESS((sensitive->sensitive.rsa.t.size * 2) + == publicArea->unique.rsa.t.size); // Initialize the exponent - BnSetWord(bnE, publicArea->parameters.rsaDetail.exponent); - if(BnEqualZero(bnE)) - BnSetWord(bnE, RSA_DEFAULT_PUBLIC_EXPONENT); + ExtMath_SetWord(bnE, publicArea->parameters.rsaDetail.exponent); + if(ExtMath_IsZero(bnE)) + ExtMath_SetWord(bnE, RSA_DEFAULT_PUBLIC_EXPONENT); // Convert first prime to 2B - VERIFY(BnFrom2B(Z->P, &sensitive->sensitive.rsa.b) != NULL); + GOTO_ERROR_UNLESS( + TpmMath_IntFrom2B(Z->P, &sensitive->sensitive.rsa.b) != NULL); // Find the second prime by division. This uses 'bQ' rather than Z->Q // because the division could make the quotient larger than a prime during // some intermediate step. - VERIFY(BnDiv(Z->Q, bnQr, bnN, Z->P)); - VERIFY(BnEqualZero(bnQr)); + GOTO_ERROR_UNLESS(ExtMath_Divide(Z->Q, bnQr, bnN, Z->P)); + GOTO_ERROR_UNLESS(ExtMath_IsZero(bnQr)); // Compute the private exponent and return it if found - VERIFY(ComputePrivateExponent(bnE, Z)); - VERIFY(PackExponent(&sensitive->sensitive.rsa, Z)); + GOTO_ERROR_UNLESS(ComputePrivateExponent(bnE, Z)); + GOTO_ERROR_UNLESS(PackExponent(&sensitive->sensitive.rsa, Z)); } else - VERIFY(((sensitive->sensitive.rsa.t.size / 5) * 2) - == publicArea->unique.rsa.t.size); + GOTO_ERROR_UNLESS(((sensitive->sensitive.rsa.t.size / 5) * 2) + == publicArea->unique.rsa.t.size); sensitive->sensitive.rsa.t.size |= RSA_prime_flag; } return TPM_RC_SUCCESS; @@ -1040,7 +1013,7 @@ LIB_EXPORT TPM_RC CryptRsaEncrypt( } // All encryption schemes return the same size of data cOut->t.size = key->publicArea.unique.rsa.t.size; - TEST(scheme->scheme); + TPM_DO_SELF_TEST(scheme->scheme); switch(scheme->scheme) { @@ -1055,7 +1028,7 @@ LIB_EXPORT TPM_RC CryptRsaEncrypt( ; dSize -= i; if(dSize > cOut->t.size) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); // Pad cOut with zeros if dIn is smaller memset(cOut->t.buffer, 0, cOut->t.size - dSize); // And copy the rest of the value @@ -1073,7 +1046,7 @@ LIB_EXPORT TPM_RC CryptRsaEncrypt( OaepEncode(&cOut->b, scheme->details.oaep.hashAlg, label, dIn, rand); break; default: - ERROR_RETURN(TPM_RC_SCHEME); + ERROR_EXIT(TPM_RC_SCHEME); break; } // All the schemes that do padding will come here for the encryption step @@ -1112,9 +1085,9 @@ LIB_EXPORT TPM_RC CryptRsaDecrypt( // Size is checked to make sure that the encrypted value is the right size if(cIn->size != key->publicArea.unique.rsa.t.size) - ERROR_RETURN(TPM_RC_SIZE); + ERROR_EXIT(TPM_RC_SIZE); - TEST(scheme->scheme); + TPM_DO_SELF_TEST(scheme->scheme); // For others that do padding, do the decryption in place and then // go handle the decoding. @@ -1170,7 +1143,7 @@ LIB_EXPORT TPM_RC CryptRsaSign(TPMT_SIGNATURE* sigOut, // for all non-null signatures, the size is the size of the key modulus sigOut->signature.rsapss.sig.t.size = modSize; - TEST(sigOut->sigAlg); + TPM_DO_SELF_TEST(sigOut->sigAlg); switch(sigOut->sigAlg) { @@ -1229,9 +1202,9 @@ LIB_EXPORT TPM_RC CryptRsaValidateSignature( // Errors that might be caused by calling parameters if(sig->signature.rsassa.sig.t.size != key->publicArea.unique.rsa.t.size) - ERROR_RETURN(TPM_RC_SIGNATURE); + ERROR_EXIT(TPM_RC_SIGNATURE); - TEST(sig->sigAlg); + TPM_DO_SELF_TEST(sig->sigAlg); // Decrypt the block retVal = RSAEP(&sig->signature.rsassa.sig.b, key); @@ -1262,7 +1235,7 @@ extern int s_rsaKeyCacheEnabled; int GetCachedRsaKey( TPMT_PUBLIC* publicArea, TPMT_SENSITIVE* sensitive, RAND_STATE* rand); # define GET_CACHED_KEY(publicArea, sensitive, rand) \ - (s_rsaKeyCacheEnabled && GetCachedRsaKey(publicArea, sensitive, rand)) + (s_rsaKeyCacheEnabled && GetCachedRsaKey(publicArea, sensitive, rand)) # else # define GET_CACHED_KEY(key, rand) # endif @@ -1308,9 +1281,9 @@ LIB_EXPORT TPM_RC CryptRsaGenerateKey( ) { UINT32 i; - BN_RSA(bnD); - BN_RSA(bnN); - BN_WORD(bnPubExp); + CRYPT_RSA_VAR(bnD); + CRYPT_RSA_VAR(bnN); + CRYPT_INT_WORD(bnPubExp); UINT32 e = publicArea->parameters.rsaDetail.exponent; int keySizeInBits; TPM_RC retVal = TPM_RC_NO_RESULT; @@ -1325,19 +1298,19 @@ LIB_EXPORT TPM_RC CryptRsaGenerateKey( else { if(e < 65537) - ERROR_RETURN(TPM_RC_RANGE); + ERROR_EXIT(TPM_RC_RANGE); // Check that e is prime if(!IsPrimeInt(e)) - ERROR_RETURN(TPM_RC_RANGE); + ERROR_EXIT(TPM_RC_RANGE); } - BnSetWord(bnPubExp, e); + ExtMath_SetWord(bnPubExp, e); // check for supported key size. keySizeInBits = publicArea->parameters.rsaDetail.keyBits; if(((keySizeInBits % 1024) != 0) || (keySizeInBits > MAX_RSA_KEY_BITS) // this might be redundant, but... || (keySizeInBits == 0)) - ERROR_RETURN(TPM_RC_VALUE); + ERROR_EXIT(TPM_RC_VALUE); // Set the prime size for instrumentation purposes INSTRUMENT_SET(PrimeIndex, PRIME_INDEX(keySizeInBits / 2)); @@ -1348,7 +1321,7 @@ LIB_EXPORT TPM_RC CryptRsaGenerateKey( # endif // Make sure that key generation has been tested - TEST(TPM_ALG_NULL); + TPM_DO_SELF_TEST(TPM_ALG_NULL); // The prime is computed in P. When a new prime is found, Q is checked to // see if it is zero. If so, P is copied to Q and a new P is found. @@ -1361,9 +1334,10 @@ LIB_EXPORT TPM_RC CryptRsaGenerateKey( for(i = 1; (retVal == TPM_RC_NO_RESULT) && (i != 100); i++) { if(_plat__IsCanceled()) - ERROR_RETURN(TPM_RC_CANCELED); + ERROR_EXIT(TPM_RC_CANCELED); - if(BnGeneratePrimeForRSA(Z->P, keySizeInBits / 2, e, rand) == TPM_RC_FAILURE) + if(TpmRsa_GeneratePrimeForRSA(Z->P, keySizeInBits / 2, e, rand) + == TPM_RC_FAILURE) { retVal = TPM_RC_FAILURE; goto Exit; @@ -1373,24 +1347,24 @@ LIB_EXPORT TPM_RC CryptRsaGenerateKey( // If this is the second prime, make sure that it differs from the // first prime by at least 2^100 - if(BnEqualZero(Z->Q)) + if(ExtMath_IsZero(Z->Q)) { // copy p to q and compute another prime in p - BnCopy(Z->Q, Z->P); + ExtMath_Copy(Z->Q, Z->P); continue; } // Make sure that the difference is at least 100 bits. Need to do it this // way because the big numbers are only positive values - if(BnUnsignedCmp(Z->P, Z->Q) < 0) - BnSub(bnD, Z->Q, Z->P); + if(ExtMath_UnsignedCmp(Z->P, Z->Q) < 0) + ExtMath_Subtract(bnD, Z->Q, Z->P); else - BnSub(bnD, Z->P, Z->Q); - if(BnMsb(bnD) < 100) + ExtMath_Subtract(bnD, Z->P, Z->Q); + if(ExtMath_MostSigBitNum(bnD) < 100) continue; //Form the public modulus and set the unique value - BnMult(bnN, Z->P, Z->Q); - BnTo2B( + ExtMath_Multiply(bnN, Z->P, Z->Q); + TpmMath_IntTo2B( bnN, &publicArea->unique.rsa.b, (NUMBYTES)BITS_TO_BYTES(keySizeInBits)); // Make sure everything came out right. The MSb of the values must be one if(((publicArea->unique.rsa.t.buffer[0] & 0x80) == 0) @@ -1404,8 +1378,8 @@ LIB_EXPORT TPM_RC CryptRsaGenerateKey( // If ComputePrivateExponent could not find an inverse for // Q, then copy P and recompute P. This might // cause both to be recomputed if P is also zero - if(BnEqualZero(Z->Q)) - BnCopy(Z->Q, Z->P); + if(ExtMath_IsZero(Z->Q)) + ExtMath_Copy(Z->Q, Z->P); continue; } @@ -1420,20 +1394,20 @@ LIB_EXPORT TPM_RC CryptRsaGenerateKey( // Do a trial encryption decryption if this is a signing key if(IS_ATTRIBUTE(publicArea->objectAttributes, TPMA_OBJECT, sign)) { - BN_RSA(temp1); - BN_RSA(temp2); - BnGenerateRandomInRange(temp1, bnN, rand); + CRYPT_RSA_VAR(temp1); + CRYPT_RSA_VAR(temp2); + TpmMath_GetRandomInRange(temp1, bnN, rand); // Encrypt with public exponent... - BnModExp(temp2, temp1, bnPubExp, bnN); + ExtMath_ModExp(temp2, temp1, bnPubExp, bnN); // ... then decrypt with private exponent RsaPrivateKeyOp(temp2, Z); // If the starting and ending values are not the same, // start over )-; - if(BnUnsignedCmp(temp2, temp1) != 0) + if(ExtMath_UnsignedCmp(temp2, temp1) != 0) { - BnSetWord(Z->Q, 0); + ExtMath_SetWord(Z->Q, 0); retVal = TPM_RC_NO_RESULT; } } diff --git a/TPMCmd/tpm/src/crypt/CryptSelfTest.c b/TPMCmd/tpm/src/crypt/CryptSelfTest.c index bc8d3e13..efa1fe3b 100644 --- a/TPMCmd/tpm/src/crypt/CryptSelfTest.c +++ b/TPMCmd/tpm/src/crypt/CryptSelfTest.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // The functions in this file are designed to support self-test of cryptographic // functions in the TPM. The TPM allows the user to decide whether to run self-test @@ -90,7 +56,7 @@ TPM_RC CryptSelfTest(TPMI_YES_NO fullTest // IN: if full test is required ) { -#if SIMULATION +#if ALLOW_FORCE_FAILURE_MODE if(g_forceFailureMode) FAIL(FATAL_ERROR_FORCED); #endif @@ -191,7 +157,7 @@ TPM_RC CryptTestAlgorithm(TPM_ALG_ID alg, ALGORITHM_VECTOR* toTest) { TPM_RC result; -#if SELF_TEST +#if ENABLE_SELF_TESTS result = TestAlgorithm(alg, toTest); #else // If this is an attempt to determine the algorithms for which there is a diff --git a/TPMCmd/tpm/src/crypt/CryptSmac.c b/TPMCmd/tpm/src/crypt/CryptSmac.c index 3da1cf59..97ca07c6 100644 --- a/TPMCmd/tpm/src/crypt/CryptSmac.c +++ b/TPMCmd/tpm/src/crypt/CryptSmac.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // // This file contains the implementation of the message authentication codes based diff --git a/TPMCmd/tpm/src/crypt/CryptSym.c b/TPMCmd/tpm/src/crypt/CryptSym.c index a6bfbfce..eea10a7f 100644 --- a/TPMCmd/tpm/src/crypt/CryptSym.c +++ b/TPMCmd/tpm/src/crypt/CryptSym.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // // This file contains the implementation of the symmetric block cipher modes @@ -43,10 +9,10 @@ #include "CryptSym.h" -#define KEY_BLOCK_SIZES(ALG, alg) \ - static const INT16 alg##KeyBlockSizes[] = {ALG##_KEY_SIZES_BITS, \ - -1, \ - ALG##_BLOCK_SIZES}; +#define KEY_BLOCK_SIZES(ALG, alg) \ + static const INT16 alg##KeyBlockSizes[] = {ALG##_KEY_SIZES_BITS, \ + -1, \ + ALG##_BLOCK_SIZES}; FOR_EACH_SYM(KEY_BLOCK_SIZES) @@ -83,16 +49,16 @@ LIB_EXPORT INT16 CryptGetSymmetricBlockSize( { const INT16* sizes; INT16 i; -#define ALG_CASE(SYM, sym) \ - case TPM_ALG_##SYM: \ - sizes = sym##KeyBlockSizes; \ - break +#define ALG_CASE(SYM, sym) \ + case TPM_ALG_##SYM: \ + sizes = sym##KeyBlockSizes; \ + break switch(symmetricAlg) { #define GET_KEY_BLOCK_POINTER(SYM, sym) \ - case TPM_ALG_##SYM: \ - sizes = sym##KeyBlockSizes; \ - break; + case TPM_ALG_##SYM: \ + sizes = sym##KeyBlockSizes; \ + break; // Get the pointer to the block size array FOR_EACH_SYM(GET_KEY_BLOCK_POINTER); @@ -150,7 +116,7 @@ LIB_EXPORT TPM_RC CryptSymmetricEncrypt( if(dSize == 0) return TPM_RC_SUCCESS; - TEST(algorithm); + TPM_DO_SELF_TEST(algorithm); blockSize = CryptGetSymmetricBlockSize(algorithm, keySizeInBits); if(blockSize == 0) return TPM_RC_FAILURE; @@ -311,7 +277,7 @@ LIB_EXPORT TPM_RC CryptSymmetricDecrypt( if(dSize == 0) return TPM_RC_SUCCESS; - TEST(algorithm); + TPM_DO_SELF_TEST(algorithm); blockSize = CryptGetSymmetricBlockSize(algorithm, keySizeInBits); if(blockSize == 0) return TPM_RC_FAILURE; @@ -458,9 +424,5 @@ CryptSymKeyValidate(TPMT_SYM_DEF_OBJECT* symDef, TPM2B_SYM_KEY* key) { if(key->t.size != BITS_TO_BYTES(symDef->keyBits.sym)) return TPM_RCS_KEY_SIZE; -#if ALG_TDES - if(symDef->algorithm == TPM_ALG_TDES && !CryptDesValidateKey(key)) - return TPM_RCS_KEY; -#endif // ALG_TDES return TPM_RC_SUCCESS; } diff --git a/TPMCmd/tpm/src/crypt/CryptUtil.c b/TPMCmd/tpm/src/crypt/CryptUtil.c index 52fcd0b7..4fada2c9 100644 --- a/TPMCmd/tpm/src/crypt/CryptUtil.c +++ b/TPMCmd/tpm/src/crypt/CryptUtil.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // // This module contains the interfaces to the CryptoEngine and provides @@ -347,12 +313,6 @@ static TPM_RC CryptGenerateKeySymmetric( &sensitiveCreate->data.b, sizeof(sensitive->sensitive.sym.t.buffer)); } -#if ALG_TDES - else if(publicArea->parameters.symDetail.sym.algorithm == TPM_ALG_TDES) - { - result = CryptGenerateKeyDes(publicArea, sensitive, rand); - } -#endif else { sensitive->sensitive.sym.t.size = DRBG_Generate( @@ -436,7 +396,7 @@ BOOL CryptInit(void) // Do any library initializations that are necessary. If any fails, // the caller should go into failure mode; - ok = SupportLibInit(); + ok = ExtMath_LibInit(); ok = ok && CryptSymInit(); ok = ok && CryptRandInit(); ok = ok && CryptHashInit(); @@ -540,17 +500,23 @@ CryptSecretEncrypt(OBJECT* encryptKey, // IN: encryption key object TPM2B_ENCRYPTED_SECRET* secret // OUT: secret structure ) { - TPMT_RSA_DECRYPT scheme; - TPM_RC result = TPM_RC_SUCCESS; + TPM_RC result = TPM_RC_SUCCESS; // if(data == NULL || secret == NULL) return TPM_RC_FAILURE; + // CryptKDFe was fixed to not add a NULL byte as per NIST.SP.800-56Cr2.pdf + // (required for ACVP tests). This check ensures backwards compatibility with + // previous versions of the TPM reference code by verifying the label itself + // has a NULL terminator. Note the TPM spec specifies that the label must be NULL + // terminated. This is only a "new" failure path in the sense that it adds a + // runtime check of hardcoded constants; provided the code is correct it will never + // fail, and running the compliance tests will verify this isn't hit. + if((label == NULL) || (label->size == 0) || (label->buffer[label->size - 1] != 0)) + return TPM_RC_FAILURE; + // The output secret value has the size of the digest produced by the nameAlg. data->t.size = CryptHashGetDigestSize(encryptKey->publicArea.nameAlg); - // The encryption scheme is OAEP using the nameAlg of the encrypt key. - scheme.scheme = TPM_ALG_OAEP; - scheme.details.anySig.hashAlg = encryptKey->publicArea.nameAlg; if(!IS_ATTRIBUTE(encryptKey->publicArea.objectAttributes, TPMA_OBJECT, decrypt)) return TPM_RC_ATTRIBUTES; @@ -559,6 +525,11 @@ CryptSecretEncrypt(OBJECT* encryptKey, // IN: encryption key object #if ALG_RSA case TPM_ALG_RSA: { + // The encryption scheme is OAEP using the nameAlg of the encrypt key. + TPMT_RSA_DECRYPT scheme; + scheme.scheme = TPM_ALG_OAEP; + scheme.details.anySig.hashAlg = encryptKey->publicArea.nameAlg; + // Create secret data from RNG CryptRandomGenerate(data->t.size, data->t.buffer); @@ -683,6 +654,16 @@ CryptSecretDecrypt(OBJECT* decryptKey, // IN: decrypt key { TPM_RC result = TPM_RC_SUCCESS; + // CryptKDFe was fixed to not add a NULL byte as per NIST.SP.800-56Cr2.pdf + // (required for ACVP tests). This check ensures backwards compatibility with + // previous versions of the TPM reference code by verifying the label itself + // has a NULL terminator. Note the TPM spec specifies that the label must be NULL + // terminated. This is only a "new" failure path in the sense that it adds a + // runtime check of hardcoded constants; provided the code is correct it will never + // fail, and running the compliance tests will verify this isn't hit. + if((label == NULL) || (label->size == 0) || (label->buffer[label->size - 1] != 0)) + return TPM_RC_FAILURE; + // Decryption for secret switch(decryptKey->publicArea.type) { @@ -835,7 +816,7 @@ CryptSecretDecrypt(OBJECT* decryptKey, // IN: decrypt key iv.b.buffer, nonceCaller->t.buffer, nonceCaller->t.size); } // make sure secret will fit - if(secret->t.size > data->t.size) + if(secret->t.size > sizeof(data->t.buffer)) return TPM_RC_FAILURE; data->t.size = secret->t.size; // CFB decrypt, using nonceCaller as iv @@ -961,8 +942,7 @@ CryptParameterDecryption( // Parameter encryption for a non-2B is not supported. if(leadingSizeInByte != 2) { - FAIL(FATAL_ERROR_INTERNAL); - return TPM_RC_FAILURE; + FAIL_RC(FATAL_ERROR_INTERNAL); } // Retrieve encrypted data size. diff --git a/TPMCmd/tpm/src/crypt/PrimeData.c b/TPMCmd/tpm/src/crypt/PrimeData.c index b24af021..9788db38 100644 --- a/TPMCmd/tpm/src/crypt/PrimeData.c +++ b/TPMCmd/tpm/src/crypt/PrimeData.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" // This table is the product of all of the primes up to 1000. @@ -39,7 +5,7 @@ // and this number will eliminate many prime candidates from // consideration before running Miller-Rabin on the result. -const BN_STRUCT(43 * RADIX_BITS) s_CompositeOfSmallPrimes_ = +const CRYPT_INT_BUF(smallprimecomp, 43 * RADIX_BITS) s_CompositeOfSmallPrimes_ = {44, 44, {0x2ED42696, 0x2BBFA177, 0x4820594F, 0xF73F4841, 0xBFAC313A, 0xCAC3EB81, 0xF6F26BF8, 0x7FAB5061, 0x59746FB7, 0xF71377F6, 0x3B19855B, 0xCBD03132, 0xBB92EF1B, 0x3AC3152C, 0xE87C8273, 0xC0AE0E69, 0x74A9E295, 0x448CCE86, @@ -49,7 +15,8 @@ const BN_STRUCT(43 * RADIX_BITS) s_CompositeOfSmallPrimes_ = 0x96658ED2, 0x1753EFE5, 0x3AE4A5A6, 0x8FD4A97F, 0x8B15E7EB, 0x0243C3E1, 0xE0F0C31D, 0x0000000B}}; -bigConst s_CompositeOfSmallPrimes = (const bigNum)&s_CompositeOfSmallPrimes_; +const Crypt_Int* s_CompositeOfSmallPrimes = + (const Crypt_Int*)&s_CompositeOfSmallPrimes_; // This table contains a bit for each of the odd values between 1 and 2^16 + 1. // This table allows fast checking of the primes in that range. diff --git a/TPMCmd/tpm/src/crypt/RsaKeyCache.c b/TPMCmd/tpm/src/crypt/RsaKeyCache.c index d538bf6b..561331d4 100644 --- a/TPMCmd/tpm/src/crypt/RsaKeyCache.c +++ b/TPMCmd/tpm/src/crypt/RsaKeyCache.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the functions to implement the RSA key cache that can be used // to speed up simulation. diff --git a/TPMCmd/tpm/src/crypt/Ticket.c b/TPMCmd/tpm/src/crypt/Ticket.c index bc321c3c..66a1e781 100644 --- a/TPMCmd/tpm/src/crypt/Ticket.c +++ b/TPMCmd/tpm/src/crypt/Ticket.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction /* This clause contains the functions used for ticket computations. @@ -82,24 +48,29 @@ BOOL TicketIsSafe(TPM2B* buffer) // digest the signed digest // keyName the Name of the key that signed digest */ -void TicketComputeVerified( +TPM_RC TicketComputeVerified( TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant for ticket TPM2B_DIGEST* digest, // IN: digest TPM2B_NAME* keyName, // IN: name of key that signed the values TPMT_TK_VERIFIED* ticket // OUT: verified ticket ) { - TPM2B_PROOF* proof; - HMAC_STATE hmacState; + TPM_RC result = TPM_RC_SUCCESS; + TPM2B_PROOF proof; + HMAC_STATE hmacState; // // Fill in ticket fields ticket->tag = TPM_ST_VERIFIED; ticket->hierarchy = hierarchy; - proof = HierarchyGetProof(hierarchy); + result = HierarchyGetProof(hierarchy, &proof); + if(result != TPM_RC_SUCCESS) + return result; // Start HMAC using the proof value of the hierarchy as the HMAC key ticket->digest.t.size = - CryptHmacStart2B(&hmacState, CONTEXT_INTEGRITY_HASH_ALG, &proof->b); + CryptHmacStart2B(&hmacState, CONTEXT_INTEGRITY_HASH_ALG, &proof.b); + MemorySet(proof.b.buffer, 0, proof.b.size); + // TPM_ST_VERIFIED CryptDigestUpdateInt(&hmacState, sizeof(TPM_ST), ticket->tag); // digest @@ -109,7 +80,7 @@ void TicketComputeVerified( // done CryptHmacEnd2B(&hmacState, &ticket->digest.b); - return; + return TPM_RC_SUCCESS; } //*** TicketComputeAuth() @@ -130,7 +101,7 @@ void TicketComputeVerified( // policyRef optional reference to a policy value // keyName name of the key that signed the authorization */ -void TicketComputeAuth( +TPM_RC TicketComputeAuth( TPM_ST type, // IN: the type of ticket. TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant for ticket UINT64 timeout, // IN: timeout @@ -142,11 +113,14 @@ void TicketComputeAuth( TPMT_TK_AUTH* ticket // OUT: Created ticket ) { - TPM2B_PROOF* proof; - HMAC_STATE hmacState; + TPM_RC result = TPM_RC_SUCCESS; + TPM2B_PROOF proof; + HMAC_STATE hmacState; // // Get proper proof - proof = HierarchyGetProof(hierarchy); + result = HierarchyGetProof(hierarchy, &proof); + if(result != TPM_RC_SUCCESS) + return result; // Fill in ticket fields ticket->tag = type; @@ -154,7 +128,9 @@ void TicketComputeAuth( // Start HMAC with hierarchy proof as the HMAC key ticket->digest.t.size = - CryptHmacStart2B(&hmacState, CONTEXT_INTEGRITY_HASH_ALG, &proof->b); + CryptHmacStart2B(&hmacState, CONTEXT_INTEGRITY_HASH_ALG, &proof.b); + MemorySet(proof.b.buffer, 0, proof.b.size); + // TPM_ST_AUTH_SECRET or TPM_ST_AUTH_SIGNED, CryptDigestUpdateInt(&hmacState, sizeof(UINT16), ticket->tag); // cpHash @@ -177,7 +153,7 @@ void TicketComputeAuth( // done CryptHmacEnd2B(&hmacState, &ticket->digest.b); - return; + return TPM_RC_SUCCESS; } //*** TicketComputeHashCheck() @@ -192,18 +168,21 @@ void TicketComputeAuth( // a value to differentiate the tickets // digest the digest of the data */ -void TicketComputeHashCheck( +TPM_RC TicketComputeHashCheck( TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant for ticket TPM_ALG_ID hashAlg, // IN: the hash algorithm for 'digest' TPM2B_DIGEST* digest, // IN: input digest TPMT_TK_HASHCHECK* ticket // OUT: Created ticket ) { - TPM2B_PROOF* proof; - HMAC_STATE hmacState; + TPM_RC result = TPM_RC_SUCCESS; + TPM2B_PROOF proof; + HMAC_STATE hmacState; // // Get proper proof - proof = HierarchyGetProof(hierarchy); + result = HierarchyGetProof(hierarchy, &proof); + if(result != TPM_RC_SUCCESS) + return result; // Fill in ticket fields ticket->tag = TPM_ST_HASHCHECK; @@ -211,7 +190,9 @@ void TicketComputeHashCheck( // Start HMAC using hierarchy proof as HMAC key ticket->digest.t.size = - CryptHmacStart2B(&hmacState, CONTEXT_INTEGRITY_HASH_ALG, &proof->b); + CryptHmacStart2B(&hmacState, CONTEXT_INTEGRITY_HASH_ALG, &proof.b); + MemorySet(proof.b.buffer, 0, proof.b.size); + // TPM_ST_HASHCHECK CryptDigestUpdateInt(&hmacState, sizeof(TPM_ST), ticket->tag); // hash algorithm @@ -221,7 +202,7 @@ void TicketComputeHashCheck( // done CryptHmacEnd2B(&hmacState, &ticket->digest.b); - return; + return TPM_RC_SUCCESS; } //*** TicketComputeCreation() @@ -236,17 +217,20 @@ void TicketComputeHashCheck( // Name the Name of the object to which the creation data is to be associated // TPMS_CREATION_DATA the creation data structure associated with Name */ -void TicketComputeCreation(TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy for ticket - TPM2B_NAME* name, // IN: object name - TPM2B_DIGEST* creation, // IN: creation hash - TPMT_TK_CREATION* ticket // OUT: created ticket +TPM_RC TicketComputeCreation(TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy for ticket + TPM2B_NAME* name, // IN: object name + TPM2B_DIGEST* creation, // IN: creation hash + TPMT_TK_CREATION* ticket // OUT: created ticket ) { - TPM2B_PROOF* proof; - HMAC_STATE hmacState; + TPM_RC result = TPM_RC_SUCCESS; + TPM2B_PROOF proof; + HMAC_STATE hmacState; // Get proper proof - proof = HierarchyGetProof(hierarchy); + result = HierarchyGetProof(hierarchy, &proof); + if(result != TPM_RC_SUCCESS) + return result; // Fill in ticket fields ticket->tag = TPM_ST_CREATION; @@ -254,7 +238,9 @@ void TicketComputeCreation(TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy for ti // Start HMAC using hierarchy proof as HMAC key ticket->digest.t.size = - CryptHmacStart2B(&hmacState, CONTEXT_INTEGRITY_HASH_ALG, &proof->b); + CryptHmacStart2B(&hmacState, CONTEXT_INTEGRITY_HASH_ALG, &proof.b); + MemorySet(proof.b.buffer, 0, proof.b.size); + // TPM_ST_CREATION CryptDigestUpdateInt(&hmacState, sizeof(TPM_ST), ticket->tag); // name if provided @@ -265,5 +251,5 @@ void TicketComputeCreation(TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy for ti // Done CryptHmacEnd2B(&hmacState, &ticket->digest.b); - return; + return TPM_RC_SUCCESS; } \ No newline at end of file diff --git a/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_ECDAA.c b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_ECDAA.c new file mode 100644 index 00000000..f64d9d2e --- /dev/null +++ b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_ECDAA.c @@ -0,0 +1,96 @@ +#include "Tpm.h" +#include "TpmEcc_Signature_ECDAA_fp.h" +#include "TpmEcc_Signature_Util_fp.h" +#include "TpmMath_Debug_fp.h" +#include "TpmMath_Util_fp.h" + +#if ALG_ECC && ALG_ECDAA + +//*** TpmEcc_SignEcdaa() +// +// This function performs 's' = 'r' + 'T' * 'd' mod 'q' where +// 1) 'r' is a random, or pseudo-random value created in the commit phase +// 2) 'nonceK' is a TPM-generated, random value 0 < 'nonceK' < 'n' +// 3) 'T' is mod 'q' of "Hash"('nonceK' || 'digest'), and +// 4) 'd' is a private key. +// +// The signature is the tuple ('nonceK', 's') +// +// Regrettably, the parameters in this function kind of collide with the parameter +// names used in ECSCHNORR making for a lot of confusion. +// Return Type: TPM_RC +// TPM_RC_SCHEME unsupported hash algorithm +// TPM_RC_NO_RESULT cannot get values from random number generator +TPM_RC TpmEcc_SignEcdaa( + TPM2B_ECC_PARAMETER* nonceK, // OUT: 'nonce' component of the signature + Crypt_Int* bnS, // OUT: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in signing + Crypt_Int* bnD, // IN: the private key + const TPM2B_DIGEST* digest, // IN: the value to sign (mod 'q') + TPMT_ECC_SCHEME* scheme, // IN: signing scheme (contains the + // commit count value). + OBJECT* eccKey, // IN: The signing key + RAND_STATE* rand // IN: a random number state +) +{ + TPM_RC retVal; + TPM2B_ECC_PARAMETER r; + HASH_STATE state; + TPM2B_DIGEST T; + CRYPT_INT_MAX(bnT); + // + NOT_REFERENCED(rand); + if(!CryptGenerateR(&r, + &scheme->details.ecdaa.count, + eccKey->publicArea.parameters.eccDetail.curveID, + &eccKey->name)) + retVal = TPM_RC_VALUE; + else + { + // This allocation is here because 'r' doesn't have a value until + // CrypGenerateR() is done. + CRYPT_ECC_INITIALIZED(bnR, &r); + do + { + // generate nonceK such that 0 < nonceK < n + // use bnT as a temp. + if(!TpmEcc_GenPrivateScalar(bnT, E, rand)) + { + retVal = TPM_RC_NO_RESULT; + break; + } + TpmMath_IntTo2B(bnT, &nonceK->b, 0); + + T.t.size = CryptHashStart(&state, scheme->details.ecdaa.hashAlg); + if(T.t.size == 0) + { + retVal = TPM_RC_SCHEME; + } + else + { + CryptDigestUpdate2B(&state, &nonceK->b); + CryptDigestUpdate2B(&state, &digest->b); + CryptHashEnd2B(&state, &T.b); + TpmMath_IntFrom2B(bnT, &T.b); + // Watch out for the name collisions in this call!! + retVal = TpmEcc_SchnorrCalculateS( + bnS, + bnR, + bnT, + bnD, + ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E))); + } + } while(retVal == TPM_RC_NO_RESULT); + // Because the rule is that internal state is not modified if the command + // fails, only end the commit if the command succeeds. + // NOTE that if the result of the Schnorr computation was zero + // it will probably not be worthwhile to run the same command again because + // the result will still be zero. This means that the Commit command will + // need to be run again to get a new commit value for the signature. + if(retVal == TPM_RC_SUCCESS) + CryptEndCommit(scheme->details.ecdaa.count); + } + return retVal; +} + +#endif // ALG_ECC && ALG_ECDAA diff --git a/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_ECDSA.c b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_ECDSA.c new file mode 100644 index 00000000..f911b67e --- /dev/null +++ b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_ECDSA.c @@ -0,0 +1,176 @@ +#include "Tpm.h" +#include "TpmEcc_Signature_ECDSA_fp.h" +#include "TpmMath_Debug_fp.h" +#include "TpmMath_Util_fp.h" + +#if ALG_ECC && ALG_ECDSA +//*** TpmEcc_AdjustEcdsaDigest() +// Function to adjust the digest so that it is no larger than the order of the +// curve. This is used for ECDSA sign and verification. +static Crypt_Int* TpmEcc_AdjustEcdsaDigest( + Crypt_Int* bnD, // OUT: the adjusted digest + const TPM2B_DIGEST* digest, // IN: digest to adjust + const Crypt_Int* max // IN: value that indicates the maximum + // number of bits in the results +) +{ + int bitsInMax = ExtMath_SizeInBits(max); + int shift; + // + if(digest == NULL) + ExtMath_SetWord(bnD, 0); + else + { + ExtMath_IntFromBytes(bnD, + digest->t.buffer, + (NUMBYTES)MIN(digest->t.size, BITS_TO_BYTES(bitsInMax))); + shift = ExtMath_SizeInBits(bnD) - bitsInMax; + if(shift > 0) + ExtMath_ShiftRight(bnD, bnD, shift); + } + return bnD; +} + +//*** TpmEcc_SignEcdsa() +// This function implements the ECDSA signing algorithm. The method is described +// in the comments below. +TPM_RC +TpmEcc_SignEcdsa(Crypt_Int* bnR, // OUT: 'r' component of the signature + Crypt_Int* bnS, // OUT: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in the signature + // process + Crypt_Int* bnD, // IN: private signing key + const TPM2B_DIGEST* digest, // IN: the digest to sign + RAND_STATE* rand // IN: used in debug of signing +) +{ + CRYPT_ECC_NUM(bnK); + CRYPT_ECC_NUM(bnIk); + CRYPT_INT_VAR(bnE, MAX_ECC_KEY_BITS); + CRYPT_POINT_VAR(ecR); + CRYPT_ECC_NUM(bnX); + const Crypt_Int* order = ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E)); + TPM_RC retVal = TPM_RC_SUCCESS; + INT32 tries = 10; + BOOL OK = FALSE; + // + pAssert(digest != NULL); + // The algorithm as described in "Suite B Implementer's Guide to FIPS + // 186-3(ECDSA)" + // 1. Use one of the routines in Appendix A.2 to generate (k, k^-1), a + // per-message secret number and its inverse modulo n. Since n is prime, + // the output will be invalid only if there is a failure in the RBG. + // 2. Compute the elliptic curve point R = [k]G = (xR, yR) using EC scalar + // multiplication (see [Routines]), where G is the base point included in + // the set of domain parameters. + // 3. Compute r = xR mod n. If r = 0, then return to Step 1. 1. + // 4. Use the selected hash function to compute H = Hash(M). + // 5. Convert the bit string H to an integer e as described in Appendix B.2. + // 6. Compute s = (k^-1 * (e + d * r)) mod q. If s = 0, return to Step 1.2. + // 7. Return (r, s). + // In the code below, q is n (that it, the order of the curve is p) + + do // This implements the loop at step 6. If s is zero, start over. + { + for(; tries > 0; tries--) + { + // Step 1 and 2 -- generate an ephemeral key and the modular inverse + // of the private key. + if(!TpmEcc_GenerateKeyPair(bnK, ecR, E, rand)) + continue; + // get mutable copy of X coordinate + ExtMath_Copy(bnX, ExtEcc_PointX(ecR)); + // x coordinate is mod p. Make it mod q + ExtMath_Mod(bnX, order); + // Make sure that it is not zero; + if(ExtMath_IsZero(bnX)) + continue; + // write the modular reduced version of r as part of the signature + ExtMath_Copy(bnR, bnX); + // Make sure that a modular inverse exists and try again if not + OK = (ExtMath_ModInverse(bnIk, bnK, order)); + if(OK) + break; + } + if(!OK) + goto Exit; + + TpmEcc_AdjustEcdsaDigest(bnE, digest, order); + + // now have inverse of K (bnIk), e (bnE), r (bnR), d (bnD) and + // ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E)) + // Compute s = k^-1 (e + r*d)(mod q) + // first do s = r*d mod q + ExtMath_ModMult(bnS, bnR, bnD, order); + // s = e + s = e + r * d + ExtMath_Add(bnS, bnE, bnS); + // s = k^(-1)s (mod n) = k^(-1)(e + r * d)(mod n) + ExtMath_ModMult(bnS, bnIk, bnS, order); + + // If S is zero, try again + } while(ExtMath_IsZero(bnS)); +Exit: + return retVal; +} + +//*** TpmEcc_ValidateSignatureEcdsa() +// This function validates an ECDSA signature. rIn and sIn should have been checked +// to make sure that they are in the range 0 < 'v' < 'n' +// Return Type: TPM_RC +// TPM_RC_SIGNATURE signature not valid +TPM_RC +TpmEcc_ValidateSignatureEcdsa( + Crypt_Int* bnR, // IN: 'r' component of the signature + Crypt_Int* bnS, // IN: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in the signature + // process + const Crypt_Point* ecQ, // IN: the public point of the key + const TPM2B_DIGEST* digest // IN: the digest that was signed +) +{ + // Make sure that the allocation for the digest is big enough for a maximum + // digest + CRYPT_INT_VAR(bnE, MAX_ECC_KEY_BITS); + CRYPT_POINT_VAR(ecR); + CRYPT_ECC_NUM(bnU1); + CRYPT_ECC_NUM(bnU2); + CRYPT_ECC_NUM(bnW); + CRYPT_ECC_NUM(bnV); + const Crypt_Int* order = ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E)); + TPM_RC retVal = TPM_RC_SIGNATURE; + // + // Get adjusted digest + TpmEcc_AdjustEcdsaDigest(bnE, digest, order); + // 1. If r and s are not both integers in the interval [1, n - 1], output + // INVALID. + // bnR and bnS were validated by the caller + // 2. Use the selected hash function to compute H0 = Hash(M0). + // This is an input parameter + // 3. Convert the bit string H0 to an integer e as described in Appendix B.2. + // Done at entry + // 4. Compute w = (s')^-1 mod n, using the routine in Appendix B.1. + if(!ExtMath_ModInverse(bnW, bnS, order)) + goto Exit; + // 5. Compute u1 = (e' * w) mod n, and compute u2 = (r' * w) mod n. + ExtMath_ModMult(bnU1, bnE, bnW, order); + ExtMath_ModMult(bnU2, bnR, bnW, order); + // 6. Compute the elliptic curve point R = (xR, yR) = u1G+u2Q, using EC + // scalar multiplication and EC addition (see [Routines]). If R is equal to + // the point at infinity O, output INVALID. + if(TpmEcc_PointMult( + ecR, ExtEcc_CurveGetG(ExtEcc_CurveGetCurveId(E)), bnU1, ecQ, bnU2, E) + != TPM_RC_SUCCESS) + goto Exit; + // 7. Compute v = Rx mod n. + ExtMath_Copy(bnV, ExtEcc_PointX(ecR)); + ExtMath_Mod(bnV, order); + // 8. Compare v and r0. If v = r0, output VALID; otherwise, output INVALID + if(ExtMath_UnsignedCmp(bnV, bnR) != 0) + goto Exit; + + retVal = TPM_RC_SUCCESS; +Exit: + return retVal; +} + +#endif // ALG_ECC && ALG_ECDSA diff --git a/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_SM2.c b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_SM2.c new file mode 100644 index 00000000..e4964367 --- /dev/null +++ b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_SM2.c @@ -0,0 +1,176 @@ +#include "Tpm.h" +#include "TpmEcc_Signature_SM2_fp.h" +#include "TpmMath_Debug_fp.h" +#include "TpmMath_Util_fp.h" + +#if ALG_ECC && ALG_SM2 + +//*** TpmEcc_SignEcSm2() +// This function signs a digest using the method defined in SM2 Part 2. The method +// in the standard will add a header to the message to be signed that is a hash of +// the values that define the key. This then hashed with the message to produce a +// digest ('e'). This function signs 'e'. +// Return Type: TPM_RC +// TPM_RC_VALUE bad curve +TPM_RC TpmEcc_SignEcSm2(Crypt_Int* bnR, // OUT: 'r' component of the signature + Crypt_Int* bnS, // OUT: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in signing + Crypt_Int* bnD, // IN: the private key + const TPM2B_DIGEST* digest, // IN: the digest to sign + RAND_STATE* rand // IN: random number generator (mostly for + // debug) +) +{ + CRYPT_INT_MAX_INITIALIZED(bnE, digest); // Don't know how big digest might be + CRYPT_ECC_NUM(bnN); + CRYPT_ECC_NUM(bnK); + CRYPT_ECC_NUM(bnT); // temp + CRYPT_POINT_VAR(Q1); + const Crypt_Int* order = + (E != NULL) ? ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E)) : NULL; +// +# ifdef _SM2_SIGN_DEBUG + TpmEccDebug_FromHex(bnE, + "B524F552CD82B8B028476E005C377FB1" + "9A87E6FC682D48BB5D42E3D9B9EFFE76", + MAX_ECC_KEY_BYTES); + TpmEccDebug_FromHex(bnD, + "128B2FA8BD433C6C068C8D803DFF7979" + "2A519A55171B1B650C23661D15897263", + MAX_ECC_KEY_BYTES); +# endif + // A3: Use random number generator to generate random number 1 <= k <= n-1; + // NOTE: Ax: numbers are from the SM2 standard +loop: +{ + // Get a random number 0 < k < n + TpmMath_GetRandomInRange(bnK, order, rand); +# ifdef _SM2_SIGN_DEBUG + TpmEccDebug_FromHex(bnK, + "6CB28D99385C175C94F94E934817663F" + "C176D925DD72B727260DBAAE1FB2F96F", + MAX_ECC_KEY_BYTES); +# endif + // A4: Figure out the point of elliptic curve (x1, y1)=[k]G, and according + // to details specified in 4.2.7 in Part 1 of this document, transform the + // data type of x1 into an integer; + if(!ExtEcc_PointMultiply(Q1, NULL, bnK, E)) + goto loop; + // A5: Figure out 'r' = ('e' + 'x1') mod 'n', + ExtMath_Add(bnR, bnE, ExtEcc_PointX(Q1)); + ExtMath_Mod(bnR, order); +# ifdef _SM2_SIGN_DEBUG + pAssert(TpmEccDebug_HexEqual(bnR, + "40F1EC59F793D9F49E09DCEF49130D41" + "94F79FB1EED2CAA55BACDB49C4E755D1")); +# endif + // if r=0 or r+k=n, return to A3; + if(ExtMath_IsZero(bnR)) + goto loop; + ExtMath_Add(bnT, bnK, bnR); + if(ExtMath_UnsignedCmp(bnT, bnN) == 0) + goto loop; + // A6: Figure out s = ((1 + dA)^-1 (k - r dA)) mod n, + // if s=0, return to A3; + // compute t = (1+dA)^-1 + ExtMath_AddWord(bnT, bnD, 1); + ExtMath_ModInverse(bnT, bnT, order); +# ifdef _SM2_SIGN_DEBUG + pAssert(TpmEccDebug_HexEqual(bnT, + "79BFCF3052C80DA7B939E0C6914A18CB" + "B2D96D8555256E83122743A7D4F5F956")); +# endif + // compute s = t * (k - r * dA) mod n + ExtMath_ModMult(bnS, bnR, bnD, order); + // k - r * dA mod n = k + n - ((r * dA) mod n) + ExtMath_Subtract(bnS, order, bnS); + ExtMath_Add(bnS, bnK, bnS); + ExtMath_ModMult(bnS, bnS, bnT, order); +# ifdef _SM2_SIGN_DEBUG + pAssert(TpmEccDebug_HexEqual(bnS, + "6FC6DAC32C5D5CF10C77DFB20F7C2EB6" + "67A457872FB09EC56327A67EC7DEEBE7")); +# endif + if(ExtMath_IsZero(bnS)) + goto loop; +} +// A7: According to details specified in 4.2.1 in Part 1 of this document, +// transform the data type of r, s into bit strings, signature of message M +// is (r, s). +// This is handled by the common return code +# ifdef _SM2_SIGN_DEBUG + pAssert(TpmEccDebug_HexEqual(bnR, + "40F1EC59F793D9F49E09DCEF49130D41" + "94F79FB1EED2CAA55BACDB49C4E755D1")); + pAssert(TpmEccDebug_HexEqual(bnS, + "6FC6DAC32C5D5CF10C77DFB20F7C2EB6" + "67A457872FB09EC56327A67EC7DEEBE7")); +# endif + return TPM_RC_SUCCESS; +} + +//*** TpmEcc_ValidateSignatureEcSm2() +// This function is used to validate an SM2 signature. +// Return Type: TPM_RC +// TPM_RC_SIGNATURE signature not valid +TPM_RC TpmEcc_ValidateSignatureEcSm2( + Crypt_Int* bnR, // IN: 'r' component of the signature + Crypt_Int* bnS, // IN: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in the signature + // process + Crypt_Point* ecQ, // IN: the public point of the key + const TPM2B_DIGEST* digest // IN: the digest that was signed +) +{ + CRYPT_POINT_VAR(P); + CRYPT_ECC_NUM(bnRp); + CRYPT_ECC_NUM(bnT); + CRYPT_INT_MAX_INITIALIZED(bnE, digest); + BOOL OK; + const Crypt_Int* order = ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E)); + +# ifdef _SM2_SIGN_DEBUG + // Make sure that the input signature is the test signature + pAssert(TpmEccDebug_HexEqual(bnR, + "40F1EC59F793D9F49E09DCEF49130D41" + "94F79FB1EED2CAA55BACDB49C4E755D1")); + pAssert(TpmEccDebug_HexEqual(bnS, + "6FC6DAC32C5D5CF10C77DFB20F7C2EB6" + "67A457872FB09EC56327A67EC7DEEBE7")); +# endif + // b) compute t := (r + s) mod n + ExtMath_Add(bnT, bnR, bnS); + ExtMath_Mod(bnT, order); +# ifdef _SM2_SIGN_DEBUG + pAssert(TpmEccDebug_HexEqual(bnT, + "2B75F07ED7ECE7CCC1C8986B991F441A" + "D324D6D619FE06DD63ED32E0C997C801")); +# endif + // c) verify that t > 0 + OK = !ExtMath_IsZero(bnT); + if(!OK) + // set T to a value that should allow rest of the computations to run + // without trouble + ExtMath_Copy(bnT, bnS); + // d) compute (x, y) := [s]G + [t]Q + OK = ExtEcc_PointMultiplyAndAdd(P, NULL, bnS, ecQ, bnT, E); +# ifdef _SM2_SIGN_DEBUG + pAssert(OK + && TpmEccDebug_HexEqual(ExtEcc_PointX(P), + "110FCDA57615705D5E7B9324AC4B856D" + "23E6D9188B2AE47759514657CE25D112")); +# endif + // e) compute r' := (e + x) mod n (the x coordinate is in bnT) + OK = OK && ExtMath_Add(bnRp, bnE, ExtEcc_PointX(P)); + OK = OK && ExtMath_Mod(bnRp, order); + + // f) verify that r' = r + OK = OK && (ExtMath_UnsignedCmp(bnR, bnRp) == 0); + + if(!OK) + return TPM_RC_SIGNATURE; + else + return TPM_RC_SUCCESS; +} + +#endif // ALG_ECC && ALG_SM2 diff --git a/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_Schnorr.c b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_Schnorr.c new file mode 100644 index 00000000..39b29439 --- /dev/null +++ b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_Schnorr.c @@ -0,0 +1,153 @@ +#include "Tpm.h" +#include "TpmEcc_Signature_Schnorr_fp.h" +#include "TpmEcc_Signature_Util_fp.h" +#include "TpmMath_Debug_fp.h" +#include "TpmMath_Util_fp.h" + +#if ALG_ECC && ALG_ECSCHNORR + +//*** SchnorrReduce() +// Function to reduce a hash result if it's magnitude is too large. The size of +// 'number' is set so that it has no more bytes of significance than 'reference' +// value. If the resulting number can have more bits of significance than +// 'reference'. +static void SchnorrReduce(TPM2B* number, // IN/OUT: Value to reduce + const Crypt_Int* reference // IN: the reference value +) +{ + UINT16 maxBytes = (UINT16)BITS_TO_BYTES(ExtMath_SizeInBits(reference)); + if(number->size > maxBytes) + number->size = maxBytes; +} + +//*** SchnorrEcc() +// This function is used to perform a modified Schnorr signature. +// +// This function will generate a random value 'k' and compute +// a) ('xR', 'yR') = ['k']'G' +// b) 'r' = "Hash"('xR' || 'P')(mod 'q') +// c) 'rT' = truncated 'r' +// d) 's'= 'k' + 'rT' * 'ds' (mod 'q') +// e) return the tuple 'rT', 's' +// +// Return Type: TPM_RC +// TPM_RC_NO_RESULT failure in the Schnorr sign process +// TPM_RC_SCHEME hashAlg can't produce zero-length digest +TPM_RC TpmEcc_SignEcSchnorr( + Crypt_Int* bnR, // OUT: 'r' component of the signature + Crypt_Int* bnS, // OUT: 's' component of the signature + const Crypt_EccCurve* E, // IN: the curve used in signing + Crypt_Int* bnD, // IN: the signing key + const TPM2B_DIGEST* digest, // IN: the digest to sign + TPM_ALG_ID hashAlg, // IN: signing scheme (contains a hash) + RAND_STATE* rand // IN: non-NULL when testing +) +{ + HASH_STATE hashState; + UINT16 digestSize = CryptHashGetDigestSize(hashAlg); + TPM2B_TYPE(T, MAX(MAX_DIGEST_SIZE, MAX_ECC_KEY_BYTES)); + TPM2B_T T2b; + TPM2B* e = &T2b.b; + TPM_RC retVal = TPM_RC_NO_RESULT; + const Crypt_Int* order; + const Crypt_Int* prime; + CRYPT_ECC_NUM(bnK); + CRYPT_POINT_VAR(ecR); + // + // Parameter checks + if(E == NULL) + ERROR_EXIT(TPM_RC_VALUE); + + order = ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E)); + prime = ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E)); + + // If the digest does not produce a hash, then null the signature and return + // a failure. + if(digestSize == 0) + { + ExtMath_SetWord(bnR, 0); + ExtMath_SetWord(bnS, 0); + ERROR_EXIT(TPM_RC_SCHEME); + } + do + { + // Generate a random key pair + if(!TpmEcc_GenerateKeyPair(bnK, ecR, E, rand)) + break; + // Convert R.x to a string + TpmMath_IntTo2B(ExtEcc_PointX(ecR), + e, + (NUMBYTES)BITS_TO_BYTES(ExtMath_SizeInBits(prime))); + + // f) compute r = Hash(e || P) (mod n) + CryptHashStart(&hashState, hashAlg); + CryptDigestUpdate2B(&hashState, e); + CryptDigestUpdate2B(&hashState, &digest->b); + e->size = CryptHashEnd(&hashState, digestSize, e->buffer); + // Reduce the hash size if it is larger than the curve order + SchnorrReduce(e, order); + // Convert hash to number + TpmMath_IntFrom2B(bnR, e); + // Do the Schnorr computation + retVal = TpmEcc_SchnorrCalculateS( + bnS, bnK, bnR, bnD, ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E))); + } while(retVal == TPM_RC_NO_RESULT); +Exit: + return retVal; +} + +//*** TpmEcc_ValidateSignatureEcSchnorr() +// This function is used to validate an EC Schnorr signature. +// Return Type: TPM_RC +// TPM_RC_SIGNATURE signature not valid +TPM_RC TpmEcc_ValidateSignatureEcSchnorr( + Crypt_Int* bnR, // IN: 'r' component of the signature + Crypt_Int* bnS, // IN: 's' component of the signature + TPM_ALG_ID hashAlg, // IN: hash algorithm of the signature + const Crypt_EccCurve* E, // IN: the curve used in the signature + // process + Crypt_Point* ecQ, // IN: the public point of the key + const TPM2B_DIGEST* digest // IN: the digest that was signed +) +{ + CRYPT_INT_MAX(bnRn); + CRYPT_POINT_VAR(ecE); + CRYPT_INT_MAX(bnEx); + const Crypt_Int* order = ExtEcc_CurveGetOrder(ExtEcc_CurveGetCurveId(E)); + UINT16 digestSize = CryptHashGetDigestSize(hashAlg); + HASH_STATE hashState; + TPM2B_TYPE(BUFFER, MAX(MAX_ECC_PARAMETER_BYTES, MAX_DIGEST_SIZE)); + TPM2B_BUFFER Ex2 = {{sizeof(Ex2.t.buffer), {0}}}; + BOOL OK; + // + // E = [s]G - [r]Q + ExtMath_Mod(bnR, order); + // Make -r = n - r + ExtMath_Subtract(bnRn, order, bnR); + // E = [s]G + [-r]Q + OK = TpmEcc_PointMult( + ecE, ExtEcc_CurveGetG(ExtEcc_CurveGetCurveId(E)), bnS, ecQ, bnRn, E) + == TPM_RC_SUCCESS; + // // reduce the x portion of E mod q + // OK = OK && ExtMath_Mod(ecE->x, order); + // Convert to byte string + OK = OK + && TpmMath_IntTo2B(ExtEcc_PointX(ecE), + &Ex2.b, + (NUMBYTES)(BITS_TO_BYTES(ExtMath_SizeInBits(order)))); + if(OK) + { + // Ex = h(pE.x || digest) + CryptHashStart(&hashState, hashAlg); + CryptDigestUpdate(&hashState, Ex2.t.size, Ex2.t.buffer); + CryptDigestUpdate(&hashState, digest->t.size, digest->t.buffer); + Ex2.t.size = CryptHashEnd(&hashState, digestSize, Ex2.t.buffer); + SchnorrReduce(&Ex2.b, order); + TpmMath_IntFrom2B(bnEx, &Ex2.b); + // see if Ex matches R + OK = ExtMath_UnsignedCmp(bnEx, bnR) == 0; + } + return (OK) ? TPM_RC_SUCCESS : TPM_RC_SIGNATURE; +} + +#endif // ALG_ECC && ALG_ECSCHNORR diff --git a/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_Util.c b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_Util.c new file mode 100644 index 00000000..be3da92a --- /dev/null +++ b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Signature_Util.c @@ -0,0 +1,47 @@ +// functions shared by multiple signature algorithms +#include "Tpm.h" +#include "TpmEcc_Signature_Util_fp.h" +#include "TpmMath_Debug_fp.h" +#include "TpmMath_Util_fp.h" + +#if(ALG_ECC && (ALG_ECSCHNORR || ALG_ECDAA)) + +//*** TpmEcc_SchnorrCalculateS() +// This contains the Schnorr signature (S) computation. It is used by both ECDAA and +// Schnorr signing. The result is computed as: ['s' = 'k' + 'r' * 'd' (mod 'n')] +// where +// 1) 's' is the signature +// 2) 'k' is a random value +// 3) 'r' is the value to sign +// 4) 'd' is the private EC key +// 5) 'n' is the order of the curve +// Return Type: TPM_RC +// TPM_RC_NO_RESULT the result of the operation was zero or 'r' (mod 'n') +// is zero +TPM_RC TpmEcc_SchnorrCalculateS( + Crypt_Int* bnS, // OUT: 's' component of the signature + const Crypt_Int* bnK, // IN: a random value + Crypt_Int* bnR, // IN: the signature 'r' value + const Crypt_Int* bnD, // IN: the private key + const Crypt_Int* bnN // IN: the order of the curve +) +{ + // Need a local temp value to store the intermediate computation because product + // size can be larger than will fit in bnS. + CRYPT_INT_VAR(bnT1, MAX_ECC_PARAMETER_BYTES * 2 * 8); + // + // Reduce bnR without changing the input value + ExtMath_Divide(NULL, bnT1, bnR, bnN); + if(ExtMath_IsZero(bnT1)) + return TPM_RC_NO_RESULT; + // compute s = (k + r * d)(mod n) + // r * d + ExtMath_Multiply(bnT1, bnT1, bnD); + // k + r * d + ExtMath_Add(bnT1, bnT1, bnK); + // k + r * d (mod n) + ExtMath_Divide(NULL, bnS, bnT1, bnN); + return (ExtMath_IsZero(bnS)) ? TPM_RC_NO_RESULT : TPM_RC_SUCCESS; +} + +#endif // (ALG_ECC && (ALG_ECSCHNORR || ALG_ECDAA)) diff --git a/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Util.c b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Util.c new file mode 100644 index 00000000..ded842ab --- /dev/null +++ b/TPMCmd/tpm/src/crypt/ecc/TpmEcc_Util.c @@ -0,0 +1,62 @@ +//** Introduction +// This file contains utility functions to help using the external Math library +// for Ecc functions. +#include "Tpm.h" +#include "TpmMath_Util_fp.h" + +#if ALG_ECC + +//*** +// TpmEcc_PointFrom2B() Function to create a Crypt_Point structure from a 2B +// point. The target point is expected to have memory allocated and +// uninitialized. A TPMS_ECC_POINT is going to be two ECC values in the same +// buffer. The values are going to be the size of the modulus. They are in +// modular form. +// +// NOTE: This function considers both parameters optional because of use +// cases where points may not be specified in the calling function. If the +// initializer or point buffer is NULL, then NULL is returned. As a result, the +// only error detection when the initializer value is invalid is to return NULL +// in that error case as well. If a caller wants to handle that error case +// differently, then the caller must perform the correct validation before/after +// this function. +LIB_EXPORT Crypt_Point* TpmEcc_PointFrom2B( + Crypt_Point* ecP, // OUT: the preallocated point structure + TPMS_ECC_POINT* p // IN: the number to convert +) +{ + if(p == NULL) + return NULL; + + if(ecP != NULL) + { + return ExtEcc_PointFromBytes( + ecP, p->x.t.buffer, p->x.t.size, p->y.t.buffer, p->y.t.size); + } + return ecP; // will return NULL if ecP is NULL. +} + +//*** TpmEcc_PointTo2B() +// This function converts a BIG_POINT into a TPMS_ECC_POINT. A TPMS_ECC_POINT +// contains two TPM2B_ECC_PARAMETER values. The maximum size of the parameters +// is dependent on the maximum EC key size used in an implementation. +// The presumption is that the TPMS_ECC_POINT is large enough to hold 2 TPM2B +// values, each as large as a MAX_ECC_PARAMETER_BYTES +LIB_EXPORT BOOL TpmEcc_PointTo2B( + TPMS_ECC_POINT* p, // OUT: the converted 2B structure + const Crypt_Point* ecP, // IN: the values to be converted + const Crypt_EccCurve* E // IN: curve descriptor for the point +) +{ + pAssert(p && ecP && E); + TPM_ECC_CURVE curveId = ExtEcc_CurveGetCurveId(E); + NUMBYTES size = CryptEccGetKeySizeForCurve(curveId); + size = (UINT16)BITS_TO_BYTES(size); + MemorySet(p, 0, sizeof(*p)); + p->x.t.size = size; + p->y.t.size = size; + return ExtEcc_PointToBytes( + ecP, p->x.t.buffer, &p->x.t.size, p->y.t.buffer, &p->y.t.size); +} + +#endif // ALG_ECC \ No newline at end of file diff --git a/TPMCmd/tpm/src/crypt/ltc/TpmToLtcDesSupport.c b/TPMCmd/tpm/src/crypt/ltc/TpmToLtcDesSupport.c deleted file mode 100644 index 0d73c162..00000000 --- a/TPMCmd/tpm/src/crypt/ltc/TpmToLtcDesSupport.c +++ /dev/null @@ -1,71 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// The functions in this file are used for initialization of the interface to the -// LibTomCrypt and MpaLib libraries. This is not used if only the LTC hash and -// symmetric functions are used. - -//** Defines and Includes - -#include "Tpm.h" - -#if(defined SYM_LIB_LTC) && ALG_TDES - -//** TDES_setup -// This function calls the LTC function to generate a TDES key schedule. If the -// key is one DES key (8 bytes), then it is replicated two more times to create a -// 24-byte TDES key. If the key is two key (16 bytes), then the first DES key is -// replicated to the third key position. -void TDES_setup(const BYTE* key, UINT32 keyBits, symmetric_key* skey) -{ - BYTE k[24]; - BYTE* kp; - - // If this is two-key, make it three key by replicating K1 - if(keyBits == 128) - { - memcpy(k, key, 16); - memcpy(&k[16], key, 8); - kp = k; - } - else - kp = (BYTE*)key; - - des3_setup(kp, 24, 0, skey); -} - -#endif // MATH_LIB_LTC && ALG_TDES diff --git a/TPMCmd/tpm/src/crypt/ltc/TpmToLtcMath.c b/TPMCmd/tpm/src/crypt/ltc/TpmToLtcMath.c deleted file mode 100644 index b6da974d..00000000 --- a/TPMCmd/tpm/src/crypt/ltc/TpmToLtcMath.c +++ /dev/null @@ -1,267 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// This file contains the math functions that are not implemented in the BnMath -// library (yet). These math functions will call the ST MPA library or the -// LibTomCrypt library to execute the operations. Since the TPM internal big number -// format is identical to the MPA format, no reformatting is required. - -//** Includes -#include "Tpm.h" - -#ifdef MATH_LIB_LTC - -# if defined ECC_NIST_P256 && ECC_NIST_P256 == YES && ECC_CURVE_COUNT > 1 -# error "LibTomCrypt only supports P256" -# endif - -//** Functions - -//*** BnModMult() -// Does multiply and divide returning the remainder of the divide. -LIB_EXPORT BOOL BnModMult(bigNum result, bigConst op1, bigConst op2, bigConst modulus) -{ - BN_VAR(temp, LARGEST_NUMBER_BITS * 2); - // mpa_mul does not allocate from the pool if the result is not the same as - // op1 or op2. since this is assured by the stack allocation of 'temp', the - // pool pointer can be NULL - pAssert(BnGetAllocated(result) >= BnGetSize(modulus)); - mpa_mul((mpanum)temp, (const mpanum)op1, (const mpanum)op2, NULL); - return BnDiv(NULL, result, temp, modulus); -} - -//*** BnMult() -// Multiplies two numbers -LIB_EXPORT BOOL BnMult(bigNum result, bigConst multiplicand, bigConst multiplier) -{ - // Make sure that the mpa_mul function does not allocate anything - // from the POOL by eliminating the reason for doing it. - BN_VAR(tempResult, LARGEST_NUMBER_BITS * 2); - if(result != multiplicand && result != multiplier) - tempResult = result; - mpa_mul((mpanum)tempResult, - (const mpanum)multiplicand, - (const mpanum)multiplier, - NULL); - BnCopy(result, tempResult); - return TRUE; -} - -//*** BnDiv() -// This function divides two BIGNUM values. The function always returns TRUE. -LIB_EXPORT BOOL BnDiv( - bigNum quotient, bigNum remainder, bigConst dividend, bigConst divisor) -{ - MPA_ENTER(10, LARGEST_NUMBER_BITS); - pAssert(!BnEqualZero(divisor)); - if(BnGetSize(dividend) < BnGetSize(divisor)) - { - if(quotient) - BnSetWord(quotient, 0); - if(remainder) - BnCopy(remainder, dividend); - } - else - { - pAssert( - (quotient == NULL) - || (quotient->allocated >= (unsigned)(dividend->size - divisor->size))); - pAssert((remainder == NULL) || (remainder->allocated >= divisor->size)); - mpa_div((mpanum)quotient, - (mpanum)remainder, - (const mpanum)dividend, - (const mpanum)divisor, - POOL); - } - MPA_LEAVE(); - return TRUE; -} - -# ifdef TPM_ALG_RSA -//*** BnGcd() -// Get the greatest common divisor of two numbers -LIB_EXPORT BOOL BnGcd(bigNum gcd, // OUT: the common divisor - bigConst number1, // IN: - bigConst number2 // IN: -) -{ - MPA_ENTER(20, LARGEST_NUMBER_BITS); - // - mpa_gcd((mpanum)gcd, (mpanum)number1, (mpanum)number2, POOL); - MPA_LEAVE(); - return TRUE; -} - -//***BnModExp() -// Do modular exponentiation using BIGNUM values. The conversion from a bignum_t -// to a BIGNUM is trivial as they are based on the same structure -LIB_EXPORT BOOL BnModExp(bigNum result, // OUT: the result - bigConst number, // IN: number to exponentiate - bigConst exponent, // IN: - bigConst modulus // IN: -) -{ - MPA_ENTER(20, LARGEST_NUMBER_BITS); - BN_VAR(bnR, MAX_RSA_KEY_BITS); - BN_VAR(bnR2, MAX_RSA_KEY_BITS); - mpa_word_t n_inv; - mpa_word_t ffmCtx[mpa_fmm_context_size_in_U32(MAX_RSA_KEY_BITS)]; - // - mpa_init_static_fmm_context((mpa_fmm_context_base*)ffmCtx, - BYTES_TO_CRYPT_WORDS(sizeof(ffmCtx))); - // Generate modular form - if(mpa_compute_fmm_context( - (const mpanum)modulus, (mpanum)bnR, (mpanum)bnR2, &n_inv, POOL) - != 0) - FAIL(FATAL_ERROR_INTERNAL); - // Do exponentiation - mpa_exp_mod((mpanum)result, - (const mpanum)number, - (const mpanum)exponent, - (const mpanum)modulus, - (const mpanum)bnR, - (const mpanum)bnR2, - n_inv, - POOL); - MPA_LEAVE(); - return TRUE; -} - -//*** BnModInverse() -// Modular multiplicative inverse -LIB_EXPORT BOOL BnModInverse(bigNum result, bigConst number, bigConst modulus) -{ - BOOL retVal; - MPA_ENTER(10, LARGEST_NUMBER_BITS); - retVal = (mpa_inv_mod( - (mpanum)result, (const mpanum)number, (const mpanum)modulus, POOL) - == 0); - MPA_LEAVE(); - return retVal; -} -# endif // TPM_ALG_RSA - -# ifdef TPM_ALG_ECC - -//*** BnEccModMult() -// This function does a point multiply of the form R = [d]S -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' - bigConst d, // IN: scalar for [d]S - bigCurve E) -{ - MPA_ENTER(30, MAX_ECC_KEY_BITS * 2); - // The point multiply in LTC seems to need a large reciprocal for - // intermediate results - POINT_VAR(result, MAX_ECC_KEY_BITS * 4); - BOOL OK; - // - (POOL); // Avoid compiler warning - if(S == NULL) - S = CurveGetG(AccessCurveData(E)); - OK = - (ltc_ecc_mulmod( - (mpanum)d, (ecc_point*)S, (ecc_point*)result, (void*)CurveGetPrime(E), 1) - == CRYPT_OK); - OK = OK && !BnEqualZero(result->z); - if(OK) - BnPointCopy(R, result); - - MPA_LEAVE(); - return OK ? TPM_RC_SUCCESS : TPM_RC_NO_RESULT; -} - -//*** BnEccModMult2() -// This function does a point multiply of the form R = [d]S + [u]Q -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult2(bigPoint R, // OUT: computed point - pointConst S, // IN: first point (optional) - bigConst d, // IN: scalar for [d]S or [d]G - pointConst Q, // IN: second point - bigConst u, // IN: second scalar - bigCurve E // IN: curve -) -{ - MPA_ENTER(80, MAX_ECC_KEY_BITS); - BOOL OK; - // The point multiply in LTC seems to need a large reciprocal for - // intermediate results - POINT_VAR(result, MAX_ECC_KEY_BITS * 4); - // - (POOL); // Avoid compiler warning - if(S == NULL) - S = CurveGetG(AccessCurveData(E)); - - OK = (ltc_ecc_mul2add((ecc_point*)S, - (mpanum)d, - (ecc_point*)Q, - (mpanum)u, - (ecc_point*)result, - (mpanum)CurveGetPrime(E)) - == CRYPT_OK); - OK = OK && !BnEqualZero(result->z); - - if(OK) - BnPointCopy(R, result); - - MPA_LEAVE(); - return OK ? TPM_RC_SUCCESS : TPM_RC_NO_RESULT; -} - -//*** BnEccAdd() -// This function does addition of two points. Since this is not implemented -// in LibTomCrypt() will try to trick it by doing multiply with scalar of 1. -// I have no idea if this will work and it's not needed unless MQV or the SM2 -// variant is enabled. -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccAdd(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' - pointConst Q, // IN: second point - bigCurve E // IN: curve -) -{ - BN_WORD_INITIALIZED(one, 1); - return BnEccModMult2(R, S, one, Q, one, E); -} - -# endif // TPM_ALG_ECC - -#endif // MATH_LIB_LTC diff --git a/TPMCmd/tpm/src/crypt/ltc/TpmToLtcSupport.c b/TPMCmd/tpm/src/crypt/ltc/TpmToLtcSupport.c deleted file mode 100644 index b30d993d..00000000 --- a/TPMCmd/tpm/src/crypt/ltc/TpmToLtcSupport.c +++ /dev/null @@ -1,85 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// The functions in this file are used for initialization of the interface to the -// LibTomCrypt and MpsLib libraries. This is not used if only the LTC hash and -// symmetric functions are used. - -//** Defines and Includes - -#include "Tpm.h" - -#if defined(HASH_LIB_LTC) || defined(MATH_LIB_LTC) || defined(SYM_LIB_LTC) - -// This state is used because there is no way to pass the random number state -// to LibTomCrypt. I do not think that this is currently an issue because... -// Heck, just put in an assert and see what happens. -static void* s_randState; - -//*** LtcRand() -// This is a stub function that is called from the LibTomCrypt or libmpa code -// to get a random number. In turn, this will call the random RandGenerate -// function that was passed in LibraryInit(). This function will pass the pointer -// to the current rand state along with the random byte request. -uint32_t LtcRand(void* buf, size_t blen) -{ - pAssert(1); - DRBG_Generate(s_randState, buf, (uint16_t)blen); - return 0; -} - -//*** SupportLibInit() -// This does any initialization required by the support library. -LIB_EXPORT int SupportLibInit(void) -{ - mpa_set_random_generator(LtcRand); - s_randState = NULL; - external_mem_pool = NULL; - return 1; -} - -//*** LtcPoolInit() -// Function to initialize a pool. **** -LIB_EXPORT mpa_scratch_mem LtcPoolInit(mpa_word_t* poolAddress, int vars, int bits) -{ - mpa_scratch_mem pool = (mpa_scratch_mem)poolAddress; - mpa_init_scratch_mem(pool, vars, bits); - init_mpa_tomcrypt(pool); - return pool; -} - -#endif // HASH_LIB_LTC || MATH_LIB_LTC || SYM_LIB_LTC diff --git a/TPMCmd/tpm/src/crypt/math/TpmMath_Debug.c b/TPMCmd/tpm/src/crypt/math/TpmMath_Debug.c new file mode 100644 index 00000000..84170fca --- /dev/null +++ b/TPMCmd/tpm/src/crypt/math/TpmMath_Debug.c @@ -0,0 +1,110 @@ +//** Introduction +// This file contains debug utility functions to help testing Ecc. +#include "Tpm.h" +#include "TpmEcc_Util_fp.h" +#include "TpmMath_Debug_fp.h" + +#if ALG_SM2 +# ifdef _SM2_SIGN_DEBUG + +//*** SafeGetStringLength() +// self-implemented version of strnlen_s. This is necessary because +// some environments don't have a C-runtime library, or are limited to +// C99, and strnlen_s was standardized in C11. +static size_t SafeGetStringLength(const char* string, size_t maxsize) +{ + // strnlen_s has two boundary conditions: + // return 0 if pointer is nullptr, or + // maxsize if no null character is found. + if(string == NULL) + return 0; + + const char* pos = string; + size_t size = 0; + + while(*pos != '\0' && size < maxsize) + { + pos++; + size++; + } + return size; +} + +// convert from hex value. If invalid, result will be out of range. +static LIB_EXPORT BYTE FromHex(unsigned char c) +{ + // hack for the ASCII characters we care about + BYTE upper = (c & (~0x20)); + if(c >= '0' && c <= '9') + return c - '0'; + else if(c >= 'A' && c <= 'F') + return c - 'A'; + + return 255; +} + +//*** TpmEccDebug_FromHex() +// Convert a hex string into a Crypt_Int*. This is primarily used in debugging. +LIB_EXPORT Crypt_Int* TpmEccDebug_FromHex( + Crypt_Int* bn, // OUT: + const unsigned char* hex, // IN: + size_t maxsizeHex // IN: maximum size of hex +) +{ + // if value is larger than this, then fail + BYTE tempBuf[MAX_ECC_KEY_BYTES]; + MemorySet(tempBuf, 0, sizeof(tempBuf)); + ExtMath_SetWord(bn, 0); + + size_t len = SafeGetStringLength(hex, maxsizeHex); + BOOL OK = FALSE; + if((len % 2) == 0) + { + OK = TRUE; + for(size_t i = 0; i < len; i += 2) + { + BYTE highNibble = FromHex(*hex); + hex++; + BYTE lowNibble = FromHex(*hex); + hex++; + // unsigned, no need to check zero + if(highNibble > 15 || lowNibble > 15) + { + OK = FALSE; + break; + } + BYTE b = ((highNibble << 4) | lowNibble); + tempBuf[i / 2] = b; + } + if(OK) + { + ExtMath_IntFromBytes(bn, tempBuf, (NUMBYTES)(len / 2)); + } + } + + if(!OK) + { + // this should only be called in testing, so any + // errors are fatal. + FAIL(FATAL_ERROR_INTERNAL); + } + return bn; +} + +//*** TpmEccDebug_HexEqual() +// This function compares a bignum value to a hex string. +// using TpmEcc namespace because code assumes the max size +// is correct for ECC. +// Return Type: BOOL +// TRUE(1) values equal +// FALSE(0) values not equal +BOOL TpmEccDebug_HexEqual(const Crypt_Int* bn, //IN: big number value + const char* c //IN: character string number +) +{ + CRYPT_ECC_NUM(bnC); + TpmEccDebug_FromHex(bnC, c, MAX_ECC_KEY_BYTES * 2 + 1); + return (ExtMath_UnsignedCmp(bn, bnC) == 0); +} +# endif // _SM2_SIGN_DEBUG +#endif // ALG_SM2 \ No newline at end of file diff --git a/TPMCmd/tpm/src/crypt/math/TpmMath_Util.c b/TPMCmd/tpm/src/crypt/math/TpmMath_Util.c new file mode 100644 index 00000000..9b3b81af --- /dev/null +++ b/TPMCmd/tpm/src/crypt/math/TpmMath_Util.c @@ -0,0 +1,173 @@ +//** Introduction +// This file contains utility functions to help using the external Math library +#include "Tpm.h" +#include "TpmMath_Util_fp.h" + +//*** TpmMath_IntFrom2B() +// Convert an TPM2B to a Crypt_Int. +// If the input value does not exist, or the output does not exist, or the input +// will not fit into the output the function returns NULL +LIB_EXPORT Crypt_Int* TpmMath_IntFrom2B(Crypt_Int* value, // OUT: + const TPM2B* a2B // IN: number to convert +) +{ + if(value != NULL && a2B != NULL) + return ExtMath_IntFromBytes(value, a2B->buffer, a2B->size); + return NULL; +} + +//*** TpmMath_IntTo2B() +// +// Function to convert a Crypt_Int to TPM2B. The TPM2B bytes are +// always in big-endian ordering (most significant byte first). If 'size' is +// non-zero and less than required by `value` then an error is returned. If +// `size` is non-zero and larger than `value`, the result buffer is padded +// with zeros. If `size` is zero, then the TPM2B is assumed to be large enough +// for the data and a2b->size will be adjusted accordingly. +LIB_EXPORT BOOL TpmMath_IntTo2B( + const Crypt_Int* value, // IN: value to convert + TPM2B* a2B, // OUT: buffer for output + NUMBYTES size // IN: Size of output buffer - see comments. +) +{ + // Set the output size + if(value && a2B) + { + a2B->size = size; + return ExtMath_IntToBytes(value, a2B->buffer, &a2B->size); + } + return FALSE; +} + +//*** TpmMath_GetRandomBits() +// This function gets random bits for use in various places. +// +// One consequence of the generation scheme is that, if the number of bits requested +// is not a multiple of 8, then the high-order bits are set to zero. This would come +// into play when generating a 521-bit ECC key. A 66-byte (528-bit) value is +// generated and the high order 7 bits are masked off (CLEAR). +// In this situation, the highest order byte is the first byte (big-endian/TPM2B format) +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure +LIB_EXPORT BOOL TpmMath_GetRandomBits(BYTE* pBuffer, size_t bits, RAND_STATE* rand) +{ + // buffer is assumed to be large enough for the number of bits rounded up to + // bytes. + NUMBYTES byteCount = (NUMBYTES)BITS_TO_BYTES(bits); + if(DRBG_Generate(rand, pBuffer, byteCount) == byteCount) + { + // now flip the buffer order - this exists only to maintain + // compatibility with existing Known-value tests that expect the + // GetRandomInteger behavior of generating the value in little-endian + // order. + BYTE* pFrom = pBuffer + byteCount - 1; + BYTE* pTo = pBuffer; + while(pTo < pFrom) + { + BYTE t = *pTo; + *pTo = *pFrom; + *pFrom = t; + pTo++; + pFrom--; + } + // For a little-endian machine, the conversion is a straight byte + // reversal, done above. For a big-endian machine, we have to put the + // words in big-endian byte order. COMPATIBILITY NOTE: This code does + // not exactly reproduce the original code, because the original big-num + // code always generated data in units of crypt_word_t sizes. I.e. you + // couldn't generate just 9 bits for example. This revised version of + // the function could; and would generate 2 bytes with the first byte + // masked to 1 bit. In order to avoid running over the buffer when + // swapping crypt_uword_t blocks, this loop intentionally doesn't swap + // the last word if it is smaller than crypt_word_t size (which is the + // same as saying the buffer isn't an integral number of crypt_word_t + // units.) This is okay in this particular case _because_ this whole + // block of swapping code is to maintain compatibilty with existing + // KNOWN ANSWER TESTS, and said existing tests use sizes that this + // assumption is true for. Any new code with a different size where + // this last partial value isn't swapped will be creating a new KAT, and + // thus any (cryptographically valid) value is still random; swapping + // doesn't make a cryptographic random buffer more or less random, so + // the failure to swap is fine. +#if BIG_ENDIAN_TPM + crypt_uword_t* pTemp = (crypt_uword_t*)pBuffer; + for(size_t t = 0; t < (byteCount / sizeof(crypt_uword_t)); t++) + *pTemp = SWAP_CRYPT_WORD(*pTemp); +#endif + // if the number of bits % 8 != 0, mask the high order (first) byte to the relevant number of bits + // bits % 8 desired mask right-shift of 0xFF + // 0 0xFF 0 = (8 - 0) % 8 + // 1 0x01 7 = (8 - 1) % 8 + // 2 0x03 6 = (8 - 2) % 8 + // ... etc ... + // 7 0x7F 1 = (8 - 7) % 8 + int excessBits = bits % 8; + int shift = (8 - excessBits) % 8; + BYTE mask = ~(0xFF >> shift); + pBuffer[0] = pBuffer[0] & mask; + return TRUE; + } + return FALSE; +} + +//*** TpmMath_GetRandomInteger() +// This function gets random bits for use in various places. To make sure that the +// number is generated in a portable format, it is created as a TPM2B and then +// converted to the internal format. +// +// One consequence of the generation scheme is that, if the number of bits requested +// is not a multiple of 8, then the high-order bits are set to zero. This would come +// into play when generating a 521-bit ECC key. A 66-byte (528-bit) value is +// generated an the high order 7 bits are masked off (CLEAR). +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure +LIB_EXPORT BOOL TpmMath_GetRandomInteger(Crypt_Int* n, size_t bits, RAND_STATE* rand) +{ + // Since this could be used for ECC key generation using the extra bits method, + // make sure that the value is large enough + TPM2B_TYPE(LARGEST, LARGEST_NUMBER + 8); + TPM2B_LARGEST large; + // + large.b.size = (UINT16)BITS_TO_BYTES(bits); + if(DRBG_Generate(rand, large.t.buffer, large.t.size) == large.t.size) + { + if(TpmMath_IntFrom2B(n, &large.b) != NULL) + { + if(ExtMath_MaskBits(n, (crypt_uword_t)bits)) + return TRUE; + } + } + return FALSE; +} + +//*** BnGenerateRandomInRange() +// This function is used to generate a random number r in the range 1 <= r < limit. +// The function gets a random number of bits that is the size of limit. There is some +// some probability that the returned number is going to be greater than or equal +// to the limit. If it is, try again. There is no more than 50% chance that the +// next number is also greater, so try again. We keep trying until we get a +// value that meets the criteria. Since limit is very often a number with a LOT of +// high order ones, this rarely would need a second try. +// Return Type: BOOL +// TRUE(1) success +// FALSE(0) failure ('limit' is too small) +LIB_EXPORT BOOL TpmMath_GetRandomInRange( + Crypt_Int* dest, const Crypt_Int* limit, RAND_STATE* rand) +{ + size_t bits = ExtMath_SizeInBits(limit); + // + if(bits < 2) + { + ExtMath_SetWord(dest, 0); + return FALSE; + } + else + { + while(TpmMath_GetRandomInteger(dest, bits, rand) + && (ExtMath_IsZero(dest) || (ExtMath_UnsignedCmp(dest, limit) >= 0))) + ; + } + return !g_inFailureMode; +} diff --git a/TPMCmd/tpm/src/crypt/ossl/TpmToOsslDesSupport.c b/TPMCmd/tpm/src/crypt/ossl/TpmToOsslDesSupport.c deleted file mode 100644 index bb8872bf..00000000 --- a/TPMCmd/tpm/src/crypt/ossl/TpmToOsslDesSupport.c +++ /dev/null @@ -1,84 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// -// The functions in this file are used for initialization of the interface to the -// OpenSSL library. - -//** Defines and Includes - -#include "Tpm.h" - -#if(defined SYM_LIB_OSSL) && ALG_TDES - -//**Functions -//*** TDES_set_encyrpt_key() -// This function makes creation of a TDES key look like the creation of a key for -// any of the other OpenSSL block ciphers. It will create three key schedules, -// one for each of the DES keys. If there are only two keys, then the third schedule -// is a copy of the first. -void TDES_set_encrypt_key( - const BYTE* key, UINT16 keySizeInBits, tpmKeyScheduleTDES* keySchedule) -{ - DES_set_key_unchecked((const_DES_cblock*)key, &keySchedule[0]); - DES_set_key_unchecked((const_DES_cblock*)&key[8], &keySchedule[1]); - // If is two-key, copy the schedule for K1 into K3, otherwise, compute the - // the schedule for K3 - if(keySizeInBits == 128) - keySchedule[2] = keySchedule[0]; - else - DES_set_key_unchecked((const_DES_cblock*)&key[16], &keySchedule[2]); -} - -//*** TDES_encyrpt() -// The TPM code uses one key schedule. For TDES, the schedule contains three -// schedules. OpenSSL wants the schedules referenced separately. This function -// does that. -void TDES_encrypt(const BYTE* in, BYTE* out, tpmKeyScheduleTDES* ks) -{ - DES_ecb3_encrypt( - (const_DES_cblock*)in, (DES_cblock*)out, &ks[0], &ks[1], &ks[2], DES_ENCRYPT); -} - -//*** TDES_decrypt() -// As with TDES_encypt() this function bridges between the TPM single schedule -// model and the OpenSSL three schedule model. -void TDES_decrypt(const BYTE* in, BYTE* out, tpmKeyScheduleTDES* ks) -{ - DES_ecb3_encrypt( - (const_DES_cblock*)in, (DES_cblock*)out, &ks[0], &ks[1], &ks[2], DES_DECRYPT); -} - -#endif // SYM_LIB_OSSL diff --git a/TPMCmd/tpm/src/crypt/ossl/TpmToOsslMath.c b/TPMCmd/tpm/src/crypt/ossl/TpmToOsslMath.c deleted file mode 100644 index d1255b7b..00000000 --- a/TPMCmd/tpm/src/crypt/ossl/TpmToOsslMath.c +++ /dev/null @@ -1,574 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// The functions in this file provide the low-level interface between the TPM code -// and the big number and elliptic curve math routines in OpenSSL. -// -// Most math on big numbers require a context. The context contains the memory in -// which OpenSSL creates and manages the big number values. When a OpenSSL math -// function will be called that modifies a BIGNUM value, that value must be created in -// an OpenSSL context. The first line of code in such a function must be: -// OSSL_ENTER(); and the last operation before returning must be OSSL_LEAVE(). -// OpenSSL variables can then be created with BnNewVariable(). Constant values to be -// used by OpenSSL are created from the bigNum values passed to the functions in this -// file. Space for the BIGNUM control block is allocated in the stack of the -// function and then it is initialized by calling BigInitialized(). That function -// sets up the values in the BIGNUM structure and sets the data pointer to point to -// the data in the bignum_t. This is only used when the value is known to be a -// constant in the called function. -// -// Because the allocations of constants is on the local stack and the -// OSSL_ENTER()/OSSL_LEAVE() pair flushes everything created in OpenSSL memory, there -// should be no chance of a memory leak. - -//** Includes and Defines -#include "Tpm.h" - -#ifdef MATH_LIB_OSSL -# include "TpmToOsslMath_fp.h" - -//** Functions - -//*** OsslToTpmBn() -// This function converts an OpenSSL BIGNUM to a TPM bignum. In this implementation -// it is assumed that OpenSSL uses a different control structure but the same data -// layout -- an array of native-endian words in little-endian order. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure because value will not fit or OpenSSL variable doesn't -// exist -BOOL OsslToTpmBn(bigNum bn, BIGNUM* osslBn) -{ - VERIFY(osslBn != NULL); - // If the bn is NULL, it means that an output value pointer was NULL meaning that - // the results is simply to be discarded. - if(bn != NULL) - { - int i; - // - VERIFY((unsigned)osslBn->top <= BnGetAllocated(bn)); - for(i = 0; i < osslBn->top; i++) - bn->d[i] = osslBn->d[i]; - BnSetTop(bn, osslBn->top); - } - return TRUE; -Error: - return FALSE; -} - -//*** BigInitialized() -// This function initializes an OSSL BIGNUM from a TPM bigConst. Do not use this for -// values that are passed to OpenSLL when they are not declared as const in the -// function prototype. Instead, use BnNewVariable(). -BIGNUM* BigInitialized(BIGNUM* toInit, bigConst initializer) -{ - if(initializer == NULL) - FAIL(FATAL_ERROR_PARAMETER); - if(toInit == NULL || initializer == NULL) - return NULL; - toInit->d = (BN_ULONG*)&initializer->d[0]; - toInit->dmax = (int)initializer->allocated; - toInit->top = (int)initializer->size; - toInit->neg = 0; - toInit->flags = 0; - return toInit; -} - -# ifndef OSSL_DEBUG -# define BIGNUM_PRINT(label, bn, eol) -# define DEBUG_PRINT(x) -# else -# define DEBUG_PRINT(x) printf("%s", x) -# define BIGNUM_PRINT(label, bn, eol) BIGNUM_print((label), (bn), (eol)) - -//*** BIGNUM_print() -static void BIGNUM_print(const char* label, const BIGNUM* a, BOOL eol) -{ - BN_ULONG* d; - int i; - int notZero = FALSE; - - if(label != NULL) - printf("%s", label); - if(a == NULL) - { - printf("NULL"); - goto done; - } - if(a->neg) - printf("-"); - for(i = a->top, d = &a->d[i - 1]; i > 0; i--) - { - int j; - BN_ULONG l = *d--; - for(j = BN_BITS2 - 8; j >= 0; j -= 8) - { - BYTE b = (BYTE)((l >> j) & 0xFF); - notZero = notZero || (b != 0); - if(notZero) - printf("%02x", b); - } - if(!notZero) - printf("0"); - } -done: - if(eol) - printf("\n"); - return; -} -# endif - -//*** BnNewVariable() -// This function allocates a new variable in the provided context. If the context -// does not exist or the allocation fails, it is a catastrophic failure. -static BIGNUM* BnNewVariable(BN_CTX* CTX) -{ - BIGNUM* new; - // - // This check is intended to protect against calling this function without - // having initialized the CTX. - if((CTX == NULL) || ((new = BN_CTX_get(CTX)) == NULL)) - FAIL(FATAL_ERROR_ALLOCATION); - return new; -} - -# if LIBRARY_COMPATIBILITY_CHECK - -//*** MathLibraryCompatibilityCheck() -BOOL MathLibraryCompatibilityCheck(void) -{ - OSSL_ENTER(); - BIGNUM* osslTemp = BnNewVariable(CTX); - crypt_uword_t i; - BYTE test[] = {0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, - 0x14, 0x13, 0x12, 0x11, 0x10, 0x0F, 0x0E, 0x0D, 0x0C, 0x0B, 0x0A, - 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00}; - BN_VAR(tpmTemp, sizeof(test) * 8); // allocate some space for a test value - // - // Convert the test data to a bigNum - BnFromBytes(tpmTemp, test, sizeof(test)); - // Convert the test data to an OpenSSL BIGNUM - BN_bin2bn(test, sizeof(test), osslTemp); - // Make sure the values are consistent - VERIFY(osslTemp->top == (int)tpmTemp->size); - for(i = 0; i < tpmTemp->size; i++) - VERIFY(osslTemp->d[i] == tpmTemp->d[i]); - OSSL_LEAVE(); - return 1; -Error: - return 0; -} -# endif - -//*** BnModMult() -// This function does a modular multiply. It first does a multiply and then a divide -// and returns the remainder of the divide. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnModMult(bigNum result, bigConst op1, bigConst op2, bigConst modulus) -{ - OSSL_ENTER(); - BOOL OK = TRUE; - BIGNUM* bnResult = BN_NEW(); - BIGNUM* bnTemp = BN_NEW(); - BIG_INITIALIZED(bnOp1, op1); - BIG_INITIALIZED(bnOp2, op2); - BIG_INITIALIZED(bnMod, modulus); - // - VERIFY(BN_mul(bnTemp, bnOp1, bnOp2, CTX)); - VERIFY(BN_div(NULL, bnResult, bnTemp, bnMod, CTX)); - VERIFY(OsslToTpmBn(result, bnResult)); - goto Exit; -Error: - OK = FALSE; -Exit: - OSSL_LEAVE(); - return OK; -} - -//*** BnMult() -// Multiplies two numbers -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnMult(bigNum result, bigConst multiplicand, bigConst multiplier) -{ - OSSL_ENTER(); - BIGNUM* bnTemp = BN_NEW(); - BOOL OK = TRUE; - BIG_INITIALIZED(bnA, multiplicand); - BIG_INITIALIZED(bnB, multiplier); - // - VERIFY(BN_mul(bnTemp, bnA, bnB, CTX)); - VERIFY(OsslToTpmBn(result, bnTemp)); - goto Exit; -Error: - OK = FALSE; -Exit: - OSSL_LEAVE(); - return OK; -} - -//*** BnDiv() -// This function divides two bigNum values. The function returns FALSE if -// there is an error in the operation. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnDiv( - bigNum quotient, bigNum remainder, bigConst dividend, bigConst divisor) -{ - OSSL_ENTER(); - BIGNUM* bnQ = BN_NEW(); - BIGNUM* bnR = BN_NEW(); - BOOL OK = TRUE; - BIG_INITIALIZED(bnDend, dividend); - BIG_INITIALIZED(bnSor, divisor); - // - if(BnEqualZero(divisor)) - FAIL(FATAL_ERROR_DIVIDE_ZERO); - VERIFY(BN_div(bnQ, bnR, bnDend, bnSor, CTX)); - VERIFY(OsslToTpmBn(quotient, bnQ)); - VERIFY(OsslToTpmBn(remainder, bnR)); - DEBUG_PRINT("In BnDiv:\n"); - BIGNUM_PRINT(" bnDividend: ", bnDend, TRUE); - BIGNUM_PRINT(" bnDivisor: ", bnSor, TRUE); - BIGNUM_PRINT(" bnQuotient: ", bnQ, TRUE); - BIGNUM_PRINT(" bnRemainder: ", bnR, TRUE); - goto Exit; -Error: - OK = FALSE; -Exit: - OSSL_LEAVE(); - return OK; -} - -# if ALG_RSA -//*** BnGcd() -// Get the greatest common divisor of two numbers -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnGcd(bigNum gcd, // OUT: the common divisor - bigConst number1, // IN: - bigConst number2 // IN: -) -{ - OSSL_ENTER(); - BIGNUM* bnGcd = BN_NEW(); - BOOL OK = TRUE; - BIG_INITIALIZED(bn1, number1); - BIG_INITIALIZED(bn2, number2); - // - VERIFY(BN_gcd(bnGcd, bn1, bn2, CTX)); - VERIFY(OsslToTpmBn(gcd, bnGcd)); - goto Exit; -Error: - OK = FALSE; -Exit: - OSSL_LEAVE(); - return OK; -} - -//***BnModExp() -// Do modular exponentiation using bigNum values. The conversion from a bignum_t to -// a bigNum is trivial as they are based on the same structure -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnModExp(bigNum result, // OUT: the result - bigConst number, // IN: number to exponentiate - bigConst exponent, // IN: - bigConst modulus // IN: -) -{ - OSSL_ENTER(); - BIGNUM* bnResult = BN_NEW(); - BOOL OK = TRUE; - BIG_INITIALIZED(bnN, number); - BIG_INITIALIZED(bnE, exponent); - BIG_INITIALIZED(bnM, modulus); - // - VERIFY(BN_mod_exp(bnResult, bnN, bnE, bnM, CTX)); - VERIFY(OsslToTpmBn(result, bnResult)); - goto Exit; -Error: - OK = FALSE; -Exit: - OSSL_LEAVE(); - return OK; -} - -//*** BnModInverse() -// Modular multiplicative inverse -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -LIB_EXPORT BOOL BnModInverse(bigNum result, bigConst number, bigConst modulus) -{ - OSSL_ENTER(); - BIGNUM* bnResult = BN_NEW(); - BOOL OK = TRUE; - BIG_INITIALIZED(bnN, number); - BIG_INITIALIZED(bnM, modulus); - // - VERIFY(BN_mod_inverse(bnResult, bnN, bnM, CTX) != NULL); - VERIFY(OsslToTpmBn(result, bnResult)); - goto Exit; -Error: - OK = FALSE; -Exit: - OSSL_LEAVE(); - return OK; -} -# endif // ALG_RSA - -# if ALG_ECC - -//*** PointFromOssl() -// Function to copy the point result from an OSSL function to a bigNum -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation -static BOOL PointFromOssl(bigPoint pOut, // OUT: resulting point - EC_POINT* pIn, // IN: the point to return - bigCurve E // IN: the curve -) -{ - BIGNUM* x = NULL; - BIGNUM* y = NULL; - BOOL OK; - BN_CTX_start(E->CTX); - // - x = BN_CTX_get(E->CTX); - y = BN_CTX_get(E->CTX); - - if(y == NULL) - FAIL(FATAL_ERROR_ALLOCATION); - // If this returns false, then the point is at infinity - OK = EC_POINT_get_affine_coordinates_GFp(E->G, pIn, x, y, E->CTX); - if(OK) - { - OsslToTpmBn(pOut->x, x); - OsslToTpmBn(pOut->y, y); - BnSetWord(pOut->z, 1); - } - else - BnSetWord(pOut->z, 0); - BN_CTX_end(E->CTX); - return OK; -} - -//*** EcPointInitialized() -// Allocate and initialize a point. -static EC_POINT* EcPointInitialized(pointConst initializer, bigCurve E) -{ - EC_POINT* P = NULL; - - if(initializer != NULL) - { - BIG_INITIALIZED(bnX, initializer->x); - BIG_INITIALIZED(bnY, initializer->y); - if(E == NULL) - FAIL(FATAL_ERROR_ALLOCATION); - P = EC_POINT_new(E->G); - if(!EC_POINT_set_affine_coordinates_GFp(E->G, P, bnX, bnY, E->CTX)) - P = NULL; - } - return P; -} - -//*** BnCurveInitialize() -// This function initializes the OpenSSL curve information structure. This -// structure points to the TPM-defined values for the curve, to the context for the -// number values in the frame, and to the OpenSSL-defined group values. -// Return Type: bigCurve * -// NULL the TPM_ECC_CURVE is not valid or there was a problem in -// in initializing the curve data -// non-NULL points to 'E' -LIB_EXPORT bigCurve BnCurveInitialize( - bigCurve E, // IN: curve structure to initialize - TPM_ECC_CURVE curveId // IN: curve identifier -) -{ - const ECC_CURVE_DATA* C = GetCurveData(curveId); - if(C == NULL) - E = NULL; - if(E != NULL) - { - // This creates the OpenSSL memory context that stays in effect as long as the - // curve (E) is defined. - OSSL_ENTER(); // if the allocation fails, the TPM fails - EC_POINT* P = NULL; - BIG_INITIALIZED(bnP, C->prime); - BIG_INITIALIZED(bnA, C->a); - BIG_INITIALIZED(bnB, C->b); - BIG_INITIALIZED(bnX, C->base.x); - BIG_INITIALIZED(bnY, C->base.y); - BIG_INITIALIZED(bnN, C->order); - BIG_INITIALIZED(bnH, C->h); - // - E->C = C; - E->CTX = CTX; - - // initialize EC group, associate a generator point and initialize the point - // from the parameter data - // Create a group structure - E->G = EC_GROUP_new_curve_GFp(bnP, bnA, bnB, CTX); - VERIFY(E->G != NULL); - - // Allocate a point in the group that will be used in setting the - // generator. This is not needed after the generator is set. - P = EC_POINT_new(E->G); - VERIFY(P != NULL); - - // Need to use this in case Montgomery method is being used - VERIFY(EC_POINT_set_affine_coordinates_GFp(E->G, P, bnX, bnY, CTX)); - // Now set the generator - VERIFY(EC_GROUP_set_generator(E->G, P, bnN, bnH)); - - EC_POINT_free(P); - goto Exit; -Error: - EC_POINT_free(P); - BnCurveFree(E); - E = NULL; - } -Exit: - return E; -} - -//*** BnCurveFree() -// This function will free the allocated components of the curve and end the -// frame in which the curve data exists -LIB_EXPORT void BnCurveFree(bigCurve E) -{ - if(E) - { - EC_GROUP_free(E->G); - OsslContextLeave(E->CTX); - } -} - -//*** BnEccModMult() -// This function does a point multiply of the form R = [d]S -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' (optional) - bigConst d, // IN: scalar for [d]S - bigCurve E) -{ - EC_POINT* pR = EC_POINT_new(E->G); - EC_POINT* pS = EcPointInitialized(S, E); - BIG_INITIALIZED(bnD, d); - - if(S == NULL) - EC_POINT_mul(E->G, pR, bnD, NULL, NULL, E->CTX); - else - EC_POINT_mul(E->G, pR, NULL, pS, bnD, E->CTX); - PointFromOssl(R, pR, E); - EC_POINT_free(pR); - EC_POINT_free(pS); - return !BnEqualZero(R->z); -} - -//*** BnEccModMult2() -// This function does a point multiply of the form R = [d]G + [u]Q -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult2(bigPoint R, // OUT: computed point - pointConst S, // IN: optional point - bigConst d, // IN: scalar for [d]S or [d]G - pointConst Q, // IN: second point - bigConst u, // IN: second scalar - bigCurve E // IN: curve -) -{ - EC_POINT* pR = EC_POINT_new(E->G); - EC_POINT* pS = EcPointInitialized(S, E); - BIG_INITIALIZED(bnD, d); - EC_POINT* pQ = EcPointInitialized(Q, E); - BIG_INITIALIZED(bnU, u); - - if(S == NULL || S == (pointConst) & (AccessCurveData(E)->base)) - EC_POINT_mul(E->G, pR, bnD, pQ, bnU, E->CTX); - else - { - const EC_POINT* points[2]; - const BIGNUM* scalars[2]; - points[0] = pS; - points[1] = pQ; - scalars[0] = bnD; - scalars[1] = bnU; - EC_POINTs_mul(E->G, pR, NULL, 2, points, scalars, E->CTX); - } - PointFromOssl(R, pR, E); - EC_POINT_free(pR); - EC_POINT_free(pS); - EC_POINT_free(pQ); - return !BnEqualZero(R->z); -} - -//** BnEccAdd() -// This function does addition of two points. -// Return Type: BOOL -// TRUE(1) success -// FALSE(0) failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccAdd(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' - pointConst Q, // IN: second point - bigCurve E // IN: curve -) -{ - EC_POINT* pR = EC_POINT_new(E->G); - EC_POINT* pS = EcPointInitialized(S, E); - EC_POINT* pQ = EcPointInitialized(Q, E); - // - EC_POINT_add(E->G, pR, pS, pQ, E->CTX); - - PointFromOssl(R, pR, E); - EC_POINT_free(pR); - EC_POINT_free(pS); - EC_POINT_free(pQ); - return !BnEqualZero(R->z); -} - -# endif // ALG_ECC - -#endif // MATHLIB OSSL \ No newline at end of file diff --git a/TPMCmd/tpm/src/crypt/ossl/TpmToOsslSupport.c b/TPMCmd/tpm/src/crypt/ossl/TpmToOsslSupport.c deleted file mode 100644 index f30263c7..00000000 --- a/TPMCmd/tpm/src/crypt/ossl/TpmToOsslSupport.c +++ /dev/null @@ -1,94 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -//** Introduction -// -// The functions in this file are used for initialization of the interface to the -// OpenSSL library. - -//** Defines and Includes - -#include "Tpm.h" - -#if defined(HASH_LIB_OSSL) || defined(MATH_LIB_OSSL) || defined(SYM_LIB_OSSL) -// Used to pass the pointers to the correct sub-keys -typedef const BYTE* desKeyPointers[3]; - -//*** SupportLibInit() -// This does any initialization required by the support library. -LIB_EXPORT int SupportLibInit(void) -{ - return TRUE; -} - -//*** OsslContextEnter() -// This function is used to initialize an OpenSSL context at the start of a function -// that will call to an OpenSSL math function. -BN_CTX* OsslContextEnter(void) -{ - BN_CTX* CTX = BN_CTX_new(); - // - return OsslPushContext(CTX); -} - -//*** OsslContextLeave() -// This is the companion function to OsslContextEnter(). -void OsslContextLeave(BN_CTX* CTX) -{ - OsslPopContext(CTX); - BN_CTX_free(CTX); -} - -//*** OsslPushContext() -// This function is used to create a frame in a context. All values allocated within -// this context after the frame is started will be automatically freed when the -// context (OsslPopContext() -BN_CTX* OsslPushContext(BN_CTX* CTX) -{ - if(CTX == NULL) - FAIL(FATAL_ERROR_ALLOCATION); - BN_CTX_start(CTX); - return CTX; -} - -//*** OsslPopContext() -// This is the companion function to OsslPushContext(). -void OsslPopContext(BN_CTX* CTX) -{ - // BN_CTX_end can't be called with NULL. It will blow up. - if(CTX != NULL) - BN_CTX_end(CTX); -} - -#endif // HASH_LIB_OSSL || MATH_LIB_OSSL || SYM_LIB_OSSL diff --git a/TPMCmd/tpm/src/crypt/wolf/TpmToWolfDesSupport.c b/TPMCmd/tpm/src/crypt/wolf/TpmToWolfDesSupport.c deleted file mode 100644 index ba365044..00000000 --- a/TPMCmd/tpm/src/crypt/wolf/TpmToWolfDesSupport.c +++ /dev/null @@ -1,96 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// The functions in this file are used for initialization of the interface to the -// wolfcrypt library. - -//** Defines and Includes - -#include "Tpm.h" - -#if(defined SYM_LIB_WOLF) && ALG_TDES - -//**Functions -//** TDES_setup -// This function calls the wolfcrypt function to generate a TDES key schedule. If the -// If the key is two key (16 bytes), then the first DES key is replicated to the third -// key position. -int TDES_setup(const BYTE* key, UINT32 keyBits, tpmKeyScheduleTDES* skey, int dir) -{ - BYTE k[24]; - BYTE* kp; - - // If this is two-key, make it three key by replicating K1 - if(keyBits == 128) - { - memcpy(k, key, 16); - memcpy(&k[16], key, 8); - kp = k; - } - else - kp = (BYTE*)key; - - return wc_Des3_SetKey(skey, kp, 0, dir); -} - -//** TDES_setup_encrypt_key -// This function calls into TDES_setup(), specifically for an encryption key. -int TDES_setup_encrypt_key(const BYTE* key, UINT32 keyBits, tpmKeyScheduleTDES* skey) -{ - return TDES_setup(key, keyBits, skey, DES_ENCRYPTION); -} - -//** TDES_setup_decrypt_key -// This function calls into TDES_setup(), specifically for an decryption key. -int TDES_setup_decrypt_key(const BYTE* key, UINT32 keyBits, tpmKeyScheduleTDES* skey) -{ - return TDES_setup(key, keyBits, skey, DES_DECRYPTION); -} - -//*** TDES_encyrpt() -void TDES_encrypt(const BYTE* in, BYTE* out, tpmKeyScheduleTDES* ks) -{ - wc_Des3_EcbEncrypt(ks, out, in, DES_BLOCK_SIZE); -} - -//*** TDES_decrypt() -void TDES_decrypt(const BYTE* in, BYTE* out, tpmKeyScheduleTDES* ks) -{ - wc_Des3_EcbDecrypt(ks, out, in, DES_BLOCK_SIZE); -} - -#endif // MATH_LIB_WOLF && ALG_TDES diff --git a/TPMCmd/tpm/src/crypt/wolf/TpmToWolfMath.c b/TPMCmd/tpm/src/crypt/wolf/TpmToWolfMath.c deleted file mode 100644 index beda61d3..00000000 --- a/TPMCmd/tpm/src/crypt/wolf/TpmToWolfMath.c +++ /dev/null @@ -1,482 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// This file contains the math functions that are not implemented in the BnMath -// library (yet). These math functions will call the wolfcrypt library to execute -// the operations. There is a difference between the internal format and the -// wolfcrypt format. To call the wolfcrypt function, a mp_int structure is created -// for each passed variable. We define USE_FAST_MATH wolfcrypt option, which allocates -// mp_int on the stack. We must copy each word to the new structure, and set the used -// size. -// -// Not using USE_FAST_MATH would allow for a simple pointer swap for the big integer -// buffer 'd', however wolfcrypt expects to manage this memory, and will swap out -// the pointer to and from temporary variables and free the reference underneath us. -// Using USE_FAST_MATH also instructs wolfcrypt to use the stack for all these -// intermediate variables - -//** Includes and Defines -#include "Tpm.h" - -#ifdef MATH_LIB_WOLF -# include "BnConvert_fp.h" -# include "TpmToWolfMath_fp.h" - -# define WOLF_HALF_RADIX (RADIX_BITS == 64 && !defined(FP_64BIT)) - -//** Functions - -//*** BnFromWolf() -// This function converts a wolfcrypt mp_int to a TPM bignum. In this implementation -// it is assumed that wolfcrypt used the same format for a big number as does the -// TPM -- an array of native-endian words in little-endian order. -void BnFromWolf(bigNum bn, mp_int* wolfBn) -{ - if(bn != NULL) - { - int i; -# if WOLF_HALF_RADIX - pAssert((unsigned)wolfBn->used <= 2 * BnGetAllocated(bn)); -# else - pAssert((unsigned)wolfBn->used <= BnGetAllocated(bn)); -# endif - for(i = 0; i < wolfBn->used; i++) - { -# if WOLF_HALF_RADIX - if(i & 1) - bn->d[i / 2] |= (crypt_uword_t)wolfBn->dp[i] << 32; - else - bn->d[i / 2] = wolfBn->dp[i]; -# else - bn->d[i] = wolfBn->dp[i]; -# endif - } - -# if WOLF_HALF_RADIX - BnSetTop(bn, (wolfBn->used + 1) / 2); -# else - BnSetTop(bn, wolfBn->used); -# endif - } -} - -//*** BnToWolf() -// This function converts a TPM bignum to a wolfcrypt mp_init, and has the same -// assumptions as made by BnFromWolf() -void BnToWolf(mp_int* toInit, bigConst initializer) -{ - uint32_t i; - if(toInit != NULL && initializer != NULL) - { - for(i = 0; i < initializer->size; i++) - { -# if WOLF_HALF_RADIX - toInit->dp[2 * i] = (fp_digit)initializer->d[i]; - toInit->dp[2 * i + 1] = (fp_digit)(initializer->d[i] >> 32); -# else - toInit->dp[i] = initializer->d[i]; -# endif - } - -# if WOLF_HALF_RADIX - toInit->used = (int)initializer->size * 2; - if(toInit->dp[toInit->used - 1] == 0 && toInit->dp[toInit->used - 2] != 0) - --toInit->used; -# else - toInit->used = (int)initializer->size; -# endif - toInit->sign = 0; - } -} - -//*** MpInitialize() -// This function initializes an wolfcrypt mp_int. -mp_int* MpInitialize(mp_int* toInit) -{ - mp_init(toInit); - return toInit; -} - -# if LIBRARY_COMPATIBILITY_CHECK -//** MathLibraryCompatibililtyCheck() -// This function is only used during development to make sure that the library -// that is being referenced is using the same size of data structures as the TPM. -BOOL MathLibraryCompatibilityCheck(void) -{ - BN_VAR(tpmTemp, 64 * 8); // allocate some space for a test value - crypt_uword_t i; - TPM2B_TYPE(TEST, 16); - TPM2B_TEST test = {{16, - {0x0F, - 0x0E, - 0x0D, - 0x0C, - 0x0B, - 0x0A, - 0x09, - 0x08, - 0x07, - 0x06, - 0x05, - 0x04, - 0x03, - 0x02, - 0x01, - 0x00}}}; - // Convert the test TPM2B to a bigNum - BnFrom2B(tpmTemp, &test.b); - MP_INITIALIZED(wolfTemp, tpmTemp); - (wolfTemp); // compiler warning - // Make sure the values are consistent - VERIFY(wolfTemp->used * sizeof(fp_digit) - == (int)tpmTemp->size * sizeof(crypt_uword_t)); - for(i = 0; i < tpmTemp->size; i++) - VERIFY(((crypt_uword_t*)wolfTemp->dp)[i] == tpmTemp->d[i]); - return 1; -Error: - return 0; -} -# endif - -//*** BnModMult() -// Does multiply and divide returning the remainder of the divide. -LIB_EXPORT BOOL BnModMult(bigNum result, bigConst op1, bigConst op2, bigConst modulus) -{ - WOLF_ENTER(); - BOOL OK; - MP_INITIALIZED(bnOp1, op1); - MP_INITIALIZED(bnOp2, op2); - MP_INITIALIZED(bnTemp, NULL); - BN_VAR(temp, LARGEST_NUMBER_BITS * 2); - - pAssert(BnGetAllocated(result) >= BnGetSize(modulus)); - - OK = (mp_mul(bnOp1, bnOp2, bnTemp) == MP_OKAY); - if(OK) - { - BnFromWolf(temp, bnTemp); - OK = BnDiv(NULL, result, temp, modulus); - } - - WOLF_LEAVE(); - return OK; -} - -//*** BnMult() -// Multiplies two numbers -LIB_EXPORT BOOL BnMult(bigNum result, bigConst multiplicand, bigConst multiplier) -{ - WOLF_ENTER(); - BOOL OK; - MP_INITIALIZED(bnTemp, NULL); - MP_INITIALIZED(bnA, multiplicand); - MP_INITIALIZED(bnB, multiplier); - - pAssert(result->allocated >= (BITS_TO_CRYPT_WORDS( - BnSizeInBits(multiplicand) + BnSizeInBits(multiplier)))); - - OK = (mp_mul(bnA, bnB, bnTemp) == MP_OKAY); - if(OK) - { - BnFromWolf(result, bnTemp); - } - - WOLF_LEAVE(); - return OK; -} - -//*** BnDiv() -// This function divides two bigNum values. The function returns FALSE if -// there is an error in the operation. -LIB_EXPORT BOOL BnDiv( - bigNum quotient, bigNum remainder, bigConst dividend, bigConst divisor) -{ - WOLF_ENTER(); - BOOL OK; - MP_INITIALIZED(bnQ, quotient); - MP_INITIALIZED(bnR, remainder); - MP_INITIALIZED(bnDend, dividend); - MP_INITIALIZED(bnSor, divisor); - pAssert(!BnEqualZero(divisor)); - if(BnGetSize(dividend) < BnGetSize(divisor)) - { - if(quotient) - BnSetWord(quotient, 0); - if(remainder) - BnCopy(remainder, dividend); - OK = TRUE; - } - else - { - pAssert( - (quotient == NULL) - || (quotient->allocated >= (unsigned)(dividend->size - divisor->size))); - pAssert((remainder == NULL) || (remainder->allocated >= divisor->size)); - OK = (mp_div(bnDend, bnSor, bnQ, bnR) == MP_OKAY); - if(OK) - { - BnFromWolf(quotient, bnQ); - BnFromWolf(remainder, bnR); - } - } - - WOLF_LEAVE(); - return OK; -} - -# if ALG_RSA -//*** BnGcd() -// Get the greatest common divisor of two numbers -LIB_EXPORT BOOL BnGcd(bigNum gcd, // OUT: the common divisor - bigConst number1, // IN: - bigConst number2 // IN: -) -{ - WOLF_ENTER(); - BOOL OK; - MP_INITIALIZED(bnGcd, gcd); - MP_INITIALIZED(bn1, number1); - MP_INITIALIZED(bn2, number2); - pAssert(gcd != NULL); - OK = (mp_gcd(bn1, bn2, bnGcd) == MP_OKAY); - if(OK) - { - BnFromWolf(gcd, bnGcd); - } - WOLF_LEAVE(); - return OK; -} - -//***BnModExp() -// Do modular exponentiation using bigNum values. The conversion from a mp_int to -// a bigNum is trivial as they are based on the same structure -LIB_EXPORT BOOL BnModExp(bigNum result, // OUT: the result - bigConst number, // IN: number to exponentiate - bigConst exponent, // IN: - bigConst modulus // IN: -) -{ - WOLF_ENTER(); - BOOL OK; - MP_INITIALIZED(bnResult, result); - MP_INITIALIZED(bnN, number); - MP_INITIALIZED(bnE, exponent); - MP_INITIALIZED(bnM, modulus); - OK = (mp_exptmod(bnN, bnE, bnM, bnResult) == MP_OKAY); - if(OK) - { - BnFromWolf(result, bnResult); - } - - WOLF_LEAVE(); - return OK; -} - -//*** BnModInverse() -// Modular multiplicative inverse -LIB_EXPORT BOOL BnModInverse(bigNum result, bigConst number, bigConst modulus) -{ - WOLF_ENTER(); - BOOL OK; - MP_INITIALIZED(bnResult, result); - MP_INITIALIZED(bnN, number); - MP_INITIALIZED(bnM, modulus); - - OK = (mp_invmod(bnN, bnM, bnResult) == MP_OKAY); - if(OK) - { - BnFromWolf(result, bnResult); - } - - WOLF_LEAVE(); - return OK; -} -# endif // TPM_ALG_RSA - -# if ALG_ECC - -//*** PointFromWolf() -// Function to copy the point result from a wolf ecc_point to a bigNum -void PointFromWolf(bigPoint pOut, // OUT: resulting point - ecc_point* pIn // IN: the point to return -) -{ - BnFromWolf(pOut->x, pIn->x); - BnFromWolf(pOut->y, pIn->y); - BnFromWolf(pOut->z, pIn->z); -} - -//*** PointToWolf() -// Function to copy the point result from a bigNum to a wolf ecc_point -void PointToWolf(ecc_point* pOut, // OUT: resulting point - pointConst pIn // IN: the point to return -) -{ - BnToWolf(pOut->x, pIn->x); - BnToWolf(pOut->y, pIn->y); - BnToWolf(pOut->z, pIn->z); -} - -//*** EcPointInitialized() -// Allocate and initialize a point. -static ecc_point* EcPointInitialized(pointConst initializer) -{ - ecc_point* P; - - P = wc_ecc_new_point(); - pAssert(P != NULL); - // mp_int x,y,z are stack allocated. - // initializer is not required - if(P != NULL && initializer != NULL) - { - PointToWolf(P, initializer); - } - - return P; -} - -//*** BnEccModMult() -// This function does a point multiply of the form R = [d]S -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' (optional) - bigConst d, // IN: scalar for [d]S - bigCurve E) -{ - WOLF_ENTER(); - BOOL OK; - MP_INITIALIZED(bnD, d); - MP_INITIALIZED(bnPrime, CurveGetPrime(E)); - POINT_CREATE(pS, NULL); - POINT_CREATE(pR, NULL); - - if(S == NULL) - S = CurveGetG(AccessCurveData(E)); - - PointToWolf(pS, S); - - OK = (wc_ecc_mulmod(bnD, pS, pR, NULL, bnPrime, 1) == MP_OKAY); - if(OK) - { - PointFromWolf(R, pR); - } - - POINT_DELETE(pR); - POINT_DELETE(pS); - - WOLF_LEAVE(); - return !BnEqualZero(R->z); -} - -//*** BnEccModMult2() -// This function does a point multiply of the form R = [d]G + [u]Q -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccModMult2(bigPoint R, // OUT: computed point - pointConst S, // IN: optional point - bigConst d, // IN: scalar for [d]S or [d]G - pointConst Q, // IN: second point - bigConst u, // IN: second scalar - bigCurve E // IN: curve -) -{ - WOLF_ENTER(); - BOOL OK; - POINT_CREATE(pR, NULL); - POINT_CREATE(pS, NULL); - POINT_CREATE(pQ, Q); - MP_INITIALIZED(bnD, d); - MP_INITIALIZED(bnU, u); - MP_INITIALIZED(bnPrime, CurveGetPrime(E)); - MP_INITIALIZED(bnA, CurveGet_a(E)); - - if(S == NULL) - S = CurveGetG(AccessCurveData(E)); - PointToWolf(pS, S); - - OK = (ecc_mul2add(pS, bnD, pQ, bnU, pR, bnA, bnPrime, NULL) == MP_OKAY); - if(OK) - { - PointFromWolf(R, pR); - } - - POINT_DELETE(pS); - POINT_DELETE(pQ); - POINT_DELETE(pR); - - WOLF_LEAVE(); - return !BnEqualZero(R->z); -} - -//** BnEccAdd() -// This function does addition of two points. -// return type: BOOL -// FALSE failure in operation; treat as result being point at infinity -LIB_EXPORT BOOL BnEccAdd(bigPoint R, // OUT: computed point - pointConst S, // IN: point to multiply by 'd' - pointConst Q, // IN: second point - bigCurve E // IN: curve -) -{ - WOLF_ENTER(); - BOOL OK; - mp_digit mp; - POINT_CREATE(pR, NULL); - POINT_CREATE(pS, S); - POINT_CREATE(pQ, Q); - MP_INITIALIZED(bnA, CurveGet_a(E)); - MP_INITIALIZED(bnMod, CurveGetPrime(E)); - // - OK = (mp_montgomery_setup(bnMod, &mp) == MP_OKAY); - OK = OK && (ecc_projective_add_point(pS, pQ, pR, bnA, bnMod, mp) == MP_OKAY); - if(OK) - { - PointFromWolf(R, pR); - } - - POINT_DELETE(pS); - POINT_DELETE(pQ); - POINT_DELETE(pR); - - WOLF_LEAVE(); - return !BnEqualZero(R->z); -} - -# endif // TPM_ALG_ECC - -#endif // MATH_LIB_WOLF \ No newline at end of file diff --git a/TPMCmd/tpm/src/crypt/wolf/TpmToWolfSupport.c b/TPMCmd/tpm/src/crypt/wolf/TpmToWolfSupport.c deleted file mode 100644 index 4068a65f..00000000 --- a/TPMCmd/tpm/src/crypt/wolf/TpmToWolfSupport.c +++ /dev/null @@ -1,57 +0,0 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or other - * materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//** Introduction -// -// The functions in this file are used for initialization of the interface to the -// wolfSSL library. - -//** Defines and Includes - -#include "Tpm.h" - -#if defined(HASH_LIB_WOLF) || defined(MATH_LIB_WOLF) || defined(SYM_LIB_WOLF) - -//*** SupportLibInit() -// This does any initialization required by the support library. -LIB_EXPORT int SupportLibInit(void) -{ -# if LIBRARY_COMPATIBILITY_CHECK - MathLibraryCompatibilityCheck(); -# endif - return TRUE; -} - -#endif // HASH_LIB_WOLF || MATH_LIB_WOLF || SYM_LIB_WOLF diff --git a/TPMCmd/tpm/src/crypt/wolf/wolfssl.vcxproj b/TPMCmd/tpm/src/crypt/wolf/wolfssl.vcxproj deleted file mode 100644 index afdb9e59..00000000 --- a/TPMCmd/tpm/src/crypt/wolf/wolfssl.vcxproj +++ /dev/null @@ -1,194 +0,0 @@ - - - - - Coverage - Win32 - - - Coverage - x64 - - - WolfDebug - Win32 - - - WolfDebug - x64 - - - WolfRelease - Win32 - - - WolfRelease - x64 - - - - {73973223-5EE8-41CA-8E88-1D60E89A237B} - wolfssl - Win32Proj - 8.1 - $(SolutionDir)..\external\wolfssl\ - - - - StaticLibrary - v141 - Unicode - true - - - StaticLibrary - v141 - Unicode - true - - - StaticLibrary - v141 - Unicode - - - StaticLibrary - v141 - Unicode - - - StaticLibrary - v141 - Unicode - - - StaticLibrary - v141 - Unicode - - - - - - - - - - - - - - - - - - - - - - - - - $(SolutionDir)\bin\$(PlatformTarget)\$(Configuration)\ - $(SolutionDir)\bin\$(ProjectName)\$(PlatformTarget)\$(Configuration)\ - $(VC_IncludePath);$(WindowsSDK_IncludePath);$(WolfRootDir) - - - - WOLFSSL_SHA384;WOLFSSL_SHA512;WOLFSSL_KEY_GEN;WOLFSSL_LIB;WOLFSSL_USER_SETTINGS;CYASSL_USER_SETTINGS;%(PreprocessorDefinitions) - - - - - Disabled - true - EnableFastChecks - MultiThreadedDebugDLL - - Level4 - EditAndContinue - 4206;4214;4706;%(DisableSpecificWarnings) - $(SolutionDir)\tpm\include;$(SolutionDir)\tpm\include\wolf;%(AdditionalIncludeDirectories) - - - - - Disabled - true - EnableFastChecks - MultiThreadedDebugDLL - - - Level4 - EditAndContinue - 4206;4214;4706;%(DisableSpecificWarnings) - $(SolutionDir)\tpm\include;$(SolutionDir)\tpm\include\wolf;%(AdditionalIncludeDirectories) - - - - - Disabled - EnableFastChecks - MultiThreadedDebugDLL - - - Level4 - ProgramDatabase - 4206;4214;4706;%(DisableSpecificWarnings) - $(SolutionDir)\tpm\include;$(SolutionDir)\tpm\include\wolf;%(AdditionalIncludeDirectories) - - - - - Disabled - EnableFastChecks - MultiThreadedDebugDLL - - - Level4 - ProgramDatabase - 4206;4214;4706;%(DisableSpecificWarnings) - - - - - MaxSpeed - true - MultiThreadedDLL - true - - Level3 - ProgramDatabase - $(SolutionDir)\tpm\include;$(SolutionDir)\tpm\include\wolf;%(AdditionalIncludeDirectories) - - - - - MaxSpeed - true - MultiThreadedDLL - true - - - Level3 - ProgramDatabase - $(SolutionDir)\tpm\include;$(SolutionDir)\tpm\include\wolf;%(AdditionalIncludeDirectories) - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/TPMCmd/tpm/src/events/_TPM_Hash_Data.c b/TPMCmd/tpm/src/events/_TPM_Hash_Data.c index 55e81aa4..9ecdc849 100644 --- a/TPMCmd/tpm/src/events/_TPM_Hash_Data.c +++ b/TPMCmd/tpm/src/events/_TPM_Hash_Data.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" // This function is called to process a _TPM_Hash_Data indication. diff --git a/TPMCmd/tpm/src/events/_TPM_Hash_End.c b/TPMCmd/tpm/src/events/_TPM_Hash_End.c index 43c4e2c9..893353aa 100644 --- a/TPMCmd/tpm/src/events/_TPM_Hash_End.c +++ b/TPMCmd/tpm/src/events/_TPM_Hash_End.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" // This function is called to process a _TPM_Hash_End indication. diff --git a/TPMCmd/tpm/src/events/_TPM_Hash_Start.c b/TPMCmd/tpm/src/events/_TPM_Hash_Start.c index 13386115..d2e07078 100644 --- a/TPMCmd/tpm/src/events/_TPM_Hash_Start.c +++ b/TPMCmd/tpm/src/events/_TPM_Hash_Start.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include "Tpm.h" // This function is called to process a _TPM_Hash_Start indication. diff --git a/TPMCmd/tpm/src/events/_TPM_Init.c b/TPMCmd/tpm/src/events/_TPM_Init.c index ea862fa6..8ccaa3a9 100644 --- a/TPMCmd/tpm/src/events/_TPM_Init.c +++ b/TPMCmd/tpm/src/events/_TPM_Init.c @@ -1,39 +1,6 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#include "Tpm.h" -#include "_TPM_Init_fp.h" +#include +// TODO_RENAME_INC_FOLDER:platform_interface refers to the TPM_CoreLib platform interface +#include // This function is used to process a _TPM_Init indication. LIB_EXPORT void _TPM_Init(void) @@ -52,13 +19,15 @@ LIB_EXPORT void _TPM_Init(void) } #endif -#if SIMULATION +#if ALLOW_FORCE_FAILURE_MODE // Clear the flag that forces failure on self-test g_forceFailureMode = FALSE; #endif // Disable the tick processing +#if ACT_SUPPORT _plat__ACT_EnableTicks(FALSE); +#endif // Set initialization state TPMInit(); diff --git a/TPMCmd/tpm/src/main/CommandDispatcher.c b/TPMCmd/tpm/src/main/CommandDispatcher.c index 32d4f832..44f9f698 100644 --- a/TPMCmd/tpm/src/main/CommandDispatcher.c +++ b/TPMCmd/tpm/src/main/CommandDispatcher.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //* Includes and Typedefs #include "Tpm.h" diff --git a/TPMCmd/tpm/src/main/ExecCommand.c b/TPMCmd/tpm/src/main/ExecCommand.c index 8d0cdfc3..7181b1e6 100644 --- a/TPMCmd/tpm/src/main/ExecCommand.c +++ b/TPMCmd/tpm/src/main/ExecCommand.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // // This file contains the entry function ExecuteCommand() which provides the main @@ -41,7 +7,8 @@ #include "Tpm.h" #include "Marshal.h" -#include "ExecCommand_fp.h" +// TODO_RENAME_INC_FOLDER:platform_interface refers to the TPM_CoreLib platform interface +#include // Uncomment this next #include if doing static command/response buffer sizing // #include "CommandResponseSizes_fp.h" @@ -98,19 +65,6 @@ LIB_EXPORT void ExecuteCommand( UINT32 maxResponse = *responseSize; TPM_RC result; // return code for the command -#if MAX_COMMAND_SIZE < 6 || MAX_COMMAND_SIZE > UINT_MAX - 1 \ - || MAX_COMMAND_SIZE > INT32_MAX - 1 -# error bad MAX_COMMAND_SIZE -#endif - // Protect the unmarshaling code from obscenely long requests. The - // preceding #error ensures that MAX_COMMAND_SIZE + 1 fits in both an INT32 - // (used by the unmarshaling code) and an unsigned int (the argument type - // of TpmFailureMode). - if(requestSize > MAX_COMMAND_SIZE) - { - requestSize = MAX_COMMAND_SIZE + 1; - } - // This next function call is used in development to size the command and response // buffers. The values printed are the sizes of the internal structures and // not the sizes of the canonical forms of the command response structures. Also, diff --git a/TPMCmd/tpm/src/main/SessionProcess.c b/TPMCmd/tpm/src/main/SessionProcess.c index dfaf4767..24587ca8 100644 --- a/TPMCmd/tpm/src/main/SessionProcess.c +++ b/TPMCmd/tpm/src/main/SessionProcess.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the subsystem that process the authorization sessions // including implementation of the Dictionary Attack logic. ExecCommand() uses @@ -290,10 +256,10 @@ static BOOL IsAuthValueAvailable(TPM_HANDLE handle, // IN: handle of e case TPM_RH_OWNER: case TPM_RH_ENDORSEMENT: case TPM_RH_PLATFORM: -#ifdef VENDOR_PERMANENT +#if VENDOR_PERMANENT_AUTH_ENABLED == YES // This vendor defined handle associated with the // manufacturer's shared secret - case VENDOR_PERMANENT: + case VENDOR_PERMANENT_AUTH_HANDLE: #endif // The DA checking has been performed on LockoutAuth but we // bypass the DA logic if we are using lockout policy. The @@ -304,12 +270,16 @@ static BOOL IsAuthValueAvailable(TPM_HANDLE handle, // IN: handle of e case TPM_RH_NULL: result = TRUE; break; + +#if ACT_SUPPORT FOR_EACH_ACT(CASE_ACT_HANDLE) { // The ACT auth value is not available if the platform is disabled result = g_phEnable == SET; break; } +#endif // ACT_SUPPORT + default: // Otherwise authValue is not available. break; @@ -432,13 +402,16 @@ static BOOL IsAuthPolicyAvailable(TPM_HANDLE handle, // IN: handle of if(gc.platformPolicy.t.size != 0) result = TRUE; break; -#define ACT_GET_POLICY(N) \ - case TPM_RH_ACT_##N: \ - if(go.ACT_##N.authPolicy.t.size != 0) \ - result = TRUE; \ - break; +#if ACT_SUPPORT + +# define ACT_GET_POLICY(N) \ + case TPM_RH_ACT_##N: \ + if(go.ACT_##N.authPolicy.t.size != 0) \ + result = TRUE; \ + break; FOR_EACH_ACT(ACT_GET_POLICY) +#endif // ACT_SUPPORT case TPM_RH_LOCKOUT: if(gp.lockoutPolicy.t.size != 0) @@ -527,10 +500,10 @@ static TPM2B_DIGEST* GetCpHashPointer(COMMAND* command, TPMI_ALG_HASH hashAlg) // // Define the macro that will expand for each implemented algorithm in the switch // statement below. -#define GET_CP_HASH_POINTER(HASH, Hash) \ - case ALG_##HASH##_VALUE: \ - retVal = (TPM2B_DIGEST*)&command->Hash##CpHash; \ - break; +#define GET_CP_HASH_POINTER(HASH, Hash) \ + case ALG_##HASH##_VALUE: \ + retVal = (TPM2B_DIGEST*)&command->Hash##CpHash; \ + break; switch(hashAlg) { @@ -554,10 +527,10 @@ static TPM2B_DIGEST* GetRpHashPointer(COMMAND* command, TPMI_ALG_HASH hashAlg) // // Define the macro that will expand for each implemented algorithm in the switch // statement below. -#define GET_RP_HASH_POINTER(HASH, Hash) \ - case ALG_##HASH##_VALUE: \ - retVal = (TPM2B_DIGEST*)&command->Hash##RpHash; \ - break; +#define GET_RP_HASH_POINTER(HASH, Hash) \ + case ALG_##HASH##_VALUE: \ + retVal = (TPM2B_DIGEST*)&command->Hash##RpHash; \ + break; switch(hashAlg) { @@ -672,7 +645,7 @@ static BOOL CompareTemplateHash(COMMAND* command, // IN: parsing structure //*** CompareNameHash() // This function computes the name hash and compares it to the nameHash in the -// session data. +// session data, returning true if they are equal. BOOL CompareNameHash(COMMAND* command, // IN: main parsing structure SESSION* session // IN: session structure with nameHash ) @@ -694,6 +667,27 @@ BOOL CompareNameHash(COMMAND* command, // IN: main parsing structure session->u1.nameHash.t.buffer, nameHash.t.buffer, nameHash.t.size); } +//*** CompareParametersHash() +// This function computes the parameters hash and compares it to the pHash in +// the session data, returning true if they are equal. +BOOL CompareParametersHash(COMMAND* command, // IN: main parsing structure + SESSION* session // IN: session structure with pHash +) +{ + HASH_STATE hashState; + TPM2B_DIGEST pHash; + // + pHash.t.size = CryptHashStart(&hashState, session->authHashAlg); + // Add commandCode. + CryptDigestUpdateInt(&hashState, sizeof(TPM_CC), command->code); + // Add the parameters. + CryptDigestUpdate(&hashState, command->parameterSize, command->parameterBuffer); + // Complete hash. + CryptHashEnd2B(&hashState, &pHash.b); + // and compare + return MemoryEqual2B(&session->u1.pHash.b, &pHash.b); +} + //*** CheckPWAuthSession() // This function validates the authorization provided in a PWAP session. It // compares the input value to authValue of the authorized entity. Argument @@ -1026,19 +1020,20 @@ static TPM_RC CheckPolicyAuthSession( // Check physical presence. if(session->attributes.isPPRequired == SET && !_plat__PhysicalPresenceAsserted()) return TPM_RC_PP; - // Compare cpHash/nameHash if defined, or if the command requires an ADMIN or - // DUP role for this handle. + // Compare cpHash/nameHash/pHash/templateHash if defined. if(session->u1.cpHash.b.size != 0) { - BOOL OK; + BOOL OK = FALSE; if(session->attributes.isCpHashDefined) // Compare cpHash. OK = MemoryEqual2B(&session->u1.cpHash.b, &ComputeCpHash(command, session->authHashAlg)->b); - else if(session->attributes.isTemplateSet) - OK = CompareTemplateHash(command, session); - else + else if(session->attributes.isNameHashDefined) OK = CompareNameHash(command, session); + else if(session->attributes.isParametersHashDefined) + OK = CompareParametersHash(command, session); + else if(session->attributes.isTemplateHashDefined) + OK = CompareTemplateHash(command, session); if(!OK) return TPM_RCS_POLICY_FAIL; } @@ -1510,7 +1505,7 @@ ParseSessionBuffer(COMMAND* command // IN: the structure that contains if(i > (command->sessionNum - 1)) return TPM_RC_AUTH_MISSING; // Record the handle associated with the authorization session - s_associatedHandles[i] = command->handles[i]; + s_associatedHandles[i] = HierarchyNormalizeHandle(command->handles[i]); } } // Consistency checks are done first to avoid authorization failure when the @@ -2066,7 +2061,8 @@ BuildResponseSession(COMMAND* command // IN: structure that has relevant comman // expected to be well-formed for parameter encryption. // In the event that there is a bug elsewhere in the code and the // input data is not well-formed, CryptParameterEncryption will - // put the TPM into failure mode. + // put the TPM into failure mode instead of allowing the out-of- + // band write. CryptParameterEncryption(s_sessionHandles[s_encryptSessionIndex], &s_nonceCaller[s_encryptSessionIndex].b, command->parameterSize, @@ -2141,7 +2137,7 @@ void SessionRemoveAssociationToHandle(TPM_HANDLE handle) // for(i = 0; i < MAX_SESSION_NUM; i++) { - if(s_associatedHandles[i] == handle) + if(s_associatedHandles[i] == HierarchyNormalizeHandle(handle)) { s_associatedHandles[i] = TPM_RH_NULL; } diff --git a/TPMCmd/tpm/src/subsystem/CommandAudit.c b/TPMCmd/tpm/src/subsystem/CommandAudit.c index 15c3dae1..0f3181aa 100644 --- a/TPMCmd/tpm/src/subsystem/CommandAudit.c +++ b/TPMCmd/tpm/src/subsystem/CommandAudit.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the functions that support command audit. @@ -223,6 +189,18 @@ CommandAuditCapGetCCList(TPM_CC commandCode, // IN: start command code return more; } +//*** CommandAuditCapGetOneCC() +// This function returns true if a command has its audit bit set. +BOOL CommandAuditCapGetOneCC(TPM_CC commandCode) // IN: command code +{ + COMMAND_INDEX commandIndex = CommandCodeToCommandIndex(commandCode); + if(commandIndex != UNIMPLEMENTED_COMMAND_INDEX) + { + return CommandAuditIsRequired(commandIndex); + } + return FALSE; +} + //*** CommandAuditGetDigest // This command is used to create a digest of the commands being audited. The // commands are processed in ascending numeric order with a list of TPM_CC being diff --git a/TPMCmd/tpm/src/subsystem/DA.c b/TPMCmd/tpm/src/subsystem/DA.c index 8d2c8cb8..cf06d692 100644 --- a/TPMCmd/tpm/src/subsystem/DA.c +++ b/TPMCmd/tpm/src/subsystem/DA.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the functions and data definitions relating to the // dictionary attack logic. @@ -173,8 +139,8 @@ void DASelfHeal(void) else { UINT64 decreaseCount; - // Errata eliminates this code #if 0 + // Errata eliminates this code // In the unlikely event that failedTries should become larger than // maxTries if(gp.failedTries > gp.maxTries) @@ -221,4 +187,4 @@ void DASelfHeal(void) } } return; -} +} \ No newline at end of file diff --git a/TPMCmd/tpm/src/subsystem/Hierarchy.c b/TPMCmd/tpm/src/subsystem/Hierarchy.c index a06759d3..8e33dbfb 100644 --- a/TPMCmd/tpm/src/subsystem/Hierarchy.c +++ b/TPMCmd/tpm/src/subsystem/Hierarchy.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the functions used for managing and accessing the // hierarchy-related values. @@ -40,6 +6,25 @@ #include "Tpm.h" +//**HIERARCHY_MODIFIER_TYPE +// This enumerates the possible hierarchy modifiers. +typedef enum +{ + HM_NONE = 0, + HM_FW_LIMITED, // Hierarchy is firmware-limited. + HM_SVN_LIMITED // Hierarchy is SVN-limited. +} HIERARCHY_MODIFIER_TYPE; + +//*** HIERARCHY_MODIFIER Structure +// A HIERARCHY_MODIFIER structure holds metadata about an OBJECT's +// hierarchy modifier. +typedef struct HIERARCHY_MODIFIER +{ + HIERARCHY_MODIFIER_TYPE type; // The type of modification. + uint16_t min_svn; // The minimum SVN to which the hierarchy is limited. + // Only valid if 'type' is HM_SVN_LIMITED. +} HIERARCHY_MODIFIER; + //** Functions //*** HierarchyPreInstall() @@ -139,70 +124,313 @@ BOOL HierarchyStartup(STARTUP_TYPE type // IN: start up type return TRUE; } +//*** DecomposeHandle() +// This function extracts the base hierarchy and modifier from a given handle. +// Returns the base hierarchy. +static TPMI_RH_HIERARCHY DecomposeHandle(TPMI_RH_HIERARCHY handle, // IN + HIERARCHY_MODIFIER* modifier // OUT +) +{ + TPMI_RH_HIERARCHY base_hierarchy = handle; + + modifier->type = HM_NONE; + + // See if the handle is firmware-bound. + switch(handle) + { + case TPM_RH_FW_OWNER: + { + modifier->type = HM_FW_LIMITED; + base_hierarchy = TPM_RH_OWNER; + break; + } + case TPM_RH_FW_ENDORSEMENT: + { + modifier->type = HM_FW_LIMITED; + base_hierarchy = TPM_RH_ENDORSEMENT; + break; + } + case TPM_RH_FW_PLATFORM: + { + modifier->type = HM_FW_LIMITED; + base_hierarchy = TPM_RH_PLATFORM; + break; + } + case TPM_RH_FW_NULL: + { + modifier->type = HM_FW_LIMITED; + base_hierarchy = TPM_RH_NULL; + break; + } + } + + if(modifier->type == HM_FW_LIMITED) + { + return base_hierarchy; + } + + // See if the handle is SVN-bound. + switch(handle & 0xFFFF0000) + { + case TPM_RH_SVN_OWNER_BASE: + modifier->type = HM_SVN_LIMITED; + base_hierarchy = TPM_RH_OWNER; + break; + case TPM_RH_SVN_ENDORSEMENT_BASE: + modifier->type = HM_SVN_LIMITED; + base_hierarchy = TPM_RH_ENDORSEMENT; + break; + case TPM_RH_SVN_PLATFORM_BASE: + modifier->type = HM_SVN_LIMITED; + base_hierarchy = TPM_RH_PLATFORM; + break; + case TPM_RH_SVN_NULL_BASE: + modifier->type = HM_SVN_LIMITED; + base_hierarchy = TPM_RH_NULL; + break; + } + + if(modifier->type == HM_SVN_LIMITED) + { + modifier->min_svn = handle & 0x0000FFFF; + return base_hierarchy; + } + + // Handle is neither FW- nor SVN-bound; return it unmodified. + return handle; +} + +//*** GetAdditionalSecret() +// Retrieve the additional secret for the given hierarchy modifier, along with the +// label that should be used when mixing the secret into a KDF. If the hierarchy +// needs no additional secret, secret_buffer's size is set to zero and secret_label +// is set to NULL. +// +// Return Type: TPM_RC +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects or the TPM failed +// to derive the Firmware Secret. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the TPM failed +// to derive the Firmware SVN Secret for the requested +// SVN. +static TPM_RC GetAdditionalSecret(const HIERARCHY_MODIFIER* modifier, // IN + TPM2B_SEED* secret_buffer, // OUT + const TPM2B** secret_label // OUT +) +{ + switch(modifier->type) + { + case HM_FW_LIMITED: + { +#if FW_LIMITED_SUPPORT + if(_plat__GetTpmFirmwareSecret(sizeof(secret_buffer->t.buffer), + secret_buffer->t.buffer, + &secret_buffer->t.size) + != 0) + { + return TPM_RC_FW_LIMITED; + } + + *secret_label = HIERARCHY_FW_SECRET_LABEL; + break; +#else + return TPM_RC_FW_LIMITED; +#endif // FW_LIMITED_SUPPORT + } + case HM_SVN_LIMITED: + { +#if SVN_LIMITED_SUPPORT + if(_plat__GetTpmFirmwareSvnSecret(modifier->min_svn, + sizeof(secret_buffer->t.buffer), + secret_buffer->t.buffer, + &secret_buffer->t.size) + != 0) + { + return TPM_RC_SVN_LIMITED; + } + + *secret_label = HIERARCHY_SVN_SECRET_LABEL; + break; +#else + return TPM_RC_SVN_LIMITED; +#endif // SVN_LIMITED_SUPPORT + } + case HM_NONE: + default: + { + secret_buffer->t.size = 0; + *secret_label = NULL; + break; + } + } + + return TPM_RC_SUCCESS; +} + +//***MixAdditionalSecret() +// This function obtains the additional secret for the hierarchy and +// mixes it into the base secret. The output buffer must have the same +// capacity as the base secret. The output buffer's size is set to the +// base secret size. If no additional secret is needed, the base secret +// is copied to the output buffer. +// +// Return Type: TPM_RC +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects or the TPM failed +// to derive the Firmware Secret. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the TPM failed +// to derive the Firmware SVN Secret for the requested +// SVN. +static TPM_RC MixAdditionalSecret(const HIERARCHY_MODIFIER* modifier, // IN + const TPM2B* base_secret_label, // IN + const TPM2B* base_secret, // IN + TPM2B* output_secret // OUT +) +{ + TPM_RC result = TPM_RC_SUCCESS; + TPM2B_SEED additional_secret; + const TPM2B* additional_secret_label = NULL; + + result = + GetAdditionalSecret(modifier, &additional_secret, &additional_secret_label); + if(result != TPM_RC_SUCCESS) + return result; + + output_secret->size = base_secret->size; + + if(additional_secret.b.size == 0) + { + memcpy(output_secret->buffer, base_secret->buffer, base_secret->size); + } + else + { + CryptKDFa(CONTEXT_INTEGRITY_HASH_ALG, + base_secret, + base_secret_label, + &additional_secret.b, + additional_secret_label, + base_secret->size * 8, + output_secret->buffer, + NULL, + FALSE); + } + + MemorySet(additional_secret.b.buffer, 0, additional_secret.b.size); + + return TPM_RC_SUCCESS; +} + //*** HierarchyGetProof() -// This function finds the proof value associated with a hierarchy.It returns a -// pointer to the proof value. -TPM2B_PROOF* HierarchyGetProof(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy constant +// This function derives the proof value associated with a hierarchy. It returns a +// buffer containing the proof value. +TPM_RC HierarchyGetProof(TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy constant + TPM2B_PROOF* proof // OUT: proof buffer ) { - TPM2B_PROOF* proof = NULL; + TPM2B_PROOF* base_proof = NULL; + HIERARCHY_MODIFIER modifier; - switch(hierarchy) + switch(DecomposeHandle(hierarchy, &modifier)) { case TPM_RH_PLATFORM: // phProof for TPM_RH_PLATFORM - proof = &gp.phProof; + base_proof = &gp.phProof; break; case TPM_RH_ENDORSEMENT: // ehProof for TPM_RH_ENDORSEMENT - proof = &gp.ehProof; + base_proof = &gp.ehProof; break; case TPM_RH_OWNER: // shProof for TPM_RH_OWNER - proof = &gp.shProof; + base_proof = &gp.shProof; break; default: // nullProof for TPM_RH_NULL or anything else - proof = &gr.nullProof; + base_proof = &gr.nullProof; break; } - return proof; + + return MixAdditionalSecret( + &modifier, HIERARCHY_PROOF_SECRET_LABEL, &base_proof->b, &proof->b); } //*** HierarchyGetPrimarySeed() -// This function returns the primary seed of a hierarchy. -TPM2B_SEED* HierarchyGetPrimarySeed(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy +// This function derives the primary seed of a hierarchy. +TPM_RC HierarchyGetPrimarySeed(TPMI_RH_HIERARCHY hierarchy, // IN: hierarchy + TPM2B_SEED* seed // OUT: seed buffer ) { - TPM2B_SEED* seed = NULL; - switch(hierarchy) + TPM2B_SEED* base_seed = NULL; + HIERARCHY_MODIFIER modifier; + + switch(DecomposeHandle(hierarchy, &modifier)) { case TPM_RH_PLATFORM: - seed = &gp.PPSeed; + base_seed = &gp.PPSeed; break; case TPM_RH_OWNER: - seed = &gp.SPSeed; + base_seed = &gp.SPSeed; break; case TPM_RH_ENDORSEMENT: - seed = &gp.EPSeed; + base_seed = &gp.EPSeed; break; default: - seed = &gr.nullSeed; + base_seed = &gr.nullSeed; break; } - return seed; + + return MixAdditionalSecret( + &modifier, HIERARCHY_SEED_SECRET_LABEL, &base_seed->b, &seed->b); } -//*** HierarchyIsEnabled() -// This function checks to see if a hierarchy is enabled. -// NOTE: The TPM_RH_NULL hierarchy is always enabled. -// Return Type: BOOL -// TRUE(1) hierarchy is enabled -// FALSE(0) hierarchy is disabled -BOOL HierarchyIsEnabled(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy +//*** ValidateHierarchy() +// This function ensures a given hierarchy is valid and enabled. +// Return Type: TPM_RC +// TPM_RC_HIERARCHY Hierarchy is disabled +// TPM_RC_FW_LIMITED The requested hierarchy is FW-limited, but the TPM +// does not support FW-limited objects. +// TPM_RC_SVN_LIMITED The requested hierarchy is SVN-limited, but the TPM +// does not support SVN-limited objects or the given SVN +// is greater than the TPM's current SVN. +// TPM_RC_VALUE Hierarchy is not valid +TPM_RC ValidateHierarchy(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy ) { - BOOL enabled = FALSE; + BOOL enabled; + HIERARCHY_MODIFIER modifier; + + hierarchy = DecomposeHandle(hierarchy, &modifier); + + // Modifier-specific checks. + switch(modifier.type) + { + case HM_NONE: + break; + case HM_FW_LIMITED: + { +#if FW_LIMITED_SUPPORT + break; +#else + return TPM_RC_FW_LIMITED; +#endif // FW_LIMITED_SUPPORT + } + case HM_SVN_LIMITED: + { +#if SVN_LIMITED_SUPPORT + // SVN-limited hierarchies are only enabled for SVNs less than or + // equal to the current firmware's SVN. + if(modifier.min_svn > _plat__GetTpmFirmwareSvn()) + { + return TPM_RC_SVN_LIMITED; + } + break; +#else + return TPM_RC_SVN_LIMITED; +#endif // SVN_LIMITED_SUPPORT + } + } switch(hierarchy) { @@ -219,8 +447,56 @@ BOOL HierarchyIsEnabled(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy enabled = TRUE; break; default: - enabled = FALSE; - break; + return TPM_RC_VALUE; } - return enabled; + + return enabled ? TPM_RC_SUCCESS : TPM_RC_HIERARCHY; +} + +//*** HierarchyIsEnabled() +// This function checks to see if a hierarchy is enabled. +// NOTE: The TPM_RH_NULL hierarchy is always enabled. +// Return Type: BOOL +// TRUE(1) hierarchy is enabled +// FALSE(0) hierarchy is disabled +BOOL HierarchyIsEnabled(TPMI_RH_HIERARCHY hierarchy // IN: hierarchy +) +{ + return ValidateHierarchy(hierarchy) == TPM_RC_SUCCESS; +} + +//*** HierarchyNormalizeHandle +// This function accepts a handle that may or may not be FW- or SVN-bound, +// and returns the base hierarchy to which the handle refers. +TPMI_RH_HIERARCHY HierarchyNormalizeHandle(TPMI_RH_HIERARCHY handle // IN: handle +) +{ + HIERARCHY_MODIFIER unused_modifier; + + return DecomposeHandle(handle, &unused_modifier); +} + +//*** HierarchyIsFirmwareLimited +// This function accepts a hierarchy handle and returns whether it is firmware- +// limited. +BOOL HierarchyIsFirmwareLimited(TPMI_RH_HIERARCHY handle // IN +) +{ + HIERARCHY_MODIFIER modifier; + + DecomposeHandle(handle, &modifier); + + return modifier.type == HM_FW_LIMITED; +} +//*** HierarchyIsSvnLimited +// This function accepts a hierarchy handle and returns whether it is SVN- +// limited. +BOOL HierarchyIsSvnLimited(TPMI_RH_HIERARCHY handle // IN +) +{ + HIERARCHY_MODIFIER modifier; + + DecomposeHandle(handle, &modifier); + + return modifier.type == HM_SVN_LIMITED; } \ No newline at end of file diff --git a/TPMCmd/tpm/src/subsystem/NvDynamic.c b/TPMCmd/tpm/src/subsystem/NvDynamic.c index 181d1791..60a48cd3 100644 --- a/TPMCmd/tpm/src/subsystem/NvDynamic.c +++ b/TPMCmd/tpm/src/subsystem/NvDynamic.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // The NV memory is divided into two areas: dynamic space for user defined NV @@ -245,7 +211,7 @@ NvWriteNvListEnd(NV_REF end) UINT64 maxCount = NvReadMaxCount(); // // This is a constant check that can be resolved at compile time. - cAssert(sizeof(UINT64) <= sizeof(NV_LIST_TERMINATOR) - sizeof(UINT32)); + MUST_BE(sizeof(UINT64) <= sizeof(NV_LIST_TERMINATOR) - sizeof(UINT32)); // Copy the maxCount value to the marker buffer MemoryCopy(&listEndMarker[sizeof(UINT32)], &maxCount, sizeof(UINT64)); @@ -606,7 +572,13 @@ static TPM_RC NvConditionallyWrite(NV_REF entryAddr, // IN: stating address ) { // If the index data is actually changed, then a write to NV is required - if(_plat__NvIsDifferent(entryAddr, size, data)) + int isDifferent = _plat__NvGetChangedStatus(entryAddr, size, data); + if(isDifferent == NV_INVALID_LOCATION) + { + // invalid request, we should be in failure mode by now. + return TPM_RC_FAILURE; + } + else if(isDifferent == NV_HAS_CHANGED) { // Write the data if NV is available if(g_NvStatus == TPM_RC_SUCCESS) @@ -615,7 +587,12 @@ static TPM_RC NvConditionallyWrite(NV_REF entryAddr, // IN: stating address } return g_NvStatus; } - return TPM_RC_SUCCESS; + else if(isDifferent == NV_IS_SAME) + { + return TPM_RC_SUCCESS; + } + // the platform gave us an invalid response. + FAIL_RC(FATAL_ERROR_PLATFORM); } //*** NvReadNvIndexAttributes() @@ -1096,40 +1073,6 @@ NvWriteUINT64Data(NV_INDEX* nvIndex, // IN: the description of the index return NvWriteIndexData(nvIndex, 0, 8, &bytes); } -//*** NvGetIndexName() -// This function computes the Name of an index -// The 'name' buffer receives the bytes of the Name and the return value -// is the number of octets in the Name. -// -// This function requires that the NV Index is defined. -TPM2B_NAME* NvGetIndexName( - NV_INDEX* nvIndex, // IN: the index over which the name is to be - // computed - TPM2B_NAME* name // OUT: name of the index -) -{ - UINT16 dataSize, digestSize; - BYTE marshalBuffer[sizeof(TPMS_NV_PUBLIC)]; - BYTE* buffer; - HASH_STATE hashState; - // - // Marshal public area - buffer = marshalBuffer; - dataSize = TPMS_NV_PUBLIC_Marshal(&nvIndex->publicArea, &buffer, NULL); - - // hash public area - digestSize = CryptHashStart(&hashState, nvIndex->publicArea.nameAlg); - CryptDigestUpdate(&hashState, dataSize, marshalBuffer); - - // Complete digest leaving room for the nameAlg - CryptHashEnd(&hashState, digestSize, &name->b.buffer[2]); - - // Include the nameAlg - UINT16_TO_BYTE_ARRAY(nvIndex->publicArea.nameAlg, name->b.buffer); - name->t.size = digestSize + 2; - return name; -} - //*** NvGetNameByIndexHandle() // This function is used to compute the Name of an NV Index referenced by handle. // @@ -1484,6 +1427,28 @@ NvCapGetPersistent(TPMI_DH_OBJECT handle, // IN: start handle return more; } +//*** NvCapGetOnePersistent() +// This function returns whether a given persistent handle exists. +// +// 'Handle' must be in valid persistent object handle range. +BOOL NvCapGetOnePersistent(TPMI_DH_OBJECT handle) // IN: handle +{ + NV_REF iter = NV_REF_INIT; + NV_REF currentAddr; + TPM_HANDLE entityHandle; + + pAssert(HandleGetType(handle) == TPM_HT_PERSISTENT); + + while((currentAddr = NvNextEvict(&entityHandle, &iter)) != 0) + { + if(entityHandle == handle) + { + return TRUE; + } + } + return FALSE; +} + //*** NvCapGetIndex() // This function returns a list of handles of NV indexes, starting from 'handle'. // 'Handle' must be in the range of NV indexes, but does not have to reference @@ -1531,6 +1496,26 @@ NvCapGetIndex(TPMI_DH_OBJECT handle, // IN: start handle return more; } +//*** NvCapGetOneIndex() +// This function whether an NV index exists. +BOOL NvCapGetOneIndex(TPMI_DH_OBJECT handle) // IN: handle +{ + NV_REF iter = NV_REF_INIT; + NV_REF currentAddr; + TPM_HANDLE nvHandle; + + pAssert(HandleGetType(handle) == TPM_HT_NV_INDEX); + + while((currentAddr = NvNextIndex(&nvHandle, &iter)) != 0) + { + if(nvHandle == handle) + { + return TRUE; + } + } + return FALSE; +} + //*** NvCapGetIndexNumber() // This function returns the count of NV Indexes currently defined. UINT32 diff --git a/TPMCmd/tpm/src/subsystem/NvReserved.c b/TPMCmd/tpm/src/subsystem/NvReserved.c index 04a9bc22..a60af3f6 100644 --- a/TPMCmd/tpm/src/subsystem/NvReserved.c +++ b/TPMCmd/tpm/src/subsystem/NvReserved.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // The NV memory is divided into two areas: dynamic space for user defined NV @@ -106,13 +72,22 @@ void NvCheckState(void) { int func_return; // - func_return = _plat__IsNvAvailable(); - if(func_return == 0) + func_return = _plat__GetNvReadyState(); + if(func_return == NV_READY) + { g_NvStatus = TPM_RC_SUCCESS; - else if(func_return == 1) + } + else if(func_return == NV_WRITEFAILURE) + { g_NvStatus = TPM_RC_NV_UNAVAILABLE; + } else + { + // if(func_return == NV_RATE_LIMIT) or anything else + // assume retry later might work g_NvStatus = TPM_RC_NV_RATE; + } + return; } @@ -136,7 +111,7 @@ BOOL NvPowerOn(void) // NV and initialize the static variables if(g_powerWasLost) { - if((nvError = _plat__NVEnable(0)) < 0) + if((nvError = _plat__NVEnable(NULL, 0)) < 0) FAIL(FATAL_ERROR_NV_UNRECOVERABLE); NvInitStatic(); } diff --git a/TPMCmd/tpm/src/subsystem/Object.c b/TPMCmd/tpm/src/subsystem/Object.c index ca67d936..15f6b94b 100644 --- a/TPMCmd/tpm/src/subsystem/Object.c +++ b/TPMCmd/tpm/src/subsystem/Object.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the functions that manage the object store of the TPM. @@ -190,43 +156,15 @@ void GetQualifiedName(TPMI_DH_OBJECT handle, // IN: handle of the object return; } -//*** ObjectGetHierarchy() -// This function returns the handle for the hierarchy of an object. -TPMI_RH_HIERARCHY -ObjectGetHierarchy(OBJECT* object // IN :object -) -{ - if(object->attributes.spsHierarchy) - { - return TPM_RH_OWNER; - } - else if(object->attributes.epsHierarchy) - { - return TPM_RH_ENDORSEMENT; - } - else if(object->attributes.ppsHierarchy) - { - return TPM_RH_PLATFORM; - } - else - { - return TPM_RH_NULL; - } -} - //*** GetHierarchy() // This function returns the handle of the hierarchy to which a handle belongs. -// This function is similar to ObjectGetHierarchy() but this routine takes -// a handle but ObjectGetHierarchy() takes an pointer to an object. // // This function requires that 'handle' references a loaded object. TPMI_RH_HIERARCHY GetHierarchy(TPMI_DH_OBJECT handle // IN :object handle ) { - OBJECT* object = HandleToObject(handle); - // - return ObjectGetHierarchy(object); + return HandleToObject(handle)->hierarchy; } //*** FindEmptyObjectSlot() @@ -251,6 +189,7 @@ OBJECT* FindEmptyObjectSlot(TPMI_DH_OBJECT* handle // OUT: (optional) *handle = i + TRANSIENT_FIRST; // Initialize the object attributes MemorySet(&object->attributes, 0, sizeof(OBJECT_ATTRIBUTES)); + object->hierarchy = TPM_RH_NULL; return object; } } @@ -289,8 +228,9 @@ void ObjectSetLoadedAttributes(OBJECT* object, // IN: object attributes to fina // If parent handle is a permanent handle, it is a primary (unless it is NULL if(parent == NULL) { + object->hierarchy = parentHandle; object->attributes.primary = SET; - switch(parentHandle) + switch(HierarchyNormalizeHandle(object->hierarchy)) { case TPM_RH_ENDORSEMENT: object->attributes.epsHierarchy = SET; @@ -321,6 +261,7 @@ void ObjectSetLoadedAttributes(OBJECT* object, // IN: object attributes to fina // is external object->attributes.temporary = parent->attributes.temporary || object->attributes.external; + object->hierarchy = parent->hierarchy; } // If this is an external object, set the QN == name but don't SET other // key properties ('parent' or 'derived') @@ -352,7 +293,8 @@ void ObjectSetLoadedAttributes(OBJECT* object, // IN: object attributes to fina } //*** ObjectLoad() -// Common function to load an object. A loaded object has its public area validated +// Common function to load a non-primary object (i.e., either an Ordinary Object, +// or an External Object). A loaded object has its public area validated // (unless its 'nameAlg' is TPM_ALG_NULL). If a sensitive part is loaded, it is // verified to be correct and if both public and sensitive parts are loaded, then // the cryptographic binding between the objects is validated. This function does @@ -390,15 +332,27 @@ ObjectLoad(OBJECT* object, // IN: pointer to object slot if(sensitive->seedValue.t.size > CryptHashGetDigestSize(publicArea->nameAlg)) return TPM_RCS_KEY_SIZE + blameSensitive; // Check attributes and schemes for consistency - result = PublicAttributesValidation(parent, publicArea); + // For the purposes of attributes validation on this non-primary object, + // either: + // - parent is not NULL and therefore its attributes are checked for + // consistency with the parent, OR + // - parent is NULL but the object is not a primary object, either + result = + PublicAttributesValidation(parent, /*primaryHierarchy = */ 0, publicArea); } if(result != TPM_RC_SUCCESS) return RcSafeAddToResult(result, blamePublic); // Sensitive area and binding checks - // On load, check nothing if the parent is fixedTPM. For all other cases, validate - // the keys. + // On load, check nothing if the parent is fixedTPM. + // If the parent is fixedTPM, then this TPM produced this key blob (either + // by import, or creation). If the parent is not fixedTPM, then an external + // copy of the parent's protection seed might have been used to create the + // blob, and we have to validate it. + // NOTE: By the time a TPMT_SENSITIVE has been decrypted and passed to this + // function, it has been validated against the corresponding TPMT_PUBLIC. + // For more information about this check, see PrivateToSensitive. if((parent == NULL) || ((parent != NULL) && !IS_ATTRIBUTE( @@ -456,7 +410,7 @@ static HASH_OBJECT* AllocateSequenceSlot( // Validate that the proper location of the hash state data relative to the // object state data. It would be good if this could have been done at compile // time but it can't so do it in something that can be removed after debug. - cAssert(offsetof(HASH_OBJECT, auth) == offsetof(OBJECT, publicArea.authPolicy)); + MUST_BE(offsetof(HASH_OBJECT, auth) == offsetof(OBJECT, publicArea.authPolicy)); if(object != NULL) { @@ -737,8 +691,8 @@ ObjectLoadEvict(TPM_HANDLE* handle, // IN:OUT: evict object handle. If success // that the hierarchy is disabled. // If the associated hierarchy is disabled, make it look like the // handle is not defined - if(ObjectGetHierarchy(object) == TPM_RH_ENDORSEMENT && gc.ehEnable == CLEAR - && GetCommandCode(commandIndex) != TPM_CC_EvictControl) + if(HierarchyNormalizeHandle(object->hierarchy) == TPM_RH_ENDORSEMENT + && gc.ehEnable == CLEAR && GetCommandCode(commandIndex) != TPM_CC_EvictControl) return TPM_RC_HANDLE; return result; @@ -850,7 +804,7 @@ BOOL ObjectIsStorage(TPMI_DH_OBJECT handle // IN: object handle } //*** ObjectCapGetLoaded() -// This function returns a a list of handles of loaded object, starting from +// This function returns a list of handles of loaded object, starting from // 'handle'. 'Handle' must be in the range of valid transient object handles, // but does not have to be the handle of a loaded transient object. // Return Type: TPMI_YES_NO @@ -902,6 +856,29 @@ ObjectCapGetLoaded(TPMI_DH_OBJECT handle, // IN: start handle return more; } +//*** ObjectCapGetOneLoaded() +// This function returns whether a handle is loaded. +BOOL ObjectCapGetOneLoaded(TPMI_DH_OBJECT handle) // IN: handle +{ + UINT32 i; + + pAssert(HandleGetType(handle) == TPM_HT_TRANSIENT); + + // Iterate object slots to get loaded object handles + for(i = handle - TRANSIENT_FIRST; i < MAX_LOADED_OBJECTS; i++) + { + if(s_objects[i].attributes.occupied == TRUE) + { + // A valid transient object can not be the copy of a persistent object + pAssert(s_objects[i].attributes.evict == CLEAR); + + return TRUE; + } + } + + return FALSE; +} + //*** ObjectCapGetTransientAvail() // This function returns an estimate of the number of additional transient // objects that could be loaded into the TPM. diff --git a/TPMCmd/tpm/src/subsystem/PCR.c b/TPMCmd/tpm/src/subsystem/PCR.c index 70f9ffe5..39c9038b 100644 --- a/TPMCmd/tpm/src/subsystem/PCR.c +++ b/TPMCmd/tpm/src/subsystem/PCR.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // // This function contains the functions needed for PCR access and manipulation. @@ -50,26 +16,10 @@ #define PCR_C #include "Tpm.h" -// The initial value of PCR attributes. The value of these fields should be -// consistent with PC Client specification -// In this implementation, we assume the total number of implemented PCR is 24. -static const PCR_Attributes s_initAttributes[] = { - // PCR 0 - 15, static RTM - {1, 0, 0x1F}, {1, 0, 0x1F}, {1, 0, 0x1F}, {1, 0, 0x1F}, - {1, 0, 0x1F}, {1, 0, 0x1F}, {1, 0, 0x1F}, {1, 0, 0x1F}, - {1, 0, 0x1F}, {1, 0, 0x1F}, {1, 0, 0x1F}, {1, 0, 0x1F}, - {1, 0, 0x1F}, {1, 0, 0x1F}, {1, 0, 0x1F}, {1, 0, 0x1F}, - - {0, 0x0F, 0x1F}, // PCR 16, Debug - {0, 0x10, 0x1C}, // PCR 17, Locality 4 - {0, 0x10, 0x1C}, // PCR 18, Locality 3 - {0, 0x10, 0x0C}, // PCR 19, Locality 2 - {0, 0x14, 0x0E}, // PCR 20, Locality 1 - {0, 0x14, 0x04}, // PCR 21, Dynamic OS - {0, 0x14, 0x04}, // PCR 22, Dynamic OS - {0, 0x0F, 0x1F}, // PCR 23, Application specific - {0, 0x0F, 0x1F} // PCR 24, testing policy -}; +// verify values from pcrstruct.h. not <= because group #0 is reserved +// indicating no auth/policy support +TPM_STATIC_ASSERT(NUM_AUTHVALUE_PCR_GROUP < (1 << MAX_PCR_GROUP_BITS)); +TPM_STATIC_ASSERT(NUM_POLICY_PCR_GROUP < (1 << MAX_PCR_GROUP_BITS)); //** Functions @@ -82,22 +32,29 @@ static const PCR_Attributes s_initAttributes[] = { // TRUE(1) PCR belongs an authorization group // FALSE(0) PCR does not belong an authorization group BOOL PCRBelongsAuthGroup(TPMI_DH_PCR handle, // IN: handle of PCR - UINT32* groupIndex // OUT: group index if PCR belongs a - // group that allows authValue. If PCR + UINT32* groupIndex // OUT: group array index if PCR + // belongs to a group that allows authValue. If PCR // does not belong to an authorization - // group, the value in this parameter is - // invalid + // group, the value in this parameter is zero ) { + *groupIndex = 0; + #if defined NUM_AUTHVALUE_PCR_GROUP && NUM_AUTHVALUE_PCR_GROUP > 0 // Platform specification determines to which authorization group a PCR belongs // (if any). In this implementation, we assume there is only // one authorization group which contains PCR[20-22]. If the platform // specification requires differently, the implementation should be changed // accordingly - if(handle >= 20 && handle <= 22) + UINT32 pcr = handle - PCR_FIRST; + PCR_Attributes currentPcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcr); + + if(currentPcrAttributes.authValuesGroup != 0) { - *groupIndex = 0; + // turn 1-based group number into actual array index expected by callers + *groupIndex = currentPcrAttributes.authValuesGroup - 1; + pAssert_BOOL(*groupIndex < NUM_AUTHVALUE_PCR_GROUP); return TRUE; } @@ -110,26 +67,30 @@ BOOL PCRBelongsAuthGroup(TPMI_DH_PCR handle, // IN: handle of PCR // authorization in order to modify the PCR. If it does, 'groupIndex' is set // to value of the group index. This feature of PCR is decided by the platform // specification. -// -// Return Type: BOOL -// TRUE(1) PCR belongs to a policy group -// FALSE(0) PCR does not belong to a policy group +// return type: BOOL +// TRUE: PCR belongs a policy group +// FALSE: PCR does not belong a policy group BOOL PCRBelongsPolicyGroup( TPMI_DH_PCR handle, // IN: handle of PCR UINT32* groupIndex // OUT: group index if PCR belongs a group that // allows policy. If PCR does not belong to // a policy group, the value in this - // parameter is invalid + // parameter is zero ) { + *groupIndex = 0; + #if defined NUM_POLICY_PCR_GROUP && NUM_POLICY_PCR_GROUP > 0 // Platform specification decides if a PCR belongs to a policy group and - // belongs to which group. In this implementation, we assume there is only - // one policy group which contains PCR20-22. If the platform specification - // requires differently, the implementation should be changed accordingly - if(handle >= 20 && handle <= 22) + // belongs to which group. + UINT32 pcr = handle - PCR_FIRST; + PCR_Attributes currentPcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcr); + if(currentPcrAttributes.policyAuthGroup != 0) { - *groupIndex = 0; + // turn 1-based group number into actual array index expected by callers + *groupIndex = currentPcrAttributes.policyAuthGroup - 1; + pAssert_BOOL(*groupIndex < NUM_POLICY_PCR_GROUP); return TRUE; } #endif @@ -138,31 +99,28 @@ BOOL PCRBelongsPolicyGroup( //*** PCRBelongsTCBGroup() // This function indicates if a PCR belongs to the TCB group. -// -// Return Type: BOOL -// TRUE(1) PCR belongs to a TCB group -// FALSE(0) PCR does not belong to a TCB group +// return type: BOOL +// TRUE: PCR belongs to TCB group +// FALSE: PCR does not belong to TCB group static BOOL PCRBelongsTCBGroup(TPMI_DH_PCR handle // IN: handle of PCR ) { #if ENABLE_PCR_NO_INCREMENT == YES - // Platform specification decides if a PCR belongs to a TCB group. In this - // implementation, we assume PCR[20-22] belong to TCB group. If the platform - // specification requires differently, the implementation should be - // changed accordingly - if(handle >= 20 && handle <= 22) - return TRUE; - -#endif + // Platform specification decides if a PCR belongs to a TCB group. + UINT32 pcr = handle - PCR_FIRST; + PCR_Attributes currentPcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcr); + return currentPcrAttributes.doNotIncrementPcrCounter; +#else return FALSE; +#endif } //*** PCRPolicyIsAvailable() // This function indicates if a policy is available for a PCR. -// -// Return Type: BOOL -// TRUE(1) the PCR may be authorized by policy -// FALSE(0) the PCR does not allow policy +// return type: BOOL +// TRUE the PCR may be authorized by policy +// FALSE the PCR does not allow policy BOOL PCRPolicyIsAvailable(TPMI_DH_PCR handle // IN: PCR handle ) { @@ -212,11 +170,11 @@ PCRGetAuthPolicy(TPMI_DH_PCR handle, // IN: PCR handle } } -//*** PCRSimStart() +//*** PCRManufacture() // This function is used to initialize the policies when a TPM is manufactured. // This function would only be called in a manufacturing environment or in // a TPM simulator. -void PCRSimStart(void) +void PCRManufacture(void) { UINT32 i; #if defined NUM_POLICY_PCR_GROUP && NUM_POLICY_PCR_GROUP > 0 @@ -238,13 +196,18 @@ void PCRSimStart(void) for(gp.pcrAllocated.count = 0; gp.pcrAllocated.count < HASH_COUNT; gp.pcrAllocated.count++) { - gp.pcrAllocated.pcrSelections[gp.pcrAllocated.count].hash = - CryptHashGetAlgByIndex(gp.pcrAllocated.count); + TPM_ALG_ID currentBank = CryptHashGetAlgByIndex(gp.pcrAllocated.count); + BOOL isBankActive = _platPcr_IsPcrBankDefaultActive(currentBank); + + gp.pcrAllocated.pcrSelections[gp.pcrAllocated.count].hash = currentBank; gp.pcrAllocated.pcrSelections[gp.pcrAllocated.count].sizeofSelect = PCR_SELECT_MAX; for(i = 0; i < PCR_SELECT_MAX; i++) - gp.pcrAllocated.pcrSelections[gp.pcrAllocated.count].pcrSelect[i] = 0xFF; + { + gp.pcrAllocated.pcrSelections[gp.pcrAllocated.count].pcrSelect[i] = + isBankActive ? 0xFF : 0; + } } // Store the initial configuration to NV @@ -265,19 +228,19 @@ static BYTE* GetSavedPcrPointer(TPM_ALG_ID alg, // IN: algorithm for bank UINT32 pcrIndex // IN: PCR index in PCR_SAVE ) { - BYTE* retVal; + BYTE* retVal = NULL; switch(alg) { -#define HASH_CASE(HASH, Hash) \ - case TPM_ALG_##HASH: \ - retVal = gc.pcrSave.Hash[pcrIndex]; \ - break; +#define HASH_CASE(HASH, Hash) \ + case TPM_ALG_##HASH: \ + retVal = gc.pcrSave.Hash[pcrIndex]; \ + break; FOR_EACH_HASH(HASH_CASE) #undef HASH_CASE default: - FAIL(FATAL_ERROR_INTERNAL); + FAIL_NULL(FATAL_ERROR_INTERNAL); } return retVal; } @@ -314,37 +277,83 @@ BOOL PcrIsAllocated(UINT32 pcr, // IN: The number of the PCR return allocated; } -//*** GetPcrPointer() -// This function returns the address of an array of PCR based on the -// hash algorithm. -// -// Return Type: BYTE * -// NULL no such algorithm -// != NULL pointer to the 0th byte of the 0th PCR -static BYTE* GetPcrPointer(TPM_ALG_ID alg, // IN: algorithm for bank - UINT32 pcrNumber // IN: PCR number +// Get pointer to particular PCR from bank (array) +// CAUTION: This function does not validate the pcrNumber +// vs the size of the array. +// See Also: GetPcrPointerIfAllocated +static BYTE* GetPcrPointerFromPcrArray(PCR* pPcrArray, + TPM_ALG_ID alg, // IN: algorithm for bank + UINT32 pcrNumber // IN: PCR number ) { - static BYTE* pcr = NULL; - // - if(!PcrIsAllocated(pcrNumber, alg)) - return NULL; - switch(alg) { -#define HASH_CASE(HASH, Hash) \ - case TPM_ALG_##HASH: \ - pcr = s_pcrs[pcrNumber].Hash##Pcr; \ - break; - - FOR_EACH_HASH(HASH_CASE) -#undef HASH_CASE - +#if ALG_SHA1 + case TPM_ALG_SHA1: + return pPcrArray[pcrNumber].Sha1Pcr; +#endif +#if ALG_SHA256 + case TPM_ALG_SHA256: + return pPcrArray[pcrNumber].Sha256Pcr; +#endif +#if ALG_SHA384 + case TPM_ALG_SHA384: + return pPcrArray[pcrNumber].Sha384; +#endif +#if ALG_SHA512 + case TPM_ALG_SHA512: + return pPcrArray[pcrNumber].Sha512; +#endif +#if ALG_SM3_256 + case TPM_ALG_SM3_256: + return pPcrArray[pcrNumber].Sm3_256; +#endif +#if ALG_SHA3_256 + case TPM_ALG_SHA3_256: + return pPcrArray[pcrNumber].Sha3_256; +#endif +#if ALG_SHA3_384 + case TPM_ALG_SHA3_384: + return pPcrArray[pcrNumber].Sha3_384; +#endif +#if ALG_SHA3_512 + case TPM_ALG_SHA3_512: + return pPcrArray[pcrNumber].Sha3_512; +#endif default: FAIL(FATAL_ERROR_INTERNAL); break; } - return pcr; + return NULL; +} + +BYTE* GetPcrPointerIfAllocated(PCR* pPcrArray, + TPM_ALG_ID alg, // IN: algorithm for bank + UINT32 pcrNumber // IN: PCR number +) +{ + // + if(!PcrIsAllocated(pcrNumber, alg)) + return NULL; + + return GetPcrPointerFromPcrArray(pPcrArray, + alg, // IN: algorithm for bank + pcrNumber // IN: PCR number + ); +} + +//*** GetPcrPointer() +// This function returns the address of an array of PCR based on the +// hash algorithm. +// +// Return Type: BYTE * +// NULL no such algorithm +// != NULL pointer to the 0th byte of the requested PCR +BYTE* GetPcrPointer(TPM_ALG_ID alg, // IN: algorithm for bank + UINT32 pcrNumber // IN: PCR number +) +{ + return GetPcrPointerIfAllocated(s_pcrs, alg, pcrNumber); } //*** IsPcrSelected() @@ -461,13 +470,22 @@ BOOL PCRStartup(STARTUP_TYPE type, // IN: startup type gr.pcrCounter = 0; } + // check the TPM library and platform are properly paired. + // if this fails the platform and library are compiled with different + // definitions of the number of PCRs - immediately enter FAILURE mode and + // return FALSE + pAssert_BOOL(_platPcr__NumberOfPcrs() == IMPLEMENTATION_PCR); + // Initialize/Restore PCR values for(pcr = 0; pcr < IMPLEMENTATION_PCR; pcr++) { // On resume, need to know if this PCR had its state saved or not UINT32 stateSaved; + // note structure is a bitfield and returned by value. + PCR_Attributes currentPcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcr); - if(type == SU_RESUME && s_initAttributes[pcr].stateSave == SET) + if(type == SU_RESUME && currentPcrAttributes.stateSave == SET) { stateSaved = 1; } @@ -496,25 +514,47 @@ BOOL PCRStartup(STARTUP_TYPE type, // IN: startup type { // Restore saved PCR value BYTE* pcrSavedData; - pcrSavedData = GetSavedPcrPointer( - gp.pcrAllocated.pcrSelections[j].hash, saveIndex); + pcrSavedData = GetSavedPcrPointer(hash, saveIndex); if(pcrSavedData == NULL) return FALSE; MemoryCopy(pcrData, pcrSavedData, pcrSize); } - else - // PCR was not restored by state save + else // PCR was not restored by state save { - // If the reset locality of the PCR is 4, then - // the reset value is all one's, otherwise it is - // all zero. - if((s_initAttributes[pcr].resetLocality & 0x10) != 0) - MemorySet(pcrData, 0xFF, pcrSize); + // give platform opportunity to provide the PCR initialization + // value and it's length. this provides a platform specification + // the ability to change the default values without affecting the + // core library. if the platform doesn't have a value, then the + // result is expected to be TPM_RC_PCR and the size to be 0 and we + // provide the original defaults. + uint16_t pcrLength = 0; + TPM_RC pcrInitialResult = _platPcr__GetInitialValueForPcr( + pcr, hash, locality, pcrData, pcrSize, &pcrLength); + + // any other result is a fatal error + pAssert_BOOL(pcrInitialResult == TPM_RC_SUCCESS + || pcrInitialResult == TPM_RC_PCR); + if(pcrInitialResult == TPM_RC_SUCCESS && pcrLength == pcrSize) + { + // just use the PCR initialized by platform + } else { - MemorySet(pcrData, 0, pcrSize); + // If the reset locality contains locality 4, then this + // indicates a DRTM PCR where the reset value is all ones, + // otherwise it is all zero. Don't check with equal because + // resetLocality is a bitfield of multiple values and does + // not support extended localities. + BYTE defaultValue = 0; + if((currentPcrAttributes.resetLocality & 0x10) != 0) + { + defaultValue = 0xFF; + } + MemorySet(pcrData, defaultValue, pcrSize); if(pcr == HCRTM_PCR) + { pcrData[pcrSize - 1] = locality; + } } } } @@ -542,7 +582,10 @@ void PCRStateSave(TPM_SU type // IN: startup type // Copy PCR values to the structure that should be saved to NV for(pcr = 0; pcr < IMPLEMENTATION_PCR; pcr++) { - UINT32 stateSaved = (s_initAttributes[pcr].stateSave == SET) ? 1 : 0; + PCR_Attributes currentPcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcr); + + UINT32 stateSaved = (currentPcrAttributes.stateSave == SET) ? 1 : 0; // Iterate each hash algorithm bank for(j = 0; j < gp.pcrAllocated.count; j++) @@ -582,9 +625,11 @@ void PCRStateSave(TPM_SU type // IN: startup type BOOL PCRIsStateSaved(TPMI_DH_PCR handle // IN: PCR handle to be extended ) { - UINT32 pcr = handle - PCR_FIRST; + UINT32 pcr = handle - PCR_FIRST; + PCR_Attributes currentPcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcr); - if(s_initAttributes[pcr].stateSave == SET) + if(currentPcrAttributes.stateSave == SET) return TRUE; else return FALSE; @@ -599,9 +644,11 @@ BOOL PCRIsStateSaved(TPMI_DH_PCR handle // IN: PCR handle to be extended BOOL PCRIsResetAllowed(TPMI_DH_PCR handle // IN: PCR handle to be extended ) { - UINT8 commandLocality; - UINT8 localityBits = 1; - UINT32 pcr = handle - PCR_FIRST; + UINT8 commandLocality; + UINT8 localityBits = 1; + UINT32 pcr = handle - PCR_FIRST; + PCR_Attributes currentPcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcr); // Check for the locality commandLocality = _plat__LocalityGet(); @@ -613,7 +660,7 @@ BOOL PCRIsResetAllowed(TPMI_DH_PCR handle // IN: PCR handle to be extended #endif localityBits = localityBits << commandLocality; - if((localityBits & s_initAttributes[pcr].resetLocality) == 0) + if((localityBits & currentPcrAttributes.resetLocality) == 0) return FALSE; else return TRUE; @@ -647,14 +694,16 @@ void PCRChanged(TPM_HANDLE pcrHandle // IN: the handle of the PCR that changed. BOOL PCRIsExtendAllowed(TPMI_DH_PCR handle // IN: PCR handle to be extended ) { - UINT8 commandLocality; - UINT8 localityBits = 1; - UINT32 pcr = handle - PCR_FIRST; + UINT8 commandLocality; + UINT8 localityBits = 1; + UINT32 pcr = handle - PCR_FIRST; + PCR_Attributes currentPcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcr); // Check for the locality commandLocality = _plat__LocalityGet(); localityBits = localityBits << commandLocality; - if((localityBits & s_initAttributes[pcr].extendLocality) == 0) + if((localityBits & currentPcrAttributes.extendLocality) == 0) return FALSE; else return TRUE; @@ -867,7 +916,7 @@ PCRAllocate(TPML_PCR_SELECTION* allocate, // IN: required allocation } // Max PCR in a bank is MIN(implemented PCR, PCR with attributes defined) - *maxPCR = sizeof(s_initAttributes) / sizeof(PCR_Attributes); + *maxPCR = _platPcr__NumberOfPcrs(); if(*maxPCR > IMPLEMENTATION_PCR) *maxPCR = IMPLEMENTATION_PCR; @@ -884,7 +933,7 @@ PCRAllocate(TPML_PCR_SELECTION* allocate, // IN: required allocation newAllocate.pcrSelections[i].sizeofSelect); #else // if DRTM PCR is not required, indicate that the allocation is OK - pcrDrtm = TRUE; + pcrDrtm = TRUE; #endif #if defined(HCRTM_PCR) @@ -981,8 +1030,10 @@ void PCRResetDynamics(void) // Iterate each hash algorithm bank for(i = 0; i < gp.pcrAllocated.count; i++) { - BYTE* pcrData; - UINT32 pcrSize; + BYTE* pcrData; + UINT32 pcrSize; + PCR_Attributes currentPcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcr); pcrData = GetPcrPointer(gp.pcrAllocated.pcrSelections[i].hash, pcr); @@ -993,7 +1044,7 @@ void PCRResetDynamics(void) // Reset PCR // Any PCR can be reset by locality 4 should be reset to 0 - if((s_initAttributes[pcr].resetLocality & 0x10) != 0) + if((currentPcrAttributes.resetLocality & 0x10) != 0) MemorySet(pcrData, 0, pcrSize); } } @@ -1038,7 +1089,7 @@ static void PCRSetSelectBit(UINT32 pcr, // IN: PCR number // Return Type: BOOL // TRUE(1) the property type is implemented // FALSE(0) the property type is not implemented -static BOOL PCRGetProperty(TPM_PT_PCR property, TPMS_TAGGED_PCR_SELECT* select) +BOOL PCRGetProperty(TPM_PT_PCR property, TPMS_TAGGED_PCR_SELECT* select) { UINT32 pcr; UINT32 groupIndex; @@ -1053,55 +1104,58 @@ static BOOL PCRGetProperty(TPM_PT_PCR property, TPMS_TAGGED_PCR_SELECT* select) // Collecting properties for(pcr = 0; pcr < IMPLEMENTATION_PCR; pcr++) { + PCR_Attributes currentPcrAttributes = + _platPcr__GetPcrInitializationAttributes(pcr); + switch(property) { case TPM_PT_PCR_SAVE: - if(s_initAttributes[pcr].stateSave == SET) + if(currentPcrAttributes.stateSave == SET) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_EXTEND_L0: - if((s_initAttributes[pcr].extendLocality & 0x01) != 0) + if((currentPcrAttributes.extendLocality & 0x01) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_RESET_L0: - if((s_initAttributes[pcr].resetLocality & 0x01) != 0) + if((currentPcrAttributes.resetLocality & 0x01) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_EXTEND_L1: - if((s_initAttributes[pcr].extendLocality & 0x02) != 0) + if((currentPcrAttributes.extendLocality & 0x02) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_RESET_L1: - if((s_initAttributes[pcr].resetLocality & 0x02) != 0) + if((currentPcrAttributes.resetLocality & 0x02) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_EXTEND_L2: - if((s_initAttributes[pcr].extendLocality & 0x04) != 0) + if((currentPcrAttributes.extendLocality & 0x04) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_RESET_L2: - if((s_initAttributes[pcr].resetLocality & 0x04) != 0) + if((currentPcrAttributes.resetLocality & 0x04) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_EXTEND_L3: - if((s_initAttributes[pcr].extendLocality & 0x08) != 0) + if((currentPcrAttributes.extendLocality & 0x08) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_RESET_L3: - if((s_initAttributes[pcr].resetLocality & 0x08) != 0) + if((currentPcrAttributes.resetLocality & 0x08) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_EXTEND_L4: - if((s_initAttributes[pcr].extendLocality & 0x10) != 0) + if((currentPcrAttributes.extendLocality & 0x10) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_RESET_L4: - if((s_initAttributes[pcr].resetLocality & 0x10) != 0) + if((currentPcrAttributes.resetLocality & 0x10) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; case TPM_PT_PCR_DRTM_RESET: // DRTM reset PCRs are the PCR reset by locality 4 - if((s_initAttributes[pcr].resetLocality & 0x10) != 0) + if((currentPcrAttributes.resetLocality & 0x10) != 0) PCRSetSelectBit(pcr, select->pcrSelect); break; #if defined NUM_POLICY_PCR_GROUP && NUM_POLICY_PCR_GROUP > 0 @@ -1155,7 +1209,7 @@ PCRCapGetProperties(TPM_PT_PCR property, // IN: the starting PCR property // TPM_PT_PCR_FIRST is defined as 0 in spec. It ensures that property // value would never be less than TPM_PT_PCR_FIRST - cAssert(TPM_PT_PCR_FIRST == 0); + MUST_BE(TPM_PT_PCR_FIRST == 0); // Iterate PCR properties. TPM_PT_PCR_LAST is the index of the last property // implemented on the TPM. @@ -1223,4 +1277,17 @@ PCRCapGetHandles(TPMI_DH_PCR handle, // IN: start handle } } return more; -} \ No newline at end of file +} + +//*** PCRCapGetOneHandle() +// This function is used to check whether a PCR handle exists. +BOOL PCRCapGetOneHandle(TPMI_DH_PCR handle) // IN: handle +{ + pAssert(HandleGetType(handle) == TPM_HT_PCR); + + if((handle & HR_HANDLE_MASK) <= PCR_LAST) + { + return TRUE; + } + return FALSE; +} diff --git a/TPMCmd/tpm/src/subsystem/PP.c b/TPMCmd/tpm/src/subsystem/PP.c index 5d31f80a..2eb6bec5 100644 --- a/TPMCmd/tpm/src/subsystem/PP.c +++ b/TPMCmd/tpm/src/subsystem/PP.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the functions that support the physical presence operations // of the TPM. @@ -167,4 +133,16 @@ PhysicalPresenceCapGetCCList(TPM_CC commandCode, // IN: start command code } } return more; -} \ No newline at end of file +} + +//*** PhysicalPresenceCapGetOneCC() +// This function returns true if the command requires Physical Presence. +BOOL PhysicalPresenceCapGetOneCC(TPM_CC commandCode) // IN: command code +{ + COMMAND_INDEX commandIndex = CommandCodeToCommandIndex(commandCode); + if(commandIndex != UNIMPLEMENTED_COMMAND_INDEX) + { + return PhysicalPresenceIsRequired(commandIndex); + } + return FALSE; +} diff --git a/TPMCmd/tpm/src/subsystem/Session.c b/TPMCmd/tpm/src/subsystem/Session.c index a6a1eb5e..9711ba87 100644 --- a/TPMCmd/tpm/src/subsystem/Session.c +++ b/TPMCmd/tpm/src/subsystem/Session.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //**Introduction /* The code in this file is used to manage the session context counter. @@ -637,7 +603,7 @@ SessionContextSave(TPM_HANDLE handle, // IN: session handle // // If the gap is at a maximum, then the only session that can be loaded is // the oldest session, otherwise TPM_RC_CONTEXT_GAP is returned. -/// +// // This function requires that 'handle' references a valid saved session. // // Return Type: TPM_RC @@ -903,6 +869,21 @@ SessionCapGetLoaded(TPMI_SH_POLICY handle, // IN: start handle return more; } +//*** SessionCapGetOneLoaded() +// This function returns whether a session handle exists and is loaded. +BOOL SessionCapGetOneLoaded(TPMI_SH_POLICY handle) // IN: handle +{ + pAssert(HandleGetType(handle) == TPM_HT_LOADED_SESSION); + + if((handle & HR_HANDLE_MASK) < MAX_ACTIVE_SESSIONS + && gr.contextArray[(handle & HR_HANDLE_MASK)]) + { + return TRUE; + } + + return FALSE; +} + //*** SessionCapGetSaved() // This function returns a list of handles for saved session, starting at // 'handle'. @@ -922,11 +903,7 @@ SessionCapGetSaved(TPMI_SH_HMAC handle, // IN: start handle TPMI_YES_NO more = NO; UINT32 i; -#ifdef TPM_HT_SAVED_SESSION pAssert(HandleGetType(handle) == TPM_HT_SAVED_SESSION); -#else - pAssert(HandleGetType(handle) == TPM_HT_ACTIVE_SESSION); -#endif // Initialize output handle list handleList->count = 0; @@ -965,6 +942,21 @@ SessionCapGetSaved(TPMI_SH_HMAC handle, // IN: start handle return more; } +//*** SessionCapGetOneSaved() +// This function returns whether a session handle exists and is saved. +BOOL SessionCapGetOneSaved(TPMI_SH_HMAC handle) // IN: handle +{ + pAssert(HandleGetType(handle) == TPM_HT_SAVED_SESSION); + + if((handle & HR_HANDLE_MASK) < MAX_ACTIVE_SESSIONS + && gr.contextArray[(handle & HR_HANDLE_MASK)]) + { + return TRUE; + } + + return FALSE; +} + //*** SessionCapGetLoadedNumber() // This function return the number of authorization sessions currently // loaded into TPM RAM. @@ -1023,4 +1015,13 @@ SessionCapGetActiveAvail(void) } return num; -} \ No newline at end of file +} + +//*** IsCpHashUnionOccupied() +// This function indicates whether the session attributes indicate that one of +// the members of the union containing `cpHash` are set. +BOOL IsCpHashUnionOccupied(SESSION_ATTRIBUTES attrs) +{ + return attrs.isBound || attrs.isCpHashDefined || attrs.isNameHashDefined + || attrs.isParametersHashDefined || attrs.isTemplateHashDefined; +} diff --git a/TPMCmd/tpm/src/subsystem/Time.c b/TPMCmd/tpm/src/subsystem/Time.c index 7d666205..125e8047 100644 --- a/TPMCmd/tpm/src/subsystem/Time.c +++ b/TPMCmd/tpm/src/subsystem/Time.c @@ -1,44 +1,9 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the functions relating to the TPM's time functions including // the interface to the implementation-specific time functions. // //** Includes #include "Tpm.h" -#include "PlatformClock.h" #include "Marshal.h" //** Functions @@ -189,26 +154,27 @@ void TimeSetAdjustRate(TPM_CLOCK_ADJUST adjust // IN: adjust constant switch(adjust) { case TPM_CLOCK_COARSE_SLOWER: - _plat__ClockAdjustRate(CLOCK_ADJUST_COARSE); + _plat__ClockRateAdjust(PLAT_TPM_CLOCK_ADJUST_COARSE_SLOWER); break; case TPM_CLOCK_COARSE_FASTER: - _plat__ClockAdjustRate(-CLOCK_ADJUST_COARSE); + _plat__ClockRateAdjust(PLAT_TPM_CLOCK_ADJUST_COARSE_FASTER); break; case TPM_CLOCK_MEDIUM_SLOWER: - _plat__ClockAdjustRate(CLOCK_ADJUST_MEDIUM); + _plat__ClockRateAdjust(PLAT_TPM_CLOCK_ADJUST_MEDIUM_SLOWER); break; case TPM_CLOCK_MEDIUM_FASTER: - _plat__ClockAdjustRate(-CLOCK_ADJUST_MEDIUM); + _plat__ClockRateAdjust(PLAT_TPM_CLOCK_ADJUST_MEDIUM_FASTER); break; case TPM_CLOCK_FINE_SLOWER: - _plat__ClockAdjustRate(CLOCK_ADJUST_FINE); + _plat__ClockRateAdjust(PLAT_TPM_CLOCK_ADJUST_FINE_SLOWER); break; case TPM_CLOCK_FINE_FASTER: - _plat__ClockAdjustRate(-CLOCK_ADJUST_FINE); + _plat__ClockRateAdjust(PLAT_TPM_CLOCK_ADJUST_FINE_FASTER); break; case TPM_CLOCK_NO_CHANGE: break; default: + // should have been blocked sooner FAIL(FATAL_ERROR_INTERNAL); break; } diff --git a/TPMCmd/tpm/src/support/AlgorithmCap.c b/TPMCmd/tpm/src/support/AlgorithmCap.c index 54ed4baa..1990e054 100644 --- a/TPMCmd/tpm/src/support/AlgorithmCap.c +++ b/TPMCmd/tpm/src/support/AlgorithmCap.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file contains the algorithm property definitions for the algorithms and the // code for the TPM2_GetCapability() to return the algorithm properties. @@ -53,9 +19,6 @@ static const ALGORITHM s_algorithms[] = { #if ALG_RSA {TPM_ALG_RSA, TPMA_ALGORITHM_INITIALIZER(1, 0, 0, 1, 0, 0, 0, 0, 0)}, #endif -#if ALG_TDES - {TPM_ALG_TDES, TPMA_ALGORITHM_INITIALIZER(0, 1, 0, 0, 0, 0, 0, 0, 0)}, -#endif #if ALG_SHA1 {TPM_ALG_SHA1, TPMA_ALGORITHM_INITIALIZER(0, 0, 1, 0, 0, 0, 0, 0, 0)}, #endif @@ -212,6 +175,35 @@ AlgorithmCapGetImplemented(TPM_ALG_ID algID, // IN: the starting algorithm ID return more; } +//** AlgorithmCapGetOneImplemented() +// This function returns whether a single algorithm was implemented, along +// with its properties (if implemented). +BOOL AlgorithmCapGetOneImplemented( + TPM_ALG_ID algID, // IN: the algorithm ID + TPMS_ALG_PROPERTY* algProperty // OUT: algorithm properties +) +{ + UINT32 i; + UINT32 algNum; + + // Compute how many algorithms are defined in s_algorithms array. + algNum = sizeof(s_algorithms) / sizeof(s_algorithms[0]); + + // Scan the implemented algorithm list to see if there is a match to 'algID'. + for(i = 0; i < algNum; i++) + { + // If algID is less than the starting algorithm ID, skip it + if(s_algorithms[i].algID == algID) + { + algProperty->alg = algID; + algProperty->algProperties = s_algorithms[i].attributes; + return TRUE; + } + } + + return FALSE; +} + //** AlgorithmGetImplementedVector() // This function returns the bit vector of the implemented algorithms. LIB_EXPORT diff --git a/TPMCmd/tpm/src/support/Bits.c b/TPMCmd/tpm/src/support/Bits.c index 7424552d..f4ebea8f 100644 --- a/TPMCmd/tpm/src/support/Bits.c +++ b/TPMCmd/tpm/src/support/Bits.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains bit manipulation routines. They operate on bit arrays. // diff --git a/TPMCmd/tpm/src/support/CommandCodeAttributes.c b/TPMCmd/tpm/src/support/CommandCodeAttributes.c index 51d2e944..aa7ec07a 100644 --- a/TPMCmd/tpm/src/support/CommandCodeAttributes.c +++ b/TPMCmd/tpm/src/support/CommandCodeAttributes.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // This file contains the functions for testing various command properties. @@ -519,6 +485,22 @@ CommandCapGetCCList(TPM_CC commandCode, // IN: start command code return more; } +//*** CommandCapGetOneCC() +// This function checks whether a command is implemented, and returns its +// attributes if so. +BOOL CommandCapGetOneCC(TPM_CC commandCode, // IN: command code + TPMA_CC* commandAttributes // OUT: command attributes +) +{ + COMMAND_INDEX commandIndex = CommandCodeToCommandIndex(commandCode); + if(commandIndex != UNIMPLEMENTED_COMMAND_INDEX) + { + *commandAttributes = s_ccAttr[commandIndex]; + return TRUE; + } + return FALSE; +} + //*** IsVendorCommand() // Function indicates if a command index references a vendor command. // Return Type: BOOL diff --git a/TPMCmd/tpm/src/support/Entity.c b/TPMCmd/tpm/src/support/Entity.c index 53144755..8eea76e4 100644 --- a/TPMCmd/tpm/src/support/Entity.c +++ b/TPMCmd/tpm/src/support/Entity.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // The functions in this file are used for accessing properties for handles of // various types. Functions in other files require handles of a specific @@ -67,25 +33,14 @@ EntityGetLoadStatus(COMMAND* command // IN/OUT: command parsing structure case TPM_HT_PERMANENT: switch(handle) { - case TPM_RH_OWNER: - if(!gc.shEnable) - result = TPM_RC_HIERARCHY; - break; - -#ifdef VENDOR_PERMANENT - case VENDOR_PERMANENT: -#endif - case TPM_RH_ENDORSEMENT: + // First handle non-hierarchy cases +#if VENDOR_PERMANENT_AUTH_ENABLED == YES + case VENDOR_PERMANENT_AUTH_HANDLE: if(!gc.ehEnable) result = TPM_RC_HIERARCHY; break; - case TPM_RH_PLATFORM: - if(!g_phEnable) - result = TPM_RC_HIERARCHY; - break; - // null handle, PW session handle and lockout - // handle are always available - case TPM_RH_NULL: +#endif + // PW session handle and lockout handle are always available case TPM_RS_PW: // Need to be careful for lockout. Lockout is always available // for policy checks but not always available when authValue @@ -107,9 +62,8 @@ EntityGetLoadStatus(COMMAND* command // IN/OUT: command parsing structure // if the implementation has a manufacturer-specific value result = TPM_RC_VALUE; else - // The handle is in the range of reserved handles but is - // not implemented in this TPM. - result = TPM_RC_VALUE; + // The handle either refers to a hierarchy or is invalid. + result = ValidateHierarchy(handle); break; } break; @@ -172,6 +126,11 @@ EntityGetLoadStatus(COMMAND* command // IN/OUT: command parsing structure result = AcIsAccessible(handle); break; #endif + case TPM_HT_EXTERNAL_NV: + case TPM_HT_PERMANENT_NV: + // Not yet supported. + result = TPM_RC_VALUE; + break; default: // Any other handle type is a defect in the unmarshaling code. FAIL(FATAL_ERROR_INTERNAL); @@ -212,7 +171,7 @@ EntityGetAuthValue(TPMI_DH_ENTITY handle, // IN: handle of entity { case TPM_HT_PERMANENT: { - switch(handle) + switch(HierarchyNormalizeHandle(handle)) { case TPM_RH_OWNER: // ownerAuth for TPM_RH_OWNER @@ -222,8 +181,10 @@ EntityGetAuthValue(TPMI_DH_ENTITY handle, // IN: handle of entity // endorsementAuth for TPM_RH_ENDORSEMENT pAuth = &gp.endorsementAuth; break; + // The ACT use platformAuth for auth FOR_EACH_ACT(CASE_ACT_HANDLE) + case TPM_RH_PLATFORM: // platformAuth for TPM_RH_PLATFORM pAuth = &gc.platformAuth; @@ -236,10 +197,10 @@ EntityGetAuthValue(TPMI_DH_ENTITY handle, // IN: handle of entity // nullAuth for TPM_RH_NULL. Return 0 directly here return 0; break; -#ifdef VENDOR_PERMANENT - case VENDOR_PERMANENT: +#if VENDOR_PERMANENT_AUTH_ENABLED == YES + case VENDOR_PERMANENT_AUTH_HANDLE: // vendor authorization value - pAuth = &g_platformUniqueDetails; + pAuth = &g_platformUniqueAuth; #endif default: // If any other permanent handle is present it is @@ -317,7 +278,7 @@ EntityGetAuthPolicy(TPMI_DH_ENTITY handle, // IN: handle of entity switch(HandleGetType(handle)) { case TPM_HT_PERMANENT: - switch(handle) + switch(HierarchyNormalizeHandle(handle)) { case TPM_RH_OWNER: // ownerPolicy for TPM_RH_OWNER @@ -339,11 +300,11 @@ EntityGetAuthPolicy(TPMI_DH_ENTITY handle, // IN: handle of entity *authPolicy = gp.lockoutPolicy; hashAlg = gp.lockoutAlg; break; -#define ACT_GET_POLICY(N) \ - case TPM_RH_ACT_##N: \ - *authPolicy = go.ACT_##N.authPolicy; \ - hashAlg = go.ACT_##N.hashAlg; \ - break; +#define ACT_GET_POLICY(N) \ + case TPM_RH_ACT_##N: \ + *authPolicy = go.ACT_##N.authPolicy; \ + hashAlg = go.ACT_##N.hashAlg; \ + break; // Get the policy for each implemented ACT FOR_EACH_ACT(ACT_GET_POLICY) default: @@ -428,6 +389,13 @@ EntityGetHierarchy(TPMI_DH_ENTITY handle // IN :handle of entity { case TPM_HT_PERMANENT: // hierarchy for a permanent handle + + if(HierarchyIsFirmwareLimited(handle) || HierarchyIsSvnLimited(handle)) + { + hierarchy = handle; + break; + } + switch(handle) { case TPM_RH_PLATFORM: diff --git a/TPMCmd/tpm/src/support/Global.c b/TPMCmd/tpm/src/support/Global.c index 651d58a1..6d2e56d0 100644 --- a/TPMCmd/tpm/src/support/Global.c +++ b/TPMCmd/tpm/src/support/Global.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file will instance the TPM variables that are not stack allocated. @@ -60,3 +26,60 @@ #if CC_CertifyX509 # include "X509.h" #endif // CC_CertifyX509 + +// Global string constants for consistency in KDF function calls. +// These string constants are shared across functions to make sure that they +// are all using consistent string values. + +// each instance must define a different struct since the buffer sizes vary. +#define TPM2B_STRING(name, value) \ + typedef union name##_ \ + { \ + struct \ + { \ + UINT16 size; \ + BYTE buffer[sizeof(value)]; \ + } t; \ + TPM2B b; \ + } TPM2B_##name##_; \ + const TPM2B_##name##_ name##_data = {{sizeof(value), {value}}}; \ + const TPM2B* name = &name##_data.b + +TPM2B_STRING(PRIMARY_OBJECT_CREATION, "Primary Object Creation"); +TPM2B_STRING(CFB_KEY, "CFB"); +TPM2B_STRING(CONTEXT_KEY, "CONTEXT"); +TPM2B_STRING(INTEGRITY_KEY, "INTEGRITY"); +TPM2B_STRING(SECRET_KEY, "SECRET"); +TPM2B_STRING(HIERARCHY_PROOF_SECRET_LABEL, "H_PROOF_SECRET"); +TPM2B_STRING(HIERARCHY_SEED_SECRET_LABEL, "H_SEED_SECRET"); +TPM2B_STRING(HIERARCHY_FW_SECRET_LABEL, "H_FW_SECRET"); +TPM2B_STRING(HIERARCHY_SVN_SECRET_LABEL, "H_SVN_SECRET"); +TPM2B_STRING(SESSION_KEY, "ATH"); +TPM2B_STRING(STORAGE_KEY, "STORAGE"); +TPM2B_STRING(XOR_KEY, "XOR"); +TPM2B_STRING(COMMIT_STRING, "ECDAA Commit"); +TPM2B_STRING(DUPLICATE_STRING, "DUPLICATE"); +TPM2B_STRING(IDENTITY_STRING, "IDENTITY"); +TPM2B_STRING(OBFUSCATE_STRING, "OBFUSCATE"); +#if ENABLE_SELF_TESTS +TPM2B_STRING(OAEP_TEST_STRING, "OAEP Test Value"); +#endif // ENABLE_SELF_TESTS + +//*** g_rcIndex[] +const UINT16 g_rcIndex[15] = {TPM_RC_1, + TPM_RC_2, + TPM_RC_3, + TPM_RC_4, + TPM_RC_5, + TPM_RC_6, + TPM_RC_7, + TPM_RC_8, + TPM_RC_9, + TPM_RC_A, + TPM_RC_B, + TPM_RC_C, + TPM_RC_D, + TPM_RC_E, + TPM_RC_F}; + +BOOL g_manufactured = FALSE; \ No newline at end of file diff --git a/TPMCmd/tpm/src/support/Handle.c b/TPMCmd/tpm/src/support/Handle.c index cd9e091a..9dcf31ab 100644 --- a/TPMCmd/tpm/src/support/Handle.c +++ b/TPMCmd/tpm/src/support/Handle.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file contains the functions that return the type of a handle. @@ -66,6 +32,18 @@ NextPermanentHandle(TPM_HANDLE inHandle // IN: the handle to check // or go out of range for(; inHandle <= TPM_RH_LAST; inHandle++) { + // Skip over gaps in the reserved handle space. + if(inHandle > TPM_RH_FW_NULL && inHandle < SVN_OWNER_FIRST) + inHandle = SVN_OWNER_FIRST; + if(inHandle > SVN_OWNER_FIRST && inHandle <= SVN_OWNER_LAST) + inHandle = SVN_ENDORSEMENT_FIRST; + if(inHandle > SVN_ENDORSEMENT_FIRST && inHandle <= SVN_ENDORSEMENT_LAST) + inHandle = SVN_PLATFORM_FIRST; + if(inHandle > SVN_PLATFORM_FIRST && inHandle <= SVN_PLATFORM_LAST) + inHandle = SVN_NULL_FIRST; + if(inHandle > SVN_NULL_FIRST) + inHandle = TPM_RH_LAST; + switch(inHandle) { case TPM_RH_OWNER: @@ -75,8 +53,20 @@ NextPermanentHandle(TPM_HANDLE inHandle // IN: the handle to check case TPM_RH_ENDORSEMENT: case TPM_RH_PLATFORM: case TPM_RH_PLATFORM_NV: -#ifdef VENDOR_PERMANENT - case VENDOR_PERMANENT: +#if FW_LIMITED_SUPPORT + case TPM_RH_FW_OWNER: + case TPM_RH_FW_ENDORSEMENT: + case TPM_RH_FW_PLATFORM: + case TPM_RH_FW_NULL: +#endif +#if SVN_LIMITED_SUPPORT + case TPM_RH_SVN_OWNER_BASE: + case TPM_RH_SVN_ENDORSEMENT_BASE: + case TPM_RH_SVN_PLATFORM_BASE: + case TPM_RH_SVN_NULL_BASE: +#endif +#if VENDOR_PERMANENT_AUTH_ENABLED == YES + case VENDOR_PERMANENT_AUTH_HANDLE: #endif // Each of the implemented ACT #define ACT_IMPLEMENTED_CASE(N) case TPM_RH_ACT_##N: @@ -139,6 +129,25 @@ PermanentCapGetHandles(TPM_HANDLE handle, // IN: start handle return more; } +//*** PermanentCapGetOneHandle() +// This function returns whether a permanent handle exists. +BOOL PermanentCapGetOneHandle(TPM_HANDLE handle) // IN: handle +{ + UINT32 i; + + pAssert(HandleGetType(handle) == TPM_HT_PERMANENT); + + // Iterate permanent handle range + for(i = NextPermanentHandle(handle); i != 0; i = NextPermanentHandle(i + 1)) + { + if(i == handle) + { + return TRUE; + } + } + return FALSE; +} + //*** PermanentHandleGetPolicy() // This function returns a list of the permanent handles of PCR, started from // 'handle'. If 'handle' is larger than the largest permanent handle, an empty list @@ -194,3 +203,30 @@ PermanentHandleGetPolicy(TPM_HANDLE handle, // IN: start handle } return more; } + +//*** PermanentHandleGetOnePolicy() +// This function returns a permanent handle's policy, if present. +BOOL PermanentHandleGetOnePolicy(TPM_HANDLE handle, // IN: handle + TPMS_TAGGED_POLICY* policy // OUT: tagged policy +) +{ + pAssert(HandleGetType(handle) == TPM_HT_PERMANENT); + + if(NextPermanentHandle(handle) == handle) + { + TPM2B_DIGEST policyDigest; + TPM_ALG_ID policyAlg; + // Check to see if this permanent handle has a policy + policyAlg = EntityGetAuthPolicy(handle, &policyDigest); + if(policyAlg == TPM_ALG_ERROR) + { + return FALSE; + } + policy->handle = handle; + policy->policyHash.hashAlg = policyAlg; + MemoryCopy( + &policy->policyHash.digest, policyDigest.t.buffer, policyDigest.t.size); + return TRUE; + } + return FALSE; +} diff --git a/TPMCmd/tpm/src/support/IoBuffers.c b/TPMCmd/tpm/src/support/IoBuffers.c index ec4d6fb4..1f4ac9ed 100644 --- a/TPMCmd/tpm/src/support/IoBuffers.c +++ b/TPMCmd/tpm/src/support/IoBuffers.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes and Data Definitions diff --git a/TPMCmd/tpm/src/support/Locality.c b/TPMCmd/tpm/src/support/Locality.c index 97f5e515..84bd8dd1 100644 --- a/TPMCmd/tpm/src/support/Locality.c +++ b/TPMCmd/tpm/src/support/Locality.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes #include "Tpm.h" diff --git a/TPMCmd/tpm/src/support/Manufacture.c b/TPMCmd/tpm/src/support/Manufacture.c index 447481a8..ebc52661 100644 --- a/TPMCmd/tpm/src/support/Manufacture.c +++ b/TPMCmd/tpm/src/support/Manufacture.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file contains the function that performs the "manufacturing" of the TPM // in a simulated environment. These functions should not be used outside of @@ -48,8 +14,11 @@ // This function initializes the TPM values in preparation for the TPM's first // use. This function will fail if previously called. The TPM can be re-manufactured // by calling TPM_Teardown() first and then calling this function again. -// Return Type: int -// -1 failure +// NV must be enabled first (typically with NvPowerOn() via _TPM_Init) +// +// return type: int +// -2 NV System not available +// -1 FAILURE - System is incorrectly compiled. // 0 success // 1 manufacturing process previously performed LIB_EXPORT int TPM_Manufacture( @@ -63,17 +32,25 @@ LIB_EXPORT int TPM_Manufacture( // Call the function to verify the sizes of values that result from different // compile options. if(!TpmSizeChecks()) - return -1; + return MANUF_INVALID_CONFIG; #endif #if LIBRARY_COMPATIBILITY_CHECK // Make sure that the attached library performs as expected. - if(!MathLibraryCompatibilityCheck()) - return -1; + if(!ExtMath_Debug_CompatibilityCheck()) + return MANUF_INVALID_CONFIG; #endif // If TPM has been manufactured, return indication. if(!firstTime && g_manufactured) - return 1; + return MANUF_ALREADY_DONE; + + // trigger failure mode if called in error. + int nvReadyState = _plat__GetNvReadyState(); + pAssert(nvReadyState == NV_READY); // else failure mode + if(nvReadyState != NV_READY) + { + return MANUF_NV_NOT_READY; + } // Do power on initializations of the cryptographic libraries. CryptInit(); @@ -89,7 +66,7 @@ LIB_EXPORT int TPM_Manufacture( CryptStartup(SU_RESET); // default configuration for PCR - PCRSimStart(); + PCRManufacture(); // initialize pre-installed hierarchy data // This should happen after NV is initialized because hierarchy data is @@ -110,12 +87,13 @@ LIB_EXPORT int TPM_Manufacture( NV_WRITE_PERSISTENT(orderlyState, orderlyShutdown); // initialize the firmware version - gp.firmwareV1 = FIRMWARE_V1; -#ifdef FIRMWARE_V2 - gp.firmwareV2 = FIRMWARE_V2; -#else - gp.firmwareV2 = 0; -#endif + gp.firmwareV1 = _plat__GetTpmFirmwareVersionHigh(); + gp.firmwareV2 = _plat__GetTpmFirmwareVersionLow(); + + _plat__GetPlatformManufactureData(gp.platformReserved, + sizeof(gp.platformReserved)); + NV_SYNC_PERSISTENT(platformReserved); + NV_SYNC_PERSISTENT(firmwareV1); NV_SYNC_PERSISTENT(firmwareV2); @@ -138,7 +116,7 @@ LIB_EXPORT int TPM_Manufacture( g_manufactured = TRUE; - return 0; + return MANUF_OK; } //*** TPM_TearDown() @@ -154,7 +132,8 @@ LIB_EXPORT int TPM_Manufacture( LIB_EXPORT int TPM_TearDown(void) { g_manufactured = FALSE; - return 0; + _plat__TearDown(); + return TEARDOWN_OK; } //*** TpmEndSimulation() diff --git a/TPMCmd/tpm/src/support/Marshal.c b/TPMCmd/tpm/src/support/Marshal.c index 7fa9bbd7..8b9e2088 100644 --- a/TPMCmd/tpm/src/support/Marshal.c +++ b/TPMCmd/tpm/src/support/Marshal.c @@ -1,48 +1,12 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by TpmMarshal; Version 4.1 Dec 10, 2018 - * Date: Mar 6, 2020 Time: 01:50:10PM - */ + +// FILE GENERATED BY TpmExtractCode: DO NOT EDIT #include "Tpm.h" #if !TABLE_DRIVEN_MARSHAL # include "Marshal_fp.h" -// Table 2:3 - Definition of Base Types -// UINT8 definition from table 2:3 +// Table "Definition of Base Types" (Part 2: Structures) +// UINT8 definition TPM_RC UINT8_Unmarshal(UINT8* target, BYTE** buffer, INT32* size) { @@ -67,7 +31,7 @@ UINT8_Marshal(UINT8* source, BYTE** buffer, INT32* size) return (1); } -// BYTE definition from table 2:3 +// BYTE definition # if !USE_MARSHALING_DEFINES TPM_RC BYTE_Unmarshal(BYTE* target, BYTE** buffer, INT32* size) @@ -81,7 +45,7 @@ BYTE_Marshal(BYTE* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// INT8 definition from table 2:3 +// INT8 definition # if !USE_MARSHALING_DEFINES TPM_RC INT8_Unmarshal(INT8* target, BYTE** buffer, INT32* size) @@ -95,7 +59,7 @@ INT8_Marshal(INT8* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// UINT16 definition from table 2:3 +// UINT16 definition TPM_RC UINT16_Unmarshal(UINT16* target, BYTE** buffer, INT32* size) { @@ -120,7 +84,7 @@ UINT16_Marshal(UINT16* source, BYTE** buffer, INT32* size) return (2); } -// INT16 definition from table 2:3 +// INT16 definition # if !USE_MARSHALING_DEFINES TPM_RC INT16_Unmarshal(INT16* target, BYTE** buffer, INT32* size) @@ -134,7 +98,7 @@ INT16_Marshal(INT16* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// UINT32 definition from table 2:3 +// UINT32 definition TPM_RC UINT32_Unmarshal(UINT32* target, BYTE** buffer, INT32* size) { @@ -159,7 +123,7 @@ UINT32_Marshal(UINT32* source, BYTE** buffer, INT32* size) return (4); } -// INT32 definition from table 2:3 +// INT32 definition # if !USE_MARSHALING_DEFINES TPM_RC INT32_Unmarshal(INT32* target, BYTE** buffer, INT32* size) @@ -173,7 +137,7 @@ INT32_Marshal(INT32* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// UINT64 definition from table 2:3 +// UINT64 definition TPM_RC UINT64_Unmarshal(UINT64* target, BYTE** buffer, INT32* size) { @@ -198,7 +162,7 @@ UINT64_Marshal(UINT64* source, BYTE** buffer, INT32* size) return (8); } -// INT64 definition from table 2:3 +// INT64 definition # if !USE_MARSHALING_DEFINES TPM_RC INT64_Unmarshal(INT64* target, BYTE** buffer, INT32* size) @@ -212,8 +176,7 @@ INT64_Marshal(INT64* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:4 - Defines for Logic Values -// Table 2:5 - Definition of Types for Documentation Clarity +// Table "Definition of Types for Documentation Clarity" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM_ALGORITHM_ID_Unmarshal(TPM_ALGORITHM_ID* target, BYTE** buffer, INT32* size) @@ -226,18 +189,6 @@ TPM_ALGORITHM_ID_Marshal(TPM_ALGORITHM_ID* source, BYTE** buffer, INT32* size) return UINT32_Marshal((UINT32*)source, buffer, size); } TPM_RC -TPM_MODIFIER_INDICATOR_Unmarshal( - TPM_MODIFIER_INDICATOR* target, BYTE** buffer, INT32* size) -{ - return UINT32_Unmarshal((UINT32*)target, buffer, size); -} -UINT16 -TPM_MODIFIER_INDICATOR_Marshal( - TPM_MODIFIER_INDICATOR* source, BYTE** buffer, INT32* size) -{ - return UINT32_Marshal((UINT32*)source, buffer, size); -} -TPM_RC TPM_AUTHORIZATION_SIZE_Unmarshal( TPM_AUTHORIZATION_SIZE* target, BYTE** buffer, INT32* size) { @@ -250,14 +201,14 @@ TPM_AUTHORIZATION_SIZE_Marshal( return UINT32_Marshal((UINT32*)source, buffer, size); } TPM_RC -TPM_PARAMETER_SIZE_Unmarshal(TPM_PARAMETER_SIZE* target, BYTE** buffer, INT32* size) +TPM_KEY_BITS_Unmarshal(TPM_KEY_BITS* target, BYTE** buffer, INT32* size) { - return UINT32_Unmarshal((UINT32*)target, buffer, size); + return UINT16_Unmarshal((UINT16*)target, buffer, size); } UINT16 -TPM_PARAMETER_SIZE_Marshal(TPM_PARAMETER_SIZE* source, BYTE** buffer, INT32* size) +TPM_KEY_BITS_Marshal(TPM_KEY_BITS* source, BYTE** buffer, INT32* size) { - return UINT32_Marshal((UINT32*)source, buffer, size); + return UINT16_Marshal((UINT16*)source, buffer, size); } TPM_RC TPM_KEY_SIZE_Unmarshal(TPM_KEY_SIZE* target, BYTE** buffer, INT32* size) @@ -270,19 +221,30 @@ TPM_KEY_SIZE_Marshal(TPM_KEY_SIZE* source, BYTE** buffer, INT32* size) return UINT16_Marshal((UINT16*)source, buffer, size); } TPM_RC -TPM_KEY_BITS_Unmarshal(TPM_KEY_BITS* target, BYTE** buffer, INT32* size) +TPM_MODIFIER_INDICATOR_Unmarshal( + TPM_MODIFIER_INDICATOR* target, BYTE** buffer, INT32* size) { - return UINT16_Unmarshal((UINT16*)target, buffer, size); + return UINT32_Unmarshal((UINT32*)target, buffer, size); } UINT16 -TPM_KEY_BITS_Marshal(TPM_KEY_BITS* source, BYTE** buffer, INT32* size) +TPM_MODIFIER_INDICATOR_Marshal( + TPM_MODIFIER_INDICATOR* source, BYTE** buffer, INT32* size) { - return UINT16_Marshal((UINT16*)source, buffer, size); + return UINT32_Marshal((UINT32*)source, buffer, size); +} +TPM_RC +TPM_PARAMETER_SIZE_Unmarshal(TPM_PARAMETER_SIZE* target, BYTE** buffer, INT32* size) +{ + return UINT32_Unmarshal((UINT32*)target, buffer, size); +} +UINT16 +TPM_PARAMETER_SIZE_Marshal(TPM_PARAMETER_SIZE* source, BYTE** buffer, INT32* size) +{ + return UINT32_Marshal((UINT32*)source, buffer, size); } # endif // !USE_MARSHALING_DEFINES -// Table 2:6 - Definition of TPM_SPEC Constants -// Table 2:7 - Definition of TPM_CONSTANTS32 Constants +// Table "Definition of TPM_CONSTANTS32 Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES UINT16 TPM_CONSTANTS32_Marshal(TPM_CONSTANTS32* source, BYTE** buffer, INT32* size) @@ -291,7 +253,7 @@ TPM_CONSTANTS32_Marshal(TPM_CONSTANTS32* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:9 - Definition of TPM_ALG_ID Constants +// Table "Definition of TPM_ALG_ID Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM_ALG_ID_Unmarshal(TPM_ALG_ID* target, BYTE** buffer, INT32* size) @@ -305,8 +267,7 @@ TPM_ALG_ID_Marshal(TPM_ALG_ID* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:10 - Definition of TPM_ECC_CURVE Constants -# if ALG_ECC +// Table "Definition of TPM_ECC_CURVE Constants" (Part 2: Structures) TPM_RC TPM_ECC_CURVE_Unmarshal(TPM_ECC_CURVE* target, BYTE** buffer, INT32* size) { @@ -316,14 +277,45 @@ TPM_ECC_CURVE_Unmarshal(TPM_ECC_CURVE* target, BYTE** buffer, INT32* size) { switch(*target) { +# if ECC_NIST_P192 case TPM_ECC_NIST_P192: +# endif // ECC_NIST_P192 +# if ECC_NIST_P224 case TPM_ECC_NIST_P224: +# endif // ECC_NIST_P224 +# if ECC_NIST_P256 case TPM_ECC_NIST_P256: +# endif // ECC_NIST_P256 +# if ECC_NIST_P384 case TPM_ECC_NIST_P384: +# endif // ECC_NIST_P384 +# if ECC_NIST_P521 case TPM_ECC_NIST_P521: +# endif // ECC_NIST_P521 +# if ECC_BN_P256 case TPM_ECC_BN_P256: +# endif // ECC_BN_P256 +# if ECC_BN_P638 case TPM_ECC_BN_P638: +# endif // ECC_BN_P638 +# if ECC_SM2_P256 case TPM_ECC_SM2_P256: +# endif // ECC_SM2_P256 +# if ECC_BP_P256_R1 + case TPM_ECC_BP_P256_R1: +# endif // ECC_BP_P256_R1 +# if ECC_BP_P384_R1 + case TPM_ECC_BP_P384_R1: +# endif // ECC_BP_P384_R1 +# if ECC_BP_P512_R1 + case TPM_ECC_BP_P512_R1: +# endif // ECC_BP_P512_R1 +# if ECC_CURVE_25519 + case TPM_ECC_CURVE_25519: +# endif // ECC_CURVE_25519 +# if ECC_CURVE_448 + case TPM_ECC_CURVE_448: +# endif // ECC_CURVE_448 break; default: result = TPM_RC_CURVE; @@ -332,16 +324,15 @@ TPM_ECC_CURVE_Unmarshal(TPM_ECC_CURVE* target, BYTE** buffer, INT32* size) } return result; } -# if !USE_MARSHALING_DEFINES +# if !USE_MARSHALING_DEFINES UINT16 TPM_ECC_CURVE_Marshal(TPM_ECC_CURVE* source, BYTE** buffer, INT32* size) { return UINT16_Marshal((UINT16*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_ECC +# endif // !USE_MARSHALING_DEFINES -// Table 2:12 - Definition of TPM_CC Constants +// Table "Definition of TPM_CC Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM_CC_Unmarshal(TPM_CC* target, BYTE** buffer, INT32* size) @@ -355,7 +346,7 @@ TPM_CC_Marshal(TPM_CC* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:16 - Definition of TPM_RC Constants +// Table "Definition of TPM_RC Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES UINT16 TPM_RC_Marshal(TPM_RC* source, BYTE** buffer, INT32* size) @@ -364,7 +355,7 @@ TPM_RC_Marshal(TPM_RC* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:17 - Definition of TPM_CLOCK_ADJUST Constants +// Table "Definition of TPM_CLOCK_ADJUST Constants" (Part 2: Structures) TPM_RC TPM_CLOCK_ADJUST_Unmarshal(TPM_CLOCK_ADJUST* target, BYTE** buffer, INT32* size) { @@ -390,7 +381,7 @@ TPM_CLOCK_ADJUST_Unmarshal(TPM_CLOCK_ADJUST* target, BYTE** buffer, INT32* size) return result; } -// Table 2:18 - Definition of TPM_EO Constants +// Table "Definition of TPM_EO Constants" (Part 2: Structures) TPM_RC TPM_EO_Unmarshal(TPM_EO* target, BYTE** buffer, INT32* size) { @@ -428,7 +419,7 @@ TPM_EO_Marshal(TPM_EO* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:19 - Definition of TPM_ST Constants +// Table "Definition of TPM_ST Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM_ST_Unmarshal(TPM_ST* target, BYTE** buffer, INT32* size) @@ -442,7 +433,7 @@ TPM_ST_Marshal(TPM_ST* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:20 - Definition of TPM_SU Constants +// Table "Definition of TPM_SU Constants" (Part 2: Structures) TPM_RC TPM_SU_Unmarshal(TPM_SU* target, BYTE** buffer, INT32* size) { @@ -463,7 +454,7 @@ TPM_SU_Unmarshal(TPM_SU* target, BYTE** buffer, INT32* size) return result; } -// Table 2:21 - Definition of TPM_SE Constants +// Table "Definition of TPM_SE Constants" (Part 2: Structures) TPM_RC TPM_SE_Unmarshal(TPM_SE* target, BYTE** buffer, INT32* size) { @@ -485,7 +476,7 @@ TPM_SE_Unmarshal(TPM_SE* target, BYTE** buffer, INT32* size) return result; } -// Table 2:22 - Definition of TPM_CAP Constants +// Table "Definition of TPM_CAP Constants" (Part 2: Structures) TPM_RC TPM_CAP_Unmarshal(TPM_CAP* target, BYTE** buffer, INT32* size) { @@ -503,7 +494,9 @@ TPM_CAP_Unmarshal(TPM_CAP* target, BYTE** buffer, INT32* size) case TPM_CAP_PCRS: case TPM_CAP_TPM_PROPERTIES: case TPM_CAP_PCR_PROPERTIES: +# if ALG_ECC case TPM_CAP_ECC_CURVES: +# endif // ALG_ECC case TPM_CAP_AUTH_POLICIES: case TPM_CAP_ACT: case TPM_CAP_VENDOR_PROPERTY: @@ -523,7 +516,7 @@ TPM_CAP_Marshal(TPM_CAP* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:23 - Definition of TPM_PT Constants +// Table "Definition of TPM_PT Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM_PT_Unmarshal(TPM_PT* target, BYTE** buffer, INT32* size) @@ -537,7 +530,7 @@ TPM_PT_Marshal(TPM_PT* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:24 - Definition of TPM_PT_PCR Constants +// Table "Definition of TPM_PT_PCR Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM_PT_PCR_Unmarshal(TPM_PT_PCR* target, BYTE** buffer, INT32* size) @@ -551,7 +544,7 @@ TPM_PT_PCR_Marshal(TPM_PT_PCR* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:25 - Definition of TPM_PS Constants +// Table "Definition of TPM_PS Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES UINT16 TPM_PS_Marshal(TPM_PS* source, BYTE** buffer, INT32* size) @@ -560,7 +553,7 @@ TPM_PS_Marshal(TPM_PS* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:26 - Definition of Types for Handles +// Table "Definition of Types for Handles" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM_HANDLE_Unmarshal(TPM_HANDLE* target, BYTE** buffer, INT32* size) @@ -574,7 +567,7 @@ TPM_HANDLE_Marshal(TPM_HANDLE* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:27 - Definition of TPM_HT Constants +// Table "Definition of TPM_HT Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM_HT_Unmarshal(TPM_HT* target, BYTE** buffer, INT32* size) @@ -588,7 +581,7 @@ TPM_HT_Marshal(TPM_HT* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:28 - Definition of TPM_RH Constants +// Table "Definition of TPM_RH Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM_RH_Unmarshal(TPM_RH* target, BYTE** buffer, INT32* size) @@ -602,7 +595,7 @@ TPM_RH_Marshal(TPM_RH* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:29 - Definition of TPM_HC Constants +// Table "Definition of TPM_HC Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM_HC_Unmarshal(TPM_HC* target, BYTE** buffer, INT32* size) @@ -616,7 +609,7 @@ TPM_HC_Marshal(TPM_HC* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:30 - Definition of TPMA_ALGORITHM Bits +// Table "Definition of TPMA_ALGORITHM Bits" (Part 2: Structures) TPM_RC TPMA_ALGORITHM_Unmarshal(TPMA_ALGORITHM* target, BYTE** buffer, INT32* size) { @@ -624,12 +617,12 @@ TPMA_ALGORITHM_Unmarshal(TPMA_ALGORITHM* target, BYTE** buffer, INT32* size) result = UINT32_Unmarshal((UINT32*)target, buffer, size); if(result == TPM_RC_SUCCESS) { + // check that no reserved bits are set if(*((UINT32*)target) & (UINT32)0xfffff8f0) result = TPM_RC_RESERVED_BITS; } return result; } - # if !USE_MARSHALING_DEFINES UINT16 TPMA_ALGORITHM_Marshal(TPMA_ALGORITHM* source, BYTE** buffer, INT32* size) @@ -638,7 +631,7 @@ TPMA_ALGORITHM_Marshal(TPMA_ALGORITHM* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:31 - Definition of TPMA_OBJECT Bits +// Table "Definition of TPMA_OBJECT Bits" (Part 2: Structures) TPM_RC TPMA_OBJECT_Unmarshal(TPMA_OBJECT* target, BYTE** buffer, INT32* size) { @@ -646,12 +639,12 @@ TPMA_OBJECT_Unmarshal(TPMA_OBJECT* target, BYTE** buffer, INT32* size) result = UINT32_Unmarshal((UINT32*)target, buffer, size); if(result == TPM_RC_SUCCESS) { - if(*((UINT32*)target) & (UINT32)0xfff0f309) + // check that no reserved bits are set + if(*((UINT32*)target) & (UINT32)0xfff0f001) result = TPM_RC_RESERVED_BITS; } return result; } - # if !USE_MARSHALING_DEFINES UINT16 TPMA_OBJECT_Marshal(TPMA_OBJECT* source, BYTE** buffer, INT32* size) @@ -660,7 +653,7 @@ TPMA_OBJECT_Marshal(TPMA_OBJECT* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:32 - Definition of TPMA_SESSION Bits +// Table "Definition of TPMA_SESSION Bits" (Part 2: Structures) TPM_RC TPMA_SESSION_Unmarshal(TPMA_SESSION* target, BYTE** buffer, INT32* size) { @@ -668,12 +661,12 @@ TPMA_SESSION_Unmarshal(TPMA_SESSION* target, BYTE** buffer, INT32* size) result = UINT8_Unmarshal((UINT8*)target, buffer, size); if(result == TPM_RC_SUCCESS) { + // check that no reserved bits are set if(*((UINT8*)target) & (UINT8)0x18) result = TPM_RC_RESERVED_BITS; } return result; } - # if !USE_MARSHALING_DEFINES UINT16 TPMA_SESSION_Marshal(TPMA_SESSION* source, BYTE** buffer, INT32* size) @@ -682,7 +675,7 @@ TPMA_SESSION_Marshal(TPMA_SESSION* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:33 - Definition of TPMA_LOCALITY Bits +// Table "Definition of TPMA_LOCALITY Bits" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPMA_LOCALITY_Unmarshal(TPMA_LOCALITY* target, BYTE** buffer, INT32* size) @@ -696,7 +689,7 @@ TPMA_LOCALITY_Marshal(TPMA_LOCALITY* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:34 - Definition of TPMA_PERMANENT Bits +// Table "Definition of TPMA_PERMANENT Bits" (Part 2: Structures) # if !USE_MARSHALING_DEFINES UINT16 TPMA_PERMANENT_Marshal(TPMA_PERMANENT* source, BYTE** buffer, INT32* size) @@ -705,7 +698,7 @@ TPMA_PERMANENT_Marshal(TPMA_PERMANENT* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:35 - Definition of TPMA_STARTUP_CLEAR Bits +// Table "Definition of TPMA_STARTUP_CLEAR Bits" (Part 2: Structures) # if !USE_MARSHALING_DEFINES UINT16 TPMA_STARTUP_CLEAR_Marshal(TPMA_STARTUP_CLEAR* source, BYTE** buffer, INT32* size) @@ -714,7 +707,7 @@ TPMA_STARTUP_CLEAR_Marshal(TPMA_STARTUP_CLEAR* source, BYTE** buffer, INT32* siz } # endif // !USE_MARSHALING_DEFINES -// Table 2:36 - Definition of TPMA_MEMORY Bits +// Table "Definition of TPMA_MEMORY Bits" (Part 2: Structures) # if !USE_MARSHALING_DEFINES UINT16 TPMA_MEMORY_Marshal(TPMA_MEMORY* source, BYTE** buffer, INT32* size) @@ -723,34 +716,25 @@ TPMA_MEMORY_Marshal(TPMA_MEMORY* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:37 - Definition of TPMA_CC Bits +// Table "Definition of TPMA_CC Bits" (Part 2: Structures) # if !USE_MARSHALING_DEFINES UINT16 TPMA_CC_Marshal(TPMA_CC* source, BYTE** buffer, INT32* size) -{ - return TPM_CC_Marshal((TPM_CC*)source, buffer, size); -} -# endif // !USE_MARSHALING_DEFINES - -// Table 2:38 - Definition of TPMA_MODES Bits -# if !USE_MARSHALING_DEFINES -UINT16 -TPMA_MODES_Marshal(TPMA_MODES* source, BYTE** buffer, INT32* size) { return UINT32_Marshal((UINT32*)source, buffer, size); } # endif // !USE_MARSHALING_DEFINES -// Table 2:39 - Definition of TPMA_X509_KEY_USAGE Bits +// Table "Definition of TPMA_MODES Bits" (Part 2: Structures) # if !USE_MARSHALING_DEFINES UINT16 -TPMA_X509_KEY_USAGE_Marshal(TPMA_X509_KEY_USAGE* source, BYTE** buffer, INT32* size) +TPMA_MODES_Marshal(TPMA_MODES* source, BYTE** buffer, INT32* size) { return UINT32_Marshal((UINT32*)source, buffer, size); } # endif // !USE_MARSHALING_DEFINES -// Table 2:40 - Definition of TPMA_ACT Bits +// Table "Definition of TPMA_ACT Bits" (Part 2: Structures) TPM_RC TPMA_ACT_Unmarshal(TPMA_ACT* target, BYTE** buffer, INT32* size) { @@ -758,12 +742,12 @@ TPMA_ACT_Unmarshal(TPMA_ACT* target, BYTE** buffer, INT32* size) result = UINT32_Unmarshal((UINT32*)target, buffer, size); if(result == TPM_RC_SUCCESS) { + // check that no reserved bits are set if(*((UINT32*)target) & (UINT32)0xfffffffc) result = TPM_RC_RESERVED_BITS; } return result; } - # if !USE_MARSHALING_DEFINES UINT16 TPMA_ACT_Marshal(TPMA_ACT* source, BYTE** buffer, INT32* size) @@ -772,7 +756,7 @@ TPMA_ACT_Marshal(TPMA_ACT* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:41 - Definition of TPMI_YES_NO Type +// Table "Definition of TPMI_YES_NO Type" (Part 2: Structures) TPM_RC TPMI_YES_NO_Unmarshal(TPMI_YES_NO* target, BYTE** buffer, INT32* size) { @@ -800,24 +784,17 @@ TPMI_YES_NO_Marshal(TPMI_YES_NO* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:42 - Definition of TPMI_DH_OBJECT Type +// Table "Definition of TPMI_DH_OBJECT Type" (Part 2: Structures) TPM_RC TPMI_DH_OBJECT_Unmarshal( TPMI_DH_OBJECT* target, BYTE** buffer, INT32* size, BOOL flag) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - if(*target == TPM_RH_NULL) - { - if(!flag) - result = TPM_RC_VALUE; - } - else if(((*target < TRANSIENT_FIRST) || (*target > TRANSIENT_LAST)) - && ((*target < PERSISTENT_FIRST) || (*target > PERSISTENT_LAST))) - result = TPM_RC_VALUE; - } + if((result == TPM_RC_SUCCESS) && ((*target != TPM_RH_NULL) || !flag) + && ((*target < TRANSIENT_FIRST) || (*target > TRANSIENT_LAST)) + && ((*target < PERSISTENT_FIRST) || (*target > PERSISTENT_LAST))) + result = TPM_RC_VALUE; return result; } # if !USE_MARSHALING_DEFINES @@ -828,10 +805,9 @@ TPMI_DH_OBJECT_Marshal(TPMI_DH_OBJECT* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:43 - Definition of TPMI_DH_PARENT Type +// Table "Definition of TPMI_DH_PARENT Type" (Part 2: Structures) TPM_RC -TPMI_DH_PARENT_Unmarshal( - TPMI_DH_PARENT* target, BYTE** buffer, INT32* size, BOOL flag) +TPMI_DH_PARENT_Unmarshal(TPMI_DH_PARENT* target, BYTE** buffer, INT32* size) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); @@ -840,15 +816,21 @@ TPMI_DH_PARENT_Unmarshal( switch(*target) { case TPM_RH_OWNER: - case TPM_RH_PLATFORM: case TPM_RH_ENDORSEMENT: - break; - case TPM_RH_NULL: - if(!flag) - result = TPM_RC_VALUE; + case TPM_RH_PLATFORM: + case TPM_RH_FW_OWNER: + case TPM_RH_FW_ENDORSEMENT: + case TPM_RH_FW_PLATFORM: break; default: - if(((*target < TRANSIENT_FIRST) || (*target > TRANSIENT_LAST)) + if((*target != TPM_RH_NULL) && (*target != TPM_RH_FW_NULL) + && ((*target < SVN_NULL_FIRST) || (*target > SVN_NULL_LAST)) + && ((*target < SVN_OWNER_FIRST) || (*target > SVN_OWNER_LAST)) + && ((*target < SVN_ENDORSEMENT_FIRST) + || (*target > SVN_ENDORSEMENT_LAST)) + && ((*target < SVN_PLATFORM_FIRST) + || (*target > SVN_PLATFORM_LAST)) + && ((*target < TRANSIENT_FIRST) || (*target > TRANSIENT_LAST)) && ((*target < PERSISTENT_FIRST) || (*target > PERSISTENT_LAST))) result = TPM_RC_VALUE; break; @@ -864,17 +846,15 @@ TPMI_DH_PARENT_Marshal(TPMI_DH_PARENT* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:44 - Definition of TPMI_DH_PERSISTENT Type +// Table "Definition of TPMI_DH_PERSISTENT Type" (Part 2: Structures) TPM_RC TPMI_DH_PERSISTENT_Unmarshal(TPMI_DH_PERSISTENT* target, BYTE** buffer, INT32* size) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - if((*target < PERSISTENT_FIRST) || (*target > PERSISTENT_LAST)) - result = TPM_RC_VALUE; - } + if((result == TPM_RC_SUCCESS) + && ((*target < PERSISTENT_FIRST) || (*target > PERSISTENT_LAST))) + result = TPM_RC_VALUE; return result; } # if !USE_MARSHALING_DEFINES @@ -885,7 +865,7 @@ TPMI_DH_PERSISTENT_Marshal(TPMI_DH_PERSISTENT* source, BYTE** buffer, INT32* siz } # endif // !USE_MARSHALING_DEFINES -// Table 2:45 - Definition of TPMI_DH_ENTITY Type +// Table "Definition of TPMI_DH_ENTITY Type" (Part 2: Structures) TPM_RC TPMI_DH_ENTITY_Unmarshal( TPMI_DH_ENTITY* target, BYTE** buffer, INT32* size, BOOL flag) @@ -901,12 +881,9 @@ TPMI_DH_ENTITY_Unmarshal( case TPM_RH_PLATFORM: case TPM_RH_LOCKOUT: break; - case TPM_RH_NULL: - if(!flag) - result = TPM_RC_VALUE; - break; default: - if(((*target < TRANSIENT_FIRST) || (*target > TRANSIENT_LAST)) + if(((*target != TPM_RH_NULL) || !flag) + && ((*target < TRANSIENT_FIRST) || (*target > TRANSIENT_LAST)) && ((*target < PERSISTENT_FIRST) || (*target > PERSISTENT_LAST)) && ((*target < NV_INDEX_FIRST) || (*target > NV_INDEX_LAST)) && (*target > PCR_LAST) @@ -918,44 +895,29 @@ TPMI_DH_ENTITY_Unmarshal( return result; } -// Table 2:46 - Definition of TPMI_DH_PCR Type +// Table "Definition of TPMI_DH_PCR Type" (Part 2: Structures) TPM_RC TPMI_DH_PCR_Unmarshal(TPMI_DH_PCR* target, BYTE** buffer, INT32* size, BOOL flag) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - if(*target == TPM_RH_NULL) - { - if(!flag) - result = TPM_RC_VALUE; - } - else if(*target > PCR_LAST) - result = TPM_RC_VALUE; - } + if((result == TPM_RC_SUCCESS) && ((*target != TPM_RH_NULL) || !flag) + && (*target > PCR_LAST)) + result = TPM_RC_VALUE; return result; } -// Table 2:47 - Definition of TPMI_SH_AUTH_SESSION Type +// Table "Definition of TPMI_SH_AUTH_SESSION Type" (Part 2: Structures) TPM_RC TPMI_SH_AUTH_SESSION_Unmarshal( TPMI_SH_AUTH_SESSION* target, BYTE** buffer, INT32* size, BOOL flag) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - if(*target == TPM_RS_PW) - { - if(!flag) - result = TPM_RC_VALUE; - } - else if( - ((*target < HMAC_SESSION_FIRST) || (*target > HMAC_SESSION_LAST)) - && ((*target < POLICY_SESSION_FIRST) || (*target > POLICY_SESSION_LAST))) - result = TPM_RC_VALUE; - } + if((result == TPM_RC_SUCCESS) && ((*target != TPM_RS_PW) || !flag) + && ((*target < HMAC_SESSION_FIRST) || (*target > HMAC_SESSION_LAST)) + && ((*target < POLICY_SESSION_FIRST) || (*target > POLICY_SESSION_LAST))) + result = TPM_RC_VALUE; return result; } # if !USE_MARSHALING_DEFINES @@ -966,17 +928,15 @@ TPMI_SH_AUTH_SESSION_Marshal(TPMI_SH_AUTH_SESSION* source, BYTE** buffer, INT32* } # endif // !USE_MARSHALING_DEFINES -// Table 2:48 - Definition of TPMI_SH_HMAC Type +// Table "Definition of TPMI_SH_HMAC Type" (Part 2: Structures) TPM_RC TPMI_SH_HMAC_Unmarshal(TPMI_SH_HMAC* target, BYTE** buffer, INT32* size) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - if((*target < HMAC_SESSION_FIRST) || (*target > HMAC_SESSION_LAST)) - result = TPM_RC_VALUE; - } + if((result == TPM_RC_SUCCESS) + && ((*target < HMAC_SESSION_FIRST) || (*target > HMAC_SESSION_LAST))) + result = TPM_RC_VALUE; return result; } # if !USE_MARSHALING_DEFINES @@ -987,17 +947,15 @@ TPMI_SH_HMAC_Marshal(TPMI_SH_HMAC* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:49 - Definition of TPMI_SH_POLICY Type +// Table "Definition of TPMI_SH_POLICY Type" (Part 2: Structures) TPM_RC TPMI_SH_POLICY_Unmarshal(TPMI_SH_POLICY* target, BYTE** buffer, INT32* size) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - if((*target < POLICY_SESSION_FIRST) || (*target > POLICY_SESSION_LAST)) - result = TPM_RC_VALUE; - } + if((result == TPM_RC_SUCCESS) + && ((*target < POLICY_SESSION_FIRST) || (*target > POLICY_SESSION_LAST))) + result = TPM_RC_VALUE; return result; } # if !USE_MARSHALING_DEFINES @@ -1008,19 +966,17 @@ TPMI_SH_POLICY_Marshal(TPMI_SH_POLICY* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:50 - Definition of TPMI_DH_CONTEXT Type +// Table "Definition of TPMI_DH_CONTEXT Type" (Part 2: Structures) TPM_RC TPMI_DH_CONTEXT_Unmarshal(TPMI_DH_CONTEXT* target, BYTE** buffer, INT32* size) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - if(((*target < HMAC_SESSION_FIRST) || (*target > HMAC_SESSION_LAST)) - && ((*target < POLICY_SESSION_FIRST) || (*target > POLICY_SESSION_LAST)) - && ((*target < TRANSIENT_FIRST) || (*target > TRANSIENT_LAST))) - result = TPM_RC_VALUE; - } + if((result == TPM_RC_SUCCESS) + && ((*target < HMAC_SESSION_FIRST) || (*target > HMAC_SESSION_LAST)) + && ((*target < POLICY_SESSION_FIRST) || (*target > POLICY_SESSION_LAST)) + && ((*target < TRANSIENT_FIRST) || (*target > TRANSIENT_LAST))) + result = TPM_RC_VALUE; return result; } # if !USE_MARSHALING_DEFINES @@ -1031,7 +987,7 @@ TPMI_DH_CONTEXT_Marshal(TPMI_DH_CONTEXT* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:51 - Definition of TPMI_DH_SAVED Type +// Table "Definition of TPMI_DH_SAVED Type" (Part 2: Structures) TPM_RC TPMI_DH_SAVED_Unmarshal(TPMI_DH_SAVED* target, BYTE** buffer, INT32* size) { @@ -1063,10 +1019,9 @@ TPMI_DH_SAVED_Marshal(TPMI_DH_SAVED* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:52 - Definition of TPMI_RH_HIERARCHY Type +// Table "Definition of TPMI_RH_HIERARCHY Type" (Part 2: Structures) TPM_RC -TPMI_RH_HIERARCHY_Unmarshal( - TPMI_RH_HIERARCHY* target, BYTE** buffer, INT32* size, BOOL flag) +TPMI_RH_HIERARCHY_Unmarshal(TPMI_RH_HIERARCHY* target, BYTE** buffer, INT32* size) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); @@ -1075,15 +1030,21 @@ TPMI_RH_HIERARCHY_Unmarshal( switch(*target) { case TPM_RH_OWNER: - case TPM_RH_PLATFORM: case TPM_RH_ENDORSEMENT: - break; - case TPM_RH_NULL: - if(!flag) - result = TPM_RC_VALUE; + case TPM_RH_PLATFORM: + case TPM_RH_FW_OWNER: + case TPM_RH_FW_ENDORSEMENT: + case TPM_RH_FW_PLATFORM: break; default: - result = TPM_RC_VALUE; + if((*target != TPM_RH_NULL) && (*target != TPM_RH_FW_NULL) + && ((*target < SVN_NULL_FIRST) || (*target > SVN_NULL_LAST)) + && ((*target < SVN_OWNER_FIRST) || (*target > SVN_OWNER_LAST)) + && ((*target < SVN_ENDORSEMENT_FIRST) + || (*target > SVN_ENDORSEMENT_LAST)) + && ((*target < SVN_PLATFORM_FIRST) + || (*target > SVN_PLATFORM_LAST))) + result = TPM_RC_VALUE; break; } } @@ -1097,7 +1058,7 @@ TPMI_RH_HIERARCHY_Marshal(TPMI_RH_HIERARCHY* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:53 - Definition of TPMI_RH_ENABLES Type +// Table "Definition of TPMI_RH_ENABLES Type" (Part 2: Structures) TPM_RC TPMI_RH_ENABLES_Unmarshal( TPMI_RH_ENABLES* target, BYTE** buffer, INT32* size, BOOL flag) @@ -1109,16 +1070,13 @@ TPMI_RH_ENABLES_Unmarshal( switch(*target) { case TPM_RH_OWNER: - case TPM_RH_PLATFORM: case TPM_RH_ENDORSEMENT: + case TPM_RH_PLATFORM: case TPM_RH_PLATFORM_NV: break; - case TPM_RH_NULL: - if(!flag) - result = TPM_RC_VALUE; - break; default: - result = TPM_RC_VALUE; + if((*target != TPM_RH_NULL) || !flag) + result = TPM_RC_VALUE; break; } } @@ -1132,7 +1090,7 @@ TPMI_RH_ENABLES_Marshal(TPMI_RH_ENABLES* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:54 - Definition of TPMI_RH_HIERARCHY_AUTH Type +// Table "Definition of TPMI_RH_HIERARCHY_AUTH Type" (Part 2: Structures) TPM_RC TPMI_RH_HIERARCHY_AUTH_Unmarshal( TPMI_RH_HIERARCHY_AUTH* target, BYTE** buffer, INT32* size) @@ -1144,8 +1102,8 @@ TPMI_RH_HIERARCHY_AUTH_Unmarshal( switch(*target) { case TPM_RH_OWNER: - case TPM_RH_PLATFORM: case TPM_RH_ENDORSEMENT: + case TPM_RH_PLATFORM: case TPM_RH_LOCKOUT: break; default: @@ -1156,7 +1114,7 @@ TPMI_RH_HIERARCHY_AUTH_Unmarshal( return result; } -// Table 2:55 - Definition of TPMI_RH_HIERARCHY_POLICY Type +// Table "Definition of TPMI_RH_HIERARCHY_POLICY Type" (Part 2: Structures) TPM_RC TPMI_RH_HIERARCHY_POLICY_Unmarshal( TPMI_RH_HIERARCHY_POLICY* target, BYTE** buffer, INT32* size) @@ -1168,8 +1126,8 @@ TPMI_RH_HIERARCHY_POLICY_Unmarshal( switch(*target) { case TPM_RH_OWNER: - case TPM_RH_PLATFORM: case TPM_RH_ENDORSEMENT: + case TPM_RH_PLATFORM: case TPM_RH_LOCKOUT: break; default: @@ -1181,7 +1139,38 @@ TPMI_RH_HIERARCHY_POLICY_Unmarshal( return result; } -// Table 2:56 - Definition of TPMI_RH_PLATFORM Type +// Table "Definition of TPMI_RH_BASE_HIERARCHY Type" (Part 2: Structures) +TPM_RC +TPMI_RH_BASE_HIERARCHY_Unmarshal( + TPMI_RH_BASE_HIERARCHY* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); + if(result == TPM_RC_SUCCESS) + { + switch(*target) + { + case TPM_RH_OWNER: + case TPM_RH_ENDORSEMENT: + case TPM_RH_PLATFORM: + break; + default: + result = TPM_RC_VALUE; + break; + } + } + return result; +} +# if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RH_BASE_HIERARCHY_Marshal( + TPMI_RH_BASE_HIERARCHY* source, BYTE** buffer, INT32* size) +{ + return TPM_HANDLE_Marshal((TPM_HANDLE*)source, buffer, size); +} +# endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_RH_PLATFORM Type" (Part 2: Structures) TPM_RC TPMI_RH_PLATFORM_Unmarshal(TPMI_RH_PLATFORM* target, BYTE** buffer, INT32* size) { @@ -1201,7 +1190,7 @@ TPMI_RH_PLATFORM_Unmarshal(TPMI_RH_PLATFORM* target, BYTE** buffer, INT32* size) return result; } -// Table 2:57 - Definition of TPMI_RH_OWNER Type +// Table "Definition of TPMI_RH_OWNER Type" (Part 2: Structures) TPM_RC TPMI_RH_OWNER_Unmarshal(TPMI_RH_OWNER* target, BYTE** buffer, INT32* size, BOOL flag) { @@ -1213,19 +1202,16 @@ TPMI_RH_OWNER_Unmarshal(TPMI_RH_OWNER* target, BYTE** buffer, INT32* size, BOOL { case TPM_RH_OWNER: break; - case TPM_RH_NULL: - if(!flag) - result = TPM_RC_VALUE; - break; default: - result = TPM_RC_VALUE; + if((*target != TPM_RH_NULL) || !flag) + result = TPM_RC_VALUE; break; } } return result; } -// Table 2:58 - Definition of TPMI_RH_ENDORSEMENT Type +// Table "Definition of TPMI_RH_ENDORSEMENT Type" (Part 2: Structures) TPM_RC TPMI_RH_ENDORSEMENT_Unmarshal( TPMI_RH_ENDORSEMENT* target, BYTE** buffer, INT32* size, BOOL flag) @@ -1238,19 +1224,16 @@ TPMI_RH_ENDORSEMENT_Unmarshal( { case TPM_RH_ENDORSEMENT: break; - case TPM_RH_NULL: - if(!flag) - result = TPM_RC_VALUE; - break; default: - result = TPM_RC_VALUE; + if((*target != TPM_RH_NULL) || !flag) + result = TPM_RC_VALUE; break; } } return result; } -// Table 2:59 - Definition of TPMI_RH_PROVISION Type +// Table "Definition of TPMI_RH_PROVISION Type" (Part 2: Structures) TPM_RC TPMI_RH_PROVISION_Unmarshal(TPMI_RH_PROVISION* target, BYTE** buffer, INT32* size) { @@ -1271,7 +1254,7 @@ TPMI_RH_PROVISION_Unmarshal(TPMI_RH_PROVISION* target, BYTE** buffer, INT32* siz return result; } -// Table 2:60 - Definition of TPMI_RH_CLEAR Type +// Table "Definition of TPMI_RH_CLEAR Type" (Part 2: Structures) TPM_RC TPMI_RH_CLEAR_Unmarshal(TPMI_RH_CLEAR* target, BYTE** buffer, INT32* size) { @@ -1281,8 +1264,8 @@ TPMI_RH_CLEAR_Unmarshal(TPMI_RH_CLEAR* target, BYTE** buffer, INT32* size) { switch(*target) { - case TPM_RH_LOCKOUT: case TPM_RH_PLATFORM: + case TPM_RH_LOCKOUT: break; default: result = TPM_RC_VALUE; @@ -1292,7 +1275,7 @@ TPMI_RH_CLEAR_Unmarshal(TPMI_RH_CLEAR* target, BYTE** buffer, INT32* size) return result; } -// Table 2:61 - Definition of TPMI_RH_NV_AUTH Type +// Table "Definition of TPMI_RH_NV_AUTH Type" (Part 2: Structures) TPM_RC TPMI_RH_NV_AUTH_Unmarshal(TPMI_RH_NV_AUTH* target, BYTE** buffer, INT32* size) { @@ -1302,8 +1285,8 @@ TPMI_RH_NV_AUTH_Unmarshal(TPMI_RH_NV_AUTH* target, BYTE** buffer, INT32* size) { switch(*target) { - case TPM_RH_PLATFORM: case TPM_RH_OWNER: + case TPM_RH_PLATFORM: break; default: if((*target < NV_INDEX_FIRST) || (*target > NV_INDEX_LAST)) @@ -1314,7 +1297,7 @@ TPMI_RH_NV_AUTH_Unmarshal(TPMI_RH_NV_AUTH* target, BYTE** buffer, INT32* size) return result; } -// Table 2:62 - Definition of TPMI_RH_LOCKOUT Type +// Table "Definition of TPMI_RH_LOCKOUT Type" (Part 2: Structures) TPM_RC TPMI_RH_LOCKOUT_Unmarshal(TPMI_RH_LOCKOUT* target, BYTE** buffer, INT32* size) { @@ -1334,17 +1317,17 @@ TPMI_RH_LOCKOUT_Unmarshal(TPMI_RH_LOCKOUT* target, BYTE** buffer, INT32* size) return result; } -// Table 2:63 - Definition of TPMI_RH_NV_INDEX Type +// Table "Definition of TPMI_RH_NV_INDEX Type" (Part 2: Structures) TPM_RC TPMI_RH_NV_INDEX_Unmarshal(TPMI_RH_NV_INDEX* target, BYTE** buffer, INT32* size) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - if((*target < NV_INDEX_FIRST) || (*target > NV_INDEX_LAST)) - result = TPM_RC_VALUE; - } + if((result == TPM_RC_SUCCESS) + && ((*target < NV_INDEX_FIRST) || (*target > NV_INDEX_LAST)) + && ((*target < EXTERNAL_NV_FIRST) || (*target > EXTERNAL_NV_LAST)) + && ((*target < PERMANENT_NV_FIRST) || (*target > PERMANENT_NV_LAST))) + result = TPM_RC_VALUE; return result; } # if !USE_MARSHALING_DEFINES @@ -1355,31 +1338,81 @@ TPMI_RH_NV_INDEX_Marshal(TPMI_RH_NV_INDEX* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:64 - Definition of TPMI_RH_AC Type +// Table "Definition of TPMI_RH_NV_DEFINED_INDEX Type" (Part 2: Structures) +TPM_RC +TPMI_RH_NV_DEFINED_INDEX_Unmarshal( + TPMI_RH_NV_DEFINED_INDEX* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); + if((result == TPM_RC_SUCCESS) + && ((*target < NV_INDEX_FIRST) || (*target > NV_INDEX_LAST)) + && ((*target < EXTERNAL_NV_FIRST) || (*target > EXTERNAL_NV_LAST))) + result = TPM_RC_VALUE; + return result; +} + +// Table "Definition of TPMI_RH_NV_LEGACY_INDEX Type" (Part 2: Structures) +TPM_RC +TPMI_RH_NV_LEGACY_INDEX_Unmarshal( + TPMI_RH_NV_LEGACY_INDEX* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); + if((result == TPM_RC_SUCCESS) + && ((*target < NV_INDEX_FIRST) || (*target > NV_INDEX_LAST))) + result = TPM_RC_VALUE; + return result; +} +# if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RH_NV_LEGACY_INDEX_Marshal( + TPMI_RH_NV_LEGACY_INDEX* source, BYTE** buffer, INT32* size) +{ + return TPM_HANDLE_Marshal((TPM_HANDLE*)source, buffer, size); +} +# endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_RH_NV_EXP_INDEX Type" (Part 2: Structures) +TPM_RC +TPMI_RH_NV_EXP_INDEX_Unmarshal( + TPMI_RH_NV_EXP_INDEX* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); + if((result == TPM_RC_SUCCESS) + && ((*target < EXTERNAL_NV_FIRST) || (*target > EXTERNAL_NV_LAST))) + result = TPM_RC_VALUE; + return result; +} +# if !USE_MARSHALING_DEFINES +UINT16 +TPMI_RH_NV_EXP_INDEX_Marshal(TPMI_RH_NV_EXP_INDEX* source, BYTE** buffer, INT32* size) +{ + return TPM_HANDLE_Marshal((TPM_HANDLE*)source, buffer, size); +} +# endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMI_RH_AC Type" (Part 2: Structures) TPM_RC TPMI_RH_AC_Unmarshal(TPMI_RH_AC* target, BYTE** buffer, INT32* size) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - if((*target < AC_FIRST) || (*target > AC_LAST)) - result = TPM_RC_VALUE; - } + if((result == TPM_RC_SUCCESS) && ((*target < AC_FIRST) || (*target > AC_LAST))) + result = TPM_RC_VALUE; return result; } -// Table 2:65 - Definition of TPMI_RH_ACT Type +// Table "Definition of TPMI_RH_ACT Type" (Part 2: Structures) TPM_RC TPMI_RH_ACT_Unmarshal(TPMI_RH_ACT* target, BYTE** buffer, INT32* size) { TPM_RC result; result = TPM_HANDLE_Unmarshal((TPM_HANDLE*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - if((*target < TPM_RH_ACT_0) || (*target > TPM_RH_ACT_F)) - result = TPM_RC_VALUE; - } + if((result == TPM_RC_SUCCESS) + && ((*target < TPM_RH_ACT_0) || (*target > TPM_RH_ACT_F))) + result = TPM_RC_VALUE; return result; } # if !USE_MARSHALING_DEFINES @@ -1390,7 +1423,7 @@ TPMI_RH_ACT_Marshal(TPMI_RH_ACT* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:66 - Definition of TPMI_ALG_HASH Type +// Table "Definition of TPMI_ALG_HASH Type" (Part 2: Structures) TPM_RC TPMI_ALG_HASH_Unmarshal(TPMI_ALG_HASH* target, BYTE** buffer, INT32* size, BOOL flag) { @@ -1412,6 +1445,9 @@ TPMI_ALG_HASH_Unmarshal(TPMI_ALG_HASH* target, BYTE** buffer, INT32* size, BOOL # if ALG_SHA512 case TPM_ALG_SHA512: # endif // ALG_SHA512 +# if ALG_SHA256_192 + case TPM_ALG_SHA256_192: +# endif // ALG_SHA256_192 # if ALG_SM3_256 case TPM_ALG_SM3_256: # endif // ALG_SM3_256 @@ -1424,13 +1460,19 @@ TPMI_ALG_HASH_Unmarshal(TPMI_ALG_HASH* target, BYTE** buffer, INT32* size, BOOL # if ALG_SHA3_512 case TPM_ALG_SHA3_512: # endif // ALG_SHA3_512 - break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_HASH; +# if ALG_SHAKE256_192 + case TPM_ALG_SHAKE256_192: +# endif // ALG_SHAKE256_192 +# if ALG_SHAKE256_256 + case TPM_ALG_SHAKE256_256: +# endif // ALG_SHAKE256_256 +# if ALG_SHAKE256_512 + case TPM_ALG_SHAKE256_512: +# endif // ALG_SHAKE256_512 break; default: - result = TPM_RC_HASH; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_HASH; break; } } @@ -1444,7 +1486,7 @@ TPMI_ALG_HASH_Marshal(TPMI_ALG_HASH* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:67 - Definition of TPMI_ALG_ASYM Type +// Table "Definition of TPMI_ALG_ASYM Type" (Part 2: Structures) TPM_RC TPMI_ALG_ASYM_Unmarshal(TPMI_ALG_ASYM* target, BYTE** buffer, INT32* size, BOOL flag) { @@ -1461,12 +1503,9 @@ TPMI_ALG_ASYM_Unmarshal(TPMI_ALG_ASYM* target, BYTE** buffer, INT32* size, BOOL case TPM_ALG_ECC: # endif // ALG_ECC break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_ASYMMETRIC; - break; default: - result = TPM_RC_ASYMMETRIC; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_ASYMMETRIC; break; } } @@ -1480,7 +1519,7 @@ TPMI_ALG_ASYM_Marshal(TPMI_ALG_ASYM* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:68 - Definition of TPMI_ALG_SYM Type +// Table "Definition of TPMI_ALG_SYM Type" (Part 2: Structures) TPM_RC TPMI_ALG_SYM_Unmarshal(TPMI_ALG_SYM* target, BYTE** buffer, INT32* size, BOOL flag) { @@ -1490,28 +1529,22 @@ TPMI_ALG_SYM_Unmarshal(TPMI_ALG_SYM* target, BYTE** buffer, INT32* size, BOOL fl { switch(*target) { -# if ALG_TDES - case TPM_ALG_TDES: -# endif // ALG_TDES # if ALG_AES case TPM_ALG_AES: # endif // ALG_AES +# if ALG_XOR + case TPM_ALG_XOR: +# endif // ALG_XOR # if ALG_SM4 case TPM_ALG_SM4: # endif // ALG_SM4 # if ALG_CAMELLIA case TPM_ALG_CAMELLIA: # endif // ALG_CAMELLIA -# if ALG_XOR - case TPM_ALG_XOR: -# endif // ALG_XOR - break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_SYMMETRIC; break; default: - result = TPM_RC_SYMMETRIC; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_SYMMETRIC; break; } } @@ -1525,7 +1558,7 @@ TPMI_ALG_SYM_Marshal(TPMI_ALG_SYM* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:69 - Definition of TPMI_ALG_SYM_OBJECT Type +// Table "Definition of TPMI_ALG_SYM_OBJECT Type" (Part 2: Structures) TPM_RC TPMI_ALG_SYM_OBJECT_Unmarshal( TPMI_ALG_SYM_OBJECT* target, BYTE** buffer, INT32* size, BOOL flag) @@ -1536,9 +1569,6 @@ TPMI_ALG_SYM_OBJECT_Unmarshal( { switch(*target) { -# if ALG_TDES - case TPM_ALG_TDES: -# endif // ALG_TDES # if ALG_AES case TPM_ALG_AES: # endif // ALG_AES @@ -1549,12 +1579,9 @@ TPMI_ALG_SYM_OBJECT_Unmarshal( case TPM_ALG_CAMELLIA: # endif // ALG_CAMELLIA break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_SYMMETRIC; - break; default: - result = TPM_RC_SYMMETRIC; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_SYMMETRIC; break; } } @@ -1568,7 +1595,7 @@ TPMI_ALG_SYM_OBJECT_Marshal(TPMI_ALG_SYM_OBJECT* source, BYTE** buffer, INT32* s } # endif // !USE_MARSHALING_DEFINES -// Table 2:70 - Definition of TPMI_ALG_SYM_MODE Type +// Table "Definition of TPMI_ALG_SYM_MODE Type" (Part 2: Structures) TPM_RC TPMI_ALG_SYM_MODE_Unmarshal( TPMI_ALG_SYM_MODE* target, BYTE** buffer, INT32* size, BOOL flag) @@ -1579,6 +1606,9 @@ TPMI_ALG_SYM_MODE_Unmarshal( { switch(*target) { +# if ALG_CMAC + case TPM_ALG_CMAC: +# endif // ALG_CMAC # if ALG_CTR case TPM_ALG_CTR: # endif // ALG_CTR @@ -1594,16 +1624,10 @@ TPMI_ALG_SYM_MODE_Unmarshal( # if ALG_ECB case TPM_ALG_ECB: # endif // ALG_ECB -# if ALG_CMAC - case TPM_ALG_CMAC: -# endif // ALG_CMAC - break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_MODE; break; default: - result = TPM_RC_MODE; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_MODE; break; } } @@ -1617,7 +1641,7 @@ TPMI_ALG_SYM_MODE_Marshal(TPMI_ALG_SYM_MODE* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:71 - Definition of TPMI_ALG_KDF Type +// Table "Definition of TPMI_ALG_KDF Type" (Part 2: Structures) TPM_RC TPMI_ALG_KDF_Unmarshal(TPMI_ALG_KDF* target, BYTE** buffer, INT32* size, BOOL flag) { @@ -1640,12 +1664,9 @@ TPMI_ALG_KDF_Unmarshal(TPMI_ALG_KDF* target, BYTE** buffer, INT32* size, BOOL fl case TPM_ALG_KDF1_SP800_108: # endif // ALG_KDF1_SP800_108 break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_KDF; - break; default: - result = TPM_RC_KDF; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_KDF; break; } } @@ -1659,7 +1680,7 @@ TPMI_ALG_KDF_Marshal(TPMI_ALG_KDF* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:72 - Definition of TPMI_ALG_SIG_SCHEME Type +// Table "Definition of TPMI_ALG_SIG_SCHEME Type" (Part 2: Structures) TPM_RC TPMI_ALG_SIG_SCHEME_Unmarshal( TPMI_ALG_SIG_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag) @@ -1670,9 +1691,9 @@ TPMI_ALG_SIG_SCHEME_Unmarshal( { switch(*target) { -# if ALG_ECDAA - case TPM_ALG_ECDAA: -# endif // ALG_ECDAA +# if ALG_HMAC + case TPM_ALG_HMAC: +# endif // ALG_HMAC # if ALG_RSASSA case TPM_ALG_RSASSA: # endif // ALG_RSASSA @@ -1682,22 +1703,31 @@ TPMI_ALG_SIG_SCHEME_Unmarshal( # if ALG_ECDSA case TPM_ALG_ECDSA: # endif // ALG_ECDSA +# if ALG_ECDAA + case TPM_ALG_ECDAA: +# endif // ALG_ECDAA # if ALG_SM2 case TPM_ALG_SM2: # endif // ALG_SM2 # if ALG_ECSCHNORR case TPM_ALG_ECSCHNORR: # endif // ALG_ECSCHNORR -# if ALG_HMAC - case TPM_ALG_HMAC: -# endif // ALG_HMAC - break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_SCHEME; +# if ALG_EDDSA + case TPM_ALG_EDDSA: +# endif // ALG_EDDSA +# if ALG_EDDSA_PH + case TPM_ALG_EDDSA_PH: +# endif // ALG_EDDSA_PH +# if ALG_LMS + case TPM_ALG_LMS: +# endif // ALG_LMS +# if ALG_XMSS + case TPM_ALG_XMSS: +# endif // ALG_XMSS break; default: - result = TPM_RC_SCHEME; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_SCHEME; break; } } @@ -1711,8 +1741,7 @@ TPMI_ALG_SIG_SCHEME_Marshal(TPMI_ALG_SIG_SCHEME* source, BYTE** buffer, INT32* s } # endif // !USE_MARSHALING_DEFINES -// Table 2:73 - Definition of TPMI_ECC_KEY_EXCHANGE Type -# if ALG_ECC +// Table "Definition of TPMI_ECC_KEY_EXCHANGE Type" (Part 2: Structures) TPM_RC TPMI_ECC_KEY_EXCHANGE_Unmarshal( TPMI_ECC_KEY_EXCHANGE* target, BYTE** buffer, INT32* size, BOOL flag) @@ -1723,38 +1752,34 @@ TPMI_ECC_KEY_EXCHANGE_Unmarshal( { switch(*target) { -# if ALG_ECDH +# if ALG_ECDH case TPM_ALG_ECDH: -# endif // ALG_ECDH -# if ALG_ECMQV - case TPM_ALG_ECMQV: -# endif // ALG_ECMQV -# if ALG_SM2 +# endif // ALG_ECDH +# if ALG_SM2 case TPM_ALG_SM2: -# endif // ALG_SM2 - break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_SCHEME; +# endif // ALG_SM2 +# if ALG_ECMQV + case TPM_ALG_ECMQV: +# endif // ALG_ECMQV break; default: - result = TPM_RC_SCHEME; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_SCHEME; break; } } return result; } -# if !USE_MARSHALING_DEFINES +# if !USE_MARSHALING_DEFINES UINT16 TPMI_ECC_KEY_EXCHANGE_Marshal( TPMI_ECC_KEY_EXCHANGE* source, BYTE** buffer, INT32* size) { return TPM_ALG_ID_Marshal((TPM_ALG_ID*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_ECC +# endif // !USE_MARSHALING_DEFINES -// Table 2:74 - Definition of TPMI_ST_COMMAND_TAG Type +// Table "Definition of TPMI_ST_COMMAND_TAG Type" (Part 2: Structures) TPM_RC TPMI_ST_COMMAND_TAG_Unmarshal(TPMI_ST_COMMAND_TAG* target, BYTE** buffer, INT32* size) { @@ -1782,7 +1807,7 @@ TPMI_ST_COMMAND_TAG_Marshal(TPMI_ST_COMMAND_TAG* source, BYTE** buffer, INT32* s } # endif // !USE_MARSHALING_DEFINES -// Table 2:75 - Definition of TPMI_ALG_MAC_SCHEME Type +// Table "Definition of TPMI_ALG_MAC_SCHEME Type" (Part 2: Structures) TPM_RC TPMI_ALG_MAC_SCHEME_Unmarshal( TPMI_ALG_MAC_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag) @@ -1793,9 +1818,6 @@ TPMI_ALG_MAC_SCHEME_Unmarshal( { switch(*target) { -# if ALG_CMAC - case TPM_ALG_CMAC: -# endif // ALG_CMAC # if ALG_SHA1 case TPM_ALG_SHA1: # endif // ALG_SHA1 @@ -1808,6 +1830,9 @@ TPMI_ALG_MAC_SCHEME_Unmarshal( # if ALG_SHA512 case TPM_ALG_SHA512: # endif // ALG_SHA512 +# if ALG_SHA256_192 + case TPM_ALG_SHA256_192: +# endif // ALG_SHA256_192 # if ALG_SM3_256 case TPM_ALG_SM3_256: # endif // ALG_SM3_256 @@ -1820,13 +1845,22 @@ TPMI_ALG_MAC_SCHEME_Unmarshal( # if ALG_SHA3_512 case TPM_ALG_SHA3_512: # endif // ALG_SHA3_512 - break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_SYMMETRIC; +# if ALG_SHAKE256_192 + case TPM_ALG_SHAKE256_192: +# endif // ALG_SHAKE256_192 +# if ALG_SHAKE256_256 + case TPM_ALG_SHAKE256_256: +# endif // ALG_SHAKE256_256 +# if ALG_SHAKE256_512 + case TPM_ALG_SHAKE256_512: +# endif // ALG_SHAKE256_512 +# if ALG_CMAC + case TPM_ALG_CMAC: +# endif // ALG_CMAC break; default: - result = TPM_RC_SYMMETRIC; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_SYMMETRIC; break; } } @@ -1840,7 +1874,7 @@ TPMI_ALG_MAC_SCHEME_Marshal(TPMI_ALG_MAC_SCHEME* source, BYTE** buffer, INT32* s } # endif // !USE_MARSHALING_DEFINES -// Table 2:76 - Definition of TPMI_ALG_CIPHER_MODE Type +// Table "Definition of TPMI_ALG_CIPHER_MODE Type" (Part 2: Structures) TPM_RC TPMI_ALG_CIPHER_MODE_Unmarshal( TPMI_ALG_CIPHER_MODE* target, BYTE** buffer, INT32* size, BOOL flag) @@ -1867,12 +1901,9 @@ TPMI_ALG_CIPHER_MODE_Unmarshal( case TPM_ALG_ECB: # endif // ALG_ECB break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_MODE; - break; default: - result = TPM_RC_MODE; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_MODE; break; } } @@ -1886,7 +1917,7 @@ TPMI_ALG_CIPHER_MODE_Marshal(TPMI_ALG_CIPHER_MODE* source, BYTE** buffer, INT32* } # endif // !USE_MARSHALING_DEFINES -// Table 2:77 - Definition of TPMS_EMPTY Structure +// Table "Definition of TPMS_EMPTY Structure" (Part 2: Structures) TPM_RC TPMS_EMPTY_Unmarshal(TPMS_EMPTY* target, BYTE** buffer, INT32* size) { @@ -1906,7 +1937,7 @@ TPMS_EMPTY_Marshal(TPMS_EMPTY* source, BYTE** buffer, INT32* size) return 0; } -// Table 2:78 - Definition of TPMS_ALGORITHM_DESCRIPTION Structure +// Table "Definition of TPMS_ALGORITHM_DESCRIPTION Structure" (Part 2: Structures) UINT16 TPMS_ALGORITHM_DESCRIPTION_Marshal( TPMS_ALGORITHM_DESCRIPTION* source, BYTE** buffer, INT32* size) @@ -1921,54 +1952,88 @@ TPMS_ALGORITHM_DESCRIPTION_Marshal( return result; } -// Table 2:79 - Definition of TPMU_HA Union +// Table "Definition of TPMU_HA Union" (Part 2: Structures) TPM_RC TPMU_HA_Unmarshal(TPMU_HA* target, BYTE** buffer, INT32* size, UINT32 selector) { switch(selector) { + case TPM_ALG_NULL: + return TPM_RC_SUCCESS; # if ALG_SHA1 case TPM_ALG_SHA1: return BYTE_Array_Unmarshal( - (BYTE*)(target->sha1), buffer, size, (INT32)SHA1_DIGEST_SIZE); + (BYTE*)&(target->sha1), buffer, size, (INT32)SHA1_DIGEST_SIZE); # endif // ALG_SHA1 # if ALG_SHA256 case TPM_ALG_SHA256: return BYTE_Array_Unmarshal( - (BYTE*)(target->sha256), buffer, size, (INT32)SHA256_DIGEST_SIZE); + (BYTE*)&(target->sha256), buffer, size, (INT32)SHA256_DIGEST_SIZE); # endif // ALG_SHA256 +# if ALG_SHA256_192 + case TPM_ALG_SHA256_192: + return BYTE_Array_Unmarshal((BYTE*)&(target->sha256_192), + buffer, + size, + (INT32)SHA256_192_DIGEST_SIZE); +# endif // ALG_SHA256_192 +# if ALG_SHA3_256 + case TPM_ALG_SHA3_256: + return BYTE_Array_Unmarshal((BYTE*)&(target->sha3_256), + buffer, + size, + (INT32)SHA3_256_DIGEST_SIZE); +# endif // ALG_SHA3_256 +# if ALG_SHA3_384 + case TPM_ALG_SHA3_384: + return BYTE_Array_Unmarshal((BYTE*)&(target->sha3_384), + buffer, + size, + (INT32)SHA3_384_DIGEST_SIZE); +# endif // ALG_SHA3_384 +# if ALG_SHA3_512 + case TPM_ALG_SHA3_512: + return BYTE_Array_Unmarshal((BYTE*)&(target->sha3_512), + buffer, + size, + (INT32)SHA3_512_DIGEST_SIZE); +# endif // ALG_SHA3_512 # if ALG_SHA384 case TPM_ALG_SHA384: return BYTE_Array_Unmarshal( - (BYTE*)(target->sha384), buffer, size, (INT32)SHA384_DIGEST_SIZE); + (BYTE*)&(target->sha384), buffer, size, (INT32)SHA384_DIGEST_SIZE); # endif // ALG_SHA384 # if ALG_SHA512 case TPM_ALG_SHA512: return BYTE_Array_Unmarshal( - (BYTE*)(target->sha512), buffer, size, (INT32)SHA512_DIGEST_SIZE); + (BYTE*)&(target->sha512), buffer, size, (INT32)SHA512_DIGEST_SIZE); # endif // ALG_SHA512 +# if ALG_SHAKE256_192 + case TPM_ALG_SHAKE256_192: + return BYTE_Array_Unmarshal((BYTE*)&(target->shake256_192), + buffer, + size, + (INT32)SHAKE256_192_DIGEST_SIZE); +# endif // ALG_SHAKE256_192 +# if ALG_SHAKE256_256 + case TPM_ALG_SHAKE256_256: + return BYTE_Array_Unmarshal((BYTE*)&(target->shake256_256), + buffer, + size, + (INT32)SHAKE256_256_DIGEST_SIZE); +# endif // ALG_SHAKE256_256 +# if ALG_SHAKE256_512 + case TPM_ALG_SHAKE256_512: + return BYTE_Array_Unmarshal((BYTE*)&(target->shake256_512), + buffer, + size, + (INT32)SHAKE256_512_DIGEST_SIZE); +# endif // ALG_SHAKE256_512 # if ALG_SM3_256 case TPM_ALG_SM3_256: return BYTE_Array_Unmarshal( - (BYTE*)(target->sm3_256), buffer, size, (INT32)SM3_256_DIGEST_SIZE); + (BYTE*)&(target->sm3_256), buffer, size, (INT32)SM3_256_DIGEST_SIZE); # endif // ALG_SM3_256 -# if ALG_SHA3_256 - case TPM_ALG_SHA3_256: - return BYTE_Array_Unmarshal( - (BYTE*)(target->sha3_256), buffer, size, (INT32)SHA3_256_DIGEST_SIZE); -# endif // ALG_SHA3_256 -# if ALG_SHA3_384 - case TPM_ALG_SHA3_384: - return BYTE_Array_Unmarshal( - (BYTE*)(target->sha3_384), buffer, size, (INT32)SHA3_384_DIGEST_SIZE); -# endif // ALG_SHA3_384 -# if ALG_SHA3_512 - case TPM_ALG_SHA3_512: - return BYTE_Array_Unmarshal( - (BYTE*)(target->sha3_512), buffer, size, (INT32)SHA3_512_DIGEST_SIZE); -# endif // ALG_SHA3_512 - case TPM_ALG_NULL: - return TPM_RC_SUCCESS; } return TPM_RC_SELECTOR; } @@ -1980,50 +2045,82 @@ TPMU_HA_Marshal(TPMU_HA* source, BYTE** buffer, INT32* size, UINT32 selector) # if ALG_SHA1 case TPM_ALG_SHA1: return BYTE_Array_Marshal( - (BYTE*)(source->sha1), buffer, size, (INT32)SHA1_DIGEST_SIZE); + (BYTE*)&(source->sha1), buffer, size, (INT32)SHA1_DIGEST_SIZE); # endif // ALG_SHA1 # if ALG_SHA256 case TPM_ALG_SHA256: return BYTE_Array_Marshal( - (BYTE*)(source->sha256), buffer, size, (INT32)SHA256_DIGEST_SIZE); + (BYTE*)&(source->sha256), buffer, size, (INT32)SHA256_DIGEST_SIZE); # endif // ALG_SHA256 +# if ALG_SHA256_192 + case TPM_ALG_SHA256_192: + return BYTE_Array_Marshal((BYTE*)&(source->sha256_192), + buffer, + size, + (INT32)SHA256_192_DIGEST_SIZE); +# endif // ALG_SHA256_192 +# if ALG_SHA3_256 + case TPM_ALG_SHA3_256: + return BYTE_Array_Marshal((BYTE*)&(source->sha3_256), + buffer, + size, + (INT32)SHA3_256_DIGEST_SIZE); +# endif // ALG_SHA3_256 +# if ALG_SHA3_384 + case TPM_ALG_SHA3_384: + return BYTE_Array_Marshal((BYTE*)&(source->sha3_384), + buffer, + size, + (INT32)SHA3_384_DIGEST_SIZE); +# endif // ALG_SHA3_384 +# if ALG_SHA3_512 + case TPM_ALG_SHA3_512: + return BYTE_Array_Marshal((BYTE*)&(source->sha3_512), + buffer, + size, + (INT32)SHA3_512_DIGEST_SIZE); +# endif // ALG_SHA3_512 # if ALG_SHA384 case TPM_ALG_SHA384: return BYTE_Array_Marshal( - (BYTE*)(source->sha384), buffer, size, (INT32)SHA384_DIGEST_SIZE); + (BYTE*)&(source->sha384), buffer, size, (INT32)SHA384_DIGEST_SIZE); # endif // ALG_SHA384 # if ALG_SHA512 case TPM_ALG_SHA512: return BYTE_Array_Marshal( - (BYTE*)(source->sha512), buffer, size, (INT32)SHA512_DIGEST_SIZE); + (BYTE*)&(source->sha512), buffer, size, (INT32)SHA512_DIGEST_SIZE); # endif // ALG_SHA512 +# if ALG_SHAKE256_192 + case TPM_ALG_SHAKE256_192: + return BYTE_Array_Marshal((BYTE*)&(source->shake256_192), + buffer, + size, + (INT32)SHAKE256_192_DIGEST_SIZE); +# endif // ALG_SHAKE256_192 +# if ALG_SHAKE256_256 + case TPM_ALG_SHAKE256_256: + return BYTE_Array_Marshal((BYTE*)&(source->shake256_256), + buffer, + size, + (INT32)SHAKE256_256_DIGEST_SIZE); +# endif // ALG_SHAKE256_256 +# if ALG_SHAKE256_512 + case TPM_ALG_SHAKE256_512: + return BYTE_Array_Marshal((BYTE*)&(source->shake256_512), + buffer, + size, + (INT32)SHAKE256_512_DIGEST_SIZE); +# endif // ALG_SHAKE256_512 # if ALG_SM3_256 case TPM_ALG_SM3_256: return BYTE_Array_Marshal( - (BYTE*)(source->sm3_256), buffer, size, (INT32)SM3_256_DIGEST_SIZE); + (BYTE*)&(source->sm3_256), buffer, size, (INT32)SM3_256_DIGEST_SIZE); # endif // ALG_SM3_256 -# if ALG_SHA3_256 - case TPM_ALG_SHA3_256: - return BYTE_Array_Marshal( - (BYTE*)(source->sha3_256), buffer, size, (INT32)SHA3_256_DIGEST_SIZE); -# endif // ALG_SHA3_256 -# if ALG_SHA3_384 - case TPM_ALG_SHA3_384: - return BYTE_Array_Marshal( - (BYTE*)(source->sha3_384), buffer, size, (INT32)SHA3_384_DIGEST_SIZE); -# endif // ALG_SHA3_384 -# if ALG_SHA3_512 - case TPM_ALG_SHA3_512: - return BYTE_Array_Marshal( - (BYTE*)(source->sha3_512), buffer, size, (INT32)SHA3_512_DIGEST_SIZE); -# endif // ALG_SHA3_512 - case TPM_ALG_NULL: - return 0; } return 0; } -// Table 2:80 - Definition of TPMT_HA Structure +// Table "Definition of TPMT_HA Structure" (Part 2: Structures) TPM_RC TPMT_HA_Unmarshal(TPMT_HA* target, BYTE** buffer, INT32* size, BOOL flag) { @@ -2050,20 +2147,17 @@ TPMT_HA_Marshal(TPMT_HA* source, BYTE** buffer, INT32* size) return result; } -// Table 2:81 - Definition of TPM2B_DIGEST Structure +// Table "Definition of TPM2B_DIGEST Structure" (Part 2: Structures) TPM_RC TPM2B_DIGEST_Unmarshal(TPM2B_DIGEST* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(TPMU_HA))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(TPMU_HA)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -2072,31 +2166,28 @@ TPM2B_DIGEST_Marshal(TPM2B_DIGEST* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:82 - Definition of TPM2B_DATA Structure +// Table "Definition of TPM2B_DATA Structure" (Part 2: Structures) TPM_RC TPM2B_DATA_Unmarshal(TPM2B_DATA* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(TPMT_HA))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(TPMT_HA)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -2105,18 +2196,18 @@ TPM2B_DATA_Marshal(TPM2B_DATA* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:83 - Definition of Types for TPM2B_NONCE +// Table "Definition of Types for TPM2B_NONCE" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM2B_NONCE_Unmarshal(TPM2B_NONCE* target, BYTE** buffer, INT32* size) @@ -2130,7 +2221,7 @@ TPM2B_NONCE_Marshal(TPM2B_NONCE* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:84 - Definition of Types for TPM2B_AUTH +// Table "Definition of Types for TPM2B_AUTH" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM2B_AUTH_Unmarshal(TPM2B_AUTH* target, BYTE** buffer, INT32* size) @@ -2144,7 +2235,7 @@ TPM2B_AUTH_Marshal(TPM2B_AUTH* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:85 - Definition of Types for TPM2B_OPERAND +// Table "Definition of Types for TPM2B_OPERAND" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPM2B_OPERAND_Unmarshal(TPM2B_OPERAND* target, BYTE** buffer, INT32* size) @@ -2158,20 +2249,17 @@ TPM2B_OPERAND_Marshal(TPM2B_OPERAND* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:86 - Definition of TPM2B_EVENT Structure +// Table "Definition of TPM2B_EVENT Structure" (Part 2: Structures) TPM_RC TPM2B_EVENT_Unmarshal(TPM2B_EVENT* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > 1024)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > 1024) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -2180,31 +2268,28 @@ TPM2B_EVENT_Marshal(TPM2B_EVENT* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:87 - Definition of TPM2B_MAX_BUFFER Structure +// Table "Definition of TPM2B_MAX_BUFFER Structure" (Part 2: Structures) TPM_RC TPM2B_MAX_BUFFER_Unmarshal(TPM2B_MAX_BUFFER* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > MAX_DIGEST_BUFFER)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > MAX_DIGEST_BUFFER) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -2213,31 +2298,28 @@ TPM2B_MAX_BUFFER_Marshal(TPM2B_MAX_BUFFER* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:88 - Definition of TPM2B_MAX_NV_BUFFER Structure +// Table "Definition of TPM2B_MAX_NV_BUFFER Structure" (Part 2: Structures) TPM_RC TPM2B_MAX_NV_BUFFER_Unmarshal(TPM2B_MAX_NV_BUFFER* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > MAX_NV_BUFFER_SIZE)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > MAX_NV_BUFFER_SIZE) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -2246,31 +2328,28 @@ TPM2B_MAX_NV_BUFFER_Marshal(TPM2B_MAX_NV_BUFFER* source, BYTE** buffer, INT32* s UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:89 - Definition of TPM2B_TIMEOUT Structure +// Table "Definition of TPM2B_TIMEOUT Structure" (Part 2: Structures) TPM_RC TPM2B_TIMEOUT_Unmarshal(TPM2B_TIMEOUT* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(UINT64))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(UINT64)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -2279,31 +2358,28 @@ TPM2B_TIMEOUT_Marshal(TPM2B_TIMEOUT* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:90 - Definition of TPM2B_IV Structure +// Table "Definition of TPM2B_IV Structure" (Part 2: Structures) TPM_RC TPM2B_IV_Unmarshal(TPM2B_IV* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > MAX_SYM_BLOCK_SIZE)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > MAX_SYM_BLOCK_SIZE) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -2312,32 +2388,60 @@ TPM2B_IV_Marshal(TPM2B_IV* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer + if(source->t.size == 0) + return result; + result = (UINT16)(result + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), + buffer, + size, + (INT32)source->t.size)); + return result; +} + +// Table "Definition of TPM2B_VENDOR_PROPERTY Structure" (Part 2: Structures) +TPM_RC +TPM2B_VENDOR_PROPERTY_Unmarshal( + TPM2B_VENDOR_PROPERTY* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > 512)) + result = TPM_RC_SIZE; + if(result == TPM_RC_SUCCESS) + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); + return result; +} +UINT16 +TPM2B_VENDOR_PROPERTY_Marshal( + TPM2B_VENDOR_PROPERTY* source, BYTE** buffer, INT32* size) +{ + UINT16 result = 0; + result = + (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:91 - Definition of TPMU_NAME Union -// Table 2:92 - Definition of TPM2B_NAME Structure +// Table "Definition of TPM2B_NAME Structure" (Part 2: Structures) TPM_RC TPM2B_NAME_Unmarshal(TPM2B_NAME* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(TPMU_NAME))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(TPMU_NAME)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.name), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.name), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -2346,34 +2450,29 @@ TPM2B_NAME_Marshal(TPM2B_NAME* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result + BYTE_Array_Marshal( - (BYTE*)(source->t.name), buffer, size, (INT32)(source->t.size))); + (BYTE*)&(source->t.name), buffer, size, (INT32)source->t.size)); return result; } -// Table 2:93 - Definition of TPMS_PCR_SELECT Structure +// Table "Definition of TPMS_PCR_SELECT Structure" (Part 2: Structures) TPM_RC TPMS_PCR_SELECT_Unmarshal(TPMS_PCR_SELECT* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT8_Unmarshal((UINT8*)&(target->sizeofSelect), buffer, size); - if((result == TPM_RC_SUCCESS) && (target->sizeofSelect < PCR_SELECT_MIN)) + if((result == TPM_RC_SUCCESS) + && ((target->sizeofSelect < PCR_SELECT_MIN) + || (target->sizeofSelect > PCR_SELECT_MAX))) result = TPM_RC_VALUE; if(result == TPM_RC_SUCCESS) - { - if((target->sizeofSelect) > PCR_SELECT_MAX) - result = TPM_RC_VALUE; - else - result = BYTE_Array_Unmarshal((BYTE*)(target->pcrSelect), - buffer, - size, - (INT32)(target->sizeofSelect)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->pcrSelect), buffer, size, (INT32)target->sizeofSelect); return result; } UINT16 @@ -2383,14 +2482,14 @@ TPMS_PCR_SELECT_Marshal(TPMS_PCR_SELECT* source, BYTE** buffer, INT32* size) result = (UINT16)(result + UINT8_Marshal((UINT8*)&(source->sizeofSelect), buffer, size)); result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->pcrSelect), + + BYTE_Array_Marshal((BYTE*)&(source->pcrSelect), buffer, size, - (INT32)(source->sizeofSelect))); + (INT32)source->sizeofSelect)); return result; } -// Table 2:94 - Definition of TPMS_PCR_SELECTION Structure +// Table "Definition of TPMS_PCR_SELECTION Structure" (Part 2: Structures) TPM_RC TPMS_PCR_SELECTION_Unmarshal(TPMS_PCR_SELECTION* target, BYTE** buffer, INT32* size) { @@ -2399,18 +2498,13 @@ TPMS_PCR_SELECTION_Unmarshal(TPMS_PCR_SELECTION* target, BYTE** buffer, INT32* s TPMI_ALG_HASH_Unmarshal((TPMI_ALG_HASH*)&(target->hash), buffer, size, 0); if(result == TPM_RC_SUCCESS) result = UINT8_Unmarshal((UINT8*)&(target->sizeofSelect), buffer, size); - if((result == TPM_RC_SUCCESS) && (target->sizeofSelect < PCR_SELECT_MIN)) + if((result == TPM_RC_SUCCESS) + && ((target->sizeofSelect < PCR_SELECT_MIN) + || (target->sizeofSelect > PCR_SELECT_MAX))) result = TPM_RC_VALUE; if(result == TPM_RC_SUCCESS) - { - if((target->sizeofSelect) > PCR_SELECT_MAX) - result = TPM_RC_VALUE; - else - result = BYTE_Array_Unmarshal((BYTE*)(target->pcrSelect), - buffer, - size, - (INT32)(target->sizeofSelect)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->pcrSelect), buffer, size, (INT32)target->sizeofSelect); return result; } UINT16 @@ -2423,14 +2517,14 @@ TPMS_PCR_SELECTION_Marshal(TPMS_PCR_SELECTION* source, BYTE** buffer, INT32* siz result = (UINT16)(result + UINT8_Marshal((UINT8*)&(source->sizeofSelect), buffer, size)); result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->pcrSelect), + + BYTE_Array_Marshal((BYTE*)&(source->pcrSelect), buffer, size, - (INT32)(source->sizeofSelect))); + (INT32)source->sizeofSelect)); return result; } -// Table 2:97 - Definition of TPMT_TK_CREATION Structure +// Table "Definition of TPMT_TK_CREATION Structure" (Part 2: Structures) TPM_RC TPMT_TK_CREATION_Unmarshal(TPMT_TK_CREATION* target, BYTE** buffer, INT32* size) { @@ -2440,7 +2534,7 @@ TPMT_TK_CREATION_Unmarshal(TPMT_TK_CREATION* target, BYTE** buffer, INT32* size) result = TPM_RC_TAG; if(result == TPM_RC_SUCCESS) result = TPMI_RH_HIERARCHY_Unmarshal( - (TPMI_RH_HIERARCHY*)&(target->hierarchy), buffer, size, 1); + (TPMI_RH_HIERARCHY*)&(target->hierarchy), buffer, size); if(result == TPM_RC_SUCCESS) result = TPM2B_DIGEST_Unmarshal((TPM2B_DIGEST*)&(target->digest), buffer, size); @@ -2460,7 +2554,7 @@ TPMT_TK_CREATION_Marshal(TPMT_TK_CREATION* source, BYTE** buffer, INT32* size) return result; } -// Table 2:98 - Definition of TPMT_TK_VERIFIED Structure +// Table "Definition of TPMT_TK_VERIFIED Structure" (Part 2: Structures) TPM_RC TPMT_TK_VERIFIED_Unmarshal(TPMT_TK_VERIFIED* target, BYTE** buffer, INT32* size) { @@ -2470,7 +2564,7 @@ TPMT_TK_VERIFIED_Unmarshal(TPMT_TK_VERIFIED* target, BYTE** buffer, INT32* size) result = TPM_RC_TAG; if(result == TPM_RC_SUCCESS) result = TPMI_RH_HIERARCHY_Unmarshal( - (TPMI_RH_HIERARCHY*)&(target->hierarchy), buffer, size, 1); + (TPMI_RH_HIERARCHY*)&(target->hierarchy), buffer, size); if(result == TPM_RC_SUCCESS) result = TPM2B_DIGEST_Unmarshal((TPM2B_DIGEST*)&(target->digest), buffer, size); @@ -2490,7 +2584,7 @@ TPMT_TK_VERIFIED_Marshal(TPMT_TK_VERIFIED* source, BYTE** buffer, INT32* size) return result; } -// Table 2:99 - Definition of TPMT_TK_AUTH Structure +// Table "Definition of TPMT_TK_AUTH Structure" (Part 2: Structures) TPM_RC TPMT_TK_AUTH_Unmarshal(TPMT_TK_AUTH* target, BYTE** buffer, INT32* size) { @@ -2501,7 +2595,7 @@ TPMT_TK_AUTH_Unmarshal(TPMT_TK_AUTH* target, BYTE** buffer, INT32* size) result = TPM_RC_TAG; if(result == TPM_RC_SUCCESS) result = TPMI_RH_HIERARCHY_Unmarshal( - (TPMI_RH_HIERARCHY*)&(target->hierarchy), buffer, size, 1); + (TPMI_RH_HIERARCHY*)&(target->hierarchy), buffer, size); if(result == TPM_RC_SUCCESS) result = TPM2B_DIGEST_Unmarshal((TPM2B_DIGEST*)&(target->digest), buffer, size); @@ -2521,7 +2615,7 @@ TPMT_TK_AUTH_Marshal(TPMT_TK_AUTH* source, BYTE** buffer, INT32* size) return result; } -// Table 2:100 - Definition of TPMT_TK_HASHCHECK Structure +// Table "Definition of TPMT_TK_HASHCHECK Structure" (Part 2: Structures) TPM_RC TPMT_TK_HASHCHECK_Unmarshal(TPMT_TK_HASHCHECK* target, BYTE** buffer, INT32* size) { @@ -2531,7 +2625,7 @@ TPMT_TK_HASHCHECK_Unmarshal(TPMT_TK_HASHCHECK* target, BYTE** buffer, INT32* siz result = TPM_RC_TAG; if(result == TPM_RC_SUCCESS) result = TPMI_RH_HIERARCHY_Unmarshal( - (TPMI_RH_HIERARCHY*)&(target->hierarchy), buffer, size, 1); + (TPMI_RH_HIERARCHY*)&(target->hierarchy), buffer, size); if(result == TPM_RC_SUCCESS) result = TPM2B_DIGEST_Unmarshal((TPM2B_DIGEST*)&(target->digest), buffer, size); @@ -2551,7 +2645,7 @@ TPMT_TK_HASHCHECK_Marshal(TPMT_TK_HASHCHECK* source, BYTE** buffer, INT32* size) return result; } -// Table 2:101 - Definition of TPMS_ALG_PROPERTY Structure +// Table "Definition of TPMS_ALG_PROPERTY Structure" (Part 2: Structures) UINT16 TPMS_ALG_PROPERTY_Marshal(TPMS_ALG_PROPERTY* source, BYTE** buffer, INT32* size) { @@ -2565,7 +2659,7 @@ TPMS_ALG_PROPERTY_Marshal(TPMS_ALG_PROPERTY* source, BYTE** buffer, INT32* size) return result; } -// Table 2:102 - Definition of TPMS_TAGGED_PROPERTY Structure +// Table "Definition of TPMS_TAGGED_PROPERTY Structure" (Part 2: Structures) UINT16 TPMS_TAGGED_PROPERTY_Marshal(TPMS_TAGGED_PROPERTY* source, BYTE** buffer, INT32* size) { @@ -2577,7 +2671,7 @@ TPMS_TAGGED_PROPERTY_Marshal(TPMS_TAGGED_PROPERTY* source, BYTE** buffer, INT32* return result; } -// Table 2:103 - Definition of TPMS_TAGGED_PCR_SELECT Structure +// Table "Definition of TPMS_TAGGED_PCR_SELECT Structure" (Part 2: Structures) UINT16 TPMS_TAGGED_PCR_SELECT_Marshal( TPMS_TAGGED_PCR_SELECT* source, BYTE** buffer, INT32* size) @@ -2589,14 +2683,14 @@ TPMS_TAGGED_PCR_SELECT_Marshal( result = (UINT16)(result + UINT8_Marshal((UINT8*)&(source->sizeofSelect), buffer, size)); result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->pcrSelect), + + BYTE_Array_Marshal((BYTE*)&(source->pcrSelect), buffer, size, - (INT32)(source->sizeofSelect))); + (INT32)source->sizeofSelect)); return result; } -// Table 2:104 - Definition of TPMS_TAGGED_POLICY Structure +// Table "Definition of TPMS_TAGGED_POLICY Structure" (Part 2: Structures) UINT16 TPMS_TAGGED_POLICY_Marshal(TPMS_TAGGED_POLICY* source, BYTE** buffer, INT32* size) { @@ -2610,7 +2704,7 @@ TPMS_TAGGED_POLICY_Marshal(TPMS_TAGGED_POLICY* source, BYTE** buffer, INT32* siz return result; } -// Table 2:105 - Definition of TPMS_ACT_DATA Structure +// Table "Definition of TPMS_ACT_DATA Structure" (Part 2: Structures) UINT16 TPMS_ACT_DATA_Marshal(TPMS_ACT_DATA* source, BYTE** buffer, INT32* size) { @@ -2626,22 +2720,17 @@ TPMS_ACT_DATA_Marshal(TPMS_ACT_DATA* source, BYTE** buffer, INT32* size) return result; } -// Table 2:106 - Definition of TPML_CC Structure +// Table "Definition of TPML_CC Structure" (Part 2: Structures) TPM_RC TPML_CC_Unmarshal(TPML_CC* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT32_Unmarshal((UINT32*)&(target->count), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->count > MAX_CAP_CC)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->count) > MAX_CAP_CC) - result = TPM_RC_SIZE; - else - result = TPM_CC_Array_Unmarshal((TPM_CC*)(target->commandCodes), - buffer, - size, - (INT32)(target->count)); - } + result = TPM_CC_Array_Unmarshal( + (TPM_CC*)&(target->commandCodes), buffer, size, (INT32)target->count); return result; } UINT16 @@ -2651,14 +2740,14 @@ TPML_CC_Marshal(TPML_CC* source, BYTE** buffer, INT32* size) result = (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result - + TPM_CC_Array_Marshal((TPM_CC*)(source->commandCodes), + + TPM_CC_Array_Marshal((TPM_CC*)&(source->commandCodes), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:107 - Definition of TPML_CCA Structure +// Table "Definition of TPML_CCA Structure" (Part 2: Structures) UINT16 TPML_CCA_Marshal(TPML_CCA* source, BYTE** buffer, INT32* size) { @@ -2666,29 +2755,24 @@ TPML_CCA_Marshal(TPML_CCA* source, BYTE** buffer, INT32* size) result = (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result - + TPMA_CC_Array_Marshal((TPMA_CC*)(source->commandAttributes), + + TPMA_CC_Array_Marshal((TPMA_CC*)&(source->commandAttributes), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:108 - Definition of TPML_ALG Structure +// Table "Definition of TPML_ALG Structure" (Part 2: Structures) TPM_RC TPML_ALG_Unmarshal(TPML_ALG* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT32_Unmarshal((UINT32*)&(target->count), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->count > MAX_ALG_LIST_SIZE)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->count) > MAX_ALG_LIST_SIZE) - result = TPM_RC_SIZE; - else - result = TPM_ALG_ID_Array_Unmarshal((TPM_ALG_ID*)(target->algorithms), - buffer, - size, - (INT32)(target->count)); - } + result = TPM_ALG_ID_Array_Unmarshal( + (TPM_ALG_ID*)&(target->algorithms), buffer, size, (INT32)target->count); return result; } UINT16 @@ -2698,14 +2782,14 @@ TPML_ALG_Marshal(TPML_ALG* source, BYTE** buffer, INT32* size) result = (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result - + TPM_ALG_ID_Array_Marshal((TPM_ALG_ID*)(source->algorithms), + + TPM_ALG_ID_Array_Marshal((TPM_ALG_ID*)&(source->algorithms), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:109 - Definition of TPML_HANDLE Structure +// Table "Definition of TPML_HANDLE Structure" (Part 2: Structures) UINT16 TPML_HANDLE_Marshal(TPML_HANDLE* source, BYTE** buffer, INT32* size) { @@ -2713,31 +2797,24 @@ TPML_HANDLE_Marshal(TPML_HANDLE* source, BYTE** buffer, INT32* size) result = (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result - + TPM_HANDLE_Array_Marshal((TPM_HANDLE*)(source->handle), + + TPM_HANDLE_Array_Marshal((TPM_HANDLE*)&(source->handle), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:110 - Definition of TPML_DIGEST Structure +// Table "Definition of TPML_DIGEST Structure" (Part 2: Structures) TPM_RC TPML_DIGEST_Unmarshal(TPML_DIGEST* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT32_Unmarshal((UINT32*)&(target->count), buffer, size); - if((result == TPM_RC_SUCCESS) && (target->count < 2)) + if((result == TPM_RC_SUCCESS) && ((target->count < 2) || (target->count > 8))) result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->count) > 8) - result = TPM_RC_SIZE; - else - result = TPM2B_DIGEST_Array_Unmarshal((TPM2B_DIGEST*)(target->digests), - buffer, - size, - (INT32)(target->count)); - } + result = TPM2B_DIGEST_Array_Unmarshal( + (TPM2B_DIGEST*)&(target->digests), buffer, size, (INT32)target->count); return result; } UINT16 @@ -2747,27 +2824,24 @@ TPML_DIGEST_Marshal(TPML_DIGEST* source, BYTE** buffer, INT32* size) result = (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result - + TPM2B_DIGEST_Array_Marshal((TPM2B_DIGEST*)(source->digests), + + TPM2B_DIGEST_Array_Marshal((TPM2B_DIGEST*)&(source->digests), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:111 - Definition of TPML_DIGEST_VALUES Structure +// Table "Definition of TPML_DIGEST_VALUES Structure" (Part 2: Structures) TPM_RC TPML_DIGEST_VALUES_Unmarshal(TPML_DIGEST_VALUES* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT32_Unmarshal((UINT32*)&(target->count), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->count > HASH_COUNT)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->count) > HASH_COUNT) - result = TPM_RC_SIZE; - else - result = TPMT_HA_Array_Unmarshal( - (TPMT_HA*)(target->digests), buffer, size, 0, (INT32)(target->count)); - } + result = TPMT_HA_Array_Unmarshal( + (TPMT_HA*)&(target->digests), buffer, size, 0, (INT32)target->count); return result; } UINT16 @@ -2777,30 +2851,27 @@ TPML_DIGEST_VALUES_Marshal(TPML_DIGEST_VALUES* source, BYTE** buffer, INT32* siz result = (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result - + TPMT_HA_Array_Marshal((TPMT_HA*)(source->digests), + + TPMT_HA_Array_Marshal((TPMT_HA*)&(source->digests), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:112 - Definition of TPML_PCR_SELECTION Structure +// Table "Definition of TPML_PCR_SELECTION Structure" (Part 2: Structures) TPM_RC TPML_PCR_SELECTION_Unmarshal(TPML_PCR_SELECTION* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT32_Unmarshal((UINT32*)&(target->count), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->count > HASH_COUNT)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->count) > HASH_COUNT) - result = TPM_RC_SIZE; - else - result = TPMS_PCR_SELECTION_Array_Unmarshal( - (TPMS_PCR_SELECTION*)(target->pcrSelections), - buffer, - size, - (INT32)(target->count)); - } + result = TPMS_PCR_SELECTION_Array_Unmarshal( + (TPMS_PCR_SELECTION*)&(target->pcrSelections), + buffer, + size, + (INT32)target->count); return result; } UINT16 @@ -2811,14 +2882,14 @@ TPML_PCR_SELECTION_Marshal(TPML_PCR_SELECTION* source, BYTE** buffer, INT32* siz (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result + TPMS_PCR_SELECTION_Array_Marshal( - (TPMS_PCR_SELECTION*)(source->pcrSelections), + (TPMS_PCR_SELECTION*)&(source->pcrSelections), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:113 - Definition of TPML_ALG_PROPERTY Structure +// Table "Definition of TPML_ALG_PROPERTY Structure" (Part 2: Structures) UINT16 TPML_ALG_PROPERTY_Marshal(TPML_ALG_PROPERTY* source, BYTE** buffer, INT32* size) { @@ -2827,14 +2898,14 @@ TPML_ALG_PROPERTY_Marshal(TPML_ALG_PROPERTY* source, BYTE** buffer, INT32* size) (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result + TPMS_ALG_PROPERTY_Array_Marshal( - (TPMS_ALG_PROPERTY*)(source->algProperties), + (TPMS_ALG_PROPERTY*)&(source->algProperties), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:114 - Definition of TPML_TAGGED_TPM_PROPERTY Structure +// Table "Definition of TPML_TAGGED_TPM_PROPERTY Structure" (Part 2: Structures) UINT16 TPML_TAGGED_TPM_PROPERTY_Marshal( TPML_TAGGED_TPM_PROPERTY* source, BYTE** buffer, INT32* size) @@ -2844,14 +2915,14 @@ TPML_TAGGED_TPM_PROPERTY_Marshal( (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result + TPMS_TAGGED_PROPERTY_Array_Marshal( - (TPMS_TAGGED_PROPERTY*)(source->tpmProperty), + (TPMS_TAGGED_PROPERTY*)&(source->tpmProperty), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:115 - Definition of TPML_TAGGED_PCR_PROPERTY Structure +// Table "Definition of TPML_TAGGED_PCR_PROPERTY Structure" (Part 2: Structures) UINT16 TPML_TAGGED_PCR_PROPERTY_Marshal( TPML_TAGGED_PCR_PROPERTY* source, BYTE** buffer, INT32* size) @@ -2861,14 +2932,14 @@ TPML_TAGGED_PCR_PROPERTY_Marshal( (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result + TPMS_TAGGED_PCR_SELECT_Array_Marshal( - (TPMS_TAGGED_PCR_SELECT*)(source->pcrProperty), + (TPMS_TAGGED_PCR_SELECT*)&(source->pcrProperty), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:116 - Definition of TPML_ECC_CURVE Structure +// Table "Definition of TPML_ECC_CURVE Structure" (Part 2: Structures) # if ALG_ECC UINT16 TPML_ECC_CURVE_Marshal(TPML_ECC_CURVE* source, BYTE** buffer, INT32* size) @@ -2878,15 +2949,15 @@ TPML_ECC_CURVE_Marshal(TPML_ECC_CURVE* source, BYTE** buffer, INT32* size) (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result - + TPM_ECC_CURVE_Array_Marshal((TPM_ECC_CURVE*)(source->eccCurves), + + TPM_ECC_CURVE_Array_Marshal((TPM_ECC_CURVE*)&(source->eccCurves), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } # endif // ALG_ECC -// Table 2:117 - Definition of TPML_TAGGED_POLICY Structure +// Table "Definition of TPML_TAGGED_POLICY Structure" (Part 2: Structures) UINT16 TPML_TAGGED_POLICY_Marshal(TPML_TAGGED_POLICY* source, BYTE** buffer, INT32* size) { @@ -2895,29 +2966,62 @@ TPML_TAGGED_POLICY_Marshal(TPML_TAGGED_POLICY* source, BYTE** buffer, INT32* siz (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result + TPMS_TAGGED_POLICY_Array_Marshal( - (TPMS_TAGGED_POLICY*)(source->policies), + (TPMS_TAGGED_POLICY*)&(source->policies), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Table 2:118 - Definition of TPML_ACT_DATA Structure +// Table "Definition of TPML_ACT_DATA Structure" (Part 2: Structures) UINT16 TPML_ACT_DATA_Marshal(TPML_ACT_DATA* source, BYTE** buffer, INT32* size) +{ + UINT16 result = 0; + result = + (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); + result = + (UINT16)(result + + TPMS_ACT_DATA_Array_Marshal((TPMS_ACT_DATA*)&(source->actData), + buffer, + size, + (INT32)source->count)); + return result; +} + +// Table "Definition of TPML_VENDOR_PROPERTY Structure" (Part 2: Structures) +TPM_RC +TPML_VENDOR_PROPERTY_Unmarshal( + TPML_VENDOR_PROPERTY* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = UINT32_Unmarshal((UINT32*)&(target->count), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->count > MAX_VENDOR_PROPERTY)) + result = TPM_RC_VALUE; + if(result == TPM_RC_SUCCESS) + result = TPM2B_VENDOR_PROPERTY_Array_Unmarshal( + (TPM2B_VENDOR_PROPERTY*)&(target->vendorData), + buffer, + size, + (INT32)target->count); + return result; +} +UINT16 +TPML_VENDOR_PROPERTY_Marshal(TPML_VENDOR_PROPERTY* source, BYTE** buffer, INT32* size) { UINT16 result = 0; result = (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result - + TPMS_ACT_DATA_Array_Marshal((TPMS_ACT_DATA*)(source->actData), - buffer, - size, - (INT32)(source->count))); + + TPM2B_VENDOR_PROPERTY_Array_Marshal( + (TPM2B_VENDOR_PROPERTY*)&(source->vendorData), + buffer, + size, + (INT32)source->count)); return result; } -// Table 2:119 - Definition of TPMU_CAPABILITIES Union +// Table "Definition of TPMU_CAPABILITIES Union" (Part 2: Structures) UINT16 TPMU_CAPABILITIES_Marshal( TPMU_CAPABILITIES* source, BYTE** buffer, INT32* size, UINT32 selector) @@ -2960,7 +3064,7 @@ TPMU_CAPABILITIES_Marshal( return 0; } -// Table 2:120 - Definition of TPMS_CAPABILITY_DATA Structure +// Table "Definition of TPMS_CAPABILITY_DATA Structure" (Part 2: Structures) UINT16 TPMS_CAPABILITY_DATA_Marshal(TPMS_CAPABILITY_DATA* source, BYTE** buffer, INT32* size) { @@ -2976,38 +3080,91 @@ TPMS_CAPABILITY_DATA_Marshal(TPMS_CAPABILITY_DATA* source, BYTE** buffer, INT32* return result; } -// Table 2:121 - Definition of TPMS_CLOCK_INFO Structure +// Defined in an additional Capabilities registry TPM_RC -TPMS_CLOCK_INFO_Unmarshal(TPMS_CLOCK_INFO* target, BYTE** buffer, INT32* size) +TPMU_SET_CAPABILITIES_Unmarshal( + TPMU_SET_CAPABILITIES* target, BYTE** buffer, INT32* size, UINT32 selector) +{ + NOT_REFERENCED(target); + NOT_REFERENCED(buffer); + NOT_REFERENCED(size); + NOT_REFERENCED(selector); + + // No settable capabilities are currently defined in the reference code. + return TPM_RC_SELECTOR; +} + +// Table "Definition of TPMS_SET_CAPABILITY_DATA Structure" (Part 2: Structures) +TPM_RC +TPMS_SET_CAPABILITY_DATA_Unmarshal( + TPMS_SET_CAPABILITY_DATA* target, BYTE** buffer, INT32* size) { TPM_RC result; - result = UINT64_Unmarshal((UINT64*)&(target->clock), buffer, size); - if(result == TPM_RC_SUCCESS) - result = UINT32_Unmarshal((UINT32*)&(target->resetCount), buffer, size); - if(result == TPM_RC_SUCCESS) - result = UINT32_Unmarshal((UINT32*)&(target->restartCount), buffer, size); + result = TPM_CAP_Unmarshal(&target->setCapability, buffer, size); if(result == TPM_RC_SUCCESS) - result = TPMI_YES_NO_Unmarshal((TPMI_YES_NO*)&(target->safe), buffer, size); + { + result = TPMU_SET_CAPABILITIES_Unmarshal( + &target->data, buffer, size, (UINT32)target->setCapability); + } return result; } -UINT16 -TPMS_CLOCK_INFO_Marshal(TPMS_CLOCK_INFO* source, BYTE** buffer, INT32* size) + +// Table "Definition of TPM2B_SET_CAPABILITY_DATA Structure" (Part 2: Structures) +TPM_RC +TPM2B_SET_CAPABILITY_DATA_Unmarshal( + TPM2B_SET_CAPABILITY_DATA* target, BYTE** buffer, INT32* size) { - UINT16 result = 0; - result = - (UINT16)(result + UINT64_Marshal((UINT64*)&(source->clock), buffer, size)); - result = (UINT16)(result - + UINT32_Marshal((UINT32*)&(source->resetCount), buffer, size)); - result = - (UINT16)(result - + UINT32_Marshal((UINT32*)&(source->restartCount), buffer, size)); - result = + TPM_RC result; + result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); + if(result == TPM_RC_SUCCESS) + { + // if size is zero, then the required structure is missing + if(target->size == 0) + result = TPM_RC_SIZE; + else + { + INT32 startSize = *size; + result = TPMS_SET_CAPABILITY_DATA_Unmarshal( + &target->setCapabilityData, buffer, size); + if((result == TPM_RC_SUCCESS) && (target->size != (startSize - *size))) + result = TPM_RC_SIZE; + } + } + return result; +} + +// Table "Definition of TPMS_CLOCK_INFO Structure" (Part 2: Structures) +TPM_RC +TPMS_CLOCK_INFO_Unmarshal(TPMS_CLOCK_INFO* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = UINT64_Unmarshal((UINT64*)&(target->clock), buffer, size); + if(result == TPM_RC_SUCCESS) + result = UINT32_Unmarshal((UINT32*)&(target->resetCount), buffer, size); + if(result == TPM_RC_SUCCESS) + result = UINT32_Unmarshal((UINT32*)&(target->restartCount), buffer, size); + if(result == TPM_RC_SUCCESS) + result = TPMI_YES_NO_Unmarshal((TPMI_YES_NO*)&(target->safe), buffer, size); + return result; +} +UINT16 +TPMS_CLOCK_INFO_Marshal(TPMS_CLOCK_INFO* source, BYTE** buffer, INT32* size) +{ + UINT16 result = 0; + result = + (UINT16)(result + UINT64_Marshal((UINT64*)&(source->clock), buffer, size)); + result = (UINT16)(result + + UINT32_Marshal((UINT32*)&(source->resetCount), buffer, size)); + result = + (UINT16)(result + + UINT32_Marshal((UINT32*)&(source->restartCount), buffer, size)); + result = (UINT16)(result + TPMI_YES_NO_Marshal((TPMI_YES_NO*)&(source->safe), buffer, size)); return result; } -// Table 2:122 - Definition of TPMS_TIME_INFO Structure +// Table "Definition of TPMS_TIME_INFO Structure" (Part 2: Structures) TPM_RC TPMS_TIME_INFO_Unmarshal(TPMS_TIME_INFO* target, BYTE** buffer, INT32* size) { @@ -3030,7 +3187,7 @@ TPMS_TIME_INFO_Marshal(TPMS_TIME_INFO* source, BYTE** buffer, INT32* size) return result; } -// Table 2:123 - Definition of TPMS_TIME_ATTEST_INFO Structure +// Table "Definition of TPMS_TIME_ATTEST_INFO Structure" (Part 2: Structures) UINT16 TPMS_TIME_ATTEST_INFO_Marshal( TPMS_TIME_ATTEST_INFO* source, BYTE** buffer, INT32* size) @@ -3045,7 +3202,7 @@ TPMS_TIME_ATTEST_INFO_Marshal( return result; } -// Table 2:124 - Definition of TPMS_CERTIFY_INFO Structure +// Table "Definition of TPMS_CERTIFY_INFO Structure" (Part 2: Structures) UINT16 TPMS_CERTIFY_INFO_Marshal(TPMS_CERTIFY_INFO* source, BYTE** buffer, INT32* size) { @@ -3059,7 +3216,7 @@ TPMS_CERTIFY_INFO_Marshal(TPMS_CERTIFY_INFO* source, BYTE** buffer, INT32* size) return result; } -// Table 2:125 - Definition of TPMS_QUOTE_INFO Structure +// Table "Definition of TPMS_QUOTE_INFO Structure" (Part 2: Structures) UINT16 TPMS_QUOTE_INFO_Marshal(TPMS_QUOTE_INFO* source, BYTE** buffer, INT32* size) { @@ -3073,7 +3230,7 @@ TPMS_QUOTE_INFO_Marshal(TPMS_QUOTE_INFO* source, BYTE** buffer, INT32* size) return result; } -// Table 2:126 - Definition of TPMS_COMMAND_AUDIT_INFO Structure +// Table "Definition of TPMS_COMMAND_AUDIT_INFO Structure" (Part 2: Structures) UINT16 TPMS_COMMAND_AUDIT_INFO_Marshal( TPMS_COMMAND_AUDIT_INFO* source, BYTE** buffer, INT32* size) @@ -3094,7 +3251,7 @@ TPMS_COMMAND_AUDIT_INFO_Marshal( return result; } -// Table 2:127 - Definition of TPMS_SESSION_AUDIT_INFO Structure +// Table "Definition of TPMS_SESSION_AUDIT_INFO Structure" (Part 2: Structures) UINT16 TPMS_SESSION_AUDIT_INFO_Marshal( TPMS_SESSION_AUDIT_INFO* source, BYTE** buffer, INT32* size) @@ -3109,7 +3266,7 @@ TPMS_SESSION_AUDIT_INFO_Marshal( return result; } -// Table 2:128 - Definition of TPMS_CREATION_INFO Structure +// Table "Definition of TPMS_CREATION_INFO Structure" (Part 2: Structures) UINT16 TPMS_CREATION_INFO_Marshal(TPMS_CREATION_INFO* source, BYTE** buffer, INT32* size) { @@ -3123,7 +3280,7 @@ TPMS_CREATION_INFO_Marshal(TPMS_CREATION_INFO* source, BYTE** buffer, INT32* siz return result; } -// Table 2:129 - Definition of TPMS_NV_CERTIFY_INFO Structure +// Table "Definition of TPMS_NV_CERTIFY_INFO Structure" (Part 2: Structures) UINT16 TPMS_NV_CERTIFY_INFO_Marshal(TPMS_NV_CERTIFY_INFO* source, BYTE** buffer, INT32* size) { @@ -3139,7 +3296,7 @@ TPMS_NV_CERTIFY_INFO_Marshal(TPMS_NV_CERTIFY_INFO* source, BYTE** buffer, INT32* return result; } -// Table 2:130 - Definition of TPMS_NV_DIGEST_CERTIFY_INFO Structure +// Table "Definition of TPMS_NV_DIGEST_CERTIFY_INFO Structure" (Part 2: Structures) UINT16 TPMS_NV_DIGEST_CERTIFY_INFO_Marshal( TPMS_NV_DIGEST_CERTIFY_INFO* source, BYTE** buffer, INT32* size) @@ -3154,7 +3311,7 @@ TPMS_NV_DIGEST_CERTIFY_INFO_Marshal( return result; } -// Table 2:131 - Definition of TPMI_ST_ATTEST Type +// Table "Definition of TPMI_ST_ATTEST Type" (Part 2: Structures) # if !USE_MARSHALING_DEFINES UINT16 TPMI_ST_ATTEST_Marshal(TPMI_ST_ATTEST* source, BYTE** buffer, INT32* size) @@ -3163,7 +3320,7 @@ TPMI_ST_ATTEST_Marshal(TPMI_ST_ATTEST* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:132 - Definition of TPMU_ATTEST Union +// Table "Definition of TPMU_ATTEST Union" (Part 2: Structures) UINT16 TPMU_ATTEST_Marshal(TPMU_ATTEST* source, BYTE** buffer, INT32* size, UINT32 selector) { @@ -3197,7 +3354,7 @@ TPMU_ATTEST_Marshal(TPMU_ATTEST* source, BYTE** buffer, INT32* size, UINT32 sele return 0; } -// Table 2:133 - Definition of TPMS_ATTEST Structure +// Table "Definition of TPMS_ATTEST Structure" (Part 2: Structures) UINT16 TPMS_ATTEST_Marshal(TPMS_ATTEST* source, BYTE** buffer, INT32* size) { @@ -3228,25 +3385,25 @@ TPMS_ATTEST_Marshal(TPMS_ATTEST* source, BYTE** buffer, INT32* size) return result; } -// Table 2:134 - Definition of TPM2B_ATTEST Structure +// Table "Definition of TPM2B_ATTEST Structure" (Part 2: Structures) UINT16 TPM2B_ATTEST_Marshal(TPM2B_ATTEST* source, BYTE** buffer, INT32* size) { UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.attestationData), + + BYTE_Array_Marshal((BYTE*)&(source->t.attestationData), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:135 - Definition of TPMS_AUTH_COMMAND Structure +// Table "Definition of TPMS_AUTH_COMMAND Structure" (Part 2: Structures) TPM_RC TPMS_AUTH_COMMAND_Unmarshal(TPMS_AUTH_COMMAND* target, BYTE** buffer, INT32* size) { @@ -3263,7 +3420,7 @@ TPMS_AUTH_COMMAND_Unmarshal(TPMS_AUTH_COMMAND* target, BYTE** buffer, INT32* siz return result; } -// Table 2:136 - Definition of TPMS_AUTH_RESPONSE Structure +// Table "Definition of TPMS_AUTH_RESPONSE Structure" (Part 2: Structures) UINT16 TPMS_AUTH_RESPONSE_Marshal(TPMS_AUTH_RESPONSE* source, BYTE** buffer, INT32* size) { @@ -3280,41 +3437,7 @@ TPMS_AUTH_RESPONSE_Marshal(TPMS_AUTH_RESPONSE* source, BYTE** buffer, INT32* siz return result; } -// Table 2:137 - Definition of TPMI_TDES_KEY_BITS Type -# if ALG_TDES -TPM_RC -TPMI_TDES_KEY_BITS_Unmarshal(TPMI_TDES_KEY_BITS* target, BYTE** buffer, INT32* size) -{ - TPM_RC result; - result = TPM_KEY_BITS_Unmarshal((TPM_KEY_BITS*)target, buffer, size); - if(result == TPM_RC_SUCCESS) - { - switch(*target) - { -# if TDES_128 - case 128: -# endif // TDES_128 -# if TDES_192 - case 192: -# endif // TDES_192 - break; - default: - result = TPM_RC_VALUE; - break; - } - } - return result; -} -# if !USE_MARSHALING_DEFINES -UINT16 -TPMI_TDES_KEY_BITS_Marshal(TPMI_TDES_KEY_BITS* source, BYTE** buffer, INT32* size) -{ - return TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)source, buffer, size); -} -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_TDES - -// Table 2:137 - Definition of TPMI_AES_KEY_BITS Type +// Table "Definition of TPMI_AES_KEY_BITS Type" (Part 2: Structures) # if ALG_AES TPM_RC TPMI_AES_KEY_BITS_Unmarshal(TPMI_AES_KEY_BITS* target, BYTE** buffer, INT32* size) @@ -3351,7 +3474,7 @@ TPMI_AES_KEY_BITS_Marshal(TPMI_AES_KEY_BITS* source, BYTE** buffer, INT32* size) # endif // !USE_MARSHALING_DEFINES # endif // ALG_AES -// Table 2:137 - Definition of TPMI_SM4_KEY_BITS Type +// Table "Definition of TPMI_SM4_KEY_BITS Type" (Part 2: Structures) # if ALG_SM4 TPM_RC TPMI_SM4_KEY_BITS_Unmarshal(TPMI_SM4_KEY_BITS* target, BYTE** buffer, INT32* size) @@ -3382,7 +3505,7 @@ TPMI_SM4_KEY_BITS_Marshal(TPMI_SM4_KEY_BITS* source, BYTE** buffer, INT32* size) # endif // !USE_MARSHALING_DEFINES # endif // ALG_SM4 -// Table 2:137 - Definition of TPMI_CAMELLIA_KEY_BITS Type +// Table "Definition of TPMI_CAMELLIA_KEY_BITS Type" (Part 2: Structures) # if ALG_CAMELLIA TPM_RC TPMI_CAMELLIA_KEY_BITS_Unmarshal( @@ -3421,18 +3544,13 @@ TPMI_CAMELLIA_KEY_BITS_Marshal( # endif // !USE_MARSHALING_DEFINES # endif // ALG_CAMELLIA -// Table 2:138 - Definition of TPMU_SYM_KEY_BITS Union +// Table "Definition of TPMU_SYM_KEY_BITS Union" (Part 2: Structures) TPM_RC TPMU_SYM_KEY_BITS_Unmarshal( TPMU_SYM_KEY_BITS* target, BYTE** buffer, INT32* size, UINT32 selector) { switch(selector) { -# if ALG_TDES - case TPM_ALG_TDES: - return TPMI_TDES_KEY_BITS_Unmarshal( - (TPMI_TDES_KEY_BITS*)&(target->tdes), buffer, size); -# endif // ALG_TDES # if ALG_AES case TPM_ALG_AES: return TPMI_AES_KEY_BITS_Unmarshal( @@ -3464,11 +3582,6 @@ TPMU_SYM_KEY_BITS_Marshal( { switch(selector) { -# if ALG_TDES - case TPM_ALG_TDES: - return TPMI_TDES_KEY_BITS_Marshal( - (TPMI_TDES_KEY_BITS*)&(source->tdes), buffer, size); -# endif // ALG_TDES # if ALG_AES case TPM_ALG_AES: return TPMI_AES_KEY_BITS_Marshal( @@ -3489,24 +3602,17 @@ TPMU_SYM_KEY_BITS_Marshal( return TPMI_ALG_HASH_Marshal( (TPMI_ALG_HASH*)&(source->xor), buffer, size); # endif // ALG_XOR - case TPM_ALG_NULL: - return 0; } return 0; } -// Table 2:139 - Definition of TPMU_SYM_MODE Union +// Table "Definition of TPMU_SYM_MODE Union" (Part 2: Structures) TPM_RC TPMU_SYM_MODE_Unmarshal( TPMU_SYM_MODE* target, BYTE** buffer, INT32* size, UINT32 selector) { switch(selector) { -# if ALG_TDES - case TPM_ALG_TDES: - return TPMI_ALG_SYM_MODE_Unmarshal( - (TPMI_ALG_SYM_MODE*)&(target->tdes), buffer, size, 1); -# endif // ALG_TDES # if ALG_AES case TPM_ALG_AES: return TPMI_ALG_SYM_MODE_Unmarshal( @@ -3537,11 +3643,6 @@ TPMU_SYM_MODE_Marshal( { switch(selector) { -# if ALG_TDES - case TPM_ALG_TDES: - return TPMI_ALG_SYM_MODE_Marshal( - (TPMI_ALG_SYM_MODE*)&(source->tdes), buffer, size); -# endif // ALG_TDES # if ALG_AES case TPM_ALG_AES: return TPMI_ALG_SYM_MODE_Marshal( @@ -3557,17 +3658,11 @@ TPMU_SYM_MODE_Marshal( return TPMI_ALG_SYM_MODE_Marshal( (TPMI_ALG_SYM_MODE*)&(source->camellia), buffer, size); # endif // ALG_CAMELLIA -# if ALG_XOR - case TPM_ALG_XOR: - return 0; -# endif // ALG_XOR - case TPM_ALG_NULL: - return 0; } return 0; } -// Table 2:141 - Definition of TPMT_SYM_DEF Structure +// Table "Definition of TPMT_SYM_DEF Structure" (Part 2: Structures) TPM_RC TPMT_SYM_DEF_Unmarshal(TPMT_SYM_DEF* target, BYTE** buffer, INT32* size, BOOL flag) { @@ -3605,7 +3700,7 @@ TPMT_SYM_DEF_Marshal(TPMT_SYM_DEF* source, BYTE** buffer, INT32* size) return result; } -// Table 2:142 - Definition of TPMT_SYM_DEF_OBJECT Structure +// Table "Definition of TPMT_SYM_DEF_OBJECT Structure" (Part 2: Structures) TPM_RC TPMT_SYM_DEF_OBJECT_Unmarshal( TPMT_SYM_DEF_OBJECT* target, BYTE** buffer, INT32* size, BOOL flag) @@ -3644,20 +3739,17 @@ TPMT_SYM_DEF_OBJECT_Marshal(TPMT_SYM_DEF_OBJECT* source, BYTE** buffer, INT32* s return result; } -// Table 2:143 - Definition of TPM2B_SYM_KEY Structure +// Table "Definition of TPM2B_SYM_KEY Structure" (Part 2: Structures) TPM_RC TPM2B_SYM_KEY_Unmarshal(TPM2B_SYM_KEY* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > MAX_SYM_KEY_BYTES)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > MAX_SYM_KEY_BYTES) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -3666,46 +3758,48 @@ TPM2B_SYM_KEY_Marshal(TPM2B_SYM_KEY* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:144 - Definition of TPMS_SYMCIPHER_PARMS Structure +// Table "Definition of TPMS_SYMCIPHER_PARMS Structure" (Part 2: Structures) TPM_RC TPMS_SYMCIPHER_PARMS_Unmarshal( TPMS_SYMCIPHER_PARMS* target, BYTE** buffer, INT32* size) { - return TPMT_SYM_DEF_OBJECT_Unmarshal( + TPM_RC result; + result = TPMT_SYM_DEF_OBJECT_Unmarshal( (TPMT_SYM_DEF_OBJECT*)&(target->sym), buffer, size, 0); + return result; } UINT16 TPMS_SYMCIPHER_PARMS_Marshal(TPMS_SYMCIPHER_PARMS* source, BYTE** buffer, INT32* size) { - return TPMT_SYM_DEF_OBJECT_Marshal( - (TPMT_SYM_DEF_OBJECT*)&(source->sym), buffer, size); + UINT16 result = 0; + result = (UINT16)(result + + TPMT_SYM_DEF_OBJECT_Marshal( + (TPMT_SYM_DEF_OBJECT*)&(source->sym), buffer, size)); + return result; } -// Table 2:145 - Definition of TPM2B_LABEL Structure +// Table "Definition of TPM2B_LABEL Structure" (Part 2: Structures) TPM_RC TPM2B_LABEL_Unmarshal(TPM2B_LABEL* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > LABEL_MAX_BUFFER)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > LABEL_MAX_BUFFER) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -3714,18 +3808,18 @@ TPM2B_LABEL_Marshal(TPM2B_LABEL* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:146 - Definition of TPMS_DERIVE Structure +// Table "Definition of TPMS_DERIVE Structure" (Part 2: Structures) TPM_RC TPMS_DERIVE_Unmarshal(TPMS_DERIVE* target, BYTE** buffer, INT32* size) { @@ -3749,20 +3843,17 @@ TPMS_DERIVE_Marshal(TPMS_DERIVE* source, BYTE** buffer, INT32* size) return result; } -// Table 2:147 - Definition of TPM2B_DERIVE Structure +// Table "Definition of TPM2B_DERIVE Structure" (Part 2: Structures) TPM_RC TPM2B_DERIVE_Unmarshal(TPM2B_DERIVE* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(TPMS_DERIVE))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(TPMS_DERIVE)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -3771,33 +3862,29 @@ TPM2B_DERIVE_Marshal(TPM2B_DERIVE* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:148 - Definition of TPMU_SENSITIVE_CREATE Union -// Table 2:149 - Definition of TPM2B_SENSITIVE_DATA Structure +// Table "Definition of TPM2B_SENSITIVE_DATA Structure" (Part 2: Structures) TPM_RC TPM2B_SENSITIVE_DATA_Unmarshal( TPM2B_SENSITIVE_DATA* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(TPMU_SENSITIVE_CREATE))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(TPMU_SENSITIVE_CREATE)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -3806,18 +3893,18 @@ TPM2B_SENSITIVE_DATA_Marshal(TPM2B_SENSITIVE_DATA* source, BYTE** buffer, INT32* UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:150 - Definition of TPMS_SENSITIVE_CREATE Structure +// Table "Definition of TPMS_SENSITIVE_CREATE Structure" (Part 2: Structures) TPM_RC TPMS_SENSITIVE_CREATE_Unmarshal( TPMS_SENSITIVE_CREATE* target, BYTE** buffer, INT32* size) @@ -3830,13 +3917,13 @@ TPMS_SENSITIVE_CREATE_Unmarshal( return result; } -// Table 2:151 - Definition of TPM2B_SENSITIVE_CREATE Structure +// Table "Definition of TPM2B_SENSITIVE_CREATE Structure" (Part 2: Structures) TPM_RC TPM2B_SENSITIVE_CREATE_Unmarshal( TPM2B_SENSITIVE_CREATE* target, BYTE** buffer, INT32* size) { TPM_RC result; - result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); // =a + result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); if(result == TPM_RC_SUCCESS) { // if size is zero, then the required structure is missing @@ -3846,31 +3933,34 @@ TPM2B_SENSITIVE_CREATE_Unmarshal( { INT32 startSize = *size; result = TPMS_SENSITIVE_CREATE_Unmarshal( - (TPMS_SENSITIVE_CREATE*)&(target->sensitive), buffer, size); // =b - if(result == TPM_RC_SUCCESS) - { - if(target->size != (startSize - *size)) - result = TPM_RC_SIZE; - } + (TPMS_SENSITIVE_CREATE*)&(target->sensitive), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->size != (startSize - *size))) + result = TPM_RC_SIZE; } } return result; } -// Table 2:152 - Definition of TPMS_SCHEME_HASH Structure +// Table "Definition of TPMS_SCHEME_HASH Structure" (Part 2: Structures) TPM_RC TPMS_SCHEME_HASH_Unmarshal(TPMS_SCHEME_HASH* target, BYTE** buffer, INT32* size) { - return TPMI_ALG_HASH_Unmarshal( - (TPMI_ALG_HASH*)&(target->hashAlg), buffer, size, 0); + TPM_RC result; + result = + TPMI_ALG_HASH_Unmarshal((TPMI_ALG_HASH*)&(target->hashAlg), buffer, size, 0); + return result; } UINT16 TPMS_SCHEME_HASH_Marshal(TPMS_SCHEME_HASH* source, BYTE** buffer, INT32* size) { - return TPMI_ALG_HASH_Marshal((TPMI_ALG_HASH*)&(source->hashAlg), buffer, size); + UINT16 result = 0; + result = (UINT16)(result + + TPMI_ALG_HASH_Marshal( + (TPMI_ALG_HASH*)&(source->hashAlg), buffer, size)); + return result; } -// Table 2:153 - Definition of TPMS_SCHEME_ECDAA Structure +// Table "Definition of TPMS_SCHEME_ECDAA Structure" (Part 2: Structures) # if ALG_ECC TPM_RC TPMS_SCHEME_ECDAA_Unmarshal(TPMS_SCHEME_ECDAA* target, BYTE** buffer, INT32* size) @@ -3895,7 +3985,7 @@ TPMS_SCHEME_ECDAA_Marshal(TPMS_SCHEME_ECDAA* source, BYTE** buffer, INT32* size) } # endif // ALG_ECC -// Table 2:154 - Definition of TPMI_ALG_KEYEDHASH_SCHEME Type +// Table "Definition of TPMI_ALG_KEYEDHASH_SCHEME Type" (Part 2: Structures) TPM_RC TPMI_ALG_KEYEDHASH_SCHEME_Unmarshal( TPMI_ALG_KEYEDHASH_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag) @@ -3913,12 +4003,9 @@ TPMI_ALG_KEYEDHASH_SCHEME_Unmarshal( case TPM_ALG_XOR: # endif // ALG_XOR break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_VALUE; - break; default: - result = TPM_RC_VALUE; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_VALUE; break; } } @@ -3933,7 +4020,7 @@ TPMI_ALG_KEYEDHASH_SCHEME_Marshal( } # endif // !USE_MARSHALING_DEFINES -// Table 2:155 - Definition of Types for HMAC_SIG_SCHEME +// Table "Definition of Types for HMAC_SIG_SCHEME" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPMS_SCHEME_HMAC_Unmarshal(TPMS_SCHEME_HMAC* target, BYTE** buffer, INT32* size) @@ -3947,7 +4034,7 @@ TPMS_SCHEME_HMAC_Marshal(TPMS_SCHEME_HMAC* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:156 - Definition of TPMS_SCHEME_XOR Structure +// Table "Definition of TPMS_SCHEME_XOR Structure" (Part 2: Structures) TPM_RC TPMS_SCHEME_XOR_Unmarshal(TPMS_SCHEME_XOR* target, BYTE** buffer, INT32* size) { @@ -3972,7 +4059,7 @@ TPMS_SCHEME_XOR_Marshal(TPMS_SCHEME_XOR* source, BYTE** buffer, INT32* size) return result; } -// Table 2:157 - Definition of TPMU_SCHEME_KEYEDHASH Union +// Table "Definition of TPMU_SCHEME_KEYEDHASH Union" (Part 2: Structures) TPM_RC TPMU_SCHEME_KEYEDHASH_Unmarshal( TPMU_SCHEME_KEYEDHASH* target, BYTE** buffer, INT32* size, UINT32 selector) @@ -4010,13 +4097,11 @@ TPMU_SCHEME_KEYEDHASH_Marshal( return TPMS_SCHEME_XOR_Marshal( (TPMS_SCHEME_XOR*)&(source->xor), buffer, size); # endif // ALG_XOR - case TPM_ALG_NULL: - return 0; } return 0; } -// Table 2:158 - Definition of TPMT_KEYEDHASH_SCHEME Structure +// Table "Definition of TPMT_KEYEDHASH_SCHEME Structure" (Part 2: Structures) TPM_RC TPMT_KEYEDHASH_SCHEME_Unmarshal( TPMT_KEYEDHASH_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag) @@ -4050,9 +4135,8 @@ TPMT_KEYEDHASH_SCHEME_Marshal( return result; } -// Table 2:159 - Definition of Types for RSA Signature Schemes -# if ALG_RSA -# if !USE_MARSHALING_DEFINES +// Table "Definition of Types for RSA Signature Schemes" (Part 2: Structures) +# if !USE_MARSHALING_DEFINES TPM_RC TPMS_SIG_SCHEME_RSASSA_Unmarshal( TPMS_SIG_SCHEME_RSASSA* target, BYTE** buffer, INT32* size) @@ -4077,12 +4161,10 @@ TPMS_SIG_SCHEME_RSAPSS_Marshal( { return TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_RSA +# endif // !USE_MARSHALING_DEFINES -// Table 2:160 - Definition of Types for ECC Signature Schemes -# if ALG_ECC -# if !USE_MARSHALING_DEFINES +// Table "Definition of Types for ECC Signature Schemes" (Part 2: Structures) +# if !USE_MARSHALING_DEFINES TPM_RC TPMS_SIG_SCHEME_ECDSA_Unmarshal( TPMS_SIG_SCHEME_ECDSA* target, BYTE** buffer, INT32* size) @@ -4096,6 +4178,18 @@ TPMS_SIG_SCHEME_ECDSA_Marshal( return TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)source, buffer, size); } TPM_RC +TPMS_SIG_SCHEME_ECDAA_Unmarshal( + TPMS_SIG_SCHEME_ECDAA* target, BYTE** buffer, INT32* size) +{ + return TPMS_SCHEME_ECDAA_Unmarshal((TPMS_SCHEME_ECDAA*)target, buffer, size); +} +UINT16 +TPMS_SIG_SCHEME_ECDAA_Marshal( + TPMS_SIG_SCHEME_ECDAA* source, BYTE** buffer, INT32* size) +{ + return TPMS_SCHEME_ECDAA_Marshal((TPMS_SCHEME_ECDAA*)source, buffer, size); +} +TPM_RC TPMS_SIG_SCHEME_SM2_Unmarshal(TPMS_SIG_SCHEME_SM2* target, BYTE** buffer, INT32* size) { return TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)target, buffer, size); @@ -4118,32 +4212,43 @@ TPMS_SIG_SCHEME_ECSCHNORR_Marshal( return TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)source, buffer, size); } TPM_RC -TPMS_SIG_SCHEME_ECDAA_Unmarshal( - TPMS_SIG_SCHEME_ECDAA* target, BYTE** buffer, INT32* size) +TPMS_SIG_SCHEME_EDDSA_Unmarshal( + TPMS_SIG_SCHEME_EDDSA* target, BYTE** buffer, INT32* size) { - return TPMS_SCHEME_ECDAA_Unmarshal((TPMS_SCHEME_ECDAA*)target, buffer, size); + return TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)target, buffer, size); } UINT16 -TPMS_SIG_SCHEME_ECDAA_Marshal( - TPMS_SIG_SCHEME_ECDAA* source, BYTE** buffer, INT32* size) +TPMS_SIG_SCHEME_EDDSA_Marshal( + TPMS_SIG_SCHEME_EDDSA* source, BYTE** buffer, INT32* size) { - return TPMS_SCHEME_ECDAA_Marshal((TPMS_SCHEME_ECDAA*)source, buffer, size); + return TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_ECC +TPM_RC +TPMS_SIG_SCHEME_EDDSA_PH_Unmarshal( + TPMS_SIG_SCHEME_EDDSA_PH* target, BYTE** buffer, INT32* size) +{ + return TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)target, buffer, size); +} +UINT16 +TPMS_SIG_SCHEME_EDDSA_PH_Marshal( + TPMS_SIG_SCHEME_EDDSA_PH* source, BYTE** buffer, INT32* size) +{ + return TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)source, buffer, size); +} +# endif // !USE_MARSHALING_DEFINES -// Table 2:161 - Definition of TPMU_SIG_SCHEME Union +// Table "Definition of TPMU_SIG_SCHEME Union" (Part 2: Structures) TPM_RC TPMU_SIG_SCHEME_Unmarshal( TPMU_SIG_SCHEME* target, BYTE** buffer, INT32* size, UINT32 selector) { switch(selector) { -# if ALG_ECDAA - case TPM_ALG_ECDAA: - return TPMS_SIG_SCHEME_ECDAA_Unmarshal( - (TPMS_SIG_SCHEME_ECDAA*)&(target->ecdaa), buffer, size); -# endif // ALG_ECDAA +# if ALG_HMAC + case TPM_ALG_HMAC: + return TPMS_SCHEME_HMAC_Unmarshal( + (TPMS_SCHEME_HMAC*)&(target->hmac), buffer, size); +# endif // ALG_HMAC # if ALG_RSASSA case TPM_ALG_RSASSA: return TPMS_SIG_SCHEME_RSASSA_Unmarshal( @@ -4159,6 +4264,11 @@ TPMU_SIG_SCHEME_Unmarshal( return TPMS_SIG_SCHEME_ECDSA_Unmarshal( (TPMS_SIG_SCHEME_ECDSA*)&(target->ecdsa), buffer, size); # endif // ALG_ECDSA +# if ALG_ECDAA + case TPM_ALG_ECDAA: + return TPMS_SIG_SCHEME_ECDAA_Unmarshal( + (TPMS_SIG_SCHEME_ECDAA*)&(target->ecdaa), buffer, size); +# endif // ALG_ECDAA # if ALG_SM2 case TPM_ALG_SM2: return TPMS_SIG_SCHEME_SM2_Unmarshal( @@ -4169,11 +4279,26 @@ TPMU_SIG_SCHEME_Unmarshal( return TPMS_SIG_SCHEME_ECSCHNORR_Unmarshal( (TPMS_SIG_SCHEME_ECSCHNORR*)&(target->ecschnorr), buffer, size); # endif // ALG_ECSCHNORR -# if ALG_HMAC - case TPM_ALG_HMAC: - return TPMS_SCHEME_HMAC_Unmarshal( - (TPMS_SCHEME_HMAC*)&(target->hmac), buffer, size); -# endif // ALG_HMAC +# if ALG_EDDSA + case TPM_ALG_EDDSA: + return TPMS_SIG_SCHEME_EDDSA_Unmarshal( + (TPMS_SIG_SCHEME_EDDSA*)&(target->eddsa), buffer, size); +# endif // ALG_EDDSA +# if ALG_EDDSA_PH + case TPM_ALG_EDDSA_PH: + return TPMS_SIG_SCHEME_EDDSA_PH_Unmarshal( + (TPMS_SIG_SCHEME_EDDSA_PH*)&(target->eddsa_ph), buffer, size); +# endif // ALG_EDDSA_PH +# if ALG_LMS + case TPM_ALG_LMS: + return TPMS_SIG_SCHEME_LMS_Unmarshal( + (TPMS_SIG_SCHEME_LMS*)&(target->lms), buffer, size); +# endif // ALG_LMS +# if ALG_XMSS + case TPM_ALG_XMSS: + return TPMS_SIG_SCHEME_XMSS_Unmarshal( + (TPMS_SIG_SCHEME_XMSS*)&(target->xmss), buffer, size); +# endif // ALG_XMSS case TPM_ALG_NULL: return TPM_RC_SUCCESS; } @@ -4185,11 +4310,11 @@ TPMU_SIG_SCHEME_Marshal( { switch(selector) { -# if ALG_ECDAA - case TPM_ALG_ECDAA: - return TPMS_SIG_SCHEME_ECDAA_Marshal( - (TPMS_SIG_SCHEME_ECDAA*)&(source->ecdaa), buffer, size); -# endif // ALG_ECDAA +# if ALG_HMAC + case TPM_ALG_HMAC: + return TPMS_SCHEME_HMAC_Marshal( + (TPMS_SCHEME_HMAC*)&(source->hmac), buffer, size); +# endif // ALG_HMAC # if ALG_RSASSA case TPM_ALG_RSASSA: return TPMS_SIG_SCHEME_RSASSA_Marshal( @@ -4205,6 +4330,11 @@ TPMU_SIG_SCHEME_Marshal( return TPMS_SIG_SCHEME_ECDSA_Marshal( (TPMS_SIG_SCHEME_ECDSA*)&(source->ecdsa), buffer, size); # endif // ALG_ECDSA +# if ALG_ECDAA + case TPM_ALG_ECDAA: + return TPMS_SIG_SCHEME_ECDAA_Marshal( + (TPMS_SIG_SCHEME_ECDAA*)&(source->ecdaa), buffer, size); +# endif // ALG_ECDAA # if ALG_SM2 case TPM_ALG_SM2: return TPMS_SIG_SCHEME_SM2_Marshal( @@ -4215,18 +4345,31 @@ TPMU_SIG_SCHEME_Marshal( return TPMS_SIG_SCHEME_ECSCHNORR_Marshal( (TPMS_SIG_SCHEME_ECSCHNORR*)&(source->ecschnorr), buffer, size); # endif // ALG_ECSCHNORR -# if ALG_HMAC - case TPM_ALG_HMAC: - return TPMS_SCHEME_HMAC_Marshal( - (TPMS_SCHEME_HMAC*)&(source->hmac), buffer, size); -# endif // ALG_HMAC - case TPM_ALG_NULL: - return 0; +# if ALG_EDDSA + case TPM_ALG_EDDSA: + return TPMS_SIG_SCHEME_EDDSA_Marshal( + (TPMS_SIG_SCHEME_EDDSA*)&(source->eddsa), buffer, size); +# endif // ALG_EDDSA +# if ALG_EDDSA_PH + case TPM_ALG_EDDSA_PH: + return TPMS_SIG_SCHEME_EDDSA_PH_Marshal( + (TPMS_SIG_SCHEME_EDDSA_PH*)&(source->eddsa_ph), buffer, size); +# endif // ALG_EDDSA_PH +# if ALG_LMS + case TPM_ALG_LMS: + return TPMS_SIG_SCHEME_LMS_Marshal( + (TPMS_SIG_SCHEME_LMS*)&(source->lms), buffer, size); +# endif // ALG_LMS +# if ALG_XMSS + case TPM_ALG_XMSS: + return TPMS_SIG_SCHEME_XMSS_Marshal( + (TPMS_SIG_SCHEME_XMSS*)&(source->xmss), buffer, size); +# endif // ALG_XMSS } return 0; } -// Table 2:162 - Definition of TPMT_SIG_SCHEME Structure +// Table "Definition of TPMT_SIG_SCHEME Structure" (Part 2: Structures) TPM_RC TPMT_SIG_SCHEME_Unmarshal( TPMT_SIG_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag) @@ -4256,9 +4399,20 @@ TPMT_SIG_SCHEME_Marshal(TPMT_SIG_SCHEME* source, BYTE** buffer, INT32* size) return result; } -// Table 2:163 - Definition of Types for Encryption Schemes -# if ALG_RSA -# if !USE_MARSHALING_DEFINES +// Table "Definition of Types for Encryption Schemes" (Part 2: Structures) +# if !USE_MARSHALING_DEFINES +TPM_RC +TPMS_ENC_SCHEME_RSAES_Unmarshal( + TPMS_ENC_SCHEME_RSAES* target, BYTE** buffer, INT32* size) +{ + return TPMS_EMPTY_Unmarshal((TPMS_EMPTY*)target, buffer, size); +} +UINT16 +TPMS_ENC_SCHEME_RSAES_Marshal( + TPMS_ENC_SCHEME_RSAES* source, BYTE** buffer, INT32* size) +{ + return TPMS_EMPTY_Marshal((TPMS_EMPTY*)source, buffer, size); +} TPM_RC TPMS_ENC_SCHEME_OAEP_Unmarshal( TPMS_ENC_SCHEME_OAEP* target, BYTE** buffer, INT32* size) @@ -4270,32 +4424,28 @@ TPMS_ENC_SCHEME_OAEP_Marshal(TPMS_ENC_SCHEME_OAEP* source, BYTE** buffer, INT32* { return TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)source, buffer, size); } +# endif // !USE_MARSHALING_DEFINES + +// Table "Definition of Types for ECC Key Exchange" (Part 2: Structures) +# if !USE_MARSHALING_DEFINES TPM_RC -TPMS_ENC_SCHEME_RSAES_Unmarshal( - TPMS_ENC_SCHEME_RSAES* target, BYTE** buffer, INT32* size) +TPMS_KEY_SCHEME_ECDH_Unmarshal( + TPMS_KEY_SCHEME_ECDH* target, BYTE** buffer, INT32* size) { - return TPMS_EMPTY_Unmarshal((TPMS_EMPTY*)target, buffer, size); + return TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)target, buffer, size); } UINT16 -TPMS_ENC_SCHEME_RSAES_Marshal( - TPMS_ENC_SCHEME_RSAES* source, BYTE** buffer, INT32* size) +TPMS_KEY_SCHEME_ECDH_Marshal(TPMS_KEY_SCHEME_ECDH* source, BYTE** buffer, INT32* size) { - return TPMS_EMPTY_Marshal((TPMS_EMPTY*)source, buffer, size); + return TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_RSA - -// Table 2:164 - Definition of Types for ECC Key Exchange -# if ALG_ECC -# if !USE_MARSHALING_DEFINES TPM_RC -TPMS_KEY_SCHEME_ECDH_Unmarshal( - TPMS_KEY_SCHEME_ECDH* target, BYTE** buffer, INT32* size) +TPMS_KEY_SCHEME_SM2_Unmarshal(TPMS_KEY_SCHEME_SM2* target, BYTE** buffer, INT32* size) { return TPMS_SCHEME_HASH_Unmarshal((TPMS_SCHEME_HASH*)target, buffer, size); } UINT16 -TPMS_KEY_SCHEME_ECDH_Marshal(TPMS_KEY_SCHEME_ECDH* source, BYTE** buffer, INT32* size) +TPMS_KEY_SCHEME_SM2_Marshal(TPMS_KEY_SCHEME_SM2* source, BYTE** buffer, INT32* size) { return TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)source, buffer, size); } @@ -4311,10 +4461,9 @@ TPMS_KEY_SCHEME_ECMQV_Marshal( { return TPMS_SCHEME_HASH_Marshal((TPMS_SCHEME_HASH*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_ECC +# endif // !USE_MARSHALING_DEFINES -// Table 2:165 - Definition of Types for KDF Schemes +// Table "Definition of Types for KDF Schemes" (Part 2: Structures) # if !USE_MARSHALING_DEFINES TPM_RC TPMS_KDF_SCHEME_MGF1_Unmarshal( @@ -4364,7 +4513,7 @@ TPMS_KDF_SCHEME_KDF1_SP800_108_Marshal( } # endif // !USE_MARSHALING_DEFINES -// Table 2:166 - Definition of TPMU_KDF_SCHEME Union +// Table "Definition of TPMU_KDF_SCHEME Union" (Part 2: Structures) TPM_RC TPMU_KDF_SCHEME_Unmarshal( TPMU_KDF_SCHEME* target, BYTE** buffer, INT32* size, UINT32 selector) @@ -4430,13 +4579,11 @@ TPMU_KDF_SCHEME_Marshal( buffer, size); # endif // ALG_KDF1_SP800_108 - case TPM_ALG_NULL: - return 0; } return 0; } -// Table 2:167 - Definition of TPMT_KDF_SCHEME Structure +// Table "Definition of TPMT_KDF_SCHEME Structure" (Part 2: Structures) TPM_RC TPMT_KDF_SCHEME_Unmarshal( TPMT_KDF_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag) @@ -4466,7 +4613,7 @@ TPMT_KDF_SCHEME_Marshal(TPMT_KDF_SCHEME* source, BYTE** buffer, INT32* size) return result; } -// Table 2:168 - Definition of TPMI_ALG_ASYM_SCHEME Type +// Table "Definition of TPMI_ALG_ASYM_SCHEME Type" (Part 2: Structures) TPM_RC TPMI_ALG_ASYM_SCHEME_Unmarshal( TPMI_ALG_ASYM_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag) @@ -4477,43 +4624,52 @@ TPMI_ALG_ASYM_SCHEME_Unmarshal( { switch(*target) { -# if ALG_ECDH - case TPM_ALG_ECDH: -# endif // ALG_ECDH -# if ALG_ECMQV - case TPM_ALG_ECMQV: -# endif // ALG_ECMQV -# if ALG_ECDAA - case TPM_ALG_ECDAA: -# endif // ALG_ECDAA # if ALG_RSASSA case TPM_ALG_RSASSA: # endif // ALG_RSASSA +# if ALG_RSAES + case TPM_ALG_RSAES: +# endif // ALG_RSAES # if ALG_RSAPSS case TPM_ALG_RSAPSS: # endif // ALG_RSAPSS +# if ALG_OAEP + case TPM_ALG_OAEP: +# endif // ALG_OAEP # if ALG_ECDSA case TPM_ALG_ECDSA: # endif // ALG_ECDSA +# if ALG_ECDH + case TPM_ALG_ECDH: +# endif // ALG_ECDH +# if ALG_ECDAA + case TPM_ALG_ECDAA: +# endif // ALG_ECDAA # if ALG_SM2 case TPM_ALG_SM2: # endif // ALG_SM2 # if ALG_ECSCHNORR case TPM_ALG_ECSCHNORR: # endif // ALG_ECSCHNORR -# if ALG_RSAES - case TPM_ALG_RSAES: -# endif // ALG_RSAES -# if ALG_OAEP - case TPM_ALG_OAEP: -# endif // ALG_OAEP - break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_VALUE; +# if ALG_ECMQV + case TPM_ALG_ECMQV: +# endif // ALG_ECMQV +# if ALG_EDDSA + case TPM_ALG_EDDSA: +# endif // ALG_EDDSA +# if ALG_EDDSA_PH + case TPM_ALG_EDDSA_PH: +# endif // ALG_EDDSA_PH +# if ALG_LMS + case TPM_ALG_LMS: +# endif // ALG_LMS +# if ALG_XMSS + case TPM_ALG_XMSS: +# endif // ALG_XMSS break; default: - result = TPM_RC_VALUE; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_VALUE; break; } } @@ -4527,63 +4683,83 @@ TPMI_ALG_ASYM_SCHEME_Marshal(TPMI_ALG_ASYM_SCHEME* source, BYTE** buffer, INT32* } # endif // !USE_MARSHALING_DEFINES -// Table 2:169 - Definition of TPMU_ASYM_SCHEME Union +// Table "Definition of TPMU_ASYM_SCHEME Union" (Part 2: Structures) TPM_RC TPMU_ASYM_SCHEME_Unmarshal( TPMU_ASYM_SCHEME* target, BYTE** buffer, INT32* size, UINT32 selector) { switch(selector) { -# if ALG_ECDH - case TPM_ALG_ECDH: - return TPMS_KEY_SCHEME_ECDH_Unmarshal( - (TPMS_KEY_SCHEME_ECDH*)&(target->ecdh), buffer, size); -# endif // ALG_ECDH -# if ALG_ECMQV - case TPM_ALG_ECMQV: - return TPMS_KEY_SCHEME_ECMQV_Unmarshal( - (TPMS_KEY_SCHEME_ECMQV*)&(target->ecmqv), buffer, size); -# endif // ALG_ECMQV -# if ALG_ECDAA - case TPM_ALG_ECDAA: - return TPMS_SIG_SCHEME_ECDAA_Unmarshal( - (TPMS_SIG_SCHEME_ECDAA*)&(target->ecdaa), buffer, size); -# endif // ALG_ECDAA # if ALG_RSASSA case TPM_ALG_RSASSA: return TPMS_SIG_SCHEME_RSASSA_Unmarshal( (TPMS_SIG_SCHEME_RSASSA*)&(target->rsassa), buffer, size); # endif // ALG_RSASSA +# if ALG_RSAES + case TPM_ALG_RSAES: + return TPMS_ENC_SCHEME_RSAES_Unmarshal( + (TPMS_ENC_SCHEME_RSAES*)&(target->rsaes), buffer, size); +# endif // ALG_RSAES # if ALG_RSAPSS case TPM_ALG_RSAPSS: return TPMS_SIG_SCHEME_RSAPSS_Unmarshal( (TPMS_SIG_SCHEME_RSAPSS*)&(target->rsapss), buffer, size); # endif // ALG_RSAPSS +# if ALG_OAEP + case TPM_ALG_OAEP: + return TPMS_ENC_SCHEME_OAEP_Unmarshal( + (TPMS_ENC_SCHEME_OAEP*)&(target->oaep), buffer, size); +# endif // ALG_OAEP # if ALG_ECDSA case TPM_ALG_ECDSA: return TPMS_SIG_SCHEME_ECDSA_Unmarshal( (TPMS_SIG_SCHEME_ECDSA*)&(target->ecdsa), buffer, size); # endif // ALG_ECDSA +# if ALG_ECDH + case TPM_ALG_ECDH: + return TPMS_KEY_SCHEME_ECDH_Unmarshal( + (TPMS_KEY_SCHEME_ECDH*)&(target->ecdh), buffer, size); +# endif // ALG_ECDH +# if ALG_ECDAA + case TPM_ALG_ECDAA: + return TPMS_SIG_SCHEME_ECDAA_Unmarshal( + (TPMS_SIG_SCHEME_ECDAA*)&(target->ecdaa), buffer, size); +# endif // ALG_ECDAA # if ALG_SM2 case TPM_ALG_SM2: - return TPMS_SIG_SCHEME_SM2_Unmarshal( - (TPMS_SIG_SCHEME_SM2*)&(target->sm2), buffer, size); + return TPMS_KEY_SCHEME_SM2_Unmarshal( + (TPMS_KEY_SCHEME_SM2*)&(target->sm2), buffer, size); # endif // ALG_SM2 # if ALG_ECSCHNORR case TPM_ALG_ECSCHNORR: return TPMS_SIG_SCHEME_ECSCHNORR_Unmarshal( (TPMS_SIG_SCHEME_ECSCHNORR*)&(target->ecschnorr), buffer, size); # endif // ALG_ECSCHNORR -# if ALG_RSAES - case TPM_ALG_RSAES: - return TPMS_ENC_SCHEME_RSAES_Unmarshal( - (TPMS_ENC_SCHEME_RSAES*)&(target->rsaes), buffer, size); -# endif // ALG_RSAES -# if ALG_OAEP - case TPM_ALG_OAEP: - return TPMS_ENC_SCHEME_OAEP_Unmarshal( - (TPMS_ENC_SCHEME_OAEP*)&(target->oaep), buffer, size); -# endif // ALG_OAEP +# if ALG_ECMQV + case TPM_ALG_ECMQV: + return TPMS_KEY_SCHEME_ECMQV_Unmarshal( + (TPMS_KEY_SCHEME_ECMQV*)&(target->ecmqv), buffer, size); +# endif // ALG_ECMQV +# if ALG_EDDSA + case TPM_ALG_EDDSA: + return TPMS_SIG_SCHEME_EDDSA_Unmarshal( + (TPMS_SIG_SCHEME_EDDSA*)&(target->eddsa), buffer, size); +# endif // ALG_EDDSA +# if ALG_EDDSA_PH + case TPM_ALG_EDDSA_PH: + return TPMS_SIG_SCHEME_EDDSA_PH_Unmarshal( + (TPMS_SIG_SCHEME_EDDSA_PH*)&(target->eddsa_ph), buffer, size); +# endif // ALG_EDDSA_PH +# if ALG_LMS + case TPM_ALG_LMS: + return TPMS_SIG_SCHEME_LMS_Unmarshal( + (TPMS_SIG_SCHEME_LMS*)&(target->lms), buffer, size); +# endif // ALG_LMS +# if ALG_XMSS + case TPM_ALG_XMSS: + return TPMS_SIG_SCHEME_XMSS_Unmarshal( + (TPMS_SIG_SCHEME_XMSS*)&(target->xmss), buffer, size); +# endif // ALG_XMSS case TPM_ALG_NULL: return TPM_RC_SUCCESS; } @@ -4595,65 +4771,81 @@ TPMU_ASYM_SCHEME_Marshal( { switch(selector) { -# if ALG_ECDH - case TPM_ALG_ECDH: - return TPMS_KEY_SCHEME_ECDH_Marshal( - (TPMS_KEY_SCHEME_ECDH*)&(source->ecdh), buffer, size); -# endif // ALG_ECDH -# if ALG_ECMQV - case TPM_ALG_ECMQV: - return TPMS_KEY_SCHEME_ECMQV_Marshal( - (TPMS_KEY_SCHEME_ECMQV*)&(source->ecmqv), buffer, size); -# endif // ALG_ECMQV -# if ALG_ECDAA - case TPM_ALG_ECDAA: - return TPMS_SIG_SCHEME_ECDAA_Marshal( - (TPMS_SIG_SCHEME_ECDAA*)&(source->ecdaa), buffer, size); -# endif // ALG_ECDAA # if ALG_RSASSA case TPM_ALG_RSASSA: return TPMS_SIG_SCHEME_RSASSA_Marshal( (TPMS_SIG_SCHEME_RSASSA*)&(source->rsassa), buffer, size); # endif // ALG_RSASSA +# if ALG_RSAES + case TPM_ALG_RSAES: + return TPMS_ENC_SCHEME_RSAES_Marshal( + (TPMS_ENC_SCHEME_RSAES*)&(source->rsaes), buffer, size); +# endif // ALG_RSAES # if ALG_RSAPSS case TPM_ALG_RSAPSS: return TPMS_SIG_SCHEME_RSAPSS_Marshal( (TPMS_SIG_SCHEME_RSAPSS*)&(source->rsapss), buffer, size); # endif // ALG_RSAPSS +# if ALG_OAEP + case TPM_ALG_OAEP: + return TPMS_ENC_SCHEME_OAEP_Marshal( + (TPMS_ENC_SCHEME_OAEP*)&(source->oaep), buffer, size); +# endif // ALG_OAEP # if ALG_ECDSA case TPM_ALG_ECDSA: return TPMS_SIG_SCHEME_ECDSA_Marshal( (TPMS_SIG_SCHEME_ECDSA*)&(source->ecdsa), buffer, size); # endif // ALG_ECDSA +# if ALG_ECDH + case TPM_ALG_ECDH: + return TPMS_KEY_SCHEME_ECDH_Marshal( + (TPMS_KEY_SCHEME_ECDH*)&(source->ecdh), buffer, size); +# endif // ALG_ECDH +# if ALG_ECDAA + case TPM_ALG_ECDAA: + return TPMS_SIG_SCHEME_ECDAA_Marshal( + (TPMS_SIG_SCHEME_ECDAA*)&(source->ecdaa), buffer, size); +# endif // ALG_ECDAA # if ALG_SM2 case TPM_ALG_SM2: - return TPMS_SIG_SCHEME_SM2_Marshal( - (TPMS_SIG_SCHEME_SM2*)&(source->sm2), buffer, size); + return TPMS_KEY_SCHEME_SM2_Marshal( + (TPMS_KEY_SCHEME_SM2*)&(source->sm2), buffer, size); # endif // ALG_SM2 # if ALG_ECSCHNORR case TPM_ALG_ECSCHNORR: return TPMS_SIG_SCHEME_ECSCHNORR_Marshal( (TPMS_SIG_SCHEME_ECSCHNORR*)&(source->ecschnorr), buffer, size); # endif // ALG_ECSCHNORR -# if ALG_RSAES - case TPM_ALG_RSAES: - return TPMS_ENC_SCHEME_RSAES_Marshal( - (TPMS_ENC_SCHEME_RSAES*)&(source->rsaes), buffer, size); -# endif // ALG_RSAES -# if ALG_OAEP - case TPM_ALG_OAEP: - return TPMS_ENC_SCHEME_OAEP_Marshal( - (TPMS_ENC_SCHEME_OAEP*)&(source->oaep), buffer, size); -# endif // ALG_OAEP - case TPM_ALG_NULL: - return 0; +# if ALG_ECMQV + case TPM_ALG_ECMQV: + return TPMS_KEY_SCHEME_ECMQV_Marshal( + (TPMS_KEY_SCHEME_ECMQV*)&(source->ecmqv), buffer, size); +# endif // ALG_ECMQV +# if ALG_EDDSA + case TPM_ALG_EDDSA: + return TPMS_SIG_SCHEME_EDDSA_Marshal( + (TPMS_SIG_SCHEME_EDDSA*)&(source->eddsa), buffer, size); +# endif // ALG_EDDSA +# if ALG_EDDSA_PH + case TPM_ALG_EDDSA_PH: + return TPMS_SIG_SCHEME_EDDSA_PH_Marshal( + (TPMS_SIG_SCHEME_EDDSA_PH*)&(source->eddsa_ph), buffer, size); +# endif // ALG_EDDSA_PH +# if ALG_LMS + case TPM_ALG_LMS: + return TPMS_SIG_SCHEME_LMS_Marshal( + (TPMS_SIG_SCHEME_LMS*)&(source->lms), buffer, size); +# endif // ALG_LMS +# if ALG_XMSS + case TPM_ALG_XMSS: + return TPMS_SIG_SCHEME_XMSS_Marshal( + (TPMS_SIG_SCHEME_XMSS*)&(source->xmss), buffer, size); +# endif // ALG_XMSS } return 0; } -// Table 2:170 - Definition of TPMT_ASYM_SCHEME Structure -// Table 2:171 - Definition of TPMI_ALG_RSA_SCHEME Type -# if ALG_RSA +// Table "Definition of TPMI_ALG_RSA_SCHEME Type" (Part 2: Structures) TPM_RC TPMI_ALG_RSA_SCHEME_Unmarshal( TPMI_ALG_RSA_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag) @@ -4664,41 +4856,36 @@ TPMI_ALG_RSA_SCHEME_Unmarshal( { switch(*target) { -# if ALG_RSAES - case TPM_ALG_RSAES: -# endif // ALG_RSAES -# if ALG_OAEP - case TPM_ALG_OAEP: -# endif // ALG_OAEP -# if ALG_RSASSA +# if ALG_RSASSA case TPM_ALG_RSASSA: -# endif // ALG_RSASSA -# if ALG_RSAPSS +# endif // ALG_RSASSA +# if ALG_RSAES + case TPM_ALG_RSAES: +# endif // ALG_RSAES +# if ALG_RSAPSS case TPM_ALG_RSAPSS: -# endif // ALG_RSAPSS - break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_VALUE; +# endif // ALG_RSAPSS +# if ALG_OAEP + case TPM_ALG_OAEP: +# endif // ALG_OAEP break; default: - result = TPM_RC_VALUE; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_VALUE; break; } } return result; } -# if !USE_MARSHALING_DEFINES +# if !USE_MARSHALING_DEFINES UINT16 TPMI_ALG_RSA_SCHEME_Marshal(TPMI_ALG_RSA_SCHEME* source, BYTE** buffer, INT32* size) { return TPM_ALG_ID_Marshal((TPM_ALG_ID*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_RSA +# endif // !USE_MARSHALING_DEFINES -// Table 2:172 - Definition of TPMT_RSA_SCHEME Structure -# if ALG_RSA +// Table "Definition of TPMT_RSA_SCHEME Structure" (Part 2: Structures) TPM_RC TPMT_RSA_SCHEME_Unmarshal( TPMT_RSA_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag) @@ -4728,10 +4915,8 @@ TPMT_RSA_SCHEME_Marshal(TPMT_RSA_SCHEME* source, BYTE** buffer, INT32* size) (UINT32)source->scheme)); return result; } -# endif // ALG_RSA -// Table 2:173 - Definition of TPMI_ALG_RSA_DECRYPT Type -# if ALG_RSA +// Table "Definition of TPMI_ALG_RSA_DECRYPT Type" (Part 2: Structures) TPM_RC TPMI_ALG_RSA_DECRYPT_Unmarshal( TPMI_ALG_RSA_DECRYPT* target, BYTE** buffer, INT32* size, BOOL flag) @@ -4742,35 +4927,30 @@ TPMI_ALG_RSA_DECRYPT_Unmarshal( { switch(*target) { -# if ALG_RSAES +# if ALG_RSAES case TPM_ALG_RSAES: -# endif // ALG_RSAES -# if ALG_OAEP +# endif // ALG_RSAES +# if ALG_OAEP case TPM_ALG_OAEP: -# endif // ALG_OAEP - break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_VALUE; +# endif // ALG_OAEP break; default: - result = TPM_RC_VALUE; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_VALUE; break; } } return result; } -# if !USE_MARSHALING_DEFINES +# if !USE_MARSHALING_DEFINES UINT16 TPMI_ALG_RSA_DECRYPT_Marshal(TPMI_ALG_RSA_DECRYPT* source, BYTE** buffer, INT32* size) { return TPM_ALG_ID_Marshal((TPM_ALG_ID*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_RSA +# endif // !USE_MARSHALING_DEFINES -// Table 2:174 - Definition of TPMT_RSA_DECRYPT Structure -# if ALG_RSA +// Table "Definition of TPMT_RSA_DECRYPT Structure" (Part 2: Structures) TPM_RC TPMT_RSA_DECRYPT_Unmarshal( TPMT_RSA_DECRYPT* target, BYTE** buffer, INT32* size, BOOL flag) @@ -4800,24 +4980,19 @@ TPMT_RSA_DECRYPT_Marshal(TPMT_RSA_DECRYPT* source, BYTE** buffer, INT32* size) (UINT32)source->scheme)); return result; } -# endif // ALG_RSA -// Table 2:175 - Definition of TPM2B_PUBLIC_KEY_RSA Structure -# if ALG_RSA +// Table "Definition of TPM2B_PUBLIC_KEY_RSA Structure" (Part 2: Structures) TPM_RC TPM2B_PUBLIC_KEY_RSA_Unmarshal( TPM2B_PUBLIC_KEY_RSA* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > MAX_RSA_KEY_BYTES)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > MAX_RSA_KEY_BYTES) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -4826,20 +5001,18 @@ TPM2B_PUBLIC_KEY_RSA_Marshal(TPM2B_PUBLIC_KEY_RSA* source, BYTE** buffer, INT32* UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -# endif // ALG_RSA -// Table 2:176 - Definition of TPMI_RSA_KEY_BITS Type -# if ALG_RSA +// Table "Definition of TPMI_RSA_KEY_BITS Type" (Part 2: Structures) TPM_RC TPMI_RSA_KEY_BITS_Unmarshal(TPMI_RSA_KEY_BITS* target, BYTE** buffer, INT32* size) { @@ -4849,21 +5022,21 @@ TPMI_RSA_KEY_BITS_Unmarshal(TPMI_RSA_KEY_BITS* target, BYTE** buffer, INT32* siz { switch(*target) { -# if RSA_1024 +# if RSA_1024 case 1024: -# endif // RSA_1024 -# if RSA_2048 +# endif // RSA_1024 +# if RSA_16384 + case 16384: +# endif // RSA_16384 +# if RSA_2048 case 2048: -# endif // RSA_2048 -# if RSA_3072 +# endif // RSA_2048 +# if RSA_3072 case 3072: -# endif // RSA_3072 -# if RSA_4096 +# endif // RSA_3072 +# if RSA_4096 case 4096: -# endif // RSA_4096 -# if RSA_16384 - case 16384: -# endif // RSA_16384 +# endif // RSA_4096 break; default: result = TPM_RC_VALUE; @@ -4872,31 +5045,26 @@ TPMI_RSA_KEY_BITS_Unmarshal(TPMI_RSA_KEY_BITS* target, BYTE** buffer, INT32* siz } return result; } -# if !USE_MARSHALING_DEFINES +# if !USE_MARSHALING_DEFINES UINT16 TPMI_RSA_KEY_BITS_Marshal(TPMI_RSA_KEY_BITS* source, BYTE** buffer, INT32* size) { return TPM_KEY_BITS_Marshal((TPM_KEY_BITS*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_RSA +# endif // !USE_MARSHALING_DEFINES -// Table 2:177 - Definition of TPM2B_PRIVATE_KEY_RSA Structure -# if ALG_RSA +// Table "Definition of TPM2B_PRIVATE_KEY_RSA Structure" (Part 2: Structures) TPM_RC TPM2B_PRIVATE_KEY_RSA_Unmarshal( TPM2B_PRIVATE_KEY_RSA* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > RSA_PRIVATE_SIZE)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > RSA_PRIVATE_SIZE) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -4906,32 +5074,29 @@ TPM2B_PRIVATE_KEY_RSA_Marshal( UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -# endif // ALG_RSA -// Table 2:178 - Definition of TPM2B_ECC_PARAMETER Structure +// Table "Definition of TPM2B_ECC_PARAMETER Structure" (Part 2: Structures) +# if ALG_ECC TPM_RC TPM2B_ECC_PARAMETER_Unmarshal(TPM2B_ECC_PARAMETER* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > MAX_ECC_KEY_BYTES)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > MAX_ECC_KEY_BYTES) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -4940,18 +5105,19 @@ TPM2B_ECC_PARAMETER_Marshal(TPM2B_ECC_PARAMETER* source, BYTE** buffer, INT32* s UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } +# endif // ALG_ECC -// Table 2:179 - Definition of TPMS_ECC_POINT Structure +// Table "Definition of TPMS_ECC_POINT Structure" (Part 2: Structures) # if ALG_ECC TPM_RC TPMS_ECC_POINT_Unmarshal(TPMS_ECC_POINT* target, BYTE** buffer, INT32* size) @@ -4978,13 +5144,13 @@ TPMS_ECC_POINT_Marshal(TPMS_ECC_POINT* source, BYTE** buffer, INT32* size) } # endif // ALG_ECC -// Table 2:180 - Definition of TPM2B_ECC_POINT Structure +// Table "Definition of TPM2B_ECC_POINT Structure" (Part 2: Structures) # if ALG_ECC TPM_RC TPM2B_ECC_POINT_Unmarshal(TPM2B_ECC_POINT* target, BYTE** buffer, INT32* size) { TPM_RC result; - result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); // =a + result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); if(result == TPM_RC_SUCCESS) { // if size is zero, then the required structure is missing @@ -4994,12 +5160,9 @@ TPM2B_ECC_POINT_Unmarshal(TPM2B_ECC_POINT* target, BYTE** buffer, INT32* size) { INT32 startSize = *size; result = TPMS_ECC_POINT_Unmarshal( - (TPMS_ECC_POINT*)&(target->point), buffer, size); // =b - if(result == TPM_RC_SUCCESS) - { - if(target->size != (startSize - *size)) - result = TPM_RC_SIZE; - } + (TPMS_ECC_POINT*)&(target->point), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->size != (startSize - *size))) + result = TPM_RC_SIZE; } } return result; @@ -5022,8 +5185,7 @@ TPM2B_ECC_POINT_Marshal(TPM2B_ECC_POINT* source, BYTE** buffer, INT32* size) } # endif // ALG_ECC -// Table 2:181 - Definition of TPMI_ALG_ECC_SCHEME Type -# if ALG_ECC +// Table "Definition of TPMI_ALG_ECC_SCHEME Type" (Part 2: Structures) TPM_RC TPMI_ALG_ECC_SCHEME_Unmarshal( TPMI_ALG_ECC_SCHEME* target, BYTE** buffer, INT32* size, BOOL flag) @@ -5034,49 +5196,51 @@ TPMI_ALG_ECC_SCHEME_Unmarshal( { switch(*target) { -# if ALG_ECDAA - case TPM_ALG_ECDAA: -# endif // ALG_ECDAA -# if ALG_ECDSA +# if ALG_ECDSA case TPM_ALG_ECDSA: -# endif // ALG_ECDSA -# if ALG_SM2 +# endif // ALG_ECDSA +# if ALG_ECDH + case TPM_ALG_ECDH: +# endif // ALG_ECDH +# if ALG_ECDAA + case TPM_ALG_ECDAA: +# endif // ALG_ECDAA +# if ALG_SM2 case TPM_ALG_SM2: -# endif // ALG_SM2 -# if ALG_ECSCHNORR +# endif // ALG_SM2 +# if ALG_ECSCHNORR case TPM_ALG_ECSCHNORR: -# endif // ALG_ECSCHNORR -# if ALG_ECDH - case TPM_ALG_ECDH: -# endif // ALG_ECDH -# if ALG_ECMQV +# endif // ALG_ECSCHNORR +# if ALG_ECMQV case TPM_ALG_ECMQV: -# endif // ALG_ECMQV - break; - case TPM_ALG_NULL: - if(!flag) - result = TPM_RC_SCHEME; +# endif // ALG_ECMQV +# if ALG_EDDSA + case TPM_ALG_EDDSA: +# endif // ALG_EDDSA +# if ALG_EDDSA_PH + case TPM_ALG_EDDSA_PH: +# endif // ALG_EDDSA_PH break; default: - result = TPM_RC_SCHEME; + if((*target != TPM_ALG_NULL) || !flag) + result = TPM_RC_SCHEME; break; } } return result; } -# if !USE_MARSHALING_DEFINES +# if !USE_MARSHALING_DEFINES UINT16 TPMI_ALG_ECC_SCHEME_Marshal(TPMI_ALG_ECC_SCHEME* source, BYTE** buffer, INT32* size) { return TPM_ALG_ID_Marshal((TPM_ALG_ID*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_ECC +# endif // !USE_MARSHALING_DEFINES -// Table 2:182 - Definition of TPMI_ECC_CURVE Type -# if ALG_ECC +// Table "Definition of TPMI_ECC_CURVE Type" (Part 2: Structures) TPM_RC -TPMI_ECC_CURVE_Unmarshal(TPMI_ECC_CURVE* target, BYTE** buffer, INT32* size) +TPMI_ECC_CURVE_Unmarshal( + TPMI_ECC_CURVE* target, BYTE** buffer, INT32* size, BOOL flag) { TPM_RC result; result = TPM_ECC_CURVE_Unmarshal((TPM_ECC_CURVE*)target, buffer, size); @@ -5084,48 +5248,63 @@ TPMI_ECC_CURVE_Unmarshal(TPMI_ECC_CURVE* target, BYTE** buffer, INT32* size) { switch(*target) { -# if ECC_BN_P256 - case TPM_ECC_BN_P256: -# endif // ECC_BN_P256 -# if ECC_BN_P638 - case TPM_ECC_BN_P638: -# endif // ECC_BN_P638 -# if ECC_NIST_P192 +# if ECC_NIST_P192 case TPM_ECC_NIST_P192: -# endif // ECC_NIST_P192 -# if ECC_NIST_P224 +# endif // ECC_NIST_P192 +# if ECC_NIST_P224 case TPM_ECC_NIST_P224: -# endif // ECC_NIST_P224 -# if ECC_NIST_P256 +# endif // ECC_NIST_P224 +# if ECC_NIST_P256 case TPM_ECC_NIST_P256: -# endif // ECC_NIST_P256 -# if ECC_NIST_P384 +# endif // ECC_NIST_P256 +# if ECC_NIST_P384 case TPM_ECC_NIST_P384: -# endif // ECC_NIST_P384 -# if ECC_NIST_P521 +# endif // ECC_NIST_P384 +# if ECC_NIST_P521 case TPM_ECC_NIST_P521: -# endif // ECC_NIST_P521 -# if ECC_SM2_P256 +# endif // ECC_NIST_P521 +# if ECC_BN_P256 + case TPM_ECC_BN_P256: +# endif // ECC_BN_P256 +# if ECC_BN_P638 + case TPM_ECC_BN_P638: +# endif // ECC_BN_P638 +# if ECC_SM2_P256 case TPM_ECC_SM2_P256: -# endif // ECC_SM2_P256 +# endif // ECC_SM2_P256 +# if ECC_BP_P256_R1 + case TPM_ECC_BP_P256_R1: +# endif // ECC_BP_P256_R1 +# if ECC_BP_P384_R1 + case TPM_ECC_BP_P384_R1: +# endif // ECC_BP_P384_R1 +# if ECC_BP_P512_R1 + case TPM_ECC_BP_P512_R1: +# endif // ECC_BP_P512_R1 +# if ECC_CURVE_25519 + case TPM_ECC_CURVE_25519: +# endif // ECC_CURVE_25519 +# if ECC_CURVE_448 + case TPM_ECC_CURVE_448: +# endif // ECC_CURVE_448 break; default: - result = TPM_RC_CURVE; + if((*target != TPM_ECC_NONE) || !flag) + result = TPM_RC_CURVE; break; } } return result; } -# if !USE_MARSHALING_DEFINES +# if !USE_MARSHALING_DEFINES UINT16 TPMI_ECC_CURVE_Marshal(TPMI_ECC_CURVE* source, BYTE** buffer, INT32* size) { return TPM_ECC_CURVE_Marshal((TPM_ECC_CURVE*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_ECC +# endif // !USE_MARSHALING_DEFINES -// Table 2:183 - Definition of TPMT_ECC_SCHEME Structure +// Table "Definition of TPMT_ECC_SCHEME Structure" (Part 2: Structures) # if ALG_ECC TPM_RC TPMT_ECC_SCHEME_Unmarshal( @@ -5158,7 +5337,7 @@ TPMT_ECC_SCHEME_Marshal(TPMT_ECC_SCHEME* source, BYTE** buffer, INT32* size) } # endif // ALG_ECC -// Table 2:184 - Definition of TPMS_ALGORITHM_DETAIL_ECC Structure +// Table "Definition of TPMS_ALGORITHM_DETAIL_ECC Structure" (Part 2: Structures) # if ALG_ECC UINT16 TPMS_ALGORITHM_DETAIL_ECC_Marshal( @@ -5201,8 +5380,7 @@ TPMS_ALGORITHM_DETAIL_ECC_Marshal( } # endif // ALG_ECC -// Table 2:185 - Definition of TPMS_SIGNATURE_RSA Structure -# if ALG_RSA +// Table "Definition of TPMS_SIGNATURE_RSA Structure" (Part 2: Structures) TPM_RC TPMS_SIGNATURE_RSA_Unmarshal(TPMS_SIGNATURE_RSA* target, BYTE** buffer, INT32* size) { @@ -5226,11 +5404,9 @@ TPMS_SIGNATURE_RSA_Marshal(TPMS_SIGNATURE_RSA* source, BYTE** buffer, INT32* siz (TPM2B_PUBLIC_KEY_RSA*)&(source->sig), buffer, size)); return result; } -# endif // ALG_RSA -// Table 2:186 - Definition of Types for Signature -# if ALG_RSA -# if !USE_MARSHALING_DEFINES +// Table "Definition of Types for Signature" (Part 2: Structures) +# if !USE_MARSHALING_DEFINES TPM_RC TPMS_SIGNATURE_RSASSA_Unmarshal( TPMS_SIGNATURE_RSASSA* target, BYTE** buffer, INT32* size) @@ -5255,10 +5431,9 @@ TPMS_SIGNATURE_RSAPSS_Marshal( { return TPMS_SIGNATURE_RSA_Marshal((TPMS_SIGNATURE_RSA*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_RSA +# endif // !USE_MARSHALING_DEFINES -// Table 2:187 - Definition of TPMS_SIGNATURE_ECC Structure +// Table "Definition of TPMS_SIGNATURE_ECC Structure" (Part 2: Structures) # if ALG_ECC TPM_RC TPMS_SIGNATURE_ECC_Unmarshal(TPMS_SIGNATURE_ECC* target, BYTE** buffer, INT32* size) @@ -5291,28 +5466,27 @@ TPMS_SIGNATURE_ECC_Marshal(TPMS_SIGNATURE_ECC* source, BYTE** buffer, INT32* siz } # endif // ALG_ECC -// Table 2:188 - Definition of Types for TPMS_SIGNATURE_ECC -# if ALG_ECC -# if !USE_MARSHALING_DEFINES +// Table "Definition of Types for TPMS_SIGNATURE_ECC" (Part 2: Structures) +# if !USE_MARSHALING_DEFINES TPM_RC -TPMS_SIGNATURE_ECDAA_Unmarshal( - TPMS_SIGNATURE_ECDAA* target, BYTE** buffer, INT32* size) +TPMS_SIGNATURE_ECDSA_Unmarshal( + TPMS_SIGNATURE_ECDSA* target, BYTE** buffer, INT32* size) { return TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)target, buffer, size); } UINT16 -TPMS_SIGNATURE_ECDAA_Marshal(TPMS_SIGNATURE_ECDAA* source, BYTE** buffer, INT32* size) +TPMS_SIGNATURE_ECDSA_Marshal(TPMS_SIGNATURE_ECDSA* source, BYTE** buffer, INT32* size) { return TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)source, buffer, size); } TPM_RC -TPMS_SIGNATURE_ECDSA_Unmarshal( - TPMS_SIGNATURE_ECDSA* target, BYTE** buffer, INT32* size) +TPMS_SIGNATURE_ECDAA_Unmarshal( + TPMS_SIGNATURE_ECDAA* target, BYTE** buffer, INT32* size) { return TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)target, buffer, size); } UINT16 -TPMS_SIGNATURE_ECDSA_Marshal(TPMS_SIGNATURE_ECDSA* source, BYTE** buffer, INT32* size) +TPMS_SIGNATURE_ECDAA_Marshal(TPMS_SIGNATURE_ECDAA* source, BYTE** buffer, INT32* size) { return TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)source, buffer, size); } @@ -5338,21 +5512,42 @@ TPMS_SIGNATURE_ECSCHNORR_Marshal( { return TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)source, buffer, size); } -# endif // !USE_MARSHALING_DEFINES -# endif // ALG_ECC +TPM_RC +TPMS_SIGNATURE_EDDSA_Unmarshal( + TPMS_SIGNATURE_EDDSA* target, BYTE** buffer, INT32* size) +{ + return TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)target, buffer, size); +} +UINT16 +TPMS_SIGNATURE_EDDSA_Marshal(TPMS_SIGNATURE_EDDSA* source, BYTE** buffer, INT32* size) +{ + return TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)source, buffer, size); +} +TPM_RC +TPMS_SIGNATURE_EDDSA_PH_Unmarshal( + TPMS_SIGNATURE_EDDSA_PH* target, BYTE** buffer, INT32* size) +{ + return TPMS_SIGNATURE_ECC_Unmarshal((TPMS_SIGNATURE_ECC*)target, buffer, size); +} +UINT16 +TPMS_SIGNATURE_EDDSA_PH_Marshal( + TPMS_SIGNATURE_EDDSA_PH* source, BYTE** buffer, INT32* size) +{ + return TPMS_SIGNATURE_ECC_Marshal((TPMS_SIGNATURE_ECC*)source, buffer, size); +} +# endif // !USE_MARSHALING_DEFINES -// Table 2:189 - Definition of TPMU_SIGNATURE Union +// Table "Definition of TPMU_SIGNATURE Union" (Part 2: Structures) TPM_RC TPMU_SIGNATURE_Unmarshal( TPMU_SIGNATURE* target, BYTE** buffer, INT32* size, UINT32 selector) { switch(selector) { -# if ALG_ECDAA - case TPM_ALG_ECDAA: - return TPMS_SIGNATURE_ECDAA_Unmarshal( - (TPMS_SIGNATURE_ECDAA*)&(target->ecdaa), buffer, size); -# endif // ALG_ECDAA +# if ALG_HMAC + case TPM_ALG_HMAC: + return TPMT_HA_Unmarshal((TPMT_HA*)&(target->hmac), buffer, size, 0); +# endif // ALG_HMAC # if ALG_RSASSA case TPM_ALG_RSASSA: return TPMS_SIGNATURE_RSASSA_Unmarshal( @@ -5368,6 +5563,11 @@ TPMU_SIGNATURE_Unmarshal( return TPMS_SIGNATURE_ECDSA_Unmarshal( (TPMS_SIGNATURE_ECDSA*)&(target->ecdsa), buffer, size); # endif // ALG_ECDSA +# if ALG_ECDAA + case TPM_ALG_ECDAA: + return TPMS_SIGNATURE_ECDAA_Unmarshal( + (TPMS_SIGNATURE_ECDAA*)&(target->ecdaa), buffer, size); +# endif // ALG_ECDAA # if ALG_SM2 case TPM_ALG_SM2: return TPMS_SIGNATURE_SM2_Unmarshal( @@ -5378,10 +5578,26 @@ TPMU_SIGNATURE_Unmarshal( return TPMS_SIGNATURE_ECSCHNORR_Unmarshal( (TPMS_SIGNATURE_ECSCHNORR*)&(target->ecschnorr), buffer, size); # endif // ALG_ECSCHNORR -# if ALG_HMAC - case TPM_ALG_HMAC: - return TPMT_HA_Unmarshal((TPMT_HA*)&(target->hmac), buffer, size, 0); -# endif // ALG_HMAC +# if ALG_EDDSA + case TPM_ALG_EDDSA: + return TPMS_SIGNATURE_EDDSA_Unmarshal( + (TPMS_SIGNATURE_EDDSA*)&(target->eddsa), buffer, size); +# endif // ALG_EDDSA +# if ALG_EDDSA_PH + case TPM_ALG_EDDSA_PH: + return TPMS_SIGNATURE_EDDSA_PH_Unmarshal( + (TPMS_SIGNATURE_EDDSA_PH*)&(target->eddsa_ph), buffer, size); +# endif // ALG_EDDSA_PH +# if ALG_LMS + case TPM_ALG_LMS: + return TPMS_SIGNATURE_LMS_Unmarshal( + (TPMS_SIGNATURE_LMS*)&(target->lms), buffer, size); +# endif // ALG_LMS +# if ALG_XMSS + case TPM_ALG_XMSS: + return TPMS_SIGNATURE_XMSS_Unmarshal( + (TPMS_SIGNATURE_XMSS*)&(target->xmss), buffer, size); +# endif // ALG_XMSS case TPM_ALG_NULL: return TPM_RC_SUCCESS; } @@ -5393,11 +5609,10 @@ TPMU_SIGNATURE_Marshal( { switch(selector) { -# if ALG_ECDAA - case TPM_ALG_ECDAA: - return TPMS_SIGNATURE_ECDAA_Marshal( - (TPMS_SIGNATURE_ECDAA*)&(source->ecdaa), buffer, size); -# endif // ALG_ECDAA +# if ALG_HMAC + case TPM_ALG_HMAC: + return TPMT_HA_Marshal((TPMT_HA*)&(source->hmac), buffer, size); +# endif // ALG_HMAC # if ALG_RSASSA case TPM_ALG_RSASSA: return TPMS_SIGNATURE_RSASSA_Marshal( @@ -5413,6 +5628,11 @@ TPMU_SIGNATURE_Marshal( return TPMS_SIGNATURE_ECDSA_Marshal( (TPMS_SIGNATURE_ECDSA*)&(source->ecdsa), buffer, size); # endif // ALG_ECDSA +# if ALG_ECDAA + case TPM_ALG_ECDAA: + return TPMS_SIGNATURE_ECDAA_Marshal( + (TPMS_SIGNATURE_ECDAA*)&(source->ecdaa), buffer, size); +# endif // ALG_ECDAA # if ALG_SM2 case TPM_ALG_SM2: return TPMS_SIGNATURE_SM2_Marshal( @@ -5423,17 +5643,31 @@ TPMU_SIGNATURE_Marshal( return TPMS_SIGNATURE_ECSCHNORR_Marshal( (TPMS_SIGNATURE_ECSCHNORR*)&(source->ecschnorr), buffer, size); # endif // ALG_ECSCHNORR -# if ALG_HMAC - case TPM_ALG_HMAC: - return TPMT_HA_Marshal((TPMT_HA*)&(source->hmac), buffer, size); -# endif // ALG_HMAC - case TPM_ALG_NULL: - return 0; +# if ALG_EDDSA + case TPM_ALG_EDDSA: + return TPMS_SIGNATURE_EDDSA_Marshal( + (TPMS_SIGNATURE_EDDSA*)&(source->eddsa), buffer, size); +# endif // ALG_EDDSA +# if ALG_EDDSA_PH + case TPM_ALG_EDDSA_PH: + return TPMS_SIGNATURE_EDDSA_PH_Marshal( + (TPMS_SIGNATURE_EDDSA_PH*)&(source->eddsa_ph), buffer, size); +# endif // ALG_EDDSA_PH +# if ALG_LMS + case TPM_ALG_LMS: + return TPMS_SIGNATURE_LMS_Marshal( + (TPMS_SIGNATURE_LMS*)&(source->lms), buffer, size); +# endif // ALG_LMS +# if ALG_XMSS + case TPM_ALG_XMSS: + return TPMS_SIGNATURE_XMSS_Marshal( + (TPMS_SIGNATURE_XMSS*)&(source->xmss), buffer, size); +# endif // ALG_XMSS } return 0; } -// Table 2:190 - Definition of TPMT_SIGNATURE Structure +// Table "Definition of TPMT_SIGNATURE Structure" (Part 2: Structures) TPM_RC TPMT_SIGNATURE_Unmarshal( TPMT_SIGNATURE* target, BYTE** buffer, INT32* size, BOOL flag) @@ -5463,7 +5697,7 @@ TPMT_SIGNATURE_Marshal(TPMT_SIGNATURE* source, BYTE** buffer, INT32* size) return result; } -// Table 2:191 - Definition of TPMU_ENCRYPTED_SECRET Union +// Table "Definition of TPMU_ENCRYPTED_SECRET Union" (Part 2: Structures) TPM_RC TPMU_ENCRYPTED_SECRET_Unmarshal( TPMU_ENCRYPTED_SECRET* target, BYTE** buffer, INT32* size, UINT32 selector) @@ -5473,23 +5707,23 @@ TPMU_ENCRYPTED_SECRET_Unmarshal( # if ALG_ECC case TPM_ALG_ECC: return BYTE_Array_Unmarshal( - (BYTE*)(target->ecc), buffer, size, (INT32)sizeof(TPMS_ECC_POINT)); + (BYTE*)&(target->ecc), buffer, size, (INT32)sizeof(TPMS_ECC_POINT)); # endif // ALG_ECC # if ALG_RSA case TPM_ALG_RSA: return BYTE_Array_Unmarshal( - (BYTE*)(target->rsa), buffer, size, (INT32)MAX_RSA_KEY_BYTES); + (BYTE*)&(target->rsa), buffer, size, (INT32)MAX_RSA_KEY_BYTES); # endif // ALG_RSA # if ALG_SYMCIPHER case TPM_ALG_SYMCIPHER: - return BYTE_Array_Unmarshal((BYTE*)(target->symmetric), + return BYTE_Array_Unmarshal((BYTE*)&(target->symmetric), buffer, size, (INT32)sizeof(TPM2B_DIGEST)); # endif // ALG_SYMCIPHER # if ALG_KEYEDHASH case TPM_ALG_KEYEDHASH: - return BYTE_Array_Unmarshal((BYTE*)(target->keyedHash), + return BYTE_Array_Unmarshal((BYTE*)&(target->keyedHash), buffer, size, (INT32)sizeof(TPM2B_DIGEST)); @@ -5506,23 +5740,23 @@ TPMU_ENCRYPTED_SECRET_Marshal( # if ALG_ECC case TPM_ALG_ECC: return BYTE_Array_Marshal( - (BYTE*)(source->ecc), buffer, size, (INT32)sizeof(TPMS_ECC_POINT)); + (BYTE*)&(source->ecc), buffer, size, (INT32)sizeof(TPMS_ECC_POINT)); # endif // ALG_ECC # if ALG_RSA case TPM_ALG_RSA: return BYTE_Array_Marshal( - (BYTE*)(source->rsa), buffer, size, (INT32)MAX_RSA_KEY_BYTES); + (BYTE*)&(source->rsa), buffer, size, (INT32)MAX_RSA_KEY_BYTES); # endif // ALG_RSA # if ALG_SYMCIPHER case TPM_ALG_SYMCIPHER: - return BYTE_Array_Marshal((BYTE*)(source->symmetric), + return BYTE_Array_Marshal((BYTE*)&(source->symmetric), buffer, size, (INT32)sizeof(TPM2B_DIGEST)); # endif // ALG_SYMCIPHER # if ALG_KEYEDHASH case TPM_ALG_KEYEDHASH: - return BYTE_Array_Marshal((BYTE*)(source->keyedHash), + return BYTE_Array_Marshal((BYTE*)&(source->keyedHash), buffer, size, (INT32)sizeof(TPM2B_DIGEST)); @@ -5531,21 +5765,18 @@ TPMU_ENCRYPTED_SECRET_Marshal( return 0; } -// Table 2:192 - Definition of TPM2B_ENCRYPTED_SECRET Structure +// Table "Definition of TPM2B_ENCRYPTED_SECRET Structure" (Part 2: Structures) TPM_RC TPM2B_ENCRYPTED_SECRET_Unmarshal( TPM2B_ENCRYPTED_SECRET* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(TPMU_ENCRYPTED_SECRET))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(TPMU_ENCRYPTED_SECRET)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.secret), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.secret), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -5555,18 +5786,18 @@ TPM2B_ENCRYPTED_SECRET_Marshal( UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.secret), + + BYTE_Array_Marshal((BYTE*)&(source->t.secret), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:193 - Definition of TPMI_ALG_PUBLIC Type +// Table "Definition of TPMI_ALG_PUBLIC Type" (Part 2: Structures) TPM_RC TPMI_ALG_PUBLIC_Unmarshal(TPMI_ALG_PUBLIC* target, BYTE** buffer, INT32* size) { @@ -5579,12 +5810,12 @@ TPMI_ALG_PUBLIC_Unmarshal(TPMI_ALG_PUBLIC* target, BYTE** buffer, INT32* size) # if ALG_RSA case TPM_ALG_RSA: # endif // ALG_RSA -# if ALG_ECC - case TPM_ALG_ECC: -# endif // ALG_ECC # if ALG_KEYEDHASH case TPM_ALG_KEYEDHASH: # endif // ALG_KEYEDHASH +# if ALG_ECC + case TPM_ALG_ECC: +# endif // ALG_ECC # if ALG_SYMCIPHER case TPM_ALG_SYMCIPHER: # endif // ALG_SYMCIPHER @@ -5604,7 +5835,7 @@ TPMI_ALG_PUBLIC_Marshal(TPMI_ALG_PUBLIC* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:194 - Definition of TPMU_PUBLIC_ID Union +// Table "Definition of TPMU_PUBLIC_ID Union" (Part 2: Structures) TPM_RC TPMU_PUBLIC_ID_Unmarshal( TPMU_PUBLIC_ID* target, BYTE** buffer, INT32* size, UINT32 selector) @@ -5663,24 +5894,27 @@ TPMU_PUBLIC_ID_Marshal( return 0; } -// Table 2:195 - Definition of TPMS_KEYEDHASH_PARMS Structure +// Table "Definition of TPMS_KEYEDHASH_PARMS Structure" (Part 2: Structures) TPM_RC TPMS_KEYEDHASH_PARMS_Unmarshal( TPMS_KEYEDHASH_PARMS* target, BYTE** buffer, INT32* size) { - return TPMT_KEYEDHASH_SCHEME_Unmarshal( + TPM_RC result; + result = TPMT_KEYEDHASH_SCHEME_Unmarshal( (TPMT_KEYEDHASH_SCHEME*)&(target->scheme), buffer, size, 1); + return result; } UINT16 TPMS_KEYEDHASH_PARMS_Marshal(TPMS_KEYEDHASH_PARMS* source, BYTE** buffer, INT32* size) { - return TPMT_KEYEDHASH_SCHEME_Marshal( - (TPMT_KEYEDHASH_SCHEME*)&(source->scheme), buffer, size); + UINT16 result = 0; + result = (UINT16)(result + + TPMT_KEYEDHASH_SCHEME_Marshal( + (TPMT_KEYEDHASH_SCHEME*)&(source->scheme), buffer, size)); + return result; } -// Table 2:196 - Definition of TPMS_ASYM_PARMS Structure -// Table 2:197 - Definition of TPMS_RSA_PARMS Structure -# if ALG_RSA +// Table "Definition of TPMS_RSA_PARMS Structure" (Part 2: Structures) TPM_RC TPMS_RSA_PARMS_Unmarshal(TPMS_RSA_PARMS* target, BYTE** buffer, INT32* size) { @@ -5714,10 +5948,8 @@ TPMS_RSA_PARMS_Marshal(TPMS_RSA_PARMS* source, BYTE** buffer, INT32* size) (UINT16)(result + UINT32_Marshal((UINT32*)&(source->exponent), buffer, size)); return result; } -# endif // ALG_RSA -// Table 2:198 - Definition of TPMS_ECC_PARMS Structure -# if ALG_ECC +// Table "Definition of TPMS_ECC_PARMS Structure" (Part 2: Structures) TPM_RC TPMS_ECC_PARMS_Unmarshal(TPMS_ECC_PARMS* target, BYTE** buffer, INT32* size) { @@ -5729,7 +5961,7 @@ TPMS_ECC_PARMS_Unmarshal(TPMS_ECC_PARMS* target, BYTE** buffer, INT32* size) (TPMT_ECC_SCHEME*)&(target->scheme), buffer, size, 1); if(result == TPM_RC_SUCCESS) result = TPMI_ECC_CURVE_Unmarshal( - (TPMI_ECC_CURVE*)&(target->curveID), buffer, size); + (TPMI_ECC_CURVE*)&(target->curveID), buffer, size, 0); if(result == TPM_RC_SUCCESS) result = TPMT_KDF_SCHEME_Unmarshal( (TPMT_KDF_SCHEME*)&(target->kdf), buffer, size, 1); @@ -5753,9 +5985,8 @@ TPMS_ECC_PARMS_Marshal(TPMS_ECC_PARMS* source, BYTE** buffer, INT32* size) (TPMT_KDF_SCHEME*)&(source->kdf), buffer, size)); return result; } -# endif // ALG_ECC -// Table 2:199 - Definition of TPMU_PUBLIC_PARMS Union +// Table "Definition of TPMU_PUBLIC_PARMS Union" (Part 2: Structures) TPM_RC TPMU_PUBLIC_PARMS_Unmarshal( TPMU_PUBLIC_PARMS* target, BYTE** buffer, INT32* size, UINT32 selector) @@ -5815,7 +6046,7 @@ TPMU_PUBLIC_PARMS_Marshal( return 0; } -// Table 2:200 - Definition of TPMT_PUBLIC_PARMS Structure +// Table "Definition of TPMT_PUBLIC_PARMS Structure" (Part 2: Structures) TPM_RC TPMT_PUBLIC_PARMS_Unmarshal(TPMT_PUBLIC_PARMS* target, BYTE** buffer, INT32* size) { @@ -5846,7 +6077,7 @@ TPMT_PUBLIC_PARMS_Marshal(TPMT_PUBLIC_PARMS* source, BYTE** buffer, INT32* size) return result; } -// Table 2:201 - Definition of TPMT_PUBLIC Structure +// Table "Definition of TPMT_PUBLIC Structure" (Part 2: Structures) TPM_RC TPMT_PUBLIC_Unmarshal(TPMT_PUBLIC* target, BYTE** buffer, INT32* size, BOOL flag) { @@ -5903,12 +6134,12 @@ TPMT_PUBLIC_Marshal(TPMT_PUBLIC* source, BYTE** buffer, INT32* size) return result; } -// Table 2:202 - Definition of TPM2B_PUBLIC Structure +// Table "Definition of TPM2B_PUBLIC Structure" (Part 2: Structures) TPM_RC TPM2B_PUBLIC_Unmarshal(TPM2B_PUBLIC* target, BYTE** buffer, INT32* size, BOOL flag) { TPM_RC result; - result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); // =a + result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); if(result == TPM_RC_SUCCESS) { // if size is zero, then the required structure is missing @@ -5918,12 +6149,9 @@ TPM2B_PUBLIC_Unmarshal(TPM2B_PUBLIC* target, BYTE** buffer, INT32* size, BOOL fl { INT32 startSize = *size; result = TPMT_PUBLIC_Unmarshal( - (TPMT_PUBLIC*)&(target->publicArea), buffer, size, flag); // =b - if(result == TPM_RC_SUCCESS) - { - if(target->size != (startSize - *size)) - result = TPM_RC_SIZE; - } + (TPMT_PUBLIC*)&(target->publicArea), buffer, size, flag); + if((result == TPM_RC_SUCCESS) && (target->size != (startSize - *size))) + result = TPM_RC_SIZE; } } return result; @@ -5945,20 +6173,17 @@ TPM2B_PUBLIC_Marshal(TPM2B_PUBLIC* source, BYTE** buffer, INT32* size) return result; } -// Table 2:203 - Definition of TPM2B_TEMPLATE Structure +// Table "Definition of TPM2B_TEMPLATE Structure" (Part 2: Structures) TPM_RC TPM2B_TEMPLATE_Unmarshal(TPM2B_TEMPLATE* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(TPMT_PUBLIC))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(TPMT_PUBLIC)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -5967,32 +6192,29 @@ TPM2B_TEMPLATE_Marshal(TPM2B_TEMPLATE* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:204 - Definition of TPM2B_PRIVATE_VENDOR_SPECIFIC Structure +// Table "Definition of TPM2B_PRIVATE_VENDOR_SPECIFIC Structure" (Part 2: Structures) TPM_RC TPM2B_PRIVATE_VENDOR_SPECIFIC_Unmarshal( TPM2B_PRIVATE_VENDOR_SPECIFIC* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > PRIVATE_VENDOR_SPECIFIC_BYTES)) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > PRIVATE_VENDOR_SPECIFIC_BYTES) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -6002,18 +6224,18 @@ TPM2B_PRIVATE_VENDOR_SPECIFIC_Marshal( UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:205 - Definition of TPMU_SENSITIVE_COMPOSITE Union +// Table "Definition of TPMU_SENSITIVE_COMPOSITE Union" (Part 2: Structures) TPM_RC TPMU_SENSITIVE_COMPOSITE_Unmarshal( TPMU_SENSITIVE_COMPOSITE* target, BYTE** buffer, INT32* size, UINT32 selector) @@ -6073,7 +6295,7 @@ TPMU_SENSITIVE_COMPOSITE_Marshal( return 0; } -// Table 2:206 - Definition of TPMT_SENSITIVE Structure +// Table "Definition of TPMT_SENSITIVE Structure" (Part 2: Structures) TPM_RC TPMT_SENSITIVE_Unmarshal(TPMT_SENSITIVE* target, BYTE** buffer, INT32* size) { @@ -6116,24 +6338,21 @@ TPMT_SENSITIVE_Marshal(TPMT_SENSITIVE* source, BYTE** buffer, INT32* size) return result; } -// Table 2:207 - Definition of TPM2B_SENSITIVE Structure +// Table "Definition of TPM2B_SENSITIVE Structure" (Part 2: Structures) TPM_RC TPM2B_SENSITIVE_Unmarshal(TPM2B_SENSITIVE* target, BYTE** buffer, INT32* size) { TPM_RC result; - result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); // =a + result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); // if there was an error or if target->size equal to 0, // skip unmarshaling of the structure if((result == TPM_RC_SUCCESS) && (target->size != 0)) { INT32 startSize = *size; result = TPMT_SENSITIVE_Unmarshal( - (TPMT_SENSITIVE*)&(target->sensitiveArea), buffer, size); // =b - if(result == TPM_RC_SUCCESS) - { - if(target->size != (startSize - *size)) - result = TPM_RC_SIZE; - } + (TPMT_SENSITIVE*)&(target->sensitiveArea), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->size != (startSize - *size))) + result = TPM_RC_SIZE; } return result; } @@ -6154,21 +6373,17 @@ TPM2B_SENSITIVE_Marshal(TPM2B_SENSITIVE* source, BYTE** buffer, INT32* size) return result; } -// Table 2:208 - Definition of _PRIVATE Structure -// Table 2:209 - Definition of TPM2B_PRIVATE Structure +// Table "Definition of TPM2B_PRIVATE Structure" (Part 2: Structures) TPM_RC TPM2B_PRIVATE_Unmarshal(TPM2B_PRIVATE* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(_PRIVATE))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(_PRIVATE)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -6177,32 +6392,28 @@ TPM2B_PRIVATE_Marshal(TPM2B_PRIVATE* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:210 - Definition of TPMS_ID_OBJECT Structure -// Table 2:211 - Definition of TPM2B_ID_OBJECT Structure +// Table "Definition of TPM2B_ID_OBJECT Structure" (Part 2: Structures) TPM_RC TPM2B_ID_OBJECT_Unmarshal(TPM2B_ID_OBJECT* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(TPMS_ID_OBJECT))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(TPMS_ID_OBJECT)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.credential), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.credential), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -6211,28 +6422,18 @@ TPM2B_ID_OBJECT_Marshal(TPM2B_ID_OBJECT* source, BYTE** buffer, INT32* size) UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.credential), + + BYTE_Array_Marshal((BYTE*)&(source->t.credential), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:212 - Definition of TPM_NV_INDEX Bits -# if !USE_MARSHALING_DEFINES -UINT16 -TPM_NV_INDEX_Marshal(TPM_NV_INDEX* source, BYTE** buffer, INT32* size) -{ - return UINT32_Marshal((UINT32*)source, buffer, size); -} -# endif // !USE_MARSHALING_DEFINES - -// Table 2:213 - Definition of TPM_NT Constants -// Table 2:214 - Definition of TPMS_NV_PIN_COUNTER_PARAMETERS Structure +// Table "Definition of TPMS_NV_PIN_COUNTER_PARAMETERS Structure" (Part 2: Structures) TPM_RC TPMS_NV_PIN_COUNTER_PARAMETERS_Unmarshal( TPMS_NV_PIN_COUNTER_PARAMETERS* target, BYTE** buffer, INT32* size) @@ -6255,7 +6456,7 @@ TPMS_NV_PIN_COUNTER_PARAMETERS_Marshal( return result; } -// Table 2:215 - Definition of TPMA_NV Bits +// Table "Definition of TPMA_NV Bits" (Part 2: Structures) TPM_RC TPMA_NV_Unmarshal(TPMA_NV* target, BYTE** buffer, INT32* size) { @@ -6263,12 +6464,12 @@ TPMA_NV_Unmarshal(TPMA_NV* target, BYTE** buffer, INT32* size) result = UINT32_Unmarshal((UINT32*)target, buffer, size); if(result == TPM_RC_SUCCESS) { + // check that no reserved bits are set if(*((UINT32*)target) & (UINT32)0x01f00300) result = TPM_RC_RESERVED_BITS; } return result; } - # if !USE_MARSHALING_DEFINES UINT16 TPMA_NV_Marshal(TPMA_NV* source, BYTE** buffer, INT32* size) @@ -6277,13 +6478,35 @@ TPMA_NV_Marshal(TPMA_NV* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:216 - Definition of TPMS_NV_PUBLIC Structure +// Table "Definition of TPMA_NV_EXP Bits" (Part 2: Structures) +TPM_RC +TPMA_NV_EXP_Unmarshal(TPMA_NV_EXP* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = UINT64_Unmarshal((UINT64*)target, buffer, size); + if(result == TPM_RC_SUCCESS) + { + // check that no reserved bits are set + if(*((UINT64*)target) & (UINT64)0xfffffff801f00300) + result = TPM_RC_RESERVED_BITS; + } + return result; +} +# if !USE_MARSHALING_DEFINES +UINT16 +TPMA_NV_EXP_Marshal(TPMA_NV_EXP* source, BYTE** buffer, INT32* size) +{ + return UINT64_Marshal((UINT64*)source, buffer, size); +} +# endif // !USE_MARSHALING_DEFINES + +// Table "Definition of TPMS_NV_PUBLIC Structure" (Part 2: Structures) TPM_RC TPMS_NV_PUBLIC_Unmarshal(TPMS_NV_PUBLIC* target, BYTE** buffer, INT32* size) { TPM_RC result; - result = TPMI_RH_NV_INDEX_Unmarshal( - (TPMI_RH_NV_INDEX*)&(target->nvIndex), buffer, size); + result = TPMI_RH_NV_LEGACY_INDEX_Unmarshal( + (TPMI_RH_NV_LEGACY_INDEX*)&(target->nvIndex), buffer, size); if(result == TPM_RC_SUCCESS) result = TPMI_ALG_HASH_Unmarshal( (TPMI_ALG_HASH*)&(target->nameAlg), buffer, size, 0); @@ -6302,10 +6525,11 @@ UINT16 TPMS_NV_PUBLIC_Marshal(TPMS_NV_PUBLIC* source, BYTE** buffer, INT32* size) { UINT16 result = 0; - result = (UINT16)(result - + TPMI_RH_NV_INDEX_Marshal( - (TPMI_RH_NV_INDEX*)&(source->nvIndex), buffer, size)); - result = (UINT16)(result + result = + (UINT16)(result + + TPMI_RH_NV_LEGACY_INDEX_Marshal( + (TPMI_RH_NV_LEGACY_INDEX*)&(source->nvIndex), buffer, size)); + result = (UINT16)(result + TPMI_ALG_HASH_Marshal( (TPMI_ALG_HASH*)&(source->nameAlg), buffer, size)); result = @@ -6319,12 +6543,12 @@ TPMS_NV_PUBLIC_Marshal(TPMS_NV_PUBLIC* source, BYTE** buffer, INT32* size) return result; } -// Table 2:217 - Definition of TPM2B_NV_PUBLIC Structure +// Table "Definition of TPM2B_NV_PUBLIC Structure" (Part 2: Structures) TPM_RC TPM2B_NV_PUBLIC_Unmarshal(TPM2B_NV_PUBLIC* target, BYTE** buffer, INT32* size) { TPM_RC result; - result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); // =a + result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); if(result == TPM_RC_SUCCESS) { // if size is zero, then the required structure is missing @@ -6334,12 +6558,9 @@ TPM2B_NV_PUBLIC_Unmarshal(TPM2B_NV_PUBLIC* target, BYTE** buffer, INT32* size) { INT32 startSize = *size; result = TPMS_NV_PUBLIC_Unmarshal( - (TPMS_NV_PUBLIC*)&(target->nvPublic), buffer, size); // =b - if(result == TPM_RC_SUCCESS) - { - if(target->size != (startSize - *size)) - result = TPM_RC_SIZE; - } + (TPMS_NV_PUBLIC*)&(target->nvPublic), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->size != (startSize - *size))) + result = TPM_RC_SIZE; } } return result; @@ -6361,42 +6582,189 @@ TPM2B_NV_PUBLIC_Marshal(TPM2B_NV_PUBLIC* source, BYTE** buffer, INT32* size) return result; } -// Table 2:218 - Definition of TPM2B_CONTEXT_SENSITIVE Structure +// Table "Definition of TPMS_NV_PUBLIC_EXP_ATTR Structure" (Part 2: Structures) TPM_RC -TPM2B_CONTEXT_SENSITIVE_Unmarshal( - TPM2B_CONTEXT_SENSITIVE* target, BYTE** buffer, INT32* size) +TPMS_NV_PUBLIC_EXP_ATTR_Unmarshal( + TPMS_NV_PUBLIC_EXP_ATTR* target, BYTE** buffer, INT32* size) { TPM_RC result; - result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + result = TPMI_RH_NV_EXP_INDEX_Unmarshal( + (TPMI_RH_NV_EXP_INDEX*)&(target->nvIndex), buffer, size); + if(result == TPM_RC_SUCCESS) + result = TPMI_ALG_HASH_Unmarshal( + (TPMI_ALG_HASH*)&(target->nameAlg), buffer, size, 0); + if(result == TPM_RC_SUCCESS) + result = + TPMA_NV_EXP_Unmarshal((TPMA_NV_EXP*)&(target->attributes), buffer, size); + if(result == TPM_RC_SUCCESS) + result = TPM2B_DIGEST_Unmarshal( + (TPM2B_DIGEST*)&(target->authPolicy), buffer, size); if(result == TPM_RC_SUCCESS) + result = UINT16_Unmarshal((UINT16*)&(target->dataSize), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->dataSize > MAX_NV_INDEX_SIZE)) + result = TPM_RC_SIZE; + return result; +} +UINT16 +TPMS_NV_PUBLIC_EXP_ATTR_Marshal( + TPMS_NV_PUBLIC_EXP_ATTR* source, BYTE** buffer, INT32* size) +{ + UINT16 result = 0; + result = (UINT16)(result + + TPMI_RH_NV_EXP_INDEX_Marshal( + (TPMI_RH_NV_EXP_INDEX*)&(source->nvIndex), buffer, size)); + result = (UINT16)(result + + TPMI_ALG_HASH_Marshal( + (TPMI_ALG_HASH*)&(source->nameAlg), buffer, size)); + result = (UINT16)(result + + TPMA_NV_EXP_Marshal( + (TPMA_NV_EXP*)&(source->attributes), buffer, size)); + result = (UINT16)(result + + TPM2B_DIGEST_Marshal( + (TPM2B_DIGEST*)&(source->authPolicy), buffer, size)); + result = + (UINT16)(result + UINT16_Marshal((UINT16*)&(source->dataSize), buffer, size)); + return result; +} + +// Table "Definition of TPMU_NV_PUBLIC_2 Union" (Part 2: Structures) +TPM_RC +TPMU_NV_PUBLIC_2_Unmarshal( + TPMU_NV_PUBLIC_2* target, BYTE** buffer, INT32* size, UINT32 selector) +{ + switch(selector) + { + case TPM_HT_NV_INDEX: + return TPMS_NV_PUBLIC_Unmarshal( + (TPMS_NV_PUBLIC*)&(target->nvIndex), buffer, size); + case TPM_HT_EXTERNAL_NV: + return TPMS_NV_PUBLIC_EXP_ATTR_Unmarshal( + (TPMS_NV_PUBLIC_EXP_ATTR*)&(target->externalNV), buffer, size); + case TPM_HT_PERMANENT_NV: + return TPMS_NV_PUBLIC_Unmarshal( + (TPMS_NV_PUBLIC*)&(target->permanentNV), buffer, size); + } + return TPM_RC_SELECTOR; +} +UINT16 +TPMU_NV_PUBLIC_2_Marshal( + TPMU_NV_PUBLIC_2* source, BYTE** buffer, INT32* size, UINT32 selector) +{ + switch(selector) { - if((target->t.size) > MAX_CONTEXT_SIZE) + case TPM_HT_NV_INDEX: + return TPMS_NV_PUBLIC_Marshal( + (TPMS_NV_PUBLIC*)&(source->nvIndex), buffer, size); + case TPM_HT_EXTERNAL_NV: + return TPMS_NV_PUBLIC_EXP_ATTR_Marshal( + (TPMS_NV_PUBLIC_EXP_ATTR*)&(source->externalNV), buffer, size); + case TPM_HT_PERMANENT_NV: + return TPMS_NV_PUBLIC_Marshal( + (TPMS_NV_PUBLIC*)&(source->permanentNV), buffer, size); + } + return 0; +} + +// Table "Definition of TPMT_NV_PUBLIC_2 Structure" (Part 2: Structures) +TPM_RC +TPMT_NV_PUBLIC_2_Unmarshal(TPMT_NV_PUBLIC_2* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = TPM_HT_Unmarshal((TPM_HT*)&(target->handleType), buffer, size); + if(result == TPM_RC_SUCCESS) + result = TPMU_NV_PUBLIC_2_Unmarshal((TPMU_NV_PUBLIC_2*)&(target->nvPublic2), + buffer, + size, + (UINT32)target->handleType); + return result; +} +UINT16 +TPMT_NV_PUBLIC_2_Marshal(TPMT_NV_PUBLIC_2* source, BYTE** buffer, INT32* size) +{ + UINT16 result = 0; + result = (UINT16)(result + + TPM_HT_Marshal((TPM_HT*)&(source->handleType), buffer, size)); + result = + (UINT16)(result + + TPMU_NV_PUBLIC_2_Marshal((TPMU_NV_PUBLIC_2*)&(source->nvPublic2), + buffer, + size, + (UINT32)source->handleType)); + return result; +} + +// Table "Definition of TPM2B_NV_PUBLIC_2 Structure" (Part 2: Structures) +TPM_RC +TPM2B_NV_PUBLIC_2_Unmarshal(TPM2B_NV_PUBLIC_2* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = UINT16_Unmarshal((UINT16*)&(target->size), buffer, size); + if(result == TPM_RC_SUCCESS) + { + // if size is zero, then the required structure is missing + if(target->size == 0) result = TPM_RC_SIZE; else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); + { + INT32 startSize = *size; + result = TPMT_NV_PUBLIC_2_Unmarshal( + (TPMT_NV_PUBLIC_2*)&(target->nvPublic2), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->size != (startSize - *size))) + result = TPM_RC_SIZE; + } } return result; } UINT16 +TPM2B_NV_PUBLIC_2_Marshal(TPM2B_NV_PUBLIC_2* source, BYTE** buffer, INT32* size) +{ + UINT16 result = 0; + // Marshal a dummy value of the 2B size. This makes sure that 'buffer' + // and 'size' are advanced as necessary (i.e., if they are present) + result = UINT16_Marshal(&result, buffer, size); + // Marshal the structure + result = (UINT16)(result + + TPMT_NV_PUBLIC_2_Marshal( + (TPMT_NV_PUBLIC_2*)&(source->nvPublic2), buffer, size)); + // if a buffer was provided, go back and fill in the actual size + if(buffer != NULL) + UINT16_TO_BYTE_ARRAY((result - 2), (*buffer - result)); + return result; +} + +// Table "Definition of TPM2B_CONTEXT_SENSITIVE Structure" (Part 2: Structures) +TPM_RC +TPM2B_CONTEXT_SENSITIVE_Unmarshal( + TPM2B_CONTEXT_SENSITIVE* target, BYTE** buffer, INT32* size) +{ + TPM_RC result; + result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > MAX_CONTEXT_SIZE)) + result = TPM_RC_SIZE; + if(result == TPM_RC_SUCCESS) + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); + return result; +} +UINT16 TPM2B_CONTEXT_SENSITIVE_Marshal( TPM2B_CONTEXT_SENSITIVE* source, BYTE** buffer, INT32* size) { UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:219 - Definition of TPMS_CONTEXT_DATA Structure +// Table "Definition of TPMS_CONTEXT_DATA Structure" (Part 2: Structures) TPM_RC TPMS_CONTEXT_DATA_Unmarshal(TPMS_CONTEXT_DATA* target, BYTE** buffer, INT32* size) { @@ -6422,20 +6790,17 @@ TPMS_CONTEXT_DATA_Marshal(TPMS_CONTEXT_DATA* source, BYTE** buffer, INT32* size) return result; } -// Table 2:220 - Definition of TPM2B_CONTEXT_DATA Structure +// Table "Definition of TPM2B_CONTEXT_DATA Structure" (Part 2: Structures) TPM_RC TPM2B_CONTEXT_DATA_Unmarshal(TPM2B_CONTEXT_DATA* target, BYTE** buffer, INT32* size) { TPM_RC result; result = UINT16_Unmarshal((UINT16*)&(target->t.size), buffer, size); + if((result == TPM_RC_SUCCESS) && (target->t.size > sizeof(TPMS_CONTEXT_DATA))) + result = TPM_RC_SIZE; if(result == TPM_RC_SUCCESS) - { - if((target->t.size) > sizeof(TPMS_CONTEXT_DATA)) - result = TPM_RC_SIZE; - else - result = BYTE_Array_Unmarshal( - (BYTE*)(target->t.buffer), buffer, size, (INT32)(target->t.size)); - } + result = BYTE_Array_Unmarshal( + (BYTE*)&(target->t.buffer), buffer, size, (INT32)target->t.size); return result; } UINT16 @@ -6444,18 +6809,18 @@ TPM2B_CONTEXT_DATA_Marshal(TPM2B_CONTEXT_DATA* source, BYTE** buffer, INT32* siz UINT16 result = 0; result = (UINT16)(result + UINT16_Marshal((UINT16*)&(source->t.size), buffer, size)); - // if size equal to 0, the rest of the structure is a zero buffer. Stop processing + // if size equal to 0, the rest of the structure is a zero buffer if(source->t.size == 0) return result; result = (UINT16)(result - + BYTE_Array_Marshal((BYTE*)(source->t.buffer), + + BYTE_Array_Marshal((BYTE*)&(source->t.buffer), buffer, size, - (INT32)(source->t.size))); + (INT32)source->t.size)); return result; } -// Table 2:221 - Definition of TPMS_CONTEXT Structure +// Table "Definition of TPMS_CONTEXT Structure" (Part 2: Structures) TPM_RC TPMS_CONTEXT_Unmarshal(TPMS_CONTEXT* target, BYTE** buffer, INT32* size) { @@ -6466,7 +6831,7 @@ TPMS_CONTEXT_Unmarshal(TPMS_CONTEXT* target, BYTE** buffer, INT32* size) (TPMI_DH_SAVED*)&(target->savedHandle), buffer, size); if(result == TPM_RC_SUCCESS) result = TPMI_RH_HIERARCHY_Unmarshal( - (TPMI_RH_HIERARCHY*)&(target->hierarchy), buffer, size, 1); + (TPMI_RH_HIERARCHY*)&(target->hierarchy), buffer, size); if(result == TPM_RC_SUCCESS) result = TPM2B_CONTEXT_DATA_Unmarshal( (TPM2B_CONTEXT_DATA*)&(target->contextBlob), buffer, size); @@ -6490,7 +6855,7 @@ TPMS_CONTEXT_Marshal(TPMS_CONTEXT* source, BYTE** buffer, INT32* size) return result; } -// Table 2:223 - Definition of TPMS_CREATION_DATA Structure +// Table "Definition of TPMS_CREATION_DATA Structure" (Part 2: Structures) UINT16 TPMS_CREATION_DATA_Marshal(TPMS_CREATION_DATA* source, BYTE** buffer, INT32* size) { @@ -6519,7 +6884,7 @@ TPMS_CREATION_DATA_Marshal(TPMS_CREATION_DATA* source, BYTE** buffer, INT32* siz return result; } -// Table 2:224 - Definition of TPM2B_CREATION_DATA Structure +// Table "Definition of TPM2B_CREATION_DATA Structure" (Part 2: Structures) UINT16 TPM2B_CREATION_DATA_Marshal(TPM2B_CREATION_DATA* source, BYTE** buffer, INT32* size) { @@ -6538,7 +6903,7 @@ TPM2B_CREATION_DATA_Marshal(TPM2B_CREATION_DATA* source, BYTE** buffer, INT32* s return result; } -// Table 2:225 - Definition of TPM_AT Constants +// Table "Definition of TPM_AT Constants" (Part 2: Structures) TPM_RC TPM_AT_Unmarshal(TPM_AT* target, BYTE** buffer, INT32* size) { @@ -6568,7 +6933,7 @@ TPM_AT_Marshal(TPM_AT* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:226 - Definition of TPM_AE Constants +// Table "Definition of TPM_AE Constants" (Part 2: Structures) # if !USE_MARSHALING_DEFINES UINT16 TPM_AE_Marshal(TPM_AE* source, BYTE** buffer, INT32* size) @@ -6577,7 +6942,7 @@ TPM_AE_Marshal(TPM_AE* source, BYTE** buffer, INT32* size) } # endif // !USE_MARSHALING_DEFINES -// Table 2:227 - Definition of TPMS_AC_OUTPUT Structure +// Table "Definition of TPMS_AC_OUTPUT Structure" (Part 2: Structures) UINT16 TPMS_AC_OUTPUT_Marshal(TPMS_AC_OUTPUT* source, BYTE** buffer, INT32* size) { @@ -6588,7 +6953,7 @@ TPMS_AC_OUTPUT_Marshal(TPMS_AC_OUTPUT* source, BYTE** buffer, INT32* size) return result; } -// Table 2:228 - Definition of TPML_AC_CAPABILITIES Structure +// Table "Definition of TPML_AC_CAPABILITIES Structure" (Part 2: Structures) UINT16 TPML_AC_CAPABILITIES_Marshal(TPML_AC_CAPABILITIES* source, BYTE** buffer, INT32* size) { @@ -6597,14 +6962,17 @@ TPML_AC_CAPABILITIES_Marshal(TPML_AC_CAPABILITIES* source, BYTE** buffer, INT32* (UINT16)(result + UINT32_Marshal((UINT32*)&(source->count), buffer, size)); result = (UINT16)(result + TPMS_AC_OUTPUT_Array_Marshal( - (TPMS_AC_OUTPUT*)(source->acCapabilities), + (TPMS_AC_OUTPUT*)&(source->acCapabilities), buffer, size, - (INT32)(source->count))); + (INT32)source->count)); return result; } -// Array Marshal/Unmarshal for BYTE +// For structures that unmarshals/marshals an array, the code calls an +// un/marshaling function to process the array of the defined type. +// This section contains the functions that perform that operation +// Array Unmarshal/Marshal for BYTE TPM_RC BYTE_Array_Unmarshal(BYTE* target, BYTE** buffer, INT32* size, INT32 count) { @@ -6625,298 +6993,287 @@ BYTE_Array_Marshal(BYTE* source, BYTE** buffer, INT32* size, INT32 count) memcpy(*buffer, source, count); *buffer += count; } - pAssert(size == 0 || (*size >= 0)); + pAssert((size == 0) || (*size >= 0)); } pAssert(count < INT16_MAX); return ((UINT16)count); } -// Array Marshal/Unmarshal for TPM2B_DIGEST +// Array Unmarshal and Marshal for TPM_ALG_ID TPM_RC -TPM2B_DIGEST_Array_Unmarshal( - TPM2B_DIGEST* target, BYTE** buffer, INT32* size, INT32 count) +TPM_ALG_ID_Array_Unmarshal( + TPM_ALG_ID* target, BYTE** buffer, INT32* size, INT32 count) { - TPM_RC result; + TPM_RC result = TPM_RC_SUCCESS; INT32 i; - for(result = TPM_RC_SUCCESS, i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); - i++) + for(i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); i++) { - result = TPM2B_DIGEST_Unmarshal(&target[i], buffer, size); + result = TPM_ALG_ID_Unmarshal(&target[i], buffer, size); } return result; } UINT16 -TPM2B_DIGEST_Array_Marshal( - TPM2B_DIGEST* source, BYTE** buffer, INT32* size, INT32 count) +TPM_ALG_ID_Array_Marshal(TPM_ALG_ID* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = (UINT16)(result + TPM2B_DIGEST_Marshal(&source[i], buffer, size)); + result += TPM_ALG_ID_Marshal(&source[i], buffer, size); } return result; } -// Array Marshal for TPMA_CC -UINT16 -TPMA_CC_Array_Marshal(TPMA_CC* source, BYTE** buffer, INT32* size, INT32 count) +// Array Unmarshal and Marshal for TPM_CC +TPM_RC +TPM_CC_Array_Unmarshal(TPM_CC* target, BYTE** buffer, INT32* size, INT32 count) { - UINT16 result = 0; + TPM_RC result = TPM_RC_SUCCESS; INT32 i; - for(i = 0; i < count; i++) + for(i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); i++) { - result = (UINT16)(result + TPMA_CC_Marshal(&source[i], buffer, size)); + result = TPM_CC_Unmarshal(&target[i], buffer, size); } return result; } - -// Array Marshal for TPMS_ACT_DATA UINT16 -TPMS_ACT_DATA_Array_Marshal( - TPMS_ACT_DATA* source, BYTE** buffer, INT32* size, INT32 count) +TPM_CC_Array_Marshal(TPM_CC* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = (UINT16)(result + TPMS_ACT_DATA_Marshal(&source[i], buffer, size)); + result += TPM_CC_Marshal(&source[i], buffer, size); } return result; } -// Array Marshal for TPMS_AC_OUTPUT +// Array Marshal for TPM_ECC_CURVE +# if ALG_ECC UINT16 -TPMS_AC_OUTPUT_Array_Marshal( - TPMS_AC_OUTPUT* source, BYTE** buffer, INT32* size, INT32 count) +TPM_ECC_CURVE_Array_Marshal( + TPM_ECC_CURVE* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = (UINT16)(result + TPMS_AC_OUTPUT_Marshal(&source[i], buffer, size)); + result += TPM_ECC_CURVE_Marshal(&source[i], buffer, size); } return result; } +# endif // ALG_ECC -// Array Marshal for TPMS_ALG_PROPERTY +// Array Marshal for TPM_HANDLE UINT16 -TPMS_ALG_PROPERTY_Array_Marshal( - TPMS_ALG_PROPERTY* source, BYTE** buffer, INT32* size, INT32 count) +TPM_HANDLE_Array_Marshal(TPM_HANDLE* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = - (UINT16)(result + TPMS_ALG_PROPERTY_Marshal(&source[i], buffer, size)); + result += TPM_HANDLE_Marshal(&source[i], buffer, size); } return result; } -// Array Marshal/Unmarshal for TPMS_PCR_SELECTION +// Array Unmarshal and Marshal for TPM2B_DIGEST TPM_RC -TPMS_PCR_SELECTION_Array_Unmarshal( - TPMS_PCR_SELECTION* target, BYTE** buffer, INT32* size, INT32 count) +TPM2B_DIGEST_Array_Unmarshal( + TPM2B_DIGEST* target, BYTE** buffer, INT32* size, INT32 count) { - TPM_RC result; + TPM_RC result = TPM_RC_SUCCESS; INT32 i; - for(result = TPM_RC_SUCCESS, i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); - i++) + for(i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); i++) { - result = TPMS_PCR_SELECTION_Unmarshal(&target[i], buffer, size); + result = TPM2B_DIGEST_Unmarshal(&target[i], buffer, size); } return result; } UINT16 -TPMS_PCR_SELECTION_Array_Marshal( - TPMS_PCR_SELECTION* source, BYTE** buffer, INT32* size, INT32 count) +TPM2B_DIGEST_Array_Marshal( + TPM2B_DIGEST* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = - (UINT16)(result + TPMS_PCR_SELECTION_Marshal(&source[i], buffer, size)); + result += TPM2B_DIGEST_Marshal(&source[i], buffer, size); } return result; } -// Array Marshal for TPMS_TAGGED_PCR_SELECT +// Array Unmarshal and Marshal for TPM2B_VENDOR_PROPERTY +TPM_RC +TPM2B_VENDOR_PROPERTY_Array_Unmarshal( + TPM2B_VENDOR_PROPERTY* target, BYTE** buffer, INT32* size, INT32 count) +{ + TPM_RC result = TPM_RC_SUCCESS; + INT32 i; + for(i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); i++) + { + result = TPM2B_VENDOR_PROPERTY_Unmarshal(&target[i], buffer, size); + } + return result; +} UINT16 -TPMS_TAGGED_PCR_SELECT_Array_Marshal( - TPMS_TAGGED_PCR_SELECT* source, BYTE** buffer, INT32* size, INT32 count) +TPM2B_VENDOR_PROPERTY_Array_Marshal( + TPM2B_VENDOR_PROPERTY* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = (UINT16)(result - + TPMS_TAGGED_PCR_SELECT_Marshal(&source[i], buffer, size)); + result += TPM2B_VENDOR_PROPERTY_Marshal(&source[i], buffer, size); } return result; } -// Array Marshal for TPMS_TAGGED_POLICY +// Array Marshal for TPMA_CC UINT16 -TPMS_TAGGED_POLICY_Array_Marshal( - TPMS_TAGGED_POLICY* source, BYTE** buffer, INT32* size, INT32 count) +TPMA_CC_Array_Marshal(TPMA_CC* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = - (UINT16)(result + TPMS_TAGGED_POLICY_Marshal(&source[i], buffer, size)); + result += TPMA_CC_Marshal(&source[i], buffer, size); } return result; } -// Array Marshal for TPMS_TAGGED_PROPERTY +// Array Marshal for TPMS_AC_OUTPUT UINT16 -TPMS_TAGGED_PROPERTY_Array_Marshal( - TPMS_TAGGED_PROPERTY* source, BYTE** buffer, INT32* size, INT32 count) +TPMS_AC_OUTPUT_Array_Marshal( + TPMS_AC_OUTPUT* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = - (UINT16)(result + TPMS_TAGGED_PROPERTY_Marshal(&source[i], buffer, size)); + result += TPMS_AC_OUTPUT_Marshal(&source[i], buffer, size); } return result; } -// Array Marshal/Unmarshal for TPMT_HA -TPM_RC -TPMT_HA_Array_Unmarshal( - TPMT_HA* target, BYTE** buffer, INT32* size, BOOL flag, INT32 count) +// Array Marshal for TPMS_ACT_DATA +UINT16 +TPMS_ACT_DATA_Array_Marshal( + TPMS_ACT_DATA* source, BYTE** buffer, INT32* size, INT32 count) { - TPM_RC result; + UINT16 result = 0; INT32 i; - for(result = TPM_RC_SUCCESS, i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); - i++) + for(i = 0; i < count; i++) { - result = TPMT_HA_Unmarshal(&target[i], buffer, size, flag); + result += TPMS_ACT_DATA_Marshal(&source[i], buffer, size); } return result; } + +// Array Marshal for TPMS_ALG_PROPERTY UINT16 -TPMT_HA_Array_Marshal(TPMT_HA* source, BYTE** buffer, INT32* size, INT32 count) +TPMS_ALG_PROPERTY_Array_Marshal( + TPMS_ALG_PROPERTY* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = (UINT16)(result + TPMT_HA_Marshal(&source[i], buffer, size)); + result += TPMS_ALG_PROPERTY_Marshal(&source[i], buffer, size); } return result; } -// Array Marshal/Unmarshal for TPM_ALG_ID +// Array Unmarshal and Marshal for TPMS_PCR_SELECTION TPM_RC -TPM_ALG_ID_Array_Unmarshal( - TPM_ALG_ID* target, BYTE** buffer, INT32* size, INT32 count) +TPMS_PCR_SELECTION_Array_Unmarshal( + TPMS_PCR_SELECTION* target, BYTE** buffer, INT32* size, INT32 count) { - TPM_RC result; + TPM_RC result = TPM_RC_SUCCESS; INT32 i; - for(result = TPM_RC_SUCCESS, i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); - i++) + for(i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); i++) { - result = TPM_ALG_ID_Unmarshal(&target[i], buffer, size); + result = TPMS_PCR_SELECTION_Unmarshal(&target[i], buffer, size); } return result; } UINT16 -TPM_ALG_ID_Array_Marshal(TPM_ALG_ID* source, BYTE** buffer, INT32* size, INT32 count) +TPMS_PCR_SELECTION_Array_Marshal( + TPMS_PCR_SELECTION* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = (UINT16)(result + TPM_ALG_ID_Marshal(&source[i], buffer, size)); + result += TPMS_PCR_SELECTION_Marshal(&source[i], buffer, size); } return result; } -// Array Marshal/Unmarshal for TPM_CC -TPM_RC -TPM_CC_Array_Unmarshal(TPM_CC* target, BYTE** buffer, INT32* size, INT32 count) -{ - TPM_RC result; - INT32 i; - for(result = TPM_RC_SUCCESS, i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); - i++) - { - result = TPM_CC_Unmarshal(&target[i], buffer, size); - } - return result; -} +// Array Marshal for TPMS_TAGGED_PCR_SELECT UINT16 -TPM_CC_Array_Marshal(TPM_CC* source, BYTE** buffer, INT32* size, INT32 count) +TPMS_TAGGED_PCR_SELECT_Array_Marshal( + TPMS_TAGGED_PCR_SELECT* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = (UINT16)(result + TPM_CC_Marshal(&source[i], buffer, size)); + result += TPMS_TAGGED_PCR_SELECT_Marshal(&source[i], buffer, size); } return result; } -// Array Marshal/Unmarshal for TPM_ECC_CURVE -# if ALG_ECC -TPM_RC -TPM_ECC_CURVE_Array_Unmarshal( - TPM_ECC_CURVE* target, BYTE** buffer, INT32* size, INT32 count) +// Array Marshal for TPMS_TAGGED_POLICY +UINT16 +TPMS_TAGGED_POLICY_Array_Marshal( + TPMS_TAGGED_POLICY* source, BYTE** buffer, INT32* size, INT32 count) { - TPM_RC result; + UINT16 result = 0; INT32 i; - for(result = TPM_RC_SUCCESS, i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); - i++) + for(i = 0; i < count; i++) { - result = TPM_ECC_CURVE_Unmarshal(&target[i], buffer, size); + result += TPMS_TAGGED_POLICY_Marshal(&source[i], buffer, size); } return result; } + +// Array Marshal for TPMS_TAGGED_PROPERTY UINT16 -TPM_ECC_CURVE_Array_Marshal( - TPM_ECC_CURVE* source, BYTE** buffer, INT32* size, INT32 count) +TPMS_TAGGED_PROPERTY_Array_Marshal( + TPMS_TAGGED_PROPERTY* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = (UINT16)(result + TPM_ECC_CURVE_Marshal(&source[i], buffer, size)); + result += TPMS_TAGGED_PROPERTY_Marshal(&source[i], buffer, size); } return result; } -# endif // ALG_ECC -// Array Marshal/Unmarshal for TPM_HANDLE +// Array Unmarshal and Marshal for TPMT_HA TPM_RC -TPM_HANDLE_Array_Unmarshal( - TPM_HANDLE* target, BYTE** buffer, INT32* size, INT32 count) +TPMT_HA_Array_Unmarshal( + TPMT_HA* target, BYTE** buffer, INT32* size, BOOL flag, INT32 count) { - TPM_RC result; + TPM_RC result = TPM_RC_SUCCESS; INT32 i; - for(result = TPM_RC_SUCCESS, i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); - i++) + for(i = 0; ((result == TPM_RC_SUCCESS) && (i < count)); i++) { - result = TPM_HANDLE_Unmarshal(&target[i], buffer, size); + result = TPMT_HA_Unmarshal(&target[i], buffer, size, flag); } return result; } UINT16 -TPM_HANDLE_Array_Marshal(TPM_HANDLE* source, BYTE** buffer, INT32* size, INT32 count) +TPMT_HA_Array_Marshal(TPMT_HA* source, BYTE** buffer, INT32* size, INT32 count) { UINT16 result = 0; INT32 i; for(i = 0; i < count; i++) { - result = (UINT16)(result + TPM_HANDLE_Marshal(&source[i], buffer, size)); + result += TPMT_HA_Marshal(&source[i], buffer, size); } return result; } - #endif // !TABLE_DRIVEN_MARSHAL diff --git a/TPMCmd/tpm/src/support/MathOnByteBuffers.c b/TPMCmd/tpm/src/support/MathOnByteBuffers.c index 9ef20643..bc57223b 100644 --- a/TPMCmd/tpm/src/support/MathOnByteBuffers.c +++ b/TPMCmd/tpm/src/support/MathOnByteBuffers.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Introduction // // This file contains implementation of the math functions that are performed @@ -39,6 +5,7 @@ // big-endian bytes. // #include "Tpm.h" +#include "TpmMath_Util_fp.h" //** Functions @@ -93,6 +60,7 @@ int SignedCompareB(const UINT32 aSize, // IN: size of a return UnsignedCompareB(aSize, a, bSize, b); } +#if ALG_RSA //*** ModExpB // This function is used to do modular exponentiation in support of RSA. // The most typical uses are: 'c' = 'm'^'e' mod 'n' (RSA encrypt) and @@ -125,29 +93,30 @@ ModExpB(UINT32 cSize, // IN: the size of the output buffer. It will const BYTE* n // IN: modulus ) { - BN_MAX(bnC); - BN_MAX(bnM); - BN_MAX(bnE); - BN_MAX(bnN); + CRYPT_INT_MAX(bnC); + CRYPT_INT_MAX(bnM); + CRYPT_INT_MAX(bnE); + CRYPT_INT_MAX(bnN); NUMBYTES tSize = (NUMBYTES)nSize; TPM_RC retVal = TPM_RC_SUCCESS; // Convert input parameters - BnFromBytes(bnM, m, (NUMBYTES)mSize); - BnFromBytes(bnE, e, (NUMBYTES)eSize); - BnFromBytes(bnN, n, (NUMBYTES)nSize); + ExtMath_IntFromBytes(bnM, m, (NUMBYTES)mSize); + ExtMath_IntFromBytes(bnE, e, (NUMBYTES)eSize); + ExtMath_IntFromBytes(bnN, n, (NUMBYTES)nSize); // Make sure that the output is big enough to hold the result // and that 'm' is less than 'n' (the modulus) if(cSize < nSize) - ERROR_RETURN(TPM_RC_NO_RESULT); - if(BnUnsignedCmp(bnM, bnN) >= 0) - ERROR_RETURN(TPM_RC_SIZE); - BnModExp(bnC, bnM, bnE, bnN); - BnToBytes(bnC, c, &tSize); + ERROR_EXIT(TPM_RC_NO_RESULT); + if(ExtMath_UnsignedCmp(bnM, bnN) >= 0) + ERROR_EXIT(TPM_RC_SIZE); + ExtMath_ModExp(bnC, bnM, bnE, bnN); + ExtMath_IntToBytes(bnC, c, &tSize); Exit: return retVal; } +#endif // ALG_RSA //*** DivideB() // Divide an integer ('n') by an integer ('d') producing a quotient ('q') and @@ -163,21 +132,21 @@ LIB_EXPORT TPM_RC DivideB(const TPM2B* n, // IN: numerator TPM2B* r // OUT: remainder ) { - BN_MAX_INITIALIZED(bnN, n); - BN_MAX_INITIALIZED(bnD, d); - BN_MAX(bnQ); - BN_MAX(bnR); + CRYPT_INT_MAX_INITIALIZED(bnN, n); + CRYPT_INT_MAX_INITIALIZED(bnD, d); + CRYPT_INT_MAX(bnQ); + CRYPT_INT_MAX(bnR); // // Do divide with converted values - BnDiv(bnQ, bnR, bnN, bnD); + ExtMath_Divide(bnQ, bnR, bnN, bnD); - // Convert the BIGNUM result back to 2B format using the size of the original + // Convert the Crypt_Int* result back to 2B format using the size of the original // number if(q != NULL) - if(!BnTo2B(bnQ, q, q->size)) + if(!TpmMath_IntTo2B(bnQ, q, q->size)) return TPM_RC_NO_RESULT; if(r != NULL) - if(!BnTo2B(bnR, r, r->size)) + if(!TpmMath_IntTo2B(bnR, r, r->size)) return TPM_RC_NO_RESULT; return TPM_RC_SUCCESS; } diff --git a/TPMCmd/tpm/src/support/Memory.c b/TPMCmd/tpm/src/support/Memory.c index 2cc9081a..40885d3a 100644 --- a/TPMCmd/tpm/src/support/Memory.c +++ b/TPMCmd/tpm/src/support/Memory.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file contains a set of miscellaneous memory manipulation routines. Many // of the functions have the same semantics as functions defined in string.h. diff --git a/TPMCmd/tpm/src/support/Power.c b/TPMCmd/tpm/src/support/Power.c index e936cdfb..595c664b 100644 --- a/TPMCmd/tpm/src/support/Power.c +++ b/TPMCmd/tpm/src/support/Power.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file contains functions that receive the simulated power state diff --git a/TPMCmd/tpm/src/support/PropertyCap.c b/TPMCmd/tpm/src/support/PropertyCap.c index 02e45e47..b04e616e 100644 --- a/TPMCmd/tpm/src/support/PropertyCap.c +++ b/TPMCmd/tpm/src/support/PropertyCap.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file contains the functions that are used for accessing the // TPM_CAP_TPM_PROPERTY values. @@ -79,42 +45,38 @@ static BOOL TPMPropertyIsDefined(TPM_PT property, // IN: property // from the title page of the specification *value = TPM_SPEC_YEAR; break; + case TPM_PT_MANUFACTURER: - // vendor ID unique to each TPM manufacturer - *value = BYTE_ARRAY_TO_UINT32(MANUFACTURER); + // the vendor ID unique to each TPM manufacturer + *value = _plat__GetManufacturerCapabilityCode(); break; + case TPM_PT_VENDOR_STRING_1: - // first four characters of the vendor ID string - *value = BYTE_ARRAY_TO_UINT32(VENDOR_STRING_1); + // the first four characters of the vendor ID string + *value = _plat__GetVendorCapabilityCode(1); break; + case TPM_PT_VENDOR_STRING_2: - // second four characters of the vendor ID string -#ifdef VENDOR_STRING_2 - *value = BYTE_ARRAY_TO_UINT32(VENDOR_STRING_2); -#else - *value = 0; -#endif + // the second four characters of the vendor ID string + *value = _plat__GetVendorCapabilityCode(2); break; + case TPM_PT_VENDOR_STRING_3: - // third four characters of the vendor ID string -#ifdef VENDOR_STRING_3 - *value = BYTE_ARRAY_TO_UINT32(VENDOR_STRING_3); -#else - *value = 0; -#endif + // the third four characters of the vendor ID string + *value = _plat__GetVendorCapabilityCode(3); break; + case TPM_PT_VENDOR_STRING_4: - // fourth four characters of the vendor ID string -#ifdef VENDOR_STRING_4 - *value = BYTE_ARRAY_TO_UINT32(VENDOR_STRING_4); -#else - *value = 0; -#endif + // the fourth four characters of the vendor ID string + *value = _plat__GetVendorCapabilityCode(4); break; + case TPM_PT_VENDOR_TPM_TYPE: // vendor-defined value indicating the TPM model - *value = 1; + // We just make up a number here + *value = _plat__GetTpmType(); break; + case TPM_PT_FIRMWARE_VERSION_1: // more significant 32-bits of a vendor-specific value *value = gp.firmwareV1; @@ -228,13 +190,13 @@ static BOOL TPMPropertyIsDefined(TPM_PT property, // IN: property case TPM_PT_MAX_OBJECT_CONTEXT: // Header has 'sequence', 'handle' and 'hierarchy' #define SIZE_OF_CONTEXT_HEADER \ - sizeof(UINT64) + sizeof(TPMI_DH_CONTEXT) + sizeof(TPMI_RH_HIERARCHY) + sizeof(UINT64) + sizeof(TPMI_DH_CONTEXT) + sizeof(TPMI_RH_HIERARCHY) #define SIZE_OF_CONTEXT_INTEGRITY (sizeof(UINT16) + CONTEXT_INTEGRITY_HASH_SIZE) #define SIZE_OF_FINGERPRINT sizeof(UINT64) #define SIZE_OF_CONTEXT_BLOB_OVERHEAD \ - (sizeof(UINT16) + SIZE_OF_CONTEXT_INTEGRITY + SIZE_OF_FINGERPRINT) + (sizeof(UINT16) + SIZE_OF_CONTEXT_INTEGRITY + SIZE_OF_FINGERPRINT) #define SIZE_OF_CONTEXT_OVERHEAD \ - (SIZE_OF_CONTEXT_HEADER + SIZE_OF_CONTEXT_BLOB_OVERHEAD) + (SIZE_OF_CONTEXT_HEADER + SIZE_OF_CONTEXT_BLOB_OVERHEAD) #if 0 // maximum size of a TPMS_CONTEXT that will be returned by // TPM2_ContextSave for object context @@ -361,15 +323,27 @@ static BOOL TPMPropertyIsDefined(TPM_PT property, // IN: property *value = MAX_NV_BUFFER_SIZE; break; case TPM_PT_MODES: + { + union + { + TPMA_MODES attr; + UINT32 u32; + } flags = {TPMA_ZERO_INITIALIZER()}; #if FIPS_COMPLIANT - *value = 1; -#else - *value = 0; + SET_ATTRIBUTE(flags.attr, TPMA_MODES, FIPS_140_2); #endif + *value = flags.u32; break; + } case TPM_PT_MAX_CAP_BUFFER: *value = MAX_CAP_BUFFER; break; + case TPM_PT_FIRMWARE_SVN: + *value = _plat__GetTpmFirmwareSvn(); + break; + case TPM_PT_FIRMWARE_MAX_SVN: + *value = _plat__GetTpmFirmwareMaxSvn(); + break; // Start of variable commands case TPM_PT_PERMANENT: @@ -593,4 +567,22 @@ TPMCapGetProperties(TPM_PT property, // IN: the starting TPM property } } return more; -} \ No newline at end of file +} + +//*** TPMCapGetOneProperty() +// This function returns a single TPM property, if present. +BOOL TPMCapGetOneProperty(TPM_PT pt, // IN: the TPM property + TPMS_TAGGED_PROPERTY* property // OUT: tagged property +) +{ + UINT32 value; + + if(TPMPropertyIsDefined((TPM_PT)pt, &value)) + { + property->property = (TPM_PT)pt; + property->value = value; + return TRUE; + } + + return FALSE; +} diff --git a/TPMCmd/tpm/src/support/Response.c b/TPMCmd/tpm/src/support/Response.c index bec99ab3..bf0a1675 100644 --- a/TPMCmd/tpm/src/support/Response.c +++ b/TPMCmd/tpm/src/support/Response.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file contains the common code for building a response header, including // setting the size of the structure. 'command' may be NULL if result is diff --git a/TPMCmd/tpm/src/support/ResponseCodeProcessing.c b/TPMCmd/tpm/src/support/ResponseCodeProcessing.c index 4fdc4dcf..4c5f5a6b 100644 --- a/TPMCmd/tpm/src/support/ResponseCodeProcessing.c +++ b/TPMCmd/tpm/src/support/ResponseCodeProcessing.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Description // This file contains the miscellaneous functions for processing response codes. // NOTE: Currently, there is only one. diff --git a/TPMCmd/tpm/src/support/TableDrivenMarshal.c b/TPMCmd/tpm/src/support/TableDrivenMarshal.c index 439cc7a7..e6ce9bb9 100644 --- a/TPMCmd/tpm/src/support/TableDrivenMarshal.c +++ b/TPMCmd/tpm/src/support/TableDrivenMarshal.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ #include @@ -53,7 +19,7 @@ typedef struct extern struct Exernal_Structure_t MarshalData; # define IS_SUCCESS(UNMARSHAL_FUNCTION) \ - (TPM_RC_SUCCESS == (result = (UNMARSHAL_FUNCTION))) + (TPM_RC_SUCCESS == (result = (UNMARSHAL_FUNCTION))) marshalIndex_t IntegerDispatch[] = {UINT8_MARSHAL_REF, UINT16_MARSHAL_REF, @@ -66,7 +32,7 @@ marshalIndex_t IntegerDispatch[] = {UINT8_MARSHAL_REF, # if 1 # define GetDescriptor(reference) \ - ((MarshalHeader_mst*)(((BYTE*)(&MarshalData)) + (reference & NULL_MASK))) + ((MarshalHeader_mst*)(((BYTE*)(&MarshalData)) + (reference & NULL_MASK))) # else static const MarshalHeader_mst* GetDescriptor(marshalIndex_t index) { @@ -77,7 +43,7 @@ static const MarshalHeader_mst* GetDescriptor(marshalIndex_t index) # define GetUnionDescriptor(_index_) ((UnionMarshal_mst*)GetDescriptor(_index_)) # define GetArrayDescriptor(_index_) \ - ((ArrayMarshal_mst*))(ArrayLookupTable[_index_ & NULL_MASK]) + ((ArrayMarshal_mst*))(ArrayLookupTable[_index_ & NULL_MASK]) //*** GetUnmarshaledInteger() // Gets the unmarshaled value and normalizes it to a UIN32 for other @@ -363,7 +329,7 @@ Unmarshal(UINT16 typeIndex, // IN: the thing to marshal const UINT32* check = vmt->values; // // if the TAKES_NULL flag is set, then the first entry in the values - // list is the NULL value. Iy is not included in the 'ranges' or + // list is the NULL value. It is not included in the 'ranges' or // 'singles' count. if((vmt->modifiers & TAKES_NULL) && (val == *check++)) { @@ -734,8 +700,8 @@ UINT16 Marshal(UINT16 typeIndex, // IN: the thing to marshal # define MM32 0 # define MM64 0 # else -// These flip the constant index values so that they count in reverse order when doing -// little-endian stuff + // These flip the constant index values so that they count in reverse order when doing + // little-endian stuff # define MM16 1 # define MM32 3 # define MM64 7 diff --git a/TPMCmd/tpm/src/support/TableMarshalData.c b/TPMCmd/tpm/src/support/TableMarshalData.c index 178977b2..1efb3db7 100644 --- a/TPMCmd/tpm/src/support/TableMarshalData.c +++ b/TPMCmd/tpm/src/support/TableMarshalData.c @@ -1,42 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*(Auto-generated) - * Created by NewMarshal; Version 1.4 Apr 7, 2019 - * Date: Mar 6, 2020 Time: 01:50:10PM - */ - // This file contains the data initializer used for the table-driven marshaling code. #include "Tpm.h" @@ -119,7 +80,7 @@ MarshalData_st MarshalData = { // TPMA_ALGORITHM_DATA {ATTRIBUTES_MTYPE, FOUR_BYTES, 0xFFFFF8F0}, // TPMA_OBJECT_DATA - {ATTRIBUTES_MTYPE, FOUR_BYTES, 0xFFF0F309}, + {ATTRIBUTES_MTYPE, FOUR_BYTES, 0xFFF0F001}, // TPMA_SESSION_DATA {ATTRIBUTES_MTYPE, ONE_BYTES, 0x00000018}, // TPMA_ACT_DATA @@ -137,16 +98,24 @@ MarshalData_st MarshalData = { RANGE(PERSISTENT_FIRST, PERSISTENT_LAST, UINT32)}}, // TPMI_DH_PARENT_DATA {VALUES_MTYPE, - FOUR_BYTES | TAKES_NULL, + FOUR_BYTES, (UINT8)TPM_RC_VALUE, - 2, - 3, - {TPM_RH_NULL, - RANGE(TRANSIENT_FIRST, TRANSIENT_LAST, UINT32), + 6, + 8, + {RANGE(TRANSIENT_FIRST, TRANSIENT_LAST, UINT32), RANGE(PERSISTENT_FIRST, PERSISTENT_LAST, UINT32), + RANGE(SVN_OWNER_FIRST, SVN_OWNER_LAST, UINT32), + RANGE(SVN_ENDORSEMENT_FIRST, SVN_ENDORSEMENT_LAST, UINT32), + RANGE(SVN_PLATFORM_FIRST, SVN_PLATFORM_LAST, UINT32), + RANGE(SVN_NULL_FIRST, SVN_NULL_LAST, UINT32), TPM_RH_OWNER, TPM_RH_ENDORSEMENT, - TPM_RH_PLATFORM}}, + TPM_RH_PLATFORM, + TPM_RH_NULL, + TPM_RH_FW_OWNER, + TPM_RH_FW_ENDORSEMENT, + TPM_RH_FW_PLATFORM, + TPM_RH_FW_NULL}}, // TPMI_DH_PERSISTENT_DATA {MIN_MAX_MTYPE, FOUR_BYTES, @@ -213,11 +182,23 @@ MarshalData_st MarshalData = { 0x80000001, 0x80000002}}, // TPMI_RH_HIERARCHY_DATA - {TABLE_MTYPE, - FOUR_BYTES | TAKES_NULL, + {VALUES_MTYPE, + FOUR_BYTES, (UINT8)TPM_RC_VALUE, - 3, - {TPM_RH_NULL, TPM_RH_OWNER, TPM_RH_ENDORSEMENT, TPM_RH_PLATFORM}}, + 4, + 8, + {RANGE(SVN_OWNER_FIRST, SVN_OWNER_LAST, UINT32), + RANGE(SVN_ENDORSEMENT_FIRST, SVN_ENDORSEMENT_LAST, UINT32), + RANGE(SVN_PLATFORM_FIRST, SVN_PLATFORM_LAST, UINT32), + RANGE(SVN_NULL_FIRST, SVN_NULL_LAST, UINT32), + TPM_RH_OWNER, + TPM_RH_ENDORSEMENT, + TPM_RH_PLATFORM, + TPM_RH_NULL, + TPM_RH_FW_OWNER, + TPM_RH_FW_ENDORSEMENT, + TPM_RH_FW_PLATFORM, + TPM_RH_FW_NULL}}, // TPMI_RH_ENABLES_DATA {TABLE_MTYPE, FOUR_BYTES | TAKES_NULL, @@ -245,6 +226,12 @@ MarshalData_st MarshalData = { TPM_RH_LOCKOUT, TPM_RH_ENDORSEMENT, TPM_RH_PLATFORM}}, + // TPMI_RH_BASE_HIERARCHY_DATA + {TABLE_MTYPE, + FOUR_BYTES, + (UINT8)TPM_RC_VALUE, + 3, + {TPM_RH_OWNER, TPM_RH_ENDORSEMENT, TPM_RH_PLATFORM}}, // TPMI_RH_PLATFORM_DATA {TABLE_MTYPE, FOUR_BYTES, (UINT8)TPM_RC_VALUE, 1, {TPM_RH_PLATFORM}}, // TPMI_RH_OWNER_DATA @@ -281,10 +268,32 @@ MarshalData_st MarshalData = { // TPMI_RH_LOCKOUT_DATA {TABLE_MTYPE, FOUR_BYTES, (UINT8)TPM_RC_VALUE, 1, {TPM_RH_LOCKOUT}}, // TPMI_RH_NV_INDEX_DATA + {VALUES_MTYPE, + FOUR_BYTES, + (UINT8)TPM_RC_VALUE, + 3, + 0, + {RANGE(NV_INDEX_FIRST, NV_INDEX_LAST, UINT32), + RANGE(EXTERNAL_NV_FIRST, EXTERNAL_NV_LAST, UINT32), + RANGE(PERMANENT_NV_FIRST, PERMANENT_NV_LAST, UINT32)}}, + // TPMI_RH_DEFINED_NV_INDEX_DATA + {VALUES_MTYPE, + FOUR_BYTES, + (UINT8)TPM_RC_VALUE, + 2, + 0, + {RANGE(NV_INDEX_FIRST, NV_INDEX_LAST, UINT32), + RANGE(EXTERNAL_NV_FIRST, EXTERNAL_NV_LAST, UINT32)}}, + // TPMI_RH_LEGACY_NV_INDEX_DATA {MIN_MAX_MTYPE, FOUR_BYTES, (UINT8)TPM_RC_VALUE, {RANGE(NV_INDEX_FIRST, NV_INDEX_LAST, UINT32)}}, + // TPMI_RH_EXP_NV_INDEX_DATA + {MIN_MAX_MTYPE, + FOUR_BYTES, + (UINT8)TPM_RC_VALUE, + {RANGE(EXTERNAL_NV_FIRST, EXTERNAL_NV_LAST, UINT32)}}, // TPMI_RH_AC_DATA {MIN_MAX_MTYPE, FOUR_BYTES, @@ -318,7 +327,7 @@ MarshalData_st MarshalData = { (UINT8)TPM_RC_SYMMETRIC, {TPM_ALG_NULL, RANGE(3, 38, UINT16), - (UINT32)((ALG_TDES << 0) | (ALG_AES << 3) | (ALG_XOR << 7) | (ALG_SM4 << 16)), + (UINT32)((ALG_AES << 3) | (ALG_XOR << 7) | (ALG_SM4 << 16)), (UINT32)((ALG_CAMELLIA << 3))}}, // TPMI_ALG_SYM_OBJECT_DATA {MIN_MAX_MTYPE, @@ -326,7 +335,7 @@ MarshalData_st MarshalData = { (UINT8)TPM_RC_SYMMETRIC, {TPM_ALG_NULL, RANGE(3, 38, UINT16), - (UINT32)((ALG_TDES << 0) | (ALG_AES << 3) | (ALG_SM4 << 16)), + (UINT32)((ALG_AES << 3) | (ALG_SM4 << 16)), (UINT32)((ALG_CAMELLIA << 3))}}, // TPMI_ALG_SYM_MODE_DATA {MIN_MAX_MTYPE, @@ -665,6 +674,19 @@ MarshalData_st MarshalData = { SET_ELEMENT_TYPE(UNION_STYPE) | SET_ELEMENT_NUMBER(0), TPMU_CAPABILITIES_MARSHAL_REF, (UINT16)(offsetof(TPMS_CAPABILITY_DATA, data))}}, + // TPMU_SET_CAPABILITIES_DATA + {0, 0, 0, {}, {}}, + // TPMS_SET_CAPABILITY_DATA_DATA + {STRUCTURE_MTYPE, + 2, + {SET_ELEMENT_TYPE(SIMPLE_STYPE) | SET_ELEMENT_SIZE(FOUR_BYTES), + TPM_CAP_MARSHAL_REF, + (UINT16)(offsetof(TPMS_SET_CAPABILITY_DATA, setCapability)), + SET_ELEMENT_TYPE(UNION_STYPE) | SET_ELEMENT_NUMBER(0), + TPMU_SET_CAPABILITIES_MARSHAL_REF, + (UINT16)(offsetof(TPMS_SET_CAPABILITY_DATA, data))}}, + // TPM2B_SET_CAPABILITY_DATA_DATA + {TPM2B_MTYPE, Type03_MARSHAL_REF}, // TPMS_CLOCK_INFO_DATA {STRUCTURE_MTYPE, 4, @@ -851,8 +873,6 @@ MarshalData_st MarshalData = { SET_ELEMENT_TYPE(SIMPLE_STYPE), TPM2B_AUTH_MARSHAL_REF, (UINT16)(offsetof(TPMS_AUTH_RESPONSE, hmac))}}, - // TPMI_TDES_KEY_BITS_DATA - {TABLE_MTYPE, TWO_BYTES, (UINT8)TPM_RC_VALUE, 1, {128 * TDES_128}}, // TPMI_AES_KEY_BITS_DATA {TABLE_MTYPE, TWO_BYTES, @@ -871,14 +891,12 @@ MarshalData_st MarshalData = { {6, 0, (UINT16)(offsetof(TPMU_SYM_KEY_BITS_mst, marshalingTypes)), - {(UINT32)TPM_ALG_TDES, - (UINT32)TPM_ALG_AES, + {(UINT32)TPM_ALG_AES, (UINT32)TPM_ALG_SM4, (UINT32)TPM_ALG_CAMELLIA, (UINT32)TPM_ALG_XOR, (UINT32)TPM_ALG_NULL}, - {(UINT16)(TPMI_TDES_KEY_BITS_MARSHAL_REF), - (UINT16)(TPMI_AES_KEY_BITS_MARSHAL_REF), + {(UINT16)(TPMI_AES_KEY_BITS_MARSHAL_REF), (UINT16)(TPMI_SM4_KEY_BITS_MARSHAL_REF), (UINT16)(TPMI_CAMELLIA_KEY_BITS_MARSHAL_REF), (UINT16)(TPMI_ALG_HASH_MARSHAL_REF), @@ -887,14 +905,12 @@ MarshalData_st MarshalData = { {6, 0, (UINT16)(offsetof(TPMU_SYM_MODE_mst, marshalingTypes)), - {(UINT32)TPM_ALG_TDES, - (UINT32)TPM_ALG_AES, + {(UINT32)TPM_ALG_AES, (UINT32)TPM_ALG_SM4, (UINT32)TPM_ALG_CAMELLIA, (UINT32)TPM_ALG_XOR, (UINT32)TPM_ALG_NULL}, {(UINT16)(TPMI_ALG_SYM_MODE_MARSHAL_REF | NULL_FLAG), - (UINT16)(TPMI_ALG_SYM_MODE_MARSHAL_REF | NULL_FLAG), (UINT16)(TPMI_ALG_SYM_MODE_MARSHAL_REF | NULL_FLAG), (UINT16)(TPMI_ALG_SYM_MODE_MARSHAL_REF | NULL_FLAG), (UINT16)(UINT0_MARSHAL_REF), @@ -1172,9 +1188,10 @@ MarshalData_st MarshalData = { | (ALG_ECSCHNORR << 4) | (ALG_ECMQV << 5))}}, // TPMI_ECC_CURVE_DATA {MIN_MAX_MTYPE, - TWO_BYTES | HAS_BITS, + TWO_BYTES | TAKES_NULL | HAS_BITS, (UINT8)TPM_RC_CURVE, - {RANGE(1, 32, UINT16), + {TPM_ECC_NONE, + RANGE(1, 32, UINT16), (UINT32)((ECC_NIST_P192 << 0) | (ECC_NIST_P224 << 1) | (ECC_NIST_P256 << 2) | (ECC_NIST_P384 << 3) | (ECC_NIST_P521 << 4) | (ECC_BN_P256 << 15) | (ECC_BN_P638 << 16) | (ECC_SM2_P256 << 31))}}, @@ -1443,6 +1460,8 @@ MarshalData_st MarshalData = { (UINT16)(offsetof(TPMS_NV_PIN_COUNTER_PARAMETERS, pinLimit))}}, // TPMA_NV_DATA {ATTRIBUTES_MTYPE, FOUR_BYTES, 0x01F00300}, + // TPMA_NV_EXP_DATA + {ATTRIBUTES_MTYPE, EIGHT_BYTES, 0xfffffff801F00300}, // TPMS_NV_PUBLIC_DATA {STRUCTURE_MTYPE, 5, @@ -1466,6 +1485,48 @@ MarshalData_st MarshalData = { (UINT8)(offsetof(TPM2B_NV_PUBLIC, nvPublic)) | SIZE_EQUAL, UINT16_MARSHAL_REF, TPMS_NV_PUBLIC_MARSHAL_REF}, + // TPMS_NV_PUBLIC_EXP_ATTR_DATA + {STRUCTURE_MTYPE, + 5, + {SET_ELEMENT_TYPE(SIMPLE_STYPE) | SET_ELEMENT_SIZE(FOUR_BYTES), + TPMI_RH_NV_EXP_INDEX_MARSHAL_REF, + (UINT16)(offsetof(TPMS_NV_PUBLIC_EXP_ATTR, nvIndex)), + SET_ELEMENT_TYPE(SIMPLE_STYPE) | SET_ELEMENT_SIZE(TWO_BYTES), + TPMI_ALG_HASH_MARSHAL_REF, + (UINT16)(offsetof(TPMS_NV_PUBLIC_EXP_ATTR, nameAlg)), + SET_ELEMENT_TYPE(SIMPLE_STYPE) | SET_ELEMENT_SIZE(EIGHT_BYTES), + TPMA_NV_EXP_MARSHAL_REF, + (UINT16)(offsetof(TPMS_NV_PUBLIC_EXP_ATTR, attributes)), + SET_ELEMENT_TYPE(SIMPLE_STYPE), + TPM2B_DIGEST_MARSHAL_REF, + (UINT16)(offsetof(TPMS_NV_PUBLIC_EXP_ATTR, authPolicy)), + SET_ELEMENT_TYPE(SIMPLE_STYPE) | SET_ELEMENT_SIZE(TWO_BYTES), + Type41_MARSHAL_REF, + (UINT16)(offsetof(TPMS_NV_PUBLIC_EXP_ATTR, dataSize))}}, + // TPMU_NV_PUBLIC_2_DATA + {3, + 0, + (UINT16)(offsetof(TPMU_NV_PUBLIC_2_mst, marshalingTypes)), + {(UINT32)TPM_HT_NV_INDEX, + (UINT32)TPM_HT_EXTERNAL_NV, + (UINT32)TPM_HT_PERMANENT_NV}, + {(UINT16)(TPMS_NV_PUBLIC_MARSHAL_REF), + (UINT16)(TPMS_NV_PUBLIC_EXP_ATTR_MARSHAL_REF), + (UINT16)(TPMS_NV_PUBLIC_MARSHAL_REF)}}, + // TPMT_NV_PUBLIC_2_DATA + {STRUCTURE_MTYPE, + 2, + {SET_ELEMENT_TYPE(SIMPLE_STYPE) | SET_ELEMENT_SIZE(ONE_BYTES), + TPM_HT_MARSHAL_REF, + (UINT16)(offsetof(TPMT_NV_PUBLIC_2, handleType)), + SET_ELEMENT_TYPE(UNION_STYPE) | SET_ELEMENT_NUMBER(0), + TPMU_NV_PUBLIC_2_MARSHAL_REF, + (UINT16)(offsetof(TPMT_NV_PUBLIC_2, nvPublic2))}}, + // TPM2B_NV_PUBLIC_2_DATA + {TPM2BS_MTYPE, + (UINT8)(offsetof(TPM2B_NV_PUBLIC_2, nvPublic2)) | SIZE_EQUAL, + UINT16_MARSHAL_REF, + TPMT_NV_PUBLIC_2_MARSHAL_REF}, // TPM2B_CONTEXT_SENSITIVE_DATA {TPM2B_MTYPE, Type42_MARSHAL_REF}, // TPMS_CONTEXT_DATA_DATA diff --git a/TPMCmd/tpm/src/support/TpmFail.c b/TPMCmd/tpm/src/support/TpmFail.c index 616a6d7e..c31b809e 100644 --- a/TPMCmd/tpm/src/support/TpmFail.c +++ b/TPMCmd/tpm/src/support/TpmFail.c @@ -1,41 +1,6 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes, Defines, and Types #define TPM_FAIL_C #include "Tpm.h" -#include // On MS C compiler, can save the alignment state and set the alignment to 1 for // the duration of the TpmTypes.h include. This will avoid a lot of alignment @@ -153,42 +118,13 @@ static BOOL Unmarshal16(UINT16* target, BYTE** buffer, INT32* size) //*** SetForceFailureMode() // This function is called by the simulator to enable failure mode testing. -#if SIMULATION +#if ALLOW_FORCE_FAILURE_MODE LIB_EXPORT void SetForceFailureMode(void) { g_forceFailureMode = TRUE; return; } -#endif - -//*** TpmLogFailure() -// This function saves the failure values when the code will continue to operate. It -// if similar to TpmFail() but returns to the caller. The assumption is that the -// caller will propagate a failure back up the stack. -void TpmLogFailure( -#if FAIL_TRACE - const char* function, - int line, -#endif - int code) -{ - // Save the values that indicate where the error occurred. - // On a 64-bit machine, this may truncate the address of the string - // of the function name where the error occurred. -#if FAIL_TRACE - s_failFunction = (UINT32)(ptrdiff_t)function; - s_failLine = line; -#else - s_failFunction = 0; - s_failLine = 0; -#endif - s_failCode = code; - - // We are in failure mode - g_inFailureMode = TRUE; - - return; -} +#endif // ALLOW_FORCE_FAILURE_MODE //*** TpmFail() // This function is called by TPM.lib when a failure occurs. It will set up the @@ -197,44 +133,46 @@ NORETURN void TpmFail( #if FAIL_TRACE const char* function, int line, +#else + uint64_t locationCode, #endif - int code) + int failureCode) { // Save the values that indicate where the error occurred. // On a 64-bit machine, this may truncate the address of the string // of the function name where the error occurred. #if FAIL_TRACE - s_failFunction = (UINT32)(ptrdiff_t)function; - s_failLine = line; + s_failFunctionName = function; + s_failFunction = (UINT32)(ptrdiff_t)function; + s_failLine = line; #else - s_failFunction = (UINT32)(ptrdiff_t)NULL; - s_failLine = 0; + s_failFunction = (UINT32)(locationCode >> 32); + s_failLine = (UINT32)(locationCode); #endif - s_failCode = code; + s_failCode = failureCode; // We are in failure mode g_inFailureMode = TRUE; - // if asserts are enabled, then do an assert unless the failure mode code - // is being tested. -#if SIMULATION -# ifndef NDEBUG - assert(g_forceFailureMode); -# endif - // Clear this flag - g_forceFailureMode = FALSE; -#endif - // Jump to the failure mode code. - // Note: only get here if asserts are off or if we are testing failure mode + // Notify the platform that we hit a failure. + // + // In the LONGJMP case, the reference platform code is expected to long-jmp + // back to the ExecuteCommand call and output a failure response. + // + // In the NO_LONGJMP case, this is a notification to the platform, and the + // platform may take any (implementation-defined) behavior, including no-op, + // debugging, or whatever. The core library is expected to surface the failure + // back to ExecuteCommand through error propagation and return an appropriate + // failure reply. _plat__Fail(); } //*** TpmFailureMode( // This function is called by the interface code when the platform is in failure // mode. -void TpmFailureMode(unsigned int inRequestSize, // IN: command buffer size +void TpmFailureMode(uint32_t inRequestSize, // IN: command buffer size unsigned char* inRequest, // IN: command buffer - unsigned int* outResponseSize, // OUT: response buffer size + uint32_t* outResponseSize, // OUT: response buffer size unsigned char** outResponse // OUT: response buffer ) { @@ -283,18 +221,7 @@ void TpmFailureMode(unsigned int inRequestSize, // IN: command buffer size || !Unmarshal32(&pt, &buffer, &size) || !Unmarshal32(&count, &buffer, &size)) goto FailureModeReturn; - // If in failure mode because of an unrecoverable read error, and the - // property is 0 and the count is 0, then this is an indication to - // re-manufacture the TPM. Do the re-manufacture but stay in failure - // mode until the TPM is reset. - // Note: this behavior is not required by the specification and it is - // OK to leave the TPM permanently bricked due to an unrecoverable NV - // error. - if(count == 0 && pt == 0 && s_failCode == FATAL_ERROR_NV_UNRECOVERABLE) - { - g_manufactured = FALSE; - TPM_Manufacture(0); - } + if(count > 0) count = 1; else if(pt > TPM_PT_FIRMWARE_VERSION_2) @@ -323,66 +250,45 @@ void TpmFailureMode(unsigned int inRequestSize, // IN: command buffer size { case TPM_PT_MANUFACTURER: // the vendor ID unique to each TPM manufacturer -#ifdef MANUFACTURER - pt = *(UINT32*)MANUFACTURER; -#else - pt = 0; -#endif + pt = _plat__GetManufacturerCapabilityCode(); break; + case TPM_PT_VENDOR_STRING_1: // the first four characters of the vendor ID string -#ifdef VENDOR_STRING_1 - pt = *(UINT32*)VENDOR_STRING_1; -#else - pt = 0; -#endif + pt = _plat__GetVendorCapabilityCode(1); break; + case TPM_PT_VENDOR_STRING_2: // the second four characters of the vendor ID string -#ifdef VENDOR_STRING_2 - pt = *(UINT32*)VENDOR_STRING_2; -#else - pt = 0; -#endif + pt = _plat__GetVendorCapabilityCode(2); break; + case TPM_PT_VENDOR_STRING_3: // the third four characters of the vendor ID string -#ifdef VENDOR_STRING_3 - pt = *(UINT32*)VENDOR_STRING_3; -#else - pt = 0; -#endif + pt = _plat__GetVendorCapabilityCode(3); break; + case TPM_PT_VENDOR_STRING_4: // the fourth four characters of the vendor ID string -#ifdef VENDOR_STRING_4 - pt = *(UINT32*)VENDOR_STRING_4; -#else - pt = 0; -#endif + pt = _plat__GetVendorCapabilityCode(4); break; + case TPM_PT_VENDOR_TPM_TYPE: // vendor-defined value indicating the TPM model // We just make up a number here - pt = 1; + pt = _plat__GetTpmType(); break; + case TPM_PT_FIRMWARE_VERSION_1: // the more significant 32-bits of a vendor-specific value // indicating the version of the firmware -#ifdef FIRMWARE_V1 - pt = FIRMWARE_V1; -#else - pt = 0; -#endif + pt = _plat__GetTpmFirmwareVersionHigh(); break; + default: // TPM_PT_FIRMWARE_VERSION_2: // the less significant 32-bits of a vendor-specific value // indicating the version of the firmware -#ifdef FIRMWARE_V2 - pt = FIRMWARE_V2; -#else - pt = 0; -#endif + pt = _plat__GetTpmFirmwareVersionLow(); break; } marshalSize += MarshalUint32(pt, &buffer); diff --git a/TPMCmd/tpm/src/support/TpmSizeChecks.c b/TPMCmd/tpm/src/support/TpmSizeChecks.c index 5b3fe712..dcf6edb0 100644 --- a/TPMCmd/tpm/src/support/TpmSizeChecks.c +++ b/TPMCmd/tpm/src/support/TpmSizeChecks.c @@ -1,37 +1,3 @@ -/* Microsoft Reference Implementation for TPM 2.0 - * - * The copyright in this software is being made available under the BSD License, - * included below. This software may be subject to other third party and - * contributor rights, including patent rights, and no such rights are granted - * under this license. - * - * Copyright (c) Microsoft Corporation - * - * All rights reserved. - * - * BSD License - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ //** Includes, Defines, and Types #include "Tpm.h" #include @@ -61,7 +27,7 @@ BOOL TpmSizeChecks(void) # if ALG_ECC { // This is just to allow simple access to the ecc curve data during debug - const ECC_CURVE* ecc = CryptEccGetParametersByCurveId(3); + const TPM_ECC_CURVE_METADATA* ecc = CryptEccGetParametersByCurveId(3); if(ecc == NULL) ecc = NULL; } @@ -92,6 +58,7 @@ BOOL TpmSizeChecks(void) NOT_REFERENCED(compliantPrimarySeedSize); NOT_REFERENCED(primarySeedSize); +# if ALG_RSA { TPMT_SENSITIVE* p; // This assignment keeps compiler from complaining about a conditional @@ -99,11 +66,13 @@ BOOL TpmSizeChecks(void) UINT16 max_rsa_key_bytes = MAX_RSA_KEY_BYTES; if((max_rsa_key_bytes / 2) != (sizeof(p->sensitive.rsa.t.buffer) / 5)) { - printf("Sensitive part of TPMT_SENSITIVE is undersized. May be caused" + printf("Sensitive part of TPMT_SENSITIVE is undersized. May be " + "caused" " by use of wrong version of Part 2.\n"); PASS = FALSE; } } +# endif // ALG_RSA # if TABLE_DRIVEN_MARSHAL printf("sizeof(MarshalData) = %zu\n", sizeof(MarshalData_st)); # endif @@ -180,6 +149,7 @@ BOOL TpmSizeChecks(void) PASS = FALSE; } } +# if ACT_SUPPORT // Check that the platorm implementes each of the ACT that the TPM thinks are // present { @@ -199,6 +169,7 @@ BOOL TpmSizeChecks(void) } } } +# endif // ACT_SUPPORT { // Had a problem with the macros coming up with some bad values. Make sure // the size is rational diff --git a/docs/BuildSystems/Build.CMake.QuickStart.md b/docs/BuildSystems/Build.CMake.QuickStart.md new file mode 100644 index 00000000..ec58afe4 --- /dev/null +++ b/docs/BuildSystems/Build.CMake.QuickStart.md @@ -0,0 +1,58 @@ +# CMake Quick Start - TPM2 Reference Library + +- [CMake Quick Start - TPM2 Reference Library](#cmake-quick-start---tpm2-reference-library) + - [- Alternative Approach](#--alternative-approach) +- [Known Issues](#known-issues) +- [Prerequisites](#prerequisites) + - [Install CMake & put it on your path](#install-cmake--put-it-on-your-path) + - [Obtain the OpenSSL library](#obtain-the-openssl-library) + - [Install Powershell 7 and put it on your path.](#install-powershell-7-and-put-it-on-your-path) +- [Build it](#build-it) +- [Alternative Approach](#alternative-approach) +--- +NOTE: ** CMake support is experimental and does not yet support Linux. ** + +These instructions are under development and subject to change. + +--- + +# Known Issues +1. Does not search for packages (such as OpenSSL); OpenSSL must be installed as + system (on Linux) or as described in [Windows Build](Build.Windows.md). +2. Build failure with WOLF crypto libraries. + +# Prerequisites + +## Install CMake & put it on your path + +This is performed in an OS specific way, possibilities include: +* using apt-get on Linux, +* Installing the MSI or Zip version of CMake directly from [CMake.org](https://cmake.org/download/) +* Using the CMake tools from a Visual Studio Installation + +## Obtain the OpenSSL library + +Follow the relevant [Build Instructions](../README.md#build-instructions) for your OS. + +## Install Powershell 7 and put it on your path. + +This is optional, but assumed by the cmake_* scripts because of occassional issued +with the `tee` command to capture and display logs simultaneously. + +if you don't want this functionality you can edit the `cmake_*.cmd` scripts to call +powershell and ignore the resulting warnings, or remove `tee` entirely. + +# Build it + +After configuring your environment, you can configure the Tpm Core Library, platform +library, and simulator in a single CMake build system and build it. + +Run `scripts\cmake_onepass.cmd` + +# Alternative Approach + +1. Install Visual Studio 2019 or 2022 and include the CMake recommended components. +2. Open the TPMCmd folder in Visual Studio as a "Folder" (do NOT open the `TpmSimulator.sln` solution) + +Visual Studio should detect the CMakeLists.txt file and load and configure the CMake +environment automatically. You will still need to configure OpenSSL. diff --git a/docs/BuildSystems/Build.CMake.md b/docs/BuildSystems/Build.CMake.md new file mode 100644 index 00000000..7ad2d724 --- /dev/null +++ b/docs/BuildSystems/Build.CMake.md @@ -0,0 +1,184 @@ +# CMake Build System - TPM2 Reference Library + +- [CMake Build System - TPM2 Reference Library](#cmake-build-system---tpm2-reference-library) + - [- 32-bit Windows + OpenSSL](#--32-bit-windows--openssl) +- [Quick Start](#quick-start) +- [Build Domains](#build-domains) +- [Library Only Builds](#library-only-builds) + - [Build Domain #1 - TPM Core Library](#build-domain-1---tpm-core-library) + - [Build Domain #2 - TPM Platform Library](#build-domain-2---tpm-platform-library) + - [Build Domain #3 - TPM Application](#build-domain-3---tpm-application) + - [Consuming TPM CoreLib outside CMake](#consuming-tpm-corelib-outside-cmake) + - [More Info](#more-info) +- [Known Issues](#known-issues) +- [Prerequisites](#prerequisites) + - [Install CMake & put it on your path](#install-cmake--put-it-on-your-path) + - [Obtain the Crypto library of your choice](#obtain-the-crypto-library-of-your-choice) +- [Selected Examples](#selected-examples) + - [32-bit Windows + OpenSSL](#32-bit-windows--openssl) +--- + +NOTE: ** CMake support is experimental and does not yet support Linux. ** + +These instructions are under development and subject to change. + +Note: TPM Requires CMake 3.16.3 or later. +# Quick Start + +See [CMake Quick Start](Build.CMake.QuickStart.md) + +# Build Domains + +This repository uses the concept of "Build Domains" to separate different CMake +components that should be built separately. This is, the three CMake steps (Generate, +Build, Install) should be run on one Build Domain before using the results in another +Build Domain. + +The Reference Code supports two configurations of Build Domains. The simplest system +uses a single Build Domain (that is a single set of Generate, Build, Install). This +is the default behavior of the `TPMCmd/CMakeLists.txt` file. + +# Library Only Builds + +`TPMCmd/CMakeLists.txt` supports an optional configuration that does not include +the platform library or the simulator app. This configuration uses three +build domains to construct the Simulator. Each CMake generate call is run on + a different directory as indicated below, but share the same `--install-prefix` + so the components for each step is available to be found by the next step. + +## Build Domain #1 - TPM Core Library + +The `TPM Core Library` build domain builds a complete TPM library implementation, +including Configuration options and all crypto support. This build domain is +represented by `TPMCmd/CMakeLists.txt` when the CMake is given the optional define +`-D Tpm_BuildOption_LibOnly=1` during the generate phase. + +## Build Domain #2 - TPM Platform Library + +The `TPM Platform Library` build domain consumes the Core Library install tree, and +produces the platform library and adds its components to the install tree. + +This build domain is represented by `TPMCmd/Platform/CMakeLists.txt` when CMake is run +directly on the Platform folder. + +## Build Domain #3 - TPM Application + +The TPM Simulator build domain consumes both combined Core Library and Platform +install tree, and produces the final simulator and installs it to the `bin/` folder of +the install tree. + +This build domain is represented by `TPMCmd/Simulator/CMakeLists.txt` when CMake is +run directly on the Platform folder. + +## Consuming TPM CoreLib outside CMake + +It is possible to consume the `TPM Core Library` without CMake by consuming the +headers and libraries from the install tree created by CMake. The instructions will +be specific to the downstream build tree and are left as an exercise for the reader. + +## More Info + +The `scripts/cmake_*.cmd` files as well as the various CMakeLists.txt files contain +more documentation. + +# Known Issues + +1. Does not search for external packages (e.g. OpenSSL). +2. Build failure with wolf crypto libraries. + +# Prerequisites + +## Install CMake & put it on your path + +This is performed in an OS specific way, possibilities include: +* using apt-get on Linux, +* Installing the MSI or Zip version of CMake directly from [CMake.org](https://cmake.org/download/) +* Using the CMake tools from a Visual Studio Installation + +## Obtain the Crypto library of your choice + +Follow the relevant [Build Instructions](BuildIntro.md#build-instructions) +to install a [supported crypto library](BuildIntro.md#supported-crypto-libraries) +for your OS. + +For Windows: Use `getossl.cmd` to copy the contents of an unzipped downloaded copy of OpenSSL +before configuring with CMake: + +Before configuring a build targeting 32-bit Windows: +``` +scripts\getossl.cmd x86 path\to\downloaded\openssl-1.1.1n\openssl-1.1\x86 +``` + +Before configuring a build targeting 64-bit Windows: +``` +scripts\getossl.cmd x64 path\to\downloaded\openssl-1.1.1n\openssl-1.1\x64 +``` + +# Selected Examples + +## Visual Studio Code + +[Visual Studio Code](https://code.visualstudio.com/) has support for CMake built in, so we can use it to build +the simulator. These instructions even work via +[VSCode Remote](https://code.visualstudio.com/docs/remote/remote-overview). You will still need a C compiler, +such as the one included in [Visual Studio Community Edition](https://visualstudio.microsoft.com/vs/community/). + +### Select a kit (compiler) + +Open the Command Palette (Ctrl + Shift + P) and search for `CMake: Select a Kit`. Choose your compiler there. + +### Configure + +Open the Command Palette (Ctrl + Shift + P) and search for `CMake: Configure`. This should take a few seconds, and then output something like: + +``` +[cmake] -- Build files have been written to: C:/Users/.../src/TPM-Internal/build +[visual-studio] Patch Windows SDK path from C:\Program Files (x86)\Windows Kits\10\bin\x86 to C:\Program Files (x86)\Windows Kits\10\bin\10.0.22000.0\x86 for C:\Program Files\Microsoft Visual Studio\2022\Community\VC\Auxiliary\Build\vcvarsall.bat +``` + +### Build + +Open the Command Palette (Ctrl + Shift + P) and search for `CMake: Build`. This should take a few minutes, and then output something like: + +``` +... +[build] Marshal.c +[build] MathOnByteBuffers.c +[build] Memory.c +[build] Power.c +[build] PropertyCap.c +[build] Response.c +[build] ResponseCodeProcessing.c +[build] TableDrivenMarshal.c +[build] TableMarshalData.c +[build] TpmFail.c +[build] TpmSizeChecks.c +[build] Generating Code... +[build] Tpm_CoreLib.vcxproj -> C:\Users\...\src\TPM-Internal\build\tpm\src\Debug\Tpm_CoreLib.lib +[build] TcpServer.c +[build] Simulator.vcxproj -> C:\Users\...\src\TPM-Internal\build\Simulator\Debug\Simulator.exe +[build] Build finished with exit code 0 +``` + +## 32-bit Windows + OpenSSL using command-line cmake + +1. Change to the TPMCmd directory. +2. Run the appropriate Visual Studio commands to set the environment variables for a 32bit build. For example: +``` +"C:\Program Files (x86)\Microsoft Visual Studio\2019\Community\VC\Auxiliary\Build\vcvarsall.bat" x86 +``` +3. Setup the CMake build environment +``` +cmake -S . -B DebugOpenSSL32 -G "Visual Studio 16 2019" -T v141 -A Win32 +``` +This tells CMake to set the top level of the Source tree to TPMCmd/ and create a Build +directory "TPMCmd/DebugOpenSSL32/" + +4. Execute the build +Instruct CMake to build the build environment just created. +``` +cmake --build DebugOpenSSL32 +``` + +If everything went well, you should have a working Simulator.exe in: +`TPMCmd\DebugOpenSSL32\install\bin\Simulator.exe` diff --git a/docs/BuildSystems/Build.Linux.md b/docs/BuildSystems/Build.Linux.md new file mode 100644 index 00000000..fb0b47d9 --- /dev/null +++ b/docs/BuildSystems/Build.Linux.md @@ -0,0 +1,80 @@ +- [Linux build](#linux-build) + +## Linux build + +Follows the common `./bootstrap && ./configure && make` convention. + +Note that autotools scripts require the following prerequisite packages: +`autoconf-archive`, `pkg-config`, and sometimes `build-essential` and `automake`. +Their absence is not automatically detected. The build also needs `gcc` and +`libssl-dev` packages. + +You will need a [supported version of OpenSSL](BuildIntro.md#supported-crypto-libraries) +installed in order to build the TPM simulator. + +Similarly to the Windows build, if you enable SM{2,3,4} algorithms in `TpmProfile.h`, +the build may fail because of missing `SM{2,3,4}.h` headers. In this case you will +need to manually copy them over from OpenSSL's `include/crypt` folder. + +## Cross-Compiling for Big-Endian Architectures + +NOTE: These intructions are not optimized, they are the notes of one successful +attempt at cross-compiling for ppc64. + +REMINDER: Set `BIG_ENDIAN_TPM` to `YES` in `TpmProfile_Common.h`! + +REMINDER: NVChip is not compatible between different endiannesses of the TPM. +Delete NVChip if it's left over from a previous test. + +You can use `make`'s cross-compilation features to generate a 64-bit PowerPC +binary TPM simulator for testing, even from a little-endian-architecture Linux +environment. + +You will need the following packages: +* `gcc-powerpc64-linux-gnu` +* `binutils-powerpc64-linux-gnu` +* `libssl-dev` (ppc64) + * You can build this from openssl source with `CROSS_COMPILE=powerpc64-linux-gnu- ./Configure linux-ppc64`, then + running `make` / `make install` + * If you build and install openssl from source for cross-compilation, it is + recommended to specify `--prefix=/usr/local/ssl/ppc64/` and + `--openssldir=/usr/local/ssl/ppc64/` to ensure it does not + interfere with any other installations of openssl. See + https://wiki.openssl.org/index.php/Compilation_and_Installation for more + information about building and installing OpenSSL from source. +* `libc` (ppc64) + * You can build this from glibc source with: + ``` + configure CC=powerpc64-linux-gnu-gcc CXX=powerpc64-linux-gnu-g++ --target=powerpc64-linux-gnu --host=powerpc64-linux-gnu + make -j + make install + ``` + +NOTE: The rest of these instructions assume that the PowerPC64 version of +openssl got installed at /usr/local/ssl/ppc64/. + +Use `./bootstrap` normally, as above. + +Configure using: + +``` +PKG_CONFIG_PATH="/usr/local/ssl/ppc64/lib64/pkgconfig" ./configure --host=powerpc64-linux-gnu +``` + +The bootstrap script doesn't fully support cross compilation yet. +Fix the Makefile by replacing `-lcrypto` in `LIBCRYPTO_LIBS` with +`-L/usr/local/ssl/ppc64/lib64 -lcrypto`. You may also need to add +`-L/path/to/your/installed/ppc-libc` here also. + +Compile using: + +``` +INCLUDES=-I/usr/local/ssl/ppc64/include make +``` + +Run the binary using `qemu-ppc64-static ./Simulator/src/tpm2-simulator`. + +Problems you may run into: + +* You may need to add the path to the PowerPC64 OpenSSL lib directory to `LD_LIBRARY_PATH`. +* You may need to add a symlink to your PowerPC64 libc at /lib64/ld64.so.1 diff --git a/docs/BuildSystems/Build.OsX.md b/docs/BuildSystems/Build.OsX.md new file mode 100644 index 00000000..98a68e61 --- /dev/null +++ b/docs/BuildSystems/Build.OsX.md @@ -0,0 +1,17 @@ +- [Mac OS X build](#mac-os-x-build) + +## Mac OS X build + +As with the [Linux](Build.Linux.md) build, use `./bootstrap`, `./configure`, and `make`. +If you used Homebrew to install [a supported version of OpenSSL](BuildIntro.md#supported-crypto-libraries), +you may need to include its path in `PKG_CONFIG_PATH`. +OS X compilers treat uninitialized global variables as +[common symbols](https://developer.apple.com/library/archive/documentation/DeveloperTools/Conceptual/MachOTopics/1-Articles/executing_files.html), +which can be eliminated with the `-fno-common` compiler option. +Future updates to the autotools configurations may automate one or both of these steps. + +``` +./bootstrap +PKG_CONFIG_PATH="/usr/local/opt/openssl/lib/pkgconfig" EXTRA_CFLAGS=-fno-common ./configure +make +``` diff --git a/docs/BuildSystems/Build.Windows.md b/docs/BuildSystems/Build.Windows.md new file mode 100644 index 00000000..342a6c3a --- /dev/null +++ b/docs/BuildSystems/Build.Windows.md @@ -0,0 +1,78 @@ + +# Windows build +- [Windows build](#windows-build) + - [Introduction](#introduction) + - [OpenSSL library](#openssl-library) + - [Wolfcrypt library (wolfSSL)](#wolfcrypt-library-wolfssl) + +## Introduction +Windows build is implemented as a Visual Studio 2017 solution. + +Before building it, setup a +[supported version](BuildIntro.md#supported-crypto-libraries) of one or more of +the following underlying cryptographic libraries: + +## OpenSSL library ### + + 1. Create `TPMCmd/lib` folder and place a static OpenSSL library (`libcrypto.lib`) + built for the `x86` architecture there. For the `x64` architecture use the + `TPMCmd/lib/x64` folder. + + The static libs can be either static libraries proper, or import libraries + accompanying the corresponding DLLs. In the latter case you'll need to ensure + that ther is a matching copy of the OpenSSL DLL in the standard Windows search + path, so that it is available when you run the simulator executable (e.g. copy + it into the same folder where `simulator.exe` is located). + + Recommended version of OpenSSL is `1.1.1d` or higher. + + 2. Create `TPMCmd/OsslInclude/openssl` folder and copy there the contents of the + `openssl/include/openssl` folder in the OpenSSL source tree used to build the + OpenSSL library. + + If you enable SM{2,3,4} algorithms in `TpmProfile.h`, the build may fail because + of missing `SM{2,3,4}.h` headers. In this case you will need to manually copy + them over from OpenSSL's `include/crypt` folder. + + ***NOTE: The .h files are bit specific*** + +Notes: +``` +The two OpenSSL resources are: +- The compiled libcrypto.lib and .dll +- Header files from openssl/include/openssl + +Location of libcrypto: 64Bit +...TPMCmd\lib\x64\libcrypto.lib +...TPMCmd\lib\x64\libcrypto-1_1-x64.dll + +Location of libcrypto: 32Bit +...TPMCmd\lib\x86\libcrypto.lib +...TPMCmd\lib\x86\libcrypto-1_1.dll + +OpenSSL Header file location: +...TPMCmd/OsslInclude/x86/openssl/ +...TPMCmd/OsslInclude/x64/openssl/ +``` + + 3. Build the solution with either Debug or Release as the active configuration. + +## Wolfcrypt library (wolfSSL) ### + +WARNING: CURRENTLY UNSUPPORTED + + 1. WolfSSL is included as a submodule. Initialize and update the submodule to fetch + the project and checkout the appropriate commit. + + > git submodule init + > git submodule update + + The current commit will point the minimum recommended version of wolfSSL. + Moving to a more recent tag or commit should also be supported but might not + be tested. + + 2. Build the solution with either WolfDebug or WolfRelease as the active + configuration, either from inside the Visual Studio or with the following + command line: + + > msbuild TPMCmd\simulator.sln /p:Configuration=WolfDebug diff --git a/docs/BuildSystems/BuildIntro.md b/docs/BuildSystems/BuildIntro.md new file mode 100644 index 00000000..27071665 --- /dev/null +++ b/docs/BuildSystems/BuildIntro.md @@ -0,0 +1,57 @@ +# Build Intro +- [Build Intro](#build-intro) + - [Supported Crypto Libraries](#supported-crypto-libraries) + - [Build Options](#build-options) + - [Future Work](#future-work) + - [Code Layout](#code-layout) + - [Build Instructions](#build-instructions) + +## Supported Crypto Libraries + +A compatible crypto library is required in order to build the TPM simulator. + +| Crypto library | Supported Minimum Version | +| -------------- | ------------------------- | +| OpenSSL 1.x | `1.1.1n` (March 2022) | +| OpenSSL 3.x | `3.0.10` (August 2023) | +| WolfSSL | Not supported | + +Bindings for WolfSSL are provided on a best-effort basis, but WolfSSL is not +currently tested or supported by any of the build documentation. + +## Build Options + +The TPM Reference Core Library is intended to be portable across any +environment. The Simulator Test application requires a full operating system +with networking support. + +This repo currently supports three build options with various levels of support. +Unsupported combinations may work, but are not tested or maintained. Pull +requests to fix any issues with them will be entertained from the community +subject to the [Contributing Guidelines](../../CONTRIBUTING.md) + +| Build Tool | Operating System | Supported? | +| ------------------ | ---------------- | ------------------------ | +| AutoTools | Linux | YES, Deprecation planned | +| AutoTools | MacOsX | NO | +| CMake | Windows | YES | +| CMake | Linux | NO, Future plan | +| Visual Studio 2017 | Windows | YES, Deprecation planned | +| Visual Studio 2022 | Windows | NO, Future plan | + +## Future Work + +As implied by the table above, CMake is expected to replace AutoTools support, +and VS2022 will replace VS2017. + +## Code Layout + +The contents and high-level layout of the source code is described by +[CodeLayout](CodeLayout.md) + +## Build Instructions + +* [CMake](Build.CMake.md) +* [Windows](Build.Windows.md) +* [Linux](Build.Linux.md) +* [MacOsX](Build.OsX.md) diff --git a/docs/BuildSystems/CodeLayout.md b/docs/BuildSystems/CodeLayout.md new file mode 100644 index 00000000..bc7e7b69 --- /dev/null +++ b/docs/BuildSystems/CodeLayout.md @@ -0,0 +1,114 @@ + + +# Code Layout +- [Code Layout](#code-layout) + - [Introduction](#introduction) + - [Form Follows Function](#form-follows-function) + - [Tpm Reference Code (TPMCmd folder)](#tpm-reference-code-tpmcmd-folder) + - [Tpm Core Library (TPMCmd/tpm folder)](#tpm-core-library-tpmcmdtpm-folder) + - [Tpm Core Library Includes (TPMCmd/tpm/include folder)](#tpm-core-library-includes-tpmcmdtpminclude-folder) + - [Tpm Core Library CryptoLibs (TPMCmd/tpm/cryptolibs folder)](#tpm-core-library-cryptolibs-tpmcmdtpmcryptolibs-folder) + - [Platform Library (TPMCmd/Platform folder)](#platform-library-tpmcmdplatform-folder) + +## Introduction + +The code layout of the repository consists of the several top-level folders. +Portions of the repository are provided for example or historical reasons and are +unmaintained. Pull Requests to update or fix non-maintained code are considered +subject to [CONTRIBUTING.md](../../CONTRIBUTING.md) + +| Folder | Description | Maintained? | +| -------- | ---------------------------------------------------- | :---------: | +| docs | These documents | YES | +| external | WolfSSL submodule (currently not building correctly) | NO | +| Samples | Misc Sample TPM applications | NO | +| scripts | miscellaneous scripts | YES | +| TPMCmd | TPM Reference Code and Library | YES | + +## Form Follows Function + +The physical directory layout of the reference code is based on achieving two +simultaneous goals: +1. to build the TCG Reference Code, Simulator, and Platform library. +2. to allow library consumers to consume only library components while injecting +changes at multiple customization points. Items designated Replaceable can be +replaced with user components as described in other documents to construct a +different TPM application. + +In order to achieve these goals in a way that can be consumed by the greatest +variety of downstream build systems, the Core Library CMake build system +outputs an "install tree" consisting of headers and libraries that can be +consumed by various downstream build systems as well as a set of CMake Packages +that can be consumed via CMake `find_package` if the downstream system uses CMake. + +The folder layout of the `TPMCmd` source tree reflects these CMake build +decisions as described in [CMake Build](Build.CMake.md). + +The remainder of this document outlines what is in the top-level folders of the +repository. + +## Tpm Reference Code (TPMCmd folder) + +The structure of `TPMCmd` is: + +| Folder | Description | Replaceable? | +| ---------------- | ----------------------------------------- | :----------: | +| Platform | The Reference example platform library | YES | +| Simulator | The Reference test application | YES | +| tpm | The TPM Core Library | NO | +| TpmConfiguration | The TPM Configuration files for Simulator | YES | + + + +## Tpm Core Library (TPMCmd/tpm folder) + +The structure of `TPMCmd/tpm`: + +| Folder | Description | Maintained? | Replaceable? | +| ---------- | -------------------------------------------- | :---------: | :----------: | +| cmake | CMake build scripts and helpers | YES | NO | +| cryptolibs | Core and Sample crypto libraries (see below) | VARIES | VARIES | +| include | Various TPM Header libraries (see below) | YES | NO | +| src | The TPM Core Library | YES | NO | + +## Tpm Core Library Includes (TPMCmd/tpm/include folder) + +The structure of `TPMCmd/tpm/include`: + +| Folder | Description | Maintained? | Replaceable? | +| ------------------ | -------------------------------------------- | :---------: | :----------: | +| platform_interface | CMake build scripts | YES | NO | +| private | Core and Sample crypto libraries (see below) | YES | NO | +| public | Various TPM Header libraries (see below) | YES | NO | + + +## Tpm Core Library CryptoLibs (TPMCmd/tpm/cryptolibs folder) + +The cryptolibs folder contains both maintained code and legacy code that is kept +for illustration but is not currently maintained. In particular wolf crypto +implementations do not correctly build at present. + +The structure of `TPMCmd/tpm/cryptolibs`: + +| Folder | Description | Maintained? | Replaceable? | Requires TpmBigNum? | +| --------- | ------------------------------------- | :---------: | :----------: | :-----------------: | +| common | Core TPM Crypto Interface definitions | YES | NO | N/A | +| Ossl | OpenSSL Crypto Interface layer | YES | YES | YES | +| TpmBigNum | The TPM "Big Number" Math Library | YES | YES | N/A | +| wolf | WolfSSL Crypto Interface layer | NO | YES | YES | + +More details about the Crypto design and customization can be found under [Architecture](../architecture/Introduction.md): + +## Platform Library (TPMCmd/Platform folder) + +| Folder | Description | Maintained? | Replaceable? | +| ------- | ------------------------------ | :---------: | :----------: | +| include | Tpm_PlatformLib headers | YES | YES | +| src | Tpm_PlatformLib source | YES | YES | + diff --git a/docs/BuildSystems/TpmBuildGraph.svg b/docs/BuildSystems/TpmBuildGraph.svg new file mode 100644 index 00000000..64d2888f --- /dev/null +++ b/docs/BuildSystems/TpmBuildGraph.svg @@ -0,0 +1,4 @@ + + + +
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Showing OpenSSL with TpmBigNum as selected crypto options for illustration.
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\ No newline at end of file diff --git a/docs/architecture/Introduction.md b/docs/architecture/Introduction.md new file mode 100644 index 00000000..8f2d8c93 --- /dev/null +++ b/docs/architecture/Introduction.md @@ -0,0 +1,66 @@ + + +# TPM Reference Code - Introduction + +- [TPM Reference Code - Introduction](#tpm-reference-code---introduction) + - [See Also](#see-also) + - [Introduction](#introduction) + - [Status of this documentation](#status-of-this-documentation) + - [Cryptographic Prerequisites](#cryptographic-prerequisites) + - [Notations](#notations) + - [Abbreviations & Terms](#abbreviations--terms) + - [References](#references) + +## See Also + +- [Introduction](Introduction.md) +- [Library Architecture](Library.Architecture.md) +- [Tpm BigNum Library](Tpm.BigNum.Library.md) +- [Tpm Crypto Libraries](Tpm.Crypto.Libraries.md) +- [Tpm Math Library](Tpm.Math.Library.md) +- [Tpm Platform API](Tpm.Platform.Api.md) + +## Introduction + +This documentation describes the TPM Reference Code contained in this repository. +It describes the code's implementation in terms of its technical architecture and layout. + +## Status of this documentation + +Certain parts of the Reference code, as published in the Trusted Computing Group TPM2.0 specification (see [References](#References)) are _NORMATIVE_ to the TPM 2.0 Specification. +As detailed in the Specification, it is the _behavior_ of the code (vis-a-vis the _implementation_) that is _normative_. + +However, this documentation is a living document whose goal is to describe the implementation of this particular repository. Therefore all of this documentation, and much of the code, in this repository is _informative_ and should not be considered part of the TCG TPM 2.0 specification. + +All documentation in this repository should be considered a combined whole; thus when the text refers to "this document", the reference is to the combined documentation contained +in this code repository unless context requires otherwise. + +## Cryptographic Prerequisites + +This documentation assumes the reader is well versed in the relevant cryptographic concepts and terminology and will not necessarily explain common terms or abbreviations. + +## Notations + +Mathematical formulae in this document use the caret `^` to indicate exponentiation operations unless otherwise noted. For example: 2^3 = 8. This differs from the XOR meaning of `^` in C code. + +## Abbreviations & Terms +| Term | Meaning | +| :--- | :-------------------------------------------------------- | +| ECC | Elliptic Curve Cryptography (not Error Correction Coding) | +| RSA | The RSA cryptographic algorithm and related topics | +| TCG | Trusted Computing Group. | + +## References + +These references were links to the current versions at the time of this writing, but may be be the most current now. All references in any part of this documentation will refer to this list by number. + +1. [Latest TCG TPM 2.0 Specification](https://trustedcomputinggroup.org/resource/tpm-library-specification) +2. [TPM2 Specification Part 1 - Architecture v1.59](https://trustedcomputinggroup.org/wp-content/uploads/TCG_TPM2_r1p59_Part1_Architecture_pub.pdf) +3. [TPM2 Specification Part 2 - Structures v1.59](https://trustedcomputinggroup.org/wp-content/uploads/TCG_TPM2_r1p59_Part2_Structures_pub.pdf) +4. [TPM2 Specification Part 3 - Commands v1.59](https://trustedcomputinggroup.org/wp-content/uploads/TCG_TPM2_r1p59_Part3_Commands_pub.pdf) +5. [TPM2 Specification Part 3 - Commands with Code v1.59](https://trustedcomputinggroup.org/wp-content/uploads/TCG_TPM2_r1p59_Part3_Commands_code_pub.pdf) +6. [TPM2 Specification Part 4 - Supporting Routines v1.59](https://trustedcomputinggroup.org/wp-content/uploads/TCG_TPM2_r1p59_Part4_SuppRoutines_pub.pdf) +7. [TPM2 Specification Part 4 - Supporting Routines with Code v1.59](https://trustedcomputinggroup.org/wp-content/uploads/TCG_TPM2_r1p59_Part4_SuppRoutines_code_pub.pdf) +8. [TCG PC Client Platform Firmware Profile Specification v1.05 r23](https://trustedcomputinggroup.org/wp-content/uploads/TCG_PCClient_PFP_r1p05_v23_pub.pdf) +9. [TCG PC Client Platform TPM Profile v1.05 r14](https://trustedcomputinggroup.org/wp-content/uploads/PC-Client-Specific-Platform-TPM-Profile-for-TPM-2p0-v1p05p_r14_pub.pdf) \ No newline at end of file diff --git a/docs/architecture/Library.Architecture.md b/docs/architecture/Library.Architecture.md new file mode 100644 index 00000000..e8812ccb --- /dev/null +++ b/docs/architecture/Library.Architecture.md @@ -0,0 +1,107 @@ + + +# TPM Reference Code - High Level Architecture + +- [TPM Reference Code - High Level Architecture](#tpm-reference-code---high-level-architecture) + - [See Also](#see-also) + - [TPM code architecture and layering](#tpm-code-architecture-and-layering) + - [Protocol Layer](#protocol-layer) + - [Protocol Examples](#protocol-examples) + - [Core Library](#core-library) + - [Crypto Libraries](#crypto-libraries) + - [Platform Library](#platform-library) + - [Architecture Diagram](#architecture-diagram) + +## See Also + +- [Introduction](Introduction.md) +- [Library Architecture](Library.Architecture.md) +- [Tpm BigNum Library](Tpm.BigNum.Library.md) +- [Tpm Crypto Libraries](Tpm.Crypto.Libraries.md) +- [Tpm Math Library](Tpm.Math.Library.md) +- [Tpm Platform API](Tpm.Platform.Api.md) + + +## TPM code architecture and layering + +A TPM Implementation consists of several layers, not all provided by the TPM +Reference Library. From the perspective of an outside caller into the TPM, the +layers are: + + +- [Protocol Layer](#protocol-layer) + - [Protocol Examples](#protocol-examples) +- [Core Library](#core-library) +- [Crypto Libraries](#crypto-libraries) +- [Platform Library](#platform-library) + +### Protocol Layer + +The outermost, external layer. This can implement any of the signaling +protocols described in various platform specs, or be entirely custom. Some +examples of the protocol layer are implementations of the Serial Peripheral +Interface (SPI) interconnect and Command Response Buffer definition from +[[8]](Introduction.md#references). Other platform-specific TPM specifications +such as mobile or automotive scenarios will define this layer. + +All code in this repository relating to the Protocol Layer is _INFORMATIVE_. + +All protocol layers pass TPM commands into the Core Library via the +`ExecuteCommand` API. Protocol layers _MAY_ also manipulate limited TPM state +via other `Platform` API functions as defined in the [Platform +Layer](#platform-library) headers. + +#### Protocol Examples +In this repository, the `TPMCmd/Simulator` folder provides a `Protocol Layer` +designed for test and development. The Samples folder demonstrates other +possible implementations of the Protocol Layer. The Samples folder has been +contributed over time by various sources and should be considered illustrative +only. In particular, it is not regularly built and may not even compile at any +particular time. + +### Core Library + +This `Core` layer contains the bulk of the code that implements a TPM. All of +the command parsing, data marshalling, access checks, and other primary +functionality is in this layer. The _behavior_ (vis-a-vis the _implementation_) +of the `Core` layer of the Reference code contained in this repository is +_NORMATIVE_ for the TPM Specification. + +### Crypto Libraries + +The `Core` layer consumes cryptographic services from three +_implementation-defined_ crypto libraries. These libraries are specified by +build flags as described in [TPM Crypto Libraries](Tpm.Crypto.Libraries.md). + +The reference code supports OpenSSL as a placeholder library, with the intention +that an implementor can replace this functionality by providing an +implementation of the appropriate interface. + +### Platform Library + +The `Platform` library provides services to both the `Core` Layer as well as the +`Protocol` layer. Generally speaking, the platform layer provides operating +system services such as obtaining entropy, storing persistent (non-volatile) +data, etc. + +In some implementations the Platform layer is also the communication +mechanism for the Protocol Layer to signal state to the Core Library. For +example, when implementing Locality, the Core layer will query the active +Locality via the Platform layer, not directly from the Protocol Layer, even +though it is frequently the protocol layer that is in control of locality. + +The Core library requires the Platform library provide the interface defined by +`tpm_to_platform_interface.h`. + +The Protocol and Platform Libraries are allowed to call the Core library on the +functions defined in `platform_to_tpm_interface.h`. The Core library is not +re-entrant or multithread safe. + +See [Tpm Platform API](Tpm.Platform.Api.md) for more info. + +## Architecture Diagram + + + +![image](tpmdiagram.drawio.svg) \ No newline at end of file diff --git a/docs/architecture/Tpm.BigNum.Library.md b/docs/architecture/Tpm.BigNum.Library.md new file mode 100644 index 00000000..0524dcca --- /dev/null +++ b/docs/architecture/Tpm.BigNum.Library.md @@ -0,0 +1,55 @@ + + +# TPM Reference Code - TpmBigNum Library Design + +- [TPM Reference Code - TpmBigNum Library Design](#tpm-reference-code---tpmbignum-library-design) + - [See Also](#see-also) + - [Background](#background) + - [Design](#design) + - [Specifying the sub-libraries](#specifying-the-sub-libraries) + +## See Also + +- [Introduction](Introduction.md) +- [Library Architecture](Library.Architecture.md) +- [Tpm BigNum Library](Tpm.BigNum.Library.md) +- [Tpm Crypto Libraries](Tpm.Crypto.Libraries.md) +- [Tpm Math Library](Tpm.Math.Library.md) +- [Tpm Platform API](Tpm.Platform.Api.md) + + +## Background + +This document describes the `TpmBigNum` Math library, which is the Reference +Code implementation of the MATH_LIB interface. The detailed MATH_LIB interface +is described in [TPM Math Library](Tpm.Math.Library.md). This document +describes the internal implementation of `TpmBigNum`. + +In particular, `TpmBigNum` consumes and requires a helper asymmetric math +library to provide complex big-number math operations. The reference code +currently supports wolfssl and OpenSSL libraries as sub-providers of large +number crypto operations. + +## Design + +`TpmBigNum` uses the `bigNum`, and `bigPoint` types to hold numeric information. +`TpmBigNum` respects the BIG_ENDIAN_TPM macro to reflect how data is stored in +memory. `TpmBigNum` provides all the stubs required by the Tpm Math Library +interface, and some of the (constant and linear time) `bigNum` math operations. +More complex operations such as exponentiation, division, multiplication, and +modular operations are provided by the sub-library. All sub-libraries must use +the same `bigNum` format for the underlying memory and satisfy the +`BnSupport_interface.h` interface. The historical strategy is to provide wrapper +functions that convert in and out of the library-native format into the bigNum +library format automatically. If a library wishes to avoid the overhead of +these conversions then they can target the entire MATH_LIB interface instead. + +## Specifying the sub-libraries + +Similar to the `Core` library's use of `MATH_LIB`, `TpmBigNum` also uses a +preprocessor macro to indicate the sub-library it will use. + +| Build Flag | Header Name | Description | +| :---------- | :------------------------ | :---------------------------------------------------- | +| BN_MATH_LIB | BnTo`[BN_MATH_LIB]`Math.h | Math Interface used to provide bigNum implementations | diff --git a/docs/architecture/Tpm.Crypto.Libraries.md b/docs/architecture/Tpm.Crypto.Libraries.md new file mode 100644 index 00000000..e9e2943d --- /dev/null +++ b/docs/architecture/Tpm.Crypto.Libraries.md @@ -0,0 +1,119 @@ + + +# TPM Reference Code - TPM Crypto Library Introduction + +- [TPM Reference Code - TPM Crypto Library Introduction](#tpm-reference-code---tpm-crypto-library-introduction) + - [See Also](#see-also) + - [Background](#background) + - [Components of a Cryptographic Protocol](#components-of-a-cryptographic-protocol) + - [TPM Crypto Support Library Design](#tpm-crypto-support-library-design) + - [Implications](#implications) + - [Specifying the libraries](#specifying-the-libraries) + +## See Also + +- [Introduction](Introduction.md) +- [Library Architecture](Library.Architecture.md) +- [Tpm BigNum Library](Tpm.BigNum.Library.md) +- [Tpm Crypto Libraries](Tpm.Crypto.Libraries.md) +- [Tpm Math Library](Tpm.Math.Library.md) +- [Tpm Platform API](Tpm.Platform.Api.md) + + +## Background + +As mentioned in [Library Architecture](Library.Architecture.md), any TPM +implementation using this Core library is expected to provide several additional +libraries or components. This document describes the Crypto support libraries at +a high level. + +## Components of a Cryptographic Protocol + +Roughly speaking, any usable end-to-end crypto protocol breaks down into some +combination of four groups of things: + +| Group | Algorithm Category | Examples | +| :---: | :------------------------------ | :-------------------------------------------------------------------------- | +| 1 | Symmetric primitives | Expand AES Key Schedule
Encrypt a single 16-byte block | +| 2 | Hash primitives | Start Hash
Hash Block
End Hash | +| 3 | Big Number (BN) math primitives | Compute a^e mod N, where a,e,N are “big” integers | +| 4 | Cryptographic "Protocol" | Details building these primitives into end-to-end cryptographic operations. | + +Examples may help make this clearer. Depending on mode, encrypting the simplest +message (a single block of data) with AES involves at least two operations from +category 1: + +- generating a key schedule, and +- performing the block encryption. + +Similarly, hashing a message requires at least three operations from category 2: + +- initializing the hash state, and +- extending the data block(s), and +- finalizing the hash. + +Note: Correct Category 4 implementation is critical to security - many practical +cryptographic weaknesses stem from errors in how the primitives are applied, +even when the primitives are themselves secure. + +## TPM Crypto Support Library Design + +The `Core` implementation strategy has been to link with (potentially separate) +crypto libraries that provide the primitives from groups 1 & 2 and (a +_**subset**_ of) 3. The Core TPM reference library provides the remaining Group +3 and Group 4 code to create meaningful end-to-end cryptographic operations. + +The interface to external libraries is implemented in the form of C language +macros and function calls. + +### Implications + +This design has pros and cons: +| Pro | Con | +| :--------------------------------------------------------------------------------------------------------------- | :--------------------------------------------------------------------- | +| Minimal requirements on crypto support libraries. | Difficult to take advantage of optimized higher-level crypto libraries | +| TPM specification able to evolve to support new commands and protocols without requiring crypto library changes. | Extra data conversions between internal and support library formats | +| When supported by the algorithm, allows blockwise/stream processing where the data would otherwise be too large. | | +| Allows the Core library to do parent/child key derivation as described in the TPM spec. | | + +This means the existing `Core` is not "plug-ready" to accept another +cryptographic library that (for example) wants to provide all of groups 3 or 4 +such as generating primary asymmetric keys, or an AES library that exposes only +higher-level operations like `EncryptMessageAesCbc(message, length)`. + +This is true of symmetric block chaining implementations and key derivation +functions, but has the greatest impact on asymmetric crypto implementation +because the necessary API surface to support Symmetric and Hash operations is +much smaller that the generalized large-number API surface required to implement +arbitrary asymmetric crypto. Implementations could replace higher-level pieces +of the `Core` library (e.g. the entire `src/crypt` folder) to directly provide +desired behavior. This requires the crypto library (or a middle layer) to +effectively rewrite TPM-specific code to understand TPM constructs rather than +being an arbitrary cryptographic library. + +## Specifying the libraries + +Any crypto library must provide a set of header files that are the interface +between the `Core` Library and the particular crypto implementation. The `Core` +code is informed of the name of these header files by three compile-time +defines: + +| Build Flag | Interface File | Description | +| :--------- | :---------------------- | :----------------------------------------------------------- | +| HASH_LIB | TpmTo`[HASH_LIB]`Hash.h | Hashing primitives to provide hashing and HMAC functionality | +| SYM_LIB | TpmTo`[SYM_LIB]`Sym.h | Symmetric (e.g. AES) primitives | +| MATH_LIB | TpmTo`[MATH_LIB]`Math.h | Math Interface used to provide asymmetric implementations | + +Each library must provide a header that matches one of the patterns above. + +The `TPMCmd` folder provides the following implementations for these three interfaces: + +| Build Flag | Flag Value | Description | +| :--------- | :--------- | :------------------------------------------------------------------------------------------- | +| HASH_LIB | Ossl | OpenSSL Hash implementation | +| SYM_LIB | Ossl | OpenSSL AES implementation | +| MATH_LIB | TpmBigNum | TPM "bigNum" based asymmetric Math library. See [TPM BigNum Library](Tpm.BigNum.Library.md) | + +At run-time, a simulator provides information about its crypto libraries via +the `GetCrypto{Sym,Hash,Math}Impl` RPCs on the platform port. diff --git a/docs/architecture/Tpm.Math.Library.md b/docs/architecture/Tpm.Math.Library.md new file mode 100644 index 00000000..f5d586a9 --- /dev/null +++ b/docs/architecture/Tpm.Math.Library.md @@ -0,0 +1,315 @@ + + +# TPM Reference Code - Math Library Design + +- [TPM Reference Code - Math Library Design](#tpm-reference-code---math-library-design) + - [See Also](#see-also) + +## See Also + +- [Introduction](Introduction.md) +- [Library Architecture](Library.Architecture.md) +- [Tpm BigNum Library](Tpm.BigNum.Library.md) +- [Tpm Crypto Libraries](Tpm.Crypto.Libraries.md) +- [Tpm Math Library](Tpm.Math.Library.md) +- [Tpm Platform API](Tpm.Platform.Api.md) + +## Overview + +The goal of this design is that the "Core" library has no internal knowledge or +dependency on the formats used by a specific math/encryption library. The Core +library depends on allocation macros defined by the provider to create +stack-allocated buffers and then refers to values only by opaque pointer. The +internal format of the allocated space is entirely encapsulated within the math +library. + +## Math Library Code Layers + +To keep the boundaries in the code as clear as possible, the `Core` library +specifies function naming prefixes. These take the place of namespaces in other +languages. + +CAUTION: Currently, this naming convention is currently applied ONLY TO +FUNCTIONS, and ONLY in the area of the Math Library. In particular, different +conventions apply to data types, file names, and so forth due to pre-existing +naming in the reference code. + +At the highest level there are three _layers_, which are provided by separate +static libraries: + +| Layer Prefix | Provider | Meaning | +| ------------ | -------- | ------------------------------------------------------------------------------------------------------------------------------- | +| Crypt | Core | Highest layer Cryptographic operations, operating on TPM Specific types. E.g. CryptEccEncrypt. | +| Tpm | Core | Crypto implementation provided by the Core TPM Library, typically operating on raw numbers. e.g. TpmEcc_ValidateSignatureEcdsa | +| Ext | varies | Math and ECC implementation provided by the External Math library(-ies) | + +Within the `Tpm` and `Ext` layer there are multiple _sublayers_. The `Crypt` layer has no sublayer, but calls the `Tpm` or `Ext` layers directly. + +| SubLayer | Meaning | +| :------- | :-------------------------------------------------- | +| Math | Generic math functionality used by both ECC and RSA | +| Ecc | ECC Related functionality (points, curves, etc.) | +| Rsa | RSA related functionality (primes, exponents, etc.) | + +As a shorthand, the rest of this file will frequently refer to the `Ext` library +as `MATH_LIB` to distinguish it from the `SYM_LIB` or `HASH_LIB` libraries. In +practice the implementer may decide to provide the `Ext` asymmetric layers +(Math, Ecc, Rsa) as multiple static libraries, but this documentation refers to +them being in a single library for convenience and does not always differentiate +the sub-layers. + +## Math Library Interface + +The primary interface file for the Math Library is contained in +[MathLibraryInterface.h](../TPMCmd/tpm/../../../TPMCmd/tpm/cryptolibs/common/include/MathLibraryInterface.h) +This document is accessory documentation to that file, which should be +considered the relevant source of truth. + +## Function Naming + +The name of each Function will consist of several parts: + +- a prefix+sublayer combination, followed by +- an underscore, followed by +- function name + +### Function Examples + +| Function Name | Layer | +| :---------------------------- | :------------------------------------------------- | +| `ExtMath_SizeInBits` | External Asymmetric Support Library, Math Sublayer | +| `TpmMath_IsProbablyPrime` | Core TPM library, Math Sublayer | + +`Tpm*` functions expect to be implemented in terms of `Ext*` functions. + +# Data Types + +The Core library contains a number of TPM specific types defined in Part 2 of +the TPM specification, and used in Part 3, such as: + +- `TPM2B_DIGEST` +- `TPM2B_PUBLIC_KEY_RSA` +- `TPMU_ASYM_SCHEME` +- etc. + +A design goal for the interface between the `Core` library and `MATH_LIB` +library is to minimize the number of TPM specific types that are used. + +The concrete data types used between the `Core` and the `Ext` layers +fall into these categories: + +- standard types from `` + - e.g. uint16_t +- some simple typedefs and enum types from the TPM specification to avoid + duplication. + - e.g. NUMBYTES, TPM_ECC_CURVE +- typedefs that are provided by the external library, _**according to the rules + below**_. + +The `Core` library uses `const` correctly in the Math Interface and may use any +`` type. At the time of writing this, the TPM library uses these +types to interface to the `MATH_LIB` Library: + +| NewType | Pointer Type | Layer Defined By | Notes | +| ------------------------ | :----------: | :--------------: | ---------------------------------------------------- | +| Crypt_Int | Y | ExtMath | | +| Crypt_Point | Y | ExtEcc | | +| Crypt_EccCurve | Y | ExtEcc | | +| TPM_ECC_CURVE_ID | N | TPM | Enum value | +| NUMBYTES (uint16_t) | N | TPM | Size from TPM2B (cannot be larger) | +| crypt_uword_t | N | TPM | either uint32_t or uint64_t based on compile options | +| crypt_word_t | N | TPM | either int32_t or int64_t based on compile options | +| uint32_t | N | stdint | | +| uint8_t | N | stdint | | + +## Reserved for future use + +| NewType | Pointer Type | Layer Defined By | Notes | +| ------------------------ | :----------: | :--------------: | ---------------------------------------------------- | +| Crypt_Divisor | Y | ExtMath | May be typedef'd to Crypt_Int | +| Crypt_ModElement | Y | ExtMath | May be typedef'd to Crypt_Int | +| Crypt_Modulus | Y | ExtMath | May be typedef'd to Crypt_Int | + +## Requirements for Externally Defined Types + +As indicated in the table above, the `ExtMath` library is responsible for +defining the main mathematical types. However, the TPM Library does place some +requirements on these new types: + +1. Non-pointer types may be used as value types or pointers to input/return + values (`NUMBYTES` or `NUMBYTES*`). +2. `ExtMath` Pointer types are always used as pointers (`Crypt_Int*`), or + pointers-to-const (`const Crypt_Int*`). +3. `ExtMath` types must be **STACK ALLOCATED** and must provide [STACK + ALLOCATION macros](#stack-allocationtype-macros). +4. `ExtMath` types must be able to be initialized from raw byte arrays in + Most-Significant-Byte first format. +5. Initialization functions must be able to accept single word values (like 1 or + 0) also. + +**WARNING**: The TPM Library uses `longjmp` in FAILURE MODE and multiple early +return paths and does not guarantee that dynamically allocated memory is cleaned +up. The Core library will not provide any notice when a library defined type +(such as `Crypt_Int*`) goes out of scope. This is the reason for stack +allocation described below. + +## Stack Allocation/Type Macros + +The `ExtMath` library must provide type allocation macros that allow the size of +various number objects to be specified in the call to the macro so the compiler +can expand the definition to the correct size for each usage, such as the +following: + +```lang-c +#define CRYPT_INT_BUF(bitsize) struct { \ + crypt_uword_t allocated; \ + crypt_uword_t size; \ + crypt_uword_t d[(bitsize+7)/8]; \ + } +``` + +Note that this **MUST** be a macro in order to be both stack allocated and +dynamically sized. + +The following Allocation/Type Macros must be defined by the `ExtMath` and +`ExtEcc` layers: + +```lang-c +// max_size_in_bits is guaranteed to be constexpr (compile-time constant) and +// indicates the largest value this object will hold during it's lifetime - it may +// contain a smaller value. +// +// NOTE: The `ExtMath` library must be able to perform the correct **COMPILE TIME** +// conversion from bits based on their internal representation. +// +// The typename parameters can be used to form typenames for structures using +// preprocessor token pasting. This can be helpful if the compiler does not support +// anonymous structure types, and/or for getting better compiler error messages. + +#define CRYPT_INT_BUF(typename, max_size_in_bits) +#define CRYPT_POINT_BUF(typename, max_size_in_bits) +#define CRYPT_CURVE_BUF(typename, max_size_in_bits) + +//Reserved for future use: +#define CRYPT_DIVISOR_BUF(typename, max_size_in_bits) +#define CRYPT_MODELEMENT_BUF(typename, max_size_in_bits) +#define CRYPT_MODULUS_BUF(typename, max_size_in_bits) +``` + +**IMPORTANT**: Type macros SHOULD leave the object uninitialized or with a value +of zero. Value initialization will occur separately. + +## Type Initialization + +In the context of the Math library, object initialization happens in two steps. +First, the `Initialization` step refers precisely to informing the +stack-allocated `ExtMath` object how large a value it may contain. All +CRYPT_*_BUF types will be initalized according to the following pattern. +Initialization in this context does NOT! convey any meaning of _value_ merely +_size_. + +Second, after `Initialization` a value will be set by the `Core` library using +either the relevant `FromBytes` API or will call with a fixed `crypt_uword_t` +value such as zero or 1. + +```lang-c + // a fixed size, stack-based object holding the actual data + CRYPT_INT_BUF(size_bits) someVarData; + + // a pointer to the buffer above used for all actual operations. + // This function is the opportunity for the ExtMath library to + // record the actual size inside the object, so it can correctly + // handle the object's size when it receives the pointer later. + Crypt_Int* pSomeVar = ExtMath_Initialize_Int(&someVarData, bits); +``` + +Notice that the `ExtMath_Initialize_Int` function takes a pointer to the result +of the `CRYPT_INT_BUF` macro and the Core library will pass the same allocation +size into the Initialize function. The `ExtMath` library is expected to +initialize the object in the space allocated by the `_BUF` macro and to store its +own size. + +This implies that the size in the macro declaration must be tracked inside the +`Crypt_Int` because the `Core` library assumes that `ExtMath` will handle +overflow checking and be able to report the max(allocated) size later. Also, +observe the code expects the initialization to return the &someVarData pointer +to the `Crypt_Int*` type. Finally, notice how this implies that `Crypt_Int*` is +actually polymorphic on the size. + +Other `_BUF` types are initialized similarly. + +**WARNING**: It is NOT possible to get the correct in-memory size from +`sizeof(*pSomeVar)` for some `Crypt_Int* pSomeVar`. Generally it will be +understated. + +## `ExtMath` Number Typedefs + +As mentioned above, number types are polymorphic with respect to size. +Therefore, there must be a single typedef for each number type which allows the +`Core` library to operate on the variable sized structure. + +The `Core` library defines all the relevant typedefs in +`MathLibraryInterfaceTypes.h` using the relevant `_BUF` macros. + +## Binary Number Formats + +The `Core` Library can be compiled as 32-bit or 64-bit code. That compile +decision determines the size of the smallest word size the TPM Code supports. +This is referred to as TPM_RADIX_BITS and is either 32 or 64. The TPM Library +defines special type aliases `tpm_crypt_uword_t` and `tpm_crypt_word_t` which +are the size of TPM_RADIX_BITS. Operations on "word" values (such as +`ExtMath_AddWord`) refer to these types. + +The TPM communicates to the `ExtMath` Library using the native TPM format, +Most-Significant-Byte (MSB) first. The Core always refers to buffer sizes as a +number of bytes and value sizes as a number of bits. Bits within bytes have the +usual memory numbering and significance; bit 0 is the least-significant (value +1) bit in the least-significant byte, bit 7 is the most significant (value 128) +bit in the least significant byte, etc. + +Note that not all cryptographic numbers are convenient sizes - some are +downright annoying. Take ECC 521-bit curves for example, it is not an even +number of TPM_RADIX_BITS words or even bytes. When given in a byte buffer, +values are always given (and expected) in a buffer that is an integral number of +bytes, but the values may be a different number of bits. + +For example, the NIST P-521 curve uses the following generator coordinates: + +```lang-text + bits: 5 4 4 4 3 3 3 2 2 2 1 1 1 + bits: 1 8 4 1 8 5 2 8 5 2 9 6 2 9 6 3 + bits: 2 0 8 6 4 2 0 8 6 4 2 0 8 6 4 2 0 +P521 generator coordinates +Gx(MSB): c6 858e06b7 0404e9cd 9e3ecb66 2395b442 9c648139 053fb521 f828af60 6b4d3dba a14b5e77 efe75928 fe1dc127 a2ffa8de 3348b3c1 856a429b f97e7e31 c2e5bd66 +Gy(MSB): 118 39296a78 9a3bc004 5c8a5fb4 2c7d1bd9 98f54449 579b4468 17afbd17 273e662c 97ee7299 5ef42640 c550b901 3fad0761 353c7086 a272c240 88be9476 9fd16650 +``` + +The highest-order bytes here are left-padded with zero bits to the number of +bytes required to store a 521 bit number. (i.e. `Gx` is padded to the same size +as `Gy`. + +Thus, viewed as a **byte** array in LSB order, Gy becomes: + +```lang-text +bits 32 64 96 128 256 384 512 528 +Gy (LE): 5066d19f 7694be88 40c272a2 86703c35 6107ad3f 01b950c5 4026f45e 9972ee97 2c663e27 17bdaf17 68449b57 4944f598 d91b7d2c b45f8a5c 04c03b9a 786a2939 1801 +``` + +Hence, a 521-bit value is rounded up to 66 bytes (528 bits). + +The actual storage size for a `Crypt_Int` is left to the `ExtMath` library, but +may be rounded up further based on an internal word size used by the library. + +## Side Channel Considerations + +It is expected that `ExtMath` functions operate in a side-channel safe way. That +is to say the performance of these functions may be `O(1)` or +`O(f(allocated_bits))` for some function `f`, but MUST NOT be +`O(size_of_value)`, unless noted on the function description (in the headers). + + +# Function List + +The official list of required functions and parameters are contained in the +`MathLibraryInterface.h` header file. diff --git a/docs/architecture/Tpm.Platform.Api.md b/docs/architecture/Tpm.Platform.Api.md new file mode 100644 index 00000000..4e213c0b --- /dev/null +++ b/docs/architecture/Tpm.Platform.Api.md @@ -0,0 +1,19 @@ + + +# TPM Reference Code - Platform Library API + +- [TPM Reference Code - Platform Library API](#tpm-reference-code---platform-library-api) + - [See Also](#see-also) + - [TODO](#todo) + +## See Also + +- [Introduction](Introduction.md) +- [Library Architecture](Library.Architecture.md) +- [Tpm BigNum Library](Tpm.BigNum.Library.md) +- [Tpm Crypto Libraries](Tpm.Crypto.Libraries.md) +- [Tpm Math Library](Tpm.Math.Library.md) +- [Tpm Platform API](Tpm.Platform.Api.md) + +## TODO diff --git a/docs/architecture/tpmdiagram.drawio b/docs/architecture/tpmdiagram.drawio new file mode 100644 index 00000000..3400bb2f --- /dev/null +++ b/docs/architecture/tpmdiagram.drawio @@ -0,0 +1 @@ +7Vttc9o4EP41zFw7E8YvQOAjENK3pGVK5trcl4xiC+yeLLmSnEB//enNgC0TaIpjrtNMAtJaXkvPPlqvVkrLHyfLNxSk0TUJIWp5Trhs+Rctz3M7nteSv0640pLzfk8LFjQOTaONYBb/gEboGGkWh5AVGnJCEI/TojAgGMOAF2SAUvJYbDYnqPjUFCygJZgFANnSL3HIIy3td52N/C2MF1H+ZNcxVxKQNzYCFoGQPG6J/EnLH1NCuC4lyzFEErwcF33f5Y6r645RiPkhN3ydXPBszNj3zysf8jc/Lv7+enlmrPMAUGYGPKarlAvRcPqOmY7zVY4GJRkOoVTotPzRYxRzOEtBIK8+CvsLWcQTJGquKDJOyb9r1DaSMUGEKn3+pfoRVwCKF1jIEJxz2VAojfHiStUufCEx/YSUw+VOANw1rIKPkCSQ05VoYm7wBsYShoprjj1uDOvm1oq2jNoxMmC4tFir3sAtCgbxn0Df7VrwHxNy50nI60C0ayPaqQnQf67fJ9nMHz6cDR4+kG/z8ecrWkXnT58nLa+HJKvuqSgtZOmvm+n1OAnFM3iaiE9Gg1e/hvwO6CoA3ommXwTT9W0w/X4Fmv260PQtNGe313dX70Y5oGKa4gJmve+ZdGcarDOm0RpKYChUIOUNckOIb8HJgS4hLbnUavMGDVvF7e3neKXX6NVllo5llrfD2Vttl9OicPNY2Q72enhzGlhZznPQNFiua6FloQRDER6ZKqE8IguCAZpspKMijps2V4SkBr1vkPOVifVAxsmB2DKS0QA+MYBz3Y4DuoB8PyvkWJ60FIUI8PihGAoeH/beH9ibgH3wB/YGYD+3UL9Jk1G8+JglFvzFcNYrxboRSGW7ZLmQS8/2HJHHIAKUt5NMrA/PQhJkiQK10pnX4MH95j24Y6H7LkkRlDjYqzmIw6FcIotagABjcVBEuMhtoYKuvspKu5tXb01LVblYbre8WJnaTqCPRtwtuLsVaOeyg/ltnjAlMeZbsU13h7VzFXrCmru2F+JlReclReUAXgNjKVKMWA/7F0hir5JmKQzieSxs7Tn3EtJrwKOr+J4CunqHOaRzMXfa0bEmKMCYcGELgu88e/GPwD1EU8Ji2UCIqTblKJWAQDp5UGQ+WhzWcUvmqEgLVNHKq20SV6y7IIIB3zLPriD2dzRIp3GD2O+smnyp0+7397hTVZtCGouxQdrKszzCivnzMcEyMoHLmG89QtRucxWivNEuK3t99d5gJIdkr1M/P2mn3in74oOdemfQ7j6tqma3nltgi6WPBM0tpr74Ore3A+I9Fq4vSWj7V8IYahwo39tBoMaAsrMnR4smT8Bj+SflibxeyfrPDi/LLq3Mj7r9kJ3OCDLGib28e/EJNjg1T/QnsNg/TXv/y8DCGxxrOpdfn12vfT7Y+um+7Oy2s2Y302shMKtFURrSQE7lgGcUWnQWU5VX7VnmO5SGY/MYoZIoX5QEECt+juTEjwOAhuZCEoehyslVeZLiNDmCM+kUzVKxRvGr6OXX5Ut8O3nPaCBUBUfb0D8CatZu2kvuwVfjZofN64yHvBcHBLOYcagm5Zn4m0F54SPh8su1IP0dl+DrtXVTS3DfDkXXBpAbzOUN/i9RjJT5pNFiJvEQMX58r4SciA8dk8isvOiubMUj1Q6BlfAu3tiSOCwiGVIpGHmPokUIqUrKZJhtZdAAlp8su/8mTyTlz4sAXsC26CBI5LzC90ynoZ2bSOqbEyS4EOOFIt2c0ESRIe/+WvSgdJSGa0suieqygF/1NYSKEjxi+dCkoMpBOBF4gGqQEGsa8RggJMnBUqTxxGpE6qTQ6/V4b9JEVjBI9CAEQJKVYgysosebmylc9ycSTIKMnyH4oI6RzTMcKAWqhbbSKpU+X/UnFbNUgCJKRBRB3lKBpl9KxipilE4IOFATlWbqzSRbymMg3kgj8mn0fjK+0eUPk1tdgDxov6oyWZpMgqAwdpkxfV3qs+4WzPtUlVSV1xRPWBU1tBXhEshlV46pMIgCeE5lTG1GWjU8ZaWnH6qHuYBY4afUUjEkpVjNNaaoSdcm2lK3gaiGt7zxe82+40vHGboVXrDvVLhBt763lb24mlLCSUDkrVfaUzW9zCqh1vgxJnuVNRWxvXEdp4FZ+YV76MEZt7atRL9voWbtEo3wLEtTQvldYZPIOm0n3FgCqfLZmyNg5lbjTC6N21RsFk4esrt5qpSZ5q9sveVdkdHHu997Y6TTXIKw+vzqCy05fumQavlMWuOnfu30sw4nbIKbsKJ5CA8411fl0usjno2hBdJW4szEFgdkzQo5s30JszwP9pNZsFKG6nlpMeMJtrNiuw/4N5UEc8s7ud0SIQ5NgpXTBh2npOh4Wa9qvtlnbo/CN/c5fHNr5ttTTuvE+ebvocnBfOsXFfll4j6bb6K6+Zcf3Xzzj1P+5D8= \ No newline at end of file diff --git a/docs/architecture/tpmdiagram.drawio.png b/docs/architecture/tpmdiagram.drawio.png new file mode 100644 index 00000000..afc5d28d Binary files /dev/null and b/docs/architecture/tpmdiagram.drawio.png differ diff --git a/docs/architecture/tpmdiagram.drawio.svg b/docs/architecture/tpmdiagram.drawio.svg new file mode 100644 index 00000000..da04f975 --- /dev/null +++ b/docs/architecture/tpmdiagram.drawio.svg @@ -0,0 +1,513 @@ + + + + + + + + + + +
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+ Crypt APIs
+
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+ Crypt + APIs + + + + + + + +
+
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+ CORE
(TPMCmd/tpm/src)
+
+
+ CORE... + + + + + + +
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+ SYM_LIB
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+ SYM_LIB + + + + + + +
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+ TpmBigNum
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+ TpmBigNum + + + + + + + +
+
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+ Implements
+
+
+ Implements + + + + + + + + +
+
+
+ Specified by MathLibraryInterface.h
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+
+ Specified... + + + + + + + + +
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+ Selected by MATH_LIB
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+ wolf
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+ Implements
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+ Implements + + + + + + +
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+ custom
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+ TPM Library Architecture
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+ src/crypt APIs
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+
+ Interface inconsistent - See Note 1
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+ Interface... + + + + + + +
+
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+ Note 1:
While it is possible to customize at this layer, this layer should be + considered unspecified and subject to change.  The following information is + informative.

For some code paths, the src/crypt APIs have been partially + split into Crypt* and Tpm* naming conventions.
Crypt* are the highest-level + functions that typically perform operations on TPM specific data structures (TPM2B, + OBJECT, KEY, etc.)  TpmEcc* and TpmMath* functions operate on MathLibraryInterface + objects.  For example converting from TPM data structures to MathLibraryInterface + objects, generating random values for the MathLibrary, etc.
+
+
+ Note + 1:... + + + + + + +
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+ Protocol Layer
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+ Specified by BnSupport_Interface.h
(Formerly + "SupportLibraryFunctionPrototypes_fp.h")
Selected by BN_MATH_LIB
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+ src/crypt APIs
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+ src/crypt APIs + + + + + + +
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+ TpmEcc
TpmMath
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+ TpmEcc... + + + + + + + Text is not SVG - cannot display + + diff --git a/init.cmd b/init.cmd new file mode 100644 index 00000000..bdd32c15 --- /dev/null +++ b/init.cmd @@ -0,0 +1,25 @@ +@echo off +@REM -- this script provides some environment initialization +@REM -- it sets the environment variable ROOT to the folder containing +@REM -- init.cmd. It also sets INIT to the first command line parameter +@REM -- and calls a personal initialization script if it exists. +set INIT= +if "%1" NEQ "" ( + set INIT=%1 +) + +if [%INIT%] NEQ [] ( + echo captured developer dir [%INIT%] + else ( + echo no developer dir given +) + +echo -- get root folder (containing init.cmd) +FOR %%I IN (%~dp0\TPMCmd\..) DO @SET ROOT=%%~fI +cd %ROOT% + +@REM call developer setenv.cmd if provided +if EXIST %INIT%\Setenv.cmd ( + echo Setting environment from %INIT%\Setenv.cmd + call %INIT%\Setenv.cmd +) diff --git a/scripts/cmake_build.cmd b/scripts/cmake_build.cmd new file mode 100644 index 00000000..ce44f07c --- /dev/null +++ b/scripts/cmake_build.cmd @@ -0,0 +1,74 @@ +@echo off +rem generate cmake environent for building CoreLib, Platform, Simulator as +rem separate components. +rem Usage cmake_build.cmd 0 0 0 [D] +rem Set the desired component to 1. +rem since configure requires the previous buils to complete +rem and be installed, only one item should be a 1 on any call. +rem This is intended as an interactive/dev script, not for +rem use in a CI pipeline - it's use of %CD% is likely unsafe for +rem such an environment + +setlocal ENABLEDELAYEDEXPANSION +set DO_TPMLIB=%1 +set DO_PLATLIB=%2 +set DO_SIMLIB=%3 +set DEBUG_CMAKE=%4 + +if [%DO_TPMLIB%]==[] set DO_TPMLIB=0 +if [%DO_PLATLIB%]==[] set DO_PLATLIB=0 +if [%DO_SIMLIB%]==[] set DO_SIMLIB=0 + +set /A _TOTAL=%DO_TPMLIB% + %DO_PLATLIB% + %DO_SIMLIB% +if %_TOTAL% NEQ 1 ( + echo only one option may be Set + exit /B 1 +) + +if NOT EXIST %cd%\scripts\cmake_env.cmd ( + echo expect to run script from root of tpm repo + exit /b 1 +) +rem first param must match cmake_gen.cmd +call %cd%\scripts\cmake_env.cmd %cd%\build\parts %DEBUG_CMAKE% +if [] equ [%BUILD_ROOT%] ( + echo cmake_env did not set a sensible root + exit /b 1 +) + +if [%DO_TPMLIB%] equ [1] ( + set SOURCE_DIR=TPMCmd\. + set CMAKE_BUILD_SUBDIR=tpmlib +) + +if [%DO_PLATLIB%] equ [1] ( + set SOURCE_DIR=TPMCmd\Platform + set CMAKE_BUILD_SUBDIR=platform +) +if [%DO_SIMLIB%] equ [1] ( + set SOURCE_DIR=TPMCmd\Simulator + set CMAKE_BUILD_SUBDIR=simulator +) + +pwsh -Command "cmake --build %BUILD_ROOT%\%CMAKE_BUILD_SUBDIR% %CMAKE_OPTS% %CMAKE_BUILD_OPTS% 2>&1 | tee %LOG_ROOT%\build_%CMAKE_BUILD_SUBDIR%.log" +if errorlevel 1 goto :FAIL +pwsh -Command "cmake --install %BUILD_ROOT%\%CMAKE_BUILD_SUBDIR% %CMAKE_OPTS% %CMAKE_INSTALL_OPTS% 2>&1 | tee %LOG_ROOT%\install_%CMAKE_BUILD_SUBDIR%.log" +if errorlevel 1 goto :FAIL +echo Build and install succeeded + +goto :EOF + +:FAIL +@echo build or install failed +rem fallthrough to ExitBatch + +:ExitBatch +rem use Ctrl+C exit code to cleanly leave batch file +rem from any nesting level +echo Y > %temp%\yes.txt +call :CtrlC < %temp%\yes.txt +color + +:CtrlC +cmd /c exit -1073741510 +rem exit /B -1073741510 diff --git a/scripts/cmake_env.cmd b/scripts/cmake_env.cmd new file mode 100644 index 00000000..584eeb34 --- /dev/null +++ b/scripts/cmake_env.cmd @@ -0,0 +1,62 @@ + +rem Configure environment expected by other CMake scripts. +rem Usage: cmake_env.cmd buildDir [D] +rem D if extra CMake Trace output desired +set BUILD_SUB_DIR=%1 +set DEBUG_CMAKE=%2 + +set BUILD_CONFIG=Debug + +rem NATIVE_BUILD_OPTIONS are options passed through to the generator itself. +rem see below for examples +set NATIVE_BUILD_OPTIONS= + +rem ** VISUAL STUDIO Generator Options +rem must use single quotes for this since it's put inside quotes to be passed to +rem powershell -Command +rem VS Build generator with cmake_parts takes ~68-70s multi-pass, 51s in one pass. +rem these possibilitises based on the chosen VS2019 generator +rem if using the VS generator, the -A option needs to be added to BUILD_GENERATOR +rem use this for MSBUILD FULL DIAG +rem set NATIVE_BUILD_OPTIONS=-- '-v:diag' +set BUILD_ARCH=x64 +set BUILD_ARCH=Win32 +set BUILD_GENERATOR_VS='Visual Studio 16 2019' -A %BUILD_ARCH% + +rem ** Ninja Generator Options +rem Ninja Makefiles takes ~36s multi-pass, 25s in one pass +rem uses the first compiler on the path, which can affect the perf gain somewhat +set BUILD_GENERATOR_NINJA='Ninja' +rem set NATIVE_BUILD_OPTIONS= + +rem Select Ninja +set BUILD_GENERATOR=%BUILD_GENERATOR_NINJA% + +rem use default crypto options +set CMAKE_TPM_CRYPTO_OPTIONS= + +@REM combine options +set BUILD_NAME=%BUILD_CONFIG%_Ossl_%BUILD_ARCH% +set BUILD_ROOT=%BUILD_SUB_DIR%\%BUILD_NAME% +set INSTALL_ROOT=%BUILD_ROOT%\install +set LOG_ROOT=%BUILD_ROOT% + +rem options for all CMake commands +set CMAKE_OPTS= + +rem options for CMake generate +set CMAKE_CONFIG_DEBUG_OPTIONS= +if [%DEBUG_CMAKE%] equ [D] ( + set CMAKE_CONFIG_DEBUG_OPTIONS=--trace-expand --debug-find --debug-find-pkg TpmConfiguration,Tpm_CompilerOptions,Tpm_CryptoLib_Common,Tpm_CryptoLib_TpmBigNum_Headers,Tpm_CryptoLib_Math_Ossl,Tpm_CryptoLib_TpmBigNum +) + +set CMAKE_GEN_OPTIONS_BASE=-G %BUILD_GENERATOR% -Wdev --log-level=TRACE +set CMAKE_GEN_OPTIONS_BASE=%CMAKE_GEN_OPTIONS_BASE% %CMAKE_CONFIG_DEBUG_OPTIONS% +set CMAKE_GEN_OPTIONS_BASE=%CMAKE_GEN_OPTIONS_BASE% %CMAKE_TPM_CRYPTO_OPTIONS% + +rem options CMake --build +set CONFIG_OPTS=--config %BUILD_CONFIG% +set CMAKE_BUILD_OPTS=-v %CONFIG_OPTS% +set CMAKE_BUILD_OPTS=%CMAKE_BUILD_OPTS% %NATIVE_BUILD_OPTIONS% +rem options CMake --install +set CMAKE_INSTALL_OPTS=%CONFIG_OPTS% diff --git a/scripts/cmake_gen.cmd b/scripts/cmake_gen.cmd new file mode 100644 index 00000000..026750e2 --- /dev/null +++ b/scripts/cmake_gen.cmd @@ -0,0 +1,82 @@ +@echo off +rem generate cmake environent for building CoreLib, Platform, Simulator as +rem separate components. +rem Usage cmake_gen.cmd 0 0 0 [D] +rem Set the desired component to 1. +rem since configure requires the previous builds to complete +rem and be installed, only one item should be a 1 on any call. +rem This is intended as an interactive/dev script, not for +rem use in a CI pipeline - it's use of %CD% is likely unsafe for +rem such an environment + +setlocal ENABLEDELAYEDEXPANSION +set DO_TPMLIB=%1 +set DO_PLATLIB=%2 +set DO_SIMLIB=%3 +set DEBUG_CMAKE=%4 + +if [%DO_TPMLIB%]==[] set DO_TPMLIB=0 +if [%DO_PLATLIB%]==[] set DO_PLATLIB=0 +if [%DO_SIMLIB%]==[] set DO_SIMLIB=0 + +set /A _TOTAL=%DO_TPMLIB% + %DO_PLATLIB% + %DO_SIMLIB% +if %_TOTAL% NEQ 1 ( + echo only one option may be Set + exit /B 1 +) + +if NOT EXIST %cd%\scripts\cmake_env.cmd ( + echo expect to run script from root of tpm repo + exit /b 1 +) + +call %cd%\scripts\cmake_env.cmd %cd%\build\parts %DEBUG_CMAKE% +if [] equ [%BUILD_ROOT%] ( + echo cmake_env did not set a sensible root + exit /b 1 +) + +set CMAKE_GEN_OPTIONS=%CMAKE_GEN_OPTIONS_BASE% --install-prefix %INSTALL_ROOT%\parts + +rem full reset of the build folder if starting with the library +rem also, the library configuration requires the LibOnly option +if [%DO_TPMLIB%] equ [1] ( + if EXIST %BUILD_ROOT% ( + rd /s /q %BUILD_ROOT% + mkdir %LOG_ROOT% + ) + set SOURCE_DIR=TPMCmd\. + set CMAKE_BUILD_SUBDIR=tpmlib + set CMAKE_GEN_OPTIONS=%CMAKE_GEN_OPTIONS% -D Tpm_BuildOption_LibOnly=1 +) + +if [%DO_PLATLIB%] equ [1] ( + set SOURCE_DIR=TPMCmd\Platform + set CMAKE_BUILD_SUBDIR=platform +) + +if [%DO_SIMLIB%] equ [1] ( + set SOURCE_DIR=TPMCmd\Simulator + set CMAKE_BUILD_SUBDIR=simulator +) + +pwsh -Command "cmake -B %BUILD_ROOT%\%CMAKE_BUILD_SUBDIR% -S %SOURCE_DIR% %CMAKE_OPTS% %CMAKE_GEN_OPTIONS% 2>&1 | tee %LOG_ROOT%\gen_%CMAKE_BUILD_SUBDIR%.log" +if errorlevel 1 goto :FAIL +echo Generate succeeded +goto :EOF + +:FAIL +@echo configure failed +rem fallthrough to ExitBatch + +:ExitBatch +rem use Ctrl+C exit code to cleanly leave batch file +rem from any nesting level +echo Y > %temp%\yes.txt +call :CtrlC < %temp%\yes.txt +color + +:CtrlC +cmd /c exit -1073741510 +rem exit /B -1073741510 + diff --git a/scripts/cmake_onepass.cmd b/scripts/cmake_onepass.cmd new file mode 100644 index 00000000..b0441f75 --- /dev/null +++ b/scripts/cmake_onepass.cmd @@ -0,0 +1,68 @@ +@echo off +setlocal ENABLEDELAYEDEXPANSION +set DEBUG_CMAKE=%1 +set MIN_BUILD=%2 + +set DO_NOT_CLEAN=0 +if [%MIN_BUILD%]==[1] ( + set DO_NOT_CLEAN=1 +) + +if NOT EXIST %cd%\scripts\cmake_env.cmd ( + echo expect to run script from root of tpm repo + exit /b 1 +) + +call %cd%\scripts\cmake_env.cmd %cd%\build\solo %DEBUG_CMAKE% +if [] equ [%BUILD_ROOT%] ( + echo cmake_env did not set a sensible root + exit /b 1 +) + +if [%DO_NOT_CLEAN%] == [0] ( + rem full reset of the build folder + if EXIST %BUILD_ROOT% ( + rd /s /q %BUILD_ROOT% + ) + mkdir %BUILD_ROOT% + rem LOG_ROOT must exist or TEE fails below + mkdir %LOG_ROOT% +) + +rem configure, build, install for all components in a single CMake pass +set CMAKE_GEN_OPTIONS=%CMAKE_GEN_OPTIONS_BASE% --install-prefix %INSTALL_ROOT%\combined +set SOURCE_DIR=TPMCmd\. +set CMAKE_BUILD_SUBDIR=tpm +call :RunTuple +echo Combined Build succeeded +goto :EOF + +:RunTuple +rem run CMake configure, build, install +rem powershell 7 needed to fix some redirection issues with TEE. can be replaced with +rem powershell by removing 2>&1 | tee part of command lines. +pwsh -Command "cmake -B %BUILD_ROOT%\%CMAKE_BUILD_SUBDIR% -S %SOURCE_DIR% %CMAKE_OPTS% %CMAKE_GEN_OPTIONS% 2>&1 | tee %LOG_ROOT%\gen_%CMAKE_BUILD_SUBDIR%.log" +if errorlevel 1 goto :FAIL +pwsh -Command "cmake --build %BUILD_ROOT%\%CMAKE_BUILD_SUBDIR% %CMAKE_OPTS% %CMAKE_BUILD_OPTS% 2>&1 | tee %LOG_ROOT%\build_%CMAKE_BUILD_SUBDIR%.log" +if errorlevel 1 goto :FAIL +pwsh -Command "cmake --install %BUILD_ROOT%\%CMAKE_BUILD_SUBDIR% %CMAKE_OPTS% %CMAKE_INSTALL_OPTS% 2>&1 | tee %LOG_ROOT%\install_%CMAKE_BUILD_SUBDIR%.log" +if errorlevel 1 goto :FAIL + +goto :EOF + +:FAIL +@echo build or install failed +rem fallthrough to ExitBatch + +:ExitBatch +rem use Ctrl+C exit code to cleanly leave batch file +rem from any nesting level +echo Y > %temp%\yes.txt +call :CtrlC < %temp%\yes.txt +color + +:CtrlC +cmd /c exit -1073741510 +rem exit /B -1073741510 + + diff --git a/scripts/cmake_parts.cmd b/scripts/cmake_parts.cmd new file mode 100644 index 00000000..40581c57 --- /dev/null +++ b/scripts/cmake_parts.cmd @@ -0,0 +1,11 @@ +rem configure, then build+install the TPM using CMake with +rem three build domains: Core Library; Platform; Simulator +rem pass D for debug, or N/blank for not +set CMD_CMAKE_DEBUG_REQUEST=%1 + +call scripts\cmake_gen.cmd 1 0 0 %CMD_CMAKE_DEBUG_REQUEST% +call scripts\cmake_build.cmd 1 0 0 %CMD_CMAKE_DEBUG_REQUEST% +call scripts\cmake_gen.cmd 0 1 0 %CMD_CMAKE_DEBUG_REQUEST% +call scripts\cmake_build.cmd 0 1 0 %CMD_CMAKE_DEBUG_REQUEST% +call scripts\cmake_gen.cmd 0 0 1 %CMD_CMAKE_DEBUG_REQUEST% +call scripts\cmake_build.cmd 0 0 1 %CMD_CMAKE_DEBUG_REQUEST% diff --git a/scripts/cmake_verify_build.cmd b/scripts/cmake_verify_build.cmd new file mode 100644 index 00000000..df727fc8 --- /dev/null +++ b/scripts/cmake_verify_build.cmd @@ -0,0 +1,29 @@ +@echo off +setlocal ENABLEDELAYEDEXPANSION +set DEBUG_CMAKE=%1 + +call scripts\cmake_onepass.cmd +if errorlevel 1 goto :FAIL + +call scripts\cmake_parts.cmd +if errorlevel 1 goto :FAIL + +@echo all builds succeeded +exit /B 0 + +:FAIL +@echo build or install failed +rem fallthrough to ExitBatch + +:ExitBatch +rem use Ctrl+C exit code to cleanly leave batch file +rem from any nesting level +echo Y > %temp%\yes.txt +call :CtrlC < %temp%\yes.txt +color + +:CtrlC +cmd /c exit -1073741510 +rem exit /B -1073741510 + + diff --git a/scripts/detectEol.py b/scripts/detectEol.py new file mode 100644 index 00000000..d28f8053 --- /dev/null +++ b/scripts/detectEol.py @@ -0,0 +1,151 @@ +# The copyright in this software is being made available under the BSD License, +# included below. This software may be subject to other third party and +# contributor rights, including patent rights, and no such rights are granted +# under this license. +# +# Copyright (c) Microsoft Corporation +# +# All rights reserved. +# +# BSD License +# +# Redistribution and use in source and binary forms, with or without modification, +# are permitted provided that the following conditions are met: +# +# Redistributions of source code must retain the above copyright notice, this list +# of conditions and the following disclaimer. +# +# Redistributions in binary form must reproduce the above copyright notice, this +# list of conditions and the following disclaimer in the documentation and/or other +# materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +import os +import sys +import fileinput +import operator +import argparse +parser = argparse.ArgumentParser(formatter_class=argparse.RawDescriptionHelpFormatter, +description=''' +Detect instances of given EOL format. No changes are made. +If a file has the requested line ending, then the filename is output with +counts displayed as (LF/CRLF). + +''', +epilog=''' +''') + +parser.add_argument('--xd', type=str, nargs='+', default=['.git', 'external'], + help='Exclude directories') +parser.add_argument('--filetypes', '-t', metavar='ext', type=str, nargs='+', + help='File Types to process', default = ["c", "h"]) +parser.add_argument('--verbose', '-v', default=False, action='store_true', + help='Report parameters and all files processed, regardless of findings.') +parser.add_argument('--showerrors', '-e', default=False, action='store_true', + help='Show lines that have the requested line endings (errors).') +parser.add_argument('--showcounts', '-c', default=False, action='store_true', + help='Show line ending counts for all files.') +parser.add_argument('--crlf', default=False, action='store_true', + help='Find/Count CRLF line endings.') +parser.add_argument('--lf', default=False, action='store_true', + help='Find/Count LF-only line endings.') + +totalLF = 0 +totalCRLF = 0 + + +args = parser.parse_args() +count = 0 +if args.crlf: + count = count+1 +if args.lf: + count = count+1 + +if (count != 1): + raise Exception("exactly one --crlf, --lf option required.") + +def countEndings(lines, endsWithLinebreak): + countLF = 0 + countCRLF = 0 + + # note: lines is an array of byte arrays, not a strings + for k, line in enumerate(lines): + + # don't count last line if there is no line break at the end. + if args.verbose and k == len(lines)-1 and not endsWithLinebreak: + continue + + hasCRLF = False + if len(line) != 0: + # detect line ending + hasCRLF = (line[-1:] == b'\r') + + if hasCRLF: + countCRLF = countCRLF+1 + else: + countLF = countLF+1 + + # print lines in error if requested + if args.showerrors and ((args.lf and not hasCRLF) or (args.crlf and hasCRLF)): + print("*** %s (%d:%s)" % (os.path.basename(fname), k+1, line), file=sys.stdout) + + return (countLF, countCRLF) + +def processFile(fname): + + # slurp file in binary to preserve line endings + with open(fname, "rb") as infile: + contents = infile.read() + + # check to see if line ends on a line break or not + endsWithLinebreak = (contents[-1:] == b'\n') + if args.verbose: + if not endsWithLinebreak: + print("processing: %s (missing final linebreak)" % (fname)) + else: + print("processing: %s" % (fname)) + + # break at LF so we can detect CRLF and LF differences + lines = contents.split(b'\n') + # if the file ends with a line break, then there will be one extra null line + # after split, remove it. + lines = lines[:len(lines)-1] + (countLF, countCRLF) = countEndings(lines, endsWithLinebreak) + + global totalLF + global totalCRLF + totalLF += countLF + totalCRLF += countCRLF + + if args.showcounts or (args.lf and countLF != 0) or (args.crlf and countCRLF != 0): + print("*** %s (%d/%d)" % (os.path.basename(fname), countLF, countCRLF), file=sys.stdout) + +# skip these folders +excludeDirs = set(args.xd) +# turn extension list into actual file extensions +includeFileTypes = tuple(['.' + t for t in args.filetypes]) + +if args.verbose: + print("excludeDirs: %s" % (excludeDirs)) + print(" filetypes: %s" % (str(includeFileTypes))) + print(" findCRLF: %s" % (args.crlf)) + print(" findLF: %s" % (args.lf)) + print(" verbose: %s" % (args.verbose)) + +for dirpath, dirs, files in os.walk("./", topdown=True): + dirs[:] = [d for d in dirs if d not in excludeDirs] + for filename in files: + if filename.endswith(includeFileTypes): + fname = os.path.join(dirpath,filename) + processFile(fname) +print("Total Lines ending with LF: " + str(totalLF)) +print("Total Lines ending with CRLF: " + str(totalCRLF)) \ No newline at end of file diff --git a/scripts/fast_cmake_parts.cmd b/scripts/fast_cmake_parts.cmd new file mode 100644 index 00000000..66373ef9 --- /dev/null +++ b/scripts/fast_cmake_parts.cmd @@ -0,0 +1,14 @@ +rem build+install the TPM using CMake with +rem three build domains: Core Library; Platform; Simulator +rem don't configure, which makes for fast partial builds, but +rem means this script can't be used from a completely empty build environment, +rem use cmake_parts.cmd first. +rem pass D for debug, or N/blank for not +set CMD_CMAKE_DEBUG_REQUEST=%1 + +rem call scripts\cmake_gen.cmd 1 0 0 %CMD_CMAKE_DEBUG_REQUEST% +call scripts\cmake_build.cmd 1 0 0 %CMD_CMAKE_DEBUG_REQUEST% +rem call scripts\cmake_gen.cmd 0 1 0 %CMD_CMAKE_DEBUG_REQUEST% +call scripts\cmake_build.cmd 0 1 0 %CMD_CMAKE_DEBUG_REQUEST% +rem call scripts\cmake_gen.cmd 0 0 1 %CMD_CMAKE_DEBUG_REQUEST% +call scripts\cmake_build.cmd 0 0 1 %CMD_CMAKE_DEBUG_REQUEST% diff --git a/scripts/formatcode.ps1 b/scripts/formatcode.ps1 new file mode 100644 index 00000000..55e0a3e2 --- /dev/null +++ b/scripts/formatcode.ps1 @@ -0,0 +1,19 @@ + +function Format-Folder +{ + param ([string]$FolderName) + Write-Host "Scanning Folder" $FolderName + Get-ChildItem -Path $FolderName -File -Recurse -Include *.h, *.c, *.cpp, *.inl | + foreach { + Write-Host "Formatting " $_ + clang-format -i -style=file $_.FullName + } +} + +foreach ($subdir in "TPMCmd/tpm", "TPMCmd/Platform", "TPMCmd/Simulator") +{ + Get-ChildItem -Path $subdir -Directory | + foreach { + Format-Folder -FolderName $_.FullName + } +} diff --git a/scripts/formatstaged.cmd b/scripts/formatstaged.cmd new file mode 100644 index 00000000..a6e0732a --- /dev/null +++ b/scripts/formatstaged.cmd @@ -0,0 +1,3 @@ +@echo off +rem format files staged in the .git index +for /f %%i in ('git diff-index --cached --name-only HEAD ^| findstr /IR /C:\.h /C:\.c /C:\.cpp /C:\.hpp /C:\.inl ^| findstr /v /C:\.cmd') do @clang-format --style=file -i --verbose %%i diff --git a/scripts/getossl.cmd b/scripts/getossl.cmd new file mode 100644 index 00000000..6f03a990 --- /dev/null +++ b/scripts/getossl.cmd @@ -0,0 +1,99 @@ + +@echo off +setlocal ENABLEEXTENSIONS ENABLEDELAYEDEXPANSION + +goto :SkipUsage + +:Usage + + echo usage: getossl.cmd arch folder + echo examples: getossl.cmd x86 c:\openssl + echo getossl.cmd x64 c:\opensslx64 + echo. + echo WARNING: This command is destructive - it will force-delete the existing local Openssl copy. + echo. + goto :ExitBatch + +::------------------------------------ +:: use Ctrl+C exit code to cleanly leave batch file +:ExitBatch +echo Y > %temp%\yes.txt +call :CtrlC < %temp%\yes.txt +color + +:CtrlC +cmd /c exit -1073741510 +::exit /B -1073741510 + +:SkipUsage + +set FLAVOR=%1 +rem contains absolute path +set OPENSSL_DIR=%2 + +if [%2] equ [] ( + echo. + echo ERROR: must specify directory of already compiled openssl library. + goto :Usage +) +if NOT EXIST %2 ( + echo. + echo OpenSSL folder [%2] not found. + goto :Usage +) + +if NOT EXIST TpmCmd\ ( + echo. + echo ERROR: TpmCmd folder not found + echo must be run above the TpmCmd folder in the TPM source tree. + goto :Usage +) + +if [%FLAVOR%] neq [x86] ( + if [%FLAVOR%] neq [x64] ( + echo. + echo ERROR: architecture is invalid or unsupported + echo FLAVOR must be x86 or x64, was [%FLAVOR%] + goto :Usage + ) +) + +rem contains path relative to TpmCmd +set TARGET_LIB_FOLDER_ROOT=lib +set TARGET_LIB_FOLDER= +set TARGET_INC_FOLDER_ROOT=OsslInclude +set TARGET_INC_FOLDER= + +if [%FLAVOR%] equ [x86] ( + set TARGET_LIB_FOLDER=%TARGET_LIB_FOLDER_ROOT% + set TARGET_INC_FOLDER=%TARGET_INC_FOLDER_ROOT% +) else ( + if [%FLAVOR%] equ [x64] ( + set TARGET_LIB_FOLDER=%TARGET_LIB_FOLDER_ROOT%\x64 + set TARGET_INC_FOLDER=%TARGET_INC_FOLDER_ROOT%\x64 + ) +) + +rem *** DO COPIES *** + +pushd TpmCmd\ +rd /s /q %TARGET_LIB_FOLDER_ROOT% +rd /s /q %TARGET_INC_FOLDER_ROOT% + +mkdir %TARGET_LIB_FOLDER_ROOT% +mkdir %TARGET_INC_FOLDER_ROOT% + +if NOT EXIST %TARGET_LIB_FOLDER% ( + mkdir %TARGET_LIB_FOLDER% +) + +if NOT EXIST %TARGET_INC_FOLDER% ( + mkdir %TARGET_INC_FOLDER% +) + +copy %OPENSSL_DIR%\libcrypto.lib %TARGET_LIB_FOLDER% +copy %OPENSSL_DIR%\lib\libcrypto.lib %TARGET_LIB_FOLDER% +copy %OPENSSL_DIR%\libcrypto-1_1*.dll %TARGET_LIB_FOLDER% +copy %OPENSSL_DIR%\bin\libcrypto-1_1*.dll %TARGET_LIB_FOLDER% +@echo on +xcopy %OPENSSL_DIR%\include\openssl\* %TARGET_INC_FOLDER%\openssl\* diff --git a/scripts/gitclean.cmd b/scripts/gitclean.cmd new file mode 100644 index 00000000..b838bff7 --- /dev/null +++ b/scripts/gitclean.cmd @@ -0,0 +1,7 @@ +@echo off +git clean -ndx --exclude .vscode --exclude TPMCmd/.vs + +echo Press Ctrl+C NOW if you don't want to delete these. +pause + +git clean -fdx --exclude .vscode --exclude TPMCmd/.vs diff --git a/scripts/init.cmd b/scripts/init.cmd new file mode 100644 index 00000000..b1ec1579 --- /dev/null +++ b/scripts/init.cmd @@ -0,0 +1,54 @@ +@echo off +@REM -- Configure build environment variables +@REM -- Usage: init.cmd CMakePath +@REM -- CMakePath: Local path to CMake runtime to be used. +@REM -- May be -- to skip and allow developer directory to set it up. +@REM -- DeveloperDir: Optional folder outside the source tree with a setenv.cmd +@REM -- script that can customize local dev tools. +@REM -- +@REM -- This script exits with the following environment variables set: +@REM -- CMAKEPATH = CMake path given on command line +@REM -- DEVDIR = developer directory given on command line +@REM -- ROOT = Root directory of the working directory, parent of +@REM folder containing init.cmd +@REM -- PATH = original PATH + CMAKEPATH + customizations from DEVDIR/setenv.cmd + +@REM -- get root folder (containing init.cmd) +FOR %%I IN (%~dp0\..) DO @SET ROOT=%%~fI +echo ROOT=%ROOT% +cd %ROOT% + +@REM -- capture CMAKEPATH +set CMAKEPATH= +if "%1" NEQ "--" ( + set CMAKEPATH=%1 +) +shift +@REM -- Capture developer dir if given +set INIT= +if "%1" NEQ "" ( + set DEVDIR=%1 +) + +if [%DEVDIR%] NEQ [] ( + echo captured developer dir [%DEVDIR%] +) else ( + echo no developer dir given +) + +echo post root %CD% +@REM -- add cmake to path, if given +if [%CMAKEPATH%] NEQ [] ( + echo adding %CMAKEPATH% to path + path %PATH%;%CMAKEPATH% +) else ( + echo CMake path not given on command line, expect it setup externally. +) + +@REM -- call developer setenv.cmd if provided +if EXIST %DEVDIR%\Setenv.cmd ( + echo Setting environment from %DEVDIR%\Setenv.cmd + call %DEVDIR%\Setenv.cmd +) + +@REM -- fini diff --git a/scripts/putclangonpath.cmd b/scripts/putclangonpath.cmd new file mode 100644 index 00000000..132d0c3b --- /dev/null +++ b/scripts/putclangonpath.cmd @@ -0,0 +1,2 @@ +rem no quotes - powershell will ignore it. +path %PATH%;c:\Program Files\Microsoft Visual Studio\2022\Enterprise\VC\Tools\Llvm\bin diff --git a/scripts/rtrimTree.py b/scripts/rtrimTree.py new file mode 100644 index 00000000..0711f2a5 --- /dev/null +++ b/scripts/rtrimTree.py @@ -0,0 +1,186 @@ +# The copyright in this software is being made available under the BSD License, +# included below. This software may be subject to other third party and +# contributor rights, including patent rights, and no such rights are granted +# under this license. +# +# Copyright (c) Microsoft Corporation +# +# All rights reserved. +# +# BSD License +# +# Redistribution and use in source and binary forms, with or without modification, +# are permitted provided that the following conditions are met: +# +# Redistributions of source code must retain the above copyright notice, this list +# of conditions and the following disclaimer. +# +# Redistributions in binary form must reproduce the above copyright notice, this +# list of conditions and the following disclaimer in the documentation and/or other +# materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +# ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +import os +import sys +import fileinput +import operator +import argparse +parser = argparse.ArgumentParser(formatter_class=argparse.RawDescriptionHelpFormatter, +description=''' +Strip trailing whitespace from a tree of code files while making no +other formatting changes. In particular, don't update line endings. +Optionally, additional tweaks can be applied, see --help. + +WARNING: This script is destructive - it modifies files in place without warning. + +''', +epilog=''' +''') + +parser.add_argument('--xd', type=str, nargs='+', default=['.git', 'external'], + help='Exclude directories') +parser.add_argument('--filetypes', '-t', metavar='ext', type=str, nargs='+', + help='File Types to process', default = ["c", "h"]) +parser.add_argument('--removeSoloComments', default=False, action='store_true', + help='Remove empty comment lines that have no adjacent comments.') +parser.add_argument('--dontTrim', default=False, action='store_true', + help='Perform only fixups, not including actual trimming. e.g. Only remove empty comment lines.') +parser.add_argument('--verbose', '-v', default=False, action='store_true', + help='Report parameters and all files processed, regardless of changes.') + +args = parser.parse_args() + +def applyFixups(lines): + # true when inbetween /* and */ + inMultilineComment = False + # true when previous line started with "//" + # i.e. was not a line-end comment + lastWasFullSingleLineComment = False + # True when previous line was an empty comment that was removed + lastWasRemovedSingleLineComment = False + fixed = 0 + emptyComments = 0 + + # note: lines is an array of byte arrays, not a strings + for k, line in enumerate(lines): + if len(line) != 0: + # detect line ending so it can be preserved + hasCR = (line[-1:] == b'\r') + + # first perform the primary purpose, strip right whitespace + new_line = line.rstrip() + + # second perform solo comment tracking + # this is very naive and handles only single-line C/C++ comments ("//") + # if triming the line of white space results in exactly "//" then delete it unless + # it follows another comment on the previous line or is part of a multi-line comment. + # Track multi-line comments for starting and ending in a very + # brute force way "/*" starts and "*/" ends if the line contains only one of them. + # so single line annotations /*abc*/ won't change the comment tracking state + # EVEN if the line ends in /*, such as foo(/*abc*/x, y); /* start long comment + if args.removeSoloComments: + tmp = new_line.lstrip() + isFullLineComment = False + if tmp[0:2] == b"//": + isFullLineComment = True + else: + if operator.contains(line, b"/*"): + inMultilineComment = True + if operator.contains(line, b"*/"): + inMultilineComment = False + + isEmptyComment = (tmp == b"//") + + # if this is a full-line, non-empty comment, + # and the last line was a removed empty comment, restore previous line. + # This solves patterns like: + # // + # // some comment + # // + + if isFullLineComment and not isEmptyComment and lastWasRemovedSingleLineComment: + lines[k-1] = previousOriginalLine + emptyComments -= 1 + fixed -= 1 + + if isEmptyComment and not lastWasFullSingleLineComment and not inMultilineComment: + new_line = b'' + # reset flag so this empty line doesn't + # protect a following empty line + isFullLineComment = False + lastWasRemovedSingleLineComment = True + emptyComments += 1 + else: + lastWasRemovedSingleLineComment = False + + lastWasFullSingleLineComment = isFullLineComment + + # put CR back if it was removed. + # LF is handled in caller when line array is joined. + if hasCR: + new_line = new_line + b'\r' + + # save the current line in case we need to restore it + # on the next line because it was an empty comment + previousOriginalLine = lines[k] + + # if not doing trimming, save only if a special case + if args.dontTrim and not lastWasRemovedSingleLineComment: + pass + elif len(line) != len(new_line): + lines[k] = new_line + fixed += 1 + + return (fixed, emptyComments) + +def rightTrimFileWhitespace(fname): + if args.verbose: + print("processing: %s" % (fname)) + # slurp file in binary to preserve line endings + with open(fname, "rb") as infile: + contents = infile.read() + # break at LF so we can detect CRLF and LF differences + lines = contents.split(b'\n') + + (linesFixed, emptyComments) = applyFixups(lines) + + # an assert by any other name + if emptyComments != 0 and not args.removeSoloComments: + raise Exception("Unexpected comment modifications occured") + + with open(fname, "wb") as fo: + fo.write(b'\n'.join(lines)) + + if linesFixed or args.verbose: + if args.removeSoloComments: + print("*** %s (%d/%d)" % (os.path.basename(fname), linesFixed, emptyComments), file=sys.stderr) + else: + print("*** %s (%d)" % (os.path.basename(fname), linesFixed), file=sys.stderr) + + +# skip these folders +excludeDirs = set(args.xd) +# turn extension list into actual file extensions +includeFileTypes = tuple(['.' + t for t in args.filetypes]) + +if args.verbose: + print("excludeDirs: %s" % (excludeDirs)) + print(" filetypes: %s" % (str(includeFileTypes))) + print(" removeSolo: %s" % (args.removeSoloComments)) + print(" verbose: %s" % (args.verbose)) + +for dirpath, dirs, files in os.walk("./", topdown=True): + dirs[:] = [d for d in dirs if d not in excludeDirs] + for filename in files: + if filename.endswith(includeFileTypes): + fname = os.path.join(dirpath,filename) + rightTrimFileWhitespace(fname) diff --git a/testing/expectations.json b/testing/expectations.json new file mode 100644 index 00000000..3b623881 --- /dev/null +++ b/testing/expectations.json @@ -0,0 +1,23 @@ +{ + "OkSkip": [ + "^TestSm4$", + "^TestSm2EncryptDecrypt$", + "^TestCertifyX509$" + ], + "OkFail": [], + "TimeLimits": { + "^TestCreateEccPrimary$": 200, + "^TestSignVerify$": 200, + "^TestKeyCreation$": 200, + "^TestKeyGen$": 200, + "^TestRsaDpEp$": 200, + "^TestDerivationKAT.*$": 200, + "^TestEncryptDecrypt.*$": 200, + "^TestNvPartialWrite$": 200, + "^TestCmac$": 100, + "^TestDuplicateImport$": 100, + "^TestSimpleSign$": 100, + "^TestUnorderlyDA$": 100, + "^.*$": 80 + } +} \ No newline at end of file